Pull perf tools fixes from Namhyung Kim: "Assorted build fixes including: - fix compile errors in printf() with u64 on 32-bit systesm - sync kernel headers to the tool copies - update arm64 sysreg generation for tarballs - disable compile warnings on __packed attribute" * tag 'perf-tools-fixes-for-v6.7-1-2023-11-29' of git://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools: tools: Disable __packed attribute compiler warning due to -Werror=attributes perf build: Ensure sysreg-defs Makefile respects output dir tools perf: Add arm64 sysreg files to MANIFEST tools/perf: Update tools's copy of mips syscall table tools/perf: Update tools's copy of s390 syscall table tools/perf: Update tools's copy of powerpc syscall table tools/perf: Update tools's copy of x86 syscall table tools headers: Update tools's copy of s390/asm headers tools headers: Update tools's copy of arm64/asm headers tools headers: Update tools's copy of x86/asm headers tools headers: Update tools's copy of socket.h header tools headers UAPI: Update tools's copy of unistd.h header tools headers UAPI: Update tools's copy of vhost.h header tools headers UAPI: Update tools's copy of mount.h header tools headers UAPI: Update tools's copy of kvm.h header tools headers UAPI: Update tools's copy of fscrypt.h header tools headers UAPI: Update tools's copy of drm headers perf lock contention: Fix a build error on 32-bit perf kwork: Fix a build error on 32-bit
Unified · Split
| @@ -79,13 +79,15 @@ · 78 unmodified lines | |||
| 79 | #define ARM_CPU_PART_CORTEX_A78AE 0xD42 | 79 | #define ARM_CPU_PART_CORTEX_A78AE 0xD42 |
| 80 | #define ARM_CPU_PART_CORTEX_X1 0xD44 | 80 | #define ARM_CPU_PART_CORTEX_X1 0xD44 |
| 81 | #define ARM_CPU_PART_CORTEX_A510 0xD46 | 81 | #define ARM_CPU_PART_CORTEX_A510 0xD46 |
| 82 | #define ARM_CPU_PART_CORTEX_A520 0xD80 | ||
| 82 | #define ARM_CPU_PART_CORTEX_A710 0xD47 | 83 | #define ARM_CPU_PART_CORTEX_A710 0xD47 |
| 83 | #define ARM_CPU_PART_CORTEX_A715 0xD4D | 84 | #define ARM_CPU_PART_CORTEX_A715 0xD4D |
| 84 | #define ARM_CPU_PART_CORTEX_X2 0xD48 | 85 | #define ARM_CPU_PART_CORTEX_X2 0xD48 |
| 85 | #define ARM_CPU_PART_NEOVERSE_N2 0xD49 | 86 | #define ARM_CPU_PART_NEOVERSE_N2 0xD49 |
| 86 | #define ARM_CPU_PART_CORTEX_A78C 0xD4B | 87 | #define ARM_CPU_PART_CORTEX_A78C 0xD4B |
| 87 | 88 | ||
| 88 | #define APM_CPU_PART_POTENZA 0x000 | 89 | #define APM_CPU_PART_XGENE 0x000 |
| 90 | #define APM_CPU_VAR_POTENZA 0x00 | ||
| 89 | 91 | ||
| 90 | #define CAVIUM_CPU_PART_THUNDERX 0x0A1 | 92 | #define CAVIUM_CPU_PART_THUNDERX 0x0A1 |
| 91 | #define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2 | 93 | #define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2 |
| @@ -148,6 +150,7 @@ · 56 unmodified lines | |||
| 148 | #define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE) | 150 | #define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE) |
| 149 | #define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1) | 151 | #define MIDR_CORTEX_X1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1) |
| 150 | #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) | 152 | #define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510) |
| 153 | #define MIDR_CORTEX_A520 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A520) | ||
| 151 | #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) | 154 | #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710) |
| 152 | #define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715) | 155 | #define MIDR_CORTEX_A715 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A715) |
| 153 | #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) | 156 | #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2) |
| @@ -505,6 +505,38 @@ struct kvm_smccc_filter { · 504 unmodified lines | |||
| 505 | #define KVM_HYPERCALL_EXIT_SMC (1U << 0) | 505 | #define KVM_HYPERCALL_EXIT_SMC (1U << 0) |
| 506 | #define KVM_HYPERCALL_EXIT_16BIT (1U << 1) | 506 | #define KVM_HYPERCALL_EXIT_16BIT (1U << 1) |
| 507 | 507 | ||
| 508 | /* | ||
| 509 | * Get feature ID registers userspace writable mask. | ||
| 510 | * | ||
| 511 | * From DDI0487J.a, D19.2.66 ("ID_AA64MMFR2_EL1, AArch64 Memory Model | ||
| 512 | * Feature Register 2"): | ||
| 513 | * | ||
| 514 | * "The Feature ID space is defined as the System register space in | ||
| 515 | * AArch64 with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7}, | ||
| 516 | * op2=={0-7}." | ||
| 517 | * | ||
| 518 | * This covers all currently known R/O registers that indicate | ||
| 519 | * anything useful feature wise, including the ID registers. | ||
| 520 | * | ||
| 521 | * If we ever need to introduce a new range, it will be described as | ||
| 522 | * such in the range field. | ||
| 523 | */ | ||
| 524 | #define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \ | ||
| 525 | ({ \ | ||
| 526 | __u64 __op1 = (op1) & 3; \ | ||
| 527 | __op1 -= (__op1 == 3); \ | ||
| 528 | (__op1 << 6 | ((crm) & 7) << 3 | (op2)); \ | ||
| 529 | }) | ||
| 530 | |||
| 531 | #define KVM_ARM_FEATURE_ID_RANGE 0 | ||
| 532 | #define KVM_ARM_FEATURE_ID_RANGE_SIZE (3 * 8 * 8) | ||
| 533 | |||
| 534 | struct reg_mask_range { | ||
| 535 | __u64 addr; /* Pointer to mask array */ | ||
| 536 | __u32 range; /* Requested range */ | ||
| 537 | __u32 reserved[13]; | ||
| 538 | }; | ||
| 539 | |||
| 508 | #endif | 540 | #endif |
| 509 | 541 | ||
| 510 | #endif /* __ARM_KVM_H__ */ | 542 | #endif /* __ARM_KVM_H__ */ |
| @@ -36,11 +36,13 @@ enum perf_event_arm_regs { · 35 unmodified lines | |||
| 36 | PERF_REG_ARM64_LR, | 36 | PERF_REG_ARM64_LR, |
| 37 | PERF_REG_ARM64_SP, | 37 | PERF_REG_ARM64_SP, |
| 38 | PERF_REG_ARM64_PC, | 38 | PERF_REG_ARM64_PC, |
| 39 | PERF_REG_ARM64_MAX, | ||
| 39 | 40 | ||
| 40 | /* Extended/pseudo registers */ | 41 | /* Extended/pseudo registers */ |
| 41 | PERF_REG_ARM64_VG = 46, // SVE Vector Granule | 42 | PERF_REG_ARM64_VG = 46, /* SVE Vector Granule */ |
| 42 | 43 | PERF_REG_ARM64_EXTENDED_MAX | |
| 43 | PERF_REG_ARM64_MAX = PERF_REG_ARM64_PC + 1, | ||
| 44 | PERF_REG_ARM64_EXTENDED_MAX = PERF_REG_ARM64_VG + 1 | ||
| 45 | }; | 44 | }; |
| 45 | |||
| 46 | #define PERF_REG_EXTENDED_MASK (1ULL << PERF_REG_ARM64_VG) | ||
| 47 | |||
| 46 | #endif /* _ASM_ARM64_PERF_REGS_H */ | 48 | #endif /* _ASM_ARM64_PERF_REGS_H */ |
| @@ -22,7 +22,7 @@ endif · 21 unmodified lines | |||
| 22 | arm64_tools_dir = $(top_srcdir)/arch/arm64/tools | 22 | arm64_tools_dir = $(top_srcdir)/arch/arm64/tools |
| 23 | arm64_sysreg_tbl = $(arm64_tools_dir)/sysreg | 23 | arm64_sysreg_tbl = $(arm64_tools_dir)/sysreg |
| 24 | arm64_gen_sysreg = $(arm64_tools_dir)/gen-sysreg.awk | 24 | arm64_gen_sysreg = $(arm64_tools_dir)/gen-sysreg.awk |
| 25 | arm64_generated_dir = $(top_srcdir)/tools/arch/arm64/include/generated | 25 | arm64_generated_dir = $(OUTPUT)arch/arm64/include/generated |
| 26 | arm64_sysreg_defs = $(arm64_generated_dir)/asm/sysreg-defs.h | 26 | arm64_sysreg_defs = $(arm64_generated_dir)/asm/sysreg-defs.h |
| 27 | 27 | ||
| 28 | all: $(arm64_sysreg_defs) | 28 | all: $(arm64_sysreg_defs) |
| @@ -159,6 +159,22 @@ struct kvm_s390_vm_cpu_subfunc { · 158 unmodified lines | |||
| 159 | __u8 reserved[1728]; | 159 | __u8 reserved[1728]; |
| 160 | }; | 160 | }; |
| 161 | 161 | ||
| 162 | #define KVM_S390_VM_CPU_PROCESSOR_UV_FEAT_GUEST 6 | ||
| 163 | #define KVM_S390_VM_CPU_MACHINE_UV_FEAT_GUEST 7 | ||
| 164 | |||
| 165 | #define KVM_S390_VM_CPU_UV_FEAT_NR_BITS 64 | ||
| 166 | struct kvm_s390_vm_cpu_uv_feat { | ||
| 167 | union { | ||
| 168 | struct { | ||
| 169 | __u64 : 4; | ||
| 170 | __u64 ap : 1; /* bit 4 */ | ||
| 171 | __u64 ap_intr : 1; /* bit 5 */ | ||
| 172 | __u64 : 58; | ||
| 173 | }; | ||
| 174 | __u64 feat; | ||
| 175 | }; | ||
| 176 | }; | ||
| 177 | |||
| 162 | /* kvm attributes for crypto */ | 178 | /* kvm attributes for crypto */ |
| 163 | #define KVM_S390_VM_CRYPTO_ENABLE_AES_KW 0 | 179 | #define KVM_S390_VM_CRYPTO_ENABLE_AES_KW 0 |
| 164 | #define KVM_S390_VM_CRYPTO_ENABLE_DEA_KW 1 | 180 | #define KVM_S390_VM_CRYPTO_ENABLE_DEA_KW 1 |
| @@ -198,7 +198,6 @@ · 197 unmodified lines | |||
| 198 | #define X86_FEATURE_CAT_L3 ( 7*32+ 4) /* Cache Allocation Technology L3 */ | 198 | #define X86_FEATURE_CAT_L3 ( 7*32+ 4) /* Cache Allocation Technology L3 */ |
| 199 | #define X86_FEATURE_CAT_L2 ( 7*32+ 5) /* Cache Allocation Technology L2 */ | 199 | #define X86_FEATURE_CAT_L2 ( 7*32+ 5) /* Cache Allocation Technology L2 */ |
| 200 | #define X86_FEATURE_CDP_L3 ( 7*32+ 6) /* Code and Data Prioritization L3 */ | 200 | #define X86_FEATURE_CDP_L3 ( 7*32+ 6) /* Code and Data Prioritization L3 */ |
| 201 | #define X86_FEATURE_INVPCID_SINGLE ( 7*32+ 7) /* Effectively INVPCID && CR4.PCIDE=1 */ | ||
| 202 | #define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */ | 201 | #define X86_FEATURE_HW_PSTATE ( 7*32+ 8) /* AMD HW-PState */ |
| 203 | #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ | 202 | #define X86_FEATURE_PROC_FEEDBACK ( 7*32+ 9) /* AMD ProcFeedbackInterface */ |
| 204 | #define X86_FEATURE_XCOMPACTED ( 7*32+10) /* "" Use compacted XSTATE (XSAVES or XSAVEC) */ | 203 | #define X86_FEATURE_XCOMPACTED ( 7*32+10) /* "" Use compacted XSTATE (XSAVES or XSAVEC) */ |
| @@ -308,6 +307,11 @@ · 103 unmodified lines | |||
| 308 | #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */ | 307 | #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */ |
| 309 | #define X86_FEATURE_SMBA (11*32+21) /* "" Slow Memory Bandwidth Allocation */ | 308 | #define X86_FEATURE_SMBA (11*32+21) /* "" Slow Memory Bandwidth Allocation */ |
| 310 | #define X86_FEATURE_BMEC (11*32+22) /* "" Bandwidth Monitoring Event Configuration */ | 309 | #define X86_FEATURE_BMEC (11*32+22) /* "" Bandwidth Monitoring Event Configuration */ |
| 310 | #define X86_FEATURE_USER_SHSTK (11*32+23) /* Shadow stack support for user mode applications */ | ||
| 311 | |||
| 312 | #define X86_FEATURE_SRSO (11*32+24) /* "" AMD BTB untrain RETs */ | ||
| 313 | #define X86_FEATURE_SRSO_ALIAS (11*32+25) /* "" AMD BTB untrain RETs through aliasing */ | ||
| 314 | #define X86_FEATURE_IBPB_ON_VMEXIT (11*32+26) /* "" Issue an IBPB only on VMEXIT */ | ||
| 311 | 315 | ||
| 312 | /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ | 316 | /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ |
| 313 | #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ | 317 | #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ |
| @@ -380,6 +384,7 @@ · 66 unmodified lines | |||
| 380 | #define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */ | 384 | #define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */ |
| 381 | #define X86_FEATURE_WAITPKG (16*32+ 5) /* UMONITOR/UMWAIT/TPAUSE Instructions */ | 385 | #define X86_FEATURE_WAITPKG (16*32+ 5) /* UMONITOR/UMWAIT/TPAUSE Instructions */ |
| 382 | #define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector Bit Manipulation Instructions */ | 386 | #define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector Bit Manipulation Instructions */ |
| 387 | #define X86_FEATURE_SHSTK (16*32+ 7) /* "" Shadow stack */ | ||
| 383 | #define X86_FEATURE_GFNI (16*32+ 8) /* Galois Field New Instructions */ | 388 | #define X86_FEATURE_GFNI (16*32+ 8) /* Galois Field New Instructions */ |
| 384 | #define X86_FEATURE_VAES (16*32+ 9) /* Vector AES */ | 389 | #define X86_FEATURE_VAES (16*32+ 9) /* Vector AES */ |
| 385 | #define X86_FEATURE_VPCLMULQDQ (16*32+10) /* Carry-Less Multiplication Double Quadword */ | 390 | #define X86_FEATURE_VPCLMULQDQ (16*32+10) /* Carry-Less Multiplication Double Quadword */ |
| @@ -438,11 +443,16 @@ · 52 unmodified lines | |||
| 438 | 443 | ||
| 439 | /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */ | 444 | /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */ |
| 440 | #define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* "" No Nested Data Breakpoints */ | 445 | #define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* "" No Nested Data Breakpoints */ |
| 446 | #define X86_FEATURE_WRMSR_XX_BASE_NS (20*32+ 1) /* "" WRMSR to {FS,GS,KERNEL_GS}_BASE is non-serializing */ | ||
| 441 | #define X86_FEATURE_LFENCE_RDTSC (20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */ | 447 | #define X86_FEATURE_LFENCE_RDTSC (20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */ |
| 442 | #define X86_FEATURE_NULL_SEL_CLR_BASE (20*32+ 6) /* "" Null Selector Clears Base */ | 448 | #define X86_FEATURE_NULL_SEL_CLR_BASE (20*32+ 6) /* "" Null Selector Clears Base */ |
| 443 | #define X86_FEATURE_AUTOIBRS (20*32+ 8) /* "" Automatic IBRS */ | 449 | #define X86_FEATURE_AUTOIBRS (20*32+ 8) /* "" Automatic IBRS */ |
| 444 | #define X86_FEATURE_NO_SMM_CTL_MSR (20*32+ 9) /* "" SMM_CTL MSR is not present */ | 450 | #define X86_FEATURE_NO_SMM_CTL_MSR (20*32+ 9) /* "" SMM_CTL MSR is not present */ |
| 445 | 451 | ||
| 452 | #define X86_FEATURE_SBPB (20*32+27) /* "" Selective Branch Prediction Barrier */ | ||
| 453 | #define X86_FEATURE_IBPB_BRTYPE (20*32+28) /* "" MSR_PRED_CMD[IBPB] flushes all branch type predictions */ | ||
| 454 | #define X86_FEATURE_SRSO_NO (20*32+29) /* "" CPU is not affected by SRSO */ | ||
| 455 | |||
| 446 | /* | 456 | /* |
| 447 | * BUG word(s) | 457 | * BUG word(s) |
| 448 | */ | 458 | */ |
| @@ -484,5 +494,9 @@ · 35 unmodified lines | |||
| 484 | #define X86_BUG_RETBLEED X86_BUG(27) /* CPU is affected by RETBleed */ | 494 | #define X86_BUG_RETBLEED X86_BUG(27) /* CPU is affected by RETBleed */ |
| 485 | #define X86_BUG_EIBRS_PBRSB X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */ | 495 | #define X86_BUG_EIBRS_PBRSB X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */ |
| 486 | #define X86_BUG_SMT_RSB X86_BUG(29) /* CPU is vulnerable to Cross-Thread Return Address Predictions */ | 496 | #define X86_BUG_SMT_RSB X86_BUG(29) /* CPU is vulnerable to Cross-Thread Return Address Predictions */ |
| 497 | #define X86_BUG_GDS X86_BUG(30) /* CPU is affected by Gather Data Sampling */ | ||
| 487 | 498 | ||
| 499 | /* BUG word 2 */ | ||
| 500 | #define X86_BUG_SRSO X86_BUG(1*32 + 0) /* AMD SRSO bug */ | ||
| 501 | #define X86_BUG_DIV0 X86_BUG(1*32 + 1) /* AMD DIV0 speculation bug */ | ||
| 488 | #endif /* _ASM_X86_CPUFEATURES_H */ | 502 | #endif /* _ASM_X86_CPUFEATURES_H */ |
| @@ -105,6 +105,18 @@ · 104 unmodified lines | |||
| 105 | # define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31)) | 105 | # define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31)) |
| 106 | #endif | 106 | #endif |
| 107 | 107 | ||
| 108 | #ifdef CONFIG_X86_USER_SHADOW_STACK | ||
| 109 | #define DISABLE_USER_SHSTK 0 | ||
| 110 | #else | ||
| 111 | #define DISABLE_USER_SHSTK (1 << (X86_FEATURE_USER_SHSTK & 31)) | ||
| 112 | #endif | ||
| 113 | |||
| 114 | #ifdef CONFIG_X86_KERNEL_IBT | ||
| 115 | #define DISABLE_IBT 0 | ||
| 116 | #else | ||
| 117 | #define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31)) | ||
| 118 | #endif | ||
| 119 | |||
| 108 | /* | 120 | /* |
| 109 | * Make sure to add features to the correct mask | 121 | * Make sure to add features to the correct mask |
| 110 | */ | 122 | */ |
| @@ -120,7 +132,7 @@ · 9 unmodified lines | |||
| 120 | #define DISABLED_MASK9 (DISABLE_SGX) | 132 | #define DISABLED_MASK9 (DISABLE_SGX) |
| 121 | #define DISABLED_MASK10 0 | 133 | #define DISABLED_MASK10 0 |
| 122 | #define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \ | 134 | #define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \ |
| 123 | DISABLE_CALL_DEPTH_TRACKING) | 135 | DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK) |
| 124 | #define DISABLED_MASK12 (DISABLE_LAM) | 136 | #define DISABLED_MASK12 (DISABLE_LAM) |
| 125 | #define DISABLED_MASK13 0 | 137 | #define DISABLED_MASK13 0 |
| 126 | #define DISABLED_MASK14 0 | 138 | #define DISABLED_MASK14 0 |
| @@ -128,7 +140,7 @@ · 1 unmodified line | |||
| 128 | #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \ | 140 | #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \ |
| 129 | DISABLE_ENQCMD) | 141 | DISABLE_ENQCMD) |
| 130 | #define DISABLED_MASK17 0 | 142 | #define DISABLED_MASK17 0 |
| 131 | #define DISABLED_MASK18 0 | 143 | #define DISABLED_MASK18 (DISABLE_IBT) |
| 132 | #define DISABLED_MASK19 0 | 144 | #define DISABLED_MASK19 0 |
| 133 | #define DISABLED_MASK20 0 | 145 | #define DISABLED_MASK20 0 |
| 134 | #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21) | 146 | #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21) |
| @@ -222,6 +222,7 @@ · 221 unmodified lines | |||
| 222 | #define MSR_INTEGRITY_CAPS_ARRAY_BIST BIT(MSR_INTEGRITY_CAPS_ARRAY_BIST_BIT) | 222 | #define MSR_INTEGRITY_CAPS_ARRAY_BIST BIT(MSR_INTEGRITY_CAPS_ARRAY_BIST_BIT) |
| 223 | #define MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT 4 | 223 | #define MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT 4 |
| 224 | #define MSR_INTEGRITY_CAPS_PERIODIC_BIST BIT(MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT) | 224 | #define MSR_INTEGRITY_CAPS_PERIODIC_BIST BIT(MSR_INTEGRITY_CAPS_PERIODIC_BIST_BIT) |
| 225 | #define MSR_INTEGRITY_CAPS_SAF_GEN_MASK GENMASK_ULL(10, 9) | ||
| 225 | 226 | ||
| 226 | #define MSR_LBR_NHM_FROM 0x00000680 | 227 | #define MSR_LBR_NHM_FROM 0x00000680 |
| 227 | #define MSR_LBR_NHM_TO 0x000006c0 | 228 | #define MSR_LBR_NHM_TO 0x000006c0 |
| @@ -553,6 +554,7 @@ · 325 unmodified lines | |||
| 553 | #define MSR_AMD64_CPUID_FN_1 0xc0011004 | 554 | #define MSR_AMD64_CPUID_FN_1 0xc0011004 |
| 554 | #define MSR_AMD64_LS_CFG 0xc0011020 | 555 | #define MSR_AMD64_LS_CFG 0xc0011020 |
| 555 | #define MSR_AMD64_DC_CFG 0xc0011022 | 556 | #define MSR_AMD64_DC_CFG 0xc0011022 |
| 557 | #define MSR_AMD64_TW_CFG 0xc0011023 | ||
| 556 | 558 | ||
| 557 | #define MSR_AMD64_DE_CFG 0xc0011029 | 559 | #define MSR_AMD64_DE_CFG 0xc0011029 |
| 558 | #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 | 560 | #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1 |
| @@ -637,12 +639,21 @@ · 78 unmodified lines | |||
| 637 | /* AMD Last Branch Record MSRs */ | 639 | /* AMD Last Branch Record MSRs */ |
| 638 | #define MSR_AMD64_LBR_SELECT 0xc000010e | 640 | #define MSR_AMD64_LBR_SELECT 0xc000010e |
| 639 | 641 | ||
| 642 | /* Zen4 */ | ||
| 643 | #define MSR_ZEN4_BP_CFG 0xc001102e | ||
| 644 | #define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5 | ||
| 645 | |||
| 646 | /* Fam 19h MSRs */ | ||
| 647 | #define MSR_F19H_UMC_PERF_CTL 0xc0010800 | ||
| 648 | #define MSR_F19H_UMC_PERF_CTR 0xc0010801 | ||
| 649 | |||
| 650 | /* Zen 2 */ | ||
| 651 | #define MSR_ZEN2_SPECTRAL_CHICKEN 0xc00110e3 | ||
| 652 | #define MSR_ZEN2_SPECTRAL_CHICKEN_BIT BIT_ULL(1) | ||
| 653 | |||
| 640 | /* Fam 17h MSRs */ | 654 | /* Fam 17h MSRs */ |
| 641 | #define MSR_F17H_IRPERF 0xc00000e9 | 655 | #define MSR_F17H_IRPERF 0xc00000e9 |
| 642 | 656 | ||
| 643 | #define MSR_ZEN2_SPECTRAL_CHICKEN 0xc00110e3 | ||
| 644 | #define MSR_ZEN2_SPECTRAL_CHICKEN_BIT BIT_ULL(1) | ||
| 645 | |||
| 646 | /* Fam 16h MSRs */ | 657 | /* Fam 16h MSRs */ |
| 647 | #define MSR_F16H_L2I_PERF_CTL 0xc0010230 | 658 | #define MSR_F16H_L2I_PERF_CTL 0xc0010230 |
| 648 | #define MSR_F16H_L2I_PERF_CTR 0xc0010231 | 659 | #define MSR_F16H_L2I_PERF_CTR 0xc0010231 |
| @@ -1112,12 +1123,16 @@ · 463 unmodified lines | |||
| 1112 | #define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14) | 1123 | #define MSR_IA32_VMX_MISC_INTEL_PT (1ULL << 14) |
| 1113 | #define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS (1ULL << 29) | 1124 | #define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS (1ULL << 29) |
| 1114 | #define MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE 0x1F | 1125 | #define MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE 0x1F |
| 1115 | /* AMD-V MSRs */ | ||
| 1116 | 1126 | ||
| 1127 | /* AMD-V MSRs */ | ||
| 1117 | #define MSR_VM_CR 0xc0010114 | 1128 | #define MSR_VM_CR 0xc0010114 |
| 1118 | #define MSR_VM_IGNNE 0xc0010115 | 1129 | #define MSR_VM_IGNNE 0xc0010115 |
| 1119 | #define MSR_VM_HSAVE_PA 0xc0010117 | 1130 | #define MSR_VM_HSAVE_PA 0xc0010117 |
| 1120 | 1131 | ||
| 1132 | #define SVM_VM_CR_VALID_MASK 0x001fULL | ||
| 1133 | #define SVM_VM_CR_SVM_LOCK_MASK 0x0008ULL | ||
| 1134 | #define SVM_VM_CR_SVM_DIS_MASK 0x0010ULL | ||
| 1135 | |||
| 1121 | /* Hardware Feedback Interface */ | 1136 | /* Hardware Feedback Interface */ |
| 1122 | #define MSR_IA32_HW_FEEDBACK_PTR 0x17d0 | 1137 | #define MSR_IA32_HW_FEEDBACK_PTR 0x17d0 |
| 1123 | #define MSR_IA32_HW_FEEDBACK_CONFIG 0x17d1 | 1138 | #define MSR_IA32_HW_FEEDBACK_CONFIG 0x17d1 |
| @@ -23,9 +23,21 @@ · 22 unmodified lines | |||
| 23 | #define ARCH_MAP_VDSO_32 0x2002 | 23 | #define ARCH_MAP_VDSO_32 0x2002 |
| 24 | #define ARCH_MAP_VDSO_64 0x2003 | 24 | #define ARCH_MAP_VDSO_64 0x2003 |
| 25 | 25 | ||
| 26 | /* Don't use 0x3001-0x3004 because of old glibcs */ | ||
| 27 | |||
| 26 | #define ARCH_GET_UNTAG_MASK 0x4001 | 28 | #define ARCH_GET_UNTAG_MASK 0x4001 |
| 27 | #define ARCH_ENABLE_TAGGED_ADDR 0x4002 | 29 | #define ARCH_ENABLE_TAGGED_ADDR 0x4002 |
| 28 | #define ARCH_GET_MAX_TAG_BITS 0x4003 | 30 | #define ARCH_GET_MAX_TAG_BITS 0x4003 |
| 29 | #define ARCH_FORCE_TAGGED_SVA 0x4004 | 31 | #define ARCH_FORCE_TAGGED_SVA 0x4004 |
| 30 | 32 | ||
| 33 | #define ARCH_SHSTK_ENABLE 0x5001 | ||
| 34 | #define ARCH_SHSTK_DISABLE 0x5002 | ||
| 35 | #define ARCH_SHSTK_LOCK 0x5003 | ||
| 36 | #define ARCH_SHSTK_UNLOCK 0x5004 | ||
| 37 | #define ARCH_SHSTK_STATUS 0x5005 | ||
| 38 | |||
| 39 | /* ARCH_SHSTK_ features bits */ | ||
| 40 | #define ARCH_SHSTK_SHSTK (1ULL << 0) | ||
| 41 | #define ARCH_SHSTK_WRSS (1ULL << 1) | ||
| 42 | |||
| 31 | #endif /* _ASM_X86_PRCTL_H */ | 43 | #endif /* _ASM_X86_PRCTL_H */ |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | |||
| 8 | */ | 8 | */ |
| 9 | #pragma GCC diagnostic push | 9 | #pragma GCC diagnostic push |
| 10 | #pragma GCC diagnostic ignored "-Wpacked" | 10 | #pragma GCC diagnostic ignored "-Wpacked" |
| 11 | #pragma GCC diagnostic ignored "-Wattributes" | ||
| 11 | 12 | ||
| 12 | #define __get_unaligned_t(type, ptr) ({ \ | 13 | #define __get_unaligned_t(type, ptr) ({ \ |
| 13 | const struct { type x; } __packed *__pptr = (typeof(__pptr))(ptr); \ | 14 | const struct { type x; } __packed *__pptr = (typeof(__pptr))(ptr); \ |
| @@ -816,15 +816,21 @@ __SYSCALL(__NR_process_mrelease, sys_process_mrelease) · 815 unmodified lines | |||
| 816 | __SYSCALL(__NR_futex_waitv, sys_futex_waitv) | 816 | __SYSCALL(__NR_futex_waitv, sys_futex_waitv) |
| 817 | #define __NR_set_mempolicy_home_node 450 | 817 | #define __NR_set_mempolicy_home_node 450 |
| 818 | __SYSCALL(__NR_set_mempolicy_home_node, sys_set_mempolicy_home_node) | 818 | __SYSCALL(__NR_set_mempolicy_home_node, sys_set_mempolicy_home_node) |
| 819 | |||
| 820 | #define __NR_cachestat 451 | 819 | #define __NR_cachestat 451 |
| 821 | __SYSCALL(__NR_cachestat, sys_cachestat) | 820 | __SYSCALL(__NR_cachestat, sys_cachestat) |
| 822 | |||
| 823 | #define __NR_fchmodat2 452 | 821 | #define __NR_fchmodat2 452 |
| 824 | __SYSCALL(__NR_fchmodat2, sys_fchmodat2) | 822 | __SYSCALL(__NR_fchmodat2, sys_fchmodat2) |
| 823 | #define __NR_map_shadow_stack 453 | ||
| 824 | __SYSCALL(__NR_map_shadow_stack, sys_map_shadow_stack) | ||
| 825 | #define __NR_futex_wake 454 | ||
| 826 | __SYSCALL(__NR_futex_wake, sys_futex_wake) | ||
| 827 | #define __NR_futex_wait 455 | ||
| 828 | __SYSCALL(__NR_futex_wait, sys_futex_wait) | ||
| 829 | #define __NR_futex_requeue 456 | ||
| 830 | __SYSCALL(__NR_futex_requeue, sys_futex_requeue) | ||
| 825 | 831 | ||
| 826 | #undef __NR_syscalls | 832 | #undef __NR_syscalls |
| 827 | #define __NR_syscalls 453 | 833 | #define __NR_syscalls 457 |
| 828 | 834 | ||
| 829 | /* | 835 | /* |
| 830 | * 32 bit systems traditionally used different | 836 | * 32 bit systems traditionally used different |
| @@ -1134,6 +1134,26 @@ extern "C" { · 1133 unmodified lines | |||
| 1134 | #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) | 1134 | #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) |
| 1135 | #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) | 1135 | #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) |
| 1136 | 1136 | ||
| 1137 | /** | ||
| 1138 | * DRM_IOCTL_MODE_CREATE_DUMB - Create a new dumb buffer object. | ||
| 1139 | * | ||
| 1140 | * KMS dumb buffers provide a very primitive way to allocate a buffer object | ||
| 1141 | * suitable for scanout and map it for software rendering. KMS dumb buffers are | ||
| 1142 | * not suitable for hardware-accelerated rendering nor video decoding. KMS dumb | ||
| 1143 | * buffers are not suitable to be displayed on any other device than the KMS | ||
| 1144 | * device where they were allocated from. Also see | ||
| 1145 | * :ref:`kms_dumb_buffer_objects`. | ||
| 1146 | * | ||
| 1147 | * The IOCTL argument is a struct drm_mode_create_dumb. | ||
| 1148 | * | ||
| 1149 | * User-space is expected to create a KMS dumb buffer via this IOCTL, then add | ||
| 1150 | * it as a KMS framebuffer via &DRM_IOCTL_MODE_ADDFB and map it via | ||
| 1151 | * &DRM_IOCTL_MODE_MAP_DUMB. | ||
| 1152 | * | ||
| 1153 | * &DRM_CAP_DUMB_BUFFER indicates whether this IOCTL is supported. | ||
| 1154 | * &DRM_CAP_DUMB_PREFERRED_DEPTH and &DRM_CAP_DUMB_PREFER_SHADOW indicate | ||
| 1155 | * driver preferences for dumb buffers. | ||
| 1156 | */ | ||
| 1137 | #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb) | 1157 | #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb) |
| 1138 | #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb) | 1158 | #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb) |
| 1139 | #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb) | 1159 | #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb) |
| @@ -38,13 +38,13 @@ extern "C" { · 37 unmodified lines | |||
| 38 | */ | 38 | */ |
| 39 | 39 | ||
| 40 | /** | 40 | /** |
| 41 | * DOC: uevents generated by i915 on it's device node | 41 | * DOC: uevents generated by i915 on its device node |
| 42 | * | 42 | * |
| 43 | * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch | 43 | * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch |
| 44 | * event from the gpu l3 cache. Additional information supplied is ROW, | 44 | * event from the GPU L3 cache. Additional information supplied is ROW, |
| 45 | * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep | 45 | * BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep |
| 46 | * track of these events and if a specific cache-line seems to have a | 46 | * track of these events, and if a specific cache-line seems to have a |
| 47 | * persistent error remap it with the l3 remapping tool supplied in | 47 | * persistent error, remap it with the L3 remapping tool supplied in |
| 48 | * intel-gpu-tools. The value supplied with the event is always 1. | 48 | * intel-gpu-tools. The value supplied with the event is always 1. |
| 49 | * | 49 | * |
| 50 | * I915_ERROR_UEVENT - Generated upon error detection, currently only via | 50 | * I915_ERROR_UEVENT - Generated upon error detection, currently only via |
| @@ -71,7 +71,8 @@ struct fscrypt_policy_v2 { · 70 unmodified lines | |||
| 71 | __u8 contents_encryption_mode; | 71 | __u8 contents_encryption_mode; |
| 72 | __u8 filenames_encryption_mode; | 72 | __u8 filenames_encryption_mode; |
| 73 | __u8 flags; | 73 | __u8 flags; |
| 74 | __u8 __reserved[4]; | 74 | __u8 log2_data_unit_size; |
| 75 | __u8 __reserved[3]; | ||
| 75 | __u8 master_key_identifier[FSCRYPT_KEY_IDENTIFIER_SIZE]; | 76 | __u8 master_key_identifier[FSCRYPT_KEY_IDENTIFIER_SIZE]; |
| 76 | }; | 77 | }; |
| 77 | 78 | ||
| @@ -264,6 +264,7 @@ struct kvm_xen_exit { · 263 unmodified lines | |||
| 264 | #define KVM_EXIT_RISCV_SBI 35 | 264 | #define KVM_EXIT_RISCV_SBI 35 |
| 265 | #define KVM_EXIT_RISCV_CSR 36 | 265 | #define KVM_EXIT_RISCV_CSR 36 |
| 266 | #define KVM_EXIT_NOTIFY 37 | 266 | #define KVM_EXIT_NOTIFY 37 |
| 267 | #define KVM_EXIT_LOONGARCH_IOCSR 38 | ||
| 267 | 268 | ||
| 268 | /* For KVM_EXIT_INTERNAL_ERROR */ | 269 | /* For KVM_EXIT_INTERNAL_ERROR */ |
| 269 | /* Emulate instruction failed. */ | 270 | /* Emulate instruction failed. */ |
| @@ -336,6 +337,13 @@ struct kvm_run { · 66 unmodified lines | |||
| 336 | __u32 len; | 337 | __u32 len; |
| 337 | __u8 is_write; | 338 | __u8 is_write; |
| 338 | } mmio; | 339 | } mmio; |
| 340 | /* KVM_EXIT_LOONGARCH_IOCSR */ | ||
| 341 | struct { | ||
| 342 | __u64 phys_addr; | ||
| 343 | __u8 data[8]; | ||
| 344 | __u32 len; | ||
| 345 | __u8 is_write; | ||
| 346 | } iocsr_io; | ||
| 339 | /* KVM_EXIT_HYPERCALL */ | 347 | /* KVM_EXIT_HYPERCALL */ |
| 340 | struct { | 348 | struct { |
| 341 | __u64 nr; | 349 | __u64 nr; |
| @@ -1192,6 +1200,7 @@ struct kvm_ppc_resize_hpt { · 850 unmodified lines | |||
| 1192 | #define KVM_CAP_COUNTER_OFFSET 227 | 1200 | #define KVM_CAP_COUNTER_OFFSET 227 |
| 1193 | #define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228 | 1201 | #define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228 |
| 1194 | #define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229 | 1202 | #define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229 |
| 1203 | #define KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES 230 | ||
| 1195 | 1204 | ||
| 1196 | #ifdef KVM_CAP_IRQ_ROUTING | 1205 | #ifdef KVM_CAP_IRQ_ROUTING |
| 1197 | 1206 | ||
| @@ -1362,6 +1371,7 @@ struct kvm_dirty_tlb { · 164 unmodified lines | |||
| 1362 | #define KVM_REG_ARM64 0x6000000000000000ULL | 1371 | #define KVM_REG_ARM64 0x6000000000000000ULL |
| 1363 | #define KVM_REG_MIPS 0x7000000000000000ULL | 1372 | #define KVM_REG_MIPS 0x7000000000000000ULL |
| 1364 | #define KVM_REG_RISCV 0x8000000000000000ULL | 1373 | #define KVM_REG_RISCV 0x8000000000000000ULL |
| 1374 | #define KVM_REG_LOONGARCH 0x9000000000000000ULL | ||
| 1365 | 1375 | ||
| 1366 | #define KVM_REG_SIZE_SHIFT 52 | 1376 | #define KVM_REG_SIZE_SHIFT 52 |
| 1367 | #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL | 1377 | #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL |
| @@ -1418,9 +1428,16 @@ struct kvm_device_attr { · 50 unmodified lines | |||
| 1418 | __u64 addr; /* userspace address of attr data */ | 1428 | __u64 addr; /* userspace address of attr data */ |
| 1419 | }; | 1429 | }; |
| 1420 | 1430 | ||
| 1421 | #define KVM_DEV_VFIO_GROUP 1 | 1431 | #define KVM_DEV_VFIO_FILE 1 |
| 1422 | #define KVM_DEV_VFIO_GROUP_ADD 1 | 1432 | |
| 1423 | #define KVM_DEV_VFIO_GROUP_DEL 2 | 1433 | #define KVM_DEV_VFIO_FILE_ADD 1 |
| 1434 | #define KVM_DEV_VFIO_FILE_DEL 2 | ||
| 1435 | |||
| 1436 | /* KVM_DEV_VFIO_GROUP aliases are for compile time uapi compatibility */ | ||
| 1437 | #define KVM_DEV_VFIO_GROUP KVM_DEV_VFIO_FILE | ||
| 1438 | |||
| 1439 | #define KVM_DEV_VFIO_GROUP_ADD KVM_DEV_VFIO_FILE_ADD | ||
| 1440 | #define KVM_DEV_VFIO_GROUP_DEL KVM_DEV_VFIO_FILE_DEL | ||
| 1424 | #define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3 | 1441 | #define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3 |
| 1425 | 1442 | ||
| 1426 | enum kvm_device_type { | 1443 | enum kvm_device_type { |
| @@ -1555,6 +1572,7 @@ struct kvm_s390_ucas_mapping { · 128 unmodified lines | |||
| 1555 | #define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags) | 1572 | #define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags) |
| 1556 | /* Available with KVM_CAP_COUNTER_OFFSET */ | 1573 | /* Available with KVM_CAP_COUNTER_OFFSET */ |
| 1557 | #define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset) | 1574 | #define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset) |
| 1575 | #define KVM_ARM_GET_REG_WRITABLE_MASKS _IOR(KVMIO, 0xb6, struct reg_mask_range) | ||
| 1558 | 1576 | ||
| 1559 | /* ioctl for vm fd */ | 1577 | /* ioctl for vm fd */ |
| 1560 | #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) | 1578 | #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) |
| @@ -100,8 +100,9 @@ enum fsconfig_command { · 99 unmodified lines | |||
| 100 | FSCONFIG_SET_PATH = 3, /* Set parameter, supplying an object by path */ | 100 | FSCONFIG_SET_PATH = 3, /* Set parameter, supplying an object by path */ |
| 101 | FSCONFIG_SET_PATH_EMPTY = 4, /* Set parameter, supplying an object by (empty) path */ | 101 | FSCONFIG_SET_PATH_EMPTY = 4, /* Set parameter, supplying an object by (empty) path */ |
| 102 | FSCONFIG_SET_FD = 5, /* Set parameter, supplying an object by fd */ | 102 | FSCONFIG_SET_FD = 5, /* Set parameter, supplying an object by fd */ |
| 103 | FSCONFIG_CMD_CREATE = 6, /* Invoke superblock creation */ | 103 | FSCONFIG_CMD_CREATE = 6, /* Create new or reuse existing superblock */ |
| 104 | FSCONFIG_CMD_RECONFIGURE = 7, /* Invoke superblock reconfiguration */ | 104 | FSCONFIG_CMD_RECONFIGURE = 7, /* Invoke superblock reconfiguration */ |
| 105 | FSCONFIG_CMD_CREATE_EXCL = 8, /* Create new superblock, fail if reusing existing superblock */ | ||
| 105 | }; | 106 | }; |
| 106 | 107 | ||
| 107 | /* | 108 | /* |
| @@ -219,4 +219,12 @@ · 218 unmodified lines | |||
| 219 | */ | 219 | */ |
| 220 | #define VHOST_VDPA_RESUME _IO(VHOST_VIRTIO, 0x7E) | 220 | #define VHOST_VDPA_RESUME _IO(VHOST_VIRTIO, 0x7E) |
| 221 | 221 | ||
| 222 | /* Get the group for the descriptor table including driver & device areas | ||
| 223 | * of a virtqueue: read index, write group in num. | ||
| 224 | * The virtqueue index is stored in the index field of vhost_vring_state. | ||
| 225 | * The group ID of the descriptor table for this specific virtqueue | ||
| 226 | * is returned via num field of vhost_vring_state. | ||
| 227 | */ | ||
| 228 | #define VHOST_VDPA_GET_VRING_DESC_GROUP _IOWR(VHOST_VIRTIO, 0x7F, \ | ||
| 229 | struct vhost_vring_state) | ||
| 222 | #endif | 230 | #endif |
| @@ -1,3 +1,5 @@ | |||
| 1 | arch/arm64/tools/gen-sysreg.awk | ||
| 2 | arch/arm64/tools/sysreg | ||
| 1 | tools/perf | 3 | tools/perf |
| 2 | tools/arch | 4 | tools/arch |
| 3 | tools/scripts | 5 | tools/scripts |
| @@ -434,6 +434,21 @@ export INSTALL SHELL_PATH · 433 unmodified lines | |||
| 434 | 434 | ||
| 435 | SHELL = $(SHELL_PATH) | 435 | SHELL = $(SHELL_PATH) |
| 436 | 436 | ||
| 437 | arm64_gen_sysreg_dir := $(srctree)/tools/arch/arm64/tools | ||
| 438 | ifneq ($(OUTPUT),) | ||
| 439 | arm64_gen_sysreg_outdir := $(OUTPUT) | ||
| 440 | else | ||
| 441 | arm64_gen_sysreg_outdir := $(CURDIR) | ||
| 442 | endif | ||
| 443 | |||
| 444 | arm64-sysreg-defs: FORCE | ||
| 445 | $(Q)$(MAKE) -C $(arm64_gen_sysreg_dir) O=$(arm64_gen_sysreg_outdir) | ||
| 446 | |||
| 447 | arm64-sysreg-defs-clean: | ||
| 448 | $(call QUIET_CLEAN,arm64-sysreg-defs) | ||
| 449 | $(Q)$(MAKE) -C $(arm64_gen_sysreg_dir) O=$(arm64_gen_sysreg_outdir) \ | ||
| 450 | clean > /dev/null | ||
| 451 | |||
| 437 | beauty_linux_dir := $(srctree)/tools/perf/trace/beauty/include/linux/ | 452 | beauty_linux_dir := $(srctree)/tools/perf/trace/beauty/include/linux/ |
| 438 | linux_uapi_dir := $(srctree)/tools/include/uapi/linux | 453 | linux_uapi_dir := $(srctree)/tools/include/uapi/linux |
| 439 | asm_generic_uapi_dir := $(srctree)/tools/include/uapi/asm-generic | 454 | asm_generic_uapi_dir := $(srctree)/tools/include/uapi/asm-generic |
| @@ -450,15 +465,6 @@ drm_ioctl_tbl := $(srctree)/tools/perf/trace/beauty/drm_ioctl.sh · 10 unmodified lines | |||
| 450 | # Create output directory if not already present | 465 | # Create output directory if not already present |
| 451 | _dummy := $(shell [ -d '$(beauty_ioctl_outdir)' ] || mkdir -p '$(beauty_ioctl_outdir)') | 466 | _dummy := $(shell [ -d '$(beauty_ioctl_outdir)' ] || mkdir -p '$(beauty_ioctl_outdir)') |
| 452 | 467 | ||
| 453 | arm64_gen_sysreg_dir := $(srctree)/tools/arch/arm64/tools | ||
| 454 | |||
| 455 | arm64-sysreg-defs: FORCE | ||
| 456 | $(Q)$(MAKE) -C $(arm64_gen_sysreg_dir) | ||
| 457 | |||
| 458 | arm64-sysreg-defs-clean: | ||
| 459 | $(call QUIET_CLEAN,arm64-sysreg-defs) | ||
| 460 | $(Q)$(MAKE) -C $(arm64_gen_sysreg_dir) clean > /dev/null | ||
| 461 | |||
| 462 | $(drm_ioctl_array): $(drm_hdr_dir)/drm.h $(drm_hdr_dir)/i915_drm.h $(drm_ioctl_tbl) | 468 | $(drm_ioctl_array): $(drm_hdr_dir)/drm.h $(drm_hdr_dir)/i915_drm.h $(drm_ioctl_tbl) |
| 463 | $(Q)$(SHELL) '$(drm_ioctl_tbl)' $(drm_hdr_dir) > $@ | 469 | $(Q)$(SHELL) '$(drm_ioctl_tbl)' $(drm_hdr_dir) > $@ |
| 464 | 470 | ||
| @@ -367,3 +367,7 @@ · 366 unmodified lines | |||
| 367 | 450 common set_mempolicy_home_node sys_set_mempolicy_home_node | 367 | 450 common set_mempolicy_home_node sys_set_mempolicy_home_node |
| 368 | 451 n64 cachestat sys_cachestat | 368 | 451 n64 cachestat sys_cachestat |
| 369 | 452 n64 fchmodat2 sys_fchmodat2 | 369 | 452 n64 fchmodat2 sys_fchmodat2 |
| 370 | 453 n64 map_shadow_stack sys_map_shadow_stack | ||
| 371 | 454 n64 futex_wake sys_futex_wake | ||
| 372 | 455 n64 futex_wait sys_futex_wait | ||
| 373 | 456 n64 futex_requeue sys_futex_requeue | ||
| @@ -539,3 +539,7 @@ · 538 unmodified lines | |||
| 539 | 450 nospu set_mempolicy_home_node sys_set_mempolicy_home_node | 539 | 450 nospu set_mempolicy_home_node sys_set_mempolicy_home_node |
| 540 | 451 common cachestat sys_cachestat | 540 | 451 common cachestat sys_cachestat |
| 541 | 452 common fchmodat2 sys_fchmodat2 | 541 | 452 common fchmodat2 sys_fchmodat2 |
| 542 | 453 common map_shadow_stack sys_ni_syscall | ||
| 543 | 454 common futex_wake sys_futex_wake | ||
| 544 | 455 common futex_wait sys_futex_wait | ||
| 545 | 456 common futex_requeue sys_futex_requeue | ||
| @@ -455,3 +455,7 @@ · 454 unmodified lines | |||
| 455 | 450 common set_mempolicy_home_node sys_set_mempolicy_home_node sys_set_mempolicy_home_node | 455 | 450 common set_mempolicy_home_node sys_set_mempolicy_home_node sys_set_mempolicy_home_node |
| 456 | 451 common cachestat sys_cachestat sys_cachestat | 456 | 451 common cachestat sys_cachestat sys_cachestat |
| 457 | 452 common fchmodat2 sys_fchmodat2 sys_fchmodat2 | 457 | 452 common fchmodat2 sys_fchmodat2 sys_fchmodat2 |
| 458 | 453 common map_shadow_stack sys_map_shadow_stack sys_map_shadow_stack | ||
| 459 | 454 common futex_wake sys_futex_wake sys_futex_wake | ||
| 460 | 455 common futex_wait sys_futex_wait sys_futex_wait | ||
| 461 | 456 common futex_requeue sys_futex_requeue sys_futex_requeue | ||
| @@ -375,6 +375,9 @@ · 374 unmodified lines | |||
| 375 | 451 common cachestat sys_cachestat | 375 | 451 common cachestat sys_cachestat |
| 376 | 452 common fchmodat2 sys_fchmodat2 | 376 | 452 common fchmodat2 sys_fchmodat2 |
| 377 | 453 64 map_shadow_stack sys_map_shadow_stack | 377 | 453 64 map_shadow_stack sys_map_shadow_stack |
| 378 | 454 common futex_wake sys_futex_wake | ||
| 379 | 455 common futex_wait sys_futex_wait | ||
| 380 | 456 common futex_requeue sys_futex_requeue | ||
| 378 | 381 | ||
| 379 | # | 382 | # |
| 380 | # Due to a historical design error, certain syscalls are numbered differently | 383 | # Due to a historical design error, certain syscalls are numbered differently |
| @@ -1643,7 +1643,7 @@ static int top_print_work(struct perf_kwork *kwork __maybe_unused, struct kwork_ · 1642 unmodified lines | |||
| 1643 | /* | 1643 | /* |
| 1644 | * pid | 1644 | * pid |
| 1645 | */ | 1645 | */ |
| 1646 | ret += printf(" %*ld ", PRINT_PID_WIDTH, work->id); | 1646 | ret += printf(" %*" PRIu64 " ", PRINT_PID_WIDTH, work->id); |
| 1647 | 1647 | ||
| 1648 | /* | 1648 | /* |
| 1649 | * tgid | 1649 | * tgid |
| @@ -383,6 +383,7 @@ struct ucred { · 382 unmodified lines | |||
| 383 | #define SOL_MPTCP 284 | 383 | #define SOL_MPTCP 284 |
| 384 | #define SOL_MCTP 285 | 384 | #define SOL_MCTP 285 |
| 385 | #define SOL_SMC 286 | 385 | #define SOL_SMC 286 |
| 386 | #define SOL_VSOCK 287 | ||
| 386 | 387 | ||
| 387 | /* IPX options */ | 388 | /* IPX options */ |
| 388 | #define IPX_TYPE 1 | 389 | #define IPX_TYPE 1 |
| @@ -347,7 +347,7 @@ CFLAGS_rbtree.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ET · 346 unmodified lines | |||
| 347 | CFLAGS_libstring.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))" | 347 | CFLAGS_libstring.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))" |
| 348 | CFLAGS_hweight.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))" | 348 | CFLAGS_hweight.o += -Wno-unused-parameter -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))" |
| 349 | CFLAGS_header.o += -include $(OUTPUT)PERF-VERSION-FILE | 349 | CFLAGS_header.o += -include $(OUTPUT)PERF-VERSION-FILE |
| 350 | CFLAGS_arm-spe.o += -I$(srctree)/tools/arch/arm64/include/ -I$(srctree)/tools/arch/arm64/include/generated/ | 350 | CFLAGS_arm-spe.o += -I$(srctree)/tools/arch/arm64/include/ -I$(OUTPUT)arch/arm64/include/generated/ |
| 351 | 351 | ||
| 352 | $(OUTPUT)util/argv_split.o: ../lib/argv_split.c FORCE | 352 | $(OUTPUT)util/argv_split.o: ../lib/argv_split.c FORCE |
| 353 | $(call rule_mkdir) | 353 | $(call rule_mkdir) |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | |||
| 12 | #include <linux/zalloc.h> | 12 | #include <linux/zalloc.h> |
| 13 | #include <linux/string.h> | 13 | #include <linux/string.h> |
| 14 | #include <bpf/bpf.h> | 14 | #include <bpf/bpf.h> |
| 15 | #include <inttypes.h> | ||
| 15 | 16 | ||
| 16 | #include "bpf_skel/lock_contention.skel.h" | 17 | #include "bpf_skel/lock_contention.skel.h" |
| 17 | #include "bpf_skel/lock_data.h" | 18 | #include "bpf_skel/lock_data.h" |
| @@ -250,7 +251,7 @@ static const char *lock_contention_get_name(struct lock_contention *con, · 232 unmodified lines | |||
| 250 | if (cgrp) | 251 | if (cgrp) |
| 251 | return cgrp->name; | 252 | return cgrp->name; |
| 252 | 253 | ||
| 253 | snprintf(name_buf, sizeof(name_buf), "cgroup:%lu", cgrp_id); | 254 | snprintf(name_buf, sizeof(name_buf), "cgroup:%" PRIu64 "", cgrp_id); |
| 254 | return name_buf; | 255 | return name_buf; |
| 255 | } | 256 | } |
| 256 | 257 | ||
| @@ -18,12 +18,13 @@ else · 17 unmodified lines | |||
| 18 | endif | 18 | endif |
| 19 | 19 | ||
| 20 | ifeq ($(ARCH),arm64) | 20 | ifeq ($(ARCH),arm64) |
| 21 | arm64_tools_dir := $(top_srcdir)/tools/arch/arm64/tools/ | 21 | tools_dir := $(top_srcdir)/tools |
| 22 | arm64_tools_dir := $(tools_dir)/arch/arm64/tools/ | ||
| 22 | GEN_HDRS := $(top_srcdir)/tools/arch/arm64/include/generated/ | 23 | GEN_HDRS := $(top_srcdir)/tools/arch/arm64/include/generated/ |
| 23 | CFLAGS += -I$(GEN_HDRS) | 24 | CFLAGS += -I$(GEN_HDRS) |
| 24 | 25 | ||
| 25 | $(GEN_HDRS): $(wildcard $(arm64_tools_dir)/*) | 26 | $(GEN_HDRS): $(wildcard $(arm64_tools_dir)/*) |
| 26 | $(MAKE) -C $(arm64_tools_dir) | 27 | $(MAKE) -C $(arm64_tools_dir) O=$(tools_dir) |
| 27 | endif | 28 | endif |
| 28 | 29 | ||
| 29 | LIBKVM += lib/assert.c | 30 | LIBKVM += lib/assert.c |