Fix the data source encodings to represent L2.1/L3.1(another core's L2/L3 on the same node) accesses properly for power10 and older plaforms. Add new macros(LEVEL/REM) which can be used to add mem_lvl_num and remote field data inside perf_mem_data_src structure. Result in power9 system with patch changes: localhost:~/linux/tools/perf # ./perf mem report | grep Remote 0.01% 1 252 Remote core, same node L3 or L3 hit [.] 0x0000000000002dd0 producer_consumer [.] 0x00007fff7f25eb90 anon HitM N/A No N/A 0 0 0.01% 1 220 Remote core, same node L3 or L3 hit [.] 0x0000000000002dd0 producer_consumer [.] 0x00007fff77776d90 anon HitM N/A No N/A 0 0 0.01% 1 220 Remote core, same node L3 or L3 hit [.] 0x0000000000002dd0 producer_consumer [.] 0x00007fff817d9410 anon HitM N/A No N/A 0 0
Unified · Split
| @@ -238,11 +238,27 @@ static inline u64 isa207_find_source(u64 idx, u32 sub_idx) · 237 unmodified lines | ||
| 238 | 238 | ret |= P(SNOOP, HIT); |
| 239 | 239 | break; |
| 240 | 240 | case 5: |
| 241 | − ret = PH(LVL, REM_CCE1); | |
| 242 | − if ((sub_idx == 0) || (sub_idx == 2) || (sub_idx == 4)) | |
| 243 | − ret |= P(SNOOP, HIT); | |
| 244 | − else if ((sub_idx == 1) || (sub_idx == 3) || (sub_idx == 5)) | |
| 245 | − ret |= P(SNOOP, HITM); | |
| 241 | + if (cpu_has_feature(CPU_FTR_ARCH_31)) { | |
| 242 | + ret = REM | P(HOPS, 0); | |
| 243 | + | |
| 244 | + if (sub_idx == 0 || sub_idx == 4) | |
| 245 | + ret |= PH(LVL, L2) | LEVEL(L2) | P(SNOOP, HIT); | |
| 246 | + else if (sub_idx == 1 || sub_idx == 5) | |
| 247 | + ret |= PH(LVL, L2) | LEVEL(L2) | P(SNOOP, HITM); | |
| 248 | + else if (sub_idx == 2 || sub_idx == 6) | |
| 249 | + ret |= PH(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT); | |
| 250 | + else if (sub_idx == 3 || sub_idx == 7) | |
| 251 | + ret |= PH(LVL, L3) | LEVEL(L3) | P(SNOOP, HITM); | |
| 252 | + } else { | |
| 253 | + if (sub_idx == 0) | |
| 254 | + ret = PH(LVL, L2) | LEVEL(L2) | REM | P(SNOOP, HIT) | P(HOPS, 0); | |
| 255 | + else if (sub_idx == 1) | |
| 256 | + ret = PH(LVL, L2) | LEVEL(L2) | REM | P(SNOOP, HITM) | P(HOPS, 0); | |
| 257 | + else if (sub_idx == 2 || sub_idx == 4) | |
| 258 | + ret = PH(LVL, L3) | LEVEL(L3) | REM | P(SNOOP, HIT) | P(HOPS, 0); | |
| 259 | + else if (sub_idx == 3 || sub_idx == 5) | |
| 260 | + ret = PH(LVL, L3) | LEVEL(L3) | REM | P(SNOOP, HITM) | P(HOPS, 0); | |
| 261 | + } | |
| 246 | 262 | break; |
| 247 | 263 | case 6: |
| 248 | 264 | ret = PH(LVL, REM_CCE2); |
| @@ -273,6 +273,8 @@ · 272 unmodified lines | ||
| 273 | 273 | #define P(a, b) PERF_MEM_S(a, b) |
| 274 | 274 | #define PH(a, b) (P(LVL, HIT) | P(a, b)) |
| 275 | 275 | #define PM(a, b) (P(LVL, MISS) | P(a, b)) |
| 276 | +#define LEVEL(x) P(LVLNUM, x) | |
| 277 | +#define REM P(REMOTE, REMOTE) | |
| 276 | 278 | |
| 277 | 279 | int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp, u64 event_config1); |
| 278 | 280 | int isa207_compute_mmcr(u64 event[], int n_ev, |