Pull PCI updates from Bjorn Helgaas: "Resource management: - Improve resource assignment for hot-added nested bridges, e.g., Thunderbolt (Nicholas Johnson) Power management: - Optionally print config space of devices before suspend (Chen Yu) - Increase D3 delay for AMD Ryzen5/7 XHCI controllers (Daniel Drake) Virtualization: - Generalize DMA alias quirks (James Sewart) - Add DMA alias quirk for PLX PEX NTB (James Sewart) - Fix IOV memory leak (Navid Emamdoost) AER: - Log which device prevents error recovery (Yicong Yang) Peer-to-peer DMA: - Whitelist Intel SkyLake-E (Armen Baloyan) Broadcom iProc host bridge driver: - Apply PAXC quirk whether driver is built-in or module (Wei Liu) Broadcom STB host bridge driver: - Add Broadcom STB PCIe host controller driver (Jim Quinlan) Intel Gateway SoC host bridge driver: - Add driver for Intel Gateway SoC (Dilip Kota) Intel VMD host bridge driver: - Add support for DMA aliases on other buses (Jon Derrick) - Remove dma_map_ops overrides (Jon Derrick) - Remove now-unused X86_DEV_DMA_OPS (Christoph Hellwig) NVIDIA Tegra host bridge driver: - Fix Tegra30 afi_pex2_ctrl register offset (Marcel Ziswiler) Panasonic UniPhier host bridge driver: - Remove module code since driver can't be built as a module (Masahiro Yamada) Qualcomm host bridge driver: - Add support for SDM845 PCIe controller (Bjorn Andersson) TI Keystone host bridge driver: - Fix "num-viewport" DT property error handling (Kishon Vijay Abraham I) - Fix link training retries initiation (Yurii Monakov) - Fix outbound region mapping (Yurii Monakov) Misc: - Add Switchtec Gen4 support (Kelvin Cao) - Add Switchtec Intercomm Notify and Upstream Error Containment support (Logan Gunthorpe) - Use dma_set_mask_and_coherent() since Switchtec supports 64-bit addressing (Wesley Sheng)" * tag 'pci-v5.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (60 commits) PCI: Allow adjust_bridge_window() to shrink resource if necessary PCI: Set resource size directly in adjust_bridge_window() PCI: Rename extend_bridge_window() to adjust_bridge_window() PCI: Rename extend_bridge_window() parameter PCI: Consider alignment of hot-added bridges when assigning resources PCI: Remove local variable usage in pci_bus_distribute_available_resources() PCI: Pass size + alignment to pci_bus_distribute_available_resources() PCI: Rename variables PCI: vmd: Add two VMD Device IDs PCI: Remove unnecessary braces PCI: brcmstb: Add MSI support PCI: brcmstb: Add Broadcom STB PCIe host controller driver x86/PCI: Remove X86_DEV_DMA_OPS PCI: vmd: Remove dma_map_ops overrides iommu/vt-d: Remove VMD child device sanity check iommu/vt-d: Use pci_real_dma_dev() for mapping PCI: Introduce pci_real_dma_dev() x86/PCI: Expose VMD's pci_dev in struct pci_sysdata x86/PCI: Add to_pci_sysdata() helper PCI/AER: Initialize aer_fifo ...
Showing the changes to include/linux (2 of 42 files). Show all
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| @@ -1202,6 +1202,7 @@ int __must_check pci_resize_resource(struct pci_dev *dev, int i, int size); · 1201 unmodified lines | ||
| 1202 | 1202 | int pci_select_bars(struct pci_dev *dev, unsigned long flags); |
| 1203 | 1203 | bool pci_device_is_present(struct pci_dev *pdev); |
| 1204 | 1204 | void pci_ignore_hotplug(struct pci_dev *dev); |
| 1205 | +struct pci_dev *pci_real_dma_dev(struct pci_dev *dev); | |
| 1205 | 1206 | |
| 1206 | 1207 | int __printf(6, 7) pci_request_irq(struct pci_dev *dev, unsigned int nr, |
| 1207 | 1208 | irq_handler_t handler, irq_handler_t thread_fn, void *dev_id, |
| @@ -2310,7 +2311,7 @@ static inline struct eeh_dev *pci_dev_to_eeh_dev(struct pci_dev *pdev) · 1102 unmodified lines | ||
| 2310 | 2311 | } |
| 2311 | 2312 | #endif |
| 2312 | 2313 | |
| 2313 | −void pci_add_dma_alias(struct pci_dev *dev, u8 devfn); | |
| 2314 | +void pci_add_dma_alias(struct pci_dev *dev, u8 devfn_from, unsigned nr_devfns); | |
| 2314 | 2315 | bool pci_devs_are_dma_aliases(struct pci_dev *dev1, struct pci_dev *dev2); |
| 2315 | 2316 | int pci_for_each_dma_alias(struct pci_dev *pdev, |
| 2316 | 2317 | int (*fn)(struct pci_dev *pdev, |
| @@ -21,6 +21,11 @@ · 20 unmodified lines | ||
| 21 | 21 | #define SWITCHTEC_EVENT_FATAL BIT(4) |
| 22 | 22 | |
| 23 | 23 | #define SWITCHTEC_DMA_MRPC_EN BIT(0) |
| 24 | + | |
| 25 | +#define MRPC_GAS_READ 0x29 | |
| 26 | +#define MRPC_GAS_WRITE 0x87 | |
| 27 | +#define MRPC_CMD_ID(x) ((x) & 0xffff) | |
| 28 | + | |
| 24 | 29 | enum { |
| 25 | 30 | SWITCHTEC_GAS_MRPC_OFFSET = 0x0000, |
| 26 | 31 | SWITCHTEC_GAS_TOP_CFG_OFFSET = 0x1000, |
| @@ -32,6 +37,11 @@ enum { · 5 unmodified lines | ||
| 32 | 37 | SWITCHTEC_GAS_PFF_CSR_OFFSET = 0x134000, |
| 33 | 38 | }; |
| 34 | 39 | |
| 40 | +enum switchtec_gen { | |
| 41 | + SWITCHTEC_GEN3, | |
| 42 | + SWITCHTEC_GEN4, | |
| 43 | +}; | |
| 44 | + | |
| 35 | 45 | struct mrpc_regs { |
| 36 | 46 | u8 input_data[SWITCHTEC_MRPC_PAYLOAD_SIZE]; |
| 37 | 47 | u8 output_data[SWITCHTEC_MRPC_PAYLOAD_SIZE]; |
| @@ -98,16 +108,37 @@ struct sw_event_regs { · 60 unmodified lines | ||
| 98 | 108 | } __packed; |
| 99 | 109 | |
| 100 | 110 | enum { |
| 101 | − SWITCHTEC_CFG0_RUNNING = 0x04, | |
| 102 | − SWITCHTEC_CFG1_RUNNING = 0x05, | |
| 103 | − SWITCHTEC_IMG0_RUNNING = 0x03, | |
| 104 | − SWITCHTEC_IMG1_RUNNING = 0x07, | |
| 111 | + SWITCHTEC_GEN3_CFG0_RUNNING = 0x04, | |
| 112 | + SWITCHTEC_GEN3_CFG1_RUNNING = 0x05, | |
| 113 | + SWITCHTEC_GEN3_IMG0_RUNNING = 0x03, | |
| 114 | + SWITCHTEC_GEN3_IMG1_RUNNING = 0x07, | |
| 105 | 115 | }; |
| 106 | 116 | |
| 107 | −struct sys_info_regs { | |
| 108 | − u32 device_id; | |
| 109 | − u32 device_version; | |
| 110 | − u32 firmware_version; | |
| 117 | +enum { | |
| 118 | + SWITCHTEC_GEN4_MAP0_RUNNING = 0x00, | |
| 119 | + SWITCHTEC_GEN4_MAP1_RUNNING = 0x01, | |
| 120 | + SWITCHTEC_GEN4_KEY0_RUNNING = 0x02, | |
| 121 | + SWITCHTEC_GEN4_KEY1_RUNNING = 0x03, | |
| 122 | + SWITCHTEC_GEN4_BL2_0_RUNNING = 0x04, | |
| 123 | + SWITCHTEC_GEN4_BL2_1_RUNNING = 0x05, | |
| 124 | + SWITCHTEC_GEN4_CFG0_RUNNING = 0x06, | |
| 125 | + SWITCHTEC_GEN4_CFG1_RUNNING = 0x07, | |
| 126 | + SWITCHTEC_GEN4_IMG0_RUNNING = 0x08, | |
| 127 | + SWITCHTEC_GEN4_IMG1_RUNNING = 0x09, | |
| 128 | +}; | |
| 129 | + | |
| 130 | +enum { | |
| 131 | + SWITCHTEC_GEN4_KEY0_ACTIVE = 0, | |
| 132 | + SWITCHTEC_GEN4_KEY1_ACTIVE = 1, | |
| 133 | + SWITCHTEC_GEN4_BL2_0_ACTIVE = 0, | |
| 134 | + SWITCHTEC_GEN4_BL2_1_ACTIVE = 1, | |
| 135 | + SWITCHTEC_GEN4_CFG0_ACTIVE = 0, | |
| 136 | + SWITCHTEC_GEN4_CFG1_ACTIVE = 1, | |
| 137 | + SWITCHTEC_GEN4_IMG0_ACTIVE = 0, | |
| 138 | + SWITCHTEC_GEN4_IMG1_ACTIVE = 1, | |
| 139 | +}; | |
| 140 | + | |
| 141 | +struct sys_info_regs_gen3 { | |
| 111 | 142 | u32 reserved1; |
| 112 | 143 | u32 vendor_table_revision; |
| 113 | 144 | u32 table_format_version; |
| @@ -124,26 +155,105 @@ struct sys_info_regs { · 10 unmodified lines | ||
| 124 | 155 | u8 component_revision; |
| 125 | 156 | } __packed; |
| 126 | 157 | |
| 127 | −struct flash_info_regs { | |
| 158 | +struct sys_info_regs_gen4 { | |
| 159 | + u16 gas_layout_ver; | |
| 160 | + u8 evlist_ver; | |
| 161 | + u8 reserved1; | |
| 162 | + u16 mgmt_cmd_set_ver; | |
| 163 | + u16 fabric_cmd_set_ver; | |
| 164 | + u32 reserved2[2]; | |
| 165 | + u8 mrpc_uart_ver; | |
| 166 | + u8 mrpc_twi_ver; | |
| 167 | + u8 mrpc_eth_ver; | |
| 168 | + u8 mrpc_inband_ver; | |
| 169 | + u32 reserved3[7]; | |
| 170 | + u32 fw_update_tmo; | |
| 171 | + u32 xml_version_cfg; | |
| 172 | + u32 xml_version_img; | |
| 173 | + u32 partition_id; | |
| 174 | + u16 bl2_running; | |
| 175 | + u16 cfg_running; | |
| 176 | + u16 img_running; | |
| 177 | + u16 key_running; | |
| 178 | + u32 reserved4[43]; | |
| 179 | + u32 vendor_seeprom_twi; | |
| 180 | + u32 vendor_table_revision; | |
| 181 | + u32 vendor_specific_info[2]; | |
| 182 | + u16 p2p_vendor_id; | |
| 183 | + u16 p2p_device_id; | |
| 184 | + u8 p2p_revision_id; | |
| 185 | + u8 reserved5[3]; | |
| 186 | + u32 p2p_class_id; | |
| 187 | + u16 subsystem_vendor_id; | |
| 188 | + u16 subsystem_id; | |
| 189 | + u32 p2p_serial_number[2]; | |
| 190 | + u8 mac_addr[6]; | |
| 191 | + u8 reserved6[2]; | |
| 192 | + u32 reserved7[3]; | |
| 193 | + char vendor_id[8]; | |
| 194 | + char product_id[24]; | |
| 195 | + char product_revision[2]; | |
| 196 | + u16 reserved8; | |
| 197 | +} __packed; | |
| 198 | + | |
| 199 | +struct sys_info_regs { | |
| 200 | + u32 device_id; | |
| 201 | + u32 device_version; | |
| 202 | + u32 firmware_version; | |
| 203 | + union { | |
| 204 | + struct sys_info_regs_gen3 gen3; | |
| 205 | + struct sys_info_regs_gen4 gen4; | |
| 206 | + }; | |
| 207 | +} __packed; | |
| 208 | + | |
| 209 | +struct partition_info { | |
| 210 | + u32 address; | |
| 211 | + u32 length; | |
| 212 | +}; | |
| 213 | + | |
| 214 | +struct flash_info_regs_gen3 { | |
| 128 | 215 | u32 flash_part_map_upd_idx; |
| 129 | 216 | |
| 130 | − struct active_partition_info { | |
| 217 | + struct active_partition_info_gen3 { | |
| 131 | 218 | u32 address; |
| 132 | 219 | u32 build_version; |
| 133 | 220 | u32 build_string; |
| 134 | 221 | } active_img; |
| 135 | 222 | |
| 136 | − struct active_partition_info active_cfg; | |
| 137 | − struct active_partition_info inactive_img; | |
| 138 | − struct active_partition_info inactive_cfg; | |
| 223 | + struct active_partition_info_gen3 active_cfg; | |
| 224 | + struct active_partition_info_gen3 inactive_img; | |
| 225 | + struct active_partition_info_gen3 inactive_cfg; | |
| 139 | 226 | |
| 140 | 227 | u32 flash_length; |
| 141 | 228 | |
| 142 | − struct partition_info { | |
| 143 | − u32 address; | |
| 144 | − u32 length; | |
| 145 | − } cfg0; | |
| 229 | + struct partition_info cfg0; | |
| 230 | + struct partition_info cfg1; | |
| 231 | + struct partition_info img0; | |
| 232 | + struct partition_info img1; | |
| 233 | + struct partition_info nvlog; | |
| 234 | + struct partition_info vendor[8]; | |
| 235 | +}; | |
| 146 | 236 | |
| 237 | +struct flash_info_regs_gen4 { | |
| 238 | + u32 flash_address; | |
| 239 | + u32 flash_length; | |
| 240 | + | |
| 241 | + struct active_partition_info_gen4 { | |
| 242 | + unsigned char bl2; | |
| 243 | + unsigned char cfg; | |
| 244 | + unsigned char img; | |
| 245 | + unsigned char key; | |
| 246 | + } active_flag; | |
| 247 | + | |
| 248 | + u32 reserved[3]; | |
| 249 | + | |
| 250 | + struct partition_info map0; | |
| 251 | + struct partition_info map1; | |
| 252 | + struct partition_info key0; | |
| 253 | + struct partition_info key1; | |
| 254 | + struct partition_info bl2_0; | |
| 255 | + struct partition_info bl2_1; | |
| 256 | + struct partition_info cfg0; | |
| 147 | 257 | struct partition_info cfg1; |
| 148 | 258 | struct partition_info img0; |
| 149 | 259 | struct partition_info img1; |
| @@ -151,6 +261,13 @@ struct flash_info_regs { · 1 unmodified line | ||
| 151 | 261 | struct partition_info vendor[8]; |
| 152 | 262 | }; |
| 153 | 263 | |
| 264 | +struct flash_info_regs { | |
| 265 | + union { | |
| 266 | + struct flash_info_regs_gen3 gen3; | |
| 267 | + struct flash_info_regs_gen4 gen4; | |
| 268 | + }; | |
| 269 | +}; | |
| 270 | + | |
| 154 | 271 | enum { |
| 155 | 272 | SWITCHTEC_NTB_REG_INFO_OFFSET = 0x0000, |
| 156 | 273 | SWITCHTEC_NTB_REG_CTRL_OFFSET = 0x4000, |
| @@ -196,7 +313,9 @@ struct part_cfg_regs { · 39 unmodified lines | ||
| 196 | 313 | u32 mrpc_comp_async_data[5]; |
| 197 | 314 | u32 dyn_binding_hdr; |
| 198 | 315 | u32 dyn_binding_data[5]; |
| 199 | − u32 reserved4[159]; | |
| 316 | + u32 intercomm_notify_hdr; | |
| 317 | + u32 intercomm_notify_data[5]; | |
| 318 | + u32 reserved4[153]; | |
| 200 | 319 | } __packed; |
| 201 | 320 | |
| 202 | 321 | enum { |
| @@ -320,7 +439,8 @@ struct pff_csr_regs { · 117 unmodified lines | ||
| 320 | 439 | u32 dpc_data[5]; |
| 321 | 440 | u32 cts_hdr; |
| 322 | 441 | u32 cts_data[5]; |
| 323 | − u32 reserved3[6]; | |
| 442 | + u32 uec_hdr; | |
| 443 | + u32 uec_data[5]; | |
| 324 | 444 | u32 hotplug_hdr; |
| 325 | 445 | u32 hotplug_data[5]; |
| 326 | 446 | u32 ier_hdr; |
| @@ -355,6 +475,8 @@ struct switchtec_dev { · 28 unmodified lines | ||
| 355 | 475 | struct device dev; |
| 356 | 476 | struct cdev cdev; |
| 357 | 477 | |
| 478 | + enum switchtec_gen gen; | |
| 479 | + | |
| 358 | 480 | int partition; |
| 359 | 481 | int partition_count; |
| 360 | 482 | int pff_csr_count; |