Pull media updates from Mauro Carvalho Chehab: "This series contains: - Exynos s5p-mfc driver got support for VP8 encoder - Some SoC drivers gained support for asynchronous registration (needed for DT) - The RC subsystem gained support for RC activity LED; - New drivers added: a video decoder(adv7842), a video encoder (adv7511), a new GSPCA driver (stk1135) and support for Renesas R-Car (vsp1) - the first SDR kernel driver: mirics msi3101. Due to some troubles with the driver, and because the API is still under discussion, it will be merged at staging for 3.12. Need to rework on it - usual new boards additions, fixes, cleanups and driver improvements" * 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (242 commits) [media] cx88: Fix regression: CX88_AUDIO_WM8775 can't be 0 [media] exynos4-is: Fix entity unregistration on error path [media] exynos-gsc: Register v4l2 device [media] exynos4-is: Fix fimc-lite bayer formats [media] em28xx: fix assignment of the eeprom data [media] hdpvr: fix iteration over uninitialized lists in hdpvr_probe() [media] usbtv: Throw corrupted frames away [media] usbtv: Fix deinterlacing [media] v4l2: added missing mutex.h include to v4l2-ctrls.h [media] DocBook: upgrade media_api DocBook version to 4.2 [media] ml86v7667: fix compile warning: 'ret' set but not used [media] s5p-g2d: Fix registration failure [media] media: coda: Fix DT driver data pointer for i.MX27 [media] s5p-mfc: Fix input/output format reporting [media] v4l: vsp1: Fix mutex double lock at streamon time [media] v4l: vsp1: Add support for RT clock [media] v4l: vsp1: Initialize media device bus_info field [media] davinci: vpif_capture: fix error return code in vpif_probe() [media] davinci: vpif_display: fix error return code in vpif_probe() [media] MAINTAINERS: add entries for adv7511 and adv7842 ...
Showing the changes to include/uapi/linux (4 of 216 files). Show all
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| @@ -161,6 +161,8 @@ enum v4l2_colorfx { · 160 unmodified lines | ||
| 161 | 161 | #define V4L2_CID_USER_SI476X_BASE (V4L2_CID_USER_BASE + 0x1040) |
| 162 | 162 | |
| 163 | 163 | /* MPEG-class control IDs */ |
| 164 | +/* The MPEG controls are applicable to all codec controls | |
| 165 | + * and the 'MPEG' part of the define is historical */ | |
| 164 | 166 | |
| 165 | 167 | #define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900) |
| 166 | 168 | #define V4L2_CID_MPEG_CLASS (V4L2_CTRL_CLASS_MPEG | 1) |
| @@ -522,6 +524,33 @@ enum v4l2_mpeg_video_mpeg4_profile { · 355 unmodified lines | ||
| 522 | 524 | }; |
| 523 | 525 | #define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL (V4L2_CID_MPEG_BASE+407) |
| 524 | 526 | |
| 527 | +/* Control IDs for VP8 streams | |
| 528 | + * Although VP8 is not part of MPEG we add these controls to the MPEG class | |
| 529 | + * as that class is already handling other video compression standards | |
| 530 | + */ | |
| 531 | +#define V4L2_CID_MPEG_VIDEO_VPX_NUM_PARTITIONS (V4L2_CID_MPEG_BASE+500) | |
| 532 | +enum v4l2_vp8_num_partitions { | |
| 533 | + V4L2_CID_MPEG_VIDEO_VPX_1_PARTITION = 0, | |
| 534 | + V4L2_CID_MPEG_VIDEO_VPX_2_PARTITIONS = 1, | |
| 535 | + V4L2_CID_MPEG_VIDEO_VPX_4_PARTITIONS = 2, | |
| 536 | + V4L2_CID_MPEG_VIDEO_VPX_8_PARTITIONS = 3, | |
| 537 | +}; | |
| 538 | +#define V4L2_CID_MPEG_VIDEO_VPX_IMD_DISABLE_4X4 (V4L2_CID_MPEG_BASE+501) | |
| 539 | +#define V4L2_CID_MPEG_VIDEO_VPX_NUM_REF_FRAMES (V4L2_CID_MPEG_BASE+502) | |
| 540 | +enum v4l2_vp8_num_ref_frames { | |
| 541 | + V4L2_CID_MPEG_VIDEO_VPX_1_REF_FRAME = 0, | |
| 542 | + V4L2_CID_MPEG_VIDEO_VPX_2_REF_FRAME = 1, | |
| 543 | + V4L2_CID_MPEG_VIDEO_VPX_3_REF_FRAME = 2, | |
| 544 | +}; | |
| 545 | +#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_LEVEL (V4L2_CID_MPEG_BASE+503) | |
| 546 | +#define V4L2_CID_MPEG_VIDEO_VPX_FILTER_SHARPNESS (V4L2_CID_MPEG_BASE+504) | |
| 547 | +#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_REF_PERIOD (V4L2_CID_MPEG_BASE+505) | |
| 548 | +#define V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_SEL (V4L2_CID_MPEG_BASE+506) | |
| 549 | +enum v4l2_vp8_golden_frame_sel { | |
| 550 | + V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_PREV = 0, | |
| 551 | + V4L2_CID_MPEG_VIDEO_VPX_GOLDEN_FRAME_USE_REF_PERIOD = 1, | |
| 552 | +}; | |
| 553 | + | |
| 525 | 554 | /* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ |
| 526 | 555 | #define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000) |
| 527 | 556 | #define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_MPEG_CX2341X_BASE+0) |
| @@ -823,12 +823,4 @@ · 822 unmodified lines | ||
| 823 | 823 | V4L2_DV_FL_REDUCED_BLANKING) \ |
| 824 | 824 | } |
| 825 | 825 | |
| 826 | −#define V4L2_DV_BT_DMT_1366X768P60 { \ | |
| 827 | − .type = V4L2_DV_BT_656_1120, \ | |
| 828 | − V4L2_INIT_BT_TIMINGS(1366, 768, 0, \ | |
| 829 | − V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | |
| 830 | − 85500000, 70, 143, 213, 3, 3, 24, 0, 0, 0, \ | |
| 831 | − V4L2_DV_BT_STD_DMT, 0) \ | |
| 832 | −} | |
| 833 | − | |
| 834 | 826 | #endif |
| @@ -37,7 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | enum v4l2_mbus_pixelcode { |
| 38 | 38 | V4L2_MBUS_FMT_FIXED = 0x0001, |
| 39 | 39 | |
| 40 | − /* RGB - next is 0x100d */ | |
| 40 | + /* RGB - next is 0x100e */ | |
| 41 | 41 | V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE = 0x1001, |
| 42 | 42 | V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE = 0x1002, |
| 43 | 43 | V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE = 0x1003, |
| @@ -50,8 +50,9 @@ enum v4l2_mbus_pixelcode { · 6 unmodified lines | ||
| 50 | 50 | V4L2_MBUS_FMT_RGB888_1X24 = 0x100a, |
| 51 | 51 | V4L2_MBUS_FMT_RGB888_2X12_BE = 0x100b, |
| 52 | 52 | V4L2_MBUS_FMT_RGB888_2X12_LE = 0x100c, |
| 53 | + V4L2_MBUS_FMT_ARGB8888_1X32 = 0x100d, | |
| 53 | 54 | |
| 54 | − /* YUV (including grey) - next is 0x2017 */ | |
| 55 | + /* YUV (including grey) - next is 0x2018 */ | |
| 55 | 56 | V4L2_MBUS_FMT_Y8_1X8 = 0x2001, |
| 56 | 57 | V4L2_MBUS_FMT_UV8_1X8 = 0x2015, |
| 57 | 58 | V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002, |
| @@ -74,6 +75,7 @@ enum v4l2_mbus_pixelcode { · 16 unmodified lines | ||
| 74 | 75 | V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d, |
| 75 | 76 | V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e, |
| 76 | 77 | V4L2_MBUS_FMT_YUV10_1X30 = 0x2016, |
| 78 | + V4L2_MBUS_FMT_AYUV8_1X32 = 0x2017, | |
| 77 | 79 | |
| 78 | 80 | /* Bayer - next is 0x3019 */ |
| 79 | 81 | V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001, |
| @@ -348,6 +348,8 @@ struct v4l2_pix_format { · 347 unmodified lines | ||
| 348 | 348 | /* two non contiguous planes - one Y, one Cr + Cb interleaved */ |
| 349 | 349 | #define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */ |
| 350 | 350 | #define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */ |
| 351 | +#define V4L2_PIX_FMT_NV16M v4l2_fourcc('N', 'M', '1', '6') /* 16 Y/CbCr 4:2:2 */ | |
| 352 | +#define V4L2_PIX_FMT_NV61M v4l2_fourcc('N', 'M', '6', '1') /* 16 Y/CrCb 4:2:2 */ | |
| 351 | 353 | #define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 macroblocks */ |
| 352 | 354 | #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 macroblocks */ |
| 353 | 355 | |
| @@ -1055,6 +1057,16 @@ struct v4l2_bt_timings { · 701 unmodified lines | ||
| 1055 | 1057 | or used depends on the hardware. */ |
| 1056 | 1058 | #define V4L2_DV_FL_HALF_LINE (1 << 3) |
| 1057 | 1059 | |
| 1060 | +/* A few useful defines to calculate the total blanking and frame sizes */ | |
| 1061 | +#define V4L2_DV_BT_BLANKING_WIDTH(bt) \ | |
| 1062 | + (bt->hfrontporch + bt->hsync + bt->hbackporch) | |
| 1063 | +#define V4L2_DV_BT_FRAME_WIDTH(bt) \ | |
| 1064 | + (bt->width + V4L2_DV_BT_BLANKING_WIDTH(bt)) | |
| 1065 | +#define V4L2_DV_BT_BLANKING_HEIGHT(bt) \ | |
| 1066 | + (bt->vfrontporch + bt->vsync + bt->vbackporch + \ | |
| 1067 | + bt->il_vfrontporch + bt->il_vsync + bt->il_vbackporch) | |
| 1068 | +#define V4L2_DV_BT_FRAME_HEIGHT(bt) \ | |
| 1069 | + (bt->height + V4L2_DV_BT_BLANKING_HEIGHT(bt)) | |
| 1058 | 1070 | |
| 1059 | 1071 | /** struct v4l2_dv_timings - DV timings |
| 1060 | 1072 | * @type: the type of the timings |