Add macros to describe the bitfields in the ARM architected timer control register to make code easy to understand.
Unified · Split
| @@ -93,8 +93,13 @@ static inline void arch_counter_set_user_access(void) · 92 unmodified lines | ||
| 93 | 93 | |
| 94 | 94 | asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl)); |
| 95 | 95 | |
| 96 | − /* disable user access to everything */ | |
| 97 | − cntkctl &= ~((3 << 8) | (7 << 0)); | |
| 96 | + /* Disable user access to both physical/virtual counters/timers */ | |
| 97 | + /* Also disable virtual event stream */ | |
| 98 | + cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN | |
| 99 | + | ARCH_TIMER_USR_VT_ACCESS_EN | |
| 100 | + | ARCH_TIMER_VIRT_EVT_EN | |
| 101 | + | ARCH_TIMER_USR_VCT_ACCESS_EN | |
| 102 | + | ARCH_TIMER_USR_PCT_ACCESS_EN); | |
| 98 | 103 | |
| 99 | 104 | asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); |
| 100 | 105 | } |
| @@ -96,12 +96,16 @@ static inline void arch_counter_set_user_access(void) · 95 unmodified lines | ||
| 96 | 96 | { |
| 97 | 97 | u32 cntkctl; |
| 98 | 98 | |
| 99 | − /* Disable user access to the timers and the physical counter. */ | |
| 100 | 99 | asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl)); |
| 101 | − cntkctl &= ~((3 << 8) | (1 << 0)); | |
| 102 | 100 | |
| 103 | − /* Enable user access to the virtual counter and frequency. */ | |
| 104 | − cntkctl |= (1 << 1); | |
| 101 | + /* Disable user access to the timers and the physical counter */ | |
| 102 | + cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN | |
| 103 | + | ARCH_TIMER_USR_VT_ACCESS_EN | |
| 104 | + | ARCH_TIMER_USR_PCT_ACCESS_EN); | |
| 105 | + | |
| 106 | + /* Enable user access to the virtual counter */ | |
| 107 | + cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN; | |
| 108 | + | |
| 105 | 109 | asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl)); |
| 106 | 110 | } |
| 107 | 111 | |
| @@ -33,6 +33,14 @@ enum arch_timer_reg { · 32 unmodified lines | ||
| 33 | 33 | #define ARCH_TIMER_MEM_PHYS_ACCESS 2 |
| 34 | 34 | #define ARCH_TIMER_MEM_VIRT_ACCESS 3 |
| 35 | 35 | |
| 36 | +#define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ | |
| 37 | +#define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ | |
| 38 | +#define ARCH_TIMER_VIRT_EVT_EN (1 << 2) | |
| 39 | +#define ARCH_TIMER_EVT_TRIGGER_SHIFT (4) | |
| 40 | +#define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT) | |
| 41 | +#define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */ | |
| 42 | +#define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */ | |
| 43 | + | |
| 36 | 44 | #ifdef CONFIG_ARM_ARCH_TIMER |
| 37 | 45 | |
| 38 | 46 | extern u32 arch_timer_get_rate(void); |