Unified · Split
| @@ -514,6 +514,11 @@ S: Bessemerstraat 21 · 513 unmodified lines | ||
| 514 | 514 | S: Amsterdam |
| 515 | 515 | S: The Netherlands |
| 516 | 516 | |
| 517 | +N: NeilBrown | |
| 518 | +E: neil@brown.name | |
| 519 | +P: 4096R/566281B9 1BC6 29EB D390 D870 7B5F 497A 39EC 9EDD 5662 81B9 | |
| 520 | +D: NFSD Maintainer 2000-2007 | |
| 521 | + | |
| 517 | 522 | N: Zach Brown |
| 518 | 523 | E: zab@zabbo.net |
| 519 | 524 | D: maestro pci sound |
| @@ -0,0 +1,75 @@ | ||
| 1 | +What: /sys/bus/xen-backend/devices/*/devtype | |
| 2 | +Date: Feb 2009 | |
| 3 | +KernelVersion: 2.6.38 | |
| 4 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 5 | +Description: | |
| 6 | + The type of the device. e.g., one of: 'vbd' (block), | |
| 7 | + 'vif' (network), or 'vfb' (framebuffer). | |
| 8 | + | |
| 9 | +What: /sys/bus/xen-backend/devices/*/nodename | |
| 10 | +Date: Feb 2009 | |
| 11 | +KernelVersion: 2.6.38 | |
| 12 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 13 | +Description: | |
| 14 | + XenStore node (under /local/domain/NNN/) for this | |
| 15 | + backend device. | |
| 16 | + | |
| 17 | +What: /sys/bus/xen-backend/devices/vbd-*/physical_device | |
| 18 | +Date: April 2011 | |
| 19 | +KernelVersion: 3.0 | |
| 20 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 21 | +Description: | |
| 22 | + The major:minor number (in hexidecimal) of the | |
| 23 | + physical device providing the storage for this backend | |
| 24 | + block device. | |
| 25 | + | |
| 26 | +What: /sys/bus/xen-backend/devices/vbd-*/mode | |
| 27 | +Date: April 2011 | |
| 28 | +KernelVersion: 3.0 | |
| 29 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 30 | +Description: | |
| 31 | + Whether the block device is read-only ('r') or | |
| 32 | + read-write ('w'). | |
| 33 | + | |
| 34 | +What: /sys/bus/xen-backend/devices/vbd-*/statistics/f_req | |
| 35 | +Date: April 2011 | |
| 36 | +KernelVersion: 3.0 | |
| 37 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 38 | +Description: | |
| 39 | + Number of flush requests from the frontend. | |
| 40 | + | |
| 41 | +What: /sys/bus/xen-backend/devices/vbd-*/statistics/oo_req | |
| 42 | +Date: April 2011 | |
| 43 | +KernelVersion: 3.0 | |
| 44 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 45 | +Description: | |
| 46 | + Number of requests delayed because the backend was too | |
| 47 | + busy processing previous requests. | |
| 48 | + | |
| 49 | +What: /sys/bus/xen-backend/devices/vbd-*/statistics/rd_req | |
| 50 | +Date: April 2011 | |
| 51 | +KernelVersion: 3.0 | |
| 52 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 53 | +Description: | |
| 54 | + Number of read requests from the frontend. | |
| 55 | + | |
| 56 | +What: /sys/bus/xen-backend/devices/vbd-*/statistics/rd_sect | |
| 57 | +Date: April 2011 | |
| 58 | +KernelVersion: 3.0 | |
| 59 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 60 | +Description: | |
| 61 | + Number of sectors read by the frontend. | |
| 62 | + | |
| 63 | +What: /sys/bus/xen-backend/devices/vbd-*/statistics/wr_req | |
| 64 | +Date: April 2011 | |
| 65 | +KernelVersion: 3.0 | |
| 66 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 67 | +Description: | |
| 68 | + Number of write requests from the frontend. | |
| 69 | + | |
| 70 | +What: /sys/bus/xen-backend/devices/vbd-*/statistics/wr_sect | |
| 71 | +Date: April 2011 | |
| 72 | +KernelVersion: 3.0 | |
| 73 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 74 | +Description: | |
| 75 | + Number of sectors written by the frontend. | |
| @@ -0,0 +1,77 @@ | ||
| 1 | +What: /sys/devices/system/xen_memory/xen_memory0/max_retry_count | |
| 2 | +Date: May 2011 | |
| 3 | +KernelVersion: 2.6.39 | |
| 4 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 5 | +Description: | |
| 6 | + The maximum number of times the balloon driver will | |
| 7 | + attempt to increase the balloon before giving up. See | |
| 8 | + also 'retry_count' below. | |
| 9 | + A value of zero means retry forever and is the default one. | |
| 10 | + | |
| 11 | +What: /sys/devices/system/xen_memory/xen_memory0/max_schedule_delay | |
| 12 | +Date: May 2011 | |
| 13 | +KernelVersion: 2.6.39 | |
| 14 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 15 | +Description: | |
| 16 | + The limit that 'schedule_delay' (see below) will be | |
| 17 | + increased to. The default value is 32 seconds. | |
| 18 | + | |
| 19 | +What: /sys/devices/system/xen_memory/xen_memory0/retry_count | |
| 20 | +Date: May 2011 | |
| 21 | +KernelVersion: 2.6.39 | |
| 22 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 23 | +Description: | |
| 24 | + The current number of times that the balloon driver | |
| 25 | + has attempted to increase the size of the balloon. | |
| 26 | + The default value is one. With max_retry_count being | |
| 27 | + zero (unlimited), this means that the driver will attempt | |
| 28 | + to retry with a 'schedule_delay' delay. | |
| 29 | + | |
| 30 | +What: /sys/devices/system/xen_memory/xen_memory0/schedule_delay | |
| 31 | +Date: May 2011 | |
| 32 | +KernelVersion: 2.6.39 | |
| 33 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 34 | +Description: | |
| 35 | + The time (in seconds) to wait between attempts to | |
| 36 | + increase the balloon. Each time the balloon cannot be | |
| 37 | + increased, 'schedule_delay' is increased (until | |
| 38 | + 'max_schedule_delay' is reached at which point it | |
| 39 | + will use the max value). | |
| 40 | + | |
| 41 | +What: /sys/devices/system/xen_memory/xen_memory0/target | |
| 42 | +Date: April 2008 | |
| 43 | +KernelVersion: 2.6.26 | |
| 44 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 45 | +Description: | |
| 46 | + The target number of pages to adjust this domain's | |
| 47 | + memory reservation to. | |
| 48 | + | |
| 49 | +What: /sys/devices/system/xen_memory/xen_memory0/target_kb | |
| 50 | +Date: April 2008 | |
| 51 | +KernelVersion: 2.6.26 | |
| 52 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 53 | +Description: | |
| 54 | + As target above, except the value is in KiB. | |
| 55 | + | |
| 56 | +What: /sys/devices/system/xen_memory/xen_memory0/info/current_kb | |
| 57 | +Date: April 2008 | |
| 58 | +KernelVersion: 2.6.26 | |
| 59 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 60 | +Description: | |
| 61 | + Current size (in KiB) of this domain's memory | |
| 62 | + reservation. | |
| 63 | + | |
| 64 | +What: /sys/devices/system/xen_memory/xen_memory0/info/high_kb | |
| 65 | +Date: April 2008 | |
| 66 | +KernelVersion: 2.6.26 | |
| 67 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 68 | +Description: | |
| 69 | + Amount (in KiB) of high memory in the balloon. | |
| 70 | + | |
| 71 | +What: /sys/devices/system/xen_memory/xen_memory0/info/low_kb | |
| 72 | +Date: April 2008 | |
| 73 | +KernelVersion: 2.6.26 | |
| 74 | +Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 75 | +Description: | |
| 76 | + Amount (in KiB) of low (or normal) memory in the | |
| 77 | + balloon. | |
| @@ -66,6 +66,24 @@ Description: · 65 unmodified lines | ||
| 66 | 66 | re-discover previously removed devices. |
| 67 | 67 | Depends on CONFIG_HOTPLUG. |
| 68 | 68 | |
| 69 | +What: /sys/bus/pci/devices/.../msi_irqs/ | |
| 70 | +Date: September, 2011 | |
| 71 | +Contact: Neil Horman <nhorman@tuxdriver.com> | |
| 72 | +Description: | |
| 73 | + The /sys/devices/.../msi_irqs directory contains a variable set | |
| 74 | + of sub-directories, with each sub-directory being named after a | |
| 75 | + corresponding msi irq vector allocated to that device. Each | |
| 76 | + numbered sub-directory N contains attributes of that irq. | |
| 77 | + Note that this directory is not created for device drivers which | |
| 78 | + do not support msi irqs | |
| 79 | + | |
| 80 | +What: /sys/bus/pci/devices/.../msi_irqs/<N>/mode | |
| 81 | +Date: September 2011 | |
| 82 | +Contact: Neil Horman <nhorman@tuxdriver.com> | |
| 83 | +Description: | |
| 84 | + This attribute indicates the mode that the irq vector named by | |
| 85 | + the parent directory is in (msi vs. msix) | |
| 86 | + | |
| 69 | 87 | What: /sys/bus/pci/devices/.../remove |
| 70 | 88 | Date: January 2009 |
| 71 | 89 | Contact: Linux PCI developers <linux-pci@vger.kernel.org> |
| @@ -119,6 +119,31 @@ Description: · 118 unmodified lines | ||
| 119 | 119 | Write a 1 to force the device to disconnect |
| 120 | 120 | (equivalent to unplugging a wired USB device). |
| 121 | 121 | |
| 122 | +What: /sys/bus/usb/drivers/.../new_id | |
| 123 | +Date: October 2011 | |
| 124 | +Contact: linux-usb@vger.kernel.org | |
| 125 | +Description: | |
| 126 | + Writing a device ID to this file will attempt to | |
| 127 | + dynamically add a new device ID to a USB device driver. | |
| 128 | + This may allow the driver to support more hardware than | |
| 129 | + was included in the driver's static device ID support | |
| 130 | + table at compile time. The format for the device ID is: | |
| 131 | + idVendor idProduct bInterfaceClass. | |
| 132 | + The vendor ID and device ID fields are required, the | |
| 133 | + interface class is optional. | |
| 134 | + Upon successfully adding an ID, the driver will probe | |
| 135 | + for the device and attempt to bind to it. For example: | |
| 136 | + # echo "8086 10f5" > /sys/bus/usb/drivers/foo/new_id | |
| 137 | + | |
| 138 | +What: /sys/bus/usb-serial/drivers/.../new_id | |
| 139 | +Date: October 2011 | |
| 140 | +Contact: linux-usb@vger.kernel.org | |
| 141 | +Description: | |
| 142 | + For serial USB drivers, this attribute appears under the | |
| 143 | + extra bus folder "usb-serial" in sysfs; apart from that | |
| 144 | + difference, all descriptions from the entry | |
| 145 | + "/sys/bus/usb/drivers/.../new_id" apply. | |
| 146 | + | |
| 122 | 147 | What: /sys/bus/usb/drivers/.../remove_id |
| 123 | 148 | Date: November 2009 |
| 124 | 149 | Contact: CHENG Renquan <rqcheng@smu.edu.sg> |
| @@ -0,0 +1,12 @@ | ||
| 1 | +What: Attribute for calibrating ST-Ericsson AB8500 Real Time Clock | |
| 2 | +Date: Oct 2011 | |
| 3 | +KernelVersion: 3.0 | |
| 4 | +Contact: Mark Godfrey <mark.godfrey@stericsson.com> | |
| 5 | +Description: The rtc_calibration attribute allows the userspace to | |
| 6 | + calibrate the AB8500.s 32KHz Real Time Clock. | |
| 7 | + Every 60 seconds the AB8500 will correct the RTC's value | |
| 8 | + by adding to it the value of this attribute. | |
| 9 | + The range of the attribute is -127 to +127 in units of | |
| 10 | + 30.5 micro-seconds (half-parts-per-million of the 32KHz clock) | |
| 11 | +Users: The /vendor/st-ericsson/base_utilities/core/rtc_calibration | |
| 12 | + daemon uses this interface. | |
| @@ -0,0 +1,34 @@ | ||
| 1 | +What: /sys/devices/platform/docg3/f[0-3]_dps[01]_is_keylocked | |
| 2 | +Date: November 2011 | |
| 3 | +KernelVersion: 3.3 | |
| 4 | +Contact: Robert Jarzmik <robert.jarzmik@free.fr> | |
| 5 | +Description: | |
| 6 | + Show whether the floor (0 to 4), protection area (0 or 1) is | |
| 7 | + keylocked. Each docg3 chip (or floor) has 2 protection areas, | |
| 8 | + which can cover any part of it, block aligned, called DPS. | |
| 9 | + The protection has information embedded whether it blocks reads, | |
| 10 | + writes or both. | |
| 11 | + The result is: | |
| 12 | + 0 -> the DPS is not keylocked | |
| 13 | + 1 -> the DPS is keylocked | |
| 14 | +Users: None identified so far. | |
| 15 | + | |
| 16 | +What: /sys/devices/platform/docg3/f[0-3]_dps[01]_protection_key | |
| 17 | +Date: November 2011 | |
| 18 | +KernelVersion: 3.3 | |
| 19 | +Contact: Robert Jarzmik <robert.jarzmik@free.fr> | |
| 20 | +Description: | |
| 21 | + Enter the protection key for the floor (0 to 4), protection area | |
| 22 | + (0 or 1). Each docg3 chip (or floor) has 2 protection areas, | |
| 23 | + which can cover any part of it, block aligned, called DPS. | |
| 24 | + The protection has information embedded whether it blocks reads, | |
| 25 | + writes or both. | |
| 26 | + The protection key is a string of 8 bytes (value 0-255). | |
| 27 | + Entering the correct value toggle the lock, and can be observed | |
| 28 | + through f[0-3]_dps[01]_is_keylocked. | |
| 29 | + Possible values are: | |
| 30 | + - 8 bytes | |
| 31 | + Typical values are: | |
| 32 | + - "00000000" | |
| 33 | + - "12345678" | |
| 34 | +Users: None identified so far. | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | What: /sys/module/hid_logitech/drivers/hid:logitech/<dev>/range. |
| 2 | 2 | Date: July 2011 |
| 3 | 3 | KernelVersion: 3.2 |
| 4 | −Contact: Michal Mal� <madcatxster@gmail.com> | |
| 4 | +Contact: Michal Malý <madcatxster@gmail.com> | |
| 5 | 5 | Description: Display minimum, maximum and current range of the steering |
| 6 | 6 | wheel. Writing a value within min and max boundaries sets the |
| 7 | 7 | range of the wheel. |
| @@ -0,0 +1,9 @@ | ||
| 1 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/quirks | |
| 2 | +Date: November 2011 | |
| 3 | +Contact: Benjamin Tissoires <benjamin.tissoires@gmail.com> | |
| 4 | +Description: The integer value of this attribute corresponds to the | |
| 5 | + quirks actually in place to handle the device's protocol. | |
| 6 | + When read, this attribute returns the current settings (see | |
| 7 | + MT_QUIRKS_* in hid-multitouch.c). | |
| 8 | + When written this attribute change on the fly the quirks, then | |
| 9 | + the protocol to handle the device. | |
| @@ -0,0 +1,135 @@ | ||
| 1 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/actual_profile | |
| 2 | +Date: June 2011 | |
| 3 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 4 | +Description: The integer value of this attribute ranges from 0-4. | |
| 5 | + When read, this attribute returns the number of the actual | |
| 6 | + profile. This value is persistent, so its equivalent to the | |
| 7 | + profile that's active when the device is powered on next time. | |
| 8 | + When written, this file sets the number of the startup profile | |
| 9 | + and the device activates this profile immediately. | |
| 10 | +Users: http://roccat.sourceforge.net | |
| 11 | + | |
| 12 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/info | |
| 13 | +Date: June 2011 | |
| 14 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 15 | +Description: When read, this file returns general data like firmware version. | |
| 16 | + The data is 6 bytes long. | |
| 17 | + This file is readonly. | |
| 18 | +Users: http://roccat.sourceforge.net | |
| 19 | + | |
| 20 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/key_mask | |
| 21 | +Date: June 2011 | |
| 22 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 23 | +Description: When written, this file lets one deactivate certain keys like | |
| 24 | + windows and application keys, to prevent accidental presses. | |
| 25 | + Profile number for which this settings occur is included in | |
| 26 | + written data. The data has to be 6 bytes long. | |
| 27 | + Before reading this file, control has to be written to select | |
| 28 | + which profile to read. | |
| 29 | +Users: http://roccat.sourceforge.net | |
| 30 | + | |
| 31 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_capslock | |
| 32 | +Date: June 2011 | |
| 33 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 34 | +Description: When written, this file lets one set the function of the | |
| 35 | + capslock key for a specific profile. Profile number is included | |
| 36 | + in written data. The data has to be 6 bytes long. | |
| 37 | + Before reading this file, control has to be written to select | |
| 38 | + which profile to read. | |
| 39 | +Users: http://roccat.sourceforge.net | |
| 40 | + | |
| 41 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_easyzone | |
| 42 | +Date: June 2011 | |
| 43 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 44 | +Description: When written, this file lets one set the function of the | |
| 45 | + easyzone keys for a specific profile. Profile number is included | |
| 46 | + in written data. The data has to be 65 bytes long. | |
| 47 | + Before reading this file, control has to be written to select | |
| 48 | + which profile to read. | |
| 49 | +Users: http://roccat.sourceforge.net | |
| 50 | + | |
| 51 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_function | |
| 52 | +Date: June 2011 | |
| 53 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 54 | +Description: When written, this file lets one set the function of the | |
| 55 | + function keys for a specific profile. Profile number is included | |
| 56 | + in written data. The data has to be 41 bytes long. | |
| 57 | + Before reading this file, control has to be written to select | |
| 58 | + which profile to read. | |
| 59 | +Users: http://roccat.sourceforge.net | |
| 60 | + | |
| 61 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_macro | |
| 62 | +Date: June 2011 | |
| 63 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 64 | +Description: When written, this file lets one set the function of the macro | |
| 65 | + keys for a specific profile. Profile number is included in | |
| 66 | + written data. The data has to be 35 bytes long. | |
| 67 | + Before reading this file, control has to be written to select | |
| 68 | + which profile to read. | |
| 69 | +Users: http://roccat.sourceforge.net | |
| 70 | + | |
| 71 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_media | |
| 72 | +Date: June 2011 | |
| 73 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 74 | +Description: When written, this file lets one set the function of the media | |
| 75 | + keys for a specific profile. Profile number is included in | |
| 76 | + written data. The data has to be 29 bytes long. | |
| 77 | + Before reading this file, control has to be written to select | |
| 78 | + which profile to read. | |
| 79 | +Users: http://roccat.sourceforge.net | |
| 80 | + | |
| 81 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/keys_thumbster | |
| 82 | +Date: June 2011 | |
| 83 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 84 | +Description: When written, this file lets one set the function of the | |
| 85 | + thumbster keys for a specific profile. Profile number is included | |
| 86 | + in written data. The data has to be 23 bytes long. | |
| 87 | + Before reading this file, control has to be written to select | |
| 88 | + which profile to read. | |
| 89 | +Users: http://roccat.sourceforge.net | |
| 90 | + | |
| 91 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/last_set | |
| 92 | +Date: June 2011 | |
| 93 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 94 | +Description: When written, this file lets one set the time in secs since | |
| 95 | + epoch in which the last configuration took place. | |
| 96 | + The data has to be 20 bytes long. | |
| 97 | +Users: http://roccat.sourceforge.net | |
| 98 | + | |
| 99 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/light | |
| 100 | +Date: June 2011 | |
| 101 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 102 | +Description: When written, this file lets one set the backlight intensity for | |
| 103 | + a specific profile. Profile number is included in written data. | |
| 104 | + The data has to be 10 bytes long. | |
| 105 | + Before reading this file, control has to be written to select | |
| 106 | + which profile to read. | |
| 107 | +Users: http://roccat.sourceforge.net | |
| 108 | + | |
| 109 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/macro | |
| 110 | +Date: June 2011 | |
| 111 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 112 | +Description: When written, this file lets one store macros with max 500 | |
| 113 | + keystrokes for a specific button for a specific profile. | |
| 114 | + Button and profile numbers are included in written data. | |
| 115 | + The data has to be 2083 bytes long. | |
| 116 | + Before reading this file, control has to be written to select | |
| 117 | + which profile and key to read. | |
| 118 | +Users: http://roccat.sourceforge.net | |
| 119 | + | |
| 120 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/control | |
| 121 | +Date: June 2011 | |
| 122 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 123 | +Description: When written, this file lets one select which data from which | |
| 124 | + profile will be read next. The data has to be 3 bytes long. | |
| 125 | + This file is writeonly. | |
| 126 | +Users: http://roccat.sourceforge.net | |
| 127 | + | |
| 128 | +What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/isku/roccatisku<minor>/talk | |
| 129 | +Date: June 2011 | |
| 130 | +Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | |
| 131 | +Description: When written, this file lets one trigger easyshift functionality | |
| 132 | + from the host. | |
| 133 | + The data has to be 16 bytes long. | |
| 134 | + This file is writeonly. | |
| 135 | +Users: http://roccat.sourceforge.net | |
| @@ -8,3 +8,15 @@ Contact: David Herrmann <dh.herrmann@googlemail.com> · 7 unmodified lines | ||
| 8 | 8 | Description: Make it possible to set/get current led state. Reading from it |
| 9 | 9 | returns 0 if led is off and 1 if it is on. Writing 0 to it |
| 10 | 10 | disables the led, writing 1 enables it. |
| 11 | + | |
| 12 | +What: /sys/bus/hid/drivers/wiimote/<dev>/extension | |
| 13 | +Date: August 2011 | |
| 14 | +KernelVersion: 3.2 | |
| 15 | +Contact: David Herrmann <dh.herrmann@googlemail.com> | |
| 16 | +Description: This file contains the currently connected and initialized | |
| 17 | + extensions. It can be one of: none, motionp, nunchuck, classic, | |
| 18 | + motionp+nunchuck, motionp+classic | |
| 19 | + motionp is the official Nintendo Motion+ extension, nunchuck is | |
| 20 | + the official Nintendo Nunchuck extension and classic is the | |
| 21 | + Nintendo Classic Controller extension. The motionp extension can | |
| 22 | + be combined with the other two. | |
| @@ -15,9 +15,9 @@ Contact: linux-input@vger.kernel.org · 14 unmodified lines | ||
| 15 | 15 | Description: |
| 16 | 16 | Attribute group for control of the status LEDs and the OLEDs. |
| 17 | 17 | This attribute group is only available for Intuos 4 M, L, |
| 18 | − and XL (with LEDs and OLEDs) and Cintiq 21UX2 (LEDs only). | |
| 19 | − Therefore its presence implicitly signifies the presence of | |
| 20 | − said LEDs and OLEDs on the tablet device. | |
| 18 | + and XL (with LEDs and OLEDs) and Cintiq 21UX2 and Cintiq 24HD | |
| 19 | + (LEDs only). Therefore its presence implicitly signifies the | |
| 20 | + presence of said LEDs and OLEDs on the tablet device. | |
| 21 | 21 | |
| 22 | 22 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status0_luminance |
| 23 | 23 | Date: August 2011 |
| @@ -41,16 +41,17 @@ Date: August 2011 · 17 unmodified lines | ||
| 41 | 41 | Contact: linux-input@vger.kernel.org |
| 42 | 42 | Description: |
| 43 | 43 | Writing to this file sets which one of the four (for Intuos 4) |
| 44 | − or of the right four (for Cintiq 21UX2) status LEDs is active (0..3). | |
| 45 | − The other three LEDs on the same side are always inactive. | |
| 44 | + or of the right four (for Cintiq 21UX2 and Cintiq 24HD) status | |
| 45 | + LEDs is active (0..3). The other three LEDs on the same side are | |
| 46 | + always inactive. | |
| 46 | 47 | |
| 47 | 48 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/status_led1_select |
| 48 | 49 | Date: September 2011 |
| 49 | 50 | Contact: linux-input@vger.kernel.org |
| 50 | 51 | Description: |
| 51 | − Writing to this file sets which one of the left four (for Cintiq 21UX2) | |
| 52 | − status LEDs is active (0..3). The other three LEDs on the left are always | |
| 53 | − inactive. | |
| 52 | + Writing to this file sets which one of the left four (for Cintiq 21UX2 | |
| 53 | + and Cintiq 24HD) status LEDs is active (0..3). The other three LEDs on | |
| 54 | + the left are always inactive. | |
| 54 | 55 | |
| 55 | 56 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<cfg>.<intf>/wacom_led/buttons_luminance |
| 56 | 57 | Date: August 2011 |
| @@ -346,6 +346,10 @@ Description: · 345 unmodified lines | ||
| 346 | 346 | number of objects per slab. If a slab cannot be allocated |
| 347 | 347 | because of fragmentation, SLUB will retry with the minimum order |
| 348 | 348 | possible depending on its characteristics. |
| 349 | + When debug_guardpage_minorder=N (N > 0) parameter is specified | |
| 350 | + (see Documentation/kernel-parameters.txt), the minimum possible | |
| 351 | + order is used and this sysfs entry can not be used to change | |
| 352 | + the order at run time. | |
| 349 | 353 | |
| 350 | 354 | What: /sys/kernel/slab/cache/order_fallback |
| 351 | 355 | Date: April 2008 |
| @@ -33,3 +33,19 @@ Description: Maximum time allowed for periodic transfers per microframe (μs) · 32 unmodified lines | ||
| 33 | 33 | Beware, non-standard modes are usually not thoroughly tested by |
| 34 | 34 | hardware designers, and the hardware can malfunction when this |
| 35 | 35 | setting differ from default 100. |
| 36 | + | |
| 37 | +What: /sys/module/*/{coresize,initsize} | |
| 38 | +Date: Jan 2012 | |
| 39 | +KernelVersion:»·3.3 | |
| 40 | +Contact: Kay Sievers <kay.sievers@vrfy.org> | |
| 41 | +Description: Module size in bytes. | |
| 42 | + | |
| 43 | +What: /sys/module/*/taint | |
| 44 | +Date: Jan 2012 | |
| 45 | +KernelVersion:»·3.3 | |
| 46 | +Contact: Kay Sievers <kay.sievers@vrfy.org> | |
| 47 | +Description: Module taint flags: | |
| 48 | + P - proprietary module | |
| 49 | + O - out-of-tree module | |
| 50 | + F - force-loaded module | |
| 51 | + C - staging driver module | |
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| @@ -163,14 +163,16 @@ get/set up to 64 properties. The actual meaning of each property is described on · 162 unmodified lines | ||
| 163 | 163 | <section id="DTV-FREQUENCY"> |
| 164 | 164 | <title><constant>DTV_FREQUENCY</constant></title> |
| 165 | 165 | |
| 166 | − <para>Central frequency of the channel, in HZ.</para> | |
| 166 | + <para>Central frequency of the channel.</para> | |
| 167 | 167 | |
| 168 | 168 | <para>Notes:</para> |
| 169 | − <para>1)For ISDB-T, the channels are usually transmitted with an offset of 143kHz. | |
| 169 | + <para>1)For satellital delivery systems, it is measured in kHz. | |
| 170 | + For the other ones, it is measured in Hz.</para> | |
| 171 | + <para>2)For ISDB-T, the channels are usually transmitted with an offset of 143kHz. | |
| 170 | 172 | E.g. a valid frequncy could be 474143 kHz. The stepping is bound to the bandwidth of |
| 171 | 173 | the channel which is 6MHz.</para> |
| 172 | 174 | |
| 173 | − <para>2)As in ISDB-Tsb the channel consists of only one or three segments the | |
| 175 | + <para>3)As in ISDB-Tsb the channel consists of only one or three segments the | |
| 174 | 176 | frequency step is 429kHz, 3*429 respectively. As for ISDB-T the |
| 175 | 177 | central frequency of the channel is expected.</para> |
| 176 | 178 | </section> |
| @@ -334,9 +336,10 @@ typedef enum fe_rolloff { · 157 unmodified lines | ||
| 334 | 336 | <title>fe_delivery_system type</title> |
| 335 | 337 | <para>Possible values: </para> |
| 336 | 338 | <programlisting> |
| 339 | + | |
| 337 | 340 | typedef enum fe_delivery_system { |
| 338 | 341 | SYS_UNDEFINED, |
| 339 | − SYS_DVBC_ANNEX_AC, | |
| 342 | + SYS_DVBC_ANNEX_A, | |
| 340 | 343 | SYS_DVBC_ANNEX_B, |
| 341 | 344 | SYS_DVBT, |
| 342 | 345 | SYS_DSS, |
| @@ -353,6 +356,7 @@ typedef enum fe_delivery_system { · 10 unmodified lines | ||
| 353 | 356 | SYS_DAB, |
| 354 | 357 | SYS_DVBT2, |
| 355 | 358 | SYS_TURBO, |
| 359 | + SYS_DVBC_ANNEX_C, | |
| 356 | 360 | } fe_delivery_system_t; |
| 357 | 361 | </programlisting> |
| 358 | 362 | </section> |
| @@ -647,6 +651,18 @@ typedef enum fe_hierarchy { · 288 unmodified lines | ||
| 647 | 651 | many data types via a single multiplex. The API will soon support this |
| 648 | 652 | at which point this section will be expanded.</para> |
| 649 | 653 | </section> |
| 654 | + <section id="DTV_ENUM_DELSYS"> | |
| 655 | + <title><constant>DTV_ENUM_DELSYS</constant></title> | |
| 656 | + <para>A Multi standard frontend needs to advertise the delivery systems provided. | |
| 657 | + Applications need to enumerate the provided delivery systems, before using | |
| 658 | + any other operation with the frontend. Prior to it's introduction, | |
| 659 | + FE_GET_INFO was used to determine a frontend type. A frontend which | |
| 660 | + provides more than a single delivery system, FE_GET_INFO doesn't help much. | |
| 661 | + Applications which intends to use a multistandard frontend must enumerate | |
| 662 | + the delivery systems associated with it, rather than trying to use | |
| 663 | + FE_GET_INFO. In the case of a legacy frontend, the result is just the same | |
| 664 | + as with FE_GET_INFO, but in a more structured format </para> | |
| 665 | + </section> | |
| 650 | 666 | </section> |
| 651 | 667 | <section id="frontend-property-terrestrial-systems"> |
| 652 | 668 | <title>Properties used on terrestrial delivery systems</title> |
| @@ -721,14 +737,10 @@ typedef enum fe_hierarchy { · 68 unmodified lines | ||
| 721 | 737 | <listitem><para><link linkend="DTV-TUNE"><constant>DTV_TUNE</constant></link></para></listitem> |
| 722 | 738 | <listitem><para><link linkend="DTV-CLEAR"><constant>DTV_CLEAR</constant></link></para></listitem> |
| 723 | 739 | <listitem><para><link linkend="DTV-FREQUENCY"><constant>DTV_FREQUENCY</constant></link></para></listitem> |
| 724 | − <listitem><para><link linkend="DTV-MODULATION"><constant>DTV_MODULATION</constant></link></para></listitem> | |
| 725 | 740 | <listitem><para><link linkend="DTV-BANDWIDTH-HZ"><constant>DTV_BANDWIDTH_HZ</constant></link></para></listitem> |
| 726 | 741 | <listitem><para><link linkend="DTV-INVERSION"><constant>DTV_INVERSION</constant></link></para></listitem> |
| 727 | − <listitem><para><link linkend="DTV-CODE-RATE-HP"><constant>DTV_CODE_RATE_HP</constant></link></para></listitem> | |
| 728 | − <listitem><para><link linkend="DTV-CODE-RATE-LP"><constant>DTV_CODE_RATE_LP</constant></link></para></listitem> | |
| 729 | 742 | <listitem><para><link linkend="DTV-GUARD-INTERVAL"><constant>DTV_GUARD_INTERVAL</constant></link></para></listitem> |
| 730 | 743 | <listitem><para><link linkend="DTV-TRANSMISSION-MODE"><constant>DTV_TRANSMISSION_MODE</constant></link></para></listitem> |
| 731 | − <listitem><para><link linkend="DTV-HIERARCHY"><constant>DTV_HIERARCHY</constant></link></para></listitem> | |
| 732 | 744 | <listitem><para><link linkend="DTV-ISDBT-LAYER-ENABLED"><constant>DTV_ISDBT_LAYER_ENABLED</constant></link></para></listitem> |
| 733 | 745 | <listitem><para><link linkend="DTV-ISDBT-PARTIAL-RECEPTION"><constant>DTV_ISDBT_PARTIAL_RECEPTION</constant></link></para></listitem> |
| 734 | 746 | <listitem><para><link linkend="DTV-ISDBT-SOUND-BROADCASTING"><constant>DTV_ISDBT_SOUND_BROADCASTING</constant></link></para></listitem> |
| @@ -767,7 +779,8 @@ typedef enum fe_hierarchy { · 32 unmodified lines | ||
| 767 | 779 | <title>Properties used on cable delivery systems</title> |
| 768 | 780 | <section id="dvbc-params"> |
| 769 | 781 | <title>DVB-C delivery system</title> |
| 770 | − <para>The DVB-C Annex-A/C is the widely used cable standard. Transmission uses QAM modulation.</para> | |
| 782 | + <para>The DVB-C Annex-A is the widely used cable standard. Transmission uses QAM modulation.</para> | |
| 783 | + <para>The DVB-C Annex-C is optimized for 6MHz, and is used in Japan. It supports a subset of the Annex A modulation types, and a roll-off of 0.13, instead of 0.15</para> | |
| 771 | 784 | <para>The following parameters are valid for DVB-C Annex A/C:</para> |
| 772 | 785 | <itemizedlist mark='opencircle'> |
| 773 | 786 | <listitem><para><link linkend="DTV-API-VERSION"><constant>DTV_API_VERSION</constant></link></para></listitem> |
| @@ -45,8 +45,8 @@ transmission. The fontend types are given by fe_type_t type, defined as:</para> · 44 unmodified lines | ||
| 45 | 45 | </row> |
| 46 | 46 | <row> |
| 47 | 47 | <entry id="FE_QAM"><constant>FE_QAM</constant></entry> |
| 48 | − <entry>For DVB-C annex A/C standard</entry> | |
| 49 | − <entry><constant>SYS_DVBC_ANNEX_AC</constant></entry> | |
| 48 | + <entry>For DVB-C annex A standard</entry> | |
| 49 | + <entry><constant>SYS_DVBC_ANNEX_A</constant></entry> | |
| 50 | 50 | </row> |
| 51 | 51 | <row> |
| 52 | 52 | <entry id="FE_OFDM"><constant>FE_OFDM</constant></entry> |
| @@ -63,6 +63,10 @@ transmission. The fontend types are given by fe_type_t type, defined as:</para> · 10 unmodified lines | ||
| 63 | 63 | <para>Newer formats like DVB-S2, ISDB-T, ISDB-S and DVB-T2 are not described at the above, as they're |
| 64 | 64 | supported via the new <link linkend="FE_GET_SET_PROPERTY">FE_GET_PROPERTY/FE_GET_SET_PROPERTY</link> ioctl's, using the <link linkend="DTV-DELIVERY-SYSTEM">DTV_DELIVERY_SYSTEM</link> parameter. |
| 65 | 65 | </para> |
| 66 | + | |
| 67 | +<para>The usage of this field is deprecated, as it doesn't report all supported standards, and | |
| 68 | +will provide an incomplete information for frontends that support multiple delivery systems. | |
| 69 | +Please use <link linkend="DTV_ENUM_DELSYS">DTV_ENUM_DELSYS</link> instead.</para> | |
| 66 | 70 | </section> |
| 67 | 71 | |
| 68 | 72 | <section id="fe-caps-t"> |
| @@ -0,0 +1,206 @@ | ||
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| @@ -178,11 +178,3 @@ in the frequency range from 87,5 to 108,0 MHz</title> · 177 unmodified lines | ||
| 178 | 178 | </biblioentry> |
| 179 | 179 | |
| 180 | 180 | </bibliography> |
| 181 | − | |
| 182 | − <!-- | |
| 183 | −Local Variables: | |
| 184 | −mode: sgml | |
| 185 | −sgml-parent-document: "v4l2.sgml" | |
| 186 | −indent-tabs-mode: nil | |
| 187 | −End: | |
| 188 | − --> | |
| @@ -1168,6 +1168,8 @@ dheight = format.fmt.pix.height; · 1167 unmodified lines | ||
| 1168 | 1168 | </section> |
| 1169 | 1169 | </section> |
| 1170 | 1170 | |
| 1171 | + &sub-selection-api; | |
| 1172 | + | |
| 1171 | 1173 | <section id="streaming-par"> |
| 1172 | 1174 | <title>Streaming Parameters</title> |
| 1173 | 1175 | |
| @@ -1195,11 +1197,3 @@ separate parameters for input and output devices.</para> · 21 unmodified lines | ||
| 1195 | 1197 | <para>These ioctls are optional, drivers need not implement |
| 1196 | 1198 | them. If so, they return the &EINVAL;.</para> |
| 1197 | 1199 | </section> |
| 1198 | − | |
| 1199 | − <!-- | |
| 1200 | −Local Variables: | |
| 1201 | −mode: sgml | |
| 1202 | −sgml-parent-document: "v4l2.sgml" | |
| 1203 | −indent-tabs-mode: nil | |
| 1204 | −End: | |
| 1205 | − --> | |
| @@ -1082,7 +1082,7 @@ until the time in the timestamp field has arrived. I would like to · 1081 unmodified lines | ||
| 1082 | 1082 | follow SGI's lead, and adopt a multimedia timestamping system like |
| 1083 | 1083 | their UST (Unadjusted System Time). See |
| 1084 | 1084 | http://web.archive.org/web/*/http://reality.sgi.com |
| 1085 | −/cpirazzi_engr/lg/time/intro.html. | |
| 1085 | +/cpirazzi_engr/lg/time/intro.html. | |
| 1086 | 1086 | UST uses timestamps that are 64-bit signed integers |
| 1087 | 1087 | (not struct timeval's) and given in nanosecond units. The UST clock |
| 1088 | 1088 | starts at zero when the system is booted and runs continuously and |
| @@ -2376,6 +2376,23 @@ that used it. It was originally scheduled for removal in 2.6.35. · 1287 unmodified lines | ||
| 2376 | 2376 | <listitem> |
| 2377 | 2377 | <para>V4L2_CTRL_FLAG_VOLATILE was added to signal volatile controls to userspace.</para> |
| 2378 | 2378 | </listitem> |
| 2379 | + <listitem> | |
| 2380 | + <para>Add selection API for extended control over cropping and | |
| 2381 | +composing. Does not affect the compatibility of current drivers and | |
| 2382 | +applications. See <link linkend="selection-api"> selection API </link> for | |
| 2383 | +details.</para> | |
| 2384 | + </listitem> | |
| 2385 | + </orderedlist> | |
| 2386 | + </section> | |
| 2387 | + | |
| 2388 | + <section> | |
| 2389 | + <title>V4L2 in Linux 3.3</title> | |
| 2390 | + <orderedlist> | |
| 2391 | + <listitem> | |
| 2392 | + <para>Added <constant>V4L2_CID_ALPHA_COMPONENT</constant> control | |
| 2393 | + to the <link linkend="control">User controls class</link>. | |
| 2394 | + </para> | |
| 2395 | + </listitem> | |
| 2379 | 2396 | </orderedlist> |
| 2380 | 2397 | </section> |
| 2381 | 2398 | |
| @@ -2489,6 +2506,9 @@ ioctls.</para> · 107 unmodified lines | ||
| 2489 | 2506 | <listitem> |
| 2490 | 2507 | <para>&VIDIOC-CREATE-BUFS; and &VIDIOC-PREPARE-BUF; ioctls.</para> |
| 2491 | 2508 | </listitem> |
| 2509 | + <listitem> | |
| 2510 | + <para>Selection API. <xref linkend="selection-api" /></para> | |
| 2511 | + </listitem> | |
| 2492 | 2512 | </itemizedlist> |
| 2493 | 2513 | </section> |
| 2494 | 2514 | |
| @@ -2507,11 +2527,3 @@ interfaces and should not be implemented in new drivers.</para> · 12 unmodified lines | ||
| 2507 | 2527 | </itemizedlist> |
| 2508 | 2528 | </section> |
| 2509 | 2529 | </section> |
| 2510 | − | |
| 2511 | − <!-- | |
| 2512 | −Local Variables: | |
| 2513 | −mode: sgml | |
| 2514 | −sgml-parent-document: "v4l2.sgml" | |
| 2515 | −indent-tabs-mode: nil | |
| 2516 | −End: | |
| 2517 | − --> | |
| @@ -323,12 +323,6 @@ minimum value disables backlight compensation.</entry> · 322 unmodified lines | ||
| 323 | 323 | <entry>Switch on or off the illuminator 1 or 2 of the device |
| 324 | 324 | (usually a microscope).</entry> |
| 325 | 325 | </row> |
| 326 | − <row> | |
| 327 | − <entry><constant>V4L2_CID_LASTP1</constant></entry> | |
| 328 | − <entry></entry> | |
| 329 | − <entry>End of the predefined control IDs (currently | |
| 330 | −<constant>V4L2_CID_ILLUMINATORS_2</constant> + 1).</entry> | |
| 331 | − </row> | |
| 332 | 326 | <row> |
| 333 | 327 | <entry><constant>V4L2_CID_MIN_BUFFERS_FOR_CAPTURE</constant></entry> |
| 334 | 328 | <entry>integer</entry> |
| @@ -345,6 +339,25 @@ and used as a hint to determine the number of OUTPUT buffers to pass to REQBUFS. · 10 unmodified lines | ||
| 345 | 339 | The value is the minimum number of OUTPUT buffers that is necessary for hardware |
| 346 | 340 | to work.</entry> |
| 347 | 341 | </row> |
| 342 | + <row id="v4l2-alpha-component"> | |
| 343 | + <entry><constant>V4L2_CID_ALPHA_COMPONENT</constant></entry> | |
| 344 | + <entry>integer</entry> | |
| 345 | + <entry> Sets the alpha color component on the capture device or on | |
| 346 | + the capture buffer queue of a mem-to-mem device. When a mem-to-mem | |
| 347 | + device produces frame format that includes an alpha component | |
| 348 | + (e.g. <link linkend="rgb-formats">packed RGB image formats</link>) | |
| 349 | + and the alpha value is not defined by the mem-to-mem input data | |
| 350 | + this control lets you select the alpha component value of all | |
| 351 | + pixels. It is applicable to any pixel format that contains an alpha | |
| 352 | + component. | |
| 353 | + </entry> | |
| 354 | + </row> | |
| 355 | + <row> | |
| 356 | + <entry><constant>V4L2_CID_LASTP1</constant></entry> | |
| 357 | + <entry></entry> | |
| 358 | + <entry>End of the predefined control IDs (currently | |
| 359 | + <constant>V4L2_CID_ALPHA_COMPONENT</constant> + 1).</entry> | |
| 360 | + </row> | |
| 348 | 361 | <row> |
| 349 | 362 | <entry><constant>V4L2_CID_PRIVATE_BASE</constant></entry> |
| 350 | 363 | <entry></entry> |
| @@ -3329,6 +3342,16 @@ interface and may change in the future.</para> · 2978 unmodified lines | ||
| 3329 | 3342 | <entry>The short circuit protection of the flash |
| 3330 | 3343 | controller has been triggered.</entry> |
| 3331 | 3344 | </row> |
| 3345 | + <row> | |
| 3346 | + <entry><constant>V4L2_FLASH_FAULT_OVER_CURRENT</constant></entry> | |
| 3347 | + <entry>Current in the LED power supply has exceeded the limit | |
| 3348 | + specific to the flash controller.</entry> | |
| 3349 | + </row> | |
| 3350 | + <row> | |
| 3351 | + <entry><constant>V4L2_FLASH_FAULT_INDICATOR</constant></entry> | |
| 3352 | + <entry>The flash controller has detected a short or open | |
| 3353 | + circuit condition on the indicator LED.</entry> | |
| 3354 | + </row> | |
| 3332 | 3355 | </tbody> |
| 3333 | 3356 | </entrytbl> |
| 3334 | 3357 | </row> |
| @@ -3357,11 +3380,3 @@ interface and may change in the future.</para> · 22 unmodified lines | ||
| 3357 | 3380 | |
| 3358 | 3381 | </section> |
| 3359 | 3382 | </section> |
| 3360 | − | |
| 3361 | − <!-- | |
| 3362 | −Local Variables: | |
| 3363 | −mode: sgml | |
| 3364 | −sgml-parent-document: "common.sgml" | |
| 3365 | −indent-tabs-mode: nil | |
| 3366 | −End: | |
| 3367 | − --> | |
| @@ -108,11 +108,3 @@ linkend="mmap">memory mapping</link> or <link · 107 unmodified lines | ||
| 108 | 108 | linkend="userp">user pointer</link>) I/O. See <xref |
| 109 | 109 | linkend="io" /> for details.</para> |
| 110 | 110 | </section> |
| 111 | − | |
| 112 | − <!-- | |
| 113 | −Local Variables: | |
| 114 | −mode: sgml | |
| 115 | −sgml-parent-document: "v4l2.sgml" | |
| 116 | −indent-tabs-mode: nil | |
| 117 | −End: | |
| 118 | − --> | |
| @@ -16,11 +16,3 @@ Applications send data to be converted to the driver through a · 15 unmodified lines | ||
| 16 | 16 | I/O.</para> |
| 17 | 17 | |
| 18 | 18 | <para>[to do]</para> |
| 19 | − | |
| 20 | − <!-- | |
| 21 | −Local Variables: | |
| 22 | −mode: sgml | |
| 23 | −sgml-parent-document: "v4l2.sgml" | |
| 24 | −indent-tabs-mode: nil | |
| 25 | −End: | |
| 26 | − --> | |
| @@ -15,11 +15,3 @@ receive the result data either with &func-read; and &func-write; · 14 unmodified lines | ||
| 15 | 15 | functions, or through the streaming I/O mechanism.</para> |
| 16 | 16 | |
| 17 | 17 | <para>[to do]</para> |
| 18 | − | |
| 19 | − <!-- | |
| 20 | −Local Variables: | |
| 21 | −mode: sgml | |
| 22 | −sgml-parent-document: "v4l2.sgml" | |
| 23 | −indent-tabs-mode: nil | |
| 24 | −End: | |
| 25 | − --> | |
| @@ -41,11 +41,3 @@ intermediate step leading up to that information. See the documentation for the · 40 unmodified lines | ||
| 41 | 41 | event you want to subscribe to whether this is applicable for that event or not.</para> |
| 42 | 42 | </listitem> |
| 43 | 43 | </orderedlist></para> |
| 44 | − | |
| 45 | − <!-- | |
| 46 | −Local Variables: | |
| 47 | −mode: sgml | |
| 48 | −sgml-parent-document: "v4l2.sgml" | |
| 49 | −indent-tabs-mode: nil | |
| 50 | −End: | |
| 51 | − --> | |
| @@ -154,11 +154,3 @@ data flow. For more information see <xref linkend="crop" />.</para> · 153 unmodified lines | ||
| 154 | 154 | however the framebuffer interface of the driver may support the |
| 155 | 155 | <constant>FBIOBLANK</constant> ioctl.</para> |
| 156 | 156 | </section> |
| 157 | − | |
| 158 | − <!-- | |
| 159 | −Local Variables: | |
| 160 | −mode: sgml | |
| 161 | −sgml-parent-document: "v4l2.sgml" | |
| 162 | −indent-tabs-mode: nil | |
| 163 | −End: | |
| 164 | − --> | |
| @@ -104,11 +104,3 @@ linkend="mmap">memory mapping</link> or <link · 103 unmodified lines | ||
| 104 | 104 | linkend="userp">user pointer</link>) I/O. See <xref |
| 105 | 105 | linkend="io" /> for details.</para> |
| 106 | 106 | </section> |
| 107 | − | |
| 108 | − <!-- | |
| 109 | −Local Variables: | |
| 110 | −mode: sgml | |
| 111 | −sgml-parent-document: "v4l2.sgml" | |
| 112 | −indent-tabs-mode: nil | |
| 113 | −End: | |
| 114 | − --> | |
| @@ -369,11 +369,3 @@ reasons. <!-- video4linux-list@redhat.com on 22 Oct 2002 subject · 368 unmodified lines | ||
| 369 | 369 | <para>To start or stop the frame buffer overlay applications call |
| 370 | 370 | the &VIDIOC-OVERLAY; ioctl.</para> |
| 371 | 371 | </section> |
| 372 | − | |
| 373 | − <!-- | |
| 374 | −Local Variables: | |
| 375 | −mode: sgml | |
| 376 | −sgml-parent-document: "v4l2.sgml" | |
| 377 | −indent-tabs-mode: nil | |
| 378 | −End: | |
| 379 | − --> | |
| @@ -47,11 +47,3 @@ depending on the selected frequency. The &VIDIOC-G-TUNER; or · 46 unmodified lines | ||
| 47 | 47 | &VIDIOC-G-MODULATOR; ioctl |
| 48 | 48 | reports the supported frequency range.</para> |
| 49 | 49 | </section> |
| 50 | − | |
| 51 | −<!-- | |
| 52 | −Local Variables: | |
| 53 | −mode: sgml | |
| 54 | −sgml-parent-document: "v4l2.sgml" | |
| 55 | −indent-tabs-mode: nil | |
| 56 | −End: | |
| 57 | − --> | |
| @@ -337,11 +337,3 @@ an &EBUSY; if the required hardware resources are temporarily · 336 unmodified lines | ||
| 337 | 337 | unavailable, for example the device is already in use by another |
| 338 | 338 | process.</para> |
| 339 | 339 | </section> |
| 340 | − | |
| 341 | − <!-- | |
| 342 | −Local Variables: | |
| 343 | −mode: sgml | |
| 344 | −sgml-parent-document: "v4l2.sgml" | |
| 345 | −indent-tabs-mode: nil | |
| 346 | −End: | |
| 347 | − --> | |
| @@ -29,10 +29,10 @@ returned by the &VIDIOC-QUERYCAP; ioctl. Any tuner that supports RDS · 28 unmodified lines | ||
| 29 | 29 | will set the <constant>V4L2_TUNER_CAP_RDS</constant> flag in |
| 30 | 30 | the <structfield>capability</structfield> field of &v4l2-tuner;. If |
| 31 | 31 | the driver only passes RDS blocks without interpreting the data |
| 32 | −the <constant>V4L2_TUNER_SUB_RDS_BLOCK_IO</constant> flag has to be | |
| 32 | +the <constant>V4L2_TUNER_CAP_RDS_BLOCK_IO</constant> flag has to be | |
| 33 | 33 | set, see <link linkend="reading-rds-data">Reading RDS data</link>. |
| 34 | 34 | For future use the |
| 35 | −flag <constant>V4L2_TUNER_SUB_RDS_CONTROLS</constant> has also been | |
| 35 | +flag <constant>V4L2_TUNER_CAP_RDS_CONTROLS</constant> has also been | |
| 36 | 36 | defined. However, a driver for a radio tuner with this capability does |
| 37 | 37 | not yet exist, so if you are planning to write such a driver you |
| 38 | 38 | should discuss this on the linux-media mailing list: &v4l-ml;.</para> |
| @@ -52,9 +52,9 @@ field of &v4l2-modulator;. · 13 unmodified lines | ||
| 52 | 52 | In order to enable the RDS transmission one must set the <constant>V4L2_TUNER_SUB_RDS</constant> |
| 53 | 53 | bit in the <structfield>txsubchans</structfield> field of &v4l2-modulator;. |
| 54 | 54 | If the driver only passes RDS blocks without interpreting the data |
| 55 | −the <constant>V4L2_TUNER_SUB_RDS_BLOCK_IO</constant> flag has to be set. If the | |
| 55 | +the <constant>V4L2_TUNER_CAP_RDS_BLOCK_IO</constant> flag has to be set. If the | |
| 56 | 56 | tuner is capable of handling RDS entities like program identification codes and radio |
| 57 | −text, the flag <constant>V4L2_TUNER_SUB_RDS_CONTROLS</constant> should be set, | |
| 57 | +text, the flag <constant>V4L2_TUNER_CAP_RDS_CONTROLS</constant> should be set, | |
| 58 | 58 | see <link linkend="writing-rds-data">Writing RDS data</link> and |
| 59 | 59 | <link linkend="fm-tx-controls">FM Transmitter Control Reference</link>.</para> |
| 60 | 60 | </section> |
| @@ -194,11 +194,3 @@ as follows:</para> · 133 unmodified lines | ||
| 194 | 194 | </tgroup> |
| 195 | 195 | </table> |
| 196 | 196 | </section> |
| 197 | − | |
| 198 | −<!-- | |
| 199 | −Local Variables: | |
| 200 | −mode: sgml | |
| 201 | −sgml-parent-document: "v4l2.sgml" | |
| 202 | −indent-tabs-mode: nil | |
| 203 | −End: | |
| 204 | − --> | |
| @@ -697,12 +697,3 @@ Sliced VBI services</link> for a description of the line payload.</entry> · 696 unmodified lines | ||
| 697 | 697 | |
| 698 | 698 | </section> |
| 699 | 699 | </section> |
| 700 | − | |
| 701 | − | |
| 702 | −<!-- | |
| 703 | −Local Variables: | |
| 704 | −mode: sgml | |
| 705 | −sgml-parent-document: "v4l2.sgml" | |
| 706 | −indent-tabs-mode: nil | |
| 707 | −End: | |
| 708 | − --> | |
| @@ -27,11 +27,3 @@ kernel 2.6.37.</para> · 26 unmodified lines | ||
| 27 | 27 | |
| 28 | 28 | <para>Modern devices all use the <link linkend="raw-vbi">raw</link> or |
| 29 | 29 | <link linkend="sliced">sliced</link> VBI API.</para> |
| 30 | − | |
| 31 | − <!-- | |
| 32 | −Local Variables: | |
| 33 | −mode: sgml | |
| 34 | −sgml-parent-document: "v4l2.sgml" | |
| 35 | −indent-tabs-mode: nil | |
| 36 | −End: | |
| 37 | − --> | |
| @@ -198,11 +198,3 @@ devices with the videodev module.</para> · 197 unmodified lines | ||
| 198 | 198 | <para>to do</para> |
| 199 | 199 | </section> |
| 200 | 200 | --> |
| 201 | − | |
| 202 | −<!-- | |
| 203 | −Local Variables: | |
| 204 | −mode: sgml | |
| 205 | −sgml-parent-document: "v4l2.sgml" | |
| 206 | −indent-tabs-mode: nil | |
| 207 | −End: | |
| 208 | −--> | |
| @@ -60,11 +60,3 @@ descriptor.</para> · 59 unmodified lines | ||
| 60 | 60 | </variablelist> |
| 61 | 61 | </refsect1> |
| 62 | 62 | </refentry> |
| 63 | − | |
| 64 | −<!-- | |
| 65 | −Local Variables: | |
| 66 | −mode: sgml | |
| 67 | −sgml-parent-document: "v4l2.sgml" | |
| 68 | −indent-tabs-mode: nil | |
| 69 | −End: | |
| 70 | −--> | |
| @@ -69,11 +69,3 @@ their respective function and parameters are specified in <xref · 68 unmodified lines | ||
| 69 | 69 | the parameter remains unmodified.</para> |
| 70 | 70 | </refsect1> |
| 71 | 71 | </refentry> |
| 72 | − | |
| 73 | −<!-- | |
| 74 | −Local Variables: | |
| 75 | −mode: sgml | |
| 76 | −sgml-parent-document: "v4l2.sgml" | |
| 77 | −indent-tabs-mode: nil | |
| 78 | −End: | |
| 79 | −--> | |
| @@ -181,11 +181,3 @@ complete the request.</para> · 180 unmodified lines | ||
| 181 | 181 | </variablelist> |
| 182 | 182 | </refsect1> |
| 183 | 183 | </refentry> |
| 184 | − | |
| 185 | −<!-- | |
| 186 | −Local Variables: | |
| 187 | −mode: sgml | |
| 188 | −sgml-parent-document: "v4l2.sgml" | |
| 189 | −indent-tabs-mode: nil | |
| 190 | −End: | |
| 191 | −--> | |
| @@ -74,11 +74,3 @@ mapped yet.</para> · 73 unmodified lines | ||
| 74 | 74 | </variablelist> |
| 75 | 75 | </refsect1> |
| 76 | 76 | </refentry> |
| 77 | − | |
| 78 | −<!-- | |
| 79 | −Local Variables: | |
| 80 | −mode: sgml | |
| 81 | −sgml-parent-document: "v4l2.sgml" | |
| 82 | −indent-tabs-mode: nil | |
| 83 | −End: | |
| 84 | −--> | |
| @@ -111,11 +111,3 @@ system has been reached.</para> · 110 unmodified lines | ||
| 111 | 111 | </variablelist> |
| 112 | 112 | </refsect1> |
| 113 | 113 | </refentry> |
| 114 | − | |
| 115 | −<!-- | |
| 116 | −Local Variables: | |
| 117 | −mode: sgml | |
| 118 | −sgml-parent-document: "v4l2.sgml" | |
| 119 | −indent-tabs-mode: nil | |
| 120 | −End: | |
| 121 | −--> | |
| @@ -117,11 +117,3 @@ than <constant>OPEN_MAX</constant>.</para> · 116 unmodified lines | ||
| 117 | 117 | </variablelist> |
| 118 | 118 | </refsect1> |
| 119 | 119 | </refentry> |
| 120 | − | |
| 121 | −<!-- | |
| 122 | −Local Variables: | |
| 123 | −mode: sgml | |
| 124 | −sgml-parent-document: "v4l2.sgml" | |
| 125 | −indent-tabs-mode: nil | |
| 126 | −End: | |
| 127 | −--> | |
| @@ -179,11 +179,3 @@ type of device.</para> · 178 unmodified lines | ||
| 179 | 179 | </variablelist> |
| 180 | 180 | </refsect1> |
| 181 | 181 | </refentry> |
| 182 | − | |
| 183 | −<!-- | |
| 184 | −Local Variables: | |
| 185 | −mode: sgml | |
| 186 | −sgml-parent-document: "v4l2.sgml" | |
| 187 | −indent-tabs-mode: nil | |
| 188 | −End: | |
| 189 | −--> | |
| @@ -128,11 +128,3 @@ zero or greater than <constant>FD_SETSIZE</constant>.</para> · 127 unmodified lines | ||
| 128 | 128 | </variablelist> |
| 129 | 129 | </refsect1> |
| 130 | 130 | </refentry> |
| 131 | − | |
| 132 | −<!-- | |
| 133 | −Local Variables: | |
| 134 | −mode: sgml | |
| 135 | −sgml-parent-document: "v4l2.sgml" | |
| 136 | −indent-tabs-mode: nil | |
| 137 | −End: | |
| 138 | −--> | |
| @@ -126,11 +126,3 @@ type of device.</para> · 125 unmodified lines | ||
| 126 | 126 | </variablelist> |
| 127 | 127 | </refsect1> |
| 128 | 128 | </refentry> |
| 129 | − | |
| 130 | −<!-- | |
| 131 | −Local Variables: | |
| 132 | −mode: sgml | |
| 133 | −sgml-parent-document: "v4l2.sgml" | |
| 134 | −indent-tabs-mode: nil | |
| 135 | −End: | |
| 136 | −--> | |
| @@ -1282,11 +1282,3 @@ line, top field first. The bottom field is transmitted first.</entry> · 1281 unmodified lines | ||
| 1282 | 1282 | </mediaobject> |
| 1283 | 1283 | </figure> |
| 1284 | 1284 | </section> |
| 1285 | − | |
| 1286 | − <!-- | |
| 1287 | −Local Variables: | |
| 1288 | −mode: sgml | |
| 1289 | −sgml-parent-document: "v4l2.sgml" | |
| 1290 | −indent-tabs-mode: nil | |
| 1291 | −End: | |
| 1292 | − --> | |
| @@ -158,10 +158,3 @@ still don't use libv4l.</para> · 157 unmodified lines | ||
| 158 | 158 | </section> |
| 159 | 159 | |
| 160 | 160 | </section> |
| 161 | −<!-- | |
| 162 | −Local Variables: | |
| 163 | −mode: sgml | |
| 164 | −sgml-parent-document: "v4l2.sgml" | |
| 165 | −indent-tabs-mode: nil | |
| 166 | −End: | |
| 167 | −--> | |
| @@ -60,11 +60,3 @@ pixel image</title> · 59 unmodified lines | ||
| 60 | 60 | </example> |
| 61 | 61 | </refsect1> |
| 62 | 62 | </refentry> |
| 63 | − | |
| 64 | − <!-- | |
| 65 | −Local Variables: | |
| 66 | −mode: sgml | |
| 67 | −sgml-parent-document: "pixfmt.sgml" | |
| 68 | −indent-tabs-mode: nil | |
| 69 | −End: | |
| 70 | − --> | |
| @@ -137,11 +137,3 @@ pixel image</title> · 136 unmodified lines | ||
| 137 | 137 | </example> |
| 138 | 138 | </refsect1> |
| 139 | 139 | </refentry> |
| 140 | − | |
| 141 | − <!-- | |
| 142 | −Local Variables: | |
| 143 | −mode: sgml | |
| 144 | −sgml-parent-document: "pixfmt.sgml" | |
| 145 | −indent-tabs-mode: nil | |
| 146 | −End: | |
| 147 | − --> | |
| @@ -141,11 +141,3 @@ pixel image</title> · 140 unmodified lines | ||
| 141 | 141 | </example> |
| 142 | 142 | </refsect1> |
| 143 | 143 | </refentry> |
| 144 | − | |
| 145 | − <!-- | |
| 146 | −Local Variables: | |
| 147 | −mode: sgml | |
| 148 | −sgml-parent-document: "pixfmt.sgml" | |
| 149 | −indent-tabs-mode: nil | |
| 150 | −End: | |
| 151 | − --> | |
| @@ -144,11 +144,3 @@ CbCr plane has as many pad bytes after its rows.</para> · 143 unmodified lines | ||
| 144 | 144 | </example> |
| 145 | 145 | </refsect1> |
| 146 | 146 | </refentry> |
| 147 | − | |
| 148 | − <!-- | |
| 149 | −Local Variables: | |
| 150 | −mode: sgml | |
| 151 | −sgml-parent-document: "pixfmt.sgml" | |
| 152 | −indent-tabs-mode: nil | |
| 153 | −End: | |
| 154 | − --> | |
| @@ -64,11 +64,3 @@ layout of macroblocks</title> · 63 unmodified lines | ||
| 64 | 64 | </example> |
| 65 | 65 | </refsect1> |
| 66 | 66 | </refentry> |
| 67 | − | |
| 68 | − <!-- | |
| 69 | −Local Variables: | |
| 70 | −mode: sgml | |
| 71 | −sgml-parent-document: "pixfmt.sgml" | |
| 72 | −indent-tabs-mode: nil | |
| 73 | −End: | |
| 74 | − --> | |
| @@ -164,11 +164,3 @@ pixel image</title> · 163 unmodified lines | ||
| 164 | 164 | </example> |
| 165 | 165 | </refsect1> |
| 166 | 166 | </refentry> |
| 167 | − | |
| 168 | − <!-- | |
| 169 | −Local Variables: | |
| 170 | −mode: sgml | |
| 171 | −sgml-parent-document: "pixfmt.sgml" | |
| 172 | −indent-tabs-mode: nil | |
| 173 | −End: | |
| 174 | − --> | |
| @@ -0,0 +1,121 @@ | ||
| 1 | + <refentry> | |
| 2 | + <refmeta> | |
| 3 | + <refentrytitle>V4L2_PIX_FMT_NV24 ('NV24'), V4L2_PIX_FMT_NV42 ('NV42')</refentrytitle> | |
| 4 | + &manvol; | |
| 5 | + </refmeta> | |
| 6 | + <refnamediv> | |
| 7 | + <refname id="V4L2-PIX-FMT-NV24"><constant>V4L2_PIX_FMT_NV24</constant></refname> | |
| 8 | + <refname id="V4L2-PIX-FMT-NV42"><constant>V4L2_PIX_FMT_NV42</constant></refname> | |
| 9 | + <refpurpose>Formats with full horizontal and vertical | |
| 10 | +chroma resolutions, also known as YUV 4:4:4. One luminance and one | |
| 11 | +chrominance plane with alternating chroma samples as opposed to | |
| 12 | +<constant>V4L2_PIX_FMT_YVU420</constant></refpurpose> | |
| 13 | + </refnamediv> | |
| 14 | + <refsect1> | |
| 15 | + <title>Description</title> | |
| 16 | + | |
| 17 | + <para>These are two-plane versions of the YUV 4:4:4 format. The three | |
| 18 | + components are separated into two sub-images or planes. The Y plane is | |
| 19 | + first, with each Y sample stored in one byte per pixel. For | |
| 20 | + <constant>V4L2_PIX_FMT_NV24</constant>, a combined CbCr plane | |
| 21 | + immediately follows the Y plane in memory. The CbCr plane has the same | |
| 22 | + width and height, in pixels, as the Y plane (and the image). Each line | |
| 23 | + contains one CbCr pair per pixel, with each Cb and Cr sample stored in | |
| 24 | + one byte. <constant>V4L2_PIX_FMT_NV42</constant> is the same except that | |
| 25 | + the Cb and Cr samples are swapped, the CrCb plane starts with a Cr | |
| 26 | + sample.</para> | |
| 27 | + | |
| 28 | + <para>If the Y plane has pad bytes after each row, then the CbCr plane | |
| 29 | + has twice as many pad bytes after its rows.</para> | |
| 30 | + | |
| 31 | + <example> | |
| 32 | + <title><constant>V4L2_PIX_FMT_NV24</constant> 4 × 4 | |
| 33 | +pixel image</title> | |
| 34 | + | |
| 35 | + <formalpara> | |
| 36 | + <title>Byte Order.</title> | |
| 37 | + <para>Each cell is one byte. | |
| 38 | + <informaltable frame="none"> | |
| 39 | + <tgroup cols="9" align="center"> | |
| 40 | + <colspec align="left" colwidth="2*" /> | |
| 41 | + <tbody valign="top"> | |
| 42 | + <row> | |
| 43 | + <entry>start + 0:</entry> | |
| 44 | + <entry>Y'<subscript>00</subscript></entry> | |
| 45 | + <entry>Y'<subscript>01</subscript></entry> | |
| 46 | + <entry>Y'<subscript>02</subscript></entry> | |
| 47 | + <entry>Y'<subscript>03</subscript></entry> | |
| 48 | + </row> | |
| 49 | + <row> | |
| 50 | + <entry>start + 4:</entry> | |
| 51 | + <entry>Y'<subscript>10</subscript></entry> | |
| 52 | + <entry>Y'<subscript>11</subscript></entry> | |
| 53 | + <entry>Y'<subscript>12</subscript></entry> | |
| 54 | + <entry>Y'<subscript>13</subscript></entry> | |
| 55 | + </row> | |
| 56 | + <row> | |
| 57 | + <entry>start + 8:</entry> | |
| 58 | + <entry>Y'<subscript>20</subscript></entry> | |
| 59 | + <entry>Y'<subscript>21</subscript></entry> | |
| 60 | + <entry>Y'<subscript>22</subscript></entry> | |
| 61 | + <entry>Y'<subscript>23</subscript></entry> | |
| 62 | + </row> | |
| 63 | + <row> | |
| 64 | + <entry>start + 12:</entry> | |
| 65 | + <entry>Y'<subscript>30</subscript></entry> | |
| 66 | + <entry>Y'<subscript>31</subscript></entry> | |
| 67 | + <entry>Y'<subscript>32</subscript></entry> | |
| 68 | + <entry>Y'<subscript>33</subscript></entry> | |
| 69 | + </row> | |
| 70 | + <row> | |
| 71 | + <entry>start + 16:</entry> | |
| 72 | + <entry>Cb<subscript>00</subscript></entry> | |
| 73 | + <entry>Cr<subscript>00</subscript></entry> | |
| 74 | + <entry>Cb<subscript>01</subscript></entry> | |
| 75 | + <entry>Cr<subscript>01</subscript></entry> | |
| 76 | + <entry>Cb<subscript>02</subscript></entry> | |
| 77 | + <entry>Cr<subscript>02</subscript></entry> | |
| 78 | + <entry>Cb<subscript>03</subscript></entry> | |
| 79 | + <entry>Cr<subscript>03</subscript></entry> | |
| 80 | + </row> | |
| 81 | + <row> | |
| 82 | + <entry>start + 24:</entry> | |
| 83 | + <entry>Cb<subscript>10</subscript></entry> | |
| 84 | + <entry>Cr<subscript>10</subscript></entry> | |
| 85 | + <entry>Cb<subscript>11</subscript></entry> | |
| 86 | + <entry>Cr<subscript>11</subscript></entry> | |
| 87 | + <entry>Cb<subscript>12</subscript></entry> | |
| 88 | + <entry>Cr<subscript>12</subscript></entry> | |
| 89 | + <entry>Cb<subscript>13</subscript></entry> | |
| 90 | + <entry>Cr<subscript>13</subscript></entry> | |
| 91 | + </row> | |
| 92 | + <row> | |
| 93 | + <entry>start + 32:</entry> | |
| 94 | + <entry>Cb<subscript>20</subscript></entry> | |
| 95 | + <entry>Cr<subscript>20</subscript></entry> | |
| 96 | + <entry>Cb<subscript>21</subscript></entry> | |
| 97 | + <entry>Cr<subscript>21</subscript></entry> | |
| 98 | + <entry>Cb<subscript>22</subscript></entry> | |
| 99 | + <entry>Cr<subscript>22</subscript></entry> | |
| 100 | + <entry>Cb<subscript>23</subscript></entry> | |
| 101 | + <entry>Cr<subscript>23</subscript></entry> | |
| 102 | + </row> | |
| 103 | + <row> | |
| 104 | + <entry>start + 40:</entry> | |
| 105 | + <entry>Cb<subscript>30</subscript></entry> | |
| 106 | + <entry>Cr<subscript>30</subscript></entry> | |
| 107 | + <entry>Cb<subscript>31</subscript></entry> | |
| 108 | + <entry>Cr<subscript>31</subscript></entry> | |
| 109 | + <entry>Cb<subscript>32</subscript></entry> | |
| 110 | + <entry>Cr<subscript>32</subscript></entry> | |
| 111 | + <entry>Cb<subscript>33</subscript></entry> | |
| 112 | + <entry>Cr<subscript>33</subscript></entry> | |
| 113 | + </row> | |
| 114 | + </tbody> | |
| 115 | + </tgroup> | |
| 116 | + </informaltable> | |
| 117 | + </para> | |
| 118 | + </formalpara> | |
| 119 | + </example> | |
| 120 | + </refsect1> | |
| 121 | + </refentry> | |
| @@ -428,8 +428,11 @@ colorspace <constant>V4L2_COLORSPACE_SRGB</constant>.</para> · 427 unmodified lines | ||
| 428 | 428 | <para>Bit 7 is the most significant bit. The value of a = alpha |
| 429 | 429 | bits is undefined when reading from the driver, ignored when writing |
| 430 | 430 | to the driver, except when alpha blending has been negotiated for a |
| 431 | −<link linkend="overlay">Video Overlay</link> or <link | |
| 432 | −linkend="osd">Video Output Overlay</link>.</para> | |
| 431 | +<link linkend="overlay">Video Overlay</link> or <link linkend="osd"> | |
| 432 | +Video Output Overlay</link> or when alpha component has been configured | |
| 433 | +for a <link linkend="capture">Video Capture</link> by means of <link | |
| 434 | +linkend="v4l2-alpha-component"> <constant>V4L2_CID_ALPHA_COMPONENT | |
| 435 | +</constant> </link> control.</para> | |
| 433 | 436 | |
| 434 | 437 | <example> |
| 435 | 438 | <title><constant>V4L2_PIX_FMT_BGR24</constant> 4 × 4 pixel |
| @@ -930,11 +933,3 @@ See &v4l-dvb; for access instructions.</para> · 494 unmodified lines | ||
| 930 | 933 | |
| 931 | 934 | </refsect1> |
| 932 | 935 | </refentry> |
| 933 | − | |
| 934 | − <!-- | |
| 935 | −Local Variables: | |
| 936 | −mode: sgml | |
| 937 | −sgml-parent-document: "pixfmt.sgml" | |
| 938 | −indent-tabs-mode: nil | |
| 939 | −End: | |
| 940 | − --> | |
| @@ -234,11 +234,3 @@ linkend="osd">Video Output Overlay</link>.</para> · 233 unmodified lines | ||
| 234 | 234 | |
| 235 | 235 | </refsect1> |
| 236 | 236 | </refentry> |
| 237 | − | |
| 238 | − <!-- | |
| 239 | −Local Variables: | |
| 240 | −mode: sgml | |
| 241 | −sgml-parent-document: "pixfmt.sgml" | |
| 242 | −indent-tabs-mode: nil | |
| 243 | −End: | |
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| @@ -81,11 +81,3 @@ pixel image</title> · 80 unmodified lines | ||
| 81 | 81 | </example> |
| 82 | 82 | </refsect1> |
| 83 | 83 | </refentry> |
| 84 | − | |
| 85 | − <!-- | |
| 86 | −Local Variables: | |
| 87 | −mode: sgml | |
| 88 | −sgml-parent-document: "pixfmt.sgml" | |
| 89 | −indent-tabs-mode: nil | |
| 90 | −End: | |
| 91 | − --> | |
| @@ -65,11 +65,3 @@ pixel image</title> · 64 unmodified lines | ||
| 65 | 65 | </example> |
| 66 | 66 | </refsect1> |
| 67 | 67 | </refentry> |
| 68 | − | |
| 69 | − <!-- | |
| 70 | −Local Variables: | |
| 71 | −mode: sgml | |
| 72 | −sgml-parent-document: "pixfmt.sgml" | |
| 73 | −indent-tabs-mode: nil | |
| 74 | −End: | |
| 75 | − --> | |
| @@ -65,11 +65,3 @@ pixel image</title> · 64 unmodified lines | ||
| 65 | 65 | </example> |
| 66 | 66 | </refsect1> |
| 67 | 67 | </refentry> |
| 68 | − | |
| 69 | − <!-- | |
| 70 | −Local Variables: | |
| 71 | −mode: sgml | |
| 72 | −sgml-parent-document: "pixfmt.sgml" | |
| 73 | −indent-tabs-mode: nil | |
| 74 | −End: | |
| 75 | − --> | |
| @@ -65,11 +65,3 @@ columns and rows.</para> · 64 unmodified lines | ||
| 65 | 65 | </example> |
| 66 | 66 | </refsect1> |
| 67 | 67 | </refentry> |
| 68 | − | |
| 69 | − <!-- | |
| 70 | −Local Variables: | |
| 71 | −mode: sgml | |
| 72 | −sgml-parent-document: "pixfmt.sgml" | |
| 73 | −indent-tabs-mode: nil | |
| 74 | −End: | |
| 75 | − --> | |
| @@ -118,11 +118,3 @@ pixel image</title> · 117 unmodified lines | ||
| 118 | 118 | </example> |
| 119 | 119 | </refsect1> |
| 120 | 120 | </refentry> |
| 121 | − | |
| 122 | − <!-- | |
| 123 | −Local Variables: | |
| 124 | −mode: sgml | |
| 125 | −sgml-parent-document: "pixfmt.sgml" | |
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| @@ -118,11 +118,3 @@ pixel image</title> · 117 unmodified lines | ||
| 118 | 118 | </example> |
| 119 | 119 | </refsect1> |
| 120 | 120 | </refentry> |
| 121 | − | |
| 122 | − <!-- | |
| 123 | −Local Variables: | |
| 124 | −mode: sgml | |
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| @@ -79,11 +79,3 @@ pixel image</title> · 78 unmodified lines | ||
| 79 | 79 | </example> |
| 80 | 80 | </refsect1> |
| 81 | 81 | </refentry> |
| 82 | − | |
| 83 | − <!-- | |
| 84 | −Local Variables: | |
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| @@ -147,11 +147,3 @@ pixel image</title> · 146 unmodified lines | ||
| 147 | 147 | </example> |
| 148 | 148 | </refsect1> |
| 149 | 149 | </refentry> |
| 150 | − | |
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| @@ -131,11 +131,3 @@ pixel image</title> · 130 unmodified lines | ||
| 131 | 131 | </example> |
| 132 | 132 | </refsect1> |
| 133 | 133 | </refentry> |
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| 135 | − <!-- | |
| 136 | −Local Variables: | |
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| @@ -145,11 +145,3 @@ pixel image</title> · 144 unmodified lines | ||
| 145 | 145 | </example> |
| 146 | 146 | </refsect1> |
| 147 | 147 | </refentry> |
| 148 | − | |
| 149 | − <!-- | |
| 150 | −Local Variables: | |
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| 154 | −End: | |
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| @@ -147,11 +147,3 @@ pixel image</title> · 146 unmodified lines | ||
| 147 | 147 | </example> |
| 148 | 148 | </refsect1> |
| 149 | 149 | </refentry> |
| 150 | − | |
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| @@ -152,11 +152,3 @@ pixel image</title> · 151 unmodified lines | ||
| 152 | 152 | </example> |
| 153 | 153 | </refsect1> |
| 154 | 154 | </refentry> |
| 155 | − | |
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| @@ -151,11 +151,3 @@ pixel image</title> · 150 unmodified lines | ||
| 151 | 151 | </example> |
| 152 | 152 | </refsect1> |
| 153 | 153 | </refentry> |
| 154 | − | |
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| @@ -118,11 +118,3 @@ pixel image</title> · 117 unmodified lines | ||
| 118 | 118 | </example> |
| 119 | 119 | </refsect1> |
| 120 | 120 | </refentry> |
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| 122 | − <!-- | |
| 123 | −Local Variables: | |
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| @@ -118,11 +118,3 @@ pixel image</title> · 117 unmodified lines | ||
| 118 | 118 | </example> |
| 119 | 119 | </refsect1> |
| 120 | 120 | </refentry> |
| 121 | − | |
| 122 | − <!-- | |
| 123 | −Local Variables: | |
| 124 | −mode: sgml | |
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| @@ -714,6 +714,7 @@ information.</para> · 713 unmodified lines | ||
| 714 | 714 | &sub-nv12m; |
| 715 | 715 | &sub-nv12mt; |
| 716 | 716 | &sub-nv16; |
| 717 | + &sub-nv24; | |
| 717 | 718 | &sub-m420; |
| 718 | 719 | </section> |
| 719 | 720 | |
| @@ -890,6 +891,11 @@ kernel sources in the file <filename>Documentation/video4linux/cx2341x/README.hm · 170 unmodified lines | ||
| 890 | 891 | <entry>'M310'</entry> |
| 891 | 892 | <entry>Compressed BGGR Bayer format used by the gspca driver.</entry> |
| 892 | 893 | </row> |
| 894 | + <row id="V4L2-PIX-FMT-JL2005BCD"> | |
| 895 | + <entry><constant>V4L2_PIX_FMT_JL2005BCD</constant></entry> | |
| 896 | + <entry>'JL20'</entry> | |
| 897 | + <entry>JPEG compressed RGGB Bayer format used by the gspca driver.</entry> | |
| 898 | + </row> | |
| 893 | 899 | <row id="V4L2-PIX-FMT-OV511"> |
| 894 | 900 | <entry><constant>V4L2_PIX_FMT_OV511</constant></entry> |
| 895 | 901 | <entry>'O511'</entry> |
| @@ -997,11 +1003,3 @@ the other bits are set to 0.</entry> · 101 unmodified lines | ||
| 997 | 1003 | </tgroup> |
| 998 | 1004 | </table> |
| 999 | 1005 | </section> |
| 1000 | − | |
| 1001 | − <!-- | |
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| @@ -0,0 +1,321 @@ | ||
| 1 | +<section id="selection-api"> | |
| 2 | + | |
| 3 | + <title>Experimental API for cropping, composing and scaling</title> | |
| 4 | + | |
| 5 | + <note> | |
| 6 | + <title>Experimental</title> | |
| 7 | + | |
| 8 | + <para>This is an <link linkend="experimental">experimental</link> | |
| 9 | +interface and may change in the future.</para> | |
| 10 | + </note> | |
| 11 | + | |
| 12 | + <section> | |
| 13 | + <title>Introduction</title> | |
| 14 | + | |
| 15 | +<para>Some video capture devices can sample a subsection of a picture and | |
| 16 | +shrink or enlarge it to an image of arbitrary size. Next, the devices can | |
| 17 | +insert the image into larger one. Some video output devices can crop part of an | |
| 18 | +input image, scale it up or down and insert it at an arbitrary scan line and | |
| 19 | +horizontal offset into a video signal. We call these abilities cropping, | |
| 20 | +scaling and composing.</para> | |
| 21 | + | |
| 22 | +<para>On a video <emphasis>capture</emphasis> device the source is a video | |
| 23 | +signal, and the cropping target determine the area actually sampled. The sink | |
| 24 | +is an image stored in a memory buffer. The composing area specifies which part | |
| 25 | +of the buffer is actually written to by the hardware. </para> | |
| 26 | + | |
| 27 | +<para>On a video <emphasis>output</emphasis> device the source is an image in a | |
| 28 | +memory buffer, and the cropping target is a part of an image to be shown on a | |
| 29 | +display. The sink is the display or the graphics screen. The application may | |
| 30 | +select the part of display where the image should be displayed. The size and | |
| 31 | +position of such a window is controlled by the compose target.</para> | |
| 32 | + | |
| 33 | +<para>Rectangles for all cropping and composing targets are defined even if the | |
| 34 | +device does supports neither cropping nor composing. Their size and position | |
| 35 | +will be fixed in such a case. If the device does not support scaling then the | |
| 36 | +cropping and composing rectangles have the same size.</para> | |
| 37 | + | |
| 38 | + </section> | |
| 39 | + | |
| 40 | + <section> | |
| 41 | + <title>Selection targets</title> | |
| 42 | + | |
| 43 | + <figure id="sel-targets-capture"> | |
| 44 | + <title>Cropping and composing targets</title> | |
| 45 | + <mediaobject> | |
| 46 | + <imageobject> | |
| 47 | + <imagedata fileref="selection.png" format="PNG" /> | |
| 48 | + </imageobject> | |
| 49 | + <textobject> | |
| 50 | + <phrase>Targets used by a cropping, composing and scaling | |
| 51 | + process</phrase> | |
| 52 | + </textobject> | |
| 53 | + </mediaobject> | |
| 54 | + </figure> | |
| 55 | + </section> | |
| 56 | + | |
| 57 | + <section> | |
| 58 | + | |
| 59 | + <title>Configuration</title> | |
| 60 | + | |
| 61 | +<para>Applications can use the <link linkend="vidioc-g-selection">selection | |
| 62 | +API</link> to select an area in a video signal or a buffer, and to query for | |
| 63 | +default settings and hardware limits.</para> | |
| 64 | + | |
| 65 | +<para>Video hardware can have various cropping, composing and scaling | |
| 66 | +limitations. It may only scale up or down, support only discrete scaling | |
| 67 | +factors, or have different scaling abilities in the horizontal and vertical | |
| 68 | +directions. Also it may not support scaling at all. At the same time the | |
| 69 | +cropping/composing rectangles may have to be aligned, and both the source and | |
| 70 | +the sink may have arbitrary upper and lower size limits. Therefore, as usual, | |
| 71 | +drivers are expected to adjust the requested parameters and return the actual | |
| 72 | +values selected. An application can control the rounding behaviour using <link | |
| 73 | +linkend="v4l2-sel-flags"> constraint flags </link>.</para> | |
| 74 | + | |
| 75 | + <section> | |
| 76 | + | |
| 77 | + <title>Configuration of video capture</title> | |
| 78 | + | |
| 79 | +<para>See figure <xref linkend="sel-targets-capture" /> for examples of the | |
| 80 | +selection targets available for a video capture device. It is recommended to | |
| 81 | +configure the cropping targets before to the composing targets.</para> | |
| 82 | + | |
| 83 | +<para>The range of coordinates of the top left corner, width and height of | |
| 84 | +areas that can be sampled is given by the <constant> V4L2_SEL_TGT_CROP_BOUNDS | |
| 85 | +</constant> target. It is recommended for the driver developers to put the | |
| 86 | +top/left corner at position <constant> (0,0) </constant>. The rectangle's | |
| 87 | +coordinates are expressed in pixels.</para> | |
| 88 | + | |
| 89 | +<para>The top left corner, width and height of the source rectangle, that is | |
| 90 | +the area actually sampled, is given by the <constant> V4L2_SEL_TGT_CROP_ACTIVE | |
| 91 | +</constant> target. It uses the same coordinate system as <constant> | |
| 92 | +V4L2_SEL_TGT_CROP_BOUNDS </constant>. The active cropping area must lie | |
| 93 | +completely inside the capture boundaries. The driver may further adjust the | |
| 94 | +requested size and/or position according to hardware limitations.</para> | |
| 95 | + | |
| 96 | +<para>Each capture device has a default source rectangle, given by the | |
| 97 | +<constant> V4L2_SEL_TGT_CROP_DEFAULT </constant> target. This rectangle shall | |
| 98 | +over what the driver writer considers the complete picture. Drivers shall set | |
| 99 | +the active crop rectangle to the default when the driver is first loaded, but | |
| 100 | +not later.</para> | |
| 101 | + | |
| 102 | +<para>The composing targets refer to a memory buffer. The limits of composing | |
| 103 | +coordinates are obtained using <constant> V4L2_SEL_TGT_COMPOSE_BOUNDS | |
| 104 | +</constant>. All coordinates are expressed in pixels. The rectangle's top/left | |
| 105 | +corner must be located at position <constant> (0,0) </constant>. The width and | |
| 106 | +height are equal to the image size set by <constant> VIDIOC_S_FMT </constant>. | |
| 107 | +</para> | |
| 108 | + | |
| 109 | +<para>The part of a buffer into which the image is inserted by the hardware is | |
| 110 | +controlled by the <constant> V4L2_SEL_TGT_COMPOSE_ACTIVE </constant> target. | |
| 111 | +The rectangle's coordinates are also expressed in the same coordinate system as | |
| 112 | +the bounds rectangle. The composing rectangle must lie completely inside bounds | |
| 113 | +rectangle. The driver must adjust the composing rectangle to fit to the | |
| 114 | +bounding limits. Moreover, the driver can perform other adjustments according | |
| 115 | +to hardware limitations. The application can control rounding behaviour using | |
| 116 | +<link linkend="v4l2-sel-flags"> constraint flags </link>.</para> | |
| 117 | + | |
| 118 | +<para>For capture devices the default composing rectangle is queried using | |
| 119 | +<constant> V4L2_SEL_TGT_COMPOSE_DEFAULT </constant>. It is usually equal to the | |
| 120 | +bounding rectangle.</para> | |
| 121 | + | |
| 122 | +<para>The part of a buffer that is modified by the hardware is given by | |
| 123 | +<constant> V4L2_SEL_TGT_COMPOSE_PADDED </constant>. It contains all pixels | |
| 124 | +defined using <constant> V4L2_SEL_TGT_COMPOSE_ACTIVE </constant> plus all | |
| 125 | +padding data modified by hardware during insertion process. All pixels outside | |
| 126 | +this rectangle <emphasis>must not</emphasis> be changed by the hardware. The | |
| 127 | +content of pixels that lie inside the padded area but outside active area is | |
| 128 | +undefined. The application can use the padded and active rectangles to detect | |
| 129 | +where the rubbish pixels are located and remove them if needed.</para> | |
| 130 | + | |
| 131 | + </section> | |
| 132 | + | |
| 133 | + <section> | |
| 134 | + | |
| 135 | + <title>Configuration of video output</title> | |
| 136 | + | |
| 137 | +<para>For output devices targets and ioctls are used similarly to the video | |
| 138 | +capture case. The <emphasis> composing </emphasis> rectangle refers to the | |
| 139 | +insertion of an image into a video signal. The cropping rectangles refer to a | |
| 140 | +memory buffer. It is recommended to configure the composing targets before to | |
| 141 | +the cropping targets.</para> | |
| 142 | + | |
| 143 | +<para>The cropping targets refer to the memory buffer that contains an image to | |
| 144 | +be inserted into a video signal or graphical screen. The limits of cropping | |
| 145 | +coordinates are obtained using <constant> V4L2_SEL_TGT_CROP_BOUNDS </constant>. | |
| 146 | +All coordinates are expressed in pixels. The top/left corner is always point | |
| 147 | +<constant> (0,0) </constant>. The width and height is equal to the image size | |
| 148 | +specified using <constant> VIDIOC_S_FMT </constant> ioctl.</para> | |
| 149 | + | |
| 150 | +<para>The top left corner, width and height of the source rectangle, that is | |
| 151 | +the area from which image date are processed by the hardware, is given by the | |
| 152 | +<constant> V4L2_SEL_TGT_CROP_ACTIVE </constant>. Its coordinates are expressed | |
| 153 | +in in the same coordinate system as the bounds rectangle. The active cropping | |
| 154 | +area must lie completely inside the crop boundaries and the driver may further | |
| 155 | +adjust the requested size and/or position according to hardware | |
| 156 | +limitations.</para> | |
| 157 | + | |
| 158 | +<para>For output devices the default cropping rectangle is queried using | |
| 159 | +<constant> V4L2_SEL_TGT_CROP_DEFAULT </constant>. It is usually equal to the | |
| 160 | +bounding rectangle.</para> | |
| 161 | + | |
| 162 | +<para>The part of a video signal or graphics display where the image is | |
| 163 | +inserted by the hardware is controlled by <constant> | |
| 164 | +V4L2_SEL_TGT_COMPOSE_ACTIVE </constant> target. The rectangle's coordinates | |
| 165 | +are expressed in pixels. The composing rectangle must lie completely inside the | |
| 166 | +bounds rectangle. The driver must adjust the area to fit to the bounding | |
| 167 | +limits. Moreover, the driver can perform other adjustments according to | |
| 168 | +hardware limitations. </para> | |
| 169 | + | |
| 170 | +<para>The device has a default composing rectangle, given by the <constant> | |
| 171 | +V4L2_SEL_TGT_COMPOSE_DEFAULT </constant> target. This rectangle shall cover what | |
| 172 | +the driver writer considers the complete picture. It is recommended for the | |
| 173 | +driver developers to put the top/left corner at position <constant> (0,0) | |
| 174 | +</constant>. Drivers shall set the active composing rectangle to the default | |
| 175 | +one when the driver is first loaded.</para> | |
| 176 | + | |
| 177 | +<para>The devices may introduce additional content to video signal other than | |
| 178 | +an image from memory buffers. It includes borders around an image. However, | |
| 179 | +such a padded area is driver-dependent feature not covered by this document. | |
| 180 | +Driver developers are encouraged to keep padded rectangle equal to active one. | |
| 181 | +The padded target is accessed by the <constant> V4L2_SEL_TGT_COMPOSE_PADDED | |
| 182 | +</constant> identifier. It must contain all pixels from the <constant> | |
| 183 | +V4L2_SEL_TGT_COMPOSE_ACTIVE </constant> target.</para> | |
| 184 | + | |
| 185 | + </section> | |
| 186 | + | |
| 187 | + <section> | |
| 188 | + | |
| 189 | + <title>Scaling control.</title> | |
| 190 | + | |
| 191 | +<para>An application can detect if scaling is performed by comparing the width | |
| 192 | +and the height of rectangles obtained using <constant> V4L2_SEL_TGT_CROP_ACTIVE | |
| 193 | +</constant> and <constant> V4L2_SEL_TGT_COMPOSE_ACTIVE </constant> targets. If | |
| 194 | +these are not equal then the scaling is applied. The application can compute | |
| 195 | +the scaling ratios using these values.</para> | |
| 196 | + | |
| 197 | + </section> | |
| 198 | + | |
| 199 | + </section> | |
| 200 | + | |
| 201 | + <section> | |
| 202 | + | |
| 203 | + <title>Comparison with old cropping API.</title> | |
| 204 | + | |
| 205 | +<para>The selection API was introduced to cope with deficiencies of previous | |
| 206 | +<link linkend="crop"> API </link>, that was designed to control simple capture | |
| 207 | +devices. Later the cropping API was adopted by video output drivers. The ioctls | |
| 208 | +are used to select a part of the display were the video signal is inserted. It | |
| 209 | +should be considered as an API abuse because the described operation is | |
| 210 | +actually the composing. The selection API makes a clear distinction between | |
| 211 | +composing and cropping operations by setting the appropriate targets. The V4L2 | |
| 212 | +API lacks any support for composing to and cropping from an image inside a | |
| 213 | +memory buffer. The application could configure a capture device to fill only a | |
| 214 | +part of an image by abusing V4L2 API. Cropping a smaller image from a larger | |
| 215 | +one is achieved by setting the field <structfield> | |
| 216 | +&v4l2-pix-format;::bytesperline </structfield>. Introducing an image offsets | |
| 217 | +could be done by modifying field <structfield> &v4l2-buffer;::m:userptr | |
| 218 | +</structfield> before calling <constant> VIDIOC_QBUF </constant>. Those | |
| 219 | +operations should be avoided because they are not portable (endianness), and do | |
| 220 | +not work for macroblock and Bayer formats and mmap buffers. The selection API | |
| 221 | +deals with configuration of buffer cropping/composing in a clear, intuitive and | |
| 222 | +portable way. Next, with the selection API the concepts of the padded target | |
| 223 | +and constraints flags are introduced. Finally, <structname> &v4l2-crop; | |
| 224 | +</structname> and <structname> &v4l2-cropcap; </structname> have no reserved | |
| 225 | +fields. Therefore there is no way to extend their functionality. The new | |
| 226 | +<structname> &v4l2-selection; </structname> provides a lot of place for future | |
| 227 | +extensions. Driver developers are encouraged to implement only selection API. | |
| 228 | +The former cropping API would be simulated using the new one. </para> | |
| 229 | + | |
| 230 | + </section> | |
| 231 | + | |
| 232 | + <section> | |
| 233 | + <title>Examples</title> | |
| 234 | + <example> | |
| 235 | + <title>Resetting the cropping parameters</title> | |
| 236 | + | |
| 237 | + <para>(A video capture device is assumed; change <constant> | |
| 238 | +V4L2_BUF_TYPE_VIDEO_CAPTURE </constant> for other devices; change target to | |
| 239 | +<constant> V4L2_SEL_TGT_COMPOSE_* </constant> family to configure composing | |
| 240 | +area)</para> | |
| 241 | + | |
| 242 | + <programlisting> | |
| 243 | + | |
| 244 | + &v4l2-selection; sel = { | |
| 245 | + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
| 246 | + .target = V4L2_SEL_TGT_CROP_DEFAULT, | |
| 247 | + }; | |
| 248 | + ret = ioctl(fd, &VIDIOC-G-SELECTION;, &sel); | |
| 249 | + if (ret) | |
| 250 | + exit(-1); | |
| 251 | + sel.target = V4L2_SEL_TGT_CROP_ACTIVE; | |
| 252 | + ret = ioctl(fd, &VIDIOC-S-SELECTION;, &sel); | |
| 253 | + if (ret) | |
| 254 | + exit(-1); | |
| 255 | + | |
| 256 | + </programlisting> | |
| 257 | + </example> | |
| 258 | + | |
| 259 | + <example> | |
| 260 | + <title>Simple downscaling</title> | |
| 261 | + <para>Setting a composing area on output of size of <emphasis> at most | |
| 262 | +</emphasis> half of limit placed at a center of a display.</para> | |
| 263 | + <programlisting> | |
| 264 | + | |
| 265 | + &v4l2-selection; sel = { | |
| 266 | + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT, | |
| 267 | + .target = V4L2_SEL_TGT_COMPOSE_BOUNDS, | |
| 268 | + }; | |
| 269 | + struct v4l2_rect r; | |
| 270 | + | |
| 271 | + ret = ioctl(fd, &VIDIOC-G-SELECTION;, &sel); | |
| 272 | + if (ret) | |
| 273 | + exit(-1); | |
| 274 | + /* setting smaller compose rectangle */ | |
| 275 | + r.width = sel.r.width / 2; | |
| 276 | + r.height = sel.r.height / 2; | |
| 277 | + r.left = sel.r.width / 4; | |
| 278 | + r.top = sel.r.height / 4; | |
| 279 | + sel.r = r; | |
| 280 | + sel.target = V4L2_SEL_TGT_COMPOSE_ACTIVE; | |
| 281 | + sel.flags = V4L2_SEL_FLAG_LE; | |
| 282 | + ret = ioctl(fd, &VIDIOC-S-SELECTION;, &sel); | |
| 283 | + if (ret) | |
| 284 | + exit(-1); | |
| 285 | + | |
| 286 | + </programlisting> | |
| 287 | + </example> | |
| 288 | + | |
| 289 | + <example> | |
| 290 | + <title>Querying for scaling factors</title> | |
| 291 | + <para>A video output device is assumed; change <constant> | |
| 292 | +V4L2_BUF_TYPE_VIDEO_OUTPUT </constant> for other devices</para> | |
| 293 | + <programlisting> | |
| 294 | + | |
| 295 | + &v4l2-selection; compose = { | |
| 296 | + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT, | |
| 297 | + .target = V4L2_SEL_TGT_COMPOSE_ACTIVE, | |
| 298 | + }; | |
| 299 | + &v4l2-selection; crop = { | |
| 300 | + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT, | |
| 301 | + .target = V4L2_SEL_TGT_CROP_ACTIVE, | |
| 302 | + }; | |
| 303 | + double hscale, vscale; | |
| 304 | + | |
| 305 | + ret = ioctl(fd, &VIDIOC-G-SELECTION;, &compose); | |
| 306 | + if (ret) | |
| 307 | + exit(-1); | |
| 308 | + ret = ioctl(fd, &VIDIOC-G-SELECTION;, &crop); | |
| 309 | + if (ret) | |
| 310 | + exit(-1); | |
| 311 | + | |
| 312 | + /* computing scaling factors */ | |
| 313 | + hscale = (double)compose.r.width / crop.r.width; | |
| 314 | + vscale = (double)compose.r.height / crop.r.height; | |
| 315 | + | |
| 316 | + </programlisting> | |
| 317 | + </example> | |
| 318 | + | |
| 319 | + </section> | |
| 320 | + | |
| 321 | +</section> | |
| @@ -501,6 +501,7 @@ and discussions on the V4L mailing list.</revremark> · 500 unmodified lines | ||
| 501 | 501 | &sub-g-output; |
| 502 | 502 | &sub-g-parm; |
| 503 | 503 | &sub-g-priority; |
| 504 | + &sub-g-selection; | |
| 504 | 505 | &sub-g-sliced-vbi-cap; |
| 505 | 506 | &sub-g-std; |
| 506 | 507 | &sub-g-tuner; |
| @@ -228,11 +228,3 @@ is out of bounds.</para> · 227 unmodified lines | ||
| 228 | 228 | </variablelist> |
| 229 | 229 | </refsect1> |
| 230 | 230 | </refentry> |
| 231 | − | |
| 232 | −<!-- | |
| 233 | −Local Variables: | |
| 234 | −mode: sgml | |
| 235 | −sgml-parent-document: "v4l2.sgml" | |
| 236 | −indent-tabs-mode: nil | |
| 237 | −End: | |
| 238 | −--> | |
| @@ -156,11 +156,3 @@ bounds.</para> · 155 unmodified lines | ||
| 156 | 156 | </variablelist> |
| 157 | 157 | </refsect1> |
| 158 | 158 | </refentry> |
| 159 | − | |
| 160 | −<!-- | |
| 161 | −Local Variables: | |
| 162 | −mode: sgml | |
| 163 | −sgml-parent-document: "v4l2.sgml" | |
| 164 | −indent-tabs-mode: nil | |
| 165 | −End: | |
| 166 | −--> | |
| @@ -311,11 +311,3 @@ out of bounds.</para> · 310 unmodified lines | ||
| 311 | 311 | </variablelist> |
| 312 | 312 | </refsect1> |
| 313 | 313 | </refentry> |
| 314 | − | |
| 315 | −<!-- | |
| 316 | −Local Variables: | |
| 317 | −mode: sgml | |
| 318 | −sgml-parent-document: "v4l2.sgml" | |
| 319 | −indent-tabs-mode: nil | |
| 320 | −End: | |
| 321 | −--> | |
| @@ -196,11 +196,3 @@ is out of bounds.</para> · 195 unmodified lines | ||
| 196 | 196 | </variablelist> |
| 197 | 197 | </refsect1> |
| 198 | 198 | </refentry> |
| 199 | − | |
| 200 | −<!-- | |
| 201 | −Local Variables: | |
| 202 | −mode: sgml | |
| 203 | −sgml-parent-document: "v4l2.sgml" | |
| 204 | −indent-tabs-mode: nil | |
| 205 | −End: | |
| 206 | −--> | |
| @@ -381,11 +381,3 @@ is out of bounds.</para> · 380 unmodified lines | ||
| 381 | 381 | </variablelist> |
| 382 | 382 | </refsect1> |
| 383 | 383 | </refentry> |
| 384 | − | |
| 385 | −<!-- | |
| 386 | −Local Variables: | |
| 387 | −mode: sgml | |
| 388 | −sgml-parent-document: "v4l2.sgml" | |
| 389 | −indent-tabs-mode: nil | |
| 390 | −End: | |
| 391 | −--> | |
| @@ -127,11 +127,3 @@ this control belongs to.</para> · 126 unmodified lines | ||
| 127 | 127 | </variablelist> |
| 128 | 128 | </refsect1> |
| 129 | 129 | </refentry> |
| 130 | − | |
| 131 | −<!-- | |
| 132 | −Local Variables: | |
| 133 | −mode: sgml | |
| 134 | −sgml-parent-document: "v4l2.sgml" | |
| 135 | −indent-tabs-mode: nil | |
| 136 | −End: | |
| 137 | −--> | |
| @@ -183,7 +183,12 @@ applications must set the array to zero.</entry> · 182 unmodified lines | ||
| 183 | 183 | <entry>__u32</entry> |
| 184 | 184 | <entry><structfield>ctrl_class</structfield></entry> |
| 185 | 185 | <entry>The control class to which all controls belong, see |
| 186 | −<xref linkend="ctrl-class" />.</entry> | |
| 186 | +<xref linkend="ctrl-class" />. Drivers that use a kernel framework for handling | |
| 187 | +controls will also accept a value of 0 here, meaning that the controls can | |
| 188 | +belong to any control class. Whether drivers support this can be tested by setting | |
| 189 | +<structfield>ctrl_class</structfield> to 0 and calling <constant>VIDIOC_TRY_EXT_CTRLS</constant> | |
| 190 | +with a <structfield>count</structfield> of 0. If that succeeds, then the driver | |
| 191 | +supports this feature.</entry> | |
| 187 | 192 | </row> |
| 188 | 193 | <row> |
| 189 | 194 | <entry>__u32</entry> |
| @@ -194,10 +199,13 @@ also be zero.</entry> · 4 unmodified lines | ||
| 194 | 199 | <row> |
| 195 | 200 | <entry>__u32</entry> |
| 196 | 201 | <entry><structfield>error_idx</structfield></entry> |
| 197 | − <entry>Set by the driver in case of an error. It is the | |
| 198 | −index of the control causing the error or equal to 'count' when the | |
| 199 | −error is not associated with a particular control. Undefined when the | |
| 200 | −ioctl returns 0 (success).</entry> | |
| 202 | + <entry>Set by the driver in case of an error. If it is equal | |
| 203 | +to <structfield>count</structfield>, then no actual changes were made to | |
| 204 | +controls. In other words, the error was not associated with setting a particular | |
| 205 | +control. If it is another value, then only the controls up to <structfield>error_idx-1</structfield> | |
| 206 | +were modified and control <structfield>error_idx</structfield> is the one that | |
| 207 | +caused the error. The <structfield>error_idx</structfield> value is undefined | |
| 208 | +if the ioctl returned 0 (success).</entry> | |
| 201 | 209 | </row> |
| 202 | 210 | <row> |
| 203 | 211 | <entry>__u32</entry> |
| @@ -312,10 +320,3 @@ to store the payload and this error code is returned.</para> · 108 unmodified lines | ||
| 312 | 320 | </refsect1> |
| 313 | 321 | </refentry> |
| 314 | 322 | |
| 315 | −<!-- | |
| 316 | −Local Variables: | |
| 317 | −mode: sgml | |
| 318 | −sgml-parent-document: "v4l2.sgml" | |
| 319 | −indent-tabs-mode: nil | |
| 320 | −End: | |
| 321 | −--> | |
| @@ -295,7 +295,8 @@ set this field to zero.</entry> · 294 unmodified lines | ||
| 295 | 295 | <entry>The device is capable of non-destructive overlays. |
| 296 | 296 | When the driver clears this flag, only destructive overlays are |
| 297 | 297 | supported. There are no drivers yet which support both destructive and |
| 298 | −non-destructive overlays.</entry> | |
| 298 | +non-destructive overlays. Video Output Overlays are in practice always | |
| 299 | +non-destructive.</entry> | |
| 299 | 300 | </row> |
| 300 | 301 | <row> |
| 301 | 302 | <entry><constant>V4L2_FBUF_CAP_CHROMAKEY</constant></entry> |
| @@ -339,8 +340,8 @@ blending makes no sense for destructive overlays.</entry> · 37 unmodified lines | ||
| 339 | 340 | <row> |
| 340 | 341 | <entry><constant>V4L2_FBUF_CAP_SRC_CHROMAKEY</constant></entry> |
| 341 | 342 | <entry>0x0080</entry> |
| 342 | − <entry>The device supports Source Chroma-keying. Framebuffer pixels | |
| 343 | −with the chroma-key colors are replaced by video pixels, which is exactly opposite of | |
| 343 | + <entry>The device supports Source Chroma-keying. Video pixels | |
| 344 | +with the chroma-key colors are replaced by framebuffer pixels, which is exactly opposite of | |
| 344 | 345 | <constant>V4L2_FBUF_CAP_CHROMAKEY</constant></entry> |
| 345 | 346 | </row> |
| 346 | 347 | </tbody> |
| @@ -356,21 +357,27 @@ with the chroma-key colors are replaced by video pixels, which is exactly opposi · 9 unmodified lines | ||
| 356 | 357 | <entry><constant>V4L2_FBUF_FLAG_PRIMARY</constant></entry> |
| 357 | 358 | <entry>0x0001</entry> |
| 358 | 359 | <entry>The framebuffer is the primary graphics surface. |
| 359 | −In other words, the overlay is destructive. [?]</entry> | |
| 360 | +In other words, the overlay is destructive. This flag is typically set by any | |
| 361 | +driver that doesn't have the <constant>V4L2_FBUF_CAP_EXTERNOVERLAY</constant> | |
| 362 | +capability and it is cleared otherwise.</entry> | |
| 360 | 363 | </row> |
| 361 | 364 | <row> |
| 362 | 365 | <entry><constant>V4L2_FBUF_FLAG_OVERLAY</constant></entry> |
| 363 | 366 | <entry>0x0002</entry> |
| 364 | − <entry>The frame buffer is an overlay surface the same | |
| 365 | −size as the capture. [?]</entry> | |
| 366 | − </row> | |
| 367 | − <row> | |
| 368 | − <entry spanname="hspan">The purpose of | |
| 369 | −<constant>V4L2_FBUF_FLAG_PRIMARY</constant> and | |
| 370 | −<constant>V4L2_FBUF_FLAG_OVERLAY</constant> was never quite clear. | |
| 371 | −Most drivers seem to ignore these flags. For compatibility with the | |
| 372 | −<wordasword>bttv</wordasword> driver applications should set the | |
| 373 | −<constant>V4L2_FBUF_FLAG_OVERLAY</constant> flag.</entry> | |
| 367 | + <entry>If this flag is set for a video capture device, then the | |
| 368 | +driver will set the initial overlay size to cover the full framebuffer size, | |
| 369 | +otherwise the existing overlay size (as set by &VIDIOC-S-FMT;) will be used. | |
| 370 | + | |
| 371 | +Only one video capture driver (bttv) supports this flag. The use of this flag | |
| 372 | +for capture devices is deprecated. There is no way to detect which drivers | |
| 373 | +support this flag, so the only reliable method of setting the overlay size is | |
| 374 | +through &VIDIOC-S-FMT;. | |
| 375 | + | |
| 376 | +If this flag is set for a video output device, then the video output overlay | |
| 377 | +window is relative to the top-left corner of the framebuffer and restricted | |
| 378 | +to the size of the framebuffer. If it is cleared, then the video output | |
| 379 | +overlay window is relative to the video output display. | |
| 380 | + </entry> | |
| 374 | 381 | </row> |
| 375 | 382 | <row> |
| 376 | 383 | <entry><constant>V4L2_FBUF_FLAG_CHROMAKEY</constant></entry> |
| @@ -98,8 +98,11 @@ the &v4l2-output; <structfield>modulator</structfield> field and the · 97 unmodified lines | ||
| 98 | 98 | <entry>&v4l2-tuner-type;</entry> |
| 99 | 99 | <entry><structfield>type</structfield></entry> |
| 100 | 100 | <entry>The tuner type. This is the same value as in the |
| 101 | −&v4l2-tuner; <structfield>type</structfield> field. The field is not | |
| 102 | −applicable to modulators, &ie; ignored by drivers.</entry> | |
| 101 | +&v4l2-tuner; <structfield>type</structfield> field. The type must be set | |
| 102 | +to <constant>V4L2_TUNER_RADIO</constant> for <filename>/dev/radioX</filename> | |
| 103 | +device nodes, and to <constant>V4L2_TUNER_ANALOG_TV</constant> | |
| 104 | +for all others. The field is not applicable to modulators, &ie; ignored | |
| 105 | +by drivers.</entry> | |
| 103 | 106 | </row> |
| 104 | 107 | <row> |
| 105 | 108 | <entry>__u32</entry> |
| @@ -135,11 +138,3 @@ wrong.</para> · 29 unmodified lines | ||
| 135 | 138 | </variablelist> |
| 136 | 139 | </refsect1> |
| 137 | 140 | </refentry> |
| 138 | − | |
| 139 | −<!-- | |
| 140 | −Local Variables: | |
| 141 | −mode: sgml | |
| 142 | −sgml-parent-document: "v4l2.sgml" | |
| 143 | −indent-tabs-mode: nil | |
| 144 | −End: | |
| 145 | −--> | |
| @@ -61,8 +61,8 @@ desired input in an integer and call the · 60 unmodified lines | ||
| 61 | 61 | <constant>VIDIOC_S_INPUT</constant> ioctl with a pointer to this |
| 62 | 62 | integer. Side effects are possible. For example inputs may support |
| 63 | 63 | different video standards, so the driver may implicitly switch the |
| 64 | −current standard. It is good practice to select an input before | |
| 65 | −querying or negotiating any other parameters.</para> | |
| 64 | +current standard. Because of these possible side effects applications | |
| 65 | +must select an input before querying or negotiating any other parameters.</para> | |
| 66 | 66 | |
| 67 | 67 | <para>Information about video inputs is available using the |
| 68 | 68 | &VIDIOC-ENUMINPUT; ioctl.</para> |
| @@ -236,11 +236,3 @@ mode.</entry> · 235 unmodified lines | ||
| 236 | 236 | </variablelist> |
| 237 | 237 | </refsect1> |
| 238 | 238 | </refentry> |
| 239 | − | |
| 240 | −<!-- | |
| 241 | −Local Variables: | |
| 242 | −mode: sgml | |
| 243 | −sgml-parent-document: "v4l2.sgml" | |
| 244 | −indent-tabs-mode: nil | |
| 245 | −End: | |
| 246 | −--> | |
| @@ -61,8 +61,9 @@ desired output in an integer and call the · 60 unmodified lines | ||
| 61 | 61 | <constant>VIDIOC_S_OUTPUT</constant> ioctl with a pointer to this integer. |
| 62 | 62 | Side effects are possible. For example outputs may support different |
| 63 | 63 | video standards, so the driver may implicitly switch the current |
| 64 | −standard. It is good practice to select an output before querying or | |
| 65 | −negotiating any other parameters.</para> | |
| 64 | +standard. | |
| 65 | +standard. Because of these possible side effects applications | |
| 66 | +must select an output before querying or negotiating any other parameters.</para> | |
| 66 | 67 | |
| 67 | 68 | <para>Information about video outputs is available using the |
| 68 | 69 | &VIDIOC-ENUMOUTPUT; ioctl.</para> |
| @@ -133,11 +133,3 @@ priority.</para> · 132 unmodified lines | ||
| 133 | 133 | </variablelist> |
| 134 | 134 | </refsect1> |
| 135 | 135 | </refentry> |
| 136 | − | |
| 137 | −<!-- | |
| 138 | −Local Variables: | |
| 139 | −mode: sgml | |
| 140 | −sgml-parent-document: "v4l2.sgml" | |
| 141 | −indent-tabs-mode: nil | |
| 142 | −End: | |
| 143 | −--> | |
| @@ -0,0 +1,304 @@ | ||
| 1 | +<refentry id="vidioc-g-selection"> | |
| 2 | + | |
| 3 | + <refmeta> | |
| 4 | + <refentrytitle>ioctl VIDIOC_G_SELECTION, VIDIOC_S_SELECTION</refentrytitle> | |
| 5 | + &manvol; | |
| 6 | + </refmeta> | |
| 7 | + | |
| 8 | + <refnamediv> | |
| 9 | + <refname>VIDIOC_G_SELECTION</refname> | |
| 10 | + <refname>VIDIOC_S_SELECTION</refname> | |
| 11 | + <refpurpose>Get or set one of the selection rectangles</refpurpose> | |
| 12 | + </refnamediv> | |
| 13 | + | |
| 14 | + <refsynopsisdiv> | |
| 15 | + <funcsynopsis> | |
| 16 | + <funcprototype> | |
| 17 | + <funcdef>int <function>ioctl</function></funcdef> | |
| 18 | + <paramdef>int <parameter>fd</parameter></paramdef> | |
| 19 | + <paramdef>int <parameter>request</parameter></paramdef> | |
| 20 | + <paramdef>struct v4l2_selection *<parameter>argp</parameter></paramdef> | |
| 21 | + </funcprototype> | |
| 22 | + </funcsynopsis> | |
| 23 | + </refsynopsisdiv> | |
| 24 | + | |
| 25 | + <refsect1> | |
| 26 | + <title>Arguments</title> | |
| 27 | + | |
| 28 | + <variablelist> | |
| 29 | + <varlistentry> | |
| 30 | + <term><parameter>fd</parameter></term> | |
| 31 | + <listitem> | |
| 32 | + <para>&fd;</para> | |
| 33 | + </listitem> | |
| 34 | + </varlistentry> | |
| 35 | + <varlistentry> | |
| 36 | + <term><parameter>request</parameter></term> | |
| 37 | + <listitem> | |
| 38 | + <para>VIDIOC_G_SELECTION, VIDIOC_S_SELECTION</para> | |
| 39 | + </listitem> | |
| 40 | + </varlistentry> | |
| 41 | + <varlistentry> | |
| 42 | + <term><parameter>argp</parameter></term> | |
| 43 | + <listitem> | |
| 44 | + <para></para> | |
| 45 | + </listitem> | |
| 46 | + </varlistentry> | |
| 47 | + </variablelist> | |
| 48 | + </refsect1> | |
| 49 | + | |
| 50 | + <refsect1> | |
| 51 | + <title>Description</title> | |
| 52 | + | |
| 53 | + <note> | |
| 54 | + <title>Experimental</title> | |
| 55 | + <para>This is an <link linkend="experimental"> experimental </link> | |
| 56 | + interface and may change in the future.</para> | |
| 57 | + </note> | |
| 58 | + | |
| 59 | + <para>The ioctls are used to query and configure selection rectangles.</para> | |
| 60 | + | |
| 61 | +<para> To query the cropping (composing) rectangle set <structfield> | |
| 62 | +&v4l2-selection;::type </structfield> to the respective buffer type. Do not | |
| 63 | +use multiplanar buffers. Use <constant> V4L2_BUF_TYPE_VIDEO_CAPTURE | |
| 64 | +</constant> instead of <constant> V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE | |
| 65 | +</constant>. Use <constant> V4L2_BUF_TYPE_VIDEO_OUTPUT </constant> instead of | |
| 66 | +<constant> V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE </constant>. The next step is | |
| 67 | +setting <structfield> &v4l2-selection;::target </structfield> to value | |
| 68 | +<constant> V4L2_SEL_TGT_CROP_ACTIVE </constant> (<constant> | |
| 69 | +V4L2_SEL_TGT_COMPOSE_ACTIVE </constant>). Please refer to table <xref | |
| 70 | +linkend="v4l2-sel-target" /> or <xref linkend="selection-api" /> for additional | |
| 71 | +targets. Fields <structfield> &v4l2-selection;::flags </structfield> and | |
| 72 | +<structfield> &v4l2-selection;::reserved </structfield> are ignored and they | |
| 73 | +must be filled with zeros. The driver fills the rest of the structure or | |
| 74 | +returns &EINVAL; if incorrect buffer type or target was used. If cropping | |
| 75 | +(composing) is not supported then the active rectangle is not mutable and it is | |
| 76 | +always equal to the bounds rectangle. Finally, structure <structfield> | |
| 77 | +&v4l2-selection;::r </structfield> is filled with the current cropping | |
| 78 | +(composing) coordinates. The coordinates are expressed in driver-dependent | |
| 79 | +units. The only exception are rectangles for images in raw formats, whose | |
| 80 | +coordinates are always expressed in pixels. </para> | |
| 81 | + | |
| 82 | +<para> To change the cropping (composing) rectangle set <structfield> | |
| 83 | +&v4l2-selection;::type </structfield> to the respective buffer type. Do not | |
| 84 | +use multiplanar buffers. Use <constant> V4L2_BUF_TYPE_VIDEO_CAPTURE | |
| 85 | +</constant> instead of <constant> V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE | |
| 86 | +</constant>. Use <constant> V4L2_BUF_TYPE_VIDEO_OUTPUT </constant> instead of | |
| 87 | +<constant> V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE </constant>. The next step is | |
| 88 | +setting <structfield> &v4l2-selection;::target </structfield> to value | |
| 89 | +<constant> V4L2_SEL_TGT_CROP_ACTIVE </constant> (<constant> | |
| 90 | +V4L2_SEL_TGT_COMPOSE_ACTIVE </constant>). Please refer to table <xref | |
| 91 | +linkend="v4l2-sel-target" /> or <xref linkend="selection-api" /> for additional | |
| 92 | +targets. Set desired active area into the field <structfield> | |
| 93 | +&v4l2-selection;::r </structfield>. Field <structfield> | |
| 94 | +&v4l2-selection;::reserved </structfield> is ignored and must be filled with | |
| 95 | +zeros. The driver may adjust the rectangle coordinates. An application may | |
| 96 | +introduce constraints to control rounding behaviour. Set the field | |
| 97 | +<structfield> &v4l2-selection;::flags </structfield> to one of values: | |
| 98 | + | |
| 99 | +<itemizedlist> | |
| 100 | + <listitem> | |
| 101 | +<para><constant>0</constant> - The driver can adjust the rectangle size freely | |
| 102 | +and shall choose a crop/compose rectangle as close as possible to the requested | |
| 103 | +one.</para> | |
| 104 | + </listitem> | |
| 105 | + <listitem> | |
| 106 | +<para><constant>V4L2_SEL_FLAG_GE</constant> - The driver is not allowed to | |
| 107 | +shrink the rectangle. The original rectangle must lay inside the adjusted | |
| 108 | +one.</para> | |
| 109 | + </listitem> | |
| 110 | + <listitem> | |
| 111 | +<para><constant>V4L2_SEL_FLAG_LE</constant> - The driver is not allowed to | |
| 112 | +enlarge the rectangle. The adjusted rectangle must lay inside the original | |
| 113 | +one.</para> | |
| 114 | + </listitem> | |
| 115 | + <listitem> | |
| 116 | +<para><constant>V4L2_SEL_FLAG_GE | V4L2_SEL_FLAG_LE</constant> - The driver | |
| 117 | +must choose the size exactly the same as in the requested rectangle.</para> | |
| 118 | + </listitem> | |
| 119 | +</itemizedlist> | |
| 120 | + | |
| 121 | +Please refer to <xref linkend="sel-const-adjust" />. | |
| 122 | + | |
| 123 | +</para> | |
| 124 | + | |
| 125 | +<para> The driver may have to adjusts the requested dimensions against hardware | |
| 126 | +limits and other parts as the pipeline, i.e. the bounds given by the | |
| 127 | +capture/output window or TV display. The closest possible values of horizontal | |
| 128 | +and vertical offset and sizes are chosen according to following priority: | |
| 129 | + | |
| 130 | +<orderedlist> | |
| 131 | + <listitem> | |
| 132 | + <para>Satisfy constraints from <structfield>&v4l2-selection;::flags</structfield>.</para> | |
| 133 | + </listitem> | |
| 134 | + <listitem> | |
| 135 | + <para>Adjust width, height, left, and top to hardware limits and alignments.</para> | |
| 136 | + </listitem> | |
| 137 | + <listitem> | |
| 138 | + <para>Keep center of adjusted rectangle as close as possible to the original one.</para> | |
| 139 | + </listitem> | |
| 140 | + <listitem> | |
| 141 | + <para>Keep width and height as close as possible to original ones.</para> | |
| 142 | + </listitem> | |
| 143 | + <listitem> | |
| 144 | + <para>Keep horizontal and vertical offset as close as possible to original ones.</para> | |
| 145 | + </listitem> | |
| 146 | +</orderedlist> | |
| 147 | + | |
| 148 | +On success the field <structfield> &v4l2-selection;::r </structfield> contains | |
| 149 | +the adjusted rectangle. When the parameters are unsuitable the application may | |
| 150 | +modify the cropping (composing) or image parameters and repeat the cycle until | |
| 151 | +satisfactory parameters have been negotiated. If constraints flags have to be | |
| 152 | +violated at then ERANGE is returned. The error indicates that <emphasis> there | |
| 153 | +exist no rectangle </emphasis> that satisfies the constraints.</para> | |
| 154 | + | |
| 155 | + </refsect1> | |
| 156 | + | |
| 157 | + <refsect1> | |
| 158 | + <table frame="none" pgwide="1" id="v4l2-sel-target"> | |
| 159 | + <title>Selection targets.</title> | |
| 160 | + <tgroup cols="3"> | |
| 161 | + &cs-def; | |
| 162 | + <tbody valign="top"> | |
| 163 | + <row> | |
| 164 | + <entry><constant>V4L2_SEL_TGT_CROP_ACTIVE</constant></entry> | |
| 165 | + <entry>0</entry> | |
| 166 | + <entry>area that is currently cropped by hardware</entry> | |
| 167 | + </row> | |
| 168 | + <row> | |
| 169 | + <entry><constant>V4L2_SEL_TGT_CROP_DEFAULT</constant></entry> | |
| 170 | + <entry>1</entry> | |
| 171 | + <entry>suggested cropping rectangle that covers the "whole picture"</entry> | |
| 172 | + </row> | |
| 173 | + <row> | |
| 174 | + <entry><constant>V4L2_SEL_TGT_CROP_BOUNDS</constant></entry> | |
| 175 | + <entry>2</entry> | |
| 176 | + <entry>limits for the cropping rectangle</entry> | |
| 177 | + </row> | |
| 178 | + <row> | |
| 179 | + <entry><constant>V4L2_SEL_TGT_COMPOSE_ACTIVE</constant></entry> | |
| 180 | + <entry>256</entry> | |
| 181 | + <entry>area to which data are composed by hardware</entry> | |
| 182 | + </row> | |
| 183 | + <row> | |
| 184 | + <entry><constant>V4L2_SEL_TGT_COMPOSE_DEFAULT</constant></entry> | |
| 185 | + <entry>257</entry> | |
| 186 | + <entry>suggested composing rectangle that covers the "whole picture"</entry> | |
| 187 | + </row> | |
| 188 | + <row> | |
| 189 | + <entry><constant>V4L2_SEL_TGT_COMPOSE_BOUNDS</constant></entry> | |
| 190 | + <entry>258</entry> | |
| 191 | + <entry>limits for the composing rectangle</entry> | |
| 192 | + </row> | |
| 193 | + <row> | |
| 194 | + <entry><constant>V4L2_SEL_TGT_COMPOSE_PADDED</constant></entry> | |
| 195 | + <entry>259</entry> | |
| 196 | + <entry>the active area and all padding pixels that are inserted or modified by the hardware</entry> | |
| 197 | + </row> | |
| 198 | + </tbody> | |
| 199 | + </tgroup> | |
| 200 | + </table> | |
| 201 | + </refsect1> | |
| 202 | + | |
| 203 | + <refsect1> | |
| 204 | + <table frame="none" pgwide="1" id="v4l2-sel-flags"> | |
| 205 | + <title>Selection constraint flags</title> | |
| 206 | + <tgroup cols="3"> | |
| 207 | + &cs-def; | |
| 208 | + <tbody valign="top"> | |
| 209 | + <row> | |
| 210 | + <entry><constant>V4L2_SEL_FLAG_GE</constant></entry> | |
| 211 | + <entry>0x00000001</entry> | |
| 212 | + <entry>indicate that adjusted rectangle must contain a rectangle from <structfield>&v4l2-selection;::r</structfield></entry> | |
| 213 | + </row> | |
| 214 | + <row> | |
| 215 | + <entry><constant>V4L2_SEL_FLAG_LE</constant></entry> | |
| 216 | + <entry>0x00000002</entry> | |
| 217 | + <entry>indicate that adjusted rectangle must be inside a rectangle from <structfield>&v4l2-selection;::r</structfield></entry> | |
| 218 | + </row> | |
| 219 | + </tbody> | |
| 220 | + </tgroup> | |
| 221 | + </table> | |
| 222 | + </refsect1> | |
| 223 | + | |
| 224 | + <section> | |
| 225 | + <figure id="sel-const-adjust"> | |
| 226 | + <title>Size adjustments with constraint flags.</title> | |
| 227 | + <mediaobject> | |
| 228 | + <imageobject> | |
| 229 | + <imagedata fileref="constraints.png" format="PNG" /> | |
| 230 | + </imageobject> | |
| 231 | + <textobject> | |
| 232 | + <phrase>Behaviour of rectangle adjustment for different constraint | |
| 233 | + flags.</phrase> | |
| 234 | + </textobject> | |
| 235 | + </mediaobject> | |
| 236 | + </figure> | |
| 237 | + </section> | |
| 238 | + | |
| 239 | + <refsect1> | |
| 240 | + <table pgwide="1" frame="none" id="v4l2-selection"> | |
| 241 | + <title>struct <structname>v4l2_selection</structname></title> | |
| 242 | + <tgroup cols="3"> | |
| 243 | + &cs-str; | |
| 244 | + <tbody valign="top"> | |
| 245 | + <row> | |
| 246 | + <entry>__u32</entry> | |
| 247 | + <entry><structfield>type</structfield></entry> | |
| 248 | + <entry>Type of the buffer (from &v4l2-buf-type;)</entry> | |
| 249 | + </row> | |
| 250 | + <row> | |
| 251 | + <entry>__u32</entry> | |
| 252 | + <entry><structfield>target</structfield></entry> | |
| 253 | + <entry>used to select between <link linkend="v4l2-sel-target"> cropping and composing rectangles </link></entry> | |
| 254 | + </row> | |
| 255 | + <row> | |
| 256 | + <entry>__u32</entry> | |
| 257 | + <entry><structfield>flags</structfield></entry> | |
| 258 | + <entry>control over coordinates adjustments, refer to <link linkend="v4l2-sel-flags">selection flags</link></entry> | |
| 259 | + </row> | |
| 260 | + <row> | |
| 261 | + <entry>&v4l2-rect;</entry> | |
| 262 | + <entry><structfield>r</structfield></entry> | |
| 263 | + <entry>selection rectangle</entry> | |
| 264 | + </row> | |
| 265 | + <row> | |
| 266 | + <entry>__u32</entry> | |
| 267 | + <entry><structfield>reserved[9]</structfield></entry> | |
| 268 | + <entry>Reserved fields for future use</entry> | |
| 269 | + </row> | |
| 270 | + </tbody> | |
| 271 | + </tgroup> | |
| 272 | + </table> | |
| 273 | + </refsect1> | |
| 274 | + | |
| 275 | + <refsect1> | |
| 276 | + &return-value; | |
| 277 | + <variablelist> | |
| 278 | + <varlistentry> | |
| 279 | + <term><errorcode>EINVAL</errorcode></term> | |
| 280 | + <listitem> | |
| 281 | + <para>The buffer <structfield> &v4l2-selection;::type </structfield> | |
| 282 | +or <structfield> &v4l2-selection;::target </structfield> is not supported, or | |
| 283 | +the <structfield> &v4l2-selection;::flags </structfield> are invalid.</para> | |
| 284 | + </listitem> | |
| 285 | + </varlistentry> | |
| 286 | + <varlistentry> | |
| 287 | + <term><errorcode>ERANGE</errorcode></term> | |
| 288 | + <listitem> | |
| 289 | + <para>it is not possible to adjust a rectangle <structfield> | |
| 290 | +&v4l2-selection;::r </structfield> that satisfies all contraints from | |
| 291 | +<structfield> &v4l2-selection;::flags </structfield>.</para> | |
| 292 | + </listitem> | |
| 293 | + </varlistentry> | |
| 294 | + <varlistentry> | |
| 295 | + <term><errorcode>EBUSY</errorcode></term> | |
| 296 | + <listitem> | |
| 297 | + <para>it is not possible to apply change of selection rectangle at the moment. | |
| 298 | +Usually because streaming is in progress.</para> | |
| 299 | + </listitem> | |
| 300 | + </varlistentry> | |
| 301 | + </variablelist> | |
| 302 | + </refsect1> | |
| 303 | + | |
| 304 | +</refentry> | |
| @@ -88,11 +88,3 @@ standards.</para> · 87 unmodified lines | ||
| 88 | 88 | </variablelist> |
| 89 | 89 | </refsect1> |
| 90 | 90 | </refentry> |
| 91 | − | |
| 92 | −<!-- | |
| 93 | −Local Variables: | |
| 94 | −mode: sgml | |
| 95 | −sgml-parent-document: "v4l2.sgml" | |
| 96 | −indent-tabs-mode: nil | |
| 97 | −End: | |
| 98 | −--> | |
| @@ -318,6 +318,16 @@ standard.</para><!-- FIXME what if PAL+NTSC and Bi but not SAP? --></entry> · 317 unmodified lines | ||
| 318 | 318 | <entry>RDS capture is supported. This capability is only valid for |
| 319 | 319 | radio tuners.</entry> |
| 320 | 320 | </row> |
| 321 | + <row> | |
| 322 | + <entry><constant>V4L2_TUNER_CAP_RDS_BLOCK_IO</constant></entry> | |
| 323 | + <entry>0x0100</entry> | |
| 324 | + <entry>The RDS data is passed as unparsed RDS blocks.</entry> | |
| 325 | + </row> | |
| 326 | + <row> | |
| 327 | + <entry><constant>V4L2_TUNER_CAP_RDS_CONTROLS</constant></entry> | |
| 328 | + <entry>0x0200</entry> | |
| 329 | + <entry>The RDS data is parsed by the hardware and set via controls.</entry> | |
| 330 | + </row> | |
| 321 | 331 | </tbody> |
| 322 | 332 | </tgroup> |
| 323 | 333 | </table> |
| @@ -525,11 +535,3 @@ out of bounds.</para> · 201 unmodified lines | ||
| 525 | 535 | </variablelist> |
| 526 | 536 | </refsect1> |
| 527 | 537 | </refentry> |
| 528 | − | |
| 529 | −<!-- | |
| 530 | −Local Variables: | |
| 531 | −mode: sgml | |
| 532 | −sgml-parent-document: "v4l2.sgml" | |
| 533 | −indent-tabs-mode: nil | |
| 534 | −End: | |
| 535 | −--> | |
| @@ -100,11 +100,3 @@ supported, or the <structfield>index</structfield> is out of bounds.</para> · 99 unmodified lines | ||
| 100 | 100 | </variablelist> |
| 101 | 101 | </refsect1> |
| 102 | 102 | </refentry> |
| 103 | − | |
| 104 | −<!-- | |
| 105 | −Local Variables: | |
| 106 | −mode: sgml | |
| 107 | −sgml-parent-document: "v4l2.sgml" | |
| 108 | −indent-tabs-mode: nil | |
| 109 | −End: | |
| 110 | −--> | |
| @@ -443,11 +443,3 @@ or this particular menu item is not supported by the driver.</para> · 442 unmodified lines | ||
| 443 | 443 | </variablelist> |
| 444 | 444 | </refsect1> |
| 445 | 445 | </refentry> |
| 446 | − | |
| 447 | −<!-- | |
| 448 | −Local Variables: | |
| 449 | −mode: sgml | |
| 450 | −sgml-parent-document: "v4l2.sgml" | |
| 451 | −indent-tabs-mode: nil | |
| 452 | −End: | |
| 453 | −--> | |
| @@ -125,11 +125,3 @@ wrong.</para> · 124 unmodified lines | ||
| 125 | 125 | </variablelist> |
| 126 | 126 | </refsect1> |
| 127 | 127 | </refentry> |
| 128 | − | |
| 129 | −<!-- | |
| 130 | −Local Variables: | |
| 131 | −mode: sgml | |
| 132 | −sgml-parent-document: "v4l2.sgml" | |
| 133 | −indent-tabs-mode: nil | |
| 134 | −End: | |
| 135 | −--> | |
| @@ -404,7 +404,7 @@ · 403 unmodified lines | ||
| 404 | 404 | /* SNDRV_CARDS: maximum number of cards supported by this module */ |
| 405 | 405 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; |
| 406 | 406 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; |
| 407 | − static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | |
| 407 | + static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; | |
| 408 | 408 | |
| 409 | 409 | /* definition of the chip-specific record */ |
| 410 | 410 | struct mychip { |
| @@ -275,8 +275,8 @@ versions. · 274 unmodified lines | ||
| 275 | 275 | If no 2.6.x.y kernel is available, then the highest numbered 2.6.x |
| 276 | 276 | kernel is the current stable kernel. |
| 277 | 277 | |
| 278 | −2.6.x.y are maintained by the "stable" team <stable@kernel.org>, and are | |
| 279 | −released as needs dictate. The normal release period is approximately | |
| 278 | +2.6.x.y are maintained by the "stable" team <stable@vger.kernel.org>, and | |
| 279 | +are released as needs dictate. The normal release period is approximately | |
| 280 | 280 | two weeks, but it can be longer if there are no pressing problems. A |
| 281 | 281 | security-related problem, instead, can cause a release to happen almost |
| 282 | 282 | instantly. |
| @@ -47,20 +47,53 @@ directory apei/einj. The following files are provided. · 46 unmodified lines | ||
| 47 | 47 | |
| 48 | 48 | - param1 |
| 49 | 49 | This file is used to set the first error parameter value. Effect of |
| 50 | − parameter depends on error_type specified. For memory error, this is | |
| 51 | − physical memory address. Only available if param_extension module | |
| 52 | − parameter is specified. | |
| 50 | + parameter depends on error_type specified. | |
| 53 | 51 | |
| 54 | 52 | - param2 |
| 55 | 53 | This file is used to set the second error parameter value. Effect of |
| 56 | − parameter depends on error_type specified. For memory error, this is | |
| 57 | − physical memory address mask. Only available if param_extension | |
| 58 | − module parameter is specified. | |
| 54 | + parameter depends on error_type specified. | |
| 55 | + | |
| 56 | +BIOS versions based in the ACPI 4.0 specification have limited options | |
| 57 | +to control where the errors are injected. Your BIOS may support an | |
| 58 | +extension (enabled with the param_extension=1 module parameter, or | |
| 59 | +boot command line einj.param_extension=1). This allows the address | |
| 60 | +and mask for memory injections to be specified by the param1 and | |
| 61 | +param2 files in apei/einj. | |
| 62 | + | |
| 63 | +BIOS versions using the ACPI 5.0 specification have more control over | |
| 64 | +the target of the injection. For processor related errors (type 0x1, | |
| 65 | +0x2 and 0x4) the APICID of the target should be provided using the | |
| 66 | +param1 file in apei/einj. For memory errors (type 0x8, 0x10 and 0x20) | |
| 67 | +the address is set using param1 with a mask in param2 (0x0 is equivalent | |
| 68 | +to all ones). For PCI express errors (type 0x40, 0x80 and 0x100) the | |
| 69 | +segment, bus, device and function are specified using param1: | |
| 70 | + | |
| 71 | + 31 24 23 16 15 11 10 8 7 0 | |
| 72 | + +-------------------------------------------------+ | |
| 73 | + | segment | bus | device | function | reserved | | |
| 74 | + +-------------------------------------------------+ | |
| 75 | + | |
| 76 | +An ACPI 5.0 BIOS may also allow vendor specific errors to be injected. | |
| 77 | +In this case a file named vendor will contain identifying information | |
| 78 | +from the BIOS that hopefully will allow an application wishing to use | |
| 79 | +the vendor specific extension to tell that they are running on a BIOS | |
| 80 | +that supports it. All vendor extensions have the 0x80000000 bit set in | |
| 81 | +error_type. A file vendor_flags controls the interpretation of param1 | |
| 82 | +and param2 (1 = PROCESSOR, 2 = MEMORY, 4 = PCI). See your BIOS vendor | |
| 83 | +documentation for details (and expect changes to this API if vendors | |
| 84 | +creativity in using this feature expands beyond our expectations). | |
| 85 | + | |
| 86 | +Example: | |
| 87 | +# cd /sys/kernel/debug/apei/einj | |
| 88 | +# cat available_error_type # See which errors can be injected | |
| 89 | +0x00000002 Processor Uncorrectable non-fatal | |
| 90 | +0x00000008 Memory Correctable | |
| 91 | +0x00000010 Memory Uncorrectable non-fatal | |
| 92 | +# echo 0x12345000 > param1 # Set memory address for injection | |
| 93 | +# echo 0xfffffffffffff000 > param2 # Mask - anywhere in this page | |
| 94 | +# echo 0x8 > error_type # Choose correctable memory error | |
| 95 | +# echo 1 > error_inject # Inject now | |
| 59 | 96 | |
| 60 | −Injecting parameter support is a BIOS version specific extension, that | |
| 61 | −is, it only works on some BIOS version. If you want to use it, please | |
| 62 | −make sure your BIOS version has the proper support and specify | |
| 63 | −"param_extension=y" in module parameter. | |
| 64 | 97 | |
| 65 | 98 | For more information about EINJ, please refer to ACPI specification |
| 66 | −version 4.0, section 17.5. | |
| 99 | +version 4.0, section 17.5 and ACPI 5.0, section 18.6. | |
| @@ -51,15 +51,14 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned · 50 unmodified lines | ||
| 51 | 51 | ff000000 ffbfffff Reserved for future expansion of DMA |
| 52 | 52 | mapping region. |
| 53 | 53 | |
| 54 | −VMALLOC_END feffffff Free for platform use, recommended. | |
| 55 | − VMALLOC_END must be aligned to a 2MB | |
| 56 | − boundary. | |
| 57 | − | |
| 58 | 54 | VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space. |
| 59 | 55 | Memory returned by vmalloc/ioremap will |
| 60 | 56 | be dynamically placed in this region. |
| 61 | − VMALLOC_START may be based upon the value | |
| 62 | − of the high_memory variable. | |
| 57 | + Machine specific static mappings are also | |
| 58 | + located here through iotable_init(). | |
| 59 | + VMALLOC_START is based upon the value | |
| 60 | + of the high_memory variable, and VMALLOC_END | |
| 61 | + is equal to 0xff000000. | |
| 63 | 62 | |
| 64 | 63 | PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region. |
| 65 | 64 | This maps the platforms RAM, and typically |
| @@ -594,53 +594,44 @@ rmdir() will fail with it. From this behavior, pre_destroy() can be · 593 unmodified lines | ||
| 594 | 594 | called multiple times against a cgroup. |
| 595 | 595 | |
| 596 | 596 | int can_attach(struct cgroup_subsys *ss, struct cgroup *cgrp, |
| 597 | − struct task_struct *task) | |
| 597 | + struct cgroup_taskset *tset) | |
| 598 | 598 | (cgroup_mutex held by caller) |
| 599 | 599 | |
| 600 | −Called prior to moving a task into a cgroup; if the subsystem | |
| 601 | −returns an error, this will abort the attach operation. If a NULL | |
| 602 | −task is passed, then a successful result indicates that *any* | |
| 603 | −unspecified task can be moved into the cgroup. Note that this isn't | |
| 604 | −called on a fork. If this method returns 0 (success) then this should | |
| 605 | −remain valid while the caller holds cgroup_mutex and it is ensured that either | |
| 600 | +Called prior to moving one or more tasks into a cgroup; if the | |
| 601 | +subsystem returns an error, this will abort the attach operation. | |
| 602 | +@tset contains the tasks to be attached and is guaranteed to have at | |
| 603 | +least one task in it. | |
| 604 | + | |
| 605 | +If there are multiple tasks in the taskset, then: | |
| 606 | + - it's guaranteed that all are from the same thread group | |
| 607 | + - @tset contains all tasks from the thread group whether or not | |
| 608 | + they're switching cgroups | |
| 609 | + - the first task is the leader | |
| 610 | + | |
| 611 | +Each @tset entry also contains the task's old cgroup and tasks which | |
| 612 | +aren't switching cgroup can be skipped easily using the | |
| 613 | +cgroup_taskset_for_each() iterator. Note that this isn't called on a | |
| 614 | +fork. If this method returns 0 (success) then this should remain valid | |
| 615 | +while the caller holds cgroup_mutex and it is ensured that either | |
| 606 | 616 | attach() or cancel_attach() will be called in future. |
| 607 | 617 | |
| 608 | −int can_attach_task(struct cgroup *cgrp, struct task_struct *tsk); | |
| 609 | −(cgroup_mutex held by caller) | |
| 610 | − | |
| 611 | −As can_attach, but for operations that must be run once per task to be | |
| 612 | −attached (possibly many when using cgroup_attach_proc). Called after | |
| 613 | −can_attach. | |
| 614 | − | |
| 615 | 618 | void cancel_attach(struct cgroup_subsys *ss, struct cgroup *cgrp, |
| 616 | − struct task_struct *task, bool threadgroup) | |
| 619 | + struct cgroup_taskset *tset) | |
| 617 | 620 | (cgroup_mutex held by caller) |
| 618 | 621 | |
| 619 | 622 | Called when a task attach operation has failed after can_attach() has succeeded. |
| 620 | 623 | A subsystem whose can_attach() has some side-effects should provide this |
| 621 | 624 | function, so that the subsystem can implement a rollback. If not, not necessary. |
| 622 | 625 | This will be called only about subsystems whose can_attach() operation have |
| 623 | −succeeded. | |
| 624 | − | |
| 625 | −void pre_attach(struct cgroup *cgrp); | |
| 626 | −(cgroup_mutex held by caller) | |
| 627 | − | |
| 628 | −For any non-per-thread attachment work that needs to happen before | |
| 629 | −attach_task. Needed by cpuset. | |
| 626 | +succeeded. The parameters are identical to can_attach(). | |
| 630 | 627 | |
| 631 | 628 | void attach(struct cgroup_subsys *ss, struct cgroup *cgrp, |
| 632 | − struct cgroup *old_cgrp, struct task_struct *task) | |
| 629 | + struct cgroup_taskset *tset) | |
| 633 | 630 | (cgroup_mutex held by caller) |
| 634 | 631 | |
| 635 | 632 | Called after the task has been attached to the cgroup, to allow any |
| 636 | 633 | post-attachment activity that requires memory allocations or blocking. |
| 637 | − | |
| 638 | −void attach_task(struct cgroup *cgrp, struct task_struct *tsk); | |
| 639 | −(cgroup_mutex held by caller) | |
| 640 | − | |
| 641 | −As attach, but for operations that must be run once per task to be attached, | |
| 642 | −like can_attach_task. Called before attach. Currently does not support any | |
| 643 | −subsystem that might need the old_cgrp for every thread in the group. | |
| 634 | +The parameters are identical to can_attach(). | |
| 644 | 635 | |
| 645 | 636 | void fork(struct cgroup_subsy *ss, struct task_struct *task) |
| 646 | 637 | |
| @@ -44,8 +44,8 @@ Features: · 43 unmodified lines | ||
| 44 | 44 | - oom-killer disable knob and oom-notifier |
| 45 | 45 | - Root cgroup has no limit controls. |
| 46 | 46 | |
| 47 | − Kernel memory and Hugepages are not under control yet. We just manage | |
| 48 | − pages on LRU. To add more controls, we have to take care of performance. | |
| 47 | + Kernel memory support is work in progress, and the current version provides | |
| 48 | + basically functionality. (See Section 2.7) | |
| 49 | 49 | |
| 50 | 50 | Brief summary of control files. |
| 51 | 51 | |
| @@ -61,7 +61,7 @@ Brief summary of control files. · 9 unmodified lines | ||
| 61 | 61 | memory.failcnt # show the number of memory usage hits limits |
| 62 | 62 | memory.memsw.failcnt # show the number of memory+Swap hits limits |
| 63 | 63 | memory.max_usage_in_bytes # show max memory usage recorded |
| 64 | − memory.memsw.usage_in_bytes # show max memory+Swap usage recorded | |
| 64 | + memory.memsw.max_usage_in_bytes # show max memory+Swap usage recorded | |
| 65 | 65 | memory.soft_limit_in_bytes # set/show soft limit of memory usage |
| 66 | 66 | memory.stat # show various statistics |
| 67 | 67 | memory.use_hierarchy # set/show hierarchical account enabled |
| @@ -72,6 +72,9 @@ Brief summary of control files. · 4 unmodified lines | ||
| 72 | 72 | memory.oom_control # set/show oom controls. |
| 73 | 73 | memory.numa_stat # show the number of memory usage per numa node |
| 74 | 74 | |
| 75 | + memory.kmem.tcp.limit_in_bytes # set/show hard limit for tcp buf memory | |
| 76 | + memory.kmem.tcp.usage_in_bytes # show current tcp buf memory allocation | |
| 77 | + | |
| 75 | 78 | 1. History |
| 76 | 79 | |
| 77 | 80 | The memory controller has a long history. A request for comments for the memory |
| @@ -255,6 +258,27 @@ When oom event notifier is registered, event will be delivered. · 177 unmodified lines | ||
| 255 | 258 | per-zone-per-cgroup LRU (cgroup's private LRU) is just guarded by |
| 256 | 259 | zone->lru_lock, it has no lock of its own. |
| 257 | 260 | |
| 261 | +2.7 Kernel Memory Extension (CONFIG_CGROUP_MEM_RES_CTLR_KMEM) | |
| 262 | + | |
| 263 | +With the Kernel memory extension, the Memory Controller is able to limit | |
| 264 | +the amount of kernel memory used by the system. Kernel memory is fundamentally | |
| 265 | +different than user memory, since it can't be swapped out, which makes it | |
| 266 | +possible to DoS the system by consuming too much of this precious resource. | |
| 267 | + | |
| 268 | +Kernel memory limits are not imposed for the root cgroup. Usage for the root | |
| 269 | +cgroup may or may not be accounted. | |
| 270 | + | |
| 271 | +Currently no soft limit is implemented for kernel memory. It is future work | |
| 272 | +to trigger slab reclaim when those limits are reached. | |
| 273 | + | |
| 274 | +2.7.1 Current Kernel Memory resources accounted | |
| 275 | + | |
| 276 | +* sockets memory pressure: some sockets protocols have memory pressure | |
| 277 | +thresholds. The Memory Controller allows them to be controlled individually | |
| 278 | +per cgroup, instead of globally. | |
| 279 | + | |
| 280 | +* tcp memory pressure: sockets memory pressure for the tcp protocol. | |
| 281 | + | |
| 258 | 282 | 3. User Interface |
| 259 | 283 | |
| 260 | 284 | 0. Configuration |
| @@ -386,8 +410,11 @@ memory.stat file includes following statistics · 125 unmodified lines | ||
| 386 | 410 | cache - # of bytes of page cache memory. |
| 387 | 411 | rss - # of bytes of anonymous and swap cache memory. |
| 388 | 412 | mapped_file - # of bytes of mapped file (includes tmpfs/shmem) |
| 389 | −pgpgin - # of pages paged in (equivalent to # of charging events). | |
| 390 | −pgpgout - # of pages paged out (equivalent to # of uncharging events). | |
| 413 | +pgpgin - # of charging events to the memory cgroup. The charging | |
| 414 | + event happens each time a page is accounted as either mapped | |
| 415 | + anon page(RSS) or cache page(Page Cache) to the cgroup. | |
| 416 | +pgpgout - # of uncharging events to the memory cgroup. The uncharging | |
| 417 | + event happens each time a page is unaccounted from the cgroup. | |
| 391 | 418 | swap - # of bytes of swap usage |
| 392 | 419 | inactive_anon - # of bytes of anonymous memory and swap cache memory on |
| 393 | 420 | LRU list. |
| @@ -0,0 +1,53 @@ | ||
| 1 | +Network priority cgroup | |
| 2 | +------------------------- | |
| 3 | + | |
| 4 | +The Network priority cgroup provides an interface to allow an administrator to | |
| 5 | +dynamically set the priority of network traffic generated by various | |
| 6 | +applications | |
| 7 | + | |
| 8 | +Nominally, an application would set the priority of its traffic via the | |
| 9 | +SO_PRIORITY socket option. This however, is not always possible because: | |
| 10 | + | |
| 11 | +1) The application may not have been coded to set this value | |
| 12 | +2) The priority of application traffic is often a site-specific administrative | |
| 13 | + decision rather than an application defined one. | |
| 14 | + | |
| 15 | +This cgroup allows an administrator to assign a process to a group which defines | |
| 16 | +the priority of egress traffic on a given interface. Network priority groups can | |
| 17 | +be created by first mounting the cgroup filesystem. | |
| 18 | + | |
| 19 | +# mount -t cgroup -onet_prio none /sys/fs/cgroup/net_prio | |
| 20 | + | |
| 21 | +With the above step, the initial group acting as the parent accounting group | |
| 22 | +becomes visible at '/sys/fs/cgroup/net_prio'. This group includes all tasks in | |
| 23 | +the system. '/sys/fs/cgroup/net_prio/tasks' lists the tasks in this cgroup. | |
| 24 | + | |
| 25 | +Each net_prio cgroup contains two files that are subsystem specific | |
| 26 | + | |
| 27 | +net_prio.prioidx | |
| 28 | +This file is read-only, and is simply informative. It contains a unique integer | |
| 29 | +value that the kernel uses as an internal representation of this cgroup. | |
| 30 | + | |
| 31 | +net_prio.ifpriomap | |
| 32 | +This file contains a map of the priorities assigned to traffic originating from | |
| 33 | +processes in this group and egressing the system on various interfaces. It | |
| 34 | +contains a list of tuples in the form <ifname priority>. Contents of this file | |
| 35 | +can be modified by echoing a string into the file using the same tuple format. | |
| 36 | +for example: | |
| 37 | + | |
| 38 | +echo "eth0 5" > /sys/fs/cgroups/net_prio/iscsi/net_prio.ifpriomap | |
| 39 | + | |
| 40 | +This command would force any traffic originating from processes belonging to the | |
| 41 | +iscsi net_prio cgroup and egressing on interface eth0 to have the priority of | |
| 42 | +said traffic set to the value 5. The parent accounting group also has a | |
| 43 | +writeable 'net_prio.ifpriomap' file that can be used to set a system default | |
| 44 | +priority. | |
| 45 | + | |
| 46 | +Priorities are set immediately prior to queueing a frame to the device | |
| 47 | +queueing discipline (qdisc) so priorities will be assigned prior to the hardware | |
| 48 | +queue selection being made. | |
| 49 | + | |
| 50 | +One usage for the net_prio cgroup is with mqprio qdisc allowing application | |
| 51 | +traffic to be steered to hardware/driver based traffic classes. These mappings | |
| 52 | +can then be managed by administrators or other networking protocols such as | |
| 53 | +DCBX. | |
| @@ -102,9 +102,15 @@ or · 101 unmodified lines | ||
| 102 | 102 | make coccicheck COCCI=<my_SP.cocci> MODE=report |
| 103 | 103 | |
| 104 | 104 | |
| 105 | − Using Coccinelle on (modified) files | |
| 106 | −~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 105 | + Controlling Which Files are Processed by Coccinelle | |
| 106 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 107 | +By default the entire kernel source tree is checked. | |
| 108 | + | |
| 109 | +To apply Coccinelle to a specific directory, M= can be used. | |
| 110 | +For example, to check drivers/net/wireless/ one may write: | |
| 107 | 111 | |
| 112 | + make coccicheck M=drivers/net/wireless/ | |
| 113 | + | |
| 108 | 114 | To apply Coccinelle on a file basis, instead of a directory basis, the |
| 109 | 115 | following command may be used: |
| 110 | 116 | |
| @@ -127,7 +127,7 @@ in the bash (as said, 1000 is default), do: · 126 unmodified lines | ||
| 127 | 127 | echo `$(($(cat cpuinfo_transition_latency) * 750 / 1000)) \ |
| 128 | 128 | >ondemand/sampling_rate |
| 129 | 129 | |
| 130 | −show_sampling_rate_min: | |
| 130 | +sampling_rate_min: | |
| 131 | 131 | The sampling rate is limited by the HW transition latency: |
| 132 | 132 | transition_latency * 100 |
| 133 | 133 | Or by kernel restrictions: |
| @@ -140,8 +140,6 @@ HZ=100: min=200000us (200ms) · 6 unmodified lines | ||
| 140 | 140 | The highest value of kernel and HW latency restrictions is shown and |
| 141 | 141 | used as the minimum sampling rate. |
| 142 | 142 | |
| 143 | −show_sampling_rate_max: THIS INTERFACE IS DEPRECATED, DON'T USE IT. | |
| 144 | − | |
| 145 | 143 | up_threshold: defines what the average CPU usage between the samplings |
| 146 | 144 | of 'sampling_rate' needs to be for the kernel to make a decision on |
| 147 | 145 | whether it should increase the frequency. For example when it is set |
| @@ -271,10 +271,10 @@ copies should go to: · 270 unmodified lines | ||
| 271 | 271 | the linux-kernel list. |
| 272 | 272 | |
| 273 | 273 | - If you are fixing a bug, think about whether the fix should go into the |
| 274 | − next stable update. If so, stable@kernel.org should get a copy of the | |
| 275 | − patch. Also add a "Cc: stable@kernel.org" to the tags within the patch | |
| 276 | − itself; that will cause the stable team to get a notification when your | |
| 277 | − fix goes into the mainline. | |
| 274 | + next stable update. If so, stable@vger.kernel.org should get a copy of | |
| 275 | + the patch. Also add a "Cc: stable@vger.kernel.org" to the tags within | |
| 276 | + the patch itself; that will cause the stable team to get a notification | |
| 277 | + when your fix goes into the mainline. | |
| 278 | 278 | |
| 279 | 279 | When selecting recipients for a patch, it is good to have an idea of who |
| 280 | 280 | you think will eventually accept the patch and get it merged. While it |
| @@ -379,7 +379,7 @@ Your cooperation is appreciated. · 378 unmodified lines | ||
| 379 | 379 | 162 = /dev/smbus System Management Bus |
| 380 | 380 | 163 = /dev/lik Logitech Internet Keyboard |
| 381 | 381 | 164 = /dev/ipmo Intel Intelligent Platform Management |
| 382 | − 165 = /dev/vmmon VMWare virtual machine monitor | |
| 382 | + 165 = /dev/vmmon VMware virtual machine monitor | |
| 383 | 383 | 166 = /dev/i2o/ctl I2O configuration manager |
| 384 | 384 | 167 = /dev/specialix_sxctl Specialix serial control |
| 385 | 385 | 168 = /dev/tcldrv Technology Concepts serial control |
| @@ -447,6 +447,9 @@ Your cooperation is appreciated. · 61 unmodified lines | ||
| 447 | 447 | 234 = /dev/btrfs-control Btrfs control device |
| 448 | 448 | 235 = /dev/autofs Autofs control device |
| 449 | 449 | 236 = /dev/mapper/control Device-Mapper control device |
| 450 | + 237 = /dev/loop-control Loopback control device | |
| 451 | + 238 = /dev/vhost-net Host kernel accelerator for virtio net | |
| 452 | + | |
| 450 | 453 | 240-254 Reserved for local use |
| 451 | 454 | 255 Reserved for MISC_DYNAMIC_MINOR |
| 452 | 455 | |
| @@ -21,6 +21,10 @@ i.MX53 Smart Mobile Reference Design Board · 20 unmodified lines | ||
| 21 | 21 | Required root node properties: |
| 22 | 22 | - compatible = "fsl,imx53-smd", "fsl,imx53"; |
| 23 | 23 | |
| 24 | −i.MX6 Quad SABRE Automotive Board | |
| 24 | +i.MX6 Quad Armadillo2 Board | |
| 25 | 25 | Required root node properties: |
| 26 | − - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; | |
| 26 | + - compatible = "fsl,imx6q-arm2", "fsl,imx6q"; | |
| 27 | + | |
| 28 | +i.MX6 Quad SABRE Lite Board | |
| 29 | +Required root node properties: | |
| 30 | + - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q"; | |
| @@ -42,6 +42,10 @@ Optional · 41 unmodified lines | ||
| 42 | 42 | - interrupts : Interrupt source of the parent interrupt controller. Only |
| 43 | 43 | present on secondary GICs. |
| 44 | 44 | |
| 45 | +- cpu-offset : per-cpu offset within the distributor and cpu interface | |
| 46 | + regions, used when the GIC doesn't have banked registers. The offset is | |
| 47 | + cpu-offset * cpu-nr. | |
| 48 | + | |
| 45 | 49 | Example: |
| 46 | 50 | |
| 47 | 51 | intc: interrupt-controller@fff11000 { |
| @@ -0,0 +1,8 @@ | ||
| 1 | +* Insignal's Exynos4210 based Origen evaluation board | |
| 2 | + | |
| 3 | +Origen low-cost evaluation board is based on Samsung's Exynos4210 SoC. | |
| 4 | + | |
| 5 | +Required root node properties: | |
| 6 | + - compatible = should be one or more of the following. | |
| 7 | + (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board. | |
| 8 | + (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC. | |
| @@ -0,0 +1,8 @@ | ||
| 1 | +* Samsung's Exynos4210 based SMDKV310 evaluation board | |
| 2 | + | |
| 3 | +SMDKV310 evaluation board is based on Samsung's Exynos4210 SoC. | |
| 4 | + | |
| 5 | +Required root node properties: | |
| 6 | + - compatible = should be one or more of the following. | |
| 7 | + (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board. | |
| 8 | + (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC. | |
| @@ -0,0 +1,14 @@ | ||
| 1 | +NVIDIA Tegra device tree bindings | |
| 2 | +------------------------------------------- | |
| 3 | + | |
| 4 | +Boards with the tegra20 SoC shall have the following properties: | |
| 5 | + | |
| 6 | +Required root node property: | |
| 7 | + | |
| 8 | +compatible = "nvidia,tegra20"; | |
| 9 | + | |
| 10 | +Boards with the tegra30 SoC shall have the following properties: | |
| 11 | + | |
| 12 | +Required root node property: | |
| 13 | + | |
| 14 | +compatible = "nvidia,tegra30"; | |
| @@ -0,0 +1,29 @@ | ||
| 1 | +* ARM Vectored Interrupt Controller | |
| 2 | + | |
| 3 | +One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM | |
| 4 | +system for interrupt routing. For multiple controllers they can either be | |
| 5 | +nested or have the outputs wire-OR'd together. | |
| 6 | + | |
| 7 | +Required properties: | |
| 8 | + | |
| 9 | +- compatible : should be one of | |
| 10 | + "arm,pl190-vic" | |
| 11 | + "arm,pl192-vic" | |
| 12 | +- interrupt-controller : Identifies the node as an interrupt controller | |
| 13 | +- #interrupt-cells : The number of cells to define the interrupts. Must be 1 as | |
| 14 | + the VIC has no configuration options for interrupt sources. The cell is a u32 | |
| 15 | + and defines the interrupt number. | |
| 16 | +- reg : The register bank for the VIC. | |
| 17 | + | |
| 18 | +Optional properties: | |
| 19 | + | |
| 20 | +- interrupts : Interrupt source for parent controllers if the VIC is nested. | |
| 21 | + | |
| 22 | +Example: | |
| 23 | + | |
| 24 | + vic0: interrupt-controller@60000 { | |
| 25 | + compatible = "arm,pl192-vic"; | |
| 26 | + interrupt-controller; | |
| 27 | + #interrupt-cells = <1>; | |
| 28 | + reg = <0x60000 0x1000>; | |
| 29 | + }; | |
| @@ -0,0 +1,40 @@ | ||
| 1 | +C6X PLL Clock Controllers | |
| 2 | +------------------------- | |
| 3 | + | |
| 4 | +This is a first-cut support for the SoC clock controllers. This is still | |
| 5 | +under development and will probably change as the common device tree | |
| 6 | +clock support is added to the kernel. | |
| 7 | + | |
| 8 | +Required properties: | |
| 9 | + | |
| 10 | +- compatible: "ti,c64x+pll" | |
| 11 | + May also have SoC-specific value to support SoC-specific initialization | |
| 12 | + in the driver. One of: | |
| 13 | + "ti,c6455-pll" | |
| 14 | + "ti,c6457-pll" | |
| 15 | + "ti,c6472-pll" | |
| 16 | + "ti,c6474-pll" | |
| 17 | + | |
| 18 | +- reg: base address and size of register area | |
| 19 | +- clock-frequency: input clock frequency in hz | |
| 20 | + | |
| 21 | + | |
| 22 | +Optional properties: | |
| 23 | + | |
| 24 | +- ti,c64x+pll-bypass-delay: CPU cycles to delay when entering bypass mode | |
| 25 | + | |
| 26 | +- ti,c64x+pll-reset-delay: CPU cycles to delay after PLL reset | |
| 27 | + | |
| 28 | +- ti,c64x+pll-lock-delay: CPU cycles to delay after PLL frequency change | |
| 29 | + | |
| 30 | +Example: | |
| 31 | + | |
| 32 | + clock-controller@29a0000 { | |
| 33 | + compatible = "ti,c6472-pll", "ti,c64x+pll"; | |
| 34 | + reg = <0x029a0000 0x200>; | |
| 35 | + clock-frequency = <25000000>; | |
| 36 | + | |
| 37 | + ti,c64x+pll-bypass-delay = <200>; | |
| 38 | + ti,c64x+pll-reset-delay = <12000>; | |
| 39 | + ti,c64x+pll-lock-delay = <80000>; | |
| 40 | + }; | |
| @@ -0,0 +1,127 @@ | ||
| 1 | +Device State Configuration Registers | |
| 2 | +------------------------------------ | |
| 3 | + | |
| 4 | +TI C6X SoCs contain a region of miscellaneous registers which provide various | |
| 5 | +function for SoC control or status. Details vary considerably among from SoC | |
| 6 | +to SoC with no two being alike. | |
| 7 | + | |
| 8 | +In general, the Device State Configuraion Registers (DSCR) will provide one or | |
| 9 | +more configuration registers often protected by a lock register where one or | |
| 10 | +more key values must be written to a lock register in order to unlock the | |
| 11 | +configuration register for writes. These configuration register may be used to | |
| 12 | +enable (and disable in some cases) SoC pin drivers, select peripheral clock | |
| 13 | +sources (internal or pin), etc. In some cases, a configuration register is | |
| 14 | +write once or the individual bits are write once. In addition to device config, | |
| 15 | +the DSCR block may provide registers which which are used to reset peripherals, | |
| 16 | +provide device ID information, provide ethernet MAC addresses, as well as other | |
| 17 | +miscellaneous functions. | |
| 18 | + | |
| 19 | +For device state control (enable/disable), each device control is assigned an | |
| 20 | +id which is used by individual device drivers to control the state as needed. | |
| 21 | + | |
| 22 | +Required properties: | |
| 23 | + | |
| 24 | +- compatible: must be "ti,c64x+dscr" | |
| 25 | +- reg: register area base and size | |
| 26 | + | |
| 27 | +Optional properties: | |
| 28 | + | |
| 29 | + NOTE: These are optional in that not all SoCs will have all properties. For | |
| 30 | + SoCs which do support a given property, leaving the property out of the | |
| 31 | + device tree will result in reduced functionality or possibly driver | |
| 32 | + failure. | |
| 33 | + | |
| 34 | +- ti,dscr-devstat | |
| 35 | + offset of the devstat register | |
| 36 | + | |
| 37 | +- ti,dscr-silicon-rev | |
| 38 | + offset, start bit, and bitsize of silicon revision field | |
| 39 | + | |
| 40 | +- ti,dscr-rmii-resets | |
| 41 | + offset and bitmask of RMII reset field. May have multiple tuples if more | |
| 42 | + than one ethernet port is available. | |
| 43 | + | |
| 44 | +- ti,dscr-locked-regs | |
| 45 | + possibly multiple tuples describing registers which are write protected by | |
| 46 | + a lock register. Each tuple consists of the register offset, lock register | |
| 47 | + offsset, and the key value used to unlock the register. | |
| 48 | + | |
| 49 | +- ti,dscr-kick-regs | |
| 50 | + offset and key values of two "kick" registers used to write protect other | |
| 51 | + registers in DSCR. On SoCs using kick registers, the first key must be | |
| 52 | + written to the first kick register and the second key must be written to | |
| 53 | + the second register before other registers in the area are write-enabled. | |
| 54 | + | |
| 55 | +- ti,dscr-mac-fuse-regs | |
| 56 | + MAC addresses are contained in two registers. Each element of a MAC address | |
| 57 | + is contained in a single byte. This property has two tuples. Each tuple has | |
| 58 | + a register offset and four cells representing bytes in the register from | |
| 59 | + most significant to least. The value of these four cells is the MAC byte | |
| 60 | + index (1-6) of the byte within the register. A value of 0 means the byte | |
| 61 | + is unused in the MAC address. | |
| 62 | + | |
| 63 | +- ti,dscr-devstate-ctl-regs | |
| 64 | + This property describes the bitfields used to control the state of devices. | |
| 65 | + Each tuple describes a range of identical bitfields used to control one or | |
| 66 | + more devices (one bitfield per device). The layout of each tuple is: | |
| 67 | + | |
| 68 | + start_id num_ids reg enable disable start_bit nbits | |
| 69 | + | |
| 70 | + Where: | |
| 71 | + start_id is device id for the first device control in the range | |
| 72 | + num_ids is the number of device controls in the range | |
| 73 | + reg is the offset of the register holding the control bits | |
| 74 | + enable is the value to enable a device | |
| 75 | + disable is the value to disable a device (0xffffffff if cannot disable) | |
| 76 | + start_bit is the bit number of the first bit in the range | |
| 77 | + nbits is the number of bits per device control | |
| 78 | + | |
| 79 | +- ti,dscr-devstate-stat-regs | |
| 80 | + This property describes the bitfields used to provide device state status | |
| 81 | + for device states controlled by the DSCR. Each tuple describes a range of | |
| 82 | + identical bitfields used to provide status for one or more devices (one | |
| 83 | + bitfield per device). The layout of each tuple is: | |
| 84 | + | |
| 85 | + start_id num_ids reg enable disable start_bit nbits | |
| 86 | + | |
| 87 | + Where: | |
| 88 | + start_id is device id for the first device status in the range | |
| 89 | + num_ids is the number of devices covered by the range | |
| 90 | + reg is the offset of the register holding the status bits | |
| 91 | + enable is the value indicating device is enabled | |
| 92 | + disable is the value indicating device is disabled | |
| 93 | + start_bit is the bit number of the first bit in the range | |
| 94 | + nbits is the number of bits per device status | |
| 95 | + | |
| 96 | +- ti,dscr-privperm | |
| 97 | + Offset and default value for register used to set access privilege for | |
| 98 | + some SoC devices. | |
| 99 | + | |
| 100 | + | |
| 101 | +Example: | |
| 102 | + | |
| 103 | + device-state-config-regs@2a80000 { | |
| 104 | + compatible = "ti,c64x+dscr"; | |
| 105 | + reg = <0x02a80000 0x41000>; | |
| 106 | + | |
| 107 | + ti,dscr-devstat = <0>; | |
| 108 | + ti,dscr-silicon-rev = <8 28 0xf>; | |
| 109 | + ti,dscr-rmii-resets = <0x40020 0x00040000>; | |
| 110 | + | |
| 111 | + ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>; | |
| 112 | + ti,dscr-devstate-ctl-regs = | |
| 113 | + <0 12 0x40008 1 0 0 2 | |
| 114 | + 12 1 0x40008 3 0 30 2 | |
| 115 | + 13 2 0x4002c 1 0xffffffff 0 1>; | |
| 116 | + ti,dscr-devstate-stat-regs = | |
| 117 | + <0 10 0x40014 1 0 0 3 | |
| 118 | + 10 2 0x40018 1 0 0 3>; | |
| 119 | + | |
| 120 | + ti,dscr-mac-fuse-regs = <0x700 1 2 3 4 | |
| 121 | + 0x704 5 6 0 0>; | |
| 122 | + | |
| 123 | + ti,dscr-privperm = <0x41c 0xaaaaaaaa>; | |
| 124 | + | |
| 125 | + ti,dscr-kick-regs = <0x38 0x83E70B13 | |
| 126 | + 0x3c 0x95A4F1E0>; | |
| 127 | + }; | |
| @@ -0,0 +1,62 @@ | ||
| 1 | +External Memory Interface | |
| 2 | +------------------------- | |
| 3 | + | |
| 4 | +The emifa node describes a simple external bus controller found on some C6X | |
| 5 | +SoCs. This interface provides external busses with a number of chip selects. | |
| 6 | + | |
| 7 | +Required properties: | |
| 8 | + | |
| 9 | +- compatible: must be "ti,c64x+emifa", "simple-bus" | |
| 10 | +- reg: register area base and size | |
| 11 | +- #address-cells: must be 2 (chip-select + offset) | |
| 12 | +- #size-cells: must be 1 | |
| 13 | +- ranges: mapping from EMIFA space to parent space | |
| 14 | + | |
| 15 | + | |
| 16 | +Optional properties: | |
| 17 | + | |
| 18 | +- ti,dscr-dev-enable: Device ID if EMIF is enabled/disabled from DSCR | |
| 19 | + | |
| 20 | +- ti,emifa-burst-priority: | |
| 21 | + Number of memory transfers after which the EMIF will elevate the priority | |
| 22 | + of the oldest command in the command FIFO. Setting this field to 255 | |
| 23 | + disables this feature, thereby allowing old commands to stay in the FIFO | |
| 24 | + indefinitely. | |
| 25 | + | |
| 26 | +- ti,emifa-ce-config: | |
| 27 | + Configuration values for each of the supported chip selects. | |
| 28 | + | |
| 29 | +Example: | |
| 30 | + | |
| 31 | + emifa@70000000 { | |
| 32 | + compatible = "ti,c64x+emifa", "simple-bus"; | |
| 33 | + #address-cells = <2>; | |
| 34 | + #size-cells = <1>; | |
| 35 | + reg = <0x70000000 0x100>; | |
| 36 | + ranges = <0x2 0x0 0xa0000000 0x00000008 | |
| 37 | + 0x3 0x0 0xb0000000 0x00400000 | |
| 38 | + 0x4 0x0 0xc0000000 0x10000000 | |
| 39 | + 0x5 0x0 0xD0000000 0x10000000>; | |
| 40 | + | |
| 41 | + ti,dscr-dev-enable = <13>; | |
| 42 | + ti,emifa-burst-priority = <255>; | |
| 43 | + ti,emifa-ce-config = <0x00240120 | |
| 44 | + 0x00240120 | |
| 45 | + 0x00240122 | |
| 46 | + 0x00240122>; | |
| 47 | + | |
| 48 | + flash@3,0 { | |
| 49 | + #address-cells = <1>; | |
| 50 | + #size-cells = <1>; | |
| 51 | + compatible = "cfi-flash"; | |
| 52 | + reg = <0x3 0x0 0x400000>; | |
| 53 | + bank-width = <1>; | |
| 54 | + device-width = <1>; | |
| 55 | + partition@0 { | |
| 56 | + reg = <0x0 0x400000>; | |
| 57 | + label = "NOR"; | |
| 58 | + }; | |
| 59 | + }; | |
| 60 | + }; | |
| 61 | + | |
| 62 | +This shows a flash chip attached to chip select 3. | |
| @@ -0,0 +1,104 @@ | ||
| 1 | +C6X Interrupt Chips | |
| 2 | +------------------- | |
| 3 | + | |
| 4 | +* C64X+ Core Interrupt Controller | |
| 5 | + | |
| 6 | + The core interrupt controller provides 16 prioritized interrupts to the | |
| 7 | + C64X+ core. Priority 0 and 1 are used for reset and NMI respectively. | |
| 8 | + Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt | |
| 9 | + sources coming from outside the core. | |
| 10 | + | |
| 11 | + Required properties: | |
| 12 | + -------------------- | |
| 13 | + - compatible: Should be "ti,c64x+core-pic"; | |
| 14 | + - #interrupt-cells: <1> | |
| 15 | + | |
| 16 | + Interrupt Specifier Definition | |
| 17 | + ------------------------------ | |
| 18 | + Single cell specifying the core interrupt priority level (4-15) where | |
| 19 | + 4 is highest priority and 15 is lowest priority. | |
| 20 | + | |
| 21 | + Example | |
| 22 | + ------- | |
| 23 | + core_pic: interrupt-controller@0 { | |
| 24 | + interrupt-controller; | |
| 25 | + #interrupt-cells = <1>; | |
| 26 | + compatible = "ti,c64x+core-pic"; | |
| 27 | + }; | |
| 28 | + | |
| 29 | + | |
| 30 | + | |
| 31 | +* C64x+ Megamodule Interrupt Controller | |
| 32 | + | |
| 33 | + The megamodule PIC consists of four interrupt mupliplexers each of which | |
| 34 | + combine up to 32 interrupt inputs into a single interrupt output which | |
| 35 | + may be cascaded into the core interrupt controller. The megamodule PIC | |
| 36 | + has a total of 12 outputs cascading into the core interrupt controller. | |
| 37 | + One for each core interrupt priority level. In addition to the combined | |
| 38 | + interrupt sources, individual megamodule interrupts may be cascaded to | |
| 39 | + the core interrupt controller. When an individual interrupt is cascaded, | |
| 40 | + it is no longer handled through a megamodule interrupt combiner and is | |
| 41 | + considered to have the core interrupt controller as the parent. | |
| 42 | + | |
| 43 | + Required properties: | |
| 44 | + -------------------- | |
| 45 | + - compatible: "ti,c64x+megamod-pic" | |
| 46 | + - interrupt-controller | |
| 47 | + - #interrupt-cells: <1> | |
| 48 | + - reg: base address and size of register area | |
| 49 | + - interrupt-parent: must be core interrupt controller | |
| 50 | + - interrupts: This should have four cells; one for each interrupt combiner. | |
| 51 | + The cells contain the core priority interrupt to which the | |
| 52 | + corresponding combiner output is wired. | |
| 53 | + | |
| 54 | + Optional properties: | |
| 55 | + -------------------- | |
| 56 | + - ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core | |
| 57 | + priority interrupts. The first cell corresponds to | |
| 58 | + core priority 4 and the last cell corresponds to | |
| 59 | + core priority 15. The value of each cell is the | |
| 60 | + megamodule interrupt source which is MUXed to | |
| 61 | + the core interrupt corresponding to the cell | |
| 62 | + position. Allowed values are 4 - 127. Mapping for | |
| 63 | + interrupts 0 - 3 (combined interrupt sources) are | |
| 64 | + ignored. | |
| 65 | + | |
| 66 | + Interrupt Specifier Definition | |
| 67 | + ------------------------------ | |
| 68 | + Single cell specifying the megamodule interrupt source (4-127). Note that | |
| 69 | + interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will | |
| 70 | + use the core interrupt controller as their parent and the specifier will | |
| 71 | + be the core priority level, not the megamodule interrupt number. | |
| 72 | + | |
| 73 | + Examples | |
| 74 | + -------- | |
| 75 | + megamod_pic: interrupt-controller@1800000 { | |
| 76 | + compatible = "ti,c64x+megamod-pic"; | |
| 77 | + interrupt-controller; | |
| 78 | + #interrupt-cells = <1>; | |
| 79 | + reg = <0x1800000 0x1000>; | |
| 80 | + interrupt-parent = <&core_pic>; | |
| 81 | + interrupts = < 12 13 14 15 >; | |
| 82 | + }; | |
| 83 | + | |
| 84 | + This is a minimal example where all individual interrupts go through a | |
| 85 | + combiner. Combiner-0 is mapped to core interrupt 12, combiner-1 is mapped | |
| 86 | + to interrupt 13, etc. | |
| 87 | + | |
| 88 | + | |
| 89 | + megamod_pic: interrupt-controller@1800000 { | |
| 90 | + compatible = "ti,c64x+megamod-pic"; | |
| 91 | + interrupt-controller; | |
| 92 | + #interrupt-cells = <1>; | |
| 93 | + reg = <0x1800000 0x1000>; | |
| 94 | + interrupt-parent = <&core_pic>; | |
| 95 | + interrupts = < 12 13 14 15 >; | |
| 96 | + ti,c64x+megamod-pic-mux = < 0 0 0 0 | |
| 97 | + 32 0 0 0 | |
| 98 | + 0 0 0 0 >; | |
| 99 | + }; | |
| 100 | + | |
| 101 | + This the same as the first example except that megamodule interrupt 32 is | |
| 102 | + mapped directly to core priority interrupt 8. The node using this interrupt | |
| 103 | + must set the core controller as its interrupt parent and use 8 in the | |
| 104 | + interrupt specifier value. | |
| @@ -0,0 +1,28 @@ | ||
| 1 | +C6X System-on-Chip | |
| 2 | +------------------ | |
| 3 | + | |
| 4 | +Required properties: | |
| 5 | + | |
| 6 | +- compatible: "simple-bus" | |
| 7 | +- #address-cells: must be 1 | |
| 8 | +- #size-cells: must be 1 | |
| 9 | +- ranges | |
| 10 | + | |
| 11 | +Optional properties: | |
| 12 | + | |
| 13 | +- model: specific SoC model | |
| 14 | + | |
| 15 | +- nodes for IP blocks within SoC | |
| 16 | + | |
| 17 | + | |
| 18 | +Example: | |
| 19 | + | |
| 20 | + soc { | |
| 21 | + compatible = "simple-bus"; | |
| 22 | + model = "tms320c6455"; | |
| 23 | + #address-cells = <1>; | |
| 24 | + #size-cells = <1>; | |
| 25 | + ranges; | |
| 26 | + | |
| 27 | + ... | |
| 28 | + }; | |
| @@ -0,0 +1,26 @@ | ||
| 1 | +Timer64 | |
| 2 | +------- | |
| 3 | + | |
| 4 | +The timer64 node describes C6X event timers. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | +- compatible: must be "ti,c64x+timer64" | |
| 9 | +- reg: base address and size of register region | |
| 10 | +- interrupt-parent: interrupt controller | |
| 11 | +- interrupts: interrupt id | |
| 12 | + | |
| 13 | +Optional properties: | |
| 14 | + | |
| 15 | +- ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface. | |
| 16 | + | |
| 17 | +- ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer. | |
| 18 | + | |
| 19 | +Example: | |
| 20 | + timer0: timer@25e0000 { | |
| 21 | + compatible = "ti,c64x+timer64"; | |
| 22 | + ti,core-mask = < 0x01 >; | |
| 23 | + reg = <0x25e0000 0x40>; | |
| 24 | + interrupt-parent = <&megamod_pic>; | |
| 25 | + interrupts = < 16 >; | |
| 26 | + }; | |
| @@ -0,0 +1,30 @@ | ||
| 1 | +* ARM PrimeCell PL330 DMA Controller | |
| 2 | + | |
| 3 | +The ARM PrimeCell PL330 DMA controller can move blocks of memory contents | |
| 4 | +between memory and peripherals or memory to memory. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + - compatible: should include both "arm,pl330" and "arm,primecell". | |
| 8 | + - reg: physical base address of the controller and length of memory mapped | |
| 9 | + region. | |
| 10 | + - interrupts: interrupt number to the cpu. | |
| 11 | + | |
| 12 | +Example: | |
| 13 | + | |
| 14 | + pdma0: pdma@12680000 { | |
| 15 | + compatible = "arm,pl330", "arm,primecell"; | |
| 16 | + reg = <0x12680000 0x1000>; | |
| 17 | + interrupts = <99>; | |
| 18 | + }; | |
| 19 | + | |
| 20 | +Client drivers (device nodes requiring dma transfers from dev-to-mem or | |
| 21 | +mem-to-dev) should specify the DMA channel numbers using a two-value pair | |
| 22 | +as shown below. | |
| 23 | + | |
| 24 | + [property name] = <[phandle of the dma controller] [dma request id]>; | |
| 25 | + | |
| 26 | + where 'dma request id' is the dma request number which is connected | |
| 27 | + to the client controller. The 'property name' is recommended to be | |
| 28 | + of the form <name>-dma-channel. | |
| 29 | + | |
| 30 | + Example: tx-dma-channel = <&pdma0 12>; | |
| @@ -0,0 +1,14 @@ | ||
| 1 | +* Atmel Direct Memory Access Controller (DMA) | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: Should be "atmel,<chip>-dma" | |
| 5 | +- reg: Should contain DMA registers location and length | |
| 6 | +- interrupts: Should contain DMA interrupt | |
| 7 | + | |
| 8 | +Examples: | |
| 9 | + | |
| 10 | +dma@ffffec00 { | |
| 11 | + compatible = "atmel,at91sam9g45-dma"; | |
| 12 | + reg = <0xffffec00 0x200>; | |
| 13 | + interrupts = <21>; | |
| 14 | +}; | |
| @@ -0,0 +1,40 @@ | ||
| 1 | +Samsung Exynos4 GPIO Controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: Compatible property value should be "samsung,exynos4-gpio>". | |
| 5 | + | |
| 6 | +- reg: Physical base address of the controller and length of memory mapped | |
| 7 | + region. | |
| 8 | + | |
| 9 | +- #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes | |
| 10 | + should be the following with values derived from the SoC user manual. | |
| 11 | + <[phandle of the gpio controller node] | |
| 12 | + [pin number within the gpio controller] | |
| 13 | + [mux function] | |
| 14 | + [pull up/down] | |
| 15 | + [drive strength]> | |
| 16 | + | |
| 17 | + Values for gpio specifier: | |
| 18 | + - Pin number: is a value between 0 to 7. | |
| 19 | + - Pull Up/Down: 0 - Pull Up/Down Disabled. | |
| 20 | + 1 - Pull Down Enabled. | |
| 21 | + 3 - Pull Up Enabled. | |
| 22 | + - Drive Strength: 0 - 1x, | |
| 23 | + 1 - 3x, | |
| 24 | + 2 - 2x, | |
| 25 | + 3 - 4x | |
| 26 | + | |
| 27 | +- gpio-controller: Specifies that the node is a gpio controller. | |
| 28 | +- #address-cells: should be 1. | |
| 29 | +- #size-cells: should be 1. | |
| 30 | + | |
| 31 | +Example: | |
| 32 | + | |
| 33 | + gpa0: gpio-controller@11400000 { | |
| 34 | + #address-cells = <1>; | |
| 35 | + #size-cells = <1>; | |
| 36 | + compatible = "samsung,exynos4-gpio"; | |
| 37 | + reg = <0x11400000 0x20>; | |
| 38 | + #gpio-cells = <4>; | |
| 39 | + gpio-controller; | |
| 40 | + }; | |
| @@ -0,0 +1,22 @@ | ||
| 1 | +* Synopsys DesignWare I2C | |
| 2 | + | |
| 3 | +Required properties : | |
| 4 | + | |
| 5 | + - compatible : should be "snps,designware-i2c" | |
| 6 | + - reg : Offset and length of the register set for the device | |
| 7 | + - interrupts : <IRQ> where IRQ is the interrupt number. | |
| 8 | + | |
| 9 | +Recommended properties : | |
| 10 | + | |
| 11 | + - clock-frequency : desired I2C bus clock frequency in Hz. | |
| 12 | + | |
| 13 | +Example : | |
| 14 | + | |
| 15 | + i2c@f0000 { | |
| 16 | + #address-cells = <1>; | |
| 17 | + #size-cells = <0>; | |
| 18 | + compatible = "snps,designware-i2c"; | |
| 19 | + reg = <0xf0000 0x1000>; | |
| 20 | + interrupts = <11>; | |
| 21 | + clock-frequency = <400000>; | |
| 22 | + }; | |
| @@ -0,0 +1,30 @@ | ||
| 1 | +I2C for OMAP platforms | |
| 2 | + | |
| 3 | +Required properties : | |
| 4 | +- compatible : Must be "ti,omap3-i2c" or "ti,omap4-i2c" | |
| 5 | +- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based) | |
| 6 | +- #address-cells = <1>; | |
| 7 | +- #size-cells = <0>; | |
| 8 | + | |
| 9 | +Recommended properties : | |
| 10 | +- clock-frequency : Desired I2C bus clock frequency in Hz. Otherwise | |
| 11 | + the default 100 kHz frequency will be used. | |
| 12 | + | |
| 13 | +Optional properties: | |
| 14 | +- Child nodes conforming to i2c bus binding | |
| 15 | + | |
| 16 | +Note: Current implementation will fetch base address, irq and dma | |
| 17 | +from omap hwmod data base during device registration. | |
| 18 | +Future plan is to migrate hwmod data base contents into device tree | |
| 19 | +blob so that, all the required data will be used from device tree dts | |
| 20 | +file. | |
| 21 | + | |
| 22 | +Examples : | |
| 23 | + | |
| 24 | +i2c1: i2c@0 { | |
| 25 | + compatible = "ti,omap3-i2c"; | |
| 26 | + #address-cells = <1>; | |
| 27 | + #size-cells = <0>; | |
| 28 | + ti,hwmods = "i2c1"; | |
| 29 | + clock-frequency = <400000>; | |
| 30 | +}; | |
| @@ -0,0 +1,58 @@ | ||
| 1 | +This is a list of trivial i2c devices that have simple device tree | |
| 2 | +bindings, consisting only of a compatible field, an address and | |
| 3 | +possibly an interrupt line. | |
| 4 | + | |
| 5 | +If a device needs more specific bindings, such as properties to | |
| 6 | +describe some aspect of it, there needs to be a specific binding | |
| 7 | +document for it just like any other devices. | |
| 8 | + | |
| 9 | + | |
| 10 | +Compatible Vendor / Chip | |
| 11 | +========== ============= | |
| 12 | +ad,ad7414 SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin | |
| 13 | +ad,adm9240 ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems | |
| 14 | +adi,adt7461 +/-1C TDM Extended Temp Range I.C | |
| 15 | +adt7461 +/-1C TDM Extended Temp Range I.C | |
| 16 | +at,24c08 i2c serial eeprom (24cxx) | |
| 17 | +atmel,24c02 i2c serial eeprom (24cxx) | |
| 18 | +catalyst,24c32 i2c serial eeprom | |
| 19 | +dallas,ds1307 64 x 8, Serial, I2C Real-Time Clock | |
| 20 | +dallas,ds1338 I2C RTC with 56-Byte NV RAM | |
| 21 | +dallas,ds1339 I2C Serial Real-Time Clock | |
| 22 | +dallas,ds1340 I2C RTC with Trickle Charger | |
| 23 | +dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output | |
| 24 | +dallas,ds1631 High-Precision Digital Thermometer | |
| 25 | +dallas,ds1682 Total-Elapsed-Time Recorder with Alarm | |
| 26 | +dallas,ds1775 Tiny Digital Thermometer and Thermostat | |
| 27 | +dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM | |
| 28 | +dallas,ds4510 CPU Supervisor with Nonvolatile Memory and Programmable I/O | |
| 29 | +dallas,ds75 Digital Thermometer and Thermostat | |
| 30 | +dialog,da9053 DA9053: flexible system level PMIC with multicore support | |
| 31 | +epson,rx8025 High-Stability. I2C-Bus INTERFACE REAL TIME CLOCK MODULE | |
| 32 | +epson,rx8581 I2C-BUS INTERFACE REAL TIME CLOCK MODULE | |
| 33 | +fsl,mag3110 MAG3110: Xtrinsic High Accuracy, 3D Magnetometer | |
| 34 | +fsl,mc13892 MC13892: Power Management Integrated Circuit (PMIC) for i.MX35/51 | |
| 35 | +fsl,mma8450 MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer | |
| 36 | +fsl,mpr121 MPR121: Proximity Capacitive Touch Sensor Controller | |
| 37 | +fsl,sgtl5000 SGTL5000: Ultra Low-Power Audio Codec | |
| 38 | +maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator | |
| 39 | +maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs | |
| 40 | +maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface | |
| 41 | +mc,rv3029c2 Real Time Clock Module with I2C-Bus | |
| 42 | +national,lm75 I2C TEMP SENSOR | |
| 43 | +national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor | |
| 44 | +national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface | |
| 45 | +nxp,pca9556 Octal SMBus and I2C registered interface | |
| 46 | +nxp,pca9557 8-bit I2C-bus and SMBus I/O port with reset | |
| 47 | +nxp,pcf8563 Real-time clock/calendar | |
| 48 | +ovti,ov5642 OV5642: Color CMOS QSXGA (5-megapixel) Image Sensor with OmniBSI and Embedded TrueFocus | |
| 49 | +pericom,pt7c4338 Real-time Clock Module | |
| 50 | +plx,pex8648 48-Lane, 12-Port PCI Express Gen 2 (5.0 GT/s) Switch | |
| 51 | +ramtron,24c64 i2c serial eeprom (24cxx) | |
| 52 | +ricoh,rs5c372a I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC | |
| 53 | +samsung,24ad0xd1 S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power) | |
| 54 | +st-micro,24c256 i2c serial eeprom (24cxx) | |
| 55 | +stm,m41t00 Serial Access TIMEKEEPER | |
| 56 | +stm,m41t62 Serial real-time clock (RTC) with alarm | |
| 57 | +stm,m41t80 M41T80 - SERIAL ACCESS RTC WITH ALARMS | |
| 58 | +ti,tsc2003 I2C Touch-Screen Controller | |
| @@ -0,0 +1,88 @@ | ||
| 1 | +* Samsung's Keypad Controller device tree bindings | |
| 2 | + | |
| 3 | +Samsung's Keypad controller is used to interface a SoC with a matrix-type | |
| 4 | +keypad device. The keypad controller supports multiple row and column lines. | |
| 5 | +A key can be placed at each intersection of a unique row and a unique column. | |
| 6 | +The keypad controller can sense a key-press and key-release and report the | |
| 7 | +event using a interrupt to the cpu. | |
| 8 | + | |
| 9 | +Required SoC Specific Properties: | |
| 10 | +- compatible: should be one of the following | |
| 11 | + - "samsung,s3c6410-keypad": For controllers compatible with s3c6410 keypad | |
| 12 | + controller. | |
| 13 | + - "samsung,s5pv210-keypad": For controllers compatible with s5pv210 keypad | |
| 14 | + controller. | |
| 15 | + | |
| 16 | +- reg: physical base address of the controller and length of memory mapped | |
| 17 | + region. | |
| 18 | + | |
| 19 | +- interrupts: The interrupt number to the cpu. | |
| 20 | + | |
| 21 | +Required Board Specific Properties: | |
| 22 | +- samsung,keypad-num-rows: Number of row lines connected to the keypad | |
| 23 | + controller. | |
| 24 | + | |
| 25 | +- samsung,keypad-num-columns: Number of column lines connected to the | |
| 26 | + keypad controller. | |
| 27 | + | |
| 28 | +- row-gpios: List of gpios used as row lines. The gpio specifier for | |
| 29 | + this property depends on the gpio controller to which these row lines | |
| 30 | + are connected. | |
| 31 | + | |
| 32 | +- col-gpios: List of gpios used as column lines. The gpio specifier for | |
| 33 | + this property depends on the gpio controller to which these column | |
| 34 | + lines are connected. | |
| 35 | + | |
| 36 | +- Keys represented as child nodes: Each key connected to the keypad | |
| 37 | + controller is represented as a child node to the keypad controller | |
| 38 | + device node and should include the following properties. | |
| 39 | + - keypad,row: the row number to which the key is connected. | |
| 40 | + - keypad,column: the column number to which the key is connected. | |
| 41 | + - linux,code: the key-code to be reported when the key is pressed | |
| 42 | + and released. | |
| 43 | + | |
| 44 | +Optional Properties specific to linux: | |
| 45 | +- linux,keypad-no-autorepeat: do no enable autorepeat feature. | |
| 46 | +- linux,keypad-wakeup: use any event on keypad as wakeup event. | |
| 47 | + | |
| 48 | + | |
| 49 | +Example: | |
| 50 | + keypad@100A0000 { | |
| 51 | + compatible = "samsung,s5pv210-keypad"; | |
| 52 | + reg = <0x100A0000 0x100>; | |
| 53 | + interrupts = <173>; | |
| 54 | + samsung,keypad-num-rows = <2>; | |
| 55 | + samsung,keypad-num-columns = <8>; | |
| 56 | + linux,input-no-autorepeat; | |
| 57 | + linux,input-wakeup; | |
| 58 | + | |
| 59 | + row-gpios = <&gpx2 0 3 3 0 | |
| 60 | + &gpx2 1 3 3 0>; | |
| 61 | + | |
| 62 | + col-gpios = <&gpx1 0 3 0 0 | |
| 63 | + &gpx1 1 3 0 0 | |
| 64 | + &gpx1 2 3 0 0 | |
| 65 | + &gpx1 3 3 0 0 | |
| 66 | + &gpx1 4 3 0 0 | |
| 67 | + &gpx1 5 3 0 0 | |
| 68 | + &gpx1 6 3 0 0 | |
| 69 | + &gpx1 7 3 0 0>; | |
| 70 | + | |
| 71 | + key_1 { | |
| 72 | + keypad,row = <0>; | |
| 73 | + keypad,column = <3>; | |
| 74 | + linux,code = <2>; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + key_2 { | |
| 78 | + keypad,row = <0>; | |
| 79 | + keypad,column = <4>; | |
| 80 | + linux,code = <3>; | |
| 81 | + }; | |
| 82 | + | |
| 83 | + key_3 { | |
| 84 | + keypad,row = <0>; | |
| 85 | + keypad,column = <5>; | |
| 86 | + linux,code = <4>; | |
| 87 | + }; | |
| 88 | + }; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +* Tegra keyboard controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: "nvidia,tegra20-kbc" | |
| 5 | + | |
| 6 | +Optional properties: | |
| 7 | +- debounce-delay: delay in milliseconds per row scan for debouncing | |
| 8 | +- repeat-delay: delay in milliseconds before repeat starts | |
| 9 | +- ghost-filter: enable ghost filtering for this device | |
| 10 | +- wakeup-source: configure keyboard as a wakeup source for suspend/resume | |
| 11 | + | |
| 12 | +Example: | |
| 13 | + | |
| 14 | +keyboard: keyboard { | |
| 15 | + compatible = "nvidia,tegra20-kbc"; | |
| 16 | + reg = <0x7000e200 0x100>; | |
| 17 | + ghost-filter; | |
| 18 | +}; | |
| @@ -0,0 +1,78 @@ | ||
| 1 | +* Freescale MC13783/MC13892 Power Management Integrated Circuit (PMIC) | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : Should be "fsl,mc13783" or "fsl,mc13892" | |
| 5 | + | |
| 6 | +Optional properties: | |
| 7 | +- fsl,mc13xxx-uses-adc : Indicate the ADC is being used | |
| 8 | +- fsl,mc13xxx-uses-codec : Indicate the Audio Codec is being used | |
| 9 | +- fsl,mc13xxx-uses-rtc : Indicate the RTC is being used | |
| 10 | +- fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used | |
| 11 | + | |
| 12 | +Sub-nodes: | |
| 13 | +- regulators : Contain the regulator nodes. The MC13892 regulators are | |
| 14 | + bound using their names as listed below with their registers and bits | |
| 15 | + for enabling. | |
| 16 | + | |
| 17 | + vcoincell : regulator VCOINCELL (register 13, bit 23) | |
| 18 | + sw1 : regulator SW1 (register 24, bit 0) | |
| 19 | + sw2 : regulator SW2 (register 25, bit 0) | |
| 20 | + sw3 : regulator SW3 (register 26, bit 0) | |
| 21 | + sw4 : regulator SW4 (register 27, bit 0) | |
| 22 | + swbst : regulator SWBST (register 29, bit 20) | |
| 23 | + vgen1 : regulator VGEN1 (register 32, bit 0) | |
| 24 | + viohi : regulator VIOHI (register 32, bit 3) | |
| 25 | + vdig : regulator VDIG (register 32, bit 9) | |
| 26 | + vgen2 : regulator VGEN2 (register 32, bit 12) | |
| 27 | + vpll : regulator VPLL (register 32, bit 15) | |
| 28 | + vusb2 : regulator VUSB2 (register 32, bit 18) | |
| 29 | + vgen3 : regulator VGEN3 (register 33, bit 0) | |
| 30 | + vcam : regulator VCAM (register 33, bit 6) | |
| 31 | + vvideo : regulator VVIDEO (register 33, bit 12) | |
| 32 | + vaudio : regulator VAUDIO (register 33, bit 15) | |
| 33 | + vsd : regulator VSD (register 33, bit 18) | |
| 34 | + gpo1 : regulator GPO1 (register 34, bit 6) | |
| 35 | + gpo2 : regulator GPO2 (register 34, bit 8) | |
| 36 | + gpo3 : regulator GPO3 (register 34, bit 10) | |
| 37 | + gpo4 : regulator GPO4 (register 34, bit 12) | |
| 38 | + pwgt1spi : regulator PWGT1SPI (register 34, bit 15) | |
| 39 | + pwgt2spi : regulator PWGT2SPI (register 34, bit 16) | |
| 40 | + vusb : regulator VUSB (register 50, bit 3) | |
| 41 | + | |
| 42 | + The bindings details of individual regulator device can be found in: | |
| 43 | + Documentation/devicetree/bindings/regulator/regulator.txt | |
| 44 | + | |
| 45 | +Examples: | |
| 46 | + | |
| 47 | +ecspi@70010000 { /* ECSPI1 */ | |
| 48 | + fsl,spi-num-chipselects = <2>; | |
| 49 | + cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ | |
| 50 | + <&gpio3 25 0>; /* GPIO4_25 */ | |
| 51 | + status = "okay"; | |
| 52 | + | |
| 53 | + pmic: mc13892@0 { | |
| 54 | + #address-cells = <1>; | |
| 55 | + #size-cells = <0>; | |
| 56 | + compatible = "fsl,mc13892"; | |
| 57 | + spi-max-frequency = <6000000>; | |
| 58 | + reg = <0>; | |
| 59 | + interrupt-parent = <&gpio0>; | |
| 60 | + interrupts = <8>; | |
| 61 | + | |
| 62 | + regulators { | |
| 63 | + sw1_reg: mc13892__sw1 { | |
| 64 | + regulator-min-microvolt = <600000>; | |
| 65 | + regulator-max-microvolt = <1375000>; | |
| 66 | + regulator-boot-on; | |
| 67 | + regulator-always-on; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + sw2_reg: mc13892__sw2 { | |
| 71 | + regulator-min-microvolt = <900000>; | |
| 72 | + regulator-max-microvolt = <1850000>; | |
| 73 | + regulator-boot-on; | |
| 74 | + regulator-always-on; | |
| 75 | + }; | |
| 76 | + }; | |
| 77 | + }; | |
| 78 | +}; | |
| @@ -0,0 +1,47 @@ | ||
| 1 | +Texas Instruments TWL family | |
| 2 | + | |
| 3 | +The TWLs are Integrated Power Management Chips. | |
| 4 | +Some version might contain much more analog function like | |
| 5 | +USB transceiver or Audio amplifier. | |
| 6 | +These chips are connected to an i2c bus. | |
| 7 | + | |
| 8 | + | |
| 9 | +Required properties: | |
| 10 | +- compatible : Must be "ti,twl4030"; | |
| 11 | + For Integrated power-management/audio CODEC device used in OMAP3 | |
| 12 | + based boards | |
| 13 | +- compatible : Must be "ti,twl6030"; | |
| 14 | + For Integrated power-management used in OMAP4 based boards | |
| 15 | +- interrupts : This i2c device has an IRQ line connected to the main SoC | |
| 16 | +- interrupt-controller : Since the twl support several interrupts internally, | |
| 17 | + it is considered as an interrupt controller cascaded to the SoC one. | |
| 18 | +- #interrupt-cells = <1>; | |
| 19 | +- interrupt-parent : The parent interrupt controller. | |
| 20 | + | |
| 21 | +Optional node: | |
| 22 | +- Child nodes contain in the twl. The twl family is made of several variants | |
| 23 | + that support a different number of features. | |
| 24 | + The children nodes will thus depend of the capability of the variant. | |
| 25 | + | |
| 26 | + | |
| 27 | +Example: | |
| 28 | +/* | |
| 29 | + * Integrated Power Management Chip | |
| 30 | + * http://www.ti.com/lit/ds/symlink/twl6030.pdf | |
| 31 | + */ | |
| 32 | +twl@48 { | |
| 33 | + compatible = "ti,twl6030"; | |
| 34 | + reg = <0x48>; | |
| 35 | + interrupts = <39>; /* IRQ_SYS_1N cascaded to gic */ | |
| 36 | + interrupt-controller; | |
| 37 | + #interrupt-cells = <1>; | |
| 38 | + interrupt-parent = <&gic>; | |
| 39 | + #address-cells = <1>; | |
| 40 | + #size-cells = <0>; | |
| 41 | + | |
| 42 | + twl_rtc { | |
| 43 | + compatible = "ti,twl_rtc"; | |
| 44 | + interrupts = <11>; | |
| 45 | + reg = <0>; | |
| 46 | + }; | |
| 47 | +}; | |
| @@ -0,0 +1,44 @@ | ||
| 1 | +GPIO assisted NAND flash | |
| 2 | + | |
| 3 | +The GPIO assisted NAND flash uses a memory mapped interface to | |
| 4 | +read/write the NAND commands and data and GPIO pins for the control | |
| 5 | +signals. | |
| 6 | + | |
| 7 | +Required properties: | |
| 8 | +- compatible : "gpio-control-nand" | |
| 9 | +- reg : should specify localbus chip select and size used for the chip. The | |
| 10 | + resource describes the data bus connected to the NAND flash and all accesses | |
| 11 | + are made in native endianness. | |
| 12 | +- #address-cells, #size-cells : Must be present if the device has sub-nodes | |
| 13 | + representing partitions. | |
| 14 | +- gpios : specifies the gpio pins to control the NAND device. nwp is an | |
| 15 | + optional gpio and may be set to 0 if not present. | |
| 16 | + | |
| 17 | +Optional properties: | |
| 18 | +- bank-width : Width (in bytes) of the device. If not present, the width | |
| 19 | + defaults to 1 byte. | |
| 20 | +- chip-delay : chip dependent delay for transferring data from array to | |
| 21 | + read registers (tR). If not present then a default of 20us is used. | |
| 22 | +- gpio-control-nand,io-sync-reg : A 64-bit physical address for a read | |
| 23 | + location used to guard against bus reordering with regards to accesses to | |
| 24 | + the GPIO's and the NAND flash data bus. If present, then after changing | |
| 25 | + GPIO state and before and after command byte writes, this register will be | |
| 26 | + read to ensure that the GPIO accesses have completed. | |
| 27 | + | |
| 28 | +Examples: | |
| 29 | + | |
| 30 | +gpio-nand@1,0 { | |
| 31 | + compatible = "gpio-control-nand"; | |
| 32 | + reg = <1 0x0000 0x2>; | |
| 33 | + #address-cells = <1>; | |
| 34 | + #size-cells = <1>; | |
| 35 | + gpios = <&banka 1 0 /* rdy */ | |
| 36 | + &banka 2 0 /* nce */ | |
| 37 | + &banka 3 0 /* ale */ | |
| 38 | + &banka 4 0 /* cle */ | |
| 39 | + 0 /* nwp */>; | |
| 40 | + | |
| 41 | + partition@0 { | |
| 42 | + ... | |
| 43 | + }; | |
| 44 | +}; | |
| @@ -0,0 +1,15 @@ | ||
| 1 | +* Calxeda Highbank 10Gb XGMAC Ethernet | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : Should be "calxeda,hb-xgmac" | |
| 5 | +- reg : Address and length of the register set for the device | |
| 6 | +- interrupts : Should contain 3 xgmac interrupts. The 1st is main interrupt. | |
| 7 | + The 2nd is pwr mgt interrupt. The 3rd is low power state interrupt. | |
| 8 | + | |
| 9 | +Example: | |
| 10 | + | |
| 11 | +ethernet@fff50000 { | |
| 12 | + compatible = "calxeda,hb-xgmac"; | |
| 13 | + reg = <0xfff50000 0x1000>; | |
| 14 | + interrupts = <0 77 4 0 78 4 0 79 4>; | |
| 15 | +}; | |
| @@ -0,0 +1,53 @@ | ||
| 1 | +Memory mapped Bosch CC770 and Intel AN82527 CAN controller | |
| 2 | + | |
| 3 | +Note: The CC770 is a CAN controller from Bosch, which is 100% | |
| 4 | +compatible with the old AN82527 from Intel, but with "bugs" being fixed. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | +- compatible : should be "bosch,cc770" for the CC770 and "intc,82527" | |
| 9 | + for the AN82527. | |
| 10 | + | |
| 11 | +- reg : should specify the chip select, address offset and size required | |
| 12 | + to map the registers of the controller. The size is usually 0x80. | |
| 13 | + | |
| 14 | +- interrupts : property with a value describing the interrupt source | |
| 15 | + (number and sensitivity) required for the controller. | |
| 16 | + | |
| 17 | +Optional properties: | |
| 18 | + | |
| 19 | +- bosch,external-clock-frequency : frequency of the external oscillator | |
| 20 | + clock in Hz. Note that the internal clock frequency used by the | |
| 21 | + controller is half of that value. If not specified, a default | |
| 22 | + value of 16000000 (16 MHz) is used. | |
| 23 | + | |
| 24 | +- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin. | |
| 25 | + If not specified or if the specified value is 0, the CLKOUT pin | |
| 26 | + will be disabled. | |
| 27 | + | |
| 28 | +- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified, | |
| 29 | + a resonable value will be calculated. | |
| 30 | + | |
| 31 | +- bosch,disconnect-rx0-input : see data sheet. | |
| 32 | + | |
| 33 | +- bosch,disconnect-rx1-input : see data sheet. | |
| 34 | + | |
| 35 | +- bosch,disconnect-tx1-output : see data sheet. | |
| 36 | + | |
| 37 | +- bosch,polarity-dominant : see data sheet. | |
| 38 | + | |
| 39 | +- bosch,divide-memory-clock : see data sheet. | |
| 40 | + | |
| 41 | +- bosch,iso-low-speed-mux : see data sheet. | |
| 42 | + | |
| 43 | +For further information, please have a look to the CC770 or AN82527. | |
| 44 | + | |
| 45 | +Examples: | |
| 46 | + | |
| 47 | +can@3,100 { | |
| 48 | + compatible = "bosch,cc770"; | |
| 49 | + reg = <3 0x100 0x80>; | |
| 50 | + interrupts = <2 0>; | |
| 51 | + interrupt-parent = <&mpic>; | |
| 52 | + bosch,external-clock-frequency = <16000000>; | |
| 53 | +}; | |
| @@ -0,0 +1,25 @@ | ||
| 1 | +* Cadence MACB/GEM Ethernet controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: Should be "cdns,[<chip>-]{macb|gem}" | |
| 5 | + Use "cdns,at91sam9260-macb" Atmel at91sam9260 and at91sam9263 SoCs. | |
| 6 | + Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb". | |
| 7 | + Use "cnds,pc302-gem" for Picochip picoXcell pc302 and later devices based on | |
| 8 | + the Cadence GEM, or the generic form: "cdns,gem". | |
| 9 | +- reg: Address and length of the register set for the device | |
| 10 | +- interrupts: Should contain macb interrupt | |
| 11 | +- phy-mode: String, operation mode of the PHY interface. | |
| 12 | + Supported values are: "mii", "rmii", "gmii", "rgmii". | |
| 13 | + | |
| 14 | +Optional properties: | |
| 15 | +- local-mac-address: 6 bytes, mac address | |
| 16 | + | |
| 17 | +Examples: | |
| 18 | + | |
| 19 | + macb0: ethernet@fffc4000 { | |
| 20 | + compatible = "cdns,at32ap7000-macb"; | |
| 21 | + reg = <0xfffc4000 0x4000>; | |
| 22 | + interrupts = <21>; | |
| 23 | + phy-mode = "rmii"; | |
| 24 | + local-mac-address = [3a 0e 03 04 05 06]; | |
| 25 | + }; | |
| @@ -0,0 +1,9 @@ | ||
| 1 | +NVIDIA compliant embedded controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : should be "nvidia,nvec". | |
| 5 | +- reg : the iomem of the i2c slave controller | |
| 6 | +- interrupts : the interrupt line of the i2c slave controller | |
| 7 | +- clock-frequency : the frequency of the i2c bus | |
| 8 | +- gpios : the gpio used for ec request | |
| 9 | +- slave-addr: the i2c address of the slave controller | |
| @@ -0,0 +1,5 @@ | ||
| 1 | +OLPC battery | |
| 2 | +~~~~~~~~~~~~ | |
| 3 | + | |
| 4 | +Required properties: | |
| 5 | + - compatible : "olpc,xo1-battery" | |
| @@ -0,0 +1,23 @@ | ||
| 1 | +SBS sbs-battery | |
| 2 | +~~~~~~~~~~ | |
| 3 | + | |
| 4 | +Required properties : | |
| 5 | + - compatible : "sbs,sbs-battery" | |
| 6 | + | |
| 7 | +Optional properties : | |
| 8 | + - sbs,i2c-retry-count : The number of times to retry i2c transactions on i2c | |
| 9 | + IO failure. | |
| 10 | + - sbs,poll-retry-count : The number of times to try looking for new status | |
| 11 | + after an external change notification. | |
| 12 | + - sbs,battery-detect-gpios : The gpio which signals battery detection and | |
| 13 | + a flag specifying its polarity. | |
| 14 | + | |
| 15 | +Example: | |
| 16 | + | |
| 17 | + bq20z75@b { | |
| 18 | + compatible = "sbs,sbs-battery"; | |
| 19 | + reg = < 0xb >; | |
| 20 | + sbs,i2c-retry-count = <2>; | |
| 21 | + sbs,poll-retry-count = <10>; | |
| 22 | + sbs,battery-detect-gpios = <&gpio-controller 122 1>; | |
| 23 | + } | |
| @@ -0,0 +1,163 @@ | ||
| 1 | +Message unit node: | |
| 2 | + | |
| 3 | +For SRIO controllers that implement the message unit as part of the controller | |
| 4 | +this node is required. For devices with RMAN this node should NOT exist. The | |
| 5 | +node is composed of three types of sub-nodes ("fsl-srio-msg-unit", | |
| 6 | +"fsl-srio-dbell-unit" and "fsl-srio-port-write-unit"). | |
| 7 | + | |
| 8 | +See srio.txt for more details about generic SRIO controller details. | |
| 9 | + | |
| 10 | + - compatible | |
| 11 | + Usage: required | |
| 12 | + Value type: <string> | |
| 13 | + Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu". | |
| 14 | + | |
| 15 | + The version X.Y should match the general SRIO controller's IP Block | |
| 16 | + revision register's Major(X) and Minor (Y) value. | |
| 17 | + | |
| 18 | + - reg | |
| 19 | + Usage: required | |
| 20 | + Value type: <prop-encoded-array> | |
| 21 | + Definition: A standard property. Specifies the physical address and | |
| 22 | + length of the SRIO configuration registers for message units | |
| 23 | + and doorbell units. | |
| 24 | + | |
| 25 | + - fsl,liodn | |
| 26 | + Usage: optional-but-recommended (for devices with PAMU) | |
| 27 | + Value type: <prop-encoded-array> | |
| 28 | + Definition: The logical I/O device number for the PAMU (IOMMU) to be | |
| 29 | + correctly configured for SRIO accesses. The property should | |
| 30 | + not exist on devices that do not support PAMU. | |
| 31 | + | |
| 32 | + The LIODN value is associated with all RMU transactions | |
| 33 | + (msg-unit, doorbell, port-write). | |
| 34 | + | |
| 35 | +Sub-Nodes for RMU: The RMU node is composed of multiple sub-nodes that | |
| 36 | +correspond to the actual sub-controllers in the RMU. The manual for a given | |
| 37 | +SoC will detail which and how many of these sub-controllers are implemented. | |
| 38 | + | |
| 39 | +Message Unit: | |
| 40 | + | |
| 41 | + - compatible | |
| 42 | + Usage: required | |
| 43 | + Value type: <string> | |
| 44 | + Definition: Must include "fsl,srio-msg-unit-vX.Y", "fsl,srio-msg-unit". | |
| 45 | + | |
| 46 | + The version X.Y should match the general SRIO controller's IP Block | |
| 47 | + revision register's Major(X) and Minor (Y) value. | |
| 48 | + | |
| 49 | + - reg | |
| 50 | + Usage: required | |
| 51 | + Value type: <prop-encoded-array> | |
| 52 | + Definition: A standard property. Specifies the physical address and | |
| 53 | + length of the SRIO configuration registers for message units | |
| 54 | + and doorbell units. | |
| 55 | + | |
| 56 | + - interrupts | |
| 57 | + Usage: required | |
| 58 | + Value type: <prop_encoded-array> | |
| 59 | + Definition: Specifies the interrupts generated by this device. The | |
| 60 | + value of the interrupts property consists of one interrupt | |
| 61 | + specifier. The format of the specifier is defined by the | |
| 62 | + binding document describing the node's interrupt parent. | |
| 63 | + | |
| 64 | + A pair of IRQs are specified in this property. The first | |
| 65 | + element is associated with the transmit (TX) interrupt and the | |
| 66 | + second element is associated with the receive (RX) interrupt. | |
| 67 | + | |
| 68 | +Doorbell Unit: | |
| 69 | + | |
| 70 | + - compatible | |
| 71 | + Usage: required | |
| 72 | + Value type: <string> | |
| 73 | + Definition: Must include: | |
| 74 | + "fsl,srio-dbell-unit-vX.Y", "fsl,srio-dbell-unit" | |
| 75 | + | |
| 76 | + The version X.Y should match the general SRIO controller's IP Block | |
| 77 | + revision register's Major(X) and Minor (Y) value. | |
| 78 | + | |
| 79 | + - reg | |
| 80 | + Usage: required | |
| 81 | + Value type: <prop-encoded-array> | |
| 82 | + Definition: A standard property. Specifies the physical address and | |
| 83 | + length of the SRIO configuration registers for message units | |
| 84 | + and doorbell units. | |
| 85 | + | |
| 86 | + - interrupts | |
| 87 | + Usage: required | |
| 88 | + Value type: <prop_encoded-array> | |
| 89 | + Definition: Specifies the interrupts generated by this device. The | |
| 90 | + value of the interrupts property consists of one interrupt | |
| 91 | + specifier. The format of the specifier is defined by the | |
| 92 | + binding document describing the node's interrupt parent. | |
| 93 | + | |
| 94 | + A pair of IRQs are specified in this property. The first | |
| 95 | + element is associated with the transmit (TX) interrupt and the | |
| 96 | + second element is associated with the receive (RX) interrupt. | |
| 97 | + | |
| 98 | +Port-Write Unit: | |
| 99 | + | |
| 100 | + - compatible | |
| 101 | + Usage: required | |
| 102 | + Value type: <string> | |
| 103 | + Definition: Must include: | |
| 104 | + "fsl,srio-port-write-unit-vX.Y", "fsl,srio-port-write-unit" | |
| 105 | + | |
| 106 | + The version X.Y should match the general SRIO controller's IP Block | |
| 107 | + revision register's Major(X) and Minor (Y) value. | |
| 108 | + | |
| 109 | + - reg | |
| 110 | + Usage: required | |
| 111 | + Value type: <prop-encoded-array> | |
| 112 | + Definition: A standard property. Specifies the physical address and | |
| 113 | + length of the SRIO configuration registers for message units | |
| 114 | + and doorbell units. | |
| 115 | + | |
| 116 | + - interrupts | |
| 117 | + Usage: required | |
| 118 | + Value type: <prop_encoded-array> | |
| 119 | + Definition: Specifies the interrupts generated by this device. The | |
| 120 | + value of the interrupts property consists of one interrupt | |
| 121 | + specifier. The format of the specifier is defined by the | |
| 122 | + binding document describing the node's interrupt parent. | |
| 123 | + | |
| 124 | + A single IRQ that handles port-write conditions is | |
| 125 | + specified by this property. (Typically shared with error). | |
| 126 | + | |
| 127 | + Note: All other standard properties (see the ePAPR) are allowed | |
| 128 | + but are optional. | |
| 129 | + | |
| 130 | +Example: | |
| 131 | + rmu: rmu@d3000 { | |
| 132 | + compatible = "fsl,srio-rmu"; | |
| 133 | + reg = <0xd3000 0x400>; | |
| 134 | + ranges = <0x0 0xd3000 0x400>; | |
| 135 | + fsl,liodn = <0xc8>; | |
| 136 | + | |
| 137 | + message-unit@0 { | |
| 138 | + compatible = "fsl,srio-msg-unit"; | |
| 139 | + reg = <0x0 0x100>; | |
| 140 | + interrupts = < | |
| 141 | + 60 2 0 0 /* msg1_tx_irq */ | |
| 142 | + 61 2 0 0>;/* msg1_rx_irq */ | |
| 143 | + }; | |
| 144 | + message-unit@100 { | |
| 145 | + compatible = "fsl,srio-msg-unit"; | |
| 146 | + reg = <0x100 0x100>; | |
| 147 | + interrupts = < | |
| 148 | + 62 2 0 0 /* msg2_tx_irq */ | |
| 149 | + 63 2 0 0>;/* msg2_rx_irq */ | |
| 150 | + }; | |
| 151 | + doorbell-unit@400 { | |
| 152 | + compatible = "fsl,srio-dbell-unit"; | |
| 153 | + reg = <0x400 0x80>; | |
| 154 | + interrupts = < | |
| 155 | + 56 2 0 0 /* bell_outb_irq */ | |
| 156 | + 57 2 0 0>;/* bell_inb_irq */ | |
| 157 | + }; | |
| 158 | + port-write-unit@4e0 { | |
| 159 | + compatible = "fsl,srio-port-write-unit"; | |
| 160 | + reg = <0x4e0 0x20>; | |
| 161 | + interrupts = <16 2 1 11>; | |
| 162 | + }; | |
| 163 | + }; | |
| @@ -0,0 +1,103 @@ | ||
| 1 | +* Freescale Serial RapidIO (SRIO) Controller | |
| 2 | + | |
| 3 | +RapidIO port node: | |
| 4 | +Properties: | |
| 5 | + - compatible | |
| 6 | + Usage: required | |
| 7 | + Value type: <string> | |
| 8 | + Definition: Must include "fsl,srio" for IP blocks with IP Block | |
| 9 | + Revision Register (SRIO IPBRR1) Major ID equal to 0x01c0. | |
| 10 | + | |
| 11 | + Optionally, a compatiable string of "fsl,srio-vX.Y" where X is Major | |
| 12 | + version in IP Block Revision Register and Y is Minor version. If this | |
| 13 | + compatiable is provided it should be ordered before "fsl,srio". | |
| 14 | + | |
| 15 | + - reg | |
| 16 | + Usage: required | |
| 17 | + Value type: <prop-encoded-array> | |
| 18 | + Definition: A standard property. Specifies the physical address and | |
| 19 | + length of the SRIO configuration registers. The size should | |
| 20 | + be set to 0x11000. | |
| 21 | + | |
| 22 | + - interrupts | |
| 23 | + Usage: required | |
| 24 | + Value type: <prop_encoded-array> | |
| 25 | + Definition: Specifies the interrupts generated by this device. The | |
| 26 | + value of the interrupts property consists of one interrupt | |
| 27 | + specifier. The format of the specifier is defined by the | |
| 28 | + binding document describing the node's interrupt parent. | |
| 29 | + | |
| 30 | + A single IRQ that handles error conditions is specified by this | |
| 31 | + property. (Typically shared with port-write). | |
| 32 | + | |
| 33 | + - fsl,srio-rmu-handle: | |
| 34 | + Usage: required if rmu node is defined | |
| 35 | + Value type: <phandle> | |
| 36 | + Definition: A single <phandle> value that points to the RMU. | |
| 37 | + (See srio-rmu.txt for more details on RMU node binding) | |
| 38 | + | |
| 39 | +Port Child Nodes: There should a port child node for each port that exists in | |
| 40 | +the controller. The ports are numbered starting at one (1) and should have | |
| 41 | +the following properties: | |
| 42 | + | |
| 43 | + - cell-index | |
| 44 | + Usage: required | |
| 45 | + Value type: <u32> | |
| 46 | + Definition: A standard property. Matches the port id. | |
| 47 | + | |
| 48 | + - ranges | |
| 49 | + Usage: required if local access windows preset | |
| 50 | + Value type: <prop-encoded-array> | |
| 51 | + Definition: A standard property. Utilized to describe the memory mapped | |
| 52 | + IO space utilized by the controller. This corresponds to the | |
| 53 | + setting of the local access windows that are targeted to this | |
| 54 | + SRIO port. | |
| 55 | + | |
| 56 | + - fsl,liodn | |
| 57 | + Usage: optional-but-recommended (for devices with PAMU) | |
| 58 | + Value type: <prop-encoded-array> | |
| 59 | + Definition: The logical I/O device number for the PAMU (IOMMU) to be | |
| 60 | + correctly configured for SRIO accesses. The property should | |
| 61 | + not exist on devices that do not support PAMU. | |
| 62 | + | |
| 63 | + For HW (ie, the P4080) that only supports a LIODN for both | |
| 64 | + memory and maintenance transactions then a single LIODN is | |
| 65 | + represented in the property for both transactions. | |
| 66 | + | |
| 67 | + For HW (ie, the P304x/P5020, etc) that supports an LIODN for | |
| 68 | + memory transactions and a unique LIODN for maintenance | |
| 69 | + transactions then a pair of LIODNs are represented in the | |
| 70 | + property. Within the pair, the first element represents the | |
| 71 | + LIODN associated with memory transactions and the second element | |
| 72 | + represents the LIODN associated with maintenance transactions | |
| 73 | + for the port. | |
| 74 | + | |
| 75 | +Note: All other standard properties (see ePAPR) are allowed but are optional. | |
| 76 | + | |
| 77 | +Example: | |
| 78 | + | |
| 79 | + rapidio: rapidio@ffe0c0000 { | |
| 80 | + #address-cells = <2>; | |
| 81 | + #size-cells = <2>; | |
| 82 | + reg = <0xf 0xfe0c0000 0 0x11000>; | |
| 83 | + compatible = "fsl,srio"; | |
| 84 | + interrupts = <16 2 1 11>; /* err_irq */ | |
| 85 | + fsl,srio-rmu-handle = <&rmu>; | |
| 86 | + ranges; | |
| 87 | + | |
| 88 | + port1 { | |
| 89 | + cell-index = <1>; | |
| 90 | + #address-cells = <2>; | |
| 91 | + #size-cells = <2>; | |
| 92 | + fsl,liodn = <34>; | |
| 93 | + ranges = <0 0 0xc 0x20000000 0 0x10000000>; | |
| 94 | + }; | |
| 95 | + | |
| 96 | + port2 { | |
| 97 | + cell-index = <2>; | |
| 98 | + #address-cells = <2>; | |
| 99 | + #size-cells = <2>; | |
| 100 | + fsl,liodn = <48>; | |
| 101 | + ranges = <0 0 0xc 0x30000000 0 0x10000000>; | |
| 102 | + }; | |
| 103 | + }; | |
| @@ -0,0 +1,29 @@ | ||
| 1 | +Fixed Voltage regulators | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: Must be "regulator-fixed"; | |
| 5 | + | |
| 6 | +Optional properties: | |
| 7 | +- gpio: gpio to use for enable control | |
| 8 | +- startup-delay-us: startup time in microseconds | |
| 9 | +- enable-active-high: Polarity of GPIO is Active high | |
| 10 | +If this property is missing, the default assumed is Active low. | |
| 11 | + | |
| 12 | +Any property defined as part of the core regulator | |
| 13 | +binding, defined in regulator.txt, can also be used. | |
| 14 | +However a fixed voltage regulator is expected to have the | |
| 15 | +regulator-min-microvolt and regulator-max-microvolt | |
| 16 | +to be the same. | |
| 17 | + | |
| 18 | +Example: | |
| 19 | + | |
| 20 | + abc: fixedregulator@0 { | |
| 21 | + compatible = "regulator-fixed"; | |
| 22 | + regulator-name = "fixed-supply"; | |
| 23 | + regulator-min-microvolt = <1800000>; | |
| 24 | + regulator-max-microvolt = <1800000>; | |
| 25 | + gpio = <&gpio1 16 0>; | |
| 26 | + startup-delay-us = <70000>; | |
| 27 | + enable-active-high; | |
| 28 | + regulator-boot-on | |
| 29 | + }; | |
| @@ -0,0 +1,54 @@ | ||
| 1 | +Voltage/Current Regulators | |
| 2 | + | |
| 3 | +Optional properties: | |
| 4 | +- regulator-name: A string used as a descriptive name for regulator outputs | |
| 5 | +- regulator-min-microvolt: smallest voltage consumers may set | |
| 6 | +- regulator-max-microvolt: largest voltage consumers may set | |
| 7 | +- regulator-microvolt-offset: Offset applied to voltages to compensate for voltage drops | |
| 8 | +- regulator-min-microamp: smallest current consumers may set | |
| 9 | +- regulator-max-microamp: largest current consumers may set | |
| 10 | +- regulator-always-on: boolean, regulator should never be disabled | |
| 11 | +- regulator-boot-on: bootloader/firmware enabled regulator | |
| 12 | +- <name>-supply: phandle to the parent supply/regulator node | |
| 13 | + | |
| 14 | +Example: | |
| 15 | + | |
| 16 | + xyzreg: regulator@0 { | |
| 17 | + regulator-min-microvolt = <1000000>; | |
| 18 | + regulator-max-microvolt = <2500000>; | |
| 19 | + regulator-always-on; | |
| 20 | + vin-supply = <&vin>; | |
| 21 | + }; | |
| 22 | + | |
| 23 | +Regulator Consumers: | |
| 24 | +Consumer nodes can reference one or more of its supplies/ | |
| 25 | +regulators using the below bindings. | |
| 26 | + | |
| 27 | +- <name>-supply: phandle to the regulator node | |
| 28 | + | |
| 29 | +These are the same bindings that a regulator in the above | |
| 30 | +example used to reference its own supply, in which case | |
| 31 | +its just seen as a special case of a regulator being a | |
| 32 | +consumer itself. | |
| 33 | + | |
| 34 | +Example of a consumer device node (mmc) referencing two | |
| 35 | +regulators (twl_reg1 and twl_reg2), | |
| 36 | + | |
| 37 | + twl_reg1: regulator@0 { | |
| 38 | + ... | |
| 39 | + ... | |
| 40 | + ... | |
| 41 | + }; | |
| 42 | + | |
| 43 | + twl_reg2: regulator@1 { | |
| 44 | + ... | |
| 45 | + ... | |
| 46 | + ... | |
| 47 | + }; | |
| 48 | + | |
| 49 | + mmc: mmc@0x0 { | |
| 50 | + ... | |
| 51 | + ... | |
| 52 | + vmmc-supply = <&twl_reg1>; | |
| 53 | + vmmcaux-supply = <&twl_reg2>; | |
| 54 | + }; | |
| @@ -0,0 +1,54 @@ | ||
| 1 | +Some properties contain an ordered list of 1 or more datum which are | |
| 2 | +normally accessed by index. However, some devices will have multiple | |
| 3 | +values which are more naturally accessed by name. Device nodes can | |
| 4 | +include a supplemental property for assigning names to each of the list | |
| 5 | +items. The names property consists of a list of strings in the same | |
| 6 | +order as the data in the resource property. | |
| 7 | + | |
| 8 | +The following supplemental names properties are defined. | |
| 9 | + | |
| 10 | +Resource Property Supplemental Names Property | |
| 11 | +----------------- --------------------------- | |
| 12 | +reg reg-names | |
| 13 | +clocks clock-names | |
| 14 | +interrupts interrupt-names | |
| 15 | + | |
| 16 | +Usage: | |
| 17 | + | |
| 18 | +The -names property must be used in conjunction with the normal resource | |
| 19 | +property. If not it will be ignored. | |
| 20 | + | |
| 21 | +Examples: | |
| 22 | + | |
| 23 | +l4-abe { | |
| 24 | + compatible = "simple-bus"; | |
| 25 | + #address-cells = <2>; | |
| 26 | + #size-cells = <1>; | |
| 27 | + ranges = <0 0 0x48000000 0x00001000>, /* MPU path */ | |
| 28 | + <1 0 0x49000000 0x00001000>; /* L3 path */ | |
| 29 | + mcasp { | |
| 30 | + compatible = "ti,mcasp"; | |
| 31 | + reg = <0 0x10 0x10>, <0 0x20 0x10>, | |
| 32 | + <1 0x10 0x10>, <1 0x20 0x10>; | |
| 33 | + reg-names = "mpu", "dat", | |
| 34 | + "dma", "dma_dat"; | |
| 35 | + interrupts = <11>, <12>; | |
| 36 | + interrupt-names = "rx", "tx"; | |
| 37 | + }; | |
| 38 | + | |
| 39 | + timer { | |
| 40 | + compatible = "ti,timer"; | |
| 41 | + reg = <0 0x40 0x10>, <1 0x40 0x10>; | |
| 42 | + reg-names = "mpu", "dma"; | |
| 43 | + }; | |
| 44 | +}; | |
| 45 | + | |
| 46 | + | |
| 47 | +usb { | |
| 48 | + compatible = "ti,usb-host"; | |
| 49 | + reg = <0x4a064000 0x800>, <0x4a064800 0x200>, | |
| 50 | + <0x4a064c00 0x200>; | |
| 51 | + reg-names = "config", "ohci", "ehci"; | |
| 52 | + interrupts = <14>, <15>; | |
| 53 | + interrupt-names = "ohci", "ehci"; | |
| 54 | +}; | |
| @@ -0,0 +1,20 @@ | ||
| 1 | +* Samsung's S3C Real Time Clock controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible: should be one of the following. | |
| 5 | + * "samsung,s3c2410-rtc" - for controllers compatible with s3c2410 rtc. | |
| 6 | + * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc. | |
| 7 | +- reg: physical base address of the controller and length of memory mapped | |
| 8 | + region. | |
| 9 | +- interrupts: Two interrupt numbers to the cpu should be specified. First | |
| 10 | + interrupt number is the rtc alarm interupt and second interrupt number | |
| 11 | + is the rtc tick interrupt. The number of cells representing a interrupt | |
| 12 | + depends on the parent interrupt controller. | |
| 13 | + | |
| 14 | +Example: | |
| 15 | + | |
| 16 | + rtc@10070000 { | |
| 17 | + compatible = "samsung,s3c6410-rtc"; | |
| 18 | + reg = <0x10070000 0x100>; | |
| 19 | + interrupts = <44 0 45 0>; | |
| 20 | + }; | |
| @@ -0,0 +1,12 @@ | ||
| 1 | +* TI twl RTC | |
| 2 | + | |
| 3 | +The TWL family (twl4030/6030) contains a RTC. | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | +- compatible : Should be twl4030-rtc | |
| 7 | + | |
| 8 | +Examples: | |
| 9 | + | |
| 10 | +rtc@0 { | |
| 11 | + compatible = "ti,twl4030-rtc"; | |
| 12 | +}; | |
| @@ -0,0 +1,10 @@ | ||
| 1 | +OMAP UART controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : should be "ti,omap2-uart" for OMAP2 controllers | |
| 5 | +- compatible : should be "ti,omap3-uart" for OMAP3 controllers | |
| 6 | +- compatible : should be "ti,omap4-uart" for OMAP4 controllers | |
| 7 | +- ti,hwmods : Must be "uart<n>", n being the instance number (1-based) | |
| 8 | + | |
| 9 | +Optional properties: | |
| 10 | +- clock-frequency : frequency of the clock input to the UART | |
| @@ -0,0 +1,14 @@ | ||
| 1 | +* Samsung's UART Controller | |
| 2 | + | |
| 3 | +The Samsung's UART controller is used for interfacing SoC with serial communicaion | |
| 4 | +devices. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | +- compatible: should be | |
| 8 | + - "samsung,exynos4210-uart", for UART's compatible with Exynos4210 uart ports. | |
| 9 | + | |
| 10 | +- reg: base physical address of the controller and length of memory mapped | |
| 11 | + region. | |
| 12 | + | |
| 13 | +- interrupts: interrupt number to the cpu. The interrupt specifier format depends | |
| 14 | + on the interrupt controller parent. | |
| @@ -0,0 +1,71 @@ | ||
| 1 | +NVIDIA Tegra audio complex | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "nvidia,tegra-audio-wm8903" | |
| 5 | +- nvidia,model : The user-visible name of this sound complex. | |
| 6 | +- nvidia,audio-routing : A list of the connections between audio components. | |
| 7 | + Each entry is a pair of strings, the first being the connection's sink, | |
| 8 | + the second being the connection's source. Valid names for sources and | |
| 9 | + sinks are the WM8903's pins, and the jacks on the board: | |
| 10 | + | |
| 11 | + WM8903 pins: | |
| 12 | + | |
| 13 | + * IN1L | |
| 14 | + * IN1R | |
| 15 | + * IN2L | |
| 16 | + * IN2R | |
| 17 | + * IN3L | |
| 18 | + * IN3R | |
| 19 | + * DMICDAT | |
| 20 | + * HPOUTL | |
| 21 | + * HPOUTR | |
| 22 | + * LINEOUTL | |
| 23 | + * LINEOUTR | |
| 24 | + * LOP | |
| 25 | + * LON | |
| 26 | + * ROP | |
| 27 | + * RON | |
| 28 | + * MICBIAS | |
| 29 | + | |
| 30 | + Board connectors: | |
| 31 | + | |
| 32 | + * Headphone Jack | |
| 33 | + * Int Spk | |
| 34 | + * Mic Jack | |
| 35 | + | |
| 36 | +- nvidia,i2s-controller : The phandle of the Tegra I2S1 controller | |
| 37 | +- nvidia,audio-codec : The phandle of the WM8903 audio codec | |
| 38 | + | |
| 39 | +Optional properties: | |
| 40 | +- nvidia,spkr-en-gpios : The GPIO that enables the speakers | |
| 41 | +- nvidia,hp-mute-gpios : The GPIO that mutes the headphones | |
| 42 | +- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in | |
| 43 | +- nvidia,int-mic-en-gpios : The GPIO that enables the internal microphone | |
| 44 | +- nvidia,ext-mic-en-gpios : The GPIO that enables the external microphone | |
| 45 | + | |
| 46 | +Example: | |
| 47 | + | |
| 48 | +sound { | |
| 49 | + compatible = "nvidia,tegra-audio-wm8903-harmony", | |
| 50 | + "nvidia,tegra-audio-wm8903" | |
| 51 | + nvidia,model = "tegra-wm8903-harmony"; | |
| 52 | + | |
| 53 | + nvidia,audio-routing = | |
| 54 | + "Headphone Jack", "HPOUTR", | |
| 55 | + "Headphone Jack", "HPOUTL", | |
| 56 | + "Int Spk", "ROP", | |
| 57 | + "Int Spk", "RON", | |
| 58 | + "Int Spk", "LOP", | |
| 59 | + "Int Spk", "LON", | |
| 60 | + "Mic Jack", "MICBIAS", | |
| 61 | + "IN1L", "Mic Jack"; | |
| 62 | + | |
| 63 | + nvidia,i2s-controller = <&i2s1>; | |
| 64 | + nvidia,audio-codec = <&wm8903>; | |
| 65 | + | |
| 66 | + nvidia,spkr-en-gpios = <&codec 2 0>; | |
| 67 | + nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */ | |
| 68 | + nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */ | |
| 69 | + nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */ | |
| 70 | +}; | |
| 71 | + | |
| @@ -0,0 +1,12 @@ | ||
| 1 | +NVIDIA Tegra 20 DAS (Digital Audio Switch) controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "nvidia,tegra20-das" | |
| 5 | +- reg : Should contain DAS registers location and length | |
| 6 | + | |
| 7 | +Example: | |
| 8 | + | |
| 9 | +das@70000c00 { | |
| 10 | + compatible = "nvidia,tegra20-das"; | |
| 11 | + reg = <0x70000c00 0x80>; | |
| 12 | +}; | |
| @@ -0,0 +1,17 @@ | ||
| 1 | +NVIDIA Tegra 20 I2S controller | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "nvidia,tegra20-i2s" | |
| 5 | +- reg : Should contain I2S registers location and length | |
| 6 | +- interrupts : Should contain I2S interrupt | |
| 7 | +- nvidia,dma-request-selector : The Tegra DMA controller's phandle and | |
| 8 | + request selector for this I2S controller | |
| 9 | + | |
| 10 | +Example: | |
| 11 | + | |
| 12 | +i2s@70002800 { | |
| 13 | + compatible = "nvidia,tegra20-i2s"; | |
| 14 | + reg = <0x70002800 0x200>; | |
| 15 | + interrupts = < 45 >; | |
| 16 | + nvidia,dma-request-selector = < &apbdma 2 >; | |
| 17 | +}; | |
| @@ -0,0 +1,50 @@ | ||
| 1 | +WM8903 audio CODEC | |
| 2 | + | |
| 3 | +This device supports I2C only. | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | + | |
| 7 | + - compatible : "wlf,wm8903" | |
| 8 | + | |
| 9 | + - reg : the I2C address of the device. | |
| 10 | + | |
| 11 | + - gpio-controller : Indicates this device is a GPIO controller. | |
| 12 | + | |
| 13 | + - #gpio-cells : Should be two. The first cell is the pin number and the | |
| 14 | + second cell is used to specify optional parameters (currently unused). | |
| 15 | + | |
| 16 | +Optional properties: | |
| 17 | + | |
| 18 | + - interrupts : The interrupt line the codec is connected to. | |
| 19 | + | |
| 20 | + - micdet-cfg : Default register value for R6 (Mic Bias). If absent, the | |
| 21 | + default is 0. | |
| 22 | + | |
| 23 | + - micdet-delay : The debounce delay for microphone detection in mS. If | |
| 24 | + absent, the default is 100. | |
| 25 | + | |
| 26 | + - gpio-cfg : A list of GPIO configuration register values. The list must | |
| 27 | + be 5 entries long. If absent, no configuration of these registers is | |
| 28 | + performed. If any entry has the value 0xffffffff, that GPIO's | |
| 29 | + configuration will not be modified. | |
| 30 | + | |
| 31 | +Example: | |
| 32 | + | |
| 33 | +codec: wm8903@1a { | |
| 34 | + compatible = "wlf,wm8903"; | |
| 35 | + reg = <0x1a>; | |
| 36 | + interrupts = < 347 >; | |
| 37 | + | |
| 38 | + gpio-controller; | |
| 39 | + #gpio-cells = <2>; | |
| 40 | + | |
| 41 | + micdet-cfg = <0>; | |
| 42 | + micdet-delay = <100>; | |
| 43 | + gpio-cfg = < | |
| 44 | + 0x0600 /* DMIC_LR, output */ | |
| 45 | + 0x0680 /* DMIC_DAT, input */ | |
| 46 | + 0x0000 /* GPIO, output, low */ | |
| 47 | + 0x0200 /* Interrupt, output */ | |
| 48 | + 0x01a0 /* BCLK, input, active high */ | |
| 49 | + >; | |
| 50 | +}; | |
| @@ -0,0 +1,18 @@ | ||
| 1 | +WM1811/WM8994/WM8958 audio CODEC | |
| 2 | + | |
| 3 | +These devices support both I2C and SPI (configured with pin strapping | |
| 4 | +on the board). | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + | |
| 8 | + - compatible : "wlf,wm1811", "wlf,wm8994", "wlf,wm8958" | |
| 9 | + | |
| 10 | + - reg : the I2C address of the device for I2C, the chip select | |
| 11 | + number for SPI. | |
| 12 | + | |
| 13 | +Example: | |
| 14 | + | |
| 15 | +codec: wm8994@1a { | |
| 16 | + compatible = "wlf,wm8994"; | |
| 17 | + reg = <0x1a>; | |
| 18 | +}; | |
| @@ -0,0 +1,13 @@ | ||
| 1 | +Tegra SOC USB controllers | |
| 2 | + | |
| 3 | +The device node for a USB controller that is part of a Tegra | |
| 4 | +SOC is as described in the document "Open Firmware Recommended | |
| 5 | +Practice : Universal Serial Bus" with the following modifications | |
| 6 | +and additions : | |
| 7 | + | |
| 8 | +Required properties : | |
| 9 | + - compatible : Should be "nvidia,tegra20-ehci" for USB controllers | |
| 10 | + used in host mode. | |
| 11 | + - phy_type : Should be one of "ulpi" or "utmi". | |
| 12 | + - nvidia,vbus-gpio : If present, specifies a gpio that needs to be | |
| 13 | + activated for the bus to be powered. | |
| @@ -8,7 +8,9 @@ amcc Applied Micro Circuits Corporation (APM, formally AMCC) · 7 unmodified lines | ||
| 8 | 8 | apm Applied Micro Circuits Corporation (APM) |
| 9 | 9 | arm ARM Ltd. |
| 10 | 10 | atmel Atmel Corporation |
| 11 | +cavium Cavium, Inc. | |
| 11 | 12 | chrp Common Hardware Reference Platform |
| 13 | +cortina Cortina Systems, Inc. | |
| 12 | 14 | dallas Maxim Integrated Products (formerly Dallas Semiconductor) |
| 13 | 15 | denx Denx Software Engineering |
| 14 | 16 | epson Seiko Epson Corp. |
| @@ -32,10 +34,13 @@ powervr Imagination Technologies · 17 unmodified lines | ||
| 32 | 34 | qcom Qualcomm, Inc. |
| 33 | 35 | ramtron Ramtron International |
| 34 | 36 | samsung Samsung Semiconductor |
| 37 | +sbs Smart Battery System | |
| 35 | 38 | schindler Schindler |
| 36 | 39 | sil Silicon Image |
| 37 | 40 | simtek |
| 38 | 41 | sirf SiRF Technology, Inc. |
| 42 | +st STMicroelectronics | |
| 39 | 43 | stericsson ST-Ericsson |
| 40 | 44 | ti Texas Instruments |
| 45 | +wlf Wolfson Microelectronics | |
| 41 | 46 | xlnx Xilinx |
| @@ -0,0 +1,96 @@ | ||
| 1 | +Digital Signature Verification API | |
| 2 | + | |
| 3 | +CONTENTS | |
| 4 | + | |
| 5 | +1. Introduction | |
| 6 | +2. API | |
| 7 | +3. User-space utilities | |
| 8 | + | |
| 9 | + | |
| 10 | +1. Introduction | |
| 11 | + | |
| 12 | +Digital signature verification API provides a method to verify digital signature. | |
| 13 | +Currently digital signatures are used by the IMA/EVM integrity protection subsystem. | |
| 14 | + | |
| 15 | +Digital signature verification is implemented using cut-down kernel port of | |
| 16 | +GnuPG multi-precision integers (MPI) library. The kernel port provides | |
| 17 | +memory allocation errors handling, has been refactored according to kernel | |
| 18 | +coding style, and checkpatch.pl reported errors and warnings have been fixed. | |
| 19 | + | |
| 20 | +Public key and signature consist of header and MPIs. | |
| 21 | + | |
| 22 | +struct pubkey_hdr { | |
| 23 | + uint8_t version; /* key format version */ | |
| 24 | + time_t timestamp; /* key made, always 0 for now */ | |
| 25 | + uint8_t algo; | |
| 26 | + uint8_t nmpi; | |
| 27 | + char mpi[0]; | |
| 28 | +} __packed; | |
| 29 | + | |
| 30 | +struct signature_hdr { | |
| 31 | + uint8_t version; /* signature format version */ | |
| 32 | + time_t timestamp; /* signature made */ | |
| 33 | + uint8_t algo; | |
| 34 | + uint8_t hash; | |
| 35 | + uint8_t keyid[8]; | |
| 36 | + uint8_t nmpi; | |
| 37 | + char mpi[0]; | |
| 38 | +} __packed; | |
| 39 | + | |
| 40 | +keyid equals to SHA1[12-19] over the total key content. | |
| 41 | +Signature header is used as an input to generate a signature. | |
| 42 | +Such approach insures that key or signature header could not be changed. | |
| 43 | +It protects timestamp from been changed and can be used for rollback | |
| 44 | +protection. | |
| 45 | + | |
| 46 | +2. API | |
| 47 | + | |
| 48 | +API currently includes only 1 function: | |
| 49 | + | |
| 50 | + digsig_verify() - digital signature verification with public key | |
| 51 | + | |
| 52 | + | |
| 53 | +/** | |
| 54 | + * digsig_verify() - digital signature verification with public key | |
| 55 | + * @keyring: keyring to search key in | |
| 56 | + * @sig: digital signature | |
| 57 | + * @sigen: length of the signature | |
| 58 | + * @data: data | |
| 59 | + * @datalen: length of the data | |
| 60 | + * @return: 0 on success, -EINVAL otherwise | |
| 61 | + * | |
| 62 | + * Verifies data integrity against digital signature. | |
| 63 | + * Currently only RSA is supported. | |
| 64 | + * Normally hash of the content is used as a data for this function. | |
| 65 | + * | |
| 66 | + */ | |
| 67 | +int digsig_verify(struct key *keyring, const char *sig, int siglen, | |
| 68 | + const char *data, int datalen); | |
| 69 | + | |
| 70 | +3. User-space utilities | |
| 71 | + | |
| 72 | +The signing and key management utilities evm-utils provide functionality | |
| 73 | +to generate signatures, to load keys into the kernel keyring. | |
| 74 | +Keys can be in PEM or converted to the kernel format. | |
| 75 | +When the key is added to the kernel keyring, the keyid defines the name | |
| 76 | +of the key: 5D2B05FC633EE3E8 in the example bellow. | |
| 77 | + | |
| 78 | +Here is example output of the keyctl utility. | |
| 79 | + | |
| 80 | +$ keyctl show | |
| 81 | +Session Keyring | |
| 82 | + -3 --alswrv 0 0 keyring: _ses | |
| 83 | +603976250 --alswrv 0 -1 \_ keyring: _uid.0 | |
| 84 | +817777377 --alswrv 0 0 \_ user: kmk | |
| 85 | +891974900 --alswrv 0 0 \_ encrypted: evm-key | |
| 86 | +170323636 --alswrv 0 0 \_ keyring: _module | |
| 87 | +548221616 --alswrv 0 0 \_ keyring: _ima | |
| 88 | +128198054 --alswrv 0 0 \_ keyring: _evm | |
| 89 | + | |
| 90 | +$ keyctl list 128198054 | |
| 91 | +1 key in keyring: | |
| 92 | +620789745: --alswrv 0 0 user: 5D2B05FC633EE3E8 | |
| 93 | + | |
| 94 | + | |
| 95 | +Dmitry Kasatkin | |
| 96 | +06.10.2011 | |
| @@ -0,0 +1,228 @@ | ||
| 1 | + DMA Buffer Sharing API Guide | |
| 2 | + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 3 | + | |
| 4 | + Sumit Semwal | |
| 5 | + <sumit dot semwal at linaro dot org> | |
| 6 | + <sumit dot semwal at ti dot com> | |
| 7 | + | |
| 8 | +This document serves as a guide to device-driver writers on what is the dma-buf | |
| 9 | +buffer sharing API, how to use it for exporting and using shared buffers. | |
| 10 | + | |
| 11 | +Any device driver which wishes to be a part of DMA buffer sharing, can do so as | |
| 12 | +either the 'exporter' of buffers, or the 'user' of buffers. | |
| 13 | + | |
| 14 | +Say a driver A wants to use buffers created by driver B, then we call B as the | |
| 15 | +exporter, and A as buffer-user. | |
| 16 | + | |
| 17 | +The exporter | |
| 18 | +- implements and manages operations[1] for the buffer | |
| 19 | +- allows other users to share the buffer by using dma_buf sharing APIs, | |
| 20 | +- manages the details of buffer allocation, | |
| 21 | +- decides about the actual backing storage where this allocation happens, | |
| 22 | +- takes care of any migration of scatterlist - for all (shared) users of this | |
| 23 | + buffer, | |
| 24 | + | |
| 25 | +The buffer-user | |
| 26 | +- is one of (many) sharing users of the buffer. | |
| 27 | +- doesn't need to worry about how the buffer is allocated, or where. | |
| 28 | +- needs a mechanism to get access to the scatterlist that makes up this buffer | |
| 29 | + in memory, mapped into its own address space, so it can access the same area | |
| 30 | + of memory. | |
| 31 | + | |
| 32 | +*IMPORTANT*: [see https://lkml.org/lkml/2011/12/20/211 for more details] | |
| 33 | +For this first version, A buffer shared using the dma_buf sharing API: | |
| 34 | +- *may* be exported to user space using "mmap" *ONLY* by exporter, outside of | |
| 35 | + this framework. | |
| 36 | +- may be used *ONLY* by importers that do not need CPU access to the buffer. | |
| 37 | + | |
| 38 | +The dma_buf buffer sharing API usage contains the following steps: | |
| 39 | + | |
| 40 | +1. Exporter announces that it wishes to export a buffer | |
| 41 | +2. Userspace gets the file descriptor associated with the exported buffer, and | |
| 42 | + passes it around to potential buffer-users based on use case | |
| 43 | +3. Each buffer-user 'connects' itself to the buffer | |
| 44 | +4. When needed, buffer-user requests access to the buffer from exporter | |
| 45 | +5. When finished with its use, the buffer-user notifies end-of-DMA to exporter | |
| 46 | +6. when buffer-user is done using this buffer completely, it 'disconnects' | |
| 47 | + itself from the buffer. | |
| 48 | + | |
| 49 | + | |
| 50 | +1. Exporter's announcement of buffer export | |
| 51 | + | |
| 52 | + The buffer exporter announces its wish to export a buffer. In this, it | |
| 53 | + connects its own private buffer data, provides implementation for operations | |
| 54 | + that can be performed on the exported dma_buf, and flags for the file | |
| 55 | + associated with this buffer. | |
| 56 | + | |
| 57 | + Interface: | |
| 58 | + struct dma_buf *dma_buf_export(void *priv, struct dma_buf_ops *ops, | |
| 59 | + size_t size, int flags) | |
| 60 | + | |
| 61 | + If this succeeds, dma_buf_export allocates a dma_buf structure, and returns a | |
| 62 | + pointer to the same. It also associates an anonymous file with this buffer, | |
| 63 | + so it can be exported. On failure to allocate the dma_buf object, it returns | |
| 64 | + NULL. | |
| 65 | + | |
| 66 | +2. Userspace gets a handle to pass around to potential buffer-users | |
| 67 | + | |
| 68 | + Userspace entity requests for a file-descriptor (fd) which is a handle to the | |
| 69 | + anonymous file associated with the buffer. It can then share the fd with other | |
| 70 | + drivers and/or processes. | |
| 71 | + | |
| 72 | + Interface: | |
| 73 | + int dma_buf_fd(struct dma_buf *dmabuf) | |
| 74 | + | |
| 75 | + This API installs an fd for the anonymous file associated with this buffer; | |
| 76 | + returns either 'fd', or error. | |
| 77 | + | |
| 78 | +3. Each buffer-user 'connects' itself to the buffer | |
| 79 | + | |
| 80 | + Each buffer-user now gets a reference to the buffer, using the fd passed to | |
| 81 | + it. | |
| 82 | + | |
| 83 | + Interface: | |
| 84 | + struct dma_buf *dma_buf_get(int fd) | |
| 85 | + | |
| 86 | + This API will return a reference to the dma_buf, and increment refcount for | |
| 87 | + it. | |
| 88 | + | |
| 89 | + After this, the buffer-user needs to attach its device with the buffer, which | |
| 90 | + helps the exporter to know of device buffer constraints. | |
| 91 | + | |
| 92 | + Interface: | |
| 93 | + struct dma_buf_attachment *dma_buf_attach(struct dma_buf *dmabuf, | |
| 94 | + struct device *dev) | |
| 95 | + | |
| 96 | + This API returns reference to an attachment structure, which is then used | |
| 97 | + for scatterlist operations. It will optionally call the 'attach' dma_buf | |
| 98 | + operation, if provided by the exporter. | |
| 99 | + | |
| 100 | + The dma-buf sharing framework does the bookkeeping bits related to managing | |
| 101 | + the list of all attachments to a buffer. | |
| 102 | + | |
| 103 | +Until this stage, the buffer-exporter has the option to choose not to actually | |
| 104 | +allocate the backing storage for this buffer, but wait for the first buffer-user | |
| 105 | +to request use of buffer for allocation. | |
| 106 | + | |
| 107 | + | |
| 108 | +4. When needed, buffer-user requests access to the buffer | |
| 109 | + | |
| 110 | + Whenever a buffer-user wants to use the buffer for any DMA, it asks for | |
| 111 | + access to the buffer using dma_buf_map_attachment API. At least one attach to | |
| 112 | + the buffer must have happened before map_dma_buf can be called. | |
| 113 | + | |
| 114 | + Interface: | |
| 115 | + struct sg_table * dma_buf_map_attachment(struct dma_buf_attachment *, | |
| 116 | + enum dma_data_direction); | |
| 117 | + | |
| 118 | + This is a wrapper to dma_buf->ops->map_dma_buf operation, which hides the | |
| 119 | + "dma_buf->ops->" indirection from the users of this interface. | |
| 120 | + | |
| 121 | + In struct dma_buf_ops, map_dma_buf is defined as | |
| 122 | + struct sg_table * (*map_dma_buf)(struct dma_buf_attachment *, | |
| 123 | + enum dma_data_direction); | |
| 124 | + | |
| 125 | + It is one of the buffer operations that must be implemented by the exporter. | |
| 126 | + It should return the sg_table containing scatterlist for this buffer, mapped | |
| 127 | + into caller's address space. | |
| 128 | + | |
| 129 | + If this is being called for the first time, the exporter can now choose to | |
| 130 | + scan through the list of attachments for this buffer, collate the requirements | |
| 131 | + of the attached devices, and choose an appropriate backing storage for the | |
| 132 | + buffer. | |
| 133 | + | |
| 134 | + Based on enum dma_data_direction, it might be possible to have multiple users | |
| 135 | + accessing at the same time (for reading, maybe), or any other kind of sharing | |
| 136 | + that the exporter might wish to make available to buffer-users. | |
| 137 | + | |
| 138 | + map_dma_buf() operation can return -EINTR if it is interrupted by a signal. | |
| 139 | + | |
| 140 | + | |
| 141 | +5. When finished, the buffer-user notifies end-of-DMA to exporter | |
| 142 | + | |
| 143 | + Once the DMA for the current buffer-user is over, it signals 'end-of-DMA' to | |
| 144 | + the exporter using the dma_buf_unmap_attachment API. | |
| 145 | + | |
| 146 | + Interface: | |
| 147 | + void dma_buf_unmap_attachment(struct dma_buf_attachment *, | |
| 148 | + struct sg_table *); | |
| 149 | + | |
| 150 | + This is a wrapper to dma_buf->ops->unmap_dma_buf() operation, which hides the | |
| 151 | + "dma_buf->ops->" indirection from the users of this interface. | |
| 152 | + | |
| 153 | + In struct dma_buf_ops, unmap_dma_buf is defined as | |
| 154 | + void (*unmap_dma_buf)(struct dma_buf_attachment *, struct sg_table *); | |
| 155 | + | |
| 156 | + unmap_dma_buf signifies the end-of-DMA for the attachment provided. Like | |
| 157 | + map_dma_buf, this API also must be implemented by the exporter. | |
| 158 | + | |
| 159 | + | |
| 160 | +6. when buffer-user is done using this buffer, it 'disconnects' itself from the | |
| 161 | + buffer. | |
| 162 | + | |
| 163 | + After the buffer-user has no more interest in using this buffer, it should | |
| 164 | + disconnect itself from the buffer: | |
| 165 | + | |
| 166 | + - it first detaches itself from the buffer. | |
| 167 | + | |
| 168 | + Interface: | |
| 169 | + void dma_buf_detach(struct dma_buf *dmabuf, | |
| 170 | + struct dma_buf_attachment *dmabuf_attach); | |
| 171 | + | |
| 172 | + This API removes the attachment from the list in dmabuf, and optionally calls | |
| 173 | + dma_buf->ops->detach(), if provided by exporter, for any housekeeping bits. | |
| 174 | + | |
| 175 | + - Then, the buffer-user returns the buffer reference to exporter. | |
| 176 | + | |
| 177 | + Interface: | |
| 178 | + void dma_buf_put(struct dma_buf *dmabuf); | |
| 179 | + | |
| 180 | + This API then reduces the refcount for this buffer. | |
| 181 | + | |
| 182 | + If, as a result of this call, the refcount becomes 0, the 'release' file | |
| 183 | + operation related to this fd is called. It calls the dmabuf->ops->release() | |
| 184 | + operation in turn, and frees the memory allocated for dmabuf when exported. | |
| 185 | + | |
| 186 | +NOTES: | |
| 187 | +- Importance of attach-detach and {map,unmap}_dma_buf operation pairs | |
| 188 | + The attach-detach calls allow the exporter to figure out backing-storage | |
| 189 | + constraints for the currently-interested devices. This allows preferential | |
| 190 | + allocation, and/or migration of pages across different types of storage | |
| 191 | + available, if possible. | |
| 192 | + | |
| 193 | + Bracketing of DMA access with {map,unmap}_dma_buf operations is essential | |
| 194 | + to allow just-in-time backing of storage, and migration mid-way through a | |
| 195 | + use-case. | |
| 196 | + | |
| 197 | +- Migration of backing storage if needed | |
| 198 | + If after | |
| 199 | + - at least one map_dma_buf has happened, | |
| 200 | + - and the backing storage has been allocated for this buffer, | |
| 201 | + another new buffer-user intends to attach itself to this buffer, it might | |
| 202 | + be allowed, if possible for the exporter. | |
| 203 | + | |
| 204 | + In case it is allowed by the exporter: | |
| 205 | + if the new buffer-user has stricter 'backing-storage constraints', and the | |
| 206 | + exporter can handle these constraints, the exporter can just stall on the | |
| 207 | + map_dma_buf until all outstanding access is completed (as signalled by | |
| 208 | + unmap_dma_buf). | |
| 209 | + Once all users have finished accessing and have unmapped this buffer, the | |
| 210 | + exporter could potentially move the buffer to the stricter backing-storage, | |
| 211 | + and then allow further {map,unmap}_dma_buf operations from any buffer-user | |
| 212 | + from the migrated backing-storage. | |
| 213 | + | |
| 214 | + If the exporter cannot fulfil the backing-storage constraints of the new | |
| 215 | + buffer-user device as requested, dma_buf_attach() would return an error to | |
| 216 | + denote non-compatibility of the new buffer-sharing request with the current | |
| 217 | + buffer. | |
| 218 | + | |
| 219 | + If the exporter chooses not to allow an attach() operation once a | |
| 220 | + map_dma_buf() API has been called, it simply returns an error. | |
| 221 | + | |
| 222 | +Miscellaneous notes: | |
| 223 | +- Any exporters or users of the dma-buf buffer sharing framework must have | |
| 224 | + a 'select DMA_SHARED_BUFFER' in their respective Kconfigs. | |
| 225 | + | |
| 226 | +References: | |
| 227 | +[1] struct dma_buf_ops in include/linux/dma-buf.h | |
| 228 | +[2] All interfaces mentioned above defined in include/linux/dma-buf.h | |
| @@ -75,6 +75,10 @@ The slave DMA usage consists of following steps: · 74 unmodified lines | ||
| 75 | 75 | slave_sg - DMA a list of scatter gather buffers from/to a peripheral |
| 76 | 76 | dma_cyclic - Perform a cyclic DMA operation from/to a peripheral till the |
| 77 | 77 | operation is explicitly stopped. |
| 78 | + interleaved_dma - This is common to Slave as well as M2M clients. For slave | |
| 79 | + address of devices' fifo could be already known to the driver. | |
| 80 | + Various types of operations could be expressed by setting | |
| 81 | + appropriate values to the 'dma_interleaved_template' members. | |
| 78 | 82 | |
| 79 | 83 | A non-NULL return of this transfer API represents a "descriptor" for |
| 80 | 84 | the given transaction. |
| @@ -89,6 +93,10 @@ The slave DMA usage consists of following steps: · 8 unmodified lines | ||
| 89 | 93 | struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, |
| 90 | 94 | size_t period_len, enum dma_data_direction direction); |
| 91 | 95 | |
| 96 | + struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)( | |
| 97 | + struct dma_chan *chan, struct dma_interleaved_template *xt, | |
| 98 | + unsigned long flags); | |
| 99 | + | |
| 92 | 100 | The peripheral driver is expected to have mapped the scatterlist for |
| 93 | 101 | the DMA operation prior to calling device_prep_slave_sg, and must |
| 94 | 102 | keep the scatterlist mapped until the DMA operation has completed. |
| @@ -66,7 +66,6 @@ GRTAGS · 65 unmodified lines | ||
| 66 | 66 | GSYMS |
| 67 | 67 | GTAGS |
| 68 | 68 | Image |
| 69 | −Kerntypes | |
| 70 | 69 | Module.markers |
| 71 | 70 | Module.symvers |
| 72 | 71 | PENDING |
| @@ -262,6 +262,7 @@ IOMAP · 261 unmodified lines | ||
| 262 | 262 | devm_ioremap() |
| 263 | 263 | devm_ioremap_nocache() |
| 264 | 264 | devm_iounmap() |
| 265 | + devm_request_and_ioremap() : checks resource, requests region, ioremaps | |
| 265 | 266 | pcim_iomap() |
| 266 | 267 | pcim_iounmap() |
| 267 | 268 | pcim_iomap_table() : array of mapped addresses indexed by BAR |
| @@ -27,8 +27,8 @@ use IO::Handle; · 26 unmodified lines | ||
| 27 | 27 | "or51211", "or51132_qam", "or51132_vsb", "bluebird", |
| 28 | 28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", |
| 29 | 29 | "af9015", "ngene", "az6027", "lme2510_lg", "lme2510c_s7395", |
| 30 | − "lme2510c_s7395_old", "drxk", "drxk_terratec_h5", "tda10071", | |
| 31 | − "it9135" ); | |
| 30 | + "lme2510c_s7395_old", "drxk", "drxk_terratec_h5", | |
| 31 | + "drxk_hauppauge_hvr930c", "tda10071", "it9135", "it9137"); | |
| 32 | 32 | |
| 33 | 33 | # Check args |
| 34 | 34 | syntax() if (scalar(@ARGV) != 1); |
| @@ -644,6 +644,24 @@ sub drxk { · 609 unmodified lines | ||
| 644 | 644 | "$fwfile" |
| 645 | 645 | } |
| 646 | 646 | |
| 647 | +sub drxk_hauppauge_hvr930c { | |
| 648 | + my $url = "http://www.wintvcd.co.uk/drivers/"; | |
| 649 | + my $zipfile = "HVR-9x0_5_10_325_28153_SIGNED.zip"; | |
| 650 | + my $hash = "83ab82e7e9480ec8bf1ae0155ca63c88"; | |
| 651 | + my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1); | |
| 652 | + my $drvfile = "HVR-900/emOEM.sys"; | |
| 653 | + my $fwfile = "dvb-usb-hauppauge-hvr930c-drxk.fw"; | |
| 654 | + | |
| 655 | + checkstandard(); | |
| 656 | + | |
| 657 | + wgetfile($zipfile, $url . $zipfile); | |
| 658 | + verify($zipfile, $hash); | |
| 659 | + unzip($zipfile, $tmpdir); | |
| 660 | + extract("$tmpdir/$drvfile", 0x117b0, 42692, "$fwfile"); | |
| 661 | + | |
| 662 | + "$fwfile" | |
| 663 | +} | |
| 664 | + | |
| 647 | 665 | sub drxk_terratec_h5 { |
| 648 | 666 | my $url = "http://www.linuxtv.org/downloads/firmware/"; |
| 649 | 667 | my $hash = "19000dada8e2741162ccc50cc91fa7f1"; |
| @@ -658,6 +676,26 @@ sub drxk_terratec_h5 { · 8 unmodified lines | ||
| 658 | 676 | } |
| 659 | 677 | |
| 660 | 678 | sub it9135 { |
| 679 | + my $sourcefile = "dvb-usb-it9135.zip"; | |
| 680 | + my $url = "http://www.ite.com.tw/uploads/firmware/v3.6.0.0/$sourcefile"; | |
| 681 | + my $hash = "1e55f6c8833f1d0ae067c2bb2953e6a9"; | |
| 682 | + my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 0); | |
| 683 | + my $outfile = "dvb-usb-it9135.fw"; | |
| 684 | + my $fwfile1 = "dvb-usb-it9135-01.fw"; | |
| 685 | + my $fwfile2 = "dvb-usb-it9135-02.fw"; | |
| 686 | + | |
| 687 | + checkstandard(); | |
| 688 | + | |
| 689 | + wgetfile($sourcefile, $url); | |
| 690 | + unzip($sourcefile, $tmpdir); | |
| 691 | + verify("$tmpdir/$outfile", $hash); | |
| 692 | + extract("$tmpdir/$outfile", 64, 8128, "$fwfile1"); | |
| 693 | + extract("$tmpdir/$outfile", 12866, 5817, "$fwfile2"); | |
| 694 | + | |
| 695 | + "$fwfile1 $fwfile2" | |
| 696 | +} | |
| 697 | + | |
| 698 | +sub it9137 { | |
| 661 | 699 | my $url = "http://kworld.server261.com/kworld/CD/ITE_TiVme/V1.00/"; |
| 662 | 700 | my $zipfile = "Driver_V10.323.1.0412.100412.zip"; |
| 663 | 701 | my $hash = "79b597dc648698ed6820845c0c9d0d37"; |
| @@ -0,0 +1,306 @@ | ||
| 1 | + The Frame Buffer Device API | |
| 2 | + --------------------------- | |
| 3 | + | |
| 4 | +Last revised: June 21, 2011 | |
| 5 | + | |
| 6 | + | |
| 7 | +0. Introduction | |
| 8 | +--------------- | |
| 9 | + | |
| 10 | +This document describes the frame buffer API used by applications to interact | |
| 11 | +with frame buffer devices. In-kernel APIs between device drivers and the frame | |
| 12 | +buffer core are not described. | |
| 13 | + | |
| 14 | +Due to a lack of documentation in the original frame buffer API, drivers | |
| 15 | +behaviours differ in subtle (and not so subtle) ways. This document describes | |
| 16 | +the recommended API implementation, but applications should be prepared to | |
| 17 | +deal with different behaviours. | |
| 18 | + | |
| 19 | + | |
| 20 | +1. Capabilities | |
| 21 | +--------------- | |
| 22 | + | |
| 23 | +Device and driver capabilities are reported in the fixed screen information | |
| 24 | +capabilities field. | |
| 25 | + | |
| 26 | +struct fb_fix_screeninfo { | |
| 27 | + ... | |
| 28 | + __u16 capabilities; /* see FB_CAP_* */ | |
| 29 | + ... | |
| 30 | +}; | |
| 31 | + | |
| 32 | +Application should use those capabilities to find out what features they can | |
| 33 | +expect from the device and driver. | |
| 34 | + | |
| 35 | +- FB_CAP_FOURCC | |
| 36 | + | |
| 37 | +The driver supports the four character code (FOURCC) based format setting API. | |
| 38 | +When supported, formats are configured using a FOURCC instead of manually | |
| 39 | +specifying color components layout. | |
| 40 | + | |
| 41 | + | |
| 42 | +2. Types and visuals | |
| 43 | +-------------------- | |
| 44 | + | |
| 45 | +Pixels are stored in memory in hardware-dependent formats. Applications need | |
| 46 | +to be aware of the pixel storage format in order to write image data to the | |
| 47 | +frame buffer memory in the format expected by the hardware. | |
| 48 | + | |
| 49 | +Formats are described by frame buffer types and visuals. Some visuals require | |
| 50 | +additional information, which are stored in the variable screen information | |
| 51 | +bits_per_pixel, grayscale, red, green, blue and transp fields. | |
| 52 | + | |
| 53 | +Visuals describe how color information is encoded and assembled to create | |
| 54 | +macropixels. Types describe how macropixels are stored in memory. The following | |
| 55 | +types and visuals are supported. | |
| 56 | + | |
| 57 | +- FB_TYPE_PACKED_PIXELS | |
| 58 | + | |
| 59 | +Macropixels are stored contiguously in a single plane. If the number of bits | |
| 60 | +per macropixel is not a multiple of 8, whether macropixels are padded to the | |
| 61 | +next multiple of 8 bits or packed together into bytes depends on the visual. | |
| 62 | + | |
| 63 | +Padding at end of lines may be present and is then reported through the fixed | |
| 64 | +screen information line_length field. | |
| 65 | + | |
| 66 | +- FB_TYPE_PLANES | |
| 67 | + | |
| 68 | +Macropixels are split across multiple planes. The number of planes is equal to | |
| 69 | +the number of bits per macropixel, with plane i'th storing i'th bit from all | |
| 70 | +macropixels. | |
| 71 | + | |
| 72 | +Planes are located contiguously in memory. | |
| 73 | + | |
| 74 | +- FB_TYPE_INTERLEAVED_PLANES | |
| 75 | + | |
| 76 | +Macropixels are split across multiple planes. The number of planes is equal to | |
| 77 | +the number of bits per macropixel, with plane i'th storing i'th bit from all | |
| 78 | +macropixels. | |
| 79 | + | |
| 80 | +Planes are interleaved in memory. The interleave factor, defined as the | |
| 81 | +distance in bytes between the beginning of two consecutive interleaved blocks | |
| 82 | +belonging to different planes, is stored in the fixed screen information | |
| 83 | +type_aux field. | |
| 84 | + | |
| 85 | +- FB_TYPE_FOURCC | |
| 86 | + | |
| 87 | +Macropixels are stored in memory as described by the format FOURCC identifier | |
| 88 | +stored in the variable screen information grayscale field. | |
| 89 | + | |
| 90 | +- FB_VISUAL_MONO01 | |
| 91 | + | |
| 92 | +Pixels are black or white and stored on a number of bits (typically one) | |
| 93 | +specified by the variable screen information bpp field. | |
| 94 | + | |
| 95 | +Black pixels are represented by all bits set to 1 and white pixels by all bits | |
| 96 | +set to 0. When the number of bits per pixel is smaller than 8, several pixels | |
| 97 | +are packed together in a byte. | |
| 98 | + | |
| 99 | +FB_VISUAL_MONO01 is currently used with FB_TYPE_PACKED_PIXELS only. | |
| 100 | + | |
| 101 | +- FB_VISUAL_MONO10 | |
| 102 | + | |
| 103 | +Pixels are black or white and stored on a number of bits (typically one) | |
| 104 | +specified by the variable screen information bpp field. | |
| 105 | + | |
| 106 | +Black pixels are represented by all bits set to 0 and white pixels by all bits | |
| 107 | +set to 1. When the number of bits per pixel is smaller than 8, several pixels | |
| 108 | +are packed together in a byte. | |
| 109 | + | |
| 110 | +FB_VISUAL_MONO01 is currently used with FB_TYPE_PACKED_PIXELS only. | |
| 111 | + | |
| 112 | +- FB_VISUAL_TRUECOLOR | |
| 113 | + | |
| 114 | +Pixels are broken into red, green and blue components, and each component | |
| 115 | +indexes a read-only lookup table for the corresponding value. Lookup tables | |
| 116 | +are device-dependent, and provide linear or non-linear ramps. | |
| 117 | + | |
| 118 | +Each component is stored in a macropixel according to the variable screen | |
| 119 | +information red, green, blue and transp fields. | |
| 120 | + | |
| 121 | +- FB_VISUAL_PSEUDOCOLOR and FB_VISUAL_STATIC_PSEUDOCOLOR | |
| 122 | + | |
| 123 | +Pixel values are encoded as indices into a colormap that stores red, green and | |
| 124 | +blue components. The colormap is read-only for FB_VISUAL_STATIC_PSEUDOCOLOR | |
| 125 | +and read-write for FB_VISUAL_PSEUDOCOLOR. | |
| 126 | + | |
| 127 | +Each pixel value is stored in the number of bits reported by the variable | |
| 128 | +screen information bits_per_pixel field. | |
| 129 | + | |
| 130 | +- FB_VISUAL_DIRECTCOLOR | |
| 131 | + | |
| 132 | +Pixels are broken into red, green and blue components, and each component | |
| 133 | +indexes a programmable lookup table for the corresponding value. | |
| 134 | + | |
| 135 | +Each component is stored in a macropixel according to the variable screen | |
| 136 | +information red, green, blue and transp fields. | |
| 137 | + | |
| 138 | +- FB_VISUAL_FOURCC | |
| 139 | + | |
| 140 | +Pixels are encoded and interpreted as described by the format FOURCC | |
| 141 | +identifier stored in the variable screen information grayscale field. | |
| 142 | + | |
| 143 | + | |
| 144 | +3. Screen information | |
| 145 | +--------------------- | |
| 146 | + | |
| 147 | +Screen information are queried by applications using the FBIOGET_FSCREENINFO | |
| 148 | +and FBIOGET_VSCREENINFO ioctls. Those ioctls take a pointer to a | |
| 149 | +fb_fix_screeninfo and fb_var_screeninfo structure respectively. | |
| 150 | + | |
| 151 | +struct fb_fix_screeninfo stores device independent unchangeable information | |
| 152 | +about the frame buffer device and the current format. Those information can't | |
| 153 | +be directly modified by applications, but can be changed by the driver when an | |
| 154 | +application modifies the format. | |
| 155 | + | |
| 156 | +struct fb_fix_screeninfo { | |
| 157 | + char id[16]; /* identification string eg "TT Builtin" */ | |
| 158 | + unsigned long smem_start; /* Start of frame buffer mem */ | |
| 159 | + /* (physical address) */ | |
| 160 | + __u32 smem_len; /* Length of frame buffer mem */ | |
| 161 | + __u32 type; /* see FB_TYPE_* */ | |
| 162 | + __u32 type_aux; /* Interleave for interleaved Planes */ | |
| 163 | + __u32 visual; /* see FB_VISUAL_* */ | |
| 164 | + __u16 xpanstep; /* zero if no hardware panning */ | |
| 165 | + __u16 ypanstep; /* zero if no hardware panning */ | |
| 166 | + __u16 ywrapstep; /* zero if no hardware ywrap */ | |
| 167 | + __u32 line_length; /* length of a line in bytes */ | |
| 168 | + unsigned long mmio_start; /* Start of Memory Mapped I/O */ | |
| 169 | + /* (physical address) */ | |
| 170 | + __u32 mmio_len; /* Length of Memory Mapped I/O */ | |
| 171 | + __u32 accel; /* Indicate to driver which */ | |
| 172 | + /* specific chip/card we have */ | |
| 173 | + __u16 capabilities; /* see FB_CAP_* */ | |
| 174 | + __u16 reserved[2]; /* Reserved for future compatibility */ | |
| 175 | +}; | |
| 176 | + | |
| 177 | +struct fb_var_screeninfo stores device independent changeable information | |
| 178 | +about a frame buffer device, its current format and video mode, as well as | |
| 179 | +other miscellaneous parameters. | |
| 180 | + | |
| 181 | +struct fb_var_screeninfo { | |
| 182 | + __u32 xres; /* visible resolution */ | |
| 183 | + __u32 yres; | |
| 184 | + __u32 xres_virtual; /* virtual resolution */ | |
| 185 | + __u32 yres_virtual; | |
| 186 | + __u32 xoffset; /* offset from virtual to visible */ | |
| 187 | + __u32 yoffset; /* resolution */ | |
| 188 | + | |
| 189 | + __u32 bits_per_pixel; /* guess what */ | |
| 190 | + __u32 grayscale; /* 0 = color, 1 = grayscale, */ | |
| 191 | + /* >1 = FOURCC */ | |
| 192 | + struct fb_bitfield red; /* bitfield in fb mem if true color, */ | |
| 193 | + struct fb_bitfield green; /* else only length is significant */ | |
| 194 | + struct fb_bitfield blue; | |
| 195 | + struct fb_bitfield transp; /* transparency */ | |
| 196 | + | |
| 197 | + __u32 nonstd; /* != 0 Non standard pixel format */ | |
| 198 | + | |
| 199 | + __u32 activate; /* see FB_ACTIVATE_* */ | |
| 200 | + | |
| 201 | + __u32 height; /* height of picture in mm */ | |
| 202 | + __u32 width; /* width of picture in mm */ | |
| 203 | + | |
| 204 | + __u32 accel_flags; /* (OBSOLETE) see fb_info.flags */ | |
| 205 | + | |
| 206 | + /* Timing: All values in pixclocks, except pixclock (of course) */ | |
| 207 | + __u32 pixclock; /* pixel clock in ps (pico seconds) */ | |
| 208 | + __u32 left_margin; /* time from sync to picture */ | |
| 209 | + __u32 right_margin; /* time from picture to sync */ | |
| 210 | + __u32 upper_margin; /* time from sync to picture */ | |
| 211 | + __u32 lower_margin; | |
| 212 | + __u32 hsync_len; /* length of horizontal sync */ | |
| 213 | + __u32 vsync_len; /* length of vertical sync */ | |
| 214 | + __u32 sync; /* see FB_SYNC_* */ | |
| 215 | + __u32 vmode; /* see FB_VMODE_* */ | |
| 216 | + __u32 rotate; /* angle we rotate counter clockwise */ | |
| 217 | + __u32 colorspace; /* colorspace for FOURCC-based modes */ | |
| 218 | + __u32 reserved[4]; /* Reserved for future compatibility */ | |
| 219 | +}; | |
| 220 | + | |
| 221 | +To modify variable information, applications call the FBIOPUT_VSCREENINFO | |
| 222 | +ioctl with a pointer to a fb_var_screeninfo structure. If the call is | |
| 223 | +successful, the driver will update the fixed screen information accordingly. | |
| 224 | + | |
| 225 | +Instead of filling the complete fb_var_screeninfo structure manually, | |
| 226 | +applications should call the FBIOGET_VSCREENINFO ioctl and modify only the | |
| 227 | +fields they care about. | |
| 228 | + | |
| 229 | + | |
| 230 | +4. Format configuration | |
| 231 | +----------------------- | |
| 232 | + | |
| 233 | +Frame buffer devices offer two ways to configure the frame buffer format: the | |
| 234 | +legacy API and the FOURCC-based API. | |
| 235 | + | |
| 236 | + | |
| 237 | +The legacy API has been the only frame buffer format configuration API for a | |
| 238 | +long time and is thus widely used by application. It is the recommended API | |
| 239 | +for applications when using RGB and grayscale formats, as well as legacy | |
| 240 | +non-standard formats. | |
| 241 | + | |
| 242 | +To select a format, applications set the fb_var_screeninfo bits_per_pixel field | |
| 243 | +to the desired frame buffer depth. Values up to 8 will usually map to | |
| 244 | +monochrome, grayscale or pseudocolor visuals, although this is not required. | |
| 245 | + | |
| 246 | +- For grayscale formats, applications set the grayscale field to one. The red, | |
| 247 | + blue, green and transp fields must be set to 0 by applications and ignored by | |
| 248 | + drivers. Drivers must fill the red, blue and green offsets to 0 and lengths | |
| 249 | + to the bits_per_pixel value. | |
| 250 | + | |
| 251 | +- For pseudocolor formats, applications set the grayscale field to zero. The | |
| 252 | + red, blue, green and transp fields must be set to 0 by applications and | |
| 253 | + ignored by drivers. Drivers must fill the red, blue and green offsets to 0 | |
| 254 | + and lengths to the bits_per_pixel value. | |
| 255 | + | |
| 256 | +- For truecolor and directcolor formats, applications set the grayscale field | |
| 257 | + to zero, and the red, blue, green and transp fields to describe the layout of | |
| 258 | + color components in memory. | |
| 259 | + | |
| 260 | +struct fb_bitfield { | |
| 261 | + __u32 offset; /* beginning of bitfield */ | |
| 262 | + __u32 length; /* length of bitfield */ | |
| 263 | + __u32 msb_right; /* != 0 : Most significant bit is */ | |
| 264 | + /* right */ | |
| 265 | +}; | |
| 266 | + | |
| 267 | + Pixel values are bits_per_pixel wide and are split in non-overlapping red, | |
| 268 | + green, blue and alpha (transparency) components. Location and size of each | |
| 269 | + component in the pixel value are described by the fb_bitfield offset and | |
| 270 | + length fields. Offset are computed from the right. | |
| 271 | + | |
| 272 | + Pixels are always stored in an integer number of bytes. If the number of | |
| 273 | + bits per pixel is not a multiple of 8, pixel values are padded to the next | |
| 274 | + multiple of 8 bits. | |
| 275 | + | |
| 276 | +Upon successful format configuration, drivers update the fb_fix_screeninfo | |
| 277 | +type, visual and line_length fields depending on the selected format. | |
| 278 | + | |
| 279 | + | |
| 280 | +The FOURCC-based API replaces format descriptions by four character codes | |
| 281 | +(FOURCC). FOURCCs are abstract identifiers that uniquely define a format | |
| 282 | +without explicitly describing it. This is the only API that supports YUV | |
| 283 | +formats. Drivers are also encouraged to implement the FOURCC-based API for RGB | |
| 284 | +and grayscale formats. | |
| 285 | + | |
| 286 | +Drivers that support the FOURCC-based API report this capability by setting | |
| 287 | +the FB_CAP_FOURCC bit in the fb_fix_screeninfo capabilities field. | |
| 288 | + | |
| 289 | +FOURCC definitions are located in the linux/videodev2.h header. However, and | |
| 290 | +despite starting with the V4L2_PIX_FMT_prefix, they are not restricted to V4L2 | |
| 291 | +and don't require usage of the V4L2 subsystem. FOURCC documentation is | |
| 292 | +available in Documentation/DocBook/v4l/pixfmt.xml. | |
| 293 | + | |
| 294 | +To select a format, applications set the grayscale field to the desired FOURCC. | |
| 295 | +For YUV formats, they should also select the appropriate colorspace by setting | |
| 296 | +the colorspace field to one of the colorspaces listed in linux/videodev2.h and | |
| 297 | +documented in Documentation/DocBook/v4l/colorspaces.xml. | |
| 298 | + | |
| 299 | +The red, green, blue and transp fields are not used with the FOURCC-based API. | |
| 300 | +For forward compatibility reasons applications must zero those fields, and | |
| 301 | +drivers must ignore them. Values other than 0 may get a meaning in future | |
| 302 | +extensions. | |
| 303 | + | |
| 304 | +Upon successful format configuration, drivers update the fb_fix_screeninfo | |
| 305 | +type, visual and line_length fields depending on the selected format. The type | |
| 306 | +and visual fields are set to FB_TYPE_FOURCC and FB_VISUAL_FOURCC respectively. | |
| @@ -85,17 +85,6 @@ Who: Robin Getz <rgetz@blackfin.uclinux.org> & Matt Mackall <mpm@selenic.com> · 84 unmodified lines | ||
| 85 | 85 | |
| 86 | 86 | --------------------------- |
| 87 | 87 | |
| 88 | −What: Deprecated snapshot ioctls | |
| 89 | −When: 2.6.36 | |
| 90 | − | |
| 91 | −Why: The ioctls in kernel/power/user.c were marked as deprecated long time | |
| 92 | − ago. Now they notify users about that so that they need to replace | |
| 93 | − their userspace. After some more time, remove them completely. | |
| 94 | − | |
| 95 | −Who: Jiri Slaby <jirislaby@gmail.com> | |
| 96 | − | |
| 97 | −--------------------------- | |
| 98 | − | |
| 99 | 88 | What: The ieee80211_regdom module parameter |
| 100 | 89 | When: March 2010 / desktop catchup |
| 101 | 90 | |
| @@ -263,8 +252,7 @@ Who: Ravikiran Thirumalai <kiran@scalex86.org> · 161 unmodified lines | ||
| 263 | 252 | |
| 264 | 253 | What: Code that is now under CONFIG_WIRELESS_EXT_SYSFS |
| 265 | 254 | (in net/core/net-sysfs.c) |
| 266 | −When: After the only user (hal) has seen a release with the patches | |
| 267 | − for enough time, probably some time in 2010. | |
| 255 | +When: 3.5 | |
| 268 | 256 | Why: Over 1K .text/.data size reduction, data is available in other |
| 269 | 257 | ways (ioctls) |
| 270 | 258 | Who: Johannes Berg <johannes@sipsolutions.net> |
| @@ -362,15 +350,6 @@ Who: anybody or Florian Mickler <florian@mickler.org> · 91 unmodified lines | ||
| 362 | 350 | |
| 363 | 351 | ---------------------------- |
| 364 | 352 | |
| 365 | −What: KVM paravirt mmu host support | |
| 366 | −When: January 2011 | |
| 367 | −Why: The paravirt mmu host support is slower than non-paravirt mmu, both | |
| 368 | − on newer and older hardware. It is already not exposed to the guest, | |
| 369 | − and kept only for live migration purposes. | |
| 370 | −Who: Avi Kivity <avi@redhat.com> | |
| 371 | − | |
| 372 | −---------------------------- | |
| 373 | − | |
| 374 | 353 | What: iwlwifi 50XX module parameters |
| 375 | 354 | When: 3.0 |
| 376 | 355 | Why: The "..50" modules parameters were used to configure 5000 series and |
| @@ -460,52 +439,6 @@ Who: Jean Delvare <khali@linux-fr.org> · 83 unmodified lines | ||
| 460 | 439 | |
| 461 | 440 | ---------------------------- |
| 462 | 441 | |
| 463 | −What: Support for driver specific ioctls in the pwc driver (everything | |
| 464 | − defined in media/pwc-ioctl.h) | |
| 465 | −When: 3.3 | |
| 466 | −Why: This stems from the v4l1 era, with v4l2 everything can be done with | |
| 467 | − standardized v4l2 API calls | |
| 468 | −Who: Hans de Goede <hdegoede@redhat.com> | |
| 469 | − | |
| 470 | −---------------------------- | |
| 471 | − | |
| 472 | −What: Driver specific sysfs API in the pwc driver | |
| 473 | −When: 3.3 | |
| 474 | −Why: Setting pan/tilt should be done with v4l2 controls, like with other | |
| 475 | − cams. The button is available as a standard input device | |
| 476 | −Who: Hans de Goede <hdegoede@redhat.com> | |
| 477 | − | |
| 478 | −---------------------------- | |
| 479 | − | |
| 480 | −What: Driver specific use of pixfmt.priv in the pwc driver | |
| 481 | −When: 3.3 | |
| 482 | −Why: The .priv field never was intended for this, setting a framerate is | |
| 483 | − support using the standardized S_PARM ioctl | |
| 484 | −Who: Hans de Goede <hdegoede@redhat.com> | |
| 485 | − | |
| 486 | −---------------------------- | |
| 487 | − | |
| 488 | −What: Software emulation of arbritary resolutions in the pwc driver | |
| 489 | −When: 3.3 | |
| 490 | −Why: The pwc driver claims to support any resolution between 160x120 | |
| 491 | − and 640x480, but emulates this by simply drawing a black border | |
| 492 | − around the image. Userspace can draw its own black border if it | |
| 493 | − really wants one. | |
| 494 | −Who: Hans de Goede <hdegoede@redhat.com> | |
| 495 | − | |
| 496 | −---------------------------- | |
| 497 | − | |
| 498 | −What: For VIDIOC_S_FREQUENCY the type field must match the device node's type. | |
| 499 | − If not, return -EINVAL. | |
| 500 | −When: 3.2 | |
| 501 | −Why: It makes no sense to switch the tuner to radio mode by calling | |
| 502 | − VIDIOC_S_FREQUENCY on a video node, or to switch the tuner to tv mode by | |
| 503 | − calling VIDIOC_S_FREQUENCY on a radio node. This is the first step of a | |
| 504 | − move to more consistent handling of tv and radio tuners. | |
| 505 | −Who: Hans Verkuil <hans.verkuil@cisco.com> | |
| 506 | − | |
| 507 | −---------------------------- | |
| 508 | − | |
| 509 | 442 | What: Opening a radio device node will no longer automatically switch the |
| 510 | 443 | tuner mode from tv to radio. |
| 511 | 444 | When: 3.3 |
| @@ -535,6 +468,20 @@ Why: In 3.0, we can now autodetect internal 3G device and already have · 23 unmodified lines | ||
| 535 | 468 | information log when acer-wmi initial. |
| 536 | 469 | Who: Lee, Chun-Yi <jlee@novell.com> |
| 537 | 470 | |
| 471 | +--------------------------- | |
| 472 | + | |
| 473 | +What: /sys/devices/platform/_UDC_/udc/_UDC_/is_dualspeed file and | |
| 474 | + is_dualspeed line in /sys/devices/platform/ci13xxx_*/udc/device file. | |
| 475 | +When: 3.8 | |
| 476 | +Why: The is_dualspeed file is superseded by maximum_speed in the same | |
| 477 | + directory and is_dualspeed line in device file is superseded by | |
| 478 | + max_speed line in the same file. | |
| 479 | + | |
| 480 | + The maximum_speed/max_speed specifies maximum speed supported by UDC. | |
| 481 | + To check if dualspeeed is supported, check if the value is >= 3. | |
| 482 | + Various possible speeds are defined in <linux/usb/ch9.h>. | |
| 483 | +Who: Michal Nazarewicz <mina86@mina86.com> | |
| 484 | + | |
| 538 | 485 | ---------------------------- |
| 539 | 486 | |
| 540 | 487 | What: The XFS nodelaylog mount option |
| @@ -551,3 +498,15 @@ When: 3.5 · 10 unmodified lines | ||
| 551 | 498 | Why: The iwlagn module has been renamed iwlwifi. The alias will be around |
| 552 | 499 | for backward compatibility for several cycles and then dropped. |
| 553 | 500 | Who: Don Fry <donald.h.fry@intel.com> |
| 501 | + | |
| 502 | +---------------------------- | |
| 503 | + | |
| 504 | +What: pci_scan_bus_parented() | |
| 505 | +When: 3.5 | |
| 506 | +Why: The pci_scan_bus_parented() interface creates a new root bus. The | |
| 507 | + bus is created with default resources (ioport_resource and | |
| 508 | + iomem_resource) that are always wrong, so we rely on arch code to | |
| 509 | + correct them later. Callers of pci_scan_bus_parented() should | |
| 510 | + convert to using pci_scan_root_bus() so they can supply a list of | |
| 511 | + bus resources when the bus is created. | |
| 512 | +Who: Bjorn Helgaas <bhelgaas@google.com> | |
| @@ -37,15 +37,15 @@ d_manage: no no yes (ref-walk) maybe · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | --------------------------- inode_operations --------------------------- |
| 39 | 39 | prototypes: |
| 40 | − int (*create) (struct inode *,struct dentry *,int, struct nameidata *); | |
| 40 | + int (*create) (struct inode *,struct dentry *,umode_t, struct nameidata *); | |
| 41 | 41 | struct dentry * (*lookup) (struct inode *,struct dentry *, struct nameid |
| 42 | 42 | ata *); |
| 43 | 43 | int (*link) (struct dentry *,struct inode *,struct dentry *); |
| 44 | 44 | int (*unlink) (struct inode *,struct dentry *); |
| 45 | 45 | int (*symlink) (struct inode *,struct dentry *,const char *); |
| 46 | − int (*mkdir) (struct inode *,struct dentry *,int); | |
| 46 | + int (*mkdir) (struct inode *,struct dentry *,umode_t); | |
| 47 | 47 | int (*rmdir) (struct inode *,struct dentry *); |
| 48 | − int (*mknod) (struct inode *,struct dentry *,int,dev_t); | |
| 48 | + int (*mknod) (struct inode *,struct dentry *,umode_t,dev_t); | |
| 49 | 49 | int (*rename) (struct inode *, struct dentry *, |
| 50 | 50 | struct inode *, struct dentry *); |
| 51 | 51 | int (*readlink) (struct dentry *, char __user *,int); |
| @@ -117,7 +117,7 @@ prototypes: · 65 unmodified lines | ||
| 117 | 117 | int (*statfs) (struct dentry *, struct kstatfs *); |
| 118 | 118 | int (*remount_fs) (struct super_block *, int *, char *); |
| 119 | 119 | void (*umount_begin) (struct super_block *); |
| 120 | − int (*show_options)(struct seq_file *, struct vfsmount *); | |
| 120 | + int (*show_options)(struct seq_file *, struct dentry *); | |
| 121 | 121 | ssize_t (*quota_read)(struct super_block *, int, char *, size_t, loff_t); |
| 122 | 122 | ssize_t (*quota_write)(struct super_block *, int, const char *, size_t, loff_t); |
| 123 | 123 | int (*bdev_try_to_free_page)(struct super_block*, struct page*, gfp_t); |
| @@ -119,12 +119,20 @@ Mount Options · 118 unmodified lines | ||
| 119 | 119 | must rely on TCP's error correction to detect data corruption |
| 120 | 120 | in the data payload. |
| 121 | 121 | |
| 122 | − noasyncreaddir | |
| 123 | − Disable client's use its local cache to satisfy readdir | |
| 124 | − requests. (This does not change correctness; the client uses | |
| 125 | − cached metadata only when a lease or capability ensures it is | |
| 126 | − valid.) | |
| 122 | + dcache | |
| 123 | + Use the dcache contents to perform negative lookups and | |
| 124 | + readdir when the client has the entire directory contents in | |
| 125 | + its cache. (This does not change correctness; the client uses | |
| 126 | + cached metadata only when a lease or capability ensures it is | |
| 127 | + valid.) | |
| 128 | + | |
| 129 | + nodcache | |
| 130 | + Do not use the dcache as above. This avoids a significant amount of | |
| 131 | + complex code, sacrificing performance without affecting correctness, | |
| 132 | + and is useful for tracking down bugs. | |
| 127 | 133 | |
| 134 | + noasyncreaddir | |
| 135 | + Do not use the dcache as above for readdir. | |
| 128 | 136 | |
| 129 | 137 | More Information |
| 130 | 138 | ================ |
| @@ -192,7 +192,7 @@ attribute value uses the store_attribute() method. · 191 unmodified lines | ||
| 192 | 192 | struct configfs_attribute { |
| 193 | 193 | char *ca_name; |
| 194 | 194 | struct module *ca_owner; |
| 195 | − mode_t ca_mode; | |
| 195 | + umode_t ca_mode; | |
| 196 | 196 | }; |
| 197 | 197 | |
| 198 | 198 | When a config_item wants an attribute to appear as a file in the item's |
| @@ -35,7 +35,7 @@ described below will work. · 34 unmodified lines | ||
| 35 | 35 | |
| 36 | 36 | The most general way to create a file within a debugfs directory is with: |
| 37 | 37 | |
| 38 | − struct dentry *debugfs_create_file(const char *name, mode_t mode, | |
| 38 | + struct dentry *debugfs_create_file(const char *name, umode_t mode, | |
| 39 | 39 | struct dentry *parent, void *data, |
| 40 | 40 | const struct file_operations *fops); |
| 41 | 41 | |
| @@ -53,13 +53,13 @@ actually necessary; the debugfs code provides a number of helper functions · 11 unmodified lines | ||
| 53 | 53 | for simple situations. Files containing a single integer value can be |
| 54 | 54 | created with any of: |
| 55 | 55 | |
| 56 | − struct dentry *debugfs_create_u8(const char *name, mode_t mode, | |
| 56 | + struct dentry *debugfs_create_u8(const char *name, umode_t mode, | |
| 57 | 57 | struct dentry *parent, u8 *value); |
| 58 | − struct dentry *debugfs_create_u16(const char *name, mode_t mode, | |
| 58 | + struct dentry *debugfs_create_u16(const char *name, umode_t mode, | |
| 59 | 59 | struct dentry *parent, u16 *value); |
| 60 | − struct dentry *debugfs_create_u32(const char *name, mode_t mode, | |
| 60 | + struct dentry *debugfs_create_u32(const char *name, umode_t mode, | |
| 61 | 61 | struct dentry *parent, u32 *value); |
| 62 | − struct dentry *debugfs_create_u64(const char *name, mode_t mode, | |
| 62 | + struct dentry *debugfs_create_u64(const char *name, umode_t mode, | |
| 63 | 63 | struct dentry *parent, u64 *value); |
| 64 | 64 | |
| 65 | 65 | These files support both reading and writing the given value; if a specific |
| @@ -67,13 +67,13 @@ file should not be written to, simply set the mode bits accordingly. The · 1 unmodified line | ||
| 67 | 67 | values in these files are in decimal; if hexadecimal is more appropriate, |
| 68 | 68 | the following functions can be used instead: |
| 69 | 69 | |
| 70 | − struct dentry *debugfs_create_x8(const char *name, mode_t mode, | |
| 70 | + struct dentry *debugfs_create_x8(const char *name, umode_t mode, | |
| 71 | 71 | struct dentry *parent, u8 *value); |
| 72 | − struct dentry *debugfs_create_x16(const char *name, mode_t mode, | |
| 72 | + struct dentry *debugfs_create_x16(const char *name, umode_t mode, | |
| 73 | 73 | struct dentry *parent, u16 *value); |
| 74 | − struct dentry *debugfs_create_x32(const char *name, mode_t mode, | |
| 74 | + struct dentry *debugfs_create_x32(const char *name, umode_t mode, | |
| 75 | 75 | struct dentry *parent, u32 *value); |
| 76 | − struct dentry *debugfs_create_x64(const char *name, mode_t mode, | |
| 76 | + struct dentry *debugfs_create_x64(const char *name, umode_t mode, | |
| 77 | 77 | struct dentry *parent, u64 *value); |
| 78 | 78 | |
| 79 | 79 | These functions are useful as long as the developer knows the size of the |
| @@ -81,7 +81,7 @@ value to be exported. Some types can have different widths on different · 1 unmodified line | ||
| 81 | 81 | architectures, though, complicating the situation somewhat. There is a |
| 82 | 82 | function meant to help out in one special case: |
| 83 | 83 | |
| 84 | − struct dentry *debugfs_create_size_t(const char *name, mode_t mode, | |
| 84 | + struct dentry *debugfs_create_size_t(const char *name, umode_t mode, | |
| 85 | 85 | struct dentry *parent, |
| 86 | 86 | size_t *value); |
| 87 | 87 | |
| @@ -90,21 +90,22 @@ a variable of type size_t. · 2 unmodified lines | ||
| 90 | 90 | |
| 91 | 91 | Boolean values can be placed in debugfs with: |
| 92 | 92 | |
| 93 | − struct dentry *debugfs_create_bool(const char *name, mode_t mode, | |
| 93 | + struct dentry *debugfs_create_bool(const char *name, umode_t mode, | |
| 94 | 94 | struct dentry *parent, u32 *value); |
| 95 | 95 | |
| 96 | 96 | A read on the resulting file will yield either Y (for non-zero values) or |
| 97 | 97 | N, followed by a newline. If written to, it will accept either upper- or |
| 98 | 98 | lower-case values, or 1 or 0. Any other input will be silently ignored. |
| 99 | 99 | |
| 100 | −Finally, a block of arbitrary binary data can be exported with: | |
| 100 | +Another option is exporting a block of arbitrary binary data, with | |
| 101 | +this structure and function: | |
| 101 | 102 | |
| 102 | 103 | struct debugfs_blob_wrapper { |
| 103 | 104 | void *data; |
| 104 | 105 | unsigned long size; |
| 105 | 106 | }; |
| 106 | 107 | |
| 107 | − struct dentry *debugfs_create_blob(const char *name, mode_t mode, | |
| 108 | + struct dentry *debugfs_create_blob(const char *name, umode_t mode, | |
| 108 | 109 | struct dentry *parent, |
| 109 | 110 | struct debugfs_blob_wrapper *blob); |
| 110 | 111 | |
| @@ -115,6 +116,35 @@ can be used to export binary information, but there does not appear to be · 4 unmodified lines | ||
| 115 | 116 | any code which does so in the mainline. Note that all files created with |
| 116 | 117 | debugfs_create_blob() are read-only. |
| 117 | 118 | |
| 119 | +If you want to dump a block of registers (something that happens quite | |
| 120 | +often during development, even if little such code reaches mainline. | |
| 121 | +Debugfs offers two functions: one to make a registers-only file, and | |
| 122 | +another to insert a register block in the middle of another sequential | |
| 123 | +file. | |
| 124 | + | |
| 125 | + struct debugfs_reg32 { | |
| 126 | + char *name; | |
| 127 | + unsigned long offset; | |
| 128 | + }; | |
| 129 | + | |
| 130 | + struct debugfs_regset32 { | |
| 131 | + struct debugfs_reg32 *regs; | |
| 132 | + int nregs; | |
| 133 | + void __iomem *base; | |
| 134 | + }; | |
| 135 | + | |
| 136 | + struct dentry *debugfs_create_regset32(const char *name, mode_t mode, | |
| 137 | + struct dentry *parent, | |
| 138 | + struct debugfs_regset32 *regset); | |
| 139 | + | |
| 140 | + int debugfs_print_regs32(struct seq_file *s, struct debugfs_reg32 *regs, | |
| 141 | + int nregs, void __iomem *base, char *prefix); | |
| 142 | + | |
| 143 | +The "base" argument may be 0, but you may want to build the reg32 array | |
| 144 | +using __stringify, and a number of register names (macros) are actually | |
| 145 | +byte offsets over a base for the register block. | |
| 146 | + | |
| 147 | + | |
| 118 | 148 | There are a couple of other directory-oriented helper functions: |
| 119 | 149 | |
| 120 | 150 | struct dentry *debugfs_rename(struct dentry *old_dir, |
| @@ -581,6 +581,13 @@ Table of Ext4 specific ioctls · 580 unmodified lines | ||
| 581 | 581 | behaviour may change in the future as it is |
| 582 | 582 | not necessary and has been done this way only |
| 583 | 583 | for sake of simplicity. |
| 584 | + | |
| 585 | + EXT4_IOC_RESIZE_FS Resize the filesystem to a new size. The number | |
| 586 | + of blocks of resized filesystem is passed in via | |
| 587 | + 64 bit integer argument. The kernel allocates | |
| 588 | + bitmaps and inode table, the userspace tool thus | |
| 589 | + just passes the new number of blocks. | |
| 590 | + | |
| 584 | 591 | .............................................................................. |
| 585 | 592 | |
| 586 | 593 | References |
| @@ -2,6 +2,8 @@ · 1 unmodified line | ||
| 2 | 2 | - this file (nfs-related documentation). |
| 3 | 3 | Exporting |
| 4 | 4 | - explanation of how to make filesystems exportable. |
| 5 | +fault_injection.txt | |
| 6 | + - information for using fault injection on the server | |
| 5 | 7 | knfsd-stats.txt |
| 6 | 8 | - statistics which the NFS server makes available to user space. |
| 7 | 9 | nfs.txt |
| @@ -0,0 +1,69 @@ | ||
| 1 | + | |
| 2 | +Fault Injection | |
| 3 | +=============== | |
| 4 | +Fault injection is a method for forcing errors that may not normally occur, or | |
| 5 | +may be difficult to reproduce. Forcing these errors in a controlled environment | |
| 6 | +can help the developer find and fix bugs before their code is shipped in a | |
| 7 | +production system. Injecting an error on the Linux NFS server will allow us to | |
| 8 | +observe how the client reacts and if it manages to recover its state correctly. | |
| 9 | + | |
| 10 | +NFSD_FAULT_INJECTION must be selected when configuring the kernel to use this | |
| 11 | +feature. | |
| 12 | + | |
| 13 | + | |
| 14 | +Using Fault Injection | |
| 15 | +===================== | |
| 16 | +On the client, mount the fault injection server through NFS v4.0+ and do some | |
| 17 | +work over NFS (open files, take locks, ...). | |
| 18 | + | |
| 19 | +On the server, mount the debugfs filesystem to <debug_dir> and ls | |
| 20 | +<debug_dir>/nfsd. This will show a list of files that will be used for | |
| 21 | +injecting faults on the NFS server. As root, write a number n to the file | |
| 22 | +corresponding to the action you want the server to take. The server will then | |
| 23 | +process the first n items it finds. So if you want to forget 5 locks, echo '5' | |
| 24 | +to <debug_dir>/nfsd/forget_locks. A value of 0 will tell the server to forget | |
| 25 | +all corresponding items. A log message will be created containing the number | |
| 26 | +of items forgotten (check dmesg). | |
| 27 | + | |
| 28 | +Go back to work on the client and check if the client recovered from the error | |
| 29 | +correctly. | |
| 30 | + | |
| 31 | + | |
| 32 | +Available Faults | |
| 33 | +================ | |
| 34 | +forget_clients: | |
| 35 | + The NFS server keeps a list of clients that have placed a mount call. If | |
| 36 | + this list is cleared, the server will have no knowledge of who the client | |
| 37 | + is, forcing the client to reauthenticate with the server. | |
| 38 | + | |
| 39 | +forget_openowners: | |
| 40 | + The NFS server keeps a list of what files are currently opened and who | |
| 41 | + they were opened by. Clearing this list will force the client to reopen | |
| 42 | + its files. | |
| 43 | + | |
| 44 | +forget_locks: | |
| 45 | + The NFS server keeps a list of what files are currently locked in the VFS. | |
| 46 | + Clearing this list will force the client to reclaim its locks (files are | |
| 47 | + unlocked through the VFS as they are cleared from this list). | |
| 48 | + | |
| 49 | +forget_delegations: | |
| 50 | + A delegation is used to assure the client that a file, or part of a file, | |
| 51 | + has not changed since the delegation was awarded. Clearing this list will | |
| 52 | + force the client to reaquire its delegation before accessing the file | |
| 53 | + again. | |
| 54 | + | |
| 55 | +recall_delegations: | |
| 56 | + Delegations can be recalled by the server when another client attempts to | |
| 57 | + access a file. This test will notify the client that its delegation has | |
| 58 | + been revoked, forcing the client to reaquire the delegation before using | |
| 59 | + the file again. | |
| 60 | + | |
| 61 | + | |
| 62 | +tools/nfs/inject_faults.sh script | |
| 63 | +================================= | |
| 64 | +This script has been created to ease the fault injection process. This script | |
| 65 | +will detect the mounted debugfs directory and write to the files located there | |
| 66 | +based on the arguments passed by the user. For example, running | |
| 67 | +`inject_faults.sh forget_locks 1` as root will instruct the server to forget | |
| 68 | +one lock. Running `inject_faults forget_locks` will instruct the server to | |
| 69 | +forgetall locks. | |
| @@ -41,6 +41,8 @@ Table of Contents · 40 unmodified lines | ||
| 41 | 41 | 3.5 /proc/<pid>/mountinfo - Information about mounts |
| 42 | 42 | 3.6 /proc/<pid>/comm & /proc/<pid>/task/<tid>/comm |
| 43 | 43 | |
| 44 | + 4 Configuring procfs | |
| 45 | + 4.1 Mount options | |
| 44 | 46 | |
| 45 | 47 | ------------------------------------------------------------------------------ |
| 46 | 48 | Preface |
| @@ -305,6 +307,9 @@ Table 1-4: Contents of the stat files (as of 2.6.30-rc7) · 258 unmodified lines | ||
| 305 | 307 | blkio_ticks time spent waiting for block IO |
| 306 | 308 | gtime guest time of the task in jiffies |
| 307 | 309 | cgtime guest time of the task children in jiffies |
| 310 | + start_data address above which program data+bss is placed | |
| 311 | + end_data address below which program data+bss is placed | |
| 312 | + start_brk address above which program heap can be expanded with brk() | |
| 308 | 313 | .............................................................................. |
| 309 | 314 | |
| 310 | 315 | The /proc/PID/maps file containing the currently mapped memory regions and |
| @@ -1542,3 +1547,40 @@ a task to set its own or one of its thread siblings comm value. The comm value · 1231 unmodified lines | ||
| 1542 | 1547 | is limited in size compared to the cmdline value, so writing anything longer |
| 1543 | 1548 | then the kernel's TASK_COMM_LEN (currently 16 chars) will result in a truncated |
| 1544 | 1549 | comm value. |
| 1550 | + | |
| 1551 | + | |
| 1552 | +------------------------------------------------------------------------------ | |
| 1553 | +Configuring procfs | |
| 1554 | +------------------------------------------------------------------------------ | |
| 1555 | + | |
| 1556 | +4.1 Mount options | |
| 1557 | +--------------------- | |
| 1558 | + | |
| 1559 | +The following mount options are supported: | |
| 1560 | + | |
| 1561 | + hidepid= Set /proc/<pid>/ access mode. | |
| 1562 | + gid= Set the group authorized to learn processes information. | |
| 1563 | + | |
| 1564 | +hidepid=0 means classic mode - everybody may access all /proc/<pid>/ directories | |
| 1565 | +(default). | |
| 1566 | + | |
| 1567 | +hidepid=1 means users may not access any /proc/<pid>/ directories but their | |
| 1568 | +own. Sensitive files like cmdline, sched*, status are now protected against | |
| 1569 | +other users. This makes it impossible to learn whether any user runs | |
| 1570 | +specific program (given the program doesn't reveal itself by its behaviour). | |
| 1571 | +As an additional bonus, as /proc/<pid>/cmdline is unaccessible for other users, | |
| 1572 | +poorly written programs passing sensitive information via program arguments are | |
| 1573 | +now protected against local eavesdroppers. | |
| 1574 | + | |
| 1575 | +hidepid=2 means hidepid=1 plus all /proc/<pid>/ will be fully invisible to other | |
| 1576 | +users. It doesn't mean that it hides a fact whether a process with a specific | |
| 1577 | +pid value exists (it can be learned by other means, e.g. by "kill -0 $PID"), | |
| 1578 | +but it hides process' uid and gid, which may be learned by stat()'ing | |
| 1579 | +/proc/<pid>/ otherwise. It greatly complicates an intruder's task of gathering | |
| 1580 | +information about running processes, whether some daemon runs with elevated | |
| 1581 | +privileges, whether other user runs some sensitive program, whether other users | |
| 1582 | +run any program at all, etc. | |
| 1583 | + | |
| 1584 | +gid= defines a group authorized to learn processes information otherwise | |
| 1585 | +prohibited by hidepid=. If you use some daemon like identd which needs to learn | |
| 1586 | +information about processes information, just add identd to this group. | |
| @@ -93,8 +93,8 @@ byte alignment: · 92 unmodified lines | ||
| 93 | 93 | |
| 94 | 94 | Compressed data blocks are written to the filesystem as files are read from |
| 95 | 95 | the source directory, and checked for duplicates. Once all file data has been |
| 96 | −written the completed inode, directory, fragment, export and uid/gid lookup | |
| 97 | −tables are written. | |
| 96 | +written the completed inode, directory, fragment, export, uid/gid lookup and | |
| 97 | +xattr tables are written. | |
| 98 | 98 | |
| 99 | 99 | 3.1 Compression options |
| 100 | 100 | ----------------------- |
| @@ -151,7 +151,7 @@ in each metadata block. Directories are sorted in alphabetical order, · 50 unmodified lines | ||
| 151 | 151 | and at lookup the index is scanned linearly looking for the first filename |
| 152 | 152 | alphabetically larger than the filename being looked up. At this point the |
| 153 | 153 | location of the metadata block the filename is in has been found. |
| 154 | −The general idea of the index is ensure only one metadata block needs to be | |
| 154 | +The general idea of the index is to ensure only one metadata block needs to be | |
| 155 | 155 | decompressed to do a lookup irrespective of the length of the directory. |
| 156 | 156 | This scheme has the advantage that it doesn't require extra memory overhead |
| 157 | 157 | and doesn't require much extra storage on disk. |
| @@ -70,7 +70,7 @@ An attribute definition is simply: · 69 unmodified lines | ||
| 70 | 70 | struct attribute { |
| 71 | 71 | char * name; |
| 72 | 72 | struct module *owner; |
| 73 | − mode_t mode; | |
| 73 | + umode_t mode; | |
| 74 | 74 | }; |
| 75 | 75 | |
| 76 | 76 | |
| @@ -225,7 +225,7 @@ struct super_operations { · 224 unmodified lines | ||
| 225 | 225 | void (*clear_inode) (struct inode *); |
| 226 | 226 | void (*umount_begin) (struct super_block *); |
| 227 | 227 | |
| 228 | − int (*show_options)(struct seq_file *, struct vfsmount *); | |
| 228 | + int (*show_options)(struct seq_file *, struct dentry *); | |
| 229 | 229 | |
| 230 | 230 | ssize_t (*quota_read)(struct super_block *, int, char *, size_t, loff_t); |
| 231 | 231 | ssize_t (*quota_write)(struct super_block *, int, const char *, size_t, loff_t); |
| @@ -341,14 +341,14 @@ This describes how the VFS can manipulate an inode in your · 109 unmodified lines | ||
| 341 | 341 | filesystem. As of kernel 2.6.22, the following members are defined: |
| 342 | 342 | |
| 343 | 343 | struct inode_operations { |
| 344 | − int (*create) (struct inode *,struct dentry *,int, struct nameidata *); | |
| 344 | + int (*create) (struct inode *,struct dentry *, umode_t, struct nameidata *); | |
| 345 | 345 | struct dentry * (*lookup) (struct inode *,struct dentry *, struct nameidata *); |
| 346 | 346 | int (*link) (struct dentry *,struct inode *,struct dentry *); |
| 347 | 347 | int (*unlink) (struct inode *,struct dentry *); |
| 348 | 348 | int (*symlink) (struct inode *,struct dentry *,const char *); |
| 349 | − int (*mkdir) (struct inode *,struct dentry *,int); | |
| 349 | + int (*mkdir) (struct inode *,struct dentry *,umode_t); | |
| 350 | 350 | int (*rmdir) (struct inode *,struct dentry *); |
| 351 | − int (*mknod) (struct inode *,struct dentry *,int,dev_t); | |
| 351 | + int (*mknod) (struct inode *,struct dentry *,umode_t,dev_t); | |
| 352 | 352 | int (*rename) (struct inode *, struct dentry *, |
| 353 | 353 | struct inode *, struct dentry *); |
| 354 | 354 | int (*readlink) (struct dentry *, char __user *,int); |
| @@ -26,6 +26,10 @@ Supported chips: · 25 unmodified lines | ||
| 26 | 26 | Prefix: 'it8721' |
| 27 | 27 | Addresses scanned: from Super I/O config space (8 I/O ports) |
| 28 | 28 | Datasheet: Not publicly available |
| 29 | + * IT8728F | |
| 30 | + Prefix: 'it8728' | |
| 31 | + Addresses scanned: from Super I/O config space (8 I/O ports) | |
| 32 | + Datasheet: Not publicly available | |
| 29 | 33 | * SiS950 [clone of IT8705F] |
| 30 | 34 | Prefix: 'it87' |
| 31 | 35 | Addresses scanned: from Super I/O config space (8 I/O ports) |
| @@ -71,7 +75,7 @@ Description · 39 unmodified lines | ||
| 71 | 75 | ----------- |
| 72 | 76 | |
| 73 | 77 | This driver implements support for the IT8705F, IT8712F, IT8716F, |
| 74 | −IT8718F, IT8720F, IT8721F, IT8726F, IT8758E and SiS950 chips. | |
| 78 | +IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8758E and SiS950 chips. | |
| 75 | 79 | |
| 76 | 80 | These chips are 'Super I/O chips', supporting floppy disks, infrared ports, |
| 77 | 81 | joysticks and other miscellaneous stuff. For hardware monitoring, they |
| @@ -105,6 +109,9 @@ The IT8726F is just bit enhanced IT8716F with additional hardware · 27 unmodified lines | ||
| 105 | 109 | for AMD power sequencing. Therefore the chip will appear as IT8716F |
| 106 | 110 | to userspace applications. |
| 107 | 111 | |
| 112 | +The IT8728F is considered compatible with the IT8721F, until a datasheet | |
| 113 | +becomes available (hopefully.) | |
| 114 | + | |
| 108 | 115 | Temperatures are measured in degrees Celsius. An alarm is triggered once |
| 109 | 116 | when the Overtemperature Shutdown limit is crossed. |
| 110 | 117 | |
| @@ -121,8 +128,8 @@ alarm is triggered if the voltage has crossed a programmable minimum or · 10 unmodified lines | ||
| 121 | 128 | maximum limit. Note that minimum in this case always means 'closest to |
| 122 | 129 | zero'; this is important for negative voltage measurements. All voltage |
| 123 | 130 | inputs can measure voltages between 0 and 4.08 volts, with a resolution of |
| 124 | −0.016 volt (except IT8721F/IT8758E: 0.012 volt.) The battery voltage in8 does | |
| 125 | −not have limit registers. | |
| 131 | +0.016 volt (except IT8721F/IT8758E and IT8728F: 0.012 volt.) The battery | |
| 132 | +voltage in8 does not have limit registers. | |
| 126 | 133 | |
| 127 | 134 | On the IT8721F/IT8758E, some voltage inputs are internal and scaled inside |
| 128 | 135 | the chip (in7, in8 and optionally in3). The driver handles this transparently |
| @@ -12,6 +12,11 @@ Supported chips: · 11 unmodified lines | ||
| 12 | 12 | Addresses scanned: I2C 0x18 and 0x4e |
| 13 | 13 | Datasheet: Publicly available at the National Semiconductor website |
| 14 | 14 | http://www.national.com/pf/LM/LM64.html |
| 15 | + * National Semiconductor LM96163 | |
| 16 | + Prefix: 'lm96163' | |
| 17 | + Addresses scanned: I2C 0x4c | |
| 18 | + Datasheet: Publicly available at the National Semiconductor website | |
| 19 | + http://www.national.com/pf/LM/LM96163.html | |
| 15 | 20 | |
| 16 | 21 | Author: Jean Delvare <khali@linux-fr.org> |
| 17 | 22 | |
| @@ -49,16 +54,24 @@ value for measuring the speed of the fan. It can measure fan speeds down to · 31 unmodified lines | ||
| 49 | 54 | Note that the pin used for fan monitoring is shared with an alert out |
| 50 | 55 | function. Depending on how the board designer wanted to use the chip, fan |
| 51 | 56 | speed monitoring will or will not be possible. The proper chip configuration |
| 52 | −is left to the BIOS, and the driver will blindly trust it. | |
| 57 | +is left to the BIOS, and the driver will blindly trust it. Only the original | |
| 58 | +LM63 suffers from this limitation, the LM64 and LM96163 have separate pins | |
| 59 | +for fan monitoring and alert out. On the LM64, monitoring is always enabled; | |
| 60 | +on the LM96163 it can be disabled. | |
| 53 | 61 | |
| 54 | 62 | A PWM output can be used to control the speed of the fan. The LM63 has two |
| 55 | 63 | PWM modes: manual and automatic. Automatic mode is not fully implemented yet |
| 56 | 64 | (you cannot define your custom PWM/temperature curve), and mode change isn't |
| 57 | 65 | supported either. |
| 58 | 66 | |
| 59 | −The lm63 driver will not update its values more frequently than every | |
| 60 | −second; reading them more often will do no harm, but will return 'old' | |
| 61 | −values. | |
| 67 | +The lm63 driver will not update its values more frequently than configured with | |
| 68 | +the update_interval sysfs attribute; reading them more often will do no harm, | |
| 69 | +but will return 'old' values. Values in the automatic fan control lookup table | |
| 70 | +(attributes pwm1_auto_*) have their own independent lifetime of 5 seconds. | |
| 62 | 71 | |
| 63 | 72 | The LM64 is effectively an LM63 with GPIO lines. The driver does not |
| 64 | 73 | support these GPIO lines at present. |
| 74 | + | |
| 75 | +The LM96163 is an enhanced version of LM63 with improved temperature accuracy | |
| 76 | +and better PWM resolution. For LM96163, the external temperature sensor type is | |
| 77 | +configurable as CPU embedded diode(1) or 3904 transistor(2). | |
| @@ -2,9 +2,8 @@ Kernel driver pmbus · 1 unmodified line | ||
| 2 | 2 | ==================== |
| 3 | 3 | |
| 4 | 4 | Supported chips: |
| 5 | − * Ericsson BMR45X series | |
| 6 | − DC/DC Converter | |
| 7 | − Prefixes: 'bmr450', 'bmr451', 'bmr453', 'bmr454' | |
| 5 | + * Ericsson BMR453, BMR454 | |
| 6 | + Prefixes: 'bmr453', 'bmr454' | |
| 8 | 7 | Addresses scanned: - |
| 9 | 8 | Datasheet: |
| 10 | 9 | http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146395 |
| @@ -304,7 +304,7 @@ value (fastest fan speed) wins. · 303 unmodified lines | ||
| 304 | 304 | temp[1-*]_type Sensor type selection. |
| 305 | 305 | Integers 1 to 6 |
| 306 | 306 | RW |
| 307 | − 1: PII/Celeron Diode | |
| 307 | + 1: CPU embedded diode | |
| 308 | 308 | 2: 3904 transistor |
| 309 | 309 | 3: thermal diode |
| 310 | 310 | 4: thermistor |
| @@ -6,6 +6,10 @@ Supported chips: · 5 unmodified lines | ||
| 6 | 6 | Prefix: 'zl2004' |
| 7 | 7 | Addresses scanned: - |
| 8 | 8 | Datasheet: http://www.intersil.com/data/fn/fn6847.pdf |
| 9 | + * Intersil / Zilker Labs ZL2005 | |
| 10 | + Prefix: 'zl2005' | |
| 11 | + Addresses scanned: - | |
| 12 | + Datasheet: http://www.intersil.com/data/fn/fn6848.pdf | |
| 9 | 13 | * Intersil / Zilker Labs ZL2006 |
| 10 | 14 | Prefix: 'zl2006' |
| 11 | 15 | Addresses scanned: - |
| @@ -30,6 +34,17 @@ Supported chips: · 18 unmodified lines | ||
| 30 | 34 | Prefix: 'zl6105' |
| 31 | 35 | Addresses scanned: - |
| 32 | 36 | Datasheet: http://www.intersil.com/data/fn/fn6906.pdf |
| 37 | + * Ericsson BMR450, BMR451 | |
| 38 | + Prefix: 'bmr450', 'bmr451' | |
| 39 | + Addresses scanned: - | |
| 40 | + Datasheet: | |
| 41 | +http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146401 | |
| 42 | + * Ericsson BMR462, BMR463, BMR464 | |
| 43 | + Prefixes: 'bmr462', 'bmr463', 'bmr464' | |
| 44 | + Addresses scanned: - | |
| 45 | + Datasheet: | |
| 46 | +http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146256 | |
| 47 | + | |
| 33 | 48 | |
| 34 | 49 | Author: Guenter Roeck <guenter.roeck@ericsson.com> |
| 35 | 50 | |
| @@ -0,0 +1,188 @@ | ||
| 1 | +ALPS Touchpad Protocol | |
| 2 | +---------------------- | |
| 3 | + | |
| 4 | +Introduction | |
| 5 | +------------ | |
| 6 | + | |
| 7 | +Currently the ALPS touchpad driver supports four protocol versions in use by | |
| 8 | +ALPS touchpads, called versions 1, 2, 3, and 4. Information about the various | |
| 9 | +protocol versions is contained in the following sections. | |
| 10 | + | |
| 11 | +Detection | |
| 12 | +--------- | |
| 13 | + | |
| 14 | +All ALPS touchpads should respond to the "E6 report" command sequence: | |
| 15 | +E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or | |
| 16 | +00-00-64. | |
| 17 | + | |
| 18 | +If the E6 report is successful, the touchpad model is identified using the "E7 | |
| 19 | +report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is | |
| 20 | +matched against known models in the alps_model_data_array. | |
| 21 | + | |
| 22 | +With protocol versions 3 and 4, the E7 report model signature is always | |
| 23 | +73-02-64. To differentiate between these versions, the response from the | |
| 24 | +"Enter Command Mode" sequence must be inspected as described below. | |
| 25 | + | |
| 26 | +Command Mode | |
| 27 | +------------ | |
| 28 | + | |
| 29 | +Protocol versions 3 and 4 have a command mode that is used to read and write | |
| 30 | +one-byte device registers in a 16-bit address space. The command sequence | |
| 31 | +EC-EC-EC-E9 places the device in command mode, and the device will respond | |
| 32 | +with 88-07 followed by a third byte. This third byte can be used to determine | |
| 33 | +whether the devices uses the version 3 or 4 protocol. | |
| 34 | + | |
| 35 | +To exit command mode, PSMOUSE_CMD_SETSTREAM (EA) is sent to the touchpad. | |
| 36 | + | |
| 37 | +While in command mode, register addresses can be set by first sending a | |
| 38 | +specific command, either EC for v3 devices or F5 for v4 devices. Then the | |
| 39 | +address is sent one nibble at a time, where each nibble is encoded as a | |
| 40 | +command with optional data. This enoding differs slightly between the v3 and | |
| 41 | +v4 protocols. | |
| 42 | + | |
| 43 | +Once an address has been set, the addressed register can be read by sending | |
| 44 | +PSMOUSE_CMD_GETINFO (E9). The first two bytes of the response contains the | |
| 45 | +address of the register being read, and the third contains the value of the | |
| 46 | +register. Registers are written by writing the value one nibble at a time | |
| 47 | +using the same encoding used for addresses. | |
| 48 | + | |
| 49 | +Packet Format | |
| 50 | +------------- | |
| 51 | + | |
| 52 | +In the following tables, the following notation is used. | |
| 53 | + | |
| 54 | + CAPITALS = stick, miniscules = touchpad | |
| 55 | + | |
| 56 | +?'s can have different meanings on different models, such as wheel rotation, | |
| 57 | +extra buttons, stick buttons on a dualpoint, etc. | |
| 58 | + | |
| 59 | +PS/2 packet format | |
| 60 | +------------------ | |
| 61 | + | |
| 62 | + byte 0: 0 0 YSGN XSGN 1 M R L | |
| 63 | + byte 1: X7 X6 X5 X4 X3 X2 X1 X0 | |
| 64 | + byte 2: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 | |
| 65 | + | |
| 66 | +Note that the device never signals overflow condition. | |
| 67 | + | |
| 68 | +ALPS Absolute Mode - Protocol Verion 1 | |
| 69 | +-------------------------------------- | |
| 70 | + | |
| 71 | + byte 0: 1 0 0 0 1 x9 x8 x7 | |
| 72 | + byte 1: 0 x6 x5 x4 x3 x2 x1 x0 | |
| 73 | + byte 2: 0 ? ? l r ? fin ges | |
| 74 | + byte 3: 0 ? ? ? ? y9 y8 y7 | |
| 75 | + byte 4: 0 y6 y5 y4 y3 y2 y1 y0 | |
| 76 | + byte 5: 0 z6 z5 z4 z3 z2 z1 z0 | |
| 77 | + | |
| 78 | +ALPS Absolute Mode - Protocol Version 2 | |
| 79 | +--------------------------------------- | |
| 80 | + | |
| 81 | + byte 0: 1 ? ? ? 1 ? ? ? | |
| 82 | + byte 1: 0 x6 x5 x4 x3 x2 x1 x0 | |
| 83 | + byte 2: 0 x10 x9 x8 x7 ? fin ges | |
| 84 | + byte 3: 0 y9 y8 y7 1 M R L | |
| 85 | + byte 4: 0 y6 y5 y4 y3 y2 y1 y0 | |
| 86 | + byte 5: 0 z6 z5 z4 z3 z2 z1 z0 | |
| 87 | + | |
| 88 | +Dualpoint device -- interleaved packet format | |
| 89 | +--------------------------------------------- | |
| 90 | + | |
| 91 | + byte 0: 1 1 0 0 1 1 1 1 | |
| 92 | + byte 1: 0 x6 x5 x4 x3 x2 x1 x0 | |
| 93 | + byte 2: 0 x10 x9 x8 x7 0 fin ges | |
| 94 | + byte 3: 0 0 YSGN XSGN 1 1 1 1 | |
| 95 | + byte 4: X7 X6 X5 X4 X3 X2 X1 X0 | |
| 96 | + byte 5: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 | |
| 97 | + byte 6: 0 y9 y8 y7 1 m r l | |
| 98 | + byte 7: 0 y6 y5 y4 y3 y2 y1 y0 | |
| 99 | + byte 8: 0 z6 z5 z4 z3 z2 z1 z0 | |
| 100 | + | |
| 101 | +ALPS Absolute Mode - Protocol Version 3 | |
| 102 | +--------------------------------------- | |
| 103 | + | |
| 104 | +ALPS protocol version 3 has three different packet formats. The first two are | |
| 105 | +associated with touchpad events, and the third is associatd with trackstick | |
| 106 | +events. | |
| 107 | + | |
| 108 | +The first type is the touchpad position packet. | |
| 109 | + | |
| 110 | + byte 0: 1 ? x1 x0 1 1 1 1 | |
| 111 | + byte 1: 0 x10 x9 x8 x7 x6 x5 x4 | |
| 112 | + byte 2: 0 y10 y9 y8 y7 y6 y5 y4 | |
| 113 | + byte 3: 0 M R L 1 m r l | |
| 114 | + byte 4: 0 mt x3 x2 y3 y2 y1 y0 | |
| 115 | + byte 5: 0 z6 z5 z4 z3 z2 z1 z0 | |
| 116 | + | |
| 117 | +Note that for some devices the trackstick buttons are reported in this packet, | |
| 118 | +and on others it is reported in the trackstick packets. | |
| 119 | + | |
| 120 | +The second packet type contains bitmaps representing the x and y axes. In the | |
| 121 | +bitmaps a given bit is set if there is a finger covering that position on the | |
| 122 | +given axis. Thus the bitmap packet can be used for low-resolution multi-touch | |
| 123 | +data, although finger tracking is not possible. This packet also encodes the | |
| 124 | +number of contacts (f1 and f0 in the table below). | |
| 125 | + | |
| 126 | + byte 0: 1 1 x1 x0 1 1 1 1 | |
| 127 | + byte 1: 0 x8 x7 x6 x5 x4 x3 x2 | |
| 128 | + byte 2: 0 y7 y6 y5 y4 y3 y2 y1 | |
| 129 | + byte 3: 0 y10 y9 y8 1 1 1 1 | |
| 130 | + byte 4: 0 x14 x13 x12 x11 x10 x9 y0 | |
| 131 | + byte 5: 0 1 ? ? ? ? f1 f0 | |
| 132 | + | |
| 133 | +This packet only appears after a position packet with the mt bit set, and | |
| 134 | +ususally only appears when there are two or more contacts (although | |
| 135 | +ocassionally it's seen with only a single contact). | |
| 136 | + | |
| 137 | +The final v3 packet type is the trackstick packet. | |
| 138 | + | |
| 139 | + byte 0: 1 1 x7 y7 1 1 1 1 | |
| 140 | + byte 1: 0 x6 x5 x4 x3 x2 x1 x0 | |
| 141 | + byte 2: 0 y6 y5 y4 y3 y2 y1 y0 | |
| 142 | + byte 3: 0 1 0 0 1 0 0 0 | |
| 143 | + byte 4: 0 z4 z3 z2 z1 z0 ? ? | |
| 144 | + byte 5: 0 0 1 1 1 1 1 1 | |
| 145 | + | |
| 146 | +ALPS Absolute Mode - Protocol Version 4 | |
| 147 | +--------------------------------------- | |
| 148 | + | |
| 149 | +Protocol version 4 has an 8-byte packet format. | |
| 150 | + | |
| 151 | + byte 0: 1 ? x1 x0 1 1 1 1 | |
| 152 | + byte 1: 0 x10 x9 x8 x7 x6 x5 x4 | |
| 153 | + byte 2: 0 y10 y9 y8 y7 y6 y5 y4 | |
| 154 | + byte 3: 0 1 x3 x2 y3 y2 y1 y0 | |
| 155 | + byte 4: 0 ? ? ? 1 ? r l | |
| 156 | + byte 5: 0 z6 z5 z4 z3 z2 z1 z0 | |
| 157 | + byte 6: bitmap data (described below) | |
| 158 | + byte 7: bitmap data (described below) | |
| 159 | + | |
| 160 | +The last two bytes represent a partial bitmap packet, with 3 full packets | |
| 161 | +required to construct a complete bitmap packet. Once assembled, the 6-byte | |
| 162 | +bitmap packet has the following format: | |
| 163 | + | |
| 164 | + byte 0: 0 1 x7 x6 x5 x4 x3 x2 | |
| 165 | + byte 1: 0 x1 x0 y4 y3 y2 y1 y0 | |
| 166 | + byte 2: 0 0 ? x14 x13 x12 x11 x10 | |
| 167 | + byte 3: 0 x9 x8 y9 y8 y7 y6 y5 | |
| 168 | + byte 4: 0 0 0 0 0 0 0 0 | |
| 169 | + byte 5: 0 0 0 0 0 0 0 y10 | |
| 170 | + | |
| 171 | +There are several things worth noting here. | |
| 172 | + | |
| 173 | + 1) In the bitmap data, bit 6 of byte 0 serves as a sync byte to | |
| 174 | + identify the first fragment of a bitmap packet. | |
| 175 | + | |
| 176 | + 2) The bitmaps represent the same data as in the v3 bitmap packets, although | |
| 177 | + the packet layout is different. | |
| 178 | + | |
| 179 | + 3) There doesn't seem to be a count of the contact points anywhere in the v4 | |
| 180 | + protocol packets. Deriving a count of contact points must be done by | |
| 181 | + analyzing the bitmaps. | |
| 182 | + | |
| 183 | + 4) There is a 3 to 1 ratio of position packets to bitmap packets. Therefore | |
| 184 | + MT position can only be updated for every third ST position update, and | |
| 185 | + the count of contact points can only be updated every third packet as | |
| 186 | + well. | |
| 187 | + | |
| 188 | +So far no v4 devices with tracksticks have been encountered. | |
| @@ -0,0 +1,103 @@ | ||
| 1 | +Driver for tilt-switches connected via GPIOs | |
| 2 | +============================================ | |
| 3 | + | |
| 4 | +Generic driver to read data from tilt switches connected via gpios. | |
| 5 | +Orientation can be provided by one or more than one tilt switches, | |
| 6 | +i.e. each tilt switch providing one axis, and the number of axes | |
| 7 | +is also not limited. | |
| 8 | + | |
| 9 | + | |
| 10 | +Data structures: | |
| 11 | +---------------- | |
| 12 | + | |
| 13 | +The array of struct gpio in the gpios field is used to list the gpios | |
| 14 | +that represent the current tilt state. | |
| 15 | + | |
| 16 | +The array of struct gpio_tilt_axis describes the axes that are reported | |
| 17 | +to the input system. The values set therein are used for the | |
| 18 | +input_set_abs_params calls needed to init the axes. | |
| 19 | + | |
| 20 | +The array of struct gpio_tilt_state maps gpio states to the corresponding | |
| 21 | +values to report. The gpio state is represented as a bitfield where the | |
| 22 | +bit-index corresponds to the index of the gpio in the struct gpio array. | |
| 23 | +In the same manner the values stored in the axes array correspond to | |
| 24 | +the elements of the gpio_tilt_axis-array. | |
| 25 | + | |
| 26 | + | |
| 27 | +Example: | |
| 28 | +-------- | |
| 29 | + | |
| 30 | +Example configuration for a single TS1003 tilt switch that rotates around | |
| 31 | +one axis in 4 steps and emitts the current tilt via two GPIOs. | |
| 32 | + | |
| 33 | +static int sg060_tilt_enable(struct device *dev) { | |
| 34 | + /* code to enable the sensors */ | |
| 35 | +}; | |
| 36 | + | |
| 37 | +static void sg060_tilt_disable(struct device *dev) { | |
| 38 | + /* code to disable the sensors */ | |
| 39 | +}; | |
| 40 | + | |
| 41 | +static struct gpio sg060_tilt_gpios[] = { | |
| 42 | + { SG060_TILT_GPIO_SENSOR1, GPIOF_IN, "tilt_sensor1" }, | |
| 43 | + { SG060_TILT_GPIO_SENSOR2, GPIOF_IN, "tilt_sensor2" }, | |
| 44 | +}; | |
| 45 | + | |
| 46 | +static struct gpio_tilt_state sg060_tilt_states[] = { | |
| 47 | + { | |
| 48 | + .gpios = (0 << 1) | (0 << 0), | |
| 49 | + .axes = (int[]) { | |
| 50 | + 0, | |
| 51 | + }, | |
| 52 | + }, { | |
| 53 | + .gpios = (0 << 1) | (1 << 0), | |
| 54 | + .axes = (int[]) { | |
| 55 | + 1, /* 90 degrees */ | |
| 56 | + }, | |
| 57 | + }, { | |
| 58 | + .gpios = (1 << 1) | (1 << 0), | |
| 59 | + .axes = (int[]) { | |
| 60 | + 2, /* 180 degrees */ | |
| 61 | + }, | |
| 62 | + }, { | |
| 63 | + .gpios = (1 << 1) | (0 << 0), | |
| 64 | + .axes = (int[]) { | |
| 65 | + 3, /* 270 degrees */ | |
| 66 | + }, | |
| 67 | + }, | |
| 68 | +}; | |
| 69 | + | |
| 70 | +static struct gpio_tilt_axis sg060_tilt_axes[] = { | |
| 71 | + { | |
| 72 | + .axis = ABS_RY, | |
| 73 | + .min = 0, | |
| 74 | + .max = 3, | |
| 75 | + .fuzz = 0, | |
| 76 | + .flat = 0, | |
| 77 | + }, | |
| 78 | +}; | |
| 79 | + | |
| 80 | +static struct gpio_tilt_platform_data sg060_tilt_pdata= { | |
| 81 | + .gpios = sg060_tilt_gpios, | |
| 82 | + .nr_gpios = ARRAY_SIZE(sg060_tilt_gpios), | |
| 83 | + | |
| 84 | + .axes = sg060_tilt_axes, | |
| 85 | + .nr_axes = ARRAY_SIZE(sg060_tilt_axes), | |
| 86 | + | |
| 87 | + .states = sg060_tilt_states, | |
| 88 | + .nr_states = ARRAY_SIZE(sg060_tilt_states), | |
| 89 | + | |
| 90 | + .debounce_interval = 100, | |
| 91 | + | |
| 92 | + .poll_interval = 1000, | |
| 93 | + .enable = sg060_tilt_enable, | |
| 94 | + .disable = sg060_tilt_disable, | |
| 95 | +}; | |
| 96 | + | |
| 97 | +static struct platform_device sg060_device_tilt = { | |
| 98 | + .name = "gpio-tilt-polled", | |
| 99 | + .id = -1, | |
| 100 | + .dev = { | |
| 101 | + .platform_data = &sg060_tilt_pdata, | |
| 102 | + }, | |
| 103 | +}; | |
| @@ -1,5 +1,5 @@ | ||
| 1 | −Copyright (C) 2002-2010 Sentelic Corporation. | |
| 2 | −Last update: Jan-13-2010 | |
| 1 | +Copyright (C) 2002-2011 Sentelic Corporation. | |
| 2 | +Last update: Dec-07-2011 | |
| 3 | 3 | |
| 4 | 4 | ============================================================================== |
| 5 | 5 | * Finger Sensing Pad Intellimouse Mode(scrolling wheel, 4th and 5th buttons) |
| @@ -140,6 +140,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|--------- · 134 unmodified lines | ||
| 140 | 140 | Byte 1: Bit7~Bit6 => 00, Normal data packet |
| 141 | 141 | => 01, Absolute coordination packet |
| 142 | 142 | => 10, Notify packet |
| 143 | + => 11, Normal data packet with on-pad click | |
| 143 | 144 | Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up. |
| 144 | 145 | When both fingers are up, the last two reports have zero valid |
| 145 | 146 | bit. |
| @@ -164,6 +165,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|--------- · 18 unmodified lines | ||
| 164 | 165 | Byte 1: Bit7~Bit6 => 00, Normal data packet |
| 165 | 166 | => 01, Absolute coordinates packet |
| 166 | 167 | => 10, Notify packet |
| 168 | + => 11, Normal data packet with on-pad click | |
| 167 | 169 | Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up. |
| 168 | 170 | When both fingers are up, the last two reports have zero valid |
| 169 | 171 | bit. |
| @@ -188,6 +190,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|--------- · 18 unmodified lines | ||
| 188 | 190 | Byte 1: Bit7~Bit6 => 00, Normal data packet |
| 189 | 191 | => 01, Absolute coordinates packet |
| 190 | 192 | => 10, Notify packet |
| 193 | + => 11, Normal data packet with on-pad click | |
| 191 | 194 | Bit5 => 1 |
| 192 | 195 | Bit4 => when in absolute coordinates mode (valid when EN_PKT_GO is 1): |
| 193 | 196 | 0: left button is generated by the on-pad command |
| @@ -205,7 +208,7 @@ Byte 4: Bit7 => scroll right button · 11 unmodified lines | ||
| 205 | 208 | Bit6 => scroll left button |
| 206 | 209 | Bit5 => scroll down button |
| 207 | 210 | Bit4 => scroll up button |
| 208 | − * Note that if gesture and additional buttoni (Bit4~Bit7) | |
| 211 | + * Note that if gesture and additional button (Bit4~Bit7) | |
| 209 | 212 | happen at the same time, the button information will not |
| 210 | 213 | be sent. |
| 211 | 214 | Bit3~Bit0 => Reserved |
| @@ -227,6 +230,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|--------- · 15 unmodified lines | ||
| 227 | 230 | Byte 1: Bit7~Bit6 => 00, Normal data packet |
| 228 | 231 | => 01, Absolute coordinates packet |
| 229 | 232 | => 10, Notify packet |
| 233 | + => 11, Normal data packet with on-pad click | |
| 230 | 234 | Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up. |
| 231 | 235 | When both fingers are up, the last two reports have zero valid |
| 232 | 236 | bit. |
| @@ -253,6 +257,7 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|--------- · 20 unmodified lines | ||
| 253 | 257 | Byte 1: Bit7~Bit6 => 00, Normal data packet |
| 254 | 258 | => 01, Absolute coordination packet |
| 255 | 259 | => 10, Notify packet |
| 260 | + => 11, Normal data packet with on-pad click | |
| 256 | 261 | Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up. |
| 257 | 262 | When both fingers are up, the last two reports have zero valid |
| 258 | 263 | bit. |
| @@ -279,8 +284,9 @@ BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|--------- · 20 unmodified lines | ||
| 279 | 284 | Byte 1: Bit7~Bit6 => 00, Normal data packet |
| 280 | 285 | => 01, Absolute coordination packet |
| 281 | 286 | => 10, Notify packet |
| 287 | + => 11, Normal data packet with on-pad click | |
| 282 | 288 | Bit5 => 1 |
| 283 | − Bit4 => when in absolute coordinate mode (valid when EN_PKT_GO is 1): | |
| 289 | + Bit4 => when in absolute coordinates mode (valid when EN_PKT_GO is 1): | |
| 284 | 290 | 0: left button is generated by the on-pad command |
| 285 | 291 | 1: left button is generated by the external button |
| 286 | 292 | Bit3 => 1 |
| @@ -306,6 +312,110 @@ Sample sequence of Multi-finger, Multi-coordinate mode: · 19 unmodified lines | ||
| 306 | 312 | notify packet (valid bit == 1), abs pkt 1, abs pkt 2, abs pkt 1, |
| 307 | 313 | abs pkt 2, ..., notify packet (valid bit == 0) |
| 308 | 314 | |
| 315 | +============================================================================== | |
| 316 | +* Absolute position for STL3888-Cx and STL3888-Dx. | |
| 317 | +============================================================================== | |
| 318 | +Single Finger, Absolute Coordinate Mode (SFAC) | |
| 319 | + Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 | |
| 320 | +BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| | |
| 321 | + 1 |0|1|0|P|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 |r|l|B|F|X|X|Y|Y| | |
| 322 | + |---------------| |---------------| |---------------| |---------------| | |
| 323 | + | |
| 324 | +Byte 1: Bit7~Bit6 => 00, Normal data packet | |
| 325 | + => 01, Absolute coordinates packet | |
| 326 | + => 10, Notify packet | |
| 327 | + Bit5 => Coordinate mode(always 0 in SFAC mode): | |
| 328 | + 0: single-finger absolute coordinates (SFAC) mode | |
| 329 | + 1: multi-finger, multiple coordinates (MFMC) mode | |
| 330 | + Bit4 => 0: The LEFT button is generated by on-pad command (OPC) | |
| 331 | + 1: The LEFT button is generated by external button | |
| 332 | + Default is 1 even if the LEFT button is not pressed. | |
| 333 | + Bit3 => Always 1, as specified by PS/2 protocol. | |
| 334 | + Bit2 => Middle Button, 1 is pressed, 0 is not pressed. | |
| 335 | + Bit1 => Right Button, 1 is pressed, 0 is not pressed. | |
| 336 | + Bit0 => Left Button, 1 is pressed, 0 is not pressed. | |
| 337 | +Byte 2: X coordinate (xpos[9:2]) | |
| 338 | +Byte 3: Y coordinate (ypos[9:2]) | |
| 339 | +Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0]) | |
| 340 | + Bit3~Bit2 => X coordinate (ypos[1:0]) | |
| 341 | + Bit4 => 4th mouse button(forward one page) | |
| 342 | + Bit5 => 5th mouse button(backward one page) | |
| 343 | + Bit6 => scroll left button | |
| 344 | + Bit7 => scroll right button | |
| 345 | + | |
| 346 | +Multi Finger, Multiple Coordinates Mode (MFMC): | |
| 347 | + Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 | |
| 348 | +BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| | |
| 349 | + 1 |0|1|1|P|1|F|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 |r|l|B|F|X|X|Y|Y| | |
| 350 | + |---------------| |---------------| |---------------| |---------------| | |
| 351 | + | |
| 352 | +Byte 1: Bit7~Bit6 => 00, Normal data packet | |
| 353 | + => 01, Absolute coordination packet | |
| 354 | + => 10, Notify packet | |
| 355 | + Bit5 => Coordinate mode (always 1 in MFMC mode): | |
| 356 | + 0: single-finger absolute coordinates (SFAC) mode | |
| 357 | + 1: multi-finger, multiple coordinates (MFMC) mode | |
| 358 | + Bit4 => 0: The LEFT button is generated by on-pad command (OPC) | |
| 359 | + 1: The LEFT button is generated by external button | |
| 360 | + Default is 1 even if the LEFT button is not pressed. | |
| 361 | + Bit3 => Always 1, as specified by PS/2 protocol. | |
| 362 | + Bit2 => Finger index, 0 is the first finger, 1 is the second finger. | |
| 363 | + If bit 1 and 0 are all 1 and bit 4 is 0, the middle external | |
| 364 | + button is pressed. | |
| 365 | + Bit1 => Right Button, 1 is pressed, 0 is not pressed. | |
| 366 | + Bit0 => Left Button, 1 is pressed, 0 is not pressed. | |
| 367 | +Byte 2: X coordinate (xpos[9:2]) | |
| 368 | +Byte 3: Y coordinate (ypos[9:2]) | |
| 369 | +Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0]) | |
| 370 | + Bit3~Bit2 => X coordinate (ypos[1:0]) | |
| 371 | + Bit4 => 4th mouse button(forward one page) | |
| 372 | + Bit5 => 5th mouse button(backward one page) | |
| 373 | + Bit6 => scroll left button | |
| 374 | + Bit7 => scroll right button | |
| 375 | + | |
| 376 | + When one of the two fingers is up, the device will output four consecutive | |
| 377 | +MFMC#0 report packets with zero X and Y to represent 1st finger is up or | |
| 378 | +four consecutive MFMC#1 report packets with zero X and Y to represent that | |
| 379 | +the 2nd finger is up. On the other hand, if both fingers are up, the device | |
| 380 | +will output four consecutive single-finger, absolute coordinate(SFAC) packets | |
| 381 | +with zero X and Y. | |
| 382 | + | |
| 383 | +Notify Packet for STL3888-Cx/Dx | |
| 384 | + Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 | |
| 385 | +BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| | |
| 386 | + 1 |1|0|0|P|1|M|R|L| 2 |C|C|C|C|C|C|C|C| 3 |0|0|F|F|0|0|0|i| 4 |r|l|u|d|0|0|0|0| | |
| 387 | + |---------------| |---------------| |---------------| |---------------| | |
| 388 | + | |
| 389 | +Byte 1: Bit7~Bit6 => 00, Normal data packet | |
| 390 | + => 01, Absolute coordinates packet | |
| 391 | + => 10, Notify packet | |
| 392 | + Bit5 => Always 0 | |
| 393 | + Bit4 => 0: The LEFT button is generated by on-pad command(OPC) | |
| 394 | + 1: The LEFT button is generated by external button | |
| 395 | + Default is 1 even if the LEFT button is not pressed. | |
| 396 | + Bit3 => 1 | |
| 397 | + Bit2 => Middle Button, 1 is pressed, 0 is not pressed. | |
| 398 | + Bit1 => Right Button, 1 is pressed, 0 is not pressed. | |
| 399 | + Bit0 => Left Button, 1 is pressed, 0 is not pressed. | |
| 400 | +Byte 2: Message type: | |
| 401 | + 0xba => gesture information | |
| 402 | + 0xc0 => one finger hold-rotating gesture | |
| 403 | +Byte 3: The first parameter for the received message: | |
| 404 | + 0xba => gesture ID (refer to the 'Gesture ID' section) | |
| 405 | + 0xc0 => region ID | |
| 406 | +Byte 4: The second parameter for the received message: | |
| 407 | + 0xba => N/A | |
| 408 | + 0xc0 => finger up/down information | |
| 409 | + | |
| 410 | +Sample sequence of Multi-finger, Multi-coordinates mode: | |
| 411 | + | |
| 412 | + notify packet (valid bit == 1), MFMC packet 1 (byte 1, bit 2 == 0), | |
| 413 | + MFMC packet 2 (byte 1, bit 2 == 1), MFMC packet 1, MFMC packet 2, | |
| 414 | + ..., notify packet (valid bit == 0) | |
| 415 | + | |
| 416 | + That is, when the device is in MFMC mode, the host will receive | |
| 417 | + interleaved absolute coordinate packets for each finger. | |
| 418 | + | |
| 309 | 419 | ============================================================================== |
| 310 | 420 | * FSP Enable/Disable packet |
| 311 | 421 | ============================================================================== |
| @@ -348,9 +458,10 @@ http://www.computer-engineering.org/ps2mouse/ · 36 unmodified lines | ||
| 348 | 458 | ============================================================================== |
| 349 | 459 | 1. Identify FSP by reading device ID(0x00) and version(0x01) register |
| 350 | 460 | |
| 351 | −2. Determine number of buttons by reading status2 (0x0b) register | |
| 461 | +2a. For FSP version < STL3888 Cx, determine number of buttons by reading | |
| 462 | + the 'test mode status' (0x20) register: | |
| 352 | 463 | |
| 353 | − buttons = reg[0x0b] & 0x30 | |
| 464 | + buttons = reg[0x20] & 0x30 | |
| 354 | 465 | |
| 355 | 466 | if buttons == 0x30 or buttons == 0x20: |
| 356 | 467 | # two/four buttons |
| @@ -365,6 +476,10 @@ http://www.computer-engineering.org/ps2mouse/ · 8 unmodified lines | ||
| 365 | 476 | Refer to 'Finger Sensing Pad PS/2 Mouse Intellimouse' |
| 366 | 477 | section A for packet parsing detail |
| 367 | 478 | |
| 479 | +2b. For FSP version >= STL3888 Cx: | |
| 480 | + Refer to 'Finger Sensing Pad PS/2 Mouse Intellimouse' | |
| 481 | + section A for packet parsing detail (ignore byte 4, bit ~ 7) | |
| 482 | + | |
| 368 | 483 | ============================================================================== |
| 369 | 484 | * Programming Sequence for Register Reading/Writing |
| 370 | 485 | ============================================================================== |
| @@ -374,7 +489,7 @@ Register inversion requirement: · 3 unmodified lines | ||
| 374 | 489 | Following values needed to be inverted(the '~' operator in C) before being |
| 375 | 490 | sent to FSP: |
| 376 | 491 | |
| 377 | − 0xe9, 0xee, 0xf2 and 0xff. | |
| 492 | + 0xe8, 0xe9, 0xee, 0xf2, 0xf3 and 0xff. | |
| 378 | 493 | |
| 379 | 494 | Register swapping requirement: |
| 380 | 495 | |
| @@ -415,7 +530,18 @@ Register reading sequence: · 34 unmodified lines | ||
| 415 | 530 | |
| 416 | 531 | 8. send 0xe9(status request) PS/2 command to FSP; |
| 417 | 532 | |
| 418 | − 9. the response read from FSP should be the requested register value. | |
| 533 | + 9. the 4th byte of the response read from FSP should be the | |
| 534 | + requested register value(?? indicates don't care byte): | |
| 535 | + | |
| 536 | + host: 0xe9 | |
| 537 | + 3888: 0xfa (??) (??) (val) | |
| 538 | + | |
| 539 | + * Note that since the Cx release, the hardware will return 1's | |
| 540 | + complement of the register value at the 3rd byte of status request | |
| 541 | + result: | |
| 542 | + | |
| 543 | + host: 0xe9 | |
| 544 | + 3888: 0xfa (??) (~val) (val) | |
| 419 | 545 | |
| 420 | 546 | Register writing sequence: |
| 421 | 547 | |
| @@ -465,71 +591,194 @@ Register writing sequence: · 43 unmodified lines | ||
| 465 | 591 | |
| 466 | 592 | 9. the register writing sequence is completed. |
| 467 | 593 | |
| 594 | + * Note that since the Cx release, the hardware will return 1's | |
| 595 | + complement of the register value at the 3rd byte of status request | |
| 596 | + result. Host can optionally send another 0xe9 (status request) PS/2 | |
| 597 | + command to FSP at the end of register writing to verify that the | |
| 598 | + register writing operation is successful (?? indicates don't care | |
| 599 | + byte): | |
| 600 | + | |
| 601 | + host: 0xe9 | |
| 602 | + 3888: 0xfa (??) (~val) (val) | |
| 603 | + | |
| 604 | +============================================================================== | |
| 605 | +* Programming Sequence for Page Register Reading/Writing | |
| 606 | +============================================================================== | |
| 607 | + | |
| 608 | + In order to overcome the limitation of maximum number of registers | |
| 609 | +supported, the hardware separates register into different groups called | |
| 610 | +'pages.' Each page is able to include up to 255 registers. | |
| 611 | + | |
| 612 | + The default page after power up is 0x82; therefore, if one has to get | |
| 613 | +access to register 0x8301, one has to use following sequence to switch | |
| 614 | +to page 0x83, then start reading/writing from/to offset 0x01 by using | |
| 615 | +the register read/write sequence described in previous section. | |
| 616 | + | |
| 617 | +Page register reading sequence: | |
| 618 | + | |
| 619 | + 1. send 0xf3 PS/2 command to FSP; | |
| 620 | + | |
| 621 | + 2. send 0x66 PS/2 command to FSP; | |
| 622 | + | |
| 623 | + 3. send 0x88 PS/2 command to FSP; | |
| 624 | + | |
| 625 | + 4. send 0xf3 PS/2 command to FSP; | |
| 626 | + | |
| 627 | + 5. send 0x83 PS/2 command to FSP; | |
| 628 | + | |
| 629 | + 6. send 0x88 PS/2 command to FSP; | |
| 630 | + | |
| 631 | + 7. send 0xe9(status request) PS/2 command to FSP; | |
| 632 | + | |
| 633 | + 8. the response read from FSP should be the requested page value. | |
| 634 | + | |
| 635 | +Page register writing sequence: | |
| 636 | + | |
| 637 | + 1. send 0xf3 PS/2 command to FSP; | |
| 638 | + | |
| 639 | + 2. send 0x38 PS/2 command to FSP; | |
| 640 | + | |
| 641 | + 3. send 0x88 PS/2 command to FSP; | |
| 642 | + | |
| 643 | + 4. send 0xf3 PS/2 command to FSP; | |
| 644 | + | |
| 645 | + 5. if the page address being written is not required to be | |
| 646 | + inverted(refer to the 'Register inversion requirement' section), | |
| 647 | + goto step 6 | |
| 648 | + | |
| 649 | + 5a. send 0x47 PS/2 command to FSP; | |
| 650 | + | |
| 651 | + 5b. send the inverted page address to FSP and goto step 9; | |
| 652 | + | |
| 653 | + 6. if the page address being written is not required to be | |
| 654 | + swapped(refer to the 'Register swapping requirement' section), | |
| 655 | + goto step 7 | |
| 656 | + | |
| 657 | + 6a. send 0x44 PS/2 command to FSP; | |
| 658 | + | |
| 659 | + 6b. send the swapped page address to FSP and goto step 9; | |
| 660 | + | |
| 661 | + 7. send 0x33 PS/2 command to FSP; | |
| 662 | + | |
| 663 | + 8. send the page address to FSP; | |
| 664 | + | |
| 665 | + 9. the page register writing sequence is completed. | |
| 666 | + | |
| 667 | +============================================================================== | |
| 668 | +* Gesture ID | |
| 669 | +============================================================================== | |
| 670 | + | |
| 671 | + Unlike other devices which sends multiple fingers' coordinates to host, | |
| 672 | +FSP processes multiple fingers' coordinates internally and convert them | |
| 673 | +into a 8 bits integer, namely 'Gesture ID.' Following is a list of | |
| 674 | +supported gesture IDs: | |
| 675 | + | |
| 676 | + ID Description | |
| 677 | + 0x86 2 finger straight up | |
| 678 | + 0x82 2 finger straight down | |
| 679 | + 0x80 2 finger straight right | |
| 680 | + 0x84 2 finger straight left | |
| 681 | + 0x8f 2 finger zoom in | |
| 682 | + 0x8b 2 finger zoom out | |
| 683 | + 0xc0 2 finger curve, counter clockwise | |
| 684 | + 0xc4 2 finger curve, clockwise | |
| 685 | + 0x2e 3 finger straight up | |
| 686 | + 0x2a 3 finger straight down | |
| 687 | + 0x28 3 finger straight right | |
| 688 | + 0x2c 3 finger straight left | |
| 689 | + 0x38 palm | |
| 690 | + | |
| 468 | 691 | ============================================================================== |
| 469 | 692 | * Register Listing |
| 470 | 693 | ============================================================================== |
| 471 | 694 | |
| 695 | + Registers are represented in 16 bits values. The higher 8 bits represent | |
| 696 | +the page address and the lower 8 bits represent the relative offset within | |
| 697 | +that particular page. Refer to the 'Programming Sequence for Page Register | |
| 698 | +Reading/Writing' section for instructions on how to change current page | |
| 699 | +address. | |
| 700 | + | |
| 472 | 701 | offset width default r/w name |
| 473 | −0x00 bit7~bit0 0x01 RO device ID | |
| 702 | +0x8200 bit7~bit0 0x01 RO device ID | |
| 474 | 703 | |
| 475 | −0x01 bit7~bit0 0xc0 RW version ID | |
| 704 | +0x8201 bit7~bit0 RW version ID | |
| 705 | + 0xc1: STL3888 Ax | |
| 706 | + 0xd0 ~ 0xd2: STL3888 Bx | |
| 707 | + 0xe0 ~ 0xe1: STL3888 Cx | |
| 708 | + 0xe2 ~ 0xe3: STL3888 Dx | |
| 476 | 709 | |
| 477 | −0x02 bit7~bit0 0x01 RO vendor ID | |
| 710 | +0x8202 bit7~bit0 0x01 RO vendor ID | |
| 478 | 711 | |
| 479 | −0x03 bit7~bit0 0x01 RO product ID | |
| 712 | +0x8203 bit7~bit0 0x01 RO product ID | |
| 480 | 713 | |
| 481 | −0x04 bit3~bit0 0x01 RW revision ID | |
| 714 | +0x8204 bit3~bit0 0x01 RW revision ID | |
| 482 | 715 | |
| 483 | −0x0b RO test mode status 1 | |
| 484 | − bit3 1 RO 0: rotate 180 degree, 1: no rotation | |
| 716 | +0x820b test mode status 1 | |
| 717 | + bit3 1 RO 0: rotate 180 degree | |
| 718 | + 1: no rotation | |
| 719 | + *only supported by H/W prior to Cx | |
| 485 | 720 | |
| 486 | − bit5~bit4 RO number of buttons | |
| 487 | − 11 => 2, lbtn/rbtn | |
| 488 | − 10 => 4, lbtn/rbtn/scru/scrd | |
| 489 | − 01 => 6, lbtn/rbtn/scru/scrd/scrl/scrr | |
| 490 | − 00 => 6, lbtn/rbtn/scru/scrd/fbtn/bbtn | |
| 721 | +0x820f register file page control | |
| 722 | + bit2 0 RW 1: rotate 180 degree | |
| 723 | + 0: no rotation | |
| 724 | + *supported since Cx | |
| 491 | 725 | |
| 492 | −0x0f RW register file page control | |
| 493 | 726 | bit0 0 RW 1 to enable page 1 register files |
| 727 | + *only supported by H/W prior to Cx | |
| 494 | 728 | |
| 495 | −0x10 RW system control 1 | |
| 729 | +0x8210 RW system control 1 | |
| 496 | 730 | bit0 1 RW Reserved, must be 1 |
| 497 | 731 | bit1 0 RW Reserved, must be 0 |
| 498 | − bit4 1 RW Reserved, must be 0 | |
| 499 | − bit5 0 RW register clock gating enable | |
| 732 | + bit4 0 RW Reserved, must be 0 | |
| 733 | + bit5 1 RW register clock gating enable | |
| 500 | 734 | 0: read only, 1: read/write enable |
| 501 | 735 | (Note that following registers does not require clock gating being |
| 502 | 736 | enabled prior to write: 05 06 07 08 09 0c 0f 10 11 12 16 17 18 23 2e |
| 503 | 737 | 40 41 42 43. In addition to that, this bit must be 1 when gesture |
| 504 | 738 | mode is enabled) |
| 505 | 739 | |
| 506 | −0x31 RW on-pad command detection | |
| 740 | +0x8220 test mode status | |
| 741 | + bit5~bit4 RO number of buttons | |
| 742 | + 11 => 2, lbtn/rbtn | |
| 743 | + 10 => 4, lbtn/rbtn/scru/scrd | |
| 744 | + 01 => 6, lbtn/rbtn/scru/scrd/scrl/scrr | |
| 745 | + 00 => 6, lbtn/rbtn/scru/scrd/fbtn/bbtn | |
| 746 | + *only supported by H/W prior to Cx | |
| 747 | + | |
| 748 | +0x8231 RW on-pad command detection | |
| 507 | 749 | bit7 0 RW on-pad command left button down tag |
| 508 | 750 | enable |
| 509 | 751 | 0: disable, 1: enable |
| 752 | + *only supported by H/W prior to Cx | |
| 510 | 753 | |
| 511 | −0x34 RW on-pad command control 5 | |
| 754 | +0x8234 RW on-pad command control 5 | |
| 512 | 755 | bit4~bit0 0x05 RW XLO in 0s/4/1, so 03h = 0010.1b = 2.5 |
| 513 | 756 | (Note that position unit is in 0.5 scanline) |
| 757 | + *only supported by H/W prior to Cx | |
| 514 | 758 | |
| 515 | 759 | bit7 0 RW on-pad tap zone enable |
| 516 | 760 | 0: disable, 1: enable |
| 761 | + *only supported by H/W prior to Cx | |
| 517 | 762 | |
| 518 | −0x35 RW on-pad command control 6 | |
| 763 | +0x8235 RW on-pad command control 6 | |
| 519 | 764 | bit4~bit0 0x1d RW XHI in 0s/4/1, so 19h = 1100.1b = 12.5 |
| 520 | 765 | (Note that position unit is in 0.5 scanline) |
| 766 | + *only supported by H/W prior to Cx | |
| 521 | 767 | |
| 522 | −0x36 RW on-pad command control 7 | |
| 768 | +0x8236 RW on-pad command control 7 | |
| 523 | 769 | bit4~bit0 0x04 RW YLO in 0s/4/1, so 03h = 0010.1b = 2.5 |
| 524 | 770 | (Note that position unit is in 0.5 scanline) |
| 771 | + *only supported by H/W prior to Cx | |
| 525 | 772 | |
| 526 | −0x37 RW on-pad command control 8 | |
| 773 | +0x8237 RW on-pad command control 8 | |
| 527 | 774 | bit4~bit0 0x13 RW YHI in 0s/4/1, so 11h = 1000.1b = 8.5 |
| 528 | 775 | (Note that position unit is in 0.5 scanline) |
| 776 | + *only supported by H/W prior to Cx | |
| 529 | 777 | |
| 530 | −0x40 RW system control 5 | |
| 778 | +0x8240 RW system control 5 | |
| 531 | 779 | bit1 0 RW FSP Intellimouse mode enable |
| 532 | 780 | 0: disable, 1: enable |
| 781 | + *only supported by H/W prior to Cx | |
| 533 | 782 | |
| 534 | 783 | bit2 0 RW movement + abs. coordinate mode enable |
| 535 | 784 | 0: disable, 1: enable |
| @@ -537,6 +786,7 @@ offset width default r/w name · 1 unmodified line | ||
| 537 | 786 | bit 1 is not set. However, the format is different from that of bit 1. |
| 538 | 787 | In addition, when bit 1 and bit 2 are set at the same time, bit 2 will |
| 539 | 788 | override bit 1.) |
| 789 | + *only supported by H/W prior to Cx | |
| 540 | 790 | |
| 541 | 791 | bit3 0 RW abs. coordinate only mode enable |
| 542 | 792 | 0: disable, 1: enable |
| @@ -544,9 +794,11 @@ offset width default r/w name · 1 unmodified line | ||
| 544 | 794 | bit 1 is not set. However, the format is different from that of bit 1. |
| 545 | 795 | In addition, when bit 1, bit 2 and bit 3 are set at the same time, |
| 546 | 796 | bit 3 will override bit 1 and 2.) |
| 797 | + *only supported by H/W prior to Cx | |
| 547 | 798 | |
| 548 | 799 | bit5 0 RW auto switch enable |
| 549 | 800 | 0: disable, 1: enable |
| 801 | + *only supported by H/W prior to Cx | |
| 550 | 802 | |
| 551 | 803 | bit6 0 RW G0 abs. + notify packet format enable |
| 552 | 804 | 0: disable, 1: enable |
| @@ -554,18 +806,68 @@ offset width default r/w name · 1 unmodified line | ||
| 554 | 806 | bit 2 and 3. That is, if any of those bit is 1, host will receive |
| 555 | 807 | absolute coordinates; otherwise, host only receives packets with |
| 556 | 808 | relative coordinate.) |
| 809 | + *only supported by H/W prior to Cx | |
| 557 | 810 | |
| 558 | 811 | bit7 0 RW EN_PS2_F2: PS/2 gesture mode 2nd |
| 559 | 812 | finger packet enable |
| 560 | 813 | 0: disable, 1: enable |
| 814 | + *only supported by H/W prior to Cx | |
| 561 | 815 | |
| 562 | −0x43 RW on-pad control | |
| 816 | +0x8243 RW on-pad control | |
| 563 | 817 | bit0 0 RW on-pad control enable |
| 564 | 818 | 0: disable, 1: enable |
| 565 | 819 | (Note that if this bit is cleared, bit 3/5 will be ineffective) |
| 820 | + *only supported by H/W prior to Cx | |
| 566 | 821 | |
| 567 | 822 | bit3 0 RW on-pad fix vertical scrolling enable |
| 568 | 823 | 0: disable, 1: enable |
| 824 | + *only supported by H/W prior to Cx | |
| 569 | 825 | |
| 570 | 826 | bit5 0 RW on-pad fix horizontal scrolling enable |
| 571 | 827 | 0: disable, 1: enable |
| 828 | + *only supported by H/W prior to Cx | |
| 829 | + | |
| 830 | +0x8290 RW software control register 1 | |
| 831 | + bit0 0 RW absolute coordination mode | |
| 832 | + 0: disable, 1: enable | |
| 833 | + *supported since Cx | |
| 834 | + | |
| 835 | + bit1 0 RW gesture ID output | |
| 836 | + 0: disable, 1: enable | |
| 837 | + *supported since Cx | |
| 838 | + | |
| 839 | + bit2 0 RW two fingers' coordinates output | |
| 840 | + 0: disable, 1: enable | |
| 841 | + *supported since Cx | |
| 842 | + | |
| 843 | + bit3 0 RW finger up one packet output | |
| 844 | + 0: disable, 1: enable | |
| 845 | + *supported since Cx | |
| 846 | + | |
| 847 | + bit4 0 RW absolute coordination continuous mode | |
| 848 | + 0: disable, 1: enable | |
| 849 | + *supported since Cx | |
| 850 | + | |
| 851 | + bit6~bit5 00 RW gesture group selection | |
| 852 | + 00: basic | |
| 853 | + 01: suite | |
| 854 | + 10: suite pro | |
| 855 | + 11: advanced | |
| 856 | + *supported since Cx | |
| 857 | + | |
| 858 | + bit7 0 RW Bx packet output compatible mode | |
| 859 | + 0: disable, 1: enable *supported since Cx | |
| 860 | + *supported since Cx | |
| 861 | + | |
| 862 | + | |
| 863 | +0x833d RW on-pad command control 1 | |
| 864 | + bit7 1 RW on-pad command detection enable | |
| 865 | + 0: disable, 1: enable | |
| 866 | + *supported since Cx | |
| 867 | + | |
| 868 | +0x833e RW on-pad command detection | |
| 869 | + bit7 0 RW on-pad command left button down tag | |
| 870 | + enable. Works only in H/W based PS/2 | |
| 871 | + data packet mode. | |
| 872 | + 0: disable, 1: enable | |
| 873 | + *supported since Cx | |
| @@ -149,6 +149,7 @@ Code Seq#(hex) Include File Comments · 148 unmodified lines | ||
| 149 | 149 | 'M' 01-03 drivers/scsi/megaraid/megaraid_sas.h |
| 150 | 150 | 'M' 00-0F drivers/video/fsl-diu-fb.h conflict! |
| 151 | 151 | 'N' 00-1F drivers/usb/scanner.h |
| 152 | +'N' 40-7F drivers/block/nvme.c | |
| 152 | 153 | 'O' 00-06 mtd/ubi-user.h UBI |
| 153 | 154 | 'P' all linux/soundcard.h conflict! |
| 154 | 155 | 'P' 60-6F sound/sscape_ioctl.h conflict! |
| @@ -33,14 +33,15 @@ This document describes the Linux kernel Makefiles. · 32 unmodified lines | ||
| 33 | 33 | |
| 34 | 34 | === 6 Architecture Makefiles |
| 35 | 35 | --- 6.1 Set variables to tweak the build to the architecture |
| 36 | − --- 6.2 Add prerequisites to archprepare: | |
| 37 | − --- 6.3 List directories to visit when descending | |
| 38 | − --- 6.4 Architecture-specific boot images | |
| 39 | − --- 6.5 Building non-kbuild targets | |
| 40 | − --- 6.6 Commands useful for building a boot image | |
| 41 | − --- 6.7 Custom kbuild commands | |
| 42 | − --- 6.8 Preprocessing linker scripts | |
| 43 | − --- 6.9 Generic header files | |
| 36 | + --- 6.2 Add prerequisites to archheaders: | |
| 37 | + --- 6.3 Add prerequisites to archprepare: | |
| 38 | + --- 6.4 List directories to visit when descending | |
| 39 | + --- 6.5 Architecture-specific boot images | |
| 40 | + --- 6.6 Building non-kbuild targets | |
| 41 | + --- 6.7 Commands useful for building a boot image | |
| 42 | + --- 6.8 Custom kbuild commands | |
| 43 | + --- 6.9 Preprocessing linker scripts | |
| 44 | + --- 6.10 Generic header files | |
| 44 | 45 | |
| 45 | 46 | === 7 Kbuild syntax for exported headers |
| 46 | 47 | --- 7.1 header-y |
| @@ -252,7 +253,7 @@ more details, with real examples. · 205 unmodified lines | ||
| 252 | 253 | This will create a library lib.a based on delay.o. For kbuild to |
| 253 | 254 | actually recognize that there is a lib.a being built, the directory |
| 254 | 255 | shall be listed in libs-y. |
| 255 | − See also "6.3 List directories to visit when descending". | |
| 256 | + See also "6.4 List directories to visit when descending". | |
| 256 | 257 | |
| 257 | 258 | Use of lib-y is normally restricted to lib/ and arch/*/lib. |
| 258 | 259 | |
| @@ -974,7 +975,20 @@ When kbuild executes, the following steps are followed (roughly): · 715 unmodified lines | ||
| 974 | 975 | $(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic |
| 975 | 976 | mode) if this option is supported by $(AR). |
| 976 | 977 | |
| 977 | −--- 6.2 Add prerequisites to archprepare: | |
| 978 | +--- 6.2 Add prerequisites to archheaders: | |
| 979 | + | |
| 980 | + The archheaders: rule is used to generate header files that | |
| 981 | + may be installed into user space by "make header_install" or | |
| 982 | + "make headers_install_all". In order to support | |
| 983 | + "make headers_install_all", this target has to be able to run | |
| 984 | + on an unconfigured tree, or a tree configured for another | |
| 985 | + architecture. | |
| 986 | + | |
| 987 | + It is run before "make archprepare" when run on the | |
| 988 | + architecture itself. | |
| 989 | + | |
| 990 | + | |
| 991 | +--- 6.3 Add prerequisites to archprepare: | |
| 978 | 992 | |
| 979 | 993 | The archprepare: rule is used to list prerequisites that need to be |
| 980 | 994 | built before starting to descend down in the subdirectories. |
| @@ -990,7 +1004,7 @@ When kbuild executes, the following steps are followed (roughly): · 9 unmodified lines | ||
| 990 | 1004 | generating offset header files. |
| 991 | 1005 | |
| 992 | 1006 | |
| 993 | −--- 6.3 List directories to visit when descending | |
| 1007 | +--- 6.4 List directories to visit when descending | |
| 994 | 1008 | |
| 995 | 1009 | An arch Makefile cooperates with the top Makefile to define variables |
| 996 | 1010 | which specify how to build the vmlinux file. Note that there is no |
| @@ -1019,7 +1033,7 @@ When kbuild executes, the following steps are followed (roughly): · 22 unmodified lines | ||
| 1019 | 1033 | drivers-$(CONFIG_OPROFILE) += arch/sparc64/oprofile/ |
| 1020 | 1034 | |
| 1021 | 1035 | |
| 1022 | −--- 6.4 Architecture-specific boot images | |
| 1036 | +--- 6.5 Architecture-specific boot images | |
| 1023 | 1037 | |
| 1024 | 1038 | An arch Makefile specifies goals that take the vmlinux file, compress |
| 1025 | 1039 | it, wrap it in bootstrapping code, and copy the resulting files |
| @@ -1070,7 +1084,7 @@ When kbuild executes, the following steps are followed (roughly): · 44 unmodified lines | ||
| 1070 | 1084 | |
| 1071 | 1085 | When "make" is executed without arguments, bzImage will be built. |
| 1072 | 1086 | |
| 1073 | −--- 6.5 Building non-kbuild targets | |
| 1087 | +--- 6.6 Building non-kbuild targets | |
| 1074 | 1088 | |
| 1075 | 1089 | extra-y |
| 1076 | 1090 | |
| @@ -1090,7 +1104,7 @@ When kbuild executes, the following steps are followed (roughly): · 13 unmodified lines | ||
| 1090 | 1104 | shall be built, but shall not be linked as part of built-in.o. |
| 1091 | 1105 | |
| 1092 | 1106 | |
| 1093 | −--- 6.6 Commands useful for building a boot image | |
| 1107 | +--- 6.7 Commands useful for building a boot image | |
| 1094 | 1108 | |
| 1095 | 1109 | Kbuild provides a few macros that are useful when building a |
| 1096 | 1110 | boot image. |
| @@ -1112,7 +1126,7 @@ When kbuild executes, the following steps are followed (roughly): · 15 unmodified lines | ||
| 1112 | 1126 | always be built. |
| 1113 | 1127 | Assignments to $(targets) are without $(obj)/ prefix. |
| 1114 | 1128 | if_changed may be used in conjunction with custom commands as |
| 1115 | − defined in 6.7 "Custom kbuild commands". | |
| 1129 | + defined in 6.8 "Custom kbuild commands". | |
| 1116 | 1130 | |
| 1117 | 1131 | Note: It is a typical mistake to forget the FORCE prerequisite. |
| 1118 | 1132 | Another common pitfall is that whitespace is sometimes |
| @@ -1171,7 +1185,7 @@ When kbuild executes, the following steps are followed (roughly): · 52 unmodified lines | ||
| 1171 | 1185 | $(obj)/%.dtb: $(src)/%.dts |
| 1172 | 1186 | $(call cmd,dtc) |
| 1173 | 1187 | |
| 1174 | −--- 6.7 Custom kbuild commands | |
| 1188 | +--- 6.8 Custom kbuild commands | |
| 1175 | 1189 | |
| 1176 | 1190 | When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand |
| 1177 | 1191 | of a command is normally displayed. |
| @@ -1198,7 +1212,7 @@ When kbuild executes, the following steps are followed (roughly): · 20 unmodified lines | ||
| 1198 | 1212 | will be displayed with "make KBUILD_VERBOSE=0". |
| 1199 | 1213 | |
| 1200 | 1214 | |
| 1201 | −--- 6.8 Preprocessing linker scripts | |
| 1215 | +--- 6.9 Preprocessing linker scripts | |
| 1202 | 1216 | |
| 1203 | 1217 | When the vmlinux image is built, the linker script |
| 1204 | 1218 | arch/$(ARCH)/kernel/vmlinux.lds is used. |
| @@ -1228,7 +1242,7 @@ When kbuild executes, the following steps are followed (roughly): · 23 unmodified lines | ||
| 1228 | 1242 | The kbuild infrastructure for *lds file are used in several |
| 1229 | 1243 | architecture-specific files. |
| 1230 | 1244 | |
| 1231 | −--- 6.9 Generic header files | |
| 1245 | +--- 6.10 Generic header files | |
| 1232 | 1246 | |
| 1233 | 1247 | The directory include/asm-generic contains the header files |
| 1234 | 1248 | that may be shared between individual architectures. |
| @@ -17,8 +17,8 @@ You can use common commands, such as cp and scp, to copy the · 16 unmodified lines | ||
| 17 | 17 | memory image to a dump file on the local disk, or across the network to |
| 18 | 18 | a remote system. |
| 19 | 19 | |
| 20 | −Kdump and kexec are currently supported on the x86, x86_64, ppc64 and ia64 | |
| 21 | −architectures. | |
| 20 | +Kdump and kexec are currently supported on the x86, x86_64, ppc64, ia64, | |
| 21 | +and s390x architectures. | |
| 22 | 22 | |
| 23 | 23 | When the system kernel boots, it reserves a small section of memory for |
| 24 | 24 | the dump-capture kernel. This ensures that ongoing Direct Memory Access |
| @@ -34,11 +34,18 @@ Similarly on PPC64 machines first 32KB of physical memory is needed for · 9 unmodified lines | ||
| 34 | 34 | booting regardless of where the kernel is loaded and to support 64K page |
| 35 | 35 | size kexec backs up the first 64KB memory. |
| 36 | 36 | |
| 37 | +For s390x, when kdump is triggered, the crashkernel region is exchanged | |
| 38 | +with the region [0, crashkernel region size] and then the kdump kernel | |
| 39 | +runs in [0, crashkernel region size]. Therefore no relocatable kernel is | |
| 40 | +needed for s390x. | |
| 41 | + | |
| 37 | 42 | All of the necessary information about the system kernel's core image is |
| 38 | 43 | encoded in the ELF format, and stored in a reserved area of memory |
| 39 | 44 | before a crash. The physical address of the start of the ELF header is |
| 40 | 45 | passed to the dump-capture kernel through the elfcorehdr= boot |
| 41 | −parameter. | |
| 46 | +parameter. Optionally the size of the ELF header can also be passed | |
| 47 | +when using the elfcorehdr=[size[KMG]@]offset[KMG] syntax. | |
| 48 | + | |
| 42 | 49 | |
| 43 | 50 | With the dump-capture kernel, you can access the memory image, or "old |
| 44 | 51 | memory," in two ways: |
| @@ -291,6 +298,10 @@ Boot into System Kernel · 246 unmodified lines | ||
| 291 | 298 | The region may be automatically placed on ia64, see the |
| 292 | 299 | dump-capture kernel config option notes above. |
| 293 | 300 | |
| 301 | + On s390x, typically use "crashkernel=xxM". The value of xx is dependent | |
| 302 | + on the memory consumption of the kdump system. In general this is not | |
| 303 | + dependent on the memory size of the production system. | |
| 304 | + | |
| 294 | 305 | Load the Dump-capture Kernel |
| 295 | 306 | ============================ |
| 296 | 307 | |
| @@ -308,6 +319,8 @@ For ppc64: · 11 unmodified lines | ||
| 308 | 319 | - Use vmlinux |
| 309 | 320 | For ia64: |
| 310 | 321 | - Use vmlinux or vmlinuz.gz |
| 322 | +For s390x: | |
| 323 | + - Use image or bzImage | |
| 311 | 324 | |
| 312 | 325 | |
| 313 | 326 | If you are using a uncompressed vmlinux image then use following command |
| @@ -337,6 +350,8 @@ For i386, x86_64 and ia64: · 23 unmodified lines | ||
| 337 | 350 | For ppc64: |
| 338 | 351 | "1 maxcpus=1 noirqdistrib reset_devices" |
| 339 | 352 | |
| 353 | +For s390x: | |
| 354 | + "1 maxcpus=1 cgroup_disable=memory" | |
| 340 | 355 | |
| 341 | 356 | Notes on loading the dump-capture kernel: |
| 342 | 357 | |
| @@ -362,6 +377,20 @@ Notes on loading the dump-capture kernel: · 19 unmodified lines | ||
| 362 | 377 | dump. Hence generally it is useful either to build a UP dump-capture |
| 363 | 378 | kernel or specify maxcpus=1 option while loading dump-capture kernel. |
| 364 | 379 | |
| 380 | +* For s390x there are two kdump modes: If a ELF header is specified with | |
| 381 | + the elfcorehdr= kernel parameter, it is used by the kdump kernel as it | |
| 382 | + is done on all other architectures. If no elfcorehdr= kernel parameter is | |
| 383 | + specified, the s390x kdump kernel dynamically creates the header. The | |
| 384 | + second mode has the advantage that for CPU and memory hotplug, kdump has | |
| 385 | + not to be reloaded with kexec_load(). | |
| 386 | + | |
| 387 | +* For s390x systems with many attached devices the "cio_ignore" kernel | |
| 388 | + parameter should be used for the kdump kernel in order to prevent allocation | |
| 389 | + of kernel memory for devices that are not relevant for kdump. The same | |
| 390 | + applies to systems that use SCSI/FCP devices. In that case the | |
| 391 | + "allow_lun_scan" zfcp module parameter should be set to zero before | |
| 392 | + setting FCP devices online. | |
| 393 | + | |
| 365 | 394 | Kernel Panic |
| 366 | 395 | ============ |
| 367 | 396 | |
| @@ -329,6 +329,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 328 unmodified lines | ||
| 329 | 329 | is a lot of faster |
| 330 | 330 | off - do not initialize any AMD IOMMU found in |
| 331 | 331 | the system |
| 332 | + force_isolation - Force device isolation for all | |
| 333 | + devices. The IOMMU driver is not | |
| 334 | + allowed anymore to lift isolation | |
| 335 | + requirements as needed. This option | |
| 336 | + does not override iommu=pt | |
| 332 | 337 | |
| 333 | 338 | amijoy.map= [HW,JOY] Amiga joystick support |
| 334 | 339 | Map of devices attached to JOY0DAT and JOY1DAT |
| @@ -623,6 +628,25 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 288 unmodified lines | ||
| 623 | 628 | no_debug_objects |
| 624 | 629 | [KNL] Disable object debugging |
| 625 | 630 | |
| 631 | + debug_guardpage_minorder= | |
| 632 | + [KNL] When CONFIG_DEBUG_PAGEALLOC is set, this | |
| 633 | + parameter allows control of the order of pages that will | |
| 634 | + be intentionally kept free (and hence protected) by the | |
| 635 | + buddy allocator. Bigger value increase the probability | |
| 636 | + of catching random memory corruption, but reduce the | |
| 637 | + amount of memory for normal system use. The maximum | |
| 638 | + possible value is MAX_ORDER/2. Setting this parameter | |
| 639 | + to 1 or 2 should be enough to identify most random | |
| 640 | + memory corruption problems caused by bugs in kernel or | |
| 641 | + driver code when a CPU writes to (or reads from) a | |
| 642 | + random memory location. Note that there exists a class | |
| 643 | + of memory corruptions problems caused by buggy H/W or | |
| 644 | + F/W or by drivers badly programing DMA (basically when | |
| 645 | + memory is written at bus level and the CPU MMU is | |
| 646 | + bypassed) which are not detectable by | |
| 647 | + CONFIG_DEBUG_PAGEALLOC, hence this option will not help | |
| 648 | + tracking down these problems. | |
| 649 | + | |
| 626 | 650 | debugpat [X86] Enable PAT debugging |
| 627 | 651 | |
| 628 | 652 | decnet.addr= [HW,NET] |
| @@ -1035,6 +1059,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 406 unmodified lines | ||
| 1035 | 1059 | By default, super page will be supported if Intel IOMMU |
| 1036 | 1060 | has the capability. With this option, super page will |
| 1037 | 1061 | not be supported. |
| 1062 | + | |
| 1063 | + intel_idle.max_cstate= [KNL,HW,ACPI,X86] | |
| 1064 | + 0 disables intel_idle and fall back on acpi_idle. | |
| 1065 | + 1 to 6 specify maximum depth of C-state. | |
| 1066 | + | |
| 1038 | 1067 | intremap= [X86-64, Intel-IOMMU] |
| 1039 | 1068 | on enable Interrupt Remapping (default) |
| 1040 | 1069 | off disable Interrupt Remapping |
| @@ -1059,7 +1088,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 18 unmodified lines | ||
| 1059 | 1088 | nomerge |
| 1060 | 1089 | forcesac |
| 1061 | 1090 | soft |
| 1062 | − pt [x86, IA-64] | |
| 1091 | + pt [x86, IA-64] | |
| 1092 | + group_mf [x86, IA-64] | |
| 1093 | + | |
| 1063 | 1094 | |
| 1064 | 1095 | io7= [HW] IO7 for Marvel based alpha systems |
| 1065 | 1096 | See comment before marvel_specify_io7 in |
| @@ -1178,9 +1209,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 112 unmodified lines | ||
| 1178 | 1209 | kvm.ignore_msrs=[KVM] Ignore guest accesses to unhandled MSRs. |
| 1179 | 1210 | Default is 0 (don't ignore, but inject #GP) |
| 1180 | 1211 | |
| 1181 | − kvm.oos_shadow= [KVM] Disable out-of-sync shadow paging. | |
| 1182 | − Default is 1 (enabled) | |
| 1183 | − | |
| 1184 | 1212 | kvm.mmu_audit= [KVM] This is a R/W parameter which allows audit |
| 1185 | 1213 | KVM MMU at runtime. |
| 1186 | 1214 | Default is 0 (off) |
| @@ -1630,12 +1658,17 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 443 unmodified lines | ||
| 1630 | 1658 | The default is to return 64-bit inode numbers. |
| 1631 | 1659 | |
| 1632 | 1660 | nfs.nfs4_disable_idmapping= |
| 1633 | − [NFSv4] When set, this option disables the NFSv4 | |
| 1634 | − idmapper on the client, but only if the mount | |
| 1635 | − is using the 'sec=sys' security flavour. This may | |
| 1636 | − make migration from legacy NFSv2/v3 systems easier | |
| 1637 | − provided that the server has the appropriate support. | |
| 1638 | − The default is to always enable NFSv4 idmapping. | |
| 1661 | + [NFSv4] When set to the default of '1', this option | |
| 1662 | + ensures that both the RPC level authentication | |
| 1663 | + scheme and the NFS level operations agree to use | |
| 1664 | + numeric uids/gids if the mount is using the | |
| 1665 | + 'sec=sys' security flavour. In effect it is | |
| 1666 | + disabling idmapping, which can make migration from | |
| 1667 | + legacy NFSv2/v3 systems to NFSv4 easier. | |
| 1668 | + Servers that do not support this mode of operation | |
| 1669 | + will be autodetected by the client, and it will fall | |
| 1670 | + back to using the idmapper. | |
| 1671 | + To turn off this behaviour, set the value to '0'. | |
| 1639 | 1672 | |
| 1640 | 1673 | nmi_debug= [KNL,AVR32,SH] Specify one or more actions to take |
| 1641 | 1674 | when a NMI is triggered. |
| @@ -1796,6 +1829,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 154 unmodified lines | ||
| 1796 | 1829 | nomfgpt [X86-32] Disable Multi-Function General Purpose |
| 1797 | 1830 | Timer usage (for AMD Geode machines). |
| 1798 | 1831 | |
| 1832 | + nonmi_ipi [X86] Disable using NMI IPIs during panic/reboot to | |
| 1833 | + shutdown the other cpus. Instead use the REBOOT_VECTOR | |
| 1834 | + irq. | |
| 1835 | + | |
| 1799 | 1836 | nopat [X86] Disable PAT (page attribute table extension of |
| 1800 | 1837 | pagetables) support. |
| 1801 | 1838 | |
| @@ -2367,6 +2404,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 565 unmodified lines | ||
| 2367 | 2404 | |
| 2368 | 2405 | slram= [HW,MTD] |
| 2369 | 2406 | |
| 2407 | + slab_max_order= [MM, SLAB] | |
| 2408 | + Determines the maximum allowed order for slabs. | |
| 2409 | + A high setting may cause OOMs due to memory | |
| 2410 | + fragmentation. Defaults to 1 for systems with | |
| 2411 | + more than 32MB of RAM, 0 otherwise. | |
| 2412 | + | |
| 2370 | 2413 | slub_debug[=options[,slabs]] [MM, SLUB] |
| 2371 | 2414 | Enabling slub_debug allows one to determine the |
| 2372 | 2415 | culprit if slab objects become corrupted. Enabling |
| @@ -2437,6 +2480,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 64 unmodified lines | ||
| 2437 | 2480 | stacktrace [FTRACE] |
| 2438 | 2481 | Enabled the stack tracer on boot up. |
| 2439 | 2482 | |
| 2483 | + stacktrace_filter=[function-list] | |
| 2484 | + [FTRACE] Limit the functions that the stack tracer | |
| 2485 | + will trace at boot up. function-list is a comma separated | |
| 2486 | + list of functions. This list can be changed at run | |
| 2487 | + time by the stack_trace_filter file in the debugfs | |
| 2488 | + tracing directory. Note, this enables stack tracing | |
| 2489 | + and the stacktrace above is not needed. | |
| 2490 | + | |
| 2440 | 2491 | sti= [PARISC,HW] |
| 2441 | 2492 | Format: <num> |
| 2442 | 2493 | Set the STI (builtin display/keyboard on the HP-PARISC |
| @@ -2637,6 +2688,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 194 unmodified lines | ||
| 2637 | 2688 | [USB] Start with the old device initialization |
| 2638 | 2689 | scheme (default 0 = off). |
| 2639 | 2690 | |
| 2691 | + usbcore.usbfs_memory_mb= | |
| 2692 | + [USB] Memory limit (in MB) for buffers allocated by | |
| 2693 | + usbfs (default = 16, 0 = max = 2047). | |
| 2694 | + | |
| 2640 | 2695 | usbcore.use_both_schemes= |
| 2641 | 2696 | [USB] Try the other device initialization scheme |
| 2642 | 2697 | if the first one fails (default 1 = enabled). |
| @@ -127,7 +127,10 @@ See the include/linux/kmemleak.h header for the functions prototype. · 126 unmodified lines | ||
| 127 | 127 | |
| 128 | 128 | kmemleak_init - initialize kmemleak |
| 129 | 129 | kmemleak_alloc - notify of a memory block allocation |
| 130 | +kmemleak_alloc_percpu - notify of a percpu memory block allocation | |
| 130 | 131 | kmemleak_free - notify of a memory block freeing |
| 132 | +kmemleak_free_part - notify of a partial memory block freeing | |
| 133 | +kmemleak_free_percpu - notify of a percpu memory block freeing | |
| 131 | 134 | kmemleak_not_leak - mark an object as not a leak |
| 132 | 135 | kmemleak_ignore - do not scan or report an object as leak |
| 133 | 136 | kmemleak_scan_area - add scan areas inside a memory block |
| @@ -357,14 +357,14 @@ Each directory contains: · 356 unmodified lines | ||
| 357 | 357 | written to, that device. |
| 358 | 358 | |
| 359 | 359 | state |
| 360 | − A file recording the current state of the device in the array | |
| 360 | + A file recording the current state of the device in the array | |
| 361 | 361 | which can be a comma separated list of |
| 362 | 362 | faulty - device has been kicked from active use due to |
| 363 | − a detected fault or it has unacknowledged bad | |
| 364 | − blocks | |
| 363 | + a detected fault, or it has unacknowledged bad | |
| 364 | + blocks | |
| 365 | 365 | in_sync - device is a fully in-sync member of the array |
| 366 | 366 | writemostly - device will only be subject to read |
| 367 | − requests if there are no other options. | |
| 367 | + requests if there are no other options. | |
| 368 | 368 | This applies only to raid1 arrays. |
| 369 | 369 | blocked - device has failed, and the failure hasn't been |
| 370 | 370 | acknowledged yet by the metadata handler. |
| @@ -374,6 +374,13 @@ Each directory contains: · 3 unmodified lines | ||
| 374 | 374 | This includes spares that are in the process |
| 375 | 375 | of being recovered to |
| 376 | 376 | write_error - device has ever seen a write error. |
| 377 | + want_replacement - device is (mostly) working but probably | |
| 378 | + should be replaced, either due to errors or | |
| 379 | + due to user request. | |
| 380 | + replacement - device is a replacement for another active | |
| 381 | + device with same raid_disk. | |
| 382 | + | |
| 383 | + | |
| 377 | 384 | This list may grow in future. |
| 378 | 385 | This can be written to. |
| 379 | 386 | Writing "faulty" simulates a failure on the device. |
| @@ -386,6 +393,13 @@ Each directory contains: · 6 unmodified lines | ||
| 386 | 393 | Writing "in_sync" sets the in_sync flag. |
| 387 | 394 | Writing "write_error" sets writeerrorseen flag. |
| 388 | 395 | Writing "-write_error" clears writeerrorseen flag. |
| 396 | + Writing "want_replacement" is allowed at any time except to a | |
| 397 | + replacement device or a spare. It sets the flag. | |
| 398 | + Writing "-want_replacement" is allowed at any time. It clears | |
| 399 | + the flag. | |
| 400 | + Writing "replacement" or "-replacement" is only allowed before | |
| 401 | + starting the array. It sets or clears the flag. | |
| 402 | + | |
| 389 | 403 | |
| 390 | 404 | This file responds to select/poll. Any change to 'faulty' |
| 391 | 405 | or 'blocked' causes an event. |
| @@ -64,3 +64,13 @@ Note on Erase Size and Preferred Erase Size: · 63 unmodified lines | ||
| 64 | 64 | size specified by the card. |
| 65 | 65 | |
| 66 | 66 | "preferred_erase_size" is in bytes. |
| 67 | + | |
| 68 | +SD/MMC/SDIO Clock Gating Attribute | |
| 69 | +================================== | |
| 70 | + | |
| 71 | +Read and write access is provided to following attribute. | |
| 72 | +This attribute appears only if CONFIG_MMC_CLKGATE is enabled. | |
| 73 | + | |
| 74 | + clkgate_delay Tune the clock gating delay with desired value in milliseconds. | |
| 75 | + | |
| 76 | +echo <desired delay> > /sys/class/mmc_host/mmcX/clkgate_delay | |
| @@ -25,3 +25,16 @@ echo 0 > /sys/block/mmcblkXbootY/force_ro · 24 unmodified lines | ||
| 25 | 25 | To re-enable read-only access: |
| 26 | 26 | |
| 27 | 27 | echo 1 > /sys/block/mmcblkXbootY/force_ro |
| 28 | + | |
| 29 | +The boot partitions can also be locked read only until the next power on, | |
| 30 | +with: | |
| 31 | + | |
| 32 | +echo 1 > /sys/block/mmcblkXbootY/ro_lock_until_next_power_on | |
| 33 | + | |
| 34 | +This is a feature of the card and not of the kernel. If the card does | |
| 35 | +not support boot partition locking, the file will not exist. If the | |
| 36 | +feature has been disabled on the card, the file will be read-only. | |
| 37 | + | |
| 38 | +The boot partitions can also be locked permanently, but this feature is | |
| 39 | +not accessible through sysfs in order to avoid accidental or malicious | |
| 40 | +bricking. | |
| @@ -144,6 +144,8 @@ nfc.txt · 143 unmodified lines | ||
| 144 | 144 | - The Linux Near Field Communication (NFS) subsystem. |
| 145 | 145 | olympic.txt |
| 146 | 146 | - IBM PCI Pit/Pit-Phy/Olympic Token Ring driver info. |
| 147 | +openvswitch.txt | |
| 148 | + - Open vSwitch developer documentation. | |
| 147 | 149 | operstates.txt |
| 148 | 150 | - Overview of network interface operational states. |
| 149 | 151 | packet_mmap.txt |
| @@ -200,15 +200,16 @@ abled during run time. Following log_levels are defined: · 199 unmodified lines | ||
| 200 | 200 | |
| 201 | 201 | 0 - All debug output disabled |
| 202 | 202 | 1 - Enable messages related to routing / flooding / broadcasting |
| 203 | −2 - Enable route or tt entry added / changed / deleted | |
| 204 | −3 - Enable all messages | |
| 203 | +2 - Enable messages related to route added / changed / deleted | |
| 204 | +4 - Enable messages related to translation table operations | |
| 205 | +7 - Enable all messages | |
| 205 | 206 | |
| 206 | 207 | The debug output can be changed at runtime using the file |
| 207 | 208 | /sys/class/net/bat0/mesh/log_level. e.g. |
| 208 | 209 | |
| 209 | 210 | # echo 2 > /sys/class/net/bat0/mesh/log_level |
| 210 | 211 | |
| 211 | −will enable debug messages for when routes or TTs change. | |
| 212 | +will enable debug messages for when routes change. | |
| 212 | 213 | |
| 213 | 214 | |
| 214 | 215 | BATCTL |
| @@ -196,6 +196,23 @@ or, for backwards compatibility, the option value. E.g., · 195 unmodified lines | ||
| 196 | 196 | |
| 197 | 197 | The parameters are as follows: |
| 198 | 198 | |
| 199 | +active_slave | |
| 200 | + | |
| 201 | + Specifies the new active slave for modes that support it | |
| 202 | + (active-backup, balance-alb and balance-tlb). Possible values | |
| 203 | + are the name of any currently enslaved interface, or an empty | |
| 204 | + string. If a name is given, the slave and its link must be up in order | |
| 205 | + to be selected as the new active slave. If an empty string is | |
| 206 | + specified, the current active slave is cleared, and a new active | |
| 207 | + slave is selected automatically. | |
| 208 | + | |
| 209 | + Note that this is only available through the sysfs interface. No module | |
| 210 | + parameter by this name exists. | |
| 211 | + | |
| 212 | + The normal value of this option is the name of the currently | |
| 213 | + active slave, or the empty string if there is no active slave or | |
| 214 | + the current mode does not use an active slave. | |
| 215 | + | |
| 199 | 216 | ad_select |
| 200 | 217 | |
| 201 | 218 | Specifies the 802.3ad aggregation selection logic to use. The |
| @@ -78,3 +78,30 @@ in software. This is currently WIP. · 77 unmodified lines | ||
| 78 | 78 | |
| 79 | 79 | See header include/net/mac802154.h and several drivers in drivers/ieee802154/. |
| 80 | 80 | |
| 81 | +6LoWPAN Linux implementation | |
| 82 | +============================ | |
| 83 | + | |
| 84 | +The IEEE 802.15.4 standard specifies an MTU of 128 bytes, yielding about 80 | |
| 85 | +octets of actual MAC payload once security is turned on, on a wireless link | |
| 86 | +with a link throughput of 250 kbps or less. The 6LoWPAN adaptation format | |
| 87 | +[RFC4944] was specified to carry IPv6 datagrams over such constrained links, | |
| 88 | +taking into account limited bandwidth, memory, or energy resources that are | |
| 89 | +expected in applications such as wireless Sensor Networks. [RFC4944] defines | |
| 90 | +a Mesh Addressing header to support sub-IP forwarding, a Fragmentation header | |
| 91 | +to support the IPv6 minimum MTU requirement [RFC2460], and stateless header | |
| 92 | +compression for IPv6 datagrams (LOWPAN_HC1 and LOWPAN_HC2) to reduce the | |
| 93 | +relatively large IPv6 and UDP headers down to (in the best case) several bytes. | |
| 94 | + | |
| 95 | +In Semptember 2011 the standard update was published - [RFC6282]. | |
| 96 | +It deprecates HC1 and HC2 compression and defines IPHC encoding format which is | |
| 97 | +used in this Linux implementation. | |
| 98 | + | |
| 99 | +All the code related to 6lowpan you may find in files: net/ieee802154/6lowpan.* | |
| 100 | + | |
| 101 | +To setup 6lowpan interface you need (busybox release > 1.17.0): | |
| 102 | +1. Add IEEE802.15.4 interface and initialize PANid; | |
| 103 | +2. Add 6lowpan interface by command like: | |
| 104 | + # ip link add link wpan0 name lowpan0 type lowpan | |
| 105 | +3. Set MAC (if needs): | |
| 106 | + # ip link set lowpan0 address de:ad:be:ef:ca:fe:ba:be | |
| 107 | +4. Bring up 'lowpan0' interface | |
| @@ -539,12 +539,14 @@ static int if_getconfig(char *ifname) · 538 unmodified lines | ||
| 539 | 539 | metric = 0; |
| 540 | 540 | } else |
| 541 | 541 | metric = ifr.ifr_metric; |
| 542 | + printf("The result of SIOCGIFMETRIC is %d\n", metric); | |
| 542 | 543 | |
| 543 | 544 | strcpy(ifr.ifr_name, ifname); |
| 544 | 545 | if (ioctl(skfd, SIOCGIFMTU, &ifr) < 0) |
| 545 | 546 | mtu = 0; |
| 546 | 547 | else |
| 547 | 548 | mtu = ifr.ifr_mtu; |
| 549 | + printf("The result of SIOCGIFMTU is %d\n", mtu); | |
| 548 | 550 | |
| 549 | 551 | strcpy(ifr.ifr_name, ifname); |
| 550 | 552 | if (ioctl(skfd, SIOCGIFDSTADDR, &ifr) < 0) { |
| @@ -31,6 +31,16 @@ neigh/default/gc_thresh3 - INTEGER · 30 unmodified lines | ||
| 31 | 31 | when using large numbers of interfaces and when communicating |
| 32 | 32 | with large numbers of directly-connected peers. |
| 33 | 33 | |
| 34 | +neigh/default/unres_qlen_bytes - INTEGER | |
| 35 | + The maximum number of bytes which may be used by packets | |
| 36 | + queued for each unresolved address by other network layers. | |
| 37 | + (added in linux 3.3) | |
| 38 | + | |
| 39 | +neigh/default/unres_qlen - INTEGER | |
| 40 | + The maximum number of packets which may be queued for each | |
| 41 | + unresolved address by other network layers. | |
| 42 | + (deprecated in linux 3.3) : use unres_qlen_bytes instead. | |
| 43 | + | |
| 34 | 44 | mtu_expires - INTEGER |
| 35 | 45 | Time, in seconds, that cached PMTU information is kept. |
| 36 | 46 | |
| @@ -165,6 +175,9 @@ tcp_congestion_control - STRING · 128 unmodified lines | ||
| 165 | 175 | connections. The algorithm "reno" is always available, but |
| 166 | 176 | additional choices may be available based on kernel configuration. |
| 167 | 177 | Default is set as part of kernel configuration. |
| 178 | + For passive connections, the listener congestion control choice | |
| 179 | + is inherited. | |
| 180 | + [see setsockopt(listenfd, SOL_TCP, TCP_CONGESTION, "name" ...) ] | |
| 168 | 181 | |
| 169 | 182 | tcp_cookie_size - INTEGER |
| 170 | 183 | Default size of TCP Cookie Transactions (TCPCT) option, that may be |
| @@ -0,0 +1,195 @@ | ||
| 1 | +Open vSwitch datapath developer documentation | |
| 2 | +============================================= | |
| 3 | + | |
| 4 | +The Open vSwitch kernel module allows flexible userspace control over | |
| 5 | +flow-level packet processing on selected network devices. It can be | |
| 6 | +used to implement a plain Ethernet switch, network device bonding, | |
| 7 | +VLAN processing, network access control, flow-based network control, | |
| 8 | +and so on. | |
| 9 | + | |
| 10 | +The kernel module implements multiple "datapaths" (analogous to | |
| 11 | +bridges), each of which can have multiple "vports" (analogous to ports | |
| 12 | +within a bridge). Each datapath also has associated with it a "flow | |
| 13 | +table" that userspace populates with "flows" that map from keys based | |
| 14 | +on packet headers and metadata to sets of actions. The most common | |
| 15 | +action forwards the packet to another vport; other actions are also | |
| 16 | +implemented. | |
| 17 | + | |
| 18 | +When a packet arrives on a vport, the kernel module processes it by | |
| 19 | +extracting its flow key and looking it up in the flow table. If there | |
| 20 | +is a matching flow, it executes the associated actions. If there is | |
| 21 | +no match, it queues the packet to userspace for processing (as part of | |
| 22 | +its processing, userspace will likely set up a flow to handle further | |
| 23 | +packets of the same type entirely in-kernel). | |
| 24 | + | |
| 25 | + | |
| 26 | +Flow key compatibility | |
| 27 | +---------------------- | |
| 28 | + | |
| 29 | +Network protocols evolve over time. New protocols become important | |
| 30 | +and existing protocols lose their prominence. For the Open vSwitch | |
| 31 | +kernel module to remain relevant, it must be possible for newer | |
| 32 | +versions to parse additional protocols as part of the flow key. It | |
| 33 | +might even be desirable, someday, to drop support for parsing | |
| 34 | +protocols that have become obsolete. Therefore, the Netlink interface | |
| 35 | +to Open vSwitch is designed to allow carefully written userspace | |
| 36 | +applications to work with any version of the flow key, past or future. | |
| 37 | + | |
| 38 | +To support this forward and backward compatibility, whenever the | |
| 39 | +kernel module passes a packet to userspace, it also passes along the | |
| 40 | +flow key that it parsed from the packet. Userspace then extracts its | |
| 41 | +own notion of a flow key from the packet and compares it against the | |
| 42 | +kernel-provided version: | |
| 43 | + | |
| 44 | + - If userspace's notion of the flow key for the packet matches the | |
| 45 | + kernel's, then nothing special is necessary. | |
| 46 | + | |
| 47 | + - If the kernel's flow key includes more fields than the userspace | |
| 48 | + version of the flow key, for example if the kernel decoded IPv6 | |
| 49 | + headers but userspace stopped at the Ethernet type (because it | |
| 50 | + does not understand IPv6), then again nothing special is | |
| 51 | + necessary. Userspace can still set up a flow in the usual way, | |
| 52 | + as long as it uses the kernel-provided flow key to do it. | |
| 53 | + | |
| 54 | + - If the userspace flow key includes more fields than the | |
| 55 | + kernel's, for example if userspace decoded an IPv6 header but | |
| 56 | + the kernel stopped at the Ethernet type, then userspace can | |
| 57 | + forward the packet manually, without setting up a flow in the | |
| 58 | + kernel. This case is bad for performance because every packet | |
| 59 | + that the kernel considers part of the flow must go to userspace, | |
| 60 | + but the forwarding behavior is correct. (If userspace can | |
| 61 | + determine that the values of the extra fields would not affect | |
| 62 | + forwarding behavior, then it could set up a flow anyway.) | |
| 63 | + | |
| 64 | +How flow keys evolve over time is important to making this work, so | |
| 65 | +the following sections go into detail. | |
| 66 | + | |
| 67 | + | |
| 68 | +Flow key format | |
| 69 | +--------------- | |
| 70 | + | |
| 71 | +A flow key is passed over a Netlink socket as a sequence of Netlink | |
| 72 | +attributes. Some attributes represent packet metadata, defined as any | |
| 73 | +information about a packet that cannot be extracted from the packet | |
| 74 | +itself, e.g. the vport on which the packet was received. Most | |
| 75 | +attributes, however, are extracted from headers within the packet, | |
| 76 | +e.g. source and destination addresses from Ethernet, IP, or TCP | |
| 77 | +headers. | |
| 78 | + | |
| 79 | +The <linux/openvswitch.h> header file defines the exact format of the | |
| 80 | +flow key attributes. For informal explanatory purposes here, we write | |
| 81 | +them as comma-separated strings, with parentheses indicating arguments | |
| 82 | +and nesting. For example, the following could represent a flow key | |
| 83 | +corresponding to a TCP packet that arrived on vport 1: | |
| 84 | + | |
| 85 | + in_port(1), eth(src=e0:91:f5:21:d0:b2, dst=00:02:e3:0f:80:a4), | |
| 86 | + eth_type(0x0800), ipv4(src=172.16.0.20, dst=172.18.0.52, proto=17, tos=0, | |
| 87 | + frag=no), tcp(src=49163, dst=80) | |
| 88 | + | |
| 89 | +Often we ellipsize arguments not important to the discussion, e.g.: | |
| 90 | + | |
| 91 | + in_port(1), eth(...), eth_type(0x0800), ipv4(...), tcp(...) | |
| 92 | + | |
| 93 | + | |
| 94 | +Basic rule for evolving flow keys | |
| 95 | +--------------------------------- | |
| 96 | + | |
| 97 | +Some care is needed to really maintain forward and backward | |
| 98 | +compatibility for applications that follow the rules listed under | |
| 99 | +"Flow key compatibility" above. | |
| 100 | + | |
| 101 | +The basic rule is obvious: | |
| 102 | + | |
| 103 | + ------------------------------------------------------------------ | |
| 104 | + New network protocol support must only supplement existing flow | |
| 105 | + key attributes. It must not change the meaning of already defined | |
| 106 | + flow key attributes. | |
| 107 | + ------------------------------------------------------------------ | |
| 108 | + | |
| 109 | +This rule does have less-obvious consequences so it is worth working | |
| 110 | +through a few examples. Suppose, for example, that the kernel module | |
| 111 | +did not already implement VLAN parsing. Instead, it just interpreted | |
| 112 | +the 802.1Q TPID (0x8100) as the Ethertype then stopped parsing the | |
| 113 | +packet. The flow key for any packet with an 802.1Q header would look | |
| 114 | +essentially like this, ignoring metadata: | |
| 115 | + | |
| 116 | + eth(...), eth_type(0x8100) | |
| 117 | + | |
| 118 | +Naively, to add VLAN support, it makes sense to add a new "vlan" flow | |
| 119 | +key attribute to contain the VLAN tag, then continue to decode the | |
| 120 | +encapsulated headers beyond the VLAN tag using the existing field | |
| 121 | +definitions. With this change, an TCP packet in VLAN 10 would have a | |
| 122 | +flow key much like this: | |
| 123 | + | |
| 124 | + eth(...), vlan(vid=10, pcp=0), eth_type(0x0800), ip(proto=6, ...), tcp(...) | |
| 125 | + | |
| 126 | +But this change would negatively affect a userspace application that | |
| 127 | +has not been updated to understand the new "vlan" flow key attribute. | |
| 128 | +The application could, following the flow compatibility rules above, | |
| 129 | +ignore the "vlan" attribute that it does not understand and therefore | |
| 130 | +assume that the flow contained IP packets. This is a bad assumption | |
| 131 | +(the flow only contains IP packets if one parses and skips over the | |
| 132 | +802.1Q header) and it could cause the application's behavior to change | |
| 133 | +across kernel versions even though it follows the compatibility rules. | |
| 134 | + | |
| 135 | +The solution is to use a set of nested attributes. This is, for | |
| 136 | +example, why 802.1Q support uses nested attributes. A TCP packet in | |
| 137 | +VLAN 10 is actually expressed as: | |
| 138 | + | |
| 139 | + eth(...), eth_type(0x8100), vlan(vid=10, pcp=0), encap(eth_type(0x0800), | |
| 140 | + ip(proto=6, ...), tcp(...))) | |
| 141 | + | |
| 142 | +Notice how the "eth_type", "ip", and "tcp" flow key attributes are | |
| 143 | +nested inside the "encap" attribute. Thus, an application that does | |
| 144 | +not understand the "vlan" key will not see either of those attributes | |
| 145 | +and therefore will not misinterpret them. (Also, the outer eth_type | |
| 146 | +is still 0x8100, not changed to 0x0800.) | |
| 147 | + | |
| 148 | +Handling malformed packets | |
| 149 | +-------------------------- | |
| 150 | + | |
| 151 | +Don't drop packets in the kernel for malformed protocol headers, bad | |
| 152 | +checksums, etc. This would prevent userspace from implementing a | |
| 153 | +simple Ethernet switch that forwards every packet. | |
| 154 | + | |
| 155 | +Instead, in such a case, include an attribute with "empty" content. | |
| 156 | +It doesn't matter if the empty content could be valid protocol values, | |
| 157 | +as long as those values are rarely seen in practice, because userspace | |
| 158 | +can always forward all packets with those values to userspace and | |
| 159 | +handle them individually. | |
| 160 | + | |
| 161 | +For example, consider a packet that contains an IP header that | |
| 162 | +indicates protocol 6 for TCP, but which is truncated just after the IP | |
| 163 | +header, so that the TCP header is missing. The flow key for this | |
| 164 | +packet would include a tcp attribute with all-zero src and dst, like | |
| 165 | +this: | |
| 166 | + | |
| 167 | + eth(...), eth_type(0x0800), ip(proto=6, ...), tcp(src=0, dst=0) | |
| 168 | + | |
| 169 | +As another example, consider a packet with an Ethernet type of 0x8100, | |
| 170 | +indicating that a VLAN TCI should follow, but which is truncated just | |
| 171 | +after the Ethernet type. The flow key for this packet would include | |
| 172 | +an all-zero-bits vlan and an empty encap attribute, like this: | |
| 173 | + | |
| 174 | + eth(...), eth_type(0x8100), vlan(0), encap() | |
| 175 | + | |
| 176 | +Unlike a TCP packet with source and destination ports 0, an | |
| 177 | +all-zero-bits VLAN TCI is not that rare, so the CFI bit (aka | |
| 178 | +VLAN_TAG_PRESENT inside the kernel) is ordinarily set in a vlan | |
| 179 | +attribute expressly to allow this situation to be distinguished. | |
| 180 | +Thus, the flow key in this second example unambiguously indicates a | |
| 181 | +missing or malformed VLAN TCI. | |
| 182 | + | |
| 183 | +Other rules | |
| 184 | +----------- | |
| 185 | + | |
| 186 | +The other rules for flow keys are much less subtle: | |
| 187 | + | |
| 188 | + - Duplicate attributes are not allowed at a given nesting level. | |
| 189 | + | |
| 190 | + - Ordering of attributes is not significant. | |
| 191 | + | |
| 192 | + - When the kernel sends a given flow key to userspace, it always | |
| 193 | + composes it the same way. This allows userspace to hash and | |
| 194 | + compare entire flow keys that it may not be able to fully | |
| 195 | + interpret. | |
| @@ -155,7 +155,7 @@ As capture, each frame contains two parts: · 154 unmodified lines | ||
| 155 | 155 | |
| 156 | 156 | /* fill sockaddr_ll struct to prepare binding */ |
| 157 | 157 | my_addr.sll_family = AF_PACKET; |
| 158 | − my_addr.sll_protocol = ETH_P_ALL; | |
| 158 | + my_addr.sll_protocol = htons(ETH_P_ALL); | |
| 159 | 159 | my_addr.sll_ifindex = s_ifr.ifr_ifindex; |
| 160 | 160 | |
| 161 | 161 | /* bind socket to eth0 */ |
| @@ -208,7 +208,7 @@ The counter in rps_dev_flow_table values records the length of the current · 207 unmodified lines | ||
| 208 | 208 | CPU's backlog when a packet in this flow was last enqueued. Each backlog |
| 209 | 209 | queue has a head counter that is incremented on dequeue. A tail counter |
| 210 | 210 | is computed as head counter + queue length. In other words, the counter |
| 211 | −in rps_dev_flow_table[i] records the last element in flow i that has | |
| 211 | +in rps_dev_flow[i] records the last element in flow i that has | |
| 212 | 212 | been enqueued onto the currently designated CPU for flow i (of course, |
| 213 | 213 | entry i is actually selected by hash and multiple flows may hash to the |
| 214 | 214 | same entry i). |
| @@ -224,7 +224,7 @@ following is true: · 9 unmodified lines | ||
| 224 | 224 | |
| 225 | 225 | - The current CPU's queue head counter >= the recorded tail counter |
| 226 | 226 | value in rps_dev_flow[i] |
| 227 | −- The current CPU is unset (equal to NR_CPUS) | |
| 227 | +- The current CPU is unset (equal to RPS_NO_CPU) | |
| 228 | 228 | - The current CPU is offline |
| 229 | 229 | |
| 230 | 230 | After this check, the packet is sent to the (possibly updated) current |
| @@ -235,7 +235,7 @@ CPU. · 4 unmodified lines | ||
| 235 | 235 | |
| 236 | 236 | ==== RFS Configuration |
| 237 | 237 | |
| 238 | −RFS is only available if the kconfig symbol CONFIG_RFS is enabled (on | |
| 238 | +RFS is only available if the kconfig symbol CONFIG_RPS is enabled (on | |
| 239 | 239 | by default for SMP). The functionality remains disabled until explicitly |
| 240 | 240 | configured. The number of entries in the global flow table is set through: |
| 241 | 241 | |
| @@ -258,7 +258,7 @@ For a single queue device, the rps_flow_cnt value for the single queue · 16 unmodified lines | ||
| 258 | 258 | would normally be configured to the same value as rps_sock_flow_entries. |
| 259 | 259 | For a multi-queue device, the rps_flow_cnt for each queue might be |
| 260 | 260 | configured as rps_sock_flow_entries / N, where N is the number of |
| 261 | −queues. So for instance, if rps_flow_entries is set to 32768 and there | |
| 261 | +queues. So for instance, if rps_sock_flow_entries is set to 32768 and there | |
| 262 | 262 | are 16 configured receive queues, rps_flow_cnt for each queue might be |
| 263 | 263 | configured as 2048. |
| 264 | 264 | |
| @@ -4,14 +4,16 @@ Copyright (C) 2007-2010 STMicroelectronics Ltd · 3 unmodified lines | ||
| 4 | 4 | Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> |
| 5 | 5 | |
| 6 | 6 | This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers |
| 7 | −(Synopsys IP blocks); it has been fully tested on STLinux platforms. | |
| 7 | +(Synopsys IP blocks). | |
| 8 | 8 | |
| 9 | 9 | Currently this network device driver is for all STM embedded MAC/GMAC |
| 10 | −(i.e. 7xxx/5xxx SoCs) and it's known working on other platforms i.e. ARM SPEAr. | |
| 10 | +(i.e. 7xxx/5xxx SoCs), SPEAr (arm), Loongson1B (mips) and XLINX XC2V3000 | |
| 11 | +FF1152AMT0221 D1215994A VIRTEX FPGA board. | |
| 11 | 12 | |
| 12 | −DWC Ether MAC 10/100/1000 Universal version 3.41a and DWC Ether MAC 10/100 | |
| 13 | −Universal version 4.0 have been used for developing the first code | |
| 14 | −implementation. | |
| 13 | +DWC Ether MAC 10/100/1000 Universal version 3.60a (and older) and DWC Ether MAC 10/100 | |
| 14 | +Universal version 4.0 have been used for developing this driver. | |
| 15 | + | |
| 16 | +This driver supports both the platform bus and PCI. | |
| 15 | 17 | |
| 16 | 18 | Please, for more information also visit: www.stlinux.com |
| 17 | 19 | |
| @@ -277,5 +279,5 @@ In fact, these can generate an huge amount of debug messages. · 259 unmodified lines | ||
| 277 | 279 | |
| 278 | 280 | 6) TODO: |
| 279 | 281 | o XGMAC is not supported. |
| 280 | − o Review the timer optimisation code to use an embedded device that will be | |
| 281 | − available in new chip generations. | |
| 282 | + o Add the EEE - Energy Efficient Ethernet | |
| 283 | + o Add the PTP - precision time protocol | |
| @@ -0,0 +1,2 @@ | ||
| 1 | +Team devices are driven from userspace via libteam library which is here: | |
| 2 | + https://github.com/jpirko/libteam | |
| @@ -7,12 +7,9 @@ This subsystem deals with: · 6 unmodified lines | ||
| 7 | 7 | |
| 8 | 8 | - Multiplexing of pins, pads, fingers (etc) see below for details |
| 9 | 9 | |
| 10 | −The intention is to also deal with: | |
| 11 | − | |
| 12 | −- Software-controlled biasing and driving mode specific pins, such as | |
| 13 | − pull-up/down, open drain etc, load capacitance configuration when controlled | |
| 14 | − by software, etc. | |
| 15 | − | |
| 10 | +- Configuration of pins, pads, fingers (etc), such as software-controlled | |
| 11 | + biasing and driving mode specific pins, such as pull-up/down, open drain, | |
| 12 | + load capacitance etc. | |
| 16 | 13 | |
| 17 | 14 | Top-level interface |
| 18 | 15 | =================== |
| @@ -32,7 +29,7 @@ Definition of PIN: · 13 unmodified lines | ||
| 32 | 29 | be sparse - i.e. there may be gaps in the space with numbers where no |
| 33 | 30 | pin exists. |
| 34 | 31 | |
| 35 | −When a PIN CONTROLLER is instatiated, it will register a descriptor to the | |
| 32 | +When a PIN CONTROLLER is instantiated, it will register a descriptor to the | |
| 36 | 33 | pin control framework, and this descriptor contains an array of pin descriptors |
| 37 | 34 | describing the pins handled by this specific pin controller. |
| 38 | 35 | |
| @@ -61,14 +58,14 @@ this in our driver: · 22 unmodified lines | ||
| 61 | 58 | |
| 62 | 59 | #include <linux/pinctrl/pinctrl.h> |
| 63 | 60 | |
| 64 | −const struct pinctrl_pin_desc __refdata foo_pins[] = { | |
| 65 | − PINCTRL_PIN(0, "A1"), | |
| 66 | − PINCTRL_PIN(1, "A2"), | |
| 67 | − PINCTRL_PIN(2, "A3"), | |
| 61 | +const struct pinctrl_pin_desc foo_pins[] = { | |
| 62 | + PINCTRL_PIN(0, "A8"), | |
| 63 | + PINCTRL_PIN(1, "B8"), | |
| 64 | + PINCTRL_PIN(2, "C8"), | |
| 68 | 65 | ... |
| 69 | − PINCTRL_PIN(61, "H6"), | |
| 70 | − PINCTRL_PIN(62, "H7"), | |
| 71 | − PINCTRL_PIN(63, "H8"), | |
| 66 | + PINCTRL_PIN(61, "F1"), | |
| 67 | + PINCTRL_PIN(62, "G1"), | |
| 68 | + PINCTRL_PIN(63, "H1"), | |
| 72 | 69 | }; |
| 73 | 70 | |
| 74 | 71 | static struct pinctrl_desc foo_desc = { |
| @@ -88,11 +85,16 @@ int __init foo_probe(void) · 13 unmodified lines | ||
| 88 | 85 | pr_err("could not register foo pin driver\n"); |
| 89 | 86 | } |
| 90 | 87 | |
| 88 | +To enable the pinctrl subsystem and the subgroups for PINMUX and PINCONF and | |
| 89 | +selected drivers, you need to select them from your machine's Kconfig entry, | |
| 90 | +since these are so tightly integrated with the machines they are used on. | |
| 91 | +See for example arch/arm/mach-u300/Kconfig for an example. | |
| 92 | + | |
| 91 | 93 | Pins usually have fancier names than this. You can find these in the dataheet |
| 92 | 94 | for your chip. Notice that the core pinctrl.h file provides a fancy macro |
| 93 | 95 | called PINCTRL_PIN() to create the struct entries. As you can see I enumerated |
| 94 | −the pins from 0 in the upper left corner to 63 in the lower right corner, | |
| 95 | −this enumeration was arbitrarily chosen, in practice you need to think | |
| 96 | +the pins from 0 in the upper left corner to 63 in the lower right corner. | |
| 97 | +This enumeration was arbitrarily chosen, in practice you need to think | |
| 96 | 98 | through your numbering system so that it matches the layout of registers |
| 97 | 99 | and such things in your driver, or the code may become complicated. You must |
| 98 | 100 | also consider matching of offsets to the GPIO ranges that may be handled by |
| @@ -133,8 +135,8 @@ struct foo_group { · 34 unmodified lines | ||
| 133 | 135 | const unsigned num_pins; |
| 134 | 136 | }; |
| 135 | 137 | |
| 136 | −static unsigned int spi0_pins[] = { 0, 8, 16, 24 }; | |
| 137 | −static unsigned int i2c0_pins[] = { 24, 25 }; | |
| 138 | +static const unsigned int spi0_pins[] = { 0, 8, 16, 24 }; | |
| 139 | +static const unsigned int i2c0_pins[] = { 24, 25 }; | |
| 138 | 140 | |
| 139 | 141 | static const struct foo_group foo_groups[] = { |
| 140 | 142 | { |
| @@ -193,6 +195,88 @@ structure, for example specific register ranges associated with each group · 52 unmodified lines | ||
| 193 | 195 | and so on. |
| 194 | 196 | |
| 195 | 197 | |
| 198 | +Pin configuration | |
| 199 | +================= | |
| 200 | + | |
| 201 | +Pins can sometimes be software-configured in an various ways, mostly related | |
| 202 | +to their electronic properties when used as inputs or outputs. For example you | |
| 203 | +may be able to make an output pin high impedance, or "tristate" meaning it is | |
| 204 | +effectively disconnected. You may be able to connect an input pin to VDD or GND | |
| 205 | +using a certain resistor value - pull up and pull down - so that the pin has a | |
| 206 | +stable value when nothing is driving the rail it is connected to, or when it's | |
| 207 | +unconnected. | |
| 208 | + | |
| 209 | +For example, a platform may do this: | |
| 210 | + | |
| 211 | +ret = pin_config_set("foo-dev", "FOO_GPIO_PIN", PLATFORM_X_PULL_UP); | |
| 212 | + | |
| 213 | +To pull up a pin to VDD. The pin configuration driver implements callbacks for | |
| 214 | +changing pin configuration in the pin controller ops like this: | |
| 215 | + | |
| 216 | +#include <linux/pinctrl/pinctrl.h> | |
| 217 | +#include <linux/pinctrl/pinconf.h> | |
| 218 | +#include "platform_x_pindefs.h" | |
| 219 | + | |
| 220 | +static int foo_pin_config_get(struct pinctrl_dev *pctldev, | |
| 221 | + unsigned offset, | |
| 222 | + unsigned long *config) | |
| 223 | +{ | |
| 224 | + struct my_conftype conf; | |
| 225 | + | |
| 226 | + ... Find setting for pin @ offset ... | |
| 227 | + | |
| 228 | + *config = (unsigned long) conf; | |
| 229 | +} | |
| 230 | + | |
| 231 | +static int foo_pin_config_set(struct pinctrl_dev *pctldev, | |
| 232 | + unsigned offset, | |
| 233 | + unsigned long config) | |
| 234 | +{ | |
| 235 | + struct my_conftype *conf = (struct my_conftype *) config; | |
| 236 | + | |
| 237 | + switch (conf) { | |
| 238 | + case PLATFORM_X_PULL_UP: | |
| 239 | + ... | |
| 240 | + } | |
| 241 | + } | |
| 242 | +} | |
| 243 | + | |
| 244 | +static int foo_pin_config_group_get (struct pinctrl_dev *pctldev, | |
| 245 | + unsigned selector, | |
| 246 | + unsigned long *config) | |
| 247 | +{ | |
| 248 | + ... | |
| 249 | +} | |
| 250 | + | |
| 251 | +static int foo_pin_config_group_set (struct pinctrl_dev *pctldev, | |
| 252 | + unsigned selector, | |
| 253 | + unsigned long config) | |
| 254 | +{ | |
| 255 | + ... | |
| 256 | +} | |
| 257 | + | |
| 258 | +static struct pinconf_ops foo_pconf_ops = { | |
| 259 | + .pin_config_get = foo_pin_config_get, | |
| 260 | + .pin_config_set = foo_pin_config_set, | |
| 261 | + .pin_config_group_get = foo_pin_config_group_get, | |
| 262 | + .pin_config_group_set = foo_pin_config_group_set, | |
| 263 | +}; | |
| 264 | + | |
| 265 | +/* Pin config operations are handled by some pin controller */ | |
| 266 | +static struct pinctrl_desc foo_desc = { | |
| 267 | + ... | |
| 268 | + .confops = &foo_pconf_ops, | |
| 269 | +}; | |
| 270 | + | |
| 271 | +Since some controllers have special logic for handling entire groups of pins | |
| 272 | +they can exploit the special whole-group pin control function. The | |
| 273 | +pin_config_group_set() callback is allowed to return the error code -EAGAIN, | |
| 274 | +for groups it does not want to handle, or if it just wants to do some | |
| 275 | +group-level handling and then fall through to iterate over all pins, in which | |
| 276 | +case each individual pin will be treated by separate pin_config_set() calls as | |
| 277 | +well. | |
| 278 | + | |
| 279 | + | |
| 196 | 280 | Interaction with the GPIO subsystem |
| 197 | 281 | =================================== |
| 198 | 282 | |
| @@ -214,19 +298,20 @@ static struct pinctrl_gpio_range gpio_range_a = { · 15 unmodified lines | ||
| 214 | 298 | .name = "chip a", |
| 215 | 299 | .id = 0, |
| 216 | 300 | .base = 32, |
| 301 | + .pin_base = 32, | |
| 217 | 302 | .npins = 16, |
| 218 | 303 | .gc = &chip_a; |
| 219 | 304 | }; |
| 220 | 305 | |
| 221 | −static struct pinctrl_gpio_range gpio_range_a = { | |
| 306 | +static struct pinctrl_gpio_range gpio_range_b = { | |
| 222 | 307 | .name = "chip b", |
| 223 | 308 | .id = 0, |
| 224 | 309 | .base = 48, |
| 310 | + .pin_base = 64, | |
| 225 | 311 | .npins = 8, |
| 226 | 312 | .gc = &chip_b; |
| 227 | 313 | }; |
| 228 | 314 | |
| 229 | − | |
| 230 | 315 | { |
| 231 | 316 | struct pinctrl_dev *pctl; |
| 232 | 317 | ... |
| @@ -235,42 +320,39 @@ static struct pinctrl_gpio_range gpio_range_a = { · 2 unmodified lines | ||
| 235 | 320 | } |
| 236 | 321 | |
| 237 | 322 | So this complex system has one pin controller handling two different |
| 238 | −GPIO chips. Chip a has 16 pins and chip b has 8 pins. They are mapped in | |
| 239 | −the global GPIO pin space at: | |
| 323 | +GPIO chips. "chip a" has 16 pins and "chip b" has 8 pins. The "chip a" and | |
| 324 | +"chip b" have different .pin_base, which means a start pin number of the | |
| 325 | +GPIO range. | |
| 326 | + | |
| 327 | +The GPIO range of "chip a" starts from the GPIO base of 32 and actual | |
| 328 | +pin range also starts from 32. However "chip b" has different starting | |
| 329 | +offset for the GPIO range and pin range. The GPIO range of "chip b" starts | |
| 330 | +from GPIO number 48, while the pin range of "chip b" starts from 64. | |
| 331 | + | |
| 332 | +We can convert a gpio number to actual pin number using this "pin_base". | |
| 333 | +They are mapped in the global GPIO pin space at: | |
| 240 | 334 | |
| 241 | −chip a: [32 .. 47] | |
| 242 | −chip b: [48 .. 55] | |
| 335 | +chip a: | |
| 336 | + - GPIO range : [32 .. 47] | |
| 337 | + - pin range : [32 .. 47] | |
| 338 | +chip b: | |
| 339 | + - GPIO range : [48 .. 55] | |
| 340 | + - pin range : [64 .. 71] | |
| 243 | 341 | |
| 244 | 342 | When GPIO-specific functions in the pin control subsystem are called, these |
| 245 | −ranges will be used to look up the apropriate pin controller by inspecting | |
| 343 | +ranges will be used to look up the appropriate pin controller by inspecting | |
| 246 | 344 | and matching the pin to the pin ranges across all controllers. When a |
| 247 | 345 | pin controller handling the matching range is found, GPIO-specific functions |
| 248 | 346 | will be called on that specific pin controller. |
| 249 | 347 | |
| 250 | 348 | For all functionalities dealing with pin biasing, pin muxing etc, the pin |
| 251 | 349 | controller subsystem will subtract the range's .base offset from the passed |
| 252 | −in gpio pin number, and pass that on to the pin control driver, so the driver | |
| 253 | −will get an offset into its handled number range. Further it is also passed | |
| 350 | +in gpio number, and add the ranges's .pin_base offset to retrive a pin number. | |
| 351 | +After that, the subsystem passes it on to the pin control driver, so the driver | |
| 352 | +will get an pin number into its handled number range. Further it is also passed | |
| 254 | 353 | the range ID value, so that the pin controller knows which range it should |
| 255 | 354 | deal with. |
| 256 | 355 | |
| 257 | −For example: if a user issues pinctrl_gpio_set_foo(50), the pin control | |
| 258 | −subsystem will find that the second range on this pin controller matches, | |
| 259 | −subtract the base 48 and call the | |
| 260 | −pinctrl_driver_gpio_set_foo(pinctrl, range, 2) where the latter function has | |
| 261 | −this signature: | |
| 262 | − | |
| 263 | −int pinctrl_driver_gpio_set_foo(struct pinctrl_dev *pctldev, | |
| 264 | − struct pinctrl_gpio_range *rangeid, | |
| 265 | − unsigned offset); | |
| 266 | − | |
| 267 | −Now the driver knows that we want to do some GPIO-specific operation on the | |
| 268 | −second GPIO range handled by "chip b", at offset 2 in that specific range. | |
| 269 | − | |
| 270 | −(If the GPIO subsystem is ever refactored to use a local per-GPIO controller | |
| 271 | −pin space, this mapping will need to be augmented accordingly.) | |
| 272 | − | |
| 273 | − | |
| 274 | 356 | PINMUX interfaces |
| 275 | 357 | ================= |
| 276 | 358 | |
| @@ -438,7 +520,7 @@ you. Define enumerators only for the pins you can control if that makes sense. · 161 unmodified lines | ||
| 438 | 520 | |
| 439 | 521 | Assumptions: |
| 440 | 522 | |
| 441 | −We assume that the number possible function maps to pin groups is limited by | |
| 523 | +We assume that the number of possible function maps to pin groups is limited by | |
| 442 | 524 | the hardware. I.e. we assume that there is no system where any function can be |
| 443 | 525 | mapped to any pin, like in a phone exchange. So the available pins groups for |
| 444 | 526 | a certain function will be limited to a few choices (say up to eight or so), |
| @@ -585,7 +667,7 @@ int foo_list_funcs(struct pinctrl_dev *pctldev, unsigned selector) · 140 unmodified lines | ||
| 585 | 667 | |
| 586 | 668 | const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector) |
| 587 | 669 | { |
| 588 | − return myfuncs[selector].name; | |
| 670 | + return foo_functions[selector].name; | |
| 589 | 671 | } |
| 590 | 672 | |
| 591 | 673 | static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector, |
| @@ -600,16 +682,16 @@ static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector, · 8 unmodified lines | ||
| 600 | 682 | int foo_enable(struct pinctrl_dev *pctldev, unsigned selector, |
| 601 | 683 | unsigned group) |
| 602 | 684 | { |
| 603 | − u8 regbit = (1 << group); | |
| 685 | + u8 regbit = (1 << selector + group); | |
| 604 | 686 | |
| 605 | 687 | writeb((readb(MUX)|regbit), MUX) |
| 606 | 688 | return 0; |
| 607 | 689 | } |
| 608 | 690 | |
| 609 | −int foo_disable(struct pinctrl_dev *pctldev, unsigned selector, | |
| 691 | +void foo_disable(struct pinctrl_dev *pctldev, unsigned selector, | |
| 610 | 692 | unsigned group) |
| 611 | 693 | { |
| 612 | − u8 regbit = (1 << group); | |
| 694 | + u8 regbit = (1 << selector + group); | |
| 613 | 695 | |
| 614 | 696 | writeb((readb(MUX) & ~(regbit)), MUX) |
| 615 | 697 | return 0; |
| @@ -647,6 +729,17 @@ All the above functions are mandatory to implement for a pinmux driver. · 31 unmodified lines | ||
| 647 | 729 | Pinmux interaction with the GPIO subsystem |
| 648 | 730 | ========================================== |
| 649 | 731 | |
| 732 | +The public pinmux API contains two functions named pinmux_request_gpio() | |
| 733 | +and pinmux_free_gpio(). These two functions shall *ONLY* be called from | |
| 734 | +gpiolib-based drivers as part of their gpio_request() and | |
| 735 | +gpio_free() semantics. Likewise the pinmux_gpio_direction_[input|output] | |
| 736 | +shall only be called from within respective gpio_direction_[input|output] | |
| 737 | +gpiolib implementation. | |
| 738 | + | |
| 739 | +NOTE that platforms and individual drivers shall *NOT* request GPIO pins to be | |
| 740 | +muxed in. Instead, implement a proper gpiolib driver and have that driver | |
| 741 | +request proper muxing for its pins. | |
| 742 | + | |
| 650 | 743 | The function list could become long, especially if you can convert every |
| 651 | 744 | individual pin into a GPIO pin independent of any other pins, and then try |
| 652 | 745 | the approach to define every pin as a function. |
| @@ -654,19 +747,24 @@ the approach to define every pin as a function. · 1 unmodified line | ||
| 654 | 747 | In this case, the function array would become 64 entries for each GPIO |
| 655 | 748 | setting and then the device functions. |
| 656 | 749 | |
| 657 | −For this reason there is an additional function a pinmux driver can implement | |
| 658 | −to enable only GPIO on an individual pin: .gpio_request_enable(). The same | |
| 659 | −.free() function as for other functions is assumed to be usable also for | |
| 660 | −GPIO pins. | |
| 750 | +For this reason there are two functions a pinmux driver can implement | |
| 751 | +to enable only GPIO on an individual pin: .gpio_request_enable() and | |
| 752 | +.gpio_disable_free(). | |
| 661 | 753 | |
| 662 | 754 | This function will pass in the affected GPIO range identified by the pin |
| 663 | 755 | controller core, so you know which GPIO pins are being affected by the request |
| 664 | 756 | operation. |
| 665 | 757 | |
| 666 | −Alternatively it is fully allowed to use named functions for each GPIO | |
| 667 | −pin, the pinmux_request_gpio() will attempt to obtain the function "gpioN" | |
| 668 | −where "N" is the global GPIO pin number if no special GPIO-handler is | |
| 669 | −registered. | |
| 758 | +If your driver needs to have an indication from the framework of whether the | |
| 759 | +GPIO pin shall be used for input or output you can implement the | |
| 760 | +.gpio_set_direction() function. As described this shall be called from the | |
| 761 | +gpiolib driver and the affected GPIO range, pin offset and desired direction | |
| 762 | +will be passed along to this function. | |
| 763 | + | |
| 764 | +Alternatively to using these special functions, it is fully allowed to use | |
| 765 | +named functions for each GPIO pin, the pinmux_request_gpio() will attempt to | |
| 766 | +obtain the function "gpioN" where "N" is the global GPIO pin number if no | |
| 767 | +special GPIO-handler is registered. | |
| 670 | 768 | |
| 671 | 769 | |
| 672 | 770 | Pinmux board/machine configuration |
| @@ -683,19 +781,19 @@ spi on the second function mapping: · 10 unmodified lines | ||
| 683 | 781 | |
| 684 | 782 | #include <linux/pinctrl/machine.h> |
| 685 | 783 | |
| 686 | −static struct pinmux_map pmx_mapping[] = { | |
| 784 | +static const struct pinmux_map __initdata pmx_mapping[] = { | |
| 687 | 785 | { |
| 688 | − .ctrl_dev_name = "pinctrl.0", | |
| 786 | + .ctrl_dev_name = "pinctrl-foo", | |
| 689 | 787 | .function = "spi0", |
| 690 | 788 | .dev_name = "foo-spi.0", |
| 691 | 789 | }, |
| 692 | 790 | { |
| 693 | − .ctrl_dev_name = "pinctrl.0", | |
| 791 | + .ctrl_dev_name = "pinctrl-foo", | |
| 694 | 792 | .function = "i2c0", |
| 695 | 793 | .dev_name = "foo-i2c.0", |
| 696 | 794 | }, |
| 697 | 795 | { |
| 698 | − .ctrl_dev_name = "pinctrl.0", | |
| 796 | + .ctrl_dev_name = "pinctrl-foo", | |
| 699 | 797 | .function = "mmc0", |
| 700 | 798 | .dev_name = "foo-mmc.0", |
| 701 | 799 | }, |
| @@ -714,14 +812,14 @@ for example if they are not yet instantiated or cumbersome to obtain. · 12 unmodified lines | ||
| 714 | 812 | |
| 715 | 813 | You register this pinmux mapping to the pinmux subsystem by simply: |
| 716 | 814 | |
| 717 | − ret = pinmux_register_mappings(&pmx_mapping, ARRAY_SIZE(pmx_mapping)); | |
| 815 | + ret = pinmux_register_mappings(pmx_mapping, ARRAY_SIZE(pmx_mapping)); | |
| 718 | 816 | |
| 719 | 817 | Since the above construct is pretty common there is a helper macro to make |
| 720 | −it even more compact which assumes you want to use pinctrl.0 and position | |
| 818 | +it even more compact which assumes you want to use pinctrl-foo and position | |
| 721 | 819 | 0 for mapping, for example: |
| 722 | 820 | |
| 723 | −static struct pinmux_map pmx_mapping[] = { | |
| 724 | − PINMUX_MAP_PRIMARY("I2CMAP", "i2c0", "foo-i2c.0"), | |
| 821 | +static struct pinmux_map __initdata pmx_mapping[] = { | |
| 822 | + PINMUX_MAP("I2CMAP", "pinctrl-foo", "i2c0", "foo-i2c.0"), | |
| 725 | 823 | }; |
| 726 | 824 | |
| 727 | 825 | |
| @@ -734,14 +832,14 @@ As it is possible to map a function to different groups of pins an optional · 6 unmodified lines | ||
| 734 | 832 | ... |
| 735 | 833 | { |
| 736 | 834 | .name = "spi0-pos-A", |
| 737 | − .ctrl_dev_name = "pinctrl.0", | |
| 835 | + .ctrl_dev_name = "pinctrl-foo", | |
| 738 | 836 | .function = "spi0", |
| 739 | 837 | .group = "spi0_0_grp", |
| 740 | 838 | .dev_name = "foo-spi.0", |
| 741 | 839 | }, |
| 742 | 840 | { |
| 743 | 841 | .name = "spi0-pos-B", |
| 744 | − .ctrl_dev_name = "pinctrl.0", | |
| 842 | + .ctrl_dev_name = "pinctrl-foo", | |
| 745 | 843 | .function = "spi0", |
| 746 | 844 | .group = "spi0_1_grp", |
| 747 | 845 | .dev_name = "foo-spi.0", |
| @@ -760,44 +858,44 @@ case), we define a mapping like this: · 12 unmodified lines | ||
| 760 | 858 | ... |
| 761 | 859 | { |
| 762 | 860 | .name "2bit" |
| 763 | − .ctrl_dev_name = "pinctrl.0", | |
| 861 | + .ctrl_dev_name = "pinctrl-foo", | |
| 764 | 862 | .function = "mmc0", |
| 765 | − .group = "mmc0_0_grp", | |
| 863 | + .group = "mmc0_1_grp", | |
| 766 | 864 | .dev_name = "foo-mmc.0", |
| 767 | 865 | }, |
| 768 | 866 | { |
| 769 | 867 | .name "4bit" |
| 770 | − .ctrl_dev_name = "pinctrl.0", | |
| 868 | + .ctrl_dev_name = "pinctrl-foo", | |
| 771 | 869 | .function = "mmc0", |
| 772 | − .group = "mmc0_0_grp", | |
| 870 | + .group = "mmc0_1_grp", | |
| 773 | 871 | .dev_name = "foo-mmc.0", |
| 774 | 872 | }, |
| 775 | 873 | { |
| 776 | 874 | .name "4bit" |
| 777 | − .ctrl_dev_name = "pinctrl.0", | |
| 875 | + .ctrl_dev_name = "pinctrl-foo", | |
| 778 | 876 | .function = "mmc0", |
| 779 | − .group = "mmc0_1_grp", | |
| 877 | + .group = "mmc0_2_grp", | |
| 780 | 878 | .dev_name = "foo-mmc.0", |
| 781 | 879 | }, |
| 782 | 880 | { |
| 783 | 881 | .name "8bit" |
| 784 | − .ctrl_dev_name = "pinctrl.0", | |
| 882 | + .ctrl_dev_name = "pinctrl-foo", | |
| 785 | 883 | .function = "mmc0", |
| 786 | − .group = "mmc0_0_grp", | |
| 884 | + .group = "mmc0_1_grp", | |
| 787 | 885 | .dev_name = "foo-mmc.0", |
| 788 | 886 | }, |
| 789 | 887 | { |
| 790 | 888 | .name "8bit" |
| 791 | − .ctrl_dev_name = "pinctrl.0", | |
| 889 | + .ctrl_dev_name = "pinctrl-foo", | |
| 792 | 890 | .function = "mmc0", |
| 793 | − .group = "mmc0_1_grp", | |
| 891 | + .group = "mmc0_2_grp", | |
| 794 | 892 | .dev_name = "foo-mmc.0", |
| 795 | 893 | }, |
| 796 | 894 | { |
| 797 | 895 | .name "8bit" |
| 798 | − .ctrl_dev_name = "pinctrl.0", | |
| 896 | + .ctrl_dev_name = "pinctrl-foo", | |
| 799 | 897 | .function = "mmc0", |
| 800 | − .group = "mmc0_2_grp", | |
| 898 | + .group = "mmc0_3_grp", | |
| 801 | 899 | .dev_name = "foo-mmc.0", |
| 802 | 900 | }, |
| 803 | 901 | ... |
| @@ -898,7 +996,7 @@ like this: · 94 unmodified lines | ||
| 898 | 996 | |
| 899 | 997 | { |
| 900 | 998 | .name "POWERMAP" |
| 901 | − .ctrl_dev_name = "pinctrl.0", | |
| 999 | + .ctrl_dev_name = "pinctrl-foo", | |
| 902 | 1000 | .function = "power_func", |
| 903 | 1001 | .hog_on_boot = true, |
| 904 | 1002 | }, |
| @@ -0,0 +1,163 @@ | ||
| 1 | +Charger Manager | |
| 2 | + (C) 2011 MyungJoo Ham <myungjoo.ham@samsung.com>, GPL | |
| 3 | + | |
| 4 | +Charger Manager provides in-kernel battery charger management that | |
| 5 | +requires temperature monitoring during suspend-to-RAM state | |
| 6 | +and where each battery may have multiple chargers attached and the userland | |
| 7 | +wants to look at the aggregated information of the multiple chargers. | |
| 8 | + | |
| 9 | +Charger Manager is a platform_driver with power-supply-class entries. | |
| 10 | +An instance of Charger Manager (a platform-device created with Charger-Manager) | |
| 11 | +represents an independent battery with chargers. If there are multiple | |
| 12 | +batteries with their own chargers acting independently in a system, | |
| 13 | +the system may need multiple instances of Charger Manager. | |
| 14 | + | |
| 15 | +1. Introduction | |
| 16 | +=============== | |
| 17 | + | |
| 18 | +Charger Manager supports the following: | |
| 19 | + | |
| 20 | +* Support for multiple chargers (e.g., a device with USB, AC, and solar panels) | |
| 21 | + A system may have multiple chargers (or power sources) and some of | |
| 22 | + they may be activated at the same time. Each charger may have its | |
| 23 | + own power-supply-class and each power-supply-class can provide | |
| 24 | + different information about the battery status. This framework | |
| 25 | + aggregates charger-related information from multiple sources and | |
| 26 | + shows combined information as a single power-supply-class. | |
| 27 | + | |
| 28 | +* Support for in suspend-to-RAM polling (with suspend_again callback) | |
| 29 | + While the battery is being charged and the system is in suspend-to-RAM, | |
| 30 | + we may need to monitor the battery health by looking at the ambient or | |
| 31 | + battery temperature. We can accomplish this by waking up the system | |
| 32 | + periodically. However, such a method wakes up devices unncessary for | |
| 33 | + monitoring the battery health and tasks, and user processes that are | |
| 34 | + supposed to be kept suspended. That, in turn, incurs unnecessary power | |
| 35 | + consumption and slow down charging process. Or even, such peak power | |
| 36 | + consumption can stop chargers in the middle of charging | |
| 37 | + (external power input < device power consumption), which not | |
| 38 | + only affects the charging time, but the lifespan of the battery. | |
| 39 | + | |
| 40 | + Charger Manager provides a function "cm_suspend_again" that can be | |
| 41 | + used as suspend_again callback of platform_suspend_ops. If the platform | |
| 42 | + requires tasks other than cm_suspend_again, it may implement its own | |
| 43 | + suspend_again callback that calls cm_suspend_again in the middle. | |
| 44 | + Normally, the platform will need to resume and suspend some devices | |
| 45 | + that are used by Charger Manager. | |
| 46 | + | |
| 47 | +2. Global Charger-Manager Data related with suspend_again | |
| 48 | +======================================================== | |
| 49 | +In order to setup Charger Manager with suspend-again feature | |
| 50 | +(in-suspend monitoring), the user should provide charger_global_desc | |
| 51 | +with setup_charger_manager(struct charger_global_desc *). | |
| 52 | +This charger_global_desc data for in-suspend monitoring is global | |
| 53 | +as the name suggests. Thus, the user needs to provide only once even | |
| 54 | +if there are multiple batteries. If there are multiple batteries, the | |
| 55 | +multiple instances of Charger Manager share the same charger_global_desc | |
| 56 | +and it will manage in-suspend monitoring for all instances of Charger Manager. | |
| 57 | + | |
| 58 | +The user needs to provide all the two entries properly in order to activate | |
| 59 | +in-suspend monitoring: | |
| 60 | + | |
| 61 | +struct charger_global_desc { | |
| 62 | + | |
| 63 | +char *rtc_name; | |
| 64 | + : The name of rtc (e.g., "rtc0") used to wakeup the system from | |
| 65 | + suspend for Charger Manager. The alarm interrupt (AIE) of the rtc | |
| 66 | + should be able to wake up the system from suspend. Charger Manager | |
| 67 | + saves and restores the alarm value and use the previously-defined | |
| 68 | + alarm if it is going to go off earlier than Charger Manager so that | |
| 69 | + Charger Manager does not interfere with previously-defined alarms. | |
| 70 | + | |
| 71 | +bool (*rtc_only_wakeup)(void); | |
| 72 | + : This callback should let CM know whether | |
| 73 | + the wakeup-from-suspend is caused only by the alarm of "rtc" in the | |
| 74 | + same struct. If there is any other wakeup source triggered the | |
| 75 | + wakeup, it should return false. If the "rtc" is the only wakeup | |
| 76 | + reason, it should return true. | |
| 77 | +}; | |
| 78 | + | |
| 79 | +3. How to setup suspend_again | |
| 80 | +============================= | |
| 81 | +Charger Manager provides a function "extern bool cm_suspend_again(void)". | |
| 82 | +When cm_suspend_again is called, it monitors every battery. The suspend_ops | |
| 83 | +callback of the system's platform_suspend_ops can call cm_suspend_again | |
| 84 | +function to know whether Charger Manager wants to suspend again or not. | |
| 85 | +If there are no other devices or tasks that want to use suspend_again | |
| 86 | +feature, the platform_suspend_ops may directly refer to cm_suspend_again | |
| 87 | +for its suspend_again callback. | |
| 88 | + | |
| 89 | +The cm_suspend_again() returns true (meaning "I want to suspend again") | |
| 90 | +if the system was woken up by Charger Manager and the polling | |
| 91 | +(in-suspend monitoring) results in "normal". | |
| 92 | + | |
| 93 | +4. Charger-Manager Data (struct charger_desc) | |
| 94 | +============================================= | |
| 95 | +For each battery charged independently from other batteries (if a series of | |
| 96 | +batteries are charged by a single charger, they are counted as one independent | |
| 97 | +battery), an instance of Charger Manager is attached to it. | |
| 98 | + | |
| 99 | +struct charger_desc { | |
| 100 | + | |
| 101 | +char *psy_name; | |
| 102 | + : The power-supply-class name of the battery. Default is | |
| 103 | + "battery" if psy_name is NULL. Users can access the psy entries | |
| 104 | + at "/sys/class/power_supply/[psy_name]/". | |
| 105 | + | |
| 106 | +enum polling_modes polling_mode; | |
| 107 | + : CM_POLL_DISABLE: do not poll this battery. | |
| 108 | + CM_POLL_ALWAYS: always poll this battery. | |
| 109 | + CM_POLL_EXTERNAL_POWER_ONLY: poll this battery if and only if | |
| 110 | + an external power source is attached. | |
| 111 | + CM_POLL_CHARGING_ONLY: poll this battery if and only if the | |
| 112 | + battery is being charged. | |
| 113 | + | |
| 114 | +unsigned int fullbatt_uV; | |
| 115 | + : If specified with a non-zero value, Charger Manager assumes | |
| 116 | + that the battery is full (capacity = 100) if the battery is not being | |
| 117 | + charged and the battery voltage is equal to or greater than | |
| 118 | + fullbatt_uV. | |
| 119 | + | |
| 120 | +unsigned int polling_interval_ms; | |
| 121 | + : Required polling interval in ms. Charger Manager will poll | |
| 122 | + this battery every polling_interval_ms or more frequently. | |
| 123 | + | |
| 124 | +enum data_source battery_present; | |
| 125 | + CM_FUEL_GAUGE: get battery presence information from fuel gauge. | |
| 126 | + CM_CHARGER_STAT: get battery presence from chargers. | |
| 127 | + | |
| 128 | +char **psy_charger_stat; | |
| 129 | + : An array ending with NULL that has power-supply-class names of | |
| 130 | + chargers. Each power-supply-class should provide "PRESENT" (if | |
| 131 | + battery_present is "CM_CHARGER_STAT"), "ONLINE" (shows whether an | |
| 132 | + external power source is attached or not), and "STATUS" (shows whether | |
| 133 | + the battery is {"FULL" or not FULL} or {"FULL", "Charging", | |
| 134 | + "Discharging", "NotCharging"}). | |
| 135 | + | |
| 136 | +int num_charger_regulators; | |
| 137 | +struct regulator_bulk_data *charger_regulators; | |
| 138 | + : Regulators representing the chargers in the form for | |
| 139 | + regulator framework's bulk functions. | |
| 140 | + | |
| 141 | +char *psy_fuel_gauge; | |
| 142 | + : Power-supply-class name of the fuel gauge. | |
| 143 | + | |
| 144 | +int (*temperature_out_of_range)(int *mC); | |
| 145 | +bool measure_battery_temp; | |
| 146 | + : This callback returns 0 if the temperature is safe for charging, | |
| 147 | + a positive number if it is too hot to charge, and a negative number | |
| 148 | + if it is too cold to charge. With the variable mC, the callback returns | |
| 149 | + the temperature in 1/1000 of centigrade. | |
| 150 | + The source of temperature can be battery or ambient one according to | |
| 151 | + the value of measure_battery_temp. | |
| 152 | +}; | |
| 153 | + | |
| 154 | +5. Other Considerations | |
| 155 | +======================= | |
| 156 | + | |
| 157 | +At the charger/battery-related events such as battery-pulled-out, | |
| 158 | +charger-pulled-out, charger-inserted, DCIN-over/under-voltage, charger-stopped, | |
| 159 | +and others critical to chargers, the system should be configured to wake up. | |
| 160 | +At least the following should wake up the system from a suspend: | |
| 161 | +a) charger-on/off b) external-power-in/out c) battery-in/out (while charging) | |
| 162 | + | |
| 163 | +It is usually accomplished by configuring the PMIC as a wakeup source. | |
| @@ -126,7 +126,9 @@ The core methods to suspend and resume devices reside in struct dev_pm_ops · 125 unmodified lines | ||
| 126 | 126 | pointed to by the ops member of struct dev_pm_domain, or by the pm member of |
| 127 | 127 | struct bus_type, struct device_type and struct class. They are mostly of |
| 128 | 128 | interest to the people writing infrastructure for platforms and buses, like PCI |
| 129 | −or USB, or device type and device class drivers. | |
| 129 | +or USB, or device type and device class drivers. They also are relevant to the | |
| 130 | +writers of device drivers whose subsystems (PM domains, device types, device | |
| 131 | +classes and bus types) don't provide all power management methods. | |
| 130 | 132 | |
| 131 | 133 | Bus drivers implement these methods as appropriate for the hardware and the |
| 132 | 134 | drivers using it; PCI works differently from USB, and so on. Not many people |
| @@ -268,32 +270,35 @@ various phases always run after tasks have been frozen and before they are · 135 unmodified lines | ||
| 268 | 270 | unfrozen. Furthermore, the *_noirq phases run at a time when IRQ handlers have |
| 269 | 271 | been disabled (except for those marked with the IRQF_NO_SUSPEND flag). |
| 270 | 272 | |
| 271 | −All phases use PM domain, bus, type, or class callbacks (that is, methods | |
| 272 | −defined in dev->pm_domain->ops, dev->bus->pm, dev->type->pm, or dev->class->pm). | |
| 273 | −These callbacks are regarded by the PM core as mutually exclusive. Moreover, | |
| 274 | −PM domain callbacks always take precedence over bus, type and class callbacks, | |
| 275 | −while type callbacks take precedence over bus and class callbacks, and class | |
| 276 | −callbacks take precedence over bus callbacks. To be precise, the following | |
| 277 | −rules are used to determine which callback to execute in the given phase: | |
| 273 | +All phases use PM domain, bus, type, class or driver callbacks (that is, methods | |
| 274 | +defined in dev->pm_domain->ops, dev->bus->pm, dev->type->pm, dev->class->pm or | |
| 275 | +dev->driver->pm). These callbacks are regarded by the PM core as mutually | |
| 276 | +exclusive. Moreover, PM domain callbacks always take precedence over all of the | |
| 277 | +other callbacks and, for example, type callbacks take precedence over bus, class | |
| 278 | +and driver callbacks. To be precise, the following rules are used to determine | |
| 279 | +which callback to execute in the given phase: | |
| 278 | 280 | |
| 279 | − 1. If dev->pm_domain is present, the PM core will attempt to execute the | |
| 280 | − callback included in dev->pm_domain->ops. If that callback is not | |
| 281 | − present, no action will be carried out for the given device. | |
| 281 | + 1. If dev->pm_domain is present, the PM core will choose the callback | |
| 282 | + included in dev->pm_domain->ops for execution | |
| 282 | 283 | |
| 283 | 284 | 2. Otherwise, if both dev->type and dev->type->pm are present, the callback |
| 284 | − included in dev->type->pm will be executed. | |
| 285 | + included in dev->type->pm will be chosen for execution. | |
| 285 | 286 | |
| 286 | 287 | 3. Otherwise, if both dev->class and dev->class->pm are present, the |
| 287 | − callback included in dev->class->pm will be executed. | |
| 288 | + callback included in dev->class->pm will be chosen for execution. | |
| 288 | 289 | |
| 289 | 290 | 4. Otherwise, if both dev->bus and dev->bus->pm are present, the callback |
| 290 | − included in dev->bus->pm will be executed. | |
| 291 | + included in dev->bus->pm will be chosen for execution. | |
| 291 | 292 | |
| 292 | 293 | This allows PM domains and device types to override callbacks provided by bus |
| 293 | 294 | types or device classes if necessary. |
| 294 | 295 | |
| 295 | −These callbacks may in turn invoke device- or driver-specific methods stored in | |
| 296 | −dev->driver->pm, but they don't have to. | |
| 296 | +The PM domain, type, class and bus callbacks may in turn invoke device- or | |
| 297 | +driver-specific methods stored in dev->driver->pm, but they don't have to do | |
| 298 | +that. | |
| 299 | + | |
| 300 | +If the subsystem callback chosen for execution is not present, the PM core will | |
| 301 | +execute the corresponding method from dev->driver->pm instead if there is one. | |
| 297 | 302 | |
| 298 | 303 | |
| 299 | 304 | Entering System Suspend |
| @@ -21,7 +21,7 @@ freeze_processes() (defined in kernel/power/process.c) is called. It executes · 20 unmodified lines | ||
| 21 | 21 | try_to_freeze_tasks() that sets TIF_FREEZE for all of the freezable tasks and |
| 22 | 22 | either wakes them up, if they are kernel threads, or sends fake signals to them, |
| 23 | 23 | if they are user space processes. A task that has TIF_FREEZE set, should react |
| 24 | −to it by calling the function called refrigerator() (defined in | |
| 24 | +to it by calling the function called __refrigerator() (defined in | |
| 25 | 25 | kernel/freezer.c), which sets the task's PF_FROZEN flag, changes its state |
| 26 | 26 | to TASK_UNINTERRUPTIBLE and makes it loop until PF_FROZEN is cleared for it. |
| 27 | 27 | Then, we say that the task is 'frozen' and therefore the set of functions |
| @@ -29,10 +29,10 @@ handling this mechanism is referred to as 'the freezer' (these functions are · 1 unmodified line | ||
| 29 | 29 | defined in kernel/power/process.c, kernel/freezer.c & include/linux/freezer.h). |
| 30 | 30 | User space processes are generally frozen before kernel threads. |
| 31 | 31 | |
| 32 | −It is not recommended to call refrigerator() directly. Instead, it is | |
| 33 | −recommended to use the try_to_freeze() function (defined in | |
| 34 | −include/linux/freezer.h), that checks the task's TIF_FREEZE flag and makes the | |
| 35 | −task enter refrigerator() if the flag is set. | |
| 32 | +__refrigerator() must not be called directly. Instead, use the | |
| 33 | +try_to_freeze() function (defined in include/linux/freezer.h), that checks | |
| 34 | +the task's TIF_FREEZE flag and makes the task enter __refrigerator() if the | |
| 35 | +flag is set. | |
| 36 | 36 | |
| 37 | 37 | For user space processes try_to_freeze() is called automatically from the |
| 38 | 38 | signal-handling code, but the freezable kernel threads need to call it |
| @@ -61,13 +61,13 @@ wait_event_freezable() and wait_event_freezable_timeout() macros. · 22 unmodified lines | ||
| 61 | 61 | After the system memory state has been restored from a hibernation image and |
| 62 | 62 | devices have been reinitialized, the function thaw_processes() is called in |
| 63 | 63 | order to clear the PF_FROZEN flag for each frozen task. Then, the tasks that |
| 64 | −have been frozen leave refrigerator() and continue running. | |
| 64 | +have been frozen leave __refrigerator() and continue running. | |
| 65 | 65 | |
| 66 | 66 | III. Which kernel threads are freezable? |
| 67 | 67 | |
| 68 | 68 | Kernel threads are not freezable by default. However, a kernel thread may clear |
| 69 | 69 | PF_NOFREEZE for itself by calling set_freezable() (the resetting of PF_NOFREEZE |
| 70 | −directly is strongly discouraged). From this point it is regarded as freezable | |
| 70 | +directly is not allowed). From this point it is regarded as freezable | |
| 71 | 71 | and must call try_to_freeze() in a suitable place. |
| 72 | 72 | |
| 73 | 73 | IV. Why do we do that? |
| @@ -176,3 +176,28 @@ tasks, since it generally exists anyway. · 102 unmodified lines | ||
| 176 | 176 | A driver must have all firmwares it may need in RAM before suspend() is called. |
| 177 | 177 | If keeping them is not practical, for example due to their size, they must be |
| 178 | 178 | requested early enough using the suspend notifier API described in notifiers.txt. |
| 179 | + | |
| 180 | +VI. Are there any precautions to be taken to prevent freezing failures? | |
| 181 | + | |
| 182 | +Yes, there are. | |
| 183 | + | |
| 184 | +First of all, grabbing the 'pm_mutex' lock to mutually exclude a piece of code | |
| 185 | +from system-wide sleep such as suspend/hibernation is not encouraged. | |
| 186 | +If possible, that piece of code must instead hook onto the suspend/hibernation | |
| 187 | +notifiers to achieve mutual exclusion. Look at the CPU-Hotplug code | |
| 188 | +(kernel/cpu.c) for an example. | |
| 189 | + | |
| 190 | +However, if that is not feasible, and grabbing 'pm_mutex' is deemed necessary, | |
| 191 | +it is strongly discouraged to directly call mutex_[un]lock(&pm_mutex) since | |
| 192 | +that could lead to freezing failures, because if the suspend/hibernate code | |
| 193 | +successfully acquired the 'pm_mutex' lock, and hence that other entity failed | |
| 194 | +to acquire the lock, then that task would get blocked in TASK_UNINTERRUPTIBLE | |
| 195 | +state. As a consequence, the freezer would not be able to freeze that task, | |
| 196 | +leading to freezing failure. | |
| 197 | + | |
| 198 | +However, the [un]lock_system_sleep() APIs are safe to use in this scenario, | |
| 199 | +since they ask the freezer to skip freezing this task, since it is anyway | |
| 200 | +"frozen enough" as it is blocked on 'pm_mutex', which will be released | |
| 201 | +only after the entire suspend/hibernation sequence is complete. | |
| 202 | +So, to summarize, use [un]lock_system_sleep() instead of directly using | |
| 203 | +mutex_[un]lock(&pm_mutex). That would prevent freezing failures. | |
| @@ -12,7 +12,7 @@ Drivers can register a regulator by calling :- · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc, |
| 14 | 14 | struct device *dev, struct regulator_init_data *init_data, |
| 15 | − void *driver_data); | |
| 15 | + void *driver_data, struct device_node *of_node); | |
| 16 | 16 | |
| 17 | 17 | This will register the regulators capabilities and operations to the regulator |
| 18 | 18 | core. |
| @@ -57,6 +57,10 @@ the following: · 56 unmodified lines | ||
| 57 | 57 | |
| 58 | 58 | 4. Bus type of the device, if both dev->bus and dev->bus->pm are present. |
| 59 | 59 | |
| 60 | +If the subsystem chosen by applying the above rules doesn't provide the relevant | |
| 61 | +callback, the PM core will invoke the corresponding driver callback stored in | |
| 62 | +dev->driver->pm directly (if present). | |
| 63 | + | |
| 60 | 64 | The PM core always checks which callback to use in the order given above, so the |
| 61 | 65 | priority order of callbacks from high to low is: PM domain, device type, class |
| 62 | 66 | and bus type. Moreover, the high-priority one will always take precedence over |
| @@ -64,86 +68,88 @@ a low-priority one. The PM domain, bus type, device type and class callbacks · 1 unmodified line | ||
| 64 | 68 | are referred to as subsystem-level callbacks in what follows. |
| 65 | 69 | |
| 66 | 70 | By default, the callbacks are always invoked in process context with interrupts |
| 67 | −enabled. However, subsystems can use the pm_runtime_irq_safe() helper function | |
| 68 | −to tell the PM core that their ->runtime_suspend(), ->runtime_resume() and | |
| 69 | −->runtime_idle() callbacks may be invoked in atomic context with interrupts | |
| 70 | −disabled for a given device. This implies that the callback routines in | |
| 71 | −question must not block or sleep, but it also means that the synchronous helper | |
| 72 | −functions listed at the end of Section 4 may be used for that device within an | |
| 73 | −interrupt handler or generally in an atomic context. | |
| 74 | − | |
| 75 | −The subsystem-level suspend callback is _entirely_ _responsible_ for handling | |
| 76 | −the suspend of the device as appropriate, which may, but need not include | |
| 77 | −executing the device driver's own ->runtime_suspend() callback (from the | |
| 71 | +enabled. However, the pm_runtime_irq_safe() helper function can be used to tell | |
| 72 | +the PM core that it is safe to run the ->runtime_suspend(), ->runtime_resume() | |
| 73 | +and ->runtime_idle() callbacks for the given device in atomic context with | |
| 74 | +interrupts disabled. This implies that the callback routines in question must | |
| 75 | +not block or sleep, but it also means that the synchronous helper functions | |
| 76 | +listed at the end of Section 4 may be used for that device within an interrupt | |
| 77 | +handler or generally in an atomic context. | |
| 78 | + | |
| 79 | +The subsystem-level suspend callback, if present, is _entirely_ _responsible_ | |
| 80 | +for handling the suspend of the device as appropriate, which may, but need not | |
| 81 | +include executing the device driver's own ->runtime_suspend() callback (from the | |
| 78 | 82 | PM core's point of view it is not necessary to implement a ->runtime_suspend() |
| 79 | 83 | callback in a device driver as long as the subsystem-level suspend callback |
| 80 | 84 | knows what to do to handle the device). |
| 81 | 85 | |
| 82 | − * Once the subsystem-level suspend callback has completed successfully | |
| 83 | − for given device, the PM core regards the device as suspended, which need | |
| 84 | − not mean that the device has been put into a low power state. It is | |
| 85 | − supposed to mean, however, that the device will not process data and will | |
| 86 | − not communicate with the CPU(s) and RAM until the subsystem-level resume | |
| 87 | − callback is executed for it. The runtime PM status of a device after | |
| 88 | − successful execution of the subsystem-level suspend callback is 'suspended'. | |
| 89 | − | |
| 90 | − * If the subsystem-level suspend callback returns -EBUSY or -EAGAIN, | |
| 91 | − the device's runtime PM status is 'active', which means that the device | |
| 92 | − _must_ be fully operational afterwards. | |
| 93 | − | |
| 94 | − * If the subsystem-level suspend callback returns an error code different | |
| 95 | − from -EBUSY or -EAGAIN, the PM core regards this as a fatal error and will | |
| 96 | − refuse to run the helper functions described in Section 4 for the device, | |
| 97 | − until the status of it is directly set either to 'active', or to 'suspended' | |
| 98 | − (the PM core provides special helper functions for this purpose). | |
| 99 | − | |
| 100 | −In particular, if the driver requires remote wake-up capability (i.e. hardware | |
| 86 | + * Once the subsystem-level suspend callback (or the driver suspend callback, | |
| 87 | + if invoked directly) has completed successfully for the given device, the PM | |
| 88 | + core regards the device as suspended, which need not mean that it has been | |
| 89 | + put into a low power state. It is supposed to mean, however, that the | |
| 90 | + device will not process data and will not communicate with the CPU(s) and | |
| 91 | + RAM until the appropriate resume callback is executed for it. The runtime | |
| 92 | + PM status of a device after successful execution of the suspend callback is | |
| 93 | + 'suspended'. | |
| 94 | + | |
| 95 | + * If the suspend callback returns -EBUSY or -EAGAIN, the device's runtime PM | |
| 96 | + status remains 'active', which means that the device _must_ be fully | |
| 97 | + operational afterwards. | |
| 98 | + | |
| 99 | + * If the suspend callback returns an error code different from -EBUSY and | |
| 100 | + -EAGAIN, the PM core regards this as a fatal error and will refuse to run | |
| 101 | + the helper functions described in Section 4 for the device until its status | |
| 102 | + is directly set to either'active', or 'suspended' (the PM core provides | |
| 103 | + special helper functions for this purpose). | |
| 104 | + | |
| 105 | +In particular, if the driver requires remote wakeup capability (i.e. hardware | |
| 101 | 106 | mechanism allowing the device to request a change of its power state, such as |
| 102 | 107 | PCI PME) for proper functioning and device_run_wake() returns 'false' for the |
| 103 | 108 | device, then ->runtime_suspend() should return -EBUSY. On the other hand, if |
| 104 | −device_run_wake() returns 'true' for the device and the device is put into a low | |
| 105 | −power state during the execution of the subsystem-level suspend callback, it is | |
| 106 | −expected that remote wake-up will be enabled for the device. Generally, remote | |
| 107 | −wake-up should be enabled for all input devices put into a low power state at | |
| 108 | −run time. | |
| 109 | − | |
| 110 | −The subsystem-level resume callback is _entirely_ _responsible_ for handling the | |
| 111 | −resume of the device as appropriate, which may, but need not include executing | |
| 112 | −the device driver's own ->runtime_resume() callback (from the PM core's point of | |
| 113 | −view it is not necessary to implement a ->runtime_resume() callback in a device | |
| 114 | −driver as long as the subsystem-level resume callback knows what to do to handle | |
| 115 | −the device). | |
| 116 | − | |
| 117 | − * Once the subsystem-level resume callback has completed successfully, the PM | |
| 118 | − core regards the device as fully operational, which means that the device | |
| 119 | − _must_ be able to complete I/O operations as needed. The runtime PM status | |
| 120 | − of the device is then 'active'. | |
| 121 | − | |
| 122 | − * If the subsystem-level resume callback returns an error code, the PM core | |
| 123 | − regards this as a fatal error and will refuse to run the helper functions | |
| 124 | − described in Section 4 for the device, until its status is directly set | |
| 125 | − either to 'active' or to 'suspended' (the PM core provides special helper | |
| 126 | − functions for this purpose). | |
| 127 | − | |
| 128 | −The subsystem-level idle callback is executed by the PM core whenever the device | |
| 129 | −appears to be idle, which is indicated to the PM core by two counters, the | |
| 130 | −device's usage counter and the counter of 'active' children of the device. | |
| 109 | +device_run_wake() returns 'true' for the device and the device is put into a | |
| 110 | +low-power state during the execution of the suspend callback, it is expected | |
| 111 | +that remote wakeup will be enabled for the device. Generally, remote wakeup | |
| 112 | +should be enabled for all input devices put into low-power states at run time. | |
| 113 | + | |
| 114 | +The subsystem-level resume callback, if present, is _entirely_ _responsible_ for | |
| 115 | +handling the resume of the device as appropriate, which may, but need not | |
| 116 | +include executing the device driver's own ->runtime_resume() callback (from the | |
| 117 | +PM core's point of view it is not necessary to implement a ->runtime_resume() | |
| 118 | +callback in a device driver as long as the subsystem-level resume callback knows | |
| 119 | +what to do to handle the device). | |
| 120 | + | |
| 121 | + * Once the subsystem-level resume callback (or the driver resume callback, if | |
| 122 | + invoked directly) has completed successfully, the PM core regards the device | |
| 123 | + as fully operational, which means that the device _must_ be able to complete | |
| 124 | + I/O operations as needed. The runtime PM status of the device is then | |
| 125 | + 'active'. | |
| 126 | + | |
| 127 | + * If the resume callback returns an error code, the PM core regards this as a | |
| 128 | + fatal error and will refuse to run the helper functions described in Section | |
| 129 | + 4 for the device, until its status is directly set to either 'active', or | |
| 130 | + 'suspended' (by means of special helper functions provided by the PM core | |
| 131 | + for this purpose). | |
| 132 | + | |
| 133 | +The idle callback (a subsystem-level one, if present, or the driver one) is | |
| 134 | +executed by the PM core whenever the device appears to be idle, which is | |
| 135 | +indicated to the PM core by two counters, the device's usage counter and the | |
| 136 | +counter of 'active' children of the device. | |
| 131 | 137 | |
| 132 | 138 | * If any of these counters is decreased using a helper function provided by |
| 133 | 139 | the PM core and it turns out to be equal to zero, the other counter is |
| 134 | 140 | checked. If that counter also is equal to zero, the PM core executes the |
| 135 | − subsystem-level idle callback with the device as an argument. | |
| 141 | + idle callback with the device as its argument. | |
| 136 | 142 | |
| 137 | −The action performed by a subsystem-level idle callback is totally dependent on | |
| 138 | −the subsystem in question, but the expected and recommended action is to check | |
| 143 | +The action performed by the idle callback is totally dependent on the subsystem | |
| 144 | +(or driver) in question, but the expected and recommended action is to check | |
| 139 | 145 | if the device can be suspended (i.e. if all of the conditions necessary for |
| 140 | 146 | suspending the device are satisfied) and to queue up a suspend request for the |
| 141 | 147 | device in that case. The value returned by this callback is ignored by the PM |
| 142 | 148 | core. |
| 143 | 149 | |
| 144 | 150 | The helper functions provided by the PM core, described in Section 4, guarantee |
| 145 | −that the following constraints are met with respect to the bus type's runtime | |
| 146 | −PM callbacks: | |
| 151 | +that the following constraints are met with respect to runtime PM callbacks for | |
| 152 | +one device: | |
| 147 | 153 | |
| 148 | 154 | (1) The callbacks are mutually exclusive (e.g. it is forbidden to execute |
| 149 | 155 | ->runtime_suspend() in parallel with ->runtime_resume() or with another |
| @@ -41,7 +41,6 @@ ldd · 40 unmodified lines | ||
| 41 | 41 | Debugging modules |
| 42 | 42 | The proc file system |
| 43 | 43 | Starting points for debugging scripting languages etc. |
| 44 | −Dumptool & Lcrash | |
| 45 | 44 | SysRq |
| 46 | 45 | References |
| 47 | 46 | Special Thanks |
| @@ -2455,39 +2454,6 @@ jdb <filename> another fully interactive gdb style debugger. · 2407 unmodified lines | ||
| 2455 | 2454 | |
| 2456 | 2455 | |
| 2457 | 2456 | |
| 2458 | −Dumptool & Lcrash ( lkcd ) | |
| 2459 | −========================== | |
| 2460 | −Michael Holzheu & others here at IBM have a fairly mature port of | |
| 2461 | −SGI's lcrash tool which allows one to look at kernel structures in a | |
| 2462 | −running kernel. | |
| 2463 | − | |
| 2464 | −It also complements a tool called dumptool which dumps all the kernel's | |
| 2465 | −memory pages & registers to either a tape or a disk. | |
| 2466 | −This can be used by tech support or an ambitious end user do | |
| 2467 | −post mortem debugging of a machine like gdb core dumps. | |
| 2468 | − | |
| 2469 | −Going into how to use this tool in detail will be explained | |
| 2470 | −in other documentation supplied by IBM with the patches & the | |
| 2471 | −lcrash homepage http://oss.sgi.com/projects/lkcd/ & the lcrash manpage. | |
| 2472 | − | |
| 2473 | −How they work | |
| 2474 | −------------- | |
| 2475 | −Lcrash is a perfectly normal program,however, it requires 2 | |
| 2476 | −additional files, Kerntypes which is built using a patch to the | |
| 2477 | −linux kernel sources in the linux root directory & the System.map. | |
| 2478 | − | |
| 2479 | −Kerntypes is an objectfile whose sole purpose in life | |
| 2480 | −is to provide stabs debug info to lcrash, to do this | |
| 2481 | −Kerntypes is built from kerntypes.c which just includes the most commonly | |
| 2482 | −referenced header files used when debugging, lcrash can then read the | |
| 2483 | −.stabs section of this file. | |
| 2484 | − | |
| 2485 | −Debugging a live system it uses /dev/mem | |
| 2486 | −alternatively for post mortem debugging it uses the data | |
| 2487 | −collected by dumptool. | |
| 2488 | − | |
| 2489 | − | |
| 2490 | − | |
| 2491 | 2457 | SysRq |
| 2492 | 2458 | ===== |
| 2493 | 2459 | This is now supported by linux for s/390 & z/Architecture. |
| @@ -16,32 +16,13 @@ fill in to get the driver working. · 15 unmodified lines | ||
| 16 | 16 | Compile Time Flags |
| 17 | 17 | ================== |
| 18 | 18 | |
| 19 | −The driver may be either io mapped or memory mapped. This is | |
| 20 | −selectable by configuration flags: | |
| 21 | − | |
| 22 | −CONFIG_53C700_MEM_MAPPED | |
| 23 | − | |
| 24 | −define if the driver is memory mapped. | |
| 25 | − | |
| 26 | −CONFIG_53C700_IO_MAPPED | |
| 27 | − | |
| 28 | −define if the driver is to be io mapped. | |
| 29 | − | |
| 30 | −One or other of the above flags *must* be defined. | |
| 31 | − | |
| 32 | −Other flags are: | |
| 19 | +A compile time flag is: | |
| 33 | 20 | |
| 34 | 21 | CONFIG_53C700_LE_ON_BE |
| 35 | 22 | |
| 36 | 23 | define if the chipset must be supported in little endian mode on a big |
| 37 | 24 | endian architecture (used for the 700 on parisc). |
| 38 | 25 | |
| 39 | −CONFIG_53C700_USE_CONSISTENT | |
| 40 | − | |
| 41 | −allocate consistent memory (should only be used if your architecture | |
| 42 | −has a mixture of consistent and inconsistent memory). Fully | |
| 43 | −consistent or fully inconsistent architectures should not define this. | |
| 44 | − | |
| 45 | 26 | |
| 46 | 27 | Using the Chip Core Driver |
| 47 | 28 | ========================== |
| @@ -1,3 +1,13 @@ | ||
| 1 | +Release Date : Fri. Jan 6, 2012 17:00:00 PST 2010 - | |
| 2 | + (emaild-id:megaraidlinux@lsi.com) | |
| 3 | + Adam Radford | |
| 4 | +Current Version : 00.00.06.14-rc1 | |
| 5 | +Old Version : 00.00.06.12-rc1 | |
| 6 | + 1. Fix reglockFlags for degraded raid5/6 for MR 9360/9380. | |
| 7 | + 2. Mask off flags in ioctl path to prevent memory scribble with older | |
| 8 | + MegaCLI versions. | |
| 9 | + 3. Remove poll_mode_io module paramater, sysfs node, and associated code. | |
| 10 | +------------------------------------------------------------------------------- | |
| 1 | 11 | Release Date : Wed. Oct 5, 2011 17:00:00 PST 2010 - |
| 2 | 12 | (emaild-id:megaraidlinux@lsi.com) |
| 3 | 13 | Adam Radford |
| @@ -1,32 +1,11 @@ | ||
| 1 | 1 | Copyright (c) 2003-2011 QLogic Corporation |
| 2 | −QLogic Linux iSCSI HBA Driver | |
| 2 | +QLogic Linux iSCSI Driver | |
| 3 | 3 | |
| 4 | 4 | This program includes a device driver for Linux 3.x. |
| 5 | 5 | You may modify and redistribute the device driver code under the |
| 6 | 6 | GNU General Public License (a copy of which is attached hereto as |
| 7 | 7 | Exhibit A) published by the Free Software Foundation (version 2). |
| 8 | 8 | |
| 9 | −REGARDLESS OF WHAT LICENSING MECHANISM IS USED OR APPLICABLE, | |
| 10 | −THIS PROGRAM IS PROVIDED BY QLOGIC CORPORATION "AS IS'' AND ANY | |
| 11 | −EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 12 | −IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A | |
| 13 | −PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR | |
| 14 | −BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | |
| 15 | −EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED | |
| 16 | −TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
| 17 | −DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
| 18 | −ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, | |
| 19 | −OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
| 20 | −OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 21 | −POSSIBILITY OF SUCH DAMAGE. | |
| 22 | − | |
| 23 | −USER ACKNOWLEDGES AND AGREES THAT USE OF THIS PROGRAM WILL NOT | |
| 24 | −CREATE OR GIVE GROUNDS FOR A LICENSE BY IMPLICATION, ESTOPPEL, OR | |
| 25 | −OTHERWISE IN ANY INTELLECTUAL PROPERTY RIGHTS (PATENT, COPYRIGHT, | |
| 26 | −TRADE SECRET, MASK WORK, OR OTHER PROPRIETARY RIGHT) EMBODIED IN | |
| 27 | −ANY OTHER QLOGIC HARDWARE OR SOFTWARE EITHER SOLELY OR IN | |
| 28 | −COMBINATION WITH THIS PROGRAM. | |
| 29 | − | |
| 30 | 9 | |
| 31 | 10 | EXHIBIT A |
| 32 | 11 | |
| @@ -1,5 +1,7 @@ | ||
| 1 | 1 | 00-INDEX |
| 2 | 2 | - this file. |
| 3 | +LSM.txt | |
| 4 | + - description of the Linux Security Module framework. | |
| 3 | 5 | SELinux.txt |
| 4 | 6 | - how to get started with the SELinux security enhancement. |
| 5 | 7 | Smack.txt |
| @@ -0,0 +1,34 @@ | ||
| 1 | +Linux Security Module framework | |
| 2 | +------------------------------- | |
| 3 | + | |
| 4 | +The Linux Security Module (LSM) framework provides a mechanism for | |
| 5 | +various security checks to be hooked by new kernel extensions. The name | |
| 6 | +"module" is a bit of a misnomer since these extensions are not actually | |
| 7 | +loadable kernel modules. Instead, they are selectable at build-time via | |
| 8 | +CONFIG_DEFAULT_SECURITY and can be overridden at boot-time via the | |
| 9 | +"security=..." kernel command line argument, in the case where multiple | |
| 10 | +LSMs were built into a given kernel. | |
| 11 | + | |
| 12 | +The primary users of the LSM interface are Mandatory Access Control | |
| 13 | +(MAC) extensions which provide a comprehensive security policy. Examples | |
| 14 | +include SELinux, Smack, Tomoyo, and AppArmor. In addition to the larger | |
| 15 | +MAC extensions, other extensions can be built using the LSM to provide | |
| 16 | +specific changes to system operation when these tweaks are not available | |
| 17 | +in the core functionality of Linux itself. | |
| 18 | + | |
| 19 | +Without a specific LSM built into the kernel, the default LSM will be the | |
| 20 | +Linux capabilities system. Most LSMs choose to extend the capabilities | |
| 21 | +system, building their checks on top of the defined capability hooks. | |
| 22 | +For more details on capabilities, see capabilities(7) in the Linux | |
| 23 | +man-pages project. | |
| 24 | + | |
| 25 | +Based on http://kerneltrap.org/Linux/Documenting_Security_Module_Intent, | |
| 26 | +a new LSM is accepted into the kernel when its intent (a description of | |
| 27 | +what it tries to protect against and in what cases one would expect to | |
| 28 | +use it) has been appropriately documented in Documentation/security/. | |
| 29 | +This allows an LSM's code to be easily compared to its goals, and so | |
| 30 | +that end users and distros can make a more informed decision about which | |
| 31 | +LSMs suit their requirements. | |
| 32 | + | |
| 33 | +For extensive documentation on the available LSM hook interfaces, please | |
| 34 | +see include/linux/security.h. | |
| @@ -221,10 +221,10 @@ The Linux kernel supports the following types of credentials: · 220 unmodified lines | ||
| 221 | 221 | (5) LSM |
| 222 | 222 | |
| 223 | 223 | The Linux Security Module allows extra controls to be placed over the |
| 224 | − operations that a task may do. Currently Linux supports two main | |
| 225 | − alternate LSM options: SELinux and Smack. | |
| 224 | + operations that a task may do. Currently Linux supports several LSM | |
| 225 | + options. | |
| 226 | 226 | |
| 227 | − Both work by labelling the objects in a system and then applying sets of | |
| 227 | + Some work by labelling the objects in a system and then applying sets of | |
| 228 | 228 | rules (policies) that say what operations a task with one label may do to |
| 229 | 229 | an object with another label. |
| 230 | 230 | |
| @@ -101,7 +101,7 @@ hardware. · 100 unmodified lines | ||
| 101 | 101 | Returns the current state of modem control inputs. The state |
| 102 | 102 | of the outputs should not be returned, since the core keeps |
| 103 | 103 | track of their state. The state information should include: |
| 104 | − - TIOCM_DCD state of DCD signal | |
| 104 | + - TIOCM_CAR state of DCD signal | |
| 105 | 105 | - TIOCM_CTS state of CTS signal |
| 106 | 106 | - TIOCM_DSR state of DSR signal |
| 107 | 107 | - TIOCM_RI state of RI signal |
| @@ -42,19 +42,7 @@ ALC260 · 41 unmodified lines | ||
| 42 | 42 | |
| 43 | 43 | ALC262 |
| 44 | 44 | ====== |
| 45 | − fujitsu Fujitsu Laptop | |
| 46 | − benq Benq ED8 | |
| 47 | − benq-t31 Benq T31 | |
| 48 | − hippo Hippo (ATI) with jack detection, Sony UX-90s | |
| 49 | − hippo_1 Hippo (Benq) with jack detection | |
| 50 | − toshiba-s06 Toshiba S06 | |
| 51 | − toshiba-rx1 Toshiba RX1 | |
| 52 | − tyan Tyan Thunder n6650W (S2915-E) | |
| 53 | − ultra Samsung Q1 Ultra Vista model | |
| 54 | − lenovo-3000 Lenovo 3000 y410 | |
| 55 | − nec NEC Versa S9100 | |
| 56 | − basic fixed pin assignment w/o SPDIF | |
| 57 | − auto auto-config reading BIOS (default) | |
| 45 | + N/A | |
| 58 | 46 | |
| 59 | 47 | ALC267/268 |
| 60 | 48 | ========== |
| @@ -350,7 +338,6 @@ STAC92HD83* · 289 unmodified lines | ||
| 350 | 338 | mic-ref Reference board with power management for ports |
| 351 | 339 | dell-s14 Dell laptop |
| 352 | 340 | dell-vostro-3500 Dell Vostro 3500 laptop |
| 353 | − hp HP laptops with (inverted) mute-LED | |
| 354 | 341 | hp-dv7-4000 HP dv-7 4000 |
| 355 | 342 | auto BIOS setup (default) |
| 356 | 343 | |
| @@ -0,0 +1,188 @@ | ||
| 1 | + compress_offload.txt | |
| 2 | + ===================== | |
| 3 | + Pierre-Louis.Bossart <pierre-louis.bossart@linux.intel.com> | |
| 4 | + Vinod Koul <vinod.koul@linux.intel.com> | |
| 5 | + | |
| 6 | +Overview | |
| 7 | + | |
| 8 | +Since its early days, the ALSA API was defined with PCM support or | |
| 9 | +constant bitrates payloads such as IEC61937 in mind. Arguments and | |
| 10 | +returned values in frames are the norm, making it a challenge to | |
| 11 | +extend the existing API to compressed data streams. | |
| 12 | + | |
| 13 | +In recent years, audio digital signal processors (DSP) were integrated | |
| 14 | +in system-on-chip designs, and DSPs are also integrated in audio | |
| 15 | +codecs. Processing compressed data on such DSPs results in a dramatic | |
| 16 | +reduction of power consumption compared to host-based | |
| 17 | +processing. Support for such hardware has not been very good in Linux, | |
| 18 | +mostly because of a lack of a generic API available in the mainline | |
| 19 | +kernel. | |
| 20 | + | |
| 21 | +Rather than requiring a compability break with an API change of the | |
| 22 | +ALSA PCM interface, a new 'Compressed Data' API is introduced to | |
| 23 | +provide a control and data-streaming interface for audio DSPs. | |
| 24 | + | |
| 25 | +The design of this API was inspired by the 2-year experience with the | |
| 26 | +Intel Moorestown SOC, with many corrections required to upstream the | |
| 27 | +API in the mainline kernel instead of the staging tree and make it | |
| 28 | +usable by others. | |
| 29 | + | |
| 30 | +Requirements | |
| 31 | + | |
| 32 | +The main requirements are: | |
| 33 | + | |
| 34 | +- separation between byte counts and time. Compressed formats may have | |
| 35 | + a header per file, per frame, or no header at all. The payload size | |
| 36 | + may vary from frame-to-frame. As a result, it is not possible to | |
| 37 | + estimate reliably the duration of audio buffers when handling | |
| 38 | + compressed data. Dedicated mechanisms are required to allow for | |
| 39 | + reliable audio-video synchronization, which requires precise | |
| 40 | + reporting of the number of samples rendered at any given time. | |
| 41 | + | |
| 42 | +- Handling of multiple formats. PCM data only requires a specification | |
| 43 | + of the sampling rate, number of channels and bits per sample. In | |
| 44 | + contrast, compressed data comes in a variety of formats. Audio DSPs | |
| 45 | + may also provide support for a limited number of audio encoders and | |
| 46 | + decoders embedded in firmware, or may support more choices through | |
| 47 | + dynamic download of libraries. | |
| 48 | + | |
| 49 | +- Focus on main formats. This API provides support for the most | |
| 50 | + popular formats used for audio and video capture and playback. It is | |
| 51 | + likely that as audio compression technology advances, new formats | |
| 52 | + will be added. | |
| 53 | + | |
| 54 | +- Handling of multiple configurations. Even for a given format like | |
| 55 | + AAC, some implementations may support AAC multichannel but HE-AAC | |
| 56 | + stereo. Likewise WMA10 level M3 may require too much memory and cpu | |
| 57 | + cycles. The new API needs to provide a generic way of listing these | |
| 58 | + formats. | |
| 59 | + | |
| 60 | +- Rendering/Grabbing only. This API does not provide any means of | |
| 61 | + hardware acceleration, where PCM samples are provided back to | |
| 62 | + user-space for additional processing. This API focuses instead on | |
| 63 | + streaming compressed data to a DSP, with the assumption that the | |
| 64 | + decoded samples are routed to a physical output or logical back-end. | |
| 65 | + | |
| 66 | + - Complexity hiding. Existing user-space multimedia frameworks all | |
| 67 | + have existing enums/structures for each compressed format. This new | |
| 68 | + API assumes the existence of a platform-specific compatibility layer | |
| 69 | + to expose, translate and make use of the capabilities of the audio | |
| 70 | + DSP, eg. Android HAL or PulseAudio sinks. By construction, regular | |
| 71 | + applications are not supposed to make use of this API. | |
| 72 | + | |
| 73 | + | |
| 74 | +Design | |
| 75 | + | |
| 76 | +The new API shares a number of concepts with with the PCM API for flow | |
| 77 | +control. Start, pause, resume, drain and stop commands have the same | |
| 78 | +semantics no matter what the content is. | |
| 79 | + | |
| 80 | +The concept of memory ring buffer divided in a set of fragments is | |
| 81 | +borrowed from the ALSA PCM API. However, only sizes in bytes can be | |
| 82 | +specified. | |
| 83 | + | |
| 84 | +Seeks/trick modes are assumed to be handled by the host. | |
| 85 | + | |
| 86 | +The notion of rewinds/forwards is not supported. Data committed to the | |
| 87 | +ring buffer cannot be invalidated, except when dropping all buffers. | |
| 88 | + | |
| 89 | +The Compressed Data API does not make any assumptions on how the data | |
| 90 | +is transmitted to the audio DSP. DMA transfers from main memory to an | |
| 91 | +embedded audio cluster or to a SPI interface for external DSPs are | |
| 92 | +possible. As in the ALSA PCM case, a core set of routines is exposed; | |
| 93 | +each driver implementer will have to write support for a set of | |
| 94 | +mandatory routines and possibly make use of optional ones. | |
| 95 | + | |
| 96 | +The main additions are | |
| 97 | + | |
| 98 | +- get_caps | |
| 99 | +This routine returns the list of audio formats supported. Querying the | |
| 100 | +codecs on a capture stream will return encoders, decoders will be | |
| 101 | +listed for playback streams. | |
| 102 | + | |
| 103 | +- get_codec_caps For each codec, this routine returns a list of | |
| 104 | +capabilities. The intent is to make sure all the capabilities | |
| 105 | +correspond to valid settings, and to minimize the risks of | |
| 106 | +configuration failures. For example, for a complex codec such as AAC, | |
| 107 | +the number of channels supported may depend on a specific profile. If | |
| 108 | +the capabilities were exposed with a single descriptor, it may happen | |
| 109 | +that a specific combination of profiles/channels/formats may not be | |
| 110 | +supported. Likewise, embedded DSPs have limited memory and cpu cycles, | |
| 111 | +it is likely that some implementations make the list of capabilities | |
| 112 | +dynamic and dependent on existing workloads. In addition to codec | |
| 113 | +settings, this routine returns the minimum buffer size handled by the | |
| 114 | +implementation. This information can be a function of the DMA buffer | |
| 115 | +sizes, the number of bytes required to synchronize, etc, and can be | |
| 116 | +used by userspace to define how much needs to be written in the ring | |
| 117 | +buffer before playback can start. | |
| 118 | + | |
| 119 | +- set_params | |
| 120 | +This routine sets the configuration chosen for a specific codec. The | |
| 121 | +most important field in the parameters is the codec type; in most | |
| 122 | +cases decoders will ignore other fields, while encoders will strictly | |
| 123 | +comply to the settings | |
| 124 | + | |
| 125 | +- get_params | |
| 126 | +This routines returns the actual settings used by the DSP. Changes to | |
| 127 | +the settings should remain the exception. | |
| 128 | + | |
| 129 | +- get_timestamp | |
| 130 | +The timestamp becomes a multiple field structure. It lists the number | |
| 131 | +of bytes transferred, the number of samples processed and the number | |
| 132 | +of samples rendered/grabbed. All these values can be used to determine | |
| 133 | +the avarage bitrate, figure out if the ring buffer needs to be | |
| 134 | +refilled or the delay due to decoding/encoding/io on the DSP. | |
| 135 | + | |
| 136 | +Note that the list of codecs/profiles/modes was derived from the | |
| 137 | +OpenMAX AL specification instead of reinventing the wheel. | |
| 138 | +Modifications include: | |
| 139 | +- Addition of FLAC and IEC formats | |
| 140 | +- Merge of encoder/decoder capabilities | |
| 141 | +- Profiles/modes listed as bitmasks to make descriptors more compact | |
| 142 | +- Addition of set_params for decoders (missing in OpenMAX AL) | |
| 143 | +- Addition of AMR/AMR-WB encoding modes (missing in OpenMAX AL) | |
| 144 | +- Addition of format information for WMA | |
| 145 | +- Addition of encoding options when required (derived from OpenMAX IL) | |
| 146 | +- Addition of rateControlSupported (missing in OpenMAX AL) | |
| 147 | + | |
| 148 | +Not supported: | |
| 149 | + | |
| 150 | +- Support for VoIP/circuit-switched calls is not the target of this | |
| 151 | + API. Support for dynamic bit-rate changes would require a tight | |
| 152 | + coupling between the DSP and the host stack, limiting power savings. | |
| 153 | + | |
| 154 | +- Packet-loss concealment is not supported. This would require an | |
| 155 | + additional interface to let the decoder synthesize data when frames | |
| 156 | + are lost during transmission. This may be added in the future. | |
| 157 | + | |
| 158 | +- Volume control/routing is not handled by this API. Devices exposing a | |
| 159 | + compressed data interface will be considered as regular ALSA devices; | |
| 160 | + volume changes and routing information will be provided with regular | |
| 161 | + ALSA kcontrols. | |
| 162 | + | |
| 163 | +- Embedded audio effects. Such effects should be enabled in the same | |
| 164 | + manner, no matter if the input was PCM or compressed. | |
| 165 | + | |
| 166 | +- multichannel IEC encoding. Unclear if this is required. | |
| 167 | + | |
| 168 | +- Encoding/decoding acceleration is not supported as mentioned | |
| 169 | + above. It is possible to route the output of a decoder to a capture | |
| 170 | + stream, or even implement transcoding capabilities. This routing | |
| 171 | + would be enabled with ALSA kcontrols. | |
| 172 | + | |
| 173 | +- Audio policy/resource management. This API does not provide any | |
| 174 | + hooks to query the utilization of the audio DSP, nor any premption | |
| 175 | + mechanisms. | |
| 176 | + | |
| 177 | +- No notion of underun/overrun. Since the bytes written are compressed | |
| 178 | + in nature and data written/read doesn't translate directly to | |
| 179 | + rendered output in time, this does not deal with underrun/overun and | |
| 180 | + maybe dealt in user-library | |
| 181 | + | |
| 182 | +Credits: | |
| 183 | +- Mark Brown and Liam Girdwood for discussions on the need for this API | |
| 184 | +- Harsha Priya for her work on intel_sst compressed API | |
| 185 | +- Rakesh Ughreja for valuable feedback | |
| 186 | +- Sing Nallasellan, Sikkandar Madar and Prasanna Samaga for | |
| 187 | + demonstrating and quantifying the benefits of audio offload on a | |
| 188 | + real platform. | |
| @@ -49,6 +49,7 @@ show up in /proc/sys/kernel: · 48 unmodified lines | ||
| 49 | 49 | - panic |
| 50 | 50 | - panic_on_oops |
| 51 | 51 | - panic_on_unrecovered_nmi |
| 52 | +- panic_on_stackoverflow | |
| 52 | 53 | - pid_max |
| 53 | 54 | - powersave-nap [ PPC only ] |
| 54 | 55 | - printk |
| @@ -393,6 +394,19 @@ Controls the kernel's behaviour when an oops or BUG is encountered. · 338 unmodified lines | ||
| 393 | 394 | |
| 394 | 395 | ============================================================== |
| 395 | 396 | |
| 397 | +panic_on_stackoverflow: | |
| 398 | + | |
| 399 | +Controls the kernel's behavior when detecting the overflows of | |
| 400 | +kernel, IRQ and exception stacks except a user stack. | |
| 401 | +This file shows up if CONFIG_DEBUG_STACKOVERFLOW is enabled. | |
| 402 | + | |
| 403 | +0: try to continue operation. | |
| 404 | + | |
| 405 | +1: panic immediately. | |
| 406 | + | |
| 407 | +============================================================== | |
| 408 | + | |
| 409 | + | |
| 396 | 410 | pid_max: |
| 397 | 411 | |
| 398 | 412 | PID allocation wrap value. When the kernel's next PID value |
| @@ -401,6 +415,14 @@ PIDs of value pid_max or larger are not allocated. · 2 unmodified lines | ||
| 401 | 415 | |
| 402 | 416 | ============================================================== |
| 403 | 417 | |
| 418 | +ns_last_pid: | |
| 419 | + | |
| 420 | +The last pid allocated in the current (the one task using this sysctl | |
| 421 | +lives in) pid namespace. When selecting a pid for a next task on fork | |
| 422 | +kernel tries to allocate a number starting from this one. | |
| 423 | + | |
| 424 | +============================================================== | |
| 425 | + | |
| 404 | 426 | powersave-nap: (PPC only) |
| 405 | 427 | |
| 406 | 428 | If set, Linux-PPC will use the 'nap' mode of powersaving, |
| @@ -230,14 +230,9 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 229 unmodified lines | ||
| 230 | 230 | buf += "#include <linux/ctype.h>\n" |
| 231 | 231 | buf += "#include <asm/unaligned.h>\n\n" |
| 232 | 232 | buf += "#include <target/target_core_base.h>\n" |
| 233 | − buf += "#include <target/target_core_transport.h>\n" | |
| 234 | − buf += "#include <target/target_core_fabric_ops.h>\n" | |
| 233 | + buf += "#include <target/target_core_fabric.h>\n" | |
| 235 | 234 | buf += "#include <target/target_core_fabric_configfs.h>\n" |
| 236 | − buf += "#include <target/target_core_fabric_lib.h>\n" | |
| 237 | − buf += "#include <target/target_core_device.h>\n" | |
| 238 | − buf += "#include <target/target_core_tpg.h>\n" | |
| 239 | 235 | buf += "#include <target/target_core_configfs.h>\n" |
| 240 | − buf += "#include <target/target_core_base.h>\n" | |
| 241 | 236 | buf += "#include <target/configfs_macros.h>\n\n" |
| 242 | 237 | buf += "#include \"" + fabric_mod_name + "_base.h\"\n" |
| 243 | 238 | buf += "#include \"" + fabric_mod_name + "_fabric.h\"\n\n" |
| @@ -260,7 +255,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 16 unmodified lines | ||
| 260 | 255 | buf += " /* " + fabric_mod_name + "_parse_wwn(name, &wwpn, 1) < 0)\n" |
| 261 | 256 | buf += " return ERR_PTR(-EINVAL); */\n" |
| 262 | 257 | buf += " se_nacl_new = " + fabric_mod_name + "_alloc_fabric_acl(se_tpg);\n" |
| 263 | − buf += " if (!(se_nacl_new))\n" | |
| 258 | + buf += " if (!se_nacl_new)\n" | |
| 264 | 259 | buf += " return ERR_PTR(-ENOMEM);\n" |
| 265 | 260 | buf += "//#warning FIXME: Hardcoded nexus depth in " + fabric_mod_name + "_make_nodeacl()\n" |
| 266 | 261 | buf += " nexus_depth = 1;\n" |
| @@ -308,7 +303,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 41 unmodified lines | ||
| 308 | 303 | buf += " if (strict_strtoul(name + 5, 10, &tpgt) || tpgt > UINT_MAX)\n" |
| 309 | 304 | buf += " return ERR_PTR(-EINVAL);\n\n" |
| 310 | 305 | buf += " tpg = kzalloc(sizeof(struct " + fabric_mod_name + "_tpg), GFP_KERNEL);\n" |
| 311 | − buf += " if (!(tpg)) {\n" | |
| 306 | + buf += " if (!tpg) {\n" | |
| 312 | 307 | buf += " printk(KERN_ERR \"Unable to allocate struct " + fabric_mod_name + "_tpg\");\n" |
| 313 | 308 | buf += " return ERR_PTR(-ENOMEM);\n" |
| 314 | 309 | buf += " }\n" |
| @@ -344,7 +339,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 29 unmodified lines | ||
| 344 | 339 | buf += " /* if (" + fabric_mod_name + "_parse_wwn(name, &wwpn, 1) < 0)\n" |
| 345 | 340 | buf += " return ERR_PTR(-EINVAL); */\n\n" |
| 346 | 341 | buf += " " + fabric_mod_port + " = kzalloc(sizeof(struct " + fabric_mod_name + "_" + fabric_mod_port + "), GFP_KERNEL);\n" |
| 347 | − buf += " if (!(" + fabric_mod_port + ")) {\n" | |
| 342 | + buf += " if (!" + fabric_mod_port + ") {\n" | |
| 348 | 343 | buf += " printk(KERN_ERR \"Unable to allocate struct " + fabric_mod_name + "_" + fabric_mod_port + "\");\n" |
| 349 | 344 | buf += " return ERR_PTR(-ENOMEM);\n" |
| 350 | 345 | buf += " }\n" |
| @@ -352,7 +347,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 1 unmodified line | ||
| 352 | 347 | if proto_ident == "FC" or proto_ident == "SAS": |
| 353 | 348 | buf += " " + fabric_mod_port + "->" + fabric_mod_port + "_wwpn = wwpn;\n" |
| 354 | 349 | |
| 355 | − buf += " /* " + fabric_mod_name + "_format_wwn(&" + fabric_mod_port + "->" + fabric_mod_port + "_name[0], " + fabric_mod_name.upper() + "__NAMELEN, wwpn); */\n\n" | |
| 350 | + buf += " /* " + fabric_mod_name + "_format_wwn(&" + fabric_mod_port + "->" + fabric_mod_port + "_name[0], " + fabric_mod_name.upper() + "_NAMELEN, wwpn); */\n\n" | |
| 356 | 351 | buf += " return &" + fabric_mod_port + "->" + fabric_mod_port + "_wwn;\n" |
| 357 | 352 | buf += "}\n\n" |
| 358 | 353 | buf += "static void " + fabric_mod_name + "_drop_" + fabric_mod_port + "(struct se_wwn *wwn)\n" |
| @@ -391,8 +386,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 32 unmodified lines | ||
| 391 | 386 | buf += " .tpg_alloc_fabric_acl = " + fabric_mod_name + "_alloc_fabric_acl,\n" |
| 392 | 387 | buf += " .tpg_release_fabric_acl = " + fabric_mod_name + "_release_fabric_acl,\n" |
| 393 | 388 | buf += " .tpg_get_inst_index = " + fabric_mod_name + "_tpg_get_inst_index,\n" |
| 394 | − buf += " .release_cmd_to_pool = " + fabric_mod_name + "_release_cmd,\n" | |
| 395 | − buf += " .release_cmd_direct = " + fabric_mod_name + "_release_cmd,\n" | |
| 389 | + buf += " .release_cmd = " + fabric_mod_name + "_release_cmd,\n" | |
| 396 | 390 | buf += " .shutdown_session = " + fabric_mod_name + "_shutdown_session,\n" |
| 397 | 391 | buf += " .close_session = " + fabric_mod_name + "_close_session,\n" |
| 398 | 392 | buf += " .stop_session = " + fabric_mod_name + "_stop_session,\n" |
| @@ -405,14 +399,12 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 6 unmodified lines | ||
| 405 | 399 | buf += " .set_default_node_attributes = " + fabric_mod_name + "_set_default_node_attrs,\n" |
| 406 | 400 | buf += " .get_task_tag = " + fabric_mod_name + "_get_task_tag,\n" |
| 407 | 401 | buf += " .get_cmd_state = " + fabric_mod_name + "_get_cmd_state,\n" |
| 408 | − buf += " .new_cmd_failure = " + fabric_mod_name + "_new_cmd_failure,\n" | |
| 409 | 402 | buf += " .queue_data_in = " + fabric_mod_name + "_queue_data_in,\n" |
| 410 | 403 | buf += " .queue_status = " + fabric_mod_name + "_queue_status,\n" |
| 411 | 404 | buf += " .queue_tm_rsp = " + fabric_mod_name + "_queue_tm_rsp,\n" |
| 412 | 405 | buf += " .get_fabric_sense_len = " + fabric_mod_name + "_get_fabric_sense_len,\n" |
| 413 | 406 | buf += " .set_fabric_sense_len = " + fabric_mod_name + "_set_fabric_sense_len,\n" |
| 414 | 407 | buf += " .is_state_remove = " + fabric_mod_name + "_is_state_remove,\n" |
| 415 | − buf += " .pack_lun = " + fabric_mod_name + "_pack_lun,\n" | |
| 416 | 408 | buf += " /*\n" |
| 417 | 409 | buf += " * Setup function pointers for generic logic in target_core_fabric_configfs.c\n" |
| 418 | 410 | buf += " */\n" |
| @@ -439,9 +431,9 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 20 unmodified lines | ||
| 439 | 431 | buf += " * Register the top level struct config_item_type with TCM core\n" |
| 440 | 432 | buf += " */\n" |
| 441 | 433 | buf += " fabric = target_fabric_configfs_init(THIS_MODULE, \"" + fabric_mod_name[4:] + "\");\n" |
| 442 | − buf += " if (!(fabric)) {\n" | |
| 434 | + buf += " if (IS_ERR(fabric)) {\n" | |
| 443 | 435 | buf += " printk(KERN_ERR \"target_fabric_configfs_init() failed\\n\");\n" |
| 444 | − buf += " return -ENOMEM;\n" | |
| 436 | + buf += " return PTR_ERR(fabric);\n" | |
| 445 | 437 | buf += " }\n" |
| 446 | 438 | buf += " /*\n" |
| 447 | 439 | buf += " * Setup fabric->tf_ops from our local " + fabric_mod_name + "_ops\n" |
| @@ -475,9 +467,9 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 27 unmodified lines | ||
| 475 | 467 | buf += " printk(KERN_INFO \"" + fabric_mod_name.upper() + "[0] - Set fabric -> " + fabric_mod_name + "_fabric_configfs\\n\");\n" |
| 476 | 468 | buf += " return 0;\n" |
| 477 | 469 | buf += "};\n\n" |
| 478 | − buf += "static void " + fabric_mod_name + "_deregister_configfs(void)\n" | |
| 470 | + buf += "static void __exit " + fabric_mod_name + "_deregister_configfs(void)\n" | |
| 479 | 471 | buf += "{\n" |
| 480 | − buf += " if (!(" + fabric_mod_name + "_fabric_configfs))\n" | |
| 472 | + buf += " if (!" + fabric_mod_name + "_fabric_configfs)\n" | |
| 481 | 473 | buf += " return;\n\n" |
| 482 | 474 | buf += " target_fabric_configfs_deregister(" + fabric_mod_name + "_fabric_configfs);\n" |
| 483 | 475 | buf += " " + fabric_mod_name + "_fabric_configfs = NULL;\n" |
| @@ -492,17 +484,15 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 8 unmodified lines | ||
| 492 | 484 | buf += " return ret;\n\n" |
| 493 | 485 | buf += " return 0;\n" |
| 494 | 486 | buf += "};\n\n" |
| 495 | − buf += "static void " + fabric_mod_name + "_exit(void)\n" | |
| 487 | + buf += "static void __exit " + fabric_mod_name + "_exit(void)\n" | |
| 496 | 488 | buf += "{\n" |
| 497 | 489 | buf += " " + fabric_mod_name + "_deregister_configfs();\n" |
| 498 | 490 | buf += "};\n\n" |
| 499 | 491 | |
| 500 | − buf += "#ifdef MODULE\n" | |
| 501 | 492 | buf += "MODULE_DESCRIPTION(\"" + fabric_mod_name.upper() + " series fabric driver\");\n" |
| 502 | 493 | buf += "MODULE_LICENSE(\"GPL\");\n" |
| 503 | 494 | buf += "module_init(" + fabric_mod_name + "_init);\n" |
| 504 | 495 | buf += "module_exit(" + fabric_mod_name + "_exit);\n" |
| 505 | − buf += "#endif\n" | |
| 506 | 496 | |
| 507 | 497 | ret = p.write(buf) |
| 508 | 498 | if ret: |
| @@ -514,7 +504,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 5 unmodified lines | ||
| 514 | 504 | |
| 515 | 505 | def tcm_mod_scan_fabric_ops(tcm_dir): |
| 516 | 506 | |
| 517 | − fabric_ops_api = tcm_dir + "include/target/target_core_fabric_ops.h" | |
| 507 | + fabric_ops_api = tcm_dir + "include/target/target_core_fabric.h" | |
| 518 | 508 | |
| 519 | 509 | print "Using tcm_mod_scan_fabric_ops: " + fabric_ops_api |
| 520 | 510 | process_fo = 0; |
| @@ -579,11 +569,7 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 58 unmodified lines | ||
| 579 | 569 | buf += "#include <scsi/scsi_cmnd.h>\n" |
| 580 | 570 | buf += "#include <scsi/libfc.h>\n\n" |
| 581 | 571 | buf += "#include <target/target_core_base.h>\n" |
| 582 | − buf += "#include <target/target_core_transport.h>\n" | |
| 583 | − buf += "#include <target/target_core_fabric_ops.h>\n" | |
| 584 | − buf += "#include <target/target_core_fabric_lib.h>\n" | |
| 585 | − buf += "#include <target/target_core_device.h>\n" | |
| 586 | − buf += "#include <target/target_core_tpg.h>\n" | |
| 572 | + buf += "#include <target/target_core_fabric.h>\n" | |
| 587 | 573 | buf += "#include <target/target_core_configfs.h>\n\n" |
| 588 | 574 | buf += "#include \"" + fabric_mod_name + "_base.h\"\n" |
| 589 | 575 | buf += "#include \"" + fabric_mod_name + "_fabric.h\"\n\n" |
| @@ -788,7 +774,7 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 198 unmodified lines | ||
| 788 | 774 | buf += "{\n" |
| 789 | 775 | buf += " struct " + fabric_mod_name + "_nacl *nacl;\n\n" |
| 790 | 776 | buf += " nacl = kzalloc(sizeof(struct " + fabric_mod_name + "_nacl), GFP_KERNEL);\n" |
| 791 | − buf += " if (!(nacl)) {\n" | |
| 777 | + buf += " if (!nacl) {\n" | |
| 792 | 778 | buf += " printk(KERN_ERR \"Unable to alocate struct " + fabric_mod_name + "_nacl\\n\");\n" |
| 793 | 779 | buf += " return NULL;\n" |
| 794 | 780 | buf += " }\n\n" |
| @@ -815,7 +801,7 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 20 unmodified lines | ||
| 815 | 801 | buf += "}\n\n" |
| 816 | 802 | bufi += "u32 " + fabric_mod_name + "_tpg_get_inst_index(struct se_portal_group *);\n" |
| 817 | 803 | |
| 818 | − if re.search('release_cmd_to_pool', fo): | |
| 804 | + if re.search('\*release_cmd\)\(', fo): | |
| 819 | 805 | buf += "void " + fabric_mod_name + "_release_cmd(struct se_cmd *se_cmd)\n" |
| 820 | 806 | buf += "{\n" |
| 821 | 807 | buf += " return;\n" |
| @@ -899,13 +885,6 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 77 unmodified lines | ||
| 899 | 885 | buf += "}\n\n" |
| 900 | 886 | bufi += "int " + fabric_mod_name + "_get_cmd_state(struct se_cmd *);\n" |
| 901 | 887 | |
| 902 | − if re.search('new_cmd_failure\)\(', fo): | |
| 903 | − buf += "void " + fabric_mod_name + "_new_cmd_failure(struct se_cmd *se_cmd)\n" | |
| 904 | − buf += "{\n" | |
| 905 | − buf += " return;\n" | |
| 906 | − buf += "}\n\n" | |
| 907 | − bufi += "void " + fabric_mod_name + "_new_cmd_failure(struct se_cmd *);\n" | |
| 908 | − | |
| 909 | 888 | if re.search('queue_data_in\)\(', fo): |
| 910 | 889 | buf += "int " + fabric_mod_name + "_queue_data_in(struct se_cmd *se_cmd)\n" |
| 911 | 890 | buf += "{\n" |
| @@ -948,15 +927,6 @@ def tcm_mod_dump_fabric_ops(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 36 unmodified lines | ||
| 948 | 927 | buf += "}\n\n" |
| 949 | 928 | bufi += "int " + fabric_mod_name + "_is_state_remove(struct se_cmd *);\n" |
| 950 | 929 | |
| 951 | − if re.search('pack_lun\)\(', fo): | |
| 952 | − buf += "u64 " + fabric_mod_name + "_pack_lun(unsigned int lun)\n" | |
| 953 | − buf += "{\n" | |
| 954 | − buf += " WARN_ON(lun >= 256);\n" | |
| 955 | − buf += " /* Caller wants this byte-swapped */\n" | |
| 956 | − buf += " return cpu_to_le64((lun & 0xff) << 8);\n" | |
| 957 | − buf += "}\n\n" | |
| 958 | − bufi += "u64 " + fabric_mod_name + "_pack_lun(unsigned int);\n" | |
| 959 | − | |
| 960 | 930 | |
| 961 | 931 | ret = p.write(buf) |
| 962 | 932 | if ret: |
| @@ -40,8 +40,8 @@ but the call_site can usually be used to extrapolate that information. · 39 unmodified lines | ||
| 40 | 40 | ================== |
| 41 | 41 | mm_page_alloc page=%p pfn=%lu order=%d migratetype=%d gfp_flags=%s |
| 42 | 42 | mm_page_alloc_zone_locked page=%p pfn=%lu order=%u migratetype=%d cpu=%d percpu_refill=%d |
| 43 | −mm_page_free_direct page=%p pfn=%lu order=%d | |
| 44 | −mm_pagevec_free page=%p pfn=%lu order=%d cold=%d | |
| 43 | +mm_page_free page=%p pfn=%lu order=%d | |
| 44 | +mm_page_free_batched page=%p pfn=%lu order=%d cold=%d | |
| 45 | 45 | |
| 46 | 46 | These four events deal with page allocation and freeing. mm_page_alloc is |
| 47 | 47 | a simple indicator of page allocator activity. Pages may be allocated from |
| @@ -53,13 +53,13 @@ amounts of activity imply high activity on the zone->lock. Taking this lock · 5 unmodified lines | ||
| 53 | 53 | impairs performance by disabling interrupts, dirtying cache lines between |
| 54 | 54 | CPUs and serialising many CPUs. |
| 55 | 55 | |
| 56 | −When a page is freed directly by the caller, the mm_page_free_direct event | |
| 56 | +When a page is freed directly by the caller, the only mm_page_free event | |
| 57 | 57 | is triggered. Significant amounts of activity here could indicate that the |
| 58 | 58 | callers should be batching their activities. |
| 59 | 59 | |
| 60 | −When pages are freed using a pagevec, the mm_pagevec_free is | |
| 61 | −triggered. Broadly speaking, pages are taken off the LRU lock in bulk and | |
| 62 | −freed in batch with a pagevec. Significant amounts of activity here could | |
| 60 | +When pages are freed in batch, the also mm_page_free_batched is triggered. | |
| 61 | +Broadly speaking, pages are taken off the LRU lock in bulk and | |
| 62 | +freed in batch with a page list. Significant amounts of activity here could | |
| 63 | 63 | indicate that the system is under memory pressure and can also indicate |
| 64 | 64 | contention on the zone->lru_lock. |
| 65 | 65 | |
| @@ -17,8 +17,8 @@ use Getopt::Long; · 16 unmodified lines | ||
| 17 | 17 | |
| 18 | 18 | # Tracepoint events |
| 19 | 19 | use constant MM_PAGE_ALLOC => 1; |
| 20 | −use constant MM_PAGE_FREE_DIRECT => 2; | |
| 21 | −use constant MM_PAGEVEC_FREE => 3; | |
| 20 | +use constant MM_PAGE_FREE => 2; | |
| 21 | +use constant MM_PAGE_FREE_BATCHED => 3; | |
| 22 | 22 | use constant MM_PAGE_PCPU_DRAIN => 4; |
| 23 | 23 | use constant MM_PAGE_ALLOC_ZONE_LOCKED => 5; |
| 24 | 24 | use constant MM_PAGE_ALLOC_EXTFRAG => 6; |
| @@ -223,10 +223,10 @@ EVENT_PROCESS: · 198 unmodified lines | ||
| 223 | 223 | # Perl Switch() sucks majorly |
| 224 | 224 | if ($tracepoint eq "mm_page_alloc") { |
| 225 | 225 | $perprocesspid{$process_pid}->{MM_PAGE_ALLOC}++; |
| 226 | − } elsif ($tracepoint eq "mm_page_free_direct") { | |
| 227 | − $perprocesspid{$process_pid}->{MM_PAGE_FREE_DIRECT}++; | |
| 228 | − } elsif ($tracepoint eq "mm_pagevec_free") { | |
| 229 | − $perprocesspid{$process_pid}->{MM_PAGEVEC_FREE}++; | |
| 226 | + } elsif ($tracepoint eq "mm_page_free") { | |
| 227 | + $perprocesspid{$process_pid}->{MM_PAGE_FREE}++ | |
| 228 | + } elsif ($tracepoint eq "mm_page_free_batched") { | |
| 229 | + $perprocesspid{$process_pid}->{MM_PAGE_FREE_BATCHED}++; | |
| 230 | 230 | } elsif ($tracepoint eq "mm_page_pcpu_drain") { |
| 231 | 231 | $perprocesspid{$process_pid}->{MM_PAGE_PCPU_DRAIN}++; |
| 232 | 232 | $perprocesspid{$process_pid}->{STATE_PCPU_PAGES_DRAINED}++; |
| @@ -336,8 +336,8 @@ sub dump_stats { · 103 unmodified lines | ||
| 336 | 336 | $process_pid, |
| 337 | 337 | $stats{$process_pid}->{MM_PAGE_ALLOC}, |
| 338 | 338 | $stats{$process_pid}->{MM_PAGE_ALLOC_ZONE_LOCKED}, |
| 339 | − $stats{$process_pid}->{MM_PAGE_FREE_DIRECT}, | |
| 340 | − $stats{$process_pid}->{MM_PAGEVEC_FREE}, | |
| 339 | + $stats{$process_pid}->{MM_PAGE_FREE}, | |
| 340 | + $stats{$process_pid}->{MM_PAGE_FREE_BATCHED}, | |
| 341 | 341 | $stats{$process_pid}->{MM_PAGE_PCPU_DRAIN}, |
| 342 | 342 | $stats{$process_pid}->{HIGH_PCPU_DRAINS}, |
| 343 | 343 | $stats{$process_pid}->{HIGH_PCPU_REFILLS}, |
| @@ -364,8 +364,8 @@ sub aggregate_perprocesspid() { · 20 unmodified lines | ||
| 364 | 364 | |
| 365 | 365 | $perprocess{$process}->{MM_PAGE_ALLOC} += $perprocesspid{$process_pid}->{MM_PAGE_ALLOC}; |
| 366 | 366 | $perprocess{$process}->{MM_PAGE_ALLOC_ZONE_LOCKED} += $perprocesspid{$process_pid}->{MM_PAGE_ALLOC_ZONE_LOCKED}; |
| 367 | − $perprocess{$process}->{MM_PAGE_FREE_DIRECT} += $perprocesspid{$process_pid}->{MM_PAGE_FREE_DIRECT}; | |
| 368 | − $perprocess{$process}->{MM_PAGEVEC_FREE} += $perprocesspid{$process_pid}->{MM_PAGEVEC_FREE}; | |
| 367 | + $perprocess{$process}->{MM_PAGE_FREE} += $perprocesspid{$process_pid}->{MM_PAGE_FREE}; | |
| 368 | + $perprocess{$process}->{MM_PAGE_FREE_BATCHED} += $perprocesspid{$process_pid}->{MM_PAGE_FREE_BATCHED}; | |
| 369 | 369 | $perprocess{$process}->{MM_PAGE_PCPU_DRAIN} += $perprocesspid{$process_pid}->{MM_PAGE_PCPU_DRAIN}; |
| 370 | 370 | $perprocess{$process}->{HIGH_PCPU_DRAINS} += $perprocesspid{$process_pid}->{HIGH_PCPU_DRAINS}; |
| 371 | 371 | $perprocess{$process}->{HIGH_PCPU_REFILLS} += $perprocesspid{$process_pid}->{HIGH_PCPU_REFILLS}; |
| @@ -93,14 +93,14 @@ By specifying the -a switch and analysing sleep, the system-wide events · 92 unmodified lines | ||
| 93 | 93 | for a duration of time can be examined. |
| 94 | 94 | |
| 95 | 95 | $ perf stat -a \ |
| 96 | − -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ | |
| 97 | − -e kmem:mm_pagevec_free \ | |
| 96 | + -e kmem:mm_page_alloc -e kmem:mm_page_free \ | |
| 97 | + -e kmem:mm_page_free_batched \ | |
| 98 | 98 | sleep 10 |
| 99 | 99 | Performance counter stats for 'sleep 10': |
| 100 | 100 | |
| 101 | 101 | 9630 kmem:mm_page_alloc |
| 102 | − 2143 kmem:mm_page_free_direct | |
| 103 | − 7424 kmem:mm_pagevec_free | |
| 102 | + 2143 kmem:mm_page_free | |
| 103 | + 7424 kmem:mm_page_free_batched | |
| 104 | 104 | |
| 105 | 105 | 10.002577764 seconds time elapsed |
| 106 | 106 | |
| @@ -119,15 +119,15 @@ basis using set_ftrace_pid. · 12 unmodified lines | ||
| 119 | 119 | Events can be activated and tracked for the duration of a process on a local |
| 120 | 120 | basis using PCL such as follows. |
| 121 | 121 | |
| 122 | − $ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ | |
| 123 | − -e kmem:mm_pagevec_free ./hackbench 10 | |
| 122 | + $ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free \ | |
| 123 | + -e kmem:mm_page_free_batched ./hackbench 10 | |
| 124 | 124 | Time: 0.909 |
| 125 | 125 | |
| 126 | 126 | Performance counter stats for './hackbench 10': |
| 127 | 127 | |
| 128 | 128 | 17803 kmem:mm_page_alloc |
| 129 | − 12398 kmem:mm_page_free_direct | |
| 130 | − 4827 kmem:mm_pagevec_free | |
| 129 | + 12398 kmem:mm_page_free | |
| 130 | + 4827 kmem:mm_page_free_batched | |
| 131 | 131 | |
| 132 | 132 | 0.973913387 seconds time elapsed |
| 133 | 133 | |
| @@ -146,8 +146,8 @@ to know what the standard deviation is. By and large, this is left to the · 12 unmodified lines | ||
| 146 | 146 | performance analyst to do it by hand. In the event that the discrete event |
| 147 | 147 | occurrences are useful to the performance analyst, then perf can be used. |
| 148 | 148 | |
| 149 | − $ perf stat --repeat 5 -e kmem:mm_page_alloc -e kmem:mm_page_free_direct | |
| 150 | − -e kmem:mm_pagevec_free ./hackbench 10 | |
| 149 | + $ perf stat --repeat 5 -e kmem:mm_page_alloc -e kmem:mm_page_free | |
| 150 | + -e kmem:mm_page_free_batched ./hackbench 10 | |
| 151 | 151 | Time: 0.890 |
| 152 | 152 | Time: 0.895 |
| 153 | 153 | Time: 0.915 |
| @@ -157,8 +157,8 @@ occurrences are useful to the performance analyst, then perf can be used. · 3 unmodified lines | ||
| 157 | 157 | Performance counter stats for './hackbench 10' (5 runs): |
| 158 | 158 | |
| 159 | 159 | 16630 kmem:mm_page_alloc ( +- 3.542% ) |
| 160 | − 11486 kmem:mm_page_free_direct ( +- 4.771% ) | |
| 161 | − 4730 kmem:mm_pagevec_free ( +- 2.325% ) | |
| 160 | + 11486 kmem:mm_page_free ( +- 4.771% ) | |
| 161 | + 4730 kmem:mm_page_free_batched ( +- 2.325% ) | |
| 162 | 162 | |
| 163 | 163 | 0.982653002 seconds time elapsed ( +- 1.448% ) |
| 164 | 164 | |
| @@ -168,15 +168,15 @@ aggregation of discrete events, then a script would need to be developed. · 3 unmodified lines | ||
| 168 | 168 | Using --repeat, it is also possible to view how events are fluctuating over |
| 169 | 169 | time on a system-wide basis using -a and sleep. |
| 170 | 170 | |
| 171 | − $ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ | |
| 172 | − -e kmem:mm_pagevec_free \ | |
| 171 | + $ perf stat -e kmem:mm_page_alloc -e kmem:mm_page_free \ | |
| 172 | + -e kmem:mm_page_free_batched \ | |
| 173 | 173 | -a --repeat 10 \ |
| 174 | 174 | sleep 1 |
| 175 | 175 | Performance counter stats for 'sleep 1' (10 runs): |
| 176 | 176 | |
| 177 | 177 | 1066 kmem:mm_page_alloc ( +- 26.148% ) |
| 178 | − 182 kmem:mm_page_free_direct ( +- 5.464% ) | |
| 179 | − 890 kmem:mm_pagevec_free ( +- 30.079% ) | |
| 178 | + 182 kmem:mm_page_free ( +- 5.464% ) | |
| 179 | + 890 kmem:mm_page_free_batched ( +- 30.079% ) | |
| 180 | 180 | |
| 181 | 181 | 1.002251757 seconds time elapsed ( +- 0.005% ) |
| 182 | 182 | |
| @@ -220,8 +220,8 @@ were generating events within the kernel. To begin this sort of analysis, the · 37 unmodified lines | ||
| 220 | 220 | data must be recorded. At the time of writing, this required root: |
| 221 | 221 | |
| 222 | 222 | $ perf record -c 1 \ |
| 223 | − -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ | |
| 224 | − -e kmem:mm_pagevec_free \ | |
| 223 | + -e kmem:mm_page_alloc -e kmem:mm_page_free \ | |
| 224 | + -e kmem:mm_page_free_batched \ | |
| 225 | 225 | ./hackbench 10 |
| 226 | 226 | Time: 0.894 |
| 227 | 227 | [ perf record: Captured and wrote 0.733 MB perf.data (~32010 samples) ] |
| @@ -260,8 +260,8 @@ noticed that X was generating an insane amount of page allocations so let's look · 32 unmodified lines | ||
| 260 | 260 | at it: |
| 261 | 261 | |
| 262 | 262 | $ perf record -c 1 -f \ |
| 263 | − -e kmem:mm_page_alloc -e kmem:mm_page_free_direct \ | |
| 264 | − -e kmem:mm_pagevec_free \ | |
| 263 | + -e kmem:mm_page_alloc -e kmem:mm_page_free \ | |
| 264 | + -e kmem:mm_page_free_batched \ | |
| 265 | 265 | -p `pidof X` |
| 266 | 266 | |
| 267 | 267 | This was interrupted after a few seconds and |
| @@ -47,10 +47,11 @@ This allows to filter away annoying devices that talk continuously. · 46 unmodified lines | ||
| 47 | 47 | |
| 48 | 48 | 2. Find which bus connects to the desired device |
| 49 | 49 | |
| 50 | −Run "cat /proc/bus/usb/devices", and find the T-line which corresponds to | |
| 51 | −the device. Usually you do it by looking for the vendor string. If you have | |
| 52 | −many similar devices, unplug one and compare two /proc/bus/usb/devices outputs. | |
| 53 | −The T-line will have a bus number. Example: | |
| 50 | +Run "cat /sys/kernel/debug/usb/devices", and find the T-line which corresponds | |
| 51 | +to the device. Usually you do it by looking for the vendor string. If you have | |
| 52 | +many similar devices, unplug one and compare the two | |
| 53 | +/sys/kernel/debug/usb/devices outputs. The T-line will have a bus number. | |
| 54 | +Example: | |
| 54 | 55 | |
| 55 | 56 | T: Bus=03 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=12 MxCh= 0 |
| 56 | 57 | D: Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS= 8 #Cfgs= 1 |
| @@ -58,7 +59,10 @@ P: Vendor=0557 ProdID=2004 Rev= 1.00 · 1 unmodified line | ||
| 58 | 59 | S: Manufacturer=ATEN |
| 59 | 60 | S: Product=UC100KM V2.00 |
| 60 | 61 | |
| 61 | −Bus=03 means it's bus 3. | |
| 62 | +"Bus=03" means it's bus 3. Alternatively, you can look at the output from | |
| 63 | +"lsusb" and get the bus number from the appropriate line. Example: | |
| 64 | + | |
| 65 | +Bus 003 Device 002: ID 0557:2004 ATEN UC100KM V2.00 | |
| 62 | 66 | |
| 63 | 67 | 3. Start 'cat' |
| 64 | 68 | |
| @@ -177,7 +177,7 @@ II. Credits · 176 unmodified lines | ||
| 177 | 177 | |
| 178 | 178 | Benjamin Herrenschmidt (IBM?) started this work when he discussed such design |
| 179 | 179 | with the Xorg community in 2005 [1, 2]. In the end of 2007, Paulo Zanoni and |
| 180 | −Tiago Vignatti (both of C3SL/Federal University of Paran�) proceeded his work | |
| 180 | +Tiago Vignatti (both of C3SL/Federal University of Paraná) proceeded his work | |
| 181 | 181 | enhancing the kernel code to adapt as a kernel module and also did the |
| 182 | 182 | implementation of the user space side [3]. Now (2009) Tiago Vignatti and Dave |
| 183 | 183 | Airlie finally put this work in shape and queued to Jesse Barnes' PCI tree. |
| @@ -1,5 +1,5 @@ | ||
| 1 | 1 | 0 -> Unknown board (au0828) |
| 2 | − 1 -> Hauppauge HVR950Q (au0828) [2040:7200,2040:7210,2040:7217,2040:721b,2040:721e,2040:721f,2040:7280,0fd9:0008] | |
| 2 | + 1 -> Hauppauge HVR950Q (au0828) [2040:7200,2040:7210,2040:7217,2040:721b,2040:721e,2040:721f,2040:7280,0fd9:0008,2040:7260,2040:7213] | |
| 3 | 3 | 2 -> Hauppauge HVR850 (au0828) [2040:7240] |
| 4 | 4 | 3 -> DViCO FusionHDTV USB (au0828) [0fe9:d620] |
| 5 | 5 | 4 -> Hauppauge HVR950Q rev xxF8 (au0828) [2040:7201,2040:7211,2040:7281] |
| @@ -71,7 +71,7 @@ · 70 unmodified lines | ||
| 71 | 71 | 70 -> Prolink Pixelview PV-BT878P+ (Rev.4C,8E) |
| 72 | 72 | 71 -> Lifeview FlyVideo 98EZ (capture only) LR51 [1851:1851] |
| 73 | 73 | 72 -> Prolink Pixelview PV-BT878P+9B (PlayTV Pro rev.9B FM+NICAM) [1554:4011] |
| 74 | − 73 -> Sensoray 311 [6000:0311] | |
| 74 | + 73 -> Sensoray 311/611 [6000:0311,6000:0611] | |
| 75 | 75 | 74 -> RemoteVision MX (RV605) |
| 76 | 76 | 75 -> Powercolor MTV878/ MTV878R/ MTV878F |
| 77 | 77 | 76 -> Canopus WinDVR PCI (COMPAQ Presario 3524JP, 5112JP) [0e11:0079] |
| @@ -158,3 +158,4 @@ · 80 unmodified lines | ||
| 158 | 158 | 157 -> Geovision GV-800(S) (master) [800a:763d] |
| 159 | 159 | 158 -> Geovision GV-800(S) (slave) [800b:763d,800c:763d,800d:763d] |
| 160 | 160 | 159 -> ProVideo PV183 [1830:1540,1831:1540,1832:1540,1833:1540,1834:1540,1835:1540,1836:1540,1837:1540] |
| 161 | +160 -> Tongwei Video Technology TD-3116 [f200:3116] | |
| @@ -29,3 +29,6 @@ · 28 unmodified lines | ||
| 29 | 29 | 28 -> LEADTEK WinFast PxTV1200 [107d:6f22] |
| 30 | 30 | 29 -> GoTView X5 3D Hybrid [5654:2390] |
| 31 | 31 | 30 -> NetUP Dual DVB-T/C-CI RF [1b55:e2e4] |
| 32 | + 31 -> Leadtek Winfast PxDVR3200 H XC4000 [107d:6f39] | |
| 33 | + 32 -> MPX-885 | |
| 34 | + 33 -> Mygica X8507 [14f1:8502] | |
| @@ -85,3 +85,5 @@ · 84 unmodified lines | ||
| 85 | 85 | 84 -> Samsung SMT 7020 DVB-S [18ac:dc00,18ac:dccd] |
| 86 | 86 | 85 -> Twinhan VP-1027 DVB-S [1822:0023] |
| 87 | 87 | 86 -> TeVii S464 DVB-S/S2 [d464:9022] |
| 88 | + 87 -> Leadtek WinFast DTV2000 H PLUS [107d:6f42] | |
| 89 | + 88 -> Leadtek WinFast DTV1800 H (XC4000) [107d:6f38] | |
| @@ -11,7 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | 10 -> Hauppauge WinTV HVR 900 (em2880) [2040:6500] |
| 12 | 12 | 11 -> Terratec Hybrid XS (em2880) |
| 13 | 13 | 12 -> Kworld PVR TV 2800 RF (em2820/em2840) |
| 14 | − 13 -> Terratec Prodigy XS (em2880) [0ccd:0047] | |
| 14 | + 13 -> Terratec Prodigy XS (em2880) | |
| 15 | 15 | 14 -> SIIG AVTuner-PVR / Pixelview Prolink PlayTV USB 2.0 (em2820/em2840) |
| 16 | 16 | 15 -> V-Gear PocketTV (em2800) |
| 17 | 17 | 16 -> Hauppauge WinTV HVR 950 (em2883) [2040:6513,2040:6517,2040:651b] |
| @@ -40,7 +40,7 @@ · 22 unmodified lines | ||
| 40 | 40 | 39 -> KWorld PVRTV 300U (em2861) [eb1a:e300] |
| 41 | 41 | 40 -> Plextor ConvertX PX-TV100U (em2861) [093b:a005] |
| 42 | 42 | 41 -> Kworld 350 U DVB-T (em2870) [eb1a:e350] |
| 43 | − 42 -> Kworld 355 U DVB-T (em2870) [eb1a:e355,eb1a:e357] | |
| 43 | + 42 -> Kworld 355 U DVB-T (em2870) [eb1a:e355,eb1a:e357,eb1a:e359] | |
| 44 | 44 | 43 -> Terratec Cinergy T XS (em2870) [0ccd:0043] |
| 45 | 45 | 44 -> Terratec Cinergy T XS (MT2060) (em2870) |
| 46 | 46 | 45 -> Pinnacle PCTV DVB-T (em2870) |
| @@ -64,7 +64,7 @@ · 17 unmodified lines | ||
| 64 | 64 | 64 -> Easy Cap Capture DC-60 (em2860) |
| 65 | 65 | 65 -> IO-DATA GV-MVP/SZ (em2820/em2840) [04bb:0515] |
| 66 | 66 | 66 -> Empire dual TV (em2880) |
| 67 | − 67 -> Terratec Grabby (em2860) [0ccd:0096] | |
| 67 | + 67 -> Terratec Grabby (em2860) [0ccd:0096,0ccd:10AF] | |
| 68 | 68 | 68 -> Terratec AV350 (em2860) [0ccd:0084] |
| 69 | 69 | 69 -> KWorld ATSC 315U HDTV TV Box (em2882) [eb1a:a313] |
| 70 | 70 | 70 -> Evga inDtube (em2882) |
| @@ -76,3 +76,7 @@ · 5 unmodified lines | ||
| 76 | 76 | 76 -> KWorld PlusTV 340U or UB435-Q (ATSC) (em2870) [1b80:a340] |
| 77 | 77 | 77 -> EM2874 Leadership ISDBT (em2874) |
| 78 | 78 | 78 -> PCTV nanoStick T2 290e (em28174) |
| 79 | + 79 -> Terratec Cinergy H5 (em2884) [0ccd:10a2,0ccd:10ad] | |
| 80 | + 80 -> PCTV DVB-S2 Stick (460e) (em28174) | |
| 81 | + 81 -> Hauppauge WinTV HVR 930C (em2884) [2040:1605] | |
| 82 | + 82 -> Terratec Cinergy HTC Stick (em2884) [0ccd:00b2] | |
| @@ -186,3 +186,4 @@ · 185 unmodified lines | ||
| 186 | 186 | 185 -> MagicPro ProHDTV Pro2 DMB-TH/Hybrid [17de:d136] |
| 187 | 187 | 186 -> Beholder BeholdTV 501 [5ace:5010] |
| 188 | 188 | 187 -> Beholder BeholdTV 503 FM [5ace:5030] |
| 189 | +188 -> Sensoray 811/911 [6000:0811,6000:0911] | |
| @@ -7,3 +7,5 @@ · 6 unmodified lines | ||
| 7 | 7 | 6 -> Hauppauge WinTV-HVR2200 [0070:8901] |
| 8 | 8 | 7 -> Hauppauge WinTV-HVR2250 [0070:8891,0070:8851] |
| 9 | 9 | 8 -> Hauppauge WinTV-HVR2250 [0070:88A1] |
| 10 | + 9 -> Hauppauge WinTV-HVR2200 [0070:8940] | |
| 11 | + 10 -> Hauppauge WinTV-HVR2200 [0070:8953] | |
| @@ -189,6 +189,7 @@ ov519 05a9:0511 Video Blaster WebCam 3/WebCam Plus, D-Link USB Digital Video Ca · 188 unmodified lines | ||
| 189 | 189 | ov519 05a9:0518 Creative WebCam |
| 190 | 190 | ov519 05a9:0519 OV519 Microphone |
| 191 | 191 | ov519 05a9:0530 OmniVision |
| 192 | +ov534_9 05a9:1550 OmniVision VEHO Filmscanner | |
| 192 | 193 | ov519 05a9:2800 OmniVision SuperCAM |
| 193 | 194 | ov519 05a9:4519 Webcam Classic |
| 194 | 195 | ov534_9 05a9:8065 OmniVision test kit ov538+ov9712 |
| @@ -278,6 +279,7 @@ pac7302 093a:2628 Genius iLook 300 · 83 unmodified lines | ||
| 278 | 279 | pac7302 093a:2629 Genious iSlim 300 |
| 279 | 280 | pac7302 093a:262a Webcam 300k |
| 280 | 281 | pac7302 093a:262c Philips SPC 230 NC |
| 282 | +jl2005bcd 0979:0227 Various brands, 19 known cameras supported | |
| 281 | 283 | jeilinj 0979:0280 Sakar 57379 |
| 282 | 284 | jeilinj 0979:0280 Sportscam DV15 |
| 283 | 285 | zc3xx 0ac8:0302 Z-star Vimicro zc0302 |
| @@ -666,27 +666,6 @@ a control of this type whenever the first control belonging to a new control · 665 unmodified lines | ||
| 666 | 666 | class is added. |
| 667 | 667 | |
| 668 | 668 | |
| 669 | −Differences from the Spec | |
| 670 | −========================= | |
| 671 | − | |
| 672 | −There are a few places where the framework acts slightly differently from the | |
| 673 | −V4L2 Specification. Those differences are described in this section. We will | |
| 674 | −have to see whether we need to adjust the spec or not. | |
| 675 | − | |
| 676 | −1) It is no longer required to have all controls contained in a | |
| 677 | −v4l2_ext_control array be from the same control class. The framework will be | |
| 678 | −able to handle any type of control in the array. You need to set ctrl_class | |
| 679 | −to 0 in order to enable this. If ctrl_class is non-zero, then it will still | |
| 680 | −check that all controls belong to that control class. | |
| 681 | − | |
| 682 | −If you set ctrl_class to 0 and count to 0, then it will only return an error | |
| 683 | −if there are no controls at all. | |
| 684 | − | |
| 685 | −2) Clarified the way error_idx works. For get and set it will be equal to | |
| 686 | −count if nothing was done yet. If it is less than count then only the controls | |
| 687 | −up to error_idx-1 were successfully applied. | |
| 688 | − | |
| 689 | − | |
| 690 | 669 | Proposals for Extensions |
| 691 | 670 | ======================== |
| 692 | 671 | |
| @@ -612,6 +612,12 @@ You can set a pointer to a mutex_lock in struct video_device. Usually this · 611 unmodified lines | ||
| 612 | 612 | will be either a top-level mutex or a mutex per device node. If you want |
| 613 | 613 | finer-grained locking then you have to set it to NULL and do you own locking. |
| 614 | 614 | |
| 615 | +It is up to the driver developer to decide which method to use. However, if | |
| 616 | +your driver has high-latency operations (for example, changing the exposure | |
| 617 | +of a USB webcam might take a long time), then you might be better off with | |
| 618 | +doing your own locking if you want to allow the user to do other things with | |
| 619 | +the device while waiting for the high-latency command to finish. | |
| 620 | + | |
| 615 | 621 | If a lock is specified then all file operations will be serialized on that |
| 616 | 622 | lock. If you use videobuf then you must pass the same lock to the videobuf |
| 617 | 623 | queue initialize function: if videobuf has to wait for a frame to arrive, then |
| @@ -619,6 +625,11 @@ it will temporarily unlock the lock and relock it afterwards. If your driver · 1 unmodified line | ||
| 619 | 625 | also waits in the code, then you should do the same to allow other processes |
| 620 | 626 | to access the device node while the first process is waiting for something. |
| 621 | 627 | |
| 628 | +In the case of videobuf2 you will need to implement the wait_prepare and | |
| 629 | +wait_finish callbacks to unlock/lock if applicable. In particular, if you use | |
| 630 | +the lock in struct video_device then you must unlock/lock this mutex in | |
| 631 | +wait_prepare and wait_finish. | |
| 632 | + | |
| 622 | 633 | The implementation of a hotplug disconnect should also take the lock before |
| 623 | 634 | calling v4l2_device_disconnect. |
| 624 | 635 | |
| @@ -1466,6 +1466,31 @@ is supported; 2 if the processor requires all virtual machines to have · 1465 unmodified lines | ||
| 1466 | 1466 | an RMA, or 1 if the processor can use an RMA but doesn't require it, |
| 1467 | 1467 | because it supports the Virtual RMA (VRMA) facility. |
| 1468 | 1468 | |
| 1469 | +4.64 KVM_NMI | |
| 1470 | + | |
| 1471 | +Capability: KVM_CAP_USER_NMI | |
| 1472 | +Architectures: x86 | |
| 1473 | +Type: vcpu ioctl | |
| 1474 | +Parameters: none | |
| 1475 | +Returns: 0 on success, -1 on error | |
| 1476 | + | |
| 1477 | +Queues an NMI on the thread's vcpu. Note this is well defined only | |
| 1478 | +when KVM_CREATE_IRQCHIP has not been called, since this is an interface | |
| 1479 | +between the virtual cpu core and virtual local APIC. After KVM_CREATE_IRQCHIP | |
| 1480 | +has been called, this interface is completely emulated within the kernel. | |
| 1481 | + | |
| 1482 | +To use this to emulate the LINT1 input with KVM_CREATE_IRQCHIP, use the | |
| 1483 | +following algorithm: | |
| 1484 | + | |
| 1485 | + - pause the vpcu | |
| 1486 | + - read the local APIC's state (KVM_GET_LAPIC) | |
| 1487 | + - check whether changing LINT1 will queue an NMI (see the LVT entry for LINT1) | |
| 1488 | + - if so, issue KVM_NMI | |
| 1489 | + - resume the vcpu | |
| 1490 | + | |
| 1491 | +Some guests configure the LINT1 NMI input to cause a panic, aiding in | |
| 1492 | +debugging. | |
| 1493 | + | |
| 1469 | 1494 | 5. The kvm_run structure |
| 1470 | 1495 | |
| 1471 | 1496 | Application code obtains a pointer to the kvm_run structure by |
| @@ -117,7 +117,7 @@ can be influenced by kernel parameters: · 116 unmodified lines | ||
| 117 | 117 | |
| 118 | 118 | slub_min_objects=x (default 4) |
| 119 | 119 | slub_min_order=x (default 0) |
| 120 | −slub_max_order=x (default 1) | |
| 120 | +slub_max_order=x (default 3 (PAGE_ALLOC_COSTLY_ORDER)) | |
| 121 | 121 | |
| 122 | 122 | slub_min_objects allows to specify how many objects must at least fit |
| 123 | 123 | into one slab in order for the allocation order to be acceptable. |
| @@ -131,7 +131,10 @@ slub_min_objects. · 7 unmodified lines | ||
| 131 | 131 | slub_max_order specified the order at which slub_min_objects should no |
| 132 | 132 | longer be checked. This is useful to avoid SLUB trying to generate |
| 133 | 133 | super large order pages to fit slub_min_objects of a slab cache with |
| 134 | −large object sizes into one high order page. | |
| 134 | +large object sizes into one high order page. Setting command line | |
| 135 | +parameter debug_guardpage_minorder=N (N > 0), forces setting | |
| 136 | +slub_max_order to 0, what cause minimum possible order of slabs | |
| 137 | +allocation. | |
| 135 | 138 | |
| 136 | 139 | SLUB Debug output |
| 137 | 140 | ----------------- |
| @@ -1,5 +1,7 @@ | ||
| 1 | 1 | 00-INDEX |
| 2 | 2 | - this file. |
| 3 | +convert_drivers_to_kernel_api.txt | |
| 4 | + - how-to for converting old watchdog drivers to the new kernel API. | |
| 3 | 5 | hpwdt.txt |
| 4 | 6 | - information on the HP iLO2 NMI watchdog |
| 5 | 7 | pcwd-watchdog.txt |
| @@ -163,6 +163,25 @@ Here is a simple example for a watchdog device: · 162 unmodified lines | ||
| 163 | 163 | +}; |
| 164 | 164 | |
| 165 | 165 | |
| 166 | +Handle the 'nowayout' feature | |
| 167 | +----------------------------- | |
| 168 | + | |
| 169 | +A few drivers use nowayout statically, i.e. there is no module parameter for it | |
| 170 | +and only CONFIG_WATCHDOG_NOWAYOUT determines if the feature is going to be | |
| 171 | +used. This needs to be converted by initializing the status variable of the | |
| 172 | +watchdog_device like this: | |
| 173 | + | |
| 174 | + .status = WATCHDOG_NOWAYOUT_INIT_STATUS, | |
| 175 | + | |
| 176 | +Most drivers, however, also allow runtime configuration of nowayout, usually | |
| 177 | +by adding a module parameter. The conversion for this would be something like: | |
| 178 | + | |
| 179 | + watchdog_set_nowayout(&s3c2410_wdd, nowayout); | |
| 180 | + | |
| 181 | +The module parameter itself needs to stay, everything else related to nowayout | |
| 182 | +can go, though. This will likely be some code in open(), close() or write(). | |
| 183 | + | |
| 184 | + | |
| 166 | 185 | Register the watchdog device |
| 167 | 186 | ---------------------------- |
| 168 | 187 | |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | The Linux WatchDog Timer Driver Core kernel API. |
| 2 | 2 | =============================================== |
| 3 | −Last reviewed: 22-Jul-2011 | |
| 3 | +Last reviewed: 29-Nov-2011 | |
| 4 | 4 | |
| 5 | 5 | Wim Van Sebroeck <wim@iguana.be> |
| 6 | 6 | |
| @@ -142,6 +142,14 @@ bit-operations. The status bits that are defined are: · 135 unmodified lines | ||
| 142 | 142 | * WDOG_NO_WAY_OUT: this bit stores the nowayout setting for the watchdog. |
| 143 | 143 | If this bit is set then the watchdog timer will not be able to stop. |
| 144 | 144 | |
| 145 | + To set the WDOG_NO_WAY_OUT status bit (before registering your watchdog | |
| 146 | + timer device) you can either: | |
| 147 | + * set it statically in your watchdog_device struct with | |
| 148 | + .status = WATCHDOG_NOWAYOUT_INIT_STATUS, | |
| 149 | + (this will set the value the same as CONFIG_WATCHDOG_NOWAYOUT) or | |
| 150 | + * use the following helper function: | |
| 151 | + static inline void watchdog_set_nowayout(struct watchdog_device *wdd, int nowayout) | |
| 152 | + | |
| 145 | 153 | Note: The WatchDog Timer Driver Core supports the magic close feature and |
| 146 | 154 | the nowayout feature. To use the magic close feature you must set the |
| 147 | 155 | WDIOF_MAGICCLOSE bit in the options field of the watchdog's info structure. |
| @@ -184,11 +184,6 @@ S: Maintained · 183 unmodified lines | ||
| 184 | 184 | F: Documentation/filesystems/9p.txt |
| 185 | 185 | F: fs/9p/ |
| 186 | 186 | |
| 187 | −A2232 SERIAL BOARD DRIVER | |
| 188 | −L: linux-m68k@lists.linux-m68k.org | |
| 189 | −S: Orphan | |
| 190 | −F: drivers/staging/generic_serial/ser_a2232* | |
| 191 | − | |
| 192 | 187 | AACRAID SCSI RAID DRIVER |
| 193 | 188 | M: Adaptec OEM Raid Solutions <aacraid@adaptec.com> |
| 194 | 189 | L: linux-scsi@vger.kernel.org |
| @@ -347,7 +342,7 @@ S: Supported · 152 unmodified lines | ||
| 347 | 342 | F: drivers/mfd/adp5520.c |
| 348 | 343 | F: drivers/video/backlight/adp5520_bl.c |
| 349 | 344 | F: drivers/leds/leds-adp5520.c |
| 350 | −F: drivers/gpio/adp5520-gpio.c | |
| 345 | +F: drivers/gpio/gpio-adp5520.c | |
| 351 | 346 | F: drivers/input/keyboard/adp5520-keys.c |
| 352 | 347 | |
| 353 | 348 | ADP5588 QWERTY KEYPAD AND IO EXPANDER DRIVER (ADP5588/ADP5587) |
| @@ -356,7 +351,7 @@ L: device-drivers-devel@blackfin.uclinux.org · 2 unmodified lines | ||
| 356 | 351 | W: http://wiki.analog.com/ADP5588 |
| 357 | 352 | S: Supported |
| 358 | 353 | F: drivers/input/keyboard/adp5588-keys.c |
| 359 | −F: drivers/gpio/adp5588-gpio.c | |
| 354 | +F: drivers/gpio/gpio-adp5588.c | |
| 360 | 355 | |
| 361 | 356 | ADP8860 BACKLIGHT DRIVER (ADP8860/ADP8861/ADP8863) |
| 362 | 357 | M: Michael Hennerich <michael.hennerich@analog.com> |
| @@ -542,6 +537,7 @@ F: sound/soc/codecs/adau* · 179 unmodified lines | ||
| 542 | 537 | F: sound/soc/codecs/adav* |
| 543 | 538 | F: sound/soc/codecs/ad1* |
| 544 | 539 | F: sound/soc/codecs/ssm* |
| 540 | +F: sound/soc/codecs/sigmadsp.* | |
| 545 | 541 | |
| 546 | 542 | ANALOG DEVICES INC ASOC DRIVERS |
| 547 | 543 | L: uclinux-dist-devel@blackfin.uclinux.org |
| @@ -749,6 +745,7 @@ M: Barry Song <baohua.song@csr.com> · 201 unmodified lines | ||
| 749 | 745 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 750 | 746 | S: Maintained |
| 751 | 747 | F: arch/arm/mach-prima2/ |
| 748 | +F: drivers/dma/sirf-dma* | |
| 752 | 749 | |
| 753 | 750 | ARM/EBSA110 MACHINE SUPPORT |
| 754 | 751 | M: Russell King <linux@arm.linux.org.uk> |
| @@ -919,7 +916,6 @@ M: Lennert Buytenhek <kernel@wantstofly.org> · 164 unmodified lines | ||
| 919 | 916 | M: Nicolas Pitre <nico@fluxnic.net> |
| 920 | 917 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 921 | 918 | S: Odd Fixes |
| 922 | −F: arch/arm/mach-loki/ | |
| 923 | 919 | F: arch/arm/mach-kirkwood/ |
| 924 | 920 | F: arch/arm/mach-mv78xx0/ |
| 925 | 921 | F: arch/arm/mach-orion5x/ |
| @@ -1081,8 +1077,8 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 155 unmodified lines | ||
| 1081 | 1077 | S: Maintained |
| 1082 | 1078 | F: arch/arm/mach-s5pv210/mach-aquila.c |
| 1083 | 1079 | F: arch/arm/mach-s5pv210/mach-goni.c |
| 1084 | −F: arch/arm/mach-exynos4/mach-universal_c210.c | |
| 1085 | −F: arch/arm/mach-exynos4/mach-nuri.c | |
| 1080 | +F: arch/arm/mach-exynos/mach-universal_c210.c | |
| 1081 | +F: arch/arm/mach-exynos/mach-nuri.c | |
| 1086 | 1082 | |
| 1087 | 1083 | ARM/SAMSUNG S5P SERIES FIMC SUPPORT |
| 1088 | 1084 | M: Kyungmin Park <kyungmin.park@samsung.com> |
| @@ -1110,7 +1106,6 @@ M: Tomasz Stanislawski <t.stanislaws@samsung.com> · 21 unmodified lines | ||
| 1110 | 1106 | L: linux-arm-kernel@lists.infradead.org |
| 1111 | 1107 | L: linux-media@vger.kernel.org |
| 1112 | 1108 | S: Maintained |
| 1113 | −F: arch/arm/plat-s5p/dev-tv.c | |
| 1114 | 1109 | F: drivers/media/video/s5p-tv/ |
| 1115 | 1110 | |
| 1116 | 1111 | ARM/SHMOBILE ARM ARCHITECTURE |
| @@ -1124,13 +1119,6 @@ S: Supported · 7 unmodified lines | ||
| 1124 | 1119 | F: arch/arm/mach-shmobile/ |
| 1125 | 1120 | F: drivers/sh/ |
| 1126 | 1121 | |
| 1127 | −ARM/TELECHIPS ARM ARCHITECTURE | |
| 1128 | −M: "Hans J. Koch" <hjk@hansjkoch.de> | |
| 1129 | −L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 1130 | −S: Maintained | |
| 1131 | −F: arch/arm/plat-tcc/ | |
| 1132 | −F: arch/arm/mach-tcc8k/ | |
| 1133 | − | |
| 1134 | 1122 | ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT |
| 1135 | 1123 | M: Lennert Buytenhek <kernel@wantstofly.org> |
| 1136 | 1124 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| @@ -1152,14 +1140,13 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 15 unmodified lines | ||
| 1152 | 1140 | W: http://www.mcuos.com |
| 1153 | 1141 | S: Maintained |
| 1154 | 1142 | F: arch/arm/mach-w90x900/ |
| 1155 | −F: arch/arm/mach-nuc93x/ | |
| 1156 | 1143 | F: drivers/input/keyboard/w90p910_keypad.c |
| 1157 | 1144 | F: drivers/input/touchscreen/w90p910_ts.c |
| 1158 | 1145 | F: drivers/watchdog/nuc900_wdt.c |
| 1159 | 1146 | F: drivers/net/ethernet/nuvoton/w90p910_ether.c |
| 1160 | 1147 | F: drivers/mtd/nand/nuc900_nand.c |
| 1161 | 1148 | F: drivers/rtc/rtc-nuc900.c |
| 1162 | −F: drivers/spi/spi_nuc900.c | |
| 1149 | +F: drivers/spi/spi-nuc900.c | |
| 1163 | 1150 | F: drivers/usb/host/ehci-w90x900.c |
| 1164 | 1151 | F: drivers/video/nuc900fb.c |
| 1165 | 1152 | |
| @@ -1184,7 +1171,6 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 18 unmodified lines | ||
| 1184 | 1171 | S: Maintained |
| 1185 | 1172 | F: arch/arm/mach-ux500/ |
| 1186 | 1173 | F: drivers/dma/ste_dma40* |
| 1187 | −F: drivers/mfd/ab3550* | |
| 1188 | 1174 | F: drivers/mfd/abx500* |
| 1189 | 1175 | F: drivers/mfd/ab8500* |
| 1190 | 1176 | F: drivers/mfd/stmpe* |
| @@ -1364,7 +1350,7 @@ F: drivers/net/ethernet/cadence/ · 173 unmodified lines | ||
| 1364 | 1350 | ATMEL SPI DRIVER |
| 1365 | 1351 | M: Nicolas Ferre <nicolas.ferre@atmel.com> |
| 1366 | 1352 | S: Supported |
| 1367 | −F: drivers/spi/atmel_spi.* | |
| 1353 | +F: drivers/spi/spi-atmel.* | |
| 1368 | 1354 | |
| 1369 | 1355 | ATMEL USBA UDC DRIVER |
| 1370 | 1356 | M: Nicolas Ferre <nicolas.ferre@atmel.com> |
| @@ -1426,6 +1412,7 @@ F: net/ax25/ · 55 unmodified lines | ||
| 1426 | 1412 | B43 WIRELESS DRIVER |
| 1427 | 1413 | M: Stefano Brivio <stefano.brivio@polimi.it> |
| 1428 | 1414 | L: linux-wireless@vger.kernel.org |
| 1415 | +L: b43-dev@lists.infradead.org (moderated for non-subscribers) | |
| 1429 | 1416 | W: http://linuxwireless.org/en/users/Drivers/b43 |
| 1430 | 1417 | S: Maintained |
| 1431 | 1418 | F: drivers/net/wireless/b43/ |
| @@ -1503,7 +1490,7 @@ M: Sonic Zhang <sonic.zhang@analog.com> · 71 unmodified lines | ||
| 1503 | 1490 | L: uclinux-dist-devel@blackfin.uclinux.org |
| 1504 | 1491 | W: http://blackfin.uclinux.org |
| 1505 | 1492 | S: Supported |
| 1506 | −F: drivers/tty/serial/bfin_5xx.c | |
| 1493 | +F: drivers/tty/serial/bfin_uart.c | |
| 1507 | 1494 | |
| 1508 | 1495 | BLACKFIN WATCHDOG DRIVER |
| 1509 | 1496 | M: Mike Frysinger <vapier.adi@gmail.com> |
| @@ -1594,7 +1581,7 @@ M: Franky (Zhenhui) Lin <frankyl@broadcom.com> · 84 unmodified lines | ||
| 1594 | 1581 | M: Kan Yan <kanyan@broadcom.com> |
| 1595 | 1582 | L: linux-wireless@vger.kernel.org |
| 1596 | 1583 | S: Supported |
| 1597 | −F: drivers/staging/brcm80211/ | |
| 1584 | +F: drivers/net/wireless/brcm80211/ | |
| 1598 | 1585 | |
| 1599 | 1586 | BROADCOM BNX2FC 10 GIGABIT FCOE DRIVER |
| 1600 | 1587 | M: Bhanu Prakash Gollapudi <bprakash@broadcom.com> |
| @@ -1602,6 +1589,13 @@ L: linux-scsi@vger.kernel.org · 1 unmodified line | ||
| 1602 | 1589 | S: Supported |
| 1603 | 1590 | F: drivers/scsi/bnx2fc/ |
| 1604 | 1591 | |
| 1592 | +BROADCOM SPECIFIC AMBA DRIVER (BCMA) | |
| 1593 | +M: Rafał Miłecki <zajec5@gmail.com> | |
| 1594 | +L: linux-wireless@vger.kernel.org | |
| 1595 | +S: Maintained | |
| 1596 | +F: drivers/bcma/ | |
| 1597 | +F: include/linux/bcma/ | |
| 1598 | + | |
| 1605 | 1599 | BROCADE BFA FC SCSI DRIVER |
| 1606 | 1600 | M: Jing Huang <huangj@brocade.com> |
| 1607 | 1601 | L: linux-scsi@vger.kernel.org |
| @@ -1633,7 +1627,7 @@ BT8XXGPIO DRIVER · 25 unmodified lines | ||
| 1633 | 1627 | M: Michael Buesch <m@bues.ch> |
| 1634 | 1628 | W: http://bu3sch.de/btgpio.php |
| 1635 | 1629 | S: Maintained |
| 1636 | −F: drivers/gpio/bt8xxgpio.c | |
| 1630 | +F: drivers/gpio/gpio-bt8xx.c | |
| 1637 | 1631 | |
| 1638 | 1632 | BTRFS FILE SYSTEM |
| 1639 | 1633 | M: Chris Mason <chris.mason@oracle.com> |
| @@ -1661,6 +1655,14 @@ T: git git://git.alsa-project.org/alsa-kernel.git · 21 unmodified lines | ||
| 1661 | 1655 | S: Maintained |
| 1662 | 1656 | F: sound/pci/oxygen/ |
| 1663 | 1657 | |
| 1658 | +C6X ARCHITECTURE | |
| 1659 | +M: Mark Salter <msalter@redhat.com> | |
| 1660 | +M: Aurelien Jacquiot <a-jacquiot@ti.com> | |
| 1661 | +L: linux-c6x-dev@linux-c6x.org | |
| 1662 | +W: http://www.linux-c6x.org/wiki/index.php/Main_Page | |
| 1663 | +S: Maintained | |
| 1664 | +F: arch/c6x/ | |
| 1665 | + | |
| 1664 | 1666 | CACHEFILES: FS-CACHE BACKEND FOR CACHING ON MOUNTED FILESYSTEMS |
| 1665 | 1667 | M: David Howells <dhowells@redhat.com> |
| 1666 | 1668 | L: linux-cachefs@redhat.com |
| @@ -1674,7 +1676,7 @@ L: linux-media@vger.kernel.org · 7 unmodified lines | ||
| 1674 | 1676 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git |
| 1675 | 1677 | S: Maintained |
| 1676 | 1678 | F: Documentation/video4linux/cafe_ccic |
| 1677 | −F: drivers/media/video/cafe_ccic* | |
| 1679 | +F: drivers/media/video/marvell-ccic/ | |
| 1678 | 1680 | |
| 1679 | 1681 | CAIF NETWORK LAYER |
| 1680 | 1682 | M: Sjur Braendeland <sjur.brandeland@stericsson.com> |
| @@ -1898,12 +1900,6 @@ L: platform-driver-x86@vger.kernel.org · 217 unmodified lines | ||
| 1898 | 1900 | S: Maintained |
| 1899 | 1901 | F: drivers/platform/x86/compal-laptop.c |
| 1900 | 1902 | |
| 1901 | −COMPUTONE INTELLIPORT MULTIPORT CARD | |
| 1902 | −W: http://www.wittsend.com/computone.html | |
| 1903 | −S: Orphan | |
| 1904 | −F: Documentation/serial/computone.txt | |
| 1905 | −F: drivers/staging/tty/ip2/ | |
| 1906 | − | |
| 1907 | 1903 | CONEXANT ACCESSRUNNER USB DRIVER |
| 1908 | 1904 | M: Simon Arlott <cxacru@fire.lp0.eu> |
| 1909 | 1905 | L: accessrunner-general@lists.sourceforge.net |
| @@ -2118,7 +2114,7 @@ DAVICOM FAST ETHERNET (DMFE) NETWORK DRIVER · 208 unmodified lines | ||
| 2118 | 2114 | L: netdev@vger.kernel.org |
| 2119 | 2115 | S: Orphan |
| 2120 | 2116 | F: Documentation/networking/dmfe.txt |
| 2121 | −F: drivers/net/ethernet/tulip/dmfe.c | |
| 2117 | +F: drivers/net/ethernet/dec/tulip/dmfe.c | |
| 2122 | 2118 | |
| 2123 | 2119 | DC390/AM53C974 SCSI driver |
| 2124 | 2120 | M: Kurt Garloff <garloff@suse.de> |
| @@ -2191,6 +2187,13 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git · 66 unmodified lines | ||
| 2191 | 2187 | S: Maintained |
| 2192 | 2188 | F: drivers/usb/dwc3/ |
| 2193 | 2189 | |
| 2190 | +DEVICE FREQUENCY (DEVFREQ) | |
| 2191 | +M: MyungJoo Ham <myungjoo.ham@samsung.com> | |
| 2192 | +M: Kyungmin Park <kyungmin.park@samsung.com> | |
| 2193 | +L: linux-kernel@vger.kernel.org | |
| 2194 | +S: Maintained | |
| 2195 | +F: drivers/devfreq/ | |
| 2196 | + | |
| 2194 | 2197 | DEVICE NUMBER REGISTRY |
| 2195 | 2198 | M: Torben Mathiasen <device@lanana.org> |
| 2196 | 2199 | W: http://lanana.org/docs/device-list/index.html |
| @@ -2207,15 +2210,6 @@ F: drivers/md/dm* · 10 unmodified lines | ||
| 2207 | 2210 | F: include/linux/device-mapper.h |
| 2208 | 2211 | F: include/linux/dm-*.h |
| 2209 | 2212 | |
| 2210 | −DIGI INTL. EPCA DRIVER | |
| 2211 | −M: "Digi International, Inc" <Eng.Linux@digi.com> | |
| 2212 | −L: Eng.Linux@digi.com | |
| 2213 | −W: http://www.digi.com | |
| 2214 | −S: Orphan | |
| 2215 | −F: Documentation/serial/digiepca.txt | |
| 2216 | −F: drivers/staging/tty/epca* | |
| 2217 | −F: drivers/staging/tty/digi* | |
| 2218 | − | |
| 2219 | 2213 | DIOLAN U2C-12 I2C DRIVER |
| 2220 | 2214 | M: Guenter Roeck <guenter.roeck@ericsson.com> |
| 2221 | 2215 | L: linux-i2c@vger.kernel.org |
| @@ -2836,6 +2830,14 @@ L: platform-driver-x86@vger.kernel.org · 614 unmodified lines | ||
| 2836 | 2830 | S: Maintained |
| 2837 | 2831 | F: drivers/platform/x86/fujitsu-laptop.c |
| 2838 | 2832 | |
| 2833 | +FUJITSU M-5MO LS CAMERA ISP DRIVER | |
| 2834 | +M: Kyungmin Park <kyungmin.park@samsung.com> | |
| 2835 | +M: Heungjun Kim <riverful.kim@samsung.com> | |
| 2836 | +L: linux-media@vger.kernel.org | |
| 2837 | +S: Maintained | |
| 2838 | +F: drivers/media/video/m5mols/ | |
| 2839 | +F: include/media/m5mols.h | |
| 2840 | + | |
| 2839 | 2841 | FUSE: FILESYSTEM IN USERSPACE |
| 2840 | 2842 | M: Miklos Szeredi <miklos@szeredi.hu> |
| 2841 | 2843 | L: fuse-devel@lists.sourceforge.net |
| @@ -2919,6 +2921,7 @@ F: include/linux/gigaset_dev.h · 77 unmodified lines | ||
| 2919 | 2921 | |
| 2920 | 2922 | GPIO SUBSYSTEM |
| 2921 | 2923 | M: Grant Likely <grant.likely@secretlab.ca> |
| 2924 | +M: Linus Walleij <linus.walleij@stericsson.com> | |
| 2922 | 2925 | S: Maintained |
| 2923 | 2926 | T: git git://git.secretlab.ca/git/linux-2.6.git |
| 2924 | 2927 | F: Documentation/gpio.txt |
| @@ -2936,7 +2939,7 @@ GRETH 10/100/1G Ethernet MAC device driver · 11 unmodified lines | ||
| 2936 | 2939 | M: Kristoffer Glembo <kristoffer@gaisler.com> |
| 2937 | 2940 | L: netdev@vger.kernel.org |
| 2938 | 2941 | S: Maintained |
| 2939 | −F: drivers/net/greth* | |
| 2942 | +F: drivers/net/ethernet/aeroflex/ | |
| 2940 | 2943 | |
| 2941 | 2944 | GSPCA FINEPIX SUBDRIVER |
| 2942 | 2945 | M: Frank Zago <frank@zago.net> |
| @@ -3188,6 +3191,16 @@ M: William Irwin <wli@holomorphy.com> · 245 unmodified lines | ||
| 3188 | 3191 | S: Maintained |
| 3189 | 3192 | F: fs/hugetlbfs/ |
| 3190 | 3193 | |
| 3194 | +Hyper-V CORE AND DRIVERS | |
| 3195 | +M: K. Y. Srinivasan <kys@microsoft.com> | |
| 3196 | +M: Haiyang Zhang <haiyangz@microsoft.com> | |
| 3197 | +L: devel@linuxdriverproject.org | |
| 3198 | +S: Maintained | |
| 3199 | +F: drivers/hv/ | |
| 3200 | +F: drivers/hid/hid-hyperv.c | |
| 3201 | +F: drivers/net/hyperv/ | |
| 3202 | +F: drivers/staging/hv/ | |
| 3203 | + | |
| 3191 | 3204 | I2C/SMBUS STUB DRIVER |
| 3192 | 3205 | M: "Mark M. Hoffman" <mhoffman@lightlink.com> |
| 3193 | 3206 | L: linux-i2c@vger.kernel.org |
| @@ -3197,6 +3210,7 @@ F: drivers/i2c/busses/i2c-stub.c · 3 unmodified lines | ||
| 3197 | 3210 | I2C SUBSYSTEM |
| 3198 | 3211 | M: "Jean Delvare (PC drivers, core)" <khali@linux-fr.org> |
| 3199 | 3212 | M: "Ben Dooks (embedded platforms)" <ben-linux@fluff.org> |
| 3213 | +M: "Wolfram Sang (embedded platforms)" <w.sang@pengutronix.de> | |
| 3200 | 3214 | L: linux-i2c@vger.kernel.org |
| 3201 | 3215 | W: http://i2c.wiki.kernel.org/ |
| 3202 | 3216 | T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/ |
| @@ -3583,8 +3597,7 @@ F: net/netfilter/ipvs/ · 380 unmodified lines | ||
| 3583 | 3597 | IPWIRELESS DRIVER |
| 3584 | 3598 | M: Jiri Kosina <jkosina@suse.cz> |
| 3585 | 3599 | M: David Sterba <dsterba@suse.cz> |
| 3586 | −S: Maintained | |
| 3587 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/ipwireless_cs.git | |
| 3600 | +S: Odd Fixes | |
| 3588 | 3601 | F: drivers/tty/ipwireless/ |
| 3589 | 3602 | |
| 3590 | 3603 | IPX NETWORK LAYER |
| @@ -3779,7 +3792,6 @@ S: Odd Fixes · 188 unmodified lines | ||
| 3779 | 3792 | |
| 3780 | 3793 | KERNEL NFSD, SUNRPC, AND LOCKD SERVERS |
| 3781 | 3794 | M: "J. Bruce Fields" <bfields@fieldses.org> |
| 3782 | −M: Neil Brown <neilb@suse.de> | |
| 3783 | 3795 | L: linux-nfs@vger.kernel.org |
| 3784 | 3796 | W: http://nfs.sourceforge.net/ |
| 3785 | 3797 | S: Supported |
| @@ -3877,8 +3889,7 @@ L: keyrings@linux-nfs.org · 91 unmodified lines | ||
| 3877 | 3889 | S: Supported |
| 3878 | 3890 | F: Documentation/security/keys-trusted-encrypted.txt |
| 3879 | 3891 | F: include/keys/encrypted-type.h |
| 3880 | −F: security/keys/encrypted.c | |
| 3881 | −F: security/keys/encrypted.h | |
| 3892 | +F: security/keys/encrypted-keys/ | |
| 3882 | 3893 | |
| 3883 | 3894 | KGDB / KDB /debug_core |
| 3884 | 3895 | M: Jason Wessel <jason.wessel@windriver.com> |
| @@ -4011,7 +4022,7 @@ M: Josh Boyer <jwboyer@gmail.com> · 126 unmodified lines | ||
| 4011 | 4022 | M: Matt Porter <mporter@kernel.crashing.org> |
| 4012 | 4023 | W: http://www.penguinppc.org/ |
| 4013 | 4024 | L: linuxppc-dev@lists.ozlabs.org |
| 4014 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx.git | |
| 4025 | +T: git git://git.infradead.org/users/jwboyer/powerpc-4xx.git | |
| 4015 | 4026 | S: Maintained |
| 4016 | 4027 | F: arch/powerpc/platforms/40x/ |
| 4017 | 4028 | F: arch/powerpc/platforms/44x/ |
| @@ -4689,6 +4700,8 @@ Q: http://patchwork.kernel.org/project/linux-omap/list/ · 671 unmodified lines | ||
| 4689 | 4700 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git |
| 4690 | 4701 | S: Maintained |
| 4691 | 4702 | F: arch/arm/*omap*/ |
| 4703 | +F: drivers/i2c/busses/i2c-omap.c | |
| 4704 | +F: include/linux/i2c-omap.h | |
| 4692 | 4705 | |
| 4693 | 4706 | OMAP CLOCK FRAMEWORK SUPPORT |
| 4694 | 4707 | M: Paul Walmsley <paul@pwsan.com> |
| @@ -4854,6 +4867,14 @@ S: Maintained · 159 unmodified lines | ||
| 4854 | 4867 | T: git git://openrisc.net/~jonas/linux |
| 4855 | 4868 | F: arch/openrisc |
| 4856 | 4869 | |
| 4870 | +OPENVSWITCH | |
| 4871 | +M: Jesse Gross <jesse@nicira.com> | |
| 4872 | +L: dev@openvswitch.org | |
| 4873 | +W: http://openvswitch.org | |
| 4874 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/jesse/openvswitch.git | |
| 4875 | +S: Maintained | |
| 4876 | +F: net/openvswitch/ | |
| 4877 | + | |
| 4857 | 4878 | OPL4 DRIVER |
| 4858 | 4879 | M: Clemens Ladisch <clemens@ladisch.de> |
| 4859 | 4880 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) |
| @@ -5120,10 +5141,19 @@ L: linux-mtd@lists.infradead.org · 260 unmodified lines | ||
| 5120 | 5141 | S: Maintained |
| 5121 | 5142 | F: drivers/mtd/devices/phram.c |
| 5122 | 5143 | |
| 5144 | +PICOXCELL SUPPORT | |
| 5145 | +M: Jamie Iles <jamie@jamieiles.com> | |
| 5146 | +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 5147 | +T: git git://github.com/jamieiles/linux-2.6-ji.git | |
| 5148 | +S: Supported | |
| 5149 | +F: arch/arm/mach-picoxcell | |
| 5150 | +F: drivers/*/picoxcell* | |
| 5151 | +F: drivers/*/*/picoxcell* | |
| 5152 | + | |
| 5123 | 5153 | PIN CONTROL SUBSYSTEM |
| 5124 | 5154 | M: Linus Walleij <linus.walleij@linaro.org> |
| 5125 | 5155 | S: Maintained |
| 5126 | −F: drivers/pinmux/ | |
| 5156 | +F: drivers/pinctrl/ | |
| 5127 | 5157 | |
| 5128 | 5158 | PKTCDVD DRIVER |
| 5129 | 5159 | M: Peter Osterlund <petero2@telia.com> |
| @@ -5306,35 +5336,27 @@ F: drivers/media/video/pvrusb2/ · 176 unmodified lines | ||
| 5306 | 5336 | PXA2xx/PXA3xx SUPPORT |
| 5307 | 5337 | M: Eric Miao <eric.y.miao@gmail.com> |
| 5308 | 5338 | M: Russell King <linux@arm.linux.org.uk> |
| 5339 | +M: Haojian Zhuang <haojian.zhuang@marvell.com> | |
| 5309 | 5340 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 5341 | +T: git git://github.com/hzhuang1/linux.git | |
| 5342 | +T: git git://git.linaro.org/people/ycmiao/pxa-linux.git | |
| 5310 | 5343 | S: Maintained |
| 5311 | 5344 | F: arch/arm/mach-pxa/ |
| 5312 | 5345 | F: drivers/pcmcia/pxa2xx* |
| 5313 | −F: drivers/spi/pxa2xx* | |
| 5346 | +F: drivers/spi/spi-pxa2xx* | |
| 5314 | 5347 | F: drivers/usb/gadget/pxa2* |
| 5315 | 5348 | F: include/sound/pxa2xx-lib.h |
| 5316 | 5349 | F: sound/arm/pxa* |
| 5317 | 5350 | F: sound/soc/pxa |
| 5318 | 5351 | |
| 5319 | −PXA168 SUPPORT | |
| 5320 | −M: Eric Miao <eric.y.miao@gmail.com> | |
| 5321 | −M: Jason Chagas <jason.chagas@marvell.com> | |
| 5322 | −L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 5323 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git | |
| 5324 | −S: Maintained | |
| 5325 | − | |
| 5326 | −PXA910 SUPPORT | |
| 5352 | +MMP SUPPORT | |
| 5327 | 5353 | M: Eric Miao <eric.y.miao@gmail.com> |
| 5328 | −L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | |
| 5329 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git | |
| 5330 | −S: Maintained | |
| 5331 | − | |
| 5332 | −MMP2 SUPPORT (aka ARMADA610) | |
| 5333 | 5354 | M: Haojian Zhuang <haojian.zhuang@marvell.com> |
| 5334 | −M: Eric Miao <eric.y.miao@gmail.com> | |
| 5335 | 5355 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 5336 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6.git | |
| 5356 | +T: git git://github.com/hzhuang1/linux.git | |
| 5357 | +T: git git://git.linaro.org/people/ycmiao/pxa-linux.git | |
| 5337 | 5358 | S: Maintained |
| 5359 | +F: arch/arm/mach-mmp/ | |
| 5338 | 5360 | |
| 5339 | 5361 | PXA MMCI DRIVER |
| 5340 | 5362 | S: Orphan |
| @@ -5373,6 +5395,7 @@ S: Supported · 32 unmodified lines | ||
| 5373 | 5395 | F: drivers/scsi/qla4xxx/ |
| 5374 | 5396 | |
| 5375 | 5397 | QLOGIC QLA3XXX NETWORK DRIVER |
| 5398 | +M: Jitendra Kalsaria <jitendra.kalsaria@qlogic.com> | |
| 5376 | 5399 | M: Ron Mercer <ron.mercer@qlogic.com> |
| 5377 | 5400 | M: linux-driver@qlogic.com |
| 5378 | 5401 | L: netdev@vger.kernel.org |
| @@ -5543,11 +5566,6 @@ M: Maxim Levitsky <maximlevitsky@gmail.com> · 164 unmodified lines | ||
| 5543 | 5566 | S: Maintained |
| 5544 | 5567 | F: drivers/memstick/host/r592.* |
| 5545 | 5568 | |
| 5546 | −RISCOM8 DRIVER | |
| 5547 | −S: Orphan | |
| 5548 | −F: Documentation/serial/riscom8.txt | |
| 5549 | −F: drivers/staging/tty/riscom8* | |
| 5550 | − | |
| 5551 | 5569 | ROCKETPORT DRIVER |
| 5552 | 5570 | P: Comtrol Corp. |
| 5553 | 5571 | W: http://www.comtrol.com |
| @@ -5668,6 +5686,12 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers) · 114 unmodified lines | ||
| 5668 | 5686 | S: Supported |
| 5669 | 5687 | F: sound/soc/samsung |
| 5670 | 5688 | |
| 5689 | +SAMSUNG FRAMEBUFFER DRIVER | |
| 5690 | +M: Jingoo Han <jg1.han@samsung.com> | |
| 5691 | +L: linux-fbdev@vger.kernel.org | |
| 5692 | +S: Maintained | |
| 5693 | +F: drivers/video/s3c-fb.c | |
| 5694 | + | |
| 5671 | 5695 | SERIAL DRIVERS |
| 5672 | 5696 | M: Alan Cox <alan@linux.intel.com> |
| 5673 | 5697 | L: linux-serial@vger.kernel.org |
| @@ -5807,13 +5831,14 @@ L: linux-mmc@vger.kernel.org · 133 unmodified lines | ||
| 5807 | 5831 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git |
| 5808 | 5832 | S: Maintained |
| 5809 | 5833 | F: drivers/mmc/host/sdhci.* |
| 5834 | +F: drivers/mmc/host/sdhci-pltfm.[ch] | |
| 5810 | 5835 | |
| 5811 | 5836 | SECURE DIGITAL HOST CONTROLLER INTERFACE, OPEN FIRMWARE BINDINGS (SDHCI-OF) |
| 5812 | 5837 | M: Anton Vorontsov <avorontsov@ru.mvista.com> |
| 5813 | 5838 | L: linuxppc-dev@lists.ozlabs.org |
| 5814 | 5839 | L: linux-mmc@vger.kernel.org |
| 5815 | 5840 | S: Maintained |
| 5816 | −F: drivers/mmc/host/sdhci-of.* | |
| 5841 | +F: drivers/mmc/host/sdhci-pltfm.[ch] | |
| 5817 | 5842 | |
| 5818 | 5843 | SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) SAMSUNG DRIVER |
| 5819 | 5844 | M: Ben Dooks <ben-linux@fluff.org> |
| @@ -5830,7 +5855,7 @@ F: drivers/mmc/host/sdhci-spear.c · 10 unmodified lines | ||
| 5830 | 5855 | SECURITY SUBSYSTEM |
| 5831 | 5856 | M: James Morris <jmorris@namei.org> |
| 5832 | 5857 | L: linux-security-module@vger.kernel.org (suggested Cc:) |
| 5833 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/security-testing-2.6.git | |
| 5858 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git | |
| 5834 | 5859 | W: http://security.wiki.kernel.org/ |
| 5835 | 5860 | S: Supported |
| 5836 | 5861 | F: security/ |
| @@ -5892,7 +5917,6 @@ F: drivers/net/ethernet/emulex/benet/ · 55 unmodified lines | ||
| 5892 | 5917 | |
| 5893 | 5918 | SFC NETWORK DRIVER |
| 5894 | 5919 | M: Solarflare linux maintainers <linux-net-drivers@solarflare.com> |
| 5895 | −M: Steve Hodgson <shodgson@solarflare.com> | |
| 5896 | 5920 | M: Ben Hutchings <bhutchings@solarflare.com> |
| 5897 | 5921 | L: netdev@vger.kernel.org |
| 5898 | 5922 | S: Supported |
| @@ -5957,6 +5981,7 @@ L: davinci-linux-open-source@linux.davincidsp.com (subscribers-only) · 58 unmodified lines | ||
| 5957 | 5981 | Q: http://patchwork.kernel.org/project/linux-davinci/list/ |
| 5958 | 5982 | S: Supported |
| 5959 | 5983 | F: arch/arm/mach-davinci |
| 5984 | +F: drivers/i2c/busses/i2c-davinci.c | |
| 5960 | 5985 | |
| 5961 | 5986 | SIS 190 ETHERNET DRIVER |
| 5962 | 5987 | M: Francois Romieu <romieu@fr.zoreil.com> |
| @@ -6100,13 +6125,6 @@ S: Maintained · 137 unmodified lines | ||
| 6100 | 6125 | F: drivers/ssb/ |
| 6101 | 6126 | F: include/linux/ssb/ |
| 6102 | 6127 | |
| 6103 | −BROADCOM SPECIFIC AMBA DRIVER (BCMA) | |
| 6104 | −M: Rafał Miłecki <zajec5@gmail.com> | |
| 6105 | −L: linux-wireless@vger.kernel.org | |
| 6106 | −S: Maintained | |
| 6107 | −F: drivers/bcma/ | |
| 6108 | −F: include/linux/bcma/ | |
| 6109 | − | |
| 6110 | 6128 | SONY VAIO CONTROL DEVICE DRIVER |
| 6111 | 6129 | M: Mattia Dongili <malattia@linux.it> |
| 6112 | 6130 | L: platform-driver-x86@vger.kernel.org |
| @@ -6193,9 +6211,7 @@ M: Viresh Kumar <viresh.kumar@st.com> · 80 unmodified lines | ||
| 6193 | 6211 | W: http://www.st.com/spear |
| 6194 | 6212 | S: Maintained |
| 6195 | 6213 | F: arch/arm/mach-spear*/clock.c |
| 6196 | −F: arch/arm/mach-spear*/include/mach/clkdev.h | |
| 6197 | 6214 | F: arch/arm/plat-spear/clock.c |
| 6198 | −F: arch/arm/plat-spear/include/plat/clkdev.h | |
| 6199 | 6215 | F: arch/arm/plat-spear/include/plat/clock.h |
| 6200 | 6216 | |
| 6201 | 6217 | SPEAR PAD MULTIPLEXING SUPPORT |
| @@ -6211,11 +6227,6 @@ F: arch/arm/mach-spear3xx/spear3*0_evb.c · 9 unmodified lines | ||
| 6211 | 6227 | F: arch/arm/mach-spear6xx/spear600.c |
| 6212 | 6228 | F: arch/arm/mach-spear6xx/spear600_evb.c |
| 6213 | 6229 | |
| 6214 | −SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER | |
| 6215 | −S: Orphan | |
| 6216 | −F: Documentation/serial/specialix.txt | |
| 6217 | −F: drivers/staging/tty/specialix* | |
| 6218 | − | |
| 6219 | 6230 | SPI SUBSYSTEM |
| 6220 | 6231 | M: Grant Likely <grant.likely@secretlab.ca> |
| 6221 | 6232 | L: spi-devel-general@lists.sourceforge.net |
| @@ -6258,7 +6269,7 @@ F: arch/alpha/kernel/srm_env.c · 36 unmodified lines | ||
| 6258 | 6269 | |
| 6259 | 6270 | STABLE BRANCH |
| 6260 | 6271 | M: Greg Kroah-Hartman <greg@kroah.com> |
| 6261 | −L: stable@kernel.org | |
| 6272 | +L: stable@vger.kernel.org | |
| 6262 | 6273 | S: Maintained |
| 6263 | 6274 | |
| 6264 | 6275 | STAGING SUBSYSTEM |
| @@ -6293,11 +6304,6 @@ M: Manu Abraham <abraham.manu@gmail.com> · 28 unmodified lines | ||
| 6293 | 6304 | S: Odd Fixes |
| 6294 | 6305 | F: drivers/staging/crystalhd/ |
| 6295 | 6306 | |
| 6296 | −STAGING - CYPRESS WESTBRIDGE SUPPORT | |
| 6297 | −M: David Cross <david.cross@cypress.com> | |
| 6298 | −S: Odd Fixes | |
| 6299 | −F: drivers/staging/westbridge/ | |
| 6300 | − | |
| 6301 | 6307 | STAGING - ECHO CANCELLER |
| 6302 | 6308 | M: Steve Underwood <steveu@coppice.org> |
| 6303 | 6309 | M: David Rowe <david@rowetel.com> |
| @@ -6319,12 +6325,6 @@ M: David Täht <d@teklibre.com> · 15 unmodified lines | ||
| 6319 | 6325 | S: Odd Fixes |
| 6320 | 6326 | F: drivers/staging/frontier/ |
| 6321 | 6327 | |
| 6322 | −STAGING - HYPER-V (MICROSOFT) | |
| 6323 | −M: Hank Janssen <hjanssen@microsoft.com> | |
| 6324 | −M: Haiyang Zhang <haiyangz@microsoft.com> | |
| 6325 | −S: Odd Fixes | |
| 6326 | −F: drivers/staging/hv/ | |
| 6327 | − | |
| 6328 | 6328 | STAGING - INDUSTRIAL IO |
| 6329 | 6329 | M: Jonathan Cameron <jic23@cam.ac.uk> |
| 6330 | 6330 | L: linux-iio@vger.kernel.org |
| @@ -6335,7 +6335,7 @@ STAGING - LIRC (LINUX INFRARED REMOTE CONTROL) DRIVERS · 4 unmodified lines | ||
| 6335 | 6335 | M: Jarod Wilson <jarod@wilsonet.com> |
| 6336 | 6336 | W: http://www.lirc.org/ |
| 6337 | 6337 | S: Odd Fixes |
| 6338 | −F: drivers/staging/lirc/ | |
| 6338 | +F: drivers/staging/media/lirc/ | |
| 6339 | 6339 | |
| 6340 | 6340 | STAGING - NVIDIA COMPLIANT EMBEDDED CONTROLLER INTERFACE (nvec) |
| 6341 | 6341 | M: Julian Andres Klode <jak@jak-linux.org> |
| @@ -6371,7 +6371,7 @@ F: drivers/staging/sm7xx/ · 29 unmodified lines | ||
| 6371 | 6371 | STAGING - SOFTLOGIC 6x10 MPEG CODEC |
| 6372 | 6372 | M: Ben Collins <bcollins@bluecherry.net> |
| 6373 | 6373 | S: Odd Fixes |
| 6374 | −F: drivers/staging/solo6x10/ | |
| 6374 | +F: drivers/staging/media/solo6x10/ | |
| 6375 | 6375 | |
| 6376 | 6376 | STAGING - SPEAKUP CONSOLE SPEECH DRIVER |
| 6377 | 6377 | M: William Hubbs <w.d.hubbs@gmail.com> |
| @@ -6409,7 +6409,7 @@ S: Odd Fixes · 31 unmodified lines | ||
| 6409 | 6409 | F: drivers/staging/winbond/ |
| 6410 | 6410 | |
| 6411 | 6411 | STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER |
| 6412 | −M: Arnaud Patard <apatard@mandriva.com> | |
| 6412 | +M: Arnaud Patard <arnaud.patard@rtp-net.org> | |
| 6413 | 6413 | S: Odd Fixes |
| 6414 | 6414 | F: drivers/staging/xgifb/ |
| 6415 | 6415 | |
| @@ -6500,6 +6500,13 @@ W: http://tcp-lp-mod.sourceforge.net/ · 84 unmodified lines | ||
| 6500 | 6500 | S: Maintained |
| 6501 | 6501 | F: net/ipv4/tcp_lp.c |
| 6502 | 6502 | |
| 6503 | +TEAM DRIVER | |
| 6504 | +M: Jiri Pirko <jpirko@redhat.com> | |
| 6505 | +L: netdev@vger.kernel.org | |
| 6506 | +S: Supported | |
| 6507 | +F: drivers/net/team/ | |
| 6508 | +F: include/linux/if_team.h | |
| 6509 | + | |
| 6503 | 6510 | TEGRA SUPPORT |
| 6504 | 6511 | M: Colin Cross <ccross@android.com> |
| 6505 | 6512 | M: Olof Johansson <olof@lixom.net> |
| @@ -6667,7 +6674,7 @@ TULIP NETWORK DRIVERS · 161 unmodified lines | ||
| 6667 | 6674 | M: Grant Grundler <grundler@parisc-linux.org> |
| 6668 | 6675 | L: netdev@vger.kernel.org |
| 6669 | 6676 | S: Maintained |
| 6670 | −F: drivers/net/ethernet/tulip/ | |
| 6677 | +F: drivers/net/ethernet/dec/tulip/ | |
| 6671 | 6678 | |
| 6672 | 6679 | TUN/TAP driver |
| 6673 | 6680 | M: Maxim Krasnyansky <maxk@qualcomm.com> |
| @@ -7193,7 +7200,7 @@ S: Maintained · 519 unmodified lines | ||
| 7193 | 7200 | F: drivers/net/vmxnet3/ |
| 7194 | 7201 | |
| 7195 | 7202 | VMware PVSCSI driver |
| 7196 | −M: Alok Kataria <akataria@vmware.com> | |
| 7203 | +M: Arvind Kumar <arvindkumar@vmware.com> | |
| 7197 | 7204 | M: VMware PV-Drivers <pv-drivers@vmware.com> |
| 7198 | 7205 | L: linux-scsi@vger.kernel.org |
| 7199 | 7206 | S: Maintained |
| @@ -312,7 +312,7 @@ endif · 311 unmodified lines | ||
| 312 | 312 | # If the user is running make -s (silent mode), suppress echoing of |
| 313 | 313 | # commands |
| 314 | 314 | |
| 315 | −ifneq ($(findstring s,$(MAKEFLAGS)),) | |
| 315 | +ifneq ($(filter s% -s%,$(MAKEFLAGS)),) | |
| 316 | 316 | quiet=silent_ |
| 317 | 317 | endif |
| 318 | 318 | |
| @@ -442,7 +442,7 @@ asm-generic: · 123 unmodified lines | ||
| 442 | 442 | |
| 443 | 443 | no-dot-config-targets := clean mrproper distclean \ |
| 444 | 444 | cscope gtags TAGS tags help %docs check% coccicheck \ |
| 445 | − include/linux/version.h headers_% \ | |
| 445 | + include/linux/version.h headers_% archheaders \ | |
| 446 | 446 | kernelversion %src-pkg |
| 447 | 447 | |
| 448 | 448 | config-targets := 0 |
| @@ -979,7 +979,7 @@ prepare1: prepare2 include/linux/version.h include/generated/utsrelease.h \ · 530 unmodified lines | ||
| 979 | 979 | include/config/auto.conf |
| 980 | 980 | $(cmd_crmodverdir) |
| 981 | 981 | |
| 982 | −archprepare: prepare1 scripts_basic | |
| 982 | +archprepare: archheaders prepare1 scripts_basic | |
| 983 | 983 | |
| 984 | 984 | prepare0: archprepare FORCE |
| 985 | 985 | $(Q)$(MAKE) $(build)=. |
| @@ -1046,8 +1046,11 @@ hdr-inst := -rR -f $(srctree)/scripts/Makefile.headersinst obj · 60 unmodified lines | ||
| 1046 | 1046 | # If we do an all arch process set dst to asm-$(hdr-arch) |
| 1047 | 1047 | hdr-dst = $(if $(KBUILD_HEADERS), dst=include/asm-$(hdr-arch), dst=include/asm) |
| 1048 | 1048 | |
| 1049 | +PHONY += archheaders | |
| 1050 | +archheaders: | |
| 1051 | + | |
| 1049 | 1052 | PHONY += __headers |
| 1050 | −__headers: include/linux/version.h scripts_basic asm-generic FORCE | |
| 1053 | +__headers: include/linux/version.h scripts_basic asm-generic archheaders FORCE | |
| 1051 | 1054 | $(Q)$(MAKE) $(build)=scripts build_unifdef |
| 1052 | 1055 | |
| 1053 | 1056 | PHONY += headers_install_all |
| @@ -185,4 +185,18 @@ config HAVE_RCU_TABLE_FREE · 184 unmodified lines | ||
| 185 | 185 | config ARCH_HAVE_NMI_SAFE_CMPXCHG |
| 186 | 186 | bool |
| 187 | 187 | |
| 188 | +config HAVE_ALIGNED_STRUCT_PAGE | |
| 189 | + bool | |
| 190 | + help | |
| 191 | + This makes sure that struct pages are double word aligned and that | |
| 192 | + e.g. the SLUB allocator can perform double word atomic operations | |
| 193 | + on a struct page for better performance. However selecting this | |
| 194 | + might increase the size of a struct page by a word. | |
| 195 | + | |
| 196 | +config HAVE_CMPXCHG_LOCAL | |
| 197 | + bool | |
| 198 | + | |
| 199 | +config HAVE_CMPXCHG_DOUBLE | |
| 200 | + bool | |
| 201 | + | |
| 188 | 202 | source "kernel/gcov/Kconfig" |
| @@ -70,10 +70,6 @@ config GENERIC_ISA_DMA · 69 unmodified lines | ||
| 70 | 70 | bool |
| 71 | 71 | default y |
| 72 | 72 | |
| 73 | −config GENERIC_IOMAP | |
| 74 | − bool | |
| 75 | − default n | |
| 76 | − | |
| 77 | 73 | source "init/Kconfig" |
| 78 | 74 | source "kernel/Kconfig.freezer" |
| 79 | 75 | |
| @@ -319,6 +315,7 @@ config ISA_DMA_API · 239 unmodified lines | ||
| 319 | 315 | config PCI |
| 320 | 316 | bool |
| 321 | 317 | depends on !ALPHA_JENSEN |
| 318 | + select GENERIC_PCI_IOMAP | |
| 322 | 319 | default y |
| 323 | 320 | help |
| 324 | 321 | Find out whether you have a PCI motherboard. PCI is the name of a |
| @@ -1,28 +1 @@ | ||
| 1 | −#ifndef _ALPHA_IPCBUF_H | |
| 2 | −#define _ALPHA_IPCBUF_H | |
| 3 | − | |
| 4 | −/* | |
| 5 | − * The ipc64_perm structure for alpha architecture. | |
| 6 | − * Note extra padding because this structure is passed back and forth | |
| 7 | − * between kernel and user space. | |
| 8 | − * | |
| 9 | − * Pad space is left for: | |
| 10 | − * - 32-bit seq | |
| 11 | − * - 2 miscellaneous 64-bit values | |
| 12 | − */ | |
| 13 | − | |
| 14 | −struct ipc64_perm | |
| 15 | −{ | |
| 16 | − __kernel_key_t key; | |
| 17 | − __kernel_uid_t uid; | |
| 18 | − __kernel_gid_t gid; | |
| 19 | − __kernel_uid_t cuid; | |
| 20 | − __kernel_gid_t cgid; | |
| 21 | − __kernel_mode_t mode; | |
| 22 | − unsigned short seq; | |
| 23 | − unsigned short __pad1; | |
| 24 | − unsigned long __unused1; | |
| 25 | − unsigned long __unused2; | |
| 26 | −}; | |
| 27 | − | |
| 28 | −#endif /* _ALPHA_IPCBUF_H */ | |
| 1 | +#include <asm-generic/ipcbuf.h> | |
| @@ -69,6 +69,9 @@ · 68 unmodified lines | ||
| 69 | 69 | |
| 70 | 70 | #define SO_RXQ_OVFL 40 |
| 71 | 71 | |
| 72 | +#define SO_WIFI_STATUS 41 | |
| 73 | +#define SCM_WIFI_STATUS SO_WIFI_STATUS | |
| 74 | + | |
| 72 | 75 | /* O_NONBLOCK clashes with the bits used for socket types. Therefore we |
| 73 | 76 | * have to define SOCK_NONBLOCK to a different value here. |
| 74 | 77 | */ |
| @@ -79,7 +79,6 @@ register struct thread_info *__current_thread_info __asm__("$8"); · 78 unmodified lines | ||
| 79 | 79 | #define TIF_UAC_SIGBUS 12 /* ! userspace part of 'osf_sysinfo' */ |
| 80 | 80 | #define TIF_MEMDIE 13 /* is terminating due to OOM killer */ |
| 81 | 81 | #define TIF_RESTORE_SIGMASK 14 /* restore signal mask in do_signal */ |
| 82 | −#define TIF_FREEZE 16 /* is freezing for suspend */ | |
| 83 | 82 | |
| 84 | 83 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) |
| 85 | 84 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) |
| @@ -87,7 +86,6 @@ register struct thread_info *__current_thread_info __asm__("$8"); · 1 unmodified line | ||
| 87 | 86 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) |
| 88 | 87 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) |
| 89 | 88 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) |
| 90 | −#define _TIF_FREEZE (1<<TIF_FREEZE) | |
| 91 | 89 | |
| 92 | 90 | /* Work to do on interrupt/exception return. */ |
| 93 | 91 | #define _TIF_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \ |
| @@ -15,9 +15,4 @@ · 14 unmodified lines | ||
| 15 | 15 | #include <asm-generic/int-l64.h> |
| 16 | 16 | #endif |
| 17 | 17 | |
| 18 | −#ifndef __ASSEMBLY__ | |
| 19 | − | |
| 20 | −typedef unsigned int umode_t; | |
| 21 | − | |
| 22 | −#endif /* __ASSEMBLY__ */ | |
| 23 | 18 | #endif /* _ALPHA_TYPES_H */ |
| @@ -185,15 +185,3 @@ struct dma_map_ops alpha_noop_ops = { · 184 unmodified lines | ||
| 185 | 185 | |
| 186 | 186 | struct dma_map_ops *dma_ops = &alpha_noop_ops; |
| 187 | 187 | EXPORT_SYMBOL(dma_ops); |
| 188 | − | |
| 189 | −void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) | |
| 190 | −{ | |
| 191 | − return NULL; | |
| 192 | −} | |
| 193 | − | |
| 194 | −void pci_iounmap(struct pci_dev *dev, void __iomem * addr) | |
| 195 | −{ | |
| 196 | −} | |
| 197 | − | |
| 198 | −EXPORT_SYMBOL(pci_iomap); | |
| 199 | −EXPORT_SYMBOL(pci_iounmap); | |
| @@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus) · 280 unmodified lines | ||
| 281 | 281 | void __devinit |
| 282 | 282 | pcibios_fixup_bus(struct pci_bus *bus) |
| 283 | 283 | { |
| 284 | − /* Propagate hose info into the subordinate devices. */ | |
| 285 | − | |
| 286 | − struct pci_controller *hose = bus->sysdata; | |
| 287 | 284 | struct pci_dev *dev = bus->self; |
| 288 | 285 | |
| 289 | − if (!dev) { | |
| 290 | − /* Root bus. */ | |
| 291 | − u32 pci_mem_end; | |
| 292 | − u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0; | |
| 293 | − unsigned long end; | |
| 294 | − | |
| 295 | − bus->resource[0] = hose->io_space; | |
| 296 | − bus->resource[1] = hose->mem_space; | |
| 297 | − | |
| 298 | − /* Adjust hose mem_space limit to prevent PCI allocations | |
| 299 | − in the iommu windows. */ | |
| 300 | − pci_mem_end = min((u32)__direct_map_base, sg_base) - 1; | |
| 301 | − end = hose->mem_space->start + pci_mem_end; | |
| 302 | − if (hose->mem_space->end > end) | |
| 303 | − hose->mem_space->end = end; | |
| 304 | − } else if (pci_probe_only && | |
| 286 | + if (pci_probe_only && dev && | |
| 305 | 287 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { |
| 306 | 288 | pci_read_bridge_bases(bus); |
| 307 | 289 | pcibios_fixup_device_resources(dev, bus); |
| @@ -414,13 +396,31 @@ void __init · 106 unmodified lines | ||
| 414 | 396 | common_init_pci(void) |
| 415 | 397 | { |
| 416 | 398 | struct pci_controller *hose; |
| 399 | + struct list_head resources; | |
| 417 | 400 | struct pci_bus *bus; |
| 418 | 401 | int next_busno; |
| 419 | 402 | int need_domain_info = 0; |
| 403 | + u32 pci_mem_end; | |
| 404 | + u32 sg_base; | |
| 405 | + unsigned long end; | |
| 420 | 406 | |
| 421 | 407 | /* Scan all of the recorded PCI controllers. */ |
| 422 | 408 | for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { |
| 423 | − bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose); | |
| 409 | + sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0; | |
| 410 | + | |
| 411 | + /* Adjust hose mem_space limit to prevent PCI allocations | |
| 412 | + in the iommu windows. */ | |
| 413 | + pci_mem_end = min((u32)__direct_map_base, sg_base) - 1; | |
| 414 | + end = hose->mem_space->start + pci_mem_end; | |
| 415 | + if (hose->mem_space->end > end) | |
| 416 | + hose->mem_space->end = end; | |
| 417 | + | |
| 418 | + INIT_LIST_HEAD(&resources); | |
| 419 | + pci_add_resource(&resources, hose->io_space); | |
| 420 | + pci_add_resource(&resources, hose->mem_space); | |
| 421 | + | |
| 422 | + bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops, | |
| 423 | + hose, &resources); | |
| 424 | 424 | hose->bus = bus; |
| 425 | 425 | hose->need_domain_info = need_domain_info; |
| 426 | 426 | next_busno = bus->subordinate + 1; |
| @@ -508,30 +508,7 @@ sys_pciconfig_iobase(long which, unsigned long bus, unsigned long dfn) · 81 unmodified lines | ||
| 508 | 508 | return -EOPNOTSUPP; |
| 509 | 509 | } |
| 510 | 510 | |
| 511 | −/* Create an __iomem token from a PCI BAR. Copied from lib/iomap.c with | |
| 512 | − no changes, since we don't want the other things in that object file. */ | |
| 513 | − | |
| 514 | −void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) | |
| 515 | −{ | |
| 516 | − resource_size_t start = pci_resource_start(dev, bar); | |
| 517 | − resource_size_t len = pci_resource_len(dev, bar); | |
| 518 | − unsigned long flags = pci_resource_flags(dev, bar); | |
| 519 | − | |
| 520 | − if (!len || !start) | |
| 521 | − return NULL; | |
| 522 | − if (maxlen && len > maxlen) | |
| 523 | − len = maxlen; | |
| 524 | − if (flags & IORESOURCE_IO) | |
| 525 | − return ioport_map(start, len); | |
| 526 | − if (flags & IORESOURCE_MEM) { | |
| 527 | − /* Not checking IORESOURCE_CACHEABLE because alpha does | |
| 528 | − not distinguish between ioremap and ioremap_nocache. */ | |
| 529 | − return ioremap(start, len); | |
| 530 | − } | |
| 531 | − return NULL; | |
| 532 | −} | |
| 533 | − | |
| 534 | −/* Destroy that token. Not copied from lib/iomap.c. */ | |
| 511 | +/* Destroy an __iomem token. Not copied from lib/iomap.c. */ | |
| 535 | 512 | |
| 536 | 513 | void pci_iounmap(struct pci_dev *dev, void __iomem * addr) |
| 537 | 514 | { |
| @@ -539,7 +516,6 @@ void pci_iounmap(struct pci_dev *dev, void __iomem * addr) · 1 unmodified line | ||
| 539 | 516 | iounmap(addr); |
| 540 | 517 | } |
| 541 | 518 | |
| 542 | −EXPORT_SYMBOL(pci_iomap); | |
| 543 | 519 | EXPORT_SYMBOL(pci_iounmap); |
| 544 | 520 | |
| 545 | 521 | /* FIXME: Some boxes have multiple ISA bridges! */ |
| @@ -16,6 +16,7 @@ config ARM · 15 unmodified lines | ||
| 16 | 16 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
| 17 | 17 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) |
| 18 | 18 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
| 19 | + select ARCH_BINFMT_ELF_RANDOMIZE_PIE | |
| 19 | 20 | select HAVE_GENERIC_DMA_COHERENT |
| 20 | 21 | select HAVE_KERNEL_GZIP |
| 21 | 22 | select HAVE_KERNEL_LZO |
| @@ -30,6 +31,7 @@ config ARM · 8 unmodified lines | ||
| 30 | 31 | select HAVE_SPARSE_IRQ |
| 31 | 32 | select GENERIC_IRQ_SHOW |
| 32 | 33 | select CPU_PM if (SUSPEND || CPU_IDLE) |
| 34 | + select GENERIC_PCI_IOMAP | |
| 33 | 35 | help |
| 34 | 36 | The ARM series is a line of low-power-consumption RISC chip designs |
| 35 | 37 | licensed by ARM Ltd and targeted at embedded applications and |
| @@ -258,6 +260,7 @@ config ARCH_INTEGRATOR · 222 unmodified lines | ||
| 258 | 260 | select ARCH_HAS_CPUFREQ |
| 259 | 261 | select CLKDEV_LOOKUP |
| 260 | 262 | select HAVE_MACH_CLKDEV |
| 263 | + select HAVE_TCM | |
| 261 | 264 | select ICST |
| 262 | 265 | select GENERIC_CLOCKEVENTS |
| 263 | 266 | select PLAT_VERSATILE |
| @@ -341,10 +344,12 @@ config ARCH_HIGHBANK · 77 unmodified lines | ||
| 341 | 344 | select ARM_AMBA |
| 342 | 345 | select ARM_GIC |
| 343 | 346 | select ARM_TIMER_SP804 |
| 347 | + select CACHE_L2X0 | |
| 344 | 348 | select CLKDEV_LOOKUP |
| 345 | 349 | select CPU_V7 |
| 346 | 350 | select GENERIC_CLOCKEVENTS |
| 347 | 351 | select HAVE_ARM_SCU |
| 352 | + select HAVE_SMP | |
| 348 | 353 | select USE_OF |
| 349 | 354 | help |
| 350 | 355 | Support for the Calxeda Highbank SoC based boards. |
| @@ -362,6 +367,7 @@ config ARCH_CNS3XXX · 11 unmodified lines | ||
| 362 | 367 | select CPU_V6K |
| 363 | 368 | select GENERIC_CLOCKEVENTS |
| 364 | 369 | select ARM_GIC |
| 370 | + select MIGHT_HAVE_CACHE_L2X0 | |
| 365 | 371 | select MIGHT_HAVE_PCI |
| 366 | 372 | select PCI_DOMAINS if PCI |
| 367 | 373 | help |
| @@ -382,6 +388,7 @@ config ARCH_PRIMA2 · 14 unmodified lines | ||
| 382 | 388 | select GENERIC_CLOCKEVENTS |
| 383 | 389 | select CLKDEV_LOOKUP |
| 384 | 390 | select GENERIC_IRQ_CHIP |
| 391 | + select MIGHT_HAVE_CACHE_L2X0 | |
| 385 | 392 | select USE_OF |
| 386 | 393 | select ZONE_DMA |
| 387 | 394 | help |
| @@ -442,6 +449,7 @@ config ARCH_MXS · 54 unmodified lines | ||
| 442 | 449 | select ARCH_REQUIRE_GPIOLIB |
| 443 | 450 | select CLKDEV_LOOKUP |
| 444 | 451 | select CLKSRC_MMIO |
| 452 | + select HAVE_CLK_PREPARE | |
| 445 | 453 | help |
| 446 | 454 | Support for Freescale MXS-based family of processors |
| 447 | 455 | |
| @@ -592,6 +600,7 @@ config ARCH_MMP · 144 unmodified lines | ||
| 592 | 600 | select ARCH_REQUIRE_GPIOLIB |
| 593 | 601 | select CLKDEV_LOOKUP |
| 594 | 602 | select GENERIC_CLOCKEVENTS |
| 603 | + select GPIO_PXA | |
| 595 | 604 | select HAVE_SCHED_CLOCK |
| 596 | 605 | select TICK_ONESHOT |
| 597 | 606 | select PLAT_PXA |
| @@ -634,6 +643,8 @@ config ARCH_TEGRA · 36 unmodified lines | ||
| 634 | 643 | select GENERIC_GPIO |
| 635 | 644 | select HAVE_CLK |
| 636 | 645 | select HAVE_SCHED_CLOCK |
| 646 | + select HAVE_SMP | |
| 647 | + select MIGHT_HAVE_CACHE_L2X0 | |
| 637 | 648 | select ARCH_HAS_CPUFREQ |
| 638 | 649 | help |
| 639 | 650 | This enables support for NVIDIA Tegra based systems (Tegra APX, |
| @@ -651,6 +662,7 @@ config ARCH_PICOXCELL · 11 unmodified lines | ||
| 651 | 662 | select HAVE_SCHED_CLOCK |
| 652 | 663 | select HAVE_TCM |
| 653 | 664 | select NO_IOPORT |
| 665 | + select SPARSE_IRQ | |
| 654 | 666 | select USE_OF |
| 655 | 667 | help |
| 656 | 668 | This enables support for systems based on the Picochip picoXcell |
| @@ -674,6 +686,7 @@ config ARCH_PXA · 17 unmodified lines | ||
| 674 | 686 | select CLKSRC_MMIO |
| 675 | 687 | select ARCH_REQUIRE_GPIOLIB |
| 676 | 688 | select GENERIC_CLOCKEVENTS |
| 689 | + select GPIO_PXA | |
| 677 | 690 | select HAVE_SCHED_CLOCK |
| 678 | 691 | select TICK_ONESHOT |
| 679 | 692 | select PLAT_PXA |
| @@ -703,7 +716,9 @@ config ARCH_SHMOBILE · 23 unmodified lines | ||
| 703 | 716 | select HAVE_CLK |
| 704 | 717 | select CLKDEV_LOOKUP |
| 705 | 718 | select HAVE_MACH_CLKDEV |
| 719 | + select HAVE_SMP | |
| 706 | 720 | select GENERIC_CLOCKEVENTS |
| 721 | + select MIGHT_HAVE_CACHE_L2X0 | |
| 707 | 722 | select NO_IOPORT |
| 708 | 723 | select SPARSE_IRQ |
| 709 | 724 | select MULTI_IRQ_HANDLER |
| @@ -739,7 +754,7 @@ config ARCH_SA1100 · 29 unmodified lines | ||
| 739 | 754 | select ARCH_HAS_CPUFREQ |
| 740 | 755 | select CPU_FREQ |
| 741 | 756 | select GENERIC_CLOCKEVENTS |
| 742 | − select HAVE_CLK | |
| 757 | + select CLKDEV_LOOKUP | |
| 743 | 758 | select HAVE_SCHED_CLOCK |
| 744 | 759 | select TICK_ONESHOT |
| 745 | 760 | select ARCH_REQUIRE_GPIOLIB |
| @@ -868,16 +883,6 @@ config ARCH_SHARK · 122 unmodified lines | ||
| 868 | 883 | Support for the StrongARM based Digital DNARD machine, also known |
| 869 | 884 | as "Shark" (<http://www.shark-linux.de/shark.html>). |
| 870 | 885 | |
| 871 | −config ARCH_TCC_926 | |
| 872 | − bool "Telechips TCC ARM926-based systems" | |
| 873 | − select CLKSRC_MMIO | |
| 874 | − select CPU_ARM926T | |
| 875 | − select HAVE_CLK | |
| 876 | − select CLKDEV_LOOKUP | |
| 877 | − select GENERIC_CLOCKEVENTS | |
| 878 | − help | |
| 879 | − Support for Telechips TCC ARM926-based systems. | |
| 880 | − | |
| 881 | 886 | config ARCH_U300 |
| 882 | 887 | bool "ST-Ericsson U300 Series" |
| 883 | 888 | depends on MMU |
| @@ -893,7 +898,6 @@ config ARCH_U300 · 9 unmodified lines | ||
| 893 | 898 | select HAVE_MACH_CLKDEV |
| 894 | 899 | select GENERIC_GPIO |
| 895 | 900 | select ARCH_REQUIRE_GPIOLIB |
| 896 | − select NEED_MACH_MEMORY_H | |
| 897 | 901 | help |
| 898 | 902 | Support for ST-Ericsson U300 series mobile platforms. |
| 899 | 903 | |
| @@ -905,6 +909,8 @@ config ARCH_U8500 · 5 unmodified lines | ||
| 905 | 909 | select CLKDEV_LOOKUP |
| 906 | 910 | select ARCH_REQUIRE_GPIOLIB |
| 907 | 911 | select ARCH_HAS_CPUFREQ |
| 912 | + select HAVE_SMP | |
| 913 | + select MIGHT_HAVE_CACHE_L2X0 | |
| 908 | 914 | help |
| 909 | 915 | Support for ST-Ericsson's Ux500 architecture |
| 910 | 916 | |
| @@ -915,6 +921,7 @@ config ARCH_NOMADIK · 4 unmodified lines | ||
| 915 | 921 | select CPU_ARM926T |
| 916 | 922 | select CLKDEV_LOOKUP |
| 917 | 923 | select GENERIC_CLOCKEVENTS |
| 924 | + select MIGHT_HAVE_CACHE_L2X0 | |
| 918 | 925 | select ARCH_REQUIRE_GPIOLIB |
| 919 | 926 | help |
| 920 | 927 | Support for the Nomadik platform by ST-Ericsson |
| @@ -974,6 +981,7 @@ config ARCH_ZYNQ · 53 unmodified lines | ||
| 974 | 981 | select ARM_GIC |
| 975 | 982 | select ARM_AMBA |
| 976 | 983 | select ICST |
| 984 | + select MIGHT_HAVE_CACHE_L2X0 | |
| 977 | 985 | select USE_OF |
| 978 | 986 | help |
| 979 | 987 | Support for Xilinx Zynq ARM Cortex A9 Platform |
| @@ -1060,8 +1068,6 @@ source "arch/arm/plat-s5p/Kconfig" · 80 unmodified lines | ||
| 1060 | 1068 | |
| 1061 | 1069 | source "arch/arm/plat-spear/Kconfig" |
| 1062 | 1070 | |
| 1063 | −source "arch/arm/plat-tcc/Kconfig" | |
| 1064 | − | |
| 1065 | 1071 | if ARCH_S3C2410 |
| 1066 | 1072 | source "arch/arm/mach-s3c2410/Kconfig" |
| 1067 | 1073 | source "arch/arm/mach-s3c2412/Kconfig" |
| @@ -1126,6 +1132,11 @@ config ARM_TIMER_SP804 · 58 unmodified lines | ||
| 1126 | 1132 | |
| 1127 | 1133 | source arch/arm/mm/Kconfig |
| 1128 | 1134 | |
| 1135 | +config ARM_NR_BANKS | |
| 1136 | + int | |
| 1137 | + default 16 if ARCH_EP93XX | |
| 1138 | + default 8 | |
| 1139 | + | |
| 1129 | 1140 | config IWMMXT |
| 1130 | 1141 | bool "Enable iWMMXt support" |
| 1131 | 1142 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
| @@ -1134,10 +1145,9 @@ config IWMMXT · 2 unmodified lines | ||
| 1134 | 1145 | Enable support for iWMMXt context switching at run time if |
| 1135 | 1146 | running on a CPU that supports it. |
| 1136 | 1147 | |
| 1137 | −# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER | |
| 1138 | 1148 | config XSCALE_PMU |
| 1139 | 1149 | bool |
| 1140 | − depends on CPU_XSCALE && !XSCALE_PMU_TIMER | |
| 1150 | + depends on CPU_XSCALE | |
| 1141 | 1151 | default y |
| 1142 | 1152 | |
| 1143 | 1153 | config CPU_HAS_PMU |
| @@ -1435,14 +1445,20 @@ menu "Kernel Features" · 291 unmodified lines | ||
| 1435 | 1445 | |
| 1436 | 1446 | source "kernel/time/Kconfig" |
| 1437 | 1447 | |
| 1448 | +config HAVE_SMP | |
| 1449 | + bool | |
| 1450 | + help | |
| 1451 | + This option should be selected by machines which have an SMP- | |
| 1452 | + capable CPU. | |
| 1453 | + | |
| 1454 | + The only effect of this option is to make the SMP-related | |
| 1455 | + options available to the user for configuration. | |
| 1456 | + | |
| 1438 | 1457 | config SMP |
| 1439 | 1458 | bool "Symmetric Multi-Processing" |
| 1440 | 1459 | depends on CPU_V6K || CPU_V7 |
| 1441 | 1460 | depends on GENERIC_CLOCKEVENTS |
| 1442 | − depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ | |
| 1443 | − MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ | |
| 1444 | − ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ | |
| 1445 | − ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q | |
| 1461 | + depends on HAVE_SMP | |
| 1446 | 1462 | depends on MMU |
| 1447 | 1463 | select USE_GENERIC_SMP_HELPERS |
| 1448 | 1464 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
| @@ -1560,6 +1576,16 @@ config LOCAL_TIMERS · 111 unmodified lines | ||
| 1560 | 1576 | accounting to be spread across the timer interval, preventing a |
| 1561 | 1577 | "thundering herd" at every timer tick. |
| 1562 | 1578 | |
| 1579 | +config ARCH_NR_GPIO | |
| 1580 | + int | |
| 1581 | + default 1024 if ARCH_SHMOBILE || ARCH_TEGRA | |
| 1582 | + default 350 if ARCH_U8500 | |
| 1583 | + default 0 | |
| 1584 | + help | |
| 1585 | + Maximum number of GPIOs in the system. | |
| 1586 | + | |
| 1587 | + If unsure, leave the default value. | |
| 1588 | + | |
| 1563 | 1589 | source kernel/Kconfig.preempt |
| 1564 | 1590 | |
| 1565 | 1591 | config HZ |
| @@ -1972,7 +1998,7 @@ endchoice · 406 unmodified lines | ||
| 1972 | 1998 | |
| 1973 | 1999 | config XIP_KERNEL |
| 1974 | 2000 | bool "Kernel Execute-In-Place from ROM" |
| 1975 | − depends on !ZBOOT_ROM | |
| 2001 | + depends on !ZBOOT_ROM && !ARM_LPAE | |
| 1976 | 2002 | help |
| 1977 | 2003 | Execute-In-Place allows the kernel to run from non-volatile storage |
| 1978 | 2004 | directly addressable by the CPU, such as NOR flash. This saves RAM |
| @@ -2002,7 +2028,7 @@ config XIP_PHYS_ADDR · 23 unmodified lines | ||
| 2002 | 2028 | |
| 2003 | 2029 | config KEXEC |
| 2004 | 2030 | bool "Kexec system call (EXPERIMENTAL)" |
| 2005 | − depends on EXPERIMENTAL | |
| 2031 | + depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) | |
| 2006 | 2032 | help |
| 2007 | 2033 | kexec is a system call that implements the ability to shutdown your |
| 2008 | 2034 | current kernel, and to start another kernel. It is like a reboot |
| @@ -100,6 +100,14 @@ choice · 99 unmodified lines | ||
| 100 | 100 | Note that the system will appear to hang during boot if there |
| 101 | 101 | is nothing connected to read from the DCC. |
| 102 | 102 | |
| 103 | + config AT91_DEBUG_LL_DBGU0 | |
| 104 | + bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" | |
| 105 | + depends on HAVE_AT91_DBGU0 | |
| 106 | + | |
| 107 | + config AT91_DEBUG_LL_DBGU1 | |
| 108 | + bool "Kernel low-level debugging on 9263, 9g45 and cap9" | |
| 109 | + depends on HAVE_AT91_DBGU1 | |
| 110 | + | |
| 103 | 111 | config DEBUG_FOOTBRIDGE_COM1 |
| 104 | 112 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" |
| 105 | 113 | depends on FOOTBRIDGE |
| @@ -247,6 +255,43 @@ choice · 141 unmodified lines | ||
| 247 | 255 | their output to the standard serial port on the RealView |
| 248 | 256 | PB1176 platform. |
| 249 | 257 | |
| 258 | + config DEBUG_MSM_UART1 | |
| 259 | + bool "Kernel low-level debugging messages via MSM UART1" | |
| 260 | + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | |
| 261 | + help | |
| 262 | + Say Y here if you want the debug print routines to direct | |
| 263 | + their output to the first serial port on MSM devices. | |
| 264 | + | |
| 265 | + config DEBUG_MSM_UART2 | |
| 266 | + bool "Kernel low-level debugging messages via MSM UART2" | |
| 267 | + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | |
| 268 | + help | |
| 269 | + Say Y here if you want the debug print routines to direct | |
| 270 | + their output to the second serial port on MSM devices. | |
| 271 | + | |
| 272 | + config DEBUG_MSM_UART3 | |
| 273 | + bool "Kernel low-level debugging messages via MSM UART3" | |
| 274 | + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | |
| 275 | + help | |
| 276 | + Say Y here if you want the debug print routines to direct | |
| 277 | + their output to the third serial port on MSM devices. | |
| 278 | + | |
| 279 | + config DEBUG_MSM8660_UART | |
| 280 | + bool "Kernel low-level debugging messages via MSM 8660 UART" | |
| 281 | + depends on ARCH_MSM8X60 | |
| 282 | + select MSM_HAS_DEBUG_UART_HS | |
| 283 | + help | |
| 284 | + Say Y here if you want the debug print routines to direct | |
| 285 | + their output to the serial port on MSM 8660 devices. | |
| 286 | + | |
| 287 | + config DEBUG_MSM8960_UART | |
| 288 | + bool "Kernel low-level debugging messages via MSM 8960 UART" | |
| 289 | + depends on ARCH_MSM8960 | |
| 290 | + select MSM_HAS_DEBUG_UART_HS | |
| 291 | + help | |
| 292 | + Say Y here if you want the debug print routines to direct | |
| 293 | + their output to the serial port on MSM 8960 devices. | |
| 294 | + | |
| 250 | 295 | endchoice |
| 251 | 296 | |
| 252 | 297 | config EARLY_PRINTK |
| @@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_EXYNOS4) := exynos · 183 unmodified lines | ||
| 184 | 184 | machine-$(CONFIG_ARCH_SA1100) := sa1100 |
| 185 | 185 | machine-$(CONFIG_ARCH_SHARK) := shark |
| 186 | 186 | machine-$(CONFIG_ARCH_SHMOBILE) := shmobile |
| 187 | −machine-$(CONFIG_ARCH_TCC8K) := tcc8k | |
| 188 | 187 | machine-$(CONFIG_ARCH_TEGRA) := tegra |
| 189 | 188 | machine-$(CONFIG_ARCH_U300) := u300 |
| 190 | 189 | machine-$(CONFIG_ARCH_U8500) := ux500 |
| @@ -204,7 +203,6 @@ machine-$(CONFIG_ARCH_ZYNQ) := zynq · 13 unmodified lines | ||
| 204 | 203 | plat-$(CONFIG_ARCH_MXC) := mxc |
| 205 | 204 | plat-$(CONFIG_ARCH_OMAP) := omap |
| 206 | 205 | plat-$(CONFIG_ARCH_S3C64XX) := samsung |
| 207 | −plat-$(CONFIG_ARCH_TCC_926) := tcc | |
| 208 | 206 | plat-$(CONFIG_ARCH_ZYNQ) := versatile |
| 209 | 207 | plat-$(CONFIG_PLAT_IOP) := iop |
| 210 | 208 | plat-$(CONFIG_PLAT_NOMADIK) := nomadik |
| @@ -59,9 +59,11 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE · 58 unmodified lines | ||
| 59 | 59 | |
| 60 | 60 | endif |
| 61 | 61 | |
| 62 | +targets += $(dtb-y) | |
| 63 | + | |
| 62 | 64 | # Rule to build device tree blobs |
| 63 | −$(obj)/%.dtb: $(src)/dts/%.dts | |
| 64 | − $(call cmd,dtc) | |
| 65 | +$(obj)/%.dtb: $(src)/dts/%.dts FORCE | |
| 66 | + $(call if_changed_dep,dtc) | |
| 65 | 67 | |
| 66 | 68 | $(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y)) |
| 67 | 69 | |
| @@ -126,7 +126,8 @@ ccflags-y := -fpic -fno-builtin -I$(obj) · 125 unmodified lines | ||
| 126 | 126 | asflags-y := -Wa,-march=all |
| 127 | 127 | |
| 128 | 128 | # Supply kernel BSS size to the decompressor via a linker symbol. |
| 129 | −KBSS_SZ = $(shell size $(obj)/../../../../vmlinux | awk 'END{print $$3}') | |
| 129 | +KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \ | |
| 130 | + awk 'END{print $$3}') | |
| 130 | 131 | LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ) |
| 131 | 132 | # Supply ZRELADDR to the decompressor via a linker symbol. |
| 132 | 133 | ifneq ($(CONFIG_AUTO_ZRELADDR),y) |
| @@ -659,6 +659,7 @@ __armv7_mmu_cache_on: · 658 unmodified lines | ||
| 659 | 659 | mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer |
| 660 | 660 | mcrne p15, 0, r1, c3, c0, 0 @ load domain access control |
| 661 | 661 | #endif |
| 662 | + mcr p15, 0, r0, c7, c5, 4 @ ISB | |
| 662 | 663 | mcr p15, 0, r0, c1, c0, 0 @ load control register |
| 663 | 664 | mrc p15, 0, r0, c1, c0, 0 @ and read it back |
| 664 | 665 | mov r0, #0 |
| @@ -114,6 +114,13 @@ · 113 unmodified lines | ||
| 114 | 114 | atmel,use-dma-tx; |
| 115 | 115 | status = "disabled"; |
| 116 | 116 | }; |
| 117 | + | |
| 118 | + macb0: ethernet@fffc4000 { | |
| 119 | + compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
| 120 | + reg = <0xfffc4000 0x100>; | |
| 121 | + interrupts = <21>; | |
| 122 | + status = "disabled"; | |
| 123 | + }; | |
| 117 | 124 | }; |
| 118 | 125 | }; |
| 119 | 126 | }; |
| @@ -101,6 +101,13 @@ · 100 unmodified lines | ||
| 101 | 101 | atmel,use-dma-tx; |
| 102 | 102 | status = "disabled"; |
| 103 | 103 | }; |
| 104 | + | |
| 105 | + macb0: ethernet@fffbc000 { | |
| 106 | + compatible = "cdns,at32ap7000-macb", "cdns,macb"; | |
| 107 | + reg = <0xfffbc000 0x100>; | |
| 108 | + interrupts = <25>; | |
| 109 | + status = "disabled"; | |
| 110 | + }; | |
| 104 | 111 | }; |
| 105 | 112 | }; |
| 106 | 113 | }; |
| @@ -30,6 +30,11 @@ · 29 unmodified lines | ||
| 30 | 30 | usart1: serial@fff90000 { |
| 31 | 31 | status = "okay"; |
| 32 | 32 | }; |
| 33 | + | |
| 34 | + macb0: ethernet@fffbc000 { | |
| 35 | + phy-mode = "rmii"; | |
| 36 | + status = "okay"; | |
| 37 | + }; | |
| 33 | 38 | }; |
| 34 | 39 | }; |
| 35 | 40 | }; |
| @@ -0,0 +1,137 @@ | ||
| 1 | +/* | |
| 2 | + * Samsung's Exynos4210 based Origen board device tree source | |
| 3 | + * | |
| 4 | + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | |
| 5 | + * http://www.samsung.com | |
| 6 | + * Copyright (c) 2010-2011 Linaro Ltd. | |
| 7 | + * www.linaro.org | |
| 8 | + * | |
| 9 | + * Device tree source file for Insignal's Origen board which is based on | |
| 10 | + * Samsung's Exynos4210 SoC. | |
| 11 | + * | |
| 12 | + * This program is free software; you can redistribute it and/or modify | |
| 13 | + * it under the terms of the GNU General Public License version 2 as | |
| 14 | + * published by the Free Software Foundation. | |
| 15 | +*/ | |
| 16 | + | |
| 17 | +/dts-v1/; | |
| 18 | +/include/ "exynos4210.dtsi" | |
| 19 | + | |
| 20 | +/ { | |
| 21 | + model = "Insignal Origen evaluation board based on Exynos4210"; | |
| 22 | + compatible = "insignal,origen", "samsung,exynos4210"; | |
| 23 | + | |
| 24 | + memory { | |
| 25 | + reg = <0x40000000 0x40000000>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + chosen { | |
| 29 | + bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + sdhci@12530000 { | |
| 33 | + samsung,sdhci-bus-width = <4>; | |
| 34 | + linux,mmc_cap_4_bit_data; | |
| 35 | + samsung,sdhci-cd-internal; | |
| 36 | + gpio-cd = <&gpk2 2 2 3 3>; | |
| 37 | + gpios = <&gpk2 0 2 0 3>, | |
| 38 | + <&gpk2 1 2 0 3>, | |
| 39 | + <&gpk2 3 2 3 3>, | |
| 40 | + <&gpk2 4 2 3 3>, | |
| 41 | + <&gpk2 5 2 3 3>, | |
| 42 | + <&gpk2 6 2 3 3>; | |
| 43 | + }; | |
| 44 | + | |
| 45 | + sdhci@12510000 { | |
| 46 | + samsung,sdhci-bus-width = <4>; | |
| 47 | + linux,mmc_cap_4_bit_data; | |
| 48 | + samsung,sdhci-cd-internal; | |
| 49 | + gpio-cd = <&gpk0 2 2 3 3>; | |
| 50 | + gpios = <&gpk0 0 2 0 3>, | |
| 51 | + <&gpk0 1 2 0 3>, | |
| 52 | + <&gpk0 3 2 3 3>, | |
| 53 | + <&gpk0 4 2 3 3>, | |
| 54 | + <&gpk0 5 2 3 3>, | |
| 55 | + <&gpk0 6 2 3 3>; | |
| 56 | + }; | |
| 57 | + | |
| 58 | + gpio_keys { | |
| 59 | + compatible = "gpio-keys"; | |
| 60 | + #address-cells = <1>; | |
| 61 | + #size-cells = <0>; | |
| 62 | + | |
| 63 | + up { | |
| 64 | + label = "Up"; | |
| 65 | + gpios = <&gpx2 0 0 0 2>; | |
| 66 | + linux,code = <103>; | |
| 67 | + }; | |
| 68 | + | |
| 69 | + down { | |
| 70 | + label = "Down"; | |
| 71 | + gpios = <&gpx2 1 0 0 2>; | |
| 72 | + linux,code = <108>; | |
| 73 | + }; | |
| 74 | + | |
| 75 | + back { | |
| 76 | + label = "Back"; | |
| 77 | + gpios = <&gpx1 7 0 0 2>; | |
| 78 | + linux,code = <158>; | |
| 79 | + }; | |
| 80 | + | |
| 81 | + home { | |
| 82 | + label = "Home"; | |
| 83 | + gpios = <&gpx1 6 0 0 2>; | |
| 84 | + linux,code = <102>; | |
| 85 | + }; | |
| 86 | + | |
| 87 | + menu { | |
| 88 | + label = "Menu"; | |
| 89 | + gpios = <&gpx1 5 0 0 2>; | |
| 90 | + linux,code = <139>; | |
| 91 | + }; | |
| 92 | + }; | |
| 93 | + | |
| 94 | + keypad@100A0000 { | |
| 95 | + status = "disabled"; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + sdhci@12520000 { | |
| 99 | + status = "disabled"; | |
| 100 | + }; | |
| 101 | + | |
| 102 | + sdhci@12540000 { | |
| 103 | + status = "disabled"; | |
| 104 | + }; | |
| 105 | + | |
| 106 | + i2c@13860000 { | |
| 107 | + status = "disabled"; | |
| 108 | + }; | |
| 109 | + | |
| 110 | + i2c@13870000 { | |
| 111 | + status = "disabled"; | |
| 112 | + }; | |
| 113 | + | |
| 114 | + i2c@13880000 { | |
| 115 | + status = "disabled"; | |
| 116 | + }; | |
| 117 | + | |
| 118 | + i2c@13890000 { | |
| 119 | + status = "disabled"; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + i2c@138A0000 { | |
| 123 | + status = "disabled"; | |
| 124 | + }; | |
| 125 | + | |
| 126 | + i2c@138B0000 { | |
| 127 | + status = "disabled"; | |
| 128 | + }; | |
| 129 | + | |
| 130 | + i2c@138C0000 { | |
| 131 | + status = "disabled"; | |
| 132 | + }; | |
| 133 | + | |
| 134 | + i2c@138D0000 { | |
| 135 | + status = "disabled"; | |
| 136 | + }; | |
| 137 | +}; | |
| @@ -0,0 +1,182 @@ | ||
| 1 | +/* | |
| 2 | + * Samsung's Exynos4210 based SMDKV310 board device tree source | |
| 3 | + * | |
| 4 | + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | |
| 5 | + * http://www.samsung.com | |
| 6 | + * Copyright (c) 2010-2011 Linaro Ltd. | |
| 7 | + * www.linaro.org | |
| 8 | + * | |
| 9 | + * Device tree source file for Samsung's SMDKV310 board which is based on | |
| 10 | + * Samsung's Exynos4210 SoC. | |
| 11 | + * | |
| 12 | + * This program is free software; you can redistribute it and/or modify | |
| 13 | + * it under the terms of the GNU General Public License version 2 as | |
| 14 | + * published by the Free Software Foundation. | |
| 15 | +*/ | |
| 16 | + | |
| 17 | +/dts-v1/; | |
| 18 | +/include/ "exynos4210.dtsi" | |
| 19 | + | |
| 20 | +/ { | |
| 21 | + model = "Samsung smdkv310 evaluation board based on Exynos4210"; | |
| 22 | + compatible = "samsung,smdkv310", "samsung,exynos4210"; | |
| 23 | + | |
| 24 | + memory { | |
| 25 | + reg = <0x40000000 0x80000000>; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + chosen { | |
| 29 | + bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + sdhci@12530000 { | |
| 33 | + samsung,sdhci-bus-width = <4>; | |
| 34 | + linux,mmc_cap_4_bit_data; | |
| 35 | + samsung,sdhci-cd-internal; | |
| 36 | + gpio-cd = <&gpk2 2 2 3 3>; | |
| 37 | + gpios = <&gpk2 0 2 0 3>, | |
| 38 | + <&gpk2 1 2 0 3>, | |
| 39 | + <&gpk2 3 2 3 3>, | |
| 40 | + <&gpk2 4 2 3 3>, | |
| 41 | + <&gpk2 5 2 3 3>, | |
| 42 | + <&gpk2 6 2 3 3>; | |
| 43 | + }; | |
| 44 | + | |
| 45 | + keypad@100A0000 { | |
| 46 | + samsung,keypad-num-rows = <2>; | |
| 47 | + samsung,keypad-num-columns = <8>; | |
| 48 | + linux,keypad-no-autorepeat; | |
| 49 | + linux,keypad-wakeup; | |
| 50 | + | |
| 51 | + row-gpios = <&gpx2 0 3 3 0>, | |
| 52 | + <&gpx2 1 3 3 0>; | |
| 53 | + | |
| 54 | + col-gpios = <&gpx1 0 3 0 0>, | |
| 55 | + <&gpx1 1 3 0 0>, | |
| 56 | + <&gpx1 2 3 0 0>, | |
| 57 | + <&gpx1 3 3 0 0>, | |
| 58 | + <&gpx1 4 3 0 0>, | |
| 59 | + <&gpx1 5 3 0 0>, | |
| 60 | + <&gpx1 6 3 0 0>, | |
| 61 | + <&gpx1 7 3 0 0>; | |
| 62 | + | |
| 63 | + key_1 { | |
| 64 | + keypad,row = <0>; | |
| 65 | + keypad,column = <3>; | |
| 66 | + linux,code = <2>; | |
| 67 | + }; | |
| 68 | + | |
| 69 | + key_2 { | |
| 70 | + keypad,row = <0>; | |
| 71 | + keypad,column = <4>; | |
| 72 | + linux,code = <3>; | |
| 73 | + }; | |
| 74 | + | |
| 75 | + key_3 { | |
| 76 | + keypad,row = <0>; | |
| 77 | + keypad,column = <5>; | |
| 78 | + linux,code = <4>; | |
| 79 | + }; | |
| 80 | + | |
| 81 | + key_4 { | |
| 82 | + keypad,row = <0>; | |
| 83 | + keypad,column = <6>; | |
| 84 | + linux,code = <5>; | |
| 85 | + }; | |
| 86 | + | |
| 87 | + key_5 { | |
| 88 | + keypad,row = <0>; | |
| 89 | + keypad,column = <7>; | |
| 90 | + linux,code = <6>; | |
| 91 | + }; | |
| 92 | + | |
| 93 | + key_a { | |
| 94 | + keypad,row = <1>; | |
| 95 | + keypad,column = <3>; | |
| 96 | + linux,code = <30>; | |
| 97 | + }; | |
| 98 | + | |
| 99 | + key_b { | |
| 100 | + keypad,row = <1>; | |
| 101 | + keypad,column = <4>; | |
| 102 | + linux,code = <48>; | |
| 103 | + }; | |
| 104 | + | |
| 105 | + key_c { | |
| 106 | + keypad,row = <1>; | |
| 107 | + keypad,column = <5>; | |
| 108 | + linux,code = <46>; | |
| 109 | + }; | |
| 110 | + | |
| 111 | + key_d { | |
| 112 | + keypad,row = <1>; | |
| 113 | + keypad,column = <6>; | |
| 114 | + linux,code = <32>; | |
| 115 | + }; | |
| 116 | + | |
| 117 | + key_e { | |
| 118 | + keypad,row = <1>; | |
| 119 | + keypad,column = <7>; | |
| 120 | + linux,code = <18>; | |
| 121 | + }; | |
| 122 | + }; | |
| 123 | + | |
| 124 | + i2c@13860000 { | |
| 125 | + #address-cells = <1>; | |
| 126 | + #size-cells = <0>; | |
| 127 | + samsung,i2c-sda-delay = <100>; | |
| 128 | + samsung,i2c-max-bus-freq = <20000>; | |
| 129 | + gpios = <&gpd1 0 2 3 0>, | |
| 130 | + <&gpd1 1 2 3 0>; | |
| 131 | + | |
| 132 | + eeprom@50 { | |
| 133 | + compatible = "samsung,24ad0xd1"; | |
| 134 | + reg = <0x50>; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + eeprom@52 { | |
| 138 | + compatible = "samsung,24ad0xd1"; | |
| 139 | + reg = <0x52>; | |
| 140 | + }; | |
| 141 | + }; | |
| 142 | + | |
| 143 | + sdhci@12510000 { | |
| 144 | + status = "disabled"; | |
| 145 | + }; | |
| 146 | + | |
| 147 | + sdhci@12520000 { | |
| 148 | + status = "disabled"; | |
| 149 | + }; | |
| 150 | + | |
| 151 | + sdhci@12540000 { | |
| 152 | + status = "disabled"; | |
| 153 | + }; | |
| 154 | + | |
| 155 | + i2c@13870000 { | |
| 156 | + status = "disabled"; | |
| 157 | + }; | |
| 158 | + | |
| 159 | + i2c@13880000 { | |
| 160 | + status = "disabled"; | |
| 161 | + }; | |
| 162 | + | |
| 163 | + i2c@13890000 { | |
| 164 | + status = "disabled"; | |
| 165 | + }; | |
| 166 | + | |
| 167 | + i2c@138A0000 { | |
| 168 | + status = "disabled"; | |
| 169 | + }; | |
| 170 | + | |
| 171 | + i2c@138B0000 { | |
| 172 | + status = "disabled"; | |
| 173 | + }; | |
| 174 | + | |
| 175 | + i2c@138C0000 { | |
| 176 | + status = "disabled"; | |
| 177 | + }; | |
| 178 | + | |
| 179 | + i2c@138D0000 { | |
| 180 | + status = "disabled"; | |
| 181 | + }; | |
| 182 | +}; | |
| @@ -0,0 +1,397 @@ | ||
| 1 | +/* | |
| 2 | + * Samsung's Exynos4210 SoC device tree source | |
| 3 | + * | |
| 4 | + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | |
| 5 | + * http://www.samsung.com | |
| 6 | + * Copyright (c) 2010-2011 Linaro Ltd. | |
| 7 | + * www.linaro.org | |
| 8 | + * | |
| 9 | + * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210 | |
| 10 | + * based board files can include this file and provide values for board specfic | |
| 11 | + * bindings. | |
| 12 | + * | |
| 13 | + * Note: This file does not include device nodes for all the controllers in | |
| 14 | + * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional | |
| 15 | + * nodes can be added to this file. | |
| 16 | + * | |
| 17 | + * This program is free software; you can redistribute it and/or modify | |
| 18 | + * it under the terms of the GNU General Public License version 2 as | |
| 19 | + * published by the Free Software Foundation. | |
| 20 | +*/ | |
| 21 | + | |
| 22 | +/include/ "skeleton.dtsi" | |
| 23 | + | |
| 24 | +/ { | |
| 25 | + compatible = "samsung,exynos4210"; | |
| 26 | + interrupt-parent = <&gic>; | |
| 27 | + | |
| 28 | + gic:interrupt-controller@10490000 { | |
| 29 | + compatible = "arm,cortex-a9-gic"; | |
| 30 | + #interrupt-cells = <3>; | |
| 31 | + interrupt-controller; | |
| 32 | + reg = <0x10490000 0x1000>, <0x10480000 0x100>; | |
| 33 | + }; | |
| 34 | + | |
| 35 | + watchdog@10060000 { | |
| 36 | + compatible = "samsung,s3c2410-wdt"; | |
| 37 | + reg = <0x10060000 0x100>; | |
| 38 | + interrupts = <0 43 0>; | |
| 39 | + }; | |
| 40 | + | |
| 41 | + rtc@10070000 { | |
| 42 | + compatible = "samsung,s3c6410-rtc"; | |
| 43 | + reg = <0x10070000 0x100>; | |
| 44 | + interrupts = <0 44 0>, <0 45 0>; | |
| 45 | + }; | |
| 46 | + | |
| 47 | + keypad@100A0000 { | |
| 48 | + compatible = "samsung,s5pv210-keypad"; | |
| 49 | + reg = <0x100A0000 0x100>; | |
| 50 | + interrupts = <0 109 0>; | |
| 51 | + }; | |
| 52 | + | |
| 53 | + sdhci@12510000 { | |
| 54 | + compatible = "samsung,exynos4210-sdhci"; | |
| 55 | + reg = <0x12510000 0x100>; | |
| 56 | + interrupts = <0 73 0>; | |
| 57 | + }; | |
| 58 | + | |
| 59 | + sdhci@12520000 { | |
| 60 | + compatible = "samsung,exynos4210-sdhci"; | |
| 61 | + reg = <0x12520000 0x100>; | |
| 62 | + interrupts = <0 74 0>; | |
| 63 | + }; | |
| 64 | + | |
| 65 | + sdhci@12530000 { | |
| 66 | + compatible = "samsung,exynos4210-sdhci"; | |
| 67 | + reg = <0x12530000 0x100>; | |
| 68 | + interrupts = <0 75 0>; | |
| 69 | + }; | |
| 70 | + | |
| 71 | + sdhci@12540000 { | |
| 72 | + compatible = "samsung,exynos4210-sdhci"; | |
| 73 | + reg = <0x12540000 0x100>; | |
| 74 | + interrupts = <0 76 0>; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + serial@13800000 { | |
| 78 | + compatible = "samsung,exynos4210-uart"; | |
| 79 | + reg = <0x13800000 0x100>; | |
| 80 | + interrupts = <0 52 0>; | |
| 81 | + }; | |
| 82 | + | |
| 83 | + serial@13810000 { | |
| 84 | + compatible = "samsung,exynos4210-uart"; | |
| 85 | + reg = <0x13810000 0x100>; | |
| 86 | + interrupts = <0 53 0>; | |
| 87 | + }; | |
| 88 | + | |
| 89 | + serial@13820000 { | |
| 90 | + compatible = "samsung,exynos4210-uart"; | |
| 91 | + reg = <0x13820000 0x100>; | |
| 92 | + interrupts = <0 54 0>; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + serial@13830000 { | |
| 96 | + compatible = "samsung,exynos4210-uart"; | |
| 97 | + reg = <0x13830000 0x100>; | |
| 98 | + interrupts = <0 55 0>; | |
| 99 | + }; | |
| 100 | + | |
| 101 | + i2c@13860000 { | |
| 102 | + compatible = "samsung,s3c2440-i2c"; | |
| 103 | + reg = <0x13860000 0x100>; | |
| 104 | + interrupts = <0 58 0>; | |
| 105 | + }; | |
| 106 | + | |
| 107 | + i2c@13870000 { | |
| 108 | + compatible = "samsung,s3c2440-i2c"; | |
| 109 | + reg = <0x13870000 0x100>; | |
| 110 | + interrupts = <0 59 0>; | |
| 111 | + }; | |
| 112 | + | |
| 113 | + i2c@13880000 { | |
| 114 | + compatible = "samsung,s3c2440-i2c"; | |
| 115 | + reg = <0x13880000 0x100>; | |
| 116 | + interrupts = <0 60 0>; | |
| 117 | + }; | |
| 118 | + | |
| 119 | + i2c@13890000 { | |
| 120 | + compatible = "samsung,s3c2440-i2c"; | |
| 121 | + reg = <0x13890000 0x100>; | |
| 122 | + interrupts = <0 61 0>; | |
| 123 | + }; | |
| 124 | + | |
| 125 | + i2c@138A0000 { | |
| 126 | + compatible = "samsung,s3c2440-i2c"; | |
| 127 | + reg = <0x138A0000 0x100>; | |
| 128 | + interrupts = <0 62 0>; | |
| 129 | + }; | |
| 130 | + | |
| 131 | + i2c@138B0000 { | |
| 132 | + compatible = "samsung,s3c2440-i2c"; | |
| 133 | + reg = <0x138B0000 0x100>; | |
| 134 | + interrupts = <0 63 0>; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + i2c@138C0000 { | |
| 138 | + compatible = "samsung,s3c2440-i2c"; | |
| 139 | + reg = <0x138C0000 0x100>; | |
| 140 | + interrupts = <0 64 0>; | |
| 141 | + }; | |
| 142 | + | |
| 143 | + i2c@138D0000 { | |
| 144 | + compatible = "samsung,s3c2440-i2c"; | |
| 145 | + reg = <0x138D0000 0x100>; | |
| 146 | + interrupts = <0 65 0>; | |
| 147 | + }; | |
| 148 | + | |
| 149 | + amba { | |
| 150 | + #address-cells = <1>; | |
| 151 | + #size-cells = <1>; | |
| 152 | + compatible = "arm,amba-bus"; | |
| 153 | + interrupt-parent = <&gic>; | |
| 154 | + ranges; | |
| 155 | + | |
| 156 | + pdma0: pdma@12680000 { | |
| 157 | + compatible = "arm,pl330", "arm,primecell"; | |
| 158 | + reg = <0x12680000 0x1000>; | |
| 159 | + interrupts = <0 35 0>; | |
| 160 | + }; | |
| 161 | + | |
| 162 | + pdma1: pdma@12690000 { | |
| 163 | + compatible = "arm,pl330", "arm,primecell"; | |
| 164 | + reg = <0x12690000 0x1000>; | |
| 165 | + interrupts = <0 36 0>; | |
| 166 | + }; | |
| 167 | + }; | |
| 168 | + | |
| 169 | + gpio-controllers { | |
| 170 | + #address-cells = <1>; | |
| 171 | + #size-cells = <1>; | |
| 172 | + gpio-controller; | |
| 173 | + ranges; | |
| 174 | + | |
| 175 | + gpa0: gpio-controller@11400000 { | |
| 176 | + compatible = "samsung,exynos4-gpio"; | |
| 177 | + reg = <0x11400000 0x20>; | |
| 178 | + #gpio-cells = <4>; | |
| 179 | + }; | |
| 180 | + | |
| 181 | + gpa1: gpio-controller@11400020 { | |
| 182 | + compatible = "samsung,exynos4-gpio"; | |
| 183 | + reg = <0x11400020 0x20>; | |
| 184 | + #gpio-cells = <4>; | |
| 185 | + }; | |
| 186 | + | |
| 187 | + gpb: gpio-controller@11400040 { | |
| 188 | + compatible = "samsung,exynos4-gpio"; | |
| 189 | + reg = <0x11400040 0x20>; | |
| 190 | + #gpio-cells = <4>; | |
| 191 | + }; | |
| 192 | + | |
| 193 | + gpc0: gpio-controller@11400060 { | |
| 194 | + compatible = "samsung,exynos4-gpio"; | |
| 195 | + reg = <0x11400060 0x20>; | |
| 196 | + #gpio-cells = <4>; | |
| 197 | + }; | |
| 198 | + | |
| 199 | + gpc1: gpio-controller@11400080 { | |
| 200 | + compatible = "samsung,exynos4-gpio"; | |
| 201 | + reg = <0x11400080 0x20>; | |
| 202 | + #gpio-cells = <4>; | |
| 203 | + }; | |
| 204 | + | |
| 205 | + gpd0: gpio-controller@114000A0 { | |
| 206 | + compatible = "samsung,exynos4-gpio"; | |
| 207 | + reg = <0x114000A0 0x20>; | |
| 208 | + #gpio-cells = <4>; | |
| 209 | + }; | |
| 210 | + | |
| 211 | + gpd1: gpio-controller@114000C0 { | |
| 212 | + compatible = "samsung,exynos4-gpio"; | |
| 213 | + reg = <0x114000C0 0x20>; | |
| 214 | + #gpio-cells = <4>; | |
| 215 | + }; | |
| 216 | + | |
| 217 | + gpe0: gpio-controller@114000E0 { | |
| 218 | + compatible = "samsung,exynos4-gpio"; | |
| 219 | + reg = <0x114000E0 0x20>; | |
| 220 | + #gpio-cells = <4>; | |
| 221 | + }; | |
| 222 | + | |
| 223 | + gpe1: gpio-controller@11400100 { | |
| 224 | + compatible = "samsung,exynos4-gpio"; | |
| 225 | + reg = <0x11400100 0x20>; | |
| 226 | + #gpio-cells = <4>; | |
| 227 | + }; | |
| 228 | + | |
| 229 | + gpe2: gpio-controller@11400120 { | |
| 230 | + compatible = "samsung,exynos4-gpio"; | |
| 231 | + reg = <0x11400120 0x20>; | |
| 232 | + #gpio-cells = <4>; | |
| 233 | + }; | |
| 234 | + | |
| 235 | + gpe3: gpio-controller@11400140 { | |
| 236 | + compatible = "samsung,exynos4-gpio"; | |
| 237 | + reg = <0x11400140 0x20>; | |
| 238 | + #gpio-cells = <4>; | |
| 239 | + }; | |
| 240 | + | |
| 241 | + gpe4: gpio-controller@11400160 { | |
| 242 | + compatible = "samsung,exynos4-gpio"; | |
| 243 | + reg = <0x11400160 0x20>; | |
| 244 | + #gpio-cells = <4>; | |
| 245 | + }; | |
| 246 | + | |
| 247 | + gpf0: gpio-controller@11400180 { | |
| 248 | + compatible = "samsung,exynos4-gpio"; | |
| 249 | + reg = <0x11400180 0x20>; | |
| 250 | + #gpio-cells = <4>; | |
| 251 | + }; | |
| 252 | + | |
| 253 | + gpf1: gpio-controller@114001A0 { | |
| 254 | + compatible = "samsung,exynos4-gpio"; | |
| 255 | + reg = <0x114001A0 0x20>; | |
| 256 | + #gpio-cells = <4>; | |
| 257 | + }; | |
| 258 | + | |
| 259 | + gpf2: gpio-controller@114001C0 { | |
| 260 | + compatible = "samsung,exynos4-gpio"; | |
| 261 | + reg = <0x114001C0 0x20>; | |
| 262 | + #gpio-cells = <4>; | |
| 263 | + }; | |
| 264 | + | |
| 265 | + gpf3: gpio-controller@114001E0 { | |
| 266 | + compatible = "samsung,exynos4-gpio"; | |
| 267 | + reg = <0x114001E0 0x20>; | |
| 268 | + #gpio-cells = <4>; | |
| 269 | + }; | |
| 270 | + | |
| 271 | + gpj0: gpio-controller@11000000 { | |
| 272 | + compatible = "samsung,exynos4-gpio"; | |
| 273 | + reg = <0x11000000 0x20>; | |
| 274 | + #gpio-cells = <4>; | |
| 275 | + }; | |
| 276 | + | |
| 277 | + gpj1: gpio-controller@11000020 { | |
| 278 | + compatible = "samsung,exynos4-gpio"; | |
| 279 | + reg = <0x11000020 0x20>; | |
| 280 | + #gpio-cells = <4>; | |
| 281 | + }; | |
| 282 | + | |
| 283 | + gpk0: gpio-controller@11000040 { | |
| 284 | + compatible = "samsung,exynos4-gpio"; | |
| 285 | + reg = <0x11000040 0x20>; | |
| 286 | + #gpio-cells = <4>; | |
| 287 | + }; | |
| 288 | + | |
| 289 | + gpk1: gpio-controller@11000060 { | |
| 290 | + compatible = "samsung,exynos4-gpio"; | |
| 291 | + reg = <0x11000060 0x20>; | |
| 292 | + #gpio-cells = <4>; | |
| 293 | + }; | |
| 294 | + | |
| 295 | + gpk2: gpio-controller@11000080 { | |
| 296 | + compatible = "samsung,exynos4-gpio"; | |
| 297 | + reg = <0x11000080 0x20>; | |
| 298 | + #gpio-cells = <4>; | |
| 299 | + }; | |
| 300 | + | |
| 301 | + gpk3: gpio-controller@110000A0 { | |
| 302 | + compatible = "samsung,exynos4-gpio"; | |
| 303 | + reg = <0x110000A0 0x20>; | |
| 304 | + #gpio-cells = <4>; | |
| 305 | + }; | |
| 306 | + | |
| 307 | + gpl0: gpio-controller@110000C0 { | |
| 308 | + compatible = "samsung,exynos4-gpio"; | |
| 309 | + reg = <0x110000C0 0x20>; | |
| 310 | + #gpio-cells = <4>; | |
| 311 | + }; | |
| 312 | + | |
| 313 | + gpl1: gpio-controller@110000E0 { | |
| 314 | + compatible = "samsung,exynos4-gpio"; | |
| 315 | + reg = <0x110000E0 0x20>; | |
| 316 | + #gpio-cells = <4>; | |
| 317 | + }; | |
| 318 | + | |
| 319 | + gpl2: gpio-controller@11000100 { | |
| 320 | + compatible = "samsung,exynos4-gpio"; | |
| 321 | + reg = <0x11000100 0x20>; | |
| 322 | + #gpio-cells = <4>; | |
| 323 | + }; | |
| 324 | + | |
| 325 | + gpy0: gpio-controller@11000120 { | |
| 326 | + compatible = "samsung,exynos4-gpio"; | |
| 327 | + reg = <0x11000120 0x20>; | |
| 328 | + #gpio-cells = <4>; | |
| 329 | + }; | |
| 330 | + | |
| 331 | + gpy1: gpio-controller@11000140 { | |
| 332 | + compatible = "samsung,exynos4-gpio"; | |
| 333 | + reg = <0x11000140 0x20>; | |
| 334 | + #gpio-cells = <4>; | |
| 335 | + }; | |
| 336 | + | |
| 337 | + gpy2: gpio-controller@11000160 { | |
| 338 | + compatible = "samsung,exynos4-gpio"; | |
| 339 | + reg = <0x11000160 0x20>; | |
| 340 | + #gpio-cells = <4>; | |
| 341 | + }; | |
| 342 | + | |
| 343 | + gpy3: gpio-controller@11000180 { | |
| 344 | + compatible = "samsung,exynos4-gpio"; | |
| 345 | + reg = <0x11000180 0x20>; | |
| 346 | + #gpio-cells = <4>; | |
| 347 | + }; | |
| 348 | + | |
| 349 | + gpy4: gpio-controller@110001A0 { | |
| 350 | + compatible = "samsung,exynos4-gpio"; | |
| 351 | + reg = <0x110001A0 0x20>; | |
| 352 | + #gpio-cells = <4>; | |
| 353 | + }; | |
| 354 | + | |
| 355 | + gpy5: gpio-controller@110001C0 { | |
| 356 | + compatible = "samsung,exynos4-gpio"; | |
| 357 | + reg = <0x110001C0 0x20>; | |
| 358 | + #gpio-cells = <4>; | |
| 359 | + }; | |
| 360 | + | |
| 361 | + gpy6: gpio-controller@110001E0 { | |
| 362 | + compatible = "samsung,exynos4-gpio"; | |
| 363 | + reg = <0x110001E0 0x20>; | |
| 364 | + #gpio-cells = <4>; | |
| 365 | + }; | |
| 366 | + | |
| 367 | + gpx0: gpio-controller@11000C00 { | |
| 368 | + compatible = "samsung,exynos4-gpio"; | |
| 369 | + reg = <0x11000C00 0x20>; | |
| 370 | + #gpio-cells = <4>; | |
| 371 | + }; | |
| 372 | + | |
| 373 | + gpx1: gpio-controller@11000C20 { | |
| 374 | + compatible = "samsung,exynos4-gpio"; | |
| 375 | + reg = <0x11000C20 0x20>; | |
| 376 | + #gpio-cells = <4>; | |
| 377 | + }; | |
| 378 | + | |
| 379 | + gpx2: gpio-controller@11000C40 { | |
| 380 | + compatible = "samsung,exynos4-gpio"; | |
| 381 | + reg = <0x11000C40 0x20>; | |
| 382 | + #gpio-cells = <4>; | |
| 383 | + }; | |
| 384 | + | |
| 385 | + gpx3: gpio-controller@11000C60 { | |
| 386 | + compatible = "samsung,exynos4-gpio"; | |
| 387 | + reg = <0x11000C60 0x20>; | |
| 388 | + #gpio-cells = <4>; | |
| 389 | + }; | |
| 390 | + | |
| 391 | + gpz: gpio-controller@03860000 { | |
| 392 | + compatible = "samsung,exynos4-gpio"; | |
| 393 | + reg = <0x03860000 0x20>; | |
| 394 | + #gpio-cells = <4>; | |
| 395 | + }; | |
| 396 | + }; | |
| 397 | +}; | |
| @@ -194,5 +194,17 @@ · 193 unmodified lines | ||
| 194 | 194 | reg = <0xfff3d000 0x1000>; |
| 195 | 195 | interrupts = <0 92 4>; |
| 196 | 196 | }; |
| 197 | + | |
| 198 | + ethernet@fff50000 { | |
| 199 | + compatible = "calxeda,hb-xgmac"; | |
| 200 | + reg = <0xfff50000 0x1000>; | |
| 201 | + interrupts = <0 77 4 0 78 4 0 79 4>; | |
| 202 | + }; | |
| 203 | + | |
| 204 | + ethernet@fff51000 { | |
| 205 | + compatible = "calxeda,hb-xgmac"; | |
| 206 | + reg = <0xfff51000 0x1000>; | |
| 207 | + interrupts = <0 80 4 0 81 4 0 82 4>; | |
| 208 | + }; | |
| 197 | 209 | }; |
| 198 | 210 | }; |
| @@ -35,20 +35,19 @@ · 34 unmodified lines | ||
| 35 | 35 | }; |
| 36 | 36 | |
| 37 | 37 | esdhc@70008000 { /* ESDHC2 */ |
| 38 | − cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */ | |
| 39 | − wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */ | |
| 38 | + cd-gpios = <&gpio1 6 0>; | |
| 39 | + wp-gpios = <&gpio1 5 0>; | |
| 40 | 40 | status = "okay"; |
| 41 | 41 | }; |
| 42 | 42 | |
| 43 | − uart2: uart@7000c000 { /* UART3 */ | |
| 43 | + uart3: uart@7000c000 { | |
| 44 | 44 | fsl,uart-has-rtscts; |
| 45 | 45 | status = "okay"; |
| 46 | 46 | }; |
| 47 | 47 | |
| 48 | 48 | ecspi@70010000 { /* ECSPI1 */ |
| 49 | 49 | fsl,spi-num-chipselects = <2>; |
| 50 | − cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ | |
| 51 | − <&gpio3 25 0>; /* GPIO4_25 */ | |
| 50 | + cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>; | |
| 52 | 51 | status = "okay"; |
| 53 | 52 | |
| 54 | 53 | pmic: mc13892@0 { |
| @@ -57,7 +56,7 @@ · 2 unmodified lines | ||
| 57 | 56 | compatible = "fsl,mc13892"; |
| 58 | 57 | spi-max-frequency = <6000000>; |
| 59 | 58 | reg = <0>; |
| 60 | − mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */ | |
| 59 | + mc13xxx-irq-gpios = <&gpio1 8 0>; | |
| 61 | 60 | fsl,mc13xxx-uses-regulator; |
| 62 | 61 | }; |
| 63 | 62 | |
| @@ -91,12 +90,12 @@ · 27 unmodified lines | ||
| 91 | 90 | reg = <0x73fa8000 0x4000>; |
| 92 | 91 | }; |
| 93 | 92 | |
| 94 | − uart0: uart@73fbc000 { | |
| 93 | + uart1: uart@73fbc000 { | |
| 95 | 94 | fsl,uart-has-rtscts; |
| 96 | 95 | status = "okay"; |
| 97 | 96 | }; |
| 98 | 97 | |
| 99 | − uart1: uart@73fc0000 { | |
| 98 | + uart2: uart@73fc0000 { | |
| 100 | 99 | status = "okay"; |
| 101 | 100 | }; |
| 102 | 101 | }; |
| @@ -127,7 +126,7 @@ · 24 unmodified lines | ||
| 127 | 126 | |
| 128 | 127 | power { |
| 129 | 128 | label = "Power Button"; |
| 130 | − gpios = <&gpio1 21 0>; | |
| 129 | + gpios = <&gpio2 21 0>; | |
| 131 | 130 | linux,code = <116>; /* KEY_POWER */ |
| 132 | 131 | gpio-key,wakeup; |
| 133 | 132 | }; |
| @@ -14,9 +14,9 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | / { |
| 16 | 16 | aliases { |
| 17 | − serial0 = &uart0; | |
| 18 | − serial1 = &uart1; | |
| 19 | − serial2 = &uart2; | |
| 17 | + serial0 = &uart1; | |
| 18 | + serial1 = &uart2; | |
| 19 | + serial2 = &uart3; | |
| 20 | 20 | }; |
| 21 | 21 | |
| 22 | 22 | tzic: tz-interrupt-controller@e0000000 { |
| @@ -86,7 +86,7 @@ · 63 unmodified lines | ||
| 86 | 86 | status = "disabled"; |
| 87 | 87 | }; |
| 88 | 88 | |
| 89 | − uart2: uart@7000c000 { /* UART3 */ | |
| 89 | + uart3: uart@7000c000 { | |
| 90 | 90 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
| 91 | 91 | reg = <0x7000c000 0x4000>; |
| 92 | 92 | interrupts = <33>; |
| @@ -117,7 +117,7 @@ · 24 unmodified lines | ||
| 117 | 117 | }; |
| 118 | 118 | }; |
| 119 | 119 | |
| 120 | − gpio0: gpio@73f84000 { /* GPIO1 */ | |
| 120 | + gpio1: gpio@73f84000 { | |
| 121 | 121 | compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; |
| 122 | 122 | reg = <0x73f84000 0x4000>; |
| 123 | 123 | interrupts = <50 51>; |
| @@ -127,7 +127,7 @@ · 3 unmodified lines | ||
| 127 | 127 | #interrupt-cells = <1>; |
| 128 | 128 | }; |
| 129 | 129 | |
| 130 | − gpio1: gpio@73f88000 { /* GPIO2 */ | |
| 130 | + gpio2: gpio@73f88000 { | |
| 131 | 131 | compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; |
| 132 | 132 | reg = <0x73f88000 0x4000>; |
| 133 | 133 | interrupts = <52 53>; |
| @@ -137,7 +137,7 @@ · 3 unmodified lines | ||
| 137 | 137 | #interrupt-cells = <1>; |
| 138 | 138 | }; |
| 139 | 139 | |
| 140 | − gpio2: gpio@73f8c000 { /* GPIO3 */ | |
| 140 | + gpio3: gpio@73f8c000 { | |
| 141 | 141 | compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; |
| 142 | 142 | reg = <0x73f8c000 0x4000>; |
| 143 | 143 | interrupts = <54 55>; |
| @@ -147,7 +147,7 @@ · 3 unmodified lines | ||
| 147 | 147 | #interrupt-cells = <1>; |
| 148 | 148 | }; |
| 149 | 149 | |
| 150 | − gpio3: gpio@73f90000 { /* GPIO4 */ | |
| 150 | + gpio4: gpio@73f90000 { | |
| 151 | 151 | compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; |
| 152 | 152 | reg = <0x73f90000 0x4000>; |
| 153 | 153 | interrupts = <56 57>; |
| @@ -171,14 +171,14 @@ · 17 unmodified lines | ||
| 171 | 171 | status = "disabled"; |
| 172 | 172 | }; |
| 173 | 173 | |
| 174 | − uart0: uart@73fbc000 { | |
| 174 | + uart1: uart@73fbc000 { | |
| 175 | 175 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
| 176 | 176 | reg = <0x73fbc000 0x4000>; |
| 177 | 177 | interrupts = <31>; |
| 178 | 178 | status = "disabled"; |
| 179 | 179 | }; |
| 180 | 180 | |
| 181 | − uart1: uart@73fc0000 { | |
| 181 | + uart2: uart@73fc0000 { | |
| 182 | 182 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
| 183 | 183 | reg = <0x73fc0000 0x4000>; |
| 184 | 184 | interrupts = <32>; |
| @@ -29,8 +29,8 @@ · 28 unmodified lines | ||
| 29 | 29 | aips@50000000 { /* AIPS1 */ |
| 30 | 30 | spba@50000000 { |
| 31 | 31 | esdhc@50004000 { /* ESDHC1 */ |
| 32 | − cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */ | |
| 33 | − wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */ | |
| 32 | + cd-gpios = <&gpio1 1 0>; | |
| 33 | + wp-gpios = <&gpio1 9 0>; | |
| 34 | 34 | status = "okay"; |
| 35 | 35 | }; |
| 36 | 36 | }; |
| @@ -44,7 +44,7 @@ · 7 unmodified lines | ||
| 44 | 44 | reg = <0x53fa8000 0x4000>; |
| 45 | 45 | }; |
| 46 | 46 | |
| 47 | − uart0: uart@53fbc000 { /* UART1 */ | |
| 47 | + uart1: uart@53fbc000 { | |
| 48 | 48 | status = "okay"; |
| 49 | 49 | }; |
| 50 | 50 | }; |
| @@ -67,7 +67,7 @@ · 16 unmodified lines | ||
| 67 | 67 | compatible = "smsc,lan9220", "smsc,lan9115"; |
| 68 | 68 | reg = <0xf4000000 0x2000000>; |
| 69 | 69 | phy-mode = "mii"; |
| 70 | − interrupt-parent = <&gpio1>; | |
| 70 | + interrupt-parent = <&gpio2>; | |
| 71 | 71 | interrupts = <31>; |
| 72 | 72 | reg-io-width = <4>; |
| 73 | 73 | smsc,irq-push-pull; |
| @@ -79,34 +79,34 @@ · 5 unmodified lines | ||
| 79 | 79 | |
| 80 | 80 | home { |
| 81 | 81 | label = "Home"; |
| 82 | − gpios = <&gpio4 10 0>; /* GPIO5_10 */ | |
| 82 | + gpios = <&gpio5 10 0>; | |
| 83 | 83 | linux,code = <102>; /* KEY_HOME */ |
| 84 | 84 | gpio-key,wakeup; |
| 85 | 85 | }; |
| 86 | 86 | |
| 87 | 87 | back { |
| 88 | 88 | label = "Back"; |
| 89 | − gpios = <&gpio4 11 0>; /* GPIO5_11 */ | |
| 89 | + gpios = <&gpio5 11 0>; | |
| 90 | 90 | linux,code = <158>; /* KEY_BACK */ |
| 91 | 91 | gpio-key,wakeup; |
| 92 | 92 | }; |
| 93 | 93 | |
| 94 | 94 | program { |
| 95 | 95 | label = "Program"; |
| 96 | − gpios = <&gpio4 12 0>; /* GPIO5_12 */ | |
| 96 | + gpios = <&gpio5 12 0>; | |
| 97 | 97 | linux,code = <362>; /* KEY_PROGRAM */ |
| 98 | 98 | gpio-key,wakeup; |
| 99 | 99 | }; |
| 100 | 100 | |
| 101 | 101 | volume-up { |
| 102 | 102 | label = "Volume Up"; |
| 103 | − gpios = <&gpio4 13 0>; /* GPIO5_13 */ | |
| 103 | + gpios = <&gpio5 13 0>; | |
| 104 | 104 | linux,code = <115>; /* KEY_VOLUMEUP */ |
| 105 | 105 | }; |
| 106 | 106 | |
| 107 | 107 | volume-down { |
| 108 | 108 | label = "Volume Down"; |
| 109 | − gpios = <&gpio3 0 0>; /* GPIO4_0 */ | |
| 109 | + gpios = <&gpio4 0 0>; | |
| 110 | 110 | linux,code = <114>; /* KEY_VOLUMEDOWN */ |
| 111 | 111 | }; |
| 112 | 112 | }; |
| @@ -29,15 +29,14 @@ · 28 unmodified lines | ||
| 29 | 29 | aips@50000000 { /* AIPS1 */ |
| 30 | 30 | spba@50000000 { |
| 31 | 31 | esdhc@50004000 { /* ESDHC1 */ |
| 32 | − cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ | |
| 33 | − wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */ | |
| 32 | + cd-gpios = <&gpio3 13 0>; | |
| 33 | + wp-gpios = <&gpio3 14 0>; | |
| 34 | 34 | status = "okay"; |
| 35 | 35 | }; |
| 36 | 36 | |
| 37 | 37 | ecspi@50010000 { /* ECSPI1 */ |
| 38 | 38 | fsl,spi-num-chipselects = <2>; |
| 39 | − cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ | |
| 40 | − <&gpio2 19 0>; /* GPIO3_19 */ | |
| 39 | + cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; | |
| 41 | 40 | status = "okay"; |
| 42 | 41 | |
| 43 | 42 | flash: at45db321d@1 { |
| @@ -61,8 +60,8 @@ · 17 unmodified lines | ||
| 61 | 60 | }; |
| 62 | 61 | |
| 63 | 62 | esdhc@50020000 { /* ESDHC3 */ |
| 64 | − cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ | |
| 65 | − wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ | |
| 63 | + cd-gpios = <&gpio3 11 0>; | |
| 64 | + wp-gpios = <&gpio3 12 0>; | |
| 66 | 65 | status = "okay"; |
| 67 | 66 | }; |
| 68 | 67 | }; |
| @@ -76,7 +75,7 @@ · 7 unmodified lines | ||
| 76 | 75 | reg = <0x53fa8000 0x4000>; |
| 77 | 76 | }; |
| 78 | 77 | |
| 79 | − uart0: uart@53fbc000 { /* UART1 */ | |
| 78 | + uart1: uart@53fbc000 { | |
| 80 | 79 | status = "okay"; |
| 81 | 80 | }; |
| 82 | 81 | }; |
| @@ -102,7 +101,7 @@ · 19 unmodified lines | ||
| 102 | 101 | |
| 103 | 102 | fec@63fec000 { |
| 104 | 103 | phy-mode = "rmii"; |
| 105 | − phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ | |
| 104 | + phy-reset-gpios = <&gpio7 6 0>; | |
| 106 | 105 | status = "okay"; |
| 107 | 106 | }; |
| 108 | 107 | }; |
| @@ -113,7 +112,7 @@ · 4 unmodified lines | ||
| 113 | 112 | |
| 114 | 113 | green { |
| 115 | 114 | label = "Heartbeat"; |
| 116 | − gpios = <&gpio6 7 0>; /* GPIO7_7 */ | |
| 115 | + gpios = <&gpio7 7 0>; | |
| 117 | 116 | linux,default-trigger = "heartbeat"; |
| 118 | 117 | }; |
| 119 | 118 | }; |
| @@ -29,13 +29,13 @@ · 28 unmodified lines | ||
| 29 | 29 | aips@50000000 { /* AIPS1 */ |
| 30 | 30 | spba@50000000 { |
| 31 | 31 | esdhc@50004000 { /* ESDHC1 */ |
| 32 | − cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ | |
| 32 | + cd-gpios = <&gpio3 13 0>; | |
| 33 | 33 | status = "okay"; |
| 34 | 34 | }; |
| 35 | 35 | |
| 36 | 36 | esdhc@50020000 { /* ESDHC3 */ |
| 37 | − cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ | |
| 38 | − wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ | |
| 37 | + cd-gpios = <&gpio3 11 0>; | |
| 38 | + wp-gpios = <&gpio3 12 0>; | |
| 39 | 39 | status = "okay"; |
| 40 | 40 | }; |
| 41 | 41 | }; |
| @@ -49,7 +49,7 @@ · 7 unmodified lines | ||
| 49 | 49 | reg = <0x53fa8000 0x4000>; |
| 50 | 50 | }; |
| 51 | 51 | |
| 52 | − uart0: uart@53fbc000 { /* UART1 */ | |
| 52 | + uart1: uart@53fbc000 { | |
| 53 | 53 | status = "okay"; |
| 54 | 54 | }; |
| 55 | 55 | }; |
| @@ -84,7 +84,7 @@ · 28 unmodified lines | ||
| 84 | 84 | |
| 85 | 85 | fec@63fec000 { |
| 86 | 86 | phy-mode = "rmii"; |
| 87 | − phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ | |
| 87 | + phy-reset-gpios = <&gpio7 6 0>; | |
| 88 | 88 | status = "okay"; |
| 89 | 89 | }; |
| 90 | 90 | }; |
| @@ -95,20 +95,20 @@ · 4 unmodified lines | ||
| 95 | 95 | |
| 96 | 96 | power { |
| 97 | 97 | label = "Power Button"; |
| 98 | − gpios = <&gpio0 8 0>; /* GPIO1_8 */ | |
| 98 | + gpios = <&gpio1 8 0>; | |
| 99 | 99 | linux,code = <116>; /* KEY_POWER */ |
| 100 | 100 | gpio-key,wakeup; |
| 101 | 101 | }; |
| 102 | 102 | |
| 103 | 103 | volume-up { |
| 104 | 104 | label = "Volume Up"; |
| 105 | − gpios = <&gpio1 14 0>; /* GPIO2_14 */ | |
| 105 | + gpios = <&gpio2 14 0>; | |
| 106 | 106 | linux,code = <115>; /* KEY_VOLUMEUP */ |
| 107 | 107 | }; |
| 108 | 108 | |
| 109 | 109 | volume-down { |
| 110 | 110 | label = "Volume Down"; |
| 111 | − gpios = <&gpio1 15 0>; /* GPIO2_15 */ | |
| 111 | + gpios = <&gpio2 15 0>; | |
| 112 | 112 | linux,code = <114>; /* KEY_VOLUMEDOWN */ |
| 113 | 113 | }; |
| 114 | 114 | }; |
| @@ -118,7 +118,7 @@ · 3 unmodified lines | ||
| 118 | 118 | |
| 119 | 119 | user { |
| 120 | 120 | label = "Heartbeat"; |
| 121 | − gpios = <&gpio6 7 0>; /* GPIO7_7 */ | |
| 121 | + gpios = <&gpio7 7 0>; | |
| 122 | 122 | linux,default-trigger = "heartbeat"; |
| 123 | 123 | }; |
| 124 | 124 | }; |
| @@ -29,8 +29,8 @@ · 28 unmodified lines | ||
| 29 | 29 | aips@50000000 { /* AIPS1 */ |
| 30 | 30 | spba@50000000 { |
| 31 | 31 | esdhc@50004000 { /* ESDHC1 */ |
| 32 | − cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ | |
| 33 | − wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */ | |
| 32 | + cd-gpios = <&gpio3 13 0>; | |
| 33 | + wp-gpios = <&gpio4 11 0>; | |
| 34 | 34 | status = "okay"; |
| 35 | 35 | }; |
| 36 | 36 | |
| @@ -39,15 +39,14 @@ · 2 unmodified lines | ||
| 39 | 39 | status = "okay"; |
| 40 | 40 | }; |
| 41 | 41 | |
| 42 | − uart2: uart@5000c000 { /* UART3 */ | |
| 42 | + uart3: uart@5000c000 { | |
| 43 | 43 | fsl,uart-has-rtscts; |
| 44 | 44 | status = "okay"; |
| 45 | 45 | }; |
| 46 | 46 | |
| 47 | 47 | ecspi@50010000 { /* ECSPI1 */ |
| 48 | 48 | fsl,spi-num-chipselects = <2>; |
| 49 | − cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ | |
| 50 | − <&gpio2 19 0>; /* GPIO3_19 */ | |
| 49 | + cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; | |
| 51 | 50 | status = "okay"; |
| 52 | 51 | |
| 53 | 52 | zigbee: mc1323@0 { |
| @@ -91,11 +90,11 @@ · 37 unmodified lines | ||
| 91 | 90 | reg = <0x53fa8000 0x4000>; |
| 92 | 91 | }; |
| 93 | 92 | |
| 94 | − uart0: uart@53fbc000 { /* UART1 */ | |
| 93 | + uart1: uart@53fbc000 { | |
| 95 | 94 | status = "okay"; |
| 96 | 95 | }; |
| 97 | 96 | |
| 98 | − uart1: uart@53fc0000 { /* UART2 */ | |
| 97 | + uart2: uart@53fc0000 { | |
| 99 | 98 | status = "okay"; |
| 100 | 99 | }; |
| 101 | 100 | }; |
| @@ -145,7 +144,7 @@ · 43 unmodified lines | ||
| 145 | 144 | |
| 146 | 145 | fec@63fec000 { |
| 147 | 146 | phy-mode = "rmii"; |
| 148 | − phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ | |
| 147 | + phy-reset-gpios = <&gpio7 6 0>; | |
| 149 | 148 | status = "okay"; |
| 150 | 149 | }; |
| 151 | 150 | }; |
| @@ -156,13 +155,13 @@ · 4 unmodified lines | ||
| 156 | 155 | |
| 157 | 156 | volume-up { |
| 158 | 157 | label = "Volume Up"; |
| 159 | − gpios = <&gpio1 14 0>; /* GPIO2_14 */ | |
| 158 | + gpios = <&gpio2 14 0>; | |
| 160 | 159 | linux,code = <115>; /* KEY_VOLUMEUP */ |
| 161 | 160 | }; |
| 162 | 161 | |
| 163 | 162 | volume-down { |
| 164 | 163 | label = "Volume Down"; |
| 165 | − gpios = <&gpio1 15 0>; /* GPIO2_15 */ | |
| 164 | + gpios = <&gpio2 15 0>; | |
| 166 | 165 | linux,code = <114>; /* KEY_VOLUMEDOWN */ |
| 167 | 166 | }; |
| 168 | 167 | }; |
| @@ -14,11 +14,11 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | / { |
| 16 | 16 | aliases { |
| 17 | − serial0 = &uart0; | |
| 18 | − serial1 = &uart1; | |
| 19 | − serial2 = &uart2; | |
| 20 | − serial3 = &uart3; | |
| 21 | − serial4 = &uart4; | |
| 17 | + serial0 = &uart1; | |
| 18 | + serial1 = &uart2; | |
| 19 | + serial2 = &uart3; | |
| 20 | + serial3 = &uart4; | |
| 21 | + serial4 = &uart5; | |
| 22 | 22 | }; |
| 23 | 23 | |
| 24 | 24 | tzic: tz-interrupt-controller@0fffc000 { |
| @@ -88,7 +88,7 @@ · 63 unmodified lines | ||
| 88 | 88 | status = "disabled"; |
| 89 | 89 | }; |
| 90 | 90 | |
| 91 | − uart2: uart@5000c000 { /* UART3 */ | |
| 91 | + uart3: uart@5000c000 { | |
| 92 | 92 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 93 | 93 | reg = <0x5000c000 0x4000>; |
| 94 | 94 | interrupts = <33>; |
| @@ -119,7 +119,7 @@ · 24 unmodified lines | ||
| 119 | 119 | }; |
| 120 | 120 | }; |
| 121 | 121 | |
| 122 | − gpio0: gpio@53f84000 { /* GPIO1 */ | |
| 122 | + gpio1: gpio@53f84000 { | |
| 123 | 123 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; |
| 124 | 124 | reg = <0x53f84000 0x4000>; |
| 125 | 125 | interrupts = <50 51>; |
| @@ -129,7 +129,7 @@ · 3 unmodified lines | ||
| 129 | 129 | #interrupt-cells = <1>; |
| 130 | 130 | }; |
| 131 | 131 | |
| 132 | − gpio1: gpio@53f88000 { /* GPIO2 */ | |
| 132 | + gpio2: gpio@53f88000 { | |
| 133 | 133 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; |
| 134 | 134 | reg = <0x53f88000 0x4000>; |
| 135 | 135 | interrupts = <52 53>; |
| @@ -139,7 +139,7 @@ · 3 unmodified lines | ||
| 139 | 139 | #interrupt-cells = <1>; |
| 140 | 140 | }; |
| 141 | 141 | |
| 142 | − gpio2: gpio@53f8c000 { /* GPIO3 */ | |
| 142 | + gpio3: gpio@53f8c000 { | |
| 143 | 143 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; |
| 144 | 144 | reg = <0x53f8c000 0x4000>; |
| 145 | 145 | interrupts = <54 55>; |
| @@ -149,7 +149,7 @@ · 3 unmodified lines | ||
| 149 | 149 | #interrupt-cells = <1>; |
| 150 | 150 | }; |
| 151 | 151 | |
| 152 | − gpio3: gpio@53f90000 { /* GPIO4 */ | |
| 152 | + gpio4: gpio@53f90000 { | |
| 153 | 153 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; |
| 154 | 154 | reg = <0x53f90000 0x4000>; |
| 155 | 155 | interrupts = <56 57>; |
| @@ -173,21 +173,21 @@ · 17 unmodified lines | ||
| 173 | 173 | status = "disabled"; |
| 174 | 174 | }; |
| 175 | 175 | |
| 176 | − uart0: uart@53fbc000 { /* UART1 */ | |
| 176 | + uart1: uart@53fbc000 { | |
| 177 | 177 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 178 | 178 | reg = <0x53fbc000 0x4000>; |
| 179 | 179 | interrupts = <31>; |
| 180 | 180 | status = "disabled"; |
| 181 | 181 | }; |
| 182 | 182 | |
| 183 | − uart1: uart@53fc0000 { /* UART2 */ | |
| 183 | + uart2: uart@53fc0000 { | |
| 184 | 184 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 185 | 185 | reg = <0x53fc0000 0x4000>; |
| 186 | 186 | interrupts = <32>; |
| 187 | 187 | status = "disabled"; |
| 188 | 188 | }; |
| 189 | 189 | |
| 190 | − gpio4: gpio@53fdc000 { /* GPIO5 */ | |
| 190 | + gpio5: gpio@53fdc000 { | |
| 191 | 191 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; |
| 192 | 192 | reg = <0x53fdc000 0x4000>; |
| 193 | 193 | interrupts = <103 104>; |
| @@ -197,7 +197,7 @@ · 3 unmodified lines | ||
| 197 | 197 | #interrupt-cells = <1>; |
| 198 | 198 | }; |
| 199 | 199 | |
| 200 | − gpio5: gpio@53fe0000 { /* GPIO6 */ | |
| 200 | + gpio6: gpio@53fe0000 { | |
| 201 | 201 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; |
| 202 | 202 | reg = <0x53fe0000 0x4000>; |
| 203 | 203 | interrupts = <105 106>; |
| @@ -207,7 +207,7 @@ · 3 unmodified lines | ||
| 207 | 207 | #interrupt-cells = <1>; |
| 208 | 208 | }; |
| 209 | 209 | |
| 210 | − gpio6: gpio@53fe4000 { /* GPIO7 */ | |
| 210 | + gpio7: gpio@53fe4000 { | |
| 211 | 211 | compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; |
| 212 | 212 | reg = <0x53fe4000 0x4000>; |
| 213 | 213 | interrupts = <107 108>; |
| @@ -226,7 +226,7 @@ · 12 unmodified lines | ||
| 226 | 226 | status = "disabled"; |
| 227 | 227 | }; |
| 228 | 228 | |
| 229 | − uart3: uart@53ff0000 { /* UART4 */ | |
| 229 | + uart4: uart@53ff0000 { | |
| 230 | 230 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 231 | 231 | reg = <0x53ff0000 0x4000>; |
| 232 | 232 | interrupts = <13>; |
| @@ -241,7 +241,7 @@ · 8 unmodified lines | ||
| 241 | 241 | reg = <0x60000000 0x10000000>; |
| 242 | 242 | ranges; |
| 243 | 243 | |
| 244 | − uart4: uart@63f90000 { /* UART5 */ | |
| 244 | + uart5: uart@63f90000 { | |
| 245 | 245 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 246 | 246 | reg = <0x63f90000 0x4000>; |
| 247 | 247 | interrupts = <86>; |
| @@ -14,8 +14,8 @@ · 13 unmodified lines | ||
| 14 | 14 | /include/ "imx6q.dtsi" |
| 15 | 15 | |
| 16 | 16 | / { |
| 17 | − model = "Freescale i.MX6 Quad SABRE Automotive Board"; | |
| 18 | − compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; | |
| 17 | + model = "Freescale i.MX6 Quad Armadillo2 Board"; | |
| 18 | + compatible = "fsl,imx6q-arm2", "fsl,imx6q"; | |
| 19 | 19 | |
| 20 | 20 | chosen { |
| 21 | 21 | bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait"; |
| @@ -34,8 +34,8 @@ · 12 unmodified lines | ||
| 34 | 34 | }; |
| 35 | 35 | |
| 36 | 36 | usdhc@02198000 { /* uSDHC3 */ |
| 37 | − cd-gpios = <&gpio5 11 0>; /* GPIO6_11 */ | |
| 38 | − wp-gpios = <&gpio5 14 0>; /* GPIO6_14 */ | |
| 37 | + cd-gpios = <&gpio6 11 0>; | |
| 38 | + wp-gpios = <&gpio6 14 0>; | |
| 39 | 39 | status = "okay"; |
| 40 | 40 | }; |
| 41 | 41 | |
| @@ -44,7 +44,7 @@ · 2 unmodified lines | ||
| 44 | 44 | status = "okay"; |
| 45 | 45 | }; |
| 46 | 46 | |
| 47 | − uart3: uart@021f0000 { /* UART4 */ | |
| 47 | + uart4: uart@021f0000 { | |
| 48 | 48 | status = "okay"; |
| 49 | 49 | }; |
| 50 | 50 | }; |
| @@ -55,7 +55,7 @@ · 4 unmodified lines | ||
| 55 | 55 | |
| 56 | 56 | debug-led { |
| 57 | 57 | label = "Heartbeat"; |
| 58 | − gpios = <&gpio2 25 0>; /* GPIO3_25 */ | |
| 58 | + gpios = <&gpio3 25 0>; | |
| 59 | 59 | linux,default-trigger = "heartbeat"; |
| 60 | 60 | }; |
| 61 | 61 | }; |
| @@ -0,0 +1,49 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Freescale Semiconductor, Inc. | |
| 3 | + * Copyright 2011 Linaro Ltd. | |
| 4 | + * | |
| 5 | + * The code contained herein is licensed under the GNU General Public | |
| 6 | + * License. You may obtain a copy of the GNU General Public License | |
| 7 | + * Version 2 or later at the following locations: | |
| 8 | + * | |
| 9 | + * http://www.opensource.org/licenses/gpl-license.html | |
| 10 | + * http://www.gnu.org/copyleft/gpl.html | |
| 11 | + */ | |
| 12 | + | |
| 13 | +/dts-v1/; | |
| 14 | +/include/ "imx6q.dtsi" | |
| 15 | + | |
| 16 | +/ { | |
| 17 | + model = "Freescale i.MX6 Quad SABRE Lite Board"; | |
| 18 | + compatible = "fsl,imx6q-sabrelite", "fsl,imx6q"; | |
| 19 | + | |
| 20 | + memory { | |
| 21 | + reg = <0x10000000 0x40000000>; | |
| 22 | + }; | |
| 23 | + | |
| 24 | + soc { | |
| 25 | + aips-bus@02100000 { /* AIPS2 */ | |
| 26 | + enet@02188000 { | |
| 27 | + phy-mode = "rgmii"; | |
| 28 | + phy-reset-gpios = <&gpio3 23 0>; | |
| 29 | + status = "okay"; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + usdhc@02198000 { /* uSDHC3 */ | |
| 33 | + cd-gpios = <&gpio7 0 0>; | |
| 34 | + wp-gpios = <&gpio7 1 0>; | |
| 35 | + status = "okay"; | |
| 36 | + }; | |
| 37 | + | |
| 38 | + usdhc@0219c000 { /* uSDHC4 */ | |
| 39 | + cd-gpios = <&gpio2 6 0>; | |
| 40 | + wp-gpios = <&gpio2 7 0>; | |
| 41 | + status = "okay"; | |
| 42 | + }; | |
| 43 | + | |
| 44 | + uart2: uart@021e8000 { | |
| 45 | + status = "okay"; | |
| 46 | + }; | |
| 47 | + }; | |
| 48 | + }; | |
| 49 | +}; | |
| @@ -14,11 +14,11 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | / { |
| 16 | 16 | aliases { |
| 17 | − serial0 = &uart0; | |
| 18 | − serial1 = &uart1; | |
| 19 | − serial2 = &uart2; | |
| 20 | − serial3 = &uart3; | |
| 21 | − serial4 = &uart4; | |
| 17 | + serial0 = &uart1; | |
| 18 | + serial1 = &uart2; | |
| 19 | + serial2 = &uart3; | |
| 20 | + serial3 = &uart4; | |
| 21 | + serial4 = &uart5; | |
| 22 | 22 | }; |
| 23 | 23 | |
| 24 | 24 | cpus { |
| @@ -165,7 +165,7 @@ · 140 unmodified lines | ||
| 165 | 165 | status = "disabled"; |
| 166 | 166 | }; |
| 167 | 167 | |
| 168 | − uart0: uart@02020000 { /* UART1 */ | |
| 168 | + uart1: uart@02020000 { | |
| 169 | 169 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 170 | 170 | reg = <0x02020000 0x4000>; |
| 171 | 171 | interrupts = <0 26 0x04>; |
| @@ -247,7 +247,7 @@ · 75 unmodified lines | ||
| 247 | 247 | interrupts = <0 55 0x04>; |
| 248 | 248 | }; |
| 249 | 249 | |
| 250 | − gpio0: gpio@0209c000 { /* GPIO1 */ | |
| 250 | + gpio1: gpio@0209c000 { | |
| 251 | 251 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; |
| 252 | 252 | reg = <0x0209c000 0x4000>; |
| 253 | 253 | interrupts = <0 66 0x04 0 67 0x04>; |
| @@ -257,7 +257,7 @@ · 3 unmodified lines | ||
| 257 | 257 | #interrupt-cells = <1>; |
| 258 | 258 | }; |
| 259 | 259 | |
| 260 | − gpio1: gpio@020a0000 { /* GPIO2 */ | |
| 260 | + gpio2: gpio@020a0000 { | |
| 261 | 261 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; |
| 262 | 262 | reg = <0x020a0000 0x4000>; |
| 263 | 263 | interrupts = <0 68 0x04 0 69 0x04>; |
| @@ -267,7 +267,7 @@ · 3 unmodified lines | ||
| 267 | 267 | #interrupt-cells = <1>; |
| 268 | 268 | }; |
| 269 | 269 | |
| 270 | − gpio2: gpio@020a4000 { /* GPIO3 */ | |
| 270 | + gpio3: gpio@020a4000 { | |
| 271 | 271 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; |
| 272 | 272 | reg = <0x020a4000 0x4000>; |
| 273 | 273 | interrupts = <0 70 0x04 0 71 0x04>; |
| @@ -277,7 +277,7 @@ · 3 unmodified lines | ||
| 277 | 277 | #interrupt-cells = <1>; |
| 278 | 278 | }; |
| 279 | 279 | |
| 280 | − gpio3: gpio@020a8000 { /* GPIO4 */ | |
| 280 | + gpio4: gpio@020a8000 { | |
| 281 | 281 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; |
| 282 | 282 | reg = <0x020a8000 0x4000>; |
| 283 | 283 | interrupts = <0 72 0x04 0 73 0x04>; |
| @@ -287,7 +287,7 @@ · 3 unmodified lines | ||
| 287 | 287 | #interrupt-cells = <1>; |
| 288 | 288 | }; |
| 289 | 289 | |
| 290 | − gpio4: gpio@020ac000 { /* GPIO5 */ | |
| 290 | + gpio5: gpio@020ac000 { | |
| 291 | 291 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; |
| 292 | 292 | reg = <0x020ac000 0x4000>; |
| 293 | 293 | interrupts = <0 74 0x04 0 75 0x04>; |
| @@ -297,7 +297,7 @@ · 3 unmodified lines | ||
| 297 | 297 | #interrupt-cells = <1>; |
| 298 | 298 | }; |
| 299 | 299 | |
| 300 | − gpio5: gpio@020b0000 { /* GPIO6 */ | |
| 300 | + gpio6: gpio@020b0000 { | |
| 301 | 301 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; |
| 302 | 302 | reg = <0x020b0000 0x4000>; |
| 303 | 303 | interrupts = <0 76 0x04 0 77 0x04>; |
| @@ -307,7 +307,7 @@ · 3 unmodified lines | ||
| 307 | 307 | #interrupt-cells = <1>; |
| 308 | 308 | }; |
| 309 | 309 | |
| 310 | − gpio6: gpio@020b4000 { /* GPIO7 */ | |
| 310 | + gpio7: gpio@020b4000 { | |
| 311 | 311 | compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; |
| 312 | 312 | reg = <0x020b4000 0x4000>; |
| 313 | 313 | interrupts = <0 78 0x04 0 79 0x04>; |
| @@ -543,28 +543,28 @@ · 229 unmodified lines | ||
| 543 | 543 | interrupts = <0 18 0x04>; |
| 544 | 544 | }; |
| 545 | 545 | |
| 546 | − uart1: uart@021e8000 { /* UART2 */ | |
| 546 | + uart2: uart@021e8000 { | |
| 547 | 547 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 548 | 548 | reg = <0x021e8000 0x4000>; |
| 549 | 549 | interrupts = <0 27 0x04>; |
| 550 | 550 | status = "disabled"; |
| 551 | 551 | }; |
| 552 | 552 | |
| 553 | − uart2: uart@021ec000 { /* UART3 */ | |
| 553 | + uart3: uart@021ec000 { | |
| 554 | 554 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 555 | 555 | reg = <0x021ec000 0x4000>; |
| 556 | 556 | interrupts = <0 28 0x04>; |
| 557 | 557 | status = "disabled"; |
| 558 | 558 | }; |
| 559 | 559 | |
| 560 | − uart3: uart@021f0000 { /* UART4 */ | |
| 560 | + uart4: uart@021f0000 { | |
| 561 | 561 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 562 | 562 | reg = <0x021f0000 0x4000>; |
| 563 | 563 | interrupts = <0 29 0x04>; |
| 564 | 564 | status = "disabled"; |
| 565 | 565 | }; |
| 566 | 566 | |
| 567 | − uart4: uart@021f4000 { /* UART5 */ | |
| 567 | + uart5: uart@021f4000 { | |
| 568 | 568 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 569 | 569 | reg = <0x021f4000 0x4000>; |
| 570 | 570 | interrupts = <0 30 0x04>; |
| @@ -0,0 +1,67 @@ | ||
| 1 | +/* | |
| 2 | + * Device Tree Source for OMAP2 SoC | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
| 5 | + * | |
| 6 | + * This file is licensed under the terms of the GNU General Public License | |
| 7 | + * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | + * kind, whether express or implied. | |
| 9 | + */ | |
| 10 | + | |
| 11 | +/include/ "skeleton.dtsi" | |
| 12 | + | |
| 13 | +/ { | |
| 14 | + compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; | |
| 15 | + | |
| 16 | + aliases { | |
| 17 | + serial0 = &uart1; | |
| 18 | + serial1 = &uart2; | |
| 19 | + serial2 = &uart3; | |
| 20 | + }; | |
| 21 | + | |
| 22 | + cpus { | |
| 23 | + cpu@0 { | |
| 24 | + compatible = "arm,arm1136jf-s"; | |
| 25 | + }; | |
| 26 | + }; | |
| 27 | + | |
| 28 | + soc { | |
| 29 | + compatible = "ti,omap-infra"; | |
| 30 | + mpu { | |
| 31 | + compatible = "ti,omap2-mpu"; | |
| 32 | + ti,hwmods = "mpu"; | |
| 33 | + }; | |
| 34 | + }; | |
| 35 | + | |
| 36 | + ocp { | |
| 37 | + compatible = "simple-bus"; | |
| 38 | + #address-cells = <1>; | |
| 39 | + #size-cells = <1>; | |
| 40 | + ranges; | |
| 41 | + ti,hwmods = "l3_main"; | |
| 42 | + | |
| 43 | + intc: interrupt-controller@1 { | |
| 44 | + compatible = "ti,omap2-intc"; | |
| 45 | + interrupt-controller; | |
| 46 | + #interrupt-cells = <1>; | |
| 47 | + }; | |
| 48 | + | |
| 49 | + uart1: serial@4806a000 { | |
| 50 | + compatible = "ti,omap2-uart"; | |
| 51 | + ti,hwmods = "uart1"; | |
| 52 | + clock-frequency = <48000000>; | |
| 53 | + }; | |
| 54 | + | |
| 55 | + uart2: serial@4806c000 { | |
| 56 | + compatible = "ti,omap2-uart"; | |
| 57 | + ti,hwmods = "uart2"; | |
| 58 | + clock-frequency = <48000000>; | |
| 59 | + }; | |
| 60 | + | |
| 61 | + uart3: serial@4806e000 { | |
| 62 | + compatible = "ti,omap2-uart"; | |
| 63 | + ti,hwmods = "uart3"; | |
| 64 | + clock-frequency = <48000000>; | |
| 65 | + }; | |
| 66 | + }; | |
| 67 | +}; | |
| @@ -13,6 +13,13 @@ · 12 unmodified lines | ||
| 13 | 13 | / { |
| 14 | 14 | compatible = "ti,omap3430", "ti,omap3"; |
| 15 | 15 | |
| 16 | + aliases { | |
| 17 | + serial0 = &uart1; | |
| 18 | + serial1 = &uart2; | |
| 19 | + serial2 = &uart3; | |
| 20 | + serial3 = &uart4; | |
| 21 | + }; | |
| 22 | + | |
| 16 | 23 | cpus { |
| 17 | 24 | cpu@0 { |
| 18 | 25 | compatible = "arm,cortex-a8"; |
| @@ -59,5 +66,29 @@ · 40 unmodified lines | ||
| 59 | 66 | interrupt-controller; |
| 60 | 67 | #interrupt-cells = <1>; |
| 61 | 68 | }; |
| 69 | + | |
| 70 | + uart1: serial@0x4806a000 { | |
| 71 | + compatible = "ti,omap3-uart"; | |
| 72 | + ti,hwmods = "uart1"; | |
| 73 | + clock-frequency = <48000000>; | |
| 74 | + }; | |
| 75 | + | |
| 76 | + uart2: serial@0x4806c000 { | |
| 77 | + compatible = "ti,omap3-uart"; | |
| 78 | + ti,hwmods = "uart2"; | |
| 79 | + clock-frequency = <48000000>; | |
| 80 | + }; | |
| 81 | + | |
| 82 | + uart3: serial@0x49020000 { | |
| 83 | + compatible = "ti,omap3-uart"; | |
| 84 | + ti,hwmods = "uart3"; | |
| 85 | + clock-frequency = <48000000>; | |
| 86 | + }; | |
| 87 | + | |
| 88 | + uart4: serial@0x49042000 { | |
| 89 | + compatible = "ti,omap3-uart"; | |
| 90 | + ti,hwmods = "uart4"; | |
| 91 | + clock-frequency = <48000000>; | |
| 92 | + }; | |
| 62 | 93 | }; |
| 63 | 94 | }; |
| @@ -21,6 +21,10 @@ · 20 unmodified lines | ||
| 21 | 21 | interrupt-parent = <&gic>; |
| 22 | 22 | |
| 23 | 23 | aliases { |
| 24 | + serial0 = &uart1; | |
| 25 | + serial1 = &uart2; | |
| 26 | + serial2 = &uart3; | |
| 27 | + serial3 = &uart4; | |
| 24 | 28 | }; |
| 25 | 29 | |
| 26 | 30 | cpus { |
| @@ -99,5 +103,29 @@ · 72 unmodified lines | ||
| 99 | 103 | reg = <0x48241000 0x1000>, |
| 100 | 104 | <0x48240100 0x0100>; |
| 101 | 105 | }; |
| 106 | + | |
| 107 | + uart1: serial@0x4806a000 { | |
| 108 | + compatible = "ti,omap4-uart"; | |
| 109 | + ti,hwmods = "uart1"; | |
| 110 | + clock-frequency = <48000000>; | |
| 111 | + }; | |
| 112 | + | |
| 113 | + uart2: serial@0x4806c000 { | |
| 114 | + compatible = "ti,omap4-uart"; | |
| 115 | + ti,hwmods = "uart2"; | |
| 116 | + clock-frequency = <48000000>; | |
| 117 | + }; | |
| 118 | + | |
| 119 | + uart3: serial@0x48020000 { | |
| 120 | + compatible = "ti,omap4-uart"; | |
| 121 | + ti,hwmods = "uart3"; | |
| 122 | + clock-frequency = <48000000>; | |
| 123 | + }; | |
| 124 | + | |
| 125 | + uart4: serial@0x4806e000 { | |
| 126 | + compatible = "ti,omap4-uart"; | |
| 127 | + ti,hwmods = "uart4"; | |
| 128 | + clock-frequency = <48000000>; | |
| 129 | + }; | |
| 102 | 130 | }; |
| 103 | 131 | }; |
| @@ -0,0 +1,36 @@ | ||
| 1 | +/dts-v1/; | |
| 2 | + | |
| 3 | +/include/ "tegra30.dtsi" | |
| 4 | + | |
| 5 | +/ { | |
| 6 | + model = "NVIDIA Tegra30 Cardhu evaluation board"; | |
| 7 | + compatible = "nvidia,cardhu", "nvidia,tegra30"; | |
| 8 | + | |
| 9 | + memory { | |
| 10 | + reg = < 0x80000000 0x40000000 >; | |
| 11 | + }; | |
| 12 | + | |
| 13 | + serial@70006000 { | |
| 14 | + clock-frequency = < 408000000 >; | |
| 15 | + }; | |
| 16 | + | |
| 17 | + i2c@7000c000 { | |
| 18 | + clock-frequency = <100000>; | |
| 19 | + }; | |
| 20 | + | |
| 21 | + i2c@7000c400 { | |
| 22 | + clock-frequency = <100000>; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + i2c@7000c500 { | |
| 26 | + clock-frequency = <100000>; | |
| 27 | + }; | |
| 28 | + | |
| 29 | + i2c@7000c700 { | |
| 30 | + clock-frequency = <100000>; | |
| 31 | + }; | |
| 32 | + | |
| 33 | + i2c@7000d000 { | |
| 34 | + clock-frequency = <100000>; | |
| 35 | + }; | |
| 36 | +}; | |
| @@ -1,16 +1,11 @@ | ||
| 1 | 1 | /dts-v1/; |
| 2 | 2 | |
| 3 | −/memreserve/ 0x1c000000 0x04000000; | |
| 4 | 3 | /include/ "tegra20.dtsi" |
| 5 | 4 | |
| 6 | 5 | / { |
| 7 | 6 | model = "NVIDIA Tegra2 Harmony evaluation board"; |
| 8 | 7 | compatible = "nvidia,harmony", "nvidia,tegra20"; |
| 9 | 8 | |
| 10 | − chosen { | |
| 11 | − bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk0p2 rw rootwait"; | |
| 12 | − }; | |
| 13 | − | |
| 14 | 9 | memory@0 { |
| 15 | 10 | reg = < 0x00000000 0x40000000 >; |
| 16 | 11 | }; |
| @@ -52,16 +47,40 @@ · 35 unmodified lines | ||
| 52 | 47 | ext-mic-en-gpios = <&gpio 185 0>; |
| 53 | 48 | }; |
| 54 | 49 | |
| 50 | + serial@70006000 { | |
| 51 | + status = "disable"; | |
| 52 | + }; | |
| 53 | + | |
| 54 | + serial@70006040 { | |
| 55 | + status = "disable"; | |
| 56 | + }; | |
| 57 | + | |
| 58 | + serial@70006200 { | |
| 59 | + status = "disable"; | |
| 60 | + }; | |
| 61 | + | |
| 55 | 62 | serial@70006300 { |
| 56 | 63 | clock-frequency = < 216000000 >; |
| 57 | 64 | }; |
| 58 | 65 | |
| 66 | + serial@70006400 { | |
| 67 | + status = "disable"; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + sdhci@c8000000 { | |
| 71 | + status = "disable"; | |
| 72 | + }; | |
| 73 | + | |
| 59 | 74 | sdhci@c8000200 { |
| 60 | 75 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
| 61 | 76 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
| 62 | 77 | power-gpios = <&gpio 155 0>; /* gpio PT3 */ |
| 63 | 78 | }; |
| 64 | 79 | |
| 80 | + sdhci@c8000400 { | |
| 81 | + status = "disable"; | |
| 82 | + }; | |
| 83 | + | |
| 65 | 84 | sdhci@c8000600 { |
| 66 | 85 | cd-gpios = <&gpio 58 0>; /* gpio PH2 */ |
| 67 | 86 | wp-gpios = <&gpio 59 0>; /* gpio PH3 */ |
| @@ -0,0 +1,77 @@ | ||
| 1 | +/dts-v1/; | |
| 2 | + | |
| 3 | +/include/ "tegra20.dtsi" | |
| 4 | + | |
| 5 | +/ { | |
| 6 | + model = "Toshiba AC100 / Dynabook AZ"; | |
| 7 | + compatible = "compal,paz00", "nvidia,tegra20"; | |
| 8 | + | |
| 9 | + memory@0 { | |
| 10 | + reg = <0x00000000 0x20000000>; | |
| 11 | + }; | |
| 12 | + | |
| 13 | + i2c@7000c000 { | |
| 14 | + clock-frequency = <400000>; | |
| 15 | + }; | |
| 16 | + | |
| 17 | + i2c@7000c400 { | |
| 18 | + clock-frequency = <400000>; | |
| 19 | + }; | |
| 20 | + | |
| 21 | + i2c@7000c500 { | |
| 22 | + status = "disable"; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + nvec@7000c500 { | |
| 26 | + #address-cells = <1>; | |
| 27 | + #size-cells = <0>; | |
| 28 | + compatible = "nvidia,nvec"; | |
| 29 | + reg = <0x7000C500 0x100>; | |
| 30 | + interrupts = <0 92 0x04>; | |
| 31 | + clock-frequency = <80000>; | |
| 32 | + request-gpios = <&gpio 170 0>; | |
| 33 | + slave-addr = <138>; | |
| 34 | + }; | |
| 35 | + | |
| 36 | + i2c@7000d000 { | |
| 37 | + clock-frequency = <400000>; | |
| 38 | + }; | |
| 39 | + | |
| 40 | + serial@70006000 { | |
| 41 | + clock-frequency = <216000000>; | |
| 42 | + }; | |
| 43 | + | |
| 44 | + serial@70006040 { | |
| 45 | + status = "disable"; | |
| 46 | + }; | |
| 47 | + | |
| 48 | + serial@70006200 { | |
| 49 | + status = "disable"; | |
| 50 | + }; | |
| 51 | + | |
| 52 | + serial@70006300 { | |
| 53 | + clock-frequency = <216000000>; | |
| 54 | + }; | |
| 55 | + | |
| 56 | + serial@70006400 { | |
| 57 | + status = "disable"; | |
| 58 | + }; | |
| 59 | + | |
| 60 | + sdhci@c8000000 { | |
| 61 | + cd-gpios = <&gpio 173 0>; /* gpio PV5 */ | |
| 62 | + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | |
| 63 | + power-gpios = <&gpio 155 0>; /* gpio PT3 */ | |
| 64 | + }; | |
| 65 | + | |
| 66 | + sdhci@c8000200 { | |
| 67 | + status = "disable"; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + sdhci@c8000400 { | |
| 71 | + status = "disable"; | |
| 72 | + }; | |
| 73 | + | |
| 74 | + sdhci@c8000600 { | |
| 75 | + support-8bit; | |
| 76 | + }; | |
| 77 | +}; | |
| @@ -1,25 +1,65 @@ | ||
| 1 | 1 | /dts-v1/; |
| 2 | 2 | |
| 3 | −/memreserve/ 0x1c000000 0x04000000; | |
| 4 | 3 | /include/ "tegra20.dtsi" |
| 5 | 4 | |
| 6 | 5 | / { |
| 7 | 6 | model = "NVIDIA Seaboard"; |
| 8 | 7 | compatible = "nvidia,seaboard", "nvidia,tegra20"; |
| 9 | 8 | |
| 10 | − chosen { | |
| 11 | − bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait"; | |
| 12 | − }; | |
| 13 | − | |
| 14 | 9 | memory { |
| 15 | 10 | device_type = "memory"; |
| 16 | 11 | reg = < 0x00000000 0x40000000 >; |
| 17 | 12 | }; |
| 18 | 13 | |
| 14 | + i2c@7000c000 { | |
| 15 | + clock-frequency = <400000>; | |
| 16 | + }; | |
| 17 | + | |
| 18 | + i2c@7000c400 { | |
| 19 | + clock-frequency = <400000>; | |
| 20 | + }; | |
| 21 | + | |
| 22 | + i2c@7000c500 { | |
| 23 | + clock-frequency = <400000>; | |
| 24 | + }; | |
| 25 | + | |
| 26 | + i2c@7000d000 { | |
| 27 | + clock-frequency = <400000>; | |
| 28 | + | |
| 29 | + adt7461@4c { | |
| 30 | + compatible = "adt7461"; | |
| 31 | + reg = <0x4c>; | |
| 32 | + }; | |
| 33 | + }; | |
| 34 | + | |
| 35 | + serial@70006000 { | |
| 36 | + status = "disable"; | |
| 37 | + }; | |
| 38 | + | |
| 39 | + serial@70006040 { | |
| 40 | + status = "disable"; | |
| 41 | + }; | |
| 42 | + | |
| 43 | + serial@70006200 { | |
| 44 | + status = "disable"; | |
| 45 | + }; | |
| 46 | + | |
| 19 | 47 | serial@70006300 { |
| 20 | 48 | clock-frequency = < 216000000 >; |
| 21 | 49 | }; |
| 22 | 50 | |
| 51 | + serial@70006400 { | |
| 52 | + status = "disable"; | |
| 53 | + }; | |
| 54 | + | |
| 55 | + sdhci@c8000000 { | |
| 56 | + status = "disable"; | |
| 57 | + }; | |
| 58 | + | |
| 59 | + sdhci@c8000200 { | |
| 60 | + status = "disable"; | |
| 61 | + }; | |
| 62 | + | |
| 23 | 63 | sdhci@c8000400 { |
| 24 | 64 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
| 25 | 65 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
| @@ -29,4 +69,28 @@ · 3 unmodified lines | ||
| 29 | 69 | sdhci@c8000600 { |
| 30 | 70 | support-8bit; |
| 31 | 71 | }; |
| 72 | + | |
| 73 | + usb@c5000000 { | |
| 74 | + nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ | |
| 75 | + }; | |
| 76 | + | |
| 77 | + gpio-keys { | |
| 78 | + compatible = "gpio-keys"; | |
| 79 | + | |
| 80 | + power { | |
| 81 | + label = "Power"; | |
| 82 | + gpios = <&gpio 170 1>; /* gpio PV2, active low */ | |
| 83 | + linux,code = <116>; /* KEY_POWER */ | |
| 84 | + gpio-key,wakeup; | |
| 85 | + }; | |
| 86 | + | |
| 87 | + lid { | |
| 88 | + label = "Lid"; | |
| 89 | + gpios = <&gpio 23 0>; /* gpio PC7 */ | |
| 90 | + linux,input-type = <5>; /* EV_SW */ | |
| 91 | + linux,code = <0>; /* SW_LID */ | |
| 92 | + debounce-interval = <1>; | |
| 93 | + gpio-key,wakeup; | |
| 94 | + }; | |
| 95 | + }; | |
| 32 | 96 | }; |
| @@ -0,0 +1,65 @@ | ||
| 1 | +/dts-v1/; | |
| 2 | + | |
| 3 | +/include/ "tegra20.dtsi" | |
| 4 | + | |
| 5 | +/ { | |
| 6 | + model = "Compulab TrimSlice board"; | |
| 7 | + compatible = "compulab,trimslice", "nvidia,tegra20"; | |
| 8 | + | |
| 9 | + memory@0 { | |
| 10 | + reg = < 0x00000000 0x40000000 >; | |
| 11 | + }; | |
| 12 | + | |
| 13 | + i2c@7000c000 { | |
| 14 | + clock-frequency = <400000>; | |
| 15 | + }; | |
| 16 | + | |
| 17 | + i2c@7000c400 { | |
| 18 | + clock-frequency = <400000>; | |
| 19 | + }; | |
| 20 | + | |
| 21 | + i2c@7000c500 { | |
| 22 | + clock-frequency = <400000>; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + i2c@7000d000 { | |
| 26 | + status = "disable"; | |
| 27 | + }; | |
| 28 | + | |
| 29 | + serial@70006000 { | |
| 30 | + clock-frequency = < 216000000 >; | |
| 31 | + }; | |
| 32 | + | |
| 33 | + serial@70006040 { | |
| 34 | + status = "disable"; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + serial@70006200 { | |
| 38 | + status = "disable"; | |
| 39 | + }; | |
| 40 | + | |
| 41 | + serial@70006300 { | |
| 42 | + status = "disable"; | |
| 43 | + }; | |
| 44 | + | |
| 45 | + serial@70006400 { | |
| 46 | + status = "disable"; | |
| 47 | + }; | |
| 48 | + | |
| 49 | + sdhci@c8000000 { | |
| 50 | + status = "disable"; | |
| 51 | + }; | |
| 52 | + | |
| 53 | + sdhci@c8000200 { | |
| 54 | + status = "disable"; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + sdhci@c8000400 { | |
| 58 | + status = "disable"; | |
| 59 | + }; | |
| 60 | + | |
| 61 | + sdhci@c8000600 { | |
| 62 | + cd-gpios = <&gpio 121 0>; | |
| 63 | + wp-gpios = <&gpio 122 0>; | |
| 64 | + }; | |
| 65 | +}; | |
| @@ -1,24 +1,59 @@ | ||
| 1 | 1 | /dts-v1/; |
| 2 | 2 | |
| 3 | −/memreserve/ 0x1c000000 0x04000000; | |
| 4 | 3 | /include/ "tegra20.dtsi" |
| 5 | 4 | |
| 6 | 5 | / { |
| 7 | 6 | model = "NVIDIA Tegra2 Ventana evaluation board"; |
| 8 | 7 | compatible = "nvidia,ventana", "nvidia,tegra20"; |
| 9 | 8 | |
| 10 | − chosen { | |
| 11 | − bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/ram rdinit=/sbin/init"; | |
| 12 | − }; | |
| 13 | − | |
| 14 | 9 | memory { |
| 15 | 10 | reg = < 0x00000000 0x40000000 >; |
| 16 | 11 | }; |
| 17 | 12 | |
| 13 | + i2c@7000c000 { | |
| 14 | + clock-frequency = <400000>; | |
| 15 | + }; | |
| 16 | + | |
| 17 | + i2c@7000c400 { | |
| 18 | + clock-frequency = <400000>; | |
| 19 | + }; | |
| 20 | + | |
| 21 | + i2c@7000c500 { | |
| 22 | + clock-frequency = <400000>; | |
| 23 | + }; | |
| 24 | + | |
| 25 | + i2c@7000d000 { | |
| 26 | + clock-frequency = <400000>; | |
| 27 | + }; | |
| 28 | + | |
| 29 | + serial@70006000 { | |
| 30 | + status = "disable"; | |
| 31 | + }; | |
| 32 | + | |
| 33 | + serial@70006040 { | |
| 34 | + status = "disable"; | |
| 35 | + }; | |
| 36 | + | |
| 37 | + serial@70006200 { | |
| 38 | + status = "disable"; | |
| 39 | + }; | |
| 40 | + | |
| 18 | 41 | serial@70006300 { |
| 19 | 42 | clock-frequency = < 216000000 >; |
| 20 | 43 | }; |
| 21 | 44 | |
| 45 | + serial@70006400 { | |
| 46 | + status = "disable"; | |
| 47 | + }; | |
| 48 | + | |
| 49 | + sdhci@c8000000 { | |
| 50 | + status = "disable"; | |
| 51 | + }; | |
| 52 | + | |
| 53 | + sdhci@c8000200 { | |
| 54 | + status = "disable"; | |
| 55 | + }; | |
| 56 | + | |
| 22 | 57 | sdhci@c8000400 { |
| 23 | 58 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ |
| 24 | 59 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ |
| @@ -5,9 +5,9 @@ · 4 unmodified lines | ||
| 5 | 5 | interrupt-parent = <&intc>; |
| 6 | 6 | |
| 7 | 7 | intc: interrupt-controller@50041000 { |
| 8 | − compatible = "nvidia,tegra20-gic"; | |
| 8 | + compatible = "arm,cortex-a9-gic"; | |
| 9 | 9 | interrupt-controller; |
| 10 | − #interrupt-cells = <1>; | |
| 10 | + #interrupt-cells = <3>; | |
| 11 | 11 | reg = < 0x50041000 0x1000 >, |
| 12 | 12 | < 0x50040100 0x0100 >; |
| 13 | 13 | }; |
| @@ -17,7 +17,7 @@ · 3 unmodified lines | ||
| 17 | 17 | #size-cells = <0>; |
| 18 | 18 | compatible = "nvidia,tegra20-i2c"; |
| 19 | 19 | reg = <0x7000C000 0x100>; |
| 20 | − interrupts = < 70 >; | |
| 20 | + interrupts = < 0 38 0x04 >; | |
| 21 | 21 | }; |
| 22 | 22 | |
| 23 | 23 | i2c@7000c400 { |
| @@ -25,7 +25,7 @@ · 1 unmodified line | ||
| 25 | 25 | #size-cells = <0>; |
| 26 | 26 | compatible = "nvidia,tegra20-i2c"; |
| 27 | 27 | reg = <0x7000C400 0x100>; |
| 28 | − interrupts = < 116 >; | |
| 28 | + interrupts = < 0 84 0x04 >; | |
| 29 | 29 | }; |
| 30 | 30 | |
| 31 | 31 | i2c@7000c500 { |
| @@ -33,38 +33,32 @@ · 1 unmodified line | ||
| 33 | 33 | #size-cells = <0>; |
| 34 | 34 | compatible = "nvidia,tegra20-i2c"; |
| 35 | 35 | reg = <0x7000C500 0x100>; |
| 36 | − interrupts = < 124 >; | |
| 36 | + interrupts = < 0 92 0x04 >; | |
| 37 | 37 | }; |
| 38 | 38 | |
| 39 | 39 | i2c@7000d000 { |
| 40 | 40 | #address-cells = <1>; |
| 41 | 41 | #size-cells = <0>; |
| 42 | − compatible = "nvidia,tegra20-i2c"; | |
| 42 | + compatible = "nvidia,tegra20-i2c-dvc"; | |
| 43 | 43 | reg = <0x7000D000 0x200>; |
| 44 | − interrupts = < 85 >; | |
| 44 | + interrupts = < 0 53 0x04 >; | |
| 45 | 45 | }; |
| 46 | 46 | |
| 47 | 47 | i2s@70002800 { |
| 48 | − #address-cells = <1>; | |
| 49 | − #size-cells = <0>; | |
| 50 | 48 | compatible = "nvidia,tegra20-i2s"; |
| 51 | 49 | reg = <0x70002800 0x200>; |
| 52 | − interrupts = < 45 >; | |
| 50 | + interrupts = < 0 13 0x04 >; | |
| 53 | 51 | dma-channel = < 2 >; |
| 54 | 52 | }; |
| 55 | 53 | |
| 56 | 54 | i2s@70002a00 { |
| 57 | − #address-cells = <1>; | |
| 58 | − #size-cells = <0>; | |
| 59 | 55 | compatible = "nvidia,tegra20-i2s"; |
| 60 | 56 | reg = <0x70002a00 0x200>; |
| 61 | − interrupts = < 35 >; | |
| 57 | + interrupts = < 0 3 0x04 >; | |
| 62 | 58 | dma-channel = < 1 >; |
| 63 | 59 | }; |
| 64 | 60 | |
| 65 | 61 | das@70000c00 { |
| 66 | − #address-cells = <1>; | |
| 67 | − #size-cells = <0>; | |
| 68 | 62 | compatible = "nvidia,tegra20-das"; |
| 69 | 63 | reg = <0x70000c00 0x80>; |
| 70 | 64 | }; |
| @@ -72,7 +66,13 @@ · 1 unmodified line | ||
| 72 | 66 | gpio: gpio@6000d000 { |
| 73 | 67 | compatible = "nvidia,tegra20-gpio"; |
| 74 | 68 | reg = < 0x6000d000 0x1000 >; |
| 75 | − interrupts = < 64 65 66 67 87 119 121 >; | |
| 69 | + interrupts = < 0 32 0x04 | |
| 70 | + 0 33 0x04 | |
| 71 | + 0 34 0x04 | |
| 72 | + 0 35 0x04 | |
| 73 | + 0 55 0x04 | |
| 74 | + 0 87 0x04 | |
| 75 | + 0 89 0x04 >; | |
| 76 | 76 | #gpio-cells = <2>; |
| 77 | 77 | gpio-controller; |
| 78 | 78 | }; |
| @@ -89,59 +89,80 @@ · 10 unmodified lines | ||
| 89 | 89 | compatible = "nvidia,tegra20-uart"; |
| 90 | 90 | reg = <0x70006000 0x40>; |
| 91 | 91 | reg-shift = <2>; |
| 92 | − interrupts = < 68 >; | |
| 92 | + interrupts = < 0 36 0x04 >; | |
| 93 | 93 | }; |
| 94 | 94 | |
| 95 | 95 | serial@70006040 { |
| 96 | 96 | compatible = "nvidia,tegra20-uart"; |
| 97 | 97 | reg = <0x70006040 0x40>; |
| 98 | 98 | reg-shift = <2>; |
| 99 | − interrupts = < 69 >; | |
| 99 | + interrupts = < 0 37 0x04 >; | |
| 100 | 100 | }; |
| 101 | 101 | |
| 102 | 102 | serial@70006200 { |
| 103 | 103 | compatible = "nvidia,tegra20-uart"; |
| 104 | 104 | reg = <0x70006200 0x100>; |
| 105 | 105 | reg-shift = <2>; |
| 106 | − interrupts = < 78 >; | |
| 106 | + interrupts = < 0 46 0x04 >; | |
| 107 | 107 | }; |
| 108 | 108 | |
| 109 | 109 | serial@70006300 { |
| 110 | 110 | compatible = "nvidia,tegra20-uart"; |
| 111 | 111 | reg = <0x70006300 0x100>; |
| 112 | 112 | reg-shift = <2>; |
| 113 | − interrupts = < 122 >; | |
| 113 | + interrupts = < 0 90 0x04 >; | |
| 114 | 114 | }; |
| 115 | 115 | |
| 116 | 116 | serial@70006400 { |
| 117 | 117 | compatible = "nvidia,tegra20-uart"; |
| 118 | 118 | reg = <0x70006400 0x100>; |
| 119 | 119 | reg-shift = <2>; |
| 120 | − interrupts = < 123 >; | |
| 120 | + interrupts = < 0 91 0x04 >; | |
| 121 | 121 | }; |
| 122 | 122 | |
| 123 | 123 | sdhci@c8000000 { |
| 124 | 124 | compatible = "nvidia,tegra20-sdhci"; |
| 125 | 125 | reg = <0xc8000000 0x200>; |
| 126 | − interrupts = < 46 >; | |
| 126 | + interrupts = < 0 14 0x04 >; | |
| 127 | 127 | }; |
| 128 | 128 | |
| 129 | 129 | sdhci@c8000200 { |
| 130 | 130 | compatible = "nvidia,tegra20-sdhci"; |
| 131 | 131 | reg = <0xc8000200 0x200>; |
| 132 | − interrupts = < 47 >; | |
| 132 | + interrupts = < 0 15 0x04 >; | |
| 133 | 133 | }; |
| 134 | 134 | |
| 135 | 135 | sdhci@c8000400 { |
| 136 | 136 | compatible = "nvidia,tegra20-sdhci"; |
| 137 | 137 | reg = <0xc8000400 0x200>; |
| 138 | − interrupts = < 51 >; | |
| 138 | + interrupts = < 0 19 0x04 >; | |
| 139 | 139 | }; |
| 140 | 140 | |
| 141 | 141 | sdhci@c8000600 { |
| 142 | 142 | compatible = "nvidia,tegra20-sdhci"; |
| 143 | 143 | reg = <0xc8000600 0x200>; |
| 144 | − interrupts = < 63 >; | |
| 144 | + interrupts = < 0 31 0x04 >; | |
| 145 | + }; | |
| 146 | + | |
| 147 | + usb@c5000000 { | |
| 148 | + compatible = "nvidia,tegra20-ehci", "usb-ehci"; | |
| 149 | + reg = <0xc5000000 0x4000>; | |
| 150 | + interrupts = < 0 20 0x04 >; | |
| 151 | + phy_type = "utmi"; | |
| 152 | + }; | |
| 153 | + | |
| 154 | + usb@c5004000 { | |
| 155 | + compatible = "nvidia,tegra20-ehci", "usb-ehci"; | |
| 156 | + reg = <0xc5004000 0x4000>; | |
| 157 | + interrupts = < 0 21 0x04 >; | |
| 158 | + phy_type = "ulpi"; | |
| 159 | + }; | |
| 160 | + | |
| 161 | + usb@c5008000 { | |
| 162 | + compatible = "nvidia,tegra20-ehci", "usb-ehci"; | |
| 163 | + reg = <0xc5008000 0x4000>; | |
| 164 | + interrupts = < 0 97 0x04 >; | |
| 165 | + phy_type = "utmi"; | |
| 145 | 166 | }; |
| 146 | 167 | }; |
| 147 | 168 | |
| @@ -0,0 +1,127 @@ | ||
| 1 | +/include/ "skeleton.dtsi" | |
| 2 | + | |
| 3 | +/ { | |
| 4 | + compatible = "nvidia,tegra30"; | |
| 5 | + interrupt-parent = <&intc>; | |
| 6 | + | |
| 7 | + intc: interrupt-controller@50041000 { | |
| 8 | + compatible = "arm,cortex-a9-gic"; | |
| 9 | + interrupt-controller; | |
| 10 | + #interrupt-cells = <3>; | |
| 11 | + reg = < 0x50041000 0x1000 >, | |
| 12 | + < 0x50040100 0x0100 >; | |
| 13 | + }; | |
| 14 | + | |
| 15 | + i2c@7000c000 { | |
| 16 | + #address-cells = <1>; | |
| 17 | + #size-cells = <0>; | |
| 18 | + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | |
| 19 | + reg = <0x7000C000 0x100>; | |
| 20 | + interrupts = < 0 38 0x04 >; | |
| 21 | + }; | |
| 22 | + | |
| 23 | + i2c@7000c400 { | |
| 24 | + #address-cells = <1>; | |
| 25 | + #size-cells = <0>; | |
| 26 | + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | |
| 27 | + reg = <0x7000C400 0x100>; | |
| 28 | + interrupts = < 0 84 0x04 >; | |
| 29 | + }; | |
| 30 | + | |
| 31 | + i2c@7000c500 { | |
| 32 | + #address-cells = <1>; | |
| 33 | + #size-cells = <0>; | |
| 34 | + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | |
| 35 | + reg = <0x7000C500 0x100>; | |
| 36 | + interrupts = < 0 92 0x04 >; | |
| 37 | + }; | |
| 38 | + | |
| 39 | + i2c@7000c700 { | |
| 40 | + #address-cells = <1>; | |
| 41 | + #size-cells = <0>; | |
| 42 | + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | |
| 43 | + reg = <0x7000c700 0x100>; | |
| 44 | + interrupts = < 0 120 0x04 >; | |
| 45 | + }; | |
| 46 | + | |
| 47 | + i2c@7000d000 { | |
| 48 | + #address-cells = <1>; | |
| 49 | + #size-cells = <0>; | |
| 50 | + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; | |
| 51 | + reg = <0x7000D000 0x100>; | |
| 52 | + interrupts = < 0 53 0x04 >; | |
| 53 | + }; | |
| 54 | + | |
| 55 | + gpio: gpio@6000d000 { | |
| 56 | + compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio"; | |
| 57 | + reg = < 0x6000d000 0x1000 >; | |
| 58 | + interrupts = < 0 32 0x04 0 33 0x04 0 34 0x04 0 35 0x04 0 55 0x04 0 87 0x04 0 89 0x04 >; | |
| 59 | + #gpio-cells = <2>; | |
| 60 | + gpio-controller; | |
| 61 | + }; | |
| 62 | + | |
| 63 | + serial@70006000 { | |
| 64 | + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | |
| 65 | + reg = <0x70006000 0x40>; | |
| 66 | + reg-shift = <2>; | |
| 67 | + interrupts = < 0 36 0x04 >; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + serial@70006040 { | |
| 71 | + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | |
| 72 | + reg = <0x70006040 0x40>; | |
| 73 | + reg-shift = <2>; | |
| 74 | + interrupts = < 0 37 0x04 >; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + serial@70006200 { | |
| 78 | + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | |
| 79 | + reg = <0x70006200 0x100>; | |
| 80 | + reg-shift = <2>; | |
| 81 | + interrupts = < 0 46 0x04 >; | |
| 82 | + }; | |
| 83 | + | |
| 84 | + serial@70006300 { | |
| 85 | + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | |
| 86 | + reg = <0x70006300 0x100>; | |
| 87 | + reg-shift = <2>; | |
| 88 | + interrupts = < 0 90 0x04 >; | |
| 89 | + }; | |
| 90 | + | |
| 91 | + serial@70006400 { | |
| 92 | + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; | |
| 93 | + reg = <0x70006400 0x100>; | |
| 94 | + reg-shift = <2>; | |
| 95 | + interrupts = < 0 91 0x04 >; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + sdhci@78000000 { | |
| 99 | + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | |
| 100 | + reg = <0x78000000 0x200>; | |
| 101 | + interrupts = < 0 14 0x04 >; | |
| 102 | + }; | |
| 103 | + | |
| 104 | + sdhci@78000200 { | |
| 105 | + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | |
| 106 | + reg = <0x78000200 0x200>; | |
| 107 | + interrupts = < 0 15 0x04 >; | |
| 108 | + }; | |
| 109 | + | |
| 110 | + sdhci@78000400 { | |
| 111 | + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | |
| 112 | + reg = <0x78000400 0x200>; | |
| 113 | + interrupts = < 0 19 0x04 >; | |
| 114 | + }; | |
| 115 | + | |
| 116 | + sdhci@78000600 { | |
| 117 | + compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; | |
| 118 | + reg = <0x78000600 0x200>; | |
| 119 | + interrupts = < 0 31 0x04 >; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + pinmux: pinmux@70000000 { | |
| 123 | + compatible = "nvidia,tegra30-pinmux"; | |
| 124 | + reg = < 0x70000868 0xd0 /* Pad control registers */ | |
| 125 | + 0x70003000 0x3e0 >; /* Mux registers */ | |
| 126 | + }; | |
| 127 | +}; | |
| @@ -0,0 +1,37 @@ | ||
| 1 | + | |
| 2 | +/ { | |
| 3 | + testcase-data { | |
| 4 | + phandle-tests { | |
| 5 | + provider0: provider0 { | |
| 6 | + #phandle-cells = <0>; | |
| 7 | + }; | |
| 8 | + | |
| 9 | + provider1: provider1 { | |
| 10 | + #phandle-cells = <1>; | |
| 11 | + }; | |
| 12 | + | |
| 13 | + provider2: provider2 { | |
| 14 | + #phandle-cells = <2>; | |
| 15 | + }; | |
| 16 | + | |
| 17 | + provider3: provider3 { | |
| 18 | + #phandle-cells = <3>; | |
| 19 | + }; | |
| 20 | + | |
| 21 | + consumer-a { | |
| 22 | + phandle-list = <&provider1 1>, | |
| 23 | + <&provider2 2 0>, | |
| 24 | + <0>, | |
| 25 | + <&provider3 4 4 3>, | |
| 26 | + <&provider2 5 100>, | |
| 27 | + <&provider0>, | |
| 28 | + <&provider1 7>; | |
| 29 | + phandle-list-names = "first", "second", "third"; | |
| 30 | + | |
| 31 | + phandle-list-bad-phandle = <12345678 0 0>; | |
| 32 | + phandle-list-bad-args = <&provider2 1 0>, | |
| 33 | + <&provider3 0>; | |
| 34 | + }; | |
| 35 | + }; | |
| 36 | + }; | |
| 37 | +}; | |
| @@ -0,0 +1 @@ | ||
| 1 | +/include/ "tests-phandle.dtsi" | |
| @@ -25,6 +25,11 @@ · 24 unmodified lines | ||
| 25 | 25 | dbgu: serial@fffff200 { |
| 26 | 26 | status = "okay"; |
| 27 | 27 | }; |
| 28 | + | |
| 29 | + macb0: ethernet@fffc4000 { | |
| 30 | + phy-mode = "rmii"; | |
| 31 | + status = "okay"; | |
| 32 | + }; | |
| 28 | 33 | }; |
| 29 | 34 | }; |
| 30 | 35 | }; |
| @@ -46,3 +46,5 @@ · 45 unmodified lines | ||
| 46 | 46 | }; |
| 47 | 47 | }; |
| 48 | 48 | }; |
| 49 | + | |
| 50 | +/include/ "testcases/tests.dtsi" | |
| @@ -1,8 +1,14 @@ | ||
| 1 | 1 | config ARM_GIC |
| 2 | 2 | select IRQ_DOMAIN |
| 3 | + select MULTI_IRQ_HANDLER | |
| 4 | + bool | |
| 5 | + | |
| 6 | +config GIC_NON_BANKED | |
| 3 | 7 | bool |
| 4 | 8 | |
| 5 | 9 | config ARM_VIC |
| 10 | + select IRQ_DOMAIN | |
| 11 | + select MULTI_IRQ_HANDLER | |
| 6 | 12 | bool |
| 7 | 13 | |
| 8 | 14 | config ARM_VIC_NR |
| @@ -40,13 +40,36 @@ · 39 unmodified lines | ||
| 40 | 40 | #include <linux/slab.h> |
| 41 | 41 | |
| 42 | 42 | #include <asm/irq.h> |
| 43 | +#include <asm/exception.h> | |
| 43 | 44 | #include <asm/mach/irq.h> |
| 44 | 45 | #include <asm/hardware/gic.h> |
| 45 | 46 | |
| 46 | −static DEFINE_RAW_SPINLOCK(irq_controller_lock); | |
| 47 | +union gic_base { | |
| 48 | + void __iomem *common_base; | |
| 49 | + void __percpu __iomem **percpu_base; | |
| 50 | +}; | |
| 47 | 51 | |
| 48 | −/* Address of GIC 0 CPU interface */ | |
| 49 | −void __iomem *gic_cpu_base_addr __read_mostly; | |
| 52 | +struct gic_chip_data { | |
| 53 | + unsigned int irq_offset; | |
| 54 | + union gic_base dist_base; | |
| 55 | + union gic_base cpu_base; | |
| 56 | +#ifdef CONFIG_CPU_PM | |
| 57 | + u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; | |
| 58 | + u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; | |
| 59 | + u32 saved_spi_target[DIV_ROUND_UP(1020, 4)]; | |
| 60 | + u32 __percpu *saved_ppi_enable; | |
| 61 | + u32 __percpu *saved_ppi_conf; | |
| 62 | +#endif | |
| 63 | +#ifdef CONFIG_IRQ_DOMAIN | |
| 64 | + struct irq_domain domain; | |
| 65 | +#endif | |
| 66 | + unsigned int gic_irqs; | |
| 67 | +#ifdef CONFIG_GIC_NON_BANKED | |
| 68 | + void __iomem *(*get_base)(union gic_base *); | |
| 69 | +#endif | |
| 70 | +}; | |
| 71 | + | |
| 72 | +static DEFINE_RAW_SPINLOCK(irq_controller_lock); | |
| 50 | 73 | |
| 51 | 74 | /* |
| 52 | 75 | * Supported arch specific GIC irq extension. |
| @@ -67,16 +90,48 @@ struct irq_chip gic_arch_extn = { · 14 unmodified lines | ||
| 67 | 90 | |
| 68 | 91 | static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly; |
| 69 | 92 | |
| 93 | +#ifdef CONFIG_GIC_NON_BANKED | |
| 94 | +static void __iomem *gic_get_percpu_base(union gic_base *base) | |
| 95 | +{ | |
| 96 | + return *__this_cpu_ptr(base->percpu_base); | |
| 97 | +} | |
| 98 | + | |
| 99 | +static void __iomem *gic_get_common_base(union gic_base *base) | |
| 100 | +{ | |
| 101 | + return base->common_base; | |
| 102 | +} | |
| 103 | + | |
| 104 | +static inline void __iomem *gic_data_dist_base(struct gic_chip_data *data) | |
| 105 | +{ | |
| 106 | + return data->get_base(&data->dist_base); | |
| 107 | +} | |
| 108 | + | |
| 109 | +static inline void __iomem *gic_data_cpu_base(struct gic_chip_data *data) | |
| 110 | +{ | |
| 111 | + return data->get_base(&data->cpu_base); | |
| 112 | +} | |
| 113 | + | |
| 114 | +static inline void gic_set_base_accessor(struct gic_chip_data *data, | |
| 115 | + void __iomem *(*f)(union gic_base *)) | |
| 116 | +{ | |
| 117 | + data->get_base = f; | |
| 118 | +} | |
| 119 | +#else | |
| 120 | +#define gic_data_dist_base(d) ((d)->dist_base.common_base) | |
| 121 | +#define gic_data_cpu_base(d) ((d)->cpu_base.common_base) | |
| 122 | +#define gic_set_base_accessor(d,f) | |
| 123 | +#endif | |
| 124 | + | |
| 70 | 125 | static inline void __iomem *gic_dist_base(struct irq_data *d) |
| 71 | 126 | { |
| 72 | 127 | struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); |
| 73 | − return gic_data->dist_base; | |
| 128 | + return gic_data_dist_base(gic_data); | |
| 74 | 129 | } |
| 75 | 130 | |
| 76 | 131 | static inline void __iomem *gic_cpu_base(struct irq_data *d) |
| 77 | 132 | { |
| 78 | 133 | struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); |
| 79 | − return gic_data->cpu_base; | |
| 134 | + return gic_data_cpu_base(gic_data); | |
| 80 | 135 | } |
| 81 | 136 | |
| 82 | 137 | static inline unsigned int gic_irq(struct irq_data *d) |
| @@ -215,6 +270,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on) · 132 unmodified lines | ||
| 215 | 270 | #define gic_set_wake NULL |
| 216 | 271 | #endif |
| 217 | 272 | |
| 273 | +asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) | |
| 274 | +{ | |
| 275 | + u32 irqstat, irqnr; | |
| 276 | + struct gic_chip_data *gic = &gic_data[0]; | |
| 277 | + void __iomem *cpu_base = gic_data_cpu_base(gic); | |
| 278 | + | |
| 279 | + do { | |
| 280 | + irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); | |
| 281 | + irqnr = irqstat & ~0x1c00; | |
| 282 | + | |
| 283 | + if (likely(irqnr > 15 && irqnr < 1021)) { | |
| 284 | + irqnr = irq_domain_to_irq(&gic->domain, irqnr); | |
| 285 | + handle_IRQ(irqnr, regs); | |
| 286 | + continue; | |
| 287 | + } | |
| 288 | + if (irqnr < 16) { | |
| 289 | + writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); | |
| 290 | +#ifdef CONFIG_SMP | |
| 291 | + handle_IPI(irqnr, regs); | |
| 292 | +#endif | |
| 293 | + continue; | |
| 294 | + } | |
| 295 | + break; | |
| 296 | + } while (1); | |
| 297 | +} | |
| 298 | + | |
| 218 | 299 | static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) |
| 219 | 300 | { |
| 220 | 301 | struct gic_chip_data *chip_data = irq_get_handler_data(irq); |
| @@ -225,7 +306,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) · 4 unmodified lines | ||
| 225 | 306 | chained_irq_enter(chip, desc); |
| 226 | 307 | |
| 227 | 308 | raw_spin_lock(&irq_controller_lock); |
| 228 | − status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK); | |
| 309 | + status = readl_relaxed(gic_data_cpu_base(chip_data) + GIC_CPU_INTACK); | |
| 229 | 310 | raw_spin_unlock(&irq_controller_lock); |
| 230 | 311 | |
| 231 | 312 | gic_irq = (status & 0x3ff); |
| @@ -270,7 +351,7 @@ static void __init gic_dist_init(struct gic_chip_data *gic) · 38 unmodified lines | ||
| 270 | 351 | u32 cpumask; |
| 271 | 352 | unsigned int gic_irqs = gic->gic_irqs; |
| 272 | 353 | struct irq_domain *domain = &gic->domain; |
| 273 | − void __iomem *base = gic->dist_base; | |
| 354 | + void __iomem *base = gic_data_dist_base(gic); | |
| 274 | 355 | u32 cpu = 0; |
| 275 | 356 | |
| 276 | 357 | #ifdef CONFIG_SMP |
| @@ -330,8 +411,8 @@ static void __init gic_dist_init(struct gic_chip_data *gic) · 53 unmodified lines | ||
| 330 | 411 | |
| 331 | 412 | static void __cpuinit gic_cpu_init(struct gic_chip_data *gic) |
| 332 | 413 | { |
| 333 | − void __iomem *dist_base = gic->dist_base; | |
| 334 | − void __iomem *base = gic->cpu_base; | |
| 414 | + void __iomem *dist_base = gic_data_dist_base(gic); | |
| 415 | + void __iomem *base = gic_data_cpu_base(gic); | |
| 335 | 416 | int i; |
| 336 | 417 | |
| 337 | 418 | /* |
| @@ -368,7 +449,7 @@ static void gic_dist_save(unsigned int gic_nr) · 30 unmodified lines | ||
| 368 | 449 | BUG(); |
| 369 | 450 | |
| 370 | 451 | gic_irqs = gic_data[gic_nr].gic_irqs; |
| 371 | − dist_base = gic_data[gic_nr].dist_base; | |
| 452 | + dist_base = gic_data_dist_base(&gic_data[gic_nr]); | |
| 372 | 453 | |
| 373 | 454 | if (!dist_base) |
| 374 | 455 | return; |
| @@ -403,7 +484,7 @@ static void gic_dist_restore(unsigned int gic_nr) · 28 unmodified lines | ||
| 403 | 484 | BUG(); |
| 404 | 485 | |
| 405 | 486 | gic_irqs = gic_data[gic_nr].gic_irqs; |
| 406 | − dist_base = gic_data[gic_nr].dist_base; | |
| 487 | + dist_base = gic_data_dist_base(&gic_data[gic_nr]); | |
| 407 | 488 | |
| 408 | 489 | if (!dist_base) |
| 409 | 490 | return; |
| @@ -439,8 +520,8 @@ static void gic_cpu_save(unsigned int gic_nr) · 29 unmodified lines | ||
| 439 | 520 | if (gic_nr >= MAX_GIC_NR) |
| 440 | 521 | BUG(); |
| 441 | 522 | |
| 442 | − dist_base = gic_data[gic_nr].dist_base; | |
| 443 | − cpu_base = gic_data[gic_nr].cpu_base; | |
| 523 | + dist_base = gic_data_dist_base(&gic_data[gic_nr]); | |
| 524 | + cpu_base = gic_data_cpu_base(&gic_data[gic_nr]); | |
| 444 | 525 | |
| 445 | 526 | if (!dist_base || !cpu_base) |
| 446 | 527 | return; |
| @@ -465,8 +546,8 @@ static void gic_cpu_restore(unsigned int gic_nr) · 18 unmodified lines | ||
| 465 | 546 | if (gic_nr >= MAX_GIC_NR) |
| 466 | 547 | BUG(); |
| 467 | 548 | |
| 468 | − dist_base = gic_data[gic_nr].dist_base; | |
| 469 | − cpu_base = gic_data[gic_nr].cpu_base; | |
| 549 | + dist_base = gic_data_dist_base(&gic_data[gic_nr]); | |
| 550 | + cpu_base = gic_data_cpu_base(&gic_data[gic_nr]); | |
| 470 | 551 | |
| 471 | 552 | if (!dist_base || !cpu_base) |
| 472 | 553 | return; |
| @@ -491,6 +572,11 @@ static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v) · 18 unmodified lines | ||
| 491 | 572 | int i; |
| 492 | 573 | |
| 493 | 574 | for (i = 0; i < MAX_GIC_NR; i++) { |
| 575 | +#ifdef CONFIG_GIC_NON_BANKED | |
| 576 | + /* Skip over unused GICs */ | |
| 577 | + if (!gic_data[i].get_base) | |
| 578 | + continue; | |
| 579 | +#endif | |
| 494 | 580 | switch (cmd) { |
| 495 | 581 | case CPU_PM_ENTER: |
| 496 | 582 | gic_cpu_save(i); |
| @@ -564,8 +650,9 @@ const struct irq_domain_ops gic_irq_domain_ops = { · 67 unmodified lines | ||
| 564 | 650 | #endif |
| 565 | 651 | }; |
| 566 | 652 | |
| 567 | −void __init gic_init(unsigned int gic_nr, int irq_start, | |
| 568 | − void __iomem *dist_base, void __iomem *cpu_base) | |
| 653 | +void __init gic_init_bases(unsigned int gic_nr, int irq_start, | |
| 654 | + void __iomem *dist_base, void __iomem *cpu_base, | |
| 655 | + u32 percpu_offset) | |
| 569 | 656 | { |
| 570 | 657 | struct gic_chip_data *gic; |
| 571 | 658 | struct irq_domain *domain; |
| @@ -575,8 +662,36 @@ void __init gic_init(unsigned int gic_nr, int irq_start, · 3 unmodified lines | ||
| 575 | 662 | |
| 576 | 663 | gic = &gic_data[gic_nr]; |
| 577 | 664 | domain = &gic->domain; |
| 578 | − gic->dist_base = dist_base; | |
| 579 | − gic->cpu_base = cpu_base; | |
| 665 | +#ifdef CONFIG_GIC_NON_BANKED | |
| 666 | + if (percpu_offset) { /* Frankein-GIC without banked registers... */ | |
| 667 | + unsigned int cpu; | |
| 668 | + | |
| 669 | + gic->dist_base.percpu_base = alloc_percpu(void __iomem *); | |
| 670 | + gic->cpu_base.percpu_base = alloc_percpu(void __iomem *); | |
| 671 | + if (WARN_ON(!gic->dist_base.percpu_base || | |
| 672 | + !gic->cpu_base.percpu_base)) { | |
| 673 | + free_percpu(gic->dist_base.percpu_base); | |
| 674 | + free_percpu(gic->cpu_base.percpu_base); | |
| 675 | + return; | |
| 676 | + } | |
| 677 | + | |
| 678 | + for_each_possible_cpu(cpu) { | |
| 679 | + unsigned long offset = percpu_offset * cpu_logical_map(cpu); | |
| 680 | + *per_cpu_ptr(gic->dist_base.percpu_base, cpu) = dist_base + offset; | |
| 681 | + *per_cpu_ptr(gic->cpu_base.percpu_base, cpu) = cpu_base + offset; | |
| 682 | + } | |
| 683 | + | |
| 684 | + gic_set_base_accessor(gic, gic_get_percpu_base); | |
| 685 | + } else | |
| 686 | +#endif | |
| 687 | + { /* Normal, sane GIC... */ | |
| 688 | + WARN(percpu_offset, | |
| 689 | + "GIC_NON_BANKED not enabled, ignoring %08x offset!", | |
| 690 | + percpu_offset); | |
| 691 | + gic->dist_base.common_base = dist_base; | |
| 692 | + gic->cpu_base.common_base = cpu_base; | |
| 693 | + gic_set_base_accessor(gic, gic_get_common_base); | |
| 694 | + } | |
| 580 | 695 | |
| 581 | 696 | /* |
| 582 | 697 | * For primary GICs, skip over SGIs. |
| @@ -584,8 +699,6 @@ void __init gic_init(unsigned int gic_nr, int irq_start, · 1 unmodified line | ||
| 584 | 699 | */ |
| 585 | 700 | domain->hwirq_base = 32; |
| 586 | 701 | if (gic_nr == 0) { |
| 587 | − gic_cpu_base_addr = cpu_base; | |
| 588 | − | |
| 589 | 702 | if ((irq_start & 31) > 0) { |
| 590 | 703 | domain->hwirq_base = 16; |
| 591 | 704 | if (irq_start != -1) |
| @@ -597,7 +710,7 @@ void __init gic_init(unsigned int gic_nr, int irq_start, · 5 unmodified lines | ||
| 597 | 710 | * Find out how many interrupts are supported. |
| 598 | 711 | * The GIC only supports up to 1020 interrupt sources. |
| 599 | 712 | */ |
| 600 | − gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f; | |
| 713 | + gic_irqs = readl_relaxed(gic_data_dist_base(gic) + GIC_DIST_CTR) & 0x1f; | |
| 601 | 714 | gic_irqs = (gic_irqs + 1) * 32; |
| 602 | 715 | if (gic_irqs > 1020) |
| 603 | 716 | gic_irqs = 1020; |
| @@ -645,7 +758,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) · 41 unmodified lines | ||
| 645 | 758 | dsb(); |
| 646 | 759 | |
| 647 | 760 | /* this always happens on GIC0 */ |
| 648 | − writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); | |
| 761 | + writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); | |
| 649 | 762 | } |
| 650 | 763 | #endif |
| 651 | 764 | |
| @@ -656,6 +769,7 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) · 4 unmodified lines | ||
| 656 | 769 | { |
| 657 | 770 | void __iomem *cpu_base; |
| 658 | 771 | void __iomem *dist_base; |
| 772 | + u32 percpu_offset; | |
| 659 | 773 | int irq; |
| 660 | 774 | struct irq_domain *domain = &gic_data[gic_cnt].domain; |
| 661 | 775 | |
| @@ -668,9 +782,12 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent) · 6 unmodified lines | ||
| 668 | 782 | cpu_base = of_iomap(node, 1); |
| 669 | 783 | WARN(!cpu_base, "unable to map gic cpu registers\n"); |
| 670 | 784 | |
| 785 | + if (of_property_read_u32(node, "cpu-offset", &percpu_offset)) | |
| 786 | + percpu_offset = 0; | |
| 787 | + | |
| 671 | 788 | domain->of_node = of_node_get(node); |
| 672 | 789 | |
| 673 | − gic_init(gic_cnt, -1, dist_base, cpu_base); | |
| 790 | + gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset); | |
| 674 | 791 | |
| 675 | 792 | if (parent) { |
| 676 | 793 | irq = irq_of_parse_and_map(node, 0); |
| @@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) · 298 unmodified lines | ||
| 299 | 299 | goto err1; |
| 300 | 300 | } |
| 301 | 301 | |
| 302 | − sys->resource[0] = &it8152_io; | |
| 303 | − sys->resource[1] = &it8152_mem; | |
| 302 | + pci_add_resource(&sys->resources, &it8152_io); | |
| 303 | + pci_add_resource(&sys->resources, &it8152_mem); | |
| 304 | 304 | |
| 305 | 305 | if (platform_notify || platform_notify_remove) { |
| 306 | 306 | printk(KERN_ERR "PCI: Can't use platform_notify\n"); |
| @@ -327,6 +327,9 @@ err0: · 20 unmodified lines | ||
| 327 | 327 | */ |
| 328 | 328 | unsigned int pcibios_max_latency = 255; |
| 329 | 329 | |
| 330 | +/* ITE bridge requires setting latency timer to avoid early bus access | |
| 331 | + termination by PCI bus master devices | |
| 332 | +*/ | |
| 330 | 333 | void pcibios_set_master(struct pci_dev *dev) |
| 331 | 334 | { |
| 332 | 335 | u8 lat; |
| @@ -352,7 +355,7 @@ void pcibios_set_master(struct pci_dev *dev) · 19 unmodified lines | ||
| 352 | 355 | |
| 353 | 356 | struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys) |
| 354 | 357 | { |
| 355 | − return pci_scan_bus(nr, &it8152_ops, sys); | |
| 358 | + return pci_scan_root_bus(NULL, nr, &it8152_ops, sys, &sys->resources); | |
| 356 | 359 | } |
| 357 | 360 | |
| 358 | 361 | EXPORT_SYMBOL(dma_set_coherent_mask); |
| @@ -1467,13 +1467,19 @@ int pl330_update(const struct pl330_info *pi) · 1466 unmodified lines | ||
| 1467 | 1467 | |
| 1468 | 1468 | /* Now that we are in no hurry, do the callbacks */ |
| 1469 | 1469 | while (!list_empty(&pl330->req_done)) { |
| 1470 | + struct pl330_req *r; | |
| 1471 | + | |
| 1470 | 1472 | rqdone = container_of(pl330->req_done.next, |
| 1471 | 1473 | struct _pl330_req, rqd); |
| 1472 | 1474 | |
| 1473 | 1475 | list_del_init(&rqdone->rqd); |
| 1474 | 1476 | |
| 1477 | + /* Detach the req */ | |
| 1478 | + r = rqdone->r; | |
| 1479 | + rqdone->r = NULL; | |
| 1480 | + | |
| 1475 | 1481 | spin_unlock_irqrestore(&pl330->lock, flags); |
| 1476 | − _callback(rqdone->r, PL330_ERR_NONE); | |
| 1482 | + _callback(r, PL330_ERR_NONE); | |
| 1477 | 1483 | spin_lock_irqsave(&pl330->lock, flags); |
| 1478 | 1484 | } |
| 1479 | 1485 | |
| @@ -143,7 +143,6 @@ static int sp804_set_next_event(unsigned long next, · 142 unmodified lines | ||
| 143 | 143 | } |
| 144 | 144 | |
| 145 | 145 | static struct clock_event_device sp804_clockevent = { |
| 146 | − .shift = 32, | |
| 147 | 146 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
| 148 | 147 | .set_mode = sp804_set_mode, |
| 149 | 148 | .set_next_event = sp804_set_next_event, |
| @@ -169,13 +168,9 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq, · 19 unmodified lines | ||
| 169 | 168 | |
| 170 | 169 | clkevt_base = base; |
| 171 | 170 | clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ); |
| 172 | − | |
| 173 | 171 | evt->name = name; |
| 174 | 172 | evt->irq = irq; |
| 175 | − evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift); | |
| 176 | − evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt); | |
| 177 | − evt->min_delta_ns = clockevent_delta2ns(0xf, evt); | |
| 178 | 173 | |
| 179 | 174 | setup_irq(irq, &sp804_timer_irq); |
| 180 | − clockevents_register_device(evt); | |
| 175 | + clockevents_config_and_register(evt, rate, 0xf, 0xffffffff); | |
| 181 | 176 | } |
| @@ -86,7 +86,8 @@ int __init via82c505_setup(int nr, struct pci_sys_data *sys) · 85 unmodified lines | ||
| 86 | 86 | struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata) |
| 87 | 87 | { |
| 88 | 88 | if (nr == 0) |
| 89 | − return pci_scan_bus(0, &via82c505_ops, sysdata); | |
| 89 | + return pci_scan_root_bus(NULL, 0, &via82c505_ops, sysdata, | |
| 90 | + &sysdata->resources); | |
| 90 | 91 | |
| 91 | 92 | return NULL; |
| 92 | 93 | } |
| @@ -19,17 +19,22 @@ · 18 unmodified lines | ||
| 19 | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | 20 | */ |
| 21 | 21 | |
| 22 | +#include <linux/export.h> | |
| 22 | 23 | #include <linux/init.h> |
| 23 | 24 | #include <linux/list.h> |
| 24 | 25 | #include <linux/io.h> |
| 26 | +#include <linux/irqdomain.h> | |
| 27 | +#include <linux/of.h> | |
| 28 | +#include <linux/of_address.h> | |
| 29 | +#include <linux/of_irq.h> | |
| 25 | 30 | #include <linux/syscore_ops.h> |
| 26 | 31 | #include <linux/device.h> |
| 27 | 32 | #include <linux/amba/bus.h> |
| 28 | 33 | |
| 34 | +#include <asm/exception.h> | |
| 29 | 35 | #include <asm/mach/irq.h> |
| 30 | 36 | #include <asm/hardware/vic.h> |
| 31 | 37 | |
| 32 | −#ifdef CONFIG_PM | |
| 33 | 38 | /** |
| 34 | 39 | * struct vic_device - VIC PM device |
| 35 | 40 | * @irq: The IRQ number for the base of the VIC. |
| @@ -40,6 +45,7 @@ · 4 unmodified lines | ||
| 40 | 45 | * @int_enable: Save for VIC_INT_ENABLE. |
| 41 | 46 | * @soft_int: Save for VIC_INT_SOFT. |
| 42 | 47 | * @protect: Save for VIC_PROTECT. |
| 48 | + * @domain: The IRQ domain for the VIC. | |
| 43 | 49 | */ |
| 44 | 50 | struct vic_device { |
| 45 | 51 | void __iomem *base; |
| @@ -50,13 +56,13 @@ struct vic_device { · 4 unmodified lines | ||
| 50 | 56 | u32 int_enable; |
| 51 | 57 | u32 soft_int; |
| 52 | 58 | u32 protect; |
| 59 | + struct irq_domain domain; | |
| 53 | 60 | }; |
| 54 | 61 | |
| 55 | 62 | /* we cannot allocate memory when VICs are initially registered */ |
| 56 | 63 | static struct vic_device vic_devices[CONFIG_ARM_VIC_NR]; |
| 57 | 64 | |
| 58 | 65 | static int vic_id; |
| 59 | −#endif /* CONFIG_PM */ | |
| 60 | 66 | |
| 61 | 67 | /** |
| 62 | 68 | * vic_init2 - common initialisation code |
| @@ -156,39 +162,50 @@ static int __init vic_pm_init(void) · 93 unmodified lines | ||
| 156 | 162 | return 0; |
| 157 | 163 | } |
| 158 | 164 | late_initcall(vic_pm_init); |
| 165 | +#endif /* CONFIG_PM */ | |
| 159 | 166 | |
| 160 | 167 | /** |
| 161 | − * vic_pm_register - Register a VIC for later power management control | |
| 168 | + * vic_register() - Register a VIC. | |
| 162 | 169 | * @base: The base address of the VIC. |
| 163 | 170 | * @irq: The base IRQ for the VIC. |
| 164 | 171 | * @resume_sources: bitmask of interrupts allowed for resume sources. |
| 172 | + * @node: The device tree node associated with the VIC. | |
| 165 | 173 | * |
| 166 | 174 | * Register the VIC with the system device tree so that it can be notified |
| 167 | 175 | * of suspend and resume requests and ensure that the correct actions are |
| 168 | 176 | * taken to re-instate the settings on resume. |
| 177 | + * | |
| 178 | + * This also configures the IRQ domain for the VIC. | |
| 169 | 179 | */ |
| 170 | −static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) | |
| 180 | +static void __init vic_register(void __iomem *base, unsigned int irq, | |
| 181 | + u32 resume_sources, struct device_node *node) | |
| 171 | 182 | { |
| 172 | 183 | struct vic_device *v; |
| 173 | 184 | |
| 174 | − if (vic_id >= ARRAY_SIZE(vic_devices)) | |
| 185 | + if (vic_id >= ARRAY_SIZE(vic_devices)) { | |
| 175 | 186 | printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); |
| 176 | − else { | |
| 177 | − v = &vic_devices[vic_id]; | |
| 178 | − v->base = base; | |
| 179 | − v->resume_sources = resume_sources; | |
| 180 | − v->irq = irq; | |
| 181 | − vic_id++; | |
| 187 | + return; | |
| 182 | 188 | } |
| 189 | + | |
| 190 | + v = &vic_devices[vic_id]; | |
| 191 | + v->base = base; | |
| 192 | + v->resume_sources = resume_sources; | |
| 193 | + v->irq = irq; | |
| 194 | + vic_id++; | |
| 195 | + | |
| 196 | + v->domain.irq_base = irq; | |
| 197 | + v->domain.nr_irq = 32; | |
| 198 | +#ifdef CONFIG_OF_IRQ | |
| 199 | + v->domain.of_node = of_node_get(node); | |
| 200 | +#endif /* CONFIG_OF */ | |
| 201 | + v->domain.ops = &irq_domain_simple_ops; | |
| 202 | + irq_domain_add(&v->domain); | |
| 183 | 203 | } |
| 184 | −#else | |
| 185 | −static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } | |
| 186 | −#endif /* CONFIG_PM */ | |
| 187 | 204 | |
| 188 | 205 | static void vic_ack_irq(struct irq_data *d) |
| 189 | 206 | { |
| 190 | 207 | void __iomem *base = irq_data_get_irq_chip_data(d); |
| 191 | − unsigned int irq = d->irq & 31; | |
| 208 | + unsigned int irq = d->hwirq; | |
| 192 | 209 | writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); |
| 193 | 210 | /* moreover, clear the soft-triggered, in case it was the reason */ |
| 194 | 211 | writel(1 << irq, base + VIC_INT_SOFT_CLEAR); |
| @@ -197,14 +214,14 @@ static void vic_ack_irq(struct irq_data *d) · 2 unmodified lines | ||
| 197 | 214 | static void vic_mask_irq(struct irq_data *d) |
| 198 | 215 | { |
| 199 | 216 | void __iomem *base = irq_data_get_irq_chip_data(d); |
| 200 | − unsigned int irq = d->irq & 31; | |
| 217 | + unsigned int irq = d->hwirq; | |
| 201 | 218 | writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); |
| 202 | 219 | } |
| 203 | 220 | |
| 204 | 221 | static void vic_unmask_irq(struct irq_data *d) |
| 205 | 222 | { |
| 206 | 223 | void __iomem *base = irq_data_get_irq_chip_data(d); |
| 207 | − unsigned int irq = d->irq & 31; | |
| 224 | + unsigned int irq = d->hwirq; | |
| 208 | 225 | writel(1 << irq, base + VIC_INT_ENABLE); |
| 209 | 226 | } |
| 210 | 227 | |
| @@ -226,7 +243,7 @@ static struct vic_device *vic_from_irq(unsigned int irq) · 15 unmodified lines | ||
| 226 | 243 | static int vic_set_wake(struct irq_data *d, unsigned int on) |
| 227 | 244 | { |
| 228 | 245 | struct vic_device *v = vic_from_irq(d->irq); |
| 229 | − unsigned int off = d->irq & 31; | |
| 246 | + unsigned int off = d->hwirq; | |
| 230 | 247 | u32 bit = 1 << off; |
| 231 | 248 | |
| 232 | 249 | if (!v) |
| @@ -301,7 +318,7 @@ static void __init vic_set_irq_sources(void __iomem *base, · 68 unmodified lines | ||
| 301 | 318 | * and 020 within the page. We call this "second block". |
| 302 | 319 | */ |
| 303 | 320 | static void __init vic_init_st(void __iomem *base, unsigned int irq_start, |
| 304 | − u32 vic_sources) | |
| 321 | + u32 vic_sources, struct device_node *node) | |
| 305 | 322 | { |
| 306 | 323 | unsigned int i; |
| 307 | 324 | int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; |
| @@ -328,17 +345,12 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, · 20 unmodified lines | ||
| 328 | 345 | } |
| 329 | 346 | |
| 330 | 347 | vic_set_irq_sources(base, irq_start, vic_sources); |
| 348 | + vic_register(base, irq_start, 0, node); | |
| 331 | 349 | } |
| 332 | 350 | |
| 333 | −/** | |
| 334 | − * vic_init - initialise a vectored interrupt controller | |
| 335 | − * @base: iomem base address | |
| 336 | − * @irq_start: starting interrupt number, must be muliple of 32 | |
| 337 | − * @vic_sources: bitmask of interrupt sources to allow | |
| 338 | − * @resume_sources: bitmask of interrupt sources to allow for resume | |
| 339 | − */ | |
| 340 | −void __init vic_init(void __iomem *base, unsigned int irq_start, | |
| 341 | − u32 vic_sources, u32 resume_sources) | |
| 351 | +static void __init __vic_init(void __iomem *base, unsigned int irq_start, | |
| 352 | + u32 vic_sources, u32 resume_sources, | |
| 353 | + struct device_node *node) | |
| 342 | 354 | { |
| 343 | 355 | unsigned int i; |
| 344 | 356 | u32 cellid = 0; |
| @@ -356,7 +368,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, · 11 unmodified lines | ||
| 356 | 368 | |
| 357 | 369 | switch(vendor) { |
| 358 | 370 | case AMBA_VENDOR_ST: |
| 359 | − vic_init_st(base, irq_start, vic_sources); | |
| 371 | + vic_init_st(base, irq_start, vic_sources, node); | |
| 360 | 372 | return; |
| 361 | 373 | default: |
| 362 | 374 | printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n"); |
| @@ -375,5 +387,81 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, · 12 unmodified lines | ||
| 375 | 387 | |
| 376 | 388 | vic_set_irq_sources(base, irq_start, vic_sources); |
| 377 | 389 | |
| 378 | − vic_pm_register(base, irq_start, resume_sources); | |
| 390 | + vic_register(base, irq_start, resume_sources, node); | |
| 391 | +} | |
| 392 | + | |
| 393 | +/** | |
| 394 | + * vic_init() - initialise a vectored interrupt controller | |
| 395 | + * @base: iomem base address | |
| 396 | + * @irq_start: starting interrupt number, must be muliple of 32 | |
| 397 | + * @vic_sources: bitmask of interrupt sources to allow | |
| 398 | + * @resume_sources: bitmask of interrupt sources to allow for resume | |
| 399 | + */ | |
| 400 | +void __init vic_init(void __iomem *base, unsigned int irq_start, | |
| 401 | + u32 vic_sources, u32 resume_sources) | |
| 402 | +{ | |
| 403 | + __vic_init(base, irq_start, vic_sources, resume_sources, NULL); | |
| 404 | +} | |
| 405 | + | |
| 406 | +#ifdef CONFIG_OF | |
| 407 | +int __init vic_of_init(struct device_node *node, struct device_node *parent) | |
| 408 | +{ | |
| 409 | + void __iomem *regs; | |
| 410 | + int irq_base; | |
| 411 | + | |
| 412 | + if (WARN(parent, "non-root VICs are not supported")) | |
| 413 | + return -EINVAL; | |
| 414 | + | |
| 415 | + regs = of_iomap(node, 0); | |
| 416 | + if (WARN_ON(!regs)) | |
| 417 | + return -EIO; | |
| 418 | + | |
| 419 | + irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id()); | |
| 420 | + if (WARN_ON(irq_base < 0)) | |
| 421 | + goto out_unmap; | |
| 422 | + | |
| 423 | + __vic_init(regs, irq_base, ~0, ~0, node); | |
| 424 | + | |
| 425 | + return 0; | |
| 426 | + | |
| 427 | + out_unmap: | |
| 428 | + iounmap(regs); | |
| 429 | + | |
| 430 | + return -EIO; | |
| 431 | +} | |
| 432 | +#endif /* CONFIG OF */ | |
| 433 | + | |
| 434 | +/* | |
| 435 | + * Handle each interrupt in a single VIC. Returns non-zero if we've | |
| 436 | + * handled at least one interrupt. This does a single read of the | |
| 437 | + * status register and handles all interrupts in order from LSB first. | |
| 438 | + */ | |
| 439 | +static int handle_one_vic(struct vic_device *vic, struct pt_regs *regs) | |
| 440 | +{ | |
| 441 | + u32 stat, irq; | |
| 442 | + int handled = 0; | |
| 443 | + | |
| 444 | + stat = readl_relaxed(vic->base + VIC_IRQ_STATUS); | |
| 445 | + while (stat) { | |
| 446 | + irq = ffs(stat) - 1; | |
| 447 | + handle_IRQ(irq_domain_to_irq(&vic->domain, irq), regs); | |
| 448 | + stat &= ~(1 << irq); | |
| 449 | + handled = 1; | |
| 450 | + } | |
| 451 | + | |
| 452 | + return handled; | |
| 453 | +} | |
| 454 | + | |
| 455 | +/* | |
| 456 | + * Keep iterating over all registered VIC's until there are no pending | |
| 457 | + * interrupts. | |
| 458 | + */ | |
| 459 | +asmlinkage void __exception_irq_entry vic_handle_irq(struct pt_regs *regs) | |
| 460 | +{ | |
| 461 | + int i, handled; | |
| 462 | + | |
| 463 | + do { | |
| 464 | + for (i = 0, handled = 0; i < vic_id; ++i) | |
| 465 | + handled |= handle_one_vic(&vic_devices[i], regs); | |
| 466 | + } while (handled); | |
| 379 | 467 | } |
| @@ -0,0 +1,72 @@ | ||
| 1 | +CONFIG_EXPERIMENTAL=y | |
| 2 | +CONFIG_SYSVIPC=y | |
| 3 | +CONFIG_IKCONFIG=y | |
| 4 | +CONFIG_IKCONFIG_PROC=y | |
| 5 | +CONFIG_LOG_BUF_SHIFT=16 | |
| 6 | +# CONFIG_UTS_NS is not set | |
| 7 | +# CONFIG_IPC_NS is not set | |
| 8 | +# CONFIG_USER_NS is not set | |
| 9 | +# CONFIG_PID_NS is not set | |
| 10 | +CONFIG_BLK_DEV_INITRD=y | |
| 11 | +CONFIG_INITRAMFS_SOURCE="" | |
| 12 | +CONFIG_CC_OPTIMIZE_FOR_SIZE=y | |
| 13 | +CONFIG_SLAB=y | |
| 14 | +CONFIG_MODULES=y | |
| 15 | +CONFIG_MODULE_UNLOAD=y | |
| 16 | +CONFIG_MODULE_FORCE_UNLOAD=y | |
| 17 | +# CONFIG_BLK_DEV_BSG is not set | |
| 18 | +# CONFIG_IOSCHED_DEADLINE is not set | |
| 19 | +# CONFIG_IOSCHED_CFQ is not set | |
| 20 | +CONFIG_ARCH_SHMOBILE=y | |
| 21 | +CONFIG_ARCH_R8A7740=y | |
| 22 | +CONFIG_MACH_BONITO=y | |
| 23 | +# CONFIG_SH_TIMER_TMU is not set | |
| 24 | +CONFIG_AEABI=y | |
| 25 | +# CONFIG_OABI_COMPAT is not set | |
| 26 | +CONFIG_FORCE_MAX_ZONEORDER=12 | |
| 27 | +CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 28 | +CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 29 | +CONFIG_CMDLINE="console=ttySC5,115200 earlyprintk=sh-sci.5,115200 ignore_loglevel" | |
| 30 | +CONFIG_KEXEC=y | |
| 31 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 32 | +# CONFIG_SUSPEND is not set | |
| 33 | +CONFIG_PM_RUNTIME=y | |
| 34 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 35 | +# CONFIG_FIRMWARE_IN_KERNEL is not set | |
| 36 | +CONFIG_MTD=y | |
| 37 | +CONFIG_MTD_CHAR=y | |
| 38 | +CONFIG_MTD_BLOCK=y | |
| 39 | +CONFIG_MTD_CFI=y | |
| 40 | +CONFIG_MTD_CFI_ADV_OPTIONS=y | |
| 41 | +CONFIG_MTD_CFI_INTELEXT=y | |
| 42 | +CONFIG_MTD_PHYSMAP=y | |
| 43 | +CONFIG_MTD_ARM_INTEGRATOR=y | |
| 44 | +CONFIG_MTD_BLOCK2MTD=y | |
| 45 | +CONFIG_SCSI=y | |
| 46 | +CONFIG_BLK_DEV_SD=y | |
| 47 | +# CONFIG_SCSI_LOWLEVEL is not set | |
| 48 | +# CONFIG_INPUT_KEYBOARD is not set | |
| 49 | +# CONFIG_INPUT_MOUSE is not set | |
| 50 | +# CONFIG_LEGACY_PTYS is not set | |
| 51 | +CONFIG_SERIAL_SH_SCI=y | |
| 52 | +CONFIG_SERIAL_SH_SCI_NR_UARTS=9 | |
| 53 | +CONFIG_SERIAL_SH_SCI_CONSOLE=y | |
| 54 | +# CONFIG_HW_RANDOM is not set | |
| 55 | +CONFIG_I2C=y | |
| 56 | +CONFIG_I2C_CHARDEV=y | |
| 57 | +CONFIG_I2C_SH_MOBILE=y | |
| 58 | +CONFIG_GPIO_SYSFS=y | |
| 59 | +# CONFIG_HWMON is not set | |
| 60 | +# CONFIG_MFD_SUPPORT is not set | |
| 61 | +# CONFIG_HID_SUPPORT is not set | |
| 62 | +# CONFIG_USB_SUPPORT is not set | |
| 63 | +CONFIG_UIO=y | |
| 64 | +CONFIG_UIO_PDRV=y | |
| 65 | +CONFIG_UIO_PDRV_GENIRQ=y | |
| 66 | +# CONFIG_DNOTIFY is not set | |
| 67 | +# CONFIG_INOTIFY_USER is not set | |
| 68 | +CONFIG_TMPFS=y | |
| 69 | +# CONFIG_MISC_FILESYSTEMS is not set | |
| 70 | +# CONFIG_ENABLE_WARN_DEPRECATED is not set | |
| 71 | +# CONFIG_ENABLE_MUST_CHECK is not set | |
| 72 | +# CONFIG_ARM_UNWIND is not set | |
| @@ -68,7 +68,6 @@ CONFIG_MTD_CFI=y · 67 unmodified lines | ||
| 68 | 68 | CONFIG_MTD_CFI_ADV_OPTIONS=y |
| 69 | 69 | CONFIG_MTD_CFI_GEOMETRY=y |
| 70 | 70 | # CONFIG_MTD_MAP_BANK_WIDTH_1 is not set |
| 71 | −# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set | |
| 72 | 71 | # CONFIG_MTD_CFI_I2 is not set |
| 73 | 72 | CONFIG_MTD_CFI_INTELEXT=y |
| 74 | 73 | CONFIG_MTD_PHYSMAP=y |
| @@ -0,0 +1,122 @@ | ||
| 1 | +# CONFIG_ARM_PATCH_PHYS_VIRT is not set | |
| 2 | +CONFIG_EXPERIMENTAL=y | |
| 3 | +CONFIG_SYSVIPC=y | |
| 4 | +CONFIG_IKCONFIG=y | |
| 5 | +CONFIG_IKCONFIG_PROC=y | |
| 6 | +CONFIG_LOG_BUF_SHIFT=16 | |
| 7 | +CONFIG_CGROUPS=y | |
| 8 | +CONFIG_CPUSETS=y | |
| 9 | +CONFIG_NAMESPACES=y | |
| 10 | +# CONFIG_UTS_NS is not set | |
| 11 | +# CONFIG_IPC_NS is not set | |
| 12 | +# CONFIG_USER_NS is not set | |
| 13 | +# CONFIG_PID_NS is not set | |
| 14 | +CONFIG_SYSCTL_SYSCALL=y | |
| 15 | +CONFIG_EMBEDDED=y | |
| 16 | +CONFIG_SLAB=y | |
| 17 | +# CONFIG_BLK_DEV_BSG is not set | |
| 18 | +# CONFIG_IOSCHED_DEADLINE is not set | |
| 19 | +# CONFIG_IOSCHED_CFQ is not set | |
| 20 | +CONFIG_ARCH_SHMOBILE=y | |
| 21 | +CONFIG_KEYBOARD_GPIO_POLLED=y | |
| 22 | +CONFIG_ARCH_SH73A0=y | |
| 23 | +CONFIG_MACH_KOTA2=y | |
| 24 | +CONFIG_MEMORY_SIZE=0x1e0000000 | |
| 25 | +# CONFIG_SH_TIMER_TMU is not set | |
| 26 | +# CONFIG_SWP_EMULATE is not set | |
| 27 | +CONFIG_CPU_BPREDICT_DISABLE=y | |
| 28 | +CONFIG_ARM_ERRATA_460075=y | |
| 29 | +CONFIG_ARM_ERRATA_742230=y | |
| 30 | +CONFIG_ARM_ERRATA_742231=y | |
| 31 | +CONFIG_PL310_ERRATA_588369=y | |
| 32 | +CONFIG_ARM_ERRATA_720789=y | |
| 33 | +CONFIG_PL310_ERRATA_727915=y | |
| 34 | +CONFIG_ARM_ERRATA_743622=y | |
| 35 | +CONFIG_ARM_ERRATA_751472=y | |
| 36 | +CONFIG_PL310_ERRATA_753970=y | |
| 37 | +CONFIG_ARM_ERRATA_754322=y | |
| 38 | +CONFIG_PL310_ERRATA_769419=y | |
| 39 | +CONFIG_NO_HZ=y | |
| 40 | +CONFIG_SMP=y | |
| 41 | +CONFIG_AEABI=y | |
| 42 | +# CONFIG_OABI_COMPAT is not set | |
| 43 | +CONFIG_HIGHMEM=y | |
| 44 | +CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 45 | +CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 46 | +CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel" | |
| 47 | +CONFIG_CMDLINE_FORCE=y | |
| 48 | +CONFIG_KEXEC=y | |
| 49 | +CONFIG_CPU_IDLE=y | |
| 50 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 51 | +CONFIG_PM_RUNTIME=y | |
| 52 | +CONFIG_NET=y | |
| 53 | +CONFIG_PACKET=y | |
| 54 | +CONFIG_UNIX=y | |
| 55 | +CONFIG_INET=y | |
| 56 | +CONFIG_IP_PNP=y | |
| 57 | +CONFIG_IP_PNP_DHCP=y | |
| 58 | +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| 59 | +# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| 60 | +# CONFIG_INET_XFRM_MODE_BEET is not set | |
| 61 | +# CONFIG_INET_LRO is not set | |
| 62 | +# CONFIG_INET_DIAG is not set | |
| 63 | +# CONFIG_IPV6 is not set | |
| 64 | +CONFIG_CFG80211=y | |
| 65 | +CONFIG_WIRELESS_EXT_SYSFS=y | |
| 66 | +CONFIG_MAC80211=y | |
| 67 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 68 | +# CONFIG_BLK_DEV is not set | |
| 69 | +CONFIG_NETDEVICES=y | |
| 70 | +# CONFIG_NET_VENDOR_BROADCOM is not set | |
| 71 | +# CONFIG_NET_VENDOR_CHELSIO is not set | |
| 72 | +# CONFIG_NET_VENDOR_FARADAY is not set | |
| 73 | +# CONFIG_NET_VENDOR_INTEL is not set | |
| 74 | +# CONFIG_NET_VENDOR_MARVELL is not set | |
| 75 | +# CONFIG_NET_VENDOR_MICREL is not set | |
| 76 | +# CONFIG_NET_VENDOR_NATSEMI is not set | |
| 77 | +# CONFIG_NET_VENDOR_SEEQ is not set | |
| 78 | +CONFIG_SMSC911X=y | |
| 79 | +# CONFIG_NET_VENDOR_STMICRO is not set | |
| 80 | +CONFIG_B43=y | |
| 81 | +CONFIG_B43_PHY_N=y | |
| 82 | +CONFIG_B43_DEBUG=y | |
| 83 | +CONFIG_INPUT_SPARSEKMAP=y | |
| 84 | +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set | |
| 85 | +CONFIG_INPUT_EVDEV=y | |
| 86 | +# CONFIG_KEYBOARD_ATKBD is not set | |
| 87 | +CONFIG_KEYBOARD_GPIO=y | |
| 88 | +CONFIG_KEYBOARD_SH_KEYSC=y | |
| 89 | +# CONFIG_INPUT_MOUSE is not set | |
| 90 | +# CONFIG_LEGACY_PTYS is not set | |
| 91 | +CONFIG_SERIAL_SH_SCI=y | |
| 92 | +CONFIG_SERIAL_SH_SCI_NR_UARTS=9 | |
| 93 | +CONFIG_SERIAL_SH_SCI_CONSOLE=y | |
| 94 | +# CONFIG_HW_RANDOM is not set | |
| 95 | +CONFIG_I2C_SH_MOBILE=y | |
| 96 | +# CONFIG_HWMON is not set | |
| 97 | +CONFIG_BCMA=y | |
| 98 | +CONFIG_BCMA_DEBUG=y | |
| 99 | +CONFIG_FB=y | |
| 100 | +CONFIG_FB_SH_MOBILE_LCDC=y | |
| 101 | +CONFIG_LCD_PLATFORM=y | |
| 102 | +CONFIG_FRAMEBUFFER_CONSOLE=y | |
| 103 | +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | |
| 104 | +# CONFIG_HID_SUPPORT is not set | |
| 105 | +# CONFIG_USB_SUPPORT is not set | |
| 106 | +CONFIG_MMC=y | |
| 107 | +CONFIG_MMC_SDHI=y | |
| 108 | +CONFIG_MMC_SH_MMCIF=y | |
| 109 | +CONFIG_NEW_LEDS=y | |
| 110 | +CONFIG_LEDS_CLASS=y | |
| 111 | +CONFIG_LEDS_GPIO=y | |
| 112 | +CONFIG_LEDS_RENESAS_TPU=y | |
| 113 | +CONFIG_LEDS_TRIGGERS=y | |
| 114 | +# CONFIG_DNOTIFY is not set | |
| 115 | +# CONFIG_INOTIFY_USER is not set | |
| 116 | +CONFIG_TMPFS=y | |
| 117 | +# CONFIG_MISC_FILESYSTEMS is not set | |
| 118 | +CONFIG_MAGIC_SYSRQ=y | |
| 119 | +CONFIG_DEBUG_INFO=y | |
| 120 | +CONFIG_DEBUG_INFO_REDUCED=y | |
| 121 | +# CONFIG_FTRACE is not set | |
| 122 | +CONFIG_DEBUG_USER=y | |
| @@ -0,0 +1,87 @@ | ||
| 1 | +# CONFIG_ARM_PATCH_PHYS_VIRT is not set | |
| 2 | +CONFIG_EXPERIMENTAL=y | |
| 3 | +CONFIG_KERNEL_LZMA=y | |
| 4 | +CONFIG_IKCONFIG=y | |
| 5 | +CONFIG_IKCONFIG_PROC=y | |
| 6 | +CONFIG_LOG_BUF_SHIFT=16 | |
| 7 | +CONFIG_SYSCTL_SYSCALL=y | |
| 8 | +CONFIG_EMBEDDED=y | |
| 9 | +CONFIG_SLAB=y | |
| 10 | +# CONFIG_BLOCK is not set | |
| 11 | +CONFIG_ARCH_SHMOBILE=y | |
| 12 | +CONFIG_ARCH_R8A7779=y | |
| 13 | +CONFIG_MACH_MARZEN=y | |
| 14 | +CONFIG_MEMORY_START=0x60000000 | |
| 15 | +CONFIG_MEMORY_SIZE=0x10000000 | |
| 16 | +CONFIG_SHMOBILE_TIMER_HZ=1024 | |
| 17 | +# CONFIG_SH_TIMER_CMT is not set | |
| 18 | +# CONFIG_SWP_EMULATE is not set | |
| 19 | +CONFIG_ARM_ERRATA_430973=y | |
| 20 | +CONFIG_ARM_ERRATA_458693=y | |
| 21 | +CONFIG_ARM_ERRATA_460075=y | |
| 22 | +CONFIG_ARM_ERRATA_743622=y | |
| 23 | +CONFIG_ARM_ERRATA_754322=y | |
| 24 | +CONFIG_NO_HZ=y | |
| 25 | +CONFIG_SMP=y | |
| 26 | +# CONFIG_ARM_CPU_TOPOLOGY is not set | |
| 27 | +CONFIG_AEABI=y | |
| 28 | +# CONFIG_OABI_COMPAT is not set | |
| 29 | +CONFIG_HIGHMEM=y | |
| 30 | +CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 31 | +CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 32 | +CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel" | |
| 33 | +CONFIG_CMDLINE_FORCE=y | |
| 34 | +CONFIG_KEXEC=y | |
| 35 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 36 | +CONFIG_PM_RUNTIME=y | |
| 37 | +CONFIG_NET=y | |
| 38 | +CONFIG_INET=y | |
| 39 | +# CONFIG_IPV6 is not set | |
| 40 | +# CONFIG_WIRELESS is not set | |
| 41 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 42 | +CONFIG_DEVTMPFS=y | |
| 43 | +CONFIG_DEVTMPFS_MOUNT=y | |
| 44 | +# CONFIG_STANDALONE is not set | |
| 45 | +# CONFIG_PREVENT_FIRMWARE_BUILD is not set | |
| 46 | +# CONFIG_FW_LOADER is not set | |
| 47 | +CONFIG_NETDEVICES=y | |
| 48 | +# CONFIG_NET_VENDOR_BROADCOM is not set | |
| 49 | +# CONFIG_NET_VENDOR_FARADAY is not set | |
| 50 | +# CONFIG_NET_VENDOR_INTEL is not set | |
| 51 | +# CONFIG_NET_VENDOR_MICREL is not set | |
| 52 | +# CONFIG_NET_VENDOR_NATSEMI is not set | |
| 53 | +# CONFIG_NET_VENDOR_SEEQ is not set | |
| 54 | +CONFIG_SMC911X=y | |
| 55 | +CONFIG_SMSC911X=y | |
| 56 | +# CONFIG_NET_VENDOR_STMICRO is not set | |
| 57 | +# CONFIG_WLAN is not set | |
| 58 | +# CONFIG_INPUT_MOUSEDEV is not set | |
| 59 | +# CONFIG_INPUT_KEYBOARD is not set | |
| 60 | +# CONFIG_INPUT_MOUSE is not set | |
| 61 | +# CONFIG_SERIO is not set | |
| 62 | +# CONFIG_VT is not set | |
| 63 | +# CONFIG_LEGACY_PTYS is not set | |
| 64 | +# CONFIG_DEVKMEM is not set | |
| 65 | +CONFIG_SERIAL_SH_SCI=y | |
| 66 | +CONFIG_SERIAL_SH_SCI_NR_UARTS=6 | |
| 67 | +CONFIG_SERIAL_SH_SCI_CONSOLE=y | |
| 68 | +# CONFIG_HW_RANDOM is not set | |
| 69 | +CONFIG_GPIO_SYSFS=y | |
| 70 | +# CONFIG_HWMON is not set | |
| 71 | +CONFIG_SSB=y | |
| 72 | +# CONFIG_HID_SUPPORT is not set | |
| 73 | +# CONFIG_USB_SUPPORT is not set | |
| 74 | +CONFIG_UIO=y | |
| 75 | +CONFIG_UIO_PDRV_GENIRQ=y | |
| 76 | +# CONFIG_IOMMU_SUPPORT is not set | |
| 77 | +# CONFIG_FILE_LOCKING is not set | |
| 78 | +# CONFIG_DNOTIFY is not set | |
| 79 | +# CONFIG_INOTIFY_USER is not set | |
| 80 | +CONFIG_TMPFS=y | |
| 81 | +# CONFIG_MISC_FILESYSTEMS is not set | |
| 82 | +CONFIG_MAGIC_SYSRQ=y | |
| 83 | +CONFIG_DEBUG_INFO=y | |
| 84 | +CONFIG_DEBUG_INFO_REDUCED=y | |
| 85 | +# CONFIG_FTRACE is not set | |
| 86 | +CONFIG_DEBUG_USER=y | |
| 87 | +CONFIG_AVERAGE=y | |
| @@ -48,7 +48,6 @@ CONFIG_MACH_SX1=y · 47 unmodified lines | ||
| 48 | 48 | CONFIG_MACH_NOKIA770=y |
| 49 | 49 | CONFIG_MACH_AMS_DELTA=y |
| 50 | 50 | CONFIG_MACH_OMAP_GENERIC=y |
| 51 | −CONFIG_OMAP_ARM_182MHZ=y | |
| 52 | 51 | # CONFIG_ARM_THUMB is not set |
| 53 | 52 | CONFIG_PCCARD=y |
| 54 | 53 | CONFIG_OMAP_CF=y |
| @@ -1,175 +0,0 @@ | ||
| 1 | −CONFIG_EXPERIMENTAL=y | |
| 2 | −CONFIG_CROSS_COMPILE="/opt/arm-2010q1/bin/arm-none-linux-gnueabi-" | |
| 3 | −# CONFIG_LOCALVERSION_AUTO is not set | |
| 4 | −# CONFIG_SWAP is not set | |
| 5 | −CONFIG_SYSVIPC=y | |
| 6 | −CONFIG_POSIX_MQUEUE=y | |
| 7 | −CONFIG_TREE_PREEMPT_RCU=y | |
| 8 | −CONFIG_IKCONFIG=y | |
| 9 | −CONFIG_IKCONFIG_PROC=y | |
| 10 | −CONFIG_LOG_BUF_SHIFT=14 | |
| 11 | −CONFIG_NAMESPACES=y | |
| 12 | −CONFIG_BLK_DEV_INITRD=y | |
| 13 | −CONFIG_EXPERT=y | |
| 14 | −# CONFIG_SYSCTL_SYSCALL is not set | |
| 15 | −# CONFIG_KALLSYMS is not set | |
| 16 | −# CONFIG_VM_EVENT_COUNTERS is not set | |
| 17 | −# CONFIG_COMPAT_BRK is not set | |
| 18 | −CONFIG_SLAB=y | |
| 19 | −CONFIG_MODULES=y | |
| 20 | −CONFIG_MODULE_UNLOAD=y | |
| 21 | −# CONFIG_LBDAF is not set | |
| 22 | −# CONFIG_BLK_DEV_BSG is not set | |
| 23 | −CONFIG_DEFAULT_DEADLINE=y | |
| 24 | −CONFIG_ARCH_AT91=y | |
| 25 | −CONFIG_ARCH_AT91SAM9G20=y | |
| 26 | −CONFIG_MACH_PCONTROL_G20=y | |
| 27 | −CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | |
| 28 | −CONFIG_NO_HZ=y | |
| 29 | −CONFIG_HIGH_RES_TIMERS=y | |
| 30 | −CONFIG_PREEMPT=y | |
| 31 | −CONFIG_AEABI=y | |
| 32 | −# CONFIG_OABI_COMPAT is not set | |
| 33 | −CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 34 | −CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 35 | −CONFIG_CMDLINE="console=ttyS0,115200 mem=128M mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) root=/dev/mmcblk0p1 rootwait rw" | |
| 36 | −CONFIG_VFP=y | |
| 37 | −CONFIG_BINFMT_MISC=y | |
| 38 | −CONFIG_NET=y | |
| 39 | −CONFIG_PACKET=y | |
| 40 | −CONFIG_UNIX=y | |
| 41 | −CONFIG_INET=y | |
| 42 | −# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| 43 | −# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| 44 | −# CONFIG_INET_XFRM_MODE_BEET is not set | |
| 45 | −# CONFIG_INET_LRO is not set | |
| 46 | −# CONFIG_IPV6 is not set | |
| 47 | −CONFIG_VLAN_8021Q=y | |
| 48 | −# CONFIG_WIRELESS is not set | |
| 49 | −CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 50 | −# CONFIG_FW_LOADER is not set | |
| 51 | −CONFIG_MTD=y | |
| 52 | −CONFIG_MTD_PARTITIONS=y | |
| 53 | −CONFIG_MTD_CMDLINE_PARTS=y | |
| 54 | −CONFIG_MTD_CHAR=y | |
| 55 | −CONFIG_MTD_BLOCK=y | |
| 56 | −CONFIG_MTD_COMPLEX_MAPPINGS=y | |
| 57 | −CONFIG_MTD_PHRAM=m | |
| 58 | −CONFIG_MTD_NAND=y | |
| 59 | −CONFIG_MTD_NAND_ATMEL=y | |
| 60 | −CONFIG_BLK_DEV_LOOP=y | |
| 61 | −CONFIG_BLK_DEV_RAM=y | |
| 62 | −CONFIG_BLK_DEV_RAM_SIZE=8192 | |
| 63 | −CONFIG_ATMEL_TCLIB=y | |
| 64 | −CONFIG_EEPROM_AT24=m | |
| 65 | −CONFIG_SCSI=m | |
| 66 | −# CONFIG_SCSI_PROC_FS is not set | |
| 67 | −CONFIG_BLK_DEV_SD=m | |
| 68 | −CONFIG_SCSI_MULTI_LUN=y | |
| 69 | −# CONFIG_SCSI_LOWLEVEL is not set | |
| 70 | −CONFIG_NETDEVICES=y | |
| 71 | −CONFIG_MACVLAN=m | |
| 72 | −CONFIG_TUN=m | |
| 73 | −CONFIG_SMSC_PHY=m | |
| 74 | −CONFIG_BROADCOM_PHY=m | |
| 75 | −CONFIG_NET_ETHERNET=y | |
| 76 | −CONFIG_MII=y | |
| 77 | −CONFIG_MACB=y | |
| 78 | −CONFIG_SMSC911X=m | |
| 79 | −# CONFIG_NETDEV_1000 is not set | |
| 80 | −# CONFIG_NETDEV_10000 is not set | |
| 81 | −# CONFIG_WLAN is not set | |
| 82 | −CONFIG_PPP=m | |
| 83 | −CONFIG_PPP_ASYNC=m | |
| 84 | −CONFIG_PPP_DEFLATE=m | |
| 85 | −CONFIG_PPP_MPPE=m | |
| 86 | −CONFIG_INPUT_POLLDEV=y | |
| 87 | −CONFIG_INPUT_SPARSEKMAP=y | |
| 88 | −# CONFIG_INPUT_MOUSEDEV is not set | |
| 89 | −CONFIG_INPUT_EVDEV=m | |
| 90 | −CONFIG_INPUT_EVBUG=m | |
| 91 | −# CONFIG_KEYBOARD_ATKBD is not set | |
| 92 | −CONFIG_KEYBOARD_GPIO=m | |
| 93 | −CONFIG_KEYBOARD_MATRIX=m | |
| 94 | −# CONFIG_INPUT_MOUSE is not set | |
| 95 | −CONFIG_INPUT_TOUCHSCREEN=y | |
| 96 | −CONFIG_INPUT_MISC=y | |
| 97 | −CONFIG_INPUT_UINPUT=m | |
| 98 | −CONFIG_INPUT_GPIO_ROTARY_ENCODER=m | |
| 99 | −# CONFIG_SERIO is not set | |
| 100 | −# CONFIG_DEVKMEM is not set | |
| 101 | −CONFIG_SERIAL_ATMEL=y | |
| 102 | −CONFIG_SERIAL_ATMEL_CONSOLE=y | |
| 103 | −CONFIG_SERIAL_MAX3100=m | |
| 104 | −# CONFIG_LEGACY_PTYS is not set | |
| 105 | −# CONFIG_HW_RANDOM is not set | |
| 106 | −CONFIG_R3964=m | |
| 107 | −CONFIG_I2C=m | |
| 108 | −CONFIG_I2C_CHARDEV=m | |
| 109 | −# CONFIG_I2C_HELPER_AUTO is not set | |
| 110 | −CONFIG_I2C_GPIO=m | |
| 111 | −CONFIG_SPI=y | |
| 112 | −CONFIG_SPI_ATMEL=m | |
| 113 | −CONFIG_SPI_SPIDEV=m | |
| 114 | −CONFIG_GPIO_SYSFS=y | |
| 115 | −CONFIG_W1=m | |
| 116 | −CONFIG_W1_MASTER_GPIO=m | |
| 117 | −CONFIG_W1_SLAVE_DS2431=m | |
| 118 | −# CONFIG_HWMON is not set | |
| 119 | −CONFIG_WATCHDOG=y | |
| 120 | −CONFIG_AT91SAM9X_WATCHDOG=y | |
| 121 | −# CONFIG_MFD_SUPPORT is not set | |
| 122 | −# CONFIG_HID_SUPPORT is not set | |
| 123 | −CONFIG_USB=y | |
| 124 | −# CONFIG_USB_DEVICE_CLASS is not set | |
| 125 | −CONFIG_USB_OHCI_HCD=y | |
| 126 | −CONFIG_USB_STORAGE=m | |
| 127 | −CONFIG_USB_LIBUSUAL=y | |
| 128 | −CONFIG_USB_SERIAL=m | |
| 129 | −CONFIG_USB_SERIAL_GENERIC=y | |
| 130 | −CONFIG_USB_SERIAL_FTDI_SIO=m | |
| 131 | −CONFIG_USB_SERIAL_PL2303=m | |
| 132 | −CONFIG_USB_GADGET=y | |
| 133 | −CONFIG_USB_ZERO=m | |
| 134 | −CONFIG_USB_ETH=m | |
| 135 | −CONFIG_USB_FILE_STORAGE=m | |
| 136 | −CONFIG_USB_G_SERIAL=m | |
| 137 | −CONFIG_USB_G_HID=m | |
| 138 | −CONFIG_MMC=y | |
| 139 | −CONFIG_MMC_UNSAFE_RESUME=y | |
| 140 | −CONFIG_MMC_ATMELMCI=y | |
| 141 | −CONFIG_NEW_LEDS=y | |
| 142 | −CONFIG_LEDS_CLASS=y | |
| 143 | −CONFIG_LEDS_GPIO=y | |
| 144 | −CONFIG_LEDS_TRIGGERS=y | |
| 145 | −CONFIG_LEDS_TRIGGER_TIMER=y | |
| 146 | −CONFIG_LEDS_TRIGGER_HEARTBEAT=y | |
| 147 | −CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | |
| 148 | −CONFIG_RTC_CLASS=y | |
| 149 | −CONFIG_RTC_DRV_AT91SAM9=y | |
| 150 | −CONFIG_AUXDISPLAY=y | |
| 151 | −CONFIG_UIO=y | |
| 152 | −CONFIG_UIO_PDRV=y | |
| 153 | −CONFIG_STAGING=y | |
| 154 | −# CONFIG_STAGING_EXCLUDE_BUILD is not set | |
| 155 | −CONFIG_IIO=y | |
| 156 | −CONFIG_EXT2_FS=y | |
| 157 | −CONFIG_EXT3_FS=y | |
| 158 | −# CONFIG_EXT3_FS_XATTR is not set | |
| 159 | −CONFIG_VFAT_FS=y | |
| 160 | −CONFIG_TMPFS=y | |
| 161 | −CONFIG_JFFS2_FS=y | |
| 162 | −CONFIG_NFS_FS=y | |
| 163 | −CONFIG_NFS_V3=y | |
| 164 | −CONFIG_NFS_V4=y | |
| 165 | −CONFIG_PARTITION_ADVANCED=y | |
| 166 | −CONFIG_NLS_CODEPAGE_437=y | |
| 167 | −CONFIG_NLS_CODEPAGE_850=y | |
| 168 | −CONFIG_NLS_ISO8859_1=y | |
| 169 | −CONFIG_NLS_ISO8859_15=y | |
| 170 | −CONFIG_NLS_UTF8=y | |
| 171 | −# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 172 | −CONFIG_CRYPTO=y | |
| 173 | −CONFIG_CRYPTO_ANSI_CPRNG=y | |
| 174 | −# CONFIG_CRYPTO_HW is not set | |
| 175 | −CONFIG_CRC_CCITT=y | |
| @@ -9,9 +9,8 @@ CONFIG_RESOURCE_COUNTERS=y · 8 unmodified lines | ||
| 9 | 9 | CONFIG_CGROUP_SCHED=y |
| 10 | 10 | CONFIG_RT_GROUP_SCHED=y |
| 11 | 11 | CONFIG_BLK_DEV_INITRD=y |
| 12 | −CONFIG_EMBEDDED=y | |
| 13 | −# CONFIG_SYSCTL_SYSCALL is not set | |
| 14 | 12 | # CONFIG_ELF_CORE is not set |
| 13 | +CONFIG_EMBEDDED=y | |
| 15 | 14 | CONFIG_SLAB=y |
| 16 | 15 | CONFIG_MODULES=y |
| 17 | 16 | CONFIG_MODULE_UNLOAD=y |
| @@ -20,6 +19,8 @@ CONFIG_MODULE_FORCE_UNLOAD=y · 2 unmodified lines | ||
| 20 | 19 | # CONFIG_IOSCHED_DEADLINE is not set |
| 21 | 20 | # CONFIG_IOSCHED_CFQ is not set |
| 22 | 21 | CONFIG_ARCH_TEGRA=y |
| 22 | +CONFIG_ARCH_TEGRA_2x_SOC=y | |
| 23 | +CONFIG_ARCH_TEGRA_3x_SOC=y | |
| 23 | 24 | CONFIG_MACH_HARMONY=y |
| 24 | 25 | CONFIG_MACH_KAEN=y |
| 25 | 26 | CONFIG_MACH_PAZ00=y |
| @@ -78,14 +79,12 @@ CONFIG_BLK_DEV_SD=y · 52 unmodified lines | ||
| 78 | 79 | # CONFIG_SCSI_LOWLEVEL is not set |
| 79 | 80 | CONFIG_NETDEVICES=y |
| 80 | 81 | CONFIG_DUMMY=y |
| 81 | −CONFIG_NET_ETHERNET=y | |
| 82 | 82 | CONFIG_R8169=y |
| 83 | −# CONFIG_NETDEV_10000 is not set | |
| 84 | −# CONFIG_WLAN is not set | |
| 85 | 83 | CONFIG_USB_PEGASUS=y |
| 86 | 84 | CONFIG_USB_USBNET=y |
| 87 | 85 | CONFIG_USB_NET_SMSC75XX=y |
| 88 | 86 | CONFIG_USB_NET_SMSC95XX=y |
| 87 | +# CONFIG_WLAN is not set | |
| 89 | 88 | # CONFIG_INPUT is not set |
| 90 | 89 | # CONFIG_SERIO is not set |
| 91 | 90 | # CONFIG_VT is not set |
| @@ -186,6 +186,17 @@ · 185 unmodified lines | ||
| 186 | 186 | #define ALT_UP_B(label) b label |
| 187 | 187 | #endif |
| 188 | 188 | |
| 189 | +/* | |
| 190 | + * Instruction barrier | |
| 191 | + */ | |
| 192 | + .macro instr_sync | |
| 193 | +#if __LINUX_ARM_ARCH__ >= 7 | |
| 194 | + isb | |
| 195 | +#elif __LINUX_ARM_ARCH__ == 6 | |
| 196 | + mcr p15, 0, r0, c7, c5, 4 | |
| 197 | +#endif | |
| 198 | + .endm | |
| 199 | + | |
| 189 | 200 | /* |
| 190 | 201 | * SMP data memory barrier |
| 191 | 202 | */ |
| @@ -32,7 +32,6 @@ · 31 unmodified lines | ||
| 32 | 32 | |
| 33 | 33 | #define __BUG(__file, __line, __value) \ |
| 34 | 34 | do { \ |
| 35 | − BUILD_BUG_ON(sizeof(struct bug_entry) != 12); \ | |
| 36 | 35 | asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n" \ |
| 37 | 36 | ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \ |
| 38 | 37 | "2:\t.asciz " #__file "\n" \ |
| @@ -0,0 +1,179 @@ | ||
| 1 | +#ifndef __ASMARM_CTI_H | |
| 2 | +#define __ASMARM_CTI_H | |
| 3 | + | |
| 4 | +#include <asm/io.h> | |
| 5 | + | |
| 6 | +/* The registers' definition is from section 3.2 of | |
| 7 | + * Embedded Cross Trigger Revision: r0p0 | |
| 8 | + */ | |
| 9 | +#define CTICONTROL 0x000 | |
| 10 | +#define CTISTATUS 0x004 | |
| 11 | +#define CTILOCK 0x008 | |
| 12 | +#define CTIPROTECTION 0x00C | |
| 13 | +#define CTIINTACK 0x010 | |
| 14 | +#define CTIAPPSET 0x014 | |
| 15 | +#define CTIAPPCLEAR 0x018 | |
| 16 | +#define CTIAPPPULSE 0x01c | |
| 17 | +#define CTIINEN 0x020 | |
| 18 | +#define CTIOUTEN 0x0A0 | |
| 19 | +#define CTITRIGINSTATUS 0x130 | |
| 20 | +#define CTITRIGOUTSTATUS 0x134 | |
| 21 | +#define CTICHINSTATUS 0x138 | |
| 22 | +#define CTICHOUTSTATUS 0x13c | |
| 23 | +#define CTIPERIPHID0 0xFE0 | |
| 24 | +#define CTIPERIPHID1 0xFE4 | |
| 25 | +#define CTIPERIPHID2 0xFE8 | |
| 26 | +#define CTIPERIPHID3 0xFEC | |
| 27 | +#define CTIPCELLID0 0xFF0 | |
| 28 | +#define CTIPCELLID1 0xFF4 | |
| 29 | +#define CTIPCELLID2 0xFF8 | |
| 30 | +#define CTIPCELLID3 0xFFC | |
| 31 | + | |
| 32 | +/* The below are from section 3.6.4 of | |
| 33 | + * CoreSight v1.0 Architecture Specification | |
| 34 | + */ | |
| 35 | +#define LOCKACCESS 0xFB0 | |
| 36 | +#define LOCKSTATUS 0xFB4 | |
| 37 | + | |
| 38 | +/* write this value to LOCKACCESS will unlock the module, and | |
| 39 | + * other value will lock the module | |
| 40 | + */ | |
| 41 | +#define LOCKCODE 0xC5ACCE55 | |
| 42 | + | |
| 43 | +/** | |
| 44 | + * struct cti - cross trigger interface struct | |
| 45 | + * @base: mapped virtual address for the cti base | |
| 46 | + * @irq: irq number for the cti | |
| 47 | + * @trig_out_for_irq: triger out number which will cause | |
| 48 | + * the @irq happen | |
| 49 | + * | |
| 50 | + * cti struct used to operate cti registers. | |
| 51 | + */ | |
| 52 | +struct cti { | |
| 53 | + void __iomem *base; | |
| 54 | + int irq; | |
| 55 | + int trig_out_for_irq; | |
| 56 | +}; | |
| 57 | + | |
| 58 | +/** | |
| 59 | + * cti_init - initialize the cti instance | |
| 60 | + * @cti: cti instance | |
| 61 | + * @base: mapped virtual address for the cti base | |
| 62 | + * @irq: irq number for the cti | |
| 63 | + * @trig_out: triger out number which will cause | |
| 64 | + * the @irq happen | |
| 65 | + * | |
| 66 | + * called by machine code to pass the board dependent | |
| 67 | + * @base, @irq and @trig_out to cti. | |
| 68 | + */ | |
| 69 | +static inline void cti_init(struct cti *cti, | |
| 70 | + void __iomem *base, int irq, int trig_out) | |
| 71 | +{ | |
| 72 | + cti->base = base; | |
| 73 | + cti->irq = irq; | |
| 74 | + cti->trig_out_for_irq = trig_out; | |
| 75 | +} | |
| 76 | + | |
| 77 | +/** | |
| 78 | + * cti_map_trigger - use the @chan to map @trig_in to @trig_out | |
| 79 | + * @cti: cti instance | |
| 80 | + * @trig_in: trigger in number | |
| 81 | + * @trig_out: trigger out number | |
| 82 | + * @channel: channel number | |
| 83 | + * | |
| 84 | + * This function maps one trigger in of @trig_in to one trigger | |
| 85 | + * out of @trig_out using the channel @chan. | |
| 86 | + */ | |
| 87 | +static inline void cti_map_trigger(struct cti *cti, | |
| 88 | + int trig_in, int trig_out, int chan) | |
| 89 | +{ | |
| 90 | + void __iomem *base = cti->base; | |
| 91 | + unsigned long val; | |
| 92 | + | |
| 93 | + val = __raw_readl(base + CTIINEN + trig_in * 4); | |
| 94 | + val |= BIT(chan); | |
| 95 | + __raw_writel(val, base + CTIINEN + trig_in * 4); | |
| 96 | + | |
| 97 | + val = __raw_readl(base + CTIOUTEN + trig_out * 4); | |
| 98 | + val |= BIT(chan); | |
| 99 | + __raw_writel(val, base + CTIOUTEN + trig_out * 4); | |
| 100 | +} | |
| 101 | + | |
| 102 | +/** | |
| 103 | + * cti_enable - enable the cti module | |
| 104 | + * @cti: cti instance | |
| 105 | + * | |
| 106 | + * enable the cti module | |
| 107 | + */ | |
| 108 | +static inline void cti_enable(struct cti *cti) | |
| 109 | +{ | |
| 110 | + __raw_writel(0x1, cti->base + CTICONTROL); | |
| 111 | +} | |
| 112 | + | |
| 113 | +/** | |
| 114 | + * cti_disable - disable the cti module | |
| 115 | + * @cti: cti instance | |
| 116 | + * | |
| 117 | + * enable the cti module | |
| 118 | + */ | |
| 119 | +static inline void cti_disable(struct cti *cti) | |
| 120 | +{ | |
| 121 | + __raw_writel(0, cti->base + CTICONTROL); | |
| 122 | +} | |
| 123 | + | |
| 124 | +/** | |
| 125 | + * cti_irq_ack - clear the cti irq | |
| 126 | + * @cti: cti instance | |
| 127 | + * | |
| 128 | + * clear the cti irq | |
| 129 | + */ | |
| 130 | +static inline void cti_irq_ack(struct cti *cti) | |
| 131 | +{ | |
| 132 | + void __iomem *base = cti->base; | |
| 133 | + unsigned long val; | |
| 134 | + | |
| 135 | + val = __raw_readl(base + CTIINTACK); | |
| 136 | + val |= BIT(cti->trig_out_for_irq); | |
| 137 | + __raw_writel(val, base + CTIINTACK); | |
| 138 | +} | |
| 139 | + | |
| 140 | +/** | |
| 141 | + * cti_unlock - unlock cti module | |
| 142 | + * @cti: cti instance | |
| 143 | + * | |
| 144 | + * unlock the cti module, or else any writes to the cti | |
| 145 | + * module is not allowed. | |
| 146 | + */ | |
| 147 | +static inline void cti_unlock(struct cti *cti) | |
| 148 | +{ | |
| 149 | + void __iomem *base = cti->base; | |
| 150 | + unsigned long val; | |
| 151 | + | |
| 152 | + val = __raw_readl(base + LOCKSTATUS); | |
| 153 | + | |
| 154 | + if (val & 1) { | |
| 155 | + val = LOCKCODE; | |
| 156 | + __raw_writel(val, base + LOCKACCESS); | |
| 157 | + } | |
| 158 | +} | |
| 159 | + | |
| 160 | +/** | |
| 161 | + * cti_lock - lock cti module | |
| 162 | + * @cti: cti instance | |
| 163 | + * | |
| 164 | + * lock the cti module, so any writes to the cti | |
| 165 | + * module will be not allowed. | |
| 166 | + */ | |
| 167 | +static inline void cti_lock(struct cti *cti) | |
| 168 | +{ | |
| 169 | + void __iomem *base = cti->base; | |
| 170 | + unsigned long val; | |
| 171 | + | |
| 172 | + val = __raw_readl(base + LOCKSTATUS); | |
| 173 | + | |
| 174 | + if (!(val & 1)) { | |
| 175 | + val = ~LOCKCODE; | |
| 176 | + __raw_writel(val, base + LOCKACCESS); | |
| 177 | + } | |
| 178 | +} | |
| 179 | +#endif | |
| @@ -0,0 +1,48 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2011 Calxeda, Inc. | |
| 3 | + * Based on PPC version Copyright 2007 MontaVista Software, Inc. | |
| 4 | + * | |
| 5 | + * This program is free software; you can redistribute it and/or modify it | |
| 6 | + * under the terms and conditions of the GNU General Public License, | |
| 7 | + * version 2, as published by the Free Software Foundation. | |
| 8 | + * | |
| 9 | + * This program is distributed in the hope it will be useful, but WITHOUT | |
| 10 | + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 | + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 12 | + * more details. | |
| 13 | + * | |
| 14 | + * You should have received a copy of the GNU General Public License along with | |
| 15 | + * this program. If not, see <http://www.gnu.org/licenses/>. | |
| 16 | + */ | |
| 17 | +#ifndef ASM_EDAC_H | |
| 18 | +#define ASM_EDAC_H | |
| 19 | +/* | |
| 20 | + * ECC atomic, DMA, SMP and interrupt safe scrub function. | |
| 21 | + * Implements the per arch atomic_scrub() that EDAC use for software | |
| 22 | + * ECC scrubbing. It reads memory and then writes back the original | |
| 23 | + * value, allowing the hardware to detect and correct memory errors. | |
| 24 | + */ | |
| 25 | +static inline void atomic_scrub(void *va, u32 size) | |
| 26 | +{ | |
| 27 | +#if __LINUX_ARM_ARCH__ >= 6 | |
| 28 | + unsigned int *virt_addr = va; | |
| 29 | + unsigned int temp, temp2; | |
| 30 | + unsigned int i; | |
| 31 | + | |
| 32 | + for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) { | |
| 33 | + /* Very carefully read and write to memory atomically | |
| 34 | + * so we are interrupt, DMA and SMP safe. | |
| 35 | + */ | |
| 36 | + __asm__ __volatile__("\n" | |
| 37 | + "1: ldrex %0, [%2]\n" | |
| 38 | + " strex %1, %0, [%2]\n" | |
| 39 | + " teq %1, #0\n" | |
| 40 | + " bne 1b\n" | |
| 41 | + : "=&r"(temp), "=&r"(temp2) | |
| 42 | + : "r"(virt_addr) | |
| 43 | + : "cc"); | |
| 44 | + } | |
| 45 | +#endif | |
| 46 | +} | |
| 47 | + | |
| 48 | +#endif | |
| @@ -1,57 +0,0 @@ | ||
| 1 | −/* arch/arm/include/asm/entry-macro-vic2.S | |
| 2 | − * | |
| 3 | − * Originally arch/arm/mach-s3c6400/include/mach/entry-macro.S | |
| 4 | − * | |
| 5 | − * Copyright 2008 Openmoko, Inc. | |
| 6 | − * Copyright 2008 Simtec Electronics | |
| 7 | − * http://armlinux.simtec.co.uk/ | |
| 8 | − * Ben Dooks <ben@simtec.co.uk> | |
| 9 | − * | |
| 10 | − * Low-level IRQ helper macros for a device with two VICs | |
| 11 | − * | |
| 12 | − * This file is licensed under the terms of the GNU General Public | |
| 13 | − * License version 2. This program is licensed "as is" without any | |
| 14 | − * warranty of any kind, whether express or implied. | |
| 15 | −*/ | |
| 16 | − | |
| 17 | −/* This should be included from <mach/entry-macro.S> with the necessary | |
| 18 | − * defines for virtual addresses and IRQ bases for the two vics. | |
| 19 | − * | |
| 20 | − * The code needs the following defined: | |
| 21 | − * IRQ_VIC0_BASE IRQ number of VIC0's first IRQ | |
| 22 | − * IRQ_VIC1_BASE IRQ number of VIC1's first IRQ | |
| 23 | − * VA_VIC0 Virtual address of VIC0 | |
| 24 | − * VA_VIC1 Virtual address of VIC1 | |
| 25 | − * | |
| 26 | − * Note, code assumes VIC0's virtual address is an ARM immediate constant | |
| 27 | − * away from VIC1. | |
| 28 | −*/ | |
| 29 | − | |
| 30 | −#include <asm/hardware/vic.h> | |
| 31 | − | |
| 32 | − .macro disable_fiq | |
| 33 | − .endm | |
| 34 | − | |
| 35 | − .macro get_irqnr_preamble, base, tmp | |
| 36 | − ldr \base, =VA_VIC0 | |
| 37 | − .endm | |
| 38 | − | |
| 39 | − .macro arch_ret_to_user, tmp1, tmp2 | |
| 40 | − .endm | |
| 41 | − | |
| 42 | − .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | |
| 43 | − | |
| 44 | − @ check the vic0 | |
| 45 | − mov \irqnr, #IRQ_VIC0_BASE + 31 | |
| 46 | − ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | |
| 47 | − teq \irqstat, #0 | |
| 48 | − | |
| 49 | − @ otherwise try vic1 | |
| 50 | − addeq \tmp, \base, #(VA_VIC1 - VA_VIC0) | |
| 51 | − addeq \irqnr, \irqnr, #(IRQ_VIC1_BASE - IRQ_VIC0_BASE) | |
| 52 | − ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | |
| 53 | − teqeq \irqstat, #0 | |
| 54 | − | |
| 55 | − clzne \irqstat, \irqstat | |
| 56 | − subne \irqnr, \irqnr, \irqstat | |
| 57 | − .endm | |
| @@ -1,6 +1,10 @@ | ||
| 1 | 1 | #ifndef _ARCH_ARM_GPIO_H |
| 2 | 2 | #define _ARCH_ARM_GPIO_H |
| 3 | 3 | |
| 4 | +#if CONFIG_ARCH_NR_GPIO > 0 | |
| 5 | +#define ARCH_NR_GPIOS CONFIG_ARCH_NR_GPIO | |
| 6 | +#endif | |
| 7 | + | |
| 4 | 8 | /* not all ARM platforms necessarily support this API ... */ |
| 5 | 9 | #include <mach/gpio.h> |
| 6 | 10 | |
| @@ -27,23 +27,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu); · 26 unmodified lines | ||
| 27 | 27 | |
| 28 | 28 | #define arch_irq_stat_cpu smp_irq_stat_cpu |
| 29 | 29 | |
| 30 | −#if NR_IRQS > 512 | |
| 31 | −#define HARDIRQ_BITS 10 | |
| 32 | −#elif NR_IRQS > 256 | |
| 33 | −#define HARDIRQ_BITS 9 | |
| 34 | −#else | |
| 35 | −#define HARDIRQ_BITS 8 | |
| 36 | −#endif | |
| 37 | − | |
| 38 | −/* | |
| 39 | − * The hardirq mask has to be large enough to have space | |
| 40 | − * for potentially all IRQ sources in the system nesting | |
| 41 | − * on a single CPU: | |
| 42 | − */ | |
| 43 | −#if (1 << HARDIRQ_BITS) < NR_IRQS | |
| 44 | −# error HARDIRQ_BITS is too low! | |
| 45 | −#endif | |
| 46 | − | |
| 47 | 30 | #define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 |
| 48 | 31 | |
| 49 | 32 | #endif /* __ASM_HARDIRQ_H */ |
| @@ -1,60 +0,0 @@ | ||
| 1 | −/* | |
| 2 | − * arch/arm/include/asm/hardware/entry-macro-gic.S | |
| 3 | − * | |
| 4 | − * Low-level IRQ helper macros for GIC | |
| 5 | − * | |
| 6 | − * This file is licensed under the terms of the GNU General Public | |
| 7 | − * License version 2. This program is licensed "as is" without any | |
| 8 | − * warranty of any kind, whether express or implied. | |
| 9 | − */ | |
| 10 | − | |
| 11 | −#include <asm/hardware/gic.h> | |
| 12 | − | |
| 13 | −#ifndef HAVE_GET_IRQNR_PREAMBLE | |
| 14 | − .macro get_irqnr_preamble, base, tmp | |
| 15 | − ldr \base, =gic_cpu_base_addr | |
| 16 | − ldr \base, [\base] | |
| 17 | − .endm | |
| 18 | −#endif | |
| 19 | − | |
| 20 | −/* | |
| 21 | − * The interrupt numbering scheme is defined in the | |
| 22 | − * interrupt controller spec. To wit: | |
| 23 | − * | |
| 24 | − * Interrupts 0-15 are IPI | |
| 25 | − * 16-31 are local. We allow 30 to be used for the watchdog. | |
| 26 | − * 32-1020 are global | |
| 27 | − * 1021-1022 are reserved | |
| 28 | − * 1023 is "spurious" (no interrupt) | |
| 29 | − * | |
| 30 | − * A simple read from the controller will tell us the number of the highest | |
| 31 | − * priority enabled interrupt. We then just need to check whether it is in the | |
| 32 | − * valid range for an IRQ (30-1020 inclusive). | |
| 33 | − */ | |
| 34 | − | |
| 35 | − .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | |
| 36 | − | |
| 37 | − ldr \irqstat, [\base, #GIC_CPU_INTACK] | |
| 38 | − /* bits 12-10 = src CPU, 9-0 = int # */ | |
| 39 | − | |
| 40 | − ldr \tmp, =1021 | |
| 41 | − bic \irqnr, \irqstat, #0x1c00 | |
| 42 | − cmp \irqnr, #15 | |
| 43 | − cmpcc \irqnr, \irqnr | |
| 44 | − cmpne \irqnr, \tmp | |
| 45 | − cmpcs \irqnr, \irqnr | |
| 46 | − .endm | |
| 47 | − | |
| 48 | −/* We assume that irqstat (the raw value of the IRQ acknowledge | |
| 49 | − * register) is preserved from the macro above. | |
| 50 | − * If there is an IPI, we immediately signal end of interrupt on the | |
| 51 | − * controller, since this requires the original irqstat value which | |
| 52 | − * we won't easily be able to recreate later. | |
| 53 | − */ | |
| 54 | − | |
| 55 | − .macro test_for_ipi, irqnr, irqstat, base, tmp | |
| 56 | − bic \irqnr, \irqstat, #0x1c00 | |
| 57 | − cmp \irqnr, #16 | |
| 58 | − strcc \irqstat, [\base, #GIC_CPU_EOI] | |
| 59 | − cmpcs \irqnr, \irqnr | |
| 60 | − .endm | |
| @@ -36,30 +36,22 @@ · 35 unmodified lines | ||
| 36 | 36 | #include <linux/irqdomain.h> |
| 37 | 37 | struct device_node; |
| 38 | 38 | |
| 39 | −extern void __iomem *gic_cpu_base_addr; | |
| 40 | 39 | extern struct irq_chip gic_arch_extn; |
| 41 | 40 | |
| 42 | −void gic_init(unsigned int, int, void __iomem *, void __iomem *); | |
| 41 | +void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, | |
| 42 | + u32 offset); | |
| 43 | 43 | int gic_of_init(struct device_node *node, struct device_node *parent); |
| 44 | 44 | void gic_secondary_init(unsigned int); |
| 45 | +void gic_handle_irq(struct pt_regs *regs); | |
| 45 | 46 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); |
| 46 | 47 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); |
| 47 | 48 | |
| 48 | −struct gic_chip_data { | |
| 49 | − void __iomem *dist_base; | |
| 50 | − void __iomem *cpu_base; | |
| 51 | −#ifdef CONFIG_CPU_PM | |
| 52 | − u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; | |
| 53 | − u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; | |
| 54 | − u32 saved_spi_target[DIV_ROUND_UP(1020, 4)]; | |
| 55 | − u32 __percpu *saved_ppi_enable; | |
| 56 | − u32 __percpu *saved_ppi_conf; | |
| 57 | −#endif | |
| 58 | −#ifdef CONFIG_IRQ_DOMAIN | |
| 59 | − struct irq_domain domain; | |
| 60 | −#endif | |
| 61 | − unsigned int gic_irqs; | |
| 62 | −}; | |
| 49 | +static inline void gic_init(unsigned int nr, int start, | |
| 50 | + void __iomem *dist , void __iomem *cpu) | |
| 51 | +{ | |
| 52 | + gic_init_bases(nr, start, dist, cpu, 0); | |
| 53 | +} | |
| 54 | + | |
| 63 | 55 | #endif |
| 64 | 56 | |
| 65 | 57 | #endif |
| @@ -234,6 +234,7 @@ extern int iop3xx_get_init_atu(void); · 233 unmodified lines | ||
| 234 | 234 | void iop3xx_map_io(void); |
| 235 | 235 | void iop_init_cp6_handler(void); |
| 236 | 236 | void iop_init_time(unsigned long tickrate); |
| 237 | +void iop3xx_restart(char, const char *); | |
| 237 | 238 | |
| 238 | 239 | static inline u32 read_tmr0(void) |
| 239 | 240 | { |
| @@ -41,7 +41,15 @@ · 40 unmodified lines | ||
| 41 | 41 | #define VIC_PL192_VECT_ADDR 0xF00 |
| 42 | 42 | |
| 43 | 43 | #ifndef __ASSEMBLY__ |
| 44 | +#include <linux/compiler.h> | |
| 45 | +#include <linux/types.h> | |
| 46 | + | |
| 47 | +struct device_node; | |
| 48 | +struct pt_regs; | |
| 49 | + | |
| 44 | 50 | void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); |
| 45 | −#endif | |
| 51 | +int vic_of_init(struct device_node *node, struct device_node *parent); | |
| 52 | +void vic_handle_irq(struct pt_regs *regs); | |
| 46 | 53 | |
| 54 | +#endif /* __ASSEMBLY__ */ | |
| 47 | 55 | #endif |
| @@ -25,7 +25,8 @@ · 24 unmodified lines | ||
| 25 | 25 | #define HWCAP_IDIVT (1 << 18) |
| 26 | 26 | #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) |
| 27 | 27 | |
| 28 | −#if defined(__KERNEL__) && !defined(__ASSEMBLY__) | |
| 28 | +#if defined(__KERNEL__) | |
| 29 | +#if !defined(__ASSEMBLY__) | |
| 29 | 30 | /* |
| 30 | 31 | * This yields a mask that user programs can use to figure out what |
| 31 | 32 | * instruction set this cpu supports. |
| @@ -33,5 +34,6 @@ · 1 unmodified line | ||
| 33 | 34 | #define ELF_HWCAP (elf_hwcap) |
| 34 | 35 | extern unsigned int elf_hwcap; |
| 35 | 36 | #endif |
| 37 | +#endif | |
| 36 | 38 | |
| 37 | 39 | #endif |
| @@ -0,0 +1,14 @@ | ||
| 1 | +#ifndef __ASM_IDMAP_H | |
| 2 | +#define __ASM_IDMAP_H | |
| 3 | + | |
| 4 | +#include <linux/compiler.h> | |
| 5 | +#include <asm/pgtable.h> | |
| 6 | + | |
| 7 | +/* Tag a function as requiring to be executed via an identity mapping. */ | |
| 8 | +#define __idmap __section(.idmap.text) noinline notrace | |
| 9 | + | |
| 10 | +extern pgd_t *idmap_pgd; | |
| 11 | + | |
| 12 | +void setup_mm_for_reboot(void); | |
| 13 | + | |
| 14 | +#endif /* __ASM_IDMAP_H */ | |
| @@ -27,6 +27,7 @@ · 26 unmodified lines | ||
| 27 | 27 | #include <asm/byteorder.h> |
| 28 | 28 | #include <asm/memory.h> |
| 29 | 29 | #include <asm/system.h> |
| 30 | +#include <asm-generic/pci_iomap.h> | |
| 30 | 31 | |
| 31 | 32 | /* |
| 32 | 33 | * ISA I/O bus memory addresses are 1:1 with the physical address. |
| @@ -306,7 +307,6 @@ extern void ioport_unmap(void __iomem *addr); · 273 unmodified lines | ||
| 306 | 307 | |
| 307 | 308 | struct pci_dev; |
| 308 | 309 | |
| 309 | −extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen); | |
| 310 | 310 | extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr); |
| 311 | 311 | |
| 312 | 312 | /* |
| @@ -1,29 +1 @@ | ||
| 1 | −#ifndef __ASMARM_IPCBUF_H | |
| 2 | −#define __ASMARM_IPCBUF_H | |
| 3 | − | |
| 4 | −/* | |
| 5 | − * The ipc64_perm structure for arm architecture. | |
| 6 | − * Note extra padding because this structure is passed back and forth | |
| 7 | − * between kernel and user space. | |
| 8 | − * | |
| 9 | − * Pad space is left for: | |
| 10 | − * - 32-bit mode_t and seq | |
| 11 | − * - 2 miscellaneous 32-bit values | |
| 12 | − */ | |
| 13 | − | |
| 14 | −struct ipc64_perm | |
| 15 | −{ | |
| 16 | − __kernel_key_t key; | |
| 17 | − __kernel_uid32_t uid; | |
| 18 | − __kernel_gid32_t gid; | |
| 19 | − __kernel_uid32_t cuid; | |
| 20 | − __kernel_gid32_t cgid; | |
| 21 | − __kernel_mode_t mode; | |
| 22 | − unsigned short __pad1; | |
| 23 | − unsigned short seq; | |
| 24 | − unsigned short __pad2; | |
| 25 | − unsigned long __unused1; | |
| 26 | − unsigned long __unused2; | |
| 27 | −}; | |
| 28 | − | |
| 29 | −#endif /* __ASMARM_IPCBUF_H */ | |
| 1 | +#include <asm-generic/ipcbuf.h> | |
| @@ -24,7 +24,6 @@ · 23 unmodified lines | ||
| 24 | 24 | #define MAX_INSN_SIZE 2 |
| 25 | 25 | #define MAX_STACK_SIZE 64 /* 32 would probably be OK */ |
| 26 | 26 | |
| 27 | −#define regs_return_value(regs) ((regs)->ARM_r0) | |
| 28 | 27 | #define flush_insn_slot(p) do { } while (0) |
| 29 | 28 | #define kretprobe_blacklist_size 0 |
| 30 | 29 | |
| @@ -19,7 +19,7 @@ struct machine_desc { · 18 unmodified lines | ||
| 19 | 19 | unsigned int nr; /* architecture number */ |
| 20 | 20 | const char *name; /* architecture name */ |
| 21 | 21 | unsigned long atag_offset; /* tagged list (relative) */ |
| 22 | − const char **dt_compat; /* array of device tree | |
| 22 | + const char *const *dt_compat; /* array of device tree | |
| 23 | 23 | * 'compatible' strings */ |
| 24 | 24 | |
| 25 | 25 | unsigned int nr_irqs; /* number of IRQs */ |
| @@ -31,10 +31,10 @@ struct machine_desc { · 5 unmodified lines | ||
| 31 | 31 | unsigned int video_start; /* start of video RAM */ |
| 32 | 32 | unsigned int video_end; /* end of video RAM */ |
| 33 | 33 | |
| 34 | − unsigned int reserve_lp0 :1; /* never has lp0 */ | |
| 35 | − unsigned int reserve_lp1 :1; /* never has lp1 */ | |
| 36 | − unsigned int reserve_lp2 :1; /* never has lp2 */ | |
| 37 | − unsigned int soft_reboot :1; /* soft reboot */ | |
| 34 | + unsigned char reserve_lp0 :1; /* never has lp0 */ | |
| 35 | + unsigned char reserve_lp1 :1; /* never has lp1 */ | |
| 36 | + unsigned char reserve_lp2 :1; /* never has lp2 */ | |
| 37 | + char restart_mode; /* default restart mode */ | |
| 38 | 38 | void (*fixup)(struct tag *, char **, |
| 39 | 39 | struct meminfo *); |
| 40 | 40 | void (*reserve)(void);/* reserve mem blocks */ |
| @@ -46,6 +46,7 @@ struct machine_desc { · 5 unmodified lines | ||
| 46 | 46 | #ifdef CONFIG_MULTI_IRQ_HANDLER |
| 47 | 47 | void (*handle_irq)(struct pt_regs *); |
| 48 | 48 | #endif |
| 49 | + void (*restart)(char, const char *); | |
| 49 | 50 | }; |
| 50 | 51 | |
| 51 | 52 | /* |
| @@ -40,7 +40,7 @@ struct pci_sys_data { · 39 unmodified lines | ||
| 40 | 40 | u64 mem_offset; /* bus->cpu memory mapping offset */ |
| 41 | 41 | unsigned long io_offset; /* bus->cpu IO mapping offset */ |
| 42 | 42 | struct pci_bus *bus; /* PCI bus */ |
| 43 | − struct resource *resource[3]; /* Primary PCI bus resources */ | |
| 43 | + struct list_head resources; /* root bus resources (apertures) */ | |
| 44 | 44 | /* Bridge swizzling */ |
| 45 | 45 | u8 (*swizzle)(struct pci_dev *, u8 *); |
| 46 | 46 | /* IRQ mapping */ |
| @@ -10,8 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | #ifndef __ASM_ARM_MACH_TIME_H |
| 11 | 11 | #define __ASM_ARM_MACH_TIME_H |
| 12 | 12 | |
| 13 | −#include <linux/sysdev.h> | |
| 14 | − | |
| 15 | 13 | /* |
| 16 | 14 | * This is our kernel timer structure. |
| 17 | 15 | * |
| @@ -6,4 +6,6 @@ struct machine_desc; · 5 unmodified lines | ||
| 6 | 6 | |
| 7 | 7 | extern void arm_memblock_init(struct meminfo *, struct machine_desc *); |
| 8 | 8 | |
| 9 | +phys_addr_t arm_memblock_steal(phys_addr_t size, phys_addr_t align); | |
| 10 | + | |
| 9 | 11 | #endif |
| @@ -0,0 +1,20 @@ | ||
| 1 | +/* | |
| 2 | + * arch/arm/include/asm/opcodes.h | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | + | |
| 9 | +#ifndef __ASM_ARM_OPCODES_H | |
| 10 | +#define __ASM_ARM_OPCODES_H | |
| 11 | + | |
| 12 | +#ifndef __ASSEMBLY__ | |
| 13 | +extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); | |
| 14 | +#endif | |
| 15 | + | |
| 16 | +#define ARM_OPCODE_CONDTEST_FAIL 0 | |
| 17 | +#define ARM_OPCODE_CONDTEST_PASS 1 | |
| 18 | +#define ARM_OPCODE_CONDTEST_UNCOND 2 | |
| 19 | + | |
| 20 | +#endif /* __ASM_ARM_OPCODES_H */ | |
| @@ -151,7 +151,11 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from, · 150 unmodified lines | ||
| 151 | 151 | #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) |
| 152 | 152 | extern void copy_page(void *to, const void *from); |
| 153 | 153 | |
| 154 | +#ifdef CONFIG_ARM_LPAE | |
| 155 | +#include <asm/pgtable-3level-types.h> | |
| 156 | +#else | |
| 154 | 157 | #include <asm/pgtable-2level-types.h> |
| 158 | +#endif | |
| 155 | 159 | |
| 156 | 160 | #endif /* CONFIG_MMU */ |
| 157 | 161 | |
| @@ -31,18 +31,6 @@ static inline int pci_proc_domain(struct pci_bus *bus) · 30 unmodified lines | ||
| 31 | 31 | } |
| 32 | 32 | #endif /* CONFIG_PCI_DOMAINS */ |
| 33 | 33 | |
| 34 | −#ifdef CONFIG_PCI_HOST_ITE8152 | |
| 35 | −/* ITE bridge requires setting latency timer to avoid early bus access | |
| 36 | − termination by PIC bus mater devices | |
| 37 | −*/ | |
| 38 | −extern void pcibios_set_master(struct pci_dev *dev); | |
| 39 | −#else | |
| 40 | −static inline void pcibios_set_master(struct pci_dev *dev) | |
| 41 | −{ | |
| 42 | − /* No special bus mastering setup handling */ | |
| 43 | −} | |
| 44 | −#endif | |
| 45 | − | |
| 46 | 34 | static inline void pcibios_penalize_isa_irq(int irq, int active) |
| 47 | 35 | { |
| 48 | 36 | /* We don't do dynamic PCI IRQ allocation */ |
| @@ -32,7 +32,4 @@ enum arm_perf_pmu_ids { · 31 unmodified lines | ||
| 32 | 32 | extern enum arm_perf_pmu_ids |
| 33 | 33 | armpmu_get_pmu_id(void); |
| 34 | 34 | |
| 35 | −extern int | |
| 36 | −armpmu_get_max_events(void); | |
| 37 | − | |
| 38 | 35 | #endif /* __ARM_PERF_EVENT_H__ */ |
| @@ -25,12 +25,34 @@ · 24 unmodified lines | ||
| 25 | 25 | #define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER)) |
| 26 | 26 | #define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL)) |
| 27 | 27 | |
| 28 | +#ifdef CONFIG_ARM_LPAE | |
| 29 | + | |
| 30 | +static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) | |
| 31 | +{ | |
| 32 | + return (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_REPEAT); | |
| 33 | +} | |
| 34 | + | |
| 35 | +static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) | |
| 36 | +{ | |
| 37 | + BUG_ON((unsigned long)pmd & (PAGE_SIZE-1)); | |
| 38 | + free_page((unsigned long)pmd); | |
| 39 | +} | |
| 40 | + | |
| 41 | +static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) | |
| 42 | +{ | |
| 43 | + set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE)); | |
| 44 | +} | |
| 45 | + | |
| 46 | +#else /* !CONFIG_ARM_LPAE */ | |
| 47 | + | |
| 28 | 48 | /* |
| 29 | 49 | * Since we have only two-level page tables, these are trivial |
| 30 | 50 | */ |
| 31 | 51 | #define pmd_alloc_one(mm,addr) ({ BUG(); ((pmd_t *)2); }) |
| 32 | 52 | #define pmd_free(mm, pmd) do { } while (0) |
| 33 | −#define pgd_populate(mm,pmd,pte) BUG() | |
| 53 | +#define pud_populate(mm,pmd,pte) BUG() | |
| 54 | + | |
| 55 | +#endif /* CONFIG_ARM_LPAE */ | |
| 34 | 56 | |
| 35 | 57 | extern pgd_t *pgd_alloc(struct mm_struct *mm); |
| 36 | 58 | extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); |
| @@ -109,7 +131,9 @@ static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte, · 72 unmodified lines | ||
| 109 | 131 | { |
| 110 | 132 | pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot; |
| 111 | 133 | pmdp[0] = __pmd(pmdval); |
| 134 | +#ifndef CONFIG_ARM_LPAE | |
| 112 | 135 | pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t)); |
| 136 | +#endif | |
| 113 | 137 | flush_pmd_entry(pmdp); |
| 114 | 138 | } |
| 115 | 139 | |
| @@ -140,4 +140,45 @@ · 139 unmodified lines | ||
| 140 | 140 | #define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 0x0b) << 2) /* 1011 */ |
| 141 | 141 | #define L_PTE_MT_MASK (_AT(pteval_t, 0x0f) << 2) |
| 142 | 142 | |
| 143 | +#ifndef __ASSEMBLY__ | |
| 144 | + | |
| 145 | +/* | |
| 146 | + * The "pud_xxx()" functions here are trivial when the pmd is folded into | |
| 147 | + * the pud: the pud entry is never bad, always exists, and can't be set or | |
| 148 | + * cleared. | |
| 149 | + */ | |
| 150 | +#define pud_none(pud) (0) | |
| 151 | +#define pud_bad(pud) (0) | |
| 152 | +#define pud_present(pud) (1) | |
| 153 | +#define pud_clear(pudp) do { } while (0) | |
| 154 | +#define set_pud(pud,pudp) do { } while (0) | |
| 155 | + | |
| 156 | +static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr) | |
| 157 | +{ | |
| 158 | + return (pmd_t *)pud; | |
| 159 | +} | |
| 160 | + | |
| 161 | +#define pmd_bad(pmd) (pmd_val(pmd) & 2) | |
| 162 | + | |
| 163 | +#define copy_pmd(pmdpd,pmdps) \ | |
| 164 | + do { \ | |
| 165 | + pmdpd[0] = pmdps[0]; \ | |
| 166 | + pmdpd[1] = pmdps[1]; \ | |
| 167 | + flush_pmd_entry(pmdpd); \ | |
| 168 | + } while (0) | |
| 169 | + | |
| 170 | +#define pmd_clear(pmdp) \ | |
| 171 | + do { \ | |
| 172 | + pmdp[0] = __pmd(0); \ | |
| 173 | + pmdp[1] = __pmd(0); \ | |
| 174 | + clean_pmd_entry(pmdp); \ | |
| 175 | + } while (0) | |
| 176 | + | |
| 177 | +/* we don't need complex calculations here as the pmd is folded into the pgd */ | |
| 178 | +#define pmd_addr_end(addr,end) (end) | |
| 179 | + | |
| 180 | +#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) | |
| 181 | + | |
| 182 | +#endif /* __ASSEMBLY__ */ | |
| 183 | + | |
| 143 | 184 | #endif /* _ASM_PGTABLE_2LEVEL_H */ |
| @@ -0,0 +1,77 @@ | ||
| 1 | +/* | |
| 2 | + * arch/arm/include/asm/pgtable-3level-hwdef.h | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 ARM Ltd. | |
| 5 | + * Author: Catalin Marinas <catalin.marinas@arm.com> | |
| 6 | + * | |
| 7 | + * This program is free software; you can redistribute it and/or modify | |
| 8 | + * it under the terms of the GNU General Public License version 2 as | |
| 9 | + * published by the Free Software Foundation. | |
| 10 | + * | |
| 11 | + * This program is distributed in the hope that it will be useful, | |
| 12 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | + * GNU General Public License for more details. | |
| 15 | + * | |
| 16 | + * You should have received a copy of the GNU General Public License | |
| 17 | + * along with this program; if not, write to the Free Software | |
| 18 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 19 | + */ | |
| 20 | +#ifndef _ASM_PGTABLE_3LEVEL_HWDEF_H | |
| 21 | +#define _ASM_PGTABLE_3LEVEL_HWDEF_H | |
| 22 | + | |
| 23 | +/* | |
| 24 | + * Hardware page table definitions. | |
| 25 | + * | |
| 26 | + * + Level 1/2 descriptor | |
| 27 | + * - common | |
| 28 | + */ | |
| 29 | +#define PMD_TYPE_MASK (_AT(pmdval_t, 3) << 0) | |
| 30 | +#define PMD_TYPE_FAULT (_AT(pmdval_t, 0) << 0) | |
| 31 | +#define PMD_TYPE_TABLE (_AT(pmdval_t, 3) << 0) | |
| 32 | +#define PMD_TYPE_SECT (_AT(pmdval_t, 1) << 0) | |
| 33 | +#define PMD_BIT4 (_AT(pmdval_t, 0)) | |
| 34 | +#define PMD_DOMAIN(x) (_AT(pmdval_t, 0)) | |
| 35 | + | |
| 36 | +/* | |
| 37 | + * - section | |
| 38 | + */ | |
| 39 | +#define PMD_SECT_BUFFERABLE (_AT(pmdval_t, 1) << 2) | |
| 40 | +#define PMD_SECT_CACHEABLE (_AT(pmdval_t, 1) << 3) | |
| 41 | +#define PMD_SECT_S (_AT(pmdval_t, 3) << 8) | |
| 42 | +#define PMD_SECT_AF (_AT(pmdval_t, 1) << 10) | |
| 43 | +#define PMD_SECT_nG (_AT(pmdval_t, 1) << 11) | |
| 44 | +#define PMD_SECT_XN (_AT(pmdval_t, 1) << 54) | |
| 45 | +#define PMD_SECT_AP_WRITE (_AT(pmdval_t, 0)) | |
| 46 | +#define PMD_SECT_AP_READ (_AT(pmdval_t, 0)) | |
| 47 | +#define PMD_SECT_TEX(x) (_AT(pmdval_t, 0)) | |
| 48 | + | |
| 49 | +/* | |
| 50 | + * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). | |
| 51 | + */ | |
| 52 | +#define PMD_SECT_UNCACHED (_AT(pmdval_t, 0) << 2) /* strongly ordered */ | |
| 53 | +#define PMD_SECT_BUFFERED (_AT(pmdval_t, 1) << 2) /* normal non-cacheable */ | |
| 54 | +#define PMD_SECT_WT (_AT(pmdval_t, 2) << 2) /* normal inner write-through */ | |
| 55 | +#define PMD_SECT_WB (_AT(pmdval_t, 3) << 2) /* normal inner write-back */ | |
| 56 | +#define PMD_SECT_WBWA (_AT(pmdval_t, 7) << 2) /* normal inner write-alloc */ | |
| 57 | + | |
| 58 | +/* | |
| 59 | + * + Level 3 descriptor (PTE) | |
| 60 | + */ | |
| 61 | +#define PTE_TYPE_MASK (_AT(pteval_t, 3) << 0) | |
| 62 | +#define PTE_TYPE_FAULT (_AT(pteval_t, 0) << 0) | |
| 63 | +#define PTE_TYPE_PAGE (_AT(pteval_t, 3) << 0) | |
| 64 | +#define PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) /* AttrIndx[0] */ | |
| 65 | +#define PTE_CACHEABLE (_AT(pteval_t, 1) << 3) /* AttrIndx[1] */ | |
| 66 | +#define PTE_EXT_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ | |
| 67 | +#define PTE_EXT_AF (_AT(pteval_t, 1) << 10) /* Access Flag */ | |
| 68 | +#define PTE_EXT_NG (_AT(pteval_t, 1) << 11) /* nG */ | |
| 69 | +#define PTE_EXT_XN (_AT(pteval_t, 1) << 54) /* XN */ | |
| 70 | + | |
| 71 | +/* | |
| 72 | + * 40-bit physical address supported. | |
| 73 | + */ | |
| 74 | +#define PHYS_MASK_SHIFT (40) | |
| 75 | +#define PHYS_MASK ((1ULL << PHYS_MASK_SHIFT) - 1) | |
| 76 | + | |
| 77 | +#endif | |
| @@ -0,0 +1,70 @@ | ||
| 1 | +/* | |
| 2 | + * arch/arm/include/asm/pgtable-3level-types.h | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 ARM Ltd. | |
| 5 | + * Author: Catalin Marinas <catalin.marinas@arm.com> | |
| 6 | + * | |
| 7 | + * This program is free software; you can redistribute it and/or modify | |
| 8 | + * it under the terms of the GNU General Public License version 2 as | |
| 9 | + * published by the Free Software Foundation. | |
| 10 | + * | |
| 11 | + * This program is distributed in the hope that it will be useful, | |
| 12 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | + * GNU General Public License for more details. | |
| 15 | + * | |
| 16 | + * You should have received a copy of the GNU General Public License | |
| 17 | + * along with this program; if not, write to the Free Software | |
| 18 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 19 | + */ | |
| 20 | +#ifndef _ASM_PGTABLE_3LEVEL_TYPES_H | |
| 21 | +#define _ASM_PGTABLE_3LEVEL_TYPES_H | |
| 22 | + | |
| 23 | +#include <asm/types.h> | |
| 24 | + | |
| 25 | +typedef u64 pteval_t; | |
| 26 | +typedef u64 pmdval_t; | |
| 27 | +typedef u64 pgdval_t; | |
| 28 | + | |
| 29 | +#undef STRICT_MM_TYPECHECKS | |
| 30 | + | |
| 31 | +#ifdef STRICT_MM_TYPECHECKS | |
| 32 | + | |
| 33 | +/* | |
| 34 | + * These are used to make use of C type-checking.. | |
| 35 | + */ | |
| 36 | +typedef struct { pteval_t pte; } pte_t; | |
| 37 | +typedef struct { pmdval_t pmd; } pmd_t; | |
| 38 | +typedef struct { pgdval_t pgd; } pgd_t; | |
| 39 | +typedef struct { pteval_t pgprot; } pgprot_t; | |
| 40 | + | |
| 41 | +#define pte_val(x) ((x).pte) | |
| 42 | +#define pmd_val(x) ((x).pmd) | |
| 43 | +#define pgd_val(x) ((x).pgd) | |
| 44 | +#define pgprot_val(x) ((x).pgprot) | |
| 45 | + | |
| 46 | +#define __pte(x) ((pte_t) { (x) } ) | |
| 47 | +#define __pmd(x) ((pmd_t) { (x) } ) | |
| 48 | +#define __pgd(x) ((pgd_t) { (x) } ) | |
| 49 | +#define __pgprot(x) ((pgprot_t) { (x) } ) | |
| 50 | + | |
| 51 | +#else /* !STRICT_MM_TYPECHECKS */ | |
| 52 | + | |
| 53 | +typedef pteval_t pte_t; | |
| 54 | +typedef pmdval_t pmd_t; | |
| 55 | +typedef pgdval_t pgd_t; | |
| 56 | +typedef pteval_t pgprot_t; | |
| 57 | + | |
| 58 | +#define pte_val(x) (x) | |
| 59 | +#define pmd_val(x) (x) | |
| 60 | +#define pgd_val(x) (x) | |
| 61 | +#define pgprot_val(x) (x) | |
| 62 | + | |
| 63 | +#define __pte(x) (x) | |
| 64 | +#define __pmd(x) (x) | |
| 65 | +#define __pgd(x) (x) | |
| 66 | +#define __pgprot(x) (x) | |
| 67 | + | |
| 68 | +#endif /* STRICT_MM_TYPECHECKS */ | |
| 69 | + | |
| 70 | +#endif /* _ASM_PGTABLE_3LEVEL_TYPES_H */ | |
| @@ -0,0 +1,155 @@ | ||
| 1 | +/* | |
| 2 | + * arch/arm/include/asm/pgtable-3level.h | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 ARM Ltd. | |
| 5 | + * Author: Catalin Marinas <catalin.marinas@arm.com> | |
| 6 | + * | |
| 7 | + * This program is free software; you can redistribute it and/or modify | |
| 8 | + * it under the terms of the GNU General Public License version 2 as | |
| 9 | + * published by the Free Software Foundation. | |
| 10 | + * | |
| 11 | + * This program is distributed in the hope that it will be useful, | |
| 12 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | + * GNU General Public License for more details. | |
| 15 | + * | |
| 16 | + * You should have received a copy of the GNU General Public License | |
| 17 | + * along with this program; if not, write to the Free Software | |
| 18 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 19 | + */ | |
| 20 | +#ifndef _ASM_PGTABLE_3LEVEL_H | |
| 21 | +#define _ASM_PGTABLE_3LEVEL_H | |
| 22 | + | |
| 23 | +/* | |
| 24 | + * With LPAE, there are 3 levels of page tables. Each level has 512 entries of | |
| 25 | + * 8 bytes each, occupying a 4K page. The first level table covers a range of | |
| 26 | + * 512GB, each entry representing 1GB. Since we are limited to 4GB input | |
| 27 | + * address range, only 4 entries in the PGD are used. | |
| 28 | + * | |
| 29 | + * There are enough spare bits in a page table entry for the kernel specific | |
| 30 | + * state. | |
| 31 | + */ | |
| 32 | +#define PTRS_PER_PTE 512 | |
| 33 | +#define PTRS_PER_PMD 512 | |
| 34 | +#define PTRS_PER_PGD 4 | |
| 35 | + | |
| 36 | +#define PTE_HWTABLE_PTRS (PTRS_PER_PTE) | |
| 37 | +#define PTE_HWTABLE_OFF (0) | |
| 38 | +#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u64)) | |
| 39 | + | |
| 40 | +/* | |
| 41 | + * PGDIR_SHIFT determines the size a top-level page table entry can map. | |
| 42 | + */ | |
| 43 | +#define PGDIR_SHIFT 30 | |
| 44 | + | |
| 45 | +/* | |
| 46 | + * PMD_SHIFT determines the size a middle-level page table entry can map. | |
| 47 | + */ | |
| 48 | +#define PMD_SHIFT 21 | |
| 49 | + | |
| 50 | +#define PMD_SIZE (1UL << PMD_SHIFT) | |
| 51 | +#define PMD_MASK (~(PMD_SIZE-1)) | |
| 52 | +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) | |
| 53 | +#define PGDIR_MASK (~(PGDIR_SIZE-1)) | |
| 54 | + | |
| 55 | +/* | |
| 56 | + * section address mask and size definitions. | |
| 57 | + */ | |
| 58 | +#define SECTION_SHIFT 21 | |
| 59 | +#define SECTION_SIZE (1UL << SECTION_SHIFT) | |
| 60 | +#define SECTION_MASK (~(SECTION_SIZE-1)) | |
| 61 | + | |
| 62 | +#define USER_PTRS_PER_PGD (PAGE_OFFSET / PGDIR_SIZE) | |
| 63 | + | |
| 64 | +/* | |
| 65 | + * "Linux" PTE definitions for LPAE. | |
| 66 | + * | |
| 67 | + * These bits overlap with the hardware bits but the naming is preserved for | |
| 68 | + * consistency with the classic page table format. | |
| 69 | + */ | |
| 70 | +#define L_PTE_PRESENT (_AT(pteval_t, 3) << 0) /* Valid */ | |
| 71 | +#define L_PTE_FILE (_AT(pteval_t, 1) << 2) /* only when !PRESENT */ | |
| 72 | +#define L_PTE_BUFFERABLE (_AT(pteval_t, 1) << 2) /* AttrIndx[0] */ | |
| 73 | +#define L_PTE_CACHEABLE (_AT(pteval_t, 1) << 3) /* AttrIndx[1] */ | |
| 74 | +#define L_PTE_USER (_AT(pteval_t, 1) << 6) /* AP[1] */ | |
| 75 | +#define L_PTE_RDONLY (_AT(pteval_t, 1) << 7) /* AP[2] */ | |
| 76 | +#define L_PTE_SHARED (_AT(pteval_t, 3) << 8) /* SH[1:0], inner shareable */ | |
| 77 | +#define L_PTE_YOUNG (_AT(pteval_t, 1) << 10) /* AF */ | |
| 78 | +#define L_PTE_XN (_AT(pteval_t, 1) << 54) /* XN */ | |
| 79 | +#define L_PTE_DIRTY (_AT(pteval_t, 1) << 55) /* unused */ | |
| 80 | +#define L_PTE_SPECIAL (_AT(pteval_t, 1) << 56) /* unused */ | |
| 81 | + | |
| 82 | +/* | |
| 83 | + * To be used in assembly code with the upper page attributes. | |
| 84 | + */ | |
| 85 | +#define L_PTE_XN_HIGH (1 << (54 - 32)) | |
| 86 | +#define L_PTE_DIRTY_HIGH (1 << (55 - 32)) | |
| 87 | + | |
| 88 | +/* | |
| 89 | + * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). | |
| 90 | + */ | |
| 91 | +#define L_PTE_MT_UNCACHED (_AT(pteval_t, 0) << 2) /* strongly ordered */ | |
| 92 | +#define L_PTE_MT_BUFFERABLE (_AT(pteval_t, 1) << 2) /* normal non-cacheable */ | |
| 93 | +#define L_PTE_MT_WRITETHROUGH (_AT(pteval_t, 2) << 2) /* normal inner write-through */ | |
| 94 | +#define L_PTE_MT_WRITEBACK (_AT(pteval_t, 3) << 2) /* normal inner write-back */ | |
| 95 | +#define L_PTE_MT_WRITEALLOC (_AT(pteval_t, 7) << 2) /* normal inner write-alloc */ | |
| 96 | +#define L_PTE_MT_DEV_SHARED (_AT(pteval_t, 4) << 2) /* device */ | |
| 97 | +#define L_PTE_MT_DEV_NONSHARED (_AT(pteval_t, 4) << 2) /* device */ | |
| 98 | +#define L_PTE_MT_DEV_WC (_AT(pteval_t, 1) << 2) /* normal non-cacheable */ | |
| 99 | +#define L_PTE_MT_DEV_CACHED (_AT(pteval_t, 3) << 2) /* normal inner write-back */ | |
| 100 | +#define L_PTE_MT_MASK (_AT(pteval_t, 7) << 2) | |
| 101 | + | |
| 102 | +/* | |
| 103 | + * Software PGD flags. | |
| 104 | + */ | |
| 105 | +#define L_PGD_SWAPPER (_AT(pgdval_t, 1) << 55) /* swapper_pg_dir entry */ | |
| 106 | + | |
| 107 | +#ifndef __ASSEMBLY__ | |
| 108 | + | |
| 109 | +#define pud_none(pud) (!pud_val(pud)) | |
| 110 | +#define pud_bad(pud) (!(pud_val(pud) & 2)) | |
| 111 | +#define pud_present(pud) (pud_val(pud)) | |
| 112 | + | |
| 113 | +#define pud_clear(pudp) \ | |
| 114 | + do { \ | |
| 115 | + *pudp = __pud(0); \ | |
| 116 | + clean_pmd_entry(pudp); \ | |
| 117 | + } while (0) | |
| 118 | + | |
| 119 | +#define set_pud(pudp, pud) \ | |
| 120 | + do { \ | |
| 121 | + *pudp = pud; \ | |
| 122 | + flush_pmd_entry(pudp); \ | |
| 123 | + } while (0) | |
| 124 | + | |
| 125 | +static inline pmd_t *pud_page_vaddr(pud_t pud) | |
| 126 | +{ | |
| 127 | + return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK); | |
| 128 | +} | |
| 129 | + | |
| 130 | +/* Find an entry in the second-level page table.. */ | |
| 131 | +#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) | |
| 132 | +static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr) | |
| 133 | +{ | |
| 134 | + return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr); | |
| 135 | +} | |
| 136 | + | |
| 137 | +#define pmd_bad(pmd) (!(pmd_val(pmd) & 2)) | |
| 138 | + | |
| 139 | +#define copy_pmd(pmdpd,pmdps) \ | |
| 140 | + do { \ | |
| 141 | + *pmdpd = *pmdps; \ | |
| 142 | + flush_pmd_entry(pmdpd); \ | |
| 143 | + } while (0) | |
| 144 | + | |
| 145 | +#define pmd_clear(pmdp) \ | |
| 146 | + do { \ | |
| 147 | + *pmdp = __pmd(0); \ | |
| 148 | + clean_pmd_entry(pmdp); \ | |
| 149 | + } while (0) | |
| 150 | + | |
| 151 | +#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,__pte(pte_val(pte)|(ext))) | |
| 152 | + | |
| 153 | +#endif /* __ASSEMBLY__ */ | |
| 154 | + | |
| 155 | +#endif /* _ASM_PGTABLE_3LEVEL_H */ | |
| @@ -10,6 +10,10 @@ · 9 unmodified lines | ||
| 10 | 10 | #ifndef _ASMARM_PGTABLE_HWDEF_H |
| 11 | 11 | #define _ASMARM_PGTABLE_HWDEF_H |
| 12 | 12 | |
| 13 | +#ifdef CONFIG_ARM_LPAE | |
| 14 | +#include <asm/pgtable-3level-hwdef.h> | |
| 15 | +#else | |
| 13 | 16 | #include <asm/pgtable-2level-hwdef.h> |
| 17 | +#endif | |
| 14 | 18 | |
| 15 | 19 | #endif |
| @@ -11,20 +11,24 @@ · 10 unmodified lines | ||
| 11 | 11 | #define _ASMARM_PGTABLE_H |
| 12 | 12 | |
| 13 | 13 | #include <linux/const.h> |
| 14 | −#include <asm-generic/4level-fixup.h> | |
| 15 | 14 | #include <asm/proc-fns.h> |
| 16 | 15 | |
| 17 | 16 | #ifndef CONFIG_MMU |
| 18 | 17 | |
| 18 | +#include <asm-generic/4level-fixup.h> | |
| 19 | 19 | #include "pgtable-nommu.h" |
| 20 | 20 | |
| 21 | 21 | #else |
| 22 | 22 | |
| 23 | +#include <asm-generic/pgtable-nopud.h> | |
| 23 | 24 | #include <asm/memory.h> |
| 24 | −#include <mach/vmalloc.h> | |
| 25 | 25 | #include <asm/pgtable-hwdef.h> |
| 26 | 26 | |
| 27 | +#ifdef CONFIG_ARM_LPAE | |
| 28 | +#include <asm/pgtable-3level.h> | |
| 29 | +#else | |
| 27 | 30 | #include <asm/pgtable-2level.h> |
| 31 | +#endif | |
| 28 | 32 | |
| 29 | 33 | /* |
| 30 | 34 | * Just any arbitrary offset to the start of the vmalloc VM area: the |
| @@ -33,15 +37,10 @@ · 2 unmodified lines | ||
| 33 | 37 | * any out-of-bounds memory accesses will hopefully be caught. |
| 34 | 38 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced |
| 35 | 39 | * area for the same reason. ;) |
| 36 | − * | |
| 37 | − * Note that platforms may override VMALLOC_START, but they must provide | |
| 38 | − * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space, | |
| 39 | − * which may not overlap IO space. | |
| 40 | 40 | */ |
| 41 | −#ifndef VMALLOC_START | |
| 42 | 41 | #define VMALLOC_OFFSET (8*1024*1024) |
| 43 | 42 | #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) |
| 44 | −#endif | |
| 43 | +#define VMALLOC_END 0xff000000UL | |
| 45 | 44 | |
| 46 | 45 | #define LIBRARY_TEXT_START 0x0c000000 |
| 47 | 46 | |
| @@ -163,39 +162,8 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; · 115 unmodified lines | ||
| 163 | 162 | /* to find an entry in a kernel page-table-directory */ |
| 164 | 163 | #define pgd_offset_k(addr) pgd_offset(&init_mm, addr) |
| 165 | 164 | |
| 166 | −/* | |
| 167 | − * The "pgd_xxx()" functions here are trivial for a folded two-level | |
| 168 | − * setup: the pgd is never bad, and a pmd always exists (as it's folded | |
| 169 | − * into the pgd entry) | |
| 170 | − */ | |
| 171 | −#define pgd_none(pgd) (0) | |
| 172 | −#define pgd_bad(pgd) (0) | |
| 173 | −#define pgd_present(pgd) (1) | |
| 174 | −#define pgd_clear(pgdp) do { } while (0) | |
| 175 | −#define set_pgd(pgd,pgdp) do { } while (0) | |
| 176 | −#define set_pud(pud,pudp) do { } while (0) | |
| 177 | − | |
| 178 | − | |
| 179 | −/* Find an entry in the second-level page table.. */ | |
| 180 | −#define pmd_offset(dir, addr) ((pmd_t *)(dir)) | |
| 181 | − | |
| 182 | 165 | #define pmd_none(pmd) (!pmd_val(pmd)) |
| 183 | 166 | #define pmd_present(pmd) (pmd_val(pmd)) |
| 184 | −#define pmd_bad(pmd) (pmd_val(pmd) & 2) | |
| 185 | − | |
| 186 | −#define copy_pmd(pmdpd,pmdps) \ | |
| 187 | − do { \ | |
| 188 | − pmdpd[0] = pmdps[0]; \ | |
| 189 | − pmdpd[1] = pmdps[1]; \ | |
| 190 | − flush_pmd_entry(pmdpd); \ | |
| 191 | − } while (0) | |
| 192 | − | |
| 193 | −#define pmd_clear(pmdp) \ | |
| 194 | − do { \ | |
| 195 | − pmdp[0] = __pmd(0); \ | |
| 196 | − pmdp[1] = __pmd(0); \ | |
| 197 | − clean_pmd_entry(pmdp); \ | |
| 198 | − } while (0) | |
| 199 | 167 | |
| 200 | 168 | static inline pte_t *pmd_page_vaddr(pmd_t pmd) |
| 201 | 169 | { |
| @@ -204,10 +172,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) · 2 unmodified lines | ||
| 204 | 172 | |
| 205 | 173 | #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK)) |
| 206 | 174 | |
| 207 | −/* we don't need complex calculations here as the pmd is folded into the pgd */ | |
| 208 | −#define pmd_addr_end(addr,end) (end) | |
| 209 | − | |
| 210 | − | |
| 211 | 175 | #ifndef CONFIG_HIGHPTE |
| 212 | 176 | #define __pte_map(pmd) pmd_page_vaddr(*(pmd)) |
| 213 | 177 | #define __pte_unmap(pte) do { } while (0) |
| @@ -229,7 +193,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) · 15 unmodified lines | ||
| 229 | 193 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) |
| 230 | 194 | #define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot) |
| 231 | 195 | |
| 232 | −#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) | |
| 233 | 196 | #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0) |
| 234 | 197 | |
| 235 | 198 | #if __LINUX_ARM_ARCH__ < 6 |
| @@ -336,6 +299,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) · 100 unmodified lines | ||
| 336 | 299 | * We provide our own arch_get_unmapped_area to cope with VIPT caches. |
| 337 | 300 | */ |
| 338 | 301 | #define HAVE_ARCH_UNMAPPED_AREA |
| 302 | +#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | |
| 339 | 303 | |
| 340 | 304 | /* |
| 341 | 305 | * remap a physical page `pfn' of size `size' with page protection `prot' |
| @@ -346,9 +310,6 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) · 4 unmodified lines | ||
| 346 | 310 | |
| 347 | 311 | #define pgtable_cache_init() do { } while (0) |
| 348 | 312 | |
| 349 | −void identity_mapping_add(pgd_t *, unsigned long, unsigned long); | |
| 350 | −void identity_mapping_del(pgd_t *, unsigned long, unsigned long); | |
| 351 | − | |
| 352 | 313 | #endif /* !__ASSEMBLY__ */ |
| 353 | 314 | |
| 354 | 315 | #endif /* CONFIG_MMU */ |
| @@ -27,13 +27,22 @@ enum arm_pmu_type { · 26 unmodified lines | ||
| 27 | 27 | /* |
| 28 | 28 | * struct arm_pmu_platdata - ARM PMU platform data |
| 29 | 29 | * |
| 30 | − * @handle_irq: an optional handler which will be called from the interrupt and | |
| 31 | − * passed the address of the low level handler, and can be used to implement | |
| 32 | − * any platform specific handling before or after calling it. | |
| 30 | + * @handle_irq: an optional handler which will be called from the | |
| 31 | + * interrupt and passed the address of the low level handler, | |
| 32 | + * and can be used to implement any platform specific handling | |
| 33 | + * before or after calling it. | |
| 34 | + * @enable_irq: an optional handler which will be called after | |
| 35 | + * request_irq and be used to handle some platform specific | |
| 36 | + * irq enablement | |
| 37 | + * @disable_irq: an optional handler which will be called before | |
| 38 | + * free_irq and be used to handle some platform specific | |
| 39 | + * irq disablement | |
| 33 | 40 | */ |
| 34 | 41 | struct arm_pmu_platdata { |
| 35 | 42 | irqreturn_t (*handle_irq)(int irq, void *dev, |
| 36 | 43 | irq_handler_t pmu_handler); |
| 44 | + void (*enable_irq)(int irq); | |
| 45 | + void (*disable_irq)(int irq); | |
| 37 | 46 | }; |
| 38 | 47 | |
| 39 | 48 | #ifdef CONFIG_CPU_HAS_PMU |
| @@ -65,7 +65,11 @@ extern struct processor { · 64 unmodified lines | ||
| 65 | 65 | * Set a possibly extended PTE. Non-extended PTEs should |
| 66 | 66 | * ignore 'ext'. |
| 67 | 67 | */ |
| 68 | +#ifdef CONFIG_ARM_LPAE | |
| 69 | + void (*set_pte_ext)(pte_t *ptep, pte_t pte); | |
| 70 | +#else | |
| 68 | 71 | void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext); |
| 72 | +#endif | |
| 69 | 73 | |
| 70 | 74 | /* Suspend/resume */ |
| 71 | 75 | unsigned int suspend_size; |
| @@ -79,7 +83,11 @@ extern void cpu_proc_fin(void); · 7 unmodified lines | ||
| 79 | 83 | extern int cpu_do_idle(void); |
| 80 | 84 | extern void cpu_dcache_clean_area(void *, int); |
| 81 | 85 | extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); |
| 86 | +#ifdef CONFIG_ARM_LPAE | |
| 87 | +extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte); | |
| 88 | +#else | |
| 82 | 89 | extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); |
| 90 | +#endif | |
| 83 | 91 | extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); |
| 84 | 92 | |
| 85 | 93 | /* These three are private to arch/arm/kernel/suspend.c */ |
| @@ -107,6 +115,18 @@ extern void cpu_resume(void); · 21 unmodified lines | ||
| 107 | 115 | |
| 108 | 116 | #define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm) |
| 109 | 117 | |
| 118 | +#ifdef CONFIG_ARM_LPAE | |
| 119 | +#define cpu_get_pgd() \ | |
| 120 | + ({ \ | |
| 121 | + unsigned long pg, pg2; \ | |
| 122 | + __asm__("mrrc p15, 0, %0, %1, c2" \ | |
| 123 | + : "=r" (pg), "=r" (pg2) \ | |
| 124 | + : \ | |
| 125 | + : "cc"); \ | |
| 126 | + pg &= ~(PTRS_PER_PGD*sizeof(pgd_t)-1); \ | |
| 127 | + (pgd_t *)phys_to_virt(pg); \ | |
| 128 | + }) | |
| 129 | +#else | |
| 110 | 130 | #define cpu_get_pgd() \ |
| 111 | 131 | ({ \ |
| 112 | 132 | unsigned long pg; \ |
| @@ -115,6 +135,7 @@ extern void cpu_resume(void); · 2 unmodified lines | ||
| 115 | 135 | pg &= ~0x3fff; \ |
| 116 | 136 | (pgd_t *)phys_to_virt(pg); \ |
| 117 | 137 | }) |
| 138 | +#endif | |
| 118 | 139 | |
| 119 | 140 | #endif |
| 120 | 141 | |
| @@ -123,6 +123,8 @@ static inline void prefetch(const void *ptr) · 122 unmodified lines | ||
| 123 | 123 | |
| 124 | 124 | #endif |
| 125 | 125 | |
| 126 | +#define HAVE_ARCH_PICK_MMAP_LAYOUT | |
| 127 | + | |
| 126 | 128 | #endif |
| 127 | 129 | |
| 128 | 130 | #endif /* __ASM_ARM_PROCESSOR_H */ |
| @@ -13,7 +13,6 @@ · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | #ifdef CONFIG_OF |
| 15 | 15 | |
| 16 | −#include <asm/setup.h> | |
| 17 | 16 | #include <asm/irq.h> |
| 18 | 17 | |
| 19 | 18 | extern struct machine_desc *setup_machine_fdt(unsigned int dt_phys); |
| @@ -189,6 +189,11 @@ static inline int valid_user_regs(struct pt_regs *regs) · 188 unmodified lines | ||
| 189 | 189 | return 0; |
| 190 | 190 | } |
| 191 | 191 | |
| 192 | +static inline long regs_return_value(struct pt_regs *regs) | |
| 193 | +{ | |
| 194 | + return regs->ARM_r0; | |
| 195 | +} | |
| 196 | + | |
| 192 | 197 | #define instruction_pointer(regs) (regs)->ARM_pc |
| 193 | 198 | |
| 194 | 199 | #ifdef CONFIG_SMP |
| @@ -8,113 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | #ifndef ASM_SCHED_CLOCK |
| 9 | 9 | #define ASM_SCHED_CLOCK |
| 10 | 10 | |
| 11 | −#include <linux/kernel.h> | |
| 12 | −#include <linux/types.h> | |
| 13 | − | |
| 14 | −struct clock_data { | |
| 15 | − u64 epoch_ns; | |
| 16 | − u32 epoch_cyc; | |
| 17 | − u32 epoch_cyc_copy; | |
| 18 | − u32 mult; | |
| 19 | − u32 shift; | |
| 20 | −}; | |
| 21 | − | |
| 22 | −#define DEFINE_CLOCK_DATA(name) struct clock_data name | |
| 23 | − | |
| 24 | −static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) | |
| 25 | −{ | |
| 26 | − return (cyc * mult) >> shift; | |
| 27 | −} | |
| 28 | − | |
| 29 | −/* | |
| 30 | − * Atomically update the sched_clock epoch. Your update callback will | |
| 31 | − * be called from a timer before the counter wraps - read the current | |
| 32 | − * counter value, and call this function to safely move the epochs | |
| 33 | − * forward. Only use this from the update callback. | |
| 34 | − */ | |
| 35 | −static inline void update_sched_clock(struct clock_data *cd, u32 cyc, u32 mask) | |
| 36 | −{ | |
| 37 | − unsigned long flags; | |
| 38 | − u64 ns = cd->epoch_ns + | |
| 39 | − cyc_to_ns((cyc - cd->epoch_cyc) & mask, cd->mult, cd->shift); | |
| 40 | − | |
| 41 | − /* | |
| 42 | − * Write epoch_cyc and epoch_ns in a way that the update is | |
| 43 | − * detectable in cyc_to_fixed_sched_clock(). | |
| 44 | − */ | |
| 45 | − raw_local_irq_save(flags); | |
| 46 | − cd->epoch_cyc = cyc; | |
| 47 | − smp_wmb(); | |
| 48 | − cd->epoch_ns = ns; | |
| 49 | − smp_wmb(); | |
| 50 | − cd->epoch_cyc_copy = cyc; | |
| 51 | − raw_local_irq_restore(flags); | |
| 52 | −} | |
| 53 | − | |
| 54 | −/* | |
| 55 | − * If your clock rate is known at compile time, using this will allow | |
| 56 | − * you to optimize the mult/shift loads away. This is paired with | |
| 57 | − * init_fixed_sched_clock() to ensure that your mult/shift are correct. | |
| 58 | − */ | |
| 59 | −static inline unsigned long long cyc_to_fixed_sched_clock(struct clock_data *cd, | |
| 60 | − u32 cyc, u32 mask, u32 mult, u32 shift) | |
| 61 | −{ | |
| 62 | − u64 epoch_ns; | |
| 63 | − u32 epoch_cyc; | |
| 64 | − | |
| 65 | − /* | |
| 66 | − * Load the epoch_cyc and epoch_ns atomically. We do this by | |
| 67 | − * ensuring that we always write epoch_cyc, epoch_ns and | |
| 68 | − * epoch_cyc_copy in strict order, and read them in strict order. | |
| 69 | − * If epoch_cyc and epoch_cyc_copy are not equal, then we're in | |
| 70 | − * the middle of an update, and we should repeat the load. | |
| 71 | − */ | |
| 72 | − do { | |
| 73 | − epoch_cyc = cd->epoch_cyc; | |
| 74 | − smp_rmb(); | |
| 75 | − epoch_ns = cd->epoch_ns; | |
| 76 | − smp_rmb(); | |
| 77 | − } while (epoch_cyc != cd->epoch_cyc_copy); | |
| 78 | − | |
| 79 | − return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, mult, shift); | |
| 80 | −} | |
| 81 | − | |
| 82 | −/* | |
| 83 | − * Otherwise, you need to use this, which will obtain the mult/shift | |
| 84 | − * from the clock_data structure. Use init_sched_clock() with this. | |
| 85 | − */ | |
| 86 | −static inline unsigned long long cyc_to_sched_clock(struct clock_data *cd, | |
| 87 | − u32 cyc, u32 mask) | |
| 88 | −{ | |
| 89 | − return cyc_to_fixed_sched_clock(cd, cyc, mask, cd->mult, cd->shift); | |
| 90 | −} | |
| 91 | − | |
| 92 | −/* | |
| 93 | − * Initialize the clock data - calculate the appropriate multiplier | |
| 94 | − * and shift. Also setup a timer to ensure that the epoch is refreshed | |
| 95 | − * at the appropriate time interval, which will call your update | |
| 96 | − * handler. | |
| 97 | − */ | |
| 98 | −void init_sched_clock(struct clock_data *, void (*)(void), | |
| 99 | − unsigned int, unsigned long); | |
| 100 | − | |
| 101 | −/* | |
| 102 | − * Use this initialization function rather than init_sched_clock() if | |
| 103 | − * you're using cyc_to_fixed_sched_clock, which will warn if your | |
| 104 | − * constants are incorrect. | |
| 105 | − */ | |
| 106 | −static inline void init_fixed_sched_clock(struct clock_data *cd, | |
| 107 | − void (*update)(void), unsigned int bits, unsigned long rate, | |
| 108 | − u32 mult, u32 shift) | |
| 109 | −{ | |
| 110 | − init_sched_clock(cd, update, bits, rate); | |
| 111 | − if (cd->mult != mult || cd->shift != shift) { | |
| 112 | − pr_crit("sched_clock: wrong multiply/shift: %u>>%u vs calculated %u>>%u\n" | |
| 113 | − "sched_clock: fix multiply/shift to avoid scheduler hiccups\n", | |
| 114 | − mult, shift, cd->mult, cd->shift); | |
| 115 | − } | |
| 116 | −} | |
| 117 | − | |
| 118 | 11 | extern void sched_clock_postinit(void); |
| 12 | +extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); | |
| 119 | 13 | |
| 120 | 14 | #endif |
| @@ -192,11 +192,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn } · 191 unmodified lines | ||
| 192 | 192 | /* |
| 193 | 193 | * Memory map description |
| 194 | 194 | */ |
| 195 | −#ifdef CONFIG_ARCH_EP93XX | |
| 196 | −# define NR_BANKS 16 | |
| 197 | −#else | |
| 198 | −# define NR_BANKS 8 | |
| 199 | −#endif | |
| 195 | +#define NR_BANKS CONFIG_ARM_NR_BANKS | |
| 200 | 196 | |
| 201 | 197 | struct membank { |
| 202 | 198 | phys_addr_t start; |
| @@ -62,4 +62,7 @@ · 61 unmodified lines | ||
| 62 | 62 | |
| 63 | 63 | #define SO_RXQ_OVFL 40 |
| 64 | 64 | |
| 65 | +#define SO_WIFI_STATUS 41 | |
| 66 | +#define SCM_WIFI_STATUS SO_WIFI_STATUS | |
| 67 | + | |
| 65 | 68 | #endif /* _ASM_SOCKET_H */ |
| @@ -22,14 +22,16 @@ · 21 unmodified lines | ||
| 22 | 22 | # define __SWAB_64_THRU_32__ |
| 23 | 23 | #endif |
| 24 | 24 | |
| 25 | −#if defined(__KERNEL__) && __LINUX_ARM_ARCH__ >= 6 | |
| 25 | +#if defined(__KERNEL__) | |
| 26 | +#if __LINUX_ARM_ARCH__ >= 6 | |
| 26 | 27 | |
| 27 | −static inline __attribute_const__ __u16 __arch_swab16(__u16 x) | |
| 28 | +static inline __attribute_const__ __u32 __arch_swahb32(__u32 x) | |
| 28 | 29 | { |
| 29 | 30 | __asm__ ("rev16 %0, %1" : "=r" (x) : "r" (x)); |
| 30 | 31 | return x; |
| 31 | 32 | } |
| 32 | −#define __arch_swab16 __arch_swab16 | |
| 33 | +#define __arch_swahb32 __arch_swahb32 | |
| 34 | +#define __arch_swab16(x) ((__u16)__arch_swahb32(x)) | |
| 33 | 35 | |
| 34 | 36 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) |
| 35 | 37 | { |
| @@ -38,8 +40,10 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x) · 2 unmodified lines | ||
| 38 | 40 | } |
| 39 | 41 | #define __arch_swab32 __arch_swab32 |
| 40 | 42 | |
| 41 | −#else | |
| 43 | +#endif | |
| 44 | +#endif | |
| 42 | 45 | |
| 46 | +#if !defined(__KERNEL__) || __LINUX_ARM_ARCH__ < 6 | |
| 43 | 47 | static inline __attribute_const__ __u32 __arch_swab32(__u32 x) |
| 44 | 48 | { |
| 45 | 49 | __u32 t; |
| @@ -80,6 +80,14 @@ struct siginfo; · 79 unmodified lines | ||
| 80 | 80 | void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, |
| 81 | 81 | unsigned long err, unsigned long trap); |
| 82 | 82 | |
| 83 | +#ifdef CONFIG_ARM_LPAE | |
| 84 | +#define FAULT_CODE_ALIGNMENT 33 | |
| 85 | +#define FAULT_CODE_DEBUG 34 | |
| 86 | +#else | |
| 87 | +#define FAULT_CODE_ALIGNMENT 1 | |
| 88 | +#define FAULT_CODE_DEBUG 2 | |
| 89 | +#endif | |
| 90 | + | |
| 83 | 91 | void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, |
| 84 | 92 | struct pt_regs *), |
| 85 | 93 | int sig, int code, const char *name); |
| @@ -100,7 +108,7 @@ extern void __show_regs(struct pt_regs *); · 14 unmodified lines | ||
| 100 | 108 | extern int __pure cpu_architecture(void); |
| 101 | 109 | extern void cpu_init(void); |
| 102 | 110 | |
| 103 | −void arm_machine_restart(char mode, const char *cmd); | |
| 111 | +void soft_restart(unsigned long); | |
| 104 | 112 | extern void (*arm_pm_restart)(char str, const char *cmd); |
| 105 | 113 | |
| 106 | 114 | #define UDBG_UNDEFINED (1 << 0) |
| @@ -129,6 +129,7 @@ extern void vfp_flush_hwstate(struct thread_info *); · 128 unmodified lines | ||
| 129 | 129 | /* |
| 130 | 130 | * thread information flags: |
| 131 | 131 | * TIF_SYSCALL_TRACE - syscall trace active |
| 132 | + * TIF_SYSCAL_AUDIT - syscall auditing active | |
| 132 | 133 | * TIF_SIGPENDING - signal pending |
| 133 | 134 | * TIF_NEED_RESCHED - rescheduling necessary |
| 134 | 135 | * TIF_NOTIFY_RESUME - callback before returning to user |
| @@ -139,10 +140,10 @@ extern void vfp_flush_hwstate(struct thread_info *); · 4 unmodified lines | ||
| 139 | 140 | #define TIF_NEED_RESCHED 1 |
| 140 | 141 | #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ |
| 141 | 142 | #define TIF_SYSCALL_TRACE 8 |
| 143 | +#define TIF_SYSCALL_AUDIT 9 | |
| 142 | 144 | #define TIF_POLLING_NRFLAG 16 |
| 143 | 145 | #define TIF_USING_IWMMXT 17 |
| 144 | 146 | #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ |
| 145 | −#define TIF_FREEZE 19 | |
| 146 | 147 | #define TIF_RESTORE_SIGMASK 20 |
| 147 | 148 | #define TIF_SECCOMP 21 |
| 148 | 149 | |
| @@ -150,12 +151,15 @@ extern void vfp_flush_hwstate(struct thread_info *); · 1 unmodified line | ||
| 150 | 151 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) |
| 151 | 152 | #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) |
| 152 | 153 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) |
| 154 | +#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) | |
| 153 | 155 | #define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) |
| 154 | 156 | #define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) |
| 155 | −#define _TIF_FREEZE (1 << TIF_FREEZE) | |
| 156 | 157 | #define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) |
| 157 | 158 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) |
| 158 | 159 | |
| 160 | +/* Checks for any syscall work in entry-common.S */ | |
| 161 | +#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT) | |
| 162 | + | |
| 159 | 163 | /* |
| 160 | 164 | * Change these and you break ASM code in entry-common.S |
| 161 | 165 | */ |
| @@ -202,8 +202,18 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, · 201 unmodified lines | ||
| 202 | 202 | tlb_remove_page(tlb, pte); |
| 203 | 203 | } |
| 204 | 204 | |
| 205 | +static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, | |
| 206 | + unsigned long addr) | |
| 207 | +{ | |
| 208 | +#ifdef CONFIG_ARM_LPAE | |
| 209 | + tlb_add_flush(tlb, addr); | |
| 210 | + tlb_remove_page(tlb, virt_to_page(pmdp)); | |
| 211 | +#endif | |
| 212 | +} | |
| 213 | + | |
| 205 | 214 | #define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr) |
| 206 | −#define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) | |
| 215 | +#define pmd_free_tlb(tlb, pmdp, addr) __pmd_free_tlb(tlb, pmdp, addr) | |
| 216 | +#define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp) | |
| 207 | 217 | |
| 208 | 218 | #define tlb_migrate_finish(mm) do { } while (0) |
| 209 | 219 | |
| @@ -3,12 +3,6 @@ · 2 unmodified lines | ||
| 3 | 3 | |
| 4 | 4 | #include <asm-generic/int-ll64.h> |
| 5 | 5 | |
| 6 | −#ifndef __ASSEMBLY__ | |
| 7 | − | |
| 8 | −typedef unsigned short umode_t; | |
| 9 | − | |
| 10 | −#endif /* __ASSEMBLY__ */ | |
| 11 | − | |
| 12 | 6 | /* |
| 13 | 7 | * These aren't exported outside the kernel to avoid name space clashes |
| 14 | 8 | */ |
| @@ -37,8 +37,8 @@ · 36 unmodified lines | ||
| 37 | 37 | #define THUMB(x...) x |
| 38 | 38 | #ifdef __ASSEMBLY__ |
| 39 | 39 | #define W(instr) instr.w |
| 40 | −#endif | |
| 41 | 40 | #define BSYM(sym) sym + 1 |
| 41 | +#endif | |
| 42 | 42 | |
| 43 | 43 | #else /* !CONFIG_THUMB2_KERNEL */ |
| 44 | 44 | |
| @@ -49,8 +49,8 @@ · 4 unmodified lines | ||
| 49 | 49 | #define THUMB(x...) |
| 50 | 50 | #ifdef __ASSEMBLY__ |
| 51 | 51 | #define W(instr) instr |
| 52 | −#endif | |
| 53 | 52 | #define BSYM(sym) sym |
| 53 | +#endif | |
| 54 | 54 | |
| 55 | 55 | #endif /* CONFIG_THUMB2_KERNEL */ |
| 56 | 56 | |
| @@ -427,7 +427,8 @@ · 426 unmodified lines | ||
| 427 | 427 | /* |
| 428 | 428 | * The following syscalls are obsolete and no longer available for EABI. |
| 429 | 429 | */ |
| 430 | −#if defined(__ARM_EABI__) && !defined(__KERNEL__) | |
| 430 | +#if !defined(__KERNEL__) | |
| 431 | +#if defined(__ARM_EABI__) | |
| 431 | 432 | #undef __NR_time |
| 432 | 433 | #undef __NR_umount |
| 433 | 434 | #undef __NR_stime |
| @@ -441,6 +442,7 @@ · 7 unmodified lines | ||
| 441 | 442 | #undef __NR_syscall |
| 442 | 443 | #undef __NR_ipc |
| 443 | 444 | #endif |
| 445 | +#endif | |
| 444 | 446 | |
| 445 | 447 | #ifdef __KERNEL__ |
| 446 | 448 | |
| @@ -13,7 +13,7 @@ CFLAGS_REMOVE_return_address.o = -pg · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | # Object file lists. |
| 15 | 15 | |
| 16 | −obj-y := elf.o entry-armv.o entry-common.o irq.o \ | |
| 16 | +obj-y := elf.o entry-armv.o entry-common.o irq.o opcodes.o \ | |
| 17 | 17 | process.o ptrace.o return_address.o setup.o signal.o \ |
| 18 | 18 | sys_arm.o stacktrace.o time.o traps.o |
| 19 | 19 | |
| @@ -316,21 +316,6 @@ pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev) · 315 unmodified lines | ||
| 316 | 316 | } |
| 317 | 317 | } |
| 318 | 318 | |
| 319 | −static void __devinit | |
| 320 | −pbus_assign_bus_resources(struct pci_bus *bus, struct pci_sys_data *root) | |
| 321 | −{ | |
| 322 | − struct pci_dev *dev = bus->self; | |
| 323 | − int i; | |
| 324 | − | |
| 325 | − if (!dev) { | |
| 326 | − /* | |
| 327 | − * Assign root bus resources. | |
| 328 | − */ | |
| 329 | − for (i = 0; i < 3; i++) | |
| 330 | − bus->resource[i] = root->resource[i]; | |
| 331 | − } | |
| 332 | −} | |
| 333 | − | |
| 334 | 319 | /* |
| 335 | 320 | * pcibios_fixup_bus - Called after each bus is probed, |
| 336 | 321 | * but before its children are examined. |
| @@ -341,8 +326,6 @@ void pcibios_fixup_bus(struct pci_bus *bus) · 4 unmodified lines | ||
| 341 | 326 | struct pci_dev *dev; |
| 342 | 327 | u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK; |
| 343 | 328 | |
| 344 | − pbus_assign_bus_resources(bus, root); | |
| 345 | − | |
| 346 | 329 | /* |
| 347 | 330 | * Walk the devices on this bus, working out what we can |
| 348 | 331 | * and can't support. |
| @@ -508,12 +491,18 @@ static void __init pcibios_init_hw(struct hw_pci *hw) · 159 unmodified lines | ||
| 508 | 491 | sys->busnr = busnr; |
| 509 | 492 | sys->swizzle = hw->swizzle; |
| 510 | 493 | sys->map_irq = hw->map_irq; |
| 511 | − sys->resource[0] = &ioport_resource; | |
| 512 | − sys->resource[1] = &iomem_resource; | |
| 494 | + INIT_LIST_HEAD(&sys->resources); | |
| 513 | 495 | |
| 514 | 496 | ret = hw->setup(nr, sys); |
| 515 | 497 | |
| 516 | 498 | if (ret > 0) { |
| 499 | + if (list_empty(&sys->resources)) { | |
| 500 | + pci_add_resource(&sys->resources, | |
| 501 | + &ioport_resource); | |
| 502 | + pci_add_resource(&sys->resources, | |
| 503 | + &iomem_resource); | |
| 504 | + } | |
| 505 | + | |
| 517 | 506 | sys->bus = hw->scan(nr, sys); |
| 518 | 507 | |
| 519 | 508 | if (!sys->bus) |
| @@ -571,6 +560,13 @@ void __init pci_common_init(struct hw_pci *hw) · 51 unmodified lines | ||
| 571 | 560 | } |
| 572 | 561 | } |
| 573 | 562 | |
| 563 | +#ifndef CONFIG_PCI_HOST_ITE8152 | |
| 564 | +void pcibios_set_master(struct pci_dev *dev) | |
| 565 | +{ | |
| 566 | + /* No special bus mastering setup handling */ | |
| 567 | +} | |
| 568 | +#endif | |
| 569 | + | |
| 574 | 570 | char * __init pcibios_setup(char *str) |
| 575 | 571 | { |
| 576 | 572 | if (!strcmp(str, "debug")) { |
| @@ -36,12 +36,11 @@ · 35 unmodified lines | ||
| 36 | 36 | #ifdef CONFIG_MULTI_IRQ_HANDLER |
| 37 | 37 | ldr r1, =handle_arch_irq |
| 38 | 38 | mov r0, sp |
| 39 | − ldr r1, [r1] | |
| 40 | 39 | adr lr, BSYM(9997f) |
| 41 | − teq r1, #0 | |
| 42 | − movne pc, r1 | |
| 43 | −#endif | |
| 40 | + ldr pc, [r1] | |
| 41 | +#else | |
| 44 | 42 | arch_irq_handler_default |
| 43 | +#endif | |
| 45 | 44 | 9997: |
| 46 | 45 | .endm |
| 47 | 46 | |
| @@ -87,7 +87,7 @@ ENTRY(ret_from_fork) · 86 unmodified lines | ||
| 87 | 87 | get_thread_info tsk |
| 88 | 88 | ldr r1, [tsk, #TI_FLAGS] @ check for syscall tracing |
| 89 | 89 | mov why, #1 |
| 90 | − tst r1, #_TIF_SYSCALL_TRACE @ are we tracing syscalls? | |
| 90 | + tst r1, #_TIF_SYSCALL_WORK @ are we tracing syscalls? | |
| 91 | 91 | beq ret_slow_syscall |
| 92 | 92 | mov r1, sp |
| 93 | 93 | mov r0, #1 @ trace exit [IP = 1] |
| @@ -443,7 +443,7 @@ ENTRY(vector_swi) · 349 unmodified lines | ||
| 443 | 443 | 1: |
| 444 | 444 | #endif |
| 445 | 445 | |
| 446 | − tst r10, #_TIF_SYSCALL_TRACE @ are we tracing syscalls? | |
| 446 | + tst r10, #_TIF_SYSCALL_WORK @ are we tracing syscalls? | |
| 447 | 447 | bne __sys_trace |
| 448 | 448 | |
| 449 | 449 | cmp scno, #NR_syscalls @ check upper syscall limit |
| @@ -39,8 +39,14 @@ · 38 unmodified lines | ||
| 39 | 39 | #error KERNEL_RAM_VADDR must start at 0xXXXX8000 |
| 40 | 40 | #endif |
| 41 | 41 | |
| 42 | +#ifdef CONFIG_ARM_LPAE | |
| 43 | + /* LPAE requires an additional page for the PGD */ | |
| 44 | +#define PG_DIR_SIZE 0x5000 | |
| 45 | +#define PMD_ORDER 3 | |
| 46 | +#else | |
| 42 | 47 | #define PG_DIR_SIZE 0x4000 |
| 43 | 48 | #define PMD_ORDER 2 |
| 49 | +#endif | |
| 44 | 50 | |
| 45 | 51 | .globl swapper_pg_dir |
| 46 | 52 | .equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE |
| @@ -93,6 +99,14 @@ ENTRY(stext) · 46 unmodified lines | ||
| 93 | 99 | THUMB( it eq ) @ force fixup-able long branch encoding |
| 94 | 100 | beq __error_p @ yes, error 'p' |
| 95 | 101 | |
| 102 | +#ifdef CONFIG_ARM_LPAE | |
| 103 | + mrc p15, 0, r3, c0, c1, 4 @ read ID_MMFR0 | |
| 104 | + and r3, r3, #0xf @ extract VMSA support | |
| 105 | + cmp r3, #5 @ long-descriptor translation table format? | |
| 106 | + THUMB( it lo ) @ force fixup-able long branch encoding | |
| 107 | + blo __error_p @ only classic page table format | |
| 108 | +#endif | |
| 109 | + | |
| 96 | 110 | #ifndef CONFIG_XIP_KERNEL |
| 97 | 111 | adr r3, 2f |
| 98 | 112 | ldmia r3, {r4, r8} |
| @@ -164,17 +178,36 @@ __create_page_tables: · 65 unmodified lines | ||
| 164 | 178 | teq r0, r6 |
| 165 | 179 | bne 1b |
| 166 | 180 | |
| 181 | +#ifdef CONFIG_ARM_LPAE | |
| 182 | + /* | |
| 183 | + * Build the PGD table (first level) to point to the PMD table. A PGD | |
| 184 | + * entry is 64-bit wide. | |
| 185 | + */ | |
| 186 | + mov r0, r4 | |
| 187 | + add r3, r4, #0x1000 @ first PMD table address | |
| 188 | + orr r3, r3, #3 @ PGD block type | |
| 189 | + mov r6, #4 @ PTRS_PER_PGD | |
| 190 | + mov r7, #1 << (55 - 32) @ L_PGD_SWAPPER | |
| 191 | +1: str r3, [r0], #4 @ set bottom PGD entry bits | |
| 192 | + str r7, [r0], #4 @ set top PGD entry bits | |
| 193 | + add r3, r3, #0x1000 @ next PMD table | |
| 194 | + subs r6, r6, #1 | |
| 195 | + bne 1b | |
| 196 | + | |
| 197 | + add r4, r4, #0x1000 @ point to the PMD tables | |
| 198 | +#endif | |
| 199 | + | |
| 167 | 200 | ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags |
| 168 | 201 | |
| 169 | 202 | /* |
| 170 | 203 | * Create identity mapping to cater for __enable_mmu. |
| 171 | 204 | * This identity mapping will be removed by paging_init(). |
| 172 | 205 | */ |
| 173 | − adr r0, __enable_mmu_loc | |
| 206 | + adr r0, __turn_mmu_on_loc | |
| 174 | 207 | ldmia r0, {r3, r5, r6} |
| 175 | 208 | sub r0, r0, r3 @ virt->phys offset |
| 176 | − add r5, r5, r0 @ phys __enable_mmu | |
| 177 | − add r6, r6, r0 @ phys __enable_mmu_end | |
| 209 | + add r5, r5, r0 @ phys __turn_mmu_on | |
| 210 | + add r6, r6, r0 @ phys __turn_mmu_on_end | |
| 178 | 211 | mov r5, r5, lsr #SECTION_SHIFT |
| 179 | 212 | mov r6, r6, lsr #SECTION_SHIFT |
| 180 | 213 | |
| @@ -219,8 +252,8 @@ __create_page_tables: · 38 unmodified lines | ||
| 219 | 252 | #endif |
| 220 | 253 | |
| 221 | 254 | /* |
| 222 | − * Then map boot params address in r2 or | |
| 223 | − * the first 1MB of ram if boot params address is not specified. | |
| 255 | + * Then map boot params address in r2 or the first 1MB (2MB with LPAE) | |
| 256 | + * of ram if boot params address is not specified. | |
| 224 | 257 | */ |
| 225 | 258 | mov r0, r2, lsr #SECTION_SHIFT |
| 226 | 259 | movs r0, r0, lsl #SECTION_SHIFT |
| @@ -251,7 +284,15 @@ __create_page_tables: · 24 unmodified lines | ||
| 251 | 284 | mov r3, r7, lsr #SECTION_SHIFT |
| 252 | 285 | ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags |
| 253 | 286 | orr r3, r7, r3, lsl #SECTION_SHIFT |
| 287 | +#ifdef CONFIG_ARM_LPAE | |
| 288 | + mov r7, #1 << (54 - 32) @ XN | |
| 289 | +#else | |
| 290 | + orr r3, r3, #PMD_SECT_XN | |
| 291 | +#endif | |
| 254 | 292 | 1: str r3, [r0], #4 |
| 293 | +#ifdef CONFIG_ARM_LPAE | |
| 294 | + str r7, [r0], #4 | |
| 295 | +#endif | |
| 255 | 296 | add r3, r3, #1 << SECTION_SHIFT |
| 256 | 297 | cmp r0, r6 |
| 257 | 298 | blo 1b |
| @@ -282,15 +323,18 @@ __create_page_tables: · 24 unmodified lines | ||
| 282 | 323 | add r0, r4, #0xd8000000 >> (SECTION_SHIFT - PMD_ORDER) |
| 283 | 324 | str r3, [r0] |
| 284 | 325 | #endif |
| 326 | +#endif | |
| 327 | +#ifdef CONFIG_ARM_LPAE | |
| 328 | + sub r4, r4, #0x1000 @ point to the PGD table | |
| 285 | 329 | #endif |
| 286 | 330 | mov pc, lr |
| 287 | 331 | ENDPROC(__create_page_tables) |
| 288 | 332 | .ltorg |
| 289 | 333 | .align |
| 290 | −__enable_mmu_loc: | |
| 334 | +__turn_mmu_on_loc: | |
| 291 | 335 | .long . |
| 292 | − .long __enable_mmu | |
| 293 | − .long __enable_mmu_end | |
| 336 | + .long __turn_mmu_on | |
| 337 | + .long __turn_mmu_on_end | |
| 294 | 338 | |
| 295 | 339 | #if defined(CONFIG_SMP) |
| 296 | 340 | __CPUINIT |
| @@ -374,12 +418,17 @@ __enable_mmu: · 77 unmodified lines | ||
| 374 | 418 | #ifdef CONFIG_CPU_ICACHE_DISABLE |
| 375 | 419 | bic r0, r0, #CR_I |
| 376 | 420 | #endif |
| 421 | +#ifdef CONFIG_ARM_LPAE | |
| 422 | + mov r5, #0 | |
| 423 | + mcrr p15, 0, r4, r5, c2 @ load TTBR0 | |
| 424 | +#else | |
| 377 | 425 | mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ |
| 378 | 426 | domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ |
| 379 | 427 | domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \ |
| 380 | 428 | domain_val(DOMAIN_IO, DOMAIN_CLIENT)) |
| 381 | 429 | mcr p15, 0, r5, c3, c0, 0 @ load domain access register |
| 382 | 430 | mcr p15, 0, r4, c2, c0, 0 @ load page table pointer |
| 431 | +#endif | |
| 383 | 432 | b __turn_mmu_on |
| 384 | 433 | ENDPROC(__enable_mmu) |
| 385 | 434 | |
| @@ -398,15 +447,19 @@ ENDPROC(__enable_mmu) · 12 unmodified lines | ||
| 398 | 447 | * other registers depend on the function called upon completion |
| 399 | 448 | */ |
| 400 | 449 | .align 5 |
| 401 | −__turn_mmu_on: | |
| 450 | + .pushsection .idmap.text, "ax" | |
| 451 | +ENTRY(__turn_mmu_on) | |
| 402 | 452 | mov r0, r0 |
| 453 | + instr_sync | |
| 403 | 454 | mcr p15, 0, r0, c1, c0, 0 @ write control reg |
| 404 | 455 | mrc p15, 0, r3, c0, c0, 0 @ read id reg |
| 456 | + instr_sync | |
| 405 | 457 | mov r3, r3 |
| 406 | 458 | mov r3, r13 |
| 407 | 459 | mov pc, r3 |
| 408 | −__enable_mmu_end: | |
| 460 | +__turn_mmu_on_end: | |
| 409 | 461 | ENDPROC(__turn_mmu_on) |
| 462 | + .popsection | |
| 410 | 463 | |
| 411 | 464 | |
| 412 | 465 | #ifdef CONFIG_SMP_ON_UP |
| @@ -1016,10 +1016,10 @@ static int __init arch_hw_breakpoint_init(void) · 1015 unmodified lines | ||
| 1016 | 1016 | } |
| 1017 | 1017 | |
| 1018 | 1018 | /* Register debug fault handler. */ |
| 1019 | − hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, | |
| 1020 | − "watchpoint debug exception"); | |
| 1021 | − hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT, | |
| 1022 | − "breakpoint debug exception"); | |
| 1019 | + hook_fault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP, | |
| 1020 | + TRAP_HWBKPT, "watchpoint debug exception"); | |
| 1021 | + hook_ifault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP, | |
| 1022 | + TRAP_HWBKPT, "breakpoint debug exception"); | |
| 1023 | 1023 | |
| 1024 | 1024 | /* Register hotplug notifier. */ |
| 1025 | 1025 | register_cpu_notifier(&dbg_reset_nb); |
| @@ -202,6 +202,8 @@ · 201 unmodified lines | ||
| 202 | 202 | #include <linux/slab.h> |
| 203 | 203 | #include <linux/kprobes.h> |
| 204 | 204 | |
| 205 | +#include <asm/opcodes.h> | |
| 206 | + | |
| 205 | 207 | #include "kprobes.h" |
| 206 | 208 | #include "kprobes-test.h" |
| 207 | 209 | |
| @@ -1050,65 +1052,9 @@ static int test_instance; · 842 unmodified lines | ||
| 1050 | 1052 | |
| 1051 | 1053 | static unsigned long test_check_cc(int cc, unsigned long cpsr) |
| 1052 | 1054 | { |
| 1053 | − unsigned long temp; | |
| 1054 | − | |
| 1055 | − switch (cc) { | |
| 1056 | − case 0x0: /* eq */ | |
| 1057 | − return cpsr & PSR_Z_BIT; | |
| 1058 | − | |
| 1059 | − case 0x1: /* ne */ | |
| 1060 | − return (~cpsr) & PSR_Z_BIT; | |
| 1061 | − | |
| 1062 | − case 0x2: /* cs */ | |
| 1063 | − return cpsr & PSR_C_BIT; | |
| 1064 | − | |
| 1065 | − case 0x3: /* cc */ | |
| 1066 | − return (~cpsr) & PSR_C_BIT; | |
| 1067 | − | |
| 1068 | − case 0x4: /* mi */ | |
| 1069 | − return cpsr & PSR_N_BIT; | |
| 1070 | − | |
| 1071 | − case 0x5: /* pl */ | |
| 1072 | − return (~cpsr) & PSR_N_BIT; | |
| 1073 | − | |
| 1074 | − case 0x6: /* vs */ | |
| 1075 | − return cpsr & PSR_V_BIT; | |
| 1076 | − | |
| 1077 | − case 0x7: /* vc */ | |
| 1078 | − return (~cpsr) & PSR_V_BIT; | |
| 1055 | + int ret = arm_check_condition(cc << 28, cpsr); | |
| 1079 | 1056 | |
| 1080 | − case 0x8: /* hi */ | |
| 1081 | − cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ | |
| 1082 | − return cpsr & PSR_C_BIT; | |
| 1083 | − | |
| 1084 | − case 0x9: /* ls */ | |
| 1085 | − cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */ | |
| 1086 | − return (~cpsr) & PSR_C_BIT; | |
| 1087 | − | |
| 1088 | − case 0xa: /* ge */ | |
| 1089 | − cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | |
| 1090 | − return (~cpsr) & PSR_N_BIT; | |
| 1091 | − | |
| 1092 | − case 0xb: /* lt */ | |
| 1093 | − cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | |
| 1094 | − return cpsr & PSR_N_BIT; | |
| 1095 | − | |
| 1096 | − case 0xc: /* gt */ | |
| 1097 | − temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | |
| 1098 | − temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */ | |
| 1099 | − return (~temp) & PSR_N_BIT; | |
| 1100 | − | |
| 1101 | − case 0xd: /* le */ | |
| 1102 | − temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */ | |
| 1103 | − temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */ | |
| 1104 | − return temp & PSR_N_BIT; | |
| 1105 | − | |
| 1106 | − case 0xe: /* al */ | |
| 1107 | − case 0xf: /* unconditional */ | |
| 1108 | − return true; | |
| 1109 | − } | |
| 1110 | − BUG(); | |
| 1111 | − return false; | |
| 1057 | + return (ret != ARM_OPCODE_CONDTEST_FAIL); | |
| 1112 | 1058 | } |
| 1113 | 1059 | |
| 1114 | 1060 | static int is_last_scenario; |
| @@ -1128,7 +1074,9 @@ static unsigned long test_context_cpsr(int scenario) · 13 unmodified lines | ||
| 1128 | 1074 | |
| 1129 | 1075 | if (!test_case_is_thumb) { |
| 1130 | 1076 | /* Testing ARM code */ |
| 1131 | − probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0; | |
| 1077 | + int cc = current_instruction >> 28; | |
| 1078 | + | |
| 1079 | + probe_should_run = test_check_cc(cc, cpsr) != 0; | |
| 1132 | 1080 | if (scenario == 15) |
| 1133 | 1081 | is_last_scenario = true; |
| 1134 | 1082 | |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | */ |
| 10 | 10 | #include <linux/export.h> |
| 11 | 11 | #include <linux/init.h> |
| 12 | −#include <linux/sysdev.h> | |
| 12 | +#include <linux/device.h> | |
| 13 | 13 | #include <linux/syscore_ops.h> |
| 14 | 14 | #include <linux/string.h> |
| 15 | 15 | |
| @@ -34,8 +34,8 @@ static const struct leds_evt_name evt_names[] = { · 18 unmodified lines | ||
| 34 | 34 | { "red", led_red_on, led_red_off }, |
| 35 | 35 | }; |
| 36 | 36 | |
| 37 | −static ssize_t leds_store(struct sys_device *dev, | |
| 38 | − struct sysdev_attribute *attr, | |
| 37 | +static ssize_t leds_store(struct device *dev, | |
| 38 | + struct device_attribute *attr, | |
| 39 | 39 | const char *buf, size_t size) |
| 40 | 40 | { |
| 41 | 41 | int ret = -EINVAL, len = strcspn(buf, " "); |
| @@ -69,15 +69,16 @@ static ssize_t leds_store(struct sys_device *dev, · 27 unmodified lines | ||
| 69 | 69 | return ret; |
| 70 | 70 | } |
| 71 | 71 | |
| 72 | −static SYSDEV_ATTR(event, 0200, NULL, leds_store); | |
| 72 | +static DEVICE_ATTR(event, 0200, NULL, leds_store); | |
| 73 | 73 | |
| 74 | −static struct sysdev_class leds_sysclass = { | |
| 74 | +static struct bus_type leds_subsys = { | |
| 75 | 75 | .name = "leds", |
| 76 | + .dev_name = "leds", | |
| 76 | 77 | }; |
| 77 | 78 | |
| 78 | −static struct sys_device leds_device = { | |
| 79 | +static struct device leds_device = { | |
| 79 | 80 | .id = 0, |
| 80 | − .cls = &leds_sysclass, | |
| 81 | + .bus = &leds_subsys, | |
| 81 | 82 | }; |
| 82 | 83 | |
| 83 | 84 | static int leds_suspend(void) |
| @@ -105,11 +106,11 @@ static struct syscore_ops leds_syscore_ops = { · 21 unmodified lines | ||
| 105 | 106 | static int __init leds_init(void) |
| 106 | 107 | { |
| 107 | 108 | int ret; |
| 108 | − ret = sysdev_class_register(&leds_sysclass); | |
| 109 | + ret = subsys_system_register(&leds_subsys, NULL); | |
| 109 | 110 | if (ret == 0) |
| 110 | − ret = sysdev_register(&leds_device); | |
| 111 | + ret = device_register(&leds_device); | |
| 111 | 112 | if (ret == 0) |
| 112 | − ret = sysdev_create_file(&leds_device, &attr_event); | |
| 113 | + ret = device_create_file(&leds_device, &dev_attr_event); | |
| 113 | 114 | if (ret == 0) |
| 114 | 115 | register_syscore_ops(&leds_syscore_ops); |
| 115 | 116 | return ret; |
| @@ -12,12 +12,11 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <asm/mmu_context.h> |
| 13 | 13 | #include <asm/cacheflush.h> |
| 14 | 14 | #include <asm/mach-types.h> |
| 15 | +#include <asm/system.h> | |
| 15 | 16 | |
| 16 | 17 | extern const unsigned char relocate_new_kernel[]; |
| 17 | 18 | extern const unsigned int relocate_new_kernel_size; |
| 18 | 19 | |
| 19 | −extern void setup_mm_for_reboot(char mode); | |
| 20 | − | |
| 21 | 20 | extern unsigned long kexec_start_address; |
| 22 | 21 | extern unsigned long kexec_indirection_page; |
| 23 | 22 | extern unsigned long kexec_mach_type; |
| @@ -111,14 +110,6 @@ void machine_kexec(struct kimage *image) · 87 unmodified lines | ||
| 111 | 110 | |
| 112 | 111 | if (kexec_reinit) |
| 113 | 112 | kexec_reinit(); |
| 114 | − local_irq_disable(); | |
| 115 | − local_fiq_disable(); | |
| 116 | − setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/ | |
| 117 | − flush_cache_all(); | |
| 118 | − outer_flush_all(); | |
| 119 | − outer_disable(); | |
| 120 | − cpu_proc_fin(); | |
| 121 | − outer_inv_all(); | |
| 122 | − flush_cache_all(); | |
| 123 | − cpu_reset(reboot_code_buffer_phys); | |
| 113 | + | |
| 114 | + soft_restart(reboot_code_buffer_phys); | |
| 124 | 115 | } |
| @@ -0,0 +1,72 @@ | ||
| 1 | +/* | |
| 2 | + * linux/arch/arm/kernel/opcodes.c | |
| 3 | + * | |
| 4 | + * A32 condition code lookup feature moved from nwfpe/fpopcode.c | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License version 2 as | |
| 8 | + * published by the Free Software Foundation. | |
| 9 | + */ | |
| 10 | + | |
| 11 | +#include <linux/module.h> | |
| 12 | +#include <asm/opcodes.h> | |
| 13 | + | |
| 14 | +#define ARM_OPCODE_CONDITION_UNCOND 0xf | |
| 15 | + | |
| 16 | +/* | |
| 17 | + * condition code lookup table | |
| 18 | + * index into the table is test code: EQ, NE, ... LT, GT, AL, NV | |
| 19 | + * | |
| 20 | + * bit position in short is condition code: NZCV | |
| 21 | + */ | |
| 22 | +static const unsigned short cc_map[16] = { | |
| 23 | + 0xF0F0, /* EQ == Z set */ | |
| 24 | + 0x0F0F, /* NE */ | |
| 25 | + 0xCCCC, /* CS == C set */ | |
| 26 | + 0x3333, /* CC */ | |
| 27 | + 0xFF00, /* MI == N set */ | |
| 28 | + 0x00FF, /* PL */ | |
| 29 | + 0xAAAA, /* VS == V set */ | |
| 30 | + 0x5555, /* VC */ | |
| 31 | + 0x0C0C, /* HI == C set && Z clear */ | |
| 32 | + 0xF3F3, /* LS == C clear || Z set */ | |
| 33 | + 0xAA55, /* GE == (N==V) */ | |
| 34 | + 0x55AA, /* LT == (N!=V) */ | |
| 35 | + 0x0A05, /* GT == (!Z && (N==V)) */ | |
| 36 | + 0xF5FA, /* LE == (Z || (N!=V)) */ | |
| 37 | + 0xFFFF, /* AL always */ | |
| 38 | + 0 /* NV */ | |
| 39 | +}; | |
| 40 | + | |
| 41 | +/* | |
| 42 | + * Returns: | |
| 43 | + * ARM_OPCODE_CONDTEST_FAIL - if condition fails | |
| 44 | + * ARM_OPCODE_CONDTEST_PASS - if condition passes (including AL) | |
| 45 | + * ARM_OPCODE_CONDTEST_UNCOND - if NV condition, or separate unconditional | |
| 46 | + * opcode space from v5 onwards | |
| 47 | + * | |
| 48 | + * Code that tests whether a conditional instruction would pass its condition | |
| 49 | + * check should check that return value == ARM_OPCODE_CONDTEST_PASS. | |
| 50 | + * | |
| 51 | + * Code that tests if a condition means that the instruction would be executed | |
| 52 | + * (regardless of conditional or unconditional) should instead check that the | |
| 53 | + * return value != ARM_OPCODE_CONDTEST_FAIL. | |
| 54 | + */ | |
| 55 | +asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr) | |
| 56 | +{ | |
| 57 | + u32 cc_bits = opcode >> 28; | |
| 58 | + u32 psr_cond = psr >> 28; | |
| 59 | + unsigned int ret; | |
| 60 | + | |
| 61 | + if (cc_bits != ARM_OPCODE_CONDITION_UNCOND) { | |
| 62 | + if ((cc_map[cc_bits] >> (psr_cond)) & 1) | |
| 63 | + ret = ARM_OPCODE_CONDTEST_PASS; | |
| 64 | + else | |
| 65 | + ret = ARM_OPCODE_CONDTEST_FAIL; | |
| 66 | + } else { | |
| 67 | + ret = ARM_OPCODE_CONDTEST_UNCOND; | |
| 68 | + } | |
| 69 | + | |
| 70 | + return ret; | |
| 71 | +} | |
| 72 | +EXPORT_SYMBOL_GPL(arm_check_condition); | |
| @@ -59,8 +59,7 @@ armpmu_get_pmu_id(void) · 58 unmodified lines | ||
| 59 | 59 | } |
| 60 | 60 | EXPORT_SYMBOL_GPL(armpmu_get_pmu_id); |
| 61 | 61 | |
| 62 | −int | |
| 63 | −armpmu_get_max_events(void) | |
| 62 | +int perf_num_counters(void) | |
| 64 | 63 | { |
| 65 | 64 | int max_events = 0; |
| 66 | 65 | |
| @@ -69,12 +68,6 @@ armpmu_get_max_events(void) · 2 unmodified lines | ||
| 69 | 68 | |
| 70 | 69 | return max_events; |
| 71 | 70 | } |
| 72 | −EXPORT_SYMBOL_GPL(armpmu_get_max_events); | |
| 73 | − | |
| 74 | −int perf_num_counters(void) | |
| 75 | −{ | |
| 76 | − return armpmu_get_max_events(); | |
| 77 | −} | |
| 78 | 71 | EXPORT_SYMBOL_GPL(perf_num_counters); |
| 79 | 72 | |
| 80 | 73 | #define HW_OP_UNSUPPORTED 0xFFFF |
| @@ -380,6 +373,8 @@ armpmu_release_hardware(struct arm_pmu *armpmu) · 299 unmodified lines | ||
| 380 | 373 | { |
| 381 | 374 | int i, irq, irqs; |
| 382 | 375 | struct platform_device *pmu_device = armpmu->plat_device; |
| 376 | + struct arm_pmu_platdata *plat = | |
| 377 | + dev_get_platdata(&pmu_device->dev); | |
| 383 | 378 | |
| 384 | 379 | irqs = min(pmu_device->num_resources, num_possible_cpus()); |
| 385 | 380 | |
| @@ -387,8 +382,11 @@ armpmu_release_hardware(struct arm_pmu *armpmu) · 1 unmodified line | ||
| 387 | 382 | if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs)) |
| 388 | 383 | continue; |
| 389 | 384 | irq = platform_get_irq(pmu_device, i); |
| 390 | − if (irq >= 0) | |
| 385 | + if (irq >= 0) { | |
| 386 | + if (plat && plat->disable_irq) | |
| 387 | + plat->disable_irq(irq); | |
| 391 | 388 | free_irq(irq, armpmu); |
| 389 | + } | |
| 392 | 390 | } |
| 393 | 391 | |
| 394 | 392 | release_pmu(armpmu->type); |
| @@ -448,7 +446,8 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu) · 53 unmodified lines | ||
| 448 | 446 | irq); |
| 449 | 447 | armpmu_release_hardware(armpmu); |
| 450 | 448 | return err; |
| 451 | − } | |
| 449 | + } else if (plat && plat->enable_irq) | |
| 450 | + plat->enable_irq(irq); | |
| 452 | 451 | |
| 453 | 452 | cpumask_set_cpu(i, &armpmu->active_irqs); |
| 454 | 453 | } |
| @@ -65,13 +65,15 @@ enum armv6_counters { · 64 unmodified lines | ||
| 65 | 65 | * accesses/misses in hardware. |
| 66 | 66 | */ |
| 67 | 67 | static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = { |
| 68 | − [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES, | |
| 69 | − [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC, | |
| 70 | − [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 71 | − [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 72 | − [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC, | |
| 73 | − [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT, | |
| 74 | − [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 68 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES, | |
| 69 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC, | |
| 70 | + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 71 | + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 72 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC, | |
| 73 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT, | |
| 74 | + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 75 | + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6_PERFCTR_IBUF_STALL, | |
| 76 | + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV6_PERFCTR_LSU_FULL_STALL, | |
| 75 | 77 | }; |
| 76 | 78 | |
| 77 | 79 | static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] |
| @@ -218,13 +220,15 @@ enum armv6mpcore_perf_types { · 140 unmodified lines | ||
| 218 | 220 | * accesses/misses in hardware. |
| 219 | 221 | */ |
| 220 | 222 | static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = { |
| 221 | − [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES, | |
| 222 | − [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC, | |
| 223 | − [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 224 | − [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 225 | − [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC, | |
| 226 | − [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT, | |
| 227 | − [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 223 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES, | |
| 224 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC, | |
| 225 | + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 226 | + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 227 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC, | |
| 228 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT, | |
| 229 | + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 230 | + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV6MPCORE_PERFCTR_IBUF_STALL, | |
| 231 | + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV6MPCORE_PERFCTR_LSU_FULL_STALL, | |
| 228 | 232 | }; |
| 229 | 233 | |
| 230 | 234 | static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] |
| @@ -28,165 +28,87 @@ static struct arm_pmu armv7pmu; · 27 unmodified lines | ||
| 28 | 28 | * they are not available. |
| 29 | 29 | */ |
| 30 | 30 | enum armv7_perf_types { |
| 31 | − ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, | |
| 32 | − ARMV7_PERFCTR_IFETCH_MISS = 0x01, | |
| 33 | − ARMV7_PERFCTR_ITLB_MISS = 0x02, | |
| 34 | − ARMV7_PERFCTR_DCACHE_REFILL = 0x03, /* L1 */ | |
| 35 | − ARMV7_PERFCTR_DCACHE_ACCESS = 0x04, /* L1 */ | |
| 36 | − ARMV7_PERFCTR_DTLB_REFILL = 0x05, | |
| 37 | − ARMV7_PERFCTR_DREAD = 0x06, | |
| 38 | − ARMV7_PERFCTR_DWRITE = 0x07, | |
| 39 | − ARMV7_PERFCTR_INSTR_EXECUTED = 0x08, | |
| 40 | − ARMV7_PERFCTR_EXC_TAKEN = 0x09, | |
| 41 | − ARMV7_PERFCTR_EXC_EXECUTED = 0x0A, | |
| 42 | − ARMV7_PERFCTR_CID_WRITE = 0x0B, | |
| 43 | − /* ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS. | |
| 31 | + ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, | |
| 32 | + ARMV7_PERFCTR_L1_ICACHE_REFILL = 0x01, | |
| 33 | + ARMV7_PERFCTR_ITLB_REFILL = 0x02, | |
| 34 | + ARMV7_PERFCTR_L1_DCACHE_REFILL = 0x03, | |
| 35 | + ARMV7_PERFCTR_L1_DCACHE_ACCESS = 0x04, | |
| 36 | + ARMV7_PERFCTR_DTLB_REFILL = 0x05, | |
| 37 | + ARMV7_PERFCTR_MEM_READ = 0x06, | |
| 38 | + ARMV7_PERFCTR_MEM_WRITE = 0x07, | |
| 39 | + ARMV7_PERFCTR_INSTR_EXECUTED = 0x08, | |
| 40 | + ARMV7_PERFCTR_EXC_TAKEN = 0x09, | |
| 41 | + ARMV7_PERFCTR_EXC_EXECUTED = 0x0A, | |
| 42 | + ARMV7_PERFCTR_CID_WRITE = 0x0B, | |
| 43 | + | |
| 44 | + /* | |
| 45 | + * ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS. | |
| 44 | 46 | * It counts: |
| 45 | − * - all branch instructions, | |
| 47 | + * - all (taken) branch instructions, | |
| 46 | 48 | * - instructions that explicitly write the PC, |
| 47 | 49 | * - exception generating instructions. |
| 48 | 50 | */ |
| 49 | − ARMV7_PERFCTR_PC_WRITE = 0x0C, | |
| 50 | − ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D, | |
| 51 | − ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E, | |
| 52 | − ARMV7_PERFCTR_UNALIGNED_ACCESS = 0x0F, | |
| 51 | + ARMV7_PERFCTR_PC_WRITE = 0x0C, | |
| 52 | + ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D, | |
| 53 | + ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E, | |
| 54 | + ARMV7_PERFCTR_MEM_UNALIGNED_ACCESS = 0x0F, | |
| 55 | + ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10, | |
| 56 | + ARMV7_PERFCTR_CLOCK_CYCLES = 0x11, | |
| 57 | + ARMV7_PERFCTR_PC_BRANCH_PRED = 0x12, | |
| 53 | 58 | |
| 54 | 59 | /* These events are defined by the PMUv2 supplement (ARM DDI 0457A). */ |
| 55 | − ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10, | |
| 56 | − ARMV7_PERFCTR_CLOCK_CYCLES = 0x11, | |
| 57 | − ARMV7_PERFCTR_PC_BRANCH_PRED = 0x12, | |
| 58 | − ARMV7_PERFCTR_MEM_ACCESS = 0x13, | |
| 59 | − ARMV7_PERFCTR_L1_ICACHE_ACCESS = 0x14, | |
| 60 | − ARMV7_PERFCTR_L1_DCACHE_WB = 0x15, | |
| 61 | − ARMV7_PERFCTR_L2_DCACHE_ACCESS = 0x16, | |
| 62 | − ARMV7_PERFCTR_L2_DCACHE_REFILL = 0x17, | |
| 63 | − ARMV7_PERFCTR_L2_DCACHE_WB = 0x18, | |
| 64 | − ARMV7_PERFCTR_BUS_ACCESS = 0x19, | |
| 65 | − ARMV7_PERFCTR_MEMORY_ERROR = 0x1A, | |
| 66 | − ARMV7_PERFCTR_INSTR_SPEC = 0x1B, | |
| 67 | − ARMV7_PERFCTR_TTBR_WRITE = 0x1C, | |
| 68 | − ARMV7_PERFCTR_BUS_CYCLES = 0x1D, | |
| 69 | − | |
| 70 | − ARMV7_PERFCTR_CPU_CYCLES = 0xFF | |
| 60 | + ARMV7_PERFCTR_MEM_ACCESS = 0x13, | |
| 61 | + ARMV7_PERFCTR_L1_ICACHE_ACCESS = 0x14, | |
| 62 | + ARMV7_PERFCTR_L1_DCACHE_WB = 0x15, | |
| 63 | + ARMV7_PERFCTR_L2_CACHE_ACCESS = 0x16, | |
| 64 | + ARMV7_PERFCTR_L2_CACHE_REFILL = 0x17, | |
| 65 | + ARMV7_PERFCTR_L2_CACHE_WB = 0x18, | |
| 66 | + ARMV7_PERFCTR_BUS_ACCESS = 0x19, | |
| 67 | + ARMV7_PERFCTR_MEM_ERROR = 0x1A, | |
| 68 | + ARMV7_PERFCTR_INSTR_SPEC = 0x1B, | |
| 69 | + ARMV7_PERFCTR_TTBR_WRITE = 0x1C, | |
| 70 | + ARMV7_PERFCTR_BUS_CYCLES = 0x1D, | |
| 71 | + | |
| 72 | + ARMV7_PERFCTR_CPU_CYCLES = 0xFF | |
| 71 | 73 | }; |
| 72 | 74 | |
| 73 | 75 | /* ARMv7 Cortex-A8 specific event types */ |
| 74 | 76 | enum armv7_a8_perf_types { |
| 75 | − ARMV7_PERFCTR_WRITE_BUFFER_FULL = 0x40, | |
| 76 | − ARMV7_PERFCTR_L2_STORE_MERGED = 0x41, | |
| 77 | − ARMV7_PERFCTR_L2_STORE_BUFF = 0x42, | |
| 78 | − ARMV7_PERFCTR_L2_ACCESS = 0x43, | |
| 79 | − ARMV7_PERFCTR_L2_CACH_MISS = 0x44, | |
| 80 | − ARMV7_PERFCTR_AXI_READ_CYCLES = 0x45, | |
| 81 | − ARMV7_PERFCTR_AXI_WRITE_CYCLES = 0x46, | |
| 82 | − ARMV7_PERFCTR_MEMORY_REPLAY = 0x47, | |
| 83 | − ARMV7_PERFCTR_UNALIGNED_ACCESS_REPLAY = 0x48, | |
| 84 | − ARMV7_PERFCTR_L1_DATA_MISS = 0x49, | |
| 85 | − ARMV7_PERFCTR_L1_INST_MISS = 0x4A, | |
| 86 | − ARMV7_PERFCTR_L1_DATA_COLORING = 0x4B, | |
| 87 | − ARMV7_PERFCTR_L1_NEON_DATA = 0x4C, | |
| 88 | − ARMV7_PERFCTR_L1_NEON_CACH_DATA = 0x4D, | |
| 89 | − ARMV7_PERFCTR_L2_NEON = 0x4E, | |
| 90 | − ARMV7_PERFCTR_L2_NEON_HIT = 0x4F, | |
| 91 | − ARMV7_PERFCTR_L1_INST = 0x50, | |
| 92 | − ARMV7_PERFCTR_PC_RETURN_MIS_PRED = 0x51, | |
| 93 | − ARMV7_PERFCTR_PC_BRANCH_FAILED = 0x52, | |
| 94 | − ARMV7_PERFCTR_PC_BRANCH_TAKEN = 0x53, | |
| 95 | − ARMV7_PERFCTR_PC_BRANCH_EXECUTED = 0x54, | |
| 96 | − ARMV7_PERFCTR_OP_EXECUTED = 0x55, | |
| 97 | − ARMV7_PERFCTR_CYCLES_INST_STALL = 0x56, | |
| 98 | − ARMV7_PERFCTR_CYCLES_INST = 0x57, | |
| 99 | − ARMV7_PERFCTR_CYCLES_NEON_DATA_STALL = 0x58, | |
| 100 | − ARMV7_PERFCTR_CYCLES_NEON_INST_STALL = 0x59, | |
| 101 | − ARMV7_PERFCTR_NEON_CYCLES = 0x5A, | |
| 102 | − | |
| 103 | − ARMV7_PERFCTR_PMU0_EVENTS = 0x70, | |
| 104 | − ARMV7_PERFCTR_PMU1_EVENTS = 0x71, | |
| 105 | − ARMV7_PERFCTR_PMU_EVENTS = 0x72, | |
| 77 | + ARMV7_A8_PERFCTR_L2_CACHE_ACCESS = 0x43, | |
| 78 | + ARMV7_A8_PERFCTR_L2_CACHE_REFILL = 0x44, | |
| 79 | + ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS = 0x50, | |
| 80 | + ARMV7_A8_PERFCTR_STALL_ISIDE = 0x56, | |
| 106 | 81 | }; |
| 107 | 82 | |
| 108 | 83 | /* ARMv7 Cortex-A9 specific event types */ |
| 109 | 84 | enum armv7_a9_perf_types { |
| 110 | − ARMV7_PERFCTR_JAVA_HW_BYTECODE_EXEC = 0x40, | |
| 111 | − ARMV7_PERFCTR_JAVA_SW_BYTECODE_EXEC = 0x41, | |
| 112 | − ARMV7_PERFCTR_JAZELLE_BRANCH_EXEC = 0x42, | |
| 113 | − | |
| 114 | − ARMV7_PERFCTR_COHERENT_LINE_MISS = 0x50, | |
| 115 | − ARMV7_PERFCTR_COHERENT_LINE_HIT = 0x51, | |
| 116 | − | |
| 117 | − ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES = 0x60, | |
| 118 | − ARMV7_PERFCTR_DCACHE_DEP_STALL_CYCLES = 0x61, | |
| 119 | − ARMV7_PERFCTR_TLB_MISS_DEP_STALL_CYCLES = 0x62, | |
| 120 | − ARMV7_PERFCTR_STREX_EXECUTED_PASSED = 0x63, | |
| 121 | − ARMV7_PERFCTR_STREX_EXECUTED_FAILED = 0x64, | |
| 122 | − ARMV7_PERFCTR_DATA_EVICTION = 0x65, | |
| 123 | − ARMV7_PERFCTR_ISSUE_STAGE_NO_INST = 0x66, | |
| 124 | − ARMV7_PERFCTR_ISSUE_STAGE_EMPTY = 0x67, | |
| 125 | − ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE = 0x68, | |
| 126 | − | |
| 127 | − ARMV7_PERFCTR_PREDICTABLE_FUNCT_RETURNS = 0x6E, | |
| 128 | − | |
| 129 | − ARMV7_PERFCTR_MAIN_UNIT_EXECUTED_INST = 0x70, | |
| 130 | − ARMV7_PERFCTR_SECOND_UNIT_EXECUTED_INST = 0x71, | |
| 131 | − ARMV7_PERFCTR_LD_ST_UNIT_EXECUTED_INST = 0x72, | |
| 132 | − ARMV7_PERFCTR_FP_EXECUTED_INST = 0x73, | |
| 133 | − ARMV7_PERFCTR_NEON_EXECUTED_INST = 0x74, | |
| 134 | − | |
| 135 | − ARMV7_PERFCTR_PLD_FULL_DEP_STALL_CYCLES = 0x80, | |
| 136 | − ARMV7_PERFCTR_DATA_WR_DEP_STALL_CYCLES = 0x81, | |
| 137 | − ARMV7_PERFCTR_ITLB_MISS_DEP_STALL_CYCLES = 0x82, | |
| 138 | − ARMV7_PERFCTR_DTLB_MISS_DEP_STALL_CYCLES = 0x83, | |
| 139 | − ARMV7_PERFCTR_MICRO_ITLB_MISS_DEP_STALL_CYCLES = 0x84, | |
| 140 | − ARMV7_PERFCTR_MICRO_DTLB_MISS_DEP_STALL_CYCLES = 0x85, | |
| 141 | − ARMV7_PERFCTR_DMB_DEP_STALL_CYCLES = 0x86, | |
| 142 | − | |
| 143 | − ARMV7_PERFCTR_INTGR_CLK_ENABLED_CYCLES = 0x8A, | |
| 144 | − ARMV7_PERFCTR_DATA_ENGINE_CLK_EN_CYCLES = 0x8B, | |
| 145 | − | |
| 146 | − ARMV7_PERFCTR_ISB_INST = 0x90, | |
| 147 | − ARMV7_PERFCTR_DSB_INST = 0x91, | |
| 148 | − ARMV7_PERFCTR_DMB_INST = 0x92, | |
| 149 | − ARMV7_PERFCTR_EXT_INTERRUPTS = 0x93, | |
| 150 | − | |
| 151 | − ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_COMPLETED = 0xA0, | |
| 152 | − ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_SKIPPED = 0xA1, | |
| 153 | − ARMV7_PERFCTR_PLE_FIFO_FLUSH = 0xA2, | |
| 154 | − ARMV7_PERFCTR_PLE_RQST_COMPLETED = 0xA3, | |
| 155 | − ARMV7_PERFCTR_PLE_FIFO_OVERFLOW = 0xA4, | |
| 156 | − ARMV7_PERFCTR_PLE_RQST_PROG = 0xA5 | |
| 85 | + ARMV7_A9_PERFCTR_INSTR_CORE_RENAME = 0x68, | |
| 86 | + ARMV7_A9_PERFCTR_STALL_ICACHE = 0x60, | |
| 87 | + ARMV7_A9_PERFCTR_STALL_DISPATCH = 0x66, | |
| 157 | 88 | }; |
| 158 | 89 | |
| 159 | 90 | /* ARMv7 Cortex-A5 specific event types */ |
| 160 | 91 | enum armv7_a5_perf_types { |
| 161 | − ARMV7_PERFCTR_IRQ_TAKEN = 0x86, | |
| 162 | − ARMV7_PERFCTR_FIQ_TAKEN = 0x87, | |
| 163 | − | |
| 164 | − ARMV7_PERFCTR_EXT_MEM_RQST = 0xc0, | |
| 165 | − ARMV7_PERFCTR_NC_EXT_MEM_RQST = 0xc1, | |
| 166 | − ARMV7_PERFCTR_PREFETCH_LINEFILL = 0xc2, | |
| 167 | − ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP = 0xc3, | |
| 168 | − ARMV7_PERFCTR_ENTER_READ_ALLOC = 0xc4, | |
| 169 | − ARMV7_PERFCTR_READ_ALLOC = 0xc5, | |
| 170 | − | |
| 171 | − ARMV7_PERFCTR_STALL_SB_FULL = 0xc9, | |
| 92 | + ARMV7_A5_PERFCTR_PREFETCH_LINEFILL = 0xc2, | |
| 93 | + ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP = 0xc3, | |
| 172 | 94 | }; |
| 173 | 95 | |
| 174 | 96 | /* ARMv7 Cortex-A15 specific event types */ |
| 175 | 97 | enum armv7_a15_perf_types { |
| 176 | − ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS = 0x40, | |
| 177 | − ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS = 0x41, | |
| 178 | − ARMV7_PERFCTR_L1_DCACHE_READ_REFILL = 0x42, | |
| 179 | − ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL = 0x43, | |
| 98 | + ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ = 0x40, | |
| 99 | + ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE = 0x41, | |
| 100 | + ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ = 0x42, | |
| 101 | + ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE = 0x43, | |
| 180 | 102 | |
| 181 | − ARMV7_PERFCTR_L1_DTLB_READ_REFILL = 0x4C, | |
| 182 | − ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL = 0x4D, | |
| 103 | + ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ = 0x4C, | |
| 104 | + ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE = 0x4D, | |
| 183 | 105 | |
| 184 | − ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS = 0x50, | |
| 185 | − ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS = 0x51, | |
| 186 | − ARMV7_PERFCTR_L2_DCACHE_READ_REFILL = 0x52, | |
| 187 | − ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL = 0x53, | |
| 106 | + ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ = 0x50, | |
| 107 | + ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE = 0x51, | |
| 108 | + ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ = 0x52, | |
| 109 | + ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE = 0x53, | |
| 188 | 110 | |
| 189 | − ARMV7_PERFCTR_SPEC_PC_WRITE = 0x76, | |
| 111 | + ARMV7_A15_PERFCTR_PC_WRITE_SPEC = 0x76, | |
| 190 | 112 | }; |
| 191 | 113 | |
| 192 | 114 | /* |
| @@ -197,13 +119,15 @@ enum armv7_a15_perf_types { · 4 unmodified lines | ||
| 197 | 119 | * accesses/misses in hardware. |
| 198 | 120 | */ |
| 199 | 121 | static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = { |
| 200 | − [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 201 | − [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, | |
| 202 | − [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 203 | − [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 204 | − [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, | |
| 205 | − [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 206 | − [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, | |
| 122 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 123 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, | |
| 124 | + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 125 | + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 126 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, | |
| 127 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 128 | + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 129 | + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A8_PERFCTR_STALL_ISIDE, | |
| 130 | + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED, | |
| 207 | 131 | }; |
| 208 | 132 | |
| 209 | 133 | static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] |
| @@ -217,12 +141,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 7 unmodified lines | ||
| 217 | 141 | * combined. |
| 218 | 142 | */ |
| 219 | 143 | [C(OP_READ)] = { |
| 220 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 221 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 144 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 145 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 222 | 146 | }, |
| 223 | 147 | [C(OP_WRITE)] = { |
| 224 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 225 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 148 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 149 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 226 | 150 | }, |
| 227 | 151 | [C(OP_PREFETCH)] = { |
| 228 | 152 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -231,12 +155,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 2 unmodified lines | ||
| 231 | 155 | }, |
| 232 | 156 | [C(L1I)] = { |
| 233 | 157 | [C(OP_READ)] = { |
| 234 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, | |
| 235 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, | |
| 158 | + [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS, | |
| 159 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, | |
| 236 | 160 | }, |
| 237 | 161 | [C(OP_WRITE)] = { |
| 238 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, | |
| 239 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, | |
| 162 | + [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L1_ICACHE_ACCESS, | |
| 163 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, | |
| 240 | 164 | }, |
| 241 | 165 | [C(OP_PREFETCH)] = { |
| 242 | 166 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -245,12 +169,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 2 unmodified lines | ||
| 245 | 169 | }, |
| 246 | 170 | [C(LL)] = { |
| 247 | 171 | [C(OP_READ)] = { |
| 248 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, | |
| 249 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, | |
| 172 | + [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS, | |
| 173 | + [C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL, | |
| 250 | 174 | }, |
| 251 | 175 | [C(OP_WRITE)] = { |
| 252 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, | |
| 253 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, | |
| 176 | + [C(RESULT_ACCESS)] = ARMV7_A8_PERFCTR_L2_CACHE_ACCESS, | |
| 177 | + [C(RESULT_MISS)] = ARMV7_A8_PERFCTR_L2_CACHE_REFILL, | |
| 254 | 178 | }, |
| 255 | 179 | [C(OP_PREFETCH)] = { |
| 256 | 180 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -274,11 +198,11 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 17 unmodified lines | ||
| 274 | 198 | [C(ITLB)] = { |
| 275 | 199 | [C(OP_READ)] = { |
| 276 | 200 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 277 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 201 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, | |
| 278 | 202 | }, |
| 279 | 203 | [C(OP_WRITE)] = { |
| 280 | 204 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 281 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 205 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, | |
| 282 | 206 | }, |
| 283 | 207 | [C(OP_PREFETCH)] = { |
| 284 | 208 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -287,14 +211,12 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 2 unmodified lines | ||
| 287 | 211 | }, |
| 288 | 212 | [C(BPU)] = { |
| 289 | 213 | [C(OP_READ)] = { |
| 290 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, | |
| 291 | − [C(RESULT_MISS)] | |
| 292 | − = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 214 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, | |
| 215 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 293 | 216 | }, |
| 294 | 217 | [C(OP_WRITE)] = { |
| 295 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, | |
| 296 | − [C(RESULT_MISS)] | |
| 297 | − = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 218 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, | |
| 219 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 298 | 220 | }, |
| 299 | 221 | [C(OP_PREFETCH)] = { |
| 300 | 222 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -321,14 +243,15 @@ static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 20 unmodified lines | ||
| 321 | 243 | * Cortex-A9 HW events mapping |
| 322 | 244 | */ |
| 323 | 245 | static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = { |
| 324 | − [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 325 | − [PERF_COUNT_HW_INSTRUCTIONS] = | |
| 326 | − ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE, | |
| 327 | − [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 328 | − [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 329 | − [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, | |
| 330 | − [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 331 | − [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, | |
| 246 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 247 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_A9_PERFCTR_INSTR_CORE_RENAME, | |
| 248 | + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 249 | + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 250 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, | |
| 251 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 252 | + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 253 | + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV7_A9_PERFCTR_STALL_ICACHE, | |
| 254 | + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = ARMV7_A9_PERFCTR_STALL_DISPATCH, | |
| 332 | 255 | }; |
| 333 | 256 | |
| 334 | 257 | static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] |
| @@ -342,12 +265,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 7 unmodified lines | ||
| 342 | 265 | * combined. |
| 343 | 266 | */ |
| 344 | 267 | [C(OP_READ)] = { |
| 345 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 346 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 268 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 269 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 347 | 270 | }, |
| 348 | 271 | [C(OP_WRITE)] = { |
| 349 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 350 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 272 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 273 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 351 | 274 | }, |
| 352 | 275 | [C(OP_PREFETCH)] = { |
| 353 | 276 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -357,11 +280,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 3 unmodified lines | ||
| 357 | 280 | [C(L1I)] = { |
| 358 | 281 | [C(OP_READ)] = { |
| 359 | 282 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 360 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, | |
| 283 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, | |
| 361 | 284 | }, |
| 362 | 285 | [C(OP_WRITE)] = { |
| 363 | 286 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 364 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, | |
| 287 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, | |
| 365 | 288 | }, |
| 366 | 289 | [C(OP_PREFETCH)] = { |
| 367 | 290 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -399,11 +322,11 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 31 unmodified lines | ||
| 399 | 322 | [C(ITLB)] = { |
| 400 | 323 | [C(OP_READ)] = { |
| 401 | 324 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 402 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 325 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, | |
| 403 | 326 | }, |
| 404 | 327 | [C(OP_WRITE)] = { |
| 405 | 328 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 406 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 329 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, | |
| 407 | 330 | }, |
| 408 | 331 | [C(OP_PREFETCH)] = { |
| 409 | 332 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -412,14 +335,12 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 2 unmodified lines | ||
| 412 | 335 | }, |
| 413 | 336 | [C(BPU)] = { |
| 414 | 337 | [C(OP_READ)] = { |
| 415 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, | |
| 416 | − [C(RESULT_MISS)] | |
| 417 | − = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 338 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, | |
| 339 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 418 | 340 | }, |
| 419 | 341 | [C(OP_WRITE)] = { |
| 420 | − [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, | |
| 421 | − [C(RESULT_MISS)] | |
| 422 | − = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 342 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, | |
| 343 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 423 | 344 | }, |
| 424 | 345 | [C(OP_PREFETCH)] = { |
| 425 | 346 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -446,13 +367,15 @@ static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 20 unmodified lines | ||
| 446 | 367 | * Cortex-A5 HW events mapping |
| 447 | 368 | */ |
| 448 | 369 | static const unsigned armv7_a5_perf_map[PERF_COUNT_HW_MAX] = { |
| 449 | − [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 450 | − [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, | |
| 451 | − [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 452 | − [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 453 | − [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, | |
| 454 | − [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 455 | − [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 370 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 371 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, | |
| 372 | + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 373 | + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 374 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, | |
| 375 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 376 | + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 377 | + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED, | |
| 378 | + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED, | |
| 456 | 379 | }; |
| 457 | 380 | |
| 458 | 381 | static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] |
| @@ -460,42 +383,34 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 1 unmodified line | ||
| 460 | 383 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = { |
| 461 | 384 | [C(L1D)] = { |
| 462 | 385 | [C(OP_READ)] = { |
| 463 | − [C(RESULT_ACCESS)] | |
| 464 | − = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 465 | − [C(RESULT_MISS)] | |
| 466 | − = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 386 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 387 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 467 | 388 | }, |
| 468 | 389 | [C(OP_WRITE)] = { |
| 469 | − [C(RESULT_ACCESS)] | |
| 470 | − = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 471 | − [C(RESULT_MISS)] | |
| 472 | − = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 390 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 391 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 473 | 392 | }, |
| 474 | 393 | [C(OP_PREFETCH)] = { |
| 475 | − [C(RESULT_ACCESS)] | |
| 476 | − = ARMV7_PERFCTR_PREFETCH_LINEFILL, | |
| 477 | − [C(RESULT_MISS)] | |
| 478 | − = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP, | |
| 394 | + [C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL, | |
| 395 | + [C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP, | |
| 479 | 396 | }, |
| 480 | 397 | }, |
| 481 | 398 | [C(L1I)] = { |
| 482 | 399 | [C(OP_READ)] = { |
| 483 | 400 | [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, |
| 484 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, | |
| 401 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, | |
| 485 | 402 | }, |
| 486 | 403 | [C(OP_WRITE)] = { |
| 487 | 404 | [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, |
| 488 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, | |
| 405 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, | |
| 489 | 406 | }, |
| 490 | 407 | /* |
| 491 | 408 | * The prefetch counters don't differentiate between the I |
| 492 | 409 | * side and the D side. |
| 493 | 410 | */ |
| 494 | 411 | [C(OP_PREFETCH)] = { |
| 495 | − [C(RESULT_ACCESS)] | |
| 496 | − = ARMV7_PERFCTR_PREFETCH_LINEFILL, | |
| 497 | − [C(RESULT_MISS)] | |
| 498 | − = ARMV7_PERFCTR_PREFETCH_LINEFILL_DROP, | |
| 412 | + [C(RESULT_ACCESS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL, | |
| 413 | + [C(RESULT_MISS)] = ARMV7_A5_PERFCTR_PREFETCH_LINEFILL_DROP, | |
| 499 | 414 | }, |
| 500 | 415 | }, |
| 501 | 416 | [C(LL)] = { |
| @@ -529,11 +444,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 27 unmodified lines | ||
| 529 | 444 | [C(ITLB)] = { |
| 530 | 445 | [C(OP_READ)] = { |
| 531 | 446 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 532 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 447 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, | |
| 533 | 448 | }, |
| 534 | 449 | [C(OP_WRITE)] = { |
| 535 | 450 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 536 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 451 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, | |
| 537 | 452 | }, |
| 538 | 453 | [C(OP_PREFETCH)] = { |
| 539 | 454 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -543,13 +458,11 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 3 unmodified lines | ||
| 543 | 458 | [C(BPU)] = { |
| 544 | 459 | [C(OP_READ)] = { |
| 545 | 460 | [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, |
| 546 | − [C(RESULT_MISS)] | |
| 547 | − = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 461 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 548 | 462 | }, |
| 549 | 463 | [C(OP_WRITE)] = { |
| 550 | 464 | [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, |
| 551 | − [C(RESULT_MISS)] | |
| 552 | − = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 465 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 553 | 466 | }, |
| 554 | 467 | [C(OP_PREFETCH)] = { |
| 555 | 468 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -562,13 +475,15 @@ static const unsigned armv7_a5_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 6 unmodified lines | ||
| 562 | 475 | * Cortex-A15 HW events mapping |
| 563 | 476 | */ |
| 564 | 477 | static const unsigned armv7_a15_perf_map[PERF_COUNT_HW_MAX] = { |
| 565 | − [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 566 | − [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, | |
| 567 | − [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 568 | − [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 569 | − [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_SPEC_PC_WRITE, | |
| 570 | − [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 571 | − [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_BUS_CYCLES, | |
| 478 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 479 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, | |
| 480 | + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_L1_DCACHE_ACCESS, | |
| 481 | + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_L1_DCACHE_REFILL, | |
| 482 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_A15_PERFCTR_PC_WRITE_SPEC, | |
| 483 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 484 | + [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_BUS_CYCLES, | |
| 485 | + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = HW_OP_UNSUPPORTED, | |
| 486 | + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED, | |
| 572 | 487 | }; |
| 573 | 488 | |
| 574 | 489 | static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] |
| @@ -576,16 +491,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 1 unmodified line | ||
| 576 | 491 | [PERF_COUNT_HW_CACHE_RESULT_MAX] = { |
| 577 | 492 | [C(L1D)] = { |
| 578 | 493 | [C(OP_READ)] = { |
| 579 | − [C(RESULT_ACCESS)] | |
| 580 | − = ARMV7_PERFCTR_L1_DCACHE_READ_ACCESS, | |
| 581 | − [C(RESULT_MISS)] | |
| 582 | − = ARMV7_PERFCTR_L1_DCACHE_READ_REFILL, | |
| 494 | + [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_READ, | |
| 495 | + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_READ, | |
| 583 | 496 | }, |
| 584 | 497 | [C(OP_WRITE)] = { |
| 585 | − [C(RESULT_ACCESS)] | |
| 586 | − = ARMV7_PERFCTR_L1_DCACHE_WRITE_ACCESS, | |
| 587 | − [C(RESULT_MISS)] | |
| 588 | − = ARMV7_PERFCTR_L1_DCACHE_WRITE_REFILL, | |
| 498 | + [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L1_DCACHE_ACCESS_WRITE, | |
| 499 | + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L1_DCACHE_REFILL_WRITE, | |
| 589 | 500 | }, |
| 590 | 501 | [C(OP_PREFETCH)] = { |
| 591 | 502 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -601,11 +512,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 9 unmodified lines | ||
| 601 | 512 | */ |
| 602 | 513 | [C(OP_READ)] = { |
| 603 | 514 | [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, |
| 604 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, | |
| 515 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, | |
| 605 | 516 | }, |
| 606 | 517 | [C(OP_WRITE)] = { |
| 607 | 518 | [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_ICACHE_ACCESS, |
| 608 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, | |
| 519 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_ICACHE_REFILL, | |
| 609 | 520 | }, |
| 610 | 521 | [C(OP_PREFETCH)] = { |
| 611 | 522 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -614,16 +525,12 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 2 unmodified lines | ||
| 614 | 525 | }, |
| 615 | 526 | [C(LL)] = { |
| 616 | 527 | [C(OP_READ)] = { |
| 617 | − [C(RESULT_ACCESS)] | |
| 618 | − = ARMV7_PERFCTR_L2_DCACHE_READ_ACCESS, | |
| 619 | − [C(RESULT_MISS)] | |
| 620 | − = ARMV7_PERFCTR_L2_DCACHE_READ_REFILL, | |
| 528 | + [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_READ, | |
| 529 | + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_READ, | |
| 621 | 530 | }, |
| 622 | 531 | [C(OP_WRITE)] = { |
| 623 | − [C(RESULT_ACCESS)] | |
| 624 | − = ARMV7_PERFCTR_L2_DCACHE_WRITE_ACCESS, | |
| 625 | − [C(RESULT_MISS)] | |
| 626 | − = ARMV7_PERFCTR_L2_DCACHE_WRITE_REFILL, | |
| 532 | + [C(RESULT_ACCESS)] = ARMV7_A15_PERFCTR_L2_CACHE_ACCESS_WRITE, | |
| 533 | + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_L2_CACHE_REFILL_WRITE, | |
| 627 | 534 | }, |
| 628 | 535 | [C(OP_PREFETCH)] = { |
| 629 | 536 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -633,13 +540,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 3 unmodified lines | ||
| 633 | 540 | [C(DTLB)] = { |
| 634 | 541 | [C(OP_READ)] = { |
| 635 | 542 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 636 | − [C(RESULT_MISS)] | |
| 637 | − = ARMV7_PERFCTR_L1_DTLB_READ_REFILL, | |
| 543 | + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_READ, | |
| 638 | 544 | }, |
| 639 | 545 | [C(OP_WRITE)] = { |
| 640 | 546 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 641 | − [C(RESULT_MISS)] | |
| 642 | − = ARMV7_PERFCTR_L1_DTLB_WRITE_REFILL, | |
| 547 | + [C(RESULT_MISS)] = ARMV7_A15_PERFCTR_DTLB_REFILL_L1_WRITE, | |
| 643 | 548 | }, |
| 644 | 549 | [C(OP_PREFETCH)] = { |
| 645 | 550 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -649,11 +554,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 3 unmodified lines | ||
| 649 | 554 | [C(ITLB)] = { |
| 650 | 555 | [C(OP_READ)] = { |
| 651 | 556 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 652 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 557 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, | |
| 653 | 558 | }, |
| 654 | 559 | [C(OP_WRITE)] = { |
| 655 | 560 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| 656 | − [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 561 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_REFILL, | |
| 657 | 562 | }, |
| 658 | 563 | [C(OP_PREFETCH)] = { |
| 659 | 564 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -663,13 +568,11 @@ static const unsigned armv7_a15_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] · 3 unmodified lines | ||
| 663 | 568 | [C(BPU)] = { |
| 664 | 569 | [C(OP_READ)] = { |
| 665 | 570 | [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, |
| 666 | − [C(RESULT_MISS)] | |
| 667 | − = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 571 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 668 | 572 | }, |
| 669 | 573 | [C(OP_WRITE)] = { |
| 670 | 574 | [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_BRANCH_PRED, |
| 671 | − [C(RESULT_MISS)] | |
| 672 | − = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 575 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 673 | 576 | }, |
| 674 | 577 | [C(OP_PREFETCH)] = { |
| 675 | 578 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, |
| @@ -48,13 +48,15 @@ enum xscale_counters { · 47 unmodified lines | ||
| 48 | 48 | }; |
| 49 | 49 | |
| 50 | 50 | static const unsigned xscale_perf_map[PERF_COUNT_HW_MAX] = { |
| 51 | − [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT, | |
| 52 | − [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION, | |
| 53 | − [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 54 | − [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 55 | − [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH, | |
| 56 | − [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS, | |
| 57 | − [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 51 | + [PERF_COUNT_HW_CPU_CYCLES] = XSCALE_PERFCTR_CCNT, | |
| 52 | + [PERF_COUNT_HW_INSTRUCTIONS] = XSCALE_PERFCTR_INSTRUCTION, | |
| 53 | + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 54 | + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 55 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = XSCALE_PERFCTR_BRANCH, | |
| 56 | + [PERF_COUNT_HW_BRANCH_MISSES] = XSCALE_PERFCTR_BRANCH_MISS, | |
| 57 | + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 58 | + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = XSCALE_PERFCTR_ICACHE_NO_DELIVER, | |
| 59 | + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = HW_OP_UNSUPPORTED, | |
| 58 | 60 | }; |
| 59 | 61 | |
| 60 | 62 | static const unsigned xscale_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] |
| @@ -57,7 +57,7 @@ static const char *isa_modes[] = { · 56 unmodified lines | ||
| 57 | 57 | "ARM" , "Thumb" , "Jazelle", "ThumbEE" |
| 58 | 58 | }; |
| 59 | 59 | |
| 60 | −extern void setup_mm_for_reboot(char mode); | |
| 60 | +extern void setup_mm_for_reboot(void); | |
| 61 | 61 | |
| 62 | 62 | static volatile int hlt_counter; |
| 63 | 63 | |
| @@ -92,18 +92,24 @@ static int __init hlt_setup(char *__unused) · 28 unmodified lines | ||
| 92 | 92 | __setup("nohlt", nohlt_setup); |
| 93 | 93 | __setup("hlt", hlt_setup); |
| 94 | 94 | |
| 95 | −void arm_machine_restart(char mode, const char *cmd) | |
| 95 | +extern void call_with_stack(void (*fn)(void *), void *arg, void *sp); | |
| 96 | +typedef void (*phys_reset_t)(unsigned long); | |
| 97 | + | |
| 98 | +/* | |
| 99 | + * A temporary stack to use for CPU reset. This is static so that we | |
| 100 | + * don't clobber it with the identity mapping. When running with this | |
| 101 | + * stack, any references to the current task *will not work* so you | |
| 102 | + * should really do as little as possible before jumping to your reset | |
| 103 | + * code. | |
| 104 | + */ | |
| 105 | +static u64 soft_restart_stack[16]; | |
| 106 | + | |
| 107 | +static void __soft_restart(void *addr) | |
| 96 | 108 | { |
| 97 | − /* Disable interrupts first */ | |
| 98 | − local_irq_disable(); | |
| 99 | − local_fiq_disable(); | |
| 109 | + phys_reset_t phys_reset; | |
| 100 | 110 | |
| 101 | − /* | |
| 102 | − * Tell the mm system that we are going to reboot - | |
| 103 | − * we may need it to insert some 1:1 mappings so that | |
| 104 | − * soft boot works. | |
| 105 | − */ | |
| 106 | − setup_mm_for_reboot(mode); | |
| 111 | + /* Take out a flat memory mapping. */ | |
| 112 | + setup_mm_for_reboot(); | |
| 107 | 113 | |
| 108 | 114 | /* Clean and invalidate caches */ |
| 109 | 115 | flush_cache_all(); |
| @@ -114,18 +120,35 @@ void arm_machine_restart(char mode, const char *cmd) · 4 unmodified lines | ||
| 114 | 120 | /* Push out any further dirty data, and ensure cache is empty */ |
| 115 | 121 | flush_cache_all(); |
| 116 | 122 | |
| 117 | − /* | |
| 118 | − * Now call the architecture specific reboot code. | |
| 119 | − */ | |
| 120 | − arch_reset(mode, cmd); | |
| 123 | + /* Switch to the identity mapping. */ | |
| 124 | + phys_reset = (phys_reset_t)(unsigned long)virt_to_phys(cpu_reset); | |
| 125 | + phys_reset((unsigned long)addr); | |
| 121 | 126 | |
| 122 | − /* | |
| 123 | − * Whoops - the architecture was unable to reboot. | |
| 124 | − * Tell the user! | |
| 125 | − */ | |
| 126 | − mdelay(1000); | |
| 127 | − printk("Reboot failed -- System halted\n"); | |
| 128 | − while (1); | |
| 127 | + /* Should never get here. */ | |
| 128 | + BUG(); | |
| 129 | +} | |
| 130 | + | |
| 131 | +void soft_restart(unsigned long addr) | |
| 132 | +{ | |
| 133 | + u64 *stack = soft_restart_stack + ARRAY_SIZE(soft_restart_stack); | |
| 134 | + | |
| 135 | + /* Disable interrupts first */ | |
| 136 | + local_irq_disable(); | |
| 137 | + local_fiq_disable(); | |
| 138 | + | |
| 139 | + /* Disable the L2 if we're the last man standing. */ | |
| 140 | + if (num_online_cpus() == 1) | |
| 141 | + outer_disable(); | |
| 142 | + | |
| 143 | + /* Change to the new stack and continue with the reset. */ | |
| 144 | + call_with_stack(__soft_restart, (void *)addr, (void *)stack); | |
| 145 | + | |
| 146 | + /* Should never get here. */ | |
| 147 | + BUG(); | |
| 148 | +} | |
| 149 | + | |
| 150 | +static void null_restart(char mode, const char *cmd) | |
| 151 | +{ | |
| 129 | 152 | } |
| 130 | 153 | |
| 131 | 154 | /* |
| @@ -134,7 +157,7 @@ void arm_machine_restart(char mode, const char *cmd) · 2 unmodified lines | ||
| 134 | 157 | void (*pm_power_off)(void); |
| 135 | 158 | EXPORT_SYMBOL(pm_power_off); |
| 136 | 159 | |
| 137 | −void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart; | |
| 160 | +void (*arm_pm_restart)(char str, const char *cmd) = null_restart; | |
| 138 | 161 | EXPORT_SYMBOL_GPL(arm_pm_restart); |
| 139 | 162 | |
| 140 | 163 | static void do_nothing(void *unused) |
| @@ -255,7 +278,15 @@ void machine_power_off(void) · 114 unmodified lines | ||
| 255 | 278 | void machine_restart(char *cmd) |
| 256 | 279 | { |
| 257 | 280 | machine_shutdown(); |
| 281 | + | |
| 258 | 282 | arm_pm_restart(reboot_mode, cmd); |
| 283 | + | |
| 284 | + /* Give a grace period for failure to restart of 1s */ | |
| 285 | + mdelay(1000); | |
| 286 | + | |
| 287 | + /* Whoops - the platform was unable to reboot. Tell the user! */ | |
| 288 | + printk("Reboot failed -- System halted\n"); | |
| 289 | + while (1); | |
| 259 | 290 | } |
| 260 | 291 | |
| 261 | 292 | void __show_regs(struct pt_regs *regs) |
| @@ -906,11 +906,6 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) · 905 unmodified lines | ||
| 906 | 906 | { |
| 907 | 907 | unsigned long ip; |
| 908 | 908 | |
| 909 | − if (!test_thread_flag(TIF_SYSCALL_TRACE)) | |
| 910 | − return scno; | |
| 911 | − if (!(current->ptrace & PT_PTRACED)) | |
| 912 | − return scno; | |
| 913 | − | |
| 914 | 909 | /* |
| 915 | 910 | * Save IP. IP is used to denote syscall entry/exit: |
| 916 | 911 | * IP = 0 -> entry, = 1 -> exit |
| @@ -918,6 +913,17 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno) · 1 unmodified line | ||
| 918 | 913 | ip = regs->ARM_ip; |
| 919 | 914 | regs->ARM_ip = why; |
| 920 | 915 | |
| 916 | + if (!ip) | |
| 917 | + audit_syscall_exit(regs); | |
| 918 | + else | |
| 919 | + audit_syscall_entry(AUDIT_ARCH_ARMEB, scno, regs->ARM_r0, | |
| 920 | + regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); | |
| 921 | + | |
| 922 | + if (!test_thread_flag(TIF_SYSCALL_TRACE)) | |
| 923 | + return scno; | |
| 924 | + if (!(current->ptrace & PT_PTRACED)) | |
| 925 | + return scno; | |
| 926 | + | |
| 921 | 927 | current_thread_info()->syscall = scno; |
| 922 | 928 | |
| 923 | 929 | /* the 0x80 provides a way for the tracing parent to distinguish |
| @@ -14,61 +14,153 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | #include <asm/sched_clock.h> |
| 16 | 16 | |
| 17 | +struct clock_data { | |
| 18 | + u64 epoch_ns; | |
| 19 | + u32 epoch_cyc; | |
| 20 | + u32 epoch_cyc_copy; | |
| 21 | + u32 mult; | |
| 22 | + u32 shift; | |
| 23 | +}; | |
| 24 | + | |
| 17 | 25 | static void sched_clock_poll(unsigned long wrap_ticks); |
| 18 | 26 | static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0); |
| 19 | −static void (*sched_clock_update_fn)(void); | |
| 27 | + | |
| 28 | +static struct clock_data cd = { | |
| 29 | + .mult = NSEC_PER_SEC / HZ, | |
| 30 | +}; | |
| 31 | + | |
| 32 | +static u32 __read_mostly sched_clock_mask = 0xffffffff; | |
| 33 | + | |
| 34 | +static u32 notrace jiffy_sched_clock_read(void) | |
| 35 | +{ | |
| 36 | + return (u32)(jiffies - INITIAL_JIFFIES); | |
| 37 | +} | |
| 38 | + | |
| 39 | +static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read; | |
| 40 | + | |
| 41 | +static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift) | |
| 42 | +{ | |
| 43 | + return (cyc * mult) >> shift; | |
| 44 | +} | |
| 45 | + | |
| 46 | +static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask) | |
| 47 | +{ | |
| 48 | + u64 epoch_ns; | |
| 49 | + u32 epoch_cyc; | |
| 50 | + | |
| 51 | + /* | |
| 52 | + * Load the epoch_cyc and epoch_ns atomically. We do this by | |
| 53 | + * ensuring that we always write epoch_cyc, epoch_ns and | |
| 54 | + * epoch_cyc_copy in strict order, and read them in strict order. | |
| 55 | + * If epoch_cyc and epoch_cyc_copy are not equal, then we're in | |
| 56 | + * the middle of an update, and we should repeat the load. | |
| 57 | + */ | |
| 58 | + do { | |
| 59 | + epoch_cyc = cd.epoch_cyc; | |
| 60 | + smp_rmb(); | |
| 61 | + epoch_ns = cd.epoch_ns; | |
| 62 | + smp_rmb(); | |
| 63 | + } while (epoch_cyc != cd.epoch_cyc_copy); | |
| 64 | + | |
| 65 | + return epoch_ns + cyc_to_ns((cyc - epoch_cyc) & mask, cd.mult, cd.shift); | |
| 66 | +} | |
| 67 | + | |
| 68 | +/* | |
| 69 | + * Atomically update the sched_clock epoch. | |
| 70 | + */ | |
| 71 | +static void notrace update_sched_clock(void) | |
| 72 | +{ | |
| 73 | + unsigned long flags; | |
| 74 | + u32 cyc; | |
| 75 | + u64 ns; | |
| 76 | + | |
| 77 | + cyc = read_sched_clock(); | |
| 78 | + ns = cd.epoch_ns + | |
| 79 | + cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask, | |
| 80 | + cd.mult, cd.shift); | |
| 81 | + /* | |
| 82 | + * Write epoch_cyc and epoch_ns in a way that the update is | |
| 83 | + * detectable in cyc_to_fixed_sched_clock(). | |
| 84 | + */ | |
| 85 | + raw_local_irq_save(flags); | |
| 86 | + cd.epoch_cyc = cyc; | |
| 87 | + smp_wmb(); | |
| 88 | + cd.epoch_ns = ns; | |
| 89 | + smp_wmb(); | |
| 90 | + cd.epoch_cyc_copy = cyc; | |
| 91 | + raw_local_irq_restore(flags); | |
| 92 | +} | |
| 20 | 93 | |
| 21 | 94 | static void sched_clock_poll(unsigned long wrap_ticks) |
| 22 | 95 | { |
| 23 | 96 | mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks)); |
| 24 | − sched_clock_update_fn(); | |
| 97 | + update_sched_clock(); | |
| 25 | 98 | } |
| 26 | 99 | |
| 27 | −void __init init_sched_clock(struct clock_data *cd, void (*update)(void), | |
| 28 | − unsigned int clock_bits, unsigned long rate) | |
| 100 | +void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) | |
| 29 | 101 | { |
| 30 | 102 | unsigned long r, w; |
| 31 | 103 | u64 res, wrap; |
| 32 | 104 | char r_unit; |
| 33 | 105 | |
| 34 | − sched_clock_update_fn = update; | |
| 106 | + BUG_ON(bits > 32); | |
| 107 | + WARN_ON(!irqs_disabled()); | |
| 108 | + WARN_ON(read_sched_clock != jiffy_sched_clock_read); | |
| 109 | + read_sched_clock = read; | |
| 110 | + sched_clock_mask = (1 << bits) - 1; | |
| 35 | 111 | |
| 36 | 112 | /* calculate the mult/shift to convert counter ticks to ns. */ |
| 37 | − clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0); | |
| 113 | + clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0); | |
| 38 | 114 | |
| 39 | 115 | r = rate; |
| 40 | 116 | if (r >= 4000000) { |
| 41 | 117 | r /= 1000000; |
| 42 | 118 | r_unit = 'M'; |
| 43 | − } else { | |
| 119 | + } else if (r >= 1000) { | |
| 44 | 120 | r /= 1000; |
| 45 | 121 | r_unit = 'k'; |
| 46 | − } | |
| 122 | + } else | |
| 123 | + r_unit = ' '; | |
| 47 | 124 | |
| 48 | 125 | /* calculate how many ns until we wrap */ |
| 49 | − wrap = cyc_to_ns((1ULL << clock_bits) - 1, cd->mult, cd->shift); | |
| 126 | + wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift); | |
| 50 | 127 | do_div(wrap, NSEC_PER_MSEC); |
| 51 | 128 | w = wrap; |
| 52 | 129 | |
| 53 | 130 | /* calculate the ns resolution of this counter */ |
| 54 | − res = cyc_to_ns(1ULL, cd->mult, cd->shift); | |
| 131 | + res = cyc_to_ns(1ULL, cd.mult, cd.shift); | |
| 55 | 132 | pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n", |
| 56 | − clock_bits, r, r_unit, res, w); | |
| 133 | + bits, r, r_unit, res, w); | |
| 57 | 134 | |
| 58 | 135 | /* |
| 59 | 136 | * Start the timer to keep sched_clock() properly updated and |
| 60 | 137 | * sets the initial epoch. |
| 61 | 138 | */ |
| 62 | 139 | sched_clock_timer.data = msecs_to_jiffies(w - (w / 10)); |
| 63 | − update(); | |
| 140 | + update_sched_clock(); | |
| 64 | 141 | |
| 65 | 142 | /* |
| 66 | 143 | * Ensure that sched_clock() starts off at 0ns |
| 67 | 144 | */ |
| 68 | − cd->epoch_ns = 0; | |
| 145 | + cd.epoch_ns = 0; | |
| 146 | + | |
| 147 | + pr_debug("Registered %pF as sched_clock source\n", read); | |
| 148 | +} | |
| 149 | + | |
| 150 | +unsigned long long notrace sched_clock(void) | |
| 151 | +{ | |
| 152 | + u32 cyc = read_sched_clock(); | |
| 153 | + return cyc_to_sched_clock(cyc, sched_clock_mask); | |
| 69 | 154 | } |
| 70 | 155 | |
| 71 | 156 | void __init sched_clock_postinit(void) |
| 72 | 157 | { |
| 158 | + /* | |
| 159 | + * If no sched_clock function has been provided at that point, | |
| 160 | + * make it the final one one. | |
| 161 | + */ | |
| 162 | + if (read_sched_clock == jiffy_sched_clock_read) | |
| 163 | + setup_sched_clock(jiffy_sched_clock_read, 32, HZ); | |
| 164 | + | |
| 73 | 165 | sched_clock_poll(sched_clock_timer.data); |
| 74 | 166 | } |
| @@ -31,6 +31,7 @@ · 30 unmodified lines | ||
| 31 | 31 | #include <linux/memblock.h> |
| 32 | 32 | #include <linux/bug.h> |
| 33 | 33 | #include <linux/compiler.h> |
| 34 | +#include <linux/sort.h> | |
| 34 | 35 | |
| 35 | 36 | #include <asm/unified.h> |
| 36 | 37 | #include <asm/cpu.h> |
| @@ -891,6 +892,12 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr) · 854 unmodified lines | ||
| 891 | 892 | return mdesc; |
| 892 | 893 | } |
| 893 | 894 | |
| 895 | +static int __init meminfo_cmp(const void *_a, const void *_b) | |
| 896 | +{ | |
| 897 | + const struct membank *a = _a, *b = _b; | |
| 898 | + long cmp = bank_pfn_start(a) - bank_pfn_start(b); | |
| 899 | + return cmp < 0 ? -1 : cmp > 0 ? 1 : 0; | |
| 900 | +} | |
| 894 | 901 | |
| 895 | 902 | void __init setup_arch(char **cmdline_p) |
| 896 | 903 | { |
| @@ -909,8 +916,8 @@ void __init setup_arch(char **cmdline_p) · 12 unmodified lines | ||
| 909 | 916 | arm_dma_zone_size = mdesc->dma_zone_size; |
| 910 | 917 | } |
| 911 | 918 | #endif |
| 912 | − if (mdesc->soft_reboot) | |
| 913 | − reboot_setup("s"); | |
| 919 | + if (mdesc->restart_mode) | |
| 920 | + reboot_setup(&mdesc->restart_mode); | |
| 914 | 921 | |
| 915 | 922 | init_mm.start_code = (unsigned long) _text; |
| 916 | 923 | init_mm.end_code = (unsigned long) _etext; |
| @@ -923,12 +930,16 @@ void __init setup_arch(char **cmdline_p) · 6 unmodified lines | ||
| 923 | 930 | |
| 924 | 931 | parse_early_param(); |
| 925 | 932 | |
| 933 | + sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL); | |
| 926 | 934 | sanity_check_meminfo(); |
| 927 | 935 | arm_memblock_init(&meminfo, mdesc); |
| 928 | 936 | |
| 929 | 937 | paging_init(mdesc); |
| 930 | 938 | request_standard_resources(mdesc); |
| 931 | 939 | |
| 940 | + if (mdesc->restart) | |
| 941 | + arm_pm_restart = mdesc->restart; | |
| 942 | + | |
| 932 | 943 | unflatten_device_tree(); |
| 933 | 944 | |
| 934 | 945 | #ifdef CONFIG_SMP |
| @@ -54,14 +54,18 @@ ENDPROC(cpu_suspend_abort) · 53 unmodified lines | ||
| 54 | 54 | * r0 = control register value |
| 55 | 55 | */ |
| 56 | 56 | .align 5 |
| 57 | + .pushsection .idmap.text,"ax" | |
| 57 | 58 | ENTRY(cpu_resume_mmu) |
| 58 | 59 | ldr r3, =cpu_resume_after_mmu |
| 60 | + instr_sync | |
| 59 | 61 | mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc |
| 60 | 62 | mrc p15, 0, r0, c0, c0, 0 @ read id reg |
| 63 | + instr_sync | |
| 61 | 64 | mov r0, r0 |
| 62 | 65 | mov r0, r0 |
| 63 | 66 | mov pc, r3 @ jump to virtual address |
| 64 | 67 | ENDPROC(cpu_resume_mmu) |
| 68 | + .popsection | |
| 65 | 69 | cpu_resume_after_mmu: |
| 66 | 70 | bl cpu_init @ restore the und/abt/irq banked regs |
| 67 | 71 | mov r0, #0 @ return zero on success |
| @@ -31,6 +31,7 @@ · 30 unmodified lines | ||
| 31 | 31 | #include <asm/cpu.h> |
| 32 | 32 | #include <asm/cputype.h> |
| 33 | 33 | #include <asm/exception.h> |
| 34 | +#include <asm/idmap.h> | |
| 34 | 35 | #include <asm/topology.h> |
| 35 | 36 | #include <asm/mmu_context.h> |
| 36 | 37 | #include <asm/pgtable.h> |
| @@ -61,7 +62,6 @@ int __cpuinit __cpu_up(unsigned int cpu) · 24 unmodified lines | ||
| 61 | 62 | { |
| 62 | 63 | struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); |
| 63 | 64 | struct task_struct *idle = ci->idle; |
| 64 | − pgd_t *pgd; | |
| 65 | 65 | int ret; |
| 66 | 66 | |
| 67 | 67 | /* |
| @@ -83,30 +83,12 @@ int __cpuinit __cpu_up(unsigned int cpu) · 15 unmodified lines | ||
| 83 | 83 | init_idle(idle, cpu); |
| 84 | 84 | } |
| 85 | 85 | |
| 86 | − /* | |
| 87 | − * Allocate initial page tables to allow the new CPU to | |
| 88 | − * enable the MMU safely. This essentially means a set | |
| 89 | − * of our "standard" page tables, with the addition of | |
| 90 | − * a 1:1 mapping for the physical address of the kernel. | |
| 91 | − */ | |
| 92 | − pgd = pgd_alloc(&init_mm); | |
| 93 | − if (!pgd) | |
| 94 | − return -ENOMEM; | |
| 95 | − | |
| 96 | − if (PHYS_OFFSET != PAGE_OFFSET) { | |
| 97 | −#ifndef CONFIG_HOTPLUG_CPU | |
| 98 | − identity_mapping_add(pgd, __pa(__init_begin), __pa(__init_end)); | |
| 99 | −#endif | |
| 100 | − identity_mapping_add(pgd, __pa(_stext), __pa(_etext)); | |
| 101 | − identity_mapping_add(pgd, __pa(_sdata), __pa(_edata)); | |
| 102 | − } | |
| 103 | − | |
| 104 | 86 | /* |
| 105 | 87 | * We need to tell the secondary core where to find |
| 106 | 88 | * its stack and the page tables. |
| 107 | 89 | */ |
| 108 | 90 | secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; |
| 109 | − secondary_data.pgdir = virt_to_phys(pgd); | |
| 91 | + secondary_data.pgdir = virt_to_phys(idmap_pgd); | |
| 110 | 92 | secondary_data.swapper_pg_dir = virt_to_phys(swapper_pg_dir); |
| 111 | 93 | __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); |
| 112 | 94 | outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); |
| @@ -142,16 +124,6 @@ int __cpuinit __cpu_up(unsigned int cpu) · 29 unmodified lines | ||
| 142 | 124 | secondary_data.stack = NULL; |
| 143 | 125 | secondary_data.pgdir = 0; |
| 144 | 126 | |
| 145 | − if (PHYS_OFFSET != PAGE_OFFSET) { | |
| 146 | −#ifndef CONFIG_HOTPLUG_CPU | |
| 147 | − identity_mapping_del(pgd, __pa(__init_begin), __pa(__init_end)); | |
| 148 | −#endif | |
| 149 | − identity_mapping_del(pgd, __pa(_stext), __pa(_etext)); | |
| 150 | − identity_mapping_del(pgd, __pa(_sdata), __pa(_edata)); | |
| 151 | − } | |
| 152 | − | |
| 153 | − pgd_free(&init_mm, pgd); | |
| 154 | − | |
| 155 | 127 | return ret; |
| 156 | 128 | } |
| 157 | 129 | |
| @@ -550,6 +522,10 @@ static void ipi_cpu_stop(unsigned int cpu) · 392 unmodified lines | ||
| 550 | 522 | local_fiq_disable(); |
| 551 | 523 | local_irq_disable(); |
| 552 | 524 | |
| 525 | +#ifdef CONFIG_HOTPLUG_CPU | |
| 526 | + platform_cpu_kill(cpu); | |
| 527 | +#endif | |
| 528 | + | |
| 553 | 529 | while (1) |
| 554 | 530 | cpu_relax(); |
| 555 | 531 | } |
| @@ -10,8 +10,11 @@ · 9 unmodified lines | ||
| 10 | 10 | */ |
| 11 | 11 | #include <linux/init.h> |
| 12 | 12 | #include <linux/kernel.h> |
| 13 | +#include <linux/clk.h> | |
| 14 | +#include <linux/cpufreq.h> | |
| 13 | 15 | #include <linux/delay.h> |
| 14 | 16 | #include <linux/device.h> |
| 17 | +#include <linux/err.h> | |
| 15 | 18 | #include <linux/smp.h> |
| 16 | 19 | #include <linux/jiffies.h> |
| 17 | 20 | #include <linux/clockchips.h> |
| @@ -25,6 +28,7 @@ · 7 unmodified lines | ||
| 25 | 28 | /* set up by the platform code */ |
| 26 | 29 | void __iomem *twd_base; |
| 27 | 30 | |
| 31 | +static struct clk *twd_clk; | |
| 28 | 32 | static unsigned long twd_timer_rate; |
| 29 | 33 | |
| 30 | 34 | static struct clock_event_device __percpu **twd_evt; |
| @@ -89,6 +93,52 @@ void twd_timer_stop(struct clock_event_device *clk) · 58 unmodified lines | ||
| 89 | 93 | disable_percpu_irq(clk->irq); |
| 90 | 94 | } |
| 91 | 95 | |
| 96 | +#ifdef CONFIG_CPU_FREQ | |
| 97 | + | |
| 98 | +/* | |
| 99 | + * Updates clockevent frequency when the cpu frequency changes. | |
| 100 | + * Called on the cpu that is changing frequency with interrupts disabled. | |
| 101 | + */ | |
| 102 | +static void twd_update_frequency(void *data) | |
| 103 | +{ | |
| 104 | + twd_timer_rate = clk_get_rate(twd_clk); | |
| 105 | + | |
| 106 | + clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate); | |
| 107 | +} | |
| 108 | + | |
| 109 | +static int twd_cpufreq_transition(struct notifier_block *nb, | |
| 110 | + unsigned long state, void *data) | |
| 111 | +{ | |
| 112 | + struct cpufreq_freqs *freqs = data; | |
| 113 | + | |
| 114 | + /* | |
| 115 | + * The twd clock events must be reprogrammed to account for the new | |
| 116 | + * frequency. The timer is local to a cpu, so cross-call to the | |
| 117 | + * changing cpu. | |
| 118 | + */ | |
| 119 | + if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE) | |
| 120 | + smp_call_function_single(freqs->cpu, twd_update_frequency, | |
| 121 | + NULL, 1); | |
| 122 | + | |
| 123 | + return NOTIFY_OK; | |
| 124 | +} | |
| 125 | + | |
| 126 | +static struct notifier_block twd_cpufreq_nb = { | |
| 127 | + .notifier_call = twd_cpufreq_transition, | |
| 128 | +}; | |
| 129 | + | |
| 130 | +static int twd_cpufreq_init(void) | |
| 131 | +{ | |
| 132 | + if (!IS_ERR(twd_clk)) | |
| 133 | + return cpufreq_register_notifier(&twd_cpufreq_nb, | |
| 134 | + CPUFREQ_TRANSITION_NOTIFIER); | |
| 135 | + | |
| 136 | + return 0; | |
| 137 | +} | |
| 138 | +core_initcall(twd_cpufreq_init); | |
| 139 | + | |
| 140 | +#endif | |
| 141 | + | |
| 92 | 142 | static void __cpuinit twd_calibrate_rate(void) |
| 93 | 143 | { |
| 94 | 144 | unsigned long count; |
| @@ -140,6 +190,35 @@ static irqreturn_t twd_handler(int irq, void *dev_id) · 45 unmodified lines | ||
| 140 | 190 | return IRQ_NONE; |
| 141 | 191 | } |
| 142 | 192 | |
| 193 | +static struct clk *twd_get_clock(void) | |
| 194 | +{ | |
| 195 | + struct clk *clk; | |
| 196 | + int err; | |
| 197 | + | |
| 198 | + clk = clk_get_sys("smp_twd", NULL); | |
| 199 | + if (IS_ERR(clk)) { | |
| 200 | + pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk)); | |
| 201 | + return clk; | |
| 202 | + } | |
| 203 | + | |
| 204 | + err = clk_prepare(clk); | |
| 205 | + if (err) { | |
| 206 | + pr_err("smp_twd: clock failed to prepare: %d\n", err); | |
| 207 | + clk_put(clk); | |
| 208 | + return ERR_PTR(err); | |
| 209 | + } | |
| 210 | + | |
| 211 | + err = clk_enable(clk); | |
| 212 | + if (err) { | |
| 213 | + pr_err("smp_twd: clock failed to enable: %d\n", err); | |
| 214 | + clk_unprepare(clk); | |
| 215 | + clk_put(clk); | |
| 216 | + return ERR_PTR(err); | |
| 217 | + } | |
| 218 | + | |
| 219 | + return clk; | |
| 220 | +} | |
| 221 | + | |
| 143 | 222 | /* |
| 144 | 223 | * Setup the local clock events for a CPU. |
| 145 | 224 | */ |
| @@ -165,7 +244,13 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) · 19 unmodified lines | ||
| 165 | 244 | } |
| 166 | 245 | } |
| 167 | 246 | |
| 168 | − twd_calibrate_rate(); | |
| 247 | + if (!twd_clk) | |
| 248 | + twd_clk = twd_get_clock(); | |
| 249 | + | |
| 250 | + if (!IS_ERR_OR_NULL(twd_clk)) | |
| 251 | + twd_timer_rate = clk_get_rate(twd_clk); | |
| 252 | + else | |
| 253 | + twd_calibrate_rate(); | |
| 169 | 254 | |
| 170 | 255 | clk->name = "local_timer"; |
| 171 | 256 | clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | |
| @@ -173,15 +258,11 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) · 1 unmodified line | ||
| 173 | 258 | clk->rating = 350; |
| 174 | 259 | clk->set_mode = twd_set_mode; |
| 175 | 260 | clk->set_next_event = twd_set_next_event; |
| 176 | − clk->shift = 20; | |
| 177 | − clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift); | |
| 178 | − clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); | |
| 179 | − clk->min_delta_ns = clockevent_delta2ns(0xf, clk); | |
| 180 | 261 | |
| 181 | 262 | this_cpu_clk = __this_cpu_ptr(twd_evt); |
| 182 | 263 | *this_cpu_clk = clk; |
| 183 | 264 | |
| 184 | − clockevents_register_device(clk); | |
| 185 | − | |
| 265 | + clockevents_config_and_register(clk, twd_timer_rate, | |
| 266 | + 0xf, 0xffffffff); | |
| 186 | 267 | enable_percpu_irq(clk->irq, 0); |
| 187 | 268 | } |
| @@ -1,13 +1,12 @@ | ||
| 1 | 1 | #include <linux/init.h> |
| 2 | 2 | |
| 3 | +#include <asm/idmap.h> | |
| 3 | 4 | #include <asm/pgalloc.h> |
| 4 | 5 | #include <asm/pgtable.h> |
| 5 | 6 | #include <asm/memory.h> |
| 6 | 7 | #include <asm/suspend.h> |
| 7 | 8 | #include <asm/tlbflush.h> |
| 8 | 9 | |
| 9 | −static pgd_t *suspend_pgd; | |
| 10 | − | |
| 11 | 10 | extern int __cpu_suspend(unsigned long, int (*)(unsigned long)); |
| 12 | 11 | extern void cpu_resume_mmu(void); |
| 13 | 12 | |
| @@ -21,7 +20,7 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) · 7 unmodified lines | ||
| 21 | 20 | *save_ptr = virt_to_phys(ptr); |
| 22 | 21 | |
| 23 | 22 | /* This must correspond to the LDM in cpu_resume() assembly */ |
| 24 | − *ptr++ = virt_to_phys(suspend_pgd); | |
| 23 | + *ptr++ = virt_to_phys(idmap_pgd); | |
| 25 | 24 | *ptr++ = sp; |
| 26 | 25 | *ptr++ = virt_to_phys(cpu_do_resume); |
| 27 | 26 | |
| @@ -42,7 +41,7 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) · 14 unmodified lines | ||
| 42 | 41 | struct mm_struct *mm = current->active_mm; |
| 43 | 42 | int ret; |
| 44 | 43 | |
| 45 | − if (!suspend_pgd) | |
| 44 | + if (!idmap_pgd) | |
| 46 | 45 | return -EINVAL; |
| 47 | 46 | |
| 48 | 47 | /* |
| @@ -59,14 +58,3 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) · 10 unmodified lines | ||
| 59 | 58 | |
| 60 | 59 | return ret; |
| 61 | 60 | } |
| 62 | − | |
| 63 | −static int __init cpu_suspend_init(void) | |
| 64 | −{ | |
| 65 | − suspend_pgd = pgd_alloc(&init_mm); | |
| 66 | − if (suspend_pgd) { | |
| 67 | − unsigned long addr = virt_to_phys(cpu_resume_mmu); | |
| 68 | − identity_mapping_add(suspend_pgd, addr, addr + SECTION_SIZE); | |
| 69 | − } | |
| 70 | − return suspend_pgd ? 0 : -ENOMEM; | |
| 71 | −} | |
| 72 | −core_initcall(cpu_suspend_init); | |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include <linux/syscalls.h> |
| 26 | 26 | #include <linux/perf_event.h> |
| 27 | 27 | |
| 28 | +#include <asm/opcodes.h> | |
| 28 | 29 | #include <asm/traps.h> |
| 29 | 30 | #include <asm/uaccess.h> |
| 30 | 31 | |
| @@ -185,6 +186,21 @@ static int swp_handler(struct pt_regs *regs, unsigned int instr) · 154 unmodified lines | ||
| 185 | 186 | |
| 186 | 187 | perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); |
| 187 | 188 | |
| 189 | + res = arm_check_condition(instr, regs->ARM_cpsr); | |
| 190 | + switch (res) { | |
| 191 | + case ARM_OPCODE_CONDTEST_PASS: | |
| 192 | + break; | |
| 193 | + case ARM_OPCODE_CONDTEST_FAIL: | |
| 194 | + /* Condition failed - return to next instruction */ | |
| 195 | + regs->ARM_pc += 4; | |
| 196 | + return 0; | |
| 197 | + case ARM_OPCODE_CONDTEST_UNCOND: | |
| 198 | + /* If unconditional encoding - not a SWP, undef */ | |
| 199 | + return -EFAULT; | |
| 200 | + default: | |
| 201 | + return -EINVAL; | |
| 202 | + } | |
| 203 | + | |
| 188 | 204 | if (current->pid != previous_pid) { |
| 189 | 205 | pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", |
| 190 | 206 | current->comm, (unsigned long)current->pid); |
| @@ -180,9 +180,9 @@ static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, · 179 unmodified lines | ||
| 180 | 180 | */ |
| 181 | 181 | void __init tcm_init(void) |
| 182 | 182 | { |
| 183 | − u32 tcm_status = read_cpuid_tcmstatus(); | |
| 184 | − u8 dtcm_banks = (tcm_status >> 16) & 0x03; | |
| 185 | − u8 itcm_banks = (tcm_status & 0x03); | |
| 183 | + u32 tcm_status; | |
| 184 | + u8 dtcm_banks; | |
| 185 | + u8 itcm_banks; | |
| 186 | 186 | size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data; |
| 187 | 187 | size_t itcm_code_sz = &__eitcm_text - &__sitcm_text; |
| 188 | 188 | char *start; |
| @@ -191,6 +191,22 @@ void __init tcm_init(void) · 2 unmodified lines | ||
| 191 | 191 | int ret; |
| 192 | 192 | int i; |
| 193 | 193 | |
| 194 | + /* | |
| 195 | + * Prior to ARMv5 there is no TCM, and trying to read the status | |
| 196 | + * register will hang the processor. | |
| 197 | + */ | |
| 198 | + if (cpu_architecture() < CPU_ARCH_ARMv5) { | |
| 199 | + if (dtcm_code_sz || itcm_code_sz) | |
| 200 | + pr_info("CPU TCM: %u bytes of DTCM and %u bytes of " | |
| 201 | + "ITCM code compiled in, but no TCM present " | |
| 202 | + "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz); | |
| 203 | + return; | |
| 204 | + } | |
| 205 | + | |
| 206 | + tcm_status = read_cpuid_tcmstatus(); | |
| 207 | + dtcm_banks = (tcm_status >> 16) & 0x03; | |
| 208 | + itcm_banks = (tcm_status & 0x03); | |
| 209 | + | |
| 194 | 210 | /* Values greater than 2 for D/ITCM banks are "reserved" */ |
| 195 | 211 | if (dtcm_banks > 2) |
| 196 | 212 | dtcm_banks = 0; |
| @@ -13,6 +13,12 @@ · 12 unmodified lines | ||
| 13 | 13 | *(.proc.info.init) \ |
| 14 | 14 | VMLINUX_SYMBOL(__proc_info_end) = .; |
| 15 | 15 | |
| 16 | +#define IDMAP_TEXT \ | |
| 17 | + ALIGN_FUNCTION(); \ | |
| 18 | + VMLINUX_SYMBOL(__idmap_text_start) = .; \ | |
| 19 | + *(.idmap.text) \ | |
| 20 | + VMLINUX_SYMBOL(__idmap_text_end) = .; | |
| 21 | + | |
| 16 | 22 | #ifdef CONFIG_HOTPLUG_CPU |
| 17 | 23 | #define ARM_CPU_DISCARD(x) |
| 18 | 24 | #define ARM_CPU_KEEP(x) x |
| @@ -92,6 +98,7 @@ SECTIONS · 73 unmodified lines | ||
| 92 | 98 | SCHED_TEXT |
| 93 | 99 | LOCK_TEXT |
| 94 | 100 | KPROBES_TEXT |
| 101 | + IDMAP_TEXT | |
| 95 | 102 | #ifdef CONFIG_MMU |
| 96 | 103 | *(.fixup) |
| 97 | 104 | #endif |
| @@ -13,7 +13,8 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ · 12 unmodified lines | ||
| 13 | 13 | testchangebit.o testclearbit.o testsetbit.o \ |
| 14 | 14 | ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ |
| 15 | 15 | ucmpdi2.o lib1funcs.o div64.o \ |
| 16 | − io-readsb.o io-writesb.o io-readsl.o io-writesl.o | |
| 16 | + io-readsb.o io-writesb.o io-readsl.o io-writesl.o \ | |
| 17 | + call_with_stack.o | |
| 17 | 18 | |
| 18 | 19 | mmu-y := clear_user.o copy_page.o getuser.o putuser.o |
| 19 | 20 | |
| @@ -0,0 +1,44 @@ | ||
| 1 | +/* | |
| 2 | + * arch/arm/lib/call_with_stack.S | |
| 3 | + * | |
| 4 | + * Copyright (C) 2011 ARM Ltd. | |
| 5 | + * Written by Will Deacon <will.deacon@arm.com> | |
| 6 | + * | |
| 7 | + * This program is free software; you can redistribute it and/or modify | |
| 8 | + * it under the terms of the GNU General Public License version 2 as | |
| 9 | + * published by the Free Software Foundation. | |
| 10 | + * | |
| 11 | + * This program is distributed in the hope that it will be useful, | |
| 12 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | + * GNU General Public License for more details. | |
| 15 | + * | |
| 16 | + * You should have received a copy of the GNU General Public License | |
| 17 | + * along with this program; if not, write to the Free Software | |
| 18 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 19 | + */ | |
| 20 | + | |
| 21 | +#include <linux/linkage.h> | |
| 22 | +#include <asm/assembler.h> | |
| 23 | + | |
| 24 | +/* | |
| 25 | + * void call_with_stack(void (*fn)(void *), void *arg, void *sp) | |
| 26 | + * | |
| 27 | + * Change the stack to that pointed at by sp, then invoke fn(arg) with | |
| 28 | + * the new stack. | |
| 29 | + */ | |
| 30 | +ENTRY(call_with_stack) | |
| 31 | + str sp, [r2, #-4]! | |
| 32 | + str lr, [r2, #-4]! | |
| 33 | + | |
| 34 | + mov sp, r2 | |
| 35 | + mov r2, r0 | |
| 36 | + mov r0, r1 | |
| 37 | + | |
| 38 | + adr lr, BSYM(1f) | |
| 39 | + mov pc, r2 | |
| 40 | + | |
| 41 | +1: ldr lr, [sp] | |
| 42 | + ldr sp, [sp, #4] | |
| 43 | + mov pc, lr | |
| 44 | +ENDPROC(call_with_stack) | |
| @@ -3,6 +3,12 @@ if ARCH_AT91 · 2 unmodified lines | ||
| 3 | 3 | config HAVE_AT91_DATAFLASH_CARD |
| 4 | 4 | bool |
| 5 | 5 | |
| 6 | +config HAVE_AT91_DBGU0 | |
| 7 | + bool | |
| 8 | + | |
| 9 | +config HAVE_AT91_DBGU1 | |
| 10 | + bool | |
| 11 | + | |
| 6 | 12 | config HAVE_AT91_USART3 |
| 7 | 13 | bool |
| 8 | 14 | |
| @@ -21,12 +27,14 @@ config ARCH_AT91RM9200 · 12 unmodified lines | ||
| 21 | 27 | bool "AT91RM9200" |
| 22 | 28 | select CPU_ARM920T |
| 23 | 29 | select GENERIC_CLOCKEVENTS |
| 30 | + select HAVE_AT91_DBGU0 | |
| 24 | 31 | select HAVE_AT91_USART3 |
| 25 | 32 | |
| 26 | 33 | config ARCH_AT91SAM9260 |
| 27 | 34 | bool "AT91SAM9260 or AT91SAM9XE" |
| 28 | 35 | select CPU_ARM926T |
| 29 | 36 | select GENERIC_CLOCKEVENTS |
| 37 | + select HAVE_AT91_DBGU0 | |
| 30 | 38 | select HAVE_AT91_USART3 |
| 31 | 39 | select HAVE_AT91_USART4 |
| 32 | 40 | select HAVE_AT91_USART5 |
| @@ -37,11 +45,13 @@ config ARCH_AT91SAM9261 · 4 unmodified lines | ||
| 37 | 45 | select CPU_ARM926T |
| 38 | 46 | select GENERIC_CLOCKEVENTS |
| 39 | 47 | select HAVE_FB_ATMEL |
| 48 | + select HAVE_AT91_DBGU0 | |
| 40 | 49 | |
| 41 | 50 | config ARCH_AT91SAM9G10 |
| 42 | 51 | bool "AT91SAM9G10" |
| 43 | 52 | select CPU_ARM926T |
| 44 | 53 | select GENERIC_CLOCKEVENTS |
| 54 | + select HAVE_AT91_DBGU0 | |
| 45 | 55 | select HAVE_FB_ATMEL |
| 46 | 56 | |
| 47 | 57 | config ARCH_AT91SAM9263 |
| @@ -50,6 +60,7 @@ config ARCH_AT91SAM9263 · 2 unmodified lines | ||
| 50 | 60 | select GENERIC_CLOCKEVENTS |
| 51 | 61 | select HAVE_FB_ATMEL |
| 52 | 62 | select HAVE_NET_MACB |
| 63 | + select HAVE_AT91_DBGU1 | |
| 53 | 64 | |
| 54 | 65 | config ARCH_AT91SAM9RL |
| 55 | 66 | bool "AT91SAM9RL" |
| @@ -57,11 +68,13 @@ config ARCH_AT91SAM9RL · 1 unmodified line | ||
| 57 | 68 | select GENERIC_CLOCKEVENTS |
| 58 | 69 | select HAVE_AT91_USART3 |
| 59 | 70 | select HAVE_FB_ATMEL |
| 71 | + select HAVE_AT91_DBGU0 | |
| 60 | 72 | |
| 61 | 73 | config ARCH_AT91SAM9G20 |
| 62 | 74 | bool "AT91SAM9G20" |
| 63 | 75 | select CPU_ARM926T |
| 64 | 76 | select GENERIC_CLOCKEVENTS |
| 77 | + select HAVE_AT91_DBGU0 | |
| 65 | 78 | select HAVE_AT91_USART3 |
| 66 | 79 | select HAVE_AT91_USART4 |
| 67 | 80 | select HAVE_AT91_USART5 |
| @@ -74,6 +87,7 @@ config ARCH_AT91SAM9G45 · 6 unmodified lines | ||
| 74 | 87 | select HAVE_AT91_USART3 |
| 75 | 88 | select HAVE_FB_ATMEL |
| 76 | 89 | select HAVE_NET_MACB |
| 90 | + select HAVE_AT91_DBGU1 | |
| 77 | 91 | |
| 78 | 92 | config ARCH_AT91CAP9 |
| 79 | 93 | bool "AT91CAP9" |
| @@ -81,6 +95,7 @@ config ARCH_AT91CAP9 · 1 unmodified line | ||
| 81 | 95 | select GENERIC_CLOCKEVENTS |
| 82 | 96 | select HAVE_FB_ATMEL |
| 83 | 97 | select HAVE_NET_MACB |
| 98 | + select HAVE_AT91_DBGU1 | |
| 84 | 99 | |
| 85 | 100 | config ARCH_AT91X40 |
| 86 | 101 | bool "AT91x40" |
| @@ -510,8 +525,13 @@ config AT91_TIMER_HZ · 423 unmodified lines | ||
| 510 | 525 | choice |
| 511 | 526 | prompt "Select a UART for early kernel messages" |
| 512 | 527 | |
| 513 | −config AT91_EARLY_DBGU | |
| 514 | − bool "DBGU" | |
| 528 | +config AT91_EARLY_DBGU0 | |
| 529 | + bool "DBGU on rm9200, 9260/9g20, 9261/9g10 and 9rl" | |
| 530 | + depends on HAVE_AT91_DBGU0 | |
| 531 | + | |
| 532 | +config AT91_EARLY_DBGU1 | |
| 533 | + bool "DBGU on 9263, 9g45 and cap9" | |
| 534 | + depends on HAVE_AT91_DBGU1 | |
| 515 | 535 | |
| 516 | 536 | config AT91_EARLY_USART0 |
| 517 | 537 | bool "USART0" |
| @@ -13,7 +13,6 @@ · 12 unmodified lines | ||
| 13 | 13 | */ |
| 14 | 14 | |
| 15 | 15 | #include <linux/module.h> |
| 16 | −#include <linux/pm.h> | |
| 17 | 16 | |
| 18 | 17 | #include <asm/irq.h> |
| 19 | 18 | #include <asm/mach/arch.h> |
| @@ -23,11 +22,11 @@ · 3 unmodified lines | ||
| 23 | 22 | #include <mach/at91cap9.h> |
| 24 | 23 | #include <mach/at91_pmc.h> |
| 25 | 24 | #include <mach/at91_rstc.h> |
| 26 | −#include <mach/at91_shdwc.h> | |
| 27 | 25 | |
| 28 | 26 | #include "soc.h" |
| 29 | 27 | #include "generic.h" |
| 30 | 28 | #include "clock.h" |
| 29 | +#include "sam9_smc.h" | |
| 31 | 30 | |
| 32 | 31 | /* -------------------------------------------------------------------- |
| 33 | 32 | * Clocks |
| @@ -137,7 +136,7 @@ static struct clk pwm_clk = { · 103 unmodified lines | ||
| 137 | 136 | .type = CLK_TYPE_PERIPHERAL, |
| 138 | 137 | }; |
| 139 | 138 | static struct clk macb_clk = { |
| 140 | − .name = "macb_clk", | |
| 139 | + .name = "pclk", | |
| 141 | 140 | .pmc_mask = 1 << AT91CAP9_ID_EMAC, |
| 142 | 141 | .type = CLK_TYPE_PERIPHERAL, |
| 143 | 142 | }; |
| @@ -210,6 +209,8 @@ static struct clk *periph_clocks[] __initdata = { · 66 unmodified lines | ||
| 210 | 209 | }; |
| 211 | 210 | |
| 212 | 211 | static struct clk_lookup periph_clocks_lookups[] = { |
| 212 | + /* One additional fake clock for macb_hclk */ | |
| 213 | + CLKDEV_CON_ID("hclk", &macb_clk), | |
| 213 | 214 | CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc", &utmi_clk), |
| 214 | 215 | CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc", &udphs_clk), |
| 215 | 216 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), |
| @@ -221,6 +222,10 @@ static struct clk_lookup periph_clocks_lookups[] = { · 5 unmodified lines | ||
| 221 | 222 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
| 222 | 223 | /* fake hclk clock */ |
| 223 | 224 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
| 225 | + CLKDEV_CON_ID("pioA", &pioABCD_clk), | |
| 226 | + CLKDEV_CON_ID("pioB", &pioABCD_clk), | |
| 227 | + CLKDEV_CON_ID("pioC", &pioABCD_clk), | |
| 228 | + CLKDEV_CON_ID("pioD", &pioABCD_clk), | |
| 224 | 229 | }; |
| 225 | 230 | |
| 226 | 231 | static struct clk_lookup usart_clocks_lookups[] = { |
| @@ -293,37 +298,27 @@ void __init at91cap9_set_console_clock(int id) · 66 unmodified lines | ||
| 293 | 298 | * GPIO |
| 294 | 299 | * -------------------------------------------------------------------- */ |
| 295 | 300 | |
| 296 | −static struct at91_gpio_bank at91cap9_gpio[] = { | |
| 301 | +static struct at91_gpio_bank at91cap9_gpio[] __initdata = { | |
| 297 | 302 | { |
| 298 | 303 | .id = AT91CAP9_ID_PIOABCD, |
| 299 | − .offset = AT91_PIOA, | |
| 300 | − .clock = &pioABCD_clk, | |
| 304 | + .regbase = AT91CAP9_BASE_PIOA, | |
| 301 | 305 | }, { |
| 302 | 306 | .id = AT91CAP9_ID_PIOABCD, |
| 303 | − .offset = AT91_PIOB, | |
| 304 | − .clock = &pioABCD_clk, | |
| 307 | + .regbase = AT91CAP9_BASE_PIOB, | |
| 305 | 308 | }, { |
| 306 | 309 | .id = AT91CAP9_ID_PIOABCD, |
| 307 | − .offset = AT91_PIOC, | |
| 308 | − .clock = &pioABCD_clk, | |
| 310 | + .regbase = AT91CAP9_BASE_PIOC, | |
| 309 | 311 | }, { |
| 310 | 312 | .id = AT91CAP9_ID_PIOABCD, |
| 311 | − .offset = AT91_PIOD, | |
| 312 | − .clock = &pioABCD_clk, | |
| 313 | + .regbase = AT91CAP9_BASE_PIOD, | |
| 313 | 314 | } |
| 314 | 315 | }; |
| 315 | 316 | |
| 316 | −static void at91cap9_reset(void) | |
| 317 | +static void at91cap9_restart(char mode, const char *cmd) | |
| 317 | 318 | { |
| 318 | 319 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
| 319 | 320 | } |
| 320 | 321 | |
| 321 | −static void at91cap9_poweroff(void) | |
| 322 | −{ | |
| 323 | − at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | |
| 324 | −} | |
| 325 | − | |
| 326 | − | |
| 327 | 322 | /* -------------------------------------------------------------------- |
| 328 | 323 | * AT91CAP9 processor initialization |
| 329 | 324 | * -------------------------------------------------------------------- */ |
| @@ -333,10 +328,16 @@ static void __init at91cap9_map_io(void) · 3 unmodified lines | ||
| 333 | 328 | at91_init_sram(0, AT91CAP9_SRAM_BASE, AT91CAP9_SRAM_SIZE); |
| 334 | 329 | } |
| 335 | 330 | |
| 331 | +static void __init at91cap9_ioremap_registers(void) | |
| 332 | +{ | |
| 333 | + at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC); | |
| 334 | + at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT); | |
| 335 | + at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC); | |
| 336 | +} | |
| 337 | + | |
| 336 | 338 | static void __init at91cap9_initialize(void) |
| 337 | 339 | { |
| 338 | − at91_arch_reset = at91cap9_reset; | |
| 339 | − pm_power_off = at91cap9_poweroff; | |
| 340 | + arm_pm_restart = at91cap9_restart; | |
| 340 | 341 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); |
| 341 | 342 | |
| 342 | 343 | /* Register GPIO subsystem */ |
| @@ -394,6 +395,7 @@ static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = { · 51 unmodified lines | ||
| 394 | 395 | struct at91_init_soc __initdata at91cap9_soc = { |
| 395 | 396 | .map_io = at91cap9_map_io, |
| 396 | 397 | .default_irq_priority = at91cap9_default_irq_priority, |
| 398 | + .ioremap_registers = at91cap9_ioremap_registers, | |
| 397 | 399 | .register_clocks = at91cap9_register_clocks, |
| 398 | 400 | .init = at91cap9_initialize, |
| 399 | 401 | }; |
| @@ -76,7 +76,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) · 75 unmodified lines | ||
| 76 | 76 | |
| 77 | 77 | /* Enable VBus control for UHP ports */ |
| 78 | 78 | for (i = 0; i < data->ports; i++) { |
| 79 | − if (data->vbus_pin[i]) | |
| 79 | + if (gpio_is_valid(data->vbus_pin[i])) | |
| 80 | 80 | at91_set_gpio_output(data->vbus_pin[i], 0); |
| 81 | 81 | } |
| 82 | 82 | |
| @@ -179,7 +179,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) · 96 unmodified lines | ||
| 179 | 179 | usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); |
| 180 | 180 | memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep)); |
| 181 | 181 | |
| 182 | − if (data && data->vbus_pin > 0) { | |
| 182 | + if (data && gpio_is_valid(data->vbus_pin)) { | |
| 183 | 183 | at91_set_gpio_input(data->vbus_pin, 0); |
| 184 | 184 | at91_set_deglitch(data->vbus_pin, 1); |
| 185 | 185 | usba_udc_data.pdata.vbus_pin = data->vbus_pin; |
| @@ -200,7 +200,7 @@ void __init at91_add_device_usba(struct usba_platform_data *data) {} · 14 unmodified lines | ||
| 200 | 200 | |
| 201 | 201 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
| 202 | 202 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
| 203 | −static struct at91_eth_data eth_data; | |
| 203 | +static struct macb_platform_data eth_data; | |
| 204 | 204 | |
| 205 | 205 | static struct resource eth_resources[] = { |
| 206 | 206 | [0] = { |
| @@ -227,12 +227,12 @@ static struct platform_device at91cap9_eth_device = { · 20 unmodified lines | ||
| 227 | 227 | .num_resources = ARRAY_SIZE(eth_resources), |
| 228 | 228 | }; |
| 229 | 229 | |
| 230 | −void __init at91_add_device_eth(struct at91_eth_data *data) | |
| 230 | +void __init at91_add_device_eth(struct macb_platform_data *data) | |
| 231 | 231 | { |
| 232 | 232 | if (!data) |
| 233 | 233 | return; |
| 234 | 234 | |
| 235 | − if (data->phy_irq_pin) { | |
| 235 | + if (gpio_is_valid(data->phy_irq_pin)) { | |
| 236 | 236 | at91_set_gpio_input(data->phy_irq_pin, 0); |
| 237 | 237 | at91_set_deglitch(data->phy_irq_pin, 1); |
| 238 | 238 | } |
| @@ -264,7 +264,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) · 25 unmodified lines | ||
| 264 | 264 | platform_device_register(&at91cap9_eth_device); |
| 265 | 265 | } |
| 266 | 266 | #else |
| 267 | −void __init at91_add_device_eth(struct at91_eth_data *data) {} | |
| 267 | +void __init at91_add_device_eth(struct macb_platform_data *data) {} | |
| 268 | 268 | #endif |
| 269 | 269 | |
| 270 | 270 | |
| @@ -332,13 +332,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) · 61 unmodified lines | ||
| 332 | 332 | return; |
| 333 | 333 | |
| 334 | 334 | /* input/irq */ |
| 335 | − if (data->det_pin) { | |
| 335 | + if (gpio_is_valid(data->det_pin)) { | |
| 336 | 336 | at91_set_gpio_input(data->det_pin, 1); |
| 337 | 337 | at91_set_deglitch(data->det_pin, 1); |
| 338 | 338 | } |
| 339 | − if (data->wp_pin) | |
| 339 | + if (gpio_is_valid(data->wp_pin)) | |
| 340 | 340 | at91_set_gpio_input(data->wp_pin, 1); |
| 341 | − if (data->vcc_pin) | |
| 341 | + if (gpio_is_valid(data->vcc_pin)) | |
| 342 | 342 | at91_set_gpio_output(data->vcc_pin, 0); |
| 343 | 343 | |
| 344 | 344 | if (mmc_id == 0) { /* MCI0 */ |
| @@ -398,8 +398,8 @@ static struct resource nand_resources[] = { · 53 unmodified lines | ||
| 398 | 398 | .flags = IORESOURCE_MEM, |
| 399 | 399 | }, |
| 400 | 400 | [1] = { |
| 401 | − .start = AT91_BASE_SYS + AT91_ECC, | |
| 402 | − .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | |
| 401 | + .start = AT91CAP9_BASE_ECC, | |
| 402 | + .end = AT91CAP9_BASE_ECC + SZ_512 - 1, | |
| 403 | 403 | .flags = IORESOURCE_MEM, |
| 404 | 404 | } |
| 405 | 405 | }; |
| @@ -425,15 +425,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) · 19 unmodified lines | ||
| 425 | 425 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); |
| 426 | 426 | |
| 427 | 427 | /* enable pin */ |
| 428 | − if (data->enable_pin) | |
| 428 | + if (gpio_is_valid(data->enable_pin)) | |
| 429 | 429 | at91_set_gpio_output(data->enable_pin, 1); |
| 430 | 430 | |
| 431 | 431 | /* ready/busy pin */ |
| 432 | − if (data->rdy_pin) | |
| 432 | + if (gpio_is_valid(data->rdy_pin)) | |
| 433 | 433 | at91_set_gpio_input(data->rdy_pin, 1); |
| 434 | 434 | |
| 435 | 435 | /* card detect pin */ |
| 436 | − if (data->det_pin) | |
| 436 | + if (gpio_is_valid(data->det_pin)) | |
| 437 | 437 | at91_set_gpio_input(data->det_pin, 1); |
| 438 | 438 | |
| 439 | 439 | nand_data = *data; |
| @@ -670,8 +670,8 @@ static void __init at91_add_device_tc(void) { } · 230 unmodified lines | ||
| 670 | 670 | |
| 671 | 671 | static struct resource rtt_resources[] = { |
| 672 | 672 | { |
| 673 | − .start = AT91_BASE_SYS + AT91_RTT, | |
| 674 | − .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | |
| 673 | + .start = AT91CAP9_BASE_RTT, | |
| 674 | + .end = AT91CAP9_BASE_RTT + SZ_16 - 1, | |
| 675 | 675 | .flags = IORESOURCE_MEM, |
| 676 | 676 | } |
| 677 | 677 | }; |
| @@ -694,10 +694,19 @@ static void __init at91_add_device_rtt(void) · 16 unmodified lines | ||
| 694 | 694 | * -------------------------------------------------------------------- */ |
| 695 | 695 | |
| 696 | 696 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 697 | +static struct resource wdt_resources[] = { | |
| 698 | + { | |
| 699 | + .start = AT91CAP9_BASE_WDT, | |
| 700 | + .end = AT91CAP9_BASE_WDT + SZ_16 - 1, | |
| 701 | + .flags = IORESOURCE_MEM, | |
| 702 | + } | |
| 703 | +}; | |
| 704 | + | |
| 697 | 705 | static struct platform_device at91cap9_wdt_device = { |
| 698 | 706 | .name = "at91_wdt", |
| 699 | 707 | .id = -1, |
| 700 | − .num_resources = 0, | |
| 708 | + .resource = wdt_resources, | |
| 709 | + .num_resources = ARRAY_SIZE(wdt_resources), | |
| 701 | 710 | }; |
| 702 | 711 | |
| 703 | 712 | static void __init at91_add_device_watchdog(void) |
| @@ -807,7 +816,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) · 103 unmodified lines | ||
| 807 | 816 | at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ |
| 808 | 817 | |
| 809 | 818 | /* reset */ |
| 810 | − if (data->reset_pin) | |
| 819 | + if (gpio_is_valid(data->reset_pin)) | |
| 811 | 820 | at91_set_gpio_output(data->reset_pin, 0); |
| 812 | 821 | |
| 813 | 822 | ac97_data = *data; |
| @@ -1021,8 +1030,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} · 207 unmodified lines | ||
| 1021 | 1030 | #if defined(CONFIG_SERIAL_ATMEL) |
| 1022 | 1031 | static struct resource dbgu_resources[] = { |
| 1023 | 1032 | [0] = { |
| 1024 | − .start = AT91_BASE_SYS + AT91_DBGU, | |
| 1025 | − .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | |
| 1033 | + .start = AT91CAP9_BASE_DBGU, | |
| 1034 | + .end = AT91CAP9_BASE_DBGU + SZ_512 - 1, | |
| 1026 | 1035 | .flags = IORESOURCE_MEM, |
| 1027 | 1036 | }, |
| 1028 | 1037 | [1] = { |
| @@ -23,6 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | #include "soc.h" |
| 24 | 24 | #include "generic.h" |
| 25 | 25 | #include "clock.h" |
| 26 | +#include "sam9_smc.h" | |
| 26 | 27 | |
| 27 | 28 | static struct map_desc at91rm9200_io_desc[] __initdata = { |
| 28 | 29 | { |
| @@ -195,6 +196,10 @@ static struct clk_lookup periph_clocks_lookups[] = { · 166 unmodified lines | ||
| 195 | 196 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
| 196 | 197 | /* fake hclk clock */ |
| 197 | 198 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
| 199 | + CLKDEV_CON_ID("pioA", &pioA_clk), | |
| 200 | + CLKDEV_CON_ID("pioB", &pioB_clk), | |
| 201 | + CLKDEV_CON_ID("pioC", &pioC_clk), | |
| 202 | + CLKDEV_CON_ID("pioD", &pioD_clk), | |
| 198 | 203 | }; |
| 199 | 204 | |
| 200 | 205 | static struct clk_lookup usart_clocks_lookups[] = { |
| @@ -268,27 +273,23 @@ void __init at91rm9200_set_console_clock(int id) · 67 unmodified lines | ||
| 268 | 273 | * GPIO |
| 269 | 274 | * -------------------------------------------------------------------- */ |
| 270 | 275 | |
| 271 | −static struct at91_gpio_bank at91rm9200_gpio[] = { | |
| 276 | +static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { | |
| 272 | 277 | { |
| 273 | 278 | .id = AT91RM9200_ID_PIOA, |
| 274 | − .offset = AT91_PIOA, | |
| 275 | − .clock = &pioA_clk, | |
| 279 | + .regbase = AT91RM9200_BASE_PIOA, | |
| 276 | 280 | }, { |
| 277 | 281 | .id = AT91RM9200_ID_PIOB, |
| 278 | − .offset = AT91_PIOB, | |
| 279 | − .clock = &pioB_clk, | |
| 282 | + .regbase = AT91RM9200_BASE_PIOB, | |
| 280 | 283 | }, { |
| 281 | 284 | .id = AT91RM9200_ID_PIOC, |
| 282 | − .offset = AT91_PIOC, | |
| 283 | − .clock = &pioC_clk, | |
| 285 | + .regbase = AT91RM9200_BASE_PIOC, | |
| 284 | 286 | }, { |
| 285 | 287 | .id = AT91RM9200_ID_PIOD, |
| 286 | − .offset = AT91_PIOD, | |
| 287 | − .clock = &pioD_clk, | |
| 288 | + .regbase = AT91RM9200_BASE_PIOD, | |
| 288 | 289 | } |
| 289 | 290 | }; |
| 290 | 291 | |
| 291 | −static void at91rm9200_reset(void) | |
| 292 | +static void at91rm9200_restart(char mode, const char *cmd) | |
| 292 | 293 | { |
| 293 | 294 | /* |
| 294 | 295 | * Perform a hardware reset with the use of the Watchdog timer. |
| @@ -307,9 +308,13 @@ static void __init at91rm9200_map_io(void) · 12 unmodified lines | ||
| 307 | 308 | iotable_init(at91rm9200_io_desc, ARRAY_SIZE(at91rm9200_io_desc)); |
| 308 | 309 | } |
| 309 | 310 | |
| 311 | +static void __init at91rm9200_ioremap_registers(void) | |
| 312 | +{ | |
| 313 | +} | |
| 314 | + | |
| 310 | 315 | static void __init at91rm9200_initialize(void) |
| 311 | 316 | { |
| 312 | − at91_arch_reset = at91rm9200_reset; | |
| 317 | + arm_pm_restart = at91rm9200_restart; | |
| 313 | 318 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) |
| 314 | 319 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) |
| 315 | 320 | | (1 << AT91RM9200_ID_IRQ4) | (1 << AT91RM9200_ID_IRQ5) |
| @@ -366,6 +371,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { · 50 unmodified lines | ||
| 366 | 371 | struct at91_init_soc __initdata at91rm9200_soc = { |
| 367 | 372 | .map_io = at91rm9200_map_io, |
| 368 | 373 | .default_irq_priority = at91rm9200_default_irq_priority, |
| 374 | + .ioremap_registers = at91rm9200_ioremap_registers, | |
| 369 | 375 | .register_clocks = at91rm9200_register_clocks, |
| 370 | 376 | .init = at91rm9200_initialize, |
| 371 | 377 | }; |
| @@ -114,11 +114,11 @@ void __init at91_add_device_udc(struct at91_udc_data *data) · 113 unmodified lines | ||
| 114 | 114 | if (!data) |
| 115 | 115 | return; |
| 116 | 116 | |
| 117 | − if (data->vbus_pin) { | |
| 117 | + if (gpio_is_valid(data->vbus_pin)) { | |
| 118 | 118 | at91_set_gpio_input(data->vbus_pin, 0); |
| 119 | 119 | at91_set_deglitch(data->vbus_pin, 1); |
| 120 | 120 | } |
| 121 | − if (data->pullup_pin) | |
| 121 | + if (gpio_is_valid(data->pullup_pin)) | |
| 122 | 122 | at91_set_gpio_output(data->pullup_pin, 0); |
| 123 | 123 | |
| 124 | 124 | udc_data = *data; |
| @@ -135,7 +135,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} · 10 unmodified lines | ||
| 135 | 135 | |
| 136 | 136 | #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) |
| 137 | 137 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
| 138 | −static struct at91_eth_data eth_data; | |
| 138 | +static struct macb_platform_data eth_data; | |
| 139 | 139 | |
| 140 | 140 | static struct resource eth_resources[] = { |
| 141 | 141 | [0] = { |
| @@ -162,12 +162,12 @@ static struct platform_device at91rm9200_eth_device = { · 20 unmodified lines | ||
| 162 | 162 | .num_resources = ARRAY_SIZE(eth_resources), |
| 163 | 163 | }; |
| 164 | 164 | |
| 165 | −void __init at91_add_device_eth(struct at91_eth_data *data) | |
| 165 | +void __init at91_add_device_eth(struct macb_platform_data *data) | |
| 166 | 166 | { |
| 167 | 167 | if (!data) |
| 168 | 168 | return; |
| 169 | 169 | |
| 170 | − if (data->phy_irq_pin) { | |
| 170 | + if (gpio_is_valid(data->phy_irq_pin)) { | |
| 171 | 171 | at91_set_gpio_input(data->phy_irq_pin, 0); |
| 172 | 172 | at91_set_deglitch(data->phy_irq_pin, 1); |
| 173 | 173 | } |
| @@ -199,7 +199,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) · 25 unmodified lines | ||
| 199 | 199 | platform_device_register(&at91rm9200_eth_device); |
| 200 | 200 | } |
| 201 | 201 | #else |
| 202 | −void __init at91_add_device_eth(struct at91_eth_data *data) {} | |
| 202 | +void __init at91_add_device_eth(struct macb_platform_data *data) {} | |
| 203 | 203 | #endif |
| 204 | 204 | |
| 205 | 205 | |
| @@ -260,7 +260,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) · 54 unmodified lines | ||
| 260 | 260 | ); |
| 261 | 261 | |
| 262 | 262 | /* input/irq */ |
| 263 | − if (data->irq_pin) { | |
| 263 | + if (gpio_is_valid(data->irq_pin)) { | |
| 264 | 264 | at91_set_gpio_input(data->irq_pin, 1); |
| 265 | 265 | at91_set_deglitch(data->irq_pin, 1); |
| 266 | 266 | } |
| @@ -268,7 +268,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) · 1 unmodified line | ||
| 268 | 268 | at91_set_deglitch(data->det_pin, 1); |
| 269 | 269 | |
| 270 | 270 | /* outputs, initially off */ |
| 271 | − if (data->vcc_pin) | |
| 271 | + if (gpio_is_valid(data->vcc_pin)) | |
| 272 | 272 | at91_set_gpio_output(data->vcc_pin, 0); |
| 273 | 273 | at91_set_gpio_output(data->rst_pin, 0); |
| 274 | 274 | |
| @@ -328,13 +328,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) · 53 unmodified lines | ||
| 328 | 328 | return; |
| 329 | 329 | |
| 330 | 330 | /* input/irq */ |
| 331 | − if (data->det_pin) { | |
| 331 | + if (gpio_is_valid(data->det_pin)) { | |
| 332 | 332 | at91_set_gpio_input(data->det_pin, 1); |
| 333 | 333 | at91_set_deglitch(data->det_pin, 1); |
| 334 | 334 | } |
| 335 | − if (data->wp_pin) | |
| 335 | + if (gpio_is_valid(data->wp_pin)) | |
| 336 | 336 | at91_set_gpio_input(data->wp_pin, 1); |
| 337 | − if (data->vcc_pin) | |
| 337 | + if (gpio_is_valid(data->vcc_pin)) | |
| 338 | 338 | at91_set_gpio_output(data->vcc_pin, 0); |
| 339 | 339 | |
| 340 | 340 | /* CLK */ |
| @@ -419,15 +419,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) · 78 unmodified lines | ||
| 419 | 419 | ); |
| 420 | 420 | |
| 421 | 421 | /* enable pin */ |
| 422 | − if (data->enable_pin) | |
| 422 | + if (gpio_is_valid(data->enable_pin)) | |
| 423 | 423 | at91_set_gpio_output(data->enable_pin, 1); |
| 424 | 424 | |
| 425 | 425 | /* ready/busy pin */ |
| 426 | − if (data->rdy_pin) | |
| 426 | + if (gpio_is_valid(data->rdy_pin)) | |
| 427 | 427 | at91_set_gpio_input(data->rdy_pin, 1); |
| 428 | 428 | |
| 429 | 429 | /* card detect pin */ |
| 430 | − if (data->det_pin) | |
| 430 | + if (gpio_is_valid(data->det_pin)) | |
| 431 | 431 | at91_set_gpio_input(data->det_pin, 1); |
| 432 | 432 | |
| 433 | 433 | at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */ |
| @@ -665,10 +665,24 @@ static void __init at91_add_device_tc(void) { } · 231 unmodified lines | ||
| 665 | 665 | * -------------------------------------------------------------------- */ |
| 666 | 666 | |
| 667 | 667 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) |
| 668 | +static struct resource rtc_resources[] = { | |
| 669 | + [0] = { | |
| 670 | + .start = AT91RM9200_BASE_RTC, | |
| 671 | + .end = AT91RM9200_BASE_RTC + SZ_256 - 1, | |
| 672 | + .flags = IORESOURCE_MEM, | |
| 673 | + }, | |
| 674 | + [1] = { | |
| 675 | + .start = AT91_ID_SYS, | |
| 676 | + .end = AT91_ID_SYS, | |
| 677 | + .flags = IORESOURCE_IRQ, | |
| 678 | + }, | |
| 679 | +}; | |
| 680 | + | |
| 668 | 681 | static struct platform_device at91rm9200_rtc_device = { |
| 669 | 682 | .name = "at91_rtc", |
| 670 | 683 | .id = -1, |
| 671 | − .num_resources = 0, | |
| 684 | + .resource = rtc_resources, | |
| 685 | + .num_resources = ARRAY_SIZE(rtc_resources), | |
| 672 | 686 | }; |
| 673 | 687 | |
| 674 | 688 | static void __init at91_add_device_rtc(void) |
| @@ -877,8 +891,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} · 202 unmodified lines | ||
| 877 | 891 | #if defined(CONFIG_SERIAL_ATMEL) |
| 878 | 892 | static struct resource dbgu_resources[] = { |
| 879 | 893 | [0] = { |
| 880 | − .start = AT91_BASE_SYS + AT91_DBGU, | |
| 881 | − .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | |
| 894 | + .start = AT91RM9200_BASE_DBGU, | |
| 895 | + .end = AT91RM9200_BASE_DBGU + SZ_512 - 1, | |
| 882 | 896 | .flags = IORESOURCE_MEM, |
| 883 | 897 | }, |
| 884 | 898 | [1] = { |
| @@ -32,6 +32,8 @@ static unsigned long last_crtr; · 31 unmodified lines | ||
| 32 | 32 | static u32 irqmask; |
| 33 | 33 | static struct clock_event_device clkevt; |
| 34 | 34 | |
| 35 | +#define RM9200_TIMER_LATCH ((AT91_SLOW_CLOCK + HZ/2) / HZ) | |
| 36 | + | |
| 35 | 37 | /* |
| 36 | 38 | * The ST_CRTR is updated asynchronously to the master clock ... but |
| 37 | 39 | * the updates as seen by the CPU don't seem to be strictly monotonic. |
| @@ -74,8 +76,8 @@ static irqreturn_t at91rm9200_timer_interrupt(int irq, void *dev_id) · 36 unmodified lines | ||
| 74 | 76 | if (sr & AT91_ST_PITS) { |
| 75 | 77 | u32 crtr = read_CRTR(); |
| 76 | 78 | |
| 77 | − while (((crtr - last_crtr) & AT91_ST_CRTV) >= LATCH) { | |
| 78 | − last_crtr += LATCH; | |
| 79 | + while (((crtr - last_crtr) & AT91_ST_CRTV) >= RM9200_TIMER_LATCH) { | |
| 80 | + last_crtr += RM9200_TIMER_LATCH; | |
| 79 | 81 | clkevt.event_handler(&clkevt); |
| 80 | 82 | } |
| 81 | 83 | return IRQ_HANDLED; |
| @@ -116,7 +118,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev) · 34 unmodified lines | ||
| 116 | 118 | case CLOCK_EVT_MODE_PERIODIC: |
| 117 | 119 | /* PIT for periodic irqs; fixed rate of 1/HZ */ |
| 118 | 120 | irqmask = AT91_ST_PITS; |
| 119 | − at91_sys_write(AT91_ST_PIMR, LATCH); | |
| 121 | + at91_sys_write(AT91_ST_PIMR, RM9200_TIMER_LATCH); | |
| 120 | 122 | break; |
| 121 | 123 | case CLOCK_EVT_MODE_ONESHOT: |
| 122 | 124 | /* ALM for oneshot irqs, set by next_event() |
| @@ -11,7 +11,6 @@ · 10 unmodified lines | ||
| 11 | 11 | */ |
| 12 | 12 | |
| 13 | 13 | #include <linux/module.h> |
| 14 | −#include <linux/pm.h> | |
| 15 | 14 | |
| 16 | 15 | #include <asm/irq.h> |
| 17 | 16 | #include <asm/mach/arch.h> |
| @@ -21,11 +20,11 @@ · 3 unmodified lines | ||
| 21 | 20 | #include <mach/at91sam9260.h> |
| 22 | 21 | #include <mach/at91_pmc.h> |
| 23 | 22 | #include <mach/at91_rstc.h> |
| 24 | −#include <mach/at91_shdwc.h> | |
| 25 | 23 | |
| 26 | 24 | #include "soc.h" |
| 27 | 25 | #include "generic.h" |
| 28 | 26 | #include "clock.h" |
| 27 | +#include "sam9_smc.h" | |
| 29 | 28 | |
| 30 | 29 | /* -------------------------------------------------------------------- |
| 31 | 30 | * Clocks |
| @@ -120,7 +119,7 @@ static struct clk ohci_clk = { · 88 unmodified lines | ||
| 120 | 119 | .type = CLK_TYPE_PERIPHERAL, |
| 121 | 120 | }; |
| 122 | 121 | static struct clk macb_clk = { |
| 123 | − .name = "macb_clk", | |
| 122 | + .name = "pclk", | |
| 124 | 123 | .pmc_mask = 1 << AT91SAM9260_ID_EMAC, |
| 125 | 124 | .type = CLK_TYPE_PERIPHERAL, |
| 126 | 125 | }; |
| @@ -190,6 +189,8 @@ static struct clk *periph_clocks[] __initdata = { · 63 unmodified lines | ||
| 190 | 189 | }; |
| 191 | 190 | |
| 192 | 191 | static struct clk_lookup periph_clocks_lookups[] = { |
| 192 | + /* One additional fake clock for macb_hclk */ | |
| 193 | + CLKDEV_CON_ID("hclk", &macb_clk), | |
| 193 | 194 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), |
| 194 | 195 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), |
| 195 | 196 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), |
| @@ -209,6 +210,9 @@ static struct clk_lookup periph_clocks_lookups[] = { · 13 unmodified lines | ||
| 209 | 210 | CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk), |
| 210 | 211 | /* fake hclk clock */ |
| 211 | 212 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
| 213 | + CLKDEV_CON_ID("pioA", &pioA_clk), | |
| 214 | + CLKDEV_CON_ID("pioB", &pioB_clk), | |
| 215 | + CLKDEV_CON_ID("pioC", &pioC_clk), | |
| 212 | 216 | }; |
| 213 | 217 | |
| 214 | 218 | static struct clk_lookup usart_clocks_lookups[] = { |
| @@ -270,28 +274,19 @@ void __init at91sam9260_set_console_clock(int id) · 55 unmodified lines | ||
| 270 | 274 | * GPIO |
| 271 | 275 | * -------------------------------------------------------------------- */ |
| 272 | 276 | |
| 273 | −static struct at91_gpio_bank at91sam9260_gpio[] = { | |
| 277 | +static struct at91_gpio_bank at91sam9260_gpio[] __initdata = { | |
| 274 | 278 | { |
| 275 | 279 | .id = AT91SAM9260_ID_PIOA, |
| 276 | − .offset = AT91_PIOA, | |
| 277 | − .clock = &pioA_clk, | |
| 280 | + .regbase = AT91SAM9260_BASE_PIOA, | |
| 278 | 281 | }, { |
| 279 | 282 | .id = AT91SAM9260_ID_PIOB, |
| 280 | − .offset = AT91_PIOB, | |
| 281 | − .clock = &pioB_clk, | |
| 283 | + .regbase = AT91SAM9260_BASE_PIOB, | |
| 282 | 284 | }, { |
| 283 | 285 | .id = AT91SAM9260_ID_PIOC, |
| 284 | − .offset = AT91_PIOC, | |
| 285 | − .clock = &pioC_clk, | |
| 286 | + .regbase = AT91SAM9260_BASE_PIOC, | |
| 286 | 287 | } |
| 287 | 288 | }; |
| 288 | 289 | |
| 289 | −static void at91sam9260_poweroff(void) | |
| 290 | −{ | |
| 291 | − at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | |
| 292 | −} | |
| 293 | − | |
| 294 | − | |
| 295 | 290 | /* -------------------------------------------------------------------- |
| 296 | 291 | * AT91SAM9260 processor initialization |
| 297 | 292 | * -------------------------------------------------------------------- */ |
| @@ -325,10 +320,16 @@ static void __init at91sam9260_map_io(void) · 27 unmodified lines | ||
| 325 | 320 | } |
| 326 | 321 | } |
| 327 | 322 | |
| 323 | +static void __init at91sam9260_ioremap_registers(void) | |
| 324 | +{ | |
| 325 | + at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC); | |
| 326 | + at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT); | |
| 327 | + at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); | |
| 328 | +} | |
| 329 | + | |
| 328 | 330 | static void __init at91sam9260_initialize(void) |
| 329 | 331 | { |
| 330 | − at91_arch_reset = at91sam9_alt_reset; | |
| 331 | − pm_power_off = at91sam9260_poweroff; | |
| 332 | + arm_pm_restart = at91sam9_alt_restart; | |
| 332 | 333 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
| 333 | 334 | | (1 << AT91SAM9260_ID_IRQ2); |
| 334 | 335 | |
| @@ -381,6 +382,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { · 46 unmodified lines | ||
| 381 | 382 | struct at91_init_soc __initdata at91sam9260_soc = { |
| 382 | 383 | .map_io = at91sam9260_map_io, |
| 383 | 384 | .default_irq_priority = at91sam9260_default_irq_priority, |
| 385 | + .ioremap_registers = at91sam9260_ioremap_registers, | |
| 384 | 386 | .register_clocks = at91sam9260_register_clocks, |
| 385 | 387 | .init = at91sam9260_initialize, |
| 386 | 388 | }; |
| @@ -115,7 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) · 114 unmodified lines | ||
| 115 | 115 | if (!data) |
| 116 | 116 | return; |
| 117 | 117 | |
| 118 | − if (data->vbus_pin) { | |
| 118 | + if (gpio_is_valid(data->vbus_pin)) { | |
| 119 | 119 | at91_set_gpio_input(data->vbus_pin, 0); |
| 120 | 120 | at91_set_deglitch(data->vbus_pin, 1); |
| 121 | 121 | } |
| @@ -136,7 +136,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} · 14 unmodified lines | ||
| 136 | 136 | |
| 137 | 137 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
| 138 | 138 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
| 139 | −static struct at91_eth_data eth_data; | |
| 139 | +static struct macb_platform_data eth_data; | |
| 140 | 140 | |
| 141 | 141 | static struct resource eth_resources[] = { |
| 142 | 142 | [0] = { |
| @@ -163,12 +163,12 @@ static struct platform_device at91sam9260_eth_device = { · 20 unmodified lines | ||
| 163 | 163 | .num_resources = ARRAY_SIZE(eth_resources), |
| 164 | 164 | }; |
| 165 | 165 | |
| 166 | −void __init at91_add_device_eth(struct at91_eth_data *data) | |
| 166 | +void __init at91_add_device_eth(struct macb_platform_data *data) | |
| 167 | 167 | { |
| 168 | 168 | if (!data) |
| 169 | 169 | return; |
| 170 | 170 | |
| 171 | − if (data->phy_irq_pin) { | |
| 171 | + if (gpio_is_valid(data->phy_irq_pin)) { | |
| 172 | 172 | at91_set_gpio_input(data->phy_irq_pin, 0); |
| 173 | 173 | at91_set_deglitch(data->phy_irq_pin, 1); |
| 174 | 174 | } |
| @@ -200,7 +200,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) · 25 unmodified lines | ||
| 200 | 200 | platform_device_register(&at91sam9260_eth_device); |
| 201 | 201 | } |
| 202 | 202 | #else |
| 203 | −void __init at91_add_device_eth(struct at91_eth_data *data) {} | |
| 203 | +void __init at91_add_device_eth(struct macb_platform_data *data) {} | |
| 204 | 204 | #endif |
| 205 | 205 | |
| 206 | 206 | |
| @@ -243,13 +243,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) · 36 unmodified lines | ||
| 243 | 243 | return; |
| 244 | 244 | |
| 245 | 245 | /* input/irq */ |
| 246 | − if (data->det_pin) { | |
| 246 | + if (gpio_is_valid(data->det_pin)) { | |
| 247 | 247 | at91_set_gpio_input(data->det_pin, 1); |
| 248 | 248 | at91_set_deglitch(data->det_pin, 1); |
| 249 | 249 | } |
| 250 | − if (data->wp_pin) | |
| 250 | + if (gpio_is_valid(data->wp_pin)) | |
| 251 | 251 | at91_set_gpio_input(data->wp_pin, 1); |
| 252 | − if (data->vcc_pin) | |
| 252 | + if (gpio_is_valid(data->vcc_pin)) | |
| 253 | 253 | at91_set_gpio_output(data->vcc_pin, 0); |
| 254 | 254 | |
| 255 | 255 | /* CLK */ |
| @@ -330,11 +330,11 @@ void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) · 74 unmodified lines | ||
| 330 | 330 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { |
| 331 | 331 | if (data->slot[i].bus_width) { |
| 332 | 332 | /* input/irq */ |
| 333 | − if (data->slot[i].detect_pin) { | |
| 333 | + if (gpio_is_valid(data->slot[i].detect_pin)) { | |
| 334 | 334 | at91_set_gpio_input(data->slot[i].detect_pin, 1); |
| 335 | 335 | at91_set_deglitch(data->slot[i].detect_pin, 1); |
| 336 | 336 | } |
| 337 | − if (data->slot[i].wp_pin) | |
| 337 | + if (gpio_is_valid(data->slot[i].wp_pin)) | |
| 338 | 338 | at91_set_gpio_input(data->slot[i].wp_pin, 1); |
| 339 | 339 | |
| 340 | 340 | switch (i) { |
| @@ -399,8 +399,8 @@ static struct resource nand_resources[] = { · 58 unmodified lines | ||
| 399 | 399 | .flags = IORESOURCE_MEM, |
| 400 | 400 | }, |
| 401 | 401 | [1] = { |
| 402 | − .start = AT91_BASE_SYS + AT91_ECC, | |
| 403 | − .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1, | |
| 402 | + .start = AT91SAM9260_BASE_ECC, | |
| 403 | + .end = AT91SAM9260_BASE_ECC + SZ_512 - 1, | |
| 404 | 404 | .flags = IORESOURCE_MEM, |
| 405 | 405 | } |
| 406 | 406 | }; |
| @@ -426,15 +426,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) · 19 unmodified lines | ||
| 426 | 426 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
| 427 | 427 | |
| 428 | 428 | /* enable pin */ |
| 429 | − if (data->enable_pin) | |
| 429 | + if (gpio_is_valid(data->enable_pin)) | |
| 430 | 430 | at91_set_gpio_output(data->enable_pin, 1); |
| 431 | 431 | |
| 432 | 432 | /* ready/busy pin */ |
| 433 | − if (data->rdy_pin) | |
| 433 | + if (gpio_is_valid(data->rdy_pin)) | |
| 434 | 434 | at91_set_gpio_input(data->rdy_pin, 1); |
| 435 | 435 | |
| 436 | 436 | /* card detect pin */ |
| 437 | − if (data->det_pin) | |
| 437 | + if (gpio_is_valid(data->det_pin)) | |
| 438 | 438 | at91_set_gpio_input(data->det_pin, 1); |
| 439 | 439 | |
| 440 | 440 | nand_data = *data; |
| @@ -714,8 +714,8 @@ static void __init at91_add_device_tc(void) { } · 273 unmodified lines | ||
| 714 | 714 | |
| 715 | 715 | static struct resource rtt_resources[] = { |
| 716 | 716 | { |
| 717 | − .start = AT91_BASE_SYS + AT91_RTT, | |
| 718 | − .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | |
| 717 | + .start = AT91SAM9260_BASE_RTT, | |
| 718 | + .end = AT91SAM9260_BASE_RTT + SZ_16 - 1, | |
| 719 | 719 | .flags = IORESOURCE_MEM, |
| 720 | 720 | } |
| 721 | 721 | }; |
| @@ -738,10 +738,19 @@ static void __init at91_add_device_rtt(void) · 16 unmodified lines | ||
| 738 | 738 | * -------------------------------------------------------------------- */ |
| 739 | 739 | |
| 740 | 740 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 741 | +static struct resource wdt_resources[] = { | |
| 742 | + { | |
| 743 | + .start = AT91SAM9260_BASE_WDT, | |
| 744 | + .end = AT91SAM9260_BASE_WDT + SZ_16 - 1, | |
| 745 | + .flags = IORESOURCE_MEM, | |
| 746 | + } | |
| 747 | +}; | |
| 748 | + | |
| 741 | 749 | static struct platform_device at91sam9260_wdt_device = { |
| 742 | 750 | .name = "at91_wdt", |
| 743 | 751 | .id = -1, |
| 744 | − .num_resources = 0, | |
| 752 | + .resource = wdt_resources, | |
| 753 | + .num_resources = ARRAY_SIZE(wdt_resources), | |
| 745 | 754 | }; |
| 746 | 755 | |
| 747 | 756 | static void __init at91_add_device_watchdog(void) |
| @@ -837,8 +846,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} · 89 unmodified lines | ||
| 837 | 846 | #if defined(CONFIG_SERIAL_ATMEL) |
| 838 | 847 | static struct resource dbgu_resources[] = { |
| 839 | 848 | [0] = { |
| 840 | − .start = AT91_BASE_SYS + AT91_DBGU, | |
| 841 | − .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | |
| 849 | + .start = AT91SAM9260_BASE_DBGU, | |
| 850 | + .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1, | |
| 842 | 851 | .flags = IORESOURCE_MEM, |
| 843 | 852 | }, |
| 844 | 853 | [1] = { |
| @@ -1281,17 +1290,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data) · 436 unmodified lines | ||
| 1281 | 1290 | |
| 1282 | 1291 | at91_sys_write(AT91_MATRIX_EBICSA, csa); |
| 1283 | 1292 | |
| 1284 | − if (data->rst_pin) { | |
| 1293 | + if (gpio_is_valid(data->rst_pin)) { | |
| 1285 | 1294 | at91_set_multi_drive(data->rst_pin, 0); |
| 1286 | 1295 | at91_set_gpio_output(data->rst_pin, 1); |
| 1287 | 1296 | } |
| 1288 | 1297 | |
| 1289 | − if (data->irq_pin) { | |
| 1298 | + if (gpio_is_valid(data->irq_pin)) { | |
| 1290 | 1299 | at91_set_gpio_input(data->irq_pin, 0); |
| 1291 | 1300 | at91_set_deglitch(data->irq_pin, 1); |
| 1292 | 1301 | } |
| 1293 | 1302 | |
| 1294 | − if (data->det_pin) { | |
| 1303 | + if (gpio_is_valid(data->det_pin)) { | |
| 1295 | 1304 | at91_set_gpio_input(data->det_pin, 0); |
| 1296 | 1305 | at91_set_deglitch(data->det_pin, 1); |
| 1297 | 1306 | } |
| @@ -11,7 +11,6 @@ · 10 unmodified lines | ||
| 11 | 11 | */ |
| 12 | 12 | |
| 13 | 13 | #include <linux/module.h> |
| 14 | −#include <linux/pm.h> | |
| 15 | 14 | |
| 16 | 15 | #include <asm/irq.h> |
| 17 | 16 | #include <asm/mach/arch.h> |
| @@ -20,11 +19,11 @@ · 2 unmodified lines | ||
| 20 | 19 | #include <mach/at91sam9261.h> |
| 21 | 20 | #include <mach/at91_pmc.h> |
| 22 | 21 | #include <mach/at91_rstc.h> |
| 23 | −#include <mach/at91_shdwc.h> | |
| 24 | 22 | |
| 25 | 23 | #include "soc.h" |
| 26 | 24 | #include "generic.h" |
| 27 | 25 | #include "clock.h" |
| 26 | +#include "sam9_smc.h" | |
| 28 | 27 | |
| 29 | 28 | /* -------------------------------------------------------------------- |
| 30 | 29 | * Clocks |
| @@ -176,6 +175,9 @@ static struct clk_lookup periph_clocks_lookups[] = { · 145 unmodified lines | ||
| 176 | 175 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
| 177 | 176 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
| 178 | 177 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), |
| 178 | + CLKDEV_CON_ID("pioA", &pioA_clk), | |
| 179 | + CLKDEV_CON_ID("pioB", &pioB_clk), | |
| 180 | + CLKDEV_CON_ID("pioC", &pioC_clk), | |
| 179 | 181 | }; |
| 180 | 182 | |
| 181 | 183 | static struct clk_lookup usart_clocks_lookups[] = { |
| @@ -251,28 +253,19 @@ void __init at91sam9261_set_console_clock(int id) · 69 unmodified lines | ||
| 251 | 253 | * GPIO |
| 252 | 254 | * -------------------------------------------------------------------- */ |
| 253 | 255 | |
| 254 | −static struct at91_gpio_bank at91sam9261_gpio[] = { | |
| 256 | +static struct at91_gpio_bank at91sam9261_gpio[] __initdata = { | |
| 255 | 257 | { |
| 256 | 258 | .id = AT91SAM9261_ID_PIOA, |
| 257 | − .offset = AT91_PIOA, | |
| 258 | − .clock = &pioA_clk, | |
| 259 | + .regbase = AT91SAM9261_BASE_PIOA, | |
| 259 | 260 | }, { |
| 260 | 261 | .id = AT91SAM9261_ID_PIOB, |
| 261 | − .offset = AT91_PIOB, | |
| 262 | − .clock = &pioB_clk, | |
| 262 | + .regbase = AT91SAM9261_BASE_PIOB, | |
| 263 | 263 | }, { |
| 264 | 264 | .id = AT91SAM9261_ID_PIOC, |
| 265 | − .offset = AT91_PIOC, | |
| 266 | − .clock = &pioC_clk, | |
| 265 | + .regbase = AT91SAM9261_BASE_PIOC, | |
| 267 | 266 | } |
| 268 | 267 | }; |
| 269 | 268 | |
| 270 | −static void at91sam9261_poweroff(void) | |
| 271 | −{ | |
| 272 | − at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | |
| 273 | −} | |
| 274 | − | |
| 275 | − | |
| 276 | 269 | /* -------------------------------------------------------------------- |
| 277 | 270 | * AT91SAM9261 processor initialization |
| 278 | 271 | * -------------------------------------------------------------------- */ |
| @@ -285,10 +278,16 @@ static void __init at91sam9261_map_io(void) · 6 unmodified lines | ||
| 285 | 278 | at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE); |
| 286 | 279 | } |
| 287 | 280 | |
| 281 | +static void __init at91sam9261_ioremap_registers(void) | |
| 282 | +{ | |
| 283 | + at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC); | |
| 284 | + at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT); | |
| 285 | + at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); | |
| 286 | +} | |
| 287 | + | |
| 288 | 288 | static void __init at91sam9261_initialize(void) |
| 289 | 289 | { |
| 290 | − at91_arch_reset = at91sam9_alt_reset; | |
| 291 | − pm_power_off = at91sam9261_poweroff; | |
| 290 | + arm_pm_restart = at91sam9_alt_restart; | |
| 292 | 291 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) |
| 293 | 292 | | (1 << AT91SAM9261_ID_IRQ2); |
| 294 | 293 | |
| @@ -341,6 +340,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { · 46 unmodified lines | ||
| 341 | 340 | struct at91_init_soc __initdata at91sam9261_soc = { |
| 342 | 341 | .map_io = at91sam9261_map_io, |
| 343 | 342 | .default_irq_priority = at91sam9261_default_irq_priority, |
| 343 | + .ioremap_registers = at91sam9261_ioremap_registers, | |
| 344 | 344 | .register_clocks = at91sam9261_register_clocks, |
| 345 | 345 | .init = at91sam9261_initialize, |
| 346 | 346 | }; |
| @@ -118,7 +118,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) · 117 unmodified lines | ||
| 118 | 118 | if (!data) |
| 119 | 119 | return; |
| 120 | 120 | |
| 121 | − if (data->vbus_pin) { | |
| 121 | + if (gpio_is_valid(data->vbus_pin)) { | |
| 122 | 122 | at91_set_gpio_input(data->vbus_pin, 0); |
| 123 | 123 | at91_set_deglitch(data->vbus_pin, 1); |
| 124 | 124 | } |
| @@ -171,13 +171,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) · 46 unmodified lines | ||
| 171 | 171 | return; |
| 172 | 172 | |
| 173 | 173 | /* input/irq */ |
| 174 | − if (data->det_pin) { | |
| 174 | + if (gpio_is_valid(data->det_pin)) { | |
| 175 | 175 | at91_set_gpio_input(data->det_pin, 1); |
| 176 | 176 | at91_set_deglitch(data->det_pin, 1); |
| 177 | 177 | } |
| 178 | − if (data->wp_pin) | |
| 178 | + if (gpio_is_valid(data->wp_pin)) | |
| 179 | 179 | at91_set_gpio_input(data->wp_pin, 1); |
| 180 | − if (data->vcc_pin) | |
| 180 | + if (gpio_is_valid(data->vcc_pin)) | |
| 181 | 181 | at91_set_gpio_output(data->vcc_pin, 0); |
| 182 | 182 | |
| 183 | 183 | /* CLK */ |
| @@ -240,15 +240,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) · 56 unmodified lines | ||
| 240 | 240 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
| 241 | 241 | |
| 242 | 242 | /* enable pin */ |
| 243 | − if (data->enable_pin) | |
| 243 | + if (gpio_is_valid(data->enable_pin)) | |
| 244 | 244 | at91_set_gpio_output(data->enable_pin, 1); |
| 245 | 245 | |
| 246 | 246 | /* ready/busy pin */ |
| 247 | − if (data->rdy_pin) | |
| 247 | + if (gpio_is_valid(data->rdy_pin)) | |
| 248 | 248 | at91_set_gpio_input(data->rdy_pin, 1); |
| 249 | 249 | |
| 250 | 250 | /* card detect pin */ |
| 251 | − if (data->det_pin) | |
| 251 | + if (gpio_is_valid(data->det_pin)) | |
| 252 | 252 | at91_set_gpio_input(data->det_pin, 1); |
| 253 | 253 | |
| 254 | 254 | at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ |
| @@ -600,8 +600,8 @@ static void __init at91_add_device_tc(void) { } · 345 unmodified lines | ||
| 600 | 600 | |
| 601 | 601 | static struct resource rtt_resources[] = { |
| 602 | 602 | { |
| 603 | − .start = AT91_BASE_SYS + AT91_RTT, | |
| 604 | − .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | |
| 603 | + .start = AT91SAM9261_BASE_RTT, | |
| 604 | + .end = AT91SAM9261_BASE_RTT + SZ_16 - 1, | |
| 605 | 605 | .flags = IORESOURCE_MEM, |
| 606 | 606 | } |
| 607 | 607 | }; |
| @@ -624,10 +624,19 @@ static void __init at91_add_device_rtt(void) · 16 unmodified lines | ||
| 624 | 624 | * -------------------------------------------------------------------- */ |
| 625 | 625 | |
| 626 | 626 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 627 | +static struct resource wdt_resources[] = { | |
| 628 | + { | |
| 629 | + .start = AT91SAM9261_BASE_WDT, | |
| 630 | + .end = AT91SAM9261_BASE_WDT + SZ_16 - 1, | |
| 631 | + .flags = IORESOURCE_MEM, | |
| 632 | + } | |
| 633 | +}; | |
| 634 | + | |
| 627 | 635 | static struct platform_device at91sam9261_wdt_device = { |
| 628 | 636 | .name = "at91_wdt", |
| 629 | 637 | .id = -1, |
| 630 | − .num_resources = 0, | |
| 638 | + .resource = wdt_resources, | |
| 639 | + .num_resources = ARRAY_SIZE(wdt_resources), | |
| 631 | 640 | }; |
| 632 | 641 | |
| 633 | 642 | static void __init at91_add_device_watchdog(void) |
| @@ -816,8 +825,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} · 182 unmodified lines | ||
| 816 | 825 | #if defined(CONFIG_SERIAL_ATMEL) |
| 817 | 826 | static struct resource dbgu_resources[] = { |
| 818 | 827 | [0] = { |
| 819 | − .start = AT91_BASE_SYS + AT91_DBGU, | |
| 820 | − .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | |
| 828 | + .start = AT91SAM9261_BASE_DBGU, | |
| 829 | + .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1, | |
| 821 | 830 | .flags = IORESOURCE_MEM, |
| 822 | 831 | }, |
| 823 | 832 | [1] = { |
| @@ -11,7 +11,6 @@ · 10 unmodified lines | ||
| 11 | 11 | */ |
| 12 | 12 | |
| 13 | 13 | #include <linux/module.h> |
| 14 | −#include <linux/pm.h> | |
| 15 | 14 | |
| 16 | 15 | #include <asm/irq.h> |
| 17 | 16 | #include <asm/mach/arch.h> |
| @@ -19,11 +18,11 @@ · 1 unmodified line | ||
| 19 | 18 | #include <mach/at91sam9263.h> |
| 20 | 19 | #include <mach/at91_pmc.h> |
| 21 | 20 | #include <mach/at91_rstc.h> |
| 22 | −#include <mach/at91_shdwc.h> | |
| 23 | 21 | |
| 24 | 22 | #include "soc.h" |
| 25 | 23 | #include "generic.h" |
| 26 | 24 | #include "clock.h" |
| 25 | +#include "sam9_smc.h" | |
| 27 | 26 | |
| 28 | 27 | /* -------------------------------------------------------------------- |
| 29 | 28 | * Clocks |
| @@ -118,7 +117,7 @@ static struct clk pwm_clk = { · 88 unmodified lines | ||
| 118 | 117 | .type = CLK_TYPE_PERIPHERAL, |
| 119 | 118 | }; |
| 120 | 119 | static struct clk macb_clk = { |
| 121 | − .name = "macb_clk", | |
| 120 | + .name = "pclk", | |
| 122 | 121 | .pmc_mask = 1 << AT91SAM9263_ID_EMAC, |
| 123 | 122 | .type = CLK_TYPE_PERIPHERAL, |
| 124 | 123 | }; |
| @@ -182,6 +181,8 @@ static struct clk *periph_clocks[] __initdata = { · 57 unmodified lines | ||
| 182 | 181 | }; |
| 183 | 182 | |
| 184 | 183 | static struct clk_lookup periph_clocks_lookups[] = { |
| 184 | + /* One additional fake clock for macb_hclk */ | |
| 185 | + CLKDEV_CON_ID("hclk", &macb_clk), | |
| 185 | 186 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
| 186 | 187 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
| 187 | 188 | CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk), |
| @@ -191,6 +192,11 @@ static struct clk_lookup periph_clocks_lookups[] = { · 3 unmodified lines | ||
| 191 | 192 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), |
| 192 | 193 | /* fake hclk clock */ |
| 193 | 194 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), |
| 195 | + CLKDEV_CON_ID("pioA", &pioA_clk), | |
| 196 | + CLKDEV_CON_ID("pioB", &pioB_clk), | |
| 197 | + CLKDEV_CON_ID("pioC", &pioCDE_clk), | |
| 198 | + CLKDEV_CON_ID("pioD", &pioCDE_clk), | |
| 199 | + CLKDEV_CON_ID("pioE", &pioCDE_clk), | |
| 194 | 200 | }; |
| 195 | 201 | |
| 196 | 202 | static struct clk_lookup usart_clocks_lookups[] = { |
| @@ -263,36 +269,25 @@ void __init at91sam9263_set_console_clock(int id) · 66 unmodified lines | ||
| 263 | 269 | * GPIO |
| 264 | 270 | * -------------------------------------------------------------------- */ |
| 265 | 271 | |
| 266 | −static struct at91_gpio_bank at91sam9263_gpio[] = { | |
| 272 | +static struct at91_gpio_bank at91sam9263_gpio[] __initdata = { | |
| 267 | 273 | { |
| 268 | 274 | .id = AT91SAM9263_ID_PIOA, |
| 269 | − .offset = AT91_PIOA, | |
| 270 | − .clock = &pioA_clk, | |
| 275 | + .regbase = AT91SAM9263_BASE_PIOA, | |
| 271 | 276 | }, { |
| 272 | 277 | .id = AT91SAM9263_ID_PIOB, |
| 273 | − .offset = AT91_PIOB, | |
| 274 | − .clock = &pioB_clk, | |
| 278 | + .regbase = AT91SAM9263_BASE_PIOB, | |
| 275 | 279 | }, { |
| 276 | 280 | .id = AT91SAM9263_ID_PIOCDE, |
| 277 | − .offset = AT91_PIOC, | |
| 278 | − .clock = &pioCDE_clk, | |
| 281 | + .regbase = AT91SAM9263_BASE_PIOC, | |
| 279 | 282 | }, { |
| 280 | 283 | .id = AT91SAM9263_ID_PIOCDE, |
| 281 | − .offset = AT91_PIOD, | |
| 282 | − .clock = &pioCDE_clk, | |
| 284 | + .regbase = AT91SAM9263_BASE_PIOD, | |
| 283 | 285 | }, { |
| 284 | 286 | .id = AT91SAM9263_ID_PIOCDE, |
| 285 | − .offset = AT91_PIOE, | |
| 286 | − .clock = &pioCDE_clk, | |
| 287 | + .regbase = AT91SAM9263_BASE_PIOE, | |
| 287 | 288 | } |
| 288 | 289 | }; |
| 289 | 290 | |
| 290 | −static void at91sam9263_poweroff(void) | |
| 291 | −{ | |
| 292 | − at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW); | |
| 293 | −} | |
| 294 | − | |
| 295 | − | |
| 296 | 291 | /* -------------------------------------------------------------------- |
| 297 | 292 | * AT91SAM9263 processor initialization |
| 298 | 293 | * -------------------------------------------------------------------- */ |
| @@ -303,10 +298,17 @@ static void __init at91sam9263_map_io(void) · 4 unmodified lines | ||
| 303 | 298 | at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE); |
| 304 | 299 | } |
| 305 | 300 | |
| 301 | +static void __init at91sam9263_ioremap_registers(void) | |
| 302 | +{ | |
| 303 | + at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC); | |
| 304 | + at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT); | |
| 305 | + at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0); | |
| 306 | + at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); | |
| 307 | +} | |
| 308 | + | |
| 306 | 309 | static void __init at91sam9263_initialize(void) |
| 307 | 310 | { |
| 308 | − at91_arch_reset = at91sam9_alt_reset; | |
| 309 | − pm_power_off = at91sam9263_poweroff; | |
| 311 | + arm_pm_restart = at91sam9_alt_restart; | |
| 310 | 312 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
| 311 | 313 | |
| 312 | 314 | /* Register GPIO subsystem */ |
| @@ -358,6 +360,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { · 45 unmodified lines | ||
| 358 | 360 | struct at91_init_soc __initdata at91sam9263_soc = { |
| 359 | 361 | .map_io = at91sam9263_map_io, |
| 360 | 362 | .default_irq_priority = at91sam9263_default_irq_priority, |
| 363 | + .ioremap_registers = at91sam9263_ioremap_registers, | |
| 361 | 364 | .register_clocks = at91sam9263_register_clocks, |
| 362 | 365 | .init = at91sam9263_initialize, |
| 363 | 366 | }; |
| @@ -70,7 +70,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) · 69 unmodified lines | ||
| 70 | 70 | |
| 71 | 71 | /* Enable VBus control for UHP ports */ |
| 72 | 72 | for (i = 0; i < data->ports; i++) { |
| 73 | − if (data->vbus_pin[i]) | |
| 73 | + if (gpio_is_valid(data->vbus_pin[i])) | |
| 74 | 74 | at91_set_gpio_output(data->vbus_pin[i], 0); |
| 75 | 75 | } |
| 76 | 76 | |
| @@ -123,7 +123,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) · 46 unmodified lines | ||
| 123 | 123 | if (!data) |
| 124 | 124 | return; |
| 125 | 125 | |
| 126 | − if (data->vbus_pin) { | |
| 126 | + if (gpio_is_valid(data->vbus_pin)) { | |
| 127 | 127 | at91_set_gpio_input(data->vbus_pin, 0); |
| 128 | 128 | at91_set_deglitch(data->vbus_pin, 1); |
| 129 | 129 | } |
| @@ -144,7 +144,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} · 14 unmodified lines | ||
| 144 | 144 | |
| 145 | 145 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
| 146 | 146 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
| 147 | −static struct at91_eth_data eth_data; | |
| 147 | +static struct macb_platform_data eth_data; | |
| 148 | 148 | |
| 149 | 149 | static struct resource eth_resources[] = { |
| 150 | 150 | [0] = { |
| @@ -171,12 +171,12 @@ static struct platform_device at91sam9263_eth_device = { · 20 unmodified lines | ||
| 171 | 171 | .num_resources = ARRAY_SIZE(eth_resources), |
| 172 | 172 | }; |
| 173 | 173 | |
| 174 | −void __init at91_add_device_eth(struct at91_eth_data *data) | |
| 174 | +void __init at91_add_device_eth(struct macb_platform_data *data) | |
| 175 | 175 | { |
| 176 | 176 | if (!data) |
| 177 | 177 | return; |
| 178 | 178 | |
| 179 | − if (data->phy_irq_pin) { | |
| 179 | + if (gpio_is_valid(data->phy_irq_pin)) { | |
| 180 | 180 | at91_set_gpio_input(data->phy_irq_pin, 0); |
| 181 | 181 | at91_set_deglitch(data->phy_irq_pin, 1); |
| 182 | 182 | } |
| @@ -208,7 +208,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) · 25 unmodified lines | ||
| 208 | 208 | platform_device_register(&at91sam9263_eth_device); |
| 209 | 209 | } |
| 210 | 210 | #else |
| 211 | −void __init at91_add_device_eth(struct at91_eth_data *data) {} | |
| 211 | +void __init at91_add_device_eth(struct macb_platform_data *data) {} | |
| 212 | 212 | #endif |
| 213 | 213 | |
| 214 | 214 | |
| @@ -276,13 +276,13 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) · 61 unmodified lines | ||
| 276 | 276 | return; |
| 277 | 277 | |
| 278 | 278 | /* input/irq */ |
| 279 | − if (data->det_pin) { | |
| 279 | + if (gpio_is_valid(data->det_pin)) { | |
| 280 | 280 | at91_set_gpio_input(data->det_pin, 1); |
| 281 | 281 | at91_set_deglitch(data->det_pin, 1); |
| 282 | 282 | } |
| 283 | − if (data->wp_pin) | |
| 283 | + if (gpio_is_valid(data->wp_pin)) | |
| 284 | 284 | at91_set_gpio_input(data->wp_pin, 1); |
| 285 | − if (data->vcc_pin) | |
| 285 | + if (gpio_is_valid(data->vcc_pin)) | |
| 286 | 286 | at91_set_gpio_output(data->vcc_pin, 0); |
| 287 | 287 | |
| 288 | 288 | if (mmc_id == 0) { /* MCI0 */ |
| @@ -430,17 +430,17 @@ void __init at91_add_device_cf(struct at91_cf_data *data) · 141 unmodified lines | ||
| 430 | 430 | } |
| 431 | 431 | at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); |
| 432 | 432 | |
| 433 | − if (data->det_pin) { | |
| 433 | + if (gpio_is_valid(data->det_pin)) { | |
| 434 | 434 | at91_set_gpio_input(data->det_pin, 1); |
| 435 | 435 | at91_set_deglitch(data->det_pin, 1); |
| 436 | 436 | } |
| 437 | 437 | |
| 438 | − if (data->irq_pin) { | |
| 438 | + if (gpio_is_valid(data->irq_pin)) { | |
| 439 | 439 | at91_set_gpio_input(data->irq_pin, 1); |
| 440 | 440 | at91_set_deglitch(data->irq_pin, 1); |
| 441 | 441 | } |
| 442 | 442 | |
| 443 | − if (data->vcc_pin) | |
| 443 | + if (gpio_is_valid(data->vcc_pin)) | |
| 444 | 444 | /* initially off */ |
| 445 | 445 | at91_set_gpio_output(data->vcc_pin, 0); |
| 446 | 446 | |
| @@ -473,8 +473,8 @@ static struct resource nand_resources[] = { · 26 unmodified lines | ||
| 473 | 473 | .flags = IORESOURCE_MEM, |
| 474 | 474 | }, |
| 475 | 475 | [1] = { |
| 476 | − .start = AT91_BASE_SYS + AT91_ECC0, | |
| 477 | − .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1, | |
| 476 | + .start = AT91SAM9263_BASE_ECC0, | |
| 477 | + .end = AT91SAM9263_BASE_ECC0 + SZ_512 - 1, | |
| 478 | 478 | .flags = IORESOURCE_MEM, |
| 479 | 479 | } |
| 480 | 480 | }; |
| @@ -500,15 +500,15 @@ void __init at91_add_device_nand(struct atmel_nand_data *data) · 19 unmodified lines | ||
| 500 | 500 | at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); |
| 501 | 501 | |
| 502 | 502 | /* enable pin */ |
| 503 | − if (data->enable_pin) | |
| 503 | + if (gpio_is_valid(data->enable_pin)) | |
| 504 | 504 | at91_set_gpio_output(data->enable_pin, 1); |
| 505 | 505 | |
| 506 | 506 | /* ready/busy pin */ |
| 507 | − if (data->rdy_pin) | |
| 507 | + if (gpio_is_valid(data->rdy_pin)) | |
| 508 | 508 | at91_set_gpio_input(data->rdy_pin, 1); |
| 509 | 509 | |
| 510 | 510 | /* card detect pin */ |
| 511 | − if (data->det_pin) | |
| 511 | + if (gpio_is_valid(data->det_pin)) | |
| 512 | 512 | at91_set_gpio_input(data->det_pin, 1); |
| 513 | 513 | |
| 514 | 514 | nand_data = *data; |
| @@ -749,7 +749,7 @@ void __init at91_add_device_ac97(struct ac97c_platform_data *data) · 234 unmodified lines | ||
| 749 | 749 | at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */ |
| 750 | 750 | |
| 751 | 751 | /* reset */ |
| 752 | − if (data->reset_pin) | |
| 752 | + if (gpio_is_valid(data->reset_pin)) | |
| 753 | 753 | at91_set_gpio_output(data->reset_pin, 0); |
| 754 | 754 | |
| 755 | 755 | ac97_data = *data; |
| @@ -956,8 +956,8 @@ static void __init at91_add_device_tc(void) { } · 200 unmodified lines | ||
| 956 | 956 | |
| 957 | 957 | static struct resource rtt0_resources[] = { |
| 958 | 958 | { |
| 959 | − .start = AT91_BASE_SYS + AT91_RTT0, | |
| 960 | − .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, | |
| 959 | + .start = AT91SAM9263_BASE_RTT0, | |
| 960 | + .end = AT91SAM9263_BASE_RTT0 + SZ_16 - 1, | |
| 961 | 961 | .flags = IORESOURCE_MEM, |
| 962 | 962 | } |
| 963 | 963 | }; |
| @@ -971,8 +971,8 @@ static struct platform_device at91sam9263_rtt0_device = { · 7 unmodified lines | ||
| 971 | 971 | |
| 972 | 972 | static struct resource rtt1_resources[] = { |
| 973 | 973 | { |
| 974 | − .start = AT91_BASE_SYS + AT91_RTT1, | |
| 975 | − .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, | |
| 974 | + .start = AT91SAM9263_BASE_RTT1, | |
| 975 | + .end = AT91SAM9263_BASE_RTT1 + SZ_16 - 1, | |
| 976 | 976 | .flags = IORESOURCE_MEM, |
| 977 | 977 | } |
| 978 | 978 | }; |
| @@ -996,10 +996,19 @@ static void __init at91_add_device_rtt(void) · 17 unmodified lines | ||
| 996 | 996 | * -------------------------------------------------------------------- */ |
| 997 | 997 | |
| 998 | 998 | #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
| 999 | +static struct resource wdt_resources[] = { | |
| 1000 | + { | |
| 1001 | + .start = AT91SAM9263_BASE_WDT, | |
| 1002 | + .end = AT91SAM9263_BASE_WDT + SZ_16 - 1, | |
| 1003 | + .flags = IORESOURCE_MEM, | |
| 1004 | + } | |
| 1005 | +}; | |
| 1006 | + | |
| 999 | 1007 | static struct platform_device at91sam9263_wdt_device = { |
| 1000 | 1008 | .name = "at91_wdt", |
| 1001 | 1009 | .id = -1, |
| 1002 | − .num_resources = 0, | |
| 1010 | + .resource = wdt_resources, | |
| 1011 | + .num_resources = ARRAY_SIZE(wdt_resources), | |
| 1003 | 1012 | }; |
| 1004 | 1013 | |
| 1005 | 1014 | static void __init at91_add_device_watchdog(void) |
| @@ -1196,8 +1205,8 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins) {} · 190 unmodified lines | ||
| 1196 | 1205 | |
| 1197 | 1206 | static struct resource dbgu_resources[] = { |
| 1198 | 1207 | [0] = { |
| 1199 | − .start = AT91_BASE_SYS + AT91_DBGU, | |
| 1200 | − .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, | |
| 1208 | + .start = AT91SAM9263_BASE_DBGU, | |
| 1209 | + .end = AT91SAM9263_BASE_DBGU + SZ_512 - 1, | |
| 1201 | 1210 | .flags = IORESOURCE_MEM, |
| 1202 | 1211 | }, |
| 1203 | 1212 | [1] = { |
| @@ -25,7 +25,17 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | static u32 pit_cycle; /* write-once */ |
| 27 | 27 | static u32 pit_cnt; /* access only w/system irq blocked */ |
| 28 | +static void __iomem *pit_base_addr __read_mostly; | |
| 28 | 29 | |
| 30 | +static inline unsigned int pit_read(unsigned int reg_offset) | |
| 31 | +{ | |
| 32 | + return __raw_readl(pit_base_addr + reg_offset); | |
| 33 | +} | |
| 34 | + | |
| 35 | +static inline void pit_write(unsigned int reg_offset, unsigned long value) | |
| 36 | +{ | |
| 37 | + __raw_writel(value, pit_base_addr + reg_offset); | |
| 38 | +} | |
| 29 | 39 | |
| 30 | 40 | /* |
| 31 | 41 | * Clocksource: just a monotonic counter of MCK/16 cycles. |
| @@ -39,7 +49,7 @@ static cycle_t read_pit_clk(struct clocksource *cs) · 7 unmodified lines | ||
| 39 | 49 | |
| 40 | 50 | raw_local_irq_save(flags); |
| 41 | 51 | elapsed = pit_cnt; |
| 42 | − t = at91_sys_read(AT91_PIT_PIIR); | |
| 52 | + t = pit_read(AT91_PIT_PIIR); | |
| 43 | 53 | raw_local_irq_restore(flags); |
| 44 | 54 | |
| 45 | 55 | elapsed += PIT_PICNT(t) * pit_cycle; |
| @@ -64,8 +74,8 @@ pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) · 18 unmodified lines | ||
| 64 | 74 | switch (mode) { |
| 65 | 75 | case CLOCK_EVT_MODE_PERIODIC: |
| 66 | 76 | /* update clocksource counter */ |
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File renamed without changes.
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