Currently the user cannot interpret the PLL information based on index as its exposed as an integer. This commit exposes ASIC specific PLL indexes and maps it to a generic FW compatible index.
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| @@ -239,6 +239,39 @@ enum gaudi_engine_id { · 238 unmodified lines | |||
| 239 | GAUDI_ENGINE_ID_SIZE | 239 | GAUDI_ENGINE_ID_SIZE |
| 240 | }; | 240 | }; |
| 241 | 241 | ||
| 242 | /* | ||
| 243 | * ASIC specific PLL index | ||
| 244 | * | ||
| 245 | * Used to retrieve in frequency info of different IPs via | ||
| 246 | * HL_INFO_PLL_FREQUENCY under HL_IOCTL_INFO IOCTL. The enums need to be | ||
| 247 | * used as an index in struct hl_pll_frequency_info | ||
| 248 | */ | ||
| 249 | |||
| 250 | enum hl_goya_pll_index { | ||
| 251 | HL_GOYA_CPU_PLL = 0, | ||
| 252 | HL_GOYA_IC_PLL, | ||
| 253 | HL_GOYA_MC_PLL, | ||
| 254 | HL_GOYA_MME_PLL, | ||
| 255 | HL_GOYA_PCI_PLL, | ||
| 256 | HL_GOYA_EMMC_PLL, | ||
| 257 | HL_GOYA_TPC_PLL, | ||
| 258 | HL_GOYA_PLL_MAX | ||
| 259 | }; | ||
| 260 | |||
| 261 | enum hl_gaudi_pll_index { | ||
| 262 | HL_GAUDI_CPU_PLL = 0, | ||
| 263 | HL_GAUDI_PCI_PLL, | ||
| 264 | HL_GAUDI_SRAM_PLL, | ||
| 265 | HL_GAUDI_HBM_PLL, | ||
| 266 | HL_GAUDI_NIC_PLL, | ||
| 267 | HL_GAUDI_DMA_PLL, | ||
| 268 | HL_GAUDI_MESH_PLL, | ||
| 269 | HL_GAUDI_MME_PLL, | ||
| 270 | HL_GAUDI_TPC_PLL, | ||
| 271 | HL_GAUDI_IF_PLL, | ||
| 272 | HL_GAUDI_PLL_MAX | ||
| 273 | }; | ||
| 274 | |||
| 242 | enum hl_device_status { | 275 | enum hl_device_status { |
| 243 | HL_DEVICE_STATUS_OPERATIONAL, | 276 | HL_DEVICE_STATUS_OPERATIONAL, |
| 244 | HL_DEVICE_STATUS_IN_RESET, | 277 | HL_DEVICE_STATUS_IN_RESET, |