History

Merge tag 'drm-next-2024-11-21' of https://gitlab.freedesktop.org/drm/kernel

Pull drm updates from Dave Airlie: "There's a lot of rework, the panic helper support is being added to more drivers, v3d gets support for HW superpages, scheduler documentation, drm client and video aperture reworks, some new MAINTAINERS added, amdgpu has the usual lots of IP refactors, Intel has some Pantherlake enablement and xe is getting some SRIOV bits, but just lots of stuff everywhere. core: - split DSC helpers from DP helpers - clang build fixes for drm/mm test - drop simple pipeline support for gem vram - document submission error signaling - move drm_rect to drm core module from kms helper - add default client setup to most drivers - move to video aperture helpers instead of drm ones tests: - new framebuffer tests ttm: - remove swapped and pinned BOs from TTM lru panic: - fix uninit spinlock - add ABGR2101010 support bridge: - add TI TDP158 support - use standard PM OPS dma-fence: - use read_trylock instead of read_lock to help lockdep scheduler: - add errno to sched start to report different errors - add locking to drm_sched_entity_modify_sched - improve documentation xe: - add drm_line_printer - lots of refactoring - Enable Xe2 + PES disaggregation - add new ARL PCI ID - SRIOV development work - fix exec unnecessary implicit fence - define and parse OA sync props - forcewake refactoring i915: - Enable BMG/LNL ultra joiner - Enable 10bpx + CCS scanout on ICL+, fp16/CCS on TGL+ - use DSB for plane/color mgmt - Arrow lake PCI IDs - lots of i915/xe display refactoring - enable PXP GuC autoteardown - Pantherlake (PTL) Xe3 LPD display enablement - Allow fastset HDR infoframe changes - write DP source OUI for non-eDP sinks - share PCI IDs between i915 and xe amdgpu: - SDMA queue reset support - SMU 13.0.6, JPEG 4.0.3 updates - Initial runtime repartitioning support - rework IP structs for multiple IP instances - Fetch EDID from _DDC if available - SMU13 zero rpm user control - lots of fixes/cleanups amdkfd: - Increase event FIFO size - add topology cap flag for per queue reset msm: - DPU: - SA8775P support - (disabled by default) MSM8917, MSM8937, MSM8953 and MSM8996 support - Enable large framebuffer support - Drop MSM8998 and SDM845 - DP: - SA8775P support - GPU: - a7xx preemption support - Adreno A663 support ast: - warn about unsupported TX chips ivpu: - add coredump - add pantherlake support rockchip: - 4K@60Hz display enablement - generate pll programming tables panthor: - add timestamp query API - add realtime group priority - add fdinfo support etnaviv: - improve handling of DMA address limits - improve GPU hangcheck exynos: - Decon Exynos7870 support mediatek: - add OF graph support omap: - locking fixes bochs: - convert to gem/shmem from simpledrm v3d: - support big/super pages - add gemfs vc4: - BCM2712 support refactoring - add YUV444 format support udmabuf: - folio related fixes nouveau: - add panic support on nv50+" * tag 'drm-next-2024-11-21' of https://gitlab.freedesktop.org/drm/kernel: (1583 commits) drm/xe/guc: Fix dereference before NULL check drm/amd: Fix initialization mistake for NBIO 7.7.0 Revert "drm/amd/display: parse umc_info or vram_info based on ASIC" drm/amd/display: Fix failure to read vram info due to static BP_RESULT drm/amdgpu: enable GTT fallback handling for dGPUs only drm/amd/amdgpu: limit single process inside MES drm/fourcc: add AMD_FMT_MOD_TILE_GFX9_4K_D_X drm/amdgpu/mes12: correct kiq unmap latency drm/amdgpu: Support vcn and jpeg error info parsing drm/amd : Update MES API header file for v11 & v12 drm/amd/amdkfd: add/remove kfd queues on start/stop KFD scheduling drm/amdkfd: change kfd process kref count at creation drm/amdgpu: Cleanup shift coding style drm/amd/amdgpu: Increase MES log buffer to dump mes scratch data drm/amdgpu: Implement virt req_ras_err_count drm/amdgpu: VF Query RAS Caps from Host if supported drm/amdgpu: Add msg handlers for SRIOV RAS Telemetry drm/amdgpu: Update SRIOV Exchange Headers for RAS Telemetry Support drm/amd/display: 3.2.309 drm/amd/display: Adjust VSDB parser for replay feature ...

Linus Torvalds committed 1 year ago

Commit 28eb75e2 parents 071b34d a163b891476 files · +51907 −28946Browse files

Showing the changes to include/uapi (11 of 1476 files). Show all

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11 files
  1. include/uapi/drm/drm.h +17 −0
  2. include/uapi/drm/drm_fourcc.h +1 −0
  3. include/uapi/drm/ivpu_accel.h +1 −8
  4. include/uapi/drm/msm_drm.h +4 −1
  5. include/uapi/drm/panfrost_drm.h +3 −0
  6. include/uapi/drm/panthor_drm.h +51 −0
  7. include/uapi/drm/v3d_drm.h +1 −0
  8. include/uapi/drm/xe_drm.h +20 −1
  9. include/uapi/linux/kfd_ioctl.h +4 −3
  10. include/uapi/linux/kfd_sysfs.h +2 −1
  11. include/uapi/linux/media-bus-format.h +3 −1
include/uapi/drm/drm.h+17−0
@@ -1024,6 +1024,13 @@ struct drm_crtc_queue_sequence { · 1023 unmodified lines
1024 __u64 user_data; /* user data passed to event */1024 __u64 user_data; /* user data passed to event */
1025};1025};
1026 1026
1027#define DRM_CLIENT_NAME_MAX_LEN 64
1028struct drm_set_client_name {
1029 __u64 name_len;
1030 __u64 name;
1031};
1032
1033
1027#if defined(__cplusplus)1034#if defined(__cplusplus)
1028}1035}
1029#endif1036#endif
@@ -1288,6 +1295,16 @@ extern "C" { · 258 unmodified lines
1288 */1295 */
1289#define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb)1296#define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb)
1290 1297
1298/**
1299 * DRM_IOCTL_SET_CLIENT_NAME - Attach a name to a drm_file
1300 *
1301 * Having a name allows for easier tracking and debugging.
1302 * The length of the name (without null ending char) must be
1303 * <= DRM_CLIENT_NAME_MAX_LEN.
1304 * The call will fail if the name contains whitespaces or non-printable chars.
1305 */
1306#define DRM_IOCTL_SET_CLIENT_NAME DRM_IOWR(0xD1, struct drm_set_client_name)
1307
1291/*1308/*
1292 * Device specific ioctls should only be in their respective headers1309 * Device specific ioctls should only be in their respective headers
1293 * The device specific ioctl range is from 0x40 to 0x9f.1310 * The device specific ioctl range is from 0x40 to 0x9f.
include/uapi/drm/drm_fourcc.h+1−0
@@ -1516,6 +1516,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) · 1515 unmodified lines
1516 * 64K_D_2D on GFX12 is identical to 64K_D on GFX11.1516 * 64K_D_2D on GFX12 is identical to 64K_D on GFX11.
1517 */1517 */
1518#define AMD_FMT_MOD_TILE_GFX9_64K_D 101518#define AMD_FMT_MOD_TILE_GFX9_64K_D 10
1519#define AMD_FMT_MOD_TILE_GFX9_4K_D_X 22
1519#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 251520#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
1520#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 261521#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
1521#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 271522#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
include/uapi/drm/ivpu_accel.h+1−8
@@ -12,9 +12,6 @@ · 11 unmodified lines
12extern "C" {12extern "C" {
13#endif13#endif
14 14
15#define DRM_IVPU_DRIVER_MAJOR 1
16#define DRM_IVPU_DRIVER_MINOR 0
17
18#define DRM_IVPU_GET_PARAM 0x0015#define DRM_IVPU_GET_PARAM 0x00
19#define DRM_IVPU_SET_PARAM 0x0116#define DRM_IVPU_SET_PARAM 0x01
20#define DRM_IVPU_BO_CREATE 0x0217#define DRM_IVPU_BO_CREATE 0x02
@@ -261,7 +258,7 @@ struct drm_ivpu_bo_info { · 240 unmodified lines
261 258
262/* drm_ivpu_submit engines */259/* drm_ivpu_submit engines */
263#define DRM_IVPU_ENGINE_COMPUTE 0260#define DRM_IVPU_ENGINE_COMPUTE 0
264#define DRM_IVPU_ENGINE_COPY 1261#define DRM_IVPU_ENGINE_COPY 1 /* Deprecated */
265 262
266/**263/**
267 * struct drm_ivpu_submit - Submit commands to the VPU264 * struct drm_ivpu_submit - Submit commands to the VPU
@@ -292,10 +289,6 @@ struct drm_ivpu_submit { · 24 unmodified lines
292 * %DRM_IVPU_ENGINE_COMPUTE:289 * %DRM_IVPU_ENGINE_COMPUTE:
293 *290 *
294 * Performs Deep Learning Neural Compute Inference Operations291 * Performs Deep Learning Neural Compute Inference Operations
295 *
296 * %DRM_IVPU_ENGINE_COPY:
297 *
298 * Performs memory copy operations to/from system memory allocated for VPU
299 */292 */
300 __u32 engine;293 __u32 engine;
301 294
include/uapi/drm/msm_drm.h+4−1
@@ -347,7 +347,10 @@ struct drm_msm_gem_madvise { · 346 unmodified lines
347 * backwards compatibility as a "default" submitqueue347 * backwards compatibility as a "default" submitqueue
348 */348 */
349 349
350#define MSM_SUBMITQUEUE_FLAGS (0)350#define MSM_SUBMITQUEUE_ALLOW_PREEMPT 0x00000001
351#define MSM_SUBMITQUEUE_FLAGS ( \
352 MSM_SUBMITQUEUE_ALLOW_PREEMPT | \
353 0)
351 354
352/*355/*
353 * The submitqueue priority should be between 0 and MSM_PARAM_PRIORITIES-1,356 * The submitqueue priority should be between 0 and MSM_PARAM_PRIORITIES-1,
include/uapi/drm/panfrost_drm.h+3−0
@@ -40,6 +40,7 @@ extern "C" { · 39 unmodified lines
40#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump)40#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump)
41 41
42#define PANFROST_JD_REQ_FS (1 << 0)42#define PANFROST_JD_REQ_FS (1 << 0)
43#define PANFROST_JD_REQ_CYCLE_COUNT (1 << 1)
43/**44/**
44 * struct drm_panfrost_submit - ioctl argument for submitting commands to the 3D45 * struct drm_panfrost_submit - ioctl argument for submitting commands to the 3D
45 * engine.46 * engine.
@@ -172,6 +173,8 @@ enum drm_panfrost_param { · 126 unmodified lines
172 DRM_PANFROST_PARAM_NR_CORE_GROUPS,173 DRM_PANFROST_PARAM_NR_CORE_GROUPS,
173 DRM_PANFROST_PARAM_THREAD_TLS_ALLOC,174 DRM_PANFROST_PARAM_THREAD_TLS_ALLOC,
174 DRM_PANFROST_PARAM_AFBC_FEATURES,175 DRM_PANFROST_PARAM_AFBC_FEATURES,
176 DRM_PANFROST_PARAM_SYSTEM_TIMESTAMP,
177 DRM_PANFROST_PARAM_SYSTEM_TIMESTAMP_FREQUENCY,
175};178};
176 179
177struct drm_panfrost_get_param {180struct drm_panfrost_get_param {
include/uapi/drm/panthor_drm.h+51−0
@@ -260,6 +260,14 @@ enum drm_panthor_dev_query_type { · 259 unmodified lines
260 260
261 /** @DRM_PANTHOR_DEV_QUERY_CSIF_INFO: Query command-stream interface information. */261 /** @DRM_PANTHOR_DEV_QUERY_CSIF_INFO: Query command-stream interface information. */
262 DRM_PANTHOR_DEV_QUERY_CSIF_INFO,262 DRM_PANTHOR_DEV_QUERY_CSIF_INFO,
263
264 /** @DRM_PANTHOR_DEV_QUERY_TIMESTAMP_INFO: Query timestamp information. */
265 DRM_PANTHOR_DEV_QUERY_TIMESTAMP_INFO,
266
267 /**
268 * @DRM_PANTHOR_DEV_QUERY_GROUP_PRIORITIES_INFO: Query allowed group priorities information.
269 */
270 DRM_PANTHOR_DEV_QUERY_GROUP_PRIORITIES_INFO,
263};271};
264 272
265/**273/**
@@ -377,6 +385,42 @@ struct drm_panthor_csif_info { · 111 unmodified lines
377 __u32 pad;385 __u32 pad;
378};386};
379 387
388/**
389 * struct drm_panthor_timestamp_info - Timestamp information
390 *
391 * Structure grouping all queryable information relating to the GPU timestamp.
392 */
393struct drm_panthor_timestamp_info {
394 /**
395 * @timestamp_frequency: The frequency of the timestamp timer or 0 if
396 * unknown.
397 */
398 __u64 timestamp_frequency;
399
400 /** @current_timestamp: The current timestamp. */
401 __u64 current_timestamp;
402
403 /** @timestamp_offset: The offset of the timestamp timer. */
404 __u64 timestamp_offset;
405};
406
407/**
408 * struct drm_panthor_group_priorities_info - Group priorities information
409 *
410 * Structure grouping all queryable information relating to the allowed group priorities.
411 */
412struct drm_panthor_group_priorities_info {
413 /**
414 * @allowed_mask: Bitmask of the allowed group priorities.
415 *
416 * Each bit represents a variant of the enum drm_panthor_group_priority.
417 */
418 __u8 allowed_mask;
419
420 /** @pad: Padding fields, MBZ. */
421 __u8 pad[3];
422};
423
380/**424/**
381 * struct drm_panthor_dev_query - Arguments passed to DRM_PANTHOR_IOCTL_DEV_QUERY425 * struct drm_panthor_dev_query - Arguments passed to DRM_PANTHOR_IOCTL_DEV_QUERY
382 */426 */
@@ -698,6 +742,13 @@ enum drm_panthor_group_priority { · 315 unmodified lines
698 * Requires CAP_SYS_NICE or DRM_MASTER.742 * Requires CAP_SYS_NICE or DRM_MASTER.
699 */743 */
700 PANTHOR_GROUP_PRIORITY_HIGH,744 PANTHOR_GROUP_PRIORITY_HIGH,
745
746 /**
747 * @PANTHOR_GROUP_PRIORITY_REALTIME: Realtime priority group.
748 *
749 * Requires CAP_SYS_NICE or DRM_MASTER.
750 */
751 PANTHOR_GROUP_PRIORITY_REALTIME,
701};752};
702 753
703/**754/**
include/uapi/drm/v3d_drm.h+1−0
@@ -290,6 +290,7 @@ enum drm_v3d_param { · 289 unmodified lines
290 DRM_V3D_PARAM_SUPPORTS_MULTISYNC_EXT,290 DRM_V3D_PARAM_SUPPORTS_MULTISYNC_EXT,
291 DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE,291 DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE,
292 DRM_V3D_PARAM_MAX_PERF_COUNTERS,292 DRM_V3D_PARAM_MAX_PERF_COUNTERS,
293 DRM_V3D_PARAM_SUPPORTS_SUPER_PAGES,
293};294};
294 295
295struct drm_v3d_get_param {296struct drm_v3d_get_param {
include/uapi/drm/xe_drm.h+20−1
@@ -512,7 +512,9 @@ struct drm_xe_query_gt_list { · 511 unmodified lines
512 * containing the following in mask:512 * containing the following in mask:
513 * ``DSS_COMPUTE ff ff ff ff 00 00 00 00``513 * ``DSS_COMPUTE ff ff ff ff 00 00 00 00``
514 * means 32 DSS are available for compute.514 * means 32 DSS are available for compute.
515 * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks515 * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks. This type
516 * may be omitted if the driver is unable to query the mask from the
517 * hardware.
516 * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)518 * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
517 * available per Dual Sub Slices (DSS). For example a query response519 * available per Dual Sub Slices (DSS). For example a query response
518 * containing the following in mask:520 * containing the following in mask:
@@ -1483,6 +1485,7 @@ struct drm_xe_oa_unit { · 964 unmodified lines
1483 /** @capabilities: OA capabilities bit-mask */1485 /** @capabilities: OA capabilities bit-mask */
1484 __u64 capabilities;1486 __u64 capabilities;
1485#define DRM_XE_OA_CAPS_BASE (1 << 0)1487#define DRM_XE_OA_CAPS_BASE (1 << 0)
1488#define DRM_XE_OA_CAPS_SYNCS (1 << 1)
1486 1489
1487 /** @oa_timestamp_freq: OA timestamp freq */1490 /** @oa_timestamp_freq: OA timestamp freq */
1488 __u64 oa_timestamp_freq;1491 __u64 oa_timestamp_freq;
@@ -1632,6 +1635,22 @@ enum drm_xe_oa_property_id { · 143 unmodified lines
1632 * to be disabled for the stream exec queue.1635 * to be disabled for the stream exec queue.
1633 */1636 */
1634 DRM_XE_OA_PROPERTY_NO_PREEMPT,1637 DRM_XE_OA_PROPERTY_NO_PREEMPT,
1638
1639 /**
1640 * @DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array
1641 * specified in @DRM_XE_OA_PROPERTY_SYNCS
1642 */
1643 DRM_XE_OA_PROPERTY_NUM_SYNCS,
1644
1645 /**
1646 * @DRM_XE_OA_PROPERTY_SYNCS: Pointer to struct @drm_xe_sync array
1647 * with array size specified via @DRM_XE_OA_PROPERTY_NUM_SYNCS. OA
1648 * configuration will wait till input fences signal. Output fences
1649 * will signal after the new OA configuration takes effect. For
1650 * @DRM_XE_SYNC_TYPE_USER_FENCE, @addr is a user pointer, similar
1651 * to the VM bind case.
1652 */
1653 DRM_XE_OA_PROPERTY_SYNCS,
1635};1654};
1636 1655
1637/**1656/**
include/uapi/linux/kfd_ioctl.h+4−3
@@ -609,6 +609,7 @@ struct kfd_ioctl_smi_events_args { · 608 unmodified lines
609 * migrate_update: GPU page fault is recovered by 'M' for migrate, 'U' for update609 * migrate_update: GPU page fault is recovered by 'M' for migrate, 'U' for update
610 * rw: 'W' for write page fault, 'R' for read page fault610 * rw: 'W' for write page fault, 'R' for read page fault
611 * rescheduled: 'R' if the queue restore failed and rescheduled to try again611 * rescheduled: 'R' if the queue restore failed and rescheduled to try again
612 * error_code: migrate failure error code, 0 if no error
612 */613 */
613#define KFD_EVENT_FMT_UPDATE_GPU_RESET(reset_seq_num, reset_cause)\614#define KFD_EVENT_FMT_UPDATE_GPU_RESET(reset_seq_num, reset_cause)\
614 "%x %s\n", (reset_seq_num), (reset_cause)615 "%x %s\n", (reset_seq_num), (reset_cause)
@@ -630,9 +631,9 @@ struct kfd_ioctl_smi_events_args { · 15 unmodified lines
630 "%lld -%d @%lx(%lx) %x->%x %x:%x %d\n", (ns), (pid), (start), (size),\631 "%lld -%d @%lx(%lx) %x->%x %x:%x %d\n", (ns), (pid), (start), (size),\
631 (from), (to), (prefetch_loc), (preferred_loc), (migrate_trigger)632 (from), (to), (prefetch_loc), (preferred_loc), (migrate_trigger)
632 633
633#define KFD_EVENT_FMT_MIGRATE_END(ns, pid, start, size, from, to, migrate_trigger)\634#define KFD_EVENT_FMT_MIGRATE_END(ns, pid, start, size, from, to, migrate_trigger, error_code) \
634 "%lld -%d @%lx(%lx) %x->%x %d\n", (ns), (pid), (start), (size),\635 "%lld -%d @%lx(%lx) %x->%x %d %d\n", (ns), (pid), (start), (size),\
635 (from), (to), (migrate_trigger)636 (from), (to), (migrate_trigger), (error_code)
636 637
637#define KFD_EVENT_FMT_QUEUE_EVICTION(ns, pid, node, evict_trigger)\638#define KFD_EVENT_FMT_QUEUE_EVICTION(ns, pid, node, evict_trigger)\
638 "%lld -%d %x %d\n", (ns), (pid), (node), (evict_trigger)639 "%lld -%d %x %d\n", (ns), (pid), (node), (evict_trigger)
include/uapi/linux/kfd_sysfs.h+2−1
@@ -60,7 +60,8 @@ · 59 unmodified lines
60#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x1000000060#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
61#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x2000000061#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000
62#define HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED 0x4000000062#define HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED 0x40000000
63#define HSA_CAP_RESERVED 0x800f800063#define HSA_CAP_PER_QUEUE_RESET_SUPPORTED 0x80000000
64#define HSA_CAP_RESERVED 0x000f8000
64 65
65/* debug_prop bits in node properties */66/* debug_prop bits in node properties */
66#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f67#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f
include/uapi/linux/media-bus-format.h+3−1
@@ -34,7 +34,7 @@ · 33 unmodified lines
34 34
35#define MEDIA_BUS_FMT_FIXED 0x000135#define MEDIA_BUS_FMT_FIXED 0x0001
36 36
37/* RGB - next is 0x1026 */37/* RGB - next is 0x1028 */
38#define MEDIA_BUS_FMT_RGB444_1X12 0x101638#define MEDIA_BUS_FMT_RGB444_1X12 0x1016
39#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x100139#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
40#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x100240#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
@@ -68,6 +68,8 @@ · 27 unmodified lines
68#define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d68#define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d
69#define MEDIA_BUS_FMT_RGB888_1X32_PADHI 0x100f69#define MEDIA_BUS_FMT_RGB888_1X32_PADHI 0x100f
70#define MEDIA_BUS_FMT_RGB101010_1X30 0x101870#define MEDIA_BUS_FMT_RGB101010_1X30 0x1018
71#define MEDIA_BUS_FMT_RGB101010_1X7X5_SPWG 0x1026
72#define MEDIA_BUS_FMT_RGB101010_1X7X5_JEIDA 0x1027
71#define MEDIA_BUS_FMT_RGB666_1X36_CPADLO 0x102073#define MEDIA_BUS_FMT_RGB666_1X36_CPADLO 0x1020
72#define MEDIA_BUS_FMT_RGB888_1X36_CPADLO 0x102174#define MEDIA_BUS_FMT_RGB888_1X36_CPADLO 0x1021
73#define MEDIA_BUS_FMT_RGB121212_1X36 0x101975#define MEDIA_BUS_FMT_RGB121212_1X36 0x1019

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