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ARM: pxa: move platform_data definitions

Platform data for device drivers should be defined in include/linux/platform_data/*.h, not in the architecture and platform specific directories. This moves such data out of the pxa include directories

Arnd Bergmann committed 14 years ago

Commit 293b2da1 parent 2960ed386 files · +188 −188Browse files

Showing the changes to include/linux/platform_data (14 of 86 files). Show all

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14 files
  1. include/linux/platform_data/asoc-palm27x.h +8 −0
  2. include/linux/platform_data/ata-pxa.h +33 −0
  3. include/linux/platform_data/camera-pxa.h +44 −0
  4. include/linux/platform_data/dma-mmp_tdma.h +35 −0
  5. include/linux/platform_data/irda-pxaficp.h +25 −0
  6. include/linux/platform_data/keyboard-pxa930_rotary.h +20 −0
  7. include/linux/platform_data/keypad-pxa27x.h +73 −0
  8. include/linux/platform_data/mmc-pxamci.h +28 −0
  9. include/linux/platform_data/mouse-pxa930_trkball.h +10 −0
  10. include/linux/platform_data/mtd-nand-pxa3xx.h +79 −0
  11. include/linux/platform_data/pcmcia-pxa2xx_viper.h +11 −0
  12. include/linux/platform_data/usb-ohci-pxa27x.h +36 −0
  13. include/linux/platform_data/usb-pxa3xx-ulpi.h +35 −0
  14. include/linux/platform_data/video-pxafb.h +175 −0
include/linux/platform_data/asoc-palm27x.h+8−0
@@ -0,0 +1,8 @@
1+#ifndef _INCLUDE_PALMASOC_H_
2+#define _INCLUDE_PALMASOC_H_
3+
4+struct palm27x_asoc_info {
5+ int jack_gpio;
6+};
7+
8+#endif
include/linux/platform_data/ata-pxa.h+33−0
@@ -0,0 +1,33 @@
1+/*
2+ * Generic PXA PATA driver
3+ *
4+ * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5+ *
6+ * This program is free software; you can redistribute it and/or modify
7+ * it under the terms of the GNU General Public License as published by
8+ * the Free Software Foundation; either version 2, or (at your option)
9+ * any later version.
10+ *
11+ * This program is distributed in the hope that it will be useful,
12+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
13+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14+ * GNU General Public License for more details.
15+ *
16+ * You should have received a copy of the GNU General Public License
17+ * along with this program; see the file COPYING. If not, write to
18+ * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19+ */
20+
21+#ifndef __MACH_PATA_PXA_H__
22+#define __MACH_PATA_PXA_H__
23+
24+struct pata_pxa_pdata {
25+ /* PXA DMA DREQ<0:2> pin */
26+ uint32_t dma_dreq;
27+ /* Register shift */
28+ uint32_t reg_shift;
29+ /* IRQ flags */
30+ uint32_t irq_flags;
31+};
32+
33+#endif /* __MACH_PATA_PXA_H__ */
include/linux/platform_data/camera-pxa.h+44−0
@@ -0,0 +1,44 @@
1+/*
2+ camera.h - PXA camera driver header file
3+
4+ Copyright (C) 2003, Intel Corporation
5+ Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
6+
7+ This program is free software; you can redistribute it and/or modify
8+ it under the terms of the GNU General Public License as published by
9+ the Free Software Foundation; either version 2 of the License, or
10+ (at your option) any later version.
11+
12+ This program is distributed in the hope that it will be useful,
13+ but WITHOUT ANY WARRANTY; without even the implied warranty of
14+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15+ GNU General Public License for more details.
16+
17+ You should have received a copy of the GNU General Public License
18+ along with this program; if not, write to the Free Software
19+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20+*/
21+
22+#ifndef __ASM_ARCH_CAMERA_H_
23+#define __ASM_ARCH_CAMERA_H_
24+
25+#define PXA_CAMERA_MASTER 1
26+#define PXA_CAMERA_DATAWIDTH_4 2
27+#define PXA_CAMERA_DATAWIDTH_5 4
28+#define PXA_CAMERA_DATAWIDTH_8 8
29+#define PXA_CAMERA_DATAWIDTH_9 0x10
30+#define PXA_CAMERA_DATAWIDTH_10 0x20
31+#define PXA_CAMERA_PCLK_EN 0x40
32+#define PXA_CAMERA_MCLK_EN 0x80
33+#define PXA_CAMERA_PCP 0x100
34+#define PXA_CAMERA_HSP 0x200
35+#define PXA_CAMERA_VSP 0x400
36+
37+struct pxacamera_platform_data {
38+ unsigned long flags;
39+ unsigned long mclk_10khz;
40+};
41+
42+extern void pxa_set_camera_info(struct pxacamera_platform_data *);
43+
44+#endif /* __ASM_ARCH_CAMERA_H_ */
include/linux/platform_data/dma-mmp_tdma.h+35−0
@@ -0,0 +1,35 @@
1+/*
2+ * linux/arch/arm/mach-mmp/include/mach/sram.h
3+ *
4+ * SRAM Memory Management
5+ *
6+ * Copyright (c) 2011 Marvell Semiconductors Inc.
7+ *
8+ * This program is free software; you can redistribute it and/or modify
9+ * it under the terms of the GNU General Public License version 2 as
10+ * published by the Free Software Foundation.
11+ *
12+ */
13+
14+#ifndef __ASM_ARCH_SRAM_H
15+#define __ASM_ARCH_SRAM_H
16+
17+#include <linux/genalloc.h>
18+
19+/* ARBITRARY: SRAM allocations are multiples of this 2^N size */
20+#define SRAM_GRANULARITY 512
21+
22+enum sram_type {
23+ MMP_SRAM_UNDEFINED = 0,
24+ MMP_ASRAM,
25+ MMP_ISRAM,
26+};
27+
28+struct sram_platdata {
29+ char *pool_name;
30+ int granularity;
31+};
32+
33+extern struct gen_pool *sram_get_gpool(char *pool_name);
34+
35+#endif /* __ASM_ARCH_SRAM_H */
include/linux/platform_data/irda-pxaficp.h+25−0
@@ -0,0 +1,25 @@
1+#ifndef ASMARM_ARCH_IRDA_H
2+#define ASMARM_ARCH_IRDA_H
3+
4+/* board specific transceiver capabilities */
5+
6+#define IR_OFF 1
7+#define IR_SIRMODE 2
8+#define IR_FIRMODE 4
9+
10+struct pxaficp_platform_data {
11+ int transceiver_cap;
12+ void (*transceiver_mode)(struct device *dev, int mode);
13+ int (*startup)(struct device *dev);
14+ void (*shutdown)(struct device *dev);
15+ int gpio_pwdown; /* powerdown GPIO for the IrDA chip */
16+ bool gpio_pwdown_inverted; /* gpio_pwdown is inverted */
17+};
18+
19+extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);
20+
21+#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
22+void pxa2xx_transceiver_mode(struct device *dev, int mode);
23+#endif
24+
25+#endif
include/linux/platform_data/keyboard-pxa930_rotary.h+20−0
@@ -0,0 +1,20 @@
1+#ifndef __ASM_ARCH_PXA930_ROTARY_H
2+#define __ASM_ARCH_PXA930_ROTARY_H
3+
4+/* NOTE:
5+ *
6+ * rotary can be either interpreted as a ralative input event (e.g.
7+ * REL_WHEEL or REL_HWHEEL) or a specific key event (e.g. UP/DOWN
8+ * or LEFT/RIGHT), depending on if up_key & down_key are assigned
9+ * or rel_code is assigned a non-zero value. When all are non-zero,
10+ * up_key and down_key will be preferred.
11+ */
12+struct pxa930_rotary_platform_data {
13+ int up_key;
14+ int down_key;
15+ int rel_code;
16+};
17+
18+void __init pxa930_set_rotarykey_info(struct pxa930_rotary_platform_data *info);
19+
20+#endif /* __ASM_ARCH_PXA930_ROTARY_H */
include/linux/platform_data/keypad-pxa27x.h+73−0
@@ -0,0 +1,73 @@
1+#ifndef __ASM_ARCH_PXA27x_KEYPAD_H
2+#define __ASM_ARCH_PXA27x_KEYPAD_H
3+
4+#include <linux/input.h>
5+#include <linux/input/matrix_keypad.h>
6+
7+#define MAX_MATRIX_KEY_ROWS (8)
8+#define MAX_MATRIX_KEY_COLS (8)
9+#define MATRIX_ROW_SHIFT (3)
10+#define MAX_DIRECT_KEY_NUM (8)
11+
12+/* pxa3xx keypad platform specific parameters
13+ *
14+ * NOTE:
15+ * 1. direct_key_num indicates the number of keys in the direct keypad
16+ * _plus_ the number of rotary-encoder sensor inputs, this can be
17+ * left as 0 if only rotary encoders are enabled, the driver will
18+ * automatically calculate this
19+ *
20+ * 2. direct_key_map is the key code map for the direct keys, if rotary
21+ * encoder(s) are enabled, direct key 0/1(2/3) will be ignored
22+ *
23+ * 3. rotary can be either interpreted as a relative input event (e.g.
24+ * REL_WHEEL/REL_HWHEEL) or specific keys (e.g. UP/DOWN/LEFT/RIGHT)
25+ *
26+ * 4. matrix key and direct key will use the same debounce_interval by
27+ * default, which should be sufficient in most cases
28+ *
29+ * pxa168 keypad platform specific parameter
30+ *
31+ * NOTE:
32+ * clear_wakeup_event callback is a workaround required to clear the
33+ * keypad interrupt. The keypad wake must be cleared in addition to
34+ * reading the MI/DI bits in the KPC register.
35+ */
36+struct pxa27x_keypad_platform_data {
37+
38+ /* code map for the matrix keys */
39+ unsigned int matrix_key_rows;
40+ unsigned int matrix_key_cols;
41+ unsigned int *matrix_key_map;
42+ int matrix_key_map_size;
43+
44+ /* direct keys */
45+ int direct_key_num;
46+ unsigned int direct_key_map[MAX_DIRECT_KEY_NUM];
47+ /* the key output may be low active */
48+ int direct_key_low_active;
49+ /* give board a chance to choose the start direct key */
50+ unsigned int direct_key_mask;
51+
52+ /* rotary encoders 0 */
53+ int enable_rotary0;
54+ int rotary0_rel_code;
55+ int rotary0_up_key;
56+ int rotary0_down_key;
57+
58+ /* rotary encoders 1 */
59+ int enable_rotary1;
60+ int rotary1_rel_code;
61+ int rotary1_up_key;
62+ int rotary1_down_key;
63+
64+ /* key debounce interval */
65+ unsigned int debounce_interval;
66+
67+ /* clear wakeup event requirement for pxa168 */
68+ void (*clear_wakeup_event)(void);
69+};
70+
71+extern void pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info);
72+
73+#endif /* __ASM_ARCH_PXA27x_KEYPAD_H */
include/linux/platform_data/mmc-pxamci.h+28−0
@@ -0,0 +1,28 @@
1+#ifndef ASMARM_ARCH_MMC_H
2+#define ASMARM_ARCH_MMC_H
3+
4+#include <linux/mmc/host.h>
5+#include <linux/interrupt.h>
6+
7+struct device;
8+struct mmc_host;
9+
10+struct pxamci_platform_data {
11+ unsigned int ocr_mask; /* available voltages */
12+ unsigned long detect_delay_ms; /* delay in millisecond before detecting cards after interrupt */
13+ int (*init)(struct device *, irq_handler_t , void *);
14+ int (*get_ro)(struct device *);
15+ void (*setpower)(struct device *, unsigned int);
16+ void (*exit)(struct device *, void *);
17+ int gpio_card_detect; /* gpio detecting card insertion */
18+ int gpio_card_ro; /* gpio detecting read only toggle */
19+ bool gpio_card_ro_invert; /* gpio ro is inverted */
20+ int gpio_power; /* gpio powering up MMC bus */
21+ bool gpio_power_invert; /* gpio power is inverted */
22+};
23+
24+extern void pxa_set_mci_info(struct pxamci_platform_data *info);
25+extern void pxa3xx_set_mci2_info(struct pxamci_platform_data *info);
26+extern void pxa3xx_set_mci3_info(struct pxamci_platform_data *info);
27+
28+#endif
include/linux/platform_data/mouse-pxa930_trkball.h+10−0
@@ -0,0 +1,10 @@
1+#ifndef __ASM_ARCH_PXA930_TRKBALL_H
2+#define __ASM_ARCH_PXA930_TRKBALL_H
3+
4+struct pxa930_trkball_platform_data {
5+ int x_filter;
6+ int y_filter;
7+};
8+
9+#endif /* __ASM_ARCH_PXA930_TRKBALL_H */
10+
include/linux/platform_data/mtd-nand-pxa3xx.h+79−0
@@ -0,0 +1,79 @@
1+#ifndef __ASM_ARCH_PXA3XX_NAND_H
2+#define __ASM_ARCH_PXA3XX_NAND_H
3+
4+#include <linux/mtd/mtd.h>
5+#include <linux/mtd/partitions.h>
6+
7+struct pxa3xx_nand_timing {
8+ unsigned int tCH; /* Enable signal hold time */
9+ unsigned int tCS; /* Enable signal setup time */
10+ unsigned int tWH; /* ND_nWE high duration */
11+ unsigned int tWP; /* ND_nWE pulse time */
12+ unsigned int tRH; /* ND_nRE high duration */
13+ unsigned int tRP; /* ND_nRE pulse width */
14+ unsigned int tR; /* ND_nWE high to ND_nRE low for read */
15+ unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */
16+ unsigned int tAR; /* ND_ALE low to ND_nRE low delay */
17+};
18+
19+struct pxa3xx_nand_cmdset {
20+ uint16_t read1;
21+ uint16_t read2;
22+ uint16_t program;
23+ uint16_t read_status;
24+ uint16_t read_id;
25+ uint16_t erase;
26+ uint16_t reset;
27+ uint16_t lock;
28+ uint16_t unlock;
29+ uint16_t lock_status;
30+};
31+
32+struct pxa3xx_nand_flash {
33+ char *name;
34+ uint32_t chip_id;
35+ unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */
36+ unsigned int page_size; /* Page size in bytes (PAGE_SZ) */
37+ unsigned int flash_width; /* Width of Flash memory (DWIDTH_M) */
38+ unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */
39+ unsigned int num_blocks; /* Number of physical blocks in Flash */
40+
41+ struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
42+};
43+
44+/*
45+ * Current pxa3xx_nand controller has two chip select which
46+ * both be workable.
47+ *
48+ * Notice should be taken that:
49+ * When you want to use this feature, you should not enable the
50+ * keep configuration feature, for two chip select could be
51+ * attached with different nand chip. The different page size
52+ * and timing requirement make the keep configuration impossible.
53+ */
54+
55+/* The max num of chip select current support */
56+#define NUM_CHIP_SELECT (2)
57+struct pxa3xx_nand_platform_data {
58+
59+ /* the data flash bus is shared between the Static Memory
60+ * Controller and the Data Flash Controller, the arbiter
61+ * controls the ownership of the bus
62+ */
63+ int enable_arbiter;
64+
65+ /* allow platform code to keep OBM/bootloader defined NFC config */
66+ int keep_config;
67+
68+ /* indicate how many chip selects will be used */
69+ int num_cs;
70+
71+ const struct mtd_partition *parts[NUM_CHIP_SELECT];
72+ unsigned int nr_parts[NUM_CHIP_SELECT];
73+
74+ const struct pxa3xx_nand_flash * flash;
75+ size_t num_flash;
76+};
77+
78+extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
79+#endif /* __ASM_ARCH_PXA3XX_NAND_H */
include/linux/platform_data/pcmcia-pxa2xx_viper.h+11−0
@@ -0,0 +1,11 @@
1+#ifndef __ARCOM_PCMCIA_H
2+#define __ARCOM_PCMCIA_H
3+
4+struct arcom_pcmcia_pdata {
5+ int cd_gpio;
6+ int rdy_gpio;
7+ int pwr_gpio;
8+ void (*reset)(int state);
9+};
10+
11+#endif
include/linux/platform_data/usb-ohci-pxa27x.h+36−0
@@ -0,0 +1,36 @@
1+#ifndef ASMARM_ARCH_OHCI_H
2+#define ASMARM_ARCH_OHCI_H
3+
4+struct device;
5+
6+struct pxaohci_platform_data {
7+ int (*init)(struct device *);
8+ void (*exit)(struct device *);
9+
10+ unsigned long flags;
11+#define ENABLE_PORT1 (1 << 0)
12+#define ENABLE_PORT2 (1 << 1)
13+#define ENABLE_PORT3 (1 << 2)
14+#define ENABLE_PORT_ALL (ENABLE_PORT1 | ENABLE_PORT2 | ENABLE_PORT3)
15+
16+#define POWER_SENSE_LOW (1 << 3)
17+#define POWER_CONTROL_LOW (1 << 4)
18+#define NO_OC_PROTECTION (1 << 5)
19+#define OC_MODE_GLOBAL (0 << 6)
20+#define OC_MODE_PERPORT (1 << 6)
21+
22+ int power_on_delay; /* Power On to Power Good time - in ms
23+ * HCD must wait for this duration before
24+ * accessing a powered on port
25+ */
26+ int port_mode;
27+#define PMM_NPS_MODE 1
28+#define PMM_GLOBAL_MODE 2
29+#define PMM_PERPORT_MODE 3
30+
31+ int power_budget;
32+};
33+
34+extern void pxa_set_ohci_info(struct pxaohci_platform_data *info);
35+
36+#endif
include/linux/platform_data/usb-pxa3xx-ulpi.h+35−0
@@ -0,0 +1,35 @@
1+/*
2+ * PXA3xx U2D header
3+ *
4+ * Copyright (C) 2010 CompuLab Ltd.
5+ *
6+ * Igor Grinberg <grinberg@compulab.co.il>
7+ *
8+ * This program is free software; you can redistribute it and/or modify
9+ * it under the terms of the GNU General Public License version 2 as
10+ * published by the Free Software Foundation.
11+ */
12+#ifndef __PXA310_U2D__
13+#define __PXA310_U2D__
14+
15+#include <linux/usb/ulpi.h>
16+
17+struct pxa3xx_u2d_platform_data {
18+
19+#define ULPI_SER_6PIN (1 << 0)
20+#define ULPI_SER_3PIN (1 << 1)
21+ unsigned int ulpi_mode;
22+
23+ int (*init)(struct device *);
24+ void (*exit)(struct device *);
25+};
26+
27+
28+/* Start PXA3xx U2D host */
29+int pxa3xx_u2d_start_hc(struct usb_bus *host);
30+/* Stop PXA3xx U2D host */
31+void pxa3xx_u2d_stop_hc(struct usb_bus *host);
32+
33+extern void pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info);
34+
35+#endif /* __PXA310_U2D__ */
include/linux/platform_data/video-pxafb.h+175−0
@@ -0,0 +1,175 @@
1+/*
2+ * arch/arm/mach-pxa/include/mach/pxafb.h
3+ *
4+ * Support for the xscale frame buffer.
5+ *
6+ * Author: Jean-Frederic Clere
7+ * Created: Sep 22, 2003
8+ * Copyright: jfclere@sinix.net
9+ *
10+ * This program is free software; you can redistribute it and/or modify
11+ * it under the terms of the GNU General Public License version 2 as
12+ * published by the Free Software Foundation.
13+ */
14+
15+#include <linux/fb.h>
16+#include <mach/regs-lcd.h>
17+
18+/*
19+ * Supported LCD connections
20+ *
21+ * bits 0 - 3: for LCD panel type:
22+ *
23+ * STN - for passive matrix
24+ * DSTN - for dual scan passive matrix
25+ * TFT - for active matrix
26+ *
27+ * bits 4 - 9 : for bus width
28+ * bits 10-17 : for AC Bias Pin Frequency
29+ * bit 18 : for output enable polarity
30+ * bit 19 : for pixel clock edge
31+ * bit 20 : for output pixel format when base is RGBT16
32+ */
33+#define LCD_CONN_TYPE(_x) ((_x) & 0x0f)
34+#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f)
35+
36+#define LCD_TYPE_MASK 0xf
37+#define LCD_TYPE_UNKNOWN 0
38+#define LCD_TYPE_MONO_STN 1
39+#define LCD_TYPE_MONO_DSTN 2
40+#define LCD_TYPE_COLOR_STN 3
41+#define LCD_TYPE_COLOR_DSTN 4
42+#define LCD_TYPE_COLOR_TFT 5
43+#define LCD_TYPE_SMART_PANEL 6
44+#define LCD_TYPE_MAX 7
45+
46+#define LCD_MONO_STN_4BPP ((4 << 4) | LCD_TYPE_MONO_STN)
47+#define LCD_MONO_STN_8BPP ((8 << 4) | LCD_TYPE_MONO_STN)
48+#define LCD_MONO_DSTN_8BPP ((8 << 4) | LCD_TYPE_MONO_DSTN)
49+#define LCD_COLOR_STN_8BPP ((8 << 4) | LCD_TYPE_COLOR_STN)
50+#define LCD_COLOR_DSTN_16BPP ((16 << 4) | LCD_TYPE_COLOR_DSTN)
51+#define LCD_COLOR_TFT_8BPP ((8 << 4) | LCD_TYPE_COLOR_TFT)
52+#define LCD_COLOR_TFT_16BPP ((16 << 4) | LCD_TYPE_COLOR_TFT)
53+#define LCD_COLOR_TFT_18BPP ((18 << 4) | LCD_TYPE_COLOR_TFT)
54+#define LCD_SMART_PANEL_8BPP ((8 << 4) | LCD_TYPE_SMART_PANEL)
55+#define LCD_SMART_PANEL_16BPP ((16 << 4) | LCD_TYPE_SMART_PANEL)
56+#define LCD_SMART_PANEL_18BPP ((18 << 4) | LCD_TYPE_SMART_PANEL)
57+
58+#define LCD_AC_BIAS_FREQ(x) (((x) & 0xff) << 10)
59+#define LCD_BIAS_ACTIVE_HIGH (0 << 18)
60+#define LCD_BIAS_ACTIVE_LOW (1 << 18)
61+#define LCD_PCLK_EDGE_RISE (0 << 19)
62+#define LCD_PCLK_EDGE_FALL (1 << 19)
63+#define LCD_ALTERNATE_MAPPING (1 << 20)
64+
65+/*
66+ * This structure describes the machine which we are running on.
67+ * It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine
68+ * of linux/drivers/video/pxafb.c
69+ */
70+struct pxafb_mode_info {
71+ u_long pixclock;
72+
73+ u_short xres;
74+ u_short yres;
75+
76+ u_char bpp;
77+ u_int cmap_greyscale:1,
78+ depth:8,
79+ transparency:1,
80+ unused:22;
81+
82+ /* Parallel Mode Timing */
83+ u_char hsync_len;
84+ u_char left_margin;
85+ u_char right_margin;
86+
87+ u_char vsync_len;
88+ u_char upper_margin;
89+ u_char lower_margin;
90+ u_char sync;
91+
92+ /* Smart Panel Mode Timing - see PXA27x DM 7.4.15.0.3 for details
93+ * Note:
94+ * 1. all parameters in nanosecond (ns)
95+ * 2. a0cs{rd,wr}_set_hld are controlled by the same register bits
96+ * in pxa27x and pxa3xx, initialize them to the same value or
97+ * the larger one will be used
98+ * 3. same to {rd,wr}_pulse_width
99+ *
100+ * 4. LCD_PCLK_EDGE_{RISE,FALL} controls the L_PCLK_WR polarity
101+ * 5. sync & FB_SYNC_HOR_HIGH_ACT controls the L_LCLK_A0
102+ * 6. sync & FB_SYNC_VERT_HIGH_ACT controls the L_LCLK_RD
103+ */
104+ unsigned a0csrd_set_hld; /* A0 and CS Setup/Hold Time before/after L_FCLK_RD */
105+ unsigned a0cswr_set_hld; /* A0 and CS Setup/Hold Time before/after L_PCLK_WR */
106+ unsigned wr_pulse_width; /* L_PCLK_WR pulse width */
107+ unsigned rd_pulse_width; /* L_FCLK_RD pulse width */
108+ unsigned cmd_inh_time; /* Command Inhibit time between two writes */
109+ unsigned op_hold_time; /* Output Hold time from L_FCLK_RD negation */
110+};
111+
112+struct pxafb_mach_info {
113+ struct pxafb_mode_info *modes;
114+ unsigned int num_modes;
115+
116+ unsigned int lcd_conn;
117+ unsigned long video_mem_size;
118+
119+ u_int fixed_modes:1,
120+ cmap_inverse:1,
121+ cmap_static:1,
122+ acceleration_enabled:1,
123+ unused:28;
124+
125+ /* The following should be defined in LCCR0
126+ * LCCR0_Act or LCCR0_Pas Active or Passive
127+ * LCCR0_Sngl or LCCR0_Dual Single/Dual panel
128+ * LCCR0_Mono or LCCR0_Color Mono/Color
129+ * LCCR0_4PixMono or LCCR0_8PixMono (in mono single mode)
130+ * LCCR0_DMADel(Tcpu) (optional) DMA request delay
131+ *
132+ * The following should not be defined in LCCR0:
133+ * LCCR0_OUM, LCCR0_BM, LCCR0_QDM, LCCR0_DIS, LCCR0_EFM
134+ * LCCR0_IUM, LCCR0_SFM, LCCR0_LDM, LCCR0_ENB
135+ */
136+ u_int lccr0;
137+ /* The following should be defined in LCCR3
138+ * LCCR3_OutEnH or LCCR3_OutEnL Output enable polarity
139+ * LCCR3_PixRsEdg or LCCR3_PixFlEdg Pixel clock edge type
140+ * LCCR3_Acb(X) AB Bias pin frequency
141+ * LCCR3_DPC (optional) Double Pixel Clock mode (untested)
142+ *
143+ * The following should not be defined in LCCR3
144+ * LCCR3_HSP, LCCR3_VSP, LCCR0_Pcd(x), LCCR3_Bpp
145+ */
146+ u_int lccr3;
147+ /* The following should be defined in LCCR4
148+ * LCCR4_PAL_FOR_0 or LCCR4_PAL_FOR_1 or LCCR4_PAL_FOR_2
149+ *
150+ * All other bits in LCCR4 should be left alone.
151+ */
152+ u_int lccr4;
153+ void (*pxafb_backlight_power)(int);
154+ void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
155+ void (*smart_update)(struct fb_info *);
156+};
157+
158+void pxa_set_fb_info(struct device *, struct pxafb_mach_info *);
159+unsigned long pxafb_get_hsync_time(struct device *dev);
160+
161+#ifdef CONFIG_FB_PXA_SMARTPANEL
162+extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int);
163+extern int pxafb_smart_flush(struct fb_info *info);
164+#else
165+static inline int pxafb_smart_queue(struct fb_info *info,
166+ uint16_t *cmds, int n)
167+{
168+ return 0;
169+}
170+
171+static inline int pxafb_smart_flush(struct fb_info *info)
172+{
173+ return 0;
174+}
175+#endif