soundwire: bus: initialize bus clock base and scale registers

The SoundWire 1.2 specification adds new registers to allow for seamless clock changes while audio transfers are on-going. Program them following the specification. Note that dynamic clock changes are not supported for now, this only adds the register initialization.

Pierre-Louis Bossart committed 6 years ago

Commit 29d158f1 parent b5924262 files · +117 −0Browse files

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include/linux/soundwire/sdw_registers.h+10−0

@@ -109,8 +109,18 @@ · 108 unmodified lines
109	109	#define SDW_SCP_KEEPEREN 0x4A
110	110	#define SDW_SCP_BANKDELAY 0x4B
111	111	#define SDW_SCP_COMMIT 0x4C
	112	+
112	113	#define SDW_SCP_BUS_CLOCK_BASE 0x4D
113	114	#define SDW_SCP_BASE_CLOCK_FREQ GENMASK(2, 0)
	115	+#define SDW_SCP_BASE_CLOCK_UNKNOWN 0x0
	116	+#define SDW_SCP_BASE_CLOCK_19200000_HZ 0x1
	117	+#define SDW_SCP_BASE_CLOCK_24000000_HZ 0x2
	118	+#define SDW_SCP_BASE_CLOCK_24576000_HZ 0x3
	119	+#define SDW_SCP_BASE_CLOCK_22579200_HZ 0x4
	120	+#define SDW_SCP_BASE_CLOCK_32000000_HZ 0x5
	121	+#define SDW_SCP_BASE_CLOCK_RESERVED 0x6
	122	+#define SDW_SCP_BASE_CLOCK_IMP_DEF 0x7
	123	+
114	124	/* 0x4E is not allocated in SoundWire specification 1.2 */
115	125	#define SDW_SCP_TESTMODE 0x4F
116	126	#define SDW_SCP_DEVID_0 0x50