Pull irq updates from Thomas Gleixner: "The irq departement provides the usual mixed bag: Core: - Further improvements to the irq timings code which aims to predict the next interrupt for power state selection to achieve better latency/power balance - Add interrupt statistics to the core NMI handlers - The usual small fixes and cleanups Drivers: - Support for Renesas RZ/A1, Annapurna Labs FIC, Meson-G12A SoC and Amazon Gravition AMR/GIC interrupt controllers. - Rework of the Renesas INTC controller driver - ACPI support for Socionext SoCs - Enhancements to the CSKY interrupt controller - The usual small fixes and cleanups" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (39 commits) irq/irqdomain: Fix comment typo genirq: Update irq stats from NMI handlers irqchip/gic-pm: Remove PM_CLK dependency irqchip/al-fic: Introduce Amazon's Annapurna Labs Fabric Interrupt Controller Driver dt-bindings: interrupt-controller: Add Amazon's Annapurna Labs FIC softirq: Use __this_cpu_write() in takeover_tasklets() irqchip/mbigen: Stop printing kernel addresses irqchip/gic: Add dependency for ARM_GIC_MAX_NR genirq/affinity: Remove unused argument from [__]irq_build_affinity_masks() genirq/timings: Add selftest for next event computation genirq/timings: Add selftest for irqs circular buffer genirq/timings: Add selftest for circular array genirq/timings: Encapsulate storing function genirq/timings: Encapsulate timings push genirq/timings: Optimize the period detection speed genirq/timings: Fix timings buffer inspection genirq/timings: Fix next event index function irqchip/qcom: Use struct_size() in devm_kzalloc() irqchip/irq-csky-mpintc: Remove unnecessary loop in interrupt handler dt-bindings: interrupt-controller: Update csky mpintc ...
Showing the changes to include/linux (3 of 32 files). Show all
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| @@ -10,6 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | |
| 11 | 11 | #include <linux/errno.h> |
| 12 | 12 | #include <linux/ioport.h> /* for struct resource */ |
| 13 | +#include <linux/irqdomain.h> | |
| 13 | 14 | #include <linux/resource_ext.h> |
| 14 | 15 | #include <linux/device.h> |
| 15 | 16 | #include <linux/property.h> |
| @@ -314,6 +315,12 @@ int acpi_isa_irq_to_gsi (unsigned isa_irq, u32 *gsi); · 298 unmodified lines | ||
| 314 | 315 | void acpi_set_irq_model(enum acpi_irq_model_id model, |
| 315 | 316 | struct fwnode_handle *fwnode); |
| 316 | 317 | |
| 318 | +struct irq_domain *acpi_irq_create_hierarchy(unsigned int flags, | |
| 319 | + unsigned int size, | |
| 320 | + struct fwnode_handle *fwnode, | |
| 321 | + const struct irq_domain_ops *ops, | |
| 322 | + void *host_data); | |
| 323 | + | |
| 317 | 324 | #ifdef CONFIG_X86_IO_APIC |
| 318 | 325 | extern int acpi_get_override_irq(u32 gsi, int *trigger, int *polarity); |
| 319 | 326 | #else |
| @@ -36,4 +36,9 @@ struct gic_kvm_info { · 35 unmodified lines | ||
| 36 | 36 | |
| 37 | 37 | const struct gic_kvm_info *gic_get_kvm_info(void); |
| 38 | 38 | |
| 39 | +struct irq_domain; | |
| 40 | +struct fwnode_handle; | |
| 41 | +int gicv2m_init(struct fwnode_handle *parent_handle, | |
| 42 | + struct irq_domain *parent); | |
| 43 | + | |
| 39 | 44 | #endif /* __LINUX_IRQCHIP_ARM_GIC_COMMON_H */ |
| @@ -157,9 +157,6 @@ int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq); · 156 unmodified lines | ||
| 157 | 157 | */ |
| 158 | 158 | void gic_init(void __iomem *dist , void __iomem *cpu); |
| 159 | 159 | |
| 160 | −int gicv2m_init(struct fwnode_handle *parent_handle, | |
| 161 | − struct irq_domain *parent); | |
| 162 | − | |
| 163 | 160 | void gic_send_sgi(unsigned int cpu_id, unsigned int irq); |
| 164 | 161 | int gic_get_cpu_id(unsigned int cpu); |
| 165 | 162 | void gic_migrate_target(unsigned int new_cpu_id); |