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drm/vmwgfx: Add surface define v4 command

Surface define v4 added new member buffer_byte_stride. With this patch add buffer_byte_stride in surface metadata and create surface using new command if support is available. Also with this patch replace device specific data types with kernel types.

Deepak Rawat committed 7 years ago

Commit 2a50f061 parent 504901d3 files · +43 −7Browse files

Unified · Split

3 files
  1. drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +2 −0
  2. drivers/gpu/drm/vmwgfx/vmwgfx_surface.c +34 −2
  3. include/uapi/drm/vmwgfx_drm.h +7 −5
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h+2−0
@@ -238,6 +238,7 @@ struct vmw_surface_offset; · 237 unmodified lines
238 * @array_size: Number of array elements for a 1D/2D texture. For cubemap238 * @array_size: Number of array elements for a 1D/2D texture. For cubemap
239 texture number of faces * array_size. This should be 0 for pre239 texture number of faces * array_size. This should be 0 for pre
240 SM4 device.240 SM4 device.
241 * @buffer_byte_stride: Buffer byte stride.
241 * @num_sizes: Size of @sizes. For GB surface this should always be 1.242 * @num_sizes: Size of @sizes. For GB surface this should always be 1.
242 * @base_size: Surface dimension.243 * @base_size: Surface dimension.
243 * @sizes: Array representing mip sizes. Legacy only.244 * @sizes: Array representing mip sizes. Legacy only.
@@ -255,6 +256,7 @@ struct vmw_surface_metadata { · 11 unmodified lines
255 u32 autogen_filter;256 u32 autogen_filter;
256 u32 array_size;257 u32 array_size;
257 u32 num_sizes;258 u32 num_sizes;
259 u32 buffer_byte_stride;
258 struct drm_vmw_size base_size;260 struct drm_vmw_size base_size;
259 struct drm_vmw_size *sizes;261 struct drm_vmw_size *sizes;
260 bool scanout;262 bool scanout;
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c+34−2
@@ -1082,6 +1082,10 @@ static int vmw_gb_surface_create(struct vmw_resource *res) · 1081 unmodified lines
1082 SVGA3dCmdHeader header;1082 SVGA3dCmdHeader header;
1083 SVGA3dCmdDefineGBSurface_v3 body;1083 SVGA3dCmdDefineGBSurface_v3 body;
1084 } *cmd3;1084 } *cmd3;
1085 struct {
1086 SVGA3dCmdHeader header;
1087 SVGA3dCmdDefineGBSurface_v4 body;
1088 } *cmd4;
1085 1089
1086 if (likely(res->id != -1))1090 if (likely(res->id != -1))
1087 return 0;1091 return 0;
@@ -1098,7 +1102,11 @@ static int vmw_gb_surface_create(struct vmw_resource *res) · 10 unmodified lines
1098 goto out_no_fifo;1102 goto out_no_fifo;
1099 }1103 }
1100 1104
1101 if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {1105 if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
1106 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V4;
1107 cmd_len = sizeof(cmd4->body);
1108 submit_len = sizeof(*cmd4);
1109 } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1102 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;1110 cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
1103 cmd_len = sizeof(cmd3->body);1111 cmd_len = sizeof(cmd3->body);
1104 submit_len = sizeof(*cmd3);1112 submit_len = sizeof(*cmd3);
@@ -1116,12 +1124,29 @@ static int vmw_gb_surface_create(struct vmw_resource *res) · 11 unmodified lines
1116 cmd = VMW_FIFO_RESERVE(dev_priv, submit_len);1124 cmd = VMW_FIFO_RESERVE(dev_priv, submit_len);
1117 cmd2 = (typeof(cmd2))cmd;1125 cmd2 = (typeof(cmd2))cmd;
1118 cmd3 = (typeof(cmd3))cmd;1126 cmd3 = (typeof(cmd3))cmd;
1127 cmd4 = (typeof(cmd4))cmd;
1119 if (unlikely(!cmd)) {1128 if (unlikely(!cmd)) {
1120 ret = -ENOMEM;1129 ret = -ENOMEM;
1121 goto out_no_fifo;1130 goto out_no_fifo;
1122 }1131 }
1123 1132
1124 if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {1133 if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
1134 cmd4->header.id = cmd_id;
1135 cmd4->header.size = cmd_len;
1136 cmd4->body.sid = srf->res.id;
1137 cmd4->body.surfaceFlags = metadata->flags;
1138 cmd4->body.format = metadata->format;
1139 cmd4->body.numMipLevels = metadata->mip_levels[0];
1140 cmd4->body.multisampleCount = metadata->multisample_count;
1141 cmd4->body.multisamplePattern = metadata->multisample_pattern;
1142 cmd4->body.qualityLevel = metadata->quality_level;
1143 cmd4->body.autogenFilter = metadata->autogen_filter;
1144 cmd4->body.size.width = metadata->base_size.width;
1145 cmd4->body.size.height = metadata->base_size.height;
1146 cmd4->body.size.depth = metadata->base_size.depth;
1147 cmd4->body.arraySize = metadata->array_size;
1148 cmd4->body.bufferByteStride = metadata->buffer_byte_stride;
1149 } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1125 cmd3->header.id = cmd_id;1150 cmd3->header.id = cmd_id;
1126 cmd3->header.size = cmd_len;1151 cmd3->header.size = cmd_len;
1127 cmd3->body.sid = srf->res.id;1152 cmd3->body.sid = srf->res.id;
@@ -1341,6 +1366,7 @@ int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data, · 213 unmodified lines
1341 req_ext.svga3d_flags_upper_32_bits = 0;1366 req_ext.svga3d_flags_upper_32_bits = 0;
1342 req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;1367 req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
1343 req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;1368 req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
1369 req_ext.buffer_byte_stride = 0;
1344 req_ext.must_be_zero = 0;1370 req_ext.must_be_zero = 0;
1345 1371
1346 return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);1372 return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
@@ -1467,6 +1493,11 @@ vmw_gb_surface_define_internal(struct drm_device *dev, · 120 unmodified lines
1467 }1493 }
1468 }1494 }
1469 1495
1496 if (req->buffer_byte_stride > 0 && !has_sm5_context(dev_priv)) {
1497 VMW_DEBUG_USER("SM5 surface not supported.\n");
1498 return -EINVAL;
1499 }
1500
1470 if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&1501 if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
1471 req->base.multisample_count == 0) {1502 req->base.multisample_count == 0) {
1472 VMW_DEBUG_USER("Invalid sample count.\n");1503 VMW_DEBUG_USER("Invalid sample count.\n");
@@ -1491,6 +1522,7 @@ vmw_gb_surface_define_internal(struct drm_device *dev, · 18 unmodified lines
1491 metadata.multisample_pattern = req->multisample_pattern;1522 metadata.multisample_pattern = req->multisample_pattern;
1492 metadata.quality_level = req->quality_level;1523 metadata.quality_level = req->quality_level;
1493 metadata.array_size = req->base.array_size;1524 metadata.array_size = req->base.array_size;
1525 metadata.buffer_byte_stride = req->buffer_byte_stride;
1494 metadata.num_sizes = 1;1526 metadata.num_sizes = 1;
1495 metadata.base_size = req->base.base_size;1527 metadata.base_size = req->base.base_size;
1496 metadata.scanout = req->base.drm_surface_flags &1528 metadata.scanout = req->base.drm_surface_flags &
include/uapi/drm/vmwgfx_drm.h+7−5
@@ -1133,7 +1133,7 @@ struct drm_vmw_handle_close_arg { · 1132 unmodified lines
1133 * svga3d surface flags split into 2, upper half and lower half.1133 * svga3d surface flags split into 2, upper half and lower half.
1134 */1134 */
1135enum drm_vmw_surface_version {1135enum drm_vmw_surface_version {
1136 drm_vmw_gb_surface_v11136 drm_vmw_gb_surface_v1,
1137};1137};
1138 1138
1139/**1139/**
@@ -1144,6 +1144,7 @@ enum drm_vmw_surface_version { · 4 unmodified lines
1144 * @svga3d_flags_upper_32_bits: Upper 32 bits of svga3d flags.1144 * @svga3d_flags_upper_32_bits: Upper 32 bits of svga3d flags.
1145 * @multisample_pattern: Multisampling pattern when msaa is supported.1145 * @multisample_pattern: Multisampling pattern when msaa is supported.
1146 * @quality_level: Precision settings for each sample.1146 * @quality_level: Precision settings for each sample.
1147 * @buffer_byte_stride: Buffer byte stride.
1147 * @must_be_zero: Reserved for future usage.1148 * @must_be_zero: Reserved for future usage.
1148 *1149 *
1149 * Input argument to the DRM_VMW_GB_SURFACE_CREATE_EXT Ioctl.1150 * Input argument to the DRM_VMW_GB_SURFACE_CREATE_EXT Ioctl.
@@ -1152,10 +1153,11 @@ enum drm_vmw_surface_version { · 2 unmodified lines
1152struct drm_vmw_gb_surface_create_ext_req {1153struct drm_vmw_gb_surface_create_ext_req {
1153 struct drm_vmw_gb_surface_create_req base;1154 struct drm_vmw_gb_surface_create_req base;
1154 enum drm_vmw_surface_version version;1155 enum drm_vmw_surface_version version;
1155 uint32_t svga3d_flags_upper_32_bits;1156 __u32 svga3d_flags_upper_32_bits;
1156 SVGA3dMSPattern multisample_pattern;1157 __u32 multisample_pattern;
1157 SVGA3dMSQualityLevel quality_level;1158 __u32 quality_level;
1158 uint64_t must_be_zero;1159 __u32 buffer_byte_stride;
1160 __u32 must_be_zero;
1159};1161};
1160 1162
1161/**1163/**

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