History

Merge drm/drm-next into drm-intel-next-queued

Pull in v4.20-rc3 via drm-next.

Jani Nikula committed 7 years ago

Commit 2ac5e382 parents f48cc64 9235dd410556 files · +521421 −238659Browse files

Unified · Split

3201 files
  1. .clang-format +0 −1
  2. .mailmap +13 −0
  3. CREDITS +4 −0
  4. Documentation/00-INDEX +0 −428
  5. Documentation/ABI/stable/sysfs-driver-usb-usbtmc +0 −35
  6. Documentation/ABI/testing/configfs-stp-policy-p_sys-t +41 −0
  7. Documentation/ABI/testing/configfs-usb-gadget-uvc +24 −0
  8. Documentation/ABI/testing/sysfs-bus-iio +1 −1
  9. Documentation/ABI/testing/sysfs-bus-pci +24 −0
  10. Documentation/ABI/testing/sysfs-bus-usb +18 −1
  11. Documentation/ABI/testing/sysfs-bus-vmbus +21 −0
  12. Documentation/ABI/testing/sysfs-class-lcd-s6e63m0 +0 −27
  13. Documentation/ABI/testing/sysfs-class-led-driver-sc27xx +22 −0
  14. Documentation/ABI/testing/sysfs-class-led-trigger-pattern +82 −0
  15. Documentation/ABI/testing/sysfs-class-net +20 −2
  16. Documentation/ABI/testing/sysfs-class-net-dsa +7 −0
  17. Documentation/ABI/testing/sysfs-fs-f2fs +16 −1
  18. Documentation/ABI/testing/sysfs-platform-lg-laptop +35 −0
  19. Documentation/ABI/testing/sysfs-power +1 −1
  20. Documentation/PCI/00-INDEX +0 −26
  21. Documentation/PCI/endpoint/pci-test-howto.txt +11 −8
  22. Documentation/PCI/pci-error-recovery.txt +10 −25
  23. Documentation/RCU/00-INDEX +0 −34
  24. Documentation/RCU/Design/Data-Structures/Data-Structures.html +12 −19
  25. Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.html +4 −5
  26. Documentation/RCU/Design/Requirements/Requirements.html +72 −142
  27. Documentation/RCU/rcu.txt +0 −4
  28. Documentation/RCU/stallwarn.txt +5 −8
  29. Documentation/RCU/whatisRCU.txt +2 −1
  30. Documentation/accounting/psi.txt +73 −0
  31. Documentation/admin-guide/LSM/Yama.rst +2 −2
  32. Documentation/admin-guide/README.rst +1 −2
  33. Documentation/admin-guide/cgroup-v2.rst +22 −0
  34. Documentation/admin-guide/ext4.rst +574 −0
  35. Documentation/admin-guide/index.rst +1 −0
  36. Documentation/admin-guide/kernel-parameters.txt +61 −19
  37. Documentation/admin-guide/l1tf.rst +1 −1
  38. Documentation/admin-guide/mm/index.rst +1 −0
  39. Documentation/admin-guide/mm/memory-hotplug.rst +63 −126
  40. Documentation/admin-guide/pm/cpufreq.rst +1 −1
  41. Documentation/admin-guide/pm/intel_pstate.rst +7 −0
  42. Documentation/admin-guide/security-bugs.rst +29 −18
  43. Documentation/arm/00-INDEX +0 −50
  44. Documentation/arm/Samsung/Bootloader-interface.txt +1 −0
  45. Documentation/arm64/elf_hwcaps.txt +8 −4
  46. Documentation/arm64/hugetlbpage.txt +38 −0
  47. Documentation/arm64/silicon-errata.txt +1 −0
  48. Documentation/block/00-INDEX +0 −34
  49. Documentation/blockdev/00-INDEX +0 −18
  50. Documentation/blockdev/README.DAC960 +0 −756
  51. Documentation/blockdev/zram.txt +1 −1
  52. Documentation/cdrom/00-INDEX +0 −11
  53. Documentation/cgroup-v1/00-INDEX +0 −26
  54. Documentation/cgroup-v1/rdma.txt +1 −1
  55. Documentation/conf.py +7 −3
  56. Documentation/core-api/boot-time-mm.rst +10 −61
  57. Documentation/core-api/gfp_mask-from-fs-io.rst +2 −0
  58. Documentation/core-api/idr.rst +1 −1
  59. Documentation/core-api/index.rst +4 −0
  60. Documentation/core-api/memory-allocation.rst +122 −0
  61. Documentation/core-api/memory-hotplug.rst +125 −0
  62. Documentation/core-api/mm-api.rst +2 −0
  63. Documentation/core-api/printk-formats.rst +5 −6
  64. Documentation/core-api/xarray.rst +435 −0
  65. Documentation/cpu-freq/cpufreq-stats.txt +5 −3
  66. Documentation/crypto/asymmetric-keys.txt +21 −5
  67. Documentation/dev-tools/coccinelle.rst +19 −4
  68. Documentation/dev-tools/kselftest.rst +1 −1
  69. Documentation/device-mapper/dm-flakey.txt +4 −0
  70. Documentation/device-mapper/log-writes.txt +1 −1
  71. Documentation/devicetree/00-INDEX +0 −12
  72. Documentation/devicetree/bindings/arm/al,alpine.txt +0 −72
  73. Documentation/devicetree/bindings/arm/amlogic.txt +7 −0
  74. Documentation/devicetree/bindings/arm/atmel-at91.txt +0 −170
  75. Documentation/devicetree/bindings/arm/atmel-sysregs.txt +171 −0
  76. Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt +8 −0
  77. Documentation/devicetree/bindings/arm/coresight.txt +65 −55
  78. Documentation/devicetree/bindings/arm/cpu-capacity.txt +5 −3
  79. Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp +31 −3
  80. Documentation/devicetree/bindings/arm/cpus.txt +2 −2
  81. Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt +19 −0
  82. Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt +19 −0
  83. Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +183 −0
  84. Documentation/devicetree/bindings/arm/fsl.txt +44 −39
  85. Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +8 −0
  86. Documentation/devicetree/bindings/arm/keystone/ti,sci.txt +4 −0
  87. Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt +1 −0
  88. Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt +1 −0
  89. Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt +1 −0
  90. Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt +1 −0
  91. Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt +1 −0
  92. Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt +1 −0
  93. Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt +1 −0
  94. Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt +1 −0
  95. Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt +1 −0
  96. Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt +1 −0
  97. Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt +1 −0
  98. Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt +19 −0
  99. Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt +44 −0
  100. Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt +17 −2
  101. Documentation/devicetree/bindings/arm/rockchip.txt +20 −0
  102. Documentation/devicetree/bindings/arm/scu.txt +1 −1
  103. Documentation/devicetree/bindings/arm/secure.txt +18 −1
  104. Documentation/devicetree/bindings/arm/shmobile.txt +12 −4
  105. Documentation/devicetree/bindings/arm/syna.txt +10 −1
  106. Documentation/devicetree/bindings/arm/tegra.txt +7 −2
  107. Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt +93 −0
  108. Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt +103 −0
  109. Documentation/devicetree/bindings/arm/ux500/boards.txt +1 −1
  110. Documentation/devicetree/bindings/arm/zte,sysctrl.txt +30 −0
  111. Documentation/devicetree/bindings/arm/zte.txt +1 −26
  112. Documentation/devicetree/bindings/ata/ahci-platform.txt +5 −1
  113. Documentation/devicetree/bindings/ata/brcm,sata-brcm.txt +1 −0
  114. Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt +6 −3
  115. Documentation/devicetree/bindings/clock/actions,owl-cmu.txt +2 −0
  116. Documentation/devicetree/bindings/clock/at91-clock.txt +21 −495
  117. Documentation/devicetree/bindings/clock/hi3670-clock.txt +43 −0
  118. Documentation/devicetree/bindings/clock/imx6q-clock.txt +8 −0
  119. Documentation/devicetree/bindings/clock/ingenic,cgu.txt +5 −2
  120. Documentation/devicetree/bindings/clock/qcom,camcc.txt +18 −0
  121. Documentation/devicetree/bindings/clock/qcom,gcc.txt +3 −0
  122. Documentation/devicetree/bindings/clock/qcom,hfpll.txt +60 −0
  123. Documentation/devicetree/bindings/clock/qcom,krait-cc.txt +34 −0
  124. Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt +11 −6
  125. Documentation/devicetree/bindings/connector/usb-connector.txt +4 −4
  126. Documentation/devicetree/bindings/cpufreq/arm_big_little_dt.txt +0 −65
  127. Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt +1 −1
  128. Documentation/devicetree/bindings/csky/cpus.txt +73 −0
  129. Documentation/devicetree/bindings/display/himax,hx8357d.txt +26 −0
  130. Documentation/devicetree/bindings/display/panel/bananapi,s070wv20-ct16.txt +12 −0
  131. Documentation/devicetree/bindings/display/panel/cdtech,s043wq26h-ct7.txt +12 −0
  132. Documentation/devicetree/bindings/display/panel/cdtech,s070wv95-ct16.txt +12 −0
  133. Documentation/devicetree/bindings/display/panel/dlc,dlc1010gig.txt +12 −0
  134. Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt +42 −0
  135. Documentation/devicetree/bindings/display/panel/samsung,s6d16d0.txt +30 −0
  136. Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt +3 −0
  137. Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +21 −9
  138. Documentation/devicetree/bindings/display/truly,nt35597.txt +59 −0
  139. Documentation/devicetree/bindings/dma/jz4780-dma.txt +10 −4
  140. Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt +1 −0
  141. Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt +1 −0
  142. Documentation/devicetree/bindings/firmware/qcom,scm.txt +21 −12
  143. Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt +82 −0
  144. Documentation/devicetree/bindings/fpga/fpga-region.txt +2 −2
  145. Documentation/devicetree/bindings/gpio/gpio.txt +75 −67
  146. Documentation/devicetree/bindings/gpio/ingenic,gpio.txt +0 −46
  147. Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt +38 −27
  148. Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt +21 −0
  149. Documentation/devicetree/bindings/hwmon/ina3221.txt +44 −0
  150. Documentation/devicetree/bindings/hwmon/ltc2978.txt +2 −0
  151. Documentation/devicetree/bindings/i2c/i2c-designware.txt +6 −1
  152. Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt +1 −0
  153. Documentation/devicetree/bindings/i2c/i2c-omap.txt +6 −2
  154. Documentation/devicetree/bindings/i2c/i2c-rcar.txt +2 −0
  155. Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt +1 −0
  156. Documentation/devicetree/bindings/i2c/i2c.txt +1 −1
  157. Documentation/devicetree/bindings/iio/accel/adxl372.txt +33 −0
  158. Documentation/devicetree/bindings/iio/adc/mcp3911.txt +30 −0
  159. Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt +60 −21
  160. Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt +4 −0
  161. Documentation/devicetree/bindings/iio/dac/ad5758.txt +5 −0
  162. Documentation/devicetree/bindings/iio/dac/ltc1660.txt +21 −0
  163. Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt +1 −0
  164. Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt +1 −0
  165. Documentation/devicetree/bindings/iio/light/bh1750.txt +18 −0
  166. Documentation/devicetree/bindings/iio/light/tsl2772.txt +42 −0
  167. Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt +12 −0
  168. Documentation/devicetree/bindings/input/pwm-vibrator.txt +2 −2
  169. Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt +4 −2
  170. Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt +62 −0
  171. Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt +40 −0
  172. Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt +73 −12
  173. Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt +36 −0
  174. Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt +4 −1
  175. Documentation/devicetree/bindings/iommu/mediatek,iommu.txt +3 −1
  176. Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt +1 −0
  177. Documentation/devicetree/bindings/leds/leds-an30259a.txt +43 −0
  178. Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt +1 −0
  179. Documentation/devicetree/bindings/media/cedrus.txt +54 −0
  180. Documentation/devicetree/bindings/media/fsl-pxp.txt +26 −0
  181. Documentation/devicetree/bindings/media/i2c/adv748x.txt +16 −4
  182. Documentation/devicetree/bindings/media/i2c/adv7604.txt +1 −1
  183. Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt +0 −0
  184. Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt +1 −0
  185. Documentation/devicetree/bindings/media/rcar_vin.txt +1 −0
  186. Documentation/devicetree/bindings/media/renesas,ceu.txt +9 −5
  187. Documentation/devicetree/bindings/media/rockchip-vpu.txt +29 −0
  188. Documentation/devicetree/bindings/media/video-interfaces.txt +3 −1
  189. Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt +1 −0
  190. Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt +2 −1
  191. Documentation/devicetree/bindings/mfd/arizona.txt +1 −1
  192. Documentation/devicetree/bindings/mfd/atmel-usart.txt +23 −2
  193. Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt +9 −8
  194. Documentation/devicetree/bindings/mips/mscc.txt +16 −0
  195. Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt +39 −0
  196. Documentation/devicetree/bindings/misc/lwn-bk4.txt +26 −0
  197. Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +1 −0
  198. Documentation/devicetree/bindings/mmc/jz4740.txt +1 −0
  199. Documentation/devicetree/bindings/mmc/mmci.txt +11 −0
  200. Documentation/devicetree/bindings/mmc/mtk-sd.txt +2 −0
  201. Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt +72 −0
  202. Documentation/devicetree/bindings/mmc/renesas,mmcif.txt +3 −1
  203. Documentation/devicetree/bindings/mmc/sdhci-sprd.txt +41 −0
  204. Documentation/devicetree/bindings/mmc/tmio_mmc.txt +8 −2
  205. Documentation/devicetree/bindings/mmc/uniphier-sd.txt +55 −0
  206. Documentation/devicetree/bindings/net/brcm,unimac-mdio.txt +3 −0
  207. Documentation/devicetree/bindings/net/can/rcar_can.txt +1 −0
  208. Documentation/devicetree/bindings/net/dsa/b53.txt +36 −0
  209. Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt +143 −0
  210. Documentation/devicetree/bindings/net/lantiq,xrx200-net.txt +21 −0
  211. Documentation/devicetree/bindings/net/marvell,prestera.txt +2 −2
  212. Documentation/devicetree/bindings/net/marvell-pp2.txt +31 −14
  213. Documentation/devicetree/bindings/net/micrel-ksz90x1.txt +27 −1
  214. Documentation/devicetree/bindings/net/mscc-ocelot.txt +3 −6
  215. Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt +9 −12
  216. Documentation/devicetree/bindings/net/renesas,ravb.txt +1 −0
  217. Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt +6 −0
  218. Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt +1 −0
  219. Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +1 −0
  220. Documentation/devicetree/bindings/pci/pci-keystone.txt +3 −0
  221. Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt +1 −0
  222. Documentation/devicetree/bindings/pci/rcar-pci.txt +2 −0
  223. Documentation/devicetree/bindings/pci/ti-pci.txt +5 −0
  224. Documentation/devicetree/bindings/phy/brcm-sata-phy.txt +1 −0
  225. Documentation/devicetree/bindings/phy/phy-cadence-dp.txt +30 −0
  226. Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt +43 −0
  227. Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt +43 −0
  228. Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt +14 −9
  229. Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt +1 −0
  230. Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt +8 −3
  231. Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb3.txt +6 −4
  232. Documentation/devicetree/bindings/phy/uniphier-pcie-phy.txt +31 −0
  233. Documentation/devicetree/bindings/phy/uniphier-usb2-phy.txt +45 −0
  234. Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt +69 −0
  235. Documentation/devicetree/bindings/phy/uniphier-usb3-ssphy.txt +57 −0
  236. Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt +57 −0
  237. Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt +35 −4
  238. Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +2 −0
  239. Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt +216 −0
  240. Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +2 −0
  241. Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt +199 −0
  242. Documentation/devicetree/bindings/pinctrl/qcom,sdm660-pinctrl.txt +191 −0
  243. Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt +3 −0
  244. Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt +153 −0
  245. Documentation/devicetree/bindings/power/actions,owl-sps.txt +2 −0
  246. Documentation/devicetree/bindings/power/renesas,apmu.txt +2 −0
  247. Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt +3 −0
  248. Documentation/devicetree/bindings/power/reset/qcom,pon.txt +4 −1
  249. Documentation/devicetree/bindings/power/supply/bq25890.txt +3 −0
  250. Documentation/devicetree/bindings/power/supply/bq27xxx.txt +1 −0
  251. Documentation/devicetree/bindings/power/supply/sc2731_charger.txt +40 −0
  252. Documentation/devicetree/bindings/pwm/pwm-tiecap.txt +1 −0
  253. Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt +4 −0
  254. Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt +8 −2
  255. Documentation/devicetree/bindings/regulator/pfuze100.txt +5 −0
  256. Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt +23 −0
  257. Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.txt +9 −3
  258. Documentation/devicetree/bindings/regulator/st,stpmic1-regulator.txt +68 −0
  259. Documentation/devicetree/bindings/remoteproc/qcom,adsp-pil.txt +126 −0
  260. Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt +5 −0
  261. Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +6 −2
  262. Documentation/devicetree/bindings/reset/fsl,imx7-src.txt +1 −1
  263. Documentation/devicetree/bindings/reset/qcom,pdc-global.txt +52 −0
  264. Documentation/devicetree/bindings/reset/renesas,rst.txt +3 −0
  265. Documentation/devicetree/bindings/serial/renesas,sci-serial.txt +6 −0
  266. Documentation/devicetree/bindings/serial/uniphier-uart.txt +1 −2
  267. Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt +29 −0
  268. Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt +6 −0
  269. Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +2 −0
  270. Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt +2 −27
  271. Documentation/devicetree/bindings/soc/rockchip/grf.txt +2 −0
  272. Documentation/devicetree/bindings/sound/adi,adau1977.txt +54 −0
  273. Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt +24 −0
  274. Documentation/devicetree/bindings/sound/cs42l51.txt +17 −0
  275. Documentation/devicetree/bindings/sound/maxim,max98088.txt +23 −0
  276. Documentation/devicetree/bindings/sound/mikroe,mikroe-proto.txt +23 −0
  277. Documentation/devicetree/bindings/sound/nau8822.txt +16 −0
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  633. arch/arm/boot/dts/am437x-gp-evm.dts +5 −1
  634. arch/arm/boot/dts/am437x-idk-evm.dts +5 −1
  635. arch/arm/boot/dts/am437x-sk-evm.dts +10 −2
  636. arch/arm/boot/dts/am43x-epos-evm.dts +5 −1
  637. arch/arm/boot/dts/am571x-idk.dts +80 −4
  638. arch/arm/boot/dts/am572x-idk-common.dtsi +76 −0
  639. arch/arm/boot/dts/am572x-idk.dts +0 −4
  640. arch/arm/boot/dts/am57xx-cl-som-am57x.dts +11 −3
  641. arch/arm/boot/dts/am57xx-idk-common.dtsi +16 −2
  642. arch/arm/boot/dts/arm-realview-eb.dtsi +1 −1
  643. arch/arm/boot/dts/arm-realview-pb1176.dts +1 −1
  644. arch/arm/boot/dts/arm-realview-pb11mp.dts +1 −1
  645. arch/arm/boot/dts/arm-realview-pbx.dtsi +1 −1
  646. arch/arm/boot/dts/armada-385-db-88f6820-amc.dts +155 −0
  647. arch/arm/boot/dts/armada-388-clearfog.dtsi +1 −1
  648. arch/arm/boot/dts/armada-xp-98dx3236.dtsi +2 −2
  649. arch/arm/boot/dts/armada-xp-98dx3336.dtsi +1 −1
  650. arch/arm/boot/dts/armada-xp-98dx4251.dtsi +1 −1
  651. arch/arm/boot/dts/armada-xp-db-dxbc2.dts +11 −7
  652. arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts +11 −7
  653. arch/arm/boot/dts/aspeed-bmc-arm-stardragon4800-rep2.dts +207 −0
  654. arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts +146 −0
  655. arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +47 −0
  656. arch/arm/boot/dts/aspeed-g4.dtsi +1 −1
  657. arch/arm/boot/dts/aspeed-g5.dtsi +1 −1
  658. arch/arm/boot/dts/at91-dvk_su60_somc.dtsi +2 −2
  659. arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi +2 −2
  660. arch/arm/boot/dts/at91-nattis-2-natte-2.dts +57 −46
  661. arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +42 −0
  662. arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +6 −4
  663. arch/arm/boot/dts/at91-sama5d2_xplained.dts +30 −0
  664. arch/arm/boot/dts/at91-sama5d3_xplained.dts +8 −3
  665. arch/arm/boot/dts/at91-sama5d4_xplained.dts +9 −4
  666. arch/arm/boot/dts/at91-tse850-3.dts +13 −19
  667. arch/arm/boot/dts/at91-vinco.dts +1 −1
  668. arch/arm/boot/dts/at91sam9260ek.dts +1 −1
  669. arch/arm/boot/dts/at91sam9261ek.dts +1 −1
  670. arch/arm/boot/dts/at91sam9g20ek_common.dtsi +1 −1
  671. arch/arm/boot/dts/at91sam9g45.dtsi +1 −1
  672. arch/arm/boot/dts/at91sam9x5cm.dtsi +14 −4
  673. arch/arm/boot/dts/bcm-hr2.dtsi +1 −1
  674. arch/arm/boot/dts/bcm-nsp.dtsi +31 −2
  675. arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts +87 −0
  676. arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi +52 −0
  677. arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi +14 −0
  678. arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts +28 −0
  679. arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts +31 −0
  680. arch/arm/boot/dts/bcm4709-tplink-archer-c9-v1.dts +28 −0
  681. arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi +4 −0
  682. arch/arm/boot/dts/bcm5301x.dtsi +4 −1
  683. arch/arm/boot/dts/bcm63138.dtsi +8 −6
  684. arch/arm/boot/dts/bcm958625hr.dts +26 −0
  685. arch/arm/boot/dts/da850-evm.dts +6 −0
  686. arch/arm/boot/dts/da850-lego-ev3.dts +2 −1
  687. arch/arm/boot/dts/dm8148-evm.dts +12 −2
  688. arch/arm/boot/dts/dm8148-t410.dts +12 −2
  689. arch/arm/boot/dts/dove-cubox.dts +1 −1
  690. arch/arm/boot/dts/dove.dtsi +3 −3
  691. arch/arm/boot/dts/dra62x-j5eco-evm.dts +12 −2
  692. arch/arm/boot/dts/dra7-evm.dts +12 −2
  693. arch/arm/boot/dts/dra7.dtsi +4 −2
  694. arch/arm/boot/dts/dra71-evm.dts +2 −2
  695. arch/arm/boot/dts/dra72-evm-revc.dts +2 −2
  696. arch/arm/boot/dts/dra72-evm.dts +7 −1
  697. arch/arm/boot/dts/dra76-evm.dts +2 −2
  698. arch/arm/boot/dts/exynos3250-artik5.dtsi +7 −0
  699. arch/arm/boot/dts/exynos4210-origen.dts +9 −0
  700. arch/arm/boot/dts/exynos4210-trats.dts +15 −0
  701. arch/arm/boot/dts/exynos4210-universal_c210.dts +9 −2
  702. arch/arm/boot/dts/exynos4412-midas.dtsi +1 −2
  703. arch/arm/boot/dts/exynos4412-odroid-common.dtsi +1 −2
  704. arch/arm/boot/dts/exynos5250-arndale.dts +93 −9
  705. arch/arm/boot/dts/exynos5250-pinctrl.dtsi +11 −0
  706. arch/arm/boot/dts/exynos5250-snow-rev5.dts +11 −0
  707. arch/arm/boot/dts/exynos5250.dtsi +110 −42
  708. arch/arm/boot/dts/exynos5410-odroidxu.dts +9 −1
  709. arch/arm/boot/dts/exynos5420-peach-pit.dts +4 −1
  710. arch/arm/boot/dts/exynos5422-odroid-core.dtsi +145 −12
  711. arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +6 −0
  712. arch/arm/boot/dts/exynos5422-odroidxu3.dts +6 −0
  713. arch/arm/boot/dts/exynos5800-peach-pi.dts +4 −1
  714. arch/arm/boot/dts/gr-peach-audiocamerashield.dtsi +0 −4
  715. arch/arm/boot/dts/hip04.dtsi +176 −170
  716. arch/arm/boot/dts/imx1.dtsi +2 −2
  717. arch/arm/boot/dts/imx23-evk.dts +1 −1
  718. arch/arm/boot/dts/imx23-olinuxino.dts +2 −2
  719. arch/arm/boot/dts/imx23-sansa.dts +2 −2
  720. arch/arm/boot/dts/imx23-stmp378x_devb.dts +1 −1
  721. arch/arm/boot/dts/imx23-xfi3.dts +2 −2
  722. arch/arm/boot/dts/imx23.dtsi +2 −2
  723. arch/arm/boot/dts/imx25.dtsi +3 −3
  724. arch/arm/boot/dts/imx27.dtsi +3 −3
  725. arch/arm/boot/dts/imx28-apf28dev.dts +2 −2
  726. arch/arm/boot/dts/imx28-apx4devkit.dts +2 −2
  727. arch/arm/boot/dts/imx28-cfa10036.dts +1 −1
  728. arch/arm/boot/dts/imx28-duckbill-2-485.dts +2 −2
  729. arch/arm/boot/dts/imx28-duckbill-2-enocean.dts +2 −2
  730. arch/arm/boot/dts/imx28-duckbill-2-spi.dts +2 −2
  731. arch/arm/boot/dts/imx28-duckbill-2.dts +2 −2
  732. arch/arm/boot/dts/imx28-duckbill.dts +2 −2
  733. arch/arm/boot/dts/imx28-evk.dts +3 −3
  734. arch/arm/boot/dts/imx28-m28cu3.dts +2 −2
  735. arch/arm/boot/dts/imx28-m28evk.dts +2 −2
  736. arch/arm/boot/dts/imx28-sps1.dts +2 −2
  737. arch/arm/boot/dts/imx28-ts4600.dts +1 −1
  738. arch/arm/boot/dts/imx28.dtsi +4 −4
  739. arch/arm/boot/dts/imx31.dtsi +2 −2
  740. arch/arm/boot/dts/imx35.dtsi +2 −2
  741. arch/arm/boot/dts/imx50.dtsi +3 −3
  742. arch/arm/boot/dts/imx51-babbage.dts +1 −0
  743. arch/arm/boot/dts/imx51-zii-rdu1.dts +1 −1
  744. arch/arm/boot/dts/imx51-zii-scu2-mezz.dts +8 −0
  745. arch/arm/boot/dts/imx51-zii-scu3-esb.dts +4 −0
  746. arch/arm/boot/dts/imx51.dtsi +4 −4
  747. arch/arm/boot/dts/imx53-ppd.dts +1 −2
  748. arch/arm/boot/dts/imx53-qsb-common.dtsi +11 −0
  749. arch/arm/boot/dts/imx53.dtsi +3 −3
  750. arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +1 −1
  751. arch/arm/boot/dts/imx6dl-icore-mipi.dts +1 −1
  752. arch/arm/boot/dts/imx6dl-icore-rqs.dts +1 −37
  753. arch/arm/boot/dts/imx6dl-icore.dts +1 −37
  754. arch/arm/boot/dts/imx6dl-riotboard.dts +5 −0
  755. arch/arm/boot/dts/imx6q-apalis-eval.dts +2 −0
  756. arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +2 −0
  757. arch/arm/boot/dts/imx6q-apalis-ixora.dts +2 −0
  758. arch/arm/boot/dts/imx6q-icore-mipi.dts +3 −3
  759. arch/arm/boot/dts/imx6q-icore-ofcap10.dts +1 −37
  760. arch/arm/boot/dts/imx6q-icore-ofcap12.dts +1 −37
  761. arch/arm/boot/dts/imx6q-icore-rqs.dts +2 −37
  762. arch/arm/boot/dts/imx6q-icore.dts +1 −37
  763. arch/arm/boot/dts/imx6q.dtsi +1 −1
  764. arch/arm/boot/dts/imx6qdl-apalis.dtsi +0 −4
  765. arch/arm/boot/dts/imx6qdl-icore-1.5.dtsi +34 −0
  766. arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi +3 −38
  767. arch/arm/boot/dts/imx6qdl-icore.dtsi +3 −39
  768. arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +67 −0
  769. arch/arm/boot/dts/imx6qdl-wandboard.dtsi +4 −0
  770. arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +4 −0
  771. arch/arm/boot/dts/imx6qdl.dtsi +4 −4
  772. arch/arm/boot/dts/imx6sl.dtsi +4 −4
  773. arch/arm/boot/dts/imx6sll.dtsi +32 −1
  774. arch/arm/boot/dts/imx6sx-sdb.dtsi +8 −1
  775. arch/arm/boot/dts/imx6sx.dtsi +7 −7
  776. arch/arm/boot/dts/imx6ul-ccimx6ulsbcpro.dts +390 −0
  777. arch/arm/boot/dts/imx6ul-geam.dts +2 −38
  778. arch/arm/boot/dts/imx6ul-isiot-emmc.dts +1 −60
  779. arch/arm/boot/dts/imx6ul-isiot-nand.dts +1 −62
  780. arch/arm/boot/dts/imx6ul-isiot.dtsi +53 −37
  781. arch/arm/boot/dts/imx6ul.dtsi +22 −6
  782. arch/arm/boot/dts/imx6ull-14x14-evk.dts +1 −1
  783. arch/arm/boot/dts/imx6ull-pinfunc.h +32 −7
  784. arch/arm/boot/dts/imx6ull.dtsi +1 −1
  785. arch/arm/boot/dts/imx6ulz-14x14-evk.dts +20 −0
  786. arch/arm/boot/dts/imx6ulz.dtsi +38 −0
  787. arch/arm/boot/dts/imx7d-sdb.dts +2 −0
  788. arch/arm/boot/dts/imx7d.dtsi +13 −7
  789. arch/arm/boot/dts/imx7s-warp.dts +15 −38
  790. arch/arm/boot/dts/imx7s.dtsi +74 −57
  791. arch/arm/boot/dts/imx7ulp-pinfunc.h +15 −1
  792. arch/arm/boot/dts/iwg20d-q7-common.dtsi +0 −4
  793. arch/arm/boot/dts/keystone-k2g.dtsi +1 −1
  794. arch/arm/boot/dts/lpc32xx.dtsi +2 −2
  795. arch/arm/boot/dts/ls1021a-qds.dts +2 −0
  796. arch/arm/boot/dts/ls1021a-twr.dts +2 −0
  797. arch/arm/boot/dts/ls1021a.dtsi +9 −3
  798. arch/arm/boot/dts/meson8.dtsi +1 −1
  799. arch/arm/boot/dts/meson8b-ec100.dts +248 −0
  800. arch/arm/boot/dts/meson8b-odroidc1.dts +109 −0
  801. arch/arm/boot/dts/meson8b.dtsi +46 −1
  802. arch/arm/boot/dts/mt7623.dtsi +124 −0
  803. arch/arm/boot/dts/omap2.dtsi +2 −2
  804. arch/arm/boot/dts/omap2430.dtsi +1 −1
  805. arch/arm/boot/dts/omap3-beagle-xm.dts +10 −7
  806. arch/arm/boot/dts/omap3-beagle.dts +10 −7
  807. arch/arm/boot/dts/omap3-gta04.dtsi +234 −28
  808. arch/arm/boot/dts/omap3-gta04a3.dts +1 −1
  809. arch/arm/boot/dts/omap3-gta04a4.dts +1 −1
  810. arch/arm/boot/dts/omap3-gta04a5.dts +126 −3
  811. arch/arm/boot/dts/omap3-gta04a5one.dts +114 −0
  812. arch/arm/boot/dts/omap3-n9.dts +1 −1
  813. arch/arm/boot/dts/omap5-board-common.dtsi +4 −0
  814. arch/arm/boot/dts/orion5x-linkstation.dtsi +1 −1
  815. arch/arm/boot/dts/owl-s500-cubieboard6.dts +1 −2
  816. arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts +1 −2
  817. arch/arm/boot/dts/owl-s500-guitar.dtsi +1 −2
  818. arch/arm/boot/dts/owl-s500.dtsi +1 −2
  819. arch/arm/boot/dts/pxa25x.dtsi +4 −0
  820. arch/arm/boot/dts/pxa27x.dtsi +5 −1
  821. arch/arm/boot/dts/pxa2xx.dtsi +23 −4
  822. arch/arm/boot/dts/qcom-apq8064.dtsi +40 −31
  823. arch/arm/boot/dts/qcom-ipq4019.dtsi +75 −68
  824. arch/arm/boot/dts/qcom-ipq8064-ap148.dts +7 −76
  825. arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi +125 −0
  826. arch/arm/boot/dts/qcom-ipq8064.dtsi +286 −0
  827. arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts +83 −0
  828. arch/arm/boot/dts/qcom-msm8974.dtsi +115 −83
  829. arch/arm/boot/dts/r8a7743-iwg20d-q7-dbcm-ca.dts +4 −0
  830. arch/arm/boot/dts/r8a7743-iwg20d-q7.dts +4 −0
  831. arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts +12 −0
  832. arch/arm/boot/dts/r8a77470.dtsi +155 −13
  833. arch/arm/boot/dts/r8a7778-bockw.dts +1 −1
  834. arch/arm/boot/dts/r8a7778.dtsi +1 −1
  835. arch/arm/boot/dts/r8a7779-marzen.dts +1 −1
  836. arch/arm/boot/dts/r8a7779.dtsi +2 −2
  837. arch/arm/boot/dts/r8a7790-stout.dts +4 −0
  838. arch/arm/boot/dts/r8a7790.dtsi +3 −3
  839. arch/arm/boot/dts/r8a7791.dtsi +3 −3
  840. arch/arm/boot/dts/r8a7792.dtsi +1 −2
  841. arch/arm/boot/dts/r8a7793-gose.dts +16 −0
  842. arch/arm/boot/dts/r8a7793.dtsi +1 −1
  843. arch/arm/boot/dts/r8a7794-silk.dts +25 −0
  844. arch/arm/boot/dts/r8a7794.dtsi +1 −2
  845. arch/arm/boot/dts/r9a06g032.dtsi +83 −5
  846. arch/arm/boot/dts/rk3036.dtsi +1 −1
  847. arch/arm/boot/dts/rk3188-radxarock.dts +8 −0
  848. arch/arm/boot/dts/rk3188.dtsi +82 −0
  849. arch/arm/boot/dts/rk3288-tinker-s.dts +26 −0
  850. arch/arm/boot/dts/rk3288-tinker.dts +2 −496
  851. arch/arm/boot/dts/rk3288-tinker.dtsi +502 −0
  852. arch/arm/boot/dts/s5pv210.dtsi +1 −1
  853. arch/arm/boot/dts/sama5d2.dtsi +78 −45
  854. arch/arm/boot/dts/sama5d4.dtsi +4 −4
  855. arch/arm/boot/dts/socfpga.dtsi +18 −4
  856. arch/arm/boot/dts/socfpga_arria10.dtsi +28 −4
  857. arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dts +1 −1
  858. arch/arm/boot/dts/socfpga_cyclone5_socrates.dts +6 −1
  859. arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts +2 −1
  860. arch/arm/boot/dts/ste-dbx5x0.dtsi +43 −37
  861. arch/arm/boot/dts/ste-href-family-pinctrl.dtsi +6 −2
  862. arch/arm/boot/dts/ste-href.dtsi +1 −0
  863. arch/arm/boot/dts/ste-hrefprev60.dtsi +1 −1
  864. arch/arm/boot/dts/ste-snowball.dts +2 −1
  865. arch/arm/boot/dts/ste-u300.dts +1 −1
  866. arch/arm/boot/dts/stih410-b2260.dts +4 −1
  867. arch/arm/boot/dts/stihxxx-b2120.dtsi +8 −3
  868. arch/arm/boot/dts/stm32429i-eval.dts +1 −2
  869. arch/arm/boot/dts/stm32f429.dtsi +1 −1
  870. arch/arm/boot/dts/stm32f469-disco.dts +1 −2
  871. arch/arm/boot/dts/stm32f746-disco.dts +1 −2
  872. arch/arm/boot/dts/stm32f769-disco.dts +1 −2
  873. arch/arm/boot/dts/stm32h743.dtsi +1 −1
  874. arch/arm/boot/dts/stm32mp157c-ev1.dts +67 −6
  875. arch/arm/boot/dts/stm32mp157c.dtsi +4 −4
  876. arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi +2 −1
  877. arch/arm/boot/dts/sun5i.dtsi +26 −0
  878. arch/arm/boot/dts/sun7i-a20.dtsi +26 −0
  879. arch/arm/boot/dts/sun8i-a33.dtsi +26 −0
  880. arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts +5 −0
  881. arch/arm/boot/dts/sun8i-a83t.dtsi +18 −0
  882. arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus-v1.2.dts +13 −0
  883. arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +2 −188
  884. arch/arm/boot/dts/sun8i-h3-orangepi-zero-plus2.dts +140 −0
  885. arch/arm/boot/dts/sun8i-h3.dtsi +25 −0
  886. arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +19 −2
  887. arch/arm/boot/dts/sun8i-r40.dtsi +14 −2
  888. arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi +2 −1
  889. arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts +1 −1
  890. arch/arm/boot/dts/sun9i-a80.dtsi +1 −1
  891. arch/arm/boot/dts/sunxi-bananapi-m2-plus-v1.2.dtsi +31 −0
  892. arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi +231 −0
  893. arch/arm/boot/dts/sunxi-h3-h5.dtsi +1 −1
  894. arch/arm/boot/dts/tegra124-apalis-eval.dts +23 −17
  895. arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts +25 −18
  896. arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi +229 −223
  897. arch/arm/boot/dts/tegra124-apalis.dtsi +229 −222
  898. arch/arm/boot/dts/tegra20-colibri-eval-v3.dts +262 −0
  899. arch/arm/boot/dts/tegra20-colibri-iris.dts +169 −31
  900. arch/arm/boot/dts/tegra20-colibri.dtsi +432 −225
  901. arch/arm/boot/dts/tegra20-paz00.dts +6 −6
  902. arch/arm/boot/dts/tegra20.dtsi +15 −13
  903. arch/arm/boot/dts/tegra30-apalis-eval.dts +61 −87
  904. arch/arm/boot/dts/tegra30-apalis-v1.1-eval.dts +266 −0
  905. arch/arm/boot/dts/tegra30-apalis-v1.1.dtsi +1189 −0
  906. arch/arm/boot/dts/tegra30-apalis.dtsi +544 −161
  907. arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +57 −73
  908. arch/arm/boot/dts/tegra30-colibri.dtsi +649 −131
  909. arch/arm/boot/dts/tegra30.dtsi +7 −3
  910. arch/arm/boot/dts/uniphier-ld4-ref.dts +4 −0
  911. arch/arm/boot/dts/uniphier-ld4.dtsi +47 −1
  912. arch/arm/boot/dts/uniphier-ld6b-ref.dts +12 −0
  913. arch/arm/boot/dts/uniphier-pinctrl.dtsi +25 −0
  914. arch/arm/boot/dts/uniphier-pro4-ace.dts +12 −0
  915. arch/arm/boot/dts/uniphier-pro4-ref.dts +12 −0
  916. arch/arm/boot/dts/uniphier-pro4-sanji.dts +12 −0
  917. arch/arm/boot/dts/uniphier-pro4.dtsi +188 −1
  918. arch/arm/boot/dts/uniphier-pro5.dtsi +58 −1
  919. arch/arm/boot/dts/uniphier-pxs2-gentil.dts +12 −0
  920. arch/arm/boot/dts/uniphier-pxs2-vodka.dts +8 −0
  921. arch/arm/boot/dts/uniphier-pxs2.dtsi +238 −1
  922. arch/arm/boot/dts/uniphier-sld8-ref.dts +4 −0
  923. arch/arm/boot/dts/uniphier-sld8.dtsi +47 −1
  924. arch/arm/boot/dts/versatile-ab.dts +1 −1
  925. arch/arm/boot/dts/vf500.dtsi +3 −40
  926. arch/arm/boot/dts/vf610-twr.dts +3 −40
  927. arch/arm/boot/dts/vf610-zii-cfu1.dts +30 −0
  928. arch/arm/boot/dts/vf610-zii-dev-rev-c.dts +25 −19
  929. arch/arm/boot/dts/vf610.dtsi +4 −40
  930. arch/arm/boot/dts/vf610m4-colibri.dts +2 −2
  931. arch/arm/boot/dts/vfxxx.dtsi +9 −46
  932. arch/arm/boot/dts/zynq-zc702.dts +6 −6
  933. arch/arm/boot/dts/zynq-zc770-xm010.dts +1 −1
  934. arch/arm/boot/dts/zynq-zc770-xm013.dts +1 −1
  935. arch/arm/common/Kconfig +3 −0
  936. arch/arm/common/Makefile +1 −0
  937. arch/arm/common/krait-l2-accessors.c +48 −0
  938. arch/arm/configs/bcm2835_defconfig +1 −1
  939. arch/arm/configs/imx_v4_v5_defconfig +8 −10
  940. arch/arm/configs/imx_v6_v7_defconfig +23 −18
  941. arch/arm/configs/multi_v7_defconfig +13 −0
  942. arch/arm/configs/mxs_defconfig +8 −11
  943. arch/arm/configs/qcom_defconfig +1 −0
  944. arch/arm/configs/sama5_defconfig +2 −0
  945. arch/arm/configs/shmobile_defconfig +3 −5
  946. arch/arm/crypto/Kconfig +1 −6
  947. arch/arm/crypto/Makefile +0 −2
  948. arch/arm/crypto/chacha20-neon-core.S +143 −134
  949. arch/arm/crypto/crc32-ce-glue.c +1 −1
  950. arch/arm/crypto/ghash-ce-core.S +103 −5
  951. arch/arm/crypto/ghash-ce-glue.c +27 −11
  952. arch/arm/crypto/speck-neon-core.S +0 −434
  953. arch/arm/crypto/speck-neon-glue.c +0 −288
  954. arch/arm/include/asm/assembler.h +11 −0
  955. arch/arm/include/asm/bug.h +2 −2
  956. arch/arm/include/asm/cputype.h +1 −0
  957. arch/arm/include/asm/dma-mapping.h +2 −0
  958. arch/arm/include/asm/ftrace.h +0 −3
  959. arch/arm/include/asm/hugetlb-3level.h +1 −31
  960. arch/arm/include/asm/hugetlb.h +1 −32
  961. arch/arm/include/asm/io.h +0 −15
  962. arch/arm/include/asm/krait-l2-accessors.h +9 −0
  963. arch/arm/include/asm/kvm_arm.h +2 −2
  964. arch/arm/include/asm/kvm_host.h +12 −1
  965. arch/arm/include/asm/kvm_mmu.h +15 −5
  966. arch/arm/include/asm/paravirt.h +7 −2
  967. arch/arm/include/asm/pgtable-2level.h +1 −1
  968. arch/arm/include/asm/proc-fns.h +49 −12
  969. arch/arm/include/asm/processor.h +0 −6
  970. arch/arm/include/asm/stage2_pgtable.h +32 −22
  971. arch/arm/include/asm/thread_info.h +2 −2
  972. arch/arm/include/asm/topology.h +3 −0
  973. arch/arm/include/asm/uaccess.h +43 −6
  974. arch/arm/include/asm/unistd.h +2 −2
  975. arch/arm/kernel/armksyms.c +0 −3
  976. arch/arm/kernel/bugs.c +2 −2
  977. arch/arm/kernel/devtree.c +1 −5
  978. arch/arm/kernel/entry-common.S +4 −5
  979. arch/arm/kernel/entry-ftrace.S +4 −71
  980. arch/arm/kernel/ftrace.c +0 −51
  981. arch/arm/kernel/head-common.S +3 −3
  982. arch/arm/kernel/paravirt.c +2 −2
  983. arch/arm/kernel/ptrace.c +2 −9
  984. arch/arm/kernel/setup.c +27 −18
  985. arch/arm/kernel/signal.c +44 −36
  986. arch/arm/kernel/smp.c +31 −0
  987. arch/arm/kernel/swp_emulate.c +7 −9
  988. arch/arm/kernel/sys_oabi-compat.c +6 −2
  989. arch/arm/kernel/topology.c +0 −6
  990. arch/arm/kernel/traps.c +17 −46
  991. arch/arm/kernel/vmlinux-xip.lds.S +0 −1
  992. arch/arm/kernel/vmlinux.lds.h +2 −0
  993. arch/arm/kvm/coproc.c +4 −4
  994. arch/arm/lib/copy_from_user.S +1 −5
  995. arch/arm/lib/copy_to_user.S +5 −1
  996. arch/arm/lib/uaccess_with_memcpy.c +2 −1
  997. arch/arm/mach-at91/pm.c +3 −6
  998. arch/arm/mach-at91/pm_suspend.S +8 −0
  999. arch/arm/mach-davinci/board-neuros-osd2.c +4 −4
  1000. arch/arm/mach-davinci/include/mach/clock.h +0 −21
  1001. arch/arm/mach-ep93xx/core.c +9 −0
  1002. arch/arm/mach-ep93xx/snappercl15.c +6 −9
  1003. arch/arm/mach-ep93xx/ts72xx.c +6 −10
  1004. arch/arm/mach-exynos/common.h +1 −0
  1005. arch/arm/mach-exynos/firmware.c +11 −3
  1006. arch/arm/mach-exynos/suspend.c +24 −10
  1007. arch/arm/mach-imx/anatop.c +20 −0
  1008. arch/arm/mach-imx/cpu.c +3 −0
  1009. arch/arm/mach-imx/mach-mx21ads.c +11 −1
  1010. arch/arm/mach-imx/mach-mx27ads.c +11 −1
  1011. arch/arm/mach-imx/mach-qong.c +8 −9
  1012. arch/arm/mach-imx/mmdc.c +14 −0
  1013. arch/arm/mach-imx/mxc.h +7 −0
  1014. arch/arm/mach-imx/pm-imx6.c +27 −2
  1015. arch/arm/mach-integrator/integrator_cp.c +0 −2
  1016. arch/arm/mach-ixp4xx/ixdp425-setup.c +3 −3
  1017. arch/arm/mach-mmp/brownstone.c +11 −1
  1018. arch/arm/mach-mmp/devices.c +1 −10
  1019. arch/arm/mach-mvebu/board-v7.c +8 −6
  1020. arch/arm/mach-omap1/ams-delta-fiq-handler.S +3 −9
  1021. arch/arm/mach-omap1/board-ams-delta.c +96 −75
  1022. arch/arm/mach-omap1/board-fsample.c +2 −3
  1023. arch/arm/mach-omap1/board-h2.c +2 −3
  1024. arch/arm/mach-omap1/board-h3.c +2 −2
  1025. arch/arm/mach-omap1/board-nand.c +2 −3
  1026. arch/arm/mach-omap1/board-perseus2.c +2 −3
  1027. arch/arm/mach-omap1/common.h +2 −2
  1028. arch/arm/mach-omap1/include/mach/board-ams-delta.h +0 −7
  1029. arch/arm/mach-omap2/display.c +53 −58
  1030. arch/arm/mach-omap2/hsmmc.h +0 −2
  1031. arch/arm/mach-omap2/omap_hwmod.c +55 −39
  1032. arch/arm/mach-omap2/pdata-quirks.c +15 −3
  1033. arch/arm/mach-omap2/pm24xx.c +3 −4
  1034. arch/arm/mach-omap2/pm34xx.c +5 −9
  1035. arch/arm/mach-orion5x/ts78xx-setup.c +11 −16
  1036. arch/arm/mach-pxa/balloon3.c +6 −7
  1037. arch/arm/mach-pxa/em-x270.c +6 −9
  1038. arch/arm/mach-pxa/ezx.c +22 −11
  1039. arch/arm/mach-pxa/magician.c +1 −1
  1040. arch/arm/mach-pxa/palmtreo.c +0 −31
  1041. arch/arm/mach-pxa/palmtx.c +4 −6
  1042. arch/arm/mach-pxa/raumfeld.c +10 −2
  1043. arch/arm/mach-pxa/zeus.c +21 −2
  1044. arch/arm/mach-s3c24xx/mach-gta02.c +0 −42
  1045. arch/arm/mach-s3c24xx/mach-mini2440.c +60 −53
  1046. arch/arm/mach-s3c64xx/mach-crag6410.c +0 −1
  1047. arch/arm/mach-s3c64xx/mach-smdk6410.c +0 −1
  1048. arch/arm/mach-sa1100/assabet.c +14 −7
  1049. arch/arm/mach-sa1100/generic.c +3 −2
  1050. arch/arm/mach-sa1100/generic.h +2 −1
  1051. arch/arm/mach-sa1100/shannon.c +2 −2
  1052. arch/arm/mach-shmobile/Kconfig +12 −4
  1053. arch/arm/mach-shmobile/Makefile +1 −0
  1054. arch/arm/mach-shmobile/headsmp-scu.S +2 −11
  1055. arch/arm/mach-shmobile/headsmp.S +2 −5
  1056. arch/arm/mach-shmobile/platsmp-scu.c +1 −4
  1057. arch/arm/mach-shmobile/platsmp.c +1 −4
  1058. arch/arm/mach-shmobile/pm-rcar-gen2.c +3 −10
  1059. arch/arm/mach-shmobile/pm-rmobile.c +3 −6
  1060. arch/arm/mach-shmobile/pm-rmobile.h +2 −5
  1061. arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c +110 −29
  1062. arch/arm/mach-shmobile/setup-r7s9210.c +27 −0
  1063. arch/arm/mach-shmobile/setup-r8a7779.c +0 −2
  1064. arch/arm/mach-shmobile/setup-rcar-gen2.c +2 −0
  1065. arch/arm/mach-shmobile/smp-sh73a0.c +1 −9
  1066. arch/arm/mach-shmobile/suspend.c +1 −4
  1067. arch/arm/mach-shmobile/timer.c +3 −17
  1068. arch/arm/mach-u300/Kconfig +0 −13
  1069. arch/arm/mach-u300/Makefile +0 −1
  1070. arch/arm/mach-u300/dummyspichip.c +0 −276
  1071. arch/arm/mach-versatile/versatile_dt.c +0 −4
  1072. arch/arm/mach-zynq/slcr.c +1 −1
  1073. arch/arm/mm/alignment.c +1 −9
  1074. arch/arm/mm/dma-mapping-nommu.c +4 −7
  1075. arch/arm/mm/dma-mapping.c +0 −1
  1076. arch/arm/mm/fault.c +5 −23
  1077. arch/arm/mm/init.c +1 −2
  1078. arch/arm/mm/ioremap.c +1 −1
  1079. arch/arm/mm/mmu.c +1 −1
  1080. arch/arm/mm/proc-v7-bugs.c +2 −15
  1081. arch/arm/mm/proc-v7.S +1 −1
  1082. arch/arm/plat-orion/mpp.c +6 −1
  1083. arch/arm/plat-samsung/Kconfig +1 −1
  1084. arch/arm/tools/syscall.tbl +1 −0
  1085. arch/arm/vfp/vfpmodule.c +11 −20
  1086. arch/arm/xen/enlighten.c +0 −34
  1087. arch/arm/xen/mm.c +0 −1
  1088. arch/arm/xen/p2m.c +1 −1
  1089. arch/arm64/Kconfig +35 −6
  1090. arch/arm64/Kconfig.platforms +38 −24
  1091. arch/arm64/Makefile +3 −16
  1092. arch/arm64/boot/dts/actions/Makefile +2 −0
  1093. arch/arm64/boot/dts/actions/s700-cubieboard7.dts +0 −7
  1094. arch/arm64/boot/dts/actions/s700.dtsi +21 −0
  1095. arch/arm64/boot/dts/actions/s900-bubblegum-96.dts +217 −7
  1096. arch/arm64/boot/dts/actions/s900.dtsi +116 −2
  1097. arch/arm64/boot/dts/allwinner/Makefile +4 −0
  1098. arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts +1 −1
  1099. arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +28 −2
  1100. arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts +81 −4
  1101. arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts +96 −3
  1102. arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts +169 −6
  1103. arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-lts.dts +13 −0
  1104. arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +27 −1
  1105. arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts +4 −5
  1106. arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +27 −1
  1107. arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts +1 −1
  1108. arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +190 −3
  1109. arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus-v1.2.dts +11 −0
  1110. arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts +11 −0
  1111. arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +43 −0
  1112. arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts +150 −0
  1113. arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +23 −0
  1114. arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +46 −2
  1115. arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +6 −1
  1116. arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi +2 −2
  1117. arch/arm64/boot/dts/amlogic/Makefile +1 −0
  1118. arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +294 −76
  1119. arch/arm64/boot/dts/amlogic/meson-axg.dtsi +847 −768
  1120. arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts +29 −0
  1121. arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +172 −0
  1122. arch/arm64/boot/dts/amlogic/meson-gx.dtsi +16 −3
  1123. arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +1 −1
  1124. arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +1 −1
  1125. arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +1 −1
  1126. arch/arm64/boot/dts/arm/juno-base.dtsi +83 −79
  1127. arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi +18 −34
  1128. arch/arm64/boot/dts/arm/juno.dts +5 −8
  1129. arch/arm64/boot/dts/broadcom/Makefile +2 −1
  1130. arch/arm64/boot/dts/broadcom/bcm2837-rpi-cm3-io3.dts +2 −0
  1131. arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +2 −2
  1132. arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi +1 −1
  1133. arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +2 −2
  1134. arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +15 −3
  1135. arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +1 −1
  1136. arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts +2 −0
  1137. arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts +2 −0
  1138. arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +4 −4
  1139. arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +2 −0
  1140. arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts +2 −2
  1141. arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +3 −3
  1142. arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +24 −3
  1143. arch/arm64/boot/dts/hisilicon/Makefile +1 −0
  1144. arch/arm64/boot/dts/hisilicon/hi3670-hikey970.dts +35 −0
  1145. arch/arm64/boot/dts/hisilicon/hi3670.dtsi +162 −0
  1146. arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi +86 −95
  1147. arch/arm64/boot/dts/hisilicon/hi6220.dtsi +7 −0
  1148. arch/arm64/boot/dts/lg/lg1312.dtsi +2 −2
  1149. arch/arm64/boot/dts/lg/lg1313.dtsi +2 −2
  1150. arch/arm64/boot/dts/marvell/Makefile +1 −0
  1151. arch/arm64/boot/dts/marvell/armada-372x.dtsi +1 −1
  1152. arch/arm64/boot/dts/marvell/armada-37xx.dtsi +14 −1
  1153. arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +441 −0
  1154. arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi +2 −2
  1155. arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi +8 −4
  1156. arch/arm64/boot/dts/marvell/armada-ap806.dtsi +106 −4
  1157. arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi +8 −8
  1158. arch/arm64/boot/dts/marvell/armada-common.dtsi +1 −0
  1159. arch/arm64/boot/dts/marvell/armada-cp110.dtsi +122 −67
  1160. arch/arm64/boot/dts/mediatek/Makefile +1 −0
  1161. arch/arm64/boot/dts/mediatek/mt2712e.dtsi +11 −0
  1162. arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +530 −0
  1163. arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +98 −98
  1164. arch/arm64/boot/dts/mediatek/mt7622.dtsi +62 −0
  1165. arch/arm64/boot/dts/nvidia/tegra186.dtsi +76 −0
  1166. arch/arm64/boot/dts/nvidia/tegra194.dtsi +8 −8
  1167. arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi +2 −10
  1168. arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi +0 −1
  1169. arch/arm64/boot/dts/nvidia/tegra210.dtsi +57 −0
  1170. arch/arm64/boot/dts/qcom/Makefile +1 −0
  1171. arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +14 −0
  1172. arch/arm64/boot/dts/qcom/apq8096-db820c.dts +1 −1
  1173. arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +14 −0
  1174. arch/arm64/boot/dts/qcom/msm8916.dtsi +51 −47
  1175. arch/arm64/boot/dts/qcom/msm8996.dtsi +4 −11
  1176. arch/arm64/boot/dts/qcom/msm8998-mtp.dts +13 −0
  1177. arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi +243 −0
  1178. arch/arm64/boot/dts/qcom/msm8998.dtsi +690 −0
  1179. arch/arm64/boot/dts/qcom/pm8916.dtsi +13 −5
  1180. arch/arm64/boot/dts/qcom/pm8994.dtsi +18 −0
  1181. arch/arm64/boot/dts/qcom/pm8998.dtsi +74 −1
  1182. arch/arm64/boot/dts/qcom/pmi8998.dtsi +40 −0
  1183. arch/arm64/boot/dts/qcom/sdm845-mtp.dts +382 −0
  1184. arch/arm64/boot/dts/qcom/sdm845.dtsi +300 −0
  1185. arch/arm64/boot/dts/renesas/Makefile +2 −0
  1186. arch/arm64/boot/dts/renesas/r8a774a1.dtsi +1663 −0
  1187. arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts +1 −2
  1188. arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +9 −9
  1189. arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts +1 −2
  1190. arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +1 −2
  1191. arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts +15 −2
  1192. arch/arm64/boot/dts/renesas/r8a7795.dtsi +81 −58
  1193. arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts +1 −2
  1194. arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +1 −2
  1195. arch/arm64/boot/dts/renesas/r8a7796.dtsi +63 −40
  1196. arch/arm64/boot/dts/renesas/r8a77965-m3nulcb-kf.dts +16 −0
  1197. arch/arm64/boot/dts/renesas/r8a77965-m3nulcb.dts +33 −0
  1198. arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts +14 −0
  1199. arch/arm64/boot/dts/renesas/r8a77965.dtsi +369 −48
  1200. arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts +26 −0
  1201. arch/arm64/boot/dts/renesas/r8a77970.dtsi +104 −12
  1202. arch/arm64/boot/dts/renesas/r8a77980-condor.dts +143 −19
  1203. arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts +134 −0
  1204. arch/arm64/boot/dts/renesas/r8a77980.dtsi +608 −69
  1205. arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +272 −0
  1206. arch/arm64/boot/dts/renesas/r8a77990.dtsi +654 −27
  1207. arch/arm64/boot/dts/renesas/r8a77995-draak.dts +229 −133
  1208. arch/arm64/boot/dts/renesas/r8a77995.dtsi +75 −7
  1209. arch/arm64/boot/dts/renesas/salvator-common.dtsi +8 −1
  1210. arch/arm64/boot/dts/renesas/ulcb-kf.dtsi +1 −1
  1211. arch/arm64/boot/dts/renesas/ulcb.dtsi +4 −0
  1212. arch/arm64/boot/dts/rockchip/Makefile +4 −0
  1213. arch/arm64/boot/dts/rockchip/px30-evb.dts +235 −0
  1214. arch/arm64/boot/dts/rockchip/px30.dtsi +2047 −0
  1215. arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts +30 −0
  1216. arch/arm64/boot/dts/rockchip/rk3328-rock64.dts +59 −2
  1217. arch/arm64/boot/dts/rockchip/rk3328.dtsi +73 −1
  1218. arch/arm64/boot/dts/rockchip/rk3399-ficus.dts +5 −519
  1219. arch/arm64/boot/dts/rockchip/rk3399-firefly.dts +36 −0
  1220. arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +1 −1
  1221. arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts +680 −0
  1222. arch/arm64/boot/dts/rockchip/rk3399-rock960.dts +52 −0
  1223. arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi +542 −0
  1224. arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts +692 −0
  1225. arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi +50 −18
  1226. arch/arm64/boot/dts/rockchip/rk3399.dtsi +32 −0
  1227. arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +51 −1
  1228. arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts +4 −0
  1229. arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts +4 −0
  1230. arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +254 −1
  1231. arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts +12 −0
  1232. arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +282 −1
  1233. arch/arm64/boot/dts/synaptics/as370.dtsi +173 −0
  1234. arch/arm64/boot/dts/ti/k3-am65-main.dtsi +46 −5
  1235. arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +18 −0
  1236. arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +46 −0
  1237. arch/arm64/boot/dts/ti/k3-am65.dtsi +32 −22
  1238. arch/arm64/boot/dts/ti/k3-am654-base-board.dts +5 −0
  1239. arch/arm64/configs/defconfig +24 −1
  1240. arch/arm64/crypto/Kconfig +0 −11
  1241. arch/arm64/crypto/Makefile +0 −6
  1242. arch/arm64/crypto/aes-ce.S +5 −0
  1243. arch/arm64/crypto/aes-glue.c +193 −24
  1244. arch/arm64/crypto/aes-modes.S +216 −200
  1245. arch/arm64/crypto/aes-neon.S +6 −0
  1246. arch/arm64/crypto/crc32-ce-core.S +0 −287
  1247. arch/arm64/crypto/crc32-ce-glue.c +0 −244
  1248. arch/arm64/crypto/crct10dif-ce-core.S +239 −75
  1249. arch/arm64/crypto/crct10dif-ce-glue.c +12 −2
  1250. arch/arm64/crypto/speck-neon-core.S +0 −352
  1251. arch/arm64/crypto/speck-neon-glue.c +0 −282
  1252. arch/arm64/include/asm/assembler.h +3 −4
  1253. arch/arm64/include/asm/cache.h +40 −0
  1254. arch/arm64/include/asm/compat.h +6 −21
  1255. arch/arm64/include/asm/compiler.h +0 −30
  1256. arch/arm64/include/asm/cpucaps.h +5 −2
  1257. arch/arm64/include/asm/cpufeature.h +29 −1
  1258. arch/arm64/include/asm/cputype.h +2 −0
  1259. arch/arm64/include/asm/daifflags.h +5 −10
  1260. arch/arm64/include/asm/device.h +0 −1
  1261. arch/arm64/include/asm/dma-mapping.h +5 −2
  1262. arch/arm64/include/asm/esr.h +77 −0
  1263. arch/arm64/include/asm/hugetlb.h +7 −32
  1264. arch/arm64/include/asm/io.h +0 −9
  1265. arch/arm64/include/asm/jump_label.h +18 −20
  1266. arch/arm64/include/asm/kernel-pgtable.h +1 −1
  1267. arch/arm64/include/asm/kvm_arm.h +126 −30
  1268. arch/arm64/include/asm/kvm_asm.h +1 −2
  1269. arch/arm64/include/asm/kvm_emulate.h +1 −1
  1270. arch/arm64/include/asm/kvm_host.h +20 −9
  1271. arch/arm64/include/asm/kvm_hyp.h +10 −0
  1272. arch/arm64/include/asm/kvm_mmu.h +39 −8
  1273. arch/arm64/include/asm/mmu.h +3 −0
  1274. arch/arm64/include/asm/mmu_context.h +15 −2
  1275. arch/arm64/include/asm/page.h +0 −2
  1276. arch/arm64/include/asm/paravirt.h +7 −2
  1277. arch/arm64/include/asm/percpu.h +3 −0
  1278. arch/arm64/include/asm/pgtable-hwdef.h +2 −0
  1279. arch/arm64/include/asm/pgtable.h +41 −7
  1280. arch/arm64/include/asm/processor.h +13 −9
  1281. arch/arm64/include/asm/ptrace.h +4 −0
  1282. arch/arm64/include/asm/stage2_pgtable-nopmd.h +0 −42
  1283. arch/arm64/include/asm/stage2_pgtable-nopud.h +0 −39
  1284. arch/arm64/include/asm/stage2_pgtable.h +170 −66
  1285. arch/arm64/include/asm/stat.h +1 −1
  1286. arch/arm64/include/asm/string.h +8 −6
  1287. arch/arm64/include/asm/sysreg.h +32 −12
  1288. arch/arm64/include/asm/system_misc.h +2 −1
  1289. arch/arm64/include/asm/tlb.h +13 −21
  1290. arch/arm64/include/asm/tlbflush.h +70 −42
  1291. arch/arm64/include/asm/topology.h +3 −0
  1292. arch/arm64/include/asm/traps.h +3 −2
  1293. arch/arm64/include/asm/uaccess.h +0 −1
  1294. arch/arm64/include/asm/unistd.h +1 −1
  1295. arch/arm64/include/asm/xen/events.h +1 −1
  1296. arch/arm64/include/uapi/asm/Kbuild +1 −0
  1297. arch/arm64/include/uapi/asm/hwcap.h +1 −0
  1298. arch/arm64/include/uapi/asm/ptrace.h +1 −0
  1299. arch/arm64/include/uapi/asm/siginfo.h +0 −24
  1300. arch/arm64/include/uapi/asm/unistd.h +1 −0
  1301. arch/arm64/kernel/acpi.c +0 −1
  1302. arch/arm64/kernel/acpi_numa.c +0 −1
  1303. arch/arm64/kernel/arm64ksyms.c +5 −2
  1304. arch/arm64/kernel/cpu_errata.c +78 −18
  1305. arch/arm64/kernel/cpufeature.c +173 −22
  1306. arch/arm64/kernel/cpuinfo.c +10 −1
  1307. arch/arm64/kernel/crash_dump.c +1 −1
  1308. arch/arm64/kernel/debug-monitors.c +3 −8
  1309. arch/arm64/kernel/entry.S +15 −3
  1310. arch/arm64/kernel/fpsimd.c +3 −7
  1311. arch/arm64/kernel/head.S +22 −18
  1312. arch/arm64/kernel/jump_label.c +3 −3
  1313. arch/arm64/kernel/paravirt.c +2 −2
  1314. arch/arm64/kernel/pci.c +2 −3
  1315. arch/arm64/kernel/perf_event.c +7 −0
  1316. arch/arm64/kernel/probes/kprobes.c +21 −8
  1317. arch/arm64/kernel/process.c +4 −22
  1318. arch/arm64/kernel/psci.c +0 −1
  1319. arch/arm64/kernel/ptrace.c +7 −9
  1320. arch/arm64/kernel/setup.c +29 −34
  1321. arch/arm64/kernel/sleep.S +1 −0
  1322. arch/arm64/kernel/smp.c +1 −1
  1323. arch/arm64/kernel/ssbd.c +21 −3
  1324. arch/arm64/kernel/suspend.c +4 −0
  1325. arch/arm64/kernel/sys_compat.c +5 −8
  1326. arch/arm64/kernel/traps.c +230 −46
  1327. arch/arm64/kernel/vmlinux.lds.S +20 −16
  1328. arch/arm64/kvm/guest.c +57 −4
  1329. arch/arm64/kvm/handle_exit.c +7 −0
  1330. arch/arm64/kvm/hyp-init.S +3 −0
  1331. arch/arm64/kvm/hyp/Makefile +0 −1
  1332. arch/arm64/kvm/hyp/hyp-entry.S +15 −1
  1333. arch/arm64/kvm/hyp/s2-setup.c +0 −90
  1334. arch/arm64/kvm/hyp/switch.c +2 −2
  1335. arch/arm64/kvm/hyp/sysreg-sr.c +29 −1
  1336. arch/arm64/kvm/hyp/tlb.c +2 −2
  1337. arch/arm64/kvm/reset.c +105 −3
  1338. arch/arm64/lib/Makefile +3 −1
  1339. arch/arm64/lib/crc32.S +60 −0
  1340. arch/arm64/lib/memchr.S +1 −1
  1341. arch/arm64/lib/memcmp.S +1 −1
  1342. arch/arm64/lib/strchr.S +1 −1
  1343. arch/arm64/lib/strcmp.S +1 −1
  1344. arch/arm64/lib/strlen.S +1 −1
  1345. arch/arm64/lib/strncmp.S +1 −1
  1346. arch/arm64/lib/strnlen.S +1 −1
  1347. arch/arm64/lib/strrchr.S +1 −1
  1348. arch/arm64/mm/context.c +7 −4
  1349. arch/arm64/mm/dma-mapping.c +56 −215
  1350. arch/arm64/mm/dump.c +3 −3
  1351. arch/arm64/mm/fault.c +48 −84
  1352. arch/arm64/mm/hugetlbpage.c +43 −7
  1353. arch/arm64/mm/init.c +2 −7
  1354. arch/arm64/mm/kasan_init.c +2 −3
  1355. arch/arm64/mm/mmu.c +26 −22
  1356. arch/arm64/mm/numa.c +10 −8
  1357. arch/arm64/mm/proc.S +8 −3
  1358. arch/c6x/Kconfig +1 −2
  1359. arch/c6x/Makefile +0 −2
  1360. arch/c6x/boot/dts/Makefile +7 −10
  1361. arch/c6x/boot/dts/linked_dtb.S +0 −2
  1362. arch/c6x/include/asm/processor.h +0 −11
  1363. arch/c6x/include/asm/sections.h +0 −1
  1364. arch/c6x/include/uapi/asm/unistd.h +1 −0
  1365. arch/c6x/kernel/setup.c +6 −36
  1366. arch/c6x/kernel/vmlinux.lds.S +0 −10
  1367. arch/c6x/mm/dma-coherent.c +2 −2
  1368. arch/c6x/mm/init.c +4 −3
  1369. arch/csky/Kconfig +203 −0
  1370. arch/csky/Kconfig.debug +1 −0
  1371. arch/csky/Makefile +82 −0
  1372. arch/csky/abiv1/Makefile +8 −0
  1373. arch/csky/abiv1/alignment.c +326 −0
  1374. arch/csky/abiv1/bswapdi.c +12 −0
  1375. arch/csky/abiv1/bswapsi.c +12 −0
  1376. arch/csky/abiv1/cacheflush.c +52 −0
  1377. arch/csky/abiv1/inc/abi/cacheflush.h +49 −0
  1378. arch/csky/abiv1/inc/abi/ckmmu.h +75 −0
  1379. arch/csky/abiv1/inc/abi/elf.h +26 −0
  1380. arch/csky/abiv1/inc/abi/entry.h +160 −0
  1381. arch/csky/abiv1/inc/abi/page.h +27 −0
  1382. arch/csky/abiv1/inc/abi/pgtable-bits.h +37 −0
  1383. arch/csky/abiv1/inc/abi/reg_ops.h +27 −0
  1384. arch/csky/abiv1/inc/abi/regdef.h +26 −0
  1385. arch/csky/abiv1/inc/abi/string.h +13 −0
  1386. arch/csky/abiv1/inc/abi/vdso.h +17 −0
  1387. arch/csky/abiv1/memcpy.S +347 −0
  1388. arch/csky/abiv1/memset.c +37 −0
  1389. arch/csky/abiv1/mmap.c +66 −0
  1390. arch/csky/abiv1/strksyms.c +7 −0
  1391. arch/csky/abiv2/Makefile +10 −0
  1392. arch/csky/abiv2/cacheflush.c +60 −0
  1393. arch/csky/abiv2/fpu.c +275 −0
  1394. arch/csky/abiv2/inc/abi/cacheflush.h +46 −0
  1395. arch/csky/abiv2/inc/abi/ckmmu.h +87 −0
  1396. arch/csky/abiv2/inc/abi/elf.h +43 −0
  1397. arch/csky/abiv2/inc/abi/entry.h +156 −0
  1398. arch/csky/abiv2/inc/abi/fpu.h +66 −0
  1399. arch/csky/abiv2/inc/abi/page.h +14 −0
  1400. arch/csky/abiv2/inc/abi/pgtable-bits.h +37 −0
  1401. arch/csky/abiv2/inc/abi/reg_ops.h +17 −0
  1402. arch/csky/abiv2/inc/abi/regdef.h +26 −0
  1403. arch/csky/abiv2/inc/abi/string.h +27 −0
  1404. arch/csky/abiv2/inc/abi/vdso.h +23 −0
  1405. arch/csky/abiv2/memcmp.S +152 −0
  1406. arch/csky/abiv2/memcpy.S +110 −0
  1407. arch/csky/abiv2/memmove.S +108 −0
  1408. arch/csky/abiv2/memset.S +83 −0
  1409. arch/csky/abiv2/strcmp.S +168 −0
  1410. arch/csky/abiv2/strcpy.S +123 −0
  1411. arch/csky/abiv2/strksyms.c +12 −0
  1412. arch/csky/abiv2/strlen.S +97 −0
  1413. arch/csky/abiv2/sysdep.h +30 −0
  1414. arch/csky/boot/Makefile +24 −0
  1415. arch/csky/boot/dts/Makefile +3 −0
  1416. arch/csky/boot/dts/include/dt-bindings +1 −0
  1417. arch/csky/configs/defconfig +61 −0
  1418. arch/csky/include/asm/Kbuild +49 −0
  1419. arch/csky/include/asm/addrspace.h +10 −0
  1420. arch/csky/include/asm/atomic.h +212 −0
  1421. arch/csky/include/asm/barrier.h +49 −0
  1422. arch/csky/include/asm/bitops.h +82 −0
  1423. arch/csky/include/asm/bug.h +26 −0
  1424. arch/csky/include/asm/cache.h +30 −0
  1425. arch/csky/include/asm/cacheflush.h +9 −0
  1426. arch/csky/include/asm/checksum.h +50 −0
  1427. arch/csky/include/asm/cmpxchg.h +73 −0
  1428. arch/csky/include/asm/elf.h +85 −0
  1429. arch/csky/include/asm/fixmap.h +27 −0
  1430. arch/csky/include/asm/highmem.h +51 −0
  1431. arch/csky/include/asm/io.h +24 −0
  1432. arch/csky/include/asm/irqflags.h +49 −0
  1433. arch/csky/include/asm/mmu.h +12 −0
  1434. arch/csky/include/asm/mmu_context.h +150 −0
  1435. arch/csky/include/asm/page.h +104 −0
  1436. arch/csky/include/asm/pgalloc.h +115 −0
  1437. arch/csky/include/asm/pgtable.h +306 −0
  1438. arch/csky/include/asm/processor.h +115 −0
  1439. arch/csky/include/asm/reg_ops.h +26 −0
  1440. arch/csky/include/asm/segment.h +19 −0
  1441. arch/csky/include/asm/shmparam.h +11 −0
  1442. arch/csky/include/asm/smp.h +26 −0
  1443. arch/csky/include/asm/spinlock.h +256 −0
  1444. arch/csky/include/asm/spinlock_types.h +37 −0
  1445. arch/csky/include/asm/string.h +13 −0
  1446. arch/csky/include/asm/switch_to.h +36 −0
  1447. arch/csky/include/asm/syscall.h +71 −0
  1448. arch/csky/include/asm/syscalls.h +15 −0
  1449. arch/csky/include/asm/thread_info.h +75 −0
  1450. arch/csky/include/asm/tlb.h +25 −0
  1451. arch/csky/include/asm/tlbflush.h +25 −0
  1452. arch/csky/include/asm/traps.h +44 −0
  1453. arch/csky/include/asm/uaccess.h +416 −0
  1454. arch/csky/include/asm/unistd.h +4 −0
  1455. arch/csky/include/asm/vdso.h +12 −0
  1456. arch/csky/include/uapi/asm/Kbuild +32 −0
  1457. arch/csky/include/uapi/asm/byteorder.h +9 −0
  1458. arch/csky/include/uapi/asm/cachectl.h +13 −0
  1459. arch/csky/include/uapi/asm/ptrace.h +104 −0
  1460. arch/csky/include/uapi/asm/sigcontext.h +14 −0
  1461. arch/csky/include/uapi/asm/unistd.h +10 −0
  1462. arch/csky/kernel/Makefile +8 −0
  1463. arch/csky/kernel/asm-offsets.c +88 −0
  1464. arch/csky/kernel/atomic.S +87 −0
  1465. arch/csky/kernel/cpu-probe.c +79 −0
  1466. arch/csky/kernel/dumpstack.c +66 −0
  1467. arch/csky/kernel/entry.S +396 −0
  1468. arch/csky/kernel/head.S +77 −0
  1469. arch/csky/kernel/irq.c +22 −0
  1470. arch/csky/kernel/module.c +92 −0
  1471. arch/csky/kernel/power.c +30 −0
  1472. arch/csky/kernel/process.c +136 −0
  1473. arch/csky/kernel/ptrace.c +314 −0
  1474. arch/csky/kernel/setup.c +161 −0
  1475. arch/csky/kernel/signal.c +347 −0
  1476. arch/csky/kernel/smp.c +237 −0
  1477. arch/csky/kernel/syscall.c +43 −0
  1478. arch/csky/kernel/syscall_table.c +14 −0
  1479. arch/csky/kernel/time.c +11 −0
  1480. arch/csky/kernel/traps.c +169 −0
  1481. arch/csky/kernel/vdso.c +86 −0
  1482. arch/csky/kernel/vmlinux.lds.S +66 −0
  1483. arch/csky/lib/Makefile +1 −0
  1484. arch/csky/lib/delay.c +39 −0
  1485. arch/csky/lib/usercopy.c +262 −0
  1486. arch/csky/mm/Makefile +13 −0
  1487. arch/csky/mm/cachev1.c +126 −0
  1488. arch/csky/mm/cachev2.c +79 −0
  1489. arch/csky/mm/dma-mapping.c +254 −0
  1490. arch/csky/mm/fault.c +212 −0
  1491. arch/csky/mm/highmem.c +198 −0
  1492. arch/csky/mm/init.c +121 −0
  1493. arch/csky/mm/ioremap.c +48 −0
  1494. arch/csky/mm/syscache.c +32 −0
  1495. arch/csky/mm/tlb.c +219 −0
  1496. arch/h8300/Kconfig +0 −2
  1497. arch/h8300/Makefile +1 −10
  1498. arch/h8300/include/asm/processor.h +0 −6
  1499. arch/h8300/include/uapi/asm/unistd.h +1 −0
  1500. arch/h8300/kernel/setup.c +0 −1
  1501. arch/h8300/kernel/vmlinux.lds.S +0 −1
  1502. arch/h8300/mm/init.c +3 −3
  1503. arch/hexagon/Kconfig +3 −0
  1504. arch/hexagon/include/asm/Kbuild +1 −0
  1505. arch/hexagon/include/asm/dma-mapping.h +0 −40
  1506. arch/hexagon/include/asm/processor.h +0 −3
  1507. arch/hexagon/include/uapi/asm/unistd.h +1 −0
  1508. arch/hexagon/kernel/dma.c +9 −136
  1509. arch/hexagon/kernel/setup.c +1 −1
  1510. arch/hexagon/mm/init.c +9 −14
  1511. arch/ia64/Kconfig +0 −2
  1512. arch/ia64/hp/common/sba_iommu.c +0 −4
  1513. arch/ia64/hp/sim/simserial.c +13 −11
  1514. arch/ia64/include/asm/dma-mapping.h +0 −7
  1515. arch/ia64/include/asm/hugetlb.h +5 −42
  1516. arch/ia64/include/asm/iommu.h +0 −2
  1517. arch/ia64/include/asm/machvec.h +0 −7
  1518. arch/ia64/include/asm/machvec_init.h +0 −1
  1519. arch/ia64/include/asm/machvec_sn2.h +0 −2
  1520. arch/ia64/include/asm/pgtable.h +0 −1
  1521. arch/ia64/include/asm/processor.h +0 −6
  1522. arch/ia64/include/asm/unistd.h +3 −0
  1523. arch/ia64/include/uapi/asm/siginfo.h +0 −2
  1524. arch/ia64/kernel/brl_emu.c +6 −25
  1525. arch/ia64/kernel/crash.c +1 −1
  1526. arch/ia64/kernel/efi.c +1 −2
  1527. arch/ia64/kernel/ia64_ksyms.c +1 −1
  1528. arch/ia64/kernel/iosapic.c +1 −1
  1529. arch/ia64/kernel/machvec.c +0 −16
  1530. arch/ia64/kernel/mca.c +5 −5
  1531. arch/ia64/kernel/mca_drv.c +1 −1
  1532. arch/ia64/kernel/pci-dma.c +0 −55
  1533. arch/ia64/kernel/setup.c +0 −1
  1534. arch/ia64/kernel/signal.c +15 −49
  1535. arch/ia64/kernel/smpboot.c +1 −1
  1536. arch/ia64/kernel/topology.c +1 −1
  1537. arch/ia64/kernel/traps.c +39 −105
  1538. arch/ia64/kernel/unaligned.c +2 −10
  1539. arch/ia64/kernel/unwind.c +1 −1
  1540. arch/ia64/mm/contig.c +3 −3
  1541. arch/ia64/mm/discontig.c +4 −3
  1542. arch/ia64/mm/fault.c +2 −10
  1543. arch/ia64/mm/init.c +5 −6
  1544. arch/ia64/mm/numa.c +1 −1
  1545. arch/ia64/mm/tlb.c +5 −3
  1546. arch/ia64/pci/pci.c +1 −27
  1547. arch/ia64/sn/kernel/bte.c +1 −1
  1548. arch/ia64/sn/kernel/io_common.c +5 −6
  1549. arch/ia64/sn/kernel/setup.c +4 −3
  1550. arch/ia64/sn/pci/pci_dma.c +2 −31
  1551. arch/m68k/Kconfig +1 −3
  1552. arch/m68k/atari/stram.c +3 −2
  1553. arch/m68k/coldfire/m54xx.c +1 −1
  1554. arch/m68k/configs/amiga_defconfig +0 −2
  1555. arch/m68k/configs/apollo_defconfig +0 −2
  1556. arch/m68k/configs/atari_defconfig +0 −2
  1557. arch/m68k/configs/bvme6000_defconfig +0 −2
  1558. arch/m68k/configs/hp300_defconfig +0 −2
  1559. arch/m68k/configs/mac_defconfig +0 −2
  1560. arch/m68k/configs/multi_defconfig +0 −2
  1561. arch/m68k/configs/mvme147_defconfig +0 −2
  1562. arch/m68k/configs/mvme16x_defconfig +0 −2
  1563. arch/m68k/configs/q40_defconfig +0 −2
  1564. arch/m68k/configs/sun3_defconfig +0 −2
  1565. arch/m68k/configs/sun3x_defconfig +0 −2
  1566. arch/m68k/emu/nfblock.c +1 −1
  1567. arch/m68k/emu/nfeth.c +0 −4
  1568. arch/m68k/include/asm/atafd.h +0 −13
  1569. arch/m68k/include/asm/atafdreg.h +0 −80
  1570. arch/m68k/include/asm/pgtable_mm.h +2 −2
  1571. arch/m68k/include/asm/processor.h +0 −6
  1572. arch/m68k/include/asm/unistd.h +1 −1
  1573. arch/m68k/kernel/setup_mm.c +0 −1
  1574. arch/m68k/kernel/setup_no.c +0 −1
  1575. arch/m68k/kernel/sun3-head.S +0 −6
  1576. arch/m68k/kernel/uboot.c +2 −2
  1577. arch/m68k/mac/misc.c +10 −65
  1578. arch/m68k/mm/init.c +3 −3
  1579. arch/m68k/mm/mcfmmu.c +2 −3
  1580. arch/m68k/mm/motorola.c +4 −4
  1581. arch/m68k/mm/sun3mmu.c +3 −3
  1582. arch/m68k/sun3/config.c +1 −1
  1583. arch/m68k/sun3/dvma.c +1 −1
  1584. arch/m68k/sun3/mmu_emu.c +1 −1
  1585. arch/m68k/sun3/sun3dvma.c +3 −2
  1586. arch/m68k/sun3x/dvma.c +1 −1
  1587. arch/microblaze/Kconfig +2 −4
  1588. arch/microblaze/Makefile +1 −3
  1589. arch/microblaze/boot/dts/Makefile +4 −0
  1590. arch/microblaze/include/asm/pgtable.h +1 −3
  1591. arch/microblaze/include/asm/processor.h +0 −12
  1592. arch/microblaze/include/asm/unistd.h +1 −1
  1593. arch/microblaze/kernel/cpu/cpuinfo.c +4 −2
  1594. arch/microblaze/kernel/dma.c +0 −22
  1595. arch/microblaze/kernel/vmlinux.lds.S +0 −2
  1596. arch/microblaze/mm/consistent.c +3 −2
  1597. arch/microblaze/mm/init.c +3 −4
  1598. arch/microblaze/pci/pci-common.c +1 −1
  1599. arch/mips/Kconfig +43 −8
  1600. arch/mips/Makefile +6 −22
  1601. arch/mips/alchemy/devboards/db1200.c +6 −8
  1602. arch/mips/alchemy/devboards/db1300.c +6 −8
  1603. arch/mips/alchemy/devboards/db1550.c +6 −8
  1604. arch/mips/ar7/memory.c +1 −1
  1605. arch/mips/ath79/setup.c +1 −1
  1606. arch/mips/bcm47xx/workarounds.c +5 −3
  1607. arch/mips/bcm63xx/prom.c +1 −1
  1608. arch/mips/bcm63xx/setup.c +1 −1
  1609. arch/mips/bmips/setup.c +2 −9
  1610. arch/mips/boot/dts/ingenic/jz4740.dtsi +15 −0
  1611. arch/mips/boot/dts/ingenic/jz4770.dtsi +30 −0
  1612. arch/mips/boot/dts/ingenic/jz4780.dtsi +2 −1
  1613. arch/mips/boot/dts/lantiq/danube.dtsi +21 −21
  1614. arch/mips/boot/dts/lantiq/easy50712.dts +7 −7
  1615. arch/mips/boot/dts/mscc/Makefile +1 −1
  1616. arch/mips/boot/dts/mscc/ocelot.dtsi +33 −5
  1617. arch/mips/boot/dts/mscc/ocelot_pcb120.dts +107 −0
  1618. arch/mips/boot/dts/mscc/ocelot_pcb123.dts +6 −0
  1619. arch/mips/cavium-octeon/dma-octeon.c +2 −2
  1620. arch/mips/cavium-octeon/executive/cvmx-helper.c +1 −1
  1621. arch/mips/cavium-octeon/octeon-irq.c +8 −8
  1622. arch/mips/cavium-octeon/setup.c +3 −6
  1623. arch/mips/cavium-octeon/smp.c +7 −0
  1624. arch/mips/configs/generic/board-ocelot.config +9 −1
  1625. arch/mips/dec/prom/memory.c +1 −1
  1626. arch/mips/emma/common/prom.c +1 −1
  1627. arch/mips/fw/arc/memory.c +1 −1
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  1629. arch/mips/generic/Makefile +0 −1
  1630. arch/mips/generic/Platform +1 −1
  1631. arch/mips/generic/board-ocelot.its.S +17 −0
  1632. arch/mips/generic/kexec.c +0 −44
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  1634. arch/mips/include/asm/asm-eva.h +6 −0
  1635. arch/mips/include/asm/asm.h +0 −116
  1636. arch/mips/include/asm/compat.h +5 −23
  1637. arch/mips/include/asm/device.h +0 −19
  1638. arch/mips/include/asm/dma-coherence.h +6 −0
  1639. arch/mips/include/asm/dma-mapping.h +1 −3
  1640. arch/mips/include/asm/hugetlb.h +7 −33
  1641. arch/mips/include/asm/io.h +64 −65
  1642. arch/mips/include/asm/kexec.h +6 −5
  1643. arch/mips/include/asm/mach-loongson64/irq.h +1 −1
  1644. arch/mips/include/asm/mach-loongson64/kernel-entry-init.h +12 −4
  1645. arch/mips/include/asm/mipsregs.h +19 −1
  1646. arch/mips/include/asm/processor.h +5 −10
  1647. arch/mips/include/asm/r4kcache.h +0 −73
  1648. arch/mips/include/asm/smp-ops.h +3 −0
  1649. arch/mips/include/asm/smp.h +16 −0
  1650. arch/mips/include/asm/unistd.h +2 −1
  1651. arch/mips/include/asm/vr41xx/giu.h +0 −8
  1652. arch/mips/include/uapi/asm/ioctls.h +2 −0
  1653. arch/mips/include/uapi/asm/siginfo.h +0 −11
  1654. arch/mips/jazz/jazzdma.c +4 −5
  1655. arch/mips/kernel/Makefile +0 −18
  1656. arch/mips/kernel/binfmt_elfn32.c +7 −7
  1657. arch/mips/kernel/binfmt_elfo32.c +7 −7
  1658. arch/mips/kernel/crash.c +7 −2
  1659. arch/mips/kernel/crash_dump.c +1 −1
  1660. arch/mips/kernel/head.S +10 −8
  1661. arch/mips/kernel/machine_kexec.c +136 −7
  1662. arch/mips/kernel/mips-mt.c +0 −59
  1663. arch/mips/kernel/process.c +25 −0
  1664. arch/mips/kernel/prom.c +1 −1
  1665. arch/mips/kernel/relocate.c +1 −1
  1666. arch/mips/kernel/setup.c +76 −123
  1667. arch/mips/kernel/smp-bmips.c +7 −0
  1668. arch/mips/kernel/smp-cps.c +55 −25
  1669. arch/mips/kernel/traps.c +5 −3
  1670. arch/mips/kernel/unaligned.c +23 −24
  1671. arch/mips/kernel/vdso.c +17 −1
  1672. arch/mips/kernel/vpe.c +1 −1
  1673. arch/mips/kvm/commpage.c +1 −1
  1674. arch/mips/kvm/dyntrans.c +1 −1
  1675. arch/mips/kvm/emulate.c +1 −1
  1676. arch/mips/kvm/interrupt.c +1 −1
  1677. arch/mips/kvm/mips.c +1 −1
  1678. arch/mips/lantiq/prom.c +1 −1
  1679. arch/mips/lantiq/xway/dma.c +0 −1
  1680. arch/mips/lantiq/xway/sysctrl.c +7 −7
  1681. arch/mips/lasat/prom.c +1 −1
  1682. arch/mips/lib/Makefile +1 −1
  1683. arch/mips/lib/iomap-pci.c +0 −7
  1684. arch/mips/lib/iomap.c +0 −227
  1685. arch/mips/lib/memcpy.S +13 −9
  1686. arch/mips/lib/memset.S +31 −29
  1687. arch/mips/loongson64/common/Makefile +0 −1
  1688. arch/mips/loongson64/common/init.c +1 −1
  1689. arch/mips/loongson64/fuloong-2e/Makefile +1 −1
  1690. arch/mips/loongson64/fuloong-2e/dma.c +12 −0
  1691. arch/mips/loongson64/lemote-2f/Makefile +1 −1
  1692. arch/mips/loongson64/lemote-2f/dma.c +0 −4
  1693. arch/mips/loongson64/loongson-3/irq.c +6 −50
  1694. arch/mips/loongson64/loongson-3/numa.c +16 −21
  1695. arch/mips/loongson64/loongson-3/smp.c +9 −5
  1696. arch/mips/mm/c-r4k.c +8 −9
  1697. arch/mips/mm/dma-noncoherent.c +16 −63
  1698. arch/mips/mm/init.c +5 −9
  1699. arch/mips/mm/pgtable-32.c +1 −1
  1700. arch/mips/mti-malta/malta-memory.c +1 −1
  1701. arch/mips/netlogic/common/irq.c +7 −7
  1702. arch/mips/netlogic/xlp/dt.c +1 −1
  1703. arch/mips/netlogic/xlr/platform-flash.c +3 −4
  1704. arch/mips/pci/ops-loongson3.c +24 −10
  1705. arch/mips/pci/pci-legacy.c +5 −1
  1706. arch/mips/pci/pci-rt2880.c +2 −0
  1707. arch/mips/pci/pci.c +1 −1
  1708. arch/mips/pmcs-msp71xx/msp_usb.c +2 −2
  1709. arch/mips/pnx833x/common/platform.c +3 −5
  1710. arch/mips/ralink/cevt-rt3352.c +3 −3
  1711. arch/mips/ralink/ill_acc.c +1 −1
  1712. arch/mips/ralink/of.c +1 −1
  1713. arch/mips/ralink/rt305x.c +5 −0
  1714. arch/mips/rb532/devices.c +4 −6
  1715. arch/mips/rb532/prom.c +1 −1
  1716. arch/mips/sgi-ip22/ip28-berr.c +1 −1
  1717. arch/mips/sgi-ip27/ip27-memory.c +5 −9
  1718. arch/mips/sibyte/common/cfe.c +1 −1
  1719. arch/mips/sibyte/swarm/setup.c +1 −1
  1720. arch/mips/tools/.gitignore +1 −0
  1721. arch/mips/tools/Makefile +5 −0
  1722. arch/mips/tools/elf-entry.c +96 −0
  1723. arch/mips/txx9/generic/setup.c +2 −3
  1724. arch/mips/txx9/rbtx4938/prom.c +1 −1
  1725. arch/mips/vdso/Makefile +1 −1
  1726. arch/nds32/Kconfig +1 −3
  1727. arch/nds32/Makefile +1 −1
  1728. arch/nds32/include/asm/pgtable.h +1 −1
  1729. arch/nds32/include/asm/processor.h +0 −6
  1730. arch/nds32/include/uapi/asm/unistd.h +1 −0
  1731. arch/nds32/kernel/setup.c +1 −2
  1732. arch/nds32/mm/highmem.c +1 −1
  1733. arch/nds32/mm/init.c +6 −7
  1734. arch/nios2/Kconfig +2 −1
  1735. arch/nios2/Makefile +1 −10
  1736. arch/nios2/boot/Makefile +0 −22
  1737. arch/nios2/boot/dts/Makefile +6 −0
  1738. arch/nios2/boot/linked_dtb.S +0 −19
  1739. arch/nios2/include/asm/processor.h +0 −6
  1740. arch/nios2/include/uapi/asm/unistd.h +1 −0
  1741. arch/nios2/kernel/cpuinfo.c +3 −1
  1742. arch/nios2/kernel/prom.c +1 −18
  1743. arch/nios2/kernel/setup.c +7 −33
  1744. arch/nios2/kernel/time.c +2 −2
  1745. arch/nios2/mm/init.c +2 −2
  1746. arch/openrisc/Kconfig +1 −3
  1747. arch/openrisc/include/asm/processor.h +0 −5
  1748. arch/openrisc/include/uapi/asm/unistd.h +1 −0
  1749. arch/openrisc/kernel/setup.c +2 −4
  1750. arch/openrisc/mm/init.c +3 −4
  1751. arch/openrisc/mm/ioremap.c +1 −1
  1752. arch/parisc/Kconfig +1 −3
  1753. arch/parisc/Makefile +0 −9
  1754. arch/parisc/boot/compressed/Makefile +1 −3
  1755. arch/parisc/boot/compressed/misc.c +77 −18
  1756. arch/parisc/boot/compressed/vmlinux.lds.S +6 −4
  1757. arch/parisc/include/asm/alternative.h +47 −0
  1758. arch/parisc/include/asm/assembly.h +1 −8
  1759. arch/parisc/include/asm/cache.h +19 −3
  1760. arch/parisc/include/asm/compat.h +5 −19
  1761. arch/parisc/include/asm/hugetlb.h +8 −25
  1762. arch/parisc/include/asm/page.h +7 −5
  1763. arch/parisc/include/asm/pdc.h +1 −0
  1764. arch/parisc/include/asm/pdcpat.h +49 −13
  1765. arch/parisc/include/asm/pgtable.h +14 −21
  1766. arch/parisc/include/asm/processor.h +0 −11
  1767. arch/parisc/include/asm/sections.h +2 −0
  1768. arch/parisc/include/asm/tlbflush.h +1 −2
  1769. arch/parisc/include/asm/unistd.h +2 −1
  1770. arch/parisc/include/uapi/asm/Kbuild +1 −0
  1771. arch/parisc/include/uapi/asm/ioctls.h +2 −0
  1772. arch/parisc/include/uapi/asm/posix_types.h +0 −3
  1773. arch/parisc/include/uapi/asm/siginfo.h +0 −11
  1774. arch/parisc/kernel/cache.c +37 −26
  1775. arch/parisc/kernel/entry.S +20 −19
  1776. arch/parisc/kernel/firmware.c +57 −0
  1777. arch/parisc/kernel/hpmc.S +1 −2
  1778. arch/parisc/kernel/inventory.c +10 −0
  1779. arch/parisc/kernel/pacache.S +246 −34
  1780. arch/parisc/kernel/setup.c +82 −1
  1781. arch/parisc/kernel/signal.c +0 −1
  1782. arch/parisc/kernel/syscall.S +1 −1
  1783. arch/parisc/kernel/traps.c +4 −3
  1784. arch/parisc/kernel/unwind.c +1 −1
  1785. arch/parisc/kernel/vmlinux.lds.S +6 −0
  1786. arch/parisc/mm/init.c +16 −8
  1787. arch/powerpc/Kbuild +16 −0
  1788. arch/powerpc/Kconfig +4 −30
  1789. arch/powerpc/Kconfig.debug +0 −6
  1790. arch/powerpc/Makefile +37 −59
  1791. arch/powerpc/boot/.gitignore +1 −0
  1792. arch/powerpc/boot/Makefile +34 −32
  1793. arch/powerpc/boot/crt0.S +3 −1
  1794. arch/powerpc/boot/dts/Makefile +6 −0
  1795. arch/powerpc/boot/dts/fsl/Makefile +4 −0
  1796. arch/powerpc/boot/dts/fsl/t2080rdb.dts +2 −2
  1797. arch/powerpc/boot/dts/mpc885ads.dts +12 −1
  1798. arch/powerpc/boot/libfdt_env.h +2 −0
  1799. arch/powerpc/boot/opal.c +0 −8
  1800. arch/powerpc/boot/serial.c +1 −0
  1801. arch/powerpc/configs/g5_defconfig +1 −0
  1802. arch/powerpc/configs/maple_defconfig +1 −0
  1803. arch/powerpc/configs/powernv_defconfig +4 −0
  1804. arch/powerpc/configs/ppc64_defconfig +4 −0
  1805. arch/powerpc/configs/ps3_defconfig +1 −0
  1806. arch/powerpc/configs/pseries_defconfig +1 −0
  1807. arch/powerpc/configs/skiroot_defconfig +108 −46
  1808. arch/powerpc/include/asm/accounting.h +4 −0
  1809. arch/powerpc/include/asm/asm-prototypes.h +23 −1
  1810. arch/powerpc/include/asm/book3s/32/pgtable.h +139 −19
  1811. arch/powerpc/include/asm/book3s/64/hash-4k.h +1 −1
  1812. arch/powerpc/include/asm/book3s/64/hash.h +6 −2
  1813. arch/powerpc/include/asm/book3s/64/hugetlb.h +3 −0
  1814. arch/powerpc/include/asm/book3s/64/mmu-hash.h +80 −27
  1815. arch/powerpc/include/asm/book3s/64/mmu.h +2 −2
  1816. arch/powerpc/include/asm/book3s/64/pgtable-64k.h +3 −0
  1817. arch/powerpc/include/asm/book3s/64/pgtable.h +107 −83
  1818. arch/powerpc/include/asm/book3s/64/tlbflush-radix.h +1 −0
  1819. arch/powerpc/include/asm/bug.h +1 −1
  1820. arch/powerpc/include/asm/code-patching.h +5 −0
  1821. arch/powerpc/include/asm/compat.h +5 −19
  1822. arch/powerpc/include/asm/cputhreads.h +2 −0
  1823. arch/powerpc/include/asm/cputime.h +0 −1
  1824. arch/powerpc/include/asm/drmem.h +5 −0
  1825. arch/powerpc/include/asm/eeh.h +9 −15
  1826. arch/powerpc/include/asm/error-injection.h +13 −0
  1827. arch/powerpc/include/asm/exception-64s.h +4 −13
  1828. arch/powerpc/include/asm/firmware.h +4 −1
  1829. arch/powerpc/include/asm/fixmap.h +1 −1
  1830. arch/powerpc/include/asm/hugetlb.h +6 −37
  1831. arch/powerpc/include/asm/hvcall.h +51 −1
  1832. arch/powerpc/include/asm/io.h +18 −35
  1833. arch/powerpc/include/asm/iommu.h +1 −1
  1834. arch/powerpc/include/asm/kgdb.h +4 −1
  1835. arch/powerpc/include/asm/kvm_asm.h +1 −3
  1836. arch/powerpc/include/asm/kvm_book3s.h +40 −5
  1837. arch/powerpc/include/asm/kvm_book3s_64.h +116 −2
  1838. arch/powerpc/include/asm/kvm_book3s_asm.h +3 −0
  1839. arch/powerpc/include/asm/kvm_booke.h +2 −2
  1840. arch/powerpc/include/asm/kvm_host.h +14 −2
  1841. arch/powerpc/include/asm/kvm_ppc.h +5 −3
  1842. arch/powerpc/include/asm/machdep.h +2 −1
  1843. arch/powerpc/include/asm/mce.h +3 −0
  1844. arch/powerpc/include/asm/mmu-8xx.h +15 −28
  1845. arch/powerpc/include/asm/mmu.h +15 −0
  1846. arch/powerpc/include/asm/mmu_context.h +1 −1
  1847. arch/powerpc/include/asm/mpic.h +7 −0
  1848. arch/powerpc/include/asm/nohash/32/pgtable.h +62 −13
  1849. arch/powerpc/include/asm/nohash/32/pte-40x.h +43 −0
  1850. arch/powerpc/include/asm/nohash/32/pte-44x.h +30 −0
  1851. arch/powerpc/include/asm/nohash/32/pte-8xx.h +82 −5
  1852. arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h +33 −0
  1853. arch/powerpc/include/asm/nohash/64/pgtable.h +40 −6
  1854. arch/powerpc/include/asm/nohash/pgtable.h +75 −25
  1855. arch/powerpc/include/asm/nohash/pte-book3e.h +41 −0
  1856. arch/powerpc/include/asm/opal-api.h +1 −0
  1857. arch/powerpc/include/asm/paca.h +16 −2
  1858. arch/powerpc/include/asm/pgtable.h +29 −0
  1859. arch/powerpc/include/asm/pnv-pci.h +1 −1
  1860. arch/powerpc/include/asm/ppc-opcode.h +3 −0
  1861. arch/powerpc/include/asm/ppc-pci.h +1 −0
  1862. arch/powerpc/include/asm/processor.h +3 −10
  1863. arch/powerpc/include/asm/pte-common.h +0 −219
  1864. arch/powerpc/include/asm/ptrace.h +38 −1
  1865. arch/powerpc/include/asm/reg.h +8 −1
  1866. arch/powerpc/include/asm/rtas.h +16 −0
  1867. arch/powerpc/include/asm/slice.h +1 −0
  1868. arch/powerpc/include/asm/smp.h +11 −0
  1869. arch/powerpc/include/asm/sparsemem.h +0 −11
  1870. arch/powerpc/include/asm/stackprotector.h +38 −0
  1871. arch/powerpc/include/asm/thread_info.h +15 −2
  1872. arch/powerpc/include/asm/trace.h +15 −0
  1873. arch/powerpc/include/asm/uaccess.h +3 −3
  1874. arch/powerpc/include/asm/unistd.h +2 −1
  1875. arch/powerpc/include/asm/user.h +1 −1
  1876. arch/powerpc/include/uapi/asm/Kbuild +1 −0
  1877. arch/powerpc/include/uapi/asm/ioctls.h +2 −0
  1878. arch/powerpc/include/uapi/asm/kvm.h +1 −0
  1879. arch/powerpc/include/uapi/asm/ptrace.h +10 −1
  1880. arch/powerpc/include/uapi/asm/sigcontext.h +5 −1
  1881. arch/powerpc/include/uapi/asm/siginfo.h +0 −18
  1882. arch/powerpc/kernel/Makefile +8 −5
  1883. arch/powerpc/kernel/asm-offsets.c +15 −17
  1884. arch/powerpc/kernel/btext.c +1 −1
  1885. arch/powerpc/kernel/cacheinfo.c +35 −2
  1886. arch/powerpc/kernel/cpu_setup_power.S +2 −2
  1887. arch/powerpc/kernel/crash_dump.c +1 −1
  1888. arch/powerpc/kernel/dma-swiotlb.c +2 −2
  1889. arch/powerpc/kernel/dt_cpu_ftrs.c +1 −3
  1890. arch/powerpc/kernel/eeh.c +21 −21
  1891. arch/powerpc/kernel/eeh_dev.c +0 −2
  1892. arch/powerpc/kernel/eeh_driver.c +115 −122
  1893. arch/powerpc/kernel/eeh_pe.c +91 −69
  1894. arch/powerpc/kernel/entry_32.S +2 −2
  1895. arch/powerpc/kernel/entry_64.S +17 −16
  1896. arch/powerpc/kernel/exceptions-64s.S +78 −166
  1897. arch/powerpc/kernel/fadump.c +2 −2
  1898. arch/powerpc/kernel/head_8xx.S +60 −43
  1899. arch/powerpc/kernel/io-workarounds.c +2 −2
  1900. arch/powerpc/kernel/iommu.c +1 −1
  1901. arch/powerpc/kernel/isa-bridge.c +3 −3
  1902. arch/powerpc/kernel/kgdb.c +35 −8
  1903. arch/powerpc/kernel/mce.c +5 −4
  1904. arch/powerpc/kernel/mce_power.c +8 −1
  1905. arch/powerpc/kernel/module.c +8 −0
  1906. arch/powerpc/kernel/module_64.c +8 −6
  1907. arch/powerpc/kernel/paca.c +1 −1
  1908. arch/powerpc/kernel/pci_32.c +3 −3
  1909. arch/powerpc/kernel/pci_64.c +1 −1
  1910. arch/powerpc/kernel/process.c +63 −47
  1911. arch/powerpc/kernel/prom.c +1 −1
  1912. arch/powerpc/kernel/prom_init.c +66 −157
  1913. arch/powerpc/kernel/prom_init_check.sh +16 −0
  1914. arch/powerpc/kernel/ptrace.c +59 −9
  1915. arch/powerpc/kernel/rtas.c +11 −2
  1916. arch/powerpc/kernel/rtasd.c +9 −16
  1917. arch/powerpc/kernel/setup-common.c +3 −2
  1918. arch/powerpc/kernel/setup_32.c +5 −5
  1919. arch/powerpc/kernel/setup_64.c +20 −11
  1920. arch/powerpc/kernel/smp.c +244 −1
  1921. arch/powerpc/kernel/swsusp_asm64.S +1 −1
  1922. arch/powerpc/kernel/time.c +62 −42
  1923. arch/powerpc/kernel/tm.S +43 −32
  1924. arch/powerpc/kernel/trace/Makefile +1 −3
  1925. arch/powerpc/kernel/trace/ftrace.c +257 −4
  1926. arch/powerpc/kernel/trace/ftrace_64.S +12 −0
  1927. arch/powerpc/kernel/traps.c +77 −80
  1928. arch/powerpc/kernel/vdso32/datapage.S +1 −0
  1929. arch/powerpc/kernel/vdso32/gettimeofday.S +1 −0
  1930. arch/powerpc/kernel/vdso64/datapage.S +1 −0
  1931. arch/powerpc/kernel/vdso64/gettimeofday.S +1 −0
  1932. arch/powerpc/kernel/vmlinux.lds.S +15 −3
  1933. arch/powerpc/kvm/Makefile +2 −3
  1934. arch/powerpc/kvm/book3s.c +36 −10
  1935. arch/powerpc/kvm/book3s_64_mmu_hv.c +3 −4
  1936. arch/powerpc/kvm/book3s_64_mmu_radix.c +546 −182
  1937. arch/powerpc/kvm/book3s_64_vio.c +67 −27
  1938. arch/powerpc/kvm/book3s_64_vio_hv.c +49 −38
  1939. arch/powerpc/kvm/book3s_emulate.c +6 −7
  1940. arch/powerpc/kvm/book3s_hv.c +819 −57
  1941. arch/powerpc/kvm/book3s_hv_builtin.c +84 −8
  1942. arch/powerpc/kvm/book3s_hv_interrupts.S +49 −46
  1943. arch/powerpc/kvm/book3s_hv_nested.c +1291 −0
  1944. arch/powerpc/kvm/book3s_hv_ras.c +10 −0
  1945. arch/powerpc/kvm/book3s_hv_rm_xics.c +10 −3
  1946. arch/powerpc/kvm/book3s_hv_rmhandlers.S +460 −363
  1947. arch/powerpc/kvm/book3s_hv_tm.c +3 −3
  1948. arch/powerpc/kvm/book3s_hv_tm_builtin.c +3 −2
  1949. arch/powerpc/kvm/book3s_pr.c +2 −3
  1950. arch/powerpc/kvm/book3s_xics.c +6 −8
  1951. arch/powerpc/kvm/book3s_xive.c +63 −0
  1952. arch/powerpc/kvm/book3s_xive_template.c +0 −8
  1953. arch/powerpc/kvm/bookehv_interrupts.S +4 −4
  1954. arch/powerpc/kvm/emulate.c +3 −4
  1955. arch/powerpc/kvm/emulate_loadstore.c +0 −1
  1956. arch/powerpc/kvm/powerpc.c +14 −1
  1957. arch/powerpc/kvm/tm.S +136 −114
  1958. arch/powerpc/kvm/trace.h +6 −2
  1959. arch/powerpc/kvm/trace_book3s.h +0 −1
  1960. arch/powerpc/kvm/trace_booke.h +7 −2
  1961. arch/powerpc/kvm/trace_hv.h +7 −2
  1962. arch/powerpc/kvm/trace_pr.h +7 −2
  1963. arch/powerpc/lib/Makefile +2 −2
  1964. arch/powerpc/lib/alloc.c +2 −2
  1965. arch/powerpc/lib/code-patching.c +13 −10
  1966. arch/powerpc/lib/error-inject.c +16 −0
  1967. arch/powerpc/lib/mem_64.S +2 −2
  1968. arch/powerpc/mm/8xx_mmu.c +11 −20
  1969. arch/powerpc/mm/Makefile +10 −3
  1970. arch/powerpc/mm/dma-noncoherent.c +1 −1
  1971. arch/powerpc/mm/dump_linuxpagetables-8xx.c +82 −0
  1972. arch/powerpc/mm/dump_linuxpagetables-book3s64.c +120 −0
  1973. arch/powerpc/mm/dump_linuxpagetables-generic.c +82 −0
  1974. arch/powerpc/mm/dump_linuxpagetables.c +11 −156
  1975. arch/powerpc/mm/dump_linuxpagetables.h +19 −0
  1976. arch/powerpc/mm/fault.c +30 −25
  1977. arch/powerpc/mm/hash_native_64.c +2 −2
  1978. arch/powerpc/mm/hash_utils_64.c +7 −6
  1979. arch/powerpc/mm/hugepage-hash64.c +6 −0
  1980. arch/powerpc/mm/hugetlbpage-hash64.c +4 −0
  1981. arch/powerpc/mm/hugetlbpage.c +10 −4
  1982. arch/powerpc/mm/mem.c +9 −9
  1983. arch/powerpc/mm/mmu_context_book3s64.c +9 −0
  1984. arch/powerpc/mm/mmu_context_nohash.c +5 −4
  1985. arch/powerpc/mm/mmu_decl.h +5 −1
  1986. arch/powerpc/mm/numa.c +12 −6
  1987. arch/powerpc/mm/pgtable-book3e.c +3 −6
  1988. arch/powerpc/mm/pgtable-book3s64.c +8 −3
  1989. arch/powerpc/mm/pgtable-hash64.c +3 −4
  1990. arch/powerpc/mm/pgtable-radix.c +28 −37
  1991. arch/powerpc/mm/pgtable.c +12 −20
  1992. arch/powerpc/mm/pgtable_32.c +41 −31
  1993. arch/powerpc/mm/pgtable_64.c +31 −26
  1994. arch/powerpc/mm/ppc_mmu_32.c +2 −2
  1995. arch/powerpc/mm/slb.c +548 −229
  1996. arch/powerpc/mm/slb_low.S +0 −335
  1997. arch/powerpc/mm/slice.c +30 −8
  1998. arch/powerpc/mm/tlb-radix.c +10 −1
  1999. arch/powerpc/mm/tlb_nohash.c +3 −0
  2000. arch/powerpc/oprofile/Makefile +0 −1
  2001. arch/powerpc/oprofile/backtrace.c +1 −1
  2002. arch/powerpc/perf/8xx-pmu.c +12 −15
  2003. arch/powerpc/perf/Makefile +0 −1
  2004. arch/powerpc/perf/imc-pmu.c +1 −1
  2005. arch/powerpc/perf/power7-pmu.c +1 −0
  2006. arch/powerpc/platforms/40x/Kconfig +1 −9
  2007. arch/powerpc/platforms/44x/Kconfig +2 −22
  2008. arch/powerpc/platforms/44x/fsp2.c +4 −4
  2009. arch/powerpc/platforms/4xx/ocm.c +2 −5
  2010. arch/powerpc/platforms/4xx/soc.c +1 −1
  2011. arch/powerpc/platforms/82xx/Kconfig +0 −1
  2012. arch/powerpc/platforms/85xx/smp.c +2 −2
  2013. arch/powerpc/platforms/8xx/m8xx_setup.c +3 −2
  2014. arch/powerpc/platforms/8xx/machine_check.c +2 −2
  2015. arch/powerpc/platforms/Kconfig +0 −21
  2016. arch/powerpc/platforms/Kconfig.cputype +1 −4
  2017. arch/powerpc/platforms/Makefile +0 −2
  2018. arch/powerpc/platforms/cell/Kconfig +0 −3
  2019. arch/powerpc/platforms/cell/cpufreq_spudemand.c +1 −1
  2020. arch/powerpc/platforms/cell/spu_base.c +2 −2
  2021. arch/powerpc/platforms/cell/spu_manage.c +6 −19
  2022. arch/powerpc/platforms/cell/spufs/fault.c +8 −18
  2023. arch/powerpc/platforms/cell/spufs/sched.c +3 −6
  2024. arch/powerpc/platforms/embedded6xx/wii.c +1 −1
  2025. arch/powerpc/platforms/maple/Kconfig +0 −1
  2026. arch/powerpc/platforms/pasemi/Kconfig +0 −1
  2027. arch/powerpc/platforms/pasemi/dma_lib.c +1 −1
  2028. arch/powerpc/platforms/pasemi/iommu.c +1 −1
  2029. arch/powerpc/platforms/powermac/Makefile +2 −1
  2030. arch/powerpc/platforms/powermac/feature.c +18 −33
  2031. arch/powerpc/platforms/powermac/nvram.c +2 −2
  2032. arch/powerpc/platforms/powermac/setup.c +8 −7
  2033. arch/powerpc/platforms/powermac/time.c +20 −106
  2034. arch/powerpc/platforms/powernv/Kconfig +0 −6
  2035. arch/powerpc/platforms/powernv/eeh-powernv.c +5 −57
  2036. arch/powerpc/platforms/powernv/memtrace.c +20 −5
  2037. arch/powerpc/platforms/powernv/npu-dma.c +98 −164
  2038. arch/powerpc/platforms/powernv/opal-powercap.c +2 −1
  2039. arch/powerpc/platforms/powernv/opal-sensor-groups.c +2 −2
  2040. arch/powerpc/platforms/powernv/opal-sysparam.c +1 −1
  2041. arch/powerpc/platforms/powernv/opal.c +2 −2
  2042. arch/powerpc/platforms/powernv/pci-ioda.c +4 −5
  2043. arch/powerpc/platforms/powernv/setup.c +41 −6
  2044. arch/powerpc/platforms/ps3/Kconfig +0 −2
  2045. arch/powerpc/platforms/ps3/os-area.c +1 −1
  2046. arch/powerpc/platforms/ps3/setup.c +2 −2
  2047. arch/powerpc/platforms/ps3/spu.c +1 −2
  2048. arch/powerpc/platforms/pseries/Kconfig +7 −2
  2049. arch/powerpc/platforms/pseries/Makefile +2 −1
  2050. arch/powerpc/platforms/pseries/dlpar.c +13 −28
  2051. arch/powerpc/platforms/pseries/dtl.c +2 −2
  2052. arch/powerpc/platforms/pseries/eeh_pseries.c +4 −62
  2053. arch/powerpc/platforms/pseries/event_sources.c +13 −27
  2054. arch/powerpc/platforms/pseries/firmware.c +2 −0
  2055. arch/powerpc/platforms/pseries/hotplug-cpu.c +14 −14
  2056. arch/powerpc/platforms/pseries/hotplug-memory.c +48 −76
  2057. arch/powerpc/platforms/pseries/ibmebus.c +1 −1
  2058. arch/powerpc/platforms/pseries/lpar.c +280 −15
  2059. arch/powerpc/platforms/pseries/lparcfg.c +15 −3
  2060. arch/powerpc/platforms/pseries/mobility.c +11 −12
  2061. arch/powerpc/platforms/pseries/msi.c +2 −1
  2062. arch/powerpc/platforms/pseries/papr_scm.c +345 −0
  2063. arch/powerpc/platforms/pseries/pci.c +1 −0
  2064. arch/powerpc/platforms/pseries/pmem.c +164 −0
  2065. arch/powerpc/platforms/pseries/pseries.h +9 −2
  2066. arch/powerpc/platforms/pseries/ras.c +305 −3
  2067. arch/powerpc/platforms/pseries/setup.c +14 −0
  2068. arch/powerpc/platforms/pseries/vio.c +13 −14
  2069. arch/powerpc/sysdev/Kconfig +0 −5
  2070. arch/powerpc/sysdev/Makefile +0 −3
  2071. arch/powerpc/sysdev/dart_iommu.c +1 −1
  2072. arch/powerpc/sysdev/fsl_85xx_cache_sram.c +4 −4
  2073. arch/powerpc/sysdev/ipic.c +1 −1
  2074. arch/powerpc/sysdev/msi_bitmap.c +2 −2
  2075. arch/powerpc/sysdev/xics/Makefile +0 −1
  2076. arch/powerpc/sysdev/xive/Kconfig +0 −3
  2077. arch/powerpc/sysdev/xive/Makefile +0 −1
  2078. arch/powerpc/sysdev/xive/common.c +4 −3
  2079. arch/powerpc/sysdev/xive/native.c +1 −10
  2080. arch/powerpc/xmon/Makefile +9 −2
  2081. arch/powerpc/xmon/xmon.c +36 −20
  2082. arch/riscv/Kconfig +50 −3
  2083. arch/riscv/Kconfig.debug +0 −35
  2084. arch/riscv/Makefile +12 −13
  2085. arch/riscv/configs/defconfig +9 −8
  2086. arch/riscv/include/asm/Kbuild +0 −1
  2087. arch/riscv/include/asm/elf.h +0 −3
  2088. arch/riscv/include/asm/futex.h +128 −0
  2089. arch/riscv/include/asm/processor.h +1 −7
  2090. arch/riscv/include/asm/ptrace.h +2 −2
  2091. arch/riscv/include/asm/smp.h +36 −11
  2092. arch/riscv/include/asm/switch_to.h +11 −1
  2093. arch/riscv/include/asm/tlbflush.h +13 −3
  2094. arch/riscv/include/asm/unistd.h +1 −0
  2095. arch/riscv/include/uapi/asm/Kbuild +1 −0
  2096. arch/riscv/include/uapi/asm/elf.h +3 −0
  2097. arch/riscv/include/uapi/asm/siginfo.h +0 −24
  2098. arch/riscv/kernel/Makefile +1 −0
  2099. arch/riscv/kernel/cacheinfo.c +0 −7
  2100. arch/riscv/kernel/cpu.c +74 −13
  2101. arch/riscv/kernel/cpufeature.c +20 −3
  2102. arch/riscv/kernel/entry.S +0 −88
  2103. arch/riscv/kernel/fpu.S +106 −0
  2104. arch/riscv/kernel/head.S +3 −1
  2105. arch/riscv/kernel/irq.c +10 −2
  2106. arch/riscv/kernel/mcount.S +0 −1
  2107. arch/riscv/kernel/module.c +6 −6
  2108. arch/riscv/kernel/process.c +5 −1
  2109. arch/riscv/kernel/ptrace.c +52 −0
  2110. arch/riscv/kernel/setup.c +14 −1
  2111. arch/riscv/kernel/signal.c +48 −27
  2112. arch/riscv/kernel/smp.c +66 −16
  2113. arch/riscv/kernel/smpboot.c +32 −14
  2114. arch/riscv/lib/Makefile +2 −1
  2115. arch/riscv/mm/init.c +2 −3
  2116. arch/riscv/mm/ioremap.c +1 −1
  2117. arch/s390/Kconfig +21 −2
  2118. arch/s390/Makefile +1 −1
  2119. arch/s390/appldata/appldata_base.c +23 −10
  2120. arch/s390/appldata/appldata_os.c +0 −4
  2121. arch/s390/boot/.gitignore +1 −0
  2122. arch/s390/boot/Makefile +21 −3
  2123. arch/s390/boot/boot.h +11 −0
  2124. arch/s390/boot/cmdline.c +2 −0
  2125. arch/s390/boot/compressed/Makefile +23 −28
  2126. arch/s390/boot/compressed/decompressor.c +85 −0
  2127. arch/s390/boot/compressed/decompressor.h +25 −0
  2128. arch/s390/boot/compressed/head.S +0 −52
  2129. arch/s390/boot/compressed/misc.c +0 −116
  2130. arch/s390/boot/compressed/vmlinux.lds.S +18 −6
  2131. arch/s390/boot/compressed/vmlinux.scr.lds.S +0 −15
  2132. arch/s390/boot/ctype.c +2 −0
  2133. arch/s390/boot/head.S +5 −7
  2134. arch/s390/boot/ipl_parm.c +182 −0
  2135. arch/s390/boot/ipl_vmparm.c +2 −0
  2136. arch/s390/boot/mem_detect.c +182 −0
  2137. arch/s390/boot/startup.c +64 −0
  2138. arch/s390/boot/string.c +138 −0
  2139. arch/s390/configs/debug_defconfig +11 −4
  2140. arch/s390/configs/performance_defconfig +11 −3
  2141. arch/s390/crypto/aes_s390.c +24 −24
  2142. arch/s390/crypto/paes_s390.c +37 −26
  2143. arch/s390/defconfig +41 −38
  2144. arch/s390/hypfs/hypfs_sprp.c +23 −19
  2145. arch/s390/include/asm/appldata.h +10 −9
  2146. arch/s390/include/asm/boot_data.h +11 −0
  2147. arch/s390/include/asm/ccwgroup.h +2 −0
  2148. arch/s390/include/asm/compat.h +2 −16
  2149. arch/s390/include/asm/facility.h +7 −2
  2150. arch/s390/include/asm/ipl.h +2 −2
  2151. arch/s390/include/asm/jump_label.h +16 −24
  2152. arch/s390/include/asm/kasan.h +30 −0
  2153. arch/s390/include/asm/kvm_host.h +14 −1
  2154. arch/s390/include/asm/lowcore.h +2 −2
  2155. arch/s390/include/asm/mem_detect.h +82 −0
  2156. arch/s390/include/asm/mmu.h +2 −0
  2157. arch/s390/include/asm/mmu_context.h +1 −5
  2158. arch/s390/include/asm/page.h +1 −0
  2159. arch/s390/include/asm/pgalloc.h +3 −3
  2160. arch/s390/include/asm/pgtable.h +37 −1
  2161. arch/s390/include/asm/pkey.h +26 −0
  2162. arch/s390/include/asm/processor.h +51 −8
  2163. arch/s390/include/asm/qdio.h +0 −2
  2164. arch/s390/include/asm/sclp.h +7 −1
  2165. arch/s390/include/asm/sections.h +12 −0
  2166. arch/s390/include/asm/setup.h +1 −2
  2167. arch/s390/include/asm/string.h +21 −0
  2168. arch/s390/include/asm/thread_info.h +9 −4
  2169. arch/s390/include/asm/tlb.h +3 −3
  2170. arch/s390/include/asm/unistd.h +2 −1
  2171. arch/s390/include/asm/vmlinux.lds.h +20 −0
  2172. arch/s390/include/uapi/asm/Kbuild +1 −0
  2173. arch/s390/include/uapi/asm/kvm.h +2 −0
  2174. arch/s390/include/uapi/asm/pkey.h +34 −0
  2175. arch/s390/include/uapi/asm/siginfo.h +0 −17
  2176. arch/s390/include/uapi/asm/zcrypt.h +16 −3
  2177. arch/s390/kernel/Makefile +5 −1
  2178. arch/s390/kernel/asm-offsets.c +1 −1
  2179. arch/s390/kernel/base.S +1 −1
  2180. arch/s390/kernel/crash_dump.c +2 −3
  2181. arch/s390/kernel/dumpstack.c +5 −5
  2182. arch/s390/kernel/early.c +3 −44
  2183. arch/s390/kernel/early_nobss.c +2 −22
  2184. arch/s390/kernel/early_printk.c +1 −1
  2185. arch/s390/kernel/entry.S +39 −20
  2186. arch/s390/kernel/entry.h +3 −0
  2187. arch/s390/kernel/head64.S +2 −4
  2188. arch/s390/kernel/ipl.c +13 −106
  2189. arch/s390/kernel/ipl_vmparm.c +36 −0
  2190. arch/s390/kernel/irq.c +1 −9
  2191. arch/s390/kernel/jump_label.c +6 −5
  2192. arch/s390/kernel/machine_kexec.c +13 −4
  2193. arch/s390/kernel/module.c +11 −4
  2194. arch/s390/kernel/perf_cpum_cf.c +1 −1
  2195. arch/s390/kernel/perf_cpum_sf.c +33 −6
  2196. arch/s390/kernel/setup.c +173 −47
  2197. arch/s390/kernel/smp.c +53 −39
  2198. arch/s390/kernel/sthyi.c +5 −3
  2199. arch/s390/kernel/swsusp.S +6 −9
  2200. arch/s390/kernel/topology.c +3 −3
  2201. arch/s390/kernel/vdso.c +6 −4
  2202. arch/s390/kernel/vdso32/Makefile +5 −4
  2203. arch/s390/kernel/vdso32/clock_gettime.S +10 −9
  2204. arch/s390/kernel/vdso32/gettimeofday.S +2 −1
  2205. arch/s390/kernel/vdso64/Makefile +5 −4
  2206. arch/s390/kernel/vdso64/clock_gettime.S +13 −12
  2207. arch/s390/kernel/vdso64/gettimeofday.S +2 −1
  2208. arch/s390/kernel/vmlinux.lds.S +17 −0
  2209. arch/s390/kvm/kvm-s390.c +142 −42
  2210. arch/s390/kvm/kvm-s390.h +1 −0
  2211. arch/s390/kvm/vsie.c +192 −18
  2212. arch/s390/lib/Makefile +4 −0
  2213. arch/s390/lib/mem.S +9 −3
  2214. arch/s390/mm/Makefile +4 −2
  2215. arch/s390/mm/dump_pagetables.c +50 −8
  2216. arch/s390/mm/extmem.c +1 −1
  2217. arch/s390/mm/fault.c +21 −17
  2218. arch/s390/mm/gmap.c +8 −2
  2219. arch/s390/mm/init.c +6 −4
  2220. arch/s390/mm/kasan_init.c +387 −0
  2221. arch/s390/mm/maccess.c +20 −5
  2222. arch/s390/mm/mem_detect.c +0 −62
  2223. arch/s390/mm/pgalloc.c +1 −0
  2224. arch/s390/mm/vmem.c +3 −4
  2225. arch/s390/numa/mode_emu.c +1 −2
  2226. arch/s390/numa/numa.c +2 −2
  2227. arch/s390/numa/toptree.c +2 −2
  2228. arch/s390/purgatory/head.S +2 −2
  2229. arch/s390/tools/gen_facilities.c +2 −0
  2230. arch/sh/Kconfig +1 −4
  2231. arch/sh/boards/mach-ecovec24/setup.c +25 −2
  2232. arch/sh/boards/mach-migor/setup.c +6 −8
  2233. arch/sh/boards/of-generic.c +1 −1
  2234. arch/sh/include/asm/hugetlb.h +4 −50
  2235. arch/sh/include/asm/processor_32.h +0 −6
  2236. arch/sh/include/asm/processor_64.h +0 −15
  2237. arch/sh/include/asm/unistd.h +1 −1
  2238. arch/sh/include/uapi/asm/ioctls.h +2 −0
  2239. arch/sh/mm/init.c +4 −5
  2240. arch/sh/mm/ioremap_fixed.c +1 −1
  2241. arch/sparc/Kconfig +1 −3
  2242. arch/sparc/include/asm/cmpxchg_64.h +6 −1
  2243. arch/sparc/include/asm/compat.h +5 −20
  2244. arch/sparc/include/asm/cpudata_64.h +1 −1
  2245. arch/sparc/include/asm/dma-mapping.h +2 −2
  2246. arch/sparc/include/asm/hugetlb.h +8 −32
  2247. arch/sparc/include/asm/parport.h +2 −0
  2248. arch/sparc/include/asm/processor_32.h +0 −6
  2249. arch/sparc/include/asm/processor_64.h +0 −6
  2250. arch/sparc/include/asm/prom.h +0 −3
  2251. arch/sparc/include/asm/switch_to_64.h +2 −1
  2252. arch/sparc/include/asm/thread_info_64.h +4 −0
  2253. arch/sparc/include/asm/unistd.h +2 −1
  2254. arch/sparc/include/asm/vdso.h +1 −3
  2255. arch/sparc/include/uapi/asm/ioctls.h +2 −0
  2256. arch/sparc/include/uapi/asm/siginfo.h +0 −7
  2257. arch/sparc/include/uapi/asm/unistd.h +2 −1
  2258. arch/sparc/kernel/kgdb_32.c +1 −1
  2259. arch/sparc/kernel/kgdb_64.c +1 −1
  2260. arch/sparc/kernel/mdesc.c +3 −4
  2261. arch/sparc/kernel/perf_event.c +22 −9
  2262. arch/sparc/kernel/process_64.c +19 −6
  2263. arch/sparc/kernel/prom_32.c +2 −2
  2264. arch/sparc/kernel/prom_64.c +1 −1
  2265. arch/sparc/kernel/rtrap_64.S +3 −1
  2266. arch/sparc/kernel/setup_64.c +5 −7
  2267. arch/sparc/kernel/signal32.c +10 −2
  2268. arch/sparc/kernel/signal_64.c +5 −1
  2269. arch/sparc/kernel/smp_64.c +9 −9
  2270. arch/sparc/kernel/systbls_32.S +1 −1
  2271. arch/sparc/kernel/systbls_64.S +4 −4
  2272. arch/sparc/kernel/time_64.c +0 −3
  2273. arch/sparc/kernel/viohs.c +9 −3
  2274. arch/sparc/mm/init_32.c +2 −3
  2275. arch/sparc/mm/init_64.c +16 −12
  2276. arch/sparc/mm/srmmu.c +6 −6
  2277. arch/sparc/vdso/Makefile +20 −21
  2278. arch/sparc/vdso/checkundef.sh +10 −0
  2279. arch/sparc/vdso/vclock_gettime.c +165 −56
  2280. arch/sparc/vdso/vdso-layout.lds.S +0 −6
  2281. arch/sparc/vdso/vdso.lds.S +2 −0
  2282. arch/sparc/vdso/vdso2c.c +0 −6
  2283. arch/sparc/vdso/vdso2c.h +0 −1
  2284. arch/sparc/vdso/vdso32/vdso32.lds.S +2 −0
  2285. arch/sparc/vdso/vma.c +213 −24
  2286. arch/um/drivers/line.c +2 −2
  2287. arch/um/drivers/net_kern.c +2 −2
  2288. arch/um/drivers/port_user.c +1 −1
  2289. arch/um/drivers/ubd_kern.c +99 −137
  2290. arch/um/drivers/vector_kern.c +7 −12
  2291. arch/um/drivers/vector_user.c +2 −4
  2292. arch/um/include/asm/common.lds.S +0 −2
  2293. arch/um/include/shared/aio.h +0 −28
  2294. arch/um/kernel/initrd.c +2 −2
  2295. arch/um/kernel/irq.c +1 −2
  2296. arch/um/kernel/mem.c +9 −7
  2297. arch/um/kernel/physmem.c +10 −13
  2298. arch/um/kernel/trap.c +1 −1
  2299. arch/um/os-Linux/Makefile +2 −6
  2300. arch/um/os-Linux/aio.c +0 −390
  2301. arch/um/os-Linux/skas/process.c +5 −0
  2302. arch/unicore32/Kconfig +1 −2
  2303. arch/unicore32/include/asm/Kbuild +1 −0
  2304. arch/unicore32/include/asm/bug.h +2 −1
  2305. arch/unicore32/include/asm/dma-mapping.h +0 −22
  2306. arch/unicore32/include/asm/processor.h +0 −6
  2307. arch/unicore32/include/uapi/asm/unistd.h +1 −0
  2308. arch/unicore32/kernel/fpu-ucf64.c +3 −9
  2309. arch/unicore32/kernel/hibernate.c +1 −1
  2310. arch/unicore32/kernel/setup.c +2 −3
  2311. arch/unicore32/kernel/traps.c +3 −2
  2312. arch/unicore32/mm/fault.c +5 −22
  2313. arch/unicore32/mm/init.c +4 −60
  2314. arch/unicore32/mm/mmu.c +1 −2
  2315. arch/x86/Kconfig +17 −14
  2316. arch/x86/Kconfig.cpu +14 −0
  2317. arch/x86/Kconfig.debug +0 −1
  2318. arch/x86/Makefile +7 −3
  2319. arch/x86/boot/compressed/Makefile +1 −0
  2320. arch/x86/boot/compressed/eboot.c +10 −0
  2321. arch/x86/boot/compressed/kaslr.c +8 −10
  2322. arch/x86/boot/compressed/misc.h +1 −0
  2323. arch/x86/boot/cpucheck.c +1 −1
  2324. arch/x86/boot/early_serial_console.c +2 −2
  2325. arch/x86/boot/edd.c +3 −3
  2326. arch/x86/boot/header.S +5 −1
  2327. arch/x86/boot/main.c +2 −2
  2328. arch/x86/boot/memory.c +1 −1
  2329. arch/x86/boot/regs.c +1 −1
  2330. arch/x86/boot/tools/build.c +7 −0
  2331. arch/x86/boot/video-vesa.c +3 −3
  2332. arch/x86/boot/video.c +1 −1
  2333. arch/x86/configs/i386_defconfig +1 −0
  2334. arch/x86/configs/x86_64_defconfig +1 −0
  2335. arch/x86/crypto/Makefile +1 −4
  2336. arch/x86/crypto/aesni-intel_glue.c +2 −45
  2337. arch/x86/crypto/fpu.c +0 −207
  2338. arch/x86/crypto/sha1-mb/Makefile +0 −14
  2339. arch/x86/crypto/sha1-mb/sha1_mb.c +0 −1011
  2340. arch/x86/crypto/sha1-mb/sha1_mb_ctx.h +0 −134
  2341. arch/x86/crypto/sha1-mb/sha1_mb_mgr.h +0 −110
  2342. arch/x86/crypto/sha1-mb/sha1_mb_mgr_datastruct.S +0 −287
  2343. arch/x86/crypto/sha1-mb/sha1_mb_mgr_flush_avx2.S +0 −304
  2344. arch/x86/crypto/sha1-mb/sha1_mb_mgr_init_avx2.c +0 −64
  2345. arch/x86/crypto/sha1-mb/sha1_mb_mgr_submit_avx2.S +0 −209
  2346. arch/x86/crypto/sha1-mb/sha1_x8_avx2.S +0 −492
  2347. arch/x86/crypto/sha256-mb/Makefile +0 −14
  2348. arch/x86/crypto/sha256-mb/sha256_mb.c +0 −1013
  2349. arch/x86/crypto/sha256-mb/sha256_mb_ctx.h +0 −134
  2350. arch/x86/crypto/sha256-mb/sha256_mb_mgr.h +0 −108
  2351. arch/x86/crypto/sha256-mb/sha256_mb_mgr_datastruct.S +0 −304
  2352. arch/x86/crypto/sha256-mb/sha256_mb_mgr_flush_avx2.S +0 −307
  2353. arch/x86/crypto/sha256-mb/sha256_mb_mgr_init_avx2.c +0 −65
  2354. arch/x86/crypto/sha256-mb/sha256_mb_mgr_submit_avx2.S +0 −214
  2355. arch/x86/crypto/sha256-mb/sha256_x8_avx2.S +0 −598
  2356. arch/x86/crypto/sha512-mb/Makefile +0 −12
  2357. arch/x86/crypto/sha512-mb/sha512_mb.c +0 −1047
  2358. arch/x86/crypto/sha512-mb/sha512_mb_ctx.h +0 −128
  2359. arch/x86/crypto/sha512-mb/sha512_mb_mgr.h +0 −104
  2360. arch/x86/crypto/sha512-mb/sha512_mb_mgr_datastruct.S +0 −281
  2361. arch/x86/crypto/sha512-mb/sha512_mb_mgr_flush_avx2.S +0 −297
  2362. arch/x86/crypto/sha512-mb/sha512_mb_mgr_submit_avx2.S +0 −224
  2363. arch/x86/crypto/sha512-mb/sha512_x4_avx2.S +0 −531
  2364. arch/x86/entry/calling.h +15 −1
  2365. arch/x86/entry/entry_32.S +19 −9
  2366. arch/x86/entry/entry_64.S +66 −75
  2367. arch/x86/entry/entry_64_compat.S +5 −0
  2368. arch/x86/entry/vdso/Makefile +14 −2
  2369. arch/x86/entry/vdso/vclock_gettime.c +66 −154
  2370. arch/x86/entry/vdso/vgetcpu.c +1 −7
  2371. arch/x86/entry/vdso/vma.c +10 −52
  2372. arch/x86/entry/vsyscall/vsyscall_64.c +1 −8
  2373. arch/x86/entry/vsyscall/vsyscall_gtod.c +28 −23
  2374. arch/x86/events/amd/core.c +4 −0
  2375. arch/x86/events/amd/uncore.c +23 −7
  2376. arch/x86/events/core.c +33 −8
  2377. arch/x86/events/intel/core.c +272 −76
  2378. arch/x86/events/intel/cstate.c +4 −4
  2379. arch/x86/events/intel/pt.c +1 −1
  2380. arch/x86/events/intel/rapl.c +2 −2
  2381. arch/x86/events/intel/uncore.h +25 −8
  2382. arch/x86/events/intel/uncore_snb.c +119 −2
  2383. arch/x86/events/intel/uncore_snbep.c +7 −7
  2384. arch/x86/events/msr.c +4 −4
  2385. arch/x86/events/perf_event.h +3 −1
  2386. arch/x86/hyperv/Makefile +4 −0
  2387. arch/x86/hyperv/hv_apic.c +0 −1
  2388. arch/x86/hyperv/hv_init.c +19 −0
  2389. arch/x86/hyperv/hv_spinlock.c +88 −0
  2390. arch/x86/hyperv/mmu.c +2 −2
  2391. arch/x86/include/asm/acpi.h +7 −0
  2392. arch/x86/include/asm/alternative-asm.h +14 −6
  2393. arch/x86/include/asm/alternative.h +2 −9
  2394. arch/x86/include/asm/amd_nb.h +3 −0
  2395. arch/x86/include/asm/asm.h +25 −32
  2396. arch/x86/include/asm/atomic.h +4 −4
  2397. arch/x86/include/asm/atomic64_64.h +4 −4
  2398. arch/x86/include/asm/bitops.h +3 −6
  2399. arch/x86/include/asm/bug.h +56 −42
  2400. arch/x86/include/asm/cacheinfo.h +1 −0
  2401. arch/x86/include/asm/cmpxchg.h +6 −4
  2402. arch/x86/include/asm/compat.h +11 −19
  2403. arch/x86/include/asm/cpu_entry_area.h +0 −2
  2404. arch/x86/include/asm/cpufeature.h +47 −35
  2405. arch/x86/include/asm/cpufeatures.h +2 −0
  2406. arch/x86/include/asm/debugreg.h +1 −1
  2407. arch/x86/include/asm/desc.h +2 −2
  2408. arch/x86/include/asm/efi.h +1 −0
  2409. arch/x86/include/asm/elf.h +4 −5
  2410. arch/x86/include/asm/extable.h +2 −1
  2411. arch/x86/include/asm/fixmap.h +1 −1
  2412. arch/x86/include/asm/fpu/internal.h +2 −2
  2413. arch/x86/include/asm/fsgsbase.h +49 −0
  2414. arch/x86/include/asm/ftrace.h +1 −3
  2415. arch/x86/include/asm/futex.h +3 −3
  2416. arch/x86/include/asm/hugetlb.h +0 −69
  2417. arch/x86/include/asm/hyperv-tlfs.h +5 −0
  2418. arch/x86/include/asm/intel-family.h +17 −16
  2419. arch/x86/include/asm/io.h +2 −13
  2420. arch/x86/include/asm/iosf_mbi.h +29 −10
  2421. arch/x86/include/asm/irq_remapping.h +2 −0
  2422. arch/x86/include/asm/irqflags.h +6 −10
  2423. arch/x86/include/asm/jump_label.h +18 −62
  2424. arch/x86/include/asm/kexec.h +3 −2
  2425. arch/x86/include/asm/kvm_emulate.h +4 −0
  2426. arch/x86/include/asm/kvm_host.h +61 −9
  2427. arch/x86/include/asm/local.h +4 −4
  2428. arch/x86/include/asm/mce.h +32 −25
  2429. arch/x86/include/asm/mmu_context.h +2 −2
  2430. arch/x86/include/asm/mpx.h +9 −3
  2431. arch/x86/include/asm/mshyperv.h +3 −1
  2432. arch/x86/include/asm/msr-index.h +1 −0
  2433. arch/x86/include/asm/msr.h +2 −2
  2434. arch/x86/include/asm/nospec-branch.h +13 −4
  2435. arch/x86/include/asm/page_64_types.h +16 −11
  2436. arch/x86/include/asm/paravirt.h +195 −220
  2437. arch/x86/include/asm/paravirt_types.h +65 −75
  2438. arch/x86/include/asm/percpu.h +4 −4
  2439. arch/x86/include/asm/perf_event.h +9 −0
  2440. arch/x86/include/asm/pgalloc.h +1 −1
  2441. arch/x86/include/asm/pgtable-3level_types.h +1 −1
  2442. arch/x86/include/asm/pgtable.h +3 −4
  2443. arch/x86/include/asm/pgtable_64_types.h +1 −3
  2444. arch/x86/include/asm/pgtable_types.h +1 −1
  2445. arch/x86/include/asm/preempt.h +1 −1
  2446. arch/x86/include/asm/processor.h +10 −15
  2447. arch/x86/include/asm/ptrace.h +77 −9
  2448. arch/x86/include/asm/qspinlock.h +18 −0
  2449. arch/x86/include/asm/refcount.h +48 −31
  2450. arch/x86/include/asm/rmwcc.h +41 −28
  2451. arch/x86/include/asm/sections.h +0 −1
  2452. arch/x86/include/asm/segment.h +44 −4
  2453. arch/x86/include/asm/special_insns.h +2 −2
  2454. arch/x86/include/asm/string_64.h +19 −1
  2455. arch/x86/include/asm/suspend.h +8 −0
  2456. arch/x86/include/asm/suspend_32.h +4 −0
  2457. arch/x86/include/asm/tlb.h +14 −7
  2458. arch/x86/include/asm/tlbflush.h +18 −21
  2459. arch/x86/include/asm/trace/mpx.h +2 −2
  2460. arch/x86/include/asm/uaccess.h +11 −11
  2461. arch/x86/include/asm/unistd.h +2 −1
  2462. arch/x86/include/asm/uv/uv.h +6 −0
  2463. arch/x86/include/asm/vgtod.h +33 −46
  2464. arch/x86/include/asm/virtext.h +4 −3
  2465. arch/x86/include/asm/vmx.h +0 −13
  2466. arch/x86/include/asm/x86_init.h +2 −0
  2467. arch/x86/include/asm/xen/events.h +2 −0
  2468. arch/x86/include/asm/xen/page.h +31 −4
  2469. arch/x86/include/uapi/asm/bootparam.h +4 −0
  2470. arch/x86/include/uapi/asm/kvm.h +6 −2
  2471. arch/x86/include/uapi/asm/siginfo.h +0 −2
  2472. arch/x86/kernel/acpi/boot.c +9 −2
  2473. arch/x86/kernel/acpi/sleep.c +0 −1
  2474. arch/x86/kernel/alternative.c +5 −1
  2475. arch/x86/kernel/amd_gart_64.c +3 −3
  2476. arch/x86/kernel/amd_nb.c +41 −8
  2477. arch/x86/kernel/apic/apic.c +8 −1
  2478. arch/x86/kernel/apic/io_apic.c +4 −3
  2479. arch/x86/kernel/apic/probe_32.c +1 −0
  2480. arch/x86/kernel/apic/vector.c +4 −5
  2481. arch/x86/kernel/asm-offsets.c +7 −11
  2482. arch/x86/kernel/asm-offsets_64.c +6 −3
  2483. arch/x86/kernel/check.c +23 −5
  2484. arch/x86/kernel/cpu/Makefile +1 −0
  2485. arch/x86/kernel/cpu/amd.c +1 −1
  2486. arch/x86/kernel/cpu/bugs.c +55 −7
  2487. arch/x86/kernel/cpu/cacheinfo.c +29 −2
  2488. arch/x86/kernel/cpu/common.c +50 −33
  2489. arch/x86/kernel/cpu/cpu.h +1 −0
  2490. arch/x86/kernel/cpu/cyrix.c +1 −1
  2491. arch/x86/kernel/cpu/hygon.c +408 −0
  2492. arch/x86/kernel/cpu/intel_rdt.c +11 −6
  2493. arch/x86/kernel/cpu/intel_rdt.h +3 −3
  2494. arch/x86/kernel/cpu/intel_rdt_ctrlmondata.c +10 −2
  2495. arch/x86/kernel/cpu/intel_rdt_pseudo_lock.c +241 −164
  2496. arch/x86/kernel/cpu/intel_rdt_rdtgroup.c +182 −28
  2497. arch/x86/kernel/cpu/mcheck/dev-mcelog.c +0 −3
  2498. arch/x86/kernel/cpu/mcheck/mce-inject.c +6 −0
  2499. arch/x86/kernel/cpu/mcheck/mce-severity.c +2 −1
  2500. arch/x86/kernel/cpu/mcheck/mce.c +21 −9
  2501. arch/x86/kernel/cpu/microcode/core.c +2 −2
  2502. arch/x86/kernel/cpu/mshyperv.c +25 −0
  2503. arch/x86/kernel/cpu/mtrr/cleanup.c +2 −1
  2504. arch/x86/kernel/cpu/mtrr/generic.c +1 −1
  2505. arch/x86/kernel/cpu/mtrr/if.c +3 −3
  2506. arch/x86/kernel/cpu/mtrr/mtrr.c +1 −1
  2507. arch/x86/kernel/cpu/perfctr-watchdog.c +2 −0
  2508. arch/x86/kernel/cpu/vmware.c +3 −3
  2509. arch/x86/kernel/crash_dump_64.c +41 −19
  2510. arch/x86/kernel/devicetree.c +1 −1
  2511. arch/x86/kernel/e820.c +6 −15
  2512. arch/x86/kernel/early_printk.c +19 −10
  2513. arch/x86/kernel/fpu/signal.c +0 −1
  2514. arch/x86/kernel/head32.c +1 −0
  2515. arch/x86/kernel/head64.c +3 −1
  2516. arch/x86/kernel/head_64.S +1 −1
  2517. arch/x86/kernel/jump_label.c +25 −37
  2518. arch/x86/kernel/kprobes/core.c +1 −47
  2519. arch/x86/kernel/kprobes/opt.c +1 −1
  2520. arch/x86/kernel/kvm.c +10 −9
  2521. arch/x86/kernel/kvmclock.c +2 −2
  2522. arch/x86/kernel/ldt.c +38 −21
  2523. arch/x86/kernel/macros.S +16 −0
  2524. arch/x86/kernel/module.c +6 −0
  2525. arch/x86/kernel/mpparse.c +0 −1
  2526. arch/x86/kernel/msr.c +4 −4
  2527. arch/x86/kernel/paravirt-spinlocks.c +2 −13
  2528. arch/x86/kernel/paravirt.c +164 −172
  2529. arch/x86/kernel/paravirt_patch_32.c +42 −57
  2530. arch/x86/kernel/paravirt_patch_64.c +47 −64
  2531. arch/x86/kernel/pci-dma.c +1 −1
  2532. arch/x86/kernel/pci-swiotlb.c +1 −3
  2533. arch/x86/kernel/process_64.c +144 −45
  2534. arch/x86/kernel/ptrace.c +16 −41
  2535. arch/x86/kernel/pvclock.c +1 −1
  2536. arch/x86/kernel/setup.c +18 −2
  2537. arch/x86/kernel/setup_percpu.c +8 −6
  2538. arch/x86/kernel/smpboot.c +4 −2
  2539. arch/x86/kernel/sys_x86_64.c +6 −5
  2540. arch/x86/kernel/tce_64.c +3 −3
  2541. arch/x86/kernel/time.c +23 −1
  2542. arch/x86/kernel/traps.c +89 −109
  2543. arch/x86/kernel/tsc.c +9 −5
  2544. arch/x86/kernel/tsc_msr.c +5 −5
  2545. arch/x86/kernel/umip.c +1 −7
  2546. arch/x86/kernel/uprobes.c +1 −1
  2547. arch/x86/kernel/vm86_32.c +1 −1
  2548. arch/x86/kernel/vmlinux.lds.S +0 −10
  2549. arch/x86/kernel/vsmp_64.c +7 −77
  2550. arch/x86/kernel/x86_init.c +1 −2
  2551. arch/x86/kvm/emulate.c +21 −12
  2552. arch/x86/kvm/hyperv.c +212 −68
  2553. arch/x86/kvm/hyperv.h +4 −0
  2554. arch/x86/kvm/lapic.c +39 −8
  2555. arch/x86/kvm/lapic.h +1 −1
  2556. arch/x86/kvm/mmu.c +256 −172
  2557. arch/x86/kvm/mmu.h +4 −9
  2558. arch/x86/kvm/mmu_audit.c +6 −6
  2559. arch/x86/kvm/paging_tmpl.h +8 −7
  2560. arch/x86/kvm/svm.c +40 −30
  2561. arch/x86/kvm/trace.h +42 −0
  2562. arch/x86/kvm/vmx.c +1651 −767
  2563. arch/x86/kvm/vmx_shadow_fields.h +1 −4
  2564. arch/x86/kvm/x86.c +216 −72
  2565. arch/x86/kvm/x86.h +2 −0
  2566. arch/x86/lib/checksum_32.S +2 −2
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  2954. drivers/clk/at91/clk-h32mx.c +7 −15
  2955. drivers/clk/at91/clk-i2s-mux.c +2 −38
  2956. drivers/clk/at91/clk-main.c +4 −108
  2957. drivers/clk/at91/clk-master.c +3 −96
  2958. drivers/clk/at91/clk-peripheral.c +2 −79
  2959. drivers/clk/at91/clk-pll.c +8 −182
  2960. drivers/clk/at91/clk-plldiv.c +1 −26
  2961. drivers/clk/at91/clk-programmable.c +4 −77
  2962. drivers/clk/at91/clk-slow.c +1 −31
  2963. drivers/clk/at91/clk-smd.c +1 −33
  2964. drivers/clk/at91/clk-system.c +1 −38
  2965. drivers/clk/at91/clk-usb.c +3 −91
  2966. drivers/clk/at91/clk-utmi.c +1 −44
  2967. drivers/clk/at91/dt-compat.c +961 −0
  2968. drivers/clk/at91/pmc.c +78 −0
  2969. drivers/clk/at91/pmc.h +159 −0
  2970. drivers/clk/at91/sama5d2.c +336 −0
  2971. drivers/clk/at91/sama5d4.c +264 −0
  2972. drivers/clk/axs10x/pll_clock.c +2 −2
  2973. drivers/clk/bcm/clk-kona-setup.c +11 −11
  2974. drivers/clk/clk-asm9260.c +2 −2
  2975. drivers/clk/clk-bulk.c +80 −0
  2976. drivers/clk/clk-cdce925.c +6 −5
  2977. drivers/clk/clk-devres.c +24 −0
  2978. drivers/clk/clk-fixed-factor.c +5 −4
  2979. drivers/clk/clk-fixed-rate.c +1 −0
  2980. drivers/clk/clk-gpio.c +4 −4
  2981. drivers/clk/clk-hsdk-pll.c +2 −2
  2982. drivers/clk/clk-max77686.c +6 −21
  2983. drivers/clk/clk-nomadik.c +2 −2
  2984. drivers/clk/clk-npcm7xx.c +1 −1
  2985. drivers/clk/clk-palmas.c +2 −2
  2986. drivers/clk/clk-qoriq.c +7 −7
  2987. drivers/clk/clk-s2mps11.c +36 −22
  2988. drivers/clk/clk-scmi.c +1 −1
  2989. drivers/clk/clk-scpi.c +3 −3
  2990. drivers/clk/clk-si5351.c +2 −2
  2991. drivers/clk/clk-stm32f4.c +1 −1
  2992. drivers/clk/clk-stm32h7.c +1 −1
  2993. drivers/clk/clk-stm32mp1.c +1 −1
  2994. drivers/clk/clk-tango4.c +5 −5
  2995. drivers/clk/clk.c +95 −0
  2996. drivers/clk/davinci/psc.c +0 −18
  2997. drivers/clk/hisilicon/Kconfig +7 −0
  2998. drivers/clk/hisilicon/Makefile +1 −0
  2999. drivers/clk/hisilicon/clk-hi3670.c +1016 −0
  3000. drivers/clk/hisilicon/reset.c +2 −3
  3001. drivers/clk/imx/clk-cpu.c +1 −1
  3002. drivers/clk/imx/clk-imx6q.c +1 −0
  3003. drivers/clk/imx/clk-imx6sl.c +2 −0
  3004. drivers/clk/imx/clk-imx6sll.c +1 −0
  3005. drivers/clk/imx/clk-imx6sx.c +1 −0
  3006. drivers/clk/imx/clk-imx6ul.c +1 −0
  3007. drivers/clk/imx/clk-imx7d.c +8 −20
  3008. drivers/clk/imx/clk.h +7 −0
  3009. drivers/clk/ingenic/Kconfig +47 −0
  3010. drivers/clk/ingenic/Makefile +5 −4
  3011. drivers/clk/ingenic/jz4725b-cgu.c +225 −0
  3012. drivers/clk/keystone/Kconfig +1 −1
  3013. drivers/clk/keystone/gate.c +6 −1
  3014. drivers/clk/keystone/pll.c +6 −1
  3015. drivers/clk/mediatek/clk-mt2701.c +0 −5
  3016. drivers/clk/meson/axg-audio.c +23 −11
  3017. drivers/clk/meson/axg.c +202 −143
  3018. drivers/clk/meson/axg.h +7 −1
  3019. drivers/clk/meson/clk-pll.c +101 −55
  3020. drivers/clk/meson/clkc.h +4 −12
  3021. drivers/clk/meson/gxbb.c +273 −257
  3022. drivers/clk/meson/gxbb.h +8 −2
  3023. drivers/clk/meson/meson8b.c +135 −145
  3024. drivers/clk/meson/meson8b.h +4 −1
  3025. drivers/clk/mmp/clk-of-mmp2.c +2 −2
  3026. drivers/clk/mvebu/ap806-system-controller.c +1 −4
  3027. drivers/clk/mvebu/armada-370.c +1 −3
  3028. drivers/clk/mvebu/armada-375.c +1 −3
  3029. drivers/clk/mvebu/armada-37xx-periph.c +50 −8
  3030. drivers/clk/mvebu/armada-37xx-tbg.c +3 −5
  3031. drivers/clk/mvebu/armada-37xx-xtal.c +1 −3
  3032. drivers/clk/mvebu/armada-38x.c +1 −3
  3033. drivers/clk/mvebu/armada-39x.c +1 −3
  3034. drivers/clk/mvebu/armada-xp.c +1 −3
  3035. drivers/clk/mvebu/clk-corediv.c +1 −3
  3036. drivers/clk/mvebu/clk-cpu.c +3 −5
  3037. drivers/clk/mvebu/common.c +1 −3
  3038. drivers/clk/mvebu/common.h +1 −3
  3039. drivers/clk/mvebu/cp110-system-controller.c +1 −3
  3040. drivers/clk/mvebu/dove.c +1 −3
  3041. drivers/clk/mvebu/kirkwood.c +1 −3
  3042. drivers/clk/mvebu/mv98dx3236.c +1 −3
  3043. drivers/clk/mvebu/orion.c +1 −3
  3044. drivers/clk/qcom/Kconfig +53 −0
  3045. drivers/clk/qcom/Makefile +8 −0
  3046. drivers/clk/qcom/camcc-sdm845.c +1745 −0
  3047. drivers/clk/qcom/clk-alpha-pll.c +1 −0
  3048. drivers/clk/qcom/clk-branch.c +1 −1
  3049. drivers/clk/qcom/clk-hfpll.c +244 −0
  3050. drivers/clk/qcom/clk-hfpll.h +44 −0
  3051. drivers/clk/qcom/clk-krait.c +126 −0
  3052. drivers/clk/qcom/clk-krait.h +40 −0
  3053. drivers/clk/qcom/clk-rcg.h +11 −0
  3054. drivers/clk/qcom/clk-rcg2.c +195 −0
  3055. drivers/clk/qcom/gcc-ipq806x.c +82 −0
  3056. drivers/clk/qcom/gcc-msm8960.c +172 −0
  3057. drivers/clk/qcom/gcc-msm8996.c +152 −0
  3058. drivers/clk/qcom/gcc-qcs404.c +2744 −0
  3059. drivers/clk/qcom/gcc-sdm660.c +2480 −0
  3060. drivers/clk/qcom/gcc-sdm845.c +209 −112
  3061. drivers/clk/qcom/hfpll.c +96 −0
  3062. drivers/clk/qcom/kpss-xcc.c +87 −0
  3063. drivers/clk/qcom/krait-cc.c +397 −0
  3064. drivers/clk/renesas/Kconfig +18 −1
  3065. drivers/clk/renesas/Makefile +3 −0
  3066. drivers/clk/renesas/clk-div6.c +7 −10
  3067. drivers/clk/renesas/clk-emev2.c +5 −17
  3068. drivers/clk/renesas/clk-mstp.c +5 −8
  3069. drivers/clk/renesas/clk-r8a73a4.c +3 −6
  3070. drivers/clk/renesas/clk-r8a7740.c +3 −6
  3071. drivers/clk/renesas/clk-r8a7778.c +3 −6
  3072. drivers/clk/renesas/clk-r8a7779.c +3 −6
  3073. drivers/clk/renesas/clk-rcar-gen2.c +3 −6
  3074. drivers/clk/renesas/clk-rz.c +3 −6
  3075. drivers/clk/renesas/clk-sh73a0.c +3 −6
  3076. drivers/clk/renesas/r7s9210-cpg-mssr.c +217 −0
  3077. drivers/clk/renesas/r8a7743-cpg-mssr.c +13 −5
  3078. drivers/clk/renesas/r8a7745-cpg-mssr.c +1 −4
  3079. drivers/clk/renesas/r8a774a1-cpg-mssr.c +323 −0
  3080. drivers/clk/renesas/r8a774c0-cpg-mssr.c +286 −0
  3081. drivers/clk/renesas/r8a7790-cpg-mssr.c +1 −4
  3082. drivers/clk/renesas/r8a7791-cpg-mssr.c +1 −4
  3083. drivers/clk/renesas/r8a7792-cpg-mssr.c +1 −4
  3084. drivers/clk/renesas/r8a7794-cpg-mssr.c +1 −4
  3085. drivers/clk/renesas/r8a7795-cpg-mssr.c +35 −37
  3086. drivers/clk/renesas/r8a7796-cpg-mssr.c +35 −37
  3087. drivers/clk/renesas/r8a77965-cpg-mssr.c +36 −33
  3088. drivers/clk/renesas/r8a77970-cpg-mssr.c +75 −6
  3089. drivers/clk/renesas/r8a77980-cpg-mssr.c +21 −11
  3090. drivers/clk/renesas/r8a77990-cpg-mssr.c +13 −4
  3091. drivers/clk/renesas/r8a77995-cpg-mssr.c +11 −6
  3092. drivers/clk/renesas/r9a06g032-clocks.c +2 −1
  3093. drivers/clk/renesas/rcar-gen2-cpg.c +1 −4
  3094. drivers/clk/renesas/rcar-gen2-cpg.h +2 −5
  3095. drivers/clk/renesas/rcar-gen3-cpg.c +32 −13
  3096. drivers/clk/renesas/rcar-gen3-cpg.h +24 −9
  3097. drivers/clk/renesas/rcar-usb2-clock-sel.c +1 −4
  3098. drivers/clk/renesas/renesas-cpg-mssr.c +168 −37
  3099. drivers/clk/renesas/renesas-cpg-mssr.h +33 −5
  3100. drivers/clk/rockchip/clk-ddr.c +0 −4
  3101. drivers/clk/rockchip/clk-rk3188.c +1 −1
  3102. drivers/clk/rockchip/clk-rk3288.c +25 −4
  3103. drivers/clk/rockchip/clk-rk3328.c +4 −4
  3104. drivers/clk/samsung/clk-cpu.c +3 −3
  3105. drivers/clk/samsung/clk-cpu.h +1 −1
  3106. drivers/clk/samsung/clk-exynos-audss.c +0 −1
  3107. drivers/clk/samsung/clk-exynos3250.c +0 −1
  3108. drivers/clk/samsung/clk-exynos4.c +14 −212
  3109. drivers/clk/samsung/clk-exynos5250.c +2 −40
  3110. drivers/clk/samsung/clk-exynos5420.c +8 −68
  3111. drivers/clk/samsung/clk-exynos5433.c +32 −1
  3112. drivers/clk/samsung/clk-s3c2410.c +2 −41
  3113. drivers/clk/samsung/clk-s3c2412.c +2 −41
  3114. drivers/clk/samsung/clk-s3c2443.c +2 −41
  3115. drivers/clk/samsung/clk-s3c64xx.c +6 −60
  3116. drivers/clk/samsung/clk-s5pv210.c +2 −39
  3117. drivers/clk/samsung/clk.c +13 −10
  3118. drivers/clk/samsung/clk.h +16 −2
  3119. drivers/clk/st/clkgen-fsyn.c +1 −1
  3120. drivers/clk/sunxi-ng/ccu-sun4i-a10.c +9 −1
  3121. drivers/clk/sunxi-ng/ccu-sun50i-a64.c +26 −22
  3122. drivers/clk/sunxi-ng/ccu-sun50i-a64.h +3 −1
  3123. drivers/clk/sunxi-ng/ccu-sun50i-h6.c +28 −25
  3124. drivers/clk/sunxi-ng/ccu-sun8i-a83t.c +2 −0
  3125. drivers/clk/sunxi-ng/ccu-sun8i-h3.c +13 −12
  3126. drivers/clk/sunxi-ng/ccu-sun8i-r40.c +26 −26
  3127. drivers/clk/sunxi-ng/ccu_nkmp.c +7 −0
  3128. drivers/clk/sunxi-ng/ccu_nkmp.h +1 −0
  3129. drivers/clk/sunxi-ng/ccu_nm.c +7 −0
  3130. drivers/clk/sunxi-ng/ccu_nm.h +30 −0
  3131. drivers/clk/sunxi/clk-mod0.c +3 −3
  3132. drivers/clk/sunxi/clk-sun9i-core.c +10 −10
  3133. drivers/clk/sunxi/clk-sunxi.c +2 −2
  3134. drivers/clk/tegra/clk-dfll.c +6 −2
  3135. drivers/clk/tegra/clk-tegra210.c +4 −3
  3136. drivers/clk/ti/Makefile +6 −3
  3137. drivers/clk/ti/apll.c +9 −9
  3138. drivers/clk/ti/clk-33xx-compat.c +218 −0
  3139. drivers/clk/ti/clk-33xx.c +140 −92
  3140. drivers/clk/ti/clk-43xx-compat.c +225 −0
  3141. drivers/clk/ti/clk-43xx.c +150 −99
  3142. drivers/clk/ti/clk-7xx-compat.c +823 −0
  3143. drivers/clk/ti/clk-7xx.c +328 −262
  3144. drivers/clk/ti/clk-dra7-atl.c +2 −2
  3145. drivers/clk/ti/clk.c +20 −12
  3146. drivers/clk/ti/clkctrl.c +77 −24
  3147. drivers/clk/ti/clock.h +11 −0
  3148. drivers/clk/ti/composite.c +7 −7
  3149. drivers/clk/ti/divider.c +38 −2
  3150. drivers/clk/ti/dpll.c +12 −6
  3151. drivers/clk/ti/dpll3xxx.c +124 −0
  3152. drivers/clk/ti/fapll.c +4 −4
  3153. drivers/clk/ti/fixed-factor.c +2 −2
  3154. drivers/clk/ti/gate.c +4 −1
  3155. drivers/clk/ti/interface.c +1 −1
  3156. drivers/clk/ti/mux.c +31 −2
  3157. drivers/clk/zynq/clkc.c +2 −2
  3158. drivers/clk/zynqmp/Kconfig +10 −0
  3159. drivers/clk/zynqmp/Makefile +4 −0
  3160. drivers/clk/zynqmp/clk-gate-zynqmp.c +144 −0
  3161. drivers/clk/zynqmp/clk-mux-zynqmp.c +141 −0
  3162. drivers/clk/zynqmp/clk-zynqmp.h +68 −0
  3163. drivers/clk/zynqmp/clkc.c +716 −0
  3164. drivers/clk/zynqmp/divider.c +217 −0
  3165. drivers/clk/zynqmp/pll.c +335 −0
  3166. drivers/clocksource/Kconfig +18 −0
  3167. drivers/clocksource/Makefile +15 −13
  3168. drivers/clocksource/arm_arch_timer.c +15 −0
  3169. drivers/clocksource/asm9260_timer.c +1 −1
  3170. drivers/clocksource/dw_apb_timer_of.c +16 −4
  3171. drivers/clocksource/i8253.c +12 −2
  3172. drivers/clocksource/pxa_timer.c +3 −3
  3173. drivers/clocksource/renesas-ostm.c +1 −10
  3174. drivers/clocksource/riscv_timer.c +8 −4
  3175. drivers/clocksource/sh_cmt.c +53 −53
  3176. drivers/clocksource/sh_mtu2.c +1 −9
  3177. drivers/clocksource/sh_tmu.c +1 −9
  3178. drivers/clocksource/timer-armada-370-xp.c +0 −0
  3179. drivers/clocksource/timer-cadence-ttc.c +1 −1
  3180. drivers/clocksource/timer-efm32.c +0 −0
  3181. drivers/clocksource/timer-fsl-ftm.c +0 −0
  3182. drivers/clocksource/timer-gx6605s.c +154 −0
  3183. drivers/clocksource/timer-integrator-ap.c +1 −1
  3184. drivers/clocksource/timer-lpc32xx.c +0 −0
  3185. drivers/clocksource/timer-mp-csky.c +173 −0
  3186. drivers/clocksource/timer-orion.c +4 −4
  3187. drivers/clocksource/timer-owl.c +0 −0
  3188. drivers/clocksource/timer-pistachio.c +0 −0
  3189. drivers/clocksource/timer-qcom.c +0 −0
  3190. drivers/clocksource/timer-sp804.c +1 −1
  3191. drivers/clocksource/timer-versatile.c +0 −0
  3192. drivers/clocksource/timer-vf-pit.c +0 −0
  3193. drivers/clocksource/timer-vt8500.c +0 −0
  3194. drivers/clocksource/timer-zevio.c +4 −4
  3195. drivers/cpufreq/Kconfig.arm +1 −8
  3196. drivers/cpufreq/Makefile +0 −3
  3197. drivers/cpufreq/acpi-cpufreq.c +5 −0
  3198. drivers/cpufreq/amd_freq_sensitivity.c +7 −2
  3199. drivers/cpufreq/arm_big_little_dt.c +0 −100
  3200. drivers/cpufreq/cppc_cpufreq.c +1 −1
  3201. drivers/cpufreq/cpufreq-dt-platdev.c +5 −1
.clang-format+0−1
@@ -323,7 +323,6 @@ ForEachMacros: · 322 unmodified lines
323 - 'protocol_for_each_card'323 - 'protocol_for_each_card'
324 - 'protocol_for_each_dev'324 - 'protocol_for_each_dev'
325 - 'queue_for_each_hw_ctx'325 - 'queue_for_each_hw_ctx'
326 - 'radix_tree_for_each_contig'
327 - 'radix_tree_for_each_slot'326 - 'radix_tree_for_each_slot'
328 - 'radix_tree_for_each_tagged'327 - 'radix_tree_for_each_tagged'
329 - 'rbtree_postorder_for_each_entry_safe'328 - 'rbtree_postorder_for_each_entry_safe'
.mailmap+13−0
@@ -119,6 +119,13 @@ Mark Brown <broonie@sirena.org.uk> · 118 unmodified lines
119Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com>119Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com>
120Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>120Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
121Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>121Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>
122Matthew Wilcox <willy@infradead.org> <matthew.r.wilcox@intel.com>
123Matthew Wilcox <willy@infradead.org> <matthew@wil.cx>
124Matthew Wilcox <willy@infradead.org> <mawilcox@linuxonhyperv.com>
125Matthew Wilcox <willy@infradead.org> <mawilcox@microsoft.com>
126Matthew Wilcox <willy@infradead.org> <willy@debian.org>
127Matthew Wilcox <willy@infradead.org> <willy@linux.intel.com>
128Matthew Wilcox <willy@infradead.org> <willy@parisc-linux.org>
122Matthieu CASTET <castet.matthieu@free.fr>129Matthieu CASTET <castet.matthieu@free.fr>
123Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>130Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>
124Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>131Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
@@ -152,7 +159,13 @@ Peter Oruba <peter@oruba.de> · 27 unmodified lines
152Peter Oruba <peter.oruba@amd.com>159Peter Oruba <peter.oruba@amd.com>
153Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>160Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
154Praveen BP <praveenbp@ti.com>161Praveen BP <praveenbp@ti.com>
162Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
155Qais Yousef <qsyousef@gmail.com> <qais.yousef@imgtec.com>163Qais Yousef <qsyousef@gmail.com> <qais.yousef@imgtec.com>
164Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
165Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
166Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com>
167Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de>
168Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
156Rajesh Shah <rajesh.shah@intel.com>169Rajesh Shah <rajesh.shah@intel.com>
157Ralf Baechle <ralf@linux-mips.org>170Ralf Baechle <ralf@linux-mips.org>
158Ralf Wildenhues <Ralf.Wildenhues@gmx.de>171Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
CREDITS+4−0
@@ -2138,6 +2138,10 @@ E: paul@laufernet.com · 2137 unmodified lines
2138D: Soundblaster driver fixes, ISAPnP quirk2138D: Soundblaster driver fixes, ISAPnP quirk
2139S: California, USA2139S: California, USA
2140 2140
2141N: Jarkko Lavinen
2142E: jarkko.lavinen@nokia.com
2143D: OMAP MMC support
2144
2141N: Jonathan Layes2145N: Jonathan Layes
2142D: ARPD support2146D: ARPD support
2143 2147
Documentation/00-INDEX+0−428
@@ -1,428 +0,0 @@
1
2This is a brief list of all the files in ./linux/Documentation and what
3they contain. If you add a documentation file, please list it here in
4alphabetical order as well, or risk being hunted down like a rabid dog.
5Please keep the descriptions small enough to fit on one line.
6 Thanks -- Paul G.
7
8Following translations are available on the WWW:
9
10 - Japanese, maintained by the JF Project (jf@listserv.linux.or.jp), at
11 http://linuxjf.sourceforge.jp/
12
1300-INDEX
14 - this file.
15ABI/
16 - info on kernel <-> userspace ABI and relative interface stability.
17CodingStyle
18 - nothing here, just a pointer to process/coding-style.rst.
19DMA-API.txt
20 - DMA API, pci_ API & extensions for non-consistent memory machines.
21DMA-API-HOWTO.txt
22 - Dynamic DMA mapping Guide
23DMA-ISA-LPC.txt
24 - How to do DMA with ISA (and LPC) devices.
25DMA-attributes.txt
26 - listing of the various possible attributes a DMA region can have
27EDID/
28 - directory with info on customizing EDID for broken gfx/displays.
29IPMI.txt
30 - info on Linux Intelligent Platform Management Interface (IPMI) Driver.
31IRQ-affinity.txt
32 - how to select which CPU(s) handle which interrupt events on SMP.
33IRQ-domain.txt
34 - info on interrupt numbering and setting up IRQ domains.
35IRQ.txt
36 - description of what an IRQ is.
37Intel-IOMMU.txt
38 - basic info on the Intel IOMMU virtualization support.
39Makefile
40 - It's not of interest for those who aren't touching the build system.
41PCI/
42 - info related to PCI drivers.
43RCU/
44 - directory with info on RCU (read-copy update).
45SAK.txt
46 - info on Secure Attention Keys.
47SM501.txt
48 - Silicon Motion SM501 multimedia companion chip
49SubmittingPatches
50 - nothing here, just a pointer to process/coding-style.rst.
51accounting/
52 - documentation on accounting and taskstats.
53acpi/
54 - info on ACPI-specific hooks in the kernel.
55admin-guide/
56 - info related to Linux users and system admins.
57aoe/
58 - description of AoE (ATA over Ethernet) along with config examples.
59arm/
60 - directory with info about Linux on the ARM architecture.
61arm64/
62 - directory with info about Linux on the 64 bit ARM architecture.
63auxdisplay/
64 - misc. LCD driver documentation (cfag12864b, ks0108).
65backlight/
66 - directory with info on controlling backlights in flat panel displays
67block/
68 - info on the Block I/O (BIO) layer.
69blockdev/
70 - info on block devices & drivers
71bt8xxgpio.txt
72 - info on how to modify a bt8xx video card for GPIO usage.
73btmrvl.txt
74 - info on Marvell Bluetooth driver usage.
75bus-devices/
76 - directory with info on TI GPMC (General Purpose Memory Controller)
77bus-virt-phys-mapping.txt
78 - how to access I/O mapped memory from within device drivers.
79cdrom/
80 - directory with information on the CD-ROM drivers that Linux has.
81cgroup-v1/
82 - cgroups v1 features, including cpusets and memory controller.
83cma/
84 - Continuous Memory Area (CMA) debugfs interface.
85conf.py
86 - It's not of interest for those who aren't touching the build system.
87connector/
88 - docs on the netlink based userspace<->kernel space communication mod.
89console/
90 - documentation on Linux console drivers.
91core-api/
92 - documentation on kernel core components.
93cpu-freq/
94 - info on CPU frequency and voltage scaling.
95cpu-hotplug.txt
96 - document describing CPU hotplug support in the Linux kernel.
97cpu-load.txt
98 - document describing how CPU load statistics are collected.
99cpuidle/
100 - info on CPU_IDLE, CPU idle state management subsystem.
101cputopology.txt
102 - documentation on how CPU topology info is exported via sysfs.
103crc32.txt
104 - brief tutorial on CRC computation
105crypto/
106 - directory with info on the Crypto API.
107dcdbas.txt
108 - information on the Dell Systems Management Base Driver.
109debugging-modules.txt
110 - some notes on debugging modules after Linux 2.6.3.
111debugging-via-ohci1394.txt
112 - how to use firewire like a hardware debugger memory reader.
113dell_rbu.txt
114 - document demonstrating the use of the Dell Remote BIOS Update driver.
115dev-tools/
116 - directory with info on development tools for the kernel.
117device-mapper/
118 - directory with info on Device Mapper.
119dmaengine/
120 - the DMA engine and controller API guides.
121devicetree/
122 - directory with info on device tree files used by OF/PowerPC/ARM
123digsig.txt
124 -info on the Digital Signature Verification API
125dma-buf-sharing.txt
126 - the DMA Buffer Sharing API Guide
127docutils.conf
128 - nothing here. Just a configuration file for docutils.
129dontdiff
130 - file containing a list of files that should never be diff'ed.
131driver-api/
132 - the Linux driver implementer's API guide.
133driver-model/
134 - directory with info about Linux driver model.
135early-userspace/
136 - info about initramfs, klibc, and userspace early during boot.
137efi-stub.txt
138 - How to use the EFI boot stub to bypass GRUB or elilo on EFI systems.
139eisa.txt
140 - info on EISA bus support.
141extcon/
142 - directory with porting guide for Android kernel switch driver.
143isa.txt
144 - info on EISA bus support.
145fault-injection/
146 - dir with docs about the fault injection capabilities infrastructure.
147fb/
148 - directory with info on the frame buffer graphics abstraction layer.
149features/
150 - status of feature implementation on different architectures.
151filesystems/
152 - info on the vfs and the various filesystems that Linux supports.
153firmware_class/
154 - request_firmware() hotplug interface info.
155flexible-arrays.txt
156 - how to make use of flexible sized arrays in linux
157fmc/
158 - information about the FMC bus abstraction
159fpga/
160 - FPGA Manager Core.
161futex-requeue-pi.txt
162 - info on requeueing of tasks from a non-PI futex to a PI futex
163gcc-plugins.txt
164 - GCC plugin infrastructure.
165gpio/
166 - gpio related documentation
167gpu/
168 - directory with information on GPU driver developer's guide.
169hid/
170 - directory with information on human interface devices
171highuid.txt
172 - notes on the change from 16 bit to 32 bit user/group IDs.
173hwspinlock.txt
174 - hardware spinlock provides hardware assistance for synchronization
175timers/
176 - info on the timer related topics
177hw_random.txt
178 - info on Linux support for random number generator in i8xx chipsets.
179hwmon/
180 - directory with docs on various hardware monitoring drivers.
181i2c/
182 - directory with info about the I2C bus/protocol (2 wire, kHz speed).
183x86/i386/
184 - directory with info about Linux on Intel 32 bit architecture.
185ia64/
186 - directory with info about Linux on Intel 64 bit architecture.
187ide/
188 - Information regarding the Enhanced IDE drive.
189iio/
190 - info on industrial IIO configfs support.
191index.rst
192 - main index for the documentation at ReST format.
193infiniband/
194 - directory with documents concerning Linux InfiniBand support.
195input/
196 - info on Linux input device support.
197intel_txt.txt
198 - info on intel Trusted Execution Technology (intel TXT).
199io-mapping.txt
200 - description of io_mapping functions in linux/io-mapping.h
201io_ordering.txt
202 - info on ordering I/O writes to memory-mapped addresses.
203ioctl/
204 - directory with documents describing various IOCTL calls.
205iostats.txt
206 - info on I/O statistics Linux kernel provides.
207irqflags-tracing.txt
208 - how to use the irq-flags tracing feature.
209isapnp.txt
210 - info on Linux ISA Plug & Play support.
211isdn/
212 - directory with info on the Linux ISDN support, and supported cards.
213kbuild/
214 - directory with info about the kernel build process.
215kdump/
216 - directory with mini HowTo on getting the crash dump code to work.
217doc-guide/
218 - how to write and format reStructuredText kernel documentation
219kernel-per-CPU-kthreads.txt
220 - List of all per-CPU kthreads and how they introduce jitter.
221kobject.txt
222 - info of the kobject infrastructure of the Linux kernel.
223kprobes.txt
224 - documents the kernel probes debugging feature.
225kref.txt
226 - docs on adding reference counters (krefs) to kernel objects.
227laptops/
228 - directory with laptop related info and laptop driver documentation.
229ldm.txt
230 - a brief description of LDM (Windows Dynamic Disks).
231leds/
232 - directory with info about LED handling under Linux.
233livepatch/
234 - info on kernel live patching.
235locking/
236 - directory with info about kernel locking primitives
237lockup-watchdogs.txt
238 - info on soft and hard lockup detectors (aka nmi_watchdog).
239logo.gif
240 - full colour GIF image of Linux logo (penguin - Tux).
241logo.txt
242 - info on creator of above logo & site to get additional images from.
243lsm.txt
244 - Linux Security Modules: General Security Hooks for Linux
245lzo.txt
246 - kernel LZO decompressor input formats
247m68k/
248 - directory with info about Linux on Motorola 68k architecture.
249mailbox.txt
250 - How to write drivers for the common mailbox framework (IPC).
251md/
252 - directory with info about Linux Software RAID
253media/
254 - info on media drivers: uAPI, kAPI and driver documentation.
255memory-barriers.txt
256 - info on Linux kernel memory barriers.
257memory-devices/
258 - directory with info on parts like the Texas Instruments EMIF driver
259memory-hotplug.txt
260 - Hotpluggable memory support, how to use and current status.
261men-chameleon-bus.txt
262 - info on MEN chameleon bus.
263mic/
264 - Intel Many Integrated Core (MIC) architecture device driver.
265mips/
266 - directory with info about Linux on MIPS architecture.
267misc-devices/
268 - directory with info about devices using the misc dev subsystem
269mmc/
270 - directory with info about the MMC subsystem
271mtd/
272 - directory with info about memory technology devices (flash)
273namespaces/
274 - directory with various information about namespaces
275netlabel/
276 - directory with information on the NetLabel subsystem.
277networking/
278 - directory with info on various aspects of networking with Linux.
279nfc/
280 - directory relating info about Near Field Communications support.
281nios2/
282 - Linux on the Nios II architecture.
283nommu-mmap.txt
284 - documentation about no-mmu memory mapping support.
285numastat.txt
286 - info on how to read Numa policy hit/miss statistics in sysfs.
287ntb.txt
288 - info on Non-Transparent Bridge (NTB) drivers.
289nvdimm/
290 - info on non-volatile devices.
291nvmem/
292 - info on non volatile memory framework.
293output/
294 - default directory where html/LaTeX/pdf files will be written.
295padata.txt
296 - An introduction to the "padata" parallel execution API
297parisc/
298 - directory with info on using Linux on PA-RISC architecture.
299parport-lowlevel.txt
300 - description and usage of the low level parallel port functions.
301pcmcia/
302 - info on the Linux PCMCIA driver.
303percpu-rw-semaphore.txt
304 - RCU based read-write semaphore optimized for locking for reading
305perf/
306 - info about the APM X-Gene SoC Performance Monitoring Unit (PMU).
307phy/
308 - ino on Samsung USB 2.0 PHY adaptation layer.
309phy.txt
310 - Description of the generic PHY framework.
311pi-futex.txt
312 - documentation on lightweight priority inheritance futexes.
313pinctrl.txt
314 - info on pinctrl subsystem and the PINMUX/PINCONF and drivers
315platform/
316 - List of supported hardware by compal and Dell laptop.
317pnp.txt
318 - Linux Plug and Play documentation.
319power/
320 - directory with info on Linux PCI power management.
321powerpc/
322 - directory with info on using Linux with the PowerPC.
323prctl/
324 - directory with info on the priveledge control subsystem
325preempt-locking.txt
326 - info on locking under a preemptive kernel.
327process/
328 - how to work with the mainline kernel development process.
329pps/
330 - directory with information on the pulse-per-second support
331pti/
332 - directory with info on Intel MID PTI.
333ptp/
334 - directory with info on support for IEEE 1588 PTP clocks in Linux.
335pwm.txt
336 - info on the pulse width modulation driver subsystem
337rapidio/
338 - directory with info on RapidIO packet-based fabric interconnect
339rbtree.txt
340 - info on what red-black trees are and what they are for.
341remoteproc.txt
342 - info on how to handle remote processor (e.g. AMP) offloads/usage.
343rfkill.txt
344 - info on the radio frequency kill switch subsystem/support.
345robust-futex-ABI.txt
346 - documentation of the robust futex ABI.
347robust-futexes.txt
348 - a description of what robust futexes are.
349rpmsg.txt
350 - info on the Remote Processor Messaging (rpmsg) Framework
351rtc.txt
352 - notes on how to use the Real Time Clock (aka CMOS clock) driver.
353s390/
354 - directory with info on using Linux on the IBM S390.
355scheduler/
356 - directory with info on the scheduler.
357scsi/
358 - directory with info on Linux scsi support.
359security/
360 - directory that contains security-related info
361serial/
362 - directory with info on the low level serial API.
363sgi-ioc4.txt
364 - description of the SGI IOC4 PCI (multi function) device.
365sh/
366 - directory with info on porting Linux to a new architecture.
367smsc_ece1099.txt
368 -info on the smsc Keyboard Scan Expansion/GPIO Expansion device.
369sound/
370 - directory with info on sound card support.
371spi/
372 - overview of Linux kernel Serial Peripheral Interface (SPI) support.
373sphinx/
374 - no documentation here, just files required by Sphinx toolchain.
375sphinx-static/
376 - no documentation here, just files required by Sphinx toolchain.
377static-keys.txt
378 - info on how static keys allow debug code in hotpaths via patching
379svga.txt
380 - short guide on selecting video modes at boot via VGA BIOS.
381sync_file.txt
382 - Sync file API guide.
383sysctl/
384 - directory with info on the /proc/sys/* files.
385target/
386 - directory with info on generating TCM v4 fabric .ko modules
387tee.txt
388 - info on the TEE subsystem and drivers
389this_cpu_ops.txt
390 - List rationale behind and the way to use this_cpu operations.
391thermal/
392 - directory with information on managing thermal issues (CPU/temp)
393trace/
394 - directory with info on tracing technologies within linux
395translations/
396 - translations of this document from English to another language
397unaligned-memory-access.txt
398 - info on how to avoid arch breaking unaligned memory access in code.
399unshare.txt
400 - description of the Linux unshare system call.
401usb/
402 - directory with info regarding the Universal Serial Bus.
403vfio.txt
404 - info on Virtual Function I/O used in guest/hypervisor instances.
405video-output.txt
406 - sysfs class driver interface to enable/disable a video output device.
407virtual/
408 - directory with information on the various linux virtualizations.
409vm/
410 - directory with info on the Linux vm code.
411w1/
412 - directory with documents regarding the 1-wire (w1) subsystem.
413watchdog/
414 - how to auto-reboot Linux if it has "fallen and can't get up". ;-)
415wimax/
416 - directory with info about Intel Wireless Wimax Connections
417core-api/workqueue.rst
418 - information on the Concurrency Managed Workqueue implementation
419x86/x86_64/
420 - directory with info on Linux support for AMD x86-64 (Hammer) machines.
421xillybus.txt
422 - Overview and basic ui of xillybus driver
423xtensa/
424 - directory with documents relating to arch/xtensa port/implementation
425xz.txt
426 - how to make use of the XZ data compression within linux kernel
427zorro.txt
428 - info on writing drivers for Zorro bus devices found on Amigas.
Documentation/ABI/stable/sysfs-driver-usb-usbtmc+0−35
@@ -25,38 +25,3 @@ Description: · 24 unmodified lines
25 4.2.2.25 4.2.2.
26 26
27 The files are read only.27 The files are read only.
28
29
30What: /sys/bus/usb/drivers/usbtmc/*/TermChar
31Date: August 2008
32Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
33Description:
34 This file is the TermChar value to be sent to the USB TMC
35 device as described by the document, "Universal Serial Bus Test
36 and Measurement Class Specification
37 (USBTMC) Revision 1.0" as published by the USB-IF.
38
39 Note that the TermCharEnabled file determines if this value is
40 sent to the device or not.
41
42
43What: /sys/bus/usb/drivers/usbtmc/*/TermCharEnabled
44Date: August 2008
45Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46Description:
47 This file determines if the TermChar is to be sent to the
48 device on every transaction or not. For more details about
49 this, please see the document, "Universal Serial Bus Test and
50 Measurement Class Specification (USBTMC) Revision 1.0" as
51 published by the USB-IF.
52
53
54What: /sys/bus/usb/drivers/usbtmc/*/auto_abort
55Date: August 2008
56Contact: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
57Description:
58 This file determines if the transaction of the USB TMC
59 device is to be automatically aborted if there is any error.
60 For more details about this, please see the document,
61 "Universal Serial Bus Test and Measurement Class Specification
62 (USBTMC) Revision 1.0" as published by the USB-IF.
Documentation/ABI/testing/configfs-stp-policy-p_sys-t+41−0
@@ -0,0 +1,41 @@
1What: /config/stp-policy/<device>:p_sys-t.<policy>/<node>/uuid
2Date: June 2018
3KernelVersion: 4.19
4Description:
5 UUID source identifier string, RW.
6 Default value is randomly generated at the mkdir <node> time.
7 Data coming from trace sources that use this <node> will be
8 tagged with this UUID in the MIPI SyS-T packet stream, to
9 allow the decoder to discern between different sources
10 within the same master/channel range, and identify the
11 higher level decoders that may be needed for each source.
12
13What: /config/stp-policy/<device>:p_sys-t.<policy>/<node>/do_len
14Date: June 2018
15KernelVersion: 4.19
16Description:
17 Include payload length in the MIPI SyS-T header, boolean.
18 If enabled, the SyS-T protocol encoder will include payload
19 length in each packet's metadata. This is normally redundant
20 if the underlying transport protocol supports marking message
21 boundaries (which STP does), so this is off by default.
22
23What: /config/stp-policy/<device>:p_sys-t.<policy>/<node>/ts_interval
24Date: June 2018
25KernelVersion: 4.19
26Description:
27 Time interval in milliseconds. Include a timestamp in the
28 MIPI SyS-T packet metadata, if this many milliseconds have
29 passed since the previous packet from this source. Zero is
30 the default and stands for "never send the timestamp".
31
32What: /config/stp-policy/<device>:p_sys-t.<policy>/<node>/clocksync_interval
33Date: June 2018
34KernelVersion: 4.19
35Description:
36 Time interval in milliseconds. Send a CLOCKSYNC packet if
37 this many milliseconds have passed since the previous
38 CLOCKSYNC packet from this source. Zero is the default and
39 stands for "never send the CLOCKSYNC". It makes sense to
40 use this option with sources that generate constant and/or
41 periodic data, like stm_heartbeat.
Documentation/ABI/testing/configfs-usb-gadget-uvc+24−0
@@ -12,6 +12,10 @@ Date: Dec 2014 · 11 unmodified lines
12KernelVersion: 4.012KernelVersion: 4.0
13Description: Control descriptors13Description: Control descriptors
14 14
15 All attributes read only:
16 bInterfaceNumber - USB interface number for this
17 streaming interface
18
15What: /config/usb-gadget/gadget/functions/uvc.name/control/class19What: /config/usb-gadget/gadget/functions/uvc.name/control/class
16Date: Dec 201420Date: Dec 2014
17KernelVersion: 4.021KernelVersion: 4.0
@@ -109,6 +113,10 @@ Date: Dec 2014 · 91 unmodified lines
109KernelVersion: 4.0113KernelVersion: 4.0
110Description: Streaming descriptors114Description: Streaming descriptors
111 115
116 All attributes read only:
117 bInterfaceNumber - USB interface number for this
118 streaming interface
119
112What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class120What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class
113Date: Dec 2014121Date: Dec 2014
114KernelVersion: 4.0122KernelVersion: 4.0
@@ -160,6 +168,10 @@ Description: Specific MJPEG format descriptors · 45 unmodified lines
160 168
161 All attributes read only,169 All attributes read only,
162 except bmaControls and bDefaultFrameIndex:170 except bmaControls and bDefaultFrameIndex:
171 bFormatIndex - unique id for this format descriptor;
172 only defined after parent header is
173 linked into the streaming class;
174 read-only
163 bmaControls - this format's data for bmaControls in175 bmaControls - this format's data for bmaControls in
164 the streaming header176 the streaming header
165 bmInterfaceFlags - specifies interlace information,177 bmInterfaceFlags - specifies interlace information,
@@ -177,6 +189,10 @@ Date: Dec 2014 · 11 unmodified lines
177KernelVersion: 4.0189KernelVersion: 4.0
178Description: Specific MJPEG frame descriptors190Description: Specific MJPEG frame descriptors
179 191
192 bFrameIndex - unique id for this framedescriptor;
193 only defined after parent format is
194 linked into the streaming header;
195 read-only
180 dwFrameInterval - indicates how frame interval can be196 dwFrameInterval - indicates how frame interval can be
181 programmed; a number of values197 programmed; a number of values
182 separated by newline can be specified198 separated by newline can be specified
@@ -204,6 +220,10 @@ Date: Dec 2014 · 21 unmodified lines
204KernelVersion: 4.0220KernelVersion: 4.0
205Description: Specific uncompressed format descriptors221Description: Specific uncompressed format descriptors
206 222
223 bFormatIndex - unique id for this format descriptor;
224 only defined after parent header is
225 linked into the streaming class;
226 read-only
207 bmaControls - this format's data for bmaControls in227 bmaControls - this format's data for bmaControls in
208 the streaming header228 the streaming header
209 bmInterfaceFlags - specifies interlace information,229 bmInterfaceFlags - specifies interlace information,
@@ -224,6 +244,10 @@ Date: Dec 2014 · 14 unmodified lines
224KernelVersion: 4.0244KernelVersion: 4.0
225Description: Specific uncompressed frame descriptors245Description: Specific uncompressed frame descriptors
226 246
247 bFrameIndex - unique id for this framedescriptor;
248 only defined after parent format is
249 linked into the streaming header;
250 read-only
227 dwFrameInterval - indicates how frame interval can be251 dwFrameInterval - indicates how frame interval can be
228 programmed; a number of values252 programmed; a number of values
229 separated by newline can be specified253 separated by newline can be specified
Documentation/ABI/testing/sysfs-bus-iio+1−1
@@ -199,7 +199,7 @@ Description: · 198 unmodified lines
199 199
200What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_x_raw200What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_x_raw
201What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_y_raw201What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_y_raw
202KernelVersion: 4.18202KernelVersion: 4.19
203Contact: linux-iio@vger.kernel.org203Contact: linux-iio@vger.kernel.org
204Description:204Description:
205 Relative position in direction x or y on a pad (may be205 Relative position in direction x or y on a pad (may be
Documentation/ABI/testing/sysfs-bus-pci+24−0
@@ -323,3 +323,27 @@ Description: · 322 unmodified lines
323 323
324 This is similar to /sys/bus/pci/drivers_autoprobe, but324 This is similar to /sys/bus/pci/drivers_autoprobe, but
325 affects only the VFs associated with a specific PF.325 affects only the VFs associated with a specific PF.
326
327What: /sys/bus/pci/devices/.../p2pmem/size
328Date: November 2017
329Contact: Logan Gunthorpe <logang@deltatee.com>
330Description:
331 If the device has any Peer-to-Peer memory registered, this
332 file contains the total amount of memory that the device
333 provides (in decimal).
334
335What: /sys/bus/pci/devices/.../p2pmem/available
336Date: November 2017
337Contact: Logan Gunthorpe <logang@deltatee.com>
338Description:
339 If the device has any Peer-to-Peer memory registered, this
340 file contains the amount of memory that has not been
341 allocated (in decimal).
342
343What: /sys/bus/pci/devices/.../p2pmem/published
344Date: November 2017
345Contact: Logan Gunthorpe <logang@deltatee.com>
346Description:
347 If the device has any Peer-to-Peer memory registered, this
348 file contains a '1' if the memory has been published for
349 use outside the driver that owns the device.
Documentation/ABI/testing/sysfs-bus-usb+18−1
@@ -189,6 +189,16 @@ Description: · 188 unmodified lines
189 The file will read "hotplug", "wired" and "not used" if the189 The file will read "hotplug", "wired" and "not used" if the
190 information is available, and "unknown" otherwise.190 information is available, and "unknown" otherwise.
191 191
192What: /sys/bus/usb/devices/.../(hub interface)/portX/location
193Date: October 2018
194Contact: Bjørn Mork <bjorn@mork.no>
195Description:
196 Some platforms provide usb port physical location through
197 firmware. This is used by the kernel to pair up logical ports
198 mapping to the same physical connector. The attribute exposes the
199 raw location value as a hex integer.
200
201
192What: /sys/bus/usb/devices/.../(hub interface)/portX/quirks202What: /sys/bus/usb/devices/.../(hub interface)/portX/quirks
193Date: May 2018203Date: May 2018
194Contact: Nicolas Boichat <drinkcat@chromium.org>204Contact: Nicolas Boichat <drinkcat@chromium.org>
@@ -219,7 +229,14 @@ Description: · 24 unmodified lines
219 ports and report them to the kernel. This attribute is to expose229 ports and report them to the kernel. This attribute is to expose
220 the number of over-current situation occurred on a specific port230 the number of over-current situation occurred on a specific port
221 to user space. This file will contain an unsigned 32 bit value231 to user space. This file will contain an unsigned 32 bit value
222 which wraps to 0 after its maximum is reached.232 which wraps to 0 after its maximum is reached. This file supports
233 poll() for monitoring changes to this value in user space.
234
235 Any time this value changes the corresponding hub device will send a
236 udev event with the following attributes:
237
238 OVER_CURRENT_PORT=/sys/bus/usb/devices/.../(hub interface)/portX
239 OVER_CURRENT_COUNT=[current value of this sysfs attribute]
223 240
224What: /sys/bus/usb/devices/.../(hub interface)/portX/usb3_lpm_permit241What: /sys/bus/usb/devices/.../(hub interface)/portX/usb3_lpm_permit
225Date: November 2015242Date: November 2015
Documentation/ABI/testing/sysfs-bus-vmbus+21−0
@@ -0,0 +1,21 @@
1What: /sys/bus/vmbus/devices/.../driver_override
2Date: August 2019
3Contact: Stephen Hemminger <sthemmin@microsoft.com>
4Description:
5 This file allows the driver for a device to be specified which
6 will override standard static and dynamic ID matching. When
7 specified, only a driver with a name matching the value written
8 to driver_override will have an opportunity to bind to the
9 device. The override is specified by writing a string to the
10 driver_override file (echo uio_hv_generic > driver_override) and
11 may be cleared with an empty string (echo > driver_override).
12 This returns the device to standard matching rules binding.
13 Writing to driver_override does not automatically unbind the
14 device from its current driver or make any attempt to
15 automatically load the specified driver. If no driver with a
16 matching name is currently loaded in the kernel, the device
17 will not bind to any driver. This also allows devices to
18 opt-out of driver binding using a driver_override name such as
19 "none". Only a single driver may be specified in the override,
20 there is no support for parsing delimiters.
21
Documentation/ABI/testing/sysfs-class-lcd-s6e63m0+0−27
@@ -1,27 +0,0 @@
1sysfs interface for the S6E63M0 AMOLED LCD panel driver
2-------------------------------------------------------
3
4What: /sys/class/lcd/<lcd>/gamma_mode
5Date: May, 2010
6KernelVersion: v2.6.35
7Contact: dri-devel@lists.freedesktop.org
8Description:
9 (RW) Read or write the gamma mode. Following three modes are
10 supported:
11 0 - gamma value 2.2,
12 1 - gamma value 1.9 and
13 2 - gamma value 1.7.
14
15
16What: /sys/class/lcd/<lcd>/gamma_table
17Date: May, 2010
18KernelVersion: v2.6.35
19Contact: dri-devel@lists.freedesktop.org
20Description:
21 (RO) Displays the size of the gamma table i.e. the number of
22 gamma modes available.
23
24This is a backlight lcd driver. These interfaces are an extension to the API
25documented in Documentation/ABI/testing/sysfs-class-lcd and in
26Documentation/ABI/stable/sysfs-class-backlight (under
27/sys/class/backlight/<backlight>/).
Documentation/ABI/testing/sysfs-class-led-driver-sc27xx+22−0
@@ -0,0 +1,22 @@
1What: /sys/class/leds/<led>/hw_pattern
2Date: September 2018
3KernelVersion: 4.20
4Description:
5 Specify a hardware pattern for the SC27XX LED. For the SC27XX
6 LED controller, it only supports 4 stages to make a single
7 hardware pattern, which is used to configure the rise time,
8 high time, fall time and low time for the breathing mode.
9
10 For the breathing mode, the SC27XX LED only expects one brightness
11 for the high stage. To be compatible with the hardware pattern
12 format, we should set brightness as 0 for rise stage, fall
13 stage and low stage.
14
15 Min stage duration: 125 ms
16 Max stage duration: 31875 ms
17
18 Since the stage duration step is 125 ms, the duration should be
19 a multiplier of 125, like 125ms, 250ms, 375ms, 500ms ... 31875ms.
20
21 Thus the format of the hardware pattern values should be:
22 "0 rise_duration brightness high_duration 0 fall_duration 0 low_duration".
Documentation/ABI/testing/sysfs-class-led-trigger-pattern+82−0
@@ -0,0 +1,82 @@
1What: /sys/class/leds/<led>/pattern
2Date: September 2018
3KernelVersion: 4.20
4Description:
5 Specify a software pattern for the LED, that supports altering
6 the brightness for the specified duration with one software
7 timer. It can do gradual dimming and step change of brightness.
8
9 The pattern is given by a series of tuples, of brightness and
10 duration (ms). The LED is expected to traverse the series and
11 each brightness value for the specified duration. Duration of
12 0 means brightness should immediately change to new value, and
13 writing malformed pattern deactivates any active one.
14
15 1. For gradual dimming, the dimming interval now is set as 50
16 milliseconds. So the tuple with duration less than dimming
17 interval (50ms) is treated as a step change of brightness,
18 i.e. the subsequent brightness will be applied without adding
19 intervening dimming intervals.
20
21 The gradual dimming format of the software pattern values should be:
22 "brightness_1 duration_1 brightness_2 duration_2 brightness_3
23 duration_3 ...". For example:
24
25 echo 0 1000 255 2000 > pattern
26
27 It will make the LED go gradually from zero-intensity to max (255)
28 intensity in 1000 milliseconds, then back to zero intensity in 2000
29 milliseconds:
30
31 LED brightness
32 ^
33 255-| / \ / \ /
34 | / \ / \ /
35 | / \ / \ /
36 | / \ / \ /
37 0-| / \/ \/
38 +---0----1----2----3----4----5----6------------> time (s)
39
40 2. To make the LED go instantly from one brightness value to another,
41 we should use zero-time lengths (the brightness must be same as
42 the previous tuple's). So the format should be:
43 "brightness_1 duration_1 brightness_1 0 brightness_2 duration_2
44 brightness_2 0 ...". For example:
45
46 echo 0 1000 0 0 255 2000 255 0 > pattern
47
48 It will make the LED stay off for one second, then stay at max brightness
49 for two seconds:
50
51 LED brightness
52 ^
53 255-| +---------+ +---------+
54 | | | | |
55 | | | | |
56 | | | | |
57 0-| -----+ +----+ +----
58 +---0----1----2----3----4----5----6------------> time (s)
59
60What: /sys/class/leds/<led>/hw_pattern
61Date: September 2018
62KernelVersion: 4.20
63Description:
64 Specify a hardware pattern for the LED, for LED hardware that
65 supports autonomously controlling brightness over time, according
66 to some preprogrammed hardware patterns. It deactivates any active
67 software pattern.
68
69 Since different LED hardware can have different semantics of
70 hardware patterns, each driver is expected to provide its own
71 description for the hardware patterns in their ABI documentation
72 file.
73
74What: /sys/class/leds/<led>/repeat
75Date: September 2018
76KernelVersion: 4.20
77Description:
78 Specify a pattern repeat number. -1 means repeat indefinitely,
79 other negative numbers and number 0 are invalid.
80
81 This file will always return the originally written repeat
82 number.
Documentation/ABI/testing/sysfs-class-net+20−2
@@ -91,6 +91,24 @@ Description: · 90 unmodified lines
91 stacked (e.g: VLAN interfaces) but still have the same MAC91 stacked (e.g: VLAN interfaces) but still have the same MAC
92 address as their parent device.92 address as their parent device.
93 93
94What: /sys/class/net/<iface>/dev_port
95Date: February 2014
96KernelVersion: 3.15
97Contact: netdev@vger.kernel.org
98Description:
99 Indicates the port number of this network device, formatted
100 as a decimal value. Some NICs have multiple independent ports
101 on the same PCI bus, device and function. This attribute allows
102 userspace to distinguish the respective interfaces.
103
104 Note: some device drivers started to use 'dev_id' for this
105 purpose since long before 3.15 and have not adopted the new
106 attribute ever since. To query the port number, some tools look
107 exclusively at 'dev_port', while others only consult 'dev_id'.
108 If a network device has multiple client adapter ports as
109 described in the previous paragraph and does not set this
110 attribute to its port number, it's a kernel bug.
111
94What: /sys/class/net/<iface>/dormant112What: /sys/class/net/<iface>/dormant
95Date: March 2006113Date: March 2006
96KernelVersion: 2.6.17114KernelVersion: 2.6.17
@@ -117,7 +135,7 @@ Description: · 20 unmodified lines
117 full: full duplex135 full: full duplex
118 136
119 Note: This attribute is only valid for interfaces that implement137 Note: This attribute is only valid for interfaces that implement
120 the ethtool get_settings method (mostly Ethernet).138 the ethtool get_link_ksettings method (mostly Ethernet).
121 139
122What: /sys/class/net/<iface>/flags140What: /sys/class/net/<iface>/flags
123Date: April 2005141Date: April 2005
@@ -224,7 +242,7 @@ Description: · 100 unmodified lines
224 an integer representing the link speed in Mbits/sec.242 an integer representing the link speed in Mbits/sec.
225 243
226 Note: this attribute is only valid for interfaces that implement244 Note: this attribute is only valid for interfaces that implement
227 the ethtool get_settings method (mostly Ethernet ).245 the ethtool get_link_ksettings method (mostly Ethernet).
228 246
229What: /sys/class/net/<iface>/tx_queue_len247What: /sys/class/net/<iface>/tx_queue_len
230Date: April 2005248Date: April 2005
Documentation/ABI/testing/sysfs-class-net-dsa+7−0
@@ -0,0 +1,7 @@
1What: /sys/class/net/<iface>/tagging
2Date: August 2018
3KernelVersion: 4.20
4Contact: netdev@vger.kernel.org
5Description:
6 String indicating the type of tagging protocol used by the
7 DSA slave network device.
Documentation/ABI/testing/sysfs-fs-f2fs+16−1
@@ -121,7 +121,22 @@ What: /sys/fs/f2fs/<disk>/idle_interval · 120 unmodified lines
121Date: January 2016121Date: January 2016
122Contact: "Jaegeuk Kim" <jaegeuk@kernel.org>122Contact: "Jaegeuk Kim" <jaegeuk@kernel.org>
123Description:123Description:
124 Controls the idle timing.124 Controls the idle timing for all paths other than
125 discard and gc path.
126
127What: /sys/fs/f2fs/<disk>/discard_idle_interval
128Date: September 2018
129Contact: "Chao Yu" <yuchao0@huawei.com>
130Contact: "Sahitya Tummala" <stummala@codeaurora.org>
131Description:
132 Controls the idle timing for discard path.
133
134What: /sys/fs/f2fs/<disk>/gc_idle_interval
135Date: September 2018
136Contact: "Chao Yu" <yuchao0@huawei.com>
137Contact: "Sahitya Tummala" <stummala@codeaurora.org>
138Description:
139 Controls the idle timing for gc path.
125 140
126What: /sys/fs/f2fs/<disk>/iostat_enable141What: /sys/fs/f2fs/<disk>/iostat_enable
127Date: August 2017142Date: August 2017
Documentation/ABI/testing/sysfs-platform-lg-laptop+35−0
@@ -0,0 +1,35 @@
1What: /sys/devices/platform/lg-laptop/reader_mode
2Date: October 2018
3KernelVersion: 4.20
4Contact: "Matan Ziv-Av <matan@svgalib.org>
5Description:
6 Control reader mode. 1 means on, 0 means off.
7
8What: /sys/devices/platform/lg-laptop/fn_lock
9Date: October 2018
10KernelVersion: 4.20
11Contact: "Matan Ziv-Av <matan@svgalib.org>
12Description:
13 Control FN lock mode. 1 means on, 0 means off.
14
15What: /sys/devices/platform/lg-laptop/battery_care_limit
16Date: October 2018
17KernelVersion: 4.20
18Contact: "Matan Ziv-Av <matan@svgalib.org>
19Description:
20 Maximal battery charge level. Accepted values are 80 or 100.
21
22What: /sys/devices/platform/lg-laptop/fan_mode
23Date: October 2018
24KernelVersion: 4.20
25Contact: "Matan Ziv-Av <matan@svgalib.org>
26Description:
27 Control fan mode. 1 for performance mode, 0 for silent mode.
28
29What: /sys/devices/platform/lg-laptop/usb_charge
30Date: October 2018
31KernelVersion: 4.20
32Contact: "Matan Ziv-Av <matan@svgalib.org>
33Description:
34 Control USB port charging when device is turned off.
35 1 means on, 0 means off.
Documentation/ABI/testing/sysfs-power+1−1
@@ -99,7 +99,7 @@ Description: · 98 unmodified lines
99 this file, the suspend image will be as small as possible.99 this file, the suspend image will be as small as possible.
100 100
101 Reading from this file will display the current image size101 Reading from this file will display the current image size
102 limit, which is set to 500 MB by default.102 limit, which is set to around 2/5 of available RAM by default.
103 103
104What: /sys/power/pm_trace104What: /sys/power/pm_trace
105Date: August 2006105Date: August 2006
Documentation/PCI/00-INDEX+0−26
@@ -1,26 +0,0 @@
100-INDEX
2 - this file
3acpi-info.txt
4 - info on how PCI host bridges are represented in ACPI
5MSI-HOWTO.txt
6 - the Message Signaled Interrupts (MSI) Driver Guide HOWTO and FAQ.
7PCIEBUS-HOWTO.txt
8 - a guide describing the PCI Express Port Bus driver
9pci-error-recovery.txt
10 - info on PCI error recovery
11pci-iov-howto.txt
12 - the PCI Express I/O Virtualization HOWTO
13pci.txt
14 - info on the PCI subsystem for device driver authors
15pcieaer-howto.txt
16 - the PCI Express Advanced Error Reporting Driver Guide HOWTO
17endpoint/pci-endpoint.txt
18 - guide to add endpoint controller driver and endpoint function driver.
19endpoint/pci-endpoint-cfs.txt
20 - guide to use configfs to configure the PCI endpoint function.
21endpoint/pci-test-function.txt
22 - specification of *PCI test* function device.
23endpoint/pci-test-howto.txt
24 - userguide for PCI endpoint test function.
25endpoint/function/binding/
26 - binding documentation for PCI endpoint function
Documentation/PCI/endpoint/pci-test-howto.txt+11−8
@@ -99,17 +99,20 @@ Note that the devices listed here correspond to the value populated in 1.4 above · 98 unmodified lines
992.2 Using Endpoint Test function Device992.2 Using Endpoint Test function Device
100 100
101pcitest.sh added in tools/pci/ can be used to run all the default PCI endpoint101pcitest.sh added in tools/pci/ can be used to run all the default PCI endpoint
102tests. Before pcitest.sh can be used pcitest.c should be compiled using the102tests. To compile this tool the following commands should be used:
103following commands.
104 103
105 cd <kernel-dir>104 # cd <kernel-dir>
106 make headers_install ARCH=arm105 # make -C tools/pci
107 arm-linux-gnueabihf-gcc -Iusr/include tools/pci/pcitest.c -o pcitest106
108 cp pcitest <rootfs>/usr/sbin/107or if you desire to compile and install in your system:
109 cp tools/pci/pcitest.sh <rootfs>108
109 # cd <kernel-dir>
110 # make -C tools/pci install
111
112The tool and script will be located in <rootfs>/usr/bin/
110 113
1112.2.1 pcitest.sh Output1142.2.1 pcitest.sh Output
112 # ./pcitest.sh115 # pcitest.sh
113 BAR tests116 BAR tests
114 117
115 BAR0: OKAY118 BAR0: OKAY
Documentation/PCI/pci-error-recovery.txt+10−25
@@ -110,7 +110,7 @@ The actual steps taken by a platform to recover from a PCI error · 109 unmodified lines
110event will be platform-dependent, but will follow the general110event will be platform-dependent, but will follow the general
111sequence described below.111sequence described below.
112 112
113STEP 0: Error Event: ERR_NONFATAL113STEP 0: Error Event
114-------------------114-------------------
115A PCI bus error is detected by the PCI hardware. On powerpc, the slot115A PCI bus error is detected by the PCI hardware. On powerpc, the slot
116is isolated, in that all I/O is blocked: all reads return 0xffffffff,116is isolated, in that all I/O is blocked: all reads return 0xffffffff,
@@ -228,7 +228,13 @@ proceeds to either STEP3 (Link Reset) or to STEP 5 (Resume Operations). · 111 unmodified lines
228If any driver returned PCI_ERS_RESULT_NEED_RESET, then the platform228If any driver returned PCI_ERS_RESULT_NEED_RESET, then the platform
229proceeds to STEP 4 (Slot Reset)229proceeds to STEP 4 (Slot Reset)
230 230
231STEP 3: Slot Reset231STEP 3: Link Reset
232------------------
233The platform resets the link. This is a PCI-Express specific step
234and is done whenever a fatal error has been detected that can be
235"solved" by resetting the link.
236
237STEP 4: Slot Reset
232------------------238------------------
233 239
234In response to a return value of PCI_ERS_RESULT_NEED_RESET, the240In response to a return value of PCI_ERS_RESULT_NEED_RESET, the
@@ -314,7 +320,7 @@ Failure). · 79 unmodified lines
314>>> However, it probably should.320>>> However, it probably should.
315 321
316 322
317STEP 4: Resume Operations323STEP 5: Resume Operations
318-------------------------324-------------------------
319The platform will call the resume() callback on all affected device325The platform will call the resume() callback on all affected device
320drivers if all drivers on the segment have returned326drivers if all drivers on the segment have returned
@@ -326,7 +332,7 @@ a result code. · 5 unmodified lines
326At this point, if a new error happens, the platform will restart332At this point, if a new error happens, the platform will restart
327a new error recovery sequence.333a new error recovery sequence.
328 334
329STEP 5: Permanent Failure335STEP 6: Permanent Failure
330-------------------------336-------------------------
331A "permanent failure" has occurred, and the platform cannot recover337A "permanent failure" has occurred, and the platform cannot recover
332the device. The platform will call error_detected() with a338the device. The platform will call error_detected() with a
@@ -349,27 +355,6 @@ errors. See the discussion in powerpc/eeh-pci-error-recovery.txt · 16 unmodified lines
349for additional detail on real-life experience of the causes of355for additional detail on real-life experience of the causes of
350software errors.356software errors.
351 357
352STEP 0: Error Event: ERR_FATAL
353-------------------
354PCI bus error is detected by the PCI hardware. On powerpc, the slot is
355isolated, in that all I/O is blocked: all reads return 0xffffffff, all
356writes are ignored.
357
358STEP 1: Remove devices
359--------------------
360Platform removes the devices depending on the error agent, it could be
361this port for all subordinates or upstream component (likely downstream
362port)
363
364STEP 2: Reset link
365--------------------
366The platform resets the link. This is a PCI-Express specific step and is
367done whenever a fatal error has been detected that can be "solved" by
368resetting the link.
369
370STEP 3: Re-enumerate the devices
371--------------------
372Initiates the re-enumeration.
373 358
374Conclusion; General Remarks359Conclusion; General Remarks
375---------------------------360---------------------------
Documentation/RCU/00-INDEX+0−34
@@ -1,34 +0,0 @@
100-INDEX
2 - This file
3arrayRCU.txt
4 - Using RCU to Protect Read-Mostly Arrays
5checklist.txt
6 - Review Checklist for RCU Patches
7listRCU.txt
8 - Using RCU to Protect Read-Mostly Linked Lists
9lockdep.txt
10 - RCU and lockdep checking
11lockdep-splat.txt
12 - RCU Lockdep splats explained.
13NMI-RCU.txt
14 - Using RCU to Protect Dynamic NMI Handlers
15rcu_dereference.txt
16 - Proper care and feeding of return values from rcu_dereference()
17rcubarrier.txt
18 - RCU and Unloadable Modules
19rculist_nulls.txt
20 - RCU list primitives for use with SLAB_TYPESAFE_BY_RCU
21rcuref.txt
22 - Reference-count design for elements of lists/arrays protected by RCU
23rcu.txt
24 - RCU Concepts
25RTFP.txt
26 - List of RCU papers (bibliography) going back to 1980.
27stallwarn.txt
28 - RCU CPU stall warnings (module parameter rcu_cpu_stall_suppress)
29torture.txt
30 - RCU Torture Test Operation (CONFIG_RCU_TORTURE_TEST)
31UP.txt
32 - RCU on Uniprocessor Systems
33whatisRCU.txt
34 - What is RCU?
Documentation/RCU/Design/Data-Structures/Data-Structures.html+12−19
@@ -1227,9 +1227,11 @@ to overflow the counter, this approach corrects the · 1226 unmodified lines
1227CPU enters the idle loop from process context.1227CPU enters the idle loop from process context.
1228 1228
1229</p><p>The <tt>-&gt;dynticks</tt> field counts the corresponding1229</p><p>The <tt>-&gt;dynticks</tt> field counts the corresponding
1230CPU's transitions to and from dyntick-idle mode, so that this counter1230CPU's transitions to and from either dyntick-idle or user mode, so
1231has an even value when the CPU is in dyntick-idle mode and an odd1231that this counter has an even value when the CPU is in dyntick-idle
1232value otherwise.1232mode or user mode and an odd value otherwise. The transitions to/from
1233user mode need to be counted for user mode adaptive-ticks support
1234(see timers/NO_HZ.txt).
1233 1235
1234</p><p>The <tt>-&gt;rcu_need_heavy_qs</tt> field is used1236</p><p>The <tt>-&gt;rcu_need_heavy_qs</tt> field is used
1235to record the fact that the RCU core code would really like to1237to record the fact that the RCU core code would really like to
@@ -1372,8 +1374,7 @@ that is, if the CPU is currently idle. · 136 unmodified lines
1372Accessor Functions</a></h3>1374Accessor Functions</a></h3>
1373 1375
1374<p>The following listing shows the1376<p>The following listing shows the
1375<tt>rcu_get_root()</tt>, <tt>rcu_for_each_node_breadth_first</tt>,1377<tt>rcu_get_root()</tt>, <tt>rcu_for_each_node_breadth_first</tt> and
1376<tt>rcu_for_each_nonleaf_node_breadth_first()</tt>, and
1377<tt>rcu_for_each_leaf_node()</tt> function and macros:1378<tt>rcu_for_each_leaf_node()</tt> function and macros:
1378 1379
1379<pre>1380<pre>
@@ -1386,13 +1387,9 @@ Accessor Functions</a></h3> · 6 unmodified lines
1386 7 for ((rnp) = &amp;(rsp)-&gt;node[0]; \1387 7 for ((rnp) = &amp;(rsp)-&gt;node[0]; \
1387 8 (rnp) &lt; &amp;(rsp)-&gt;node[NUM_RCU_NODES]; (rnp)++)1388 8 (rnp) &lt; &amp;(rsp)-&gt;node[NUM_RCU_NODES]; (rnp)++)
1388 91389 9
1389 10 #define rcu_for_each_nonleaf_node_breadth_first(rsp, rnp) \1390 10 #define rcu_for_each_leaf_node(rsp, rnp) \
1390 11 for ((rnp) = &amp;(rsp)-&gt;node[0]; \1391 11 for ((rnp) = (rsp)-&gt;level[NUM_RCU_LVLS - 1]; \
1391 12 (rnp) &lt; (rsp)-&gt;level[NUM_RCU_LVLS - 1]; (rnp)++)1392 12 (rnp) &lt; &amp;(rsp)-&gt;node[NUM_RCU_NODES]; (rnp)++)
1392 13
1393 14 #define rcu_for_each_leaf_node(rsp, rnp) \
1394 15 for ((rnp) = (rsp)-&gt;level[NUM_RCU_LVLS - 1]; \
1395 16 (rnp) &lt; &amp;(rsp)-&gt;node[NUM_RCU_NODES]; (rnp)++)
1396</pre>1393</pre>
1397 1394
1398<p>The <tt>rcu_get_root()</tt> simply returns a pointer to the1395<p>The <tt>rcu_get_root()</tt> simply returns a pointer to the
@@ -1405,10 +1402,7 @@ macro takes advantage of the layout of the <tt>rcu_node</tt> · 6 unmodified lines
1405structures in the <tt>rcu_state</tt> structure's1402structures in the <tt>rcu_state</tt> structure's
1406<tt>-&gt;node[]</tt> array, performing a breadth-first traversal by1403<tt>-&gt;node[]</tt> array, performing a breadth-first traversal by
1407simply traversing the array in order.1404simply traversing the array in order.
1408The <tt>rcu_for_each_nonleaf_node_breadth_first()</tt> macro operates1405Similarly, the <tt>rcu_for_each_leaf_node()</tt> macro traverses only
1409similarly, but traverses only the first part of the array, thus excluding
1410the leaf <tt>rcu_node</tt> structures.
1411Finally, the <tt>rcu_for_each_leaf_node()</tt> macro traverses only
1412the last part of the array, thus traversing only the leaf1406the last part of the array, thus traversing only the leaf
1413<tt>rcu_node</tt> structures.1407<tt>rcu_node</tt> structures.
1414 1408
@@ -1416,15 +1410,14 @@ the last part of the array, thus traversing only the leaf · 1 unmodified line
1416<tr><th>&nbsp;</th></tr>1410<tr><th>&nbsp;</th></tr>
1417<tr><th align="left">Quick Quiz:</th></tr>1411<tr><th align="left">Quick Quiz:</th></tr>
1418<tr><td>1412<tr><td>
1419 What do <tt>rcu_for_each_nonleaf_node_breadth_first()</tt> and1413 What does
1420 <tt>rcu_for_each_leaf_node()</tt> do if the <tt>rcu_node</tt> tree1414 <tt>rcu_for_each_leaf_node()</tt> do if the <tt>rcu_node</tt> tree
1421 contains only a single node?1415 contains only a single node?
1422</td></tr>1416</td></tr>
1423<tr><th align="left">Answer:</th></tr>1417<tr><th align="left">Answer:</th></tr>
1424<tr><td bgcolor="#ffffff"><font color="ffffff">1418<tr><td bgcolor="#ffffff"><font color="ffffff">
1425 In the single-node case,1419 In the single-node case,
1426 <tt>rcu_for_each_nonleaf_node_breadth_first()</tt> is a no-op1420 <tt>rcu_for_each_leaf_node()</tt> traverses the single node.
1427 and <tt>rcu_for_each_leaf_node()</tt> traverses the single node.
1428</font></td></tr>1421</font></td></tr>
1429<tr><td>&nbsp;</td></tr>1422<tr><td>&nbsp;</td></tr>
1430</table>1423</table>
Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.html+4−5
@@ -12,10 +12,9 @@ high efficiency and minimal disturbance, expedited grace periods accept · 11 unmodified lines
12lower efficiency and significant disturbance to attain shorter latencies.12lower efficiency and significant disturbance to attain shorter latencies.
13 13
14<p>14<p>
15There are three flavors of RCU (RCU-bh, RCU-preempt, and RCU-sched),15There are two flavors of RCU (RCU-preempt and RCU-sched), with an earlier
16but only two flavors of expedited grace periods because the RCU-bh16third RCU-bh flavor having been implemented in terms of the other two.
17expedited grace period maps onto the RCU-sched expedited grace period.17Each of the two implementations is covered in its own section.
18Each of the remaining two implementations is covered in its own section.
19 18
20<ol>19<ol>
21<li> <a href="#Expedited Grace Period Design">20<li> <a href="#Expedited Grace Period Design">
@@ -158,7 +157,7 @@ whether or not the current CPU is in an RCU read-side critical section. · 136 unmodified lines
158The best that <tt>sync_sched_exp_handler()</tt> can do is to check157The best that <tt>sync_sched_exp_handler()</tt> can do is to check
159for idle, on the off-chance that the CPU went idle while the IPI158for idle, on the off-chance that the CPU went idle while the IPI
160was in flight.159was in flight.
161If the CPU is idle, then tt>sync_sched_exp_handler()</tt> reports160If the CPU is idle, then <tt>sync_sched_exp_handler()</tt> reports
162the quiescent state.161the quiescent state.
163 162
164<p>163<p>
Documentation/RCU/Design/Requirements/Requirements.html+72−142
@@ -1306,8 +1306,6 @@ doing so would degrade real-time response. · 1305 unmodified lines
1306 1306
1307<p>1307<p>
1308This non-requirement appeared with preemptible RCU.1308This non-requirement appeared with preemptible RCU.
1309If you need a grace period that waits on non-preemptible code regions, use
1310<a href="#Sched Flavor">RCU-sched</a>.
1311 1309
1312<h2><a name="Parallelism Facts of Life">Parallelism Facts of Life</a></h2>1310<h2><a name="Parallelism Facts of Life">Parallelism Facts of Life</a></h2>
1313 1311
@@ -2165,14 +2163,9 @@ however, this is not a panacea because there would be severe restrictions · 851 unmodified lines
2165on what operations those callbacks could invoke.2163on what operations those callbacks could invoke.
2166 2164
2167<p>2165<p>
2168Perhaps surprisingly, <tt>synchronize_rcu()</tt>,2166Perhaps surprisingly, <tt>synchronize_rcu()</tt> and
2169<a href="#Bottom-Half Flavor"><tt>synchronize_rcu_bh()</tt></a>
2170(<a href="#Bottom-Half Flavor">discussed below</a>),
2171<a href="#Sched Flavor"><tt>synchronize_sched()</tt></a>,
2172<tt>synchronize_rcu_expedited()</tt>,2167<tt>synchronize_rcu_expedited()</tt>,
2173<tt>synchronize_rcu_bh_expedited()</tt>, and2168will operate normally
2174<tt>synchronize_sched_expedited()</tt>
2175will all operate normally
2176during very early boot, the reason being that there is only one CPU2169during very early boot, the reason being that there is only one CPU
2177and preemption is disabled.2170and preemption is disabled.
2178This means that the call <tt>synchronize_rcu()</tt> (or friends)2171This means that the call <tt>synchronize_rcu()</tt> (or friends)
@@ -2269,12 +2262,23 @@ Thankfully, RCU update-side primitives, including · 90 unmodified lines
2269The name notwithstanding, some Linux-kernel architectures2262The name notwithstanding, some Linux-kernel architectures
2270can have nested NMIs, which RCU must handle correctly.2263can have nested NMIs, which RCU must handle correctly.
2271Andy Lutomirski2264Andy Lutomirski
2272<a href="https://lkml.kernel.org/g/CALCETrXLq1y7e_dKFPgou-FKHB6Pu-r8+t-6Ds+8=va7anBWDA@mail.gmail.com">surprised me</a>2265<a href="https://lkml.kernel.org/r/CALCETrXLq1y7e_dKFPgou-FKHB6Pu-r8+t-6Ds+8=va7anBWDA@mail.gmail.com">surprised me</a>
2273with this requirement;2266with this requirement;
2274he also kindly surprised me with2267he also kindly surprised me with
2275<a href="https://lkml.kernel.org/g/CALCETrXSY9JpW3uE6H8WYk81sg56qasA2aqmjMPsq5dOtzso=g@mail.gmail.com">an algorithm</a>2268<a href="https://lkml.kernel.org/r/CALCETrXSY9JpW3uE6H8WYk81sg56qasA2aqmjMPsq5dOtzso=g@mail.gmail.com">an algorithm</a>
2276that meets this requirement.2269that meets this requirement.
2277 2270
2271<p>
2272Furthermore, NMI handlers can be interrupted by what appear to RCU
2273to be normal interrupts.
2274One way that this can happen is for code that directly invokes
2275<tt>rcu_irq_enter()</tt> and </tt>rcu_irq_exit()</tt> to be called
2276from an NMI handler.
2277This astonishing fact of life prompted the current code structure,
2278which has <tt>rcu_irq_enter()</tt> invoking <tt>rcu_nmi_enter()</tt>
2279and <tt>rcu_irq_exit()</tt> invoking <tt>rcu_nmi_exit()</tt>.
2280And yes, I also learned of this requirement the hard way.
2281
2278<h3><a name="Loadable Modules">Loadable Modules</a></h3>2282<h3><a name="Loadable Modules">Loadable Modules</a></h3>
2279 2283
2280<p>2284<p>
@@ -2394,30 +2398,9 @@ when invoked from a CPU-hotplug notifier. · 113 unmodified lines
2394<p>2398<p>
2395RCU depends on the scheduler, and the scheduler uses RCU to2399RCU depends on the scheduler, and the scheduler uses RCU to
2396protect some of its data structures.2400protect some of its data structures.
2397This means the scheduler is forbidden from acquiring2401The preemptible-RCU <tt>rcu_read_unlock()</tt>
2398the runqueue locks and the priority-inheritance locks2402implementation must therefore be written carefully to avoid deadlocks
2399in the middle of an outermost RCU read-side critical section unless either2403involving the scheduler's runqueue and priority-inheritance locks.
2400(1)&nbsp;it releases them before exiting that same
2401RCU read-side critical section, or
2402(2)&nbsp;interrupts are disabled across
2403that entire RCU read-side critical section.
2404This same prohibition also applies (recursively!) to any lock that is acquired
2405while holding any lock to which this prohibition applies.
2406Adhering to this rule prevents preemptible RCU from invoking
2407<tt>rcu_read_unlock_special()</tt> while either runqueue or
2408priority-inheritance locks are held, thus avoiding deadlock.
2409
2410<p>
2411Prior to v4.4, it was only necessary to disable preemption across
2412RCU read-side critical sections that acquired scheduler locks.
2413In v4.4, expedited grace periods started using IPIs, and these
2414IPIs could force a <tt>rcu_read_unlock()</tt> to take the slowpath.
2415Therefore, this expedited-grace-period change required disabling of
2416interrupts, not just preemption.
2417
2418<p>
2419For RCU's part, the preemptible-RCU <tt>rcu_read_unlock()</tt>
2420implementation must be written carefully to avoid similar deadlocks.
2421In particular, <tt>rcu_read_unlock()</tt> must tolerate an2404In particular, <tt>rcu_read_unlock()</tt> must tolerate an
2422interrupt where the interrupt handler invokes both2405interrupt where the interrupt handler invokes both
2423<tt>rcu_read_lock()</tt> and <tt>rcu_read_unlock()</tt>.2406<tt>rcu_read_lock()</tt> and <tt>rcu_read_unlock()</tt>.
@@ -2426,7 +2409,7 @@ negative nesting levels to avoid destructive recursion via · 2 unmodified lines
2426interrupt handler's use of RCU.2409interrupt handler's use of RCU.
2427 2410
2428<p>2411<p>
2429This pair of mutual scheduler-RCU requirements came as a2412This scheduler-RCU requirement came as a
2430<a href="https://lwn.net/Articles/453002/">complete surprise</a>.2413<a href="https://lwn.net/Articles/453002/">complete surprise</a>.
2431 2414
2432<p>2415<p>
@@ -2437,9 +2420,28 @@ when running context-switch-heavy workloads when built with · 4 unmodified lines
2437<tt>CONFIG_NO_HZ_FULL=y</tt>2420<tt>CONFIG_NO_HZ_FULL=y</tt>
2438<a href="http://www.rdrop.com/users/paulmck/scalability/paper/BareMetal.2015.01.15b.pdf">did come as a surprise [PDF]</a>.2421<a href="http://www.rdrop.com/users/paulmck/scalability/paper/BareMetal.2015.01.15b.pdf">did come as a surprise [PDF]</a>.
2439RCU has made good progress towards meeting this requirement, even2422RCU has made good progress towards meeting this requirement, even
2440for context-switch-have <tt>CONFIG_NO_HZ_FULL=y</tt> workloads,2423for context-switch-heavy <tt>CONFIG_NO_HZ_FULL=y</tt> workloads,
2441but there is room for further improvement.2424but there is room for further improvement.
2442 2425
2426<p>
2427In the past, it was forbidden to disable interrupts across an
2428<tt>rcu_read_unlock()</tt> unless that interrupt-disabled region
2429of code also included the matching <tt>rcu_read_lock()</tt>.
2430Violating this restriction could result in deadlocks involving the
2431scheduler's runqueue and priority-inheritance spinlocks.
2432This restriction was lifted when interrupt-disabled calls to
2433<tt>rcu_read_unlock()</tt> started deferring the reporting of
2434the resulting RCU-preempt quiescent state until the end of that
2435interrupts-disabled region.
2436This deferred reporting means that the scheduler's runqueue and
2437priority-inheritance locks cannot be held while reporting an RCU-preempt
2438quiescent state, which lifts the earlier restriction, at least from
2439a deadlock perspective.
2440Unfortunately, real-time systems using RCU priority boosting may
2441need this restriction to remain in effect because deferred
2442quiescent-state reporting also defers deboosting, which in turn
2443degrades real-time latencies.
2444
2443<h3><a name="Tracing and RCU">Tracing and RCU</a></h3>2445<h3><a name="Tracing and RCU">Tracing and RCU</a></h3>
2444 2446
2445<p>2447<p>
@@ -2850,15 +2852,22 @@ The other four flavors are listed below, with requirements for each · 404 unmodified lines
2850described in a separate section.2852described in a separate section.
2851 2853
2852<ol>2854<ol>
2853<li> <a href="#Bottom-Half Flavor">Bottom-Half Flavor</a>2855<li> <a href="#Bottom-Half Flavor">Bottom-Half Flavor (Historical)</a>
2854<li> <a href="#Sched Flavor">Sched Flavor</a>2856<li> <a href="#Sched Flavor">Sched Flavor (Historical)</a>
2855<li> <a href="#Sleepable RCU">Sleepable RCU</a>2857<li> <a href="#Sleepable RCU">Sleepable RCU</a>
2856<li> <a href="#Tasks RCU">Tasks RCU</a>2858<li> <a href="#Tasks RCU">Tasks RCU</a>
2857<li> <a href="#Waiting for Multiple Grace Periods">
2858 Waiting for Multiple Grace Periods</a>
2859</ol>2859</ol>
2860 2860
2861<h3><a name="Bottom-Half Flavor">Bottom-Half Flavor</a></h3>2861<h3><a name="Bottom-Half Flavor">Bottom-Half Flavor (Historical)</a></h3>
2862
2863<p>
2864The RCU-bh flavor of RCU has since been expressed in terms of
2865the other RCU flavors as part of a consolidation of the three
2866flavors into a single flavor.
2867The read-side API remains, and continues to disable softirq and to
2868be accounted for by lockdep.
2869Much of the material in this section is therefore strictly historical
2870in nature.
2862 2871
2863<p>2872<p>
2864The softirq-disable (AKA &ldquo;bottom-half&rdquo;,2873The softirq-disable (AKA &ldquo;bottom-half&rdquo;,
@@ -2918,8 +2927,20 @@ includes · 53 unmodified lines
2918<tt>call_rcu_bh()</tt>,2927<tt>call_rcu_bh()</tt>,
2919<tt>rcu_barrier_bh()</tt>, and2928<tt>rcu_barrier_bh()</tt>, and
2920<tt>rcu_read_lock_bh_held()</tt>.2929<tt>rcu_read_lock_bh_held()</tt>.
2930However, the update-side APIs are now simple wrappers for other RCU
2931flavors, namely RCU-sched in CONFIG_PREEMPT=n kernels and RCU-preempt
2932otherwise.
2933
2934<h3><a name="Sched Flavor">Sched Flavor (Historical)</a></h3>
2921 2935
2922<h3><a name="Sched Flavor">Sched Flavor</a></h3>2936<p>
2937The RCU-sched flavor of RCU has since been expressed in terms of
2938the other RCU flavors as part of a consolidation of the three
2939flavors into a single flavor.
2940The read-side API remains, and continues to disable preemption and to
2941be accounted for by lockdep.
2942Much of the material in this section is therefore strictly historical
2943in nature.
2923 2944
2924<p>2945<p>
2925Before preemptible RCU, waiting for an RCU grace period had the2946Before preemptible RCU, waiting for an RCU grace period had the
@@ -3139,94 +3160,14 @@ The tasks-RCU API is quite compact, consisting only of · 213 unmodified lines
3139<tt>call_rcu_tasks()</tt>,3160<tt>call_rcu_tasks()</tt>,
3140<tt>synchronize_rcu_tasks()</tt>, and3161<tt>synchronize_rcu_tasks()</tt>, and
3141<tt>rcu_barrier_tasks()</tt>.3162<tt>rcu_barrier_tasks()</tt>.
3142 3163In <tt>CONFIG_PREEMPT=n</tt> kernels, trampolines cannot be preempted,
3143<h3><a name="Waiting for Multiple Grace Periods">3164so these APIs map to
3144Waiting for Multiple Grace Periods</a></h3>3165<tt>call_rcu()</tt>,
3145 3166<tt>synchronize_rcu()</tt>, and
3146<p>3167<tt>rcu_barrier()</tt>, respectively.
3147Perhaps you have an RCU protected data structure that is accessed from3168In <tt>CONFIG_PREEMPT=y</tt> kernels, trampolines can be preempted,
3148RCU read-side critical sections, from softirq handlers, and from3169and these three APIs are therefore implemented by separate functions
3149hardware interrupt handlers.3170that check for voluntary context switches.
3150That is three flavors of RCU, the normal flavor, the bottom-half flavor,
3151and the sched flavor.
3152How to wait for a compound grace period?
3153
3154<p>
3155The best approach is usually to &ldquo;just say no!&rdquo; and
3156insert <tt>rcu_read_lock()</tt> and <tt>rcu_read_unlock()</tt>
3157around each RCU read-side critical section, regardless of what
3158environment it happens to be in.
3159But suppose that some of the RCU read-side critical sections are
3160on extremely hot code paths, and that use of <tt>CONFIG_PREEMPT=n</tt>
3161is not a viable option, so that <tt>rcu_read_lock()</tt> and
3162<tt>rcu_read_unlock()</tt> are not free.
3163What then?
3164
3165<p>
3166You <i>could</i> wait on all three grace periods in succession, as follows:
3167
3168<blockquote>
3169<pre>
3170 1 synchronize_rcu();
3171 2 synchronize_rcu_bh();
3172 3 synchronize_sched();
3173</pre>
3174</blockquote>
3175
3176<p>
3177This works, but triples the update-side latency penalty.
3178In cases where this is not acceptable, <tt>synchronize_rcu_mult()</tt>
3179may be used to wait on all three flavors of grace period concurrently:
3180
3181<blockquote>
3182<pre>
3183 1 synchronize_rcu_mult(call_rcu, call_rcu_bh, call_rcu_sched);
3184</pre>
3185</blockquote>
3186
3187<p>
3188But what if it is necessary to also wait on SRCU?
3189This can be done as follows:
3190
3191<blockquote>
3192<pre>
3193 1 static void call_my_srcu(struct rcu_head *head,
3194 2 void (*func)(struct rcu_head *head))
3195 3 {
3196 4 call_srcu(&amp;my_srcu, head, func);
3197 5 }
3198 6
3199 7 synchronize_rcu_mult(call_rcu, call_rcu_bh, call_rcu_sched, call_my_srcu);
3200</pre>
3201</blockquote>
3202
3203<p>
3204If you needed to wait on multiple different flavors of SRCU
3205(but why???), you would need to create a wrapper function resembling
3206<tt>call_my_srcu()</tt> for each SRCU flavor.
3207
3208<table>
3209<tr><th>&nbsp;</th></tr>
3210<tr><th align="left">Quick Quiz:</th></tr>
3211<tr><td>
3212 But what if I need to wait for multiple RCU flavors, but I also need
3213 the grace periods to be expedited?
3214</td></tr>
3215<tr><th align="left">Answer:</th></tr>
3216<tr><td bgcolor="#ffffff"><font color="ffffff">
3217 If you are using expedited grace periods, there should be less penalty
3218 for waiting on them in succession.
3219 But if that is nevertheless a problem, you can use workqueues
3220 or multiple kthreads to wait on the various expedited grace
3221 periods concurrently.
3222</font></td></tr>
3223<tr><td>&nbsp;</td></tr>
3224</table>
3225
3226<p>
3227Again, it is usually better to adjust the RCU read-side critical sections
3228to use a single flavor of RCU, but when this is not feasible, you can use
3229<tt>synchronize_rcu_mult()</tt>.
3230 3171
3231<h2><a name="Possible Future Changes">Possible Future Changes</a></h2>3172<h2><a name="Possible Future Changes">Possible Future Changes</a></h2>
3232 3173
@@ -3237,12 +3178,6 @@ If this becomes a serious problem, it will be necessary to rework the · 4 unmodified lines
3237grace-period state machine so as to avoid the need for the additional3178grace-period state machine so as to avoid the need for the additional
3238latency.3179latency.
3239 3180
3240<p>
3241Expedited grace periods scan the CPUs, so their latency and overhead
3242increases with increasing numbers of CPUs.
3243If this becomes a serious problem on large systems, it will be necessary
3244to do some redesign to avoid this scalability problem.
3245
3246<p>3181<p>
3247RCU disables CPU hotplug in a few places, perhaps most notably in the3182RCU disables CPU hotplug in a few places, perhaps most notably in the
3248<tt>rcu_barrier()</tt> operations.3183<tt>rcu_barrier()</tt> operations.
@@ -3287,11 +3222,6 @@ Please note that arrangements that require RCU to remap CPU numbers will · 38 unmodified lines
3287require extremely good demonstration of need and full exploration of3222require extremely good demonstration of need and full exploration of
3288alternatives.3223alternatives.
3289 3224
3290<p>
3291There is an embarrassingly large number of flavors of RCU, and this
3292number has been increasing over time.
3293Perhaps it will be possible to combine some at some future date.
3294
3295<p>3225<p>
3296RCU's various kthreads are reasonably recent additions.3226RCU's various kthreads are reasonably recent additions.
3297It is quite likely that adjustments will be required to more gracefully3227It is quite likely that adjustments will be required to more gracefully
Documentation/RCU/rcu.txt+0−4
@@ -87,7 +87,3 @@ o Where can I find more information on RCU? · 86 unmodified lines
87 87
88 See the RTFP.txt file in this directory.88 See the RTFP.txt file in this directory.
89 Or point your browser at http://www.rdrop.com/users/paulmck/RCU/.89 Or point your browser at http://www.rdrop.com/users/paulmck/RCU/.
90
91o What are all these files in this directory?
92
93 See 00-INDEX for the list.
Documentation/RCU/stallwarn.txt+5−8
@@ -16,12 +16,9 @@ o A CPU looping in an RCU read-side critical section. · 15 unmodified lines
16 16
17o A CPU looping with interrupts disabled.17o A CPU looping with interrupts disabled.
18 18
19o A CPU looping with preemption disabled. This condition can19o A CPU looping with preemption disabled.
20 result in RCU-sched stalls and, if ksoftirqd is in use, RCU-bh
21 stalls.
22 20
23o A CPU looping with bottom halves disabled. This condition can21o A CPU looping with bottom halves disabled.
24 result in RCU-sched and RCU-bh stalls.
25 22
26o For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel23o For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel
27 without invoking schedule(). If the looping in the kernel is24 without invoking schedule(). If the looping in the kernel is
@@ -87,9 +84,9 @@ o A hardware failure. This is quite unlikely, but has occurred · 59 unmodified lines
87 This resulted in a series of RCU CPU stall warnings, eventually84 This resulted in a series of RCU CPU stall warnings, eventually
88 leading the realization that the CPU had failed.85 leading the realization that the CPU had failed.
89 86
90The RCU, RCU-sched, RCU-bh, and RCU-tasks implementations have CPU stall87The RCU, RCU-sched, and RCU-tasks implementations have CPU stall warning.
91warning. Note that SRCU does -not- have CPU stall warnings. Please note88Note that SRCU does -not- have CPU stall warnings. Please note that
92that RCU only detects CPU stalls when there is a grace period in progress.89RCU only detects CPU stalls when there is a grace period in progress.
93No grace period, no CPU stall warnings.90No grace period, no CPU stall warnings.
94 91
95To diagnose the cause of the stall, inspect the stack traces.92To diagnose the cause of the stall, inspect the stack traces.
Documentation/RCU/whatisRCU.txt+2−1
@@ -934,7 +934,8 @@ c. Do you need to treat NMI handlers, hardirq handlers, · 933 unmodified lines
934d. Do you need RCU grace periods to complete even in the face934d. Do you need RCU grace periods to complete even in the face
935 of softirq monopolization of one or more of the CPUs? For935 of softirq monopolization of one or more of the CPUs? For
936 example, is your code subject to network-based denial-of-service936 example, is your code subject to network-based denial-of-service
937 attacks? If so, you need RCU-bh.937 attacks? If so, you should disable softirq across your readers,
938 for example, by using rcu_read_lock_bh().
938 939
939e. Is your workload too update-intensive for normal use of940e. Is your workload too update-intensive for normal use of
940 RCU, but inappropriate for other synchronization mechanisms?941 RCU, but inappropriate for other synchronization mechanisms?
Documentation/accounting/psi.txt+73−0
@@ -0,0 +1,73 @@
1================================
2PSI - Pressure Stall Information
3================================
4
5:Date: April, 2018
6:Author: Johannes Weiner <hannes@cmpxchg.org>
7
8When CPU, memory or IO devices are contended, workloads experience
9latency spikes, throughput losses, and run the risk of OOM kills.
10
11Without an accurate measure of such contention, users are forced to
12either play it safe and under-utilize their hardware resources, or
13roll the dice and frequently suffer the disruptions resulting from
14excessive overcommit.
15
16The psi feature identifies and quantifies the disruptions caused by
17such resource crunches and the time impact it has on complex workloads
18or even entire systems.
19
20Having an accurate measure of productivity losses caused by resource
21scarcity aids users in sizing workloads to hardware--or provisioning
22hardware according to workload demand.
23
24As psi aggregates this information in realtime, systems can be managed
25dynamically using techniques such as load shedding, migrating jobs to
26other systems or data centers, or strategically pausing or killing low
27priority or restartable batch jobs.
28
29This allows maximizing hardware utilization without sacrificing
30workload health or risking major disruptions such as OOM kills.
31
32Pressure interface
33==================
34
35Pressure information for each resource is exported through the
36respective file in /proc/pressure/ -- cpu, memory, and io.
37
38The format for CPU is as such:
39
40some avg10=0.00 avg60=0.00 avg300=0.00 total=0
41
42and for memory and IO:
43
44some avg10=0.00 avg60=0.00 avg300=0.00 total=0
45full avg10=0.00 avg60=0.00 avg300=0.00 total=0
46
47The "some" line indicates the share of time in which at least some
48tasks are stalled on a given resource.
49
50The "full" line indicates the share of time in which all non-idle
51tasks are stalled on a given resource simultaneously. In this state
52actual CPU cycles are going to waste, and a workload that spends
53extended time in this state is considered to be thrashing. This has
54severe impact on performance, and it's useful to distinguish this
55situation from a state where some tasks are stalled but the CPU is
56still doing productive work. As such, time spent in this subset of the
57stall state is tracked separately and exported in the "full" averages.
58
59The ratios are tracked as recent trends over ten, sixty, and three
60hundred second windows, which gives insight into short term events as
61well as medium and long term trends. The total absolute stall time is
62tracked and exported as well, to allow detection of latency spikes
63which wouldn't necessarily make a dent in the time averages, or to
64average trends over custom time frames.
65
66Cgroup2 interface
67=================
68
69In a system with a CONFIG_CGROUP=y kernel and the cgroup2 filesystem
70mounted, pressure stall information is also tracked for tasks grouped
71into cgroups. Each subdirectory in the cgroupfs mountpoint contains
72cpu.pressure, memory.pressure, and io.pressure files; the format is
73the same as the /proc/pressure/ files.
Documentation/admin-guide/LSM/Yama.rst+2−2
@@ -64,8 +64,8 @@ The sysctl settings (writable only with ``CAP_SYS_PTRACE``) are: · 63 unmodified lines
64 Using ``PTRACE_TRACEME`` is unchanged.64 Using ``PTRACE_TRACEME`` is unchanged.
65 65
662 - admin-only attach:662 - admin-only attach:
67 only processes with ``CAP_SYS_PTRACE`` may use ptrace67 only processes with ``CAP_SYS_PTRACE`` may use ptrace, either with
68 with ``PTRACE_ATTACH``, or through children calling ``PTRACE_TRACEME``.68 ``PTRACE_ATTACH`` or through children calling ``PTRACE_TRACEME``.
69 69
703 - no attach:703 - no attach:
71 no processes may use ptrace with ``PTRACE_ATTACH`` nor via71 no processes may use ptrace with ``PTRACE_ATTACH`` nor via
Documentation/admin-guide/README.rst+1−2
@@ -51,8 +51,7 @@ Documentation · 50 unmodified lines
51 51
52 - There are various README files in the Documentation/ subdirectory:52 - There are various README files in the Documentation/ subdirectory:
53 these typically contain kernel-specific installation notes for some53 these typically contain kernel-specific installation notes for some
54 drivers for example. See Documentation/00-INDEX for a list of what54 drivers for example. Please read the
55 is contained in each file. Please read the
56 :ref:`Documentation/process/changes.rst <changes>` file, as it55 :ref:`Documentation/process/changes.rst <changes>` file, as it
57 contains information about the problems, which may result by upgrading56 contains information about the problems, which may result by upgrading
58 your kernel.57 your kernel.
Documentation/admin-guide/cgroup-v2.rst+22−0
@@ -966,6 +966,12 @@ All time durations are in microseconds. · 965 unmodified lines
966 $PERIOD duration. "max" for $MAX indicates no limit. If only966 $PERIOD duration. "max" for $MAX indicates no limit. If only
967 one number is written, $MAX is updated.967 one number is written, $MAX is updated.
968 968
969 cpu.pressure
970 A read-only nested-key file which exists on non-root cgroups.
971
972 Shows pressure stall information for CPU. See
973 Documentation/accounting/psi.txt for details.
974
969 975
970Memory976Memory
971------977------
@@ -1127,6 +1133,10 @@ PAGE_SIZE multiple when read back. · 155 unmodified lines
1127 disk readahead. For now OOM in memory cgroup kills1133 disk readahead. For now OOM in memory cgroup kills
1128 tasks iff shortage has happened inside page fault.1134 tasks iff shortage has happened inside page fault.
1129 1135
1136 This event is not raised if the OOM killer is not
1137 considered as an option, e.g. for failed high-order
1138 allocations.
1139
1130 oom_kill1140 oom_kill
1131 The number of processes belonging to this cgroup1141 The number of processes belonging to this cgroup
1132 killed by any kind of OOM killer.1142 killed by any kind of OOM killer.
@@ -1271,6 +1281,12 @@ PAGE_SIZE multiple when read back. · 138 unmodified lines
1271 higher than the limit for an extended period of time. This1281 higher than the limit for an extended period of time. This
1272 reduces the impact on the workload and memory management.1282 reduces the impact on the workload and memory management.
1273 1283
1284 memory.pressure
1285 A read-only nested-key file which exists on non-root cgroups.
1286
1287 Shows pressure stall information for memory. See
1288 Documentation/accounting/psi.txt for details.
1289
1274 1290
1275Usage Guidelines1291Usage Guidelines
1276~~~~~~~~~~~~~~~~1292~~~~~~~~~~~~~~~~
@@ -1408,6 +1424,12 @@ IO Interface Files · 131 unmodified lines
1408 1424
1409 8:16 rbps=2097152 wbps=max riops=max wiops=max1425 8:16 rbps=2097152 wbps=max riops=max wiops=max
1410 1426
1427 io.pressure
1428 A read-only nested-key file which exists on non-root cgroups.
1429
1430 Shows pressure stall information for IO. See
1431 Documentation/accounting/psi.txt for details.
1432
1411 1433
1412Writeback1434Writeback
1413~~~~~~~~~1435~~~~~~~~~
Documentation/admin-guide/ext4.rst+574−0
@@ -0,0 +1,574 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3========================
4ext4 General Information
5========================
6
7Ext4 is an advanced level of the ext3 filesystem which incorporates
8scalability and reliability enhancements for supporting large filesystems
9(64 bit) in keeping with increasing disk capacities and state-of-the-art
10feature requirements.
11
12Mailing list: linux-ext4@vger.kernel.org
13Web site: http://ext4.wiki.kernel.org
14
15
16Quick usage instructions
17========================
18
19Note: More extensive information for getting started with ext4 can be
20found at the ext4 wiki site at the URL:
21http://ext4.wiki.kernel.org/index.php/Ext4_Howto
22
23 - The latest version of e2fsprogs can be found at:
24
25 https://www.kernel.org/pub/linux/kernel/people/tytso/e2fsprogs/
26
27 or
28
29 http://sourceforge.net/project/showfiles.php?group_id=2406
30
31 or grab the latest git repository from:
32
33 https://git.kernel.org/pub/scm/fs/ext2/e2fsprogs.git
34
35 - Create a new filesystem using the ext4 filesystem type:
36
37 # mke2fs -t ext4 /dev/hda1
38
39 Or to configure an existing ext3 filesystem to support extents:
40
41 # tune2fs -O extents /dev/hda1
42
43 If the filesystem was created with 128 byte inodes, it can be
44 converted to use 256 byte for greater efficiency via:
45
46 # tune2fs -I 256 /dev/hda1
47
48 - Mounting:
49
50 # mount -t ext4 /dev/hda1 /wherever
51
52 - When comparing performance with other filesystems, it's always
53 important to try multiple workloads; very often a subtle change in a
54 workload parameter can completely change the ranking of which
55 filesystems do well compared to others. When comparing versus ext3,
56 note that ext4 enables write barriers by default, while ext3 does
57 not enable write barriers by default. So it is useful to use
58 explicitly specify whether barriers are enabled or not when via the
59 '-o barriers=[0|1]' mount option for both ext3 and ext4 filesystems
60 for a fair comparison. When tuning ext3 for best benchmark numbers,
61 it is often worthwhile to try changing the data journaling mode; '-o
62 data=writeback' can be faster for some workloads. (Note however that
63 running mounted with data=writeback can potentially leave stale data
64 exposed in recently written files in case of an unclean shutdown,
65 which could be a security exposure in some situations.) Configuring
66 the filesystem with a large journal can also be helpful for
67 metadata-intensive workloads.
68
69Features
70========
71
72Currently Available
73-------------------
74
75* ability to use filesystems > 16TB (e2fsprogs support not available yet)
76* extent format reduces metadata overhead (RAM, IO for access, transactions)
77* extent format more robust in face of on-disk corruption due to magics,
78* internal redundancy in tree
79* improved file allocation (multi-block alloc)
80* lift 32000 subdirectory limit imposed by i_links_count[1]
81* nsec timestamps for mtime, atime, ctime, create time
82* inode version field on disk (NFSv4, Lustre)
83* reduced e2fsck time via uninit_bg feature
84* journal checksumming for robustness, performance
85* persistent file preallocation (e.g for streaming media, databases)
86* ability to pack bitmaps and inode tables into larger virtual groups via the
87 flex_bg feature
88* large file support
89* inode allocation using large virtual block groups via flex_bg
90* delayed allocation
91* large block (up to pagesize) support
92* efficient new ordered mode in JBD2 and ext4 (avoid using buffer head to force
93 the ordering)
94
95[1] Filesystems with a block size of 1k may see a limit imposed by the
96directory hash tree having a maximum depth of two.
97
98Options
99=======
100
101When mounting an ext4 filesystem, the following option are accepted:
102(*) == default
103
104 ro
105 Mount filesystem read only. Note that ext4 will replay the journal (and
106 thus write to the partition) even when mounted "read only". The mount
107 options "ro,noload" can be used to prevent writes to the filesystem.
108
109 journal_checksum
110 Enable checksumming of the journal transactions. This will allow the
111 recovery code in e2fsck and the kernel to detect corruption in the
112 kernel. It is a compatible change and will be ignored by older
113 kernels.
114
115 journal_async_commit
116 Commit block can be written to disk without waiting for descriptor
117 blocks. If enabled older kernels cannot mount the device. This will
118 enable 'journal_checksum' internally.
119
120 journal_path=path, journal_dev=devnum
121 When the external journal device's major/minor numbers have changed,
122 these options allow the user to specify the new journal location. The
123 journal device is identified through either its new major/minor numbers
124 encoded in devnum, or via a path to the device.
125
126 norecovery, noload
127 Don't load the journal on mounting. Note that if the filesystem was
128 not unmounted cleanly, skipping the journal replay will lead to the
129 filesystem containing inconsistencies that can lead to any number of
130 problems.
131
132 data=journal
133 All data are committed into the journal prior to being written into the
134 main file system. Enabling this mode will disable delayed allocation
135 and O_DIRECT support.
136
137 data=ordered (*)
138 All data are forced directly out to the main file system prior to its
139 metadata being committed to the journal.
140
141 data=writeback
142 Data ordering is not preserved, data may be written into the main file
143 system after its metadata has been committed to the journal.
144
145 commit=nrsec (*)
146 Ext4 can be told to sync all its data and metadata every 'nrsec'
147 seconds. The default value is 5 seconds. This means that if you lose
148 your power, you will lose as much as the latest 5 seconds of work (your
149 filesystem will not be damaged though, thanks to the journaling). This
150 default value (or any low value) will hurt performance, but it's good
151 for data-safety. Setting it to 0 will have the same effect as leaving
152 it at the default (5 seconds). Setting it to very large values will
153 improve performance.
154
155 barrier=<0|1(*)>, barrier(*), nobarrier
156 This enables/disables the use of write barriers in the jbd code.
157 barrier=0 disables, barrier=1 enables. This also requires an IO stack
158 which can support barriers, and if jbd gets an error on a barrier
159 write, it will disable again with a warning. Write barriers enforce
160 proper on-disk ordering of journal commits, making volatile disk write
161 caches safe to use, at some performance penalty. If your disks are
162 battery-backed in one way or another, disabling barriers may safely
163 improve performance. The mount options "barrier" and "nobarrier" can
164 also be used to enable or disable barriers, for consistency with other
165 ext4 mount options.
166
167 inode_readahead_blks=n
168 This tuning parameter controls the maximum number of inode table blocks
169 that ext4's inode table readahead algorithm will pre-read into the
170 buffer cache. The default value is 32 blocks.
171
172 nouser_xattr
173 Disables Extended User Attributes. See the attr(5) manual page for
174 more information about extended attributes.
175
176 noacl
177 This option disables POSIX Access Control List support. If ACL support
178 is enabled in the kernel configuration (CONFIG_EXT4_FS_POSIX_ACL), ACL
179 is enabled by default on mount. See the acl(5) manual page for more
180 information about acl.
181
182 bsddf (*)
183 Make 'df' act like BSD.
184
185 minixdf
186 Make 'df' act like Minix.
187
188 debug
189 Extra debugging information is sent to syslog.
190
191 abort
192 Simulate the effects of calling ext4_abort() for debugging purposes.
193 This is normally used while remounting a filesystem which is already
194 mounted.
195
196 errors=remount-ro
197 Remount the filesystem read-only on an error.
198
199 errors=continue
200 Keep going on a filesystem error.
201
202 errors=panic
203 Panic and halt the machine if an error occurs. (These mount options
204 override the errors behavior specified in the superblock, which can be
205 configured using tune2fs)
206
207 data_err=ignore(*)
208 Just print an error message if an error occurs in a file data buffer in
209 ordered mode.
210 data_err=abort
211 Abort the journal if an error occurs in a file data buffer in ordered
212 mode.
213
214 grpid | bsdgroups
215 New objects have the group ID of their parent.
216
217 nogrpid (*) | sysvgroups
218 New objects have the group ID of their creator.
219
220 resgid=n
221 The group ID which may use the reserved blocks.
222
223 resuid=n
224 The user ID which may use the reserved blocks.
225
226 sb=
227 Use alternate superblock at this location.
228
229 quota, noquota, grpquota, usrquota
230 These options are ignored by the filesystem. They are used only by
231 quota tools to recognize volumes where quota should be turned on. See
232 documentation in the quota-tools package for more details
233 (http://sourceforge.net/projects/linuxquota).
234
235 jqfmt=<quota type>, usrjquota=<file>, grpjquota=<file>
236 These options tell filesystem details about quota so that quota
237 information can be properly updated during journal replay. They replace
238 the above quota options. See documentation in the quota-tools package
239 for more details (http://sourceforge.net/projects/linuxquota).
240
241 stripe=n
242 Number of filesystem blocks that mballoc will try to use for allocation
243 size and alignment. For RAID5/6 systems this should be the number of
244 data disks * RAID chunk size in file system blocks.
245
246 delalloc (*)
247 Defer block allocation until just before ext4 writes out the block(s)
248 in question. This allows ext4 to better allocation decisions more
249 efficiently.
250
251 nodelalloc
252 Disable delayed allocation. Blocks are allocated when the data is
253 copied from userspace to the page cache, either via the write(2) system
254 call or when an mmap'ed page which was previously unallocated is
255 written for the first time.
256
257 max_batch_time=usec
258 Maximum amount of time ext4 should wait for additional filesystem
259 operations to be batch together with a synchronous write operation.
260 Since a synchronous write operation is going to force a commit and then
261 a wait for the I/O complete, it doesn't cost much, and can be a huge
262 throughput win, we wait for a small amount of time to see if any other
263 transactions can piggyback on the synchronous write. The algorithm
264 used is designed to automatically tune for the speed of the disk, by
265 measuring the amount of time (on average) that it takes to finish
266 committing a transaction. Call this time the "commit time". If the
267 time that the transaction has been running is less than the commit
268 time, ext4 will try sleeping for the commit time to see if other
269 operations will join the transaction. The commit time is capped by
270 the max_batch_time, which defaults to 15000us (15ms). This
271 optimization can be turned off entirely by setting max_batch_time to 0.
272
273 min_batch_time=usec
274 This parameter sets the commit time (as described above) to be at least
275 min_batch_time. It defaults to zero microseconds. Increasing this
276 parameter may improve the throughput of multi-threaded, synchronous
277 workloads on very fast disks, at the cost of increasing latency.
278
279 journal_ioprio=prio
280 The I/O priority (from 0 to 7, where 0 is the highest priority) which
281 should be used for I/O operations submitted by kjournald2 during a
282 commit operation. This defaults to 3, which is a slightly higher
283 priority than the default I/O priority.
284
285 auto_da_alloc(*), noauto_da_alloc
286 Many broken applications don't use fsync() when replacing existing
287 files via patterns such as fd = open("foo.new")/write(fd,..)/close(fd)/
288 rename("foo.new", "foo"), or worse yet, fd = open("foo",
289 O_TRUNC)/write(fd,..)/close(fd). If auto_da_alloc is enabled, ext4
290 will detect the replace-via-rename and replace-via-truncate patterns
291 and force that any delayed allocation blocks are allocated such that at
292 the next journal commit, in the default data=ordered mode, the data
293 blocks of the new file are forced to disk before the rename() operation
294 is committed. This provides roughly the same level of guarantees as
295 ext3, and avoids the "zero-length" problem that can happen when a
296 system crashes before the delayed allocation blocks are forced to disk.
297
298 noinit_itable
299 Do not initialize any uninitialized inode table blocks in the
300 background. This feature may be used by installation CD's so that the
301 install process can complete as quickly as possible; the inode table
302 initialization process would then be deferred until the next time the
303 file system is unmounted.
304
305 init_itable=n
306 The lazy itable init code will wait n times the number of milliseconds
307 it took to zero out the previous block group's inode table. This
308 minimizes the impact on the system performance while file system's
309 inode table is being initialized.
310
311 discard, nodiscard(*)
312 Controls whether ext4 should issue discard/TRIM commands to the
313 underlying block device when blocks are freed. This is useful for SSD
314 devices and sparse/thinly-provisioned LUNs, but it is off by default
315 until sufficient testing has been done.
316
317 nouid32
318 Disables 32-bit UIDs and GIDs. This is for interoperability with
319 older kernels which only store and expect 16-bit values.
320
321 block_validity(*), noblock_validity
322 These options enable or disable the in-kernel facility for tracking
323 filesystem metadata blocks within internal data structures. This
324 allows multi- block allocator and other routines to notice bugs or
325 corrupted allocation bitmaps which cause blocks to be allocated which
326 overlap with filesystem metadata blocks.
327
328 dioread_lock, dioread_nolock
329 Controls whether or not ext4 should use the DIO read locking. If the
330 dioread_nolock option is specified ext4 will allocate uninitialized
331 extent before buffer write and convert the extent to initialized after
332 IO completes. This approach allows ext4 code to avoid using inode
333 mutex, which improves scalability on high speed storages. However this
334 does not work with data journaling and dioread_nolock option will be
335 ignored with kernel warning. Note that dioread_nolock code path is only
336 used for extent-based files. Because of the restrictions this options
337 comprises it is off by default (e.g. dioread_lock).
338
339 max_dir_size_kb=n
340 This limits the size of directories so that any attempt to expand them
341 beyond the specified limit in kilobytes will cause an ENOSPC error.
342 This is useful in memory constrained environments, where a very large
343 directory can cause severe performance problems or even provoke the Out
344 Of Memory killer. (For example, if there is only 512mb memory
345 available, a 176mb directory may seriously cramp the system's style.)
346
347 i_version
348 Enable 64-bit inode version support. This option is off by default.
349
350 dax
351 Use direct access (no page cache). See
352 Documentation/filesystems/dax.txt. Note that this option is
353 incompatible with data=journal.
354
355Data Mode
356=========
357There are 3 different data modes:
358
359* writeback mode
360
361 In data=writeback mode, ext4 does not journal data at all. This mode provides
362 a similar level of journaling as that of XFS, JFS, and ReiserFS in its default
363 mode - metadata journaling. A crash+recovery can cause incorrect data to
364 appear in files which were written shortly before the crash. This mode will
365 typically provide the best ext4 performance.
366
367* ordered mode
368
369 In data=ordered mode, ext4 only officially journals metadata, but it logically
370 groups metadata information related to data changes with the data blocks into
371 a single unit called a transaction. When it's time to write the new metadata
372 out to disk, the associated data blocks are written first. In general, this
373 mode performs slightly slower than writeback but significantly faster than
374 journal mode.
375
376* journal mode
377
378 data=journal mode provides full data and metadata journaling. All new data is
379 written to the journal first, and then to its final location. In the event of
380 a crash, the journal can be replayed, bringing both data and metadata into a
381 consistent state. This mode is the slowest except when data needs to be read
382 from and written to disk at the same time where it outperforms all others
383 modes. Enabling this mode will disable delayed allocation and O_DIRECT
384 support.
385
386/proc entries
387=============
388
389Information about mounted ext4 file systems can be found in
390/proc/fs/ext4. Each mounted filesystem will have a directory in
391/proc/fs/ext4 based on its device name (i.e., /proc/fs/ext4/hdc or
392/proc/fs/ext4/dm-0). The files in each per-device directory are shown
393in table below.
394
395Files in /proc/fs/ext4/<devname>
396
397 mb_groups
398 details of multiblock allocator buddy cache of free blocks
399
400/sys entries
401============
402
403Information about mounted ext4 file systems can be found in
404/sys/fs/ext4. Each mounted filesystem will have a directory in
405/sys/fs/ext4 based on its device name (i.e., /sys/fs/ext4/hdc or
406/sys/fs/ext4/dm-0). The files in each per-device directory are shown
407in table below.
408
409Files in /sys/fs/ext4/<devname>:
410
411(see also Documentation/ABI/testing/sysfs-fs-ext4)
412
413 delayed_allocation_blocks
414 This file is read-only and shows the number of blocks that are dirty in
415 the page cache, but which do not have their location in the filesystem
416 allocated yet.
417
418 inode_goal
419 Tuning parameter which (if non-zero) controls the goal inode used by
420 the inode allocator in preference to all other allocation heuristics.
421 This is intended for debugging use only, and should be 0 on production
422 systems.
423
424 inode_readahead_blks
425 Tuning parameter which controls the maximum number of inode table
426 blocks that ext4's inode table readahead algorithm will pre-read into
427 the buffer cache.
428
429 lifetime_write_kbytes
430 This file is read-only and shows the number of kilobytes of data that
431 have been written to this filesystem since it was created.
432
433 max_writeback_mb_bump
434 The maximum number of megabytes the writeback code will try to write
435 out before move on to another inode.
436
437 mb_group_prealloc
438 The multiblock allocator will round up allocation requests to a
439 multiple of this tuning parameter if the stripe size is not set in the
440 ext4 superblock
441
442 mb_max_to_scan
443 The maximum number of extents the multiblock allocator will search to
444 find the best extent.
445
446 mb_min_to_scan
447 The minimum number of extents the multiblock allocator will search to
448 find the best extent.
449
450 mb_order2_req
451 Tuning parameter which controls the minimum size for requests (as a
452 power of 2) where the buddy cache is used.
453
454 mb_stats
455 Controls whether the multiblock allocator should collect statistics,
456 which are shown during the unmount. 1 means to collect statistics, 0
457 means not to collect statistics.
458
459 mb_stream_req
460 Files which have fewer blocks than this tunable parameter will have
461 their blocks allocated out of a block group specific preallocation
462 pool, so that small files are packed closely together. Each large file
463 will have its blocks allocated out of its own unique preallocation
464 pool.
465
466 session_write_kbytes
467 This file is read-only and shows the number of kilobytes of data that
468 have been written to this filesystem since it was mounted.
469
470 reserved_clusters
471 This is RW file and contains number of reserved clusters in the file
472 system which will be used in the specific situations to avoid costly
473 zeroout, unexpected ENOSPC, or possible data loss. The default is 2% or
474 4096 clusters, whichever is smaller and this can be changed however it
475 can never exceed number of clusters in the file system. If there is not
476 enough space for the reserved space when mounting the file mount will
477 _not_ fail.
478
479Ioctls
480======
481
482There is some Ext4 specific functionality which can be accessed by applications
483through the system call interfaces. The list of all Ext4 specific ioctls are
484shown in the table below.
485
486Table of Ext4 specific ioctls
487
488 EXT4_IOC_GETFLAGS
489 Get additional attributes associated with inode. The ioctl argument is
490 an integer bitfield, with bit values described in ext4.h. This ioctl is
491 an alias for FS_IOC_GETFLAGS.
492
493 EXT4_IOC_SETFLAGS
494 Set additional attributes associated with inode. The ioctl argument is
495 an integer bitfield, with bit values described in ext4.h. This ioctl is
496 an alias for FS_IOC_SETFLAGS.
497
498 EXT4_IOC_GETVERSION, EXT4_IOC_GETVERSION_OLD
499 Get the inode i_generation number stored for each inode. The
500 i_generation number is normally changed only when new inode is created
501 and it is particularly useful for network filesystems. The '_OLD'
502 version of this ioctl is an alias for FS_IOC_GETVERSION.
503
504 EXT4_IOC_SETVERSION, EXT4_IOC_SETVERSION_OLD
505 Set the inode i_generation number stored for each inode. The '_OLD'
506 version of this ioctl is an alias for FS_IOC_SETVERSION.
507
508 EXT4_IOC_GROUP_EXTEND
509 This ioctl has the same purpose as the resize mount option. It allows
510 to resize filesystem to the end of the last existing block group,
511 further resize has to be done with resize2fs, either online, or
512 offline. The argument points to the unsigned logn number representing
513 the filesystem new block count.
514
515 EXT4_IOC_MOVE_EXT
516 Move the block extents from orig_fd (the one this ioctl is pointing to)
517 to the donor_fd (the one specified in move_extent structure passed as
518 an argument to this ioctl). Then, exchange inode metadata between
519 orig_fd and donor_fd. This is especially useful for online
520 defragmentation, because the allocator has the opportunity to allocate
521 moved blocks better, ideally into one contiguous extent.
522
523 EXT4_IOC_GROUP_ADD
524 Add a new group descriptor to an existing or new group descriptor
525 block. The new group descriptor is described by ext4_new_group_input
526 structure, which is passed as an argument to this ioctl. This is
527 especially useful in conjunction with EXT4_IOC_GROUP_EXTEND, which
528 allows online resize of the filesystem to the end of the last existing
529 block group. Those two ioctls combined is used in userspace online
530 resize tool (e.g. resize2fs).
531
532 EXT4_IOC_MIGRATE
533 This ioctl operates on the filesystem itself. It converts (migrates)
534 ext3 indirect block mapped inode to ext4 extent mapped inode by walking
535 through indirect block mapping of the original inode and converting
536 contiguous block ranges into ext4 extents of the temporary inode. Then,
537 inodes are swapped. This ioctl might help, when migrating from ext3 to
538 ext4 filesystem, however suggestion is to create fresh ext4 filesystem
539 and copy data from the backup. Note, that filesystem has to support
540 extents for this ioctl to work.
541
542 EXT4_IOC_ALLOC_DA_BLKS
543 Force all of the delay allocated blocks to be allocated to preserve
544 application-expected ext3 behaviour. Note that this will also start
545 triggering a write of the data blocks, but this behaviour may change in
546 the future as it is not necessary and has been done this way only for
547 sake of simplicity.
548
549 EXT4_IOC_RESIZE_FS
550 Resize the filesystem to a new size. The number of blocks of resized
551 filesystem is passed in via 64 bit integer argument. The kernel
552 allocates bitmaps and inode table, the userspace tool thus just passes
553 the new number of blocks.
554
555 EXT4_IOC_SWAP_BOOT
556 Swap i_blocks and associated attributes (like i_blocks, i_size,
557 i_flags, ...) from the specified inode with inode EXT4_BOOT_LOADER_INO
558 (#5). This is typically used to store a boot loader in a secure part of
559 the filesystem, where it can't be changed by a normal user by accident.
560 The data blocks of the previous boot loader will be associated with the
561 given inode.
562
563References
564==========
565
566kernel source: <file:fs/ext4/>
567 <file:fs/jbd2/>
568
569programs: http://e2fsprogs.sourceforge.net/
570
571useful links: http://fedoraproject.org/wiki/ext3-devel
572 http://www.bullopensource.org/ext4/
573 http://ext4.wiki.kernel.org/index.php/Main_Page
574 http://fedoraproject.org/wiki/Features/Ext4
Documentation/admin-guide/index.rst+1−0
@@ -71,6 +71,7 @@ configure specific aspects of kernel behavior to your liking. · 70 unmodified lines
71 java71 java
72 ras72 ras
73 bcache73 bcache
74 ext4
74 pm/index75 pm/index
75 thunderbolt76 thunderbolt
76 LSM/index77 LSM/index
Documentation/admin-guide/kernel-parameters.txt+61−19
@@ -856,6 +856,11 @@ · 855 unmodified lines
856 causing system reset or hang due to sending856 causing system reset or hang due to sending
857 INIT from AP to BSP.857 INIT from AP to BSP.
858 858
859 disable_counter_freezing [HW]
860 Disable Intel PMU counter freezing feature.
861 The feature only exists starting from
862 Arch Perfmon v4 (Skylake and newer).
863
859 disable_ddw [PPC/PSERIES]864 disable_ddw [PPC/PSERIES]
860 Disable Dynamic DMA Window support. Use this if865 Disable Dynamic DMA Window support. Use this if
861 to workaround buggy firmware.866 to workaround buggy firmware.
@@ -1063,7 +1068,7 @@ · 201 unmodified lines
1063 earlyprintk=serial[,0x...[,baudrate]]1068 earlyprintk=serial[,0x...[,baudrate]]
1064 earlyprintk=ttySn[,baudrate]1069 earlyprintk=ttySn[,baudrate]
1065 earlyprintk=dbgp[debugController#]1070 earlyprintk=dbgp[debugController#]
1066 earlyprintk=pciserial,bus:device.function[,baudrate]1071 earlyprintk=pciserial[,force],bus:device.function[,baudrate]
1067 earlyprintk=xdbc[xhciController#]1072 earlyprintk=xdbc[xhciController#]
1068 1073
1069 earlyprintk is useful when the kernel crashes before1074 earlyprintk is useful when the kernel crashes before
@@ -1095,6 +1100,10 @@ · 25 unmodified lines
1095 1100
1096 The sclp output can only be used on s390.1101 The sclp output can only be used on s390.
1097 1102
1103 The optional "force" to "pciserial" enables use of a
1104 PCI device even when its classcode is not of the
1105 UART class.
1106
1098 edac_report= [HW,EDAC] Control how to report EDAC event1107 edac_report= [HW,EDAC] Control how to report EDAC event
1099 Format: {"on" | "off" | "force"}1108 Format: {"on" | "off" | "force"}
1100 on: enable EDAC to report H/W event. May be overridden1109 on: enable EDAC to report H/W event. May be overridden
@@ -1385,6 +1394,11 @@ · 284 unmodified lines
1385 hvc_iucv_allow= [S390] Comma-separated list of z/VM user IDs.1394 hvc_iucv_allow= [S390] Comma-separated list of z/VM user IDs.
1386 If specified, z/VM IUCV HVC accepts connections1395 If specified, z/VM IUCV HVC accepts connections
1387 from listed z/VM user IDs only.1396 from listed z/VM user IDs only.
1397
1398 hv_nopvspin [X86,HYPER_V] Disables the paravirt spinlock optimizations
1399 which allow the hypervisor to 'idle' the
1400 guest on lock contention.
1401
1388 keep_bootcon [KNL]1402 keep_bootcon [KNL]
1389 Do not unregister boot console at start. This is only1403 Do not unregister boot console at start. This is only
1390 useful for debugging when something happens in the window1404 useful for debugging when something happens in the window
@@ -1749,12 +1763,24 @@ · 358 unmodified lines
1749 nobypass [PPC/POWERNV]1763 nobypass [PPC/POWERNV]
1750 Disable IOMMU bypass, using IOMMU for PCI devices.1764 Disable IOMMU bypass, using IOMMU for PCI devices.
1751 1765
1766 iommu.strict= [ARM64] Configure TLB invalidation behaviour
1767 Format: { "0" | "1" }
1768 0 - Lazy mode.
1769 Request that DMA unmap operations use deferred
1770 invalidation of hardware TLBs, for increased
1771 throughput at the cost of reduced device isolation.
1772 Will fall back to strict mode if not supported by
1773 the relevant IOMMU driver.
1774 1 - Strict mode (default).
1775 DMA unmap operations invalidate IOMMU hardware TLBs
1776 synchronously.
1777
1752 iommu.passthrough=1778 iommu.passthrough=
1753 [ARM64] Configure DMA to bypass the IOMMU by default.1779 [ARM64] Configure DMA to bypass the IOMMU by default.
1754 Format: { "0" | "1" }1780 Format: { "0" | "1" }
1755 0 - Use IOMMU translation for DMA.1781 0 - Use IOMMU translation for DMA.
1756 1 - Bypass the IOMMU for DMA.1782 1 - Bypass the IOMMU for DMA.
1757 unset - Use IOMMU translation for DMA.1783 unset - Use value of CONFIG_IOMMU_DEFAULT_PASSTHROUGH.
1758 1784
1759 io7= [HW] IO7 for Marvel based alpha systems1785 io7= [HW] IO7 for Marvel based alpha systems
1760 See comment before marvel_specify_io7 in1786 See comment before marvel_specify_io7 in
@@ -2274,6 +2300,8 @@ · 513 unmodified lines
2274 ltpc= [NET]2300 ltpc= [NET]
2275 Format: <io>,<irq>,<dma>2301 Format: <io>,<irq>,<dma>
2276 2302
2303 lsm.debug [SECURITY] Enable LSM initialization debugging output.
2304
2277 machvec= [IA-64] Force the use of a particular machine-vector2305 machvec= [IA-64] Force the use of a particular machine-vector
2278 (machvec) in a generic kernel.2306 (machvec) in a generic kernel.
2279 Example: machvec=hpzx1_swiotlb2307 Example: machvec=hpzx1_swiotlb
@@ -2404,7 +2432,7 @@ · 124 unmodified lines
2404 seconds. Use this parameter to check at some2432 seconds. Use this parameter to check at some
2405 other rate. 0 disables periodic checking.2433 other rate. 0 disables periodic checking.
2406 2434
2407 memtest= [KNL,X86,ARM] Enable memtest2435 memtest= [KNL,X86,ARM,PPC] Enable memtest
2408 Format: <integer>2436 Format: <integer>
2409 default : 0 <disable>2437 default : 0 <disable>
2410 Specifies the number of memtest passes to be2438 Specifies the number of memtest passes to be
@@ -3540,14 +3568,14 @@ · 1129 unmodified lines
3540 3568
3541 In kernels built with CONFIG_RCU_NOCB_CPU=y, set3569 In kernels built with CONFIG_RCU_NOCB_CPU=y, set
3542 the specified list of CPUs to be no-callback CPUs.3570 the specified list of CPUs to be no-callback CPUs.
3543 Invocation of these CPUs' RCU callbacks will3571 Invocation of these CPUs' RCU callbacks will be
3544 be offloaded to "rcuox/N" kthreads created for3572 offloaded to "rcuox/N" kthreads created for that
3545 that purpose, where "x" is "b" for RCU-bh, "p"3573 purpose, where "x" is "p" for RCU-preempt, and
3546 for RCU-preempt, and "s" for RCU-sched, and "N"3574 "s" for RCU-sched, and "N" is the CPU number.
3547 is the CPU number. This reduces OS jitter on the3575 This reduces OS jitter on the offloaded CPUs,
3548 offloaded CPUs, which can be useful for HPC and3576 which can be useful for HPC and real-time
3549 real-time workloads. It can also improve energy3577 workloads. It can also improve energy efficiency
3550 efficiency for asymmetric multiprocessors.3578 for asymmetric multiprocessors.
3551 3579
3552 rcu_nocb_poll [KNL]3580 rcu_nocb_poll [KNL]
3553 Rather than requiring that offloaded CPUs3581 Rather than requiring that offloaded CPUs
@@ -3601,7 +3629,14 @@ · 47 unmodified lines
3601 Set required age in jiffies for a3629 Set required age in jiffies for a
3602 given grace period before RCU starts3630 given grace period before RCU starts
3603 soliciting quiescent-state help from3631 soliciting quiescent-state help from
3604 rcu_note_context_switch().3632 rcu_note_context_switch(). If not specified, the
3633 kernel will calculate a value based on the most
3634 recent settings of rcutree.jiffies_till_first_fqs
3635 and rcutree.jiffies_till_next_fqs.
3636 This calculated value may be viewed in
3637 rcutree.jiffies_to_sched_qs. Any attempt to
3638 set rcutree.jiffies_to_sched_qs will be
3639 cheerfully overwritten.
3605 3640
3606 rcutree.jiffies_till_first_fqs= [KNL]3641 rcutree.jiffies_till_first_fqs= [KNL]
3607 Set delay from grace-period initialization to3642 Set delay from grace-period initialization to
@@ -3869,12 +3904,6 @@ · 261 unmodified lines
3869 rcupdate.rcu_self_test= [KNL]3904 rcupdate.rcu_self_test= [KNL]
3870 Run the RCU early boot self tests3905 Run the RCU early boot self tests
3871 3906
3872 rcupdate.rcu_self_test_bh= [KNL]
3873 Run the RCU bh early boot self tests
3874
3875 rcupdate.rcu_self_test_sched= [KNL]
3876 Run the RCU sched early boot self tests
3877
3878 rdinit= [KNL]3907 rdinit= [KNL]
3879 Format: <full_path>3908 Format: <full_path>
3880 Run specified binary instead of /init from the ramdisk,3909 Run specified binary instead of /init from the ramdisk,
@@ -4610,7 +4639,8 @@ · 729 unmodified lines
4610 4639
4611 usbcore.old_scheme_first=4640 usbcore.old_scheme_first=
4612 [USB] Start with the old device initialization4641 [USB] Start with the old device initialization
4613 scheme (default 0 = off).4642 scheme, applies only to low and full-speed devices
4643 (default 0 = off).
4614 4644
4615 usbcore.usbfs_memory_mb=4645 usbcore.usbfs_memory_mb=
4616 [USB] Memory limit (in MB) for buffers allocated by4646 [USB] Memory limit (in MB) for buffers allocated by
@@ -4825,6 +4855,18 @@ · 208 unmodified lines
4825 This is actually a boot loader parameter; the value is4855 This is actually a boot loader parameter; the value is
4826 passed to the kernel using a special protocol.4856 passed to the kernel using a special protocol.
4827 4857
4858 vm_debug[=options] [KNL] Available with CONFIG_DEBUG_VM=y.
4859 May slow down system boot speed, especially when
4860 enabled on systems with a large amount of memory.
4861 All options are enabled by default, and this
4862 interface is meant to allow for selectively
4863 enabling or disabling specific virtual memory
4864 debugging features.
4865
4866 Available options are:
4867 P Enable page structure init time poisoning
4868 - Disable all of the above options
4869
4828 vmalloc=nn[KMG] [KNL,BOOT] Forces the vmalloc area to have an exact4870 vmalloc=nn[KMG] [KNL,BOOT] Forces the vmalloc area to have an exact
4829 size of <nn>. This can be used to increase the4871 size of <nn>. This can be used to increase the
4830 minimum size (128MB on x86). It can also be used to4872 minimum size (128MB on x86). It can also be used to
Documentation/admin-guide/l1tf.rst+1−1
@@ -553,7 +553,7 @@ When nested virtualization is in use, three operating systems are involved: · 552 unmodified lines
553the bare metal hypervisor, the nested hypervisor and the nested virtual553the bare metal hypervisor, the nested hypervisor and the nested virtual
554machine. VMENTER operations from the nested hypervisor into the nested554machine. VMENTER operations from the nested hypervisor into the nested
555guest will always be processed by the bare metal hypervisor. If KVM is the555guest will always be processed by the bare metal hypervisor. If KVM is the
556bare metal hypervisor it wiil:556bare metal hypervisor it will:
557 557
558 - Flush the L1D cache on every switch from the nested hypervisor to the558 - Flush the L1D cache on every switch from the nested hypervisor to the
559 nested virtual machine, so that the nested hypervisor's secrets are not559 nested virtual machine, so that the nested hypervisor's secrets are not
Documentation/admin-guide/mm/index.rst+1−0
@@ -29,6 +29,7 @@ the Linux memory management. · 28 unmodified lines
29 hugetlbpage29 hugetlbpage
30 idle_page_tracking30 idle_page_tracking
31 ksm31 ksm
32 memory-hotplug
32 numa_memory_policy33 numa_memory_policy
33 pagemap34 pagemap
34 soft-dirty35 soft-dirty
Documentation/admin-guide/mm/memory-hotplug.rstrenamed from Documentation/memory-hotplug.txt+63−126
@@ -1,47 +1,29 @@
1.. _admin_guide_memory_hotplug:
2
1==============3==============
2Memory Hotplug4Memory Hotplug
3==============5==============
4 6
5:Created: Jul 28 20077:Created: Jul 28 2007
6:Updated: Add description of notifier of memory hotplug: Oct 11 20078:Updated: Add some details about locking internals: Aug 20 2018
7 9
8This document is about memory hotplug including how-to-use and current status.10This document is about memory hotplug including how-to-use and current status.
9Because Memory Hotplug is still under development, contents of this text will11Because Memory Hotplug is still under development, contents of this text will
10be changed often.12be changed often.
11 13
12.. CONTENTS14.. contents:: :local:
13
14 1. Introduction
15 1.1 purpose of memory hotplug
16 1.2. Phases of memory hotplug
17 1.3. Unit of Memory online/offline operation
18 2. Kernel Configuration
19 3. sysfs files for memory hotplug
20 4. Physical memory hot-add phase
21 4.1 Hardware(Firmware) Support
22 4.2 Notify memory hot-add event by hand
23 5. Logical Memory hot-add phase
24 5.1. State of memory
25 5.2. How to online memory
26 6. Logical memory remove
27 6.1 Memory offline and ZONE_MOVABLE
28 6.2. How to offline memory
29 7. Physical memory remove
30 8. Memory hotplug event notifier
31 9. Future Work List
32
33 15
34.. note::16.. note::
35 17
36 (1) x86_64's has special implementation for memory hotplug.18 (1) x86_64's has special implementation for memory hotplug.
37 This text does not describe it.19 This text does not describe it.
38 (2) This text assumes that sysfs is mounted at /sys.20 (2) This text assumes that sysfs is mounted at ``/sys``.
39 21
40 22
41Introduction23Introduction
42============24============
43 25
44purpose of memory hotplug26Purpose of memory hotplug
45-------------------------27-------------------------
46 28
47Memory Hotplug allows users to increase/decrease the amount of memory.29Memory Hotplug allows users to increase/decrease the amount of memory.
@@ -57,7 +39,6 @@ hardware which supports memory power management. · 9 unmodified lines
57 39
58Linux memory hotplug is designed for both purpose.40Linux memory hotplug is designed for both purpose.
59 41
60
61Phases of memory hotplug42Phases of memory hotplug
62------------------------43------------------------
63 44
@@ -92,7 +73,6 @@ phase by hand. · 28 unmodified lines
92(However, if you writes udev's hotplug scripts for memory hotplug, these73(However, if you writes udev's hotplug scripts for memory hotplug, these
93phases can be execute in seamless way.)74phases can be execute in seamless way.)
94 75
95
96Unit of Memory online/offline operation76Unit of Memory online/offline operation
97---------------------------------------77---------------------------------------
98 78
@@ -107,10 +87,9 @@ unit upon which memory online/offline operations are to be performed. The · 8 unmodified lines
107default size of a memory block is the same as memory section size unless an87default size of a memory block is the same as memory section size unless an
108architecture specifies otherwise. (see :ref:`memory_hotplug_sysfs_files`.)88architecture specifies otherwise. (see :ref:`memory_hotplug_sysfs_files`.)
109 89
110To determine the size (in bytes) of a memory block please read this file:90To determine the size (in bytes) of a memory block please read this file::
111
112/sys/devices/system/memory/block_size_bytes
113 91
92 /sys/devices/system/memory/block_size_bytes
114 93
115Kernel Configuration94Kernel Configuration
116====================95====================
@@ -119,22 +98,22 @@ To use memory hotplug feature, kernel must be compiled with following · 2 unmodified lines
119config options.98config options.
120 99
121- For all memory hotplug:100- For all memory hotplug:
122 - Memory model -> Sparse Memory (CONFIG_SPARSEMEM)101 - Memory model -> Sparse Memory (``CONFIG_SPARSEMEM``)
123 - Allow for memory hot-add (CONFIG_MEMORY_HOTPLUG)102 - Allow for memory hot-add (``CONFIG_MEMORY_HOTPLUG``)
124 103
125- To enable memory removal, the following are also necessary:104- To enable memory removal, the following are also necessary:
126 - Allow for memory hot remove (CONFIG_MEMORY_HOTREMOVE)105 - Allow for memory hot remove (``CONFIG_MEMORY_HOTREMOVE``)
127 - Page Migration (CONFIG_MIGRATION)106 - Page Migration (``CONFIG_MIGRATION``)
128 107
129- For ACPI memory hotplug, the following are also necessary:108- For ACPI memory hotplug, the following are also necessary:
130 - Memory hotplug (under ACPI Support menu) (CONFIG_ACPI_HOTPLUG_MEMORY)109 - Memory hotplug (under ACPI Support menu) (``CONFIG_ACPI_HOTPLUG_MEMORY``)
131 - This option can be kernel module.110 - This option can be kernel module.
132 111
133- As a related configuration, if your box has a feature of NUMA-node hotplug112- As a related configuration, if your box has a feature of NUMA-node hotplug
134 via ACPI, then this option is necessary too.113 via ACPI, then this option is necessary too.
135 114
136 - ACPI0004,PNP0A05 and PNP0A06 Container Driver (under ACPI Support menu)115 - ACPI0004,PNP0A05 and PNP0A06 Container Driver (under ACPI Support menu)
137 (CONFIG_ACPI_CONTAINER).116 (``CONFIG_ACPI_CONTAINER``).
138 117
139 This option can be kernel module too.118 This option can be kernel module too.
140 119
@@ -145,10 +124,11 @@ sysfs files for memory hotplug · 4 unmodified lines
145==============================124==============================
146 125
147All memory blocks have their device information in sysfs. Each memory block126All memory blocks have their device information in sysfs. Each memory block
148is described under /sys/devices/system/memory as:127is described under ``/sys/devices/system/memory`` as::
149 128
150 /sys/devices/system/memory/memoryXXX129 /sys/devices/system/memory/memoryXXX
151 (XXX is the memory block id.)130
131where XXX is the memory block id.
152 132
153For the memory block covered by the sysfs directory. It is expected that all133For the memory block covered by the sysfs directory. It is expected that all
154memory sections in this range are present and no memory holes exist in the134memory sections in this range are present and no memory holes exist in the
@@ -157,7 +137,7 @@ the existence of one should not affect the hotplug capabilities of the memory · 2 unmodified lines
157block.137block.
158 138
159For example, assume 1GiB memory block size. A device for a memory starting at139For example, assume 1GiB memory block size. A device for a memory starting at
1600x100000000 is /sys/device/system/memory/memory4::1400x100000000 is ``/sys/device/system/memory/memory4``::
161 141
162 (0x100000000 / 1Gib = 4)142 (0x100000000 / 1Gib = 4)
163 143
@@ -165,11 +145,11 @@ This device covers address range [0x100000000 ... 0x140000000) · 1 unmodified line
165 145
166Under each memory block, you can see 5 files:146Under each memory block, you can see 5 files:
167 147
168- /sys/devices/system/memory/memoryXXX/phys_index148- ``/sys/devices/system/memory/memoryXXX/phys_index``
169- /sys/devices/system/memory/memoryXXX/phys_device149- ``/sys/devices/system/memory/memoryXXX/phys_device``
170- /sys/devices/system/memory/memoryXXX/state150- ``/sys/devices/system/memory/memoryXXX/state``
171- /sys/devices/system/memory/memoryXXX/removable151- ``/sys/devices/system/memory/memoryXXX/removable``
172- /sys/devices/system/memory/memoryXXX/valid_zones152- ``/sys/devices/system/memory/memoryXXX/valid_zones``
173 153
174=================== ============================================================154=================== ============================================================
175``phys_index`` read-only and contains memory block id, same as XXX.155``phys_index`` read-only and contains memory block id, same as XXX.
@@ -207,13 +187,15 @@ Under each memory block, you can see 5 files: · 31 unmodified lines
207 These directories/files appear after physical memory hotplug phase.187 These directories/files appear after physical memory hotplug phase.
208 188
209If CONFIG_NUMA is enabled the memoryXXX/ directories can also be accessed189If CONFIG_NUMA is enabled the memoryXXX/ directories can also be accessed
210via symbolic links located in the /sys/devices/system/node/node* directories.190via symbolic links located in the ``/sys/devices/system/node/node*`` directories.
191
192For example::
211 193
212For example:194 /sys/devices/system/node/node0/memory9 -> ../../memory/memory9
213/sys/devices/system/node/node0/memory9 -> ../../memory/memory9
214 195
215A backlink will also be created:196A backlink will also be created::
216/sys/devices/system/memory/memory9/node0 -> ../../node/node0197
198 /sys/devices/system/memory/memory9/node0 -> ../../node/node0
217 199
218.. _memory_hotplug_physical_mem:200.. _memory_hotplug_physical_mem:
219 201
@@ -240,7 +222,6 @@ If firmware supports NUMA-node hotplug, and defines an object _HID "ACPI0004", · 20 unmodified lines
240calls hotplug code for all of objects which are defined in it.222calls hotplug code for all of objects which are defined in it.
241If memory device is found, memory hotplug code will be called.223If memory device is found, memory hotplug code will be called.
242 224
243
244Notify memory hot-add event by hand225Notify memory hot-add event by hand
245-----------------------------------226-----------------------------------
246 227
@@ -251,8 +232,9 @@ CONFIG_ARCH_MEMORY_PROBE and can be configured on powerpc, sh, and x86 · 4 unmodified lines
251if hotplug is supported, although for x86 this should be handled by ACPI232if hotplug is supported, although for x86 this should be handled by ACPI
252notification.233notification.
253 234
254Probe interface is located at235Probe interface is located at::
255/sys/devices/system/memory/probe236
237 /sys/devices/system/memory/probe
256 238
257You can tell the physical address of new memory to the kernel by::239You can tell the physical address of new memory to the kernel by::
258 240
@@ -263,7 +245,6 @@ memory_block_size] memory range is hot-added. In this case, hotplug script is · 4 unmodified lines
263not called (in current implementation). You'll have to online memory by245not called (in current implementation). You'll have to online memory by
264yourself. Please see :ref:`memory_hotplug_how_to_online_memory`.246yourself. Please see :ref:`memory_hotplug_how_to_online_memory`.
265 247
266
267Logical Memory hot-add phase248Logical Memory hot-add phase
268============================249============================
269 250
@@ -301,7 +282,7 @@ This sets a global policy and impacts all memory blocks that will subsequently · 31 unmodified lines
301be hotplugged. Currently offline blocks keep their state. It is possible, under282be hotplugged. Currently offline blocks keep their state. It is possible, under
302certain circumstances, that some memory blocks will be added but will fail to283certain circumstances, that some memory blocks will be added but will fail to
303online. User space tools can check their "state" files284online. User space tools can check their "state" files
304(/sys/devices/system/memory/memoryXXX/state) and try to online them manually.285(``/sys/devices/system/memory/memoryXXX/state``) and try to online them manually.
305 286
306If the automatic onlining wasn't requested, failed, or some memory block was287If the automatic onlining wasn't requested, failed, or some memory block was
307offlined it is possible to change the individual block's state by writing to the288offlined it is possible to change the individual block's state by writing to the
@@ -334,8 +315,6 @@ available memory will be increased. · 26 unmodified lines
334 315
335This may be changed in future.316This may be changed in future.
336 317
337
338
339Logical memory remove318Logical memory remove
340=====================319=====================
341 320
@@ -413,87 +392,45 @@ Need more implementation yet.... · 71 unmodified lines
413 - Notification completion of remove works by OS to firmware.392 - Notification completion of remove works by OS to firmware.
414 - Guard from remove if not yet.393 - Guard from remove if not yet.
415 394
416Memory hotplug event notifier
417=============================
418
419Hotplugging events are sent to a notification queue.
420
421There are six types of notification defined in include/linux/memory.h:
422
423MEM_GOING_ONLINE
424 Generated before new memory becomes available in order to be able to
425 prepare subsystems to handle memory. The page allocator is still unable
426 to allocate from the new memory.
427
428MEM_CANCEL_ONLINE
429 Generated if MEMORY_GOING_ONLINE fails.
430
431MEM_ONLINE
432 Generated when memory has successfully brought online. The callback may
433 allocate pages from the new memory.
434
435MEM_GOING_OFFLINE
436 Generated to begin the process of offlining memory. Allocations are no
437 longer possible from the memory but some of the memory to be offlined
438 is still in use. The callback can be used to free memory known to a
439 subsystem from the indicated memory block.
440
441MEM_CANCEL_OFFLINE
442 Generated if MEMORY_GOING_OFFLINE fails. Memory is available again from
443 the memory block that we attempted to offline.
444
445MEM_OFFLINE
446 Generated after offlining memory is complete.
447
448A callback routine can be registered by calling::
449
450 hotplug_memory_notifier(callback_func, priority)
451
452Callback functions with higher values of priority are called before callback
453functions with lower values.
454 395
455A callback function must have the following prototype::396Locking Internals
397=================
456 398
457 int callback_func(399When adding/removing memory that uses memory block devices (i.e. ordinary RAM),
458 struct notifier_block *self, unsigned long action, void *arg);400the device_hotplug_lock should be held to:
459 401
460The first argument of the callback function (self) is a pointer to the block402- synchronize against online/offline requests (e.g. via sysfs). This way, memory
461of the notifier chain that points to the callback function itself.403 block devices can only be accessed (.online/.state attributes) by user
462The second argument (action) is one of the event types described above.404 space once memory has been fully added. And when removing memory, we
463The third argument (arg) passes a pointer of struct memory_notify::405 know nobody is in critical sections.
406- synchronize against CPU hotplug and similar (e.g. relevant for ACPI and PPC)
464 407
465 struct memory_notify {408Especially, there is a possible lock inversion that is avoided using
466 unsigned long start_pfn;409device_hotplug_lock when adding memory and user space tries to online that
467 unsigned long nr_pages;410memory faster than expected:
468 int status_change_nid_normal;
469 int status_change_nid_high;
470 int status_change_nid;
471 }
472 411
473- start_pfn is start_pfn of online/offline memory.412- device_online() will first take the device_lock(), followed by
474- nr_pages is # of pages of online/offline memory.413 mem_hotplug_lock
475- status_change_nid_normal is set node id when N_NORMAL_MEMORY of nodemask414- add_memory_resource() will first take the mem_hotplug_lock, followed by
476 is (will be) set/clear, if this is -1, then nodemask status is not changed.415 the device_lock() (while creating the devices, during bus_add_device()).
477- status_change_nid_high is set node id when N_HIGH_MEMORY of nodemask
478 is (will be) set/clear, if this is -1, then nodemask status is not changed.
479- status_change_nid is set node id when N_MEMORY of nodemask is (will be)
480 set/clear. It means a new(memoryless) node gets new memory by online and a
481 node loses all memory. If this is -1, then nodemask status is not changed.
482 416
483 If status_changed_nid* >= 0, callback should create/discard structures for the417As the device is visible to user space before taking the device_lock(), this
484 node if necessary.418can result in a lock inversion.
485 419
486The callback routine shall return one of the values420onlining/offlining of memory should be done via device_online()/
487NOTIFY_DONE, NOTIFY_OK, NOTIFY_BAD, NOTIFY_STOP421device_offline() - to make sure it is properly synchronized to actions
488defined in include/linux/notifier.h422via sysfs. Holding device_hotplug_lock is advised (to e.g. protect online_type)
489 423
490NOTIFY_DONE and NOTIFY_OK have no effect on the further processing.424When adding/removing/onlining/offlining memory or adding/removing
425heterogeneous/device memory, we should always hold the mem_hotplug_lock in
426write mode to serialise memory hotplug (e.g. access to global/zone
427variables).
491 428
492NOTIFY_BAD is used as response to the MEM_GOING_ONLINE, MEM_GOING_OFFLINE,429In addition, mem_hotplug_lock (in contrast to device_hotplug_lock) in read
493MEM_ONLINE, or MEM_OFFLINE action to cancel hotplugging. It stops430mode allows for a quite efficient get_online_mems/put_online_mems
494further processing of the notification queue.431implementation, so code accessing memory can protect from that memory
432vanishing.
495 433
496NOTIFY_STOP stops further processing of the notification queue.
497 434
498Future Work435Future Work
499===========436===========
Documentation/admin-guide/pm/cpufreq.rst+1−1
@@ -150,7 +150,7 @@ data structures necessary to handle the given policy and, possibly, to add · 149 unmodified lines
150a governor ``sysfs`` interface to it. Next, the governor is started by150a governor ``sysfs`` interface to it. Next, the governor is started by
151invoking its ``->start()`` callback.151invoking its ``->start()`` callback.
152 152
153That callback it expected to register per-CPU utilization update callbacks for153That callback is expected to register per-CPU utilization update callbacks for
154all of the online CPUs belonging to the given policy with the CPU scheduler.154all of the online CPUs belonging to the given policy with the CPU scheduler.
155The utilization update callbacks will be invoked by the CPU scheduler on155The utilization update callbacks will be invoked by the CPU scheduler on
156important events, like task enqueue and dequeue, on every iteration of the156important events, like task enqueue and dequeue, on every iteration of the
Documentation/admin-guide/pm/intel_pstate.rst+7−0
@@ -465,6 +465,13 @@ Next, the following policy attributes have special meaning if · 464 unmodified lines
465 policy for the time interval between the last two invocations of the465 policy for the time interval between the last two invocations of the
466 driver's utilization update callback by the CPU scheduler for that CPU.466 driver's utilization update callback by the CPU scheduler for that CPU.
467 467
468One more policy attribute is present if the `HWP feature is enabled in the
469processor <Active Mode With HWP_>`_:
470
471``base_frequency``
472 Shows the base frequency of the CPU. Any frequency above this will be
473 in the turbo frequency range.
474
468The meaning of these attributes in the `passive mode <Passive Mode_>`_ is the475The meaning of these attributes in the `passive mode <Passive Mode_>`_ is the
469same as for other scaling drivers.476same as for other scaling drivers.
470 477
Documentation/admin-guide/security-bugs.rst+29−18
@@ -26,23 +26,34 @@ information is helpful. Any exploit code is very helpful and will not · 25 unmodified lines
26be released without consent from the reporter unless it has already been26be released without consent from the reporter unless it has already been
27made public.27made public.
28 28
29Disclosure29Disclosure and embargoed information
30----------30------------------------------------
31 31
32The goal of the Linux kernel security team is to work with the bug32The security list is not a disclosure channel. For that, see Coordination
33submitter to understand and fix the bug. We prefer to publish the fix as33below.
34soon as possible, but try to avoid public discussion of the bug itself34
35and leave that to others.35Once a robust fix has been developed, our preference is to release the
36 36fix in a timely fashion, treating it no differently than any of the other
37Publishing the fix may be delayed when the bug or the fix is not yet37thousands of changes and fixes the Linux kernel project releases every
38fully understood, the solution is not well-tested or for vendor38month.
39coordination. However, we expect these delays to be short, measurable in39
40days, not weeks or months. A release date is negotiated by the security40However, at the request of the reporter, we will postpone releasing the
41team working with the bug submitter as well as vendors. However, the41fix for up to 5 business days after the date of the report or after the
42kernel security team holds the final say when setting a timeframe. The42embargo has lifted; whichever comes first. The only exception to that
43timeframe varies from immediate (esp. if it's already publicly known bug)43rule is if the bug is publicly known, in which case the preference is to
44to a few weeks. As a basic default policy, we expect report date to44release the fix as soon as it's available.
45release date to be on the order of 7 days.45
46Whilst embargoed information may be shared with trusted individuals in
47order to develop a fix, such information will not be published alongside
48the fix or on any other disclosure channel without the permission of the
49reporter. This includes but is not limited to the original bug report
50and followup discussions (if any), exploits, CVE information or the
51identity of the reporter.
52
53In other words our only interest is in getting bugs fixed. All other
54information submitted to the security list and any followup discussions
55of the report are treated confidentially even after the embargo has been
56lifted, in perpetuity.
46 57
47Coordination58Coordination
48------------59------------
@@ -68,7 +79,7 @@ may delay the bug handling. If a reporter wishes to have a CVE identifier · 19 unmodified lines
68assigned ahead of public disclosure, they will need to contact the private79assigned ahead of public disclosure, they will need to contact the private
69linux-distros list, described above. When such a CVE identifier is known80linux-distros list, described above. When such a CVE identifier is known
70before a patch is provided, it is desirable to mention it in the commit81before a patch is provided, it is desirable to mention it in the commit
71message, though.82message if the reporter agrees.
72 83
73Non-disclosure agreements84Non-disclosure agreements
74-------------------------85-------------------------
Documentation/arm/00-INDEX+0−50
@@ -1,50 +0,0 @@
100-INDEX
2 - this file
3Booting
4 - requirements for booting
5CCN.txt
6 - Cache Coherent Network ring-bus and perf PMU driver.
7Interrupts
8 - ARM Interrupt subsystem documentation
9IXP4xx
10 - Intel IXP4xx Network processor.
11Netwinder
12 - Netwinder specific documentation
13Porting
14 - Symbol definitions for porting Linux to a new ARM machine.
15Setup
16 - Kernel initialization parameters on ARM Linux
17README
18 - General ARM documentation
19SA1100/
20 - SA1100 documentation
21Samsung-S3C24XX/
22 - S3C24XX ARM Linux Overview
23SPEAr/
24 - ST SPEAr platform Linux Overview
25VFP/
26 - Release notes for Linux Kernel Vector Floating Point support code
27cluster-pm-race-avoidance.txt
28 - Algorithm for CPU and Cluster setup/teardown
29empeg/
30 - Ltd's Empeg MP3 Car Audio Player
31firmware.txt
32 - Secure firmware registration and calling.
33kernel_mode_neon.txt
34 - How to use NEON instructions in kernel mode
35kernel_user_helpers.txt
36 - Helper functions in kernel space made available for userspace.
37mem_alignment
38 - alignment abort handler documentation
39memory.txt
40 - description of the virtual memory layout
41nwfpe/
42 - NWFPE floating point emulator documentation
43swp_emulation
44 - SWP/SWPB emulation handler/logging description
45tcm.txt
46 - ARM Tightly Coupled Memory
47uefi.txt
48 - [U]EFI configuration and runtime services documentation
49vlocks.txt
50 - Voting locks, low-level mechanism relying on memory system atomic writes.
Documentation/arm/Samsung/Bootloader-interface.txt+1−0
@@ -26,6 +26,7 @@ Offset Value Purpose · 25 unmodified lines
260x20 0xfcba0d10 (Magic cookie) AFTR260x20 0xfcba0d10 (Magic cookie) AFTR
270x24 exynos_cpu_resume_ns AFTR270x24 exynos_cpu_resume_ns AFTR
280x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR280x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR
290x28 0x0 or last value during resume (Exynos542x) System suspend
29 30
30 31
312. Secure mode322. Secure mode
Documentation/arm64/elf_hwcaps.txt+8−4
@@ -78,11 +78,11 @@ HWCAP_EVTSTRM · 77 unmodified lines
78 78
79HWCAP_AES79HWCAP_AES
80 80
81 Functionality implied by ID_AA64ISAR1_EL1.AES == 0b0001.81 Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.
82 82
83HWCAP_PMULL83HWCAP_PMULL
84 84
85 Functionality implied by ID_AA64ISAR1_EL1.AES == 0b0010.85 Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010.
86 86
87HWCAP_SHA187HWCAP_SHA1
88 88
@@ -153,7 +153,7 @@ HWCAP_ASIMDDP · 64 unmodified lines
153 153
154HWCAP_SHA512154HWCAP_SHA512
155 155
156 Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0002.156 Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010.
157 157
158HWCAP_SVE158HWCAP_SVE
159 159
@@ -173,8 +173,12 @@ HWCAP_USCAT · 13 unmodified lines
173 173
174HWCAP_ILRCPC174HWCAP_ILRCPC
175 175
176 Functionality implied by ID_AA64ISR1_EL1.LRCPC == 0b0002.176 Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010.
177 177
178HWCAP_FLAGM178HWCAP_FLAGM
179 179
180 Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.180 Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.
181
182HWCAP_SSBS
183
184 Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.
Documentation/arm64/hugetlbpage.txt+38−0
@@ -0,0 +1,38 @@
1HugeTLBpage on ARM64
2====================
3
4Hugepage relies on making efficient use of TLBs to improve performance of
5address translations. The benefit depends on both -
6
7 - the size of hugepages
8 - size of entries supported by the TLBs
9
10The ARM64 port supports two flavours of hugepages.
11
121) Block mappings at the pud/pmd level
13--------------------------------------
14
15These are regular hugepages where a pmd or a pud page table entry points to a
16block of memory. Regardless of the supported size of entries in TLB, block
17mappings reduce the depth of page table walk needed to translate hugepage
18addresses.
19
202) Using the Contiguous bit
21---------------------------
22
23The architecture provides a contiguous bit in the translation table entries
24(D4.5.3, ARM DDI 0487C.a) that hints to the MMU to indicate that it is one of a
25contiguous set of entries that can be cached in a single TLB entry.
26
27The contiguous bit is used in Linux to increase the mapping size at the pmd and
28pte (last) level. The number of supported contiguous entries varies by page size
29and level of the page table.
30
31
32The following hugepage sizes are supported -
33
34 CONT PTE PMD CONT PMD PUD
35 -------- --- -------- ---
36 4K: 64K 2M 32M 1G
37 16K: 2M 32M 1G
38 64K: 2M 512M 16G
Documentation/arm64/silicon-errata.txt+1−0
@@ -56,6 +56,7 @@ stable kernels. · 55 unmodified lines
56| ARM | Cortex-A72 | #853709 | N/A |56| ARM | Cortex-A72 | #853709 | N/A |
57| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |57| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
58| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |58| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |
59| ARM | Cortex-A76 | #1188873 | ARM64_ERRATUM_1188873 |
59| ARM | MMU-500 | #841119,#826419 | N/A |60| ARM | MMU-500 | #841119,#826419 | N/A |
60| | | | |61| | | | |
61| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |62| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
Documentation/block/00-INDEX+0−34
@@ -1,34 +0,0 @@
100-INDEX
2 - This file
3bfq-iosched.txt
4 - BFQ IO scheduler and its tunables
5biodoc.txt
6 - Notes on the Generic Block Layer Rewrite in Linux 2.5
7biovecs.txt
8 - Immutable biovecs and biovec iterators
9capability.txt
10 - Generic Block Device Capability (/sys/block/<device>/capability)
11cfq-iosched.txt
12 - CFQ IO scheduler tunables
13cmdline-partition.txt
14 - how to specify block device partitions on kernel command line
15data-integrity.txt
16 - Block data integrity
17deadline-iosched.txt
18 - Deadline IO scheduler tunables
19ioprio.txt
20 - Block io priorities (in CFQ scheduler)
21pr.txt
22 - Block layer support for Persistent Reservations
23null_blk.txt
24 - Null block for block-layer benchmarking.
25queue-sysfs.txt
26 - Queue's sysfs entries
27request.txt
28 - The members of struct request (in include/linux/blkdev.h)
29stat.txt
30 - Block layer statistics in /sys/block/<device>/stat
31switching-sched.txt
32 - Switching I/O schedulers at runtime
33writeback_cache_control.txt
34 - Control of volatile write back caches
Documentation/blockdev/00-INDEX+0−18
@@ -1,18 +0,0 @@
100-INDEX
2 - this file
3README.DAC960
4 - info on Mylex DAC960/DAC1100 PCI RAID Controller Driver for Linux.
5cciss.txt
6 - info, major/minor #'s for Compaq's SMART Array Controllers.
7cpqarray.txt
8 - info on using Compaq's SMART2 Intelligent Disk Array Controllers.
9floppy.txt
10 - notes and driver options for the floppy disk driver.
11mflash.txt
12 - info on mGine m(g)flash driver for linux.
13nbd.txt
14 - info on a TCP implementation of a network block device.
15paride.txt
16 - information about the parallel port IDE subsystem.
17ramdisk.txt
18 - short guide on how to set up and use the RAM disk.
Documentation/blockdev/README.DAC960+0−756
@@ -1,756 +0,0 @@
1 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
2
3 Version 2.2.11 for Linux 2.2.19
4 Version 2.4.11 for Linux 2.4.12
5
6 PRODUCTION RELEASE
7
8 11 October 2001
9
10 Leonard N. Zubkoff
11 Dandelion Digital
12 lnz@dandelion.com
13
14 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
15
16
17 INTRODUCTION
18
19Mylex, Inc. designs and manufactures a variety of high performance PCI RAID
20controllers. Mylex Corporation is located at 34551 Ardenwood Blvd., Fremont,
21California 94555, USA and can be reached at 510.796.6100 or on the World Wide
22Web at http://www.mylex.com. Mylex Technical Support can be reached by
23electronic mail at mylexsup@us.ibm.com, by voice at 510.608.2400, or by FAX at
24510.745.7715. Contact information for offices in Europe and Japan is available
25on their Web site.
26
27The latest information on Linux support for DAC960 PCI RAID Controllers, as
28well as the most recent release of this driver, will always be available from
29my Linux Home Page at URL "http://www.dandelion.com/Linux/". The Linux DAC960
30driver supports all current Mylex PCI RAID controllers including the new
31eXtremeRAID 2000/3000 and AcceleRAID 352/170/160 models which have an entirely
32new firmware interface from the older eXtremeRAID 1100, AcceleRAID 150/200/250,
33and DAC960PJ/PG/PU/PD/PL. See below for a complete controller list as well as
34minimum firmware version requirements. For simplicity, in most places this
35documentation refers to DAC960 generically rather than explicitly listing all
36the supported models.
37
38Driver bug reports should be sent via electronic mail to "lnz@dandelion.com".
39Please include with the bug report the complete configuration messages reported
40by the driver at startup, along with any subsequent system messages relevant to
41the controller's operation, and a detailed description of your system's
42hardware configuration. Driver bugs are actually quite rare; if you encounter
43problems with disks being marked offline, for example, please contact Mylex
44Technical Support as the problem is related to the hardware configuration
45rather than the Linux driver.
46
47Please consult the RAID controller documentation for detailed information
48regarding installation and configuration of the controllers. This document
49primarily provides information specific to the Linux support.
50
51
52 DRIVER FEATURES
53
54The DAC960 RAID controllers are supported solely as high performance RAID
55controllers, not as interfaces to arbitrary SCSI devices. The Linux DAC960
56driver operates at the block device level, the same level as the SCSI and IDE
57drivers. Unlike other RAID controllers currently supported on Linux, the
58DAC960 driver is not dependent on the SCSI subsystem, and hence avoids all the
59complexity and unnecessary code that would be associated with an implementation
60as a SCSI driver. The DAC960 driver is designed for as high a performance as
61possible with no compromises or extra code for compatibility with lower
62performance devices. The DAC960 driver includes extensive error logging and
63online configuration management capabilities. Except for initial configuration
64of the controller and adding new disk drives, most everything can be handled
65from Linux while the system is operational.
66
67The DAC960 driver is architected to support up to 8 controllers per system.
68Each DAC960 parallel SCSI controller can support up to 15 disk drives per
69channel, for a maximum of 60 drives on a four channel controller; the fibre
70channel eXtremeRAID 3000 controller supports up to 125 disk drives per loop for
71a total of 250 drives. The drives installed on a controller are divided into
72one or more "Drive Groups", and then each Drive Group is subdivided further
73into 1 to 32 "Logical Drives". Each Logical Drive has a specific RAID Level
74and caching policy associated with it, and it appears to Linux as a single
75block device. Logical Drives are further subdivided into up to 7 partitions
76through the normal Linux and PC disk partitioning schemes. Logical Drives are
77also known as "System Drives", and Drive Groups are also called "Packs". Both
78terms are in use in the Mylex documentation; I have chosen to standardize on
79the more generic "Logical Drive" and "Drive Group".
80
81DAC960 RAID disk devices are named in the style of the obsolete Device File
82System (DEVFS). The device corresponding to Logical Drive D on Controller C
83is referred to as /dev/rd/cCdD, and the partitions are called /dev/rd/cCdDp1
84through /dev/rd/cCdDp7. For example, partition 3 of Logical Drive 5 on
85Controller 2 is referred to as /dev/rd/c2d5p3. Note that unlike with SCSI
86disks the device names will not change in the event of a disk drive failure.
87The DAC960 driver is assigned major numbers 48 - 55 with one major number per
88controller. The 8 bits of minor number are divided into 5 bits for the Logical
89Drive and 3 bits for the partition.
90
91
92 SUPPORTED DAC960/AcceleRAID/eXtremeRAID PCI RAID CONTROLLERS
93
94The following list comprises the supported DAC960, AcceleRAID, and eXtremeRAID
95PCI RAID Controllers as of the date of this document. It is recommended that
96anyone purchasing a Mylex PCI RAID Controller not in the following table
97contact the author beforehand to verify that it is or will be supported.
98
99eXtremeRAID 3000
100 1 Wide Ultra-2/LVD SCSI channel
101 2 External Fibre FC-AL channels
102 233MHz StrongARM SA 110 Processor
103 64 Bit 33MHz PCI (backward compatible with 32 Bit PCI slots)
104 32MB/64MB ECC SDRAM Memory
105
106eXtremeRAID 2000
107 4 Wide Ultra-160 LVD SCSI channels
108 233MHz StrongARM SA 110 Processor
109 64 Bit 33MHz PCI (backward compatible with 32 Bit PCI slots)
110 32MB/64MB ECC SDRAM Memory
111
112AcceleRAID 352
113 2 Wide Ultra-160 LVD SCSI channels
114 100MHz Intel i960RN RISC Processor
115 64 Bit 33MHz PCI (backward compatible with 32 Bit PCI slots)
116 32MB/64MB ECC SDRAM Memory
117
118AcceleRAID 170
119 1 Wide Ultra-160 LVD SCSI channel
120 100MHz Intel i960RM RISC Processor
121 16MB/32MB/64MB ECC SDRAM Memory
122
123AcceleRAID 160 (AcceleRAID 170LP)
124 1 Wide Ultra-160 LVD SCSI channel
125 100MHz Intel i960RS RISC Processor
126 Built in 16M ECC SDRAM Memory
127 PCI Low Profile Form Factor - fit for 2U height
128
129eXtremeRAID 1100 (DAC1164P)
130 3 Wide Ultra-2/LVD SCSI channels
131 233MHz StrongARM SA 110 Processor
132 64 Bit 33MHz PCI (backward compatible with 32 Bit PCI slots)
133 16MB/32MB/64MB Parity SDRAM Memory with Battery Backup
134
135AcceleRAID 250 (DAC960PTL1)
136 Uses onboard Symbios SCSI chips on certain motherboards
137 Also includes one onboard Wide Ultra-2/LVD SCSI Channel
138 66MHz Intel i960RD RISC Processor
139 4MB/8MB/16MB/32MB/64MB/128MB ECC EDO Memory
140
141AcceleRAID 200 (DAC960PTL0)
142 Uses onboard Symbios SCSI chips on certain motherboards
143 Includes no onboard SCSI Channels
144 66MHz Intel i960RD RISC Processor
145 4MB/8MB/16MB/32MB/64MB/128MB ECC EDO Memory
146
147AcceleRAID 150 (DAC960PRL)
148 Uses onboard Symbios SCSI chips on certain motherboards
149 Also includes one onboard Wide Ultra-2/LVD SCSI Channel
150 33MHz Intel i960RP RISC Processor
151 4MB Parity EDO Memory
152
153DAC960PJ 1/2/3 Wide Ultra SCSI-3 Channels
154 66MHz Intel i960RD RISC Processor
155 4MB/8MB/16MB/32MB/64MB/128MB ECC EDO Memory
156
157DAC960PG 1/2/3 Wide Ultra SCSI-3 Channels
158 33MHz Intel i960RP RISC Processor
159 4MB/8MB ECC EDO Memory
160
161DAC960PU 1/2/3 Wide Ultra SCSI-3 Channels
162 Intel i960CF RISC Processor
163 4MB/8MB EDRAM or 2MB/4MB/8MB/16MB/32MB DRAM Memory
164
165DAC960PD 1/2/3 Wide Fast SCSI-2 Channels
166 Intel i960CF RISC Processor
167 4MB/8MB EDRAM or 2MB/4MB/8MB/16MB/32MB DRAM Memory
168
169DAC960PL 1/2/3 Wide Fast SCSI-2 Channels
170 Intel i960 RISC Processor
171 2MB/4MB/8MB/16MB/32MB DRAM Memory
172
173DAC960P 1/2/3 Wide Fast SCSI-2 Channels
174 Intel i960 RISC Processor
175 2MB/4MB/8MB/16MB/32MB DRAM Memory
176
177For the eXtremeRAID 2000/3000 and AcceleRAID 352/170/160, firmware version
1786.00-01 or above is required.
179
180For the eXtremeRAID 1100, firmware version 5.06-0-52 or above is required.
181
182For the AcceleRAID 250, 200, and 150, firmware version 4.06-0-57 or above is
183required.
184
185For the DAC960PJ and DAC960PG, firmware version 4.06-0-00 or above is required.
186
187For the DAC960PU, DAC960PD, DAC960PL, and DAC960P, either firmware version
1883.51-0-04 or above is required (for dual Flash ROM controllers), or firmware
189version 2.73-0-00 or above is required (for single Flash ROM controllers)
190
191Please note that not all SCSI disk drives are suitable for use with DAC960
192controllers, and only particular firmware versions of any given model may
193actually function correctly. Similarly, not all motherboards have a BIOS that
194properly initializes the AcceleRAID 250, AcceleRAID 200, AcceleRAID 150,
195DAC960PJ, and DAC960PG because the Intel i960RD/RP is a multi-function device.
196If in doubt, contact Mylex RAID Technical Support (mylexsup@us.ibm.com) to
197verify compatibility. Mylex makes available a hard disk compatibility list at
198http://www.mylex.com/support/hdcomp/hd-lists.html.
199
200
201 DRIVER INSTALLATION
202
203This distribution was prepared for Linux kernel version 2.2.19 or 2.4.12.
204
205To install the DAC960 RAID driver, you may use the following commands,
206replacing "/usr/src" with wherever you keep your Linux kernel source tree:
207
208 cd /usr/src
209 tar -xvzf DAC960-2.2.11.tar.gz (or DAC960-2.4.11.tar.gz)
210 mv README.DAC960 linux/Documentation
211 mv DAC960.[ch] linux/drivers/block
212 patch -p0 < DAC960.patch (if DAC960.patch is included)
213 cd linux
214 make config
215 make bzImage (or zImage)
216
217Then install "arch/x86/boot/bzImage" or "arch/x86/boot/zImage" as your
218standard kernel, run lilo if appropriate, and reboot.
219
220To create the necessary devices in /dev, the "make_rd" script included in
221"DAC960-Utilities.tar.gz" from http://www.dandelion.com/Linux/ may be used.
222LILO 21 and FDISK v2.9 include DAC960 support; also included in this archive
223are patches to LILO 20 and FDISK v2.8 that add DAC960 support, along with
224statically linked executables of LILO and FDISK. This modified version of LILO
225will allow booting from a DAC960 controller and/or mounting the root file
226system from a DAC960.
227
228Red Hat Linux 6.0 and SuSE Linux 6.1 include support for Mylex PCI RAID
229controllers. Installing directly onto a DAC960 may be problematic from other
230Linux distributions until their installation utilities are updated.
231
232
233 INSTALLATION NOTES
234
235Before installing Linux or adding DAC960 logical drives to an existing Linux
236system, the controller must first be configured to provide one or more logical
237drives using the BIOS Configuration Utility or DACCF. Please note that since
238there are only at most 6 usable partitions on each logical drive, systems
239requiring more partitions should subdivide a drive group into multiple logical
240drives, each of which can have up to 6 usable partitions. Also, note that with
241large disk arrays it is advisable to enable the 8GB BIOS Geometry (255/63)
242rather than accepting the default 2GB BIOS Geometry (128/32); failing to so do
243will cause the logical drive geometry to have more than 65535 cylinders which
244will make it impossible for FDISK to be used properly. The 8GB BIOS Geometry
245can be enabled by configuring the DAC960 BIOS, which is accessible via Alt-M
246during the BIOS initialization sequence.
247
248For maximum performance and the most efficient E2FSCK performance, it is
249recommended that EXT2 file systems be built with a 4KB block size and 16 block
250stride to match the DAC960 controller's 64KB default stripe size. The command
251"mke2fs -b 4096 -R stride=16 <device>" is appropriate. Unless there will be a
252large number of small files on the file systems, it is also beneficial to add
253the "-i 16384" option to increase the bytes per inode parameter thereby
254reducing the file system metadata. Finally, on systems that will only be run
255with Linux 2.2 or later kernels it is beneficial to enable sparse superblocks
256with the "-s 1" option.
257
258
259 DAC960 ANNOUNCEMENTS MAILING LIST
260
261The DAC960 Announcements Mailing List provides a forum for informing Linux
262users of new driver releases and other announcements regarding Linux support
263for DAC960 PCI RAID Controllers. To join the mailing list, send a message to
264"dac960-announce-request@dandelion.com" with the line "subscribe" in the
265message body.
266
267
268 CONTROLLER CONFIGURATION AND STATUS MONITORING
269
270The DAC960 RAID controllers running firmware 4.06 or above include a Background
271Initialization facility so that system downtime is minimized both for initial
272installation and subsequent configuration of additional storage. The BIOS
273Configuration Utility (accessible via Alt-R during the BIOS initialization
274sequence) is used to quickly configure the controller, and then the logical
275drives that have been created are available for immediate use even while they
276are still being initialized by the controller. The primary need for online
277configuration and status monitoring is then to avoid system downtime when disk
278drives fail and must be replaced. Mylex's online monitoring and configuration
279utilities are being ported to Linux and will become available at some point in
280the future. Note that with a SAF-TE (SCSI Accessed Fault-Tolerant Enclosure)
281enclosure, the controller is able to rebuild failed drives automatically as
282soon as a drive replacement is made available.
283
284The primary interfaces for controller configuration and status monitoring are
285special files created in the /proc/rd/... hierarchy along with the normal
286system console logging mechanism. Whenever the system is operating, the DAC960
287driver queries each controller for status information every 10 seconds, and
288checks for additional conditions every 60 seconds. The initial status of each
289controller is always available for controller N in /proc/rd/cN/initial_status,
290and the current status as of the last status monitoring query is available in
291/proc/rd/cN/current_status. In addition, status changes are also logged by the
292driver to the system console and will appear in the log files maintained by
293syslog. The progress of asynchronous rebuild or consistency check operations
294is also available in /proc/rd/cN/current_status, and progress messages are
295logged to the system console at most every 60 seconds.
296
297Starting with the 2.2.3/2.0.3 versions of the driver, the status information
298available in /proc/rd/cN/initial_status and /proc/rd/cN/current_status has been
299augmented to include the vendor, model, revision, and serial number (if
300available) for each physical device found connected to the controller:
301
302***** DAC960 RAID Driver Version 2.2.3 of 19 August 1999 *****
303Copyright 1998-1999 by Leonard N. Zubkoff <lnz@dandelion.com>
304Configuring Mylex DAC960PRL PCI RAID Controller
305 Firmware Version: 4.07-0-07, Channels: 1, Memory Size: 16MB
306 PCI Bus: 1, Device: 4, Function: 1, I/O Address: Unassigned
307 PCI Address: 0xFE300000 mapped at 0xA0800000, IRQ Channel: 21
308 Controller Queue Depth: 128, Maximum Blocks per Command: 128
309 Driver Queue Depth: 127, Maximum Scatter/Gather Segments: 33
310 Stripe Size: 64KB, Segment Size: 8KB, BIOS Geometry: 255/63
311 SAF-TE Enclosure Management Enabled
312 Physical Devices:
313 0:0 Vendor: IBM Model: DRVS09D Revision: 0270
314 Serial Number: 68016775HA
315 Disk Status: Online, 17928192 blocks
316 0:1 Vendor: IBM Model: DRVS09D Revision: 0270
317 Serial Number: 68004E53HA
318 Disk Status: Online, 17928192 blocks
319 0:2 Vendor: IBM Model: DRVS09D Revision: 0270
320 Serial Number: 13013935HA
321 Disk Status: Online, 17928192 blocks
322 0:3 Vendor: IBM Model: DRVS09D Revision: 0270
323 Serial Number: 13016897HA
324 Disk Status: Online, 17928192 blocks
325 0:4 Vendor: IBM Model: DRVS09D Revision: 0270
326 Serial Number: 68019905HA
327 Disk Status: Online, 17928192 blocks
328 0:5 Vendor: IBM Model: DRVS09D Revision: 0270
329 Serial Number: 68012753HA
330 Disk Status: Online, 17928192 blocks
331 0:6 Vendor: ESG-SHV Model: SCA HSBP M6 Revision: 0.61
332 Logical Drives:
333 /dev/rd/c0d0: RAID-5, Online, 89640960 blocks, Write Thru
334 No Rebuild or Consistency Check in Progress
335
336To simplify the monitoring process for custom software, the special file
337/proc/rd/status returns "OK" when all DAC960 controllers in the system are
338operating normally and no failures have occurred, or "ALERT" if any logical
339drives are offline or critical or any non-standby physical drives are dead.
340
341Configuration commands for controller N are available via the special file
342/proc/rd/cN/user_command. A human readable command can be written to this
343special file to initiate a configuration operation, and the results of the
344operation can then be read back from the special file in addition to being
345logged to the system console. The shell command sequence
346
347 echo "<configuration-command>" > /proc/rd/c0/user_command
348 cat /proc/rd/c0/user_command
349
350is typically used to execute configuration commands. The configuration
351commands are:
352
353 flush-cache
354
355 The "flush-cache" command flushes the controller's cache. The system
356 automatically flushes the cache at shutdown or if the driver module is
357 unloaded, so this command is only needed to be certain a write back cache
358 is flushed to disk before the system is powered off by a command to a UPS.
359 Note that the flush-cache command also stops an asynchronous rebuild or
360 consistency check, so it should not be used except when the system is being
361 halted.
362
363 kill <channel>:<target-id>
364
365 The "kill" command marks the physical drive <channel>:<target-id> as DEAD.
366 This command is provided primarily for testing, and should not be used
367 during normal system operation.
368
369 make-online <channel>:<target-id>
370
371 The "make-online" command changes the physical drive <channel>:<target-id>
372 from status DEAD to status ONLINE. In cases where multiple physical drives
373 have been killed simultaneously, this command may be used to bring all but
374 one of them back online, after which a rebuild to the final drive is
375 necessary.
376
377 Warning: make-online should only be used on a dead physical drive that is
378 an active part of a drive group, never on a standby drive. The command
379 should never be used on a dead drive that is part of a critical logical
380 drive; rebuild should be used if only a single drive is dead.
381
382 make-standby <channel>:<target-id>
383
384 The "make-standby" command changes physical drive <channel>:<target-id>
385 from status DEAD to status STANDBY. It should only be used in cases where
386 a dead drive was replaced after an automatic rebuild was performed onto a
387 standby drive. It cannot be used to add a standby drive to the controller
388 configuration if one was not created initially; the BIOS Configuration
389 Utility must be used for that currently.
390
391 rebuild <channel>:<target-id>
392
393 The "rebuild" command initiates an asynchronous rebuild onto physical drive
394 <channel>:<target-id>. It should only be used when a dead drive has been
395 replaced.
396
397 check-consistency <logical-drive-number>
398
399 The "check-consistency" command initiates an asynchronous consistency check
400 of <logical-drive-number> with automatic restoration. It can be used
401 whenever it is desired to verify the consistency of the redundancy
402 information.
403
404 cancel-rebuild
405 cancel-consistency-check
406
407 The "cancel-rebuild" and "cancel-consistency-check" commands cancel any
408 rebuild or consistency check operations previously initiated.
409
410
411 EXAMPLE I - DRIVE FAILURE WITHOUT A STANDBY DRIVE
412
413The following annotated logs demonstrate the controller configuration and and
414online status monitoring capabilities of the Linux DAC960 Driver. The test
415configuration comprises 6 1GB Quantum Atlas I disk drives on two channels of a
416DAC960PJ controller. The physical drives are configured into a single drive
417group without a standby drive, and the drive group has been configured into two
418logical drives, one RAID-5 and one RAID-6. Note that these logs are from an
419earlier version of the driver and the messages have changed somewhat with newer
420releases, but the functionality remains similar. First, here is the current
421status of the RAID configuration:
422
423gwynedd:/u/lnz# cat /proc/rd/c0/current_status
424***** DAC960 RAID Driver Version 2.0.0 of 23 March 1999 *****
425Copyright 1998-1999 by Leonard N. Zubkoff <lnz@dandelion.com>
426Configuring Mylex DAC960PJ PCI RAID Controller
427 Firmware Version: 4.06-0-08, Channels: 3, Memory Size: 8MB
428 PCI Bus: 0, Device: 19, Function: 1, I/O Address: Unassigned
429 PCI Address: 0xFD4FC000 mapped at 0x8807000, IRQ Channel: 9
430 Controller Queue Depth: 128, Maximum Blocks per Command: 128
431 Driver Queue Depth: 127, Maximum Scatter/Gather Segments: 33
432 Stripe Size: 64KB, Segment Size: 8KB, BIOS Geometry: 255/63
433 Physical Devices:
434 0:1 - Disk: Online, 2201600 blocks
435 0:2 - Disk: Online, 2201600 blocks
436 0:3 - Disk: Online, 2201600 blocks
437 1:1 - Disk: Online, 2201600 blocks
438 1:2 - Disk: Online, 2201600 blocks
439 1:3 - Disk: Online, 2201600 blocks
440 Logical Drives:
441 /dev/rd/c0d0: RAID-5, Online, 5498880 blocks, Write Thru
442 /dev/rd/c0d1: RAID-6, Online, 3305472 blocks, Write Thru
443 No Rebuild or Consistency Check in Progress
444
445gwynedd:/u/lnz# cat /proc/rd/status
446OK
447
448The above messages indicate that everything is healthy, and /proc/rd/status
449returns "OK" indicating that there are no problems with any DAC960 controller
450in the system. For demonstration purposes, while I/O is active Physical Drive
4511:1 is now disconnected, simulating a drive failure. The failure is noted by
452the driver within 10 seconds of the controller's having detected it, and the
453driver logs the following console status messages indicating that Logical
454Drives 0 and 1 are now CRITICAL as a result of Physical Drive 1:1 being DEAD:
455
456DAC960#0: Physical Drive 1:2 Error Log: Sense Key = 6, ASC = 29, ASCQ = 02
457DAC960#0: Physical Drive 1:3 Error Log: Sense Key = 6, ASC = 29, ASCQ = 02
458DAC960#0: Physical Drive 1:1 killed because of timeout on SCSI command
459DAC960#0: Physical Drive 1:1 is now DEAD
460DAC960#0: Logical Drive 0 (/dev/rd/c0d0) is now CRITICAL
461DAC960#0: Logical Drive 1 (/dev/rd/c0d1) is now CRITICAL
462
463The Sense Keys logged here are just Check Condition / Unit Attention conditions
464arising from a SCSI bus reset that is forced by the controller during its error
465recovery procedures. Concurrently with the above, the driver status available
466from /proc/rd also reflects the drive failure. The status message in
467/proc/rd/status has changed from "OK" to "ALERT":
468
469gwynedd:/u/lnz# cat /proc/rd/status
470ALERT
471
472and /proc/rd/c0/current_status has been updated:
473
474gwynedd:/u/lnz# cat /proc/rd/c0/current_status
475 ...
476 Physical Devices:
477 0:1 - Disk: Online, 2201600 blocks
478 0:2 - Disk: Online, 2201600 blocks
479 0:3 - Disk: Online, 2201600 blocks
480 1:1 - Disk: Dead, 2201600 blocks
481 1:2 - Disk: Online, 2201600 blocks
482 1:3 - Disk: Online, 2201600 blocks
483 Logical Drives:
484 /dev/rd/c0d0: RAID-5, Critical, 5498880 blocks, Write Thru
485 /dev/rd/c0d1: RAID-6, Critical, 3305472 blocks, Write Thru
486 No Rebuild or Consistency Check in Progress
487
488Since there are no standby drives configured, the system can continue to access
489the logical drives in a performance degraded mode until the failed drive is
490replaced and a rebuild operation completed to restore the redundancy of the
491logical drives. Once Physical Drive 1:1 is replaced with a properly
492functioning drive, or if the physical drive was killed without having failed
493(e.g., due to electrical problems on the SCSI bus), the user can instruct the
494controller to initiate a rebuild operation onto the newly replaced drive:
495
496gwynedd:/u/lnz# echo "rebuild 1:1" > /proc/rd/c0/user_command
497gwynedd:/u/lnz# cat /proc/rd/c0/user_command
498Rebuild of Physical Drive 1:1 Initiated
499
500The echo command instructs the controller to initiate an asynchronous rebuild
501operation onto Physical Drive 1:1, and the status message that results from the
502operation is then available for reading from /proc/rd/c0/user_command, as well
503as being logged to the console by the driver.
504
505Within 10 seconds of this command the driver logs the initiation of the
506asynchronous rebuild operation:
507
508DAC960#0: Rebuild of Physical Drive 1:1 Initiated
509DAC960#0: Physical Drive 1:1 Error Log: Sense Key = 6, ASC = 29, ASCQ = 01
510DAC960#0: Physical Drive 1:1 is now WRITE-ONLY
511DAC960#0: Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 1% completed
512
513and /proc/rd/c0/current_status is updated:
514
515gwynedd:/u/lnz# cat /proc/rd/c0/current_status
516 ...
517 Physical Devices:
518 0:1 - Disk: Online, 2201600 blocks
519 0:2 - Disk: Online, 2201600 blocks
520 0:3 - Disk: Online, 2201600 blocks
521 1:1 - Disk: Write-Only, 2201600 blocks
522 1:2 - Disk: Online, 2201600 blocks
523 1:3 - Disk: Online, 2201600 blocks
524 Logical Drives:
525 /dev/rd/c0d0: RAID-5, Critical, 5498880 blocks, Write Thru
526 /dev/rd/c0d1: RAID-6, Critical, 3305472 blocks, Write Thru
527 Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 6% completed
528
529As the rebuild progresses, the current status in /proc/rd/c0/current_status is
530updated every 10 seconds:
531
532gwynedd:/u/lnz# cat /proc/rd/c0/current_status
533 ...
534 Physical Devices:
535 0:1 - Disk: Online, 2201600 blocks
536 0:2 - Disk: Online, 2201600 blocks
537 0:3 - Disk: Online, 2201600 blocks
538 1:1 - Disk: Write-Only, 2201600 blocks
539 1:2 - Disk: Online, 2201600 blocks
540 1:3 - Disk: Online, 2201600 blocks
541 Logical Drives:
542 /dev/rd/c0d0: RAID-5, Critical, 5498880 blocks, Write Thru
543 /dev/rd/c0d1: RAID-6, Critical, 3305472 blocks, Write Thru
544 Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 15% completed
545
546and every minute a progress message is logged to the console by the driver:
547
548DAC960#0: Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 32% completed
549DAC960#0: Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 63% completed
550DAC960#0: Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 94% completed
551DAC960#0: Rebuild in Progress: Logical Drive 1 (/dev/rd/c0d1) 94% completed
552
553Finally, the rebuild completes successfully. The driver logs the status of the
554logical and physical drives and the rebuild completion:
555
556DAC960#0: Rebuild Completed Successfully
557DAC960#0: Physical Drive 1:1 is now ONLINE
558DAC960#0: Logical Drive 0 (/dev/rd/c0d0) is now ONLINE
559DAC960#0: Logical Drive 1 (/dev/rd/c0d1) is now ONLINE
560
561/proc/rd/c0/current_status is updated:
562
563gwynedd:/u/lnz# cat /proc/rd/c0/current_status
564 ...
565 Physical Devices:
566 0:1 - Disk: Online, 2201600 blocks
567 0:2 - Disk: Online, 2201600 blocks
568 0:3 - Disk: Online, 2201600 blocks
569 1:1 - Disk: Online, 2201600 blocks
570 1:2 - Disk: Online, 2201600 blocks
571 1:3 - Disk: Online, 2201600 blocks
572 Logical Drives:
573 /dev/rd/c0d0: RAID-5, Online, 5498880 blocks, Write Thru
574 /dev/rd/c0d1: RAID-6, Online, 3305472 blocks, Write Thru
575 Rebuild Completed Successfully
576
577and /proc/rd/status indicates that everything is healthy once again:
578
579gwynedd:/u/lnz# cat /proc/rd/status
580OK
581
582
583 EXAMPLE II - DRIVE FAILURE WITH A STANDBY DRIVE
584
585The following annotated logs demonstrate the controller configuration and and
586online status monitoring capabilities of the Linux DAC960 Driver. The test
587configuration comprises 6 1GB Quantum Atlas I disk drives on two channels of a
588DAC960PJ controller. The physical drives are configured into a single drive
589group with a standby drive, and the drive group has been configured into two
590logical drives, one RAID-5 and one RAID-6. Note that these logs are from an
591earlier version of the driver and the messages have changed somewhat with newer
592releases, but the functionality remains similar. First, here is the current
593status of the RAID configuration:
594
595gwynedd:/u/lnz# cat /proc/rd/c0/current_status
596***** DAC960 RAID Driver Version 2.0.0 of 23 March 1999 *****
597Copyright 1998-1999 by Leonard N. Zubkoff <lnz@dandelion.com>
598Configuring Mylex DAC960PJ PCI RAID Controller
599 Firmware Version: 4.06-0-08, Channels: 3, Memory Size: 8MB
600 PCI Bus: 0, Device: 19, Function: 1, I/O Address: Unassigned
601 PCI Address: 0xFD4FC000 mapped at 0x8807000, IRQ Channel: 9
602 Controller Queue Depth: 128, Maximum Blocks per Command: 128
603 Driver Queue Depth: 127, Maximum Scatter/Gather Segments: 33
604 Stripe Size: 64KB, Segment Size: 8KB, BIOS Geometry: 255/63
605 Physical Devices:
606 0:1 - Disk: Online, 2201600 blocks
607 0:2 - Disk: Online, 2201600 blocks
608 0:3 - Disk: Online, 2201600 blocks
609 1:1 - Disk: Online, 2201600 blocks
610 1:2 - Disk: Online, 2201600 blocks
611 1:3 - Disk: Standby, 2201600 blocks
612 Logical Drives:
613 /dev/rd/c0d0: RAID-5, Online, 4399104 blocks, Write Thru
614 /dev/rd/c0d1: RAID-6, Online, 2754560 blocks, Write Thru
615 No Rebuild or Consistency Check in Progress
616
617gwynedd:/u/lnz# cat /proc/rd/status
618OK
619
620The above messages indicate that everything is healthy, and /proc/rd/status
621returns "OK" indicating that there are no problems with any DAC960 controller
622in the system. For demonstration purposes, while I/O is active Physical Drive
6231:2 is now disconnected, simulating a drive failure. The failure is noted by
624the driver within 10 seconds of the controller's having detected it, and the
625driver logs the following console status messages:
626
627DAC960#0: Physical Drive 1:1 Error Log: Sense Key = 6, ASC = 29, ASCQ = 02
628DAC960#0: Physical Drive 1:3 Error Log: Sense Key = 6, ASC = 29, ASCQ = 02
629DAC960#0: Physical Drive 1:2 killed because of timeout on SCSI command
630DAC960#0: Physical Drive 1:2 is now DEAD
631DAC960#0: Physical Drive 1:2 killed because it was removed
632DAC960#0: Logical Drive 0 (/dev/rd/c0d0) is now CRITICAL
633DAC960#0: Logical Drive 1 (/dev/rd/c0d1) is now CRITICAL
634
635Since a standby drive is configured, the controller automatically begins
636rebuilding onto the standby drive:
637
638DAC960#0: Physical Drive 1:3 is now WRITE-ONLY
639DAC960#0: Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 4% completed
640
641Concurrently with the above, the driver status available from /proc/rd also
642reflects the drive failure and automatic rebuild. The status message in
643/proc/rd/status has changed from "OK" to "ALERT":
644
645gwynedd:/u/lnz# cat /proc/rd/status
646ALERT
647
648and /proc/rd/c0/current_status has been updated:
649
650gwynedd:/u/lnz# cat /proc/rd/c0/current_status
651 ...
652 Physical Devices:
653 0:1 - Disk: Online, 2201600 blocks
654 0:2 - Disk: Online, 2201600 blocks
655 0:3 - Disk: Online, 2201600 blocks
656 1:1 - Disk: Online, 2201600 blocks
657 1:2 - Disk: Dead, 2201600 blocks
658 1:3 - Disk: Write-Only, 2201600 blocks
659 Logical Drives:
660 /dev/rd/c0d0: RAID-5, Critical, 4399104 blocks, Write Thru
661 /dev/rd/c0d1: RAID-6, Critical, 2754560 blocks, Write Thru
662 Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 4% completed
663
664As the rebuild progresses, the current status in /proc/rd/c0/current_status is
665updated every 10 seconds:
666
667gwynedd:/u/lnz# cat /proc/rd/c0/current_status
668 ...
669 Physical Devices:
670 0:1 - Disk: Online, 2201600 blocks
671 0:2 - Disk: Online, 2201600 blocks
672 0:3 - Disk: Online, 2201600 blocks
673 1:1 - Disk: Online, 2201600 blocks
674 1:2 - Disk: Dead, 2201600 blocks
675 1:3 - Disk: Write-Only, 2201600 blocks
676 Logical Drives:
677 /dev/rd/c0d0: RAID-5, Critical, 4399104 blocks, Write Thru
678 /dev/rd/c0d1: RAID-6, Critical, 2754560 blocks, Write Thru
679 Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 40% completed
680
681and every minute a progress message is logged on the console by the driver:
682
683DAC960#0: Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 40% completed
684DAC960#0: Rebuild in Progress: Logical Drive 0 (/dev/rd/c0d0) 76% completed
685DAC960#0: Rebuild in Progress: Logical Drive 1 (/dev/rd/c0d1) 66% completed
686DAC960#0: Rebuild in Progress: Logical Drive 1 (/dev/rd/c0d1) 84% completed
687
688Finally, the rebuild completes successfully. The driver logs the status of the
689logical and physical drives and the rebuild completion:
690
691DAC960#0: Rebuild Completed Successfully
692DAC960#0: Physical Drive 1:3 is now ONLINE
693DAC960#0: Logical Drive 0 (/dev/rd/c0d0) is now ONLINE
694DAC960#0: Logical Drive 1 (/dev/rd/c0d1) is now ONLINE
695
696/proc/rd/c0/current_status is updated:
697
698***** DAC960 RAID Driver Version 2.0.0 of 23 March 1999 *****
699Copyright 1998-1999 by Leonard N. Zubkoff <lnz@dandelion.com>
700Configuring Mylex DAC960PJ PCI RAID Controller
701 Firmware Version: 4.06-0-08, Channels: 3, Memory Size: 8MB
702 PCI Bus: 0, Device: 19, Function: 1, I/O Address: Unassigned
703 PCI Address: 0xFD4FC000 mapped at 0x8807000, IRQ Channel: 9
704 Controller Queue Depth: 128, Maximum Blocks per Command: 128
705 Driver Queue Depth: 127, Maximum Scatter/Gather Segments: 33
706 Stripe Size: 64KB, Segment Size: 8KB, BIOS Geometry: 255/63
707 Physical Devices:
708 0:1 - Disk: Online, 2201600 blocks
709 0:2 - Disk: Online, 2201600 blocks
710 0:3 - Disk: Online, 2201600 blocks
711 1:1 - Disk: Online, 2201600 blocks
712 1:2 - Disk: Dead, 2201600 blocks
713 1:3 - Disk: Online, 2201600 blocks
714 Logical Drives:
715 /dev/rd/c0d0: RAID-5, Online, 4399104 blocks, Write Thru
716 /dev/rd/c0d1: RAID-6, Online, 2754560 blocks, Write Thru
717 Rebuild Completed Successfully
718
719and /proc/rd/status indicates that everything is healthy once again:
720
721gwynedd:/u/lnz# cat /proc/rd/status
722OK
723
724Note that the absence of a viable standby drive does not create an "ALERT"
725status. Once dead Physical Drive 1:2 has been replaced, the controller must be
726told that this has occurred and that the newly replaced drive should become the
727new standby drive:
728
729gwynedd:/u/lnz# echo "make-standby 1:2" > /proc/rd/c0/user_command
730gwynedd:/u/lnz# cat /proc/rd/c0/user_command
731Make Standby of Physical Drive 1:2 Succeeded
732
733The echo command instructs the controller to make Physical Drive 1:2 into a
734standby drive, and the status message that results from the operation is then
735available for reading from /proc/rd/c0/user_command, as well as being logged to
736the console by the driver. Within 60 seconds of this command the driver logs:
737
738DAC960#0: Physical Drive 1:2 Error Log: Sense Key = 6, ASC = 29, ASCQ = 01
739DAC960#0: Physical Drive 1:2 is now STANDBY
740DAC960#0: Make Standby of Physical Drive 1:2 Succeeded
741
742and /proc/rd/c0/current_status is updated:
743
744gwynedd:/u/lnz# cat /proc/rd/c0/current_status
745 ...
746 Physical Devices:
747 0:1 - Disk: Online, 2201600 blocks
748 0:2 - Disk: Online, 2201600 blocks
749 0:3 - Disk: Online, 2201600 blocks
750 1:1 - Disk: Online, 2201600 blocks
751 1:2 - Disk: Standby, 2201600 blocks
752 1:3 - Disk: Online, 2201600 blocks
753 Logical Drives:
754 /dev/rd/c0d0: RAID-5, Online, 4399104 blocks, Write Thru
755 /dev/rd/c0d1: RAID-6, Online, 2754560 blocks, Write Thru
756 Rebuild Completed Successfully
Documentation/blockdev/zram.txt+1−1
@@ -190,7 +190,7 @@ whitespace: · 189 unmodified lines
190 notify_free Depending on device usage scenario it may account190 notify_free Depending on device usage scenario it may account
191 a) the number of pages freed because of swap slot free191 a) the number of pages freed because of swap slot free
192 notifications or b) the number of pages freed because of192 notifications or b) the number of pages freed because of
193 REQ_DISCARD requests sent by bio. The former ones are193 REQ_OP_DISCARD requests sent by bio. The former ones are
194 sent to a swap block device when a swap slot is freed,194 sent to a swap block device when a swap slot is freed,
195 which implies that this disk is being used as a swap disk.195 which implies that this disk is being used as a swap disk.
196 The latter ones are sent by filesystem mounted with196 The latter ones are sent by filesystem mounted with
Documentation/cdrom/00-INDEX+0−11
@@ -1,11 +0,0 @@
100-INDEX
2 - this file (info on CD-ROMs and Linux)
3Makefile
4 - only used to generate TeX output from the documentation.
5cdrom-standard.tex
6 - LaTeX document on standardizing the CD-ROM programming interface.
7ide-cd
8 - info on setting up and using ATAPI (aka IDE) CD-ROMs.
9packet-writing.txt
10 - Info on the CDRW packet writing module
11
Documentation/cgroup-v1/00-INDEX+0−26
@@ -1,26 +0,0 @@
100-INDEX
2 - this file
3blkio-controller.txt
4 - Description for Block IO Controller, implementation and usage details.
5cgroups.txt
6 - Control Groups definition, implementation details, examples and API.
7cpuacct.txt
8 - CPU Accounting Controller; account CPU usage for groups of tasks.
9cpusets.txt
10 - documents the cpusets feature; assign CPUs and Mem to a set of tasks.
11admin-guide/devices.rst
12 - Device Whitelist Controller; description, interface and security.
13freezer-subsystem.txt
14 - checkpointing; rationale to not use signals, interface.
15hugetlb.txt
16 - HugeTLB Controller implementation and usage details.
17memcg_test.txt
18 - Memory Resource Controller; implementation details.
19memory.txt
20 - Memory Resource Controller; design, accounting, interface, testing.
21net_cls.txt
22 - Network classifier cgroups details and usages.
23net_prio.txt
24 - Network priority cgroups details and usages.
25pids.txt
26 - Process number cgroups details and usages.
Documentation/cgroup-v1/rdma.txt+1−1
@@ -27,7 +27,7 @@ cgroup. · 26 unmodified lines
27Currently user space applications can easily take away all the rdma verb27Currently user space applications can easily take away all the rdma verb
28specific resources such as AH, CQ, QP, MR etc. Due to which other applications28specific resources such as AH, CQ, QP, MR etc. Due to which other applications
29in other cgroup or kernel space ULPs may not even get chance to allocate any29in other cgroup or kernel space ULPs may not even get chance to allocate any
30rdma resources. This can leads to service unavailability.30rdma resources. This can lead to service unavailability.
31 31
32Therefore RDMA controller is needed through which resource consumption32Therefore RDMA controller is needed through which resource consumption
33of processes can be limited. Through this controller different rdma33of processes can be limited. Through this controller different rdma
Documentation/conf.py+7−3
@@ -259,7 +259,7 @@ latex_elements = { · 258 unmodified lines
259'papersize': 'a4paper',259'papersize': 'a4paper',
260 260
261# The font size ('10pt', '11pt' or '12pt').261# The font size ('10pt', '11pt' or '12pt').
262'pointsize': '8pt',262'pointsize': '11pt',
263 263
264# Latex figure (float) alignment264# Latex figure (float) alignment
265#'figure_align': 'htbp',265#'figure_align': 'htbp',
@@ -272,8 +272,8 @@ latex_elements = { · 6 unmodified lines
272 'preamble': '''272 'preamble': '''
273 % Use some font with UTF-8 support with XeLaTeX273 % Use some font with UTF-8 support with XeLaTeX
274 \\usepackage{fontspec}274 \\usepackage{fontspec}
275 \\setsansfont{DejaVu Serif}275 \\setsansfont{DejaVu Sans}
276 \\setromanfont{DejaVu Sans}276 \\setromanfont{DejaVu Serif}
277 \\setmonofont{DejaVu Sans Mono}277 \\setmonofont{DejaVu Sans Mono}
278 278
279 '''279 '''
@@ -383,6 +383,10 @@ latex_documents = [ · 103 unmodified lines
383 'The kernel development community', 'manual'),383 'The kernel development community', 'manual'),
384 ('filesystems/index', 'filesystems.tex', 'Linux Filesystems API',384 ('filesystems/index', 'filesystems.tex', 'Linux Filesystems API',
385 'The kernel development community', 'manual'),385 'The kernel development community', 'manual'),
386 ('admin-guide/ext4', 'ext4-admin-guide.tex', 'ext4 Administration Guide',
387 'ext4 Community', 'manual'),
388 ('filesystems/ext4/index', 'ext4-data-structures.tex',
389 'ext4 Data Structures and Algorithms', 'ext4 Community', 'manual'),
386 ('gpu/index', 'gpu.tex', 'Linux GPU Driver Developer\'s Guide',390 ('gpu/index', 'gpu.tex', 'Linux GPU Driver Developer\'s Guide',
387 'The kernel development community', 'manual'),391 'The kernel development community', 'manual'),
388 ('input/index', 'linux-input.tex', 'The Linux input driver subsystem',392 ('input/index', 'linux-input.tex', 'The Linux input driver subsystem',
Documentation/core-api/boot-time-mm.rst+10−61
@@ -5,54 +5,23 @@ Boot time memory management · 4 unmodified lines
5Early system initialization cannot use "normal" memory management5Early system initialization cannot use "normal" memory management
6simply because it is not set up yet. But there is still need to6simply because it is not set up yet. But there is still need to
7allocate memory for various data structures, for instance for the7allocate memory for various data structures, for instance for the
8physical page allocator. To address this, a specialized allocator8physical page allocator.
9called the :ref:`Boot Memory Allocator <bootmem>`, or bootmem, was
10introduced. Several years later PowerPC developers added a "Logical
11Memory Blocks" allocator, which was later adopted by other
12architectures and renamed to :ref:`memblock <memblock>`. There is also
13a compatibility layer called `nobootmem` that translates bootmem
14allocation interfaces to memblock calls.
15 9
16The selection of the early allocator is done using10A specialized allocator called ``memblock`` performs the
17``CONFIG_NO_BOOTMEM`` and ``CONFIG_HAVE_MEMBLOCK`` kernel11boot time memory management. The architecture specific initialization
18configuration options. These options are enabled or disabled12must set it up in :c:func:`setup_arch` and tear it down in
19statically by the architectures' Kconfig files.13:c:func:`mem_init` functions.
20
21* Architectures that rely only on bootmem select
22 ``CONFIG_NO_BOOTMEM=n && CONFIG_HAVE_MEMBLOCK=n``.
23* The users of memblock with the nobootmem compatibility layer set
24 ``CONFIG_NO_BOOTMEM=y && CONFIG_HAVE_MEMBLOCK=y``.
25* And for those that use both memblock and bootmem the configuration
26 includes ``CONFIG_NO_BOOTMEM=n && CONFIG_HAVE_MEMBLOCK=y``.
27
28Whichever allocator is used, it is the responsibility of the
29architecture specific initialization to set it up in
30:c:func:`setup_arch` and tear it down in :c:func:`mem_init` functions.
31 14
32Once the early memory management is available it offers a variety of15Once the early memory management is available it offers a variety of
33functions and macros for memory allocations. The allocation request16functions and macros for memory allocations. The allocation request
34may be directed to the first (and probably the only) node or to a17may be directed to the first (and probably the only) node or to a
35particular node in a NUMA system. There are API variants that panic18particular node in a NUMA system. There are API variants that panic
36when an allocation fails and those that don't. And more recent and19when an allocation fails and those that don't.
37advanced memblock even allows controlling its own behaviour.
38
39.. _bootmem:
40
41Bootmem
42=======
43
44(mostly stolen from Mel Gorman's "Understanding the Linux Virtual
45Memory Manager" `book`_)
46
47.. _book: https://www.kernel.org/doc/gorman/
48
49.. kernel-doc:: mm/bootmem.c
50 :doc: bootmem overview
51 20
52.. _memblock:21Memblock also offers a variety of APIs that control its own behaviour.
53 22
54Memblock23Memblock Overview
55========24=================
56 25
57.. kernel-doc:: mm/memblock.c26.. kernel-doc:: mm/memblock.c
58 :doc: memblock overview27 :doc: memblock overview
@@ -61,26 +30,6 @@ Memblock · 2 unmodified lines
61Functions and structures30Functions and structures
62========================31========================
63 32
64Common API
65----------
66
67The functions that are described in this section are available
68regardless of what early memory manager is enabled.
69
70.. kernel-doc:: mm/nobootmem.c
71
72Bootmem specific API
73--------------------
74
75These interfaces available only with bootmem, i.e when ``CONFIG_NO_BOOTMEM=n``
76
77.. kernel-doc:: include/linux/bootmem.h
78.. kernel-doc:: mm/bootmem.c
79 :nodocs:
80
81Memblock specific API
82---------------------
83
84Here is the description of memblock data structures, functions and33Here is the description of memblock data structures, functions and
85macros. Some of them are actually internal, but since they are34macros. Some of them are actually internal, but since they are
86documented it would be silly to omit them. Besides, reading the35documented it would be silly to omit them. Besides, reading the
@@ -89,4 +38,4 @@ really happens under the hood. · 2 unmodified lines
89 38
90.. kernel-doc:: include/linux/memblock.h39.. kernel-doc:: include/linux/memblock.h
91.. kernel-doc:: mm/memblock.c40.. kernel-doc:: mm/memblock.c
92 :nodocs:41 :functions:
Documentation/core-api/gfp_mask-from-fs-io.rst+2−0
@@ -1,3 +1,5 @@
1.. _gfp_mask_from_fs_io:
2
1=================================3=================================
2GFP masks used from FS/IO context4GFP masks used from FS/IO context
3=================================5=================================
Documentation/core-api/idr.rst+1−1
@@ -1,4 +1,4 @@
1.. SPDX-License-Identifier: CC-BY-SA-4.01.. SPDX-License-Identifier: GPL-2.0+
2 2
3=============3=============
4ID Allocation4ID Allocation
Documentation/core-api/index.rst+4−0
@@ -21,16 +21,20 @@ Core utilities · 20 unmodified lines
21 local_ops21 local_ops
22 workqueue22 workqueue
23 genericirq23 genericirq
24 xarray
24 flexible-arrays25 flexible-arrays
25 librs26 librs
26 genalloc27 genalloc
27 errseq28 errseq
28 printk-formats29 printk-formats
29 circular-buffers30 circular-buffers
31 memory-allocation
30 mm-api32 mm-api
31 gfp_mask-from-fs-io33 gfp_mask-from-fs-io
32 timekeeping34 timekeeping
33 boot-time-mm35 boot-time-mm
36 memory-hotplug
37
34 38
35Interfaces for kernel debugging39Interfaces for kernel debugging
36===============================40===============================
Documentation/core-api/memory-allocation.rst+122−0
@@ -0,0 +1,122 @@
1=======================
2Memory Allocation Guide
3=======================
4
5Linux provides a variety of APIs for memory allocation. You can
6allocate small chunks using `kmalloc` or `kmem_cache_alloc` families,
7large virtually contiguous areas using `vmalloc` and its derivatives,
8or you can directly request pages from the page allocator with
9`alloc_pages`. It is also possible to use more specialized allocators,
10for instance `cma_alloc` or `zs_malloc`.
11
12Most of the memory allocation APIs use GFP flags to express how that
13memory should be allocated. The GFP acronym stands for "get free
14pages", the underlying memory allocation function.
15
16Diversity of the allocation APIs combined with the numerous GFP flags
17makes the question "How should I allocate memory?" not that easy to
18answer, although very likely you should use
19
20::
21
22 kzalloc(<size>, GFP_KERNEL);
23
24Of course there are cases when other allocation APIs and different GFP
25flags must be used.
26
27Get Free Page flags
28===================
29
30The GFP flags control the allocators behavior. They tell what memory
31zones can be used, how hard the allocator should try to find free
32memory, whether the memory can be accessed by the userspace etc. The
33:ref:`Documentation/core-api/mm-api.rst <mm-api-gfp-flags>` provides
34reference documentation for the GFP flags and their combinations and
35here we briefly outline their recommended usage:
36
37 * Most of the time ``GFP_KERNEL`` is what you need. Memory for the
38 kernel data structures, DMAable memory, inode cache, all these and
39 many other allocations types can use ``GFP_KERNEL``. Note, that
40 using ``GFP_KERNEL`` implies ``GFP_RECLAIM``, which means that
41 direct reclaim may be triggered under memory pressure; the calling
42 context must be allowed to sleep.
43 * If the allocation is performed from an atomic context, e.g interrupt
44 handler, use ``GFP_NOWAIT``. This flag prevents direct reclaim and
45 IO or filesystem operations. Consequently, under memory pressure
46 ``GFP_NOWAIT`` allocation is likely to fail. Allocations which
47 have a reasonable fallback should be using ``GFP_NOWARN``.
48 * If you think that accessing memory reserves is justified and the kernel
49 will be stressed unless allocation succeeds, you may use ``GFP_ATOMIC``.
50 * Untrusted allocations triggered from userspace should be a subject
51 of kmem accounting and must have ``__GFP_ACCOUNT`` bit set. There
52 is the handy ``GFP_KERNEL_ACCOUNT`` shortcut for ``GFP_KERNEL``
53 allocations that should be accounted.
54 * Userspace allocations should use either of the ``GFP_USER``,
55 ``GFP_HIGHUSER`` or ``GFP_HIGHUSER_MOVABLE`` flags. The longer
56 the flag name the less restrictive it is.
57
58 ``GFP_HIGHUSER_MOVABLE`` does not require that allocated memory
59 will be directly accessible by the kernel and implies that the
60 data is movable.
61
62 ``GFP_HIGHUSER`` means that the allocated memory is not movable,
63 but it is not required to be directly accessible by the kernel. An
64 example may be a hardware allocation that maps data directly into
65 userspace but has no addressing limitations.
66
67 ``GFP_USER`` means that the allocated memory is not movable and it
68 must be directly accessible by the kernel.
69
70You may notice that quite a few allocations in the existing code
71specify ``GFP_NOIO`` or ``GFP_NOFS``. Historically, they were used to
72prevent recursion deadlocks caused by direct memory reclaim calling
73back into the FS or IO paths and blocking on already held
74resources. Since 4.12 the preferred way to address this issue is to
75use new scope APIs described in
76:ref:`Documentation/core-api/gfp_mask-from-fs-io.rst <gfp_mask_from_fs_io>`.
77
78Other legacy GFP flags are ``GFP_DMA`` and ``GFP_DMA32``. They are
79used to ensure that the allocated memory is accessible by hardware
80with limited addressing capabilities. So unless you are writing a
81driver for a device with such restrictions, avoid using these flags.
82And even with hardware with restrictions it is preferable to use
83`dma_alloc*` APIs.
84
85Selecting memory allocator
86==========================
87
88The most straightforward way to allocate memory is to use a function
89from the :c:func:`kmalloc` family. And, to be on the safe size it's
90best to use routines that set memory to zero, like
91:c:func:`kzalloc`. If you need to allocate memory for an array, there
92are :c:func:`kmalloc_array` and :c:func:`kcalloc` helpers.
93
94The maximal size of a chunk that can be allocated with `kmalloc` is
95limited. The actual limit depends on the hardware and the kernel
96configuration, but it is a good practice to use `kmalloc` for objects
97smaller than page size.
98
99For large allocations you can use :c:func:`vmalloc` and
100:c:func:`vzalloc`, or directly request pages from the page
101allocator. The memory allocated by `vmalloc` and related functions is
102not physically contiguous.
103
104If you are not sure whether the allocation size is too large for
105`kmalloc`, it is possible to use :c:func:`kvmalloc` and its
106derivatives. It will try to allocate memory with `kmalloc` and if the
107allocation fails it will be retried with `vmalloc`. There are
108restrictions on which GFP flags can be used with `kvmalloc`; please
109see :c:func:`kvmalloc_node` reference documentation. Note that
110`kvmalloc` may return memory that is not physically contiguous.
111
112If you need to allocate many identical objects you can use the slab
113cache allocator. The cache should be set up with
114:c:func:`kmem_cache_create` before it can be used. Afterwards
115:c:func:`kmem_cache_alloc` and its convenience wrappers can allocate
116memory from that cache.
117
118When the allocated memory is no longer needed it must be freed. You
119can use :c:func:`kvfree` for the memory allocated with `kmalloc`,
120`vmalloc` and `kvmalloc`. The slab caches should be freed with
121:c:func:`kmem_cache_free`. And don't forget to destroy the cache with
122:c:func:`kmem_cache_destroy`.
Documentation/core-api/memory-hotplug.rst+125−0
@@ -0,0 +1,125 @@
1.. _memory_hotplug:
2
3==============
4Memory hotplug
5==============
6
7Memory hotplug event notifier
8=============================
9
10Hotplugging events are sent to a notification queue.
11
12There are six types of notification defined in ``include/linux/memory.h``:
13
14MEM_GOING_ONLINE
15 Generated before new memory becomes available in order to be able to
16 prepare subsystems to handle memory. The page allocator is still unable
17 to allocate from the new memory.
18
19MEM_CANCEL_ONLINE
20 Generated if MEM_GOING_ONLINE fails.
21
22MEM_ONLINE
23 Generated when memory has successfully brought online. The callback may
24 allocate pages from the new memory.
25
26MEM_GOING_OFFLINE
27 Generated to begin the process of offlining memory. Allocations are no
28 longer possible from the memory but some of the memory to be offlined
29 is still in use. The callback can be used to free memory known to a
30 subsystem from the indicated memory block.
31
32MEM_CANCEL_OFFLINE
33 Generated if MEM_GOING_OFFLINE fails. Memory is available again from
34 the memory block that we attempted to offline.
35
36MEM_OFFLINE
37 Generated after offlining memory is complete.
38
39A callback routine can be registered by calling::
40
41 hotplug_memory_notifier(callback_func, priority)
42
43Callback functions with higher values of priority are called before callback
44functions with lower values.
45
46A callback function must have the following prototype::
47
48 int callback_func(
49 struct notifier_block *self, unsigned long action, void *arg);
50
51The first argument of the callback function (self) is a pointer to the block
52of the notifier chain that points to the callback function itself.
53The second argument (action) is one of the event types described above.
54The third argument (arg) passes a pointer of struct memory_notify::
55
56 struct memory_notify {
57 unsigned long start_pfn;
58 unsigned long nr_pages;
59 int status_change_nid_normal;
60 int status_change_nid_high;
61 int status_change_nid;
62 }
63
64- start_pfn is start_pfn of online/offline memory.
65- nr_pages is # of pages of online/offline memory.
66- status_change_nid_normal is set node id when N_NORMAL_MEMORY of nodemask
67 is (will be) set/clear, if this is -1, then nodemask status is not changed.
68- status_change_nid_high is set node id when N_HIGH_MEMORY of nodemask
69 is (will be) set/clear, if this is -1, then nodemask status is not changed.
70- status_change_nid is set node id when N_MEMORY of nodemask is (will be)
71 set/clear. It means a new(memoryless) node gets new memory by online and a
72 node loses all memory. If this is -1, then nodemask status is not changed.
73
74 If status_changed_nid* >= 0, callback should create/discard structures for the
75 node if necessary.
76
77The callback routine shall return one of the values
78NOTIFY_DONE, NOTIFY_OK, NOTIFY_BAD, NOTIFY_STOP
79defined in ``include/linux/notifier.h``
80
81NOTIFY_DONE and NOTIFY_OK have no effect on the further processing.
82
83NOTIFY_BAD is used as response to the MEM_GOING_ONLINE, MEM_GOING_OFFLINE,
84MEM_ONLINE, or MEM_OFFLINE action to cancel hotplugging. It stops
85further processing of the notification queue.
86
87NOTIFY_STOP stops further processing of the notification queue.
88
89Locking Internals
90=================
91
92When adding/removing memory that uses memory block devices (i.e. ordinary RAM),
93the device_hotplug_lock should be held to:
94
95- synchronize against online/offline requests (e.g. via sysfs). This way, memory
96 block devices can only be accessed (.online/.state attributes) by user
97 space once memory has been fully added. And when removing memory, we
98 know nobody is in critical sections.
99- synchronize against CPU hotplug and similar (e.g. relevant for ACPI and PPC)
100
101Especially, there is a possible lock inversion that is avoided using
102device_hotplug_lock when adding memory and user space tries to online that
103memory faster than expected:
104
105- device_online() will first take the device_lock(), followed by
106 mem_hotplug_lock
107- add_memory_resource() will first take the mem_hotplug_lock, followed by
108 the device_lock() (while creating the devices, during bus_add_device()).
109
110As the device is visible to user space before taking the device_lock(), this
111can result in a lock inversion.
112
113onlining/offlining of memory should be done via device_online()/
114device_offline() - to make sure it is properly synchronized to actions
115via sysfs. Holding device_hotplug_lock is advised (to e.g. protect online_type)
116
117When adding/removing/onlining/offlining memory or adding/removing
118heterogeneous/device memory, we should always hold the mem_hotplug_lock in
119write mode to serialise memory hotplug (e.g. access to global/zone
120variables).
121
122In addition, mem_hotplug_lock (in contrast to device_hotplug_lock) in read
123mode allows for a quite efficient get_online_mems/put_online_mems
124implementation, so code accessing memory can protect from that memory
125vanishing.
Documentation/core-api/mm-api.rst+2−0
@@ -14,6 +14,8 @@ User Space Memory Access · 13 unmodified lines
14.. kernel-doc:: mm/util.c14.. kernel-doc:: mm/util.c
15 :functions: get_user_pages_fast15 :functions: get_user_pages_fast
16 16
17.. _mm-api-gfp-flags:
18
17Memory Allocation Controls19Memory Allocation Controls
18==========================20==========================
19 21
Documentation/core-api/printk-formats.rst+5−6
@@ -376,15 +376,15 @@ correctness of the format string and va_list arguments. · 375 unmodified lines
376 376
377Passed by reference.377Passed by reference.
378 378
379kobjects379Device tree nodes
380--------380-----------------
381 381
382::382::
383 383
384 %pOF[fnpPcCF]384 %pOF[fnpPcCF]
385 385
386 386
387For printing kobject based structs (device nodes). Default behaviour is387For printing device tree node structures. Default behaviour is
388equivalent to %pOFf.388equivalent to %pOFf.
389 389
390 - f - device node full_name390 - f - device node full_name
@@ -420,9 +420,8 @@ struct clk · 29 unmodified lines
420 %pC pll1420 %pC pll1
421 %pCn pll1421 %pCn pll1
422 422
423For printing struct clk structures. %pC and %pCn print the name423For printing struct clk structures. %pC and %pCn print the name of the clock
424(Common Clock Framework) or address (legacy clock framework) of the424(Common Clock Framework) or a unique 32-bit ID (legacy clock framework).
425structure.
426 425
427Passed by reference.426Passed by reference.
428 427
Documentation/core-api/xarray.rst+435−0
@@ -0,0 +1,435 @@
1.. SPDX-License-Identifier: GPL-2.0+
2
3======
4XArray
5======
6
7:Author: Matthew Wilcox
8
9Overview
10========
11
12The XArray is an abstract data type which behaves like a very large array
13of pointers. It meets many of the same needs as a hash or a conventional
14resizable array. Unlike a hash, it allows you to sensibly go to the
15next or previous entry in a cache-efficient manner. In contrast to a
16resizable array, there is no need to copy data or change MMU mappings in
17order to grow the array. It is more memory-efficient, parallelisable
18and cache friendly than a doubly-linked list. It takes advantage of
19RCU to perform lookups without locking.
20
21The XArray implementation is efficient when the indices used are densely
22clustered; hashing the object and using the hash as the index will not
23perform well. The XArray is optimised for small indices, but still has
24good performance with large indices. If your index can be larger than
25``ULONG_MAX`` then the XArray is not the data type for you. The most
26important user of the XArray is the page cache.
27
28Each non-``NULL`` entry in the array has three bits associated with
29it called marks. Each mark may be set or cleared independently of
30the others. You can iterate over entries which are marked.
31
32Normal pointers may be stored in the XArray directly. They must be 4-byte
33aligned, which is true for any pointer returned from :c:func:`kmalloc` and
34:c:func:`alloc_page`. It isn't true for arbitrary user-space pointers,
35nor for function pointers. You can store pointers to statically allocated
36objects, as long as those objects have an alignment of at least 4.
37
38You can also store integers between 0 and ``LONG_MAX`` in the XArray.
39You must first convert it into an entry using :c:func:`xa_mk_value`.
40When you retrieve an entry from the XArray, you can check whether it is
41a value entry by calling :c:func:`xa_is_value`, and convert it back to
42an integer by calling :c:func:`xa_to_value`.
43
44Some users want to store tagged pointers instead of using the marks
45described above. They can call :c:func:`xa_tag_pointer` to create an
46entry with a tag, :c:func:`xa_untag_pointer` to turn a tagged entry
47back into an untagged pointer and :c:func:`xa_pointer_tag` to retrieve
48the tag of an entry. Tagged pointers use the same bits that are used
49to distinguish value entries from normal pointers, so each user must
50decide whether they want to store value entries or tagged pointers in
51any particular XArray.
52
53The XArray does not support storing :c:func:`IS_ERR` pointers as some
54conflict with value entries or internal entries.
55
56An unusual feature of the XArray is the ability to create entries which
57occupy a range of indices. Once stored to, looking up any index in
58the range will return the same entry as looking up any other index in
59the range. Setting a mark on one index will set it on all of them.
60Storing to any index will store to all of them. Multi-index entries can
61be explicitly split into smaller entries, or storing ``NULL`` into any
62entry will cause the XArray to forget about the range.
63
64Normal API
65==========
66
67Start by initialising an XArray, either with :c:func:`DEFINE_XARRAY`
68for statically allocated XArrays or :c:func:`xa_init` for dynamically
69allocated ones. A freshly-initialised XArray contains a ``NULL``
70pointer at every index.
71
72You can then set entries using :c:func:`xa_store` and get entries
73using :c:func:`xa_load`. xa_store will overwrite any entry with the
74new entry and return the previous entry stored at that index. You can
75use :c:func:`xa_erase` instead of calling :c:func:`xa_store` with a
76``NULL`` entry. There is no difference between an entry that has never
77been stored to and one that has most recently had ``NULL`` stored to it.
78
79You can conditionally replace an entry at an index by using
80:c:func:`xa_cmpxchg`. Like :c:func:`cmpxchg`, it will only succeed if
81the entry at that index has the 'old' value. It also returns the entry
82which was at that index; if it returns the same entry which was passed as
83'old', then :c:func:`xa_cmpxchg` succeeded.
84
85If you want to only store a new entry to an index if the current entry
86at that index is ``NULL``, you can use :c:func:`xa_insert` which
87returns ``-EEXIST`` if the entry is not empty.
88
89You can enquire whether a mark is set on an entry by using
90:c:func:`xa_get_mark`. If the entry is not ``NULL``, you can set a mark
91on it by using :c:func:`xa_set_mark` and remove the mark from an entry by
92calling :c:func:`xa_clear_mark`. You can ask whether any entry in the
93XArray has a particular mark set by calling :c:func:`xa_marked`.
94
95You can copy entries out of the XArray into a plain array by calling
96:c:func:`xa_extract`. Or you can iterate over the present entries in
97the XArray by calling :c:func:`xa_for_each`. You may prefer to use
98:c:func:`xa_find` or :c:func:`xa_find_after` to move to the next present
99entry in the XArray.
100
101Calling :c:func:`xa_store_range` stores the same entry in a range
102of indices. If you do this, some of the other operations will behave
103in a slightly odd way. For example, marking the entry at one index
104may result in the entry being marked at some, but not all of the other
105indices. Storing into one index may result in the entry retrieved by
106some, but not all of the other indices changing.
107
108Finally, you can remove all entries from an XArray by calling
109:c:func:`xa_destroy`. If the XArray entries are pointers, you may wish
110to free the entries first. You can do this by iterating over all present
111entries in the XArray using the :c:func:`xa_for_each` iterator.
112
113ID assignment
114-------------
115
116You can call :c:func:`xa_alloc` to store the entry at any unused index
117in the XArray. If you need to modify the array from interrupt context,
118you can use :c:func:`xa_alloc_bh` or :c:func:`xa_alloc_irq` to disable
119interrupts while allocating the ID. Unlike :c:func:`xa_store`, allocating
120a ``NULL`` pointer does not delete an entry. Instead it reserves an
121entry like :c:func:`xa_reserve` and you can release it using either
122:c:func:`xa_erase` or :c:func:`xa_release`. To use ID assignment, the
123XArray must be defined with :c:func:`DEFINE_XARRAY_ALLOC`, or initialised
124by passing ``XA_FLAGS_ALLOC`` to :c:func:`xa_init_flags`,
125
126Memory allocation
127-----------------
128
129The :c:func:`xa_store`, :c:func:`xa_cmpxchg`, :c:func:`xa_alloc`,
130:c:func:`xa_reserve` and :c:func:`xa_insert` functions take a gfp_t
131parameter in case the XArray needs to allocate memory to store this entry.
132If the entry is being deleted, no memory allocation needs to be performed,
133and the GFP flags specified will be ignored.
134
135It is possible for no memory to be allocatable, particularly if you pass
136a restrictive set of GFP flags. In that case, the functions return a
137special value which can be turned into an errno using :c:func:`xa_err`.
138If you don't need to know exactly which error occurred, using
139:c:func:`xa_is_err` is slightly more efficient.
140
141Locking
142-------
143
144When using the Normal API, you do not have to worry about locking.
145The XArray uses RCU and an internal spinlock to synchronise access:
146
147No lock needed:
148 * :c:func:`xa_empty`
149 * :c:func:`xa_marked`
150
151Takes RCU read lock:
152 * :c:func:`xa_load`
153 * :c:func:`xa_for_each`
154 * :c:func:`xa_find`
155 * :c:func:`xa_find_after`
156 * :c:func:`xa_extract`
157 * :c:func:`xa_get_mark`
158
159Takes xa_lock internally:
160 * :c:func:`xa_store`
161 * :c:func:`xa_insert`
162 * :c:func:`xa_erase`
163 * :c:func:`xa_erase_bh`
164 * :c:func:`xa_erase_irq`
165 * :c:func:`xa_cmpxchg`
166 * :c:func:`xa_store_range`
167 * :c:func:`xa_alloc`
168 * :c:func:`xa_alloc_bh`
169 * :c:func:`xa_alloc_irq`
170 * :c:func:`xa_destroy`
171 * :c:func:`xa_set_mark`
172 * :c:func:`xa_clear_mark`
173
174Assumes xa_lock held on entry:
175 * :c:func:`__xa_store`
176 * :c:func:`__xa_insert`
177 * :c:func:`__xa_erase`
178 * :c:func:`__xa_cmpxchg`
179 * :c:func:`__xa_alloc`
180 * :c:func:`__xa_set_mark`
181 * :c:func:`__xa_clear_mark`
182
183If you want to take advantage of the lock to protect the data structures
184that you are storing in the XArray, you can call :c:func:`xa_lock`
185before calling :c:func:`xa_load`, then take a reference count on the
186object you have found before calling :c:func:`xa_unlock`. This will
187prevent stores from removing the object from the array between looking
188up the object and incrementing the refcount. You can also use RCU to
189avoid dereferencing freed memory, but an explanation of that is beyond
190the scope of this document.
191
192The XArray does not disable interrupts or softirqs while modifying
193the array. It is safe to read the XArray from interrupt or softirq
194context as the RCU lock provides enough protection.
195
196If, for example, you want to store entries in the XArray in process
197context and then erase them in softirq context, you can do that this way::
198
199 void foo_init(struct foo *foo)
200 {
201 xa_init_flags(&foo->array, XA_FLAGS_LOCK_BH);
202 }
203
204 int foo_store(struct foo *foo, unsigned long index, void *entry)
205 {
206 int err;
207
208 xa_lock_bh(&foo->array);
209 err = xa_err(__xa_store(&foo->array, index, entry, GFP_KERNEL));
210 if (!err)
211 foo->count++;
212 xa_unlock_bh(&foo->array);
213 return err;
214 }
215
216 /* foo_erase() is only called from softirq context */
217 void foo_erase(struct foo *foo, unsigned long index)
218 {
219 xa_lock(&foo->array);
220 __xa_erase(&foo->array, index);
221 foo->count--;
222 xa_unlock(&foo->array);
223 }
224
225If you are going to modify the XArray from interrupt or softirq context,
226you need to initialise the array using :c:func:`xa_init_flags`, passing
227``XA_FLAGS_LOCK_IRQ`` or ``XA_FLAGS_LOCK_BH``.
228
229The above example also shows a common pattern of wanting to extend the
230coverage of the xa_lock on the store side to protect some statistics
231associated with the array.
232
233Sharing the XArray with interrupt context is also possible, either
234using :c:func:`xa_lock_irqsave` in both the interrupt handler and process
235context, or :c:func:`xa_lock_irq` in process context and :c:func:`xa_lock`
236in the interrupt handler. Some of the more common patterns have helper
237functions such as :c:func:`xa_erase_bh` and :c:func:`xa_erase_irq`.
238
239Sometimes you need to protect access to the XArray with a mutex because
240that lock sits above another mutex in the locking hierarchy. That does
241not entitle you to use functions like :c:func:`__xa_erase` without taking
242the xa_lock; the xa_lock is used for lockdep validation and will be used
243for other purposes in the future.
244
245The :c:func:`__xa_set_mark` and :c:func:`__xa_clear_mark` functions are also
246available for situations where you look up an entry and want to atomically
247set or clear a mark. It may be more efficient to use the advanced API
248in this case, as it will save you from walking the tree twice.
249
250Advanced API
251============
252
253The advanced API offers more flexibility and better performance at the
254cost of an interface which can be harder to use and has fewer safeguards.
255No locking is done for you by the advanced API, and you are required
256to use the xa_lock while modifying the array. You can choose whether
257to use the xa_lock or the RCU lock while doing read-only operations on
258the array. You can mix advanced and normal operations on the same array;
259indeed the normal API is implemented in terms of the advanced API. The
260advanced API is only available to modules with a GPL-compatible license.
261
262The advanced API is based around the xa_state. This is an opaque data
263structure which you declare on the stack using the :c:func:`XA_STATE`
264macro. This macro initialises the xa_state ready to start walking
265around the XArray. It is used as a cursor to maintain the position
266in the XArray and let you compose various operations together without
267having to restart from the top every time.
268
269The xa_state is also used to store errors. You can call
270:c:func:`xas_error` to retrieve the error. All operations check whether
271the xa_state is in an error state before proceeding, so there's no need
272for you to check for an error after each call; you can make multiple
273calls in succession and only check at a convenient point. The only
274errors currently generated by the XArray code itself are ``ENOMEM`` and
275``EINVAL``, but it supports arbitrary errors in case you want to call
276:c:func:`xas_set_err` yourself.
277
278If the xa_state is holding an ``ENOMEM`` error, calling :c:func:`xas_nomem`
279will attempt to allocate more memory using the specified gfp flags and
280cache it in the xa_state for the next attempt. The idea is that you take
281the xa_lock, attempt the operation and drop the lock. The operation
282attempts to allocate memory while holding the lock, but it is more
283likely to fail. Once you have dropped the lock, :c:func:`xas_nomem`
284can try harder to allocate more memory. It will return ``true`` if it
285is worth retrying the operation (i.e. that there was a memory error *and*
286more memory was allocated). If it has previously allocated memory, and
287that memory wasn't used, and there is no error (or some error that isn't
288``ENOMEM``), then it will free the memory previously allocated.
289
290Internal Entries
291----------------
292
293The XArray reserves some entries for its own purposes. These are never
294exposed through the normal API, but when using the advanced API, it's
295possible to see them. Usually the best way to handle them is to pass them
296to :c:func:`xas_retry`, and retry the operation if it returns ``true``.
297
298.. flat-table::
299 :widths: 1 1 6
300
301 * - Name
302 - Test
303 - Usage
304
305 * - Node
306 - :c:func:`xa_is_node`
307 - An XArray node. May be visible when using a multi-index xa_state.
308
309 * - Sibling
310 - :c:func:`xa_is_sibling`
311 - A non-canonical entry for a multi-index entry. The value indicates
312 which slot in this node has the canonical entry.
313
314 * - Retry
315 - :c:func:`xa_is_retry`
316 - This entry is currently being modified by a thread which has the
317 xa_lock. The node containing this entry may be freed at the end
318 of this RCU period. You should restart the lookup from the head
319 of the array.
320
321 * - Zero
322 - :c:func:`xa_is_zero`
323 - Zero entries appear as ``NULL`` through the Normal API, but occupy
324 an entry in the XArray which can be used to reserve the index for
325 future use.
326
327Other internal entries may be added in the future. As far as possible, they
328will be handled by :c:func:`xas_retry`.
329
330Additional functionality
331------------------------
332
333The :c:func:`xas_create_range` function allocates all the necessary memory
334to store every entry in a range. It will set ENOMEM in the xa_state if
335it cannot allocate memory.
336
337You can use :c:func:`xas_init_marks` to reset the marks on an entry
338to their default state. This is usually all marks clear, unless the
339XArray is marked with ``XA_FLAGS_TRACK_FREE``, in which case mark 0 is set
340and all other marks are clear. Replacing one entry with another using
341:c:func:`xas_store` will not reset the marks on that entry; if you want
342the marks reset, you should do that explicitly.
343
344The :c:func:`xas_load` will walk the xa_state as close to the entry
345as it can. If you know the xa_state has already been walked to the
346entry and need to check that the entry hasn't changed, you can use
347:c:func:`xas_reload` to save a function call.
348
349If you need to move to a different index in the XArray, call
350:c:func:`xas_set`. This resets the cursor to the top of the tree, which
351will generally make the next operation walk the cursor to the desired
352spot in the tree. If you want to move to the next or previous index,
353call :c:func:`xas_next` or :c:func:`xas_prev`. Setting the index does
354not walk the cursor around the array so does not require a lock to be
355held, while moving to the next or previous index does.
356
357You can search for the next present entry using :c:func:`xas_find`. This
358is the equivalent of both :c:func:`xa_find` and :c:func:`xa_find_after`;
359if the cursor has been walked to an entry, then it will find the next
360entry after the one currently referenced. If not, it will return the
361entry at the index of the xa_state. Using :c:func:`xas_next_entry` to
362move to the next present entry instead of :c:func:`xas_find` will save
363a function call in the majority of cases at the expense of emitting more
364inline code.
365
366The :c:func:`xas_find_marked` function is similar. If the xa_state has
367not been walked, it will return the entry at the index of the xa_state,
368if it is marked. Otherwise, it will return the first marked entry after
369the entry referenced by the xa_state. The :c:func:`xas_next_marked`
370function is the equivalent of :c:func:`xas_next_entry`.
371
372When iterating over a range of the XArray using :c:func:`xas_for_each`
373or :c:func:`xas_for_each_marked`, it may be necessary to temporarily stop
374the iteration. The :c:func:`xas_pause` function exists for this purpose.
375After you have done the necessary work and wish to resume, the xa_state
376is in an appropriate state to continue the iteration after the entry
377you last processed. If you have interrupts disabled while iterating,
378then it is good manners to pause the iteration and reenable interrupts
379every ``XA_CHECK_SCHED`` entries.
380
381The :c:func:`xas_get_mark`, :c:func:`xas_set_mark` and
382:c:func:`xas_clear_mark` functions require the xa_state cursor to have
383been moved to the appropriate location in the xarray; they will do
384nothing if you have called :c:func:`xas_pause` or :c:func:`xas_set`
385immediately before.
386
387You can call :c:func:`xas_set_update` to have a callback function
388called each time the XArray updates a node. This is used by the page
389cache workingset code to maintain its list of nodes which contain only
390shadow entries.
391
392Multi-Index Entries
393-------------------
394
395The XArray has the ability to tie multiple indices together so that
396operations on one index affect all indices. For example, storing into
397any index will change the value of the entry retrieved from any index.
398Setting or clearing a mark on any index will set or clear the mark
399on every index that is tied together. The current implementation
400only allows tying ranges which are aligned powers of two together;
401eg indices 64-127 may be tied together, but 2-6 may not be. This may
402save substantial quantities of memory; for example tying 512 entries
403together will save over 4kB.
404
405You can create a multi-index entry by using :c:func:`XA_STATE_ORDER`
406or :c:func:`xas_set_order` followed by a call to :c:func:`xas_store`.
407Calling :c:func:`xas_load` with a multi-index xa_state will walk the
408xa_state to the right location in the tree, but the return value is not
409meaningful, potentially being an internal entry or ``NULL`` even when there
410is an entry stored within the range. Calling :c:func:`xas_find_conflict`
411will return the first entry within the range or ``NULL`` if there are no
412entries in the range. The :c:func:`xas_for_each_conflict` iterator will
413iterate over every entry which overlaps the specified range.
414
415If :c:func:`xas_load` encounters a multi-index entry, the xa_index
416in the xa_state will not be changed. When iterating over an XArray
417or calling :c:func:`xas_find`, if the initial index is in the middle
418of a multi-index entry, it will not be altered. Subsequent calls
419or iterations will move the index to the first index in the range.
420Each entry will only be returned once, no matter how many indices it
421occupies.
422
423Using :c:func:`xas_next` or :c:func:`xas_prev` with a multi-index xa_state
424is not supported. Using either of these functions on a multi-index entry
425will reveal sibling entries; these should be skipped over by the caller.
426
427Storing ``NULL`` into any index of a multi-index entry will set the entry
428at every index to ``NULL`` and dissolve the tie. Splitting a multi-index
429entry into entries occupying smaller ranges is not yet supported.
430
431Functions and structures
432========================
433
434.. kernel-doc:: include/linux/xarray.h
435.. kernel-doc:: lib/xarray.c
Documentation/cpu-freq/cpufreq-stats.txt+5−3
@@ -86,9 +86,11 @@ transitions. · 85 unmodified lines
86This will give a fine grained information about all the CPU frequency86This will give a fine grained information about all the CPU frequency
87transitions. The cat output here is a two dimensional matrix, where an entry87transitions. The cat output here is a two dimensional matrix, where an entry
88<i,j> (row i, column j) represents the count of number of transitions from 88<i,j> (row i, column j) represents the count of number of transitions from
89Freq_i to Freq_j. Freq_i is in descending order with increasing rows and 89Freq_i to Freq_j. Freq_i rows and Freq_j columns follow the sorting order in
90Freq_j is in descending order with increasing columns. The output here also 90which the driver has provided the frequency table initially to the cpufreq core
91contains the actual freq values for each row and column for better readability.91and so can be sorted (ascending or descending) or unsorted. The output here
92also contains the actual freq values for each row and column for better
93readability.
92 94
93If the transition table is bigger than PAGE_SIZE, reading this will95If the transition table is bigger than PAGE_SIZE, reading this will
94return an -EFBIG error.96return an -EFBIG error.
Documentation/crypto/asymmetric-keys.txt+21−5
@@ -183,6 +183,10 @@ and looks like the following: · 182 unmodified lines
183 183
184 void (*describe)(const struct key *key, struct seq_file *m);184 void (*describe)(const struct key *key, struct seq_file *m);
185 void (*destroy)(void *payload);185 void (*destroy)(void *payload);
186 int (*query)(const struct kernel_pkey_params *params,
187 struct kernel_pkey_query *info);
188 int (*eds_op)(struct kernel_pkey_params *params,
189 const void *in, void *out);
186 int (*verify_signature)(const struct key *key,190 int (*verify_signature)(const struct key *key,
187 const struct public_key_signature *sig);191 const struct public_key_signature *sig);
188 };192 };
@@ -207,12 +211,22 @@ There are a number of operations defined by the subtype: · 18 unmodified lines
207 asymmetric key will look after freeing the fingerprint and releasing the211 asymmetric key will look after freeing the fingerprint and releasing the
208 reference on the subtype module.212 reference on the subtype module.
209 213
210 (3) verify_signature().214 (3) query().
211 215
212 Optional. These are the entry points for the key usage operations.216 Mandatory. This is a function for querying the capabilities of a key.
213 Currently there is only the one defined. If not set, the caller will be217
214 given -ENOTSUPP. The subtype may do anything it likes to implement an218 (4) eds_op().
215 operation, including offloading to hardware.219
220 Optional. This is the entry point for the encryption, decryption and
221 signature creation operations (which are distinguished by the operation ID
222 in the parameter struct). The subtype may do anything it likes to
223 implement an operation, including offloading to hardware.
224
225 (5) verify_signature().
226
227 Optional. This is the entry point for signature verification. The
228 subtype may do anything it likes to implement an operation, including
229 offloading to hardware.
216 230
217 231
218==========================232==========================
@@ -234,6 +248,8 @@ Examples of blob formats for which parsers could be implemented include: · 15 unmodified lines
234 - X.509 ASN.1 stream.248 - X.509 ASN.1 stream.
235 - Pointer to TPM key.249 - Pointer to TPM key.
236 - Pointer to UEFI key.250 - Pointer to UEFI key.
251 - PKCS#8 private key [RFC 5208].
252 - PKCS#5 encrypted private key [RFC 2898].
237 253
238During key instantiation each parser in the list is tried until one doesn't254During key instantiation each parser in the list is tried until one doesn't
239return -EBADMSG.255return -EBADMSG.
Documentation/dev-tools/coccinelle.rst+19−4
@@ -30,18 +30,29 @@ of many distributions, e.g. : · 29 unmodified lines
30 - NetBSD30 - NetBSD
31 - FreeBSD31 - FreeBSD
32 32
33You can get the latest version released from the Coccinelle homepage at33Some distribution packages are obsolete and it is recommended
34to use the latest version released from the Coccinelle homepage at
34http://coccinelle.lip6.fr/35http://coccinelle.lip6.fr/
35 36
36Once you have it, run the following command::37Or from Github at:
37 38
38 ./configure39https://github.com/coccinelle/coccinelle
40
41Once you have it, run the following commands::
42
43 ./autogen
44 ./configure
39 make45 make
40 46
41as a regular user, and install it with::47as a regular user, and install it with::
42 48
43 sudo make install49 sudo make install
44 50
51More detailed installation instructions to build from source can be
52found at:
53
54https://github.com/coccinelle/coccinelle/blob/master/install.txt
55
45Supplemental documentation56Supplemental documentation
46---------------------------57---------------------------
47 58
@@ -51,6 +62,10 @@ https://bottest.wiki.kernel.org/coccicheck · 3 unmodified lines
51 62
52The wiki documentation always refers to the linux-next version of the script.63The wiki documentation always refers to the linux-next version of the script.
53 64
65For Semantic Patch Language(SmPL) grammar documentation refer to:
66
67http://coccinelle.lip6.fr/documentation.php
68
54Using Coccinelle on the Linux kernel69Using Coccinelle on the Linux kernel
55------------------------------------70------------------------------------
56 71
@@ -223,7 +238,7 @@ Since coccicheck runs through make, it naturally runs from the kernel · 166 unmodified lines
223proper dir, as such the second rule above would be implied for picking up a238proper dir, as such the second rule above would be implied for picking up a
224.cocciconfig when using ``make coccicheck``.239.cocciconfig when using ``make coccicheck``.
225 240
226``make coccicheck`` also supports using M= targets.If you do not supply241``make coccicheck`` also supports using M= targets. If you do not supply
227any M= target, it is assumed you want to target the entire kernel.242any M= target, it is assumed you want to target the entire kernel.
228The kernel coccicheck script has::243The kernel coccicheck script has::
229 244
Documentation/dev-tools/kselftest.rst+1−1
@@ -159,7 +159,7 @@ Contributing new tests (details) · 158 unmodified lines
159 * If a test needs specific kernel config options enabled, add a config file in159 * If a test needs specific kernel config options enabled, add a config file in
160 the test directory to enable them.160 the test directory to enable them.
161 161
162 e.g: tools/testing/selftests/android/ion/config162 e.g: tools/testing/selftests/android/config
163 163
164Test Harness164Test Harness
165============165============
Documentation/device-mapper/dm-flakey.txt+4−0
@@ -33,6 +33,10 @@ Optional feature parameters: · 32 unmodified lines
33 All write I/O is silently ignored.33 All write I/O is silently ignored.
34 Read I/O is handled correctly.34 Read I/O is handled correctly.
35 35
36 error_writes:
37 All write I/O is failed with an error signalled.
38 Read I/O is handled correctly.
39
36 corrupt_bio_byte <Nth_byte> <direction> <value> <flags>:40 corrupt_bio_byte <Nth_byte> <direction> <value> <flags>:
37 During <down interval>, replace <Nth_byte> of the data of41 During <down interval>, replace <Nth_byte> of the data of
38 each matching bio with <value>.42 each matching bio with <value>.
Documentation/device-mapper/log-writes.txt+1−1
@@ -38,7 +38,7 @@ inconsistent file system. · 37 unmodified lines
38Any REQ_FUA requests bypass this flushing mechanism and are logged as soon as38Any REQ_FUA requests bypass this flushing mechanism and are logged as soon as
39they complete as those requests will obviously bypass the device cache.39they complete as those requests will obviously bypass the device cache.
40 40
41Any REQ_DISCARD requests are treated like WRITE requests. Otherwise we would41Any REQ_OP_DISCARD requests are treated like WRITE requests. Otherwise we would
42have all the DISCARD requests, and then the WRITE requests and then the FLUSH42have all the DISCARD requests, and then the WRITE requests and then the FLUSH
43request. Consider the following example:43request. Consider the following example:
44 44
Documentation/devicetree/00-INDEX+0−12
@@ -1,12 +0,0 @@
1Documentation for device trees, a data structure by which bootloaders pass
2hardware layout to Linux in a device-independent manner, simplifying hardware
3probing. This subsystem is maintained by Grant Likely
4<grant.likely@secretlab.ca> and has a mailing list at
5https://lists.ozlabs.org/listinfo/devicetree-discuss
6
700-INDEX
8 - this file
9booting-without-of.txt
10 - Booting Linux without Open Firmware, describes history and format of device trees.
11usage-model.txt
12 - How Linux uses DT and what DT aims to solve.
Documentation/devicetree/bindings/arm/al,alpine.txt+0−72
@@ -14,75 +14,3 @@ compatible: must contain "al,alpine" · 13 unmodified lines
14 14
15 ...15 ...
16}16}
17
18* CPU node:
19
20The Alpine platform includes cortex-a15 cores.
21enable-method: must be "al,alpine-smp" to allow smp [1]
22
23Example:
24
25cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "al,alpine-smp";
29
30 cpu@0 {
31 compatible = "arm,cortex-a15";
32 device_type = "cpu";
33 reg = <0>;
34 };
35
36 cpu@1 {
37 compatible = "arm,cortex-a15";
38 device_type = "cpu";
39 reg = <1>;
40 };
41
42 cpu@2 {
43 compatible = "arm,cortex-a15";
44 device_type = "cpu";
45 reg = <2>;
46 };
47
48 cpu@3 {
49 compatible = "arm,cortex-a15";
50 device_type = "cpu";
51 reg = <3>;
52 };
53};
54
55
56* Alpine CPU resume registers
57
58The CPU resume register are used to define required resume address after
59reset.
60
61Properties:
62- compatible : Should contain "al,alpine-cpu-resume".
63- reg : Offset and length of the register set for the device
64
65Example:
66
67cpu_resume {
68 compatible = "al,alpine-cpu-resume";
69 reg = <0xfbff5ed0 0x30>;
70};
71
72* Alpine System-Fabric Service Registers
73
74The System-Fabric Service Registers allow various operation on CPU and
75system fabric, like powering CPUs off.
76
77Properties:
78- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
79- reg : Offset and length of the register set for the device
80
81Example:
82
83nb_service {
84 compatible = "al,alpine-sysfabric-service", "syscon";
85 reg = <0xfb070000 0x10000>;
86};
87
88[1] arm/cpu-enable-method/al,alpine-smp
Documentation/devicetree/bindings/arm/amlogic.txt+7−0
@@ -57,12 +57,17 @@ Boards with the Amlogic Meson AXG A113D SoC shall have the following properties: · 56 unmodified lines
57 Required root node property:57 Required root node property:
58 compatible: "amlogic,a113d", "amlogic,meson-axg";58 compatible: "amlogic,a113d", "amlogic,meson-axg";
59 59
60Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties:
61 Required root node property:
62 compatible: "amlogic,g12a";
63
60Board compatible values (alphabetically, grouped by SoC):64Board compatible values (alphabetically, grouped by SoC):
61 65
62 - "geniatech,atv1200" (Meson6)66 - "geniatech,atv1200" (Meson6)
63 67
64 - "minix,neo-x8" (Meson8)68 - "minix,neo-x8" (Meson8)
65 69
70 - "endless,ec100" (Meson8b)
66 - "hardkernel,odroid-c1" (Meson8b)71 - "hardkernel,odroid-c1" (Meson8b)
67 - "tronfy,mxq" (Meson8b)72 - "tronfy,mxq" (Meson8b)
68 73
@@ -101,6 +106,8 @@ Board compatible values (alphabetically, grouped by SoC): · 32 unmodified lines
101 106
102 - "amlogic,s400" (Meson axg a113d)107 - "amlogic,s400" (Meson axg a113d)
103 108
109 - "amlogic,u200" (Meson g12a s905d2)
110
104Amlogic Meson Firmware registers Interface111Amlogic Meson Firmware registers Interface
105------------------------------------------112------------------------------------------
106 113
Documentation/devicetree/bindings/arm/atmel-at91.txt+0−170
@@ -70,173 +70,3 @@ compatible: must be one of: · 69 unmodified lines
70 - "atmel,samv71q19"70 - "atmel,samv71q19"
71 - "atmel,samv71q20"71 - "atmel,samv71q20"
72 - "atmel,samv71q21"72 - "atmel,samv71q21"
73
74Chipid required properties:
75- compatible: Should be "atmel,sama5d2-chipid"
76- reg : Should contain registers location and length
77
78PIT Timer required properties:
79- compatible: Should be "atmel,at91sam9260-pit"
80- reg: Should contain registers location and length
81- interrupts: Should contain interrupt for the PIT which is the IRQ line
82 shared across all System Controller members.
83
84System Timer (ST) required properties:
85- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
86- reg: Should contain registers location and length
87- interrupts: Should contain interrupt for the ST which is the IRQ line
88 shared across all System Controller members.
89- clocks: phandle to input clock.
90Its subnodes can be:
91- watchdog: compatible should be "atmel,at91rm9200-wdt"
92
93RSTC Reset Controller required properties:
94- compatible: Should be "atmel,<chip>-rstc".
95 <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
96- reg: Should contain registers location and length
97- clocks: phandle to input clock.
98
99Example:
100
101 rstc@fffffd00 {
102 compatible = "atmel,at91sam9260-rstc";
103 reg = <0xfffffd00 0x10>;
104 clocks = <&clk32k>;
105 };
106
107RAMC SDRAM/DDR Controller required properties:
108- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
109 "atmel,at91sam9260-sdramc",
110 "atmel,at91sam9g45-ddramc",
111 "atmel,sama5d3-ddramc",
112- reg: Should contain registers location and length
113
114Examples:
115
116 ramc0: ramc@ffffe800 {
117 compatible = "atmel,at91sam9g45-ddramc";
118 reg = <0xffffe800 0x200>;
119 };
120
121SHDWC Shutdown Controller
122
123required properties:
124- compatible: Should be "atmel,<chip>-shdwc".
125 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
126- reg: Should contain registers location and length
127- clocks: phandle to input clock.
128
129optional properties:
130- atmel,wakeup-mode: String, operation mode of the wakeup mode.
131 Supported values are: "none", "high", "low", "any".
132- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
133
134optional at91sam9260 properties:
135- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
136
137optional at91sam9rl properties:
138- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
139- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
140
141optional at91sam9x5 properties:
142- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
143
144Example:
145
146 shdwc@fffffd10 {
147 compatible = "atmel,at91sam9260-shdwc";
148 reg = <0xfffffd10 0x10>;
149 clocks = <&clk32k>;
150 };
151
152SHDWC SAMA5D2-Compatible Shutdown Controller
153
1541) shdwc node
155
156required properties:
157- compatible: should be "atmel,sama5d2-shdwc".
158- reg: should contain registers location and length
159- clocks: phandle to input clock.
160- #address-cells: should be one. The cell is the wake-up input index.
161- #size-cells: should be zero.
162
163optional properties:
164
165- debounce-delay-us: minimum wake-up inputs debouncer period in
166 microseconds. It's usually a board-related property.
167- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
168
169The node contains child nodes for each wake-up input that the platform uses.
170
1712) input nodes
172
173Wake-up input nodes are usually described in the "board" part of the Device
174Tree. Note also that input 0 is linked to the wake-up pin and is frequently
175used.
176
177Required properties:
178- reg: should contain the wake-up input index [0 - 15].
179
180Optional properties:
181- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
182 by the child, forces the wake-up of the core power supply on a high level.
183 The default is to be active low.
184
185Example:
186
187On the SoC side:
188 shdwc@f8048010 {
189 compatible = "atmel,sama5d2-shdwc";
190 reg = <0xf8048010 0x10>;
191 clocks = <&clk32k>;
192 #address-cells = <1>;
193 #size-cells = <0>;
194 atmel,wakeup-rtc-timer;
195 };
196
197On the board side:
198 shdwc@f8048010 {
199 debounce-delay-us = <976>;
200
201 input@0 {
202 reg = <0>;
203 };
204
205 input@1 {
206 reg = <1>;
207 atmel,wakeup-active-high;
208 };
209 };
210
211Special Function Registers (SFR)
212
213Special Function Registers (SFR) manage specific aspects of the integrated
214memory, bridge implementations, processor and other functionality not controlled
215elsewhere.
216
217required properties:
218- compatible: Should be "atmel,<chip>-sfr", "syscon" or
219 "atmel,<chip>-sfrbu", "syscon"
220 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
221- reg: Should contain registers location and length
222
223 sfr@f0038000 {
224 compatible = "atmel,sama5d3-sfr", "syscon";
225 reg = <0xf0038000 0x60>;
226 };
227
228Security Module (SECUMOD)
229
230The Security Module macrocell provides all necessary secure functions to avoid
231voltage, temperature, frequency and mechanical attacks on the chip. It also
232embeds secure memories that can be scrambled
233
234required properties:
235- compatible: Should be "atmel,<chip>-secumod", "syscon".
236 <chip> can be "sama5d2".
237- reg: Should contain registers location and length
238
239 secumod@fc040000 {
240 compatible = "atmel,sama5d2-secumod", "syscon";
241 reg = <0xfc040000 0x100>;
242 };
Documentation/devicetree/bindings/arm/atmel-sysregs.txt+171−0
@@ -0,0 +1,171 @@
1Atmel system registers
2
3Chipid required properties:
4- compatible: Should be "atmel,sama5d2-chipid"
5- reg : Should contain registers location and length
6
7PIT Timer required properties:
8- compatible: Should be "atmel,at91sam9260-pit"
9- reg: Should contain registers location and length
10- interrupts: Should contain interrupt for the PIT which is the IRQ line
11 shared across all System Controller members.
12
13System Timer (ST) required properties:
14- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
15- reg: Should contain registers location and length
16- interrupts: Should contain interrupt for the ST which is the IRQ line
17 shared across all System Controller members.
18- clocks: phandle to input clock.
19Its subnodes can be:
20- watchdog: compatible should be "atmel,at91rm9200-wdt"
21
22RSTC Reset Controller required properties:
23- compatible: Should be "atmel,<chip>-rstc".
24 <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
25- reg: Should contain registers location and length
26- clocks: phandle to input clock.
27
28Example:
29
30 rstc@fffffd00 {
31 compatible = "atmel,at91sam9260-rstc";
32 reg = <0xfffffd00 0x10>;
33 clocks = <&clk32k>;
34 };
35
36RAMC SDRAM/DDR Controller required properties:
37- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
38 "atmel,at91sam9260-sdramc",
39 "atmel,at91sam9g45-ddramc",
40 "atmel,sama5d3-ddramc",
41- reg: Should contain registers location and length
42
43Examples:
44
45 ramc0: ramc@ffffe800 {
46 compatible = "atmel,at91sam9g45-ddramc";
47 reg = <0xffffe800 0x200>;
48 };
49
50SHDWC Shutdown Controller
51
52required properties:
53- compatible: Should be "atmel,<chip>-shdwc".
54 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
55- reg: Should contain registers location and length
56- clocks: phandle to input clock.
57
58optional properties:
59- atmel,wakeup-mode: String, operation mode of the wakeup mode.
60 Supported values are: "none", "high", "low", "any".
61- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
62
63optional at91sam9260 properties:
64- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
65
66optional at91sam9rl properties:
67- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
68- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
69
70optional at91sam9x5 properties:
71- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
72
73Example:
74
75 shdwc@fffffd10 {
76 compatible = "atmel,at91sam9260-shdwc";
77 reg = <0xfffffd10 0x10>;
78 clocks = <&clk32k>;
79 };
80
81SHDWC SAMA5D2-Compatible Shutdown Controller
82
831) shdwc node
84
85required properties:
86- compatible: should be "atmel,sama5d2-shdwc".
87- reg: should contain registers location and length
88- clocks: phandle to input clock.
89- #address-cells: should be one. The cell is the wake-up input index.
90- #size-cells: should be zero.
91
92optional properties:
93
94- debounce-delay-us: minimum wake-up inputs debouncer period in
95 microseconds. It's usually a board-related property.
96- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
97
98The node contains child nodes for each wake-up input that the platform uses.
99
1002) input nodes
101
102Wake-up input nodes are usually described in the "board" part of the Device
103Tree. Note also that input 0 is linked to the wake-up pin and is frequently
104used.
105
106Required properties:
107- reg: should contain the wake-up input index [0 - 15].
108
109Optional properties:
110- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
111 by the child, forces the wake-up of the core power supply on a high level.
112 The default is to be active low.
113
114Example:
115
116On the SoC side:
117 shdwc@f8048010 {
118 compatible = "atmel,sama5d2-shdwc";
119 reg = <0xf8048010 0x10>;
120 clocks = <&clk32k>;
121 #address-cells = <1>;
122 #size-cells = <0>;
123 atmel,wakeup-rtc-timer;
124 };
125
126On the board side:
127 shdwc@f8048010 {
128 debounce-delay-us = <976>;
129
130 input@0 {
131 reg = <0>;
132 };
133
134 input@1 {
135 reg = <1>;
136 atmel,wakeup-active-high;
137 };
138 };
139
140Special Function Registers (SFR)
141
142Special Function Registers (SFR) manage specific aspects of the integrated
143memory, bridge implementations, processor and other functionality not controlled
144elsewhere.
145
146required properties:
147- compatible: Should be "atmel,<chip>-sfr", "syscon" or
148 "atmel,<chip>-sfrbu", "syscon"
149 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
150- reg: Should contain registers location and length
151
152 sfr@f0038000 {
153 compatible = "atmel,sama5d3-sfr", "syscon";
154 reg = <0xf0038000 0x60>;
155 };
156
157Security Module (SECUMOD)
158
159The Security Module macrocell provides all necessary secure functions to avoid
160voltage, temperature, frequency and mechanical attacks on the chip. It also
161embeds secure memories that can be scrambled
162
163required properties:
164- compatible: Should be "atmel,<chip>-secumod", "syscon".
165 <chip> can be "sama5d2".
166- reg: Should contain registers location and length
167
168 secumod@fc040000 {
169 compatible = "atmel,sama5d2-secumod", "syscon";
170 reg = <0xfc040000 0x100>;
171 };
Documentation/devicetree/bindings/arm/bcm/brcm,bcm2835.txt+8−0
@@ -42,6 +42,14 @@ Raspberry Pi Compute Module · 41 unmodified lines
42Required root node properties:42Required root node properties:
43compatible = "raspberrypi,compute-module", "brcm,bcm2835";43compatible = "raspberrypi,compute-module", "brcm,bcm2835";
44 44
45Raspberry Pi Compute Module 3
46Required root node properties:
47compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
48
49Raspberry Pi Compute Module 3 Lite
50Required root node properties:
51compatible = "raspberrypi,3-compute-module-lite", "brcm,bcm2837";
52
45Raspberry Pi Zero53Raspberry Pi Zero
46Required root node properties:54Required root node properties:
47compatible = "raspberrypi,model-zero", "brcm,bcm2835";55compatible = "raspberrypi,model-zero", "brcm,bcm2835";
Documentation/devicetree/bindings/arm/coresight.txt+65−55
@@ -54,9 +54,7 @@ its hardware characteristcs. · 53 unmodified lines
54 clocks the core of that coresight component. The latter clock54 clocks the core of that coresight component. The latter clock
55 is optional.55 is optional.
56 56
57 * port or ports: The representation of the component's port57 * port or ports: see "Graph bindings for Coresight" below.
58 layout using the generic DT graph presentation found in
59 "bindings/graph.txt".
60 58
61* Additional required properties for System Trace Macrocells (STM):59* Additional required properties for System Trace Macrocells (STM):
62 * reg: along with the physical base address and length of the register60 * reg: along with the physical base address and length of the register
@@ -73,7 +71,7 @@ its hardware characteristcs. · 10 unmodified lines
73 AMBA markee):71 AMBA markee):
74 - "arm,coresight-replicator"72 - "arm,coresight-replicator"
75 73
76 * port or ports: same as above.74 * port or ports: see "Graph bindings for Coresight" below.
77 75
78* Optional properties for ETM/PTMs:76* Optional properties for ETM/PTMs:
79 77
@@ -96,6 +94,20 @@ its hardware characteristcs. · 16 unmodified lines
96 * interrupts : Exactly one SPI may be listed for reporting the address94 * interrupts : Exactly one SPI may be listed for reporting the address
97 error95 error
98 96
97Graph bindings for Coresight
98-------------------------------
99
100Coresight components are interconnected to create a data path for the flow of
101trace data generated from the "sources" to their collection points "sink".
102Each coresight component must describe the "input" and "output" connections.
103The connections must be described via generic DT graph bindings as described
104by the "bindings/graph.txt", where each "port" along with an "endpoint"
105component represents a hardware port and the connection.
106
107 * All output ports must be listed inside a child node named "out-ports"
108 * All input ports must be listed inside a child node named "in-ports".
109 * Port address must match the hardware port number.
110
99Example:111Example:
100 112
1011. Sinks1131. Sinks
@@ -105,10 +117,11 @@ Example: · 3 unmodified lines
105 117
106 clocks = <&oscclk6a>;118 clocks = <&oscclk6a>;
107 clock-names = "apb_pclk";119 clock-names = "apb_pclk";
108 port {120 in-ports {
109 etb_in_port: endpoint@0 {121 port {
110 slave-mode;122 etb_in_port: endpoint@0 {
111 remote-endpoint = <&replicator_out_port0>;123 remote-endpoint = <&replicator_out_port0>;
124 };
112 };125 };
113 };126 };
114 };127 };
@@ -119,10 +132,11 @@ Example: · 4 unmodified lines
119 132
120 clocks = <&oscclk6a>;133 clocks = <&oscclk6a>;
121 clock-names = "apb_pclk";134 clock-names = "apb_pclk";
122 port {135 in-ports {
123 tpiu_in_port: endpoint@0 {136 port {
124 slave-mode;137 tpiu_in_port: endpoint@0 {
125 remote-endpoint = <&replicator_out_port1>;138 remote-endpoint = <&replicator_out_port1>;
139 };
126 };140 };
127 };141 };
128 };142 };
@@ -133,22 +147,16 @@ Example: · 4 unmodified lines
133 147
134 clocks = <&oscclk6a>;148 clocks = <&oscclk6a>;
135 clock-names = "apb_pclk";149 clock-names = "apb_pclk";
136 ports {150 in-ports {
137 #address-cells = <1>;151 port {
138 #size-cells = <0>;
139
140 /* input port */
141 port@0 {
142 reg = <0>;
143 etr_in_port: endpoint {152 etr_in_port: endpoint {
144 slave-mode;
145 remote-endpoint = <&replicator2_out_port0>;153 remote-endpoint = <&replicator2_out_port0>;
146 };154 };
147 };155 };
156 };
148 157
149 /* CATU link represented by output port */158 out-ports {
150 port@1 {159 port {
151 reg = <1>;
152 etr_out_port: endpoint {160 etr_out_port: endpoint {
153 remote-endpoint = <&catu_in_port>;161 remote-endpoint = <&catu_in_port>;
154 };162 };
@@ -163,7 +171,7 @@ Example: · 8 unmodified lines
163 */171 */
164 compatible = "arm,coresight-replicator";172 compatible = "arm,coresight-replicator";
165 173
166 ports {174 out-ports {
167 #address-cells = <1>;175 #address-cells = <1>;
168 #size-cells = <0>;176 #size-cells = <0>;
169 177
@@ -181,12 +189,11 @@ Example: · 11 unmodified lines
181 remote-endpoint = <&tpiu_in_port>;189 remote-endpoint = <&tpiu_in_port>;
182 };190 };
183 };191 };
192 };
184 193
185 /* replicator input port */194 in-ports {
186 port@2 {195 port {
187 reg = <0>;
188 replicator_in_port0: endpoint {196 replicator_in_port0: endpoint {
189 slave-mode;
190 remote-endpoint = <&funnel_out_port0>;197 remote-endpoint = <&funnel_out_port0>;
191 };198 };
192 };199 };
@@ -199,40 +206,36 @@ Example: · 6 unmodified lines
199 206
200 clocks = <&oscclk6a>;207 clocks = <&oscclk6a>;
201 clock-names = "apb_pclk";208 clock-names = "apb_pclk";
202 ports {209 out-ports {
203 #address-cells = <1>;210 port {
204 #size-cells = <0>;
205
206 /* funnel output port */
207 port@0 {
208 reg = <0>;
209 funnel_out_port0: endpoint {211 funnel_out_port0: endpoint {
210 remote-endpoint =212 remote-endpoint =
211 <&replicator_in_port0>;213 <&replicator_in_port0>;
212 };214 };
213 };215 };
216 };
214 217
215 /* funnel input ports */218 in-ports {
216 port@1 {219 #address-cells = <1>;
220 #size-cells = <0>;
221
222 port@0 {
217 reg = <0>;223 reg = <0>;
218 funnel_in_port0: endpoint {224 funnel_in_port0: endpoint {
219 slave-mode;
220 remote-endpoint = <&ptm0_out_port>;225 remote-endpoint = <&ptm0_out_port>;
221 };226 };
222 };227 };
223 228
224 port@2 {229 port@1 {
225 reg = <1>;230 reg = <1>;
226 funnel_in_port1: endpoint {231 funnel_in_port1: endpoint {
227 slave-mode;
228 remote-endpoint = <&ptm1_out_port>;232 remote-endpoint = <&ptm1_out_port>;
229 };233 };
230 };234 };
231 235
232 port@3 {236 port@2 {
233 reg = <2>;237 reg = <2>;
234 funnel_in_port2: endpoint {238 funnel_in_port2: endpoint {
235 slave-mode;
236 remote-endpoint = <&etm0_out_port>;239 remote-endpoint = <&etm0_out_port>;
237 };240 };
238 };241 };
@@ -248,9 +251,11 @@ Example: · 9 unmodified lines
248 cpu = <&cpu0>;251 cpu = <&cpu0>;
249 clocks = <&oscclk6a>;252 clocks = <&oscclk6a>;
250 clock-names = "apb_pclk";253 clock-names = "apb_pclk";
251 port {254 out-ports {
252 ptm0_out_port: endpoint {255 port {
253 remote-endpoint = <&funnel_in_port0>;256 ptm0_out_port: endpoint {
257 remote-endpoint = <&funnel_in_port0>;
258 };
254 };259 };
255 };260 };
256 };261 };
@@ -262,9 +267,11 @@ Example: · 5 unmodified lines
262 cpu = <&cpu1>;267 cpu = <&cpu1>;
263 clocks = <&oscclk6a>;268 clocks = <&oscclk6a>;
264 clock-names = "apb_pclk";269 clock-names = "apb_pclk";
265 port {270 out-ports {
266 ptm1_out_port: endpoint {271 port {
267 remote-endpoint = <&funnel_in_port1>;272 ptm1_out_port: endpoint {
273 remote-endpoint = <&funnel_in_port1>;
274 };
268 };275 };
269 };276 };
270 };277 };
@@ -278,9 +285,11 @@ Example: · 7 unmodified lines
278 285
279 clocks = <&soc_smc50mhz>;286 clocks = <&soc_smc50mhz>;
280 clock-names = "apb_pclk";287 clock-names = "apb_pclk";
281 port {288 out-ports {
282 stm_out_port: endpoint {289 port {
283 remote-endpoint = <&main_funnel_in_port2>;290 stm_out_port: endpoint {
291 remote-endpoint = <&main_funnel_in_port2>;
292 };
284 };293 };
285 };294 };
286 };295 };
@@ -295,10 +304,11 @@ Example: · 8 unmodified lines
295 clock-names = "apb_pclk";304 clock-names = "apb_pclk";
296 305
297 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;306 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
298 port {307 in-ports {
299 catu_in_port: endpoint {308 port {
300 slave-mode;309 catu_in_port: endpoint {
301 remote-endpoint = <&etr_out_port>;310 remote-endpoint = <&etr_out_port>;
311 };
302 };312 };
303 };313 };
304 };314 };
Documentation/devicetree/bindings/arm/cpu-capacity.txt+5−3
@@ -59,9 +59,11 @@ mhz values (normalized w.r.t. the highest value found while parsing the DT). · 58 unmodified lines
59===========================================59===========================================
60 60
61Example 1 (ARM 64-bit, 6-cpu system, two clusters):61Example 1 (ARM 64-bit, 6-cpu system, two clusters):
62capacities-dmips-mhz are scaled w.r.t. 1024 (cpu@0 and cpu@1)62The capacities-dmips-mhz or DMIPS/MHz values (scaled to 1024)
63supposing cluster0@max-freq=1100 and custer1@max-freq=850,63are 1024 and 578 for cluster0 and cluster1. Further normalization
64final capacities are 1024 for cluster0 and 446 for cluster164is done by the operating system based on cluster0@max-freq=1100 and
65custer1@max-freq=850, final capacities are 1024 for cluster0 and
66446 for cluster1 (576*850/1100).
65 67
66cpus {68cpus {
67 #address-cells = <2>;69 #address-cells = <2>;
Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp+31−3
@@ -14,7 +14,28 @@ Related properties: (none) · 13 unmodified lines
14 14
15Note:15Note:
16This enable method requires valid nodes compatible with16This enable method requires valid nodes compatible with
17"al,alpine-cpu-resume" and "al,alpine-nb-service"[1].17"al,alpine-cpu-resume" and "al,alpine-nb-service".
18
19
20* Alpine CPU resume registers
21
22The CPU resume register are used to define required resume address after
23reset.
24
25Properties:
26- compatible : Should contain "al,alpine-cpu-resume".
27- reg : Offset and length of the register set for the device
28
29
30* Alpine System-Fabric Service Registers
31
32The System-Fabric Service Registers allow various operation on CPU and
33system fabric, like powering CPUs off.
34
35Properties:
36- compatible : Should contain "al,alpine-sysfabric-service" and "syscon".
37- reg : Offset and length of the register set for the device
38
18 39
19Example:40Example:
20 41
@@ -48,5 +69,12 @@ cpus { · 27 unmodified lines
48 };69 };
49};70};
50 71
51--72cpu_resume {
52[1] arm/al,alpine.txt73 compatible = "al,alpine-cpu-resume";
74 reg = <0xfbff5ed0 0x30>;
75};
76
77nb_service {
78 compatible = "al,alpine-sysfabric-service", "syscon";
79 reg = <0xfb070000 0x10000>;
80};
Documentation/devicetree/bindings/arm/cpus.txt+2−2
@@ -276,7 +276,7 @@ described below. · 275 unmodified lines
276 Usage: optional276 Usage: optional
277 Value type: <prop-encoded-array>277 Value type: <prop-encoded-array>
278 Definition: A u32 value that represents the running time dynamic278 Definition: A u32 value that represents the running time dynamic
279 power coefficient in units of mW/MHz/uV^2. The279 power coefficient in units of uW/MHz/V^2. The
280 coefficient can either be calculated from power280 coefficient can either be calculated from power
281 measurements or derived by analysis.281 measurements or derived by analysis.
282 282
@@ -287,7 +287,7 @@ described below. · 4 unmodified lines
287 287
288 Pdyn = dynamic-power-coefficient * V^2 * f288 Pdyn = dynamic-power-coefficient * V^2 * f
289 289
290 where voltage is in uV, frequency is in MHz.290 where voltage is in V, frequency is in MHz.
291 291
292Example 1 (dual-cluster big.LITTLE system 32-bit):292Example 1 (dual-cluster big.LITTLE system 32-bit):
293 293
Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt+19−0
@@ -0,0 +1,19 @@
1Freescale DCFG
2
3DCFG is the device configuration unit, that provides general purpose
4configuration and status for the device. Such as setting the secondary
5core start address and release the secondary core from holdoff and startup.
6
7Required properties:
8 - compatible: Should contain a chip-specific compatible string,
9 Chip-specific strings are of the form "fsl,<chip>-dcfg",
10 The following <chip>s are known to be supported:
11 ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
12
13 - reg : should contain base address and length of DCFG memory-mapped registers
14
15Example:
16 dcfg: dcfg@1ee0000 {
17 compatible = "fsl,ls1021a-dcfg";
18 reg = <0x0 0x1ee0000 0x0 0x10000>;
19 };
Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt+19−0
@@ -0,0 +1,19 @@
1Freescale SCFG
2
3SCFG is the supplemental configuration unit, that provides SoC specific
4configuration and status registers for the chip. Such as getting PEX port
5status.
6
7Required properties:
8 - compatible: Should contain a chip-specific compatible string,
9 Chip-specific strings are of the form "fsl,<chip>-scfg",
10 The following <chip>s are known to be supported:
11 ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
12
13 - reg: should contain base address and length of SCFG memory-mapped registers
14
15Example:
16 scfg: scfg@1570000 {
17 compatible = "fsl,ls1021a-scfg";
18 reg = <0x0 0x1570000 0x0 0x10000>;
19 };
Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt+183−0
@@ -0,0 +1,183 @@
1NXP i.MX System Controller Firmware (SCFW)
2--------------------------------------------------------------------
3
4The System Controller Firmware (SCFW) is a low-level system function
5which runs on a dedicated Cortex-M core to provide power, clock, and
6resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
7(QM, QP), and i.MX8QX (QXP, DX).
8
9The AP communicates with the SC using a multi-ported MU module found
10in the LSIO subsystem. The current definition of this MU module provides
115 remote AP connections to the SC to support up to 5 execution environments
12(TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
13with the LSIO DSC IP bus. The SC firmware will communicate with this MU
14using the MSI bus.
15
16System Controller Device Node:
17============================================================
18
19The scu node with the following properties shall be under the /firmware/ node.
20
21Required properties:
22-------------------
23- compatible: should be "fsl,imx-scu".
24- mbox-names: should include "tx0", "tx1", "tx2", "tx3",
25 "rx0", "rx1", "rx2", "rx3".
26- mboxes: List of phandle of 4 MU channels for tx and 4 MU channels
27 for rx. All 8 MU channels must be in the same MU instance.
28 Cross instances are not allowed. The MU instance can only
29 be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
30 to make sure use the one which is not conflict with other
31 execution environments. e.g. ATF.
32 Note:
33 Channel 0 must be "tx0" or "rx0".
34 Channel 1 must be "tx1" or "rx1".
35 Channel 2 must be "tx2" or "rx2".
36 Channel 3 must be "tx3" or "rx3".
37 e.g.
38 mboxes = <&lsio_mu1 0 0
39 &lsio_mu1 0 1
40 &lsio_mu1 0 2
41 &lsio_mu1 0 3
42 &lsio_mu1 1 0
43 &lsio_mu1 1 1
44 &lsio_mu1 1 2
45 &lsio_mu1 1 3>;
46 See Documentation/devicetree/bindings/mailbox/fsl,mu.txt
47 for detailed mailbox binding.
48
49i.MX SCU Client Device Node:
50============================================================
51
52Client nodes are maintained as children of the relevant IMX-SCU device node.
53
54Power domain bindings based on SCU Message Protocol
55------------------------------------------------------------
56
57This binding for the SCU power domain providers uses the generic power
58domain binding[2].
59
60Required properties:
61- compatible: Should be "fsl,scu-pd".
62- #address-cells: Should be 1.
63- #size-cells: Should be 0.
64
65Required properties for power domain sub nodes:
66- #power-domain-cells: Must be 0.
67
68Optional Properties:
69- reg: Resource ID of this power domain.
70 No exist means uncontrollable by user.
71 See detailed Resource ID list from:
72 include/dt-bindings/power/imx-rsrc.h
73- power-domains: phandle pointing to the parent power domain.
74
75Clock bindings based on SCU Message Protocol
76------------------------------------------------------------
77
78This binding uses the common clock binding[1].
79
80Required properties:
81- compatible: Should be "fsl,imx8qxp-clock".
82- #clock-cells: Should be 1. Contains the Clock ID value.
83- clocks: List of clock specifiers, must contain an entry for
84 each required entry in clock-names
85- clock-names: Should include entries "xtal_32KHz", "xtal_24MHz"
86
87The clock consumer should specify the desired clock by having the clock
88ID in its "clocks" phandle cell.
89
90See the full list of clock IDs from:
91include/dt-bindings/clock/imx8qxp-clock.h
92
93Pinctrl bindings based on SCU Message Protocol
94------------------------------------------------------------
95
96This binding uses the i.MX common pinctrl binding[3].
97
98Required properties:
99- compatible: Should be "fsl,imx8qxp-iomuxc".
100
101Required properties for Pinctrl sub nodes:
102- fsl,pins: Each entry consists of 3 integers which represents
103 the mux and config setting for one pin. The first 2
104 integers <pin_id mux_mode> are specified using a
105 PIN_FUNC_ID macro, which can be found in
106 <dt-bindings/pinctrl/pads-imx8qxp.h>.
107 The last integer CONFIG is the pad setting value like
108 pull-up on this pin.
109
110 Please refer to i.MX8QXP Reference Manual for detailed
111 CONFIG settings.
112
113[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
114[2] Documentation/devicetree/bindings/power/power_domain.txt
115[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
116
117Example (imx8qxp):
118-------------
119lsio_mu1: mailbox@5d1c0000 {
120 ...
121 #mbox-cells = <2>;
122};
123
124firmware {
125 scu {
126 compatible = "fsl,imx-scu";
127 mbox-names = "tx0", "tx1", "tx2", "tx3",
128 "rx0", "rx1", "rx2", "rx3";
129 mboxes = <&lsio_mu1 0 0
130 &lsio_mu1 0 1
131 &lsio_mu1 0 2
132 &lsio_mu1 0 3
133 &lsio_mu1 1 0
134 &lsio_mu1 1 1
135 &lsio_mu1 1 2
136 &lsio_mu1 1 3>;
137
138 clk: clk {
139 compatible = "fsl,imx8qxp-clk";
140 #clock-cells = <1>;
141 };
142
143 iomuxc {
144 compatible = "fsl,imx8qxp-iomuxc";
145
146 pinctrl_lpuart0: lpuart0grp {
147 fsl,pins = <
148 SC_P_UART0_RX_ADMA_UART0_RX 0x06000020
149 SC_P_UART0_TX_ADMA_UART0_TX 0x06000020
150 >;
151 };
152 ...
153 };
154
155 imx8qx-pm {
156 compatible = "fsl,scu-pd";
157 #address-cells = <1>;
158 #size-cells = <0>;
159
160 pd_dma: dma-power-domain {
161 #power-domain-cells = <0>;
162
163 pd_dma_lpuart0: dma-lpuart0@57 {
164 reg = <SC_R_UART_0>;
165 #power-domain-cells = <0>;
166 power-domains = <&pd_dma>;
167 };
168 ...
169 };
170 ...
171 };
172 };
173};
174
175serial@5a060000 {
176 ...
177 pinctrl-names = "default";
178 pinctrl-0 = <&pinctrl_lpuart0>;
179 clocks = <&clk IMX8QXP_UART0_CLK>,
180 <&clk IMX8QXP_UART0_IPG_CLK>;
181 clock-names = "per", "ipg";
182 power-domains = <&pd_dma_lpuart0>;
183};
Documentation/devicetree/bindings/arm/fsl.txt+44−39
@@ -57,6 +57,50 @@ i.MX6SLL EVK board · 56 unmodified lines
57Required root node properties:57Required root node properties:
58 - compatible = "fsl,imx6sll-evk", "fsl,imx6sll";58 - compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
59 59
60i.MX6 Quad Plus SABRE Smart Device Board
61Required root node properties:
62 - compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
63
64i.MX6 Quad Plus SABRE Automotive Board
65Required root node properties:
66 - compatible = "fsl,imx6qp-sabreauto", "fsl,imx6qp";
67
68i.MX6 DualLite SABRE Smart Device Board
69Required root node properties:
70 - compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
71
72i.MX6 DualLite/Solo SABRE Automotive Board
73Required root node properties:
74 - compatible = "fsl,imx6dl-sabreauto", "fsl,imx6dl";
75
76i.MX6 SoloLite EVK Board
77Required root node properties:
78 - compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
79
80i.MX6 UltraLite 14x14 EVK Board
81Required root node properties:
82 - compatible = "fsl,imx6ul-14x14-evk", "fsl,imx6ul";
83
84i.MX6 UltraLiteLite 14x14 EVK Board
85Required root node properties:
86 - compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
87
88i.MX6 ULZ 14x14 EVK Board
89Required root node properties:
90 - compatible = "fsl,imx6ulz-14x14-evk", "fsl,imx6ull", "fsl,imx6ulz";
91
92i.MX6 SoloX SDB Board
93Required root node properties:
94 - compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
95
96i.MX6 SoloX Sabre Auto Board
97Required root node properties:
98 - compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
99
100i.MX7 SabreSD Board
101Required root node properties:
102 - compatible = "fsl,imx7d-sdb", "fsl,imx7d";
103
60Generic i.MX boards104Generic i.MX boards
61-------------------105-------------------
62 106
@@ -101,45 +145,6 @@ Freescale LS1021A Platform Device Tree Bindings · 38 unmodified lines
101Required root node compatible properties:145Required root node compatible properties:
102 - compatible = "fsl,ls1021a";146 - compatible = "fsl,ls1021a";
103 147
104Freescale SoC-specific Device Tree Bindings
105-------------------------------------------
106
107Freescale SCFG
108 SCFG is the supplemental configuration unit, that provides SoC specific
109configuration and status registers for the chip. Such as getting PEX port
110status.
111 Required properties:
112 - compatible: Should contain a chip-specific compatible string,
113 Chip-specific strings are of the form "fsl,<chip>-scfg",
114 The following <chip>s are known to be supported:
115 ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
116
117 - reg: should contain base address and length of SCFG memory-mapped registers
118
119Example:
120 scfg: scfg@1570000 {
121 compatible = "fsl,ls1021a-scfg";
122 reg = <0x0 0x1570000 0x0 0x10000>;
123 };
124
125Freescale DCFG
126 DCFG is the device configuration unit, that provides general purpose
127configuration and status for the device. Such as setting the secondary
128core start address and release the secondary core from holdoff and startup.
129 Required properties:
130 - compatible: Should contain a chip-specific compatible string,
131 Chip-specific strings are of the form "fsl,<chip>-dcfg",
132 The following <chip>s are known to be supported:
133 ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.
134
135 - reg : should contain base address and length of DCFG memory-mapped registers
136
137Example:
138 dcfg: dcfg@1ee0000 {
139 compatible = "fsl,ls1021a-dcfg";
140 reg = <0x0 0x1ee0000 0x0 0x10000>;
141 };
142
143Freescale ARMv8 based Layerscape SoC family Device Tree Bindings148Freescale ARMv8 based Layerscape SoC family Device Tree Bindings
144----------------------------------------------------------------149----------------------------------------------------------------
145 150
Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt+8−0
@@ -8,6 +8,14 @@ HiKey960 Board · 7 unmodified lines
8Required root node properties:8Required root node properties:
9 - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";9 - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
10 10
11Hi3670 SoC
12Required root node properties:
13 - compatible = "hisilicon,hi3670";
14
15HiKey970 Board
16Required root node properties:
17 - compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670";
18
11Hi3798cv200 SoC19Hi3798cv200 SoC
12Required root node properties:20Required root node properties:
13 - compatible = "hisilicon,hi3798cv200";21 - compatible = "hisilicon,hi3798cv200";
Documentation/devicetree/bindings/arm/keystone/ti,sci.txt+4−0
@@ -45,11 +45,15 @@ Optional Properties: · 44 unmodified lines
45 debug_messages - Map the Debug message region45 debug_messages - Map the Debug message region
46- reg: register space corresponding to the debug_messages46- reg: register space corresponding to the debug_messages
47- ti,system-reboot-controller: If system reboot can be triggered by SoC reboot47- ti,system-reboot-controller: If system reboot can be triggered by SoC reboot
48- ti,host-id: Integer value corresponding to the host ID assigned by Firmware
49 for identification of host processing entities such as virtual
50 machines
48 51
49Example (K2G):52Example (K2G):
50-------------53-------------
51 pmmc: pmmc {54 pmmc: pmmc {
52 compatible = "ti,k2g-sci";55 compatible = "ti,k2g-sci";
56 ti,host-id = <2>;
53 mbox-names = "rx", "tx";57 mbox-names = "rx", "tx";
54 mboxes= <&msgmgr &msgmgr_proxy_pmmc_rx>,58 mboxes= <&msgmgr &msgmgr_proxy_pmmc_rx>,
55 <&msgmgr &msgmgr_proxy_pmmc_tx>;59 <&msgmgr &msgmgr_proxy_pmmc_tx>;
Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt+1−0
@@ -10,6 +10,7 @@ Required Properties: · 9 unmodified lines
10 - "mediatek,mt2712-apmixedsys", "syscon"10 - "mediatek,mt2712-apmixedsys", "syscon"
11 - "mediatek,mt6797-apmixedsys"11 - "mediatek,mt6797-apmixedsys"
12 - "mediatek,mt7622-apmixedsys"12 - "mediatek,mt7622-apmixedsys"
13 - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys"
13 - "mediatek,mt8135-apmixedsys"14 - "mediatek,mt8135-apmixedsys"
14 - "mediatek,mt8173-apmixedsys"15 - "mediatek,mt8173-apmixedsys"
15- #clock-cells: Must be 116- #clock-cells: Must be 1
Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt+1−0
@@ -8,6 +8,7 @@ Required Properties: · 7 unmodified lines
8- compatible: Should be one of:8- compatible: Should be one of:
9 - "mediatek,mt2701-audsys", "syscon"9 - "mediatek,mt2701-audsys", "syscon"
10 - "mediatek,mt7622-audsys", "syscon"10 - "mediatek,mt7622-audsys", "syscon"
11 - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"
11- #clock-cells: Must be 112- #clock-cells: Must be 1
12 13
13The AUDSYS controller uses the common clk binding from14The AUDSYS controller uses the common clk binding from
Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt+1−0
@@ -8,6 +8,7 @@ Required Properties: · 7 unmodified lines
8- compatible: Should be:8- compatible: Should be:
9 - "mediatek,mt2701-bdpsys", "syscon"9 - "mediatek,mt2701-bdpsys", "syscon"
10 - "mediatek,mt2712-bdpsys", "syscon"10 - "mediatek,mt2712-bdpsys", "syscon"
11 - "mediatek,mt7623-bdpsys", "mediatek,mt2701-bdpsys", "syscon"
11- #clock-cells: Must be 112- #clock-cells: Must be 1
12 13
13The bdpsys controller uses the common clk binding from14The bdpsys controller uses the common clk binding from
Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt+1−0
@@ -8,6 +8,7 @@ Required Properties: · 7 unmodified lines
8- compatible: Should be:8- compatible: Should be:
9 - "mediatek,mt2701-ethsys", "syscon"9 - "mediatek,mt2701-ethsys", "syscon"
10 - "mediatek,mt7622-ethsys", "syscon"10 - "mediatek,mt7622-ethsys", "syscon"
11 - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
11- #clock-cells: Must be 112- #clock-cells: Must be 1
12- #reset-cells: Must be 113- #reset-cells: Must be 1
13 14
Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt+1−0
@@ -9,6 +9,7 @@ Required Properties: · 8 unmodified lines
9- compatible: Should be:9- compatible: Should be:
10 - "mediatek,mt2701-hifsys", "syscon"10 - "mediatek,mt2701-hifsys", "syscon"
11 - "mediatek,mt7622-hifsys", "syscon"11 - "mediatek,mt7622-hifsys", "syscon"
12 - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon"
12- #clock-cells: Must be 113- #clock-cells: Must be 1
13 14
14The hifsys controller uses the common clk binding from15The hifsys controller uses the common clk binding from
Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt+1−0
@@ -9,6 +9,7 @@ Required Properties: · 8 unmodified lines
9 - "mediatek,mt2701-imgsys", "syscon"9 - "mediatek,mt2701-imgsys", "syscon"
10 - "mediatek,mt2712-imgsys", "syscon"10 - "mediatek,mt2712-imgsys", "syscon"
11 - "mediatek,mt6797-imgsys", "syscon"11 - "mediatek,mt6797-imgsys", "syscon"
12 - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"
12 - "mediatek,mt8173-imgsys", "syscon"13 - "mediatek,mt8173-imgsys", "syscon"
13- #clock-cells: Must be 114- #clock-cells: Must be 1
14 15
Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt+1−0
@@ -11,6 +11,7 @@ Required Properties: · 10 unmodified lines
11 - "mediatek,mt2712-infracfg", "syscon"11 - "mediatek,mt2712-infracfg", "syscon"
12 - "mediatek,mt6797-infracfg", "syscon"12 - "mediatek,mt6797-infracfg", "syscon"
13 - "mediatek,mt7622-infracfg", "syscon"13 - "mediatek,mt7622-infracfg", "syscon"
14 - "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon"
14 - "mediatek,mt8135-infracfg", "syscon"15 - "mediatek,mt8135-infracfg", "syscon"
15 - "mediatek,mt8173-infracfg", "syscon"16 - "mediatek,mt8173-infracfg", "syscon"
16- #clock-cells: Must be 117- #clock-cells: Must be 1
Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt+1−0
@@ -9,6 +9,7 @@ Required Properties: · 8 unmodified lines
9 - "mediatek,mt2701-mmsys", "syscon"9 - "mediatek,mt2701-mmsys", "syscon"
10 - "mediatek,mt2712-mmsys", "syscon"10 - "mediatek,mt2712-mmsys", "syscon"
11 - "mediatek,mt6797-mmsys", "syscon"11 - "mediatek,mt6797-mmsys", "syscon"
12 - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon"
12 - "mediatek,mt8173-mmsys", "syscon"13 - "mediatek,mt8173-mmsys", "syscon"
13- #clock-cells: Must be 114- #clock-cells: Must be 1
14 15
Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt+1−0
@@ -10,6 +10,7 @@ Required Properties: · 9 unmodified lines
10 - "mediatek,mt2701-pericfg", "syscon"10 - "mediatek,mt2701-pericfg", "syscon"
11 - "mediatek,mt2712-pericfg", "syscon"11 - "mediatek,mt2712-pericfg", "syscon"
12 - "mediatek,mt7622-pericfg", "syscon"12 - "mediatek,mt7622-pericfg", "syscon"
13 - "mediatek,mt7623-pericfg", "mediatek,mt2701-pericfg", "syscon"
13 - "mediatek,mt8135-pericfg", "syscon"14 - "mediatek,mt8135-pericfg", "syscon"
14 - "mediatek,mt8173-pericfg", "syscon"15 - "mediatek,mt8173-pericfg", "syscon"
15- #clock-cells: Must be 116- #clock-cells: Must be 1
Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt+1−0
@@ -10,6 +10,7 @@ Required Properties: · 9 unmodified lines
10 - "mediatek,mt2712-topckgen", "syscon"10 - "mediatek,mt2712-topckgen", "syscon"
11 - "mediatek,mt6797-topckgen"11 - "mediatek,mt6797-topckgen"
12 - "mediatek,mt7622-topckgen"12 - "mediatek,mt7622-topckgen"
13 - "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen"
13 - "mediatek,mt8135-topckgen"14 - "mediatek,mt8135-topckgen"
14 - "mediatek,mt8173-topckgen"15 - "mediatek,mt8173-topckgen"
15- #clock-cells: Must be 116- #clock-cells: Must be 1
Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt+1−0
@@ -9,6 +9,7 @@ Required Properties: · 8 unmodified lines
9 - "mediatek,mt2701-vdecsys", "syscon"9 - "mediatek,mt2701-vdecsys", "syscon"
10 - "mediatek,mt2712-vdecsys", "syscon"10 - "mediatek,mt2712-vdecsys", "syscon"
11 - "mediatek,mt6797-vdecsys", "syscon"11 - "mediatek,mt6797-vdecsys", "syscon"
12 - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
12 - "mediatek,mt8173-vdecsys", "syscon"13 - "mediatek,mt8173-vdecsys", "syscon"
13- #clock-cells: Must be 114- #clock-cells: Must be 1
14 15
Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt+19−0
@@ -21,10 +21,29 @@ PROPERTIES · 20 unmodified lines
21 the register region. An optional second element specifies21 the register region. An optional second element specifies
22 the base address and size of the alias register region.22 the base address and size of the alias register region.
23 23
24- clocks:
25 Usage: required
26 Value type: <prop-encoded-array>
27 Definition: reference to the pll parents.
28
29- clock-names:
30 Usage: required
31 Value type: <stringlist>
32 Definition: must be "pll8_vote", "pxo".
33
34- clock-output-names:
35 Usage: optional
36 Value type: <string>
37 Definition: Name of the output clock. Typically acpuX_aux where X is a
38 CPU number starting at 0.
39
24Example:40Example:
25 41
26 clock-controller@2088000 {42 clock-controller@2088000 {
27 compatible = "qcom,kpss-acc-v2";43 compatible = "qcom,kpss-acc-v2";
28 reg = <0x02088000 0x1000>,44 reg = <0x02088000 0x1000>,
29 <0x02008000 0x1000>;45 <0x02008000 0x1000>;
46 clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
47 clock-names = "pll8_vote", "pxo";
48 clock-output-names = "acpu0_aux";
30 };49 };
Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt+44−0
@@ -0,0 +1,44 @@
1Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
2
3PROPERTIES
4
5- compatible:
6 Usage: required
7 Value type: <string>
8 Definition: should be one of the following. The generic compatible
9 "qcom,kpss-gcc" should also be included.
10 "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"
11 "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc"
12 "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc"
13 "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc"
14
15- reg:
16 Usage: required
17 Value type: <prop-encoded-array>
18 Definition: base address and size of the register region
19
20- clocks:
21 Usage: required
22 Value type: <prop-encoded-array>
23 Definition: reference to the pll parents.
24
25- clock-names:
26 Usage: required
27 Value type: <stringlist>
28 Definition: must be "pll8_vote", "pxo".
29
30- clock-output-names:
31 Usage: required
32 Value type: <string>
33 Definition: Name of the output clock. Typically acpu_l2_aux indicating
34 an L2 cache auxiliary clock.
35
36Example:
37
38 l2cc: clock-controller@2011000 {
39 compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc";
40 reg = <0x2011000 0x1000>;
41 clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
42 clock-names = "pll8_vote", "pxo";
43 clock-output-names = "acpu_l2_aux";
44 };
Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt+17−2
@@ -16,11 +16,26 @@ Properties: · 15 unmodified lines
16- reg:16- reg:
17 Usage: required17 Usage: required
18 Value Type: <prop-encoded-array>18 Value Type: <prop-encoded-array>
19 Definition: Start address and the the size of the register region.19 Definition: The first element specifies the llcc base start address and
20 the size of the register region. The second element specifies
21 the llcc broadcast base address and size of the register region.
22
23- reg-names:
24 Usage: required
25 Value Type: <stringlist>
26 Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base".
27
28- interrupts:
29 Usage: required
30 Definition: The interrupt is associated with the llcc edac device.
31 It's used for llcc cache single and double bit error detection
32 and reporting.
20 33
21Example:34Example:
22 35
23 cache-controller@1100000 {36 cache-controller@1100000 {
24 compatible = "qcom,sdm845-llcc";37 compatible = "qcom,sdm845-llcc";
25 reg = <0x1100000 0x250000>;38 reg = <0x1100000 0x200000>, <0x1300000 0x50000> ;
39 reg-names = "llcc_base", "llcc_broadcast_base";
40 interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
26 };41 };
Documentation/devicetree/bindings/arm/rockchip.txt+20−0
@@ -5,6 +5,10 @@ Rockchip platforms device tree bindings · 4 unmodified lines
5 Required root node properties:5 Required root node properties:
6 - compatible = "vamrs,ficus", "rockchip,rk3399";6 - compatible = "vamrs,ficus", "rockchip,rk3399";
7 7
8- 96boards RK3399 Rock960 (ROCK960 Consumer Edition)
9 Required root node properties:
10 - compatible = "vamrs,rock960", "rockchip,rk3399";
11
8- Amarula Vyasa RK3288 board12- Amarula Vyasa RK3288 board
9 Required root node properties:13 Required root node properties:
10 - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";14 - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
@@ -13,6 +17,10 @@ Rockchip platforms device tree bindings · 2 unmodified lines
13 Required root node properties:17 Required root node properties:
14 - compatible = "asus,rk3288-tinker", "rockchip,rk3288";18 - compatible = "asus,rk3288-tinker", "rockchip,rk3288";
15 19
20- Asus Tinker board S
21 Required root node properties:
22 - compatible = "asus,rk3288-tinker-s", "rockchip,rk3288";
23
16- Kylin RK3036 board:24- Kylin RK3036 board:
17 Required root node properties:25 Required root node properties:
18 - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036";26 - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036";
@@ -59,6 +67,10 @@ Rockchip platforms device tree bindings · 40 unmodified lines
59 Required root node properties:67 Required root node properties:
60 - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";68 - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
61 69
70- Firefly ROC-RK3399-PC board:
71 Required root node properties:
72 - compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";
73
62- ChipSPARK PopMetal-RK3288 board:74- ChipSPARK PopMetal-RK3288 board:
63 Required root node properties:75 Required root node properties:
64 - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";76 - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
@@ -160,6 +172,10 @@ Rockchip platforms device tree bindings · 95 unmodified lines
160 Required root node properties:172 Required root node properties:
161 - compatible = "pine64,rock64", "rockchip,rk3328";173 - compatible = "pine64,rock64", "rockchip,rk3328";
162 174
175- Pine64 RockPro64 board:
176 Required root node properties:
177 - compatible = "pine64,rockpro64", "rockchip,rk3399";
178
163- Rockchip PX3 Evaluation board:179- Rockchip PX3 Evaluation board:
164 Required root node properties:180 Required root node properties:
165 - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";181 - compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
@@ -168,6 +184,10 @@ Rockchip platforms device tree bindings · 2 unmodified lines
168 Required root node properties:184 Required root node properties:
169 - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";185 - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
170 186
187- Rockchip PX30 Evaluation board:
188 Required root node properties:
189 - compatible = "rockchip,px30-evb", "rockchip,px30";
190
171- Rockchip RV1108 Evaluation board191- Rockchip RV1108 Evaluation board
172 Required root node properties:192 Required root node properties:
173 - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";193 - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";
Documentation/devicetree/bindings/arm/scu.txt+1−1
@@ -22,7 +22,7 @@ References: · 21 unmodified lines
22 22
23Example:23Example:
24 24
25scu@a04100000 {25scu@a0410000 {
26 compatible = "arm,cortex-a9-scu";26 compatible = "arm,cortex-a9-scu";
27 reg = <0xa0410000 0x100>;27 reg = <0xa0410000 0x100>;
28};28};
Documentation/devicetree/bindings/arm/secure.txt+18−1
@@ -32,7 +32,8 @@ describe the view of Secure world using the standard bindings. These · 31 unmodified lines
32secure- bindings only need to be used where both the Secure and Normal32secure- bindings only need to be used where both the Secure and Normal
33world views need to be described in a single device tree.33world views need to be described in a single device tree.
34 34
35Valid Secure world properties:35Valid Secure world properties
36-----------------------------
36 37
37- secure-status : specifies whether the device is present and usable38- secure-status : specifies whether the device is present and usable
38 in the secure world. The combination of this with "status" allows39 in the secure world. The combination of this with "status" allows
@@ -51,3 +52,19 @@ Valid Secure world properties: · 12 unmodified lines
51 status = "disabled"; secure-status = "okay"; /* S-only */52 status = "disabled"; secure-status = "okay"; /* S-only */
52 status = "disabled"; /* disabled in both */53 status = "disabled"; /* disabled in both */
53 status = "disabled"; secure-status = "disabled"; /* disabled in both */54 status = "disabled"; secure-status = "disabled"; /* disabled in both */
55
56The secure-chosen node
57----------------------
58
59Similar to the /chosen node which serves as a place for passing data
60between firmware and the operating system, the /secure-chosen node may
61be used to pass data to the Secure OS. Only the properties defined
62below may appear in the /secure-chosen node.
63
64- stdout-path : specifies the device to be used by the Secure OS for
65 its console output. The syntax is the same as for /chosen/stdout-path.
66 If the /secure-chosen node exists but the stdout-path property is not
67 present, the Secure OS should not perform any console output. If
68 /secure-chosen does not exist, the Secure OS should use the value of
69 /chosen/stdout-path instead (that is, use the same device as the
70 Normal world OS).
Documentation/devicetree/bindings/arm/shmobile.txt+12−4
@@ -7,6 +7,8 @@ SoCs: · 6 unmodified lines
7 compatible = "renesas,emev2"7 compatible = "renesas,emev2"
8 - RZ/A1H (R7S72100)8 - RZ/A1H (R7S72100)
9 compatible = "renesas,r7s72100"9 compatible = "renesas,r7s72100"
10 - RZ/A2 (R7S9210)
11 compatible = "renesas,r7s9210"
10 - SH-Mobile AG5 (R8A73A00/SH73A0)12 - SH-Mobile AG5 (R8A73A00/SH73A0)
11 compatible = "renesas,sh73a0"13 compatible = "renesas,sh73a0"
12 - R-Mobile APE6 (R8A73A40)14 - R-Mobile APE6 (R8A73A40)
@@ -23,6 +25,10 @@ SoCs: · 10 unmodified lines
23 compatible = "renesas,r8a7745"25 compatible = "renesas,r8a7745"
24 - RZ/G1C (R8A77470)26 - RZ/G1C (R8A77470)
25 compatible = "renesas,r8a77470"27 compatible = "renesas,r8a77470"
28 - RZ/G2M (R8A774A1)
29 compatible = "renesas,r8a774a1"
30 - RZ/G2E (R8A774C0)
31 compatible = "renesas,r8a774c0"
26 - R-Car M1A (R8A77781)32 - R-Car M1A (R8A77781)
27 compatible = "renesas,r8a7778"33 compatible = "renesas,r8a7778"
28 - R-Car H1 (R8A77790)34 - R-Car H1 (R8A77790)
@@ -107,6 +113,8 @@ Boards: · 78 unmodified lines
107 compatible = "renesas,lager", "renesas,r8a7790"113 compatible = "renesas,lager", "renesas,r8a7790"
108 - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))114 - M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
109 compatible = "renesas,m3ulcb", "renesas,r8a7796"115 compatible = "renesas,m3ulcb", "renesas,r8a7796"
116 - M3NULCB (R-Car Starter Kit Pro, RTP0RC77965SKBX010SA00 (M3-N ES1.1))
117 compatible = "renesas,m3nulcb", "renesas,r8a77965"
110 - Marzen (R0P7779A00010S)118 - Marzen (R0P7779A00010S)
111 compatible = "renesas,marzen", "renesas,r8a7779"119 compatible = "renesas,marzen", "renesas,r8a7779"
112 - Porter (M2-LCDP)120 - Porter (M2-LCDP)
@@ -143,12 +151,12 @@ Boards: · 30 unmodified lines
143 compatible = "renesas,wheat", "renesas,r8a7792"151 compatible = "renesas,wheat", "renesas,r8a7792"
144 152
145 153
146Most Renesas ARM SoCs have a Product Register that allows to retrieve SoC154Most Renesas ARM SoCs have a Product Register or Boundary Scan ID Register that
147product and revision information. If present, a device node for this register155allows to retrieve SoC product and revision information. If present, a device
148should be added.156node for this register should be added.
149 157
150Required properties:158Required properties:
151 - compatible: Must be "renesas,prr".159 - compatible: Must be "renesas,prr" or "renesas,bsid"
152 - reg: Base address and length of the register block.160 - reg: Base address and length of the register block.
153 161
154 162
Documentation/devicetree/bindings/arm/syna.txtrenamed from Documentation/devicetree/bindings/arm/marvell/marvell,berlin.txt+10−1
@@ -1,4 +1,9 @@
1Marvell Berlin SoC Family Device Tree Bindings1Synaptics SoC Device Tree Bindings
2
3According to https://www.synaptics.com/company/news/conexant-marvell
4Synaptics has acquired the Multimedia Solutions Business of Marvell, so
5berlin SoCs are now Synaptics' SoCs now.
6
2---------------------------------------------------------------7---------------------------------------------------------------
3 8
4Work in progress statement:9Work in progress statement:
@@ -13,6 +18,10 @@ stable binding/ABI. · 8 unmodified lines
13 18
14---------------------------------------------------------------19---------------------------------------------------------------
15 20
21Boards with the Synaptics AS370 SoC shall have the following properties:
22 Required root node property:
23 compatible: "syna,as370"
24
16Boards with a SoC of the Marvell Berlin family, e.g. Armada 150025Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
17shall have the following properties:26shall have the following properties:
18 27
Documentation/devicetree/bindings/arm/tegra.txt+7−2
@@ -47,12 +47,17 @@ board-specific compatible values: · 46 unmodified lines
47 nvidia,ventana47 nvidia,ventana
48 toradex,apalis_t3048 toradex,apalis_t30
49 toradex,apalis_t30-eval49 toradex,apalis_t30-eval
50 toradex,apalis_t30-v1.1
51 toradex,apalis_t30-v1.1-eval
50 toradex,apalis-tk152 toradex,apalis-tk1
51 toradex,apalis-tk1-eval53 toradex,apalis-tk1-eval
52 toradex,colibri_t20-51254 toradex,apalis-tk1-v1.2
55 toradex,apalis-tk1-v1.2-eval
56 toradex,colibri_t20
57 toradex,colibri_t20-eval-v3
58 toradex,colibri_t20-iris
53 toradex,colibri_t3059 toradex,colibri_t30
54 toradex,colibri_t30-eval-v360 toradex,colibri_t30-eval-v3
55 toradex,iris
56 61
57Trusted Foundations62Trusted Foundations
58-------------------------------------------63-------------------------------------------
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt+93−0
@@ -34,3 +34,96 @@ Board DTS: · 33 unmodified lines
34 pmc@c360000 {34 pmc@c360000 {
35 nvidia,invert-interrupt;35 nvidia,invert-interrupt;
36 };36 };
37
38== Pad Control ==
39
40On Tegra SoCs a pad is a set of pins which are configured as a group.
41The pin grouping is a fixed attribute of the hardware. The PMC can be
42used to set pad power state and signaling voltage. A pad can be either
43in active or power down mode. The support for power state and signaling
44voltage configuration varies depending on the pad in question. 3.3 V and
451.8 V signaling voltages are supported on pins where software
46controllable signaling voltage switching is available.
47
48Pad configurations are described with pin configuration nodes which
49are placed under the pmc node and they are referred to by the pinctrl
50client properties. For more information see
51Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
52
53The following pads are present on Tegra186:
54csia csib dsi mipi-bias
55pex-clk-bias pex-clk3 pex-clk2 pex-clk1
56usb0 usb1 usb2 usb-bias
57uart audio hsic dbg
58hdmi-dp0 hdmi-dp1 pex-cntrl sdmmc2-hv
59sdmmc4 cam dsib dsic
60dsid csic csid csie
61dsif spi ufs dmic-hv
62edp sdmmc1-hv sdmmc3-hv conn
63audio-hv ao-hv
64
65Required pin configuration properties:
66 - pins: A list of strings, each of which contains the name of a pad
67 to be configured.
68
69Optional pin configuration properties:
70 - low-power-enable: Configure the pad into power down mode
71 - low-power-disable: Configure the pad into active mode
72 - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
73 TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
74 The values are defined in
75 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
76
77Note: The power state can be configured on all of the above pads except
78 for ao-hv. Following pads have software configurable signaling
79 voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv,
80 ao-hv.
81
82Pad configuration state example:
83 pmc: pmc@7000e400 {
84 compatible = "nvidia,tegra186-pmc";
85 reg = <0 0x0c360000 0 0x10000>,
86 <0 0x0c370000 0 0x10000>,
87 <0 0x0c380000 0 0x10000>,
88 <0 0x0c390000 0 0x10000>;
89 reg-names = "pmc", "wake", "aotag", "scratch";
90
91 ...
92
93 sdmmc1_3v3: sdmmc1-3v3 {
94 pins = "sdmmc1-hv";
95 power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
96 };
97
98 sdmmc1_1v8: sdmmc1-1v8 {
99 pins = "sdmmc1-hv";
100 power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
101 };
102
103 hdmi_off: hdmi-off {
104 pins = "hdmi";
105 low-power-enable;
106 }
107
108 hdmi_on: hdmi-on {
109 pins = "hdmi";
110 low-power-disable;
111 }
112 };
113
114Pinctrl client example:
115 sdmmc1: sdhci@3400000 {
116 ...
117 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
118 pinctrl-0 = <&sdmmc1_3v3>;
119 pinctrl-1 = <&sdmmc1_1v8>;
120 };
121
122 ...
123
124 sor0: sor@15540000 {
125 ...
126 pinctrl-0 = <&hdmi_off>;
127 pinctrl-1 = <&hdmi_on>;
128 pinctrl-names = "hdmi-on", "hdmi-off";
129 };
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt+103−0
@@ -195,3 +195,106 @@ Example: · 194 unmodified lines
195 power-domains = <&pd_audio>;195 power-domains = <&pd_audio>;
196 ...196 ...
197 };197 };
198
199== Pad Control ==
200
201On Tegra SoCs a pad is a set of pins which are configured as a group.
202The pin grouping is a fixed attribute of the hardware. The PMC can be
203used to set pad power state and signaling voltage. A pad can be either
204in active or power down mode. The support for power state and signaling
205voltage configuration varies depending on the pad in question. 3.3 V and
2061.8 V signaling voltages are supported on pins where software
207controllable signaling voltage switching is available.
208
209The pad configuration state nodes are placed under the pmc node and they
210are referred to by the pinctrl client properties. For more information
211see Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
212The pad name should be used as the value of the pins property in pin
213configuration nodes.
214
215The following pads are present on Tegra124 and Tegra132:
216audio bb cam comp
217csia csb cse dsi
218dsib dsic dsid hdmi
219hsic hv lvds mipi-bias
220nand pex-bias pex-clk1 pex-clk2
221pex-cntrl sdmmc1 sdmmc3 sdmmc4
222sys_ddc uart usb0 usb1
223usb2 usb_bias
224
225The following pads are present on Tegra210:
226audio audio-hv cam csia
227csib csic csid csie
228csif dbg debug-nonao dmic
229dp dsi dsib dsic
230dsid emmc emmc2 gpio
231hdmi hsic lvds mipi-bias
232pex-bias pex-clk1 pex-clk2 pex-cntrl
233sdmmc1 sdmmc3 spi spi-hv
234uart usb0 usb1 usb2
235usb3 usb-bias
236
237Required pin configuration properties:
238 - pins: Must contain name of the pad(s) to be configured.
239
240Optional pin configuration properties:
241 - low-power-enable: Configure the pad into power down mode
242 - low-power-disable: Configure the pad into active mode
243 - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8
244 or TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
245 The values are defined in
246 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
247
248Note: The power state can be configured on all of the Tegra124 and
249 Tegra132 pads. None of the Tegra124 or Tegra132 pads support
250 signaling voltage switching.
251
252Note: All of the listed Tegra210 pads except pex-cntrl support power
253 state configuration. Signaling voltage switching is supported on
254 following Tegra210 pads: audio, audio-hv, cam, dbg, dmic, gpio,
255 pex-cntrl, sdmmc1, sdmmc3, spi, spi-hv, and uart.
256
257Pad configuration state example:
258 pmc: pmc@7000e400 {
259 compatible = "nvidia,tegra210-pmc";
260 reg = <0x0 0x7000e400 0x0 0x400>;
261 clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
262 clock-names = "pclk", "clk32k_in";
263
264 ...
265
266 sdmmc1_3v3: sdmmc1-3v3 {
267 pins = "sdmmc1";
268 power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
269 };
270
271 sdmmc1_1v8: sdmmc1-1v8 {
272 pins = "sdmmc1";
273 power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
274 };
275
276 hdmi_off: hdmi-off {
277 pins = "hdmi";
278 low-power-enable;
279 }
280
281 hdmi_on: hdmi-on {
282 pins = "hdmi";
283 low-power-disable;
284 }
285 };
286
287Pinctrl client example:
288 sdmmc1: sdhci@700b0000 {
289 ...
290 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
291 pinctrl-0 = <&sdmmc1_3v3>;
292 pinctrl-1 = <&sdmmc1_1v8>;
293 };
294 ...
295 sor@54540000 {
296 ...
297 pinctrl-0 = <&hdmi_off>;
298 pinctrl-1 = <&hdmi_on>;
299 pinctrl-names = "hdmi-on", "hdmi-off";
300 };
Documentation/devicetree/bindings/arm/ux500/boards.txt+1−1
@@ -60,7 +60,7 @@ Example: · 59 unmodified lines
60 <0xa0410100 0x100>;60 <0xa0410100 0x100>;
61 };61 };
62 62
63 scu@a04100000 {63 scu@a0410000 {
64 compatible = "arm,cortex-a9-scu";64 compatible = "arm,cortex-a9-scu";
65 reg = <0xa0410000 0x100>;65 reg = <0xa0410000 0x100>;
66 };66 };
Documentation/devicetree/bindings/arm/zte,sysctrl.txt+30−0
@@ -0,0 +1,30 @@
1ZTE sysctrl Registers
2
3Registers for 'zte,zx296702' SoC:
4
5System management required properties:
6 - compatible = "zte,sysctrl"
7
8Low power management required properties:
9 - compatible = "zte,zx296702-pcu"
10
11Bus matrix required properties:
12 - compatible = "zte,zx-bus-matrix"
13
14
15Registers for 'zte,zx296718' SoC:
16
17System management required properties:
18 - compatible = "zte,zx296718-aon-sysctrl"
19 - compatible = "zte,zx296718-sysctrl"
20
21Example:
22aon_sysctrl: aon-sysctrl@116000 {
23 compatible = "zte,zx296718-aon-sysctrl", "syscon";
24 reg = <0x116000 0x1000>;
25};
26
27sysctrl: sysctrl@1463000 {
28 compatible = "zte,zx296718-sysctrl", "syscon";
29 reg = <0x1463000 0x1000>;
30};
Documentation/devicetree/bindings/arm/zte.txt+1−26
@@ -1,20 +1,10 @@
1ZTE platforms device tree bindings1ZTE platforms device tree bindings
2---------------------------------------
3 2
3---------------------------------------
4- ZX296702 board:4- ZX296702 board:
5 Required root node properties:5 Required root node properties:
6 - compatible = "zte,zx296702-ad1", "zte,zx296702"6 - compatible = "zte,zx296702-ad1", "zte,zx296702"
7 7
8System management required properties:
9 - compatible = "zte,sysctrl"
10
11Low power management required properties:
12 - compatible = "zte,zx296702-pcu"
13
14Bus matrix required properties:
15 - compatible = "zte,zx-bus-matrix"
16
17
18---------------------------------------8---------------------------------------
19- ZX296718 SoC:9- ZX296718 SoC:
20 Required root node properties:10 Required root node properties:
@@ -22,18 +12,3 @@ Bus matrix required properties: · 1 unmodified line
22 12
23ZX296718 EVB board:13ZX296718 EVB board:
24 - "zte,zx296718-evb"14 - "zte,zx296718-evb"
25
26System management required properties:
27 - compatible = "zte,zx296718-aon-sysctrl"
28 - compatible = "zte,zx296718-sysctrl"
29
30Example:
31aon_sysctrl: aon-sysctrl@116000 {
32 compatible = "zte,zx296718-aon-sysctrl", "syscon";
33 reg = <0x116000 0x1000>;
34};
35
36sysctrl: sysctrl@1463000 {
37 compatible = "zte,zx296718-sysctrl", "syscon";
38 reg = <0x1463000 0x1000>;
39};
Documentation/devicetree/bindings/ata/ahci-platform.txt+5−1
@@ -10,6 +10,7 @@ PHYs. · 9 unmodified lines
10Required properties:10Required properties:
11- compatible : compatible string, one of:11- compatible : compatible string, one of:
12 - "allwinner,sun4i-a10-ahci"12 - "allwinner,sun4i-a10-ahci"
13 - "allwinner,sun8i-r40-ahci"
13 - "brcm,iproc-ahci"14 - "brcm,iproc-ahci"
14 - "hisilicon,hisi-ahci"15 - "hisilicon,hisi-ahci"
15 - "cavium,octeon-7130-ahci"16 - "cavium,octeon-7130-ahci"
@@ -31,8 +32,10 @@ Optional properties: · 15 unmodified lines
31- clocks : a list of phandle + clock specifier pairs32- clocks : a list of phandle + clock specifier pairs
32- resets : a list of phandle + reset specifier pairs33- resets : a list of phandle + reset specifier pairs
33- target-supply : regulator for SATA target power34- target-supply : regulator for SATA target power
35- phy-supply : regulator for PHY power
34- phys : reference to the SATA PHY node36- phys : reference to the SATA PHY node
35- phy-names : must be "sata-phy"37- phy-names : must be "sata-phy"
38- ahci-supply : regulator for AHCI controller
36- ports-implemented : Mask that indicates which ports that the HBA supports39- ports-implemented : Mask that indicates which ports that the HBA supports
37 are available for software to use. Useful if PORTS_IMPL40 are available for software to use. Useful if PORTS_IMPL
38 is not programmed by the BIOS, which is true with41 is not programmed by the BIOS, which is true with
@@ -42,12 +45,13 @@ Required properties when using sub-nodes: · 3 unmodified lines
42- #address-cells : number of cells to encode an address45- #address-cells : number of cells to encode an address
43- #size-cells : number of cells representing the size of an address46- #size-cells : number of cells representing the size of an address
44 47
48For allwinner,sun8i-r40-ahci, the reset propertie must be present.
45 49
46Sub-nodes required properties:50Sub-nodes required properties:
47- reg : the port number51- reg : the port number
48And at least one of the following properties:52And at least one of the following properties:
49- phys : reference to the SATA PHY node53- phys : reference to the SATA PHY node
50- target-supply : regulator for SATA target power54- target-supply : regulator for SATA target power
51 55
52Examples:56Examples:
53 sata@ffe08000 {57 sata@ffe08000 {
Documentation/devicetree/bindings/ata/brcm,sata-brcm.txt+1−0
@@ -9,6 +9,7 @@ Required properties: · 8 unmodified lines
9 "brcm,bcm7445-ahci"9 "brcm,bcm7445-ahci"
10 "brcm,bcm-nsp-ahci"10 "brcm,bcm-nsp-ahci"
11 "brcm,sata3-ahci"11 "brcm,sata3-ahci"
12 "brcm,bcm63138-ahci"
12- reg : register mappings for AHCI and SATA_TOP_CTRL13- reg : register mappings for AHCI and SATA_TOP_CTRL
13- reg-names : "ahci" and "top-ctrl"14- reg-names : "ahci" and "top-ctrl"
14- interrupts : interrupt mapping for SATA IRQ15- interrupts : interrupt mapping for SATA IRQ
Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt+6−3
@@ -1,11 +1,14 @@
1Device tree bindings for Allwinner A64 DE2 bus1Device tree bindings for Allwinner DE2/3 bus
2 2
3The Allwinner A64 DE2 is on a special bus, which needs a SRAM region (SRAM C)3The Allwinner A64 DE2 is on a special bus, which needs a SRAM region (SRAM C)
4to be claimed for enabling the access.4to be claimed for enabling the access. The DE3 on Allwinner H6 is at the same
5situation, and the binding also applies.
5 6
6Required properties:7Required properties:
7 8
8 - compatible: Should contain "allwinner,sun50i-a64-de2"9 - compatible: Should be one of:
10 - "allwinner,sun50i-a64-de2"
11 - "allwinner,sun50i-h6-de3", "allwinner,sun50i-a64-de2"
9 - reg: A resource specifier for the register space12 - reg: A resource specifier for the register space
10 - #address-cells: Must be set to 113 - #address-cells: Must be set to 1
11 - #size-cells: Must be set to 114 - #size-cells: Must be set to 1
Documentation/devicetree/bindings/clock/actions,owl-cmu.txt+2−0
@@ -13,6 +13,7 @@ Required Properties: · 12 unmodified lines
13 region.13 region.
14- clocks: Reference to the parent clocks ("hosc", "losc")14- clocks: Reference to the parent clocks ("hosc", "losc")
15- #clock-cells: should be 1.15- #clock-cells: should be 1.
16- #reset-cells: should be 1.
16 17
17Each clock is assigned an identifier, and client nodes can use this identifier18Each clock is assigned an identifier, and client nodes can use this identifier
18to specify the clock which they consume.19to specify the clock which they consume.
@@ -36,6 +37,7 @@ Example: Clock Management Unit node: · 17 unmodified lines
36 reg = <0x0 0xe0160000 0x0 0x1000>;37 reg = <0x0 0xe0160000 0x0 0x1000>;
37 clocks = <&hosc>, <&losc>;38 clocks = <&hosc>, <&losc>;
38 #clock-cells = <1>;39 #clock-cells = <1>;
40 #reset-cells = <1>;
39 };41 };
40 42
41Example: UART controller node that consumes clock generated by the clock43Example: UART controller node that consumes clock generated by the clock
Documentation/devicetree/bindings/clock/at91-clock.txt+21−495
@@ -4,6 +4,8 @@ This binding uses the common clock binding[1]. · 3 unmodified lines
4 4
5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
6 6
7Slow Clock controller:
8
7Required properties:9Required properties:
8- compatible : shall be one of the following:10- compatible : shall be one of the following:
9 "atmel,at91sam9x5-sckc" or11 "atmel,at91sam9x5-sckc" or
@@ -16,84 +18,6 @@ Required properties: · 6 unmodified lines
16 18
17 "atmel,at91sam9x5-clk-slow-rc-osc":19 "atmel,at91sam9x5-clk-slow-rc-osc":
18 at91 internal slow RC oscillator20 at91 internal slow RC oscillator
19
20 "atmel,<chip>-pmc":
21 at91 PMC (Power Management Controller)
22 All at91 specific clocks (clocks defined below) must be child
23 node of the PMC node.
24 <chip> can be: at91rm9200, at91sam9260, at91sam9261,
25 at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9x5,
26 sama5d2, sama5d3 or sama5d4.
27
28 "atmel,at91sam9x5-clk-slow" (under sckc node)
29 or
30 "atmel,at91sam9260-clk-slow" (under pmc node):
31 at91 slow clk
32
33 "atmel,at91rm9200-clk-main-osc"
34 "atmel,at91sam9x5-clk-main-rc-osc"
35 at91 main clk sources
36
37 "atmel,at91sam9x5-clk-main"
38 "atmel,at91rm9200-clk-main":
39 at91 main clock
40
41 "atmel,at91rm9200-clk-master" or
42 "atmel,at91sam9x5-clk-master":
43 at91 master clock
44
45 "atmel,at91sam9x5-clk-peripheral" or
46 "atmel,at91rm9200-clk-peripheral":
47 at91 peripheral clocks
48
49 "atmel,at91rm9200-clk-pll" or
50 "atmel,at91sam9g45-clk-pll" or
51 "atmel,at91sam9g20-clk-pllb" or
52 "atmel,sama5d3-clk-pll":
53 at91 pll clocks
54
55 "atmel,at91sam9x5-clk-plldiv":
56 at91 plla divisor
57
58 "atmel,at91rm9200-clk-programmable" or
59 "atmel,at91sam9g45-clk-programmable" or
60 "atmel,at91sam9x5-clk-programmable":
61 at91 programmable clocks
62
63 "atmel,at91sam9x5-clk-smd":
64 at91 SMD (Soft Modem) clock
65
66 "atmel,at91rm9200-clk-system":
67 at91 system clocks
68
69 "atmel,at91rm9200-clk-usb" or
70 "atmel,at91sam9x5-clk-usb" or
71 "atmel,at91sam9n12-clk-usb":
72 at91 usb clock
73
74 "atmel,at91sam9x5-clk-utmi":
75 at91 utmi clock
76
77 "atmel,sama5d4-clk-h32mx":
78 at91 h32mx clock
79
80 "atmel,sama5d2-clk-generated":
81 at91 generated clock
82
83 "atmel,sama5d2-clk-audio-pll-frac":
84 at91 audio fractional pll
85
86 "atmel,sama5d2-clk-audio-pll-pad":
87 at91 audio pll CLK_AUDIO output pin
88
89 "atmel,sama5d2-clk-audio-pll-pmc"
90 at91 audio pll output on AUDIOPLLCLK that feeds the PMC
91 and can be used by peripheral clock or generic clock
92
93 "atmel,sama5d2-clk-i2s-mux" (under pmc node):
94 at91 I2S clock source selection
95
96Required properties for SCKC node:
97- reg : defines the IO memory reserved for the SCKC.21- reg : defines the IO memory reserved for the SCKC.
98- #size-cells : shall be 0 (reg is used to encode clk id).22- #size-cells : shall be 0 (reg is used to encode clk id).
99- #address-cells : shall be 1 (reg is used to encode clk id).23- #address-cells : shall be 1 (reg is used to encode clk id).
@@ -109,428 +33,30 @@ For example: · 9 unmodified lines
109 /* put at91 slow clocks here */33 /* put at91 slow clocks here */
110 };34 };
111 35
36Power Management Controller (PMC):
112 37
113Required properties for internal slow RC oscillator:38Required properties:
114- #clock-cells : from common clock binding; shall be set to 0.39- compatible : shall be "atmel,<chip>-pmc", "syscon":
115- clock-frequency : define the internal RC oscillator frequency.40 <chip> can be: at91rm9200, at91sam9260, at91sam9261,
116 41 at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,
117Optional properties:42 at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
118- clock-accuracy : define the internal RC oscillator accuracy.43 sama5d2, sama5d3 or sama5d4.
119 44- #clock-cells : from common clock binding; shall be set to 2. The first entry
120For example:45 is the type of the clock (core, system, peripheral or generated) and the
121 slow_rc_osc: slow_rc_osc {46 second entry its index as provided by the datasheet
122 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";47- clocks : Must contain an entry for each entry in clock-names.
123 clock-frequency = <32768>;48- clock-names: Must include the following entries: "slow_clk", "main_xtal"
124 clock-accuracy = <50000000>;
125 };
126
127Required properties for slow oscillator:
128- #clock-cells : from common clock binding; shall be set to 0.
129- clocks : shall encode the main osc source clk sources (see atmel datasheet).
130 49
131Optional properties:50Optional properties:
132- atmel,osc-bypass : boolean property. Set this when a clock signal is directly51- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
133 provided on XIN.52 provided on XIN.
134 53
135For example:54For example:
136 slow_osc: slow_osc {55 pmc: pmc@f0018000 {
137 compatible = "atmel,at91rm9200-clk-slow-osc";56 compatible = "atmel,sama5d4-pmc", "syscon";
138 #clock-cells = <0>;57 reg = <0xf0018000 0x120>;
139 clocks = <&slow_xtal>;58 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
140 };59 #clock-cells = <2>;
141 60 clocks = <&clk32k>, <&main_xtal>;
142Required properties for slow clock:61 clock-names = "slow_clk", "main_xtal";
143- #clock-cells : from common clock binding; shall be set to 0.
144- clocks : shall encode the slow clk sources (see atmel datasheet).
145
146For example:
147 clk32k: slck {
148 compatible = "atmel,at91sam9x5-clk-slow";
149 #clock-cells = <0>;
150 clocks = <&slow_rc_osc &slow_osc>;
151 };
152
153Required properties for PMC node:
154- reg : defines the IO memory reserved for the PMC.
155- #size-cells : shall be 0 (reg is used to encode clk id).
156- #address-cells : shall be 1 (reg is used to encode clk id).
157- interrupts : shall be set to PMC interrupt line.
158- interrupt-controller : tell that the PMC is an interrupt controller.
159- #interrupt-cells : must be set to 1. The first cell encodes the interrupt id,
160 and reflect the bit position in the PMC_ER/DR/SR registers.
161 You can use the dt macros defined in dt-bindings/clock/at91.h.
162 0 (AT91_PMC_MOSCS) -> main oscillator ready
163 1 (AT91_PMC_LOCKA) -> PLL A ready
164 2 (AT91_PMC_LOCKB) -> PLL B ready
165 3 (AT91_PMC_MCKRDY) -> master clock ready
166 6 (AT91_PMC_LOCKU) -> UTMI PLL clock ready
167 8 .. 15 (AT91_PMC_PCKRDY(id)) -> programmable clock ready
168 16 (AT91_PMC_MOSCSELS) -> main oscillator selected
169 17 (AT91_PMC_MOSCRCS) -> RC main oscillator stabilized
170 18 (AT91_PMC_CFDEV) -> clock failure detected
171
172For example:
173 pmc: pmc@fffffc00 {
174 compatible = "atmel,sama5d3-pmc";
175 interrupts = <1 4 7>;
176 interrupt-controller;
177 #interrupt-cells = <2>;
178 #size-cells = <0>;
179 #address-cells = <1>;
180
181 /* put at91 clocks here */
182 };
183
184Required properties for main clock internal RC oscillator:
185- interrupts : shall be set to "<0>".
186- clock-frequency : define the internal RC oscillator frequency.
187
188Optional properties:
189- clock-accuracy : define the internal RC oscillator accuracy.
190
191For example:
192 main_rc_osc: main_rc_osc {
193 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
194 interrupt-parent = <&pmc>;
195 interrupts = <0>;
196 clock-frequency = <12000000>;
197 clock-accuracy = <50000000>;
198 };
199
200Required properties for main clock oscillator:
201- interrupts : shall be set to "<0>".
202- #clock-cells : from common clock binding; shall be set to 0.
203- clocks : shall encode the main osc source clk sources (see atmel datasheet).
204
205Optional properties:
206- atmel,osc-bypass : boolean property. Specified if a clock signal is provided
207 on XIN.
208
209 clock signal is directly provided on XIN pin.
210
211For example:
212 main_osc: main_osc {
213 compatible = "atmel,at91rm9200-clk-main-osc";
214 interrupt-parent = <&pmc>;
215 interrupts = <0>;
216 #clock-cells = <0>;
217 clocks = <&main_xtal>;
218 };
219
220Required properties for main clock:
221- interrupts : shall be set to "<0>".
222- #clock-cells : from common clock binding; shall be set to 0.
223- clocks : shall encode the main clk sources (see atmel datasheet).
224
225For example:
226 main: mainck {
227 compatible = "atmel,at91sam9x5-clk-main";
228 interrupt-parent = <&pmc>;
229 interrupts = <0>;
230 #clock-cells = <0>;
231 clocks = <&main_rc_osc &main_osc>;
232 };
233
234Required properties for master clock:
235- interrupts : shall be set to "<3>".
236- #clock-cells : from common clock binding; shall be set to 0.
237- clocks : shall be the master clock sources (see atmel datasheet) phandles.
238 e.g. "<&ck32k>, <&main>, <&plla>, <&pllb>".
239- atmel,clk-output-range : minimum and maximum clock frequency (two u32
240 fields).
241 e.g. output = <0 133000000>; <=> 0 to 133MHz.
242- atmel,clk-divisors : master clock divisors table (four u32 fields).
243 0 <=> reserved value.
244 e.g. divisors = <1 2 4 6>;
245- atmel,master-clk-have-div3-pres : some SoC use the reserved value 7 in the
246 PRES field as CLOCK_DIV3 (e.g sam9x5).
247
248For example:
249 mck: mck {
250 compatible = "atmel,at91rm9200-clk-master";
251 interrupt-parent = <&pmc>;
252 interrupts = <3>;
253 #clock-cells = <0>;
254 atmel,clk-output-range = <0 133000000>;
255 atmel,clk-divisors = <1 2 4 0>;
256 };
257
258Required properties for peripheral clocks:
259- #size-cells : shall be 0 (reg is used to encode clk id).
260- #address-cells : shall be 1 (reg is used to encode clk id).
261- clocks : shall be the master clock phandle.
262 e.g. clocks = <&mck>;
263- name: device tree node describing a specific peripheral clock.
264 * #clock-cells : from common clock binding; shall be set to 0.
265 * reg: peripheral id. See Atmel's datasheets to get a full
266 list of peripheral ids.
267 * atmel,clk-output-range : minimum and maximum clock frequency
268 (two u32 fields). Only valid on at91sam9x5-clk-peripheral
269 compatible IPs.
270
271For example:
272 periph: periphck {
273 compatible = "atmel,at91sam9x5-clk-peripheral";
274 #size-cells = <0>;
275 #address-cells = <1>;
276 clocks = <&mck>;
277
278 ssc0_clk {
279 #clock-cells = <0>;
280 reg = <2>;
281 atmel,clk-output-range = <0 133000000>;
282 };
283
284 usart0_clk {
285 #clock-cells = <0>;
286 reg = <3>;
287 atmel,clk-output-range = <0 66000000>;
288 };
289 };
290
291
292Required properties for pll clocks:
293- interrupts : shall be set to "<1>".
294- #clock-cells : from common clock binding; shall be set to 0.
295- clocks : shall be the main clock phandle.
296- reg : pll id.
297 0 -> PLL A
298 1 -> PLL B
299- atmel,clk-input-range : minimum and maximum source clock frequency (two u32
300 fields).
301 e.g. input = <1 32000000>; <=> 1 to 32MHz.
302- #atmel,pll-clk-output-range-cells : number of cells reserved for pll output
303 range description. Sould be set to 2, 3
304 or 4.
305 * 1st and 2nd cells represent the frequency range (min-max).
306 * 3rd cell is optional and represents the OUT field value for the given
307 range.
308 * 4th cell is optional and represents the ICPLL field (PLLICPR
309 register)
310- atmel,pll-clk-output-ranges : pll output frequency ranges + optional parameter
311 depending on #atmel,pll-output-range-cells
312 property value.
313
314For example:
315 plla: pllack {
316 compatible = "atmel,at91sam9g45-clk-pll";
317 interrupt-parent = <&pmc>;
318 interrupts = <1>;
319 #clock-cells = <0>;
320 clocks = <&main>;
321 reg = <0>;
322 atmel,clk-input-range = <2000000 32000000>;
323 #atmel,pll-clk-output-range-cells = <4>;
324 atmel,pll-clk-output-ranges = <74500000 800000000 0 0
325 69500000 750000000 1 0
326 64500000 700000000 2 0
327 59500000 650000000 3 0
328 54500000 600000000 0 1
329 49500000 550000000 1 1
330 44500000 500000000 2 1
331 40000000 450000000 3 1>;
332 };
333
334Required properties for plldiv clocks (plldiv = pll / 2):
335- #clock-cells : from common clock binding; shall be set to 0.
336- clocks : shall be the plla clock phandle.
337
338The pll divisor is equal to 2 and cannot be changed.
339
340For example:
341 plladiv: plladivck {
342 compatible = "atmel,at91sam9x5-clk-plldiv";
343 #clock-cells = <0>;
344 clocks = <&plla>;
345 };
346
347Required properties for programmable clocks:
348- #size-cells : shall be 0 (reg is used to encode clk id).
349- #address-cells : shall be 1 (reg is used to encode clk id).
350- clocks : shall be the programmable clock source phandles.
351 e.g. clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
352- name: device tree node describing a specific prog clock.
353 * #clock-cells : from common clock binding; shall be set to 0.
354 * reg : programmable clock id (register offset from PCKx
355 register).
356 * interrupts : shall be set to "<(8 + id)>".
357
358For example:
359 prog: progck {
360 compatible = "atmel,at91sam9g45-clk-programmable";
361 #size-cells = <0>;
362 #address-cells = <1>;
363 interrupt-parent = <&pmc>;
364 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
365
366 prog0 {
367 #clock-cells = <0>;
368 reg = <0>;
369 interrupts = <8>;
370 };
371
372 prog1 {
373 #clock-cells = <0>;
374 reg = <1>;
375 interrupts = <9>;
376 };
377 };
378
379
380Required properties for smd clock:
381- #clock-cells : from common clock binding; shall be set to 0.
382- clocks : shall be the smd clock source phandles.
383 e.g. clocks = <&plladiv>, <&utmi>;
384
385For example:
386 smd: smdck {
387 compatible = "atmel,at91sam9x5-clk-smd";
388 #clock-cells = <0>;
389 clocks = <&plladiv>, <&utmi>;
390 };
391
392Required properties for system clocks:
393- #size-cells : shall be 0 (reg is used to encode clk id).
394- #address-cells : shall be 1 (reg is used to encode clk id).
395- name: device tree node describing a specific system clock.
396 * #clock-cells : from common clock binding; shall be set to 0.
397 * reg: system clock id (bit position in SCER/SCDR/SCSR registers).
398 See Atmel's datasheet to get a full list of system clock ids.
399
400For example:
401 system: systemck {
402 compatible = "atmel,at91rm9200-clk-system";
403 #address-cells = <1>;
404 #size-cells = <0>;
405
406 ddrck {
407 #clock-cells = <0>;
408 reg = <2>;
409 clocks = <&mck>;
410 };
411
412 uhpck {
413 #clock-cells = <0>;
414 reg = <6>;
415 clocks = <&usb>;
416 };
417
418 udpck {
419 #clock-cells = <0>;
420 reg = <7>;
421 clocks = <&usb>;
422 };
423 };
424
425
426Required properties for usb clock:
427- #clock-cells : from common clock binding; shall be set to 0.
428- clocks : shall be the smd clock source phandles.
429 e.g. clocks = <&pllb>;
430- atmel,clk-divisors (only available for "atmel,at91rm9200-clk-usb"):
431 usb clock divisor table.
432 e.g. divisors = <1 2 4 0>;
433
434For example:
435 usb: usbck {
436 compatible = "atmel,at91sam9x5-clk-usb";
437 #clock-cells = <0>;
438 clocks = <&plladiv>, <&utmi>;
439 };
440
441 usb: usbck {
442 compatible = "atmel,at91rm9200-clk-usb";
443 #clock-cells = <0>;
444 clocks = <&pllb>;
445 atmel,clk-divisors = <1 2 4 0>;
446 };
447
448
449Required properties for utmi clock:
450- interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>".
451- #clock-cells : from common clock binding; shall be set to 0.
452- clocks : shall be the main clock source phandle.
453
454For example:
455 utmi: utmick {
456 compatible = "atmel,at91sam9x5-clk-utmi";
457 interrupt-parent = <&pmc>;
458 interrupts = <AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>;
459 #clock-cells = <0>;
460 clocks = <&main>;
461 };
462
463Required properties for 32 bits bus Matrix clock (h32mx clock):
464- #clock-cells : from common clock binding; shall be set to 0.
465- clocks : shall be the master clock source phandle.
466
467For example:
468 h32ck: h32mxck {
469 #clock-cells = <0>;
470 compatible = "atmel,sama5d4-clk-h32mx";
471 clocks = <&mck>;
472 };
473
474Required properties for generated clocks:
475- #size-cells : shall be 0 (reg is used to encode clk id).
476- #address-cells : shall be 1 (reg is used to encode clk id).
477- clocks : shall be the generated clock source phandles.
478 e.g. clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>;
479- name: device tree node describing a specific generated clock.
480 * #clock-cells : from common clock binding; shall be set to 0.
481 * reg: peripheral id. See Atmel's datasheets to get a full
482 list of peripheral ids.
483 * atmel,clk-output-range : minimum and maximum clock frequency
484 (two u32 fields).
485
486For example:
487 gck {
488 compatible = "atmel,sama5d2-clk-generated";
489 #address-cells = <1>;
490 #size-cells = <0>;
491 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>;
492
493 tcb0_gclk: tcb0_gclk {
494 #clock-cells = <0>;
495 reg = <35>;
496 atmel,clk-output-range = <0 83000000>;
497 };
498
499 pwm_gclk: pwm_gclk {
500 #clock-cells = <0>;
501 reg = <38>;
502 atmel,clk-output-range = <0 83000000>;
503 };
504 };
505
506Required properties for I2S mux clocks:
507- #size-cells : shall be 0 (reg is used to encode I2S bus id).
508- #address-cells : shall be 1 (reg is used to encode I2S bus id).
509- name: device tree node describing a specific mux clock.
510 * #clock-cells : from common clock binding; shall be set to 0.
511 * clocks : shall be the mux clock parent phandles; shall be 2 phandles:
512 peripheral and generated clock; the first phandle shall belong to the
513 peripheral clock and the second one shall belong to the generated
514 clock; "clock-indices" property can be user to specify
515 the correct order.
516 * reg: I2S bus id of the corresponding mux clock.
517 e.g. reg = <0>; for i2s0, reg = <1>; for i2s1
518
519For example:
520 i2s_clkmux {
521 compatible = "atmel,sama5d2-clk-i2s-mux";
522 #address-cells = <1>;
523 #size-cells = <0>;
524
525 i2s0muxck: i2s0_muxclk {
526 clocks = <&i2s0_clk>, <&i2s0_gclk>;
527 #clock-cells = <0>;
528 reg = <0>;
529 };
530
531 i2s1muxck: i2s1_muxclk {
532 clocks = <&i2s1_clk>, <&i2s1_gclk>;
533 #clock-cells = <0>;
534 reg = <1>;
535 };
536 };62 };
Documentation/devicetree/bindings/clock/hi3670-clock.txt+43−0
@@ -0,0 +1,43 @@
1* Hisilicon Hi3670 Clock Controller
2
3The Hi3670 clock controller generates and supplies clock to various
4controllers within the Hi3670 SoC.
5
6Required Properties:
7
8- compatible: the compatible should be one of the following strings to
9 indicate the clock controller functionality.
10
11 - "hisilicon,hi3670-crgctrl"
12 - "hisilicon,hi3670-pctrl"
13 - "hisilicon,hi3670-pmuctrl"
14 - "hisilicon,hi3670-sctrl"
15 - "hisilicon,hi3670-iomcu"
16 - "hisilicon,hi3670-media1-crg"
17 - "hisilicon,hi3670-media2-crg"
18
19- reg: physical base address of the controller and length of memory mapped
20 region.
21
22- #clock-cells: should be 1.
23
24Each clock is assigned an identifier and client nodes use this identifier
25to specify the clock which they consume.
26
27All these identifier could be found in <dt-bindings/clock/hi3670-clock.h>.
28
29Examples:
30 crg_ctrl: clock-controller@fff35000 {
31 compatible = "hisilicon,hi3670-crgctrl", "syscon";
32 reg = <0x0 0xfff35000 0x0 0x1000>;
33 #clock-cells = <1>;
34 };
35
36 uart0: serial@fdf02000 {
37 compatible = "arm,pl011", "arm,primecell";
38 reg = <0x0 0xfdf02000 0x0 0x1000>;
39 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
40 clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
41 <&crg_ctrl HI3670_PCLK>;
42 clock-names = "uartclk", "apb_pclk";
43 };
Documentation/devicetree/bindings/clock/imx6q-clock.txt+8−0
@@ -6,6 +6,14 @@ Required properties: · 5 unmodified lines
6- interrupts: Should contain CCM interrupt6- interrupts: Should contain CCM interrupt
7- #clock-cells: Should be <1>7- #clock-cells: Should be <1>
8 8
9Optional properties:
10- fsl,pmic-stby-poweroff: Configure CCM to assert PMIC_STBY_REQ signal
11 on power off.
12 Use this property if the SoC should be powered off by external power
13 management IC (PMIC) triggered via PMIC_STBY_REQ signal.
14 Boards that are designed to initiate poweroff on PMIC_ON_REQ signal should
15 be using "syscon-poweroff" driver instead.
16
9The clock consumer should specify the desired clock by having the clock17The clock consumer should specify the desired clock by having the clock
10ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx6qdl-clock.h18ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx6qdl-clock.h
11for the full list of i.MX6 Quad and DualLite clock IDs.19for the full list of i.MX6 Quad and DualLite clock IDs.
Documentation/devicetree/bindings/clock/ingenic,cgu.txt+5−2
@@ -6,8 +6,11 @@ to provide many different clock signals derived from only 2 external source · 5 unmodified lines
6clocks.6clocks.
7 7
8Required properties:8Required properties:
9- compatible : Should be "ingenic,<soctype>-cgu".9- compatible : Should be one of:
10 For example "ingenic,jz4740-cgu" or "ingenic,jz4780-cgu".10 * ingenic,jz4740-cgu
11 * ingenic,jz4725b-cgu
12 * ingenic,jz4770-cgu
13 * ingenic,jz4780-cgu
11- reg : The address & length of the CGU registers.14- reg : The address & length of the CGU registers.
12- clocks : List of phandle & clock specifiers for clocks external to the CGU.15- clocks : List of phandle & clock specifiers for clocks external to the CGU.
13 Two such external clocks should be specified - first the external crystal16 Two such external clocks should be specified - first the external crystal
Documentation/devicetree/bindings/clock/qcom,camcc.txt+18−0
@@ -0,0 +1,18 @@
1Qualcomm Camera Clock & Reset Controller Binding
2------------------------------------------------
3
4Required properties :
5- compatible : shall contain "qcom,sdm845-camcc".
6- reg : shall contain base register location and length.
7- #clock-cells : from common clock binding, shall contain 1.
8- #reset-cells : from common reset binding, shall contain 1.
9- #power-domain-cells : from generic power domain binding, shall contain 1.
10
11Example:
12 camcc: clock-controller@ad00000 {
13 compatible = "qcom,sdm845-camcc";
14 reg = <0xad00000 0x10000>;
15 #clock-cells = <1>;
16 #reset-cells = <1>;
17 #power-domain-cells = <1>;
18 };
Documentation/devicetree/bindings/clock/qcom,gcc.txt+3−0
@@ -19,6 +19,9 @@ Required properties : · 18 unmodified lines
19 "qcom,gcc-msm8996"19 "qcom,gcc-msm8996"
20 "qcom,gcc-msm8998"20 "qcom,gcc-msm8998"
21 "qcom,gcc-mdm9615"21 "qcom,gcc-mdm9615"
22 "qcom,gcc-qcs404"
23 "qcom,gcc-sdm630"
24 "qcom,gcc-sdm660"
22 "qcom,gcc-sdm845"25 "qcom,gcc-sdm845"
23 26
24- reg : shall contain base register location and length27- reg : shall contain base register location and length
Documentation/devicetree/bindings/clock/qcom,hfpll.txt+60−0
@@ -0,0 +1,60 @@
1High-Frequency PLL (HFPLL)
2
3PROPERTIES
4
5- compatible:
6 Usage: required
7 Value type: <string>:
8 shall contain only one of the following. The generic
9 compatible "qcom,hfpll" should be also included.
10
11 "qcom,hfpll-ipq8064", "qcom,hfpll"
12 "qcom,hfpll-apq8064", "qcom,hfpll"
13 "qcom,hfpll-msm8974", "qcom,hfpll"
14 "qcom,hfpll-msm8960", "qcom,hfpll"
15
16- reg:
17 Usage: required
18 Value type: <prop-encoded-array>
19 Definition: address and size of HPLL registers. An optional second
20 element specifies the address and size of the alias
21 register region.
22
23- clocks:
24 Usage: required
25 Value type: <prop-encoded-array>
26 Definition: reference to the xo clock.
27
28- clock-names:
29 Usage: required
30 Value type: <stringlist>
31 Definition: must be "xo".
32
33- clock-output-names:
34 Usage: required
35 Value type: <string>
36 Definition: Name of the PLL. Typically hfpllX where X is a CPU number
37 starting at 0. Otherwise hfpll_Y where Y is more specific
38 such as "l2".
39
40Example:
41
421) An HFPLL for the L2 cache.
43
44 clock-controller@f9016000 {
45 compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
46 reg = <0xf9016000 0x30>;
47 clocks = <&xo_board>;
48 clock-names = "xo";
49 clock-output-names = "hfpll_l2";
50 };
51
522) An HFPLL for CPU0. This HFPLL has the alias register region.
53
54 clock-controller@f908a000 {
55 compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
56 reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
57 clocks = <&xo_board>;
58 clock-names = "xo";
59 clock-output-names = "hfpll0";
60 };
Documentation/devicetree/bindings/clock/qcom,krait-cc.txt+34−0
@@ -0,0 +1,34 @@
1Krait Clock Controller
2
3PROPERTIES
4
5- compatible:
6 Usage: required
7 Value type: <string>
8 Definition: must be one of:
9 "qcom,krait-cc-v1"
10 "qcom,krait-cc-v2"
11
12- #clock-cells:
13 Usage: required
14 Value type: <u32>
15 Definition: must be 1
16
17- clocks:
18 Usage: required
19 Value type: <prop-encoded-array>
20 Definition: reference to the clock parents of hfpll, secondary muxes.
21
22- clock-names:
23 Usage: required
24 Value type: <stringlist>
25 Definition: must be "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb".
26
27Example:
28
29 kraitcc: clock-controller {
30 compatible = "qcom,krait-cc-v1";
31 clocks = <&hfpll0>, <&hfpll1>, <&acpu0_aux>, <&acpu1_aux>, <qsb>;
32 clock-names = "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb";
33 #clock-cells = <1>;
34 };
Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt+11−6
@@ -13,9 +13,13 @@ They provide the following functionalities: · 12 unmodified lines
13 13
14Required Properties:14Required Properties:
15 - compatible: Must be one of:15 - compatible: Must be one of:
16 - "renesas,r7s9210-cpg-mssr" for the r7s9210 SoC (RZ/A2)
16 - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)17 - "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)
18 - "renesas,r8a7744-cpg-mssr" for the r8a7744 SoC (RZ/G1N)
17 - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E)19 - "renesas,r8a7745-cpg-mssr" for the r8a7745 SoC (RZ/G1E)
18 - "renesas,r8a77470-cpg-mssr" for the r8a77470 SoC (RZ/G1C)20 - "renesas,r8a77470-cpg-mssr" for the r8a77470 SoC (RZ/G1C)
21 - "renesas,r8a774a1-cpg-mssr" for the r8a774a1 SoC (RZ/G2M)
22 - "renesas,r8a774c0-cpg-mssr" for the r8a774c0 SoC (RZ/G2E)
19 - "renesas,r8a7790-cpg-mssr" for the r8a7790 SoC (R-Car H2)23 - "renesas,r8a7790-cpg-mssr" for the r8a7790 SoC (R-Car H2)
20 - "renesas,r8a7791-cpg-mssr" for the r8a7791 SoC (R-Car M2-W)24 - "renesas,r8a7791-cpg-mssr" for the r8a7791 SoC (R-Car M2-W)
21 - "renesas,r8a7792-cpg-mssr" for the r8a7792 SoC (R-Car V2H)25 - "renesas,r8a7792-cpg-mssr" for the r8a7792 SoC (R-Car V2H)
@@ -35,12 +39,13 @@ Required Properties: · 13 unmodified lines
35 - clocks: References to external parent clocks, one entry for each entry in39 - clocks: References to external parent clocks, one entry for each entry in
36 clock-names40 clock-names
37 - clock-names: List of external parent clock names. Valid names are:41 - clock-names: List of external parent clock names. Valid names are:
38 - "extal" (r8a7743, r8a7745, r8a77470, r8a7790, r8a7791, r8a7792,42 - "extal" (r7s9210, r8a7743, r8a7744, r8a7745, r8a77470, r8a774a1,
39 r8a7793, r8a7794, r8a7795, r8a7796, r8a77965, r8a77970,43 r8a774c0, r8a7790, r8a7791, r8a7792, r8a7793, r8a7794,
40 r8a77980, r8a77990, r8a77995)44 r8a7795, r8a7796, r8a77965, r8a77970, r8a77980, r8a77990,
41 - "extalr" (r8a7795, r8a7796, r8a77965, r8a77970, r8a77980)45 r8a77995)
42 - "usb_extal" (r8a7743, r8a7745, r8a77470, r8a7790, r8a7791, r8a7793,46 - "extalr" (r8a774a1, r8a7795, r8a7796, r8a77965, r8a77970, r8a77980)
43 r8a7794)47 - "usb_extal" (r8a7743, r8a7744, r8a7745, r8a77470, r8a7790, r8a7791,
48 r8a7793, r8a7794)
44 49
45 - #clock-cells: Must be 250 - #clock-cells: Must be 2
46 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"51 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
Documentation/devicetree/bindings/connector/usb-connector.txt+4−4
@@ -29,15 +29,15 @@ Required properties for usb-c-connector with power delivery support: · 28 unmodified lines
29 in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.229 in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.2
30 Source_Capabilities Message, the order of each entry(PDO) should follow30 Source_Capabilities Message, the order of each entry(PDO) should follow
31 the PD spec chapter 6.4.1. Required for power source and power dual role.31 the PD spec chapter 6.4.1. Required for power source and power dual role.
32 User can specify the source PDO array via PDO_FIXED/BATT/VAR() defined in32 User can specify the source PDO array via PDO_FIXED/BATT/VAR/PPS_APDO()
33 dt-bindings/usb/pd.h.33 defined in dt-bindings/usb/pd.h.
34- sink-pdos: An array of u32 with each entry providing supported power34- sink-pdos: An array of u32 with each entry providing supported power
35 sink data object(PDO), the detailed bit definitions of PDO can be found35 sink data object(PDO), the detailed bit definitions of PDO can be found
36 in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.336 in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.3
37 Sink Capabilities Message, the order of each entry(PDO) should follow37 Sink Capabilities Message, the order of each entry(PDO) should follow
38 the PD spec chapter 6.4.1. Required for power sink and power dual role.38 the PD spec chapter 6.4.1. Required for power sink and power dual role.
39 User can specify the sink PDO array via PDO_FIXED/BATT/VAR() defined in39 User can specify the sink PDO array via PDO_FIXED/BATT/VAR/PPS_APDO() defined
40 dt-bindings/usb/pd.h.40 in dt-bindings/usb/pd.h.
41- op-sink-microwatt: Sink required operating power in microwatt, if source41- op-sink-microwatt: Sink required operating power in microwatt, if source
42 can't offer the power, Capability Mismatch is set. Required for power42 can't offer the power, Capability Mismatch is set. Required for power
43 sink and power dual role.43 sink and power dual role.
Documentation/devicetree/bindings/cpufreq/arm_big_little_dt.txt+0−65
@@ -1,65 +0,0 @@
1Generic ARM big LITTLE cpufreq driver's DT glue
2-----------------------------------------------
3
4This is DT specific glue layer for generic cpufreq driver for big LITTLE
5systems.
6
7Both required and optional properties listed below must be defined
8under node /cpus/cpu@x. Where x is the first cpu inside a cluster.
9
10FIXME: Cpus should boot in the order specified in DT and all cpus for a cluster
11must be present contiguously. Generic DT driver will check only node 'x' for
12cpu:x.
13
14Required properties:
15- operating-points: Refer to Documentation/devicetree/bindings/opp/opp.txt
16 for details
17
18Optional properties:
19- clock-latency: Specify the possible maximum transition latency for clock,
20 in unit of nanoseconds.
21
22Examples:
23
24cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 cpu@0 {
29 compatible = "arm,cortex-a15";
30 reg = <0>;
31 next-level-cache = <&L2>;
32 operating-points = <
33 /* kHz uV */
34 792000 1100000
35 396000 950000
36 198000 850000
37 >;
38 clock-latency = <61036>; /* two CLK32 periods */
39 };
40
41 cpu@1 {
42 compatible = "arm,cortex-a15";
43 reg = <1>;
44 next-level-cache = <&L2>;
45 };
46
47 cpu@100 {
48 compatible = "arm,cortex-a7";
49 reg = <100>;
50 next-level-cache = <&L2>;
51 operating-points = <
52 /* kHz uV */
53 792000 950000
54 396000 750000
55 198000 450000
56 >;
57 clock-latency = <61036>; /* two CLK32 periods */
58 };
59
60 cpu@101 {
61 compatible = "arm,cortex-a7";
62 reg = <101>;
63 next-level-cache = <&L2>;
64 };
65};
Documentation/devicetree/bindings/crypto/hisilicon,hip07-sec.txt+1−1
@@ -24,7 +24,7 @@ Optional properties: · 23 unmodified lines
24 24
25Example:25Example:
26 26
27p1_sec_a: crypto@400,d2000000 {27p1_sec_a: crypto@400d2000000 {
28 compatible = "hisilicon,hip07-sec";28 compatible = "hisilicon,hip07-sec";
29 reg = <0x400 0xd0000000 0x0 0x1000029 reg = <0x400 0xd0000000 0x0 0x10000
30 0x400 0xd2000000 0x0 0x1000030 0x400 0xd2000000 0x0 0x10000
Documentation/devicetree/bindings/csky/cpus.txt+73−0
@@ -0,0 +1,73 @@
1==================
2C-SKY CPU Bindings
3==================
4
5The device tree allows to describe the layout of CPUs in a system through
6the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
7defining properties for every cpu.
8
9Only SMP system need to care about the cpus node and single processor
10needn't define cpus node at all.
11
12=====================================
13cpus and cpu node bindings definition
14=====================================
15
16- cpus node
17
18 Description: Container of cpu nodes
19
20 The node name must be "cpus".
21
22 A cpus node must define the following properties:
23
24 - #address-cells
25 Usage: required
26 Value type: <u32>
27 Definition: must be set to 1
28 - #size-cells
29 Usage: required
30 Value type: <u32>
31 Definition: must be set to 0
32
33- cpu node
34
35 Description: Describes one of SMP cores
36
37 PROPERTIES
38
39 - device_type
40 Usage: required
41 Value type: <string>
42 Definition: must be "cpu"
43 - reg
44 Usage: required
45 Value type: <u32>
46 Definition: CPU index
47 - compatible:
48 Usage: required
49 Value type: <string>
50 Definition: must contain "csky", eg:
51 "csky,610"
52 "csky,807"
53 "csky,810"
54 "csky,860"
55
56Example:
57--------
58
59 cpus {
60 #address-cells = <1>;
61 #size-cells = <0>;
62 cpu@0 {
63 device_type = "cpu";
64 reg = <0>;
65 status = "ok";
66 };
67
68 cpu@1 {
69 device_type = "cpu";
70 reg = <1>;
71 status = "ok";
72 };
73 };
Documentation/devicetree/bindings/display/himax,hx8357d.txt+26−0
@@ -0,0 +1,26 @@
1Himax HX8357D display panels
2
3This binding is for display panels using a Himax HX8357D controller in SPI
4mode, such as the Adafruit 3.5" TFT for Raspberry Pi.
5
6Required properties:
7- compatible: "adafruit,yx350hv15", "himax,hx8357d"
8- dc-gpios: D/C pin
9- reg: address of the panel on the SPI bus
10
11The node for this driver must be a child node of a SPI controller, hence
12all mandatory properties described in ../spi/spi-bus.txt must be specified.
13
14Optional properties:
15- rotation: panel rotation in degrees counter clockwise (0,90,180,270)
16- backlight: phandle of the backlight device attached to the panel
17
18Example:
19 display@0{
20 compatible = "adafruit,yx350hv15", "himax,hx8357d";
21 reg = <0>;
22 spi-max-frequency = <32000000>;
23 dc-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
24 rotation = <90>;
25 backlight = <&backlight>;
26 };
Documentation/devicetree/bindings/display/panel/bananapi,s070wv20-ct16.txt+12−0
@@ -0,0 +1,12 @@
1Banana Pi 7" (S070WV20-CT16) TFT LCD Panel
2
3Required properties:
4- compatible: should be "bananapi,s070wv20-ct16"
5- power-supply: see ./panel-common.txt
6
7Optional properties:
8- enable-gpios: see ./simple-panel.txt
9- backlight: see ./simple-panel.txt
10
11This binding is compatible with the simple-panel binding, which is specified
12in ./simple-panel.txt.
Documentation/devicetree/bindings/display/panel/cdtech,s043wq26h-ct7.txt+12−0
@@ -0,0 +1,12 @@
1CDTech(H.K.) Electronics Limited 4.3" 480x272 color TFT-LCD panel
2
3Required properties:
4- compatible: should be "cdtech,s043wq26h-ct7"
5- power-supply: as specified in the base binding
6
7Optional properties:
8- backlight: as specified in the base binding
9- enable-gpios: as specified in the base binding
10
11This binding is compatible with the simple-panel binding, which is specified
12in simple-panel.txt in this directory.
Documentation/devicetree/bindings/display/panel/cdtech,s070wv95-ct16.txt+12−0
@@ -0,0 +1,12 @@
1CDTech(H.K.) Electronics Limited 7" 800x480 color TFT-LCD panel
2
3Required properties:
4- compatible: should be "cdtech,s070wv95-ct16"
5- power-supply: as specified in the base binding
6
7Optional properties:
8- backlight: as specified in the base binding
9- enable-gpios: as specified in the base binding
10
11This binding is compatible with the simple-panel binding, which is specified
12in simple-panel.txt in this directory.
Documentation/devicetree/bindings/display/panel/dlc,dlc1010gig.txt+12−0
@@ -0,0 +1,12 @@
1DLC Display Co. DLC1010GIG 10.1" WXGA TFT LCD Panel
2
3Required properties:
4- compatible: should be "dlc,dlc1010gig"
5- power-supply: See simple-panel.txt
6
7Optional properties:
8- enable-gpios: See simple-panel.txt
9- backlight: See simple-panel.txt
10
11This binding is compatible with the simple-panel binding, which is specified
12in simple-panel.txt in this directory.
Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.txt+42−0
@@ -0,0 +1,42 @@
1Binding for Olimex Ltd. LCD-OLinuXino bridge panel.
2
3This device can be used as bridge between a host controller and LCD panels.
4Currently supported LCDs are:
5 - LCD-OLinuXino-4.3TS
6 - LCD-OLinuXino-5
7 - LCD-OLinuXino-7
8 - LCD-OLinuXino-10
9
10The panel itself contains:
11 - AT24C16C EEPROM holding panel identification and timing requirements
12 - AR1021 resistive touch screen controller (optional)
13 - FT5x6 capacitive touch screnn controller (optional)
14 - GT911/GT928 capacitive touch screen controller (optional)
15
16The above chips share same I2C bus. The EEPROM is factory preprogrammed with
17device information (id, serial, etc.) and timing requirements.
18
19Touchscreen bingings can be found in these files:
20 - input/touchscreen/goodix.txt
21 - input/touchscreen/edt-ft5x06.txt
22 - input/touchscreen/ar1021.txt
23
24Required properties:
25 - compatible: should be "olimex,lcd-olinuxino"
26 - reg: address of the configuration EEPROM, should be <0x50>
27 - power-supply: phandle of the regulator that provides the supply voltage
28
29Optional properties:
30 - enable-gpios: GPIO pin to enable or disable the panel
31 - backlight: phandle of the backlight device attacked to the panel
32
33Example:
34&i2c2 {
35 panel@50 {
36 compatible = "olimex,lcd-olinuxino";
37 reg = <0x50>;
38 power-supply = <&reg_vcc5v0>;
39 enable-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>;
40 backlight = <&backlight>;
41 };
42};
Documentation/devicetree/bindings/display/panel/samsung,s6d16d0.txt+30−0
@@ -0,0 +1,30 @@
1Samsung S6D16D0 4" 864x480 AMOLED panel
2
3Required properties:
4 - compatible: should be:
5 "samsung,s6d16d0",
6 - reg: the virtual channel number of a DSI peripheral
7 - vdd1-supply: I/O voltage supply
8 - reset-gpios: a GPIO spec for the reset pin (active low)
9
10The device node can contain one 'port' child node with one child
11'endpoint' node, according to the bindings defined in
12media/video-interfaces.txt. This node should describe panel's video bus.
13
14Example:
15&dsi {
16 ...
17
18 panel@0 {
19 compatible = "samsung,s6d16d0";
20 reg = <0>;
21 vdd1-supply = <&foo>;
22 reset-gpios = <&foo_gpio 0 GPIO_ACTIVE_LOW>;
23
24 port {
25 panel_in: endpoint {
26 remote-endpoint = <&dsi_out>;
27 };
28 };
29 };
30};
Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt+3−0
@@ -13,6 +13,7 @@ Required properties: · 12 unmodified lines
13 13
14- compatible: should be one of the following:14- compatible: should be one of the following:
15 "rockchip,rk3288-dw-hdmi"15 "rockchip,rk3288-dw-hdmi"
16 "rockchip,rk3328-dw-hdmi"
16 "rockchip,rk3399-dw-hdmi"17 "rockchip,rk3399-dw-hdmi"
17- reg: See dw_hdmi.txt.18- reg: See dw_hdmi.txt.
18- reg-io-width: See dw_hdmi.txt. Shall be 4.19- reg-io-width: See dw_hdmi.txt. Shall be 4.
@@ -34,6 +35,8 @@ Optional properties · 15 unmodified lines
34- clock-names: May contain "cec" as defined in dw_hdmi.txt.35- clock-names: May contain "cec" as defined in dw_hdmi.txt.
35- clock-names: May contain "grf", power for grf io.36- clock-names: May contain "grf", power for grf io.
36- clock-names: May contain "vpll", external clock for some hdmi phy.37- clock-names: May contain "vpll", external clock for some hdmi phy.
38- phys: from general PHY binding: the phandle for the PHY device.
39- phy-names: Should be "hdmi" if phys references an external phy.
37 40
38Example:41Example:
39 42
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt+21−9
@@ -79,6 +79,7 @@ Required properties: · 78 unmodified lines
79 - compatible: value must be one of:79 - compatible: value must be one of:
80 * "allwinner,sun8i-a83t-dw-hdmi"80 * "allwinner,sun8i-a83t-dw-hdmi"
81 * "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"81 * "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"
82 * "allwinner,sun50i-h6-dw-hdmi"
82 - reg: base address and size of memory-mapped region83 - reg: base address and size of memory-mapped region
83 - reg-io-width: See dw_hdmi.txt. Shall be 1.84 - reg-io-width: See dw_hdmi.txt. Shall be 1.
84 - interrupts: HDMI interrupt number85 - interrupts: HDMI interrupt number
@@ -86,9 +87,14 @@ Required properties: · 1 unmodified line
86 * iahb: the HDMI bus clock87 * iahb: the HDMI bus clock
87 * isfr: the HDMI register clock88 * isfr: the HDMI register clock
88 * tmds: TMDS clock89 * tmds: TMDS clock
90 * cec: HDMI CEC clock (H6 only)
91 * hdcp: HDCP clock (H6 only)
92 * hdcp-bus: HDCP bus clock (H6 only)
89 - clock-names: the clock names mentioned above93 - clock-names: the clock names mentioned above
90 - resets: phandle to the reset controller94 - resets:
91 - reset-names: must be "ctrl"95 * ctrl: HDMI controller reset
96 * hdcp: HDCP reset (H6 only)
97 - reset-names: reset names mentioned above
92 - phys: phandle to the DWC HDMI PHY98 - phys: phandle to the DWC HDMI PHY
93 - phy-names: must be "phy"99 - phy-names: must be "phy"
94 100
@@ -109,6 +115,7 @@ Required properties: · 14 unmodified lines
109 * allwinner,sun8i-h3-hdmi-phy115 * allwinner,sun8i-h3-hdmi-phy
110 * allwinner,sun8i-r40-hdmi-phy116 * allwinner,sun8i-r40-hdmi-phy
111 * allwinner,sun50i-a64-hdmi-phy117 * allwinner,sun50i-a64-hdmi-phy
118 * allwinner,sun50i-h6-hdmi-phy
112 - reg: base address and size of memory-mapped region119 - reg: base address and size of memory-mapped region
113 - clocks: phandles to the clocks feeding the HDMI PHY120 - clocks: phandles to the clocks feeding the HDMI PHY
114 * bus: the HDMI PHY interface clock121 * bus: the HDMI PHY interface clock
@@ -158,6 +165,7 @@ Required properties: · 43 unmodified lines
158 * allwinner,sun9i-a80-tcon-tv165 * allwinner,sun9i-a80-tcon-tv
159 * "allwinner,sun50i-a64-tcon-lcd", "allwinner,sun8i-a83t-tcon-lcd"166 * "allwinner,sun50i-a64-tcon-lcd", "allwinner,sun8i-a83t-tcon-lcd"
160 * "allwinner,sun50i-a64-tcon-tv", "allwinner,sun8i-a83t-tcon-tv"167 * "allwinner,sun50i-a64-tcon-tv", "allwinner,sun8i-a83t-tcon-tv"
168 * allwinner,sun50i-h6-tcon-tv, allwinner,sun8i-r40-tcon-tv
161 - reg: base address and size of memory-mapped region169 - reg: base address and size of memory-mapped region
162 - interrupts: interrupt associated to this IP170 - interrupts: interrupt associated to this IP
163 - clocks: phandles to the clocks feeding the TCON.171 - clocks: phandles to the clocks feeding the TCON.
@@ -220,24 +228,26 @@ It allows display pipeline to be configured in very different ways: · 56 unmodified lines
220 \ [3] TCON-TV1 [1] - TVE1/RGB228 \ [3] TCON-TV1 [1] - TVE1/RGB
221 229
222Note that both TCON TOP references same physical unit. Both mixers can be230Note that both TCON TOP references same physical unit. Both mixers can be
223connected to any TCON.231connected to any TCON. Not all TCON TOP variants support all features.
224 232
225Required properties:233Required properties:
226 - compatible: value must be one of:234 - compatible: value must be one of:
227 * allwinner,sun8i-r40-tcon-top235 * allwinner,sun8i-r40-tcon-top
236 * allwinner,sun50i-h6-tcon-top
228 - reg: base address and size of the memory-mapped region.237 - reg: base address and size of the memory-mapped region.
229 - clocks: phandle to the clocks feeding the TCON TOP238 - clocks: phandle to the clocks feeding the TCON TOP
230 * bus: TCON TOP interface clock239 * bus: TCON TOP interface clock
231 * tcon-tv0: TCON TV0 clock240 * tcon-tv0: TCON TV0 clock
232 * tve0: TVE0 clock241 * tve0: TVE0 clock (R40 only)
233 * tcon-tv1: TCON TV1 clock242 * tcon-tv1: TCON TV1 clock (R40 only)
234 * tve1: TVE0 clock243 * tve1: TVE0 clock (R40 only)
235 * dsi: MIPI DSI clock244 * dsi: MIPI DSI clock (R40 only)
236 - clock-names: clock name mentioned above245 - clock-names: clock name mentioned above
237 - resets: phandle to the reset line driving the TCON TOP246 - resets: phandle to the reset line driving the TCON TOP
238 - #clock-cells : must contain 1247 - #clock-cells : must contain 1
239 - clock-output-names: Names of clocks created for TCON TV0 channel clock,248 - clock-output-names: Names of clocks created for TCON TV0 channel clock,
240 TCON TV1 channel clock and DSI channel clock, in that order.249 TCON TV1 channel clock (R40 only) and DSI channel clock (R40 only), in
250 that order.
241 251
242- ports: A ports node with endpoint definitions as defined in252- ports: A ports node with endpoint definitions as defined in
243 Documentation/devicetree/bindings/media/video-interfaces.txt. 6 ports should253 Documentation/devicetree/bindings/media/video-interfaces.txt. 6 ports should
@@ -381,6 +391,7 @@ Required properties: · 137 unmodified lines
381 * allwinner,sun8i-v3s-de2-mixer391 * allwinner,sun8i-v3s-de2-mixer
382 * allwinner,sun50i-a64-de2-mixer-0392 * allwinner,sun50i-a64-de2-mixer-0
383 * allwinner,sun50i-a64-de2-mixer-1393 * allwinner,sun50i-a64-de2-mixer-1
394 * allwinner,sun50i-h6-de3-mixer-0
384 - reg: base address and size of the memory-mapped region.395 - reg: base address and size of the memory-mapped region.
385 - clocks: phandles to the clocks feeding the mixer396 - clocks: phandles to the clocks feeding the mixer
386 * bus: the mixer interface clock397 * bus: the mixer interface clock
@@ -415,9 +426,10 @@ Required properties: · 28 unmodified lines
415 * allwinner,sun8i-v3s-display-engine426 * allwinner,sun8i-v3s-display-engine
416 * allwinner,sun9i-a80-display-engine427 * allwinner,sun9i-a80-display-engine
417 * allwinner,sun50i-a64-display-engine428 * allwinner,sun50i-a64-display-engine
429 * allwinner,sun50i-h6-display-engine
418 430
419 - allwinner,pipelines: list of phandle to the display engine431 - allwinner,pipelines: list of phandle to the display engine
420 frontends (DE 1.0) or mixers (DE 2.0) available.432 frontends (DE 1.0) or mixers (DE 2.0/3.0) available.
421 433
422Example:434Example:
423 435
Documentation/devicetree/bindings/display/truly,nt35597.txt+59−0
@@ -0,0 +1,59 @@
1Truly model NT35597 DSI display driver
2
3The Truly NT35597 is a generic display driver, currently only configured
4for use in the 2K display on the Qualcomm SDM845 MTP board.
5
6Required properties:
7- compatible: should be "truly,nt35597-2K-display"
8- vdda-supply: phandle of the regulator that provides the supply voltage
9 Power IC supply
10- vdispp-supply: phandle of the regulator that provides the supply voltage
11 for positive LCD bias
12- vdispn-supply: phandle of the regulator that provides the supply voltage
13 for negative LCD bias
14- reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
16 (active low)
17- mode-gpios: phandle of the gpio for choosing the mode of the display
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
20- ports: This device has two video ports driven by two DSIs. Their connections
21 are modeled using the OF graph bindings specified in
22 Documentation/devicetree/bindings/graph.txt.
23 - port@0: DSI input port driven by master DSI
24 - port@1: DSI input port driven by secondary DSI
25
26Example:
27
28 dsi@ae94000 {
29 panel@0 {
30 compatible = "truly,nt35597-2K-display";
31 reg = <0>;
32 vdda-supply = <&pm8998_l14>;
33 vdispp-supply = <&lab_regulator>;
34 vdispn-supply = <&ibb_regulator>;
35 pinctrl-names = "default", "suspend";
36 pinctrl-0 = <&dpu_dsi_active>;
37 pinctrl-1 = <&dpu_dsi_suspend>;
38
39 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
40 mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
41 ports {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 port@0 {
45 reg = <0>;
46 panel0_in: endpoint {
47 remote-endpoint = <&dsi0_out>;
48 };
49 };
50
51 port@1 {
52 reg = <1>;
53 panel1_in: endpoint {
54 remote-endpoint = <&dsi1_out>;
55 };
56 };
57 };
58 };
59 };
Documentation/devicetree/bindings/dma/jz4780-dma.txt+10−4
@@ -2,8 +2,13 @@ · 1 unmodified line
2 2
3Required properties:3Required properties:
4 4
5- compatible: Should be "ingenic,jz4780-dma"5- compatible: Should be one of:
6- reg: Should contain the DMA controller registers location and length.6 * ingenic,jz4740-dma
7 * ingenic,jz4725b-dma
8 * ingenic,jz4770-dma
9 * ingenic,jz4780-dma
10- reg: Should contain the DMA channel registers location and length, followed
11 by the DMA controller registers location and length.
7- interrupts: Should contain the interrupt specifier of the DMA controller.12- interrupts: Should contain the interrupt specifier of the DMA controller.
8- clocks: Should contain a clock specifier for the JZ4780 PDMA clock.13- clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
9- #dma-cells: Must be <2>. Number of integer cells in the dmas property of14- #dma-cells: Must be <2>. Number of integer cells in the dmas property of
@@ -19,9 +24,10 @@ Optional properties: · 9 unmodified lines
19 24
20Example:25Example:
21 26
22dma: dma@13420000 {27dma: dma-controller@13420000 {
23 compatible = "ingenic,jz4780-dma";28 compatible = "ingenic,jz4780-dma";
24 reg = <0x13420000 0x10000>;29 reg = <0x13420000 0x400
30 0x13421000 0x40>;
25 31
26 interrupt-parent = <&intc>;32 interrupt-parent = <&intc>;
27 interrupts = <10>;33 interrupts = <10>;
Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt+1−0
@@ -17,6 +17,7 @@ Required Properties: · 16 unmodified lines
17- compatible: "renesas,dmac-<soctype>", "renesas,rcar-dmac" as fallback.17- compatible: "renesas,dmac-<soctype>", "renesas,rcar-dmac" as fallback.
18 Examples with soctypes are:18 Examples with soctypes are:
19 - "renesas,dmac-r8a7743" (RZ/G1M)19 - "renesas,dmac-r8a7743" (RZ/G1M)
20 - "renesas,dmac-r8a7744" (RZ/G1N)
20 - "renesas,dmac-r8a7745" (RZ/G1E)21 - "renesas,dmac-r8a7745" (RZ/G1E)
21 - "renesas,dmac-r8a77470" (RZ/G1C)22 - "renesas,dmac-r8a77470" (RZ/G1C)
22 - "renesas,dmac-r8a7790" (R-Car H2)23 - "renesas,dmac-r8a7790" (R-Car H2)
Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt+1−0
@@ -4,6 +4,7 @@ Required Properties: · 3 unmodified lines
4-compatible: "renesas,<soctype>-usb-dmac", "renesas,usb-dmac" as fallback.4-compatible: "renesas,<soctype>-usb-dmac", "renesas,usb-dmac" as fallback.
5 Examples with soctypes are:5 Examples with soctypes are:
6 - "renesas,r8a7743-usb-dmac" (RZ/G1M)6 - "renesas,r8a7743-usb-dmac" (RZ/G1M)
7 - "renesas,r8a7744-usb-dmac" (RZ/G1N)
7 - "renesas,r8a7745-usb-dmac" (RZ/G1E)8 - "renesas,r8a7745-usb-dmac" (RZ/G1E)
8 - "renesas,r8a7790-usb-dmac" (R-Car H2)9 - "renesas,r8a7790-usb-dmac" (R-Car H2)
9 - "renesas,r8a7791-usb-dmac" (R-Car M2-W)10 - "renesas,r8a7791-usb-dmac" (R-Car M2-W)
Documentation/devicetree/bindings/firmware/qcom,scm.txt+21−12
@@ -7,16 +7,23 @@ assorted actions. · 6 unmodified lines
7 7
8Required properties:8Required properties:
9- compatible: must contain one of the following:9- compatible: must contain one of the following:
10 * "qcom,scm-apq8064" for APQ8064 platforms10 * "qcom,scm-apq8064"
11 * "qcom,scm-msm8660" for MSM8660 platforms11 * "qcom,scm-apq8084"
12 * "qcom,scm-msm8690" for MSM8690 platforms12 * "qcom,scm-msm8660"
13 * "qcom,scm-msm8996" for MSM8996 platforms13 * "qcom,scm-msm8916"
14 * "qcom,scm-ipq4019" for IPQ4019 platforms14 * "qcom,scm-msm8960"
15 * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc)15 * "qcom,scm-msm8974"
16- clocks: One to three clocks may be required based on compatible.16 * "qcom,scm-msm8996"
17 * No clock required for "qcom,scm-msm8996", "qcom,scm-ipq4019"17 * "qcom,scm-msm8998"
18 * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960"18 * "qcom,scm-ipq4019"
19 * Core, iface, and bus clocks required for "qcom,scm"19 * "qcom,scm-sdm845"
20 and:
21 * "qcom,scm"
22- clocks: Specifies clocks needed by the SCM interface, if any:
23 * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and
24 "qcom,scm-msm8960"
25 * core, iface and bus clocks required for "qcom,scm-apq8084",
26 "qcom,scm-msm8916" and "qcom,scm-msm8974"
20- clock-names: Must contain "core" for the core clock, "iface" for the interface27- clock-names: Must contain "core" for the core clock, "iface" for the interface
21 clock and "bus" for the bus clock per the requirements of the compatible.28 clock and "bus" for the bus clock per the requirements of the compatible.
22- qcom,dload-mode: phandle to the TCSR hardware block and offset of the29- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
@@ -26,8 +33,10 @@ Example for MSM8916: · 3 unmodified lines
26 33
27 firmware {34 firmware {
28 scm {35 scm {
29 compatible = "qcom,scm";36 compatible = "qcom,msm8916", "qcom,scm";
30 clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;37 clocks = <&gcc GCC_CRYPTO_CLK> ,
38 <&gcc GCC_CRYPTO_AXI_CLK>,
39 <&gcc GCC_CRYPTO_AHB_CLK>;
31 clock-names = "core", "bus", "iface";40 clock-names = "core", "bus", "iface";
32 };41 };
33 };42 };
Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt+82−0
@@ -0,0 +1,82 @@
1-----------------------------------------------------------------
2Device Tree Bindings for the Xilinx Zynq MPSoC Firmware Interface
3-----------------------------------------------------------------
4
5The zynqmp-firmware node describes the interface to platform firmware.
6ZynqMP has an interface to communicate with secure firmware. Firmware
7driver provides an interface to firmware APIs. Interface APIs can be
8used by any driver to communicate to PMUFW(Platform Management Unit).
9These requests include clock management, pin control, device control,
10power management service, FPGA service and other platform management
11services.
12
13Required properties:
14 - compatible: Must contain: "xlnx,zynqmp-firmware"
15 - method: The method of calling the PM-API firmware layer.
16 Permitted values are:
17 - "smc" : SMC #0, following the SMCCC
18 - "hvc" : HVC #0, following the SMCCC
19
20--------------------------------------------------------------------------
21Device Tree Clock bindings for the Zynq Ultrascale+ MPSoC controlled using
22Zynq MPSoC firmware interface
23--------------------------------------------------------------------------
24The clock controller is a h/w block of Zynq Ultrascale+ MPSoC clock
25tree. It reads required input clock frequencies from the devicetree and acts
26as clock provider for all clock consumers of PS clocks.
27
28See clock_bindings.txt for more information on the generic clock bindings.
29
30Required properties:
31 - #clock-cells: Must be 1
32 - compatible: Must contain: "xlnx,zynqmp-clk"
33 - clocks: List of clock specifiers which are external input
34 clocks to the given clock controller. Please refer
35 the next section to find the input clocks for a
36 given controller.
37 - clock-names: List of clock names which are exteral input clocks
38 to the given clock controller. Please refer to the
39 clock bindings for more details.
40
41Input clocks for zynqmp Ultrascale+ clock controller:
42
43The Zynq UltraScale+ MPSoC has one primary and four alternative reference clock
44inputs. These required clock inputs are:
45 - pss_ref_clk (PS reference clock)
46 - video_clk (reference clock for video system )
47 - pss_alt_ref_clk (alternative PS reference clock)
48 - aux_ref_clk
49 - gt_crx_ref_clk (transceiver reference clock)
50
51The following strings are optional parameters to the 'clock-names' property in
52order to provide an optional (E)MIO clock source:
53 - swdt0_ext_clk
54 - swdt1_ext_clk
55 - gem0_emio_clk
56 - gem1_emio_clk
57 - gem2_emio_clk
58 - gem3_emio_clk
59 - mio_clk_XX # with XX = 00..77
60 - mio_clk_50_or_51 #for the mux clock to gem tsu from 50 or 51
61
62
63Output clocks are registered based on clock information received
64from firmware. Output clocks indexes are mentioned in
65include/dt-bindings/clock/xlnx,zynqmp-clk.h.
66
67-------
68Example
69-------
70
71firmware {
72 zynqmp_firmware: zynqmp-firmware {
73 compatible = "xlnx,zynqmp-firmware";
74 method = "smc";
75 zynqmp_clk: clock-controller {
76 #clock-cells = <1>;
77 compatible = "xlnx,zynqmp-clk";
78 clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>, <&aux_ref_clk>, <&gt_crx_ref_clk>;
79 clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk";
80 };
81 };
82};
Documentation/devicetree/bindings/fpga/fpga-region.txt+2−2
@@ -415,7 +415,7 @@ DT Overlay contains: · 414 unmodified lines
415 firmware-name = "base.rbf";415 firmware-name = "base.rbf";
416 416
417 fpga-bridge@4400 {417 fpga-bridge@4400 {
418 compatible = "altr,freeze-bridge";418 compatible = "altr,freeze-bridge-controller";
419 reg = <0x4400 0x10>;419 reg = <0x4400 0x10>;
420 420
421 fpga_region1: fpga-region1 {421 fpga_region1: fpga-region1 {
@@ -427,7 +427,7 @@ DT Overlay contains: · 5 unmodified lines
427 };427 };
428 428
429 fpga-bridge@4420 {429 fpga-bridge@4420 {
430 compatible = "altr,freeze-bridge";430 compatible = "altr,freeze-bridge-controller";
431 reg = <0x4420 0x10>;431 reg = <0x4420 0x10>;
432 432
433 fpga_region2: fpga-region2 {433 fpga_region2: fpga-region2 {
Documentation/devicetree/bindings/gpio/gpio.txt+75−67
@@ -1,18 +1,9 @@
1Specifying GPIO information for devices1Specifying GPIO information for devices
2============================================2=======================================
3 3
41) gpios property41) gpios property
5-----------------5-----------------
6 6
7Nodes that makes use of GPIOs should specify them using one or more
8properties, each containing a 'gpio-list':
9
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
14 (controller specific)
15
16GPIO properties should be named "[<name>-]gpios", with <name> being the purpose7GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17of this GPIO for the device. While a non-existent <name> is considered valid8of this GPIO for the device. While a non-existent <name> is considered valid
18for compatibility reasons (resolving to the "gpios" property), it is not allowed9for compatibility reasons (resolving to the "gpios" property), it is not allowed
@@ -33,33 +24,27 @@ The following example could be used to describe GPIO pins used as device enable · 14 unmodified lines
33and bit-banged data signals:24and bit-banged data signals:
34 25
35 gpio1: gpio1 {26 gpio1: gpio1 {
36 gpio-controller27 gpio-controller;
37 #gpio-cells = <2>;28 #gpio-cells = <2>;
38 };
39 gpio2: gpio2 {
40 gpio-controller
41 #gpio-cells = <1>;
42 };29 };
43 [...]30 [...]
44 31
45 enable-gpios = <&gpio2 2>;
46 data-gpios = <&gpio1 12 0>,32 data-gpios = <&gpio1 12 0>,
47 <&gpio1 13 0>,33 <&gpio1 13 0>,
48 <&gpio1 14 0>,34 <&gpio1 14 0>,
49 <&gpio1 15 0>;35 <&gpio1 15 0>;
50 36
51Note that gpio-specifier length is controller dependent. In the37In the above example, &gpio1 uses 2 cells to specify a gpio. The first cell is
52above example, &gpio1 uses 2 cells to specify a gpio, while &gpio238a local offset to the GPIO line and the second cell represent consumer flags,
53only uses one.39such as if the consumer desire the line to be active low (inverted) or open
40drain. This is the recommended practice.
54 41
55gpio-specifier may encode: bank, pin position inside the bank,42The exact meaning of each specifier cell is controller specific, and must be
56whether pin is open-drain and whether pin is logically inverted.43documented in the device tree binding for the device, but it is strongly
44recommended to use the two-cell approach.
57 45
58Exact meaning of each specifier cell is controller specific, and must46Most controllers are specifying a generic flag bitfield in the last cell, so
59be documented in the device tree binding for the device.47for these, use the macros defined in
60
61Most controllers are however specifying a generic flag bitfield
62in the last cell, so for these, use the macros defined in
63include/dt-bindings/gpio/gpio.h whenever possible:48include/dt-bindings/gpio/gpio.h whenever possible:
64 49
65Example of a node using GPIOs:50Example of a node using GPIOs:
@@ -236,46 +221,40 @@ Example of two SOC GPIO banks defined as gpio-controller nodes: · 170 unmodified lines
236 221
237Some or all of the GPIOs provided by a GPIO controller may be routed to pins222Some or all of the GPIOs provided by a GPIO controller may be routed to pins
238on the package via a pin controller. This allows muxing those pins between223on the package via a pin controller. This allows muxing those pins between
239GPIO and other functions.224GPIO and other functions. It is a fairly common practice among silicon
225engineers.
226
2272.2) Ordinary (numerical) GPIO ranges
228-------------------------------------
240 229
241It is useful to represent which GPIOs correspond to which pins on which pin230It is useful to represent which GPIOs correspond to which pins on which pin
242controllers. The gpio-ranges property described below represents this, and231controllers. The gpio-ranges property described below represents this with
243contains information structures as follows:232a discrete set of ranges mapping pins from the pin controller local number space
244 233to pins in the GPIO controller local number space.
245 gpio-range-list ::= <single-gpio-range> [gpio-range-list]
246 single-gpio-range ::= <numeric-gpio-range> | <named-gpio-range>
247 numeric-gpio-range ::=
248 <pinctrl-phandle> <gpio-base> <pinctrl-base> <count>
249 named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>'
250 pinctrl-phandle : phandle to pin controller node
251 gpio-base : Base GPIO ID in the GPIO controller
252 pinctrl-base : Base pinctrl pin ID in the pin controller
253 count : The number of GPIOs/pins in this range
254
255The "pin controller node" mentioned above must conform to the bindings
256described in ../pinctrl/pinctrl-bindings.txt.
257
258In case named gpio ranges are used (ranges with both <pinctrl-base> and
259<count> set to 0), the property gpio-ranges-group-names contains one string
260for every single-gpio-range in gpio-ranges:
261 gpiorange-names-list ::= <gpiorange-name> [gpiorange-names-list]
262 gpiorange-name : Name of the pingroup associated to the GPIO range in
263 the respective pin controller.
264
265Elements of gpiorange-names-list corresponding to numeric ranges contain
266the empty string. Elements of gpiorange-names-list corresponding to named
267ranges contain the name of a pin group defined in the respective pin
268controller. The number of pins/GPIOs in the range is the number of pins in
269that pin group.
270 234
271Previous versions of this binding required all pin controller nodes that235The format is: <[pin controller phandle], [GPIO controller offset],
272were referenced by any gpio-ranges property to contain a property named236 [pin controller offset], [number of pins]>;
273#gpio-range-cells with value <3>. This requirement is now deprecated.237
274However, that property may still exist in older device trees for238The GPIO controller offset pertains to the GPIO controller node containing the
275compatibility reasons, and would still be required even in new device239range definition.
276trees that need to be compatible with older software.240
241The pin controller node referenced by the phandle must conform to the bindings
242described in pinctrl/pinctrl-bindings.txt.
243
244Each offset runs from 0 to N. It is perfectly fine to pile any number of
245ranges with just one pin-to-GPIO line mapping if the ranges are concocted, but
246in practice these ranges are often lumped in discrete sets.
247
248Example:
249
250 gpio-ranges = <&foo 0 20 10>, <&bar 10 50 20>;
277 251
278Example 1:252This means:
253- pins 20..29 on pin controller "foo" is mapped to GPIO line 0..9 and
254- pins 50..69 on pin controller "bar" is mapped to GPIO line 10..29
255
256
257Verbose example:
279 258
280 qe_pio_e: gpio-controller@1460 {259 qe_pio_e: gpio-controller@1460 {
281 #gpio-cells = <2>;260 #gpio-cells = <2>;
@@ -289,7 +268,28 @@ Here, a single GPIO controller has GPIOs 0..9 routed to pin controller · 7 unmodified lines
289pinctrl1's pins 20..29, and GPIOs 10..29 routed to pin controller pinctrl2's268pinctrl1's pins 20..29, and GPIOs 10..29 routed to pin controller pinctrl2's
290pins 50..69.269pins 50..69.
291 270
292Example 2:271
2722.3) GPIO ranges from named pin groups
273--------------------------------------
274
275It is also possible to use pin groups for gpio ranges when pin groups are the
276easiest and most convenient mapping.
277
278Both both <pinctrl-base> and <count> must set to 0 when using named pin groups
279names.
280
281The property gpio-ranges-group-names must contain exactly one string for each
282range.
283
284Elements of gpio-ranges-group-names must contain the name of a pin group
285defined in the respective pin controller. The number of pins/GPIO lines in the
286range is the number of pins in that pin group. The number of pins of that
287group is defined int the implementation and not in the device tree.
288
289If numerical and named pin groups are mixed, the string corresponding to a
290numerical pin range in gpio-ranges-group-names must be empty.
291
292Example:
293 293
294 gpio_pio_i: gpio-controller@14b0 {294 gpio_pio_i: gpio-controller@14b0 {
295 #gpio-cells = <2>;295 #gpio-cells = <2>;
@@ -306,6 +306,14 @@ Example 2: · 10 unmodified lines
306 "bar";306 "bar";
307 };307 };
308 308
309Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO309Here, three GPIO ranges are defined referring to two pin controllers.
310ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2310
311are named "foo" and "bar".311pinctrl1 GPIO ranges are defined using pin numbers whereas the GPIO ranges
312in pinctrl2 are defined using the pin groups named "foo" and "bar".
313
314Previous versions of this binding required all pin controller nodes that
315were referenced by any gpio-ranges property to contain a property named
316#gpio-range-cells with value <3>. This requirement is now deprecated.
317However, that property may still exist in older device trees for
318compatibility reasons, and would still be required even in new device
319trees that need to be compatible with older software.
Documentation/devicetree/bindings/gpio/ingenic,gpio.txt+0−46
@@ -1,46 +0,0 @@
1Ingenic jz47xx GPIO controller
2
3That the Ingenic GPIO driver node must be a sub-node of the Ingenic pinctrl
4driver node.
5
6Required properties:
7--------------------
8
9 - compatible: Must contain one of:
10 - "ingenic,jz4740-gpio"
11 - "ingenic,jz4770-gpio"
12 - "ingenic,jz4780-gpio"
13 - reg: The GPIO bank number.
14 - interrupt-controller: Marks the device node as an interrupt controller.
15 - interrupts: Interrupt specifier for the controllers interrupt.
16 - #interrupt-cells: Should be 2. Refer to
17 ../interrupt-controller/interrupts.txt for more details.
18 - gpio-controller: Marks the device node as a GPIO controller.
19 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
20 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
21 GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
22 - gpio-ranges: Range of pins managed by the GPIO controller. Refer to
23 'gpio.txt' in this directory for more details.
24
25Example:
26--------
27
28&pinctrl {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 gpa: gpio@0 {
33 compatible = "ingenic,jz4740-gpio";
34 reg = <0>;
35
36 gpio-controller;
37 gpio-ranges = <&pinctrl 0 0 32>;
38 #gpio-cells = <2>;
39
40 interrupt-controller;
41 #interrupt-cells = <2>;
42
43 interrupt-parent = <&intc>;
44 interrupts = <28>;
45 };
46};
Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt+38−27
@@ -4,8 +4,10 @@ Required Properties: · 3 unmodified lines
4 4
5 - compatible: should contain one or more of the following:5 - compatible: should contain one or more of the following:
6 - "renesas,gpio-r8a7743": for R8A7743 (RZ/G1M) compatible GPIO controller.6 - "renesas,gpio-r8a7743": for R8A7743 (RZ/G1M) compatible GPIO controller.
7 - "renesas,gpio-r8a7744": for R8A7744 (RZ/G1N) compatible GPIO controller.
7 - "renesas,gpio-r8a7745": for R8A7745 (RZ/G1E) compatible GPIO controller.8 - "renesas,gpio-r8a7745": for R8A7745 (RZ/G1E) compatible GPIO controller.
8 - "renesas,gpio-r8a77470": for R8A77470 (RZ/G1C) compatible GPIO controller.9 - "renesas,gpio-r8a77470": for R8A77470 (RZ/G1C) compatible GPIO controller.
10 - "renesas,gpio-r8a774a1": for R8A774A1 (RZ/G2M) compatible GPIO controller.
9 - "renesas,gpio-r8a7778": for R8A7778 (R-Car M1) compatible GPIO controller.11 - "renesas,gpio-r8a7778": for R8A7778 (R-Car M1) compatible GPIO controller.
10 - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller.12 - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller.
11 - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller.13 - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller.
@@ -22,7 +24,7 @@ Required Properties: · 10 unmodified lines
22 - "renesas,gpio-r8a77995": for R8A77995 (R-Car D3) compatible GPIO controller.24 - "renesas,gpio-r8a77995": for R8A77995 (R-Car D3) compatible GPIO controller.
23 - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller.25 - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller.
24 - "renesas,rcar-gen2-gpio": for a generic R-Car Gen2 or RZ/G1 GPIO controller.26 - "renesas,rcar-gen2-gpio": for a generic R-Car Gen2 or RZ/G1 GPIO controller.
25 - "renesas,rcar-gen3-gpio": for a generic R-Car Gen3 GPIO controller.27 - "renesas,rcar-gen3-gpio": for a generic R-Car Gen3 or RZ/G2 GPIO controller.
26 - "renesas,gpio-rcar": deprecated.28 - "renesas,gpio-rcar": deprecated.
27 29
28 When compatible with the generic version nodes must list the30 When compatible with the generic version nodes must list the
@@ -38,7 +40,7 @@ Required Properties: · 9 unmodified lines
38 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second40 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
39 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the41 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
40 GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.42 GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
41 - gpio-ranges: Range of pins managed by the GPIO controller.43 - gpio-ranges: See gpio.txt.
42 44
43Optional properties:45Optional properties:
44 46
@@ -46,35 +48,44 @@ Optional properties: · 1 unmodified line
46 mandatory if the hardware implements a controllable functional clock for48 mandatory if the hardware implements a controllable functional clock for
47 the GPIO instance.49 the GPIO instance.
48 50
49Please refer to gpio.txt in this directory for details of gpio-ranges property51 - gpio-reserved-ranges: See gpio.txt.
50and the common GPIO bindings used by client devices.52
53Please refer to gpio.txt in this directory for the common GPIO bindings used by
54client devices.
51 55
52The GPIO controller also acts as an interrupt controller. It uses the default56The GPIO controller also acts as an interrupt controller. It uses the default
53two cells specifier as described in Documentation/devicetree/bindings/57two cells specifier as described in Documentation/devicetree/bindings/
54interrupt-controller/interrupts.txt.58interrupt-controller/interrupts.txt.
55 59
56Example: R8A7779 (R-Car H1) GPIO controller nodes60Example: R8A77470 (RZ/G1C) GPIO controller nodes
57 61
58 gpio0: gpio@ffc40000 {62 gpio0: gpio@e6050000 {
59 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";63 compatible = "renesas,gpio-r8a77470",
60 reg = <0xffc40000 0x2c>;64 "renesas,rcar-gen2-gpio";
61 interrupt-parent = <&gic>;65 reg = <0 0xe6050000 0 0x50>;
62 interrupts = <0 141 0x4>;66 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
63 #gpio-cells = <2>;67 #gpio-cells = <2>;
64 gpio-controller;68 gpio-controller;
65 gpio-ranges = <&pfc 0 0 32>;69 gpio-ranges = <&pfc 0 0 23>;
66 interrupt-controller;70 #interrupt-cells = <2>;
67 #interrupt-cells = <2>;71 interrupt-controller;
68 };72 clocks = <&cpg CPG_MOD 912>;
73 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
74 resets = <&cpg 912>;
75 };
69 ...76 ...
70 gpio6: gpio@ffc46000 {77 gpio3: gpio@e6053000 {
71 compatible = "renesas,gpio-r8a7779", "renesas,rcar-gen1-gpio";78 compatible = "renesas,gpio-r8a77470",
72 reg = <0xffc46000 0x2c>;79 "renesas,rcar-gen2-gpio";
73 interrupt-parent = <&gic>;80 reg = <0 0xe6053000 0 0x50>;
74 interrupts = <0 147 0x4>;81 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
75 #gpio-cells = <2>;82 #gpio-cells = <2>;
76 gpio-controller;83 gpio-controller;
77 gpio-ranges = <&pfc 0 192 9>;84 gpio-ranges = <&pfc 0 96 30>;
78 interrupt-controller;85 gpio-reserved-ranges = <17 10>;
79 #interrupt-cells = <2>;86 #interrupt-cells = <2>;
80 };87 interrupt-controller;
88 clocks = <&cpg CPG_MOD 909>;
89 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
90 resets = <&cpg 909>;
91 };
Documentation/devicetree/bindings/gpio/snps,creg-gpio.txt+21−0
@@ -0,0 +1,21 @@
1Synopsys GPIO via CREG (Control REGisters) driver
2
3Required properties:
4- compatible : "snps,creg-gpio-hsdk" or "snps,creg-gpio-axs10x".
5- reg : Exactly one register range with length 0x4.
6- #gpio-cells : Since the generic GPIO binding is used, the
7 amount of cells must be specified as 2. The first cell is the
8 pin number, the second cell is used to specify optional parameters:
9 See "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
10- gpio-controller : Marks the device node as a GPIO controller.
11- ngpios: Number of GPIO pins.
12
13Example:
14
15gpio: gpio@f00014b0 {
16 compatible = "snps,creg-gpio-hsdk";
17 reg = <0xf00014b0 0x4>;
18 gpio-controller;
19 #gpio-cells = <2>;
20 ngpios = <2>;
21};
Documentation/devicetree/bindings/hwmon/ina3221.txt+44−0
@@ -0,0 +1,44 @@
1Texas Instruments INA3221 Device Tree Bindings
2
31) ina3221 node
4 Required properties:
5 - compatible: Must be "ti,ina3221"
6 - reg: I2C address
7
8 Optional properties:
9 = The node contains optional child nodes for three channels =
10 = Each child node describes the information of input source =
11
12 - #address-cells: Required only if a child node is present. Must be 1.
13 - #size-cells: Required only if a child node is present. Must be 0.
14
152) child nodes
16 Required properties:
17 - reg: Must be 0, 1 or 2, corresponding to IN1, IN2 or IN3 port of INA3221
18
19 Optional properties:
20 - label: Name of the input source
21 - shunt-resistor-micro-ohms: Shunt resistor value in micro-Ohm
22
23Example:
24
25ina3221@40 {
26 compatible = "ti,ina3221";
27 reg = <0x40>;
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 input@0 {
32 reg = <0x0>;
33 status = "disabled";
34 };
35 input@1 {
36 reg = <0x1>;
37 shunt-resistor-micro-ohms = <5000>;
38 };
39 input@2 {
40 reg = <0x2>;
41 label = "VDD_5V";
42 shunt-resistor-micro-ohms = <5000>;
43 };
44};
Documentation/devicetree/bindings/hwmon/ltc2978.txt+2−0
@@ -15,6 +15,7 @@ Required properties: · 14 unmodified lines
15 * "lltc,ltm2987"15 * "lltc,ltm2987"
16 * "lltc,ltm4675"16 * "lltc,ltm4675"
17 * "lltc,ltm4676"17 * "lltc,ltm4676"
18 * "lltc,ltm4686"
18- reg: I2C slave address19- reg: I2C slave address
19 20
20Optional properties:21Optional properties:
@@ -30,6 +31,7 @@ Valid names of regulators depend on number of supplies supported per device: · 9 unmodified lines
30 * ltc3880, ltc3882, ltc3886 : vout0 - vout131 * ltc3880, ltc3882, ltc3886 : vout0 - vout1
31 * ltc3883 : vout032 * ltc3883 : vout0
32 * ltm4676 : vout0 - vout133 * ltm4676 : vout0 - vout1
34 * ltm4686 : vout0 - vout1
33 35
34Example:36Example:
35ltc2978@5e {37ltc2978@5e {
Documentation/devicetree/bindings/i2c/i2c-designware.txt+6−1
@@ -3,6 +3,7 @@ · 2 unmodified lines
3Required properties :3Required properties :
4 4
5 - compatible : should be "snps,designware-i2c"5 - compatible : should be "snps,designware-i2c"
6 or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback
6 - reg : Offset and length of the register set for the device7 - reg : Offset and length of the register set for the device
7 - interrupts : <IRQ> where IRQ is the interrupt number.8 - interrupts : <IRQ> where IRQ is the interrupt number.
8 9
@@ -11,8 +12,12 @@ Recommended properties : · 2 unmodified lines
11 - clock-frequency : desired I2C bus clock frequency in Hz.12 - clock-frequency : desired I2C bus clock frequency in Hz.
12 13
13Optional properties :14Optional properties :
15 - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold
16 time, named ICPU_CFG:TWI_DELAY in the datasheet.
17
14 - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.18 - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
15 This option is only supported in hardware blocks version 1.11a or newer.19 This option is only supported in hardware blocks version 1.11a or newer and
20 on Microsemi SoCs ("mscc,ocelot-i2c" compatible).
16 21
17 - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds.22 - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds.
18 This value which is by default 300ns is used to compute the tLOW period.23 This value which is by default 300ns is used to compute the tLOW period.
Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt+1−0
@@ -3,6 +3,7 @@ · 2 unmodified lines
3Required properties:3Required properties:
4- compatible :4- compatible :
5 - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc5 - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc
6 - "fsl,imx8qxp-lpi2c" for LPI2C compatible with the one integrated on i.MX8QXP soc
6- reg : address and length of the lpi2c master registers7- reg : address and length of the lpi2c master registers
7- interrupts : lpi2c interrupt8- interrupts : lpi2c interrupt
8- clocks : lpi2c clock specifier9- clocks : lpi2c clock specifier
Documentation/devicetree/bindings/i2c/i2c-omap.txt+6−2
@@ -1,8 +1,12 @@
1I2C for OMAP platforms1I2C for OMAP platforms
2 2
3Required properties :3Required properties :
4- compatible : Must be "ti,omap2420-i2c", "ti,omap2430-i2c", "ti,omap3-i2c"4- compatible : Must be
5 or "ti,omap4-i2c"5 "ti,omap2420-i2c" for OMAP2420 SoCs
6 "ti,omap2430-i2c" for OMAP2430 SoCs
7 "ti,omap3-i2c" for OMAP3 SoCs
8 "ti,omap4-i2c" for OMAP4+ SoCs
9 "ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs
6- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)10- ti,hwmods : Must be "i2c<n>", n being the instance number (1-based)
7- #address-cells = <1>;11- #address-cells = <1>;
8- #size-cells = <0>;12- #size-cells = <0>;
Documentation/devicetree/bindings/i2c/i2c-rcar.txt+2−0
@@ -3,7 +3,9 @@ I2C for R-Car platforms · 2 unmodified lines
3Required properties:3Required properties:
4- compatible:4- compatible:
5 "renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC.5 "renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC.
6 "renesas,i2c-r8a7744" if the device is a part of a R8A7744 SoC.
6 "renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC.7 "renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC.
8 "renesas,i2c-r8a77470" if the device is a part of a R8A77470 SoC.
7 "renesas,i2c-r8a774a1" if the device is a part of a R8A774A1 SoC.9 "renesas,i2c-r8a774a1" if the device is a part of a R8A774A1 SoC.
8 "renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC.10 "renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC.
9 "renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC.11 "renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC.
Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt+1−0
@@ -5,6 +5,7 @@ Required properties: · 4 unmodified lines
5 - "renesas,iic-r8a73a4" (R-Mobile APE6)5 - "renesas,iic-r8a73a4" (R-Mobile APE6)
6 - "renesas,iic-r8a7740" (R-Mobile A1)6 - "renesas,iic-r8a7740" (R-Mobile A1)
7 - "renesas,iic-r8a7743" (RZ/G1M)7 - "renesas,iic-r8a7743" (RZ/G1M)
8 - "renesas,iic-r8a7744" (RZ/G1N)
8 - "renesas,iic-r8a7745" (RZ/G1E)9 - "renesas,iic-r8a7745" (RZ/G1E)
9 - "renesas,iic-r8a774a1" (RZ/G2M)10 - "renesas,iic-r8a774a1" (RZ/G2M)
10 - "renesas,iic-r8a7790" (R-Car H2)11 - "renesas,iic-r8a7790" (R-Car H2)
Documentation/devicetree/bindings/i2c/i2c.txt+1−1
@@ -84,7 +84,7 @@ Binding may contain optional "interrupts" property, describing interrupts · 83 unmodified lines
84used by the device. I2C core will assign "irq" interrupt (or the very first84used by the device. I2C core will assign "irq" interrupt (or the very first
85interrupt if not using interrupt names) as primary interrupt for the slave.85interrupt if not using interrupt names) as primary interrupt for the slave.
86 86
87Alternatively, devices supporting SMbus Host Notify, and connected to87Alternatively, devices supporting SMBus Host Notify, and connected to
88adapters that support this feature, may use "host-notify" property. I2C88adapters that support this feature, may use "host-notify" property. I2C
89core will create a virtual interrupt for Host Notify and assign it as89core will create a virtual interrupt for Host Notify and assign it as
90primary interrupt for the slave.90primary interrupt for the slave.
Documentation/devicetree/bindings/iio/accel/adxl372.txt+33−0
@@ -0,0 +1,33 @@
1Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer
2
3http://www.analog.com/media/en/technical-documentation/data-sheets/adxl372.pdf
4
5Required properties:
6 - compatible : should be "adi,adxl372"
7 - reg: the I2C address or SPI chip select number for the device
8
9Required properties for SPI bus usage:
10 - spi-max-frequency: Max SPI frequency to use
11
12Optional properties:
13 - interrupts: interrupt mapping for IRQ as documented in
14 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
15
16Example for a I2C device node:
17
18 accelerometer@53 {
19 compatible = "adi,adxl372";
20 reg = <0x53>;
21 interrupt-parent = <&gpio>;
22 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
23 };
24
25Example for a SPI device node:
26
27 accelerometer@0 {
28 compatible = "adi,adxl372";
29 reg = <0>;
30 spi-max-frequency = <1000000>;
31 interrupt-parent = <&gpio>;
32 interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
33 };
Documentation/devicetree/bindings/iio/adc/mcp3911.txt+30−0
@@ -0,0 +1,30 @@
1* Microchip MCP3911 Dual channel analog front end (ADC)
2
3Required properties:
4 - compatible: Should be "microchip,mcp3911"
5 - reg: SPI chip select number for the device
6
7Recommended properties:
8 - spi-max-frequency: Definition as per
9 Documentation/devicetree/bindings/spi/spi-bus.txt.
10 Max frequency for this chip is 20MHz.
11
12Optional properties:
13 - clocks: Phandle and clock identifier for sampling clock
14 - interrupt-parent: Phandle to the parent interrupt controller
15 - interrupts: IRQ line for the ADC
16 - microchip,device-addr: Device address when multiple MCP3911 chips are present on the
17 same SPI bus. Valid values are 0-3. Defaults to 0.
18 - vref-supply: Phandle to the external reference voltage supply.
19
20Example:
21adc@0 {
22 compatible = "microchip,mcp3911";
23 reg = <0>;
24 interrupt-parent = <&gpio5>;
25 interrupts = <15 IRQ_TYPE_EDGE_RISING>;
26 spi-max-frequency = <20000000>;
27 microchip,device-addr = <0>;
28 vref-supply = <&vref_reg>;
29 clocks = <&xtal>;
30};
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt+60−21
@@ -1,7 +1,9 @@
1Qualcomm's SPMI PMIC voltage ADC1Qualcomm's SPMI PMIC ADC
2 2
3SPMI PMIC voltage ADC (VADC) provides interface to clients to read3- SPMI PMIC voltage ADC (VADC) provides interface to clients to read
4voltage. The VADC is a 15-bit sigma-delta ADC.4 voltage. The VADC is a 15-bit sigma-delta ADC.
5- SPMI PMIC5 voltage ADC (ADC) provides interface to clients to read
6 voltage. The VADC is a 16-bit sigma-delta ADC.
5 7
6VADC node:8VADC node:
7 9
@@ -9,11 +11,13 @@ VADC node: · 1 unmodified line
9 Usage: required11 Usage: required
10 Value type: <string>12 Value type: <string>
11 Definition: Should contain "qcom,spmi-vadc".13 Definition: Should contain "qcom,spmi-vadc".
14 Should contain "qcom,spmi-adc5" for PMIC5 ADC driver.
15 Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver.
12 16
13- reg:17- reg:
14 Usage: required18 Usage: required
15 Value type: <prop-encoded-array>19 Value type: <prop-encoded-array>
16 Definition: VADC base address and length in the SPMI PMIC register map.20 Definition: VADC base address in the SPMI PMIC register map.
17 21
18- #address-cells:22- #address-cells:
19 Usage: required23 Usage: required
@@ -45,13 +49,26 @@ Channel node properties: · 25 unmodified lines
45 Definition: ADC channel number.49 Definition: ADC channel number.
46 See include/dt-bindings/iio/qcom,spmi-vadc.h50 See include/dt-bindings/iio/qcom,spmi-vadc.h
47 51
52- label:
53 Usage: required for "qcom,spmi-adc5" and "qcom,spmi-adc-rev2"
54 Value type: <empty>
55 Definition: ADC input of the platform as seen in the schematics.
56 For thermistor inputs connected to generic AMUX or GPIO inputs
57 these can vary across platform for the same pins. Hence select
58 the platform schematics name for this channel.
59
48- qcom,decimation:60- qcom,decimation:
49 Usage: optional61 Usage: optional
50 Value type: <u32>62 Value type: <u32>
51 Definition: This parameter is used to decrease ADC sampling rate.63 Definition: This parameter is used to decrease ADC sampling rate.
52 Quicker measurements can be made by reducing decimation ratio.64 Quicker measurements can be made by reducing decimation ratio.
53 Valid values are 512, 1024, 2048, 4096.65 - For compatible property "qcom,spmi-vadc", valid values are
54 If property is not found, default value of 512 will be used.66 512, 1024, 2048, 4096. If property is not found, default value
67 of 512 will be used.
68 - For compatible property "qcom,spmi-adc5", valid values are 250, 420
69 and 840. If property is not found, default value of 840 is used.
70 - For compatible property "qcom,spmi-adc-rev2", valid values are 256,
71 512 and 1024. If property is not present, default value is 1024.
55 72
56- qcom,pre-scaling:73- qcom,pre-scaling:
57 Usage: optional74 Usage: optional
@@ -66,21 +83,38 @@ Channel node properties: · 8 unmodified lines
66- qcom,ratiometric:83- qcom,ratiometric:
67 Usage: optional84 Usage: optional
68 Value type: <empty>85 Value type: <empty>
69 Definition: Channel calibration type. If this property is specified86 Definition: Channel calibration type.
70 VADC will use the VDD reference (1.8V) and GND for channel87 - For compatible property "qcom,spmi-vadc", if this property is
71 calibration. If property is not found, channel will be88 specified VADC will use the VDD reference (1.8V) and GND for
72 calibrated with 0.625V and 1.25V reference channels, also89 channel calibration. If property is not found, channel will be
73 known as absolute calibration.90 calibrated with 0.625V and 1.25V reference channels, also
91 known as absolute calibration.
92 - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2",
93 if this property is specified VADC will use the VDD reference
94 (1.875V) and GND for channel calibration. If property is not found,
95 channel will be calibrated with 0V and 1.25V reference channels,
96 also known as absolute calibration.
74 97
75- qcom,hw-settle-time:98- qcom,hw-settle-time:
76 Usage: optional99 Usage: optional
77 Value type: <u32>100 Value type: <u32>
78 Definition: Time between AMUX getting configured and the ADC starting101 Definition: Time between AMUX getting configured and the ADC starting
79 conversion. Delay = 100us * (value) for value < 11, and102 conversion. The 'hw_settle_time' is an index used from valid values
80 2ms * (value - 10) otherwise.103 and programmed in hardware to achieve the hardware settling delay.
81 Valid values are: 0, 100, 200, 300, 400, 500, 600, 700, 800,104 - For compatible property "qcom,spmi-vadc" and "qcom,spmi-adc-rev2",
82 900 us and 1, 2, 4, 6, 8, 10 ms105 Delay = 100us * (hw_settle_time) for hw_settle_time < 11,
83 If property is not found, channel will use 0us.106 and 2ms * (hw_settle_time - 10) otherwise.
107 Valid values are: 0, 100, 200, 300, 400, 500, 600, 700, 800,
108 900 us and 1, 2, 4, 6, 8, 10 ms.
109 If property is not found, channel will use 0us.
110 - For compatible property "qcom,spmi-adc5", delay = 15us for
111 value 0, 100us * (value) for values < 11,
112 and 2ms * (value - 10) otherwise.
113 Valid values are: 15, 100, 200, 300, 400, 500, 600, 700, 800,
114 900 us and 1, 2, 4, 6, 8, 10 ms
115 Certain controller digital versions have valid values of
116 15, 100, 200, 300, 400, 500, 600, 700, 1, 2, 4, 8, 16, 32, 64, 128 ms
117 If property is not found, channel will use 15us.
84 118
85- qcom,avg-samples:119- qcom,avg-samples:
86 Usage: optional120 Usage: optional
@@ -89,13 +123,18 @@ Channel node properties: · 2 unmodified lines
89 Averaging provides the option to obtain a single measurement123 Averaging provides the option to obtain a single measurement
90 from the ADC that is an average of multiple samples. The value124 from the ADC that is an average of multiple samples. The value
91 selected is 2^(value).125 selected is 2^(value).
92 Valid values are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512126 - For compatible property "qcom,spmi-vadc", valid values
93 If property is not found, 1 sample will be used.127 are: 1, 2, 4, 8, 16, 32, 64, 128, 256, 512
128 If property is not found, 1 sample will be used.
129 - For compatible property "qcom,spmi-adc5" and "qcom,spmi-adc-rev2",
130 valid values are: 1, 2, 4, 8, 16
131 If property is not found, 1 sample will be used.
94 132
95NOTE:133NOTE:
96 134
97Following channels, also known as reference point channels, are used for135For compatible property "qcom,spmi-vadc" following channels, also known as
98result calibration and their channel configuration nodes should be defined:136reference point channels, are used for result calibration and their channel
137configuration nodes should be defined:
99VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV,138VADC_REF_625MV and/or VADC_SPARE1(based on PMIC version) VADC_REF_1250MV,
100VADC_GND_REF and VADC_VDD_VADC.139VADC_GND_REF and VADC_VDD_VADC.
101 140
@@ -104,7 +143,7 @@ Example: · 2 unmodified lines
104 /* VADC node */143 /* VADC node */
105 pmic_vadc: vadc@3100 {144 pmic_vadc: vadc@3100 {
106 compatible = "qcom,spmi-vadc";145 compatible = "qcom,spmi-vadc";
107 reg = <0x3100 0x100>;146 reg = <0x3100>;
108 interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;147 interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
109 #address-cells = <1>;148 #address-cells = <1>;
110 #size-cells = <0>;149 #size-cells = <0>;
Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt+4−0
@@ -12,6 +12,8 @@ Required properties: · 11 unmodified lines
12- interrupts: The interrupt number for the ADC device.12- interrupts: The interrupt number for the ADC device.
13- #io-channel-cells: Number of cells in an IIO specifier.13- #io-channel-cells: Number of cells in an IIO specifier.
14- hwlocks: Reference to a phandle of a hwlock provider node.14- hwlocks: Reference to a phandle of a hwlock provider node.
15- nvmem-cells: A phandle to the calibration cells provided by eFuse device.
16- nvmem-cell-names: Should be "big_scale_calib", "small_scale_calib".
15 17
16Example:18Example:
17 19
@@ -32,5 +34,7 @@ Example: · 14 unmodified lines
32 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;34 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
33 #io-channel-cells = <1>;35 #io-channel-cells = <1>;
34 hwlocks = <&hwlock 4>;36 hwlocks = <&hwlock 4>;
37 nvmem-cells = <&adc_big_scale>, <&adc_small_scale>;
38 nvmem-cell-names = "big_scale_calib", "small_scale_calib";
35 };39 };
36 };40 };
Documentation/devicetree/bindings/iio/dac/ad5758.txt+5−0
@@ -50,6 +50,9 @@ Required properties: · 49 unmodified lines
50 50
51Optional properties:51Optional properties:
52 52
53 - reset-gpios : GPIO spec for the RESET pin. If specified, it will be
54 asserted during driver probe.
55
53 - adi,dc-dc-ilim-microamp: The dc-to-dc converter current limit56 - adi,dc-dc-ilim-microamp: The dc-to-dc converter current limit
54 The following values are currently supported [uA]:57 The following values are currently supported [uA]:
55 * 15000058 * 150000
@@ -71,6 +74,8 @@ AD5758 Example: · 15 unmodified lines
71 spi-max-frequency = <1000000>;74 spi-max-frequency = <1000000>;
72 spi-cpha;75 spi-cpha;
73 76
77 reset-gpios = <&gpio 22 0>;
78
74 adi,dc-dc-mode = <2>;79 adi,dc-dc-mode = <2>;
75 adi,range-microvolt = <0 10000000>;80 adi,range-microvolt = <0 10000000>;
76 adi,dc-dc-ilim-microamp = <200000>;81 adi,dc-dc-ilim-microamp = <200000>;
Documentation/devicetree/bindings/iio/dac/ltc1660.txt+21−0
@@ -0,0 +1,21 @@
1* Linear Technology Micropower octal 8-Bit and 10-Bit DACs
2
3Required properties:
4 - compatible: Must be one of the following:
5 "lltc,ltc1660"
6 "lltc,ltc1665"
7 - reg: SPI chip select number for the device
8 - vref-supply: Phandle to the voltage reference supply
9
10Recommended properties:
11 - spi-max-frequency: Definition as per
12 Documentation/devicetree/bindings/spi/spi-bus.txt.
13 Max frequency for this chip is 5 MHz.
14
15Example:
16dac@0 {
17 compatible = "lltc,ltc1660";
18 reg = <0>;
19 spi-max-frequency = <5000000>;
20 vref-supply = <&vref_reg>;
21};
Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt+1−0
@@ -20,6 +20,7 @@ Required properties: · 19 unmodified lines
20 bindings.20 bindings.
21 21
22Optional properties:22Optional properties:
23 - vddio-supply: regulator phandle for VDDIO supply
23 - mount-matrix: an optional 3x3 mounting rotation matrix24 - mount-matrix: an optional 3x3 mounting rotation matrix
24 - i2c-gate node. These devices also support an auxiliary i2c bus. This is25 - i2c-gate node. These devices also support an auxiliary i2c bus. This is
25 simple enough to be described using the i2c-gate binding. See26 simple enough to be described using the i2c-gate binding. See
Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt+1−0
@@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines
7 "st,lsm6dsl"7 "st,lsm6dsl"
8 "st,lsm6dsm"8 "st,lsm6dsm"
9 "st,ism330dlc"9 "st,ism330dlc"
10 "st,lsm6dso"
10- reg: i2c address of the sensor / spi cs line11- reg: i2c address of the sensor / spi cs line
11 12
12Optional properties:13Optional properties:
Documentation/devicetree/bindings/iio/light/bh1750.txt+18−0
@@ -0,0 +1,18 @@
1ROHM BH1750 - ALS, Ambient light sensor
2
3Required properties:
4
5- compatible: Must be one of:
6 "rohm,bh1710"
7 "rohm,bh1715"
8 "rohm,bh1721"
9 "rohm,bh1750"
10 "rohm,bh1751"
11- reg: the I2C address of the sensor
12
13Example:
14
15light-sensor@23 {
16 compatible = "rohm,bh1750";
17 reg = <0x23>;
18};
Documentation/devicetree/bindings/iio/light/tsl2772.txt+42−0
@@ -0,0 +1,42 @@
1* AMS/TAOS ALS and proximity sensor
2
3Required properties:
4
5 - compatible: Should be one of
6 "amstaos,tsl2571"
7 "amstaos,tsl2671"
8 "amstaos,tmd2671"
9 "amstaos,tsl2771"
10 "amstaos,tmd2771"
11 "amstaos,tsl2572"
12 "amstaos,tsl2672"
13 "amstaos,tmd2672"
14 "amstaos,tsl2772"
15 "amstaos,tmd2772"
16 "avago,apds9930"
17 - reg: the I2C address of the device
18
19Optional properties:
20
21 - amstaos,proximity-diodes - proximity diodes to enable. <0>, <1>, or <0 1>
22 are the only valid values.
23 - led-max-microamp - current for the proximity LED. Must be 100000, 50000,
24 25000, or 13000.
25 - vdd-supply: phandle to the regulator that provides power to the sensor.
26 - vddio-supply: phandle to the regulator that provides power to the bus.
27 - interrupts: the sole interrupt generated by the device
28
29 Refer to interrupt-controller/interrupts.txt for generic interrupt client
30 node bindings.
31
32Example:
33
34tsl2772@39 {
35 compatible = "amstaos,tsl2772";
36 reg = <0x39>;
37 interrupts-extended = <&msmgpio 61 IRQ_TYPE_EDGE_FALLING>;
38 vdd-supply = <&pm8941_l17>;
39 vddio-supply = <&pm8941_lvs1>;
40 amstaos,proximity-diodes = <0>;
41 led-max-microamp = <100000>;
42};
Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt+12−0
@@ -0,0 +1,12 @@
1ST VL53L0X ToF ranging sensor
2
3Required properties:
4 - compatible: must be "st,vl53l0x"
5 - reg: i2c address where to find the device
6
7Example:
8
9vl53l0x@29 {
10 compatible = "st,vl53l0x";
11 reg = <0x29>;
12};
Documentation/devicetree/bindings/input/pwm-vibrator.txt+2−2
@@ -58,8 +58,8 @@ Example from Motorola Droid 4: · 57 unmodified lines
58 58
59 vibrator {59 vibrator {
60 compatible = "pwm-vibrator";60 compatible = "pwm-vibrator";
61 pwms = <&pwm8 0 1000000000 0>,61 pwms = <&pwm9 0 1000000000 0>,
62 <&pwm9 0 1000000000 0>;62 <&pwm8 0 1000000000 0>;
63 pwm-names = "enable", "direction";63 pwm-names = "enable", "direction";
64 direction-duty-cycle-ns = <1000000000>;64 direction-duty-cycle-ns = <1000000000>;
65 };65 };
Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt+4−2
@@ -1,10 +1,12 @@
1General Touchscreen Properties:1General Touchscreen Properties:
2 2
3Optional properties for Touchscreens:3Optional properties for Touchscreens:
4 - touchscreen-min-x : minimum x coordinate reported (0 if not set)
5 - touchscreen-min-y : minimum y coordinate reported (0 if not set)
4 - touchscreen-size-x : horizontal resolution of touchscreen6 - touchscreen-size-x : horizontal resolution of touchscreen
5 (in pixels)7 (maximum x coordinate reported + 1)
6 - touchscreen-size-y : vertical resolution of touchscreen8 - touchscreen-size-y : vertical resolution of touchscreen
7 (in pixels)9 (maximum y coordinate reported + 1)
8 - touchscreen-max-pressure : maximum reported pressure (arbitrary range10 - touchscreen-max-pressure : maximum reported pressure (arbitrary range
9 dependent on the controller)11 dependent on the controller)
10 - touchscreen-min-pressure : minimum pressure on the touchscreen to be12 - touchscreen-min-pressure : minimum pressure on the touchscreen to be
Documentation/devicetree/bindings/interrupt-controller/csky,apb-intc.txt+62−0
@@ -0,0 +1,62 @@
1==============================
2C-SKY APB Interrupt Controller
3==============================
4
5C-SKY APB Interrupt Controller is a simple soc interrupt controller
6on the apb bus and we only use it as root irq controller.
7
8 - csky,apb-intc is used in a lot of csky fpgas and socs, it support 64 irq nums.
9 - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported.
10 - csky,gx6605s-intc is gx6605s soc internal irq interrupt controller, 64 irq nums.
11
12=============================
13intc node bindings definition
14=============================
15
16 Description: Describes APB interrupt controller
17
18 PROPERTIES
19
20 - compatible
21 Usage: required
22 Value type: <string>
23 Definition: must be "csky,apb-intc"
24 "csky,dual-apb-intc"
25 "csky,gx6605s-intc"
26 - #interrupt-cells
27 Usage: required
28 Value type: <u32>
29 Definition: must be <1>
30 - reg
31 Usage: required
32 Value type: <u32 u32>
33 Definition: <phyaddr size> in soc from cpu view
34 - interrupt-controller:
35 Usage: required
36 - csky,support-pulse-signal:
37 Usage: select
38 Description: to support pulse signal flag
39
40Examples:
41---------
42
43 intc: interrupt-controller@500000 {
44 compatible = "csky,apb-intc";
45 #interrupt-cells = <1>;
46 reg = <0x00500000 0x400>;
47 interrupt-controller;
48 };
49
50 intc: interrupt-controller@500000 {
51 compatible = "csky,dual-apb-intc";
52 #interrupt-cells = <1>;
53 reg = <0x00500000 0x400>;
54 interrupt-controller;
55 };
56
57 intc: interrupt-controller@500000 {
58 compatible = "csky,gx6605s-intc";
59 #interrupt-cells = <1>;
60 reg = <0x00500000 0x400>;
61 interrupt-controller;
62 };
Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt+40−0
@@ -0,0 +1,40 @@
1===========================================
2C-SKY Multi-processors Interrupt Controller
3===========================================
4
5C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
6SMP soc, and it also could be used in non-SMP system.
7
8Interrupt number definition:
9
10 0-15 : software irq, and we use 15 as our IPI_IRQ.
11 16-31 : private irq, and we use 16 as the co-processor timer.
12 31-1024: common irq for soc ip.
13
14=============================
15intc node bindings definition
16=============================
17
18 Description: Describes SMP interrupt controller
19
20 PROPERTIES
21
22 - compatible
23 Usage: required
24 Value type: <string>
25 Definition: must be "csky,mpintc"
26 - #interrupt-cells
27 Usage: required
28 Value type: <u32>
29 Definition: must be <1>
30 - interrupt-controller:
31 Usage: required
32
33Examples:
34---------
35
36 intc: interrupt-controller {
37 compatible = "csky,mpintc";
38 #interrupt-cells = <1>;
39 interrupt-controller;
40 };
Documentation/devicetree/bindings/interrupt-controller/marvell,icu.txt+73−12
@@ -5,6 +5,8 @@ The Marvell ICU (Interrupt Consolidation Unit) controller is · 4 unmodified lines
5responsible for collecting all wired-interrupt sources in the CP and5responsible for collecting all wired-interrupt sources in the CP and
6communicating them to the GIC in the AP, the unit translates interrupt6communicating them to the GIC in the AP, the unit translates interrupt
7requests on input wires to MSG memory mapped transactions to the GIC.7requests on input wires to MSG memory mapped transactions to the GIC.
8These messages will access a different GIC memory area depending on
9their type (NSR, SR, SEI, REI, etc).
8 10
9Required properties:11Required properties:
10 12
@@ -12,20 +14,23 @@ Required properties: · 1 unmodified line
12 14
13- reg: Should contain ICU registers location and length.15- reg: Should contain ICU registers location and length.
14 16
15- #interrupt-cells: Specifies the number of cells needed to encode an17Subnodes: Each group of interrupt is declared as a subnode of the ICU,
16 interrupt source. The value shall be 3.18with their own compatible.
19
20Required properties for the icu_nsr/icu_sei subnodes:
17 21
18 The 1st cell is the group type of the ICU interrupt. Possible group22- compatible: Should be one of:
19 types are:23 * "marvell,cp110-icu-nsr"
24 * "marvell,cp110-icu-sr"
25 * "marvell,cp110-icu-sei"
26 * "marvell,cp110-icu-rei"
20 27
21 ICU_GRP_NSR (0x0) : Shared peripheral interrupt, non-secure28- #interrupt-cells: Specifies the number of cells needed to encode an
22 ICU_GRP_SR (0x1) : Shared peripheral interrupt, secure29 interrupt source. The value shall be 2.
23 ICU_GRP_SEI (0x4) : System error interrupt
24 ICU_GRP_REI (0x5) : RAM error interrupt
25 30
26 The 2nd cell is the index of the interrupt in the ICU unit.31 The 1st cell is the index of the interrupt in the ICU unit.
27 32
28 The 3rd cell is the type of the interrupt. See arm,gic.txt for33 The 2nd cell is the type of the interrupt. See arm,gic.txt for
29 details.34 details.
30 35
31- interrupt-controller: Identifies the node as an interrupt36- interrupt-controller: Identifies the node as an interrupt
@@ -35,17 +40,73 @@ Required properties: · 3 unmodified lines
35 that allows to trigger interrupts using MSG memory mapped40 that allows to trigger interrupts using MSG memory mapped
36 transactions.41 transactions.
37 42
43Note: each 'interrupts' property referring to any 'icu_xxx' node shall
44 have a different number within [0:206].
45
38Example:46Example:
39 47
40icu: interrupt-controller@1e0000 {48icu: interrupt-controller@1e0000 {
41 compatible = "marvell,cp110-icu";49 compatible = "marvell,cp110-icu";
42 reg = <0x1e0000 0x10>;50 reg = <0x1e0000 0x440>;
51
52 CP110_LABEL(icu_nsr): interrupt-controller@10 {
53 compatible = "marvell,cp110-icu-nsr";
54 reg = <0x10 0x20>;
55 #interrupt-cells = <2>;
56 interrupt-controller;
57 msi-parent = <&gicp>;
58 };
59
60 CP110_LABEL(icu_sei): interrupt-controller@50 {
61 compatible = "marvell,cp110-icu-sei";
62 reg = <0x50 0x10>;
63 #interrupt-cells = <2>;
64 interrupt-controller;
65 msi-parent = <&sei>;
66 };
67};
68
69node1 {
70 interrupt-parent = <&icu_nsr>;
71 interrupts = <106 IRQ_TYPE_LEVEL_HIGH>;
72};
73
74node2 {
75 interrupt-parent = <&icu_sei>;
76 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
77};
78
79/* Would not work with the above nodes */
80node3 {
81 interrupt-parent = <&icu_nsr>;
82 interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
83};
84
85The legacy bindings were different in this way:
86
87- #interrupt-cells: The value was 3.
88 The 1st cell was the group type of the ICU interrupt. Possible
89 group types were:
90 ICU_GRP_NSR (0x0) : Shared peripheral interrupt, non-secure
91 ICU_GRP_SR (0x1) : Shared peripheral interrupt, secure
92 ICU_GRP_SEI (0x4) : System error interrupt
93 ICU_GRP_REI (0x5) : RAM error interrupt
94 The 2nd cell was the index of the interrupt in the ICU unit.
95 The 3rd cell was the type of the interrupt. See arm,gic.txt for
96 details.
97
98Example:
99
100icu: interrupt-controller@1e0000 {
101 compatible = "marvell,cp110-icu";
102 reg = <0x1e0000 0x440>;
103
43 #interrupt-cells = <3>;104 #interrupt-cells = <3>;
44 interrupt-controller;105 interrupt-controller;
45 msi-parent = <&gicp>;106 msi-parent = <&gicp>;
46};107};
47 108
48usb3h0: usb3@500000 {109node1 {
49 interrupt-parent = <&icu>;110 interrupt-parent = <&icu>;
50 interrupts = <ICU_GRP_NSR 106 IRQ_TYPE_LEVEL_HIGH>;111 interrupts = <ICU_GRP_NSR 106 IRQ_TYPE_LEVEL_HIGH>;
51};112};
Documentation/devicetree/bindings/interrupt-controller/marvell,sei.txt+36−0
@@ -0,0 +1,36 @@
1Marvell SEI (System Error Interrupt) Controller
2-----------------------------------------------
3
4Marvell SEI (System Error Interrupt) controller is an interrupt
5aggregator. It receives interrupts from several sources and aggregates
6them to a single interrupt line (an SPI) on the parent interrupt
7controller.
8
9This interrupt controller can handle up to 64 SEIs, a set comes from the
10AP and is wired while a second set comes from the CPs by the mean of
11MSIs.
12
13Required properties:
14
15- compatible: should be one of:
16 * "marvell,ap806-sei"
17- reg: SEI registers location and length.
18- interrupts: identifies the parent IRQ that will be triggered.
19- #interrupt-cells: number of cells to define an SEI wired interrupt
20 coming from the AP, should be 1. The cell is the IRQ
21 number.
22- interrupt-controller: identifies the node as an interrupt controller
23 for AP interrupts.
24- msi-controller: identifies the node as an MSI controller for the CPs
25 interrupts.
26
27Example:
28
29 sei: interrupt-controller@3f0200 {
30 compatible = "marvell,ap806-sei";
31 reg = <0x3f0200 0x40>;
32 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
33 #interrupt-cells = <1>;
34 interrupt-controller;
35 msi-controller;
36 };
Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt+4−1
@@ -2,10 +2,12 @@ DT bindings for the R-Mobile/R-Car/RZ/G interrupt controller · 1 unmodified line
2 2
3Required properties:3Required properties:
4 4
5- compatible: has to be "renesas,irqc-<soctype>", "renesas,irqc" as fallback.5- compatible: must be "renesas,irqc-<soctype>" or "renesas,intc-ex-<soctype>",
6 and "renesas,irqc" as fallback.
6 Examples with soctypes are:7 Examples with soctypes are:
7 - "renesas,irqc-r8a73a4" (R-Mobile APE6)8 - "renesas,irqc-r8a73a4" (R-Mobile APE6)
8 - "renesas,irqc-r8a7743" (RZ/G1M)9 - "renesas,irqc-r8a7743" (RZ/G1M)
10 - "renesas,irqc-r8a7744" (RZ/G1N)
9 - "renesas,irqc-r8a7745" (RZ/G1E)11 - "renesas,irqc-r8a7745" (RZ/G1E)
10 - "renesas,irqc-r8a77470" (RZ/G1C)12 - "renesas,irqc-r8a77470" (RZ/G1C)
11 - "renesas,irqc-r8a7790" (R-Car H2)13 - "renesas,irqc-r8a7790" (R-Car H2)
@@ -19,6 +21,7 @@ Required properties: · 7 unmodified lines
19 - "renesas,intc-ex-r8a77965" (R-Car M3-N)21 - "renesas,intc-ex-r8a77965" (R-Car M3-N)
20 - "renesas,intc-ex-r8a77970" (R-Car V3M)22 - "renesas,intc-ex-r8a77970" (R-Car V3M)
21 - "renesas,intc-ex-r8a77980" (R-Car V3H)23 - "renesas,intc-ex-r8a77980" (R-Car V3H)
24 - "renesas,intc-ex-r8a77990" (R-Car E3)
22 - "renesas,intc-ex-r8a77995" (R-Car D3)25 - "renesas,intc-ex-r8a77995" (R-Car D3)
23- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in26- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
24 interrupts.txt in this directory27 interrupts.txt in this directory
Documentation/devicetree/bindings/iommu/mediatek,iommu.txt+3−1
@@ -41,6 +41,8 @@ Required properties: · 40 unmodified lines
41- compatible : must be one of the following string:41- compatible : must be one of the following string:
42 "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW.42 "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW.
43 "mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW.43 "mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW.
44 "mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses
45 generation one m4u HW.
44 "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW.46 "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW.
45- reg : m4u register base and size.47- reg : m4u register base and size.
46- interrupts : the interrupt of m4u.48- interrupts : the interrupt of m4u.
@@ -51,7 +53,7 @@ Required properties: · 4 unmodified lines
51 according to the local arbiter index, like larb0, larb1, larb2...53 according to the local arbiter index, like larb0, larb1, larb2...
52- iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.54- iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
53 Specifies the mtk_m4u_id as defined in55 Specifies the mtk_m4u_id as defined in
54 dt-binding/memory/mt2701-larb-port.h for mt2701,56 dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623
55 dt-binding/memory/mt2712-larb-port.h for mt2712, and57 dt-binding/memory/mt2712-larb-port.h for mt2712, and
56 dt-binding/memory/mt8173-larb-port.h for mt8173.58 dt-binding/memory/mt8173-larb-port.h for mt8173.
57 59
Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt+1−0
@@ -12,6 +12,7 @@ Required Properties: · 11 unmodified lines
12 12
13 - "renesas,ipmmu-r8a73a4" for the R8A73A4 (R-Mobile APE6) IPMMU.13 - "renesas,ipmmu-r8a73a4" for the R8A73A4 (R-Mobile APE6) IPMMU.
14 - "renesas,ipmmu-r8a7743" for the R8A7743 (RZ/G1M) IPMMU.14 - "renesas,ipmmu-r8a7743" for the R8A7743 (RZ/G1M) IPMMU.
15 - "renesas,ipmmu-r8a7744" for the R8A7744 (RZ/G1N) IPMMU.
15 - "renesas,ipmmu-r8a7745" for the R8A7745 (RZ/G1E) IPMMU.16 - "renesas,ipmmu-r8a7745" for the R8A7745 (RZ/G1E) IPMMU.
16 - "renesas,ipmmu-r8a7790" for the R8A7790 (R-Car H2) IPMMU.17 - "renesas,ipmmu-r8a7790" for the R8A7790 (R-Car H2) IPMMU.
17 - "renesas,ipmmu-r8a7791" for the R8A7791 (R-Car M2-W) IPMMU.18 - "renesas,ipmmu-r8a7791" for the R8A7791 (R-Car M2-W) IPMMU.
Documentation/devicetree/bindings/leds/leds-an30259a.txt+43−0
@@ -0,0 +1,43 @@
1* Panasonic AN30259A 3-channel LED driver
2
3The AN30259A is a LED controller capable of driving three LEDs independently. It supports
4constant current output and sloping current output modes. The chip is connected over I2C.
5
6Required properties:
7 - compatible: Must be "panasonic,an30259a".
8 - reg: I2C slave address.
9 - #address-cells: Must be 1.
10 - #size-cells: Must be 0.
11
12Each LED is represented as a sub-node of the panasonic,an30259a node.
13
14Required sub-node properties:
15 - reg: Pin that the LED is connected to. Must be 1, 2, or 3.
16
17Optional sub-node properties:
18 - label: see Documentation/devicetree/bindings/leds/common.txt
19 - linux,default-trigger: see Documentation/devicetree/bindings/leds/common.txt
20
21Example:
22led-controller@30 {
23 compatible = "panasonic,an30259a";
24 reg = <0x30>;
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 led@1 {
29 reg = <1>;
30 linux,default-trigger = "heartbeat";
31 label = "red:indicator";
32 };
33
34 led@2 {
35 reg = <2>;
36 label = "green:indicator";
37 };
38
39 led@3 {
40 reg = <3>;
41 label = "blue:indicator";
42 };
43};
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt+1−0
@@ -11,6 +11,7 @@ platforms. · 10 unmodified lines
11 "qcom,msm8916-apcs-kpss-global",11 "qcom,msm8916-apcs-kpss-global",
12 "qcom,msm8996-apcs-hmss-global"12 "qcom,msm8996-apcs-hmss-global"
13 "qcom,msm8998-apcs-hmss-global"13 "qcom,msm8998-apcs-hmss-global"
14 "qcom,qcs404-apcs-apps-global"
14 "qcom,sdm845-apss-shared"15 "qcom,sdm845-apss-shared"
15 16
16- reg:17- reg:
Documentation/devicetree/bindings/media/cedrus.txt+54−0
@@ -0,0 +1,54 @@
1Device-tree bindings for the VPU found in Allwinner SoCs, referred to as the
2Video Engine (VE) in Allwinner literature.
3
4The VPU can only access the first 256 MiB of DRAM, that are DMA-mapped starting
5from the DRAM base. This requires specific memory allocation and handling.
6
7Required properties:
8- compatible : must be one of the following compatibles:
9 - "allwinner,sun4i-a10-video-engine"
10 - "allwinner,sun5i-a13-video-engine"
11 - "allwinner,sun7i-a20-video-engine"
12 - "allwinner,sun8i-a33-video-engine"
13 - "allwinner,sun8i-h3-video-engine"
14- reg : register base and length of VE;
15- clocks : list of clock specifiers, corresponding to entries in
16 the clock-names property;
17- clock-names : should contain "ahb", "mod" and "ram" entries;
18- resets : phandle for reset;
19- interrupts : VE interrupt number;
20- allwinner,sram : SRAM region to use with the VE.
21
22Optional properties:
23- memory-region : CMA pool to use for buffers allocation instead of the
24 default CMA pool.
25
26Example:
27
28reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
33 /* Address must be kept in the lower 256 MiBs of DRAM for VE. */
34 cma_pool: cma@4a000000 {
35 compatible = "shared-dma-pool";
36 size = <0x6000000>;
37 alloc-ranges = <0x4a000000 0x6000000>;
38 reusable;
39 linux,cma-default;
40 };
41};
42
43video-codec@1c0e000 {
44 compatible = "allwinner,sun7i-a20-video-engine";
45 reg = <0x01c0e000 0x1000>;
46
47 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
48 <&ccu CLK_DRAM_VE>;
49 clock-names = "ahb", "mod", "ram";
50
51 resets = <&ccu RST_VE>;
52 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
53 allwinner,sram = <&ve_sram 1>;
54};
Documentation/devicetree/bindings/media/fsl-pxp.txt+26−0
@@ -0,0 +1,26 @@
1Freescale Pixel Pipeline
2========================
3
4The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
5that supports scaling, colorspace conversion, alpha blending, rotation, and
6pixel conversion via lookup table. Different versions are present on various
7i.MX SoCs from i.MX23 to i.MX7.
8
9Required properties:
10- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28,
11 imx6dl, imx6sl, imx6ul, imx6sx, imx6ull, or imx7d.
12- reg: the register base and size for the device registers
13- interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d.
14- clock-names: should be "axi"
15- clocks: the PXP AXI clock
16
17Example:
18
19pxp@21cc000 {
20 compatible = "fsl,imx6ull-pxp";
21 reg = <0x021cc000 0x4000>;
22 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
23 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
24 clock-names = "axi";
25 clocks = <&clks IMX6UL_CLK_PXP>;
26};
Documentation/devicetree/bindings/media/i2c/adv748x.txt+16−4
@@ -10,7 +10,11 @@ Required Properties: · 9 unmodified lines
10 - "adi,adv7481" for the ADV748110 - "adi,adv7481" for the ADV7481
11 - "adi,adv7482" for the ADV748211 - "adi,adv7482" for the ADV7482
12 12
13 - reg: I2C slave address13 - reg: I2C slave addresses
14 The ADV748x has up to twelve 256-byte maps that can be accessed via the
15 main I2C ports. Each map has it own I2C address and acts as a standard
16 slave device on the I2C bus. The main address is mandatory, others are
17 optional and remain at default values if not specified.
14 18
15Optional Properties:19Optional Properties:
16 20
@@ -18,6 +22,11 @@ Optional Properties: · 1 unmodified line
18 "intrq3". All interrupts are optional. The "intrq3" interrupt22 "intrq3". All interrupts are optional. The "intrq3" interrupt
19 is only available on the adv748123 is only available on the adv7481
20 - interrupts: Specify the interrupt lines for the ADV748x24 - interrupts: Specify the interrupt lines for the ADV748x
25 - reg-names : Names of maps with programmable addresses.
26 It shall contain all maps needing a non-default address.
27 Possible map names are:
28 "main", "dpll", "cp", "hdmi", "edid", "repeater",
29 "infoframe", "cbus", "cec", "sdp", "txa", "txb"
21 30
22The device node must contain one 'port' child node per device input and output31The device node must contain one 'port' child node per device input and output
23port, in accordance with the video interface bindings defined in32port, in accordance with the video interface bindings defined in
@@ -47,7 +56,10 @@ Example: · 23 unmodified lines
47 56
48 video-receiver@70 {57 video-receiver@70 {
49 compatible = "adi,adv7482";58 compatible = "adi,adv7482";
50 reg = <0x70>;59 reg = <0x70 0x71 0x72 0x73 0x74 0x75
60 0x60 0x61 0x62 0x63 0x64 0x65>;
61 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
62 "infoframe", "cbus", "cec", "sdp", "txa", "txb";
51 63
52 #address-cells = <1>;64 #address-cells = <1>;
53 #size-cells = <0>;65 #size-cells = <0>;
@@ -73,7 +85,7 @@ Example: · 19 unmodified lines
73 };85 };
74 };86 };
75 87
76 port@10 {88 port@a {
77 reg = <10>;89 reg = <10>;
78 90
79 adv7482_txa: endpoint {91 adv7482_txa: endpoint {
@@ -83,7 +95,7 @@ Example: · 3 unmodified lines
83 };95 };
84 };96 };
85 97
86 port@11 {98 port@b {
87 reg = <11>;99 reg = <11>;
88 100
89 adv7482_txb: endpoint {101 adv7482_txb: endpoint {
Documentation/devicetree/bindings/media/i2c/adv7604.txt+1−1
@@ -66,7 +66,7 @@ Example: · 65 unmodified lines
66 * other maps will retain their default addresses.66 * other maps will retain their default addresses.
67 */67 */
68 reg = <0x4c>, <0x66>;68 reg = <0x4c>, <0x66>;
69 reg-names "main", "edid";69 reg-names = "main", "edid";
70 70
71 reset-gpios = <&ioexp 0 GPIO_ACTIVE_LOW>;71 reset-gpios = <&ioexp 0 GPIO_ACTIVE_LOW>;
72 hpd-gpios = <&ioexp 2 GPIO_ACTIVE_HIGH>;72 hpd-gpios = <&ioexp 2 GPIO_ACTIVE_HIGH>;
Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txtrenamed from Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807.txt+0−0

File renamed without changes.

Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.txt+1−0
@@ -5,6 +5,7 @@ Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs · 4 unmodified lines
5Required properties:5Required properties:
6- compatible : must be one of the following string:6- compatible : must be one of the following string:
7 "mediatek,mt8173-jpgdec"7 "mediatek,mt8173-jpgdec"
8 "mediatek,mt7623-jpgdec", "mediatek,mt2701-jpgdec"
8 "mediatek,mt2701-jpgdec"9 "mediatek,mt2701-jpgdec"
9- reg : physical base address of the jpeg decoder registers and length of10- reg : physical base address of the jpeg decoder registers and length of
10 memory mapped region.11 memory mapped region.
Documentation/devicetree/bindings/media/rcar_vin.txt+1−0
@@ -11,6 +11,7 @@ on Gen3 platforms to a CSI-2 receiver. · 10 unmodified lines
11 11
12 - compatible: Must be one or more of the following12 - compatible: Must be one or more of the following
13 - "renesas,vin-r8a7743" for the R8A7743 device13 - "renesas,vin-r8a7743" for the R8A7743 device
14 - "renesas,vin-r8a7744" for the R8A7744 device
14 - "renesas,vin-r8a7745" for the R8A7745 device15 - "renesas,vin-r8a7745" for the R8A7745 device
15 - "renesas,vin-r8a7778" for the R8A7778 device16 - "renesas,vin-r8a7778" for the R8A7778 device
16 - "renesas,vin-r8a7779" for the R8A7779 device17 - "renesas,vin-r8a7779" for the R8A7779 device
Documentation/devicetree/bindings/media/renesas,ceu.txt+9−5
@@ -17,15 +17,19 @@ Required properties: · 16 unmodified lines
17The CEU supports a single parallel input and should contain a single 'port'17The CEU supports a single parallel input and should contain a single 'port'
18subnode with a single 'endpoint'. Connection to input devices are modeled18subnode with a single 'endpoint'. Connection to input devices are modeled
19according to the video interfaces OF bindings specified in:19according to the video interfaces OF bindings specified in:
20Documentation/devicetree/bindings/media/video-interfaces.txt20[1] Documentation/devicetree/bindings/media/video-interfaces.txt
21 21
22Optional endpoint properties applicable to parallel input bus described in22Optional endpoint properties applicable to parallel input bus described in
23the above mentioned "video-interfaces.txt" file are supported.23the above mentioned "video-interfaces.txt" file are supported.
24 24
25- hsync-active: Active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.25- hsync-active: See [1] for description. If property is not present,
26 If property is not present, default is active high.26 default is active high.
27- vsync-active: Active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.27- vsync-active: See [1] for description. If property is not present,
28 If property is not present, default is active high.28 default is active high.
29- bus-width: See [1] for description. Accepted values are '8' and '16'.
30 If property is not present, default is '8'.
31- field-even-active: See [1] for description. If property is not present,
32 an even field is identified by a logic 0 (active-low signal).
29 33
30Example:34Example:
31 35
Documentation/devicetree/bindings/media/rockchip-vpu.txt+29−0
@@ -0,0 +1,29 @@
1device-tree bindings for rockchip VPU codec
2
3Rockchip (Video Processing Unit) present in various Rockchip platforms,
4such as RK3288 and RK3399.
5
6Required properties:
7- compatible: value should be one of the following
8 "rockchip,rk3288-vpu";
9 "rockchip,rk3399-vpu";
10- interrupts: encoding and decoding interrupt specifiers
11- interrupt-names: should be "vepu" and "vdpu"
12- clocks: phandle to VPU aclk, hclk clocks
13- clock-names: should be "aclk" and "hclk"
14- power-domains: phandle to power domain node
15- iommus: phandle to a iommu node
16
17Example:
18SoC-specific DT entry:
19 vpu: video-codec@ff9a0000 {
20 compatible = "rockchip,rk3288-vpu";
21 reg = <0x0 0xff9a0000 0x0 0x800>;
22 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
23 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
24 interrupt-names = "vepu", "vdpu";
25 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
26 clock-names = "aclk", "hclk";
27 power-domains = <&power RK3288_PD_VIDEO>;
28 iommus = <&vpu_mmu>;
29 };
Documentation/devicetree/bindings/media/video-interfaces.txt+3−1
@@ -100,10 +100,12 @@ Optional endpoint properties · 99 unmodified lines
100 slave device (data source) by the master device (data sink). In the master100 slave device (data source) by the master device (data sink). In the master
101 mode the data source device is also the source of the synchronization signals.101 mode the data source device is also the source of the synchronization signals.
102- bus-type: data bus type. Possible values are:102- bus-type: data bus type. Possible values are:
103 0 - autodetect based on other properties (MIPI CSI-2 D-PHY, parallel or Bt656)
104 1 - MIPI CSI-2 C-PHY103 1 - MIPI CSI-2 C-PHY
105 2 - MIPI CSI1104 2 - MIPI CSI1
106 3 - CCP2105 3 - CCP2
106 4 - MIPI CSI-2 D-PHY
107 5 - Parallel
108 6 - Bt.656
107- bus-width: number of data lines actively used, valid for the parallel busses.109- bus-width: number of data lines actively used, valid for the parallel busses.
108- data-shift: on the parallel data busses, if bus-width is used to specify the110- data-shift: on the parallel data busses, if bus-width is used to specify the
109 number of data lines, data-shift can be used to specify which data lines are111 number of data lines, data-shift can be used to specify which data lines are
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt+1−0
@@ -17,6 +17,7 @@ Required properties: · 16 unmodified lines
17- compatible : must be one of :17- compatible : must be one of :
18 "mediatek,mt2701-smi-common"18 "mediatek,mt2701-smi-common"
19 "mediatek,mt2712-smi-common"19 "mediatek,mt2712-smi-common"
20 "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common"
20 "mediatek,mt8173-smi-common"21 "mediatek,mt8173-smi-common"
21- reg : the register and size of the SMI block.22- reg : the register and size of the SMI block.
22- power-domains : a phandle to the power domain of this local arbiter.23- power-domains : a phandle to the power domain of this local arbiter.
Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt+2−1
@@ -6,6 +6,7 @@ Required properties: · 5 unmodified lines
6- compatible : must be one of :6- compatible : must be one of :
7 "mediatek,mt2701-smi-larb"7 "mediatek,mt2701-smi-larb"
8 "mediatek,mt2712-smi-larb"8 "mediatek,mt2712-smi-larb"
9 "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb"
9 "mediatek,mt8173-smi-larb"10 "mediatek,mt8173-smi-larb"
10- reg : the register and size of this local arbiter.11- reg : the register and size of this local arbiter.
11- mediatek,smi : a phandle to the smi_common node.12- mediatek,smi : a phandle to the smi_common node.
@@ -16,7 +17,7 @@ Required properties: · 4 unmodified lines
16 the register.17 the register.
17 - "smi" : It's the clock for transfer data and command.18 - "smi" : It's the clock for transfer data and command.
18 19
19Required property for mt2701 and mt2712:20Required property for mt2701, mt2712 and mt7623:
20- mediatek,larb-id :the hardware id of this larb.21- mediatek,larb-id :the hardware id of this larb.
21 22
22Example:23Example:
Documentation/devicetree/bindings/mfd/arizona.txt+1−1
@@ -76,7 +76,7 @@ Deprecated properties: · 75 unmodified lines
76Also see child specific device properties:76Also see child specific device properties:
77 Regulator - ../regulator/arizona-regulator.txt77 Regulator - ../regulator/arizona-regulator.txt
78 Extcon - ../extcon/extcon-arizona.txt78 Extcon - ../extcon/extcon-arizona.txt
79 Sound - ../sound/arizona.txt79 Sound - ../sound/wlf,arizona.txt
80 80
81Example:81Example:
82 82
Documentation/devicetree/bindings/mfd/atmel-usart.txtrenamed from Documentation/devicetree/bindings/serial/atmel-usart.txt+23−2
@@ -1,6 +1,6 @@
1* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)1* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
2 2
3Required properties:3Required properties for USART:
4- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"4- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
5 The compatible <chip> indicated will be the first SoC to support an5 The compatible <chip> indicated will be the first SoC to support an
6 additional mode or an USART new feature.6 additional mode or an USART new feature.
@@ -11,7 +11,13 @@ Required properties: · 4 unmodified lines
11 Required elements: "usart"11 Required elements: "usart"
12- clocks: phandles to input clocks.12- clocks: phandles to input clocks.
13 13
14Optional properties:14Required properties for USART in SPI mode:
15- #size-cells : Must be <0>
16- #address-cells : Must be <1>
17- cs-gpios: chipselects (internal cs not supported)
18- atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
19
20Optional properties in serial mode:
15- atmel,use-dma-rx: use of PDC or DMA for receiving data21- atmel,use-dma-rx: use of PDC or DMA for receiving data
16- atmel,use-dma-tx: use of PDC or DMA for transmitting data22- atmel,use-dma-tx: use of PDC or DMA for transmitting data
17- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.23- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
@@ -62,3 +68,18 @@ Example: · 44 unmodified lines
62 dma-names = "tx", "rx";68 dma-names = "tx", "rx";
63 atmel,fifo-size = <32>;69 atmel,fifo-size = <32>;
64 };70 };
71
72- SPI mode:
73 #include <dt-bindings/mfd/at91-usart.h>
74
75 spi0: spi@f001c000 {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart";
79 atmel,usart-mode = <AT91_USART_MODE_SPI>;
80 reg = <0xf001c000 0x100>;
81 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
82 clocks = <&usart0_clk>;
83 clock-names = "usart";
84 cs-gpios = <&pioB 3 0>;
85 };
Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.txt+9−8
@@ -1,16 +1,17 @@
1* ROHM BD71837 Power Management Integrated Circuit bindings1* ROHM BD71837 and BD71847 Power Management Integrated Circuit bindings
2 2
3BD71837MWV is a programmable Power Management IC for powering single-core,3BD71837MWV and BD71847MWV are programmable Power Management ICs for powering
4dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for4single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. They are
5low BOM cost and compact solution footprint. It integrates 8 Buck5optimized for low BOM cost and compact solution footprint. BD71837MWV
6egulators and 7 LDOs to provide all the power rails required by the SoC and6integrates 8 Buck regulators and 7 LDOs. BD71847MWV contains 6 Buck regulators
7the commonly used peripherals.7and 6 LDOs.
8 8
9Datasheet for PMIC is available at:9Datasheet for BD71837 is available at:
10https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e10https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
11 11
12Required properties:12Required properties:
13 - compatible : Should be "rohm,bd71837".13 - compatible : Should be "rohm,bd71837" for bd71837
14 "rohm,bd71847" for bd71847.
14 - reg : I2C slave address.15 - reg : I2C slave address.
15 - interrupt-parent : Phandle to the parent interrupt controller.16 - interrupt-parent : Phandle to the parent interrupt controller.
16 - interrupts : The interrupt line the device is connected to.17 - interrupts : The interrupt line the device is connected to.
Documentation/devicetree/bindings/mips/mscc.txt+16−0
@@ -41,3 +41,19 @@ Example: · 40 unmodified lines
41 compatible = "mscc,ocelot-cpu-syscon", "syscon";41 compatible = "mscc,ocelot-cpu-syscon", "syscon";
42 reg = <0x70000000 0x2c>;42 reg = <0x70000000 0x2c>;
43 };43 };
44
45o HSIO regs:
46
47The SoC has a few registers (HSIO) handling miscellaneous functionalities:
48configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
49status, SerDes muxing and a thermal sensor.
50
51Required properties:
52- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
53- reg : Should contain registers location and length
54
55Example:
56 syscon@10d0000 {
57 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
58 reg = <0x10d0000 0x10000>;
59 };
Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt+39−0
@@ -9,6 +9,25 @@ blocks that can be used to create functional hardware objects/devices · 8 unmodified lines
9such as network interfaces, crypto accelerator instances, L2 switches,9such as network interfaces, crypto accelerator instances, L2 switches,
10etc.10etc.
11 11
12For an overview of the DPAA2 architecture and fsl-mc bus see:
13Documentation/networking/dpaa2/overview.rst
14
15As described in the above overview, all DPAA2 objects in a DPRC share the
16same hardware "isolation context" and a 10-bit value called an ICID
17(isolation context id) is expressed by the hardware to identify
18the requester.
19
20The generic 'iommus' property is insufficient to describe the relationship
21between ICIDs and IOMMUs, so an iommu-map property is used to define
22the set of possible ICIDs under a root DPRC and how they map to
23an IOMMU.
24
25For generic IOMMU bindings, see
26Documentation/devicetree/bindings/iommu/iommu.txt.
27
28For arm-smmu binding, see:
29Documentation/devicetree/bindings/iommu/arm,smmu.txt.
30
12Required properties:31Required properties:
13 32
14 - compatible33 - compatible
@@ -88,14 +107,34 @@ Sub-nodes: · 73 unmodified lines
88 Value type: <phandle>107 Value type: <phandle>
89 Definition: Specifies the phandle to the PHY device node associated108 Definition: Specifies the phandle to the PHY device node associated
90 with the this dpmac.109 with the this dpmac.
110Optional properties:
111
112- iommu-map: Maps an ICID to an IOMMU and associated iommu-specifier
113 data.
114
115 The property is an arbitrary number of tuples of
116 (icid-base,iommu,iommu-base,length).
117
118 Any ICID i in the interval [icid-base, icid-base + length) is
119 associated with the listed IOMMU, with the iommu-specifier
120 (i - icid-base + iommu-base).
91 121
92Example:122Example:
93 123
124 smmu: iommu@5000000 {
125 compatible = "arm,mmu-500";
126 #iommu-cells = <1>;
127 stream-match-mask = <0x7C00>;
128 ...
129 };
130
94 fsl_mc: fsl-mc@80c000000 {131 fsl_mc: fsl-mc@80c000000 {
95 compatible = "fsl,qoriq-mc";132 compatible = "fsl,qoriq-mc";
96 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */133 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
97 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */134 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
98 msi-parent = <&its>;135 msi-parent = <&its>;
136 /* define map for ICIDs 23-64 */
137 iommu-map = <23 &smmu 23 41>;
99 #address-cells = <3>;138 #address-cells = <3>;
100 #size-cells = <1>;139 #size-cells = <1>;
101 140
Documentation/devicetree/bindings/misc/lwn-bk4.txt+26−0
@@ -0,0 +1,26 @@
1* Liebherr's BK4 controller external SPI
2
3A device which handles data acquisition from compatible industrial
4peripherals.
5The SPI is used for data and management purposes in both master and
6slave modes.
7
8Required properties:
9
10- compatible : Should be "lwn,bk4"
11
12Required SPI properties:
13
14- reg : Should be address of the device chip select within
15 the controller.
16
17- spi-max-frequency : Maximum SPI clocking speed of device in Hz, should be
18 30MHz at most for the Liebherr's BK4 external bus.
19
20Example:
21
22spidev0: spi@0 {
23 compatible = "lwn,bk4";
24 spi-max-frequency = <30000000>;
25 reg = <0>;
26};
Documentation/devicetree/bindings/mmc/arasan,sdhci.txt+1−0
@@ -15,6 +15,7 @@ Required Properties: · 14 unmodified lines
15 - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY15 - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY
16 - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY16 - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY
17 For this device it is strongly suggested to include arasan,soc-ctl-syscon.17 For this device it is strongly suggested to include arasan,soc-ctl-syscon.
18 - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY
18 - reg: From mmc bindings: Register location and length.19 - reg: From mmc bindings: Register location and length.
19 - clocks: From clock bindings: Handles to clock inputs.20 - clocks: From clock bindings: Handles to clock inputs.
20 - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"21 - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"
Documentation/devicetree/bindings/mmc/jz4740.txt+1−0
@@ -7,6 +7,7 @@ described in mmc.txt. · 6 unmodified lines
7Required properties:7Required properties:
8- compatible: Should be one of the following:8- compatible: Should be one of the following:
9 - "ingenic,jz4740-mmc" for the JZ47409 - "ingenic,jz4740-mmc" for the JZ4740
10 - "ingenic,jz4725b-mmc" for the JZ4725B
10 - "ingenic,jz4780-mmc" for the JZ478011 - "ingenic,jz4780-mmc" for the JZ4780
11- reg: Should contain the MMC controller registers location and length.12- reg: Should contain the MMC controller registers location and length.
12- interrupts: Should contain the interrupt specifier of the MMC controller.13- interrupts: Should contain the interrupt specifier of the MMC controller.
Documentation/devicetree/bindings/mmc/mmci.txt+11−0
@@ -15,8 +15,11 @@ Required properties: · 14 unmodified lines
15Optional properties:15Optional properties:
16- arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides16- arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides
17 the ID provided by the HW17 the ID provided by the HW
18- resets : phandle to internal reset line.
19 Should be defined for sdmmc variant.
18- vqmmc-supply : phandle to the regulator device tree node, mentioned20- vqmmc-supply : phandle to the regulator device tree node, mentioned
19 as the VCCQ/VDD_IO supply in the eMMC/SD specs.21 as the VCCQ/VDD_IO supply in the eMMC/SD specs.
22specific for ux500 variant:
20- st,sig-dir-dat0 : bus signal direction pin used for DAT[0].23- st,sig-dir-dat0 : bus signal direction pin used for DAT[0].
21- st,sig-dir-dat2 : bus signal direction pin used for DAT[2].24- st,sig-dir-dat2 : bus signal direction pin used for DAT[2].
22- st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1].25- st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1].
@@ -24,6 +27,14 @@ Optional properties: · 1 unmodified line
24- st,sig-dir-cmd : cmd signal direction pin used for CMD.27- st,sig-dir-cmd : cmd signal direction pin used for CMD.
25- st,sig-pin-fbclk : feedback clock signal pin used.28- st,sig-pin-fbclk : feedback clock signal pin used.
26 29
30specific for sdmmc variant:
31- st,sig-dir : signal direction polarity used for cmd, dat0 dat123.
32- st,neg-edge : data & command phase relation, generated on
33 sd clock falling edge.
34- st,use-ckin : use ckin pin from an external driver to sample
35 the receive data (example: with voltage
36 switch transceiver).
37
27Deprecated properties:38Deprecated properties:
28- mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable.39- mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable.
29- mmc-cap-sd-highspeed : indicates whether SD is high speed capable.40- mmc-cap-sd-highspeed : indicates whether SD is high speed capable.
Documentation/devicetree/bindings/mmc/mtk-sd.txt+2−0
@@ -10,6 +10,7 @@ Required properties: · 9 unmodified lines
10- compatible: value should be either of the following.10- compatible: value should be either of the following.
11 "mediatek,mt8135-mmc": for mmc host ip compatible with mt813511 "mediatek,mt8135-mmc": for mmc host ip compatible with mt8135
12 "mediatek,mt8173-mmc": for mmc host ip compatible with mt817312 "mediatek,mt8173-mmc": for mmc host ip compatible with mt8173
13 "mediatek,mt8183-mmc": for mmc host ip compatible with mt8183
13 "mediatek,mt2701-mmc": for mmc host ip compatible with mt270114 "mediatek,mt2701-mmc": for mmc host ip compatible with mt2701
14 "mediatek,mt2712-mmc": for mmc host ip compatible with mt271215 "mediatek,mt2712-mmc": for mmc host ip compatible with mt2712
15 "mediatek,mt7622-mmc": for MT7622 SoC16 "mediatek,mt7622-mmc": for MT7622 SoC
@@ -22,6 +23,7 @@ Required properties: · 6 unmodified lines
22 "source" - source clock (required)23 "source" - source clock (required)
23 "hclk" - HCLK which used for host (required)24 "hclk" - HCLK which used for host (required)
24 "source_cg" - independent source clock gate (required for MT2712)25 "source_cg" - independent source clock gate (required for MT2712)
26 "bus_clk" - bus clock used for internal register access (required for MT2712 MSDC0/3)
25- pinctrl-names: should be "default", "state_uhs"27- pinctrl-names: should be "default", "state_uhs"
26- pinctrl-0: should contain default/high speed pin ctrl28- pinctrl-0: should contain default/high speed pin ctrl
27- pinctrl-1: should contain uhs mode pin ctrl29- pinctrl-1: should contain uhs mode pin ctrl
Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt+72−0
@@ -38,3 +38,75 @@ sdhci@c8000200 { · 37 unmodified lines
38 power-gpios = <&gpio 155 0>; /* gpio PT3 */38 power-gpios = <&gpio 155 0>; /* gpio PT3 */
39 bus-width = <8>;39 bus-width = <8>;
40};40};
41
42Optional properties for Tegra210 and Tegra186:
43- pinctrl-names, pinctrl-0, pinctrl-1 : Specify pad voltage
44 configurations. Valid pinctrl-names are "sdmmc-3v3" and "sdmmc-1v8"
45 for controllers supporting multiple voltage levels. The order of names
46 should correspond to the pin configuration states in pinctrl-0 and
47 pinctrl-1.
48- nvidia,only-1-8-v : The presence of this property indicates that the
49 controller operates at a 1.8 V fixed I/O voltage.
50- nvidia,pad-autocal-pull-up-offset-3v3,
51 nvidia,pad-autocal-pull-down-offset-3v3 : Specify drive strength
52 calibration offsets for 3.3 V signaling modes.
53- nvidia,pad-autocal-pull-up-offset-1v8,
54 nvidia,pad-autocal-pull-down-offset-1v8 : Specify drive strength
55 calibration offsets for 1.8 V signaling modes.
56- nvidia,pad-autocal-pull-up-offset-3v3-timeout,
57 nvidia,pad-autocal-pull-down-offset-3v3-timeout : Specify drive
58 strength used as a fallback in case the automatic calibration times
59 out on a 3.3 V signaling mode.
60- nvidia,pad-autocal-pull-up-offset-1v8-timeout,
61 nvidia,pad-autocal-pull-down-offset-1v8-timeout : Specify drive
62 strength used as a fallback in case the automatic calibration times
63 out on a 1.8 V signaling mode.
64- nvidia,pad-autocal-pull-up-offset-sdr104,
65 nvidia,pad-autocal-pull-down-offset-sdr104 : Specify drive strength
66 calibration offsets for SDR104 mode.
67- nvidia,pad-autocal-pull-up-offset-hs400,
68 nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength
69 calibration offsets for HS400 mode.
70- nvidia,default-tap : Specify the default inbound sampling clock
71 trimmer value for non-tunable modes.
72- nvidia,default-trim : Specify the default outbound clock trimmer
73 value.
74- nvidia,dqs-trim : Specify DQS trim value for HS400 timing
75
76 Notes on the pad calibration pull up and pulldown offset values:
77 - The property values are drive codes which are programmed into the
78 PD_OFFSET and PU_OFFSET sections of the
79 SDHCI_TEGRA_AUTO_CAL_CONFIG register.
80 - A higher value corresponds to higher drive strength. Please refer
81 to the reference manual of the SoC for correct values.
82 - The SDR104 and HS400 timing specific values are used in
83 corresponding modes if specified.
84
85 Notes on tap and trim values:
86 - The values are used for compensating trace length differences
87 by adjusting the sampling point.
88 - The values are programmed to the Vendor Clock Control Register.
89 Please refer to the reference manual of the SoC for correct
90 values.
91 - The DQS trim values are only used on controllers which support
92 HS400 timing. Only SDMMC4 on Tegra210 and Tegra 186 supports
93 HS400.
94
95Example:
96sdhci@700b0000 {
97 compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
98 reg = <0x0 0x700b0000 0x0 0x200>;
99 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
100 clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
101 clock-names = "sdhci";
102 resets = <&tegra_car 14>;
103 reset-names = "sdhci";
104 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
105 pinctrl-0 = <&sdmmc1_3v3>;
106 pinctrl-1 = <&sdmmc1_1v8>;
107 nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
108 nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
109 nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
110 nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
111 status = "disabled";
112};
Documentation/devicetree/bindings/mmc/renesas,mmcif.txt+3−1
@@ -12,6 +12,7 @@ Required properties: · 11 unmodified lines
12 - "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs12 - "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs
13 - "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs13 - "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs
14 - "renesas,mmcif-r8a7743" for the MMCIF found in r8a7743 SoCs14 - "renesas,mmcif-r8a7743" for the MMCIF found in r8a7743 SoCs
15 - "renesas,mmcif-r8a7744" for the MMCIF found in r8a7744 SoCs
15 - "renesas,mmcif-r8a7745" for the MMCIF found in r8a7745 SoCs16 - "renesas,mmcif-r8a7745" for the MMCIF found in r8a7745 SoCs
16 - "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs17 - "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs
17 - "renesas,mmcif-r8a7790" for the MMCIF found in r8a7790 SoCs18 - "renesas,mmcif-r8a7790" for the MMCIF found in r8a7790 SoCs
@@ -23,7 +24,8 @@ Required properties: · 5 unmodified lines
23- interrupts: Some SoCs have only 1 shared interrupt, while others have either24- interrupts: Some SoCs have only 1 shared interrupt, while others have either
24 2 or 3 individual interrupts (error, int, card detect). Below is the number25 2 or 3 individual interrupts (error, int, card detect). Below is the number
25 of interrupts for each SoC:26 of interrupts for each SoC:
26 1: r8a73a4, r8a7743, r8a7745, r8a7778, r8a7790, r8a7791, r8a7793, r8a779427 1: r8a73a4, r8a7743, r8a7744, r8a7745, r8a7778, r8a7790, r8a7791, r8a7793,
28 r8a7794
27 2: r8a7740, sh73a029 2: r8a7740, sh73a0
28 3: r7s7210030 3: r7s72100
29 31
Documentation/devicetree/bindings/mmc/sdhci-sprd.txt+41−0
@@ -0,0 +1,41 @@
1* Spreadtrum SDHCI controller (sdhci-sprd)
2
3The Secure Digital (SD) Host controller on Spreadtrum SoCs provides an interface
4for MMC, SD and SDIO types of cards.
5
6This file documents differences between the core properties in mmc.txt
7and the properties used by the sdhci-sprd driver.
8
9Required properties:
10- compatible: Should contain "sprd,sdhci-r11".
11- reg: physical base address of the controller and length.
12- interrupts: Interrupts used by the SDHCI controller.
13- clocks: Should contain phandle for the clock feeding the SDHCI controller
14- clock-names: Should contain the following:
15 "sdio" - SDIO source clock (required)
16 "enable" - gate clock which used for enabling/disabling the device (required)
17
18Optional properties:
19- assigned-clocks: the same with "sdio" clock
20- assigned-clock-parents: the default parent of "sdio" clock
21
22Examples:
23
24sdio0: sdio@20600000 {
25 compatible = "sprd,sdhci-r11";
26 reg = <0 0x20600000 0 0x1000>;
27 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
28
29 clock-names = "sdio", "enable";
30 clocks = <&ap_clk CLK_EMMC_2X>,
31 <&apahb_gate CLK_EMMC_EB>;
32 assigned-clocks = <&ap_clk CLK_EMMC_2X>;
33 assigned-clock-parents = <&rpll CLK_RPLL_390M>;
34
35 bus-width = <8>;
36 non-removable;
37 no-sdio;
38 no-sd;
39 cap-mmc-hw-reset;
40 status = "okay";
41};
Documentation/devicetree/bindings/mmc/tmio_mmc.txt+8−2
@@ -16,7 +16,11 @@ Required properties: · 15 unmodified lines
16 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC16 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
17 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC17 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
18 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC18 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
19 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
19 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC20 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
21 "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
22 "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
23 "renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC
20 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC24 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
21 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC25 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
22 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC26 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
@@ -27,14 +31,16 @@ Required properties: · 4 unmodified lines
27 "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC31 "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
28 "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC32 "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
29 "renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC33 "renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC
34 "renesas,sdhi-r8a77970" - SDHI IP on R8A77970 SoC
30 "renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC35 "renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC
31 "renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC36 "renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC
32 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC37 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
33 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller38 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
34 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller39 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
35 "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G140 "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
41 (not SDHI/MMC) controller
42 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
36 SDHI controller43 SDHI controller
37 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 SDHI controller
38 44
39 45
40 When compatible with the generic version, nodes must list46 When compatible with the generic version, nodes must list
Documentation/devicetree/bindings/mmc/uniphier-sd.txt+55−0
@@ -0,0 +1,55 @@
1UniPhier SD/eMMC controller
2
3Required properties:
4- compatible: should be one of the following:
5 "socionext,uniphier-sd-v2.91" - IP version 2.91
6 "socionext,uniphier-sd-v3.1" - IP version 3.1
7 "socionext,uniphier-sd-v3.1.1" - IP version 3.1.1
8- reg: offset and length of the register set for the device.
9- interrupts: a single interrupt specifier.
10- clocks: a single clock specifier of the controller clock.
11- reset-names: should contain the following:
12 "host" - mandatory for all versions
13 "bridge" - should exist only for "socionext,uniphier-sd-v2.91"
14 "hw" - should exist if eMMC hw reset line is available
15- resets: a list of reset specifiers, corresponding to the reset-names
16
17Optional properties:
18- pinctrl-names: if present, should contain the following:
19 "default" - should exist for all instances
20 "uhs" - should exist for SD instance with UHS support
21- pinctrl-0: pin control state for the default mode
22- pinctrl-1: pin control state for the UHS mode
23- dma-names: should be "rx-tx" if present.
24 This property can exist only for "socionext,uniphier-sd-v2.91".
25- dmas: a single DMA channel specifier
26 This property can exist only for "socionext,uniphier-sd-v2.91".
27- bus-width: see mmc.txt
28- cap-sd-highspeed: see mmc.txt
29- cap-mmc-highspeed: see mmc.txt
30- sd-uhs-sdr12: see mmc.txt
31- sd-uhs-sdr25: see mmc.txt
32- sd-uhs-sdr50: see mmc.txt
33- cap-mmc-hw-reset: should exist if reset-names contains "hw". see mmc.txt
34- non-removable: see mmc.txt
35
36Example:
37
38 sd: sdhc@5a400000 {
39 compatible = "socionext,uniphier-sd-v2.91";
40 reg = <0x5a400000 0x200>;
41 interrupts = <0 76 4>;
42 pinctrl-names = "default", "uhs";
43 pinctrl-0 = <&pinctrl_sd>;
44 pinctrl-1 = <&pinctrl_sd_uhs>;
45 clocks = <&mio_clk 0>;
46 reset-names = "host", "bridge";
47 resets = <&mio_rst 0>, <&mio_rst 3>;
48 dma-names = "rx-tx";
49 dmas = <&dmac 4>;
50 bus-width = <4>;
51 cap-sd-highspeed;
52 sd-uhs-sdr12;
53 sd-uhs-sdr25;
54 sd-uhs-sdr50;
55 };
Documentation/devicetree/bindings/net/brcm,unimac-mdio.txt+3−0
@@ -19,6 +19,9 @@ Optional properties: · 18 unmodified lines
19- interrupt-names: must be "mdio_done_error" when there is a share interrupt fed19- interrupt-names: must be "mdio_done_error" when there is a share interrupt fed
20 to this hardware block, or must be "mdio_done" for the first interrupt and20 to this hardware block, or must be "mdio_done" for the first interrupt and
21 "mdio_error" for the second when there are separate interrupts21 "mdio_error" for the second when there are separate interrupts
22- clocks: A reference to the clock supplying the MDIO bus controller
23- clock-frequency: the MDIO bus clock that must be output by the MDIO bus
24 hardware, if absent, the default hardware values are used
22 25
23Child nodes of this MDIO bus controller node are standard Ethernet PHY device26Child nodes of this MDIO bus controller node are standard Ethernet PHY device
24nodes as described in Documentation/devicetree/bindings/net/phy.txt27nodes as described in Documentation/devicetree/bindings/net/phy.txt
Documentation/devicetree/bindings/net/can/rcar_can.txt+1−0
@@ -3,6 +3,7 @@ Renesas R-Car CAN controller Device Tree Bindings · 2 unmodified lines
3 3
4Required properties:4Required properties:
5- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.5- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
6 "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
6 "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.7 "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
7 "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.8 "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
8 "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.9 "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
Documentation/devicetree/bindings/net/dsa/b53.txt+36−0
@@ -46,6 +46,42 @@ Required properties: · 45 unmodified lines
46 "brcm,bcm6328-switch"46 "brcm,bcm6328-switch"
47 "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch"47 "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch"
48 48
49Required properties for BCM585xx/586xx/88312 SoCs:
50
51 - reg: a total of 3 register base addresses, the first one must be the
52 Switch Register Access block base, the second is the port 5/4 mux
53 configuration register and the third one is the SGMII configuration
54 and status register base address.
55
56 - interrupts: a total of 13 interrupts must be specified, in the following
57 order: port 0-5, 7-8 link status change, then the integrated PHY interrupt,
58 then the timestamping interrupt and the sleep timer interrupts for ports
59 5,7,8.
60
61Optional properties for BCM585xx/586xx/88312 SoCs:
62
63 - reg-names: a total of 3 names matching the 3 base register address, must
64 be in the following order:
65 "srab"
66 "mux_config"
67 "sgmii_config"
68
69 - interrupt-names: a total of 13 names matching the 13 interrupts specified
70 must be in the following order:
71 "link_state_p0"
72 "link_state_p1"
73 "link_state_p2"
74 "link_state_p3"
75 "link_state_p4"
76 "link_state_p5"
77 "link_state_p7"
78 "link_state_p8"
79 "phy"
80 "ts"
81 "imp_sleep_timer_p5"
82 "imp_sleep_timer_p7"
83 "imp_sleep_timer_p8"
84
49See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional85See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional
50required and optional properties.86required and optional properties.
51 87
Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt+143−0
@@ -0,0 +1,143 @@
1Lantiq GSWIP Ethernet switches
2==================================
3
4Required properties for GSWIP core:
5
6- compatible : "lantiq,xrx200-gswip" for the embedded GSWIP in the
7 xRX200 SoC
8- reg : memory range of the GSWIP core registers
9 : memory range of the GSWIP MDIO registers
10 : memory range of the GSWIP MII registers
11
12See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of
13additional required and optional properties.
14
15
16Required properties for MDIO bus:
17- compatible : "lantiq,xrx200-mdio" for the MDIO bus inside the GSWIP
18 core of the xRX200 SoC and the PHYs connected to it.
19
20See Documentation/devicetree/bindings/net/mdio.txt for a list of additional
21required and optional properties.
22
23
24Required properties for GPHY firmware loading:
25- compatible : "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"
26 "lantiq,xrx300-gphy-fw", "lantiq,gphy-fw"
27 "lantiq,xrx330-gphy-fw", "lantiq,gphy-fw"
28 for the loading of the firmware into the embedded
29 GPHY core of the SoC.
30- lantiq,rcu : reference to the rcu syscon
31
32The GPHY firmware loader has a list of GPHY entries, one for each
33embedded GPHY
34
35- reg : Offset of the GPHY firmware register in the RCU
36 register range
37- resets : list of resets of the embedded GPHY
38- reset-names : list of names of the resets
39
40Example:
41
42Ethernet switch on the VRX200 SoC:
43
44switch@e108000 {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 compatible = "lantiq,xrx200-gswip";
48 reg = < 0xe108000 0x3100 /* switch */
49 0xe10b100 0xd8 /* mdio */
50 0xe10b1d8 0x130 /* mii */
51 >;
52 dsa,member = <0 0>;
53
54 ports {
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 port@0 {
59 reg = <0>;
60 label = "lan3";
61 phy-mode = "rgmii";
62 phy-handle = <&phy0>;
63 };
64
65 port@1 {
66 reg = <1>;
67 label = "lan4";
68 phy-mode = "rgmii";
69 phy-handle = <&phy1>;
70 };
71
72 port@2 {
73 reg = <2>;
74 label = "lan2";
75 phy-mode = "internal";
76 phy-handle = <&phy11>;
77 };
78
79 port@4 {
80 reg = <4>;
81 label = "lan1";
82 phy-mode = "internal";
83 phy-handle = <&phy13>;
84 };
85
86 port@5 {
87 reg = <5>;
88 label = "wan";
89 phy-mode = "rgmii";
90 phy-handle = <&phy5>;
91 };
92
93 port@6 {
94 reg = <0x6>;
95 label = "cpu";
96 ethernet = <&eth0>;
97 };
98 };
99
100 mdio {
101 #address-cells = <1>;
102 #size-cells = <0>;
103 compatible = "lantiq,xrx200-mdio";
104 reg = <0>;
105
106 phy0: ethernet-phy@0 {
107 reg = <0x0>;
108 };
109 phy1: ethernet-phy@1 {
110 reg = <0x1>;
111 };
112 phy5: ethernet-phy@5 {
113 reg = <0x5>;
114 };
115 phy11: ethernet-phy@11 {
116 reg = <0x11>;
117 };
118 phy13: ethernet-phy@13 {
119 reg = <0x13>;
120 };
121 };
122
123 gphy-fw {
124 compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
125 lantiq,rcu = <&rcu0>;
126 #address-cells = <1>;
127 #size-cells = <0>;
128
129 gphy@20 {
130 reg = <0x20>;
131
132 resets = <&reset0 31 30>;
133 reset-names = "gphy";
134 };
135
136 gphy@68 {
137 reg = <0x68>;
138
139 resets = <&reset0 29 28>;
140 reset-names = "gphy";
141 };
142 };
143};
Documentation/devicetree/bindings/net/lantiq,xrx200-net.txt+21−0
@@ -0,0 +1,21 @@
1Lantiq xRX200 GSWIP PMAC Ethernet driver
2==================================
3
4Required properties:
5
6- compatible : "lantiq,xrx200-net" for the PMAC of the embedded
7 : GSWIP in the xXR200
8- reg : memory range of the PMAC core inside of the GSWIP core
9- interrupts : TX and RX DMA interrupts. Use interrupt-names "tx" for
10 : the TX interrupt and "rx" for the RX interrupt.
11
12Example:
13
14ethernet@e10b308 {
15 #address-cells = <1>;
16 #size-cells = <0>;
17 compatible = "lantiq,xrx200-net";
18 reg = <0xe10b308 0xcf8>;
19 interrupts = <73>, <72>;
20 interrupt-names = "tx", "rx";
21};
Documentation/devicetree/bindings/net/marvell,prestera.txt+2−2
@@ -2,7 +2,7 @@ Marvell Prestera Switch Chip bindings · 1 unmodified line
2-------------------------------------2-------------------------------------
3 3
4Required properties:4Required properties:
5- compatible: one of the following5- compatible: must be "marvell,prestera" and one of the following
6 "marvell,prestera-98dx3236",6 "marvell,prestera-98dx3236",
7 "marvell,prestera-98dx3336",7 "marvell,prestera-98dx3336",
8 "marvell,prestera-98dx4251",8 "marvell,prestera-98dx4251",
@@ -21,7 +21,7 @@ switch { · 12 unmodified lines
21 ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>;21 ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>;
22 22
23 packet-processor@0 {23 packet-processor@0 {
24 compatible = "marvell,prestera-98dx3236";24 compatible = "marvell,prestera-98dx3236", "marvell,prestera";
25 reg = <0 0x4000000>;25 reg = <0 0x4000000>;
26 interrupts = <33>, <34>, <35>;26 interrupts = <33>, <34>, <35>;
27 dfx = <&dfx>;27 dfx = <&dfx>;
Documentation/devicetree/bindings/net/marvell-pp2.txt+31−14
@@ -31,7 +31,7 @@ required. · 30 unmodified lines
31 31
32Required properties (port):32Required properties (port):
33 33
34- interrupts: interrupt for the port34- interrupts: interrupt(s) for the port
35- port-id: ID of the port from the MAC point of view35- port-id: ID of the port from the MAC point of view
36- gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the36- gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the
37 GOP (Group Of Ports) point of view. This ID is used to index the37 GOP (Group Of Ports) point of view. This ID is used to index the
@@ -43,10 +43,12 @@ Optional properties (port): · 5 unmodified lines
43- marvell,loopback: port is loopback mode43- marvell,loopback: port is loopback mode
44- phy: a phandle to a phy node defining the PHY address (as the reg44- phy: a phandle to a phy node defining the PHY address (as the reg
45 property, a single integer).45 property, a single integer).
46- interrupt-names: if more than a single interrupt for rx is given, must46- interrupt-names: if more than a single interrupt for is given, must be the
47 be the name associated to the interrupts listed. Valid47 name associated to the interrupts listed. Valid names are:
48 names are: "tx-cpu0", "tx-cpu1", "tx-cpu2", "tx-cpu3",48 "hifX", with X in [0..8], and "link". The names "tx-cpu0",
49 "rx-shared", "link".49 "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported
50 for backward compatibility but shouldn't be used for new
51 additions.
50- marvell,system-controller: a phandle to the system controller.52- marvell,system-controller: a phandle to the system controller.
51 53
52Example for marvell,armada-375-pp2:54Example for marvell,armada-375-pp2:
@@ -89,9 +91,14 @@ cpm_ethernet: ethernet@0 { · 36 unmodified lines
89 <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,91 <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
90 <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,92 <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
91 <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,93 <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
92 <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>;94 <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>,
93 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",95 <ICU_GRP_NSR 59 IRQ_TYPE_LEVEL_HIGH>,
94 "tx-cpu3", "rx-shared";96 <ICU_GRP_NSR 63 IRQ_TYPE_LEVEL_HIGH>,
97 <ICU_GRP_NSR 67 IRQ_TYPE_LEVEL_HIGH>,
98 <ICU_GRP_NSR 71 IRQ_TYPE_LEVEL_HIGH>,
99 <ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH>;
100 interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
101 "hif5", "hif6", "hif7", "hif8", "link";
95 port-id = <0>;102 port-id = <0>;
96 gop-port-id = <0>;103 gop-port-id = <0>;
97 };104 };
@@ -101,9 +108,14 @@ cpm_ethernet: ethernet@0 { · 3 unmodified lines
101 <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,108 <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
102 <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,109 <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
103 <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,110 <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
104 <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>;111 <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>,
105 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",112 <ICU_GRP_NSR 60 IRQ_TYPE_LEVEL_HIGH>,
106 "tx-cpu3", "rx-shared";113 <ICU_GRP_NSR 64 IRQ_TYPE_LEVEL_HIGH>,
114 <ICU_GRP_NSR 68 IRQ_TYPE_LEVEL_HIGH>,
115 <ICU_GRP_NSR 72 IRQ_TYPE_LEVEL_HIGH>,
116 <ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH>;
117 interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
118 "hif5", "hif6", "hif7", "hif8", "link";
107 port-id = <1>;119 port-id = <1>;
108 gop-port-id = <2>;120 gop-port-id = <2>;
109 };121 };
@@ -113,9 +125,14 @@ cpm_ethernet: ethernet@0 { · 3 unmodified lines
113 <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,125 <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
114 <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,126 <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
115 <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,127 <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
116 <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>;128 <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>,
117 interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",129 <ICU_GRP_NSR 61 IRQ_TYPE_LEVEL_HIGH>,
118 "tx-cpu3", "rx-shared";130 <ICU_GRP_NSR 65 IRQ_TYPE_LEVEL_HIGH>,
131 <ICU_GRP_NSR 69 IRQ_TYPE_LEVEL_HIGH>,
132 <ICU_GRP_NSR 73 IRQ_TYPE_LEVEL_HIGH>,
133 <ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH>;
134 interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
135 "hif5", "hif6", "hif7", "hif8", "link";
119 port-id = <2>;136 port-id = <2>;
120 gop-port-id = <3>;137 gop-port-id = <3>;
121 };138 };
Documentation/devicetree/bindings/net/micrel-ksz90x1.txt+27−1
@@ -1,4 +1,4 @@
1Micrel KSZ9021/KSZ9031 Gigabit Ethernet PHY1Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY
2 2
3Some boards require special tuning values, particularly when it comes3Some boards require special tuning values, particularly when it comes
4to clock delays. You can specify clock delay values in the PHY OF4to clock delays. You can specify clock delay values in the PHY OF
@@ -64,6 +64,32 @@ KSZ9031: · 59 unmodified lines
64 Attention: The link partner must be configurable as slave otherwise64 Attention: The link partner must be configurable as slave otherwise
65 no link will be established.65 no link will be established.
66 66
67KSZ9131:
68
69 All skew control options are specified in picoseconds. The increment
70 step is 100ps. Unlike KSZ9031, the values represent picoseccond delays.
71 A negative value can be assigned as rxc-skew-psec = <(-100)>;.
72
73 Optional properties:
74
75 Range of the value -700 to 2400, default value 0:
76
77 - rxc-skew-psec : Skew control of RX clock pad
78 - txc-skew-psec : Skew control of TX clock pad
79
80 Range of the value -700 to 800, default value 0:
81
82 - rxdv-skew-psec : Skew control of RX CTL pad
83 - txen-skew-psec : Skew control of TX CTL pad
84 - rxd0-skew-psec : Skew control of RX data 0 pad
85 - rxd1-skew-psec : Skew control of RX data 1 pad
86 - rxd2-skew-psec : Skew control of RX data 2 pad
87 - rxd3-skew-psec : Skew control of RX data 3 pad
88 - txd0-skew-psec : Skew control of TX data 0 pad
89 - txd1-skew-psec : Skew control of TX data 1 pad
90 - txd2-skew-psec : Skew control of TX data 2 pad
91 - txd3-skew-psec : Skew control of TX data 3 pad
92
67Examples:93Examples:
68 94
69 mdio {95 mdio {
Documentation/devicetree/bindings/net/mscc-ocelot.txt+3−6
@@ -12,7 +12,6 @@ Required properties: · 11 unmodified lines
12 - "sys"12 - "sys"
13 - "rew"13 - "rew"
14 - "qs"14 - "qs"
15 - "hsio"
16 - "qsys"15 - "qsys"
17 - "ana"16 - "ana"
18 - "portX" with X from 0 to the number of last port index available on that17 - "portX" with X from 0 to the number of last port index available on that
@@ -45,7 +44,6 @@ Example: · 26 unmodified lines
45 reg = <0x1010000 0x10000>,44 reg = <0x1010000 0x10000>,
46 <0x1030000 0x10000>,45 <0x1030000 0x10000>,
47 <0x1080000 0x100>,46 <0x1080000 0x100>,
48 <0x10d0000 0x10000>,
49 <0x11e0000 0x100>,47 <0x11e0000 0x100>,
50 <0x11f0000 0x100>,48 <0x11f0000 0x100>,
51 <0x1200000 0x100>,49 <0x1200000 0x100>,
@@ -59,10 +57,9 @@ Example: · 7 unmodified lines
59 <0x1280000 0x100>,57 <0x1280000 0x100>,
60 <0x1800000 0x80000>,58 <0x1800000 0x80000>,
61 <0x1880000 0x10000>;59 <0x1880000 0x10000>;
62 reg-names = "sys", "rew", "qs", "hsio", "port0",60 reg-names = "sys", "rew", "qs", "port0", "port1", "port2",
63 "port1", "port2", "port3", "port4", "port5",61 "port3", "port4", "port5", "port6", "port7",
64 "port6", "port7", "port8", "port9", "port10",62 "port8", "port9", "port10", "qsys", "ana";
65 "qsys", "ana";
66 interrupts = <21 22>;63 interrupts = <21 22>;
67 interrupt-names = "xtr", "inj";64 interrupt-names = "xtr", "inj";
68 65
Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt+9−12
@@ -1,10 +1,5 @@
1* Microsemi - vsc8531 Giga bit ethernet phy1* Microsemi - vsc8531 Giga bit ethernet phy
2 2
3Required properties:
4- compatible : Should contain phy id as "ethernet-phy-idAAAA.BBBB"
5 The PHY device uses the binding described in
6 Documentation/devicetree/bindings/net/phy.txt
7
8Optional properties:3Optional properties:
9- vsc8531,vddmac : The vddmac in mV. Allowed values is listed4- vsc8531,vddmac : The vddmac in mV. Allowed values is listed
10 in the first row of Table 1 (below).5 in the first row of Table 1 (below).
@@ -27,14 +22,16 @@ Optional properties: · 16 unmodified lines
27 'vddmac'.22 'vddmac'.
28 Default value is 0%.23 Default value is 0%.
29 Ref: Table:1 - Edge rate change (below).24 Ref: Table:1 - Edge rate change (below).
30- vsc8531,led-0-mode : LED mode. Specify how the LED[0] should behave.25- vsc8531,led-[N]-mode : LED mode. Specify how the LED[N] should behave.
31 Allowed values are define in26 N depends on the number of LEDs supported by a
32 "include/dt-bindings/net/mscc-phy-vsc8531.h".27 PHY.
33 Default value is VSC8531_LINK_1000_ACTIVITY (1).28 Allowed values are defined in
34- vsc8531,led-1-mode : LED mode. Specify how the LED[1] should behave.
35 Allowed values are define in
36 "include/dt-bindings/net/mscc-phy-vsc8531.h".29 "include/dt-bindings/net/mscc-phy-vsc8531.h".
37 Default value is VSC8531_LINK_100_ACTIVITY (2).30 Default values are VSC8531_LINK_1000_ACTIVITY (1),
31 VSC8531_LINK_100_ACTIVITY (2),
32 VSC8531_LINK_ACTIVITY (0) and
33 VSC8531_DUPLEX_COLLISION (8).
34
38 35
39Table: 1 - Edge rate change36Table: 1 - Edge rate change
40----------------------------------------------------------------|37----------------------------------------------------------------|
Documentation/devicetree/bindings/net/renesas,ravb.txt+1−0
@@ -6,6 +6,7 @@ interface contains. · 5 unmodified lines
6Required properties:6Required properties:
7- compatible: Must contain one or more of the following:7- compatible: Must contain one or more of the following:
8 - "renesas,etheravb-r8a7743" for the R8A7743 SoC.8 - "renesas,etheravb-r8a7743" for the R8A7743 SoC.
9 - "renesas,etheravb-r8a7744" for the R8A7744 SoC.
9 - "renesas,etheravb-r8a7745" for the R8A7745 SoC.10 - "renesas,etheravb-r8a7745" for the R8A7745 SoC.
10 - "renesas,etheravb-r8a77470" for the R8A77470 SoC.11 - "renesas,etheravb-r8a77470" for the R8A77470 SoC.
11 - "renesas,etheravb-r8a7790" for the R8A7790 SoC.12 - "renesas,etheravb-r8a7790" for the R8A7790 SoC.
Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt+6−0
@@ -56,6 +56,11 @@ Optional properties: · 55 unmodified lines
56 the length can vary between hw versions.56 the length can vary between hw versions.
57- <supply-name>-supply: handle to the regulator device tree node57- <supply-name>-supply: handle to the regulator device tree node
58 optional "supply-name" is "vdd-0.8-cx-mx".58 optional "supply-name" is "vdd-0.8-cx-mx".
59- memory-region:
60 Usage: optional
61 Value type: <phandle>
62 Definition: reference to the reserved-memory for the msa region
63 used by the wifi firmware running in Q6.
59 64
60Example (to supply the calibration data alone):65Example (to supply the calibration data alone):
61 66
@@ -149,4 +154,5 @@ wifi@18000000 { · 87 unmodified lines
149 <0 140 0 /* CE10 */ >,154 <0 140 0 /* CE10 */ >,
150 <0 141 0 /* CE11 */ >;155 <0 141 0 /* CE11 */ >;
151 vdd-0.8-cx-mx-supply = <&pm8998_l5>;156 vdd-0.8-cx-mx-supply = <&pm8998_l5>;
157 memory-region = <&wifi_msa_mem>;
152};158};
Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt+1−0
@@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines
7 "allwinner,sun8i-a83t-sid"7 "allwinner,sun8i-a83t-sid"
8 "allwinner,sun8i-h3-sid"8 "allwinner,sun8i-h3-sid"
9 "allwinner,sun50i-a64-sid"9 "allwinner,sun50i-a64-sid"
10 "allwinner,sun50i-h5-sid"
10 11
11- reg: Should contain registers location and length12- reg: Should contain registers location and length
12 13
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt+1−0
@@ -50,6 +50,7 @@ Additional required properties for imx7d-pcie: · 49 unmodified lines
50- reset-names: Must contain the following entires:50- reset-names: Must contain the following entires:
51 - "pciephy"51 - "pciephy"
52 - "apps"52 - "apps"
53 - "turnoff"
53 54
54Example:55Example:
55 56
Documentation/devicetree/bindings/pci/pci-keystone.txt+3−0
@@ -19,6 +19,9 @@ pcie_msi_intc : Interrupt controller device node for MSI IRQ chip · 18 unmodified lines
19 interrupt-cells: should be set to 119 interrupt-cells: should be set to 1
20 interrupts: GIC interrupt lines connected to PCI MSI interrupt lines20 interrupts: GIC interrupt lines connected to PCI MSI interrupt lines
21 21
22ti,syscon-pcie-id : phandle to the device control module required to set device
23 id and vendor id.
24
22 Example:25 Example:
23 pcie_msi_intc: msi-interrupt-controller {26 pcie_msi_intc: msi-interrupt-controller {
24 interrupt-controller;27 interrupt-controller;
Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt+1−0
@@ -7,6 +7,7 @@ OHCI and EHCI controllers. · 6 unmodified lines
7 7
8Required properties:8Required properties:
9- compatible: "renesas,pci-r8a7743" for the R8A7743 SoC;9- compatible: "renesas,pci-r8a7743" for the R8A7743 SoC;
10 "renesas,pci-r8a7744" for the R8A7744 SoC;
10 "renesas,pci-r8a7745" for the R8A7745 SoC;11 "renesas,pci-r8a7745" for the R8A7745 SoC;
11 "renesas,pci-r8a7790" for the R8A7790 SoC;12 "renesas,pci-r8a7790" for the R8A7790 SoC;
12 "renesas,pci-r8a7791" for the R8A7791 SoC;13 "renesas,pci-r8a7791" for the R8A7791 SoC;
Documentation/devicetree/bindings/pci/rcar-pci.txt+2−0
@@ -2,6 +2,7 @@ · 1 unmodified line
2 2
3Required properties:3Required properties:
4compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;4compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
5 "renesas,pcie-r8a7744" for the R8A7744 SoC;
5 "renesas,pcie-r8a7779" for the R8A7779 SoC;6 "renesas,pcie-r8a7779" for the R8A7779 SoC;
6 "renesas,pcie-r8a7790" for the R8A7790 SoC;7 "renesas,pcie-r8a7790" for the R8A7790 SoC;
7 "renesas,pcie-r8a7791" for the R8A7791 SoC;8 "renesas,pcie-r8a7791" for the R8A7791 SoC;
@@ -9,6 +10,7 @@ compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC; · 1 unmodified line
9 "renesas,pcie-r8a7795" for the R8A7795 SoC;10 "renesas,pcie-r8a7795" for the R8A7795 SoC;
10 "renesas,pcie-r8a7796" for the R8A7796 SoC;11 "renesas,pcie-r8a7796" for the R8A7796 SoC;
11 "renesas,pcie-r8a77980" for the R8A77980 SoC;12 "renesas,pcie-r8a77980" for the R8A77980 SoC;
13 "renesas,pcie-r8a77990" for the R8A77990 SoC;
12 "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or14 "renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
13 RZ/G1 compatible device.15 RZ/G1 compatible device.
14 "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.16 "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
Documentation/devicetree/bindings/pci/ti-pci.txt+5−0
@@ -26,6 +26,11 @@ HOST MODE · 25 unmodified lines
26 ranges,26 ranges,
27 interrupt-map-mask,27 interrupt-map-mask,
28 interrupt-map : as specified in ../designware-pcie.txt28 interrupt-map : as specified in ../designware-pcie.txt
29 - ti,syscon-unaligned-access: phandle to the syscon DT node. The 1st argument
30 should contain the register offset within syscon
31 and the 2nd argument should contain the bit field
32 for setting the bit to enable unaligned
33 access.
29 34
30DEVICE MODE35DEVICE MODE
31===========36===========
Documentation/devicetree/bindings/phy/brcm-sata-phy.txt+1−0
@@ -8,6 +8,7 @@ Required properties: · 7 unmodified lines
8 "brcm,iproc-nsp-sata-phy"8 "brcm,iproc-nsp-sata-phy"
9 "brcm,phy-sata3"9 "brcm,phy-sata3"
10 "brcm,iproc-sr-sata-phy"10 "brcm,iproc-sr-sata-phy"
11 "brcm,bcm63138-sata-phy"
11- address-cells: should be 112- address-cells: should be 1
12- size-cells: should be 013- size-cells: should be 0
13- reg: register ranges for the PHY PCB interface14- reg: register ranges for the PHY PCB interface
Documentation/devicetree/bindings/phy/phy-cadence-dp.txt+30−0
@@ -0,0 +1,30 @@
1Cadence MHDP DisplayPort SD0801 PHY binding
2===========================================
3
4This binding describes the Cadence SD0801 PHY hardware included with
5the Cadence MHDP DisplayPort controller.
6
7-------------------------------------------------------------------------------
8Required properties (controller (parent) node):
9- compatible : Should be "cdns,dp-phy"
10- reg : Defines the following sets of registers in the parent
11 mhdp device:
12 - Offset of the DPTX PHY configuration registers
13 - Offset of the SD0801 PHY configuration registers
14- #phy-cells : from the generic PHY bindings, must be 0.
15
16Optional properties:
17- num_lanes : Number of DisplayPort lanes to use (1, 2 or 4)
18- max_bit_rate : Maximum DisplayPort link bit rate to use, in Mbps (2160,
19 2430, 2700, 3240, 4320, 5400 or 8100)
20-------------------------------------------------------------------------------
21
22Example:
23 dp_phy: phy@f0fb030a00 {
24 compatible = "cdns,dp-phy";
25 reg = <0xf0 0xfb030a00 0x0 0x00000040>,
26 <0xf0 0xfb500000 0x0 0x00100000>;
27 num_lanes = <4>;
28 max_bit_rate = <8100>;
29 #phy-cells = <0>;
30 };
Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt+43−0
@@ -0,0 +1,43 @@
1Microsemi Ocelot SerDes muxing driver
2-------------------------------------
3
4On Microsemi Ocelot, there is a handful of registers in HSIO address
5space for setting up the SerDes to switch port muxing.
6
7A SerDes X can be "muxed" to work with switch port Y or Z for example.
8One specific SerDes can also be used as a PCIe interface.
9
10Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
11
12There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
13half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
1410/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
15
16Also, SERDES6G number (aka "macro") 0 is the only interface supporting
17QSGMII.
18
19This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
20Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.
21
22Required properties:
23
24- compatible: should be "mscc,vsc7514-serdes"
25- #phy-cells : from the generic phy bindings, must be 2.
26 The first number defines the input port to use for a given
27 SerDes macro. The second defines the macro to use. They are
28 defined in dt-bindings/phy/phy-ocelot-serdes.h
29
30Example:
31
32 serdes: serdes {
33 compatible = "mscc,vsc7514-serdes";
34 #phy-cells = <2>;
35 };
36
37 ethernet {
38 port1 {
39 phy-handle = <&phy_foo>;
40 /* Link SERDES1G_5 to port1 */
41 phys = <&serdes 1 SERDES1G_5>;
42 };
43 };
Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt+43−0
@@ -0,0 +1,43 @@
1ROCKCHIP HDMI PHY WITH INNO IP BLOCK
2
3Required properties:
4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-hdmi-phy",
6 * "rockchip,rk3328-hdmi-phy";
7 - reg : Address and length of the hdmi phy control register set
8 - clocks : phandle + clock specifier for the phy clocks
9 - clock-names : string, clock name, must contain "sysclk" for system
10 control and register configuration, "refoclk" for crystal-
11 oscillator reference PLL clock input and "refpclk" for pclk-
12 based refeference PLL clock input.
13 - #clock-cells: should be 0.
14 - clock-output-names : shall be the name for the output clock.
15 - interrupts : phandle + interrupt specified for the hdmiphy interrupt
16 - #phy-cells : must be 0. See ./phy-bindings.txt for details.
17
18Optional properties for rk3328-hdmi-phy:
19 - nvmem-cells = phandle + nvmem specifier for the cpu-version efuse
20 - nvmem-cell-names : "cpu-version" to read the chip version, required
21 for adjustment to some frequency settings
22
23Example:
24 hdmi_phy: hdmi-phy@12030000 {
25 compatible = "rockchip,rk3228-hdmi-phy";
26 reg = <0x12030000 0x10000>;
27 #phy-cells = <0>;
28 clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMIPHY>;
29 clock-names = "sysclk", "refoclk", "refpclk";
30 #clock-cells = <0>;
31 clock-output-names = "hdmi_phy";
32 status = "disabled";
33 };
34
35Then the PHY can be used in other nodes such as:
36
37 hdmi: hdmi@200a0000 {
38 compatible = "rockchip,rk3228-dw-hdmi";
39 ...
40 phys = <&hdmi_phy>;
41 phy-names = "hdmi";
42 ...
43 };
Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt+14−9
@@ -10,16 +10,20 @@ Required properties: · 9 unmodified lines
10 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996,10 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996,
11 "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996,11 "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996,
12 "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845,12 "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845,
13 "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845.13 "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845,
14 "qcom,sdm845-qmp-ufs-phy" for UFS QMP phy on sdm845.
14 15
15 - reg:16- reg:
16 - For "qcom,sdm845-qmp-usb3-phy":17 - index 0: address and length of register set for PHY's common
17 - index 0: address and length of register set for PHY's common serdes18 serdes block.
18 block.19 - index 1: address and length of the DP_COM control block (for
19 - named register "dp_com" (using reg-names): address and length of the20 "qcom,sdm845-qmp-usb3-phy" only).
20 DP_COM control block.21
21 - For all others:22- reg-names:
22 - offset and length of register set for PHY's common serdes block.23 - For "qcom,sdm845-qmp-usb3-phy":
24 - Should be: "reg-base", "dp_com"
25 - For all others:
26 - The reg-names property shouldn't be defined.
23 27
24 - #clock-cells: must be 128 - #clock-cells: must be 1
25 - Phy pll outputs a bunch of clocks for Tx, Rx and Pipe29 - Phy pll outputs a bunch of clocks for Tx, Rx and Pipe
@@ -35,6 +39,7 @@ Required properties: · 9 unmodified lines
35 "aux" for phy aux clock,39 "aux" for phy aux clock,
36 "ref" for 19.2 MHz ref clk,40 "ref" for 19.2 MHz ref clk,
37 "com_aux" for phy common block aux clock,41 "com_aux" for phy common block aux clock,
42 "ref_aux" for phy reference aux clock,
38 For "qcom,msm8996-qmp-pcie-phy" must contain:43 For "qcom,msm8996-qmp-pcie-phy" must contain:
39 "aux", "cfg_ahb", "ref".44 "aux", "cfg_ahb", "ref".
40 For "qcom,msm8996-qmp-usb3-phy" must contain:45 For "qcom,msm8996-qmp-usb3-phy" must contain:
Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt+1−0
@@ -5,6 +5,7 @@ This file provides information on what the device node for the R-Car generation · 4 unmodified lines
5 5
6Required properties:6Required properties:
7- compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.7- compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
8 "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC.
8 "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.9 "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
9 "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.10 "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
10 "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.11 "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt+8−3
@@ -1,10 +1,12 @@
1* Renesas R-Car generation 3 USB 2.0 PHY1* Renesas R-Car generation 3 USB 2.0 PHY
2 2
3This file provides information on what the device node for the R-Car generation3This file provides information on what the device node for the R-Car generation
43 USB 2.0 PHY contains.43 and RZ/G2 USB 2.0 PHY contain.
5 5
6Required properties:6Required properties:
7- compatible: "renesas,usb2-phy-r8a7795" if the device is a part of an R8A77957- compatible: "renesas,usb2-phy-r8a774a1" if the device is a part of an R8A774A1
8 SoC.
9 "renesas,usb2-phy-r8a7795" if the device is a part of an R8A7795
8 SoC.10 SoC.
9 "renesas,usb2-phy-r8a7796" if the device is a part of an R8A779611 "renesas,usb2-phy-r8a7796" if the device is a part of an R8A7796
10 SoC.12 SoC.
@@ -14,7 +16,8 @@ Required properties: · 3 unmodified lines
14 R8A77990 SoC.16 R8A77990 SoC.
15 "renesas,usb2-phy-r8a77995" if the device is a part of an17 "renesas,usb2-phy-r8a77995" if the device is a part of an
16 R8A77995 SoC.18 R8A77995 SoC.
17 "renesas,rcar-gen3-usb2-phy" for a generic R-Car Gen3 compatible device.19 "renesas,rcar-gen3-usb2-phy" for a generic R-Car Gen3 or RZ/G2
20 compatible device.
18 21
19 When compatible with the generic version, nodes must list the22 When compatible with the generic version, nodes must list the
20 SoC-specific version corresponding to the platform first23 SoC-specific version corresponding to the platform first
@@ -31,6 +34,8 @@ channel as USB OTG: · 10 unmodified lines
31- interrupts: interrupt specifier for the PHY.34- interrupts: interrupt specifier for the PHY.
32- vbus-supply: Phandle to a regulator that provides power to the VBUS. This35- vbus-supply: Phandle to a regulator that provides power to the VBUS. This
33 regulator will be managed during the PHY power on/off sequence.36 regulator will be managed during the PHY power on/off sequence.
37- renesas,no-otg-pins: boolean, specify when a board does not provide proper
38 otg pins.
34 39
35Example (R-Car H3):40Example (R-Car H3):
36 41
Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb3.txt+6−4
@@ -1,20 +1,22 @@
1* Renesas R-Car generation 3 USB 3.0 PHY1* Renesas R-Car generation 3 USB 3.0 PHY
2 2
3This file provides information on what the device node for the R-Car generation3This file provides information on what the device node for the R-Car generation
43 USB 3.0 PHY contains.43 and RZ/G2 USB 3.0 PHY contain.
5If you want to enable spread spectrum clock (ssc), you should use USB_EXTAL5If you want to enable spread spectrum clock (ssc), you should use USB_EXTAL
6instead of USB3_CLK. However, if you don't want to these features, you don't6instead of USB3_CLK. However, if you don't want to these features, you don't
7need this driver.7need this driver.
8 8
9Required properties:9Required properties:
10- compatible: "renesas,r8a7795-usb3-phy" if the device is a part of an R8A779510- compatible: "renesas,r8a774a1-usb3-phy" if the device is a part of an R8A774A1
11 SoC.
12 "renesas,r8a7795-usb3-phy" if the device is a part of an R8A7795
11 SoC.13 SoC.
12 "renesas,r8a7796-usb3-phy" if the device is a part of an R8A779614 "renesas,r8a7796-usb3-phy" if the device is a part of an R8A7796
13 SoC.15 SoC.
14 "renesas,r8a77965-usb3-phy" if the device is a part of an16 "renesas,r8a77965-usb3-phy" if the device is a part of an
15 R8A77965 SoC.17 R8A77965 SoC.
16 "renesas,rcar-gen3-usb3-phy" for a generic R-Car Gen3 compatible18 "renesas,rcar-gen3-usb3-phy" for a generic R-Car Gen3 or RZ/G2
17 device.19 compatible device.
18 20
19 When compatible with the generic version, nodes must list the21 When compatible with the generic version, nodes must list the
20 SoC-specific version corresponding to the platform first22 SoC-specific version corresponding to the platform first
Documentation/devicetree/bindings/phy/uniphier-pcie-phy.txt+31−0
@@ -0,0 +1,31 @@
1Socionext UniPhier PCIe PHY bindings
2
3This describes the devicetree bindings for PHY interface built into
4PCIe controller implemented on Socionext UniPhier SoCs.
5
6Required properties:
7- compatible: Should contain one of the following:
8 "socionext,uniphier-ld20-pcie-phy" - for LD20 PHY
9 "socionext,uniphier-pxs3-pcie-phy" - for PXs3 PHY
10- reg: Specifies offset and length of the register set for the device.
11- #phy-cells: Must be zero.
12- clocks: A phandle to the clock gate for PCIe glue layer including
13 this phy.
14- resets: A phandle to the reset line for PCIe glue layer including
15 this phy.
16
17Optional properties:
18- socionext,syscon: A phandle to system control to set configurations
19 for phy.
20
21Refer to phy/phy-bindings.txt for the generic PHY binding properties.
22
23Example:
24 pcie_phy: phy@66038000 {
25 compatible = "socionext,uniphier-ld20-pcie-phy";
26 reg = <0x66038000 0x4000>;
27 #phy-cells = <0>;
28 clocks = <&sys_clk 24>;
29 resets = <&sys_rst 24>;
30 socionext,syscon = <&soc_glue>;
31 };
Documentation/devicetree/bindings/phy/uniphier-usb2-phy.txt+45−0
@@ -0,0 +1,45 @@
1Socionext UniPhier USB2 PHY
2
3This describes the devicetree bindings for PHY interface built into
4USB2 controller implemented on Socionext UniPhier SoCs.
5
6Pro4 SoC has both USB2 and USB3 host controllers, however, this USB3
7controller doesn't include its own High-Speed PHY. This needs to specify
8USB2 PHY instead of USB3 HS-PHY.
9
10Required properties:
11- compatible: Should contain one of the following:
12 "socionext,uniphier-pro4-usb2-phy" - for Pro4 SoC
13 "socionext,uniphier-ld11-usb2-phy" - for LD11 SoC
14
15Sub-nodes:
16Each PHY should be represented as a sub-node.
17
18Sub-nodes required properties:
19- #phy-cells: Should be 0.
20- reg: The number of the PHY.
21
22Sub-nodes optional properties:
23- vbus-supply: A phandle to the regulator for USB VBUS.
24
25Refer to phy/phy-bindings.txt for the generic PHY binding properties.
26
27Example:
28 soc-glue@5f800000 {
29 ...
30 usb-phy {
31 compatible = "socionext,uniphier-ld11-usb2-phy";
32 usb_phy0: phy@0 {
33 reg = <0>;
34 #phy-cells = <0>;
35 };
36 ...
37 };
38 };
39
40 usb@5a800100 {
41 compatible = "socionext,uniphier-ehci", "generic-ehci";
42 ...
43 phy-names = "usb";
44 phys = <&usb_phy0>;
45 };
Documentation/devicetree/bindings/phy/uniphier-usb3-hsphy.txt+69−0
@@ -0,0 +1,69 @@
1Socionext UniPhier USB3 High-Speed (HS) PHY
2
3This describes the devicetree bindings for PHY interfaces built into
4USB3 controller implemented on Socionext UniPhier SoCs.
5Although the controller includes High-Speed PHY and Super-Speed PHY,
6this describes about High-Speed PHY.
7
8Required properties:
9- compatible: Should contain one of the following:
10 "socionext,uniphier-pro4-usb3-hsphy" - for Pro4 SoC
11 "socionext,uniphier-pxs2-usb3-hsphy" - for PXs2 SoC
12 "socionext,uniphier-ld20-usb3-hsphy" - for LD20 SoC
13 "socionext,uniphier-pxs3-usb3-hsphy" - for PXs3 SoC
14- reg: Specifies offset and length of the register set for the device.
15- #phy-cells: Should be 0.
16- clocks: A list of phandles to the clock gate for USB3 glue layer.
17 According to the clock-names, appropriate clocks are required.
18- clock-names: Should contain the following:
19 "gio", "link" - for Pro4 SoC
20 "phy", "phy-ext", "link" - for PXs3 SoC, "phy-ext" is optional.
21 "phy", "link" - for others
22- resets: A list of phandles to the reset control for USB3 glue layer.
23 According to the reset-names, appropriate resets are required.
24- reset-names: Should contain the following:
25 "gio", "link" - for Pro4 SoC
26 "phy", "link" - for others
27
28Optional properties:
29- vbus-supply: A phandle to the regulator for USB VBUS.
30- nvmem-cells: Phandles to nvmem cell that contains the trimming data.
31 Available only for HS-PHY implemented on LD20 and PXs3, and
32 if unspecified, default value is used.
33- nvmem-cell-names: Should be the following names, which correspond to
34 each nvmem-cells.
35 All of the 3 parameters associated with the following names are
36 required for each port, if any one is omitted, the trimming data
37 of the port will not be set at all.
38 "rterm", "sel_t", "hs_i" - Each cell name for phy parameters
39
40Refer to phy/phy-bindings.txt for the generic PHY binding properties.
41
42Example:
43
44 usb-glue@65b00000 {
45 compatible = "socionext,uniphier-ld20-dwc3-glue",
46 "simple-mfd";
47 #address-cells = <1>;
48 #size-cells = <1>;
49 ranges = <0 0x65b00000 0x400>;
50
51 usb_vbus0: regulator {
52 ...
53 };
54
55 usb_hsphy0: hs-phy@200 {
56 compatible = "socionext,uniphier-ld20-usb3-hsphy";
57 reg = <0x200 0x10>;
58 #phy-cells = <0>;
59 clock-names = "link", "phy";
60 clocks = <&sys_clk 14>, <&sys_clk 16>;
61 reset-names = "link", "phy";
62 resets = <&sys_rst 14>, <&sys_rst 16>;
63 vbus-supply = <&usb_vbus0>;
64 nvmem-cell-names = "rterm", "sel_t", "hs_i";
65 nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>,
66 <&usb_hs_i0>;
67 };
68 ...
69 };
Documentation/devicetree/bindings/phy/uniphier-usb3-ssphy.txt+57−0
@@ -0,0 +1,57 @@
1Socionext UniPhier USB3 Super-Speed (SS) PHY
2
3This describes the devicetree bindings for PHY interfaces built into
4USB3 controller implemented on Socionext UniPhier SoCs.
5Although the controller includes High-Speed PHY and Super-Speed PHY,
6this describes about Super-Speed PHY.
7
8Required properties:
9- compatible: Should contain one of the following:
10 "socionext,uniphier-pro4-usb3-ssphy" - for Pro4 SoC
11 "socionext,uniphier-pxs2-usb3-ssphy" - for PXs2 SoC
12 "socionext,uniphier-ld20-usb3-ssphy" - for LD20 SoC
13 "socionext,uniphier-pxs3-usb3-ssphy" - for PXs3 SoC
14- reg: Specifies offset and length of the register set for the device.
15- #phy-cells: Should be 0.
16- clocks: A list of phandles to the clock gate for USB3 glue layer.
17 According to the clock-names, appropriate clocks are required.
18- clock-names:
19 "gio", "link" - for Pro4 SoC
20 "phy", "phy-ext", "link" - for PXs3 SoC, "phy-ext" is optional.
21 "phy", "link" - for others
22- resets: A list of phandles to the reset control for USB3 glue layer.
23 According to the reset-names, appropriate resets are required.
24- reset-names:
25 "gio", "link" - for Pro4 SoC
26 "phy", "link" - for others
27
28Optional properties:
29- vbus-supply: A phandle to the regulator for USB VBUS.
30
31Refer to phy/phy-bindings.txt for the generic PHY binding properties.
32
33Example:
34
35 usb-glue@65b00000 {
36 compatible = "socionext,uniphier-ld20-dwc3-glue",
37 "simple-mfd";
38 #address-cells = <1>;
39 #size-cells = <1>;
40 ranges = <0 0x65b00000 0x400>;
41
42 usb_vbus0: regulator {
43 ...
44 };
45
46 usb_ssphy0: ss-phy@300 {
47 compatible = "socionext,uniphier-ld20-usb3-ssphy";
48 reg = <0x300 0x10>;
49 #phy-cells = <0>;
50 clock-names = "link", "phy";
51 clocks = <&sys_clk 14>, <&sys_clk 16>;
52 reset-names = "link", "phy";
53 resets = <&sys_rst 14>, <&sys_rst 16>;
54 vbus-supply = <&usb_vbus0>;
55 };
56 ...
57 };
Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt+57−0
@@ -0,0 +1,57 @@
1Broadcom Northstar pins mux controller
2
3Some of Northstar SoCs's pins can be used for various purposes thanks to the mux
4controller. This binding allows describing mux controller and listing available
5functions. They can be referenced later by other bindings to let system
6configure controller correctly.
7
8A list of pins varies across chipsets so few bindings are available.
9
10Required properties:
11- compatible: must be one of:
12 "brcm,bcm4708-pinmux"
13 "brcm,bcm4709-pinmux"
14 "brcm,bcm53012-pinmux"
15- reg: iomem address range of CRU (Central Resource Unit) pin registers
16- reg-names: "cru_gpio_control" - the only needed & supported reg right now
17
18Functions and their groups available for all chipsets:
19- "spi": "spi_grp"
20- "i2c": "i2c_grp"
21- "pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp"
22- "uart1": "uart1_grp"
23
24Additionally available on BCM4709 and BCM53012:
25- "mdio": "mdio_grp"
26- "uart2": "uart2_grp"
27- "sdio": "sdio_pwr_grp", "sdio_1p8v_grp"
28
29For documentation of subnodes see:
30Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
31
32Example:
33 dmu@1800c000 {
34 compatible = "simple-bus";
35 ranges = <0 0x1800c000 0x1000>;
36 #address-cells = <1>;
37 #size-cells = <1>;
38
39 cru@100 {
40 compatible = "simple-bus";
41 reg = <0x100 0x1a4>;
42 ranges;
43 #address-cells = <1>;
44 #size-cells = <1>;
45
46 pin-controller@1c0 {
47 compatible = "brcm,bcm4708-pinmux";
48 reg = <0x1c0 0x24>;
49 reg-names = "cru_gpio_control";
50
51 spi-pins {
52 function = "spi";
53 groups = "spi_grp";
54 };
55 };
56 };
57 };
Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt+35−4
@@ -20,16 +20,30 @@ Required properties: · 19 unmodified lines
20 20
21 - compatible: One of:21 - compatible: One of:
22 - "ingenic,jz4740-pinctrl"22 - "ingenic,jz4740-pinctrl"
23 - "ingenic,jz4725b-pinctrl"
23 - "ingenic,jz4770-pinctrl"24 - "ingenic,jz4770-pinctrl"
24 - "ingenic,jz4780-pinctrl"25 - "ingenic,jz4780-pinctrl"
25 - reg: Address range of the pinctrl registers.26 - reg: Address range of the pinctrl registers.
26 27
27 28
28GPIO sub-nodes29Required properties for sub-nodes (GPIO chips):
29--------------30-----------------------------------------------
30 31
31The pinctrl node can have optional sub-nodes for the Ingenic GPIO driver;32 - compatible: Must contain one of:
32please refer to ../gpio/ingenic,gpio.txt.33 - "ingenic,jz4740-gpio"
34 - "ingenic,jz4770-gpio"
35 - "ingenic,jz4780-gpio"
36 - reg: The GPIO bank number.
37 - interrupt-controller: Marks the device node as an interrupt controller.
38 - interrupts: Interrupt specifier for the controllers interrupt.
39 - #interrupt-cells: Should be 2. Refer to
40 ../interrupt-controller/interrupts.txt for more details.
41 - gpio-controller: Marks the device node as a GPIO controller.
42 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
43 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
44 GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
45 - gpio-ranges: Range of pins managed by the GPIO controller. Refer to
46 ../gpio/gpio.txt for more details.
33 47
34 48
35Example:49Example:
@@ -38,4 +52,21 @@ Example: · 2 unmodified lines
38pinctrl: pin-controller@10010000 {52pinctrl: pin-controller@10010000 {
39 compatible = "ingenic,jz4740-pinctrl";53 compatible = "ingenic,jz4740-pinctrl";
40 reg = <0x10010000 0x400>;54 reg = <0x10010000 0x400>;
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 gpa: gpio@0 {
59 compatible = "ingenic,jz4740-gpio";
60 reg = <0>;
61
62 gpio-controller;
63 gpio-ranges = <&pinctrl 0 0 32>;
64 #gpio-cells = <2>;
65
66 interrupt-controller;
67 #interrupt-cells = <2>;
68
69 interrupt-parent = <&intc>;
70 interrupts = <28>;
71 };
41};72};
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt+2−0
@@ -13,6 +13,8 @@ Required properties for the root node: · 12 unmodified lines
13 "amlogic,meson-gxl-aobus-pinctrl"13 "amlogic,meson-gxl-aobus-pinctrl"
14 "amlogic,meson-axg-periphs-pinctrl"14 "amlogic,meson-axg-periphs-pinctrl"
15 "amlogic,meson-axg-aobus-pinctrl"15 "amlogic,meson-axg-aobus-pinctrl"
16 "amlogic,meson-g12a-periphs-pinctrl"
17 "amlogic,meson-g12a-aobus-pinctrl"
16 - reg: address and size of registers controlling irq functionality18 - reg: address and size of registers controlling irq functionality
17 19
18=== GPIO sub-nodes ===20=== GPIO sub-nodes ===
Documentation/devicetree/bindings/pinctrl/nuvoton,npcm7xx-pinctrl.txt+216−0
@@ -0,0 +1,216 @@
1Nuvoton NPCM7XX Pin Controllers
2
3The Nuvoton BMC NPCM7XX Pin Controller multi-function routed through
4the multiplexing block, Each pin supports GPIO functionality (GPIOx)
5and multiple functions that directly connect the pin to different
6hardware blocks.
7
8Required properties:
9- #address-cells : should be 1.
10- #size-cells : should be 1.
11- compatible : "nuvoton,npcm750-pinctrl" for Poleg NPCM7XX.
12- ranges : defines mapping ranges between pin controller node (parent)
13 to GPIO bank node (children).
14
15=== GPIO Bank Subnode ===
16
17The NPCM7XX has 8 GPIO Banks each GPIO bank supports 32 GPIO.
18
19Required GPIO Bank subnode-properties:
20- reg : specifies physical base address and size of the GPIO
21 bank registers.
22- gpio-controller : Marks the device node as a GPIO controller.
23- #gpio-cells : Must be <2>. The first cell is the gpio pin number
24 and the second cell is used for optional parameters.
25- interrupts : contain the GPIO bank interrupt with flags for falling edge.
26- gpio-ranges : defines the range of pins managed by the GPIO bank controller.
27
28For example, GPIO bank subnodes like the following:
29 gpio0: gpio@f0010000 {
30 gpio-controller;
31 #gpio-cells = <2>;
32 reg = <0x0 0x80>;
33 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
34 gpio-ranges = <&pinctrl 0 0 32>;
35 };
36
37=== Pin Mux Subnode ===
38
39- pin: A string containing the name of the pin
40 An array of strings, each string containing the name of a pin.
41 These pin are used for selecting pin configuration.
42
43The following are the list of pins available:
44 "GPIO0/IOX1DI", "GPIO1/IOX1LD", "GPIO2/IOX1CK", "GPIO3/IOX1D0",
45 "GPIO4/IOX2DI/SMB1DSDA", "GPIO5/IOX2LD/SMB1DSCL", "GPIO6/IOX2CK/SMB2DSDA",
46 "GPIO7/IOX2D0/SMB2DSCL", "GPIO8/LKGPO1", "GPIO9/LKGPO2", "GPIO10/IOXHLD",
47 "GPIO11/IOXHCK", "GPIO12/GSPICK/SMB5BSCL", "GPIO13/GSPIDO/SMB5BSDA",
48 "GPIO14/GSPIDI/SMB5CSCL", "GPIO15/GSPICS/SMB5CSDA", "GPIO16/LKGPO0",
49 "GPIO17/PSPI2DI/SMB4DEN","GPIO18/PSPI2D0/SMB4BSDA", "GPIO19/PSPI2CK/SMB4BSCL",
50 "GPIO20/SMB4CSDA/SMB15SDA", "GPIO21/SMB4CSCL/SMB15SCL", "GPIO22/SMB4DSDA/SMB14SDA",
51 "GPIO23/SMB4DSCL/SMB14SCL", "GPIO24/IOXHDO", "GPIO25/IOXHDI", "GPIO26/SMB5SDA",
52 "GPIO27/SMB5SCL", "GPIO28/SMB4SDA", "GPIO29/SMB4SCL", "GPIO30/SMB3SDA",
53 "GPIO31/SMB3SCL", "GPIO32/nSPI0CS1","SPI0D2", "SPI0D3", "GPIO37/SMB3CSDA",
54 "GPIO38/SMB3CSCL", "GPIO39/SMB3BSDA", "GPIO40/SMB3BSCL", "GPIO41/BSPRXD",
55 "GPO42/BSPTXD/STRAP11", "GPIO43/RXD1/JTMS2/BU1RXD", "GPIO44/nCTS1/JTDI2/BU1CTS",
56 "GPIO45/nDCD1/JTDO2", "GPIO46/nDSR1/JTCK2", "GPIO47/nRI1/JCP_RDY2",
57 "GPIO48/TXD2/BSPTXD", "GPIO49/RXD2/BSPRXD", "GPIO50/nCTS2", "GPO51/nRTS2/STRAP2",
58 "GPIO52/nDCD2", "GPO53/nDTR2_BOUT2/STRAP1", "GPIO54/nDSR2", "GPIO55/nRI2",
59 "GPIO56/R1RXERR", "GPIO57/R1MDC", "GPIO58/R1MDIO", "GPIO59/SMB3DSDA",
60 "GPIO60/SMB3DSCL", "GPO61/nDTR1_BOUT1/STRAP6", "GPO62/nRTST1/STRAP5",
61 "GPO63/TXD1/STRAP4", "GPIO64/FANIN0", "GPIO65/FANIN1", "GPIO66/FANIN2",
62 "GPIO67/FANIN3", "GPIO68/FANIN4", "GPIO69/FANIN5", "GPIO70/FANIN6", "GPIO71/FANIN7",
63 "GPIO72/FANIN8", "GPIO73/FANIN9", "GPIO74/FANIN10", "GPIO75/FANIN11",
64 "GPIO76/FANIN12", "GPIO77/FANIN13","GPIO78/FANIN14", "GPIO79/FANIN15",
65 "GPIO80/PWM0", "GPIO81/PWM1", "GPIO82/PWM2", "GPIO83/PWM3", "GPIO84/R2TXD0",
66 "GPIO85/R2TXD1", "GPIO86/R2TXEN", "GPIO87/R2RXD0", "GPIO88/R2RXD1", "GPIO89/R2CRSDV",
67 "GPIO90/R2RXERR", "GPIO91/R2MDC", "GPIO92/R2MDIO", "GPIO93/GA20/SMB5DSCL",
68 "GPIO94/nKBRST/SMB5DSDA", "GPIO95/nLRESET/nESPIRST", "GPIO96/RG1TXD0",
69 "GPIO97/RG1TXD1", "GPIO98/RG1TXD2", "GPIO99/RG1TXD3","GPIO100/RG1TXC",
70 "GPIO101/RG1TXCTL", "GPIO102/RG1RXD0", "GPIO103/RG1RXD1", "GPIO104/RG1RXD2",
71 "GPIO105/RG1RXD3", "GPIO106/RG1RXC", "GPIO107/RG1RXCTL", "GPIO108/RG1MDC",
72 "GPIO109/RG1MDIO", "GPIO110/RG2TXD0/DDRV0", "GPIO111/RG2TXD1/DDRV1",
73 "GPIO112/RG2TXD2/DDRV2", "GPIO113/RG2TXD3/DDRV3", "GPIO114/SMB0SCL",
74 "GPIO115/SMB0SDA", "GPIO116/SMB1SCL", "GPIO117/SMB1SDA", "GPIO118/SMB2SCL",
75 "GPIO119/SMB2SDA", "GPIO120/SMB2CSDA", "GPIO121/SMB2CSCL", "GPIO122/SMB2BSDA",
76 "GPIO123/SMB2BSCL", "GPIO124/SMB1CSDA", "GPIO125/SMB1CSCL","GPIO126/SMB1BSDA",
77 "GPIO127/SMB1BSCL", "GPIO128/SMB8SCL", "GPIO129/SMB8SDA", "GPIO130/SMB9SCL",
78 "GPIO131/SMB9SDA", "GPIO132/SMB10SCL", "GPIO133/SMB10SDA","GPIO134/SMB11SCL",
79 "GPIO135/SMB11SDA", "GPIO136/SD1DT0", "GPIO137/SD1DT1", "GPIO138/SD1DT2",
80 "GPIO139/SD1DT3", "GPIO140/SD1CLK", "GPIO141/SD1WP", "GPIO142/SD1CMD",
81 "GPIO143/SD1CD/SD1PWR", "GPIO144/PWM4", "GPIO145/PWM5", "GPIO146/PWM6",
82 "GPIO147/PWM7", "GPIO148/MMCDT4", "GPIO149/MMCDT5", "GPIO150/MMCDT6",
83 "GPIO151/MMCDT7", "GPIO152/MMCCLK", "GPIO153/MMCWP", "GPIO154/MMCCMD",
84 "GPIO155/nMMCCD/nMMCRST", "GPIO156/MMCDT0", "GPIO157/MMCDT1", "GPIO158/MMCDT2",
85 "GPIO159/MMCDT3", "GPIO160/CLKOUT/RNGOSCOUT", "GPIO161/nLFRAME/nESPICS",
86 "GPIO162/SERIRQ", "GPIO163/LCLK/ESPICLK", "GPIO164/LAD0/ESPI_IO0",
87 "GPIO165/LAD1/ESPI_IO1", "GPIO166/LAD2/ESPI_IO2", "GPIO167/LAD3/ESPI_IO3",
88 "GPIO168/nCLKRUN/nESPIALERT", "GPIO169/nSCIPME", "GPIO170/nSMI", "GPIO171/SMB6SCL",
89 "GPIO172/SMB6SDA", "GPIO173/SMB7SCL", "GPIO174/SMB7SDA", "GPIO175/PSPI1CK/FANIN19",
90 "GPIO176/PSPI1DO/FANIN18", "GPIO177/PSPI1DI/FANIN17", "GPIO178/R1TXD0",
91 "GPIO179/R1TXD1", "GPIO180/R1TXEN", "GPIO181/R1RXD0", "GPIO182/R1RXD1",
92 "GPIO183/SPI3CK", "GPO184/SPI3D0/STRAP9", "GPO185/SPI3D1/STRAP10",
93 "GPIO186/nSPI3CS0", "GPIO187/nSPI3CS1", "GPIO188/SPI3D2/nSPI3CS2",
94 "GPIO189/SPI3D3/nSPI3CS3", "GPIO190/nPRD_SMI", "GPIO191", "GPIO192", "GPIO193/R1CRSDV",
95 "GPIO194/SMB0BSCL", "GPIO195/SMB0BSDA", "GPIO196/SMB0CSCL", "GPIO197/SMB0DEN",
96 "GPIO198/SMB0DSDA", "GPIO199/SMB0DSCL", "GPIO200/R2CK", "GPIO201/R1CK",
97 "GPIO202/SMB0CSDA", "GPIO203/FANIN16", "GPIO204/DDC2SCL", "GPIO205/DDC2SDA",
98 "GPIO206/HSYNC2", "GPIO207/VSYNC2", "GPIO208/RG2TXC/DVCK", "GPIO209/RG2TXCTL/DDRV4",
99 "GPIO210/RG2RXD0/DDRV5", "GPIO211/RG2RXD1/DDRV6", "GPIO212/RG2RXD2/DDRV7",
100 "GPIO213/RG2RXD3/DDRV8", "GPIO214/RG2RXC/DDRV9", "GPIO215/RG2RXCTL/DDRV10",
101 "GPIO216/RG2MDC/DDRV11", "GPIO217/RG2MDIO/DVHSYNC", "GPIO218/nWDO1",
102 "GPIO219/nWDO2", "GPIO220/SMB12SCL", "GPIO221/SMB12SDA", "GPIO222/SMB13SCL",
103 "GPIO223/SMB13SDA", "GPIO224/SPIXCK", "GPO225/SPIXD0/STRAP12", "GPO226/SPIXD1/STRAP13",
104 "GPIO227/nSPIXCS0", "GPIO228/nSPIXCS1", "GPO229/SPIXD2/STRAP3", "GPIO230/SPIXD3",
105 "GPIO231/nCLKREQ", "GPI255/DACOSEL"
106
107Optional Properties:
108 bias-disable, bias-pull-down, bias-pull-up, input-enable,
109 input-disable, output-high, output-low, drive-push-pull,
110 drive-open-drain, input-debounce, slew-rate, drive-strength
111
112 slew-rate valid arguments are:
113 <0> - slow
114 <1> - fast
115 drive-strength valid arguments are:
116 <2> - 2mA
117 <4> - 4mA
118 <8> - 8mA
119 <12> - 12mA
120 <16> - 16mA
121 <24> - 24mA
122
123For example, pinctrl might have pinmux subnodes like the following:
124
125 gpio0_iox1d1_pin: gpio0-iox1d1-pin {
126 pins = "GPIO0/IOX1DI";
127 output-high;
128 };
129 gpio0_iox1ck_pin: gpio0-iox1ck-pin {
130 pins = "GPIO2/IOX1CK";
131 output_high;
132 };
133
134=== Pin Group Subnode ===
135
136Required pin group subnode-properties:
137- groups : A string containing the name of the group to mux.
138- function: A string containing the name of the function to mux to the
139 group.
140
141The following are the list of the available groups and functions :
142 smb0, smb0b, smb0c, smb0d, smb0den, smb1, smb1b, smb1c, smb1d,
143 smb2, smb2b, smb2c, smb2d, smb3, smb3b, smb3c, smb3d, smb4, smb4b,
144 smb4c, smb4d, smb4den, smb5, smb5b, smb5c, smb5d, ga20kbc, smb6,
145 smb7, smb8, smb9, smb10, smb11, smb12, smb13, smb14, smb15, fanin0,
146 fanin1, fanin2, fanin3, fanin4, fanin5, fanin6, fanin7, fanin8,
147 fanin9, fanin10, fanin11 fanin12 fanin13, fanin14, fanin15, faninx,
148 pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, pwm6, pwm7, rg1, rg1mdio, rg2,
149 rg2mdio, ddr, uart1, uart2, bmcuart0a, bmcuart0b, bmcuart1, iox1,
150 iox2, ioxh, gspi, mmc, mmcwp, mmccd, mmcrst, mmc8, r1, r1err, r1md,
151 r2, r2err, r2md, sd1, sd1pwr, wdog1, wdog2, scipme, sci, serirq,
152 jtag2, spix, spixcs1, pspi1, pspi2, ddc, clkreq, clkout, spi3, spi3cs1,
153 spi3quad, spi3cs2, spi3cs3, spi0cs1, lpc, lpcclk, espi, lkgpo0, lkgpo1,
154 lkgpo2, nprd_smi
155
156For example, pinctrl might have group subnodes like the following:
157 r1err_pins: r1err-pins {
158 groups = "r1err";
159 function = "r1err";
160 };
161 r1md_pins: r1md-pins {
162 groups = "r1md";
163 function = "r1md";
164 };
165 r1_pins: r1-pins {
166 groups = "r1";
167 function = "r1";
168 };
169
170Examples
171========
172pinctrl: pinctrl@f0800000 {
173 #address-cells = <1>;
174 #size-cells = <1>;
175 compatible = "nuvoton,npcm750-pinctrl";
176 ranges = <0 0xf0010000 0x8000>;
177
178 gpio0: gpio@f0010000 {
179 gpio-controller;
180 #gpio-cells = <2>;
181 reg = <0x0 0x80>;
182 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
183 gpio-ranges = <&pinctrl 0 0 32>;
184 };
185
186 ....
187
188 gpio7: gpio@f0017000 {
189 gpio-controller;
190 #gpio-cells = <2>;
191 reg = <0x7000 0x80>;
192 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
193 gpio-ranges = <&pinctrl 0 224 32>;
194 };
195
196 gpio0_iox1d1_pin: gpio0-iox1d1-pin {
197 pins = "GPIO0/IOX1DI";
198 output-high;
199 };
200
201 iox1_pins: iox1-pins {
202 groups = "iox1";
203 function = "iox1";
204 };
205 iox2_pins: iox2-pins {
206 groups = "iox2";
207 function = "iox2";
208 };
209
210 ....
211
212 clkreq_pins: clkreq-pins {
213 groups = "clkreq";
214 function = "clkreq";
215 };
216};
Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt+2−0
@@ -19,6 +19,7 @@ PMIC's from Qualcomm. · 18 unmodified lines
19 "qcom,pm8998-gpio"19 "qcom,pm8998-gpio"
20 "qcom,pma8084-gpio"20 "qcom,pma8084-gpio"
21 "qcom,pmi8994-gpio"21 "qcom,pmi8994-gpio"
22 "qcom,pms405-gpio"
22 23
23 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"24 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
24 if the device is on an spmi bus or an ssbi bus respectively25 if the device is on an spmi bus or an ssbi bus respectively
@@ -91,6 +92,7 @@ to specify in a pin configuration subnode: · 66 unmodified lines
91 gpio1-gpio26 for pm899892 gpio1-gpio26 for pm8998
92 gpio1-gpio22 for pma808493 gpio1-gpio22 for pma8084
93 gpio1-gpio10 for pmi899494 gpio1-gpio10 for pmi8994
95 gpio1-gpio11 for pms405
94 96
95- function:97- function:
96 Usage: required98 Usage: required
Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt+199−0
@@ -0,0 +1,199 @@
1Qualcomm QCS404 TLMM block
2
3This binding describes the Top Level Mode Multiplexer block found in the
4QCS404 platform.
5
6- compatible:
7 Usage: required
8 Value type: <string>
9 Definition: must be "qcom,qcs404-pinctrl"
10
11- reg:
12 Usage: required
13 Value type: <prop-encoded-array>
14 Definition: the base address and size of the north, south and east TLMM
15 tiles.
16
17- reg-names:
18 Usage: required
19 Value type: <stringlist>
20 Defintiion: names for the cells of reg, must contain "north", "south"
21 and "east".
22
23- interrupts:
24 Usage: required
25 Value type: <prop-encoded-array>
26 Definition: should specify the TLMM summary IRQ.
27
28- interrupt-controller:
29 Usage: required
30 Value type: <none>
31 Definition: identifies this node as an interrupt controller
32
33- #interrupt-cells:
34 Usage: required
35 Value type: <u32>
36 Definition: must be 2. Specifying the pin number and flags, as defined
37 in <dt-bindings/interrupt-controller/irq.h>
38
39- gpio-controller:
40 Usage: required
41 Value type: <none>
42 Definition: identifies this node as a gpio controller
43
44- #gpio-cells:
45 Usage: required
46 Value type: <u32>
47 Definition: must be 2. Specifying the pin number and flags, as defined
48 in <dt-bindings/gpio/gpio.h>
49
50- gpio-ranges:
51 Usage: required
52 Definition: see ../gpio/gpio.txt
53
54Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
55a general description of GPIO and interrupt bindings.
56
57Please refer to pinctrl-bindings.txt in this directory for details of the
58common pinctrl bindings used by client devices, including the meaning of the
59phrase "pin configuration node".
60
61The pin configuration nodes act as a container for an arbitrary number of
62subnodes. Each of these subnodes represents some desired configuration for a
63pin, a group, or a list of pins or groups. This configuration can include the
64mux function to select on those pin(s)/group(s), and various pin configuration
65parameters, such as pull-up, drive strength, etc.
66
67
68PIN CONFIGURATION NODES:
69
70The name of each subnode is not important; all subnodes should be enumerated
71and processed purely based on their content.
72
73Each subnode only affects those parameters that are explicitly listed. In
74other words, a subnode that lists a mux function but no pin configuration
75parameters implies no information about any pin configuration parameters.
76Similarly, a pin subnode that describes a pullup parameter implies no
77information about e.g. the mux function.
78
79
80The following generic properties as defined in pinctrl-bindings.txt are valid
81to specify in a pin configuration subnode:
82
83- pins:
84 Usage: required
85 Value type: <string-array>
86 Definition: List of gpio pins affected by the properties specified in
87 this subnode.
88
89 Valid pins are:
90 gpio0-gpio119
91 Supports mux, bias and drive-strength
92
93 sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
94 sdc2_data
95 Supports bias and drive-strength
96
97 ufs_reset
98 Supports bias and drive-strength
99
100- function:
101 Usage: required
102 Value type: <string>
103 Definition: Specify the alternative function to be configured for the
104 specified pins. Functions are only valid for gpio pins.
105 Valid values are:
106
107 gpio, hdmi_tx, hdmi_ddc, blsp_uart_tx_a2, blsp_spi2, m_voc,
108 qdss_cti_trig_in_a0, blsp_uart_rx_a2, qdss_tracectl_a,
109 blsp_uart2, aud_cdc, blsp_i2c_sda_a2, qdss_tracedata_a,
110 blsp_i2c_scl_a2, qdss_tracectl_b, qdss_cti_trig_in_b0,
111 blsp_uart1, blsp_spi_mosi_a1, blsp_spi_miso_a1,
112 qdss_tracedata_b, blsp_i2c1, blsp_spi_cs_n_a1, gcc_plltest,
113 blsp_spi_clk_a1, rgb_data0, blsp_uart5, blsp_spi5,
114 adsp_ext, rgb_data1, prng_rosc, rgb_data2, blsp_i2c5,
115 gcc_gp1_clk_b, rgb_data3, gcc_gp2_clk_b, blsp_spi0,
116 blsp_uart0, gcc_gp3_clk_b, blsp_i2c0, qdss_traceclk_b,
117 pcie_clk, nfc_irq, blsp_spi4, nfc_dwl, audio_ts, rgb_data4,
118 spi_lcd, blsp_uart_tx_b2, gcc_gp3_clk_a, rgb_data5,
119 blsp_uart_rx_b2, blsp_i2c_sda_b2, blsp_i2c_scl_b2,
120 pwm_led11, i2s_3_data0_a, ebi2_lcd, i2s_3_data1_a,
121 i2s_3_data2_a, atest_char, pwm_led3, i2s_3_data3_a,
122 pwm_led4, i2s_4, ebi2_a, dsd_clk_b, pwm_led5, pwm_led6,
123 pwm_led7, pwm_led8, pwm_led24, spkr_dac0, blsp_i2c4,
124 pwm_led9, pwm_led10, spdifrx_opt, pwm_led12, pwm_led13,
125 pwm_led14, wlan1_adc1, rgb_data_b0, pwm_led15,
126 blsp_spi_mosi_b1, wlan1_adc0, rgb_data_b1, pwm_led16,
127 blsp_spi_miso_b1, qdss_cti_trig_out_b0, wlan2_adc1,
128 rgb_data_b2, pwm_led17, blsp_spi_cs_n_b1, wlan2_adc0,
129 rgb_data_b3, pwm_led18, blsp_spi_clk_b1, rgb_data_b4,
130 pwm_led19, ext_mclk1_b, qdss_traceclk_a, rgb_data_b5,
131 pwm_led20, atest_char3, i2s_3_sck_b, ldo_update, bimc_dte0,
132 rgb_hsync, pwm_led21, i2s_3_ws_b, dbg_out, rgb_vsync,
133 i2s_3_data0_b, ldo_en, hdmi_dtest, rgb_de, i2s_3_data1_b,
134 hdmi_lbk9, rgb_clk, atest_char1, i2s_3_data2_b, ebi_cdc,
135 hdmi_lbk8, rgb_mdp, atest_char0, i2s_3_data3_b, hdmi_lbk7,
136 rgb_data_b6, rgb_data_b7, hdmi_lbk6, rgmii_int, cri_trng1,
137 rgmii_wol, cri_trng0, gcc_tlmm, rgmii_ck, rgmii_tx,
138 hdmi_lbk5, hdmi_pixel, hdmi_rcv, hdmi_lbk4, rgmii_ctl,
139 ext_lpass, rgmii_rx, cri_trng, hdmi_lbk3, hdmi_lbk2,
140 qdss_cti_trig_out_b1, rgmii_mdio, hdmi_lbk1, rgmii_mdc,
141 hdmi_lbk0, ir_in, wsa_en, rgb_data6, rgb_data7,
142 atest_char2, ebi_ch0, blsp_uart3, blsp_spi3, sd_write,
143 blsp_i2c3, gcc_gp1_clk_a, qdss_cti_trig_in_b1,
144 gcc_gp2_clk_a, ext_mclk0, mclk_in1, i2s_1, dsd_clk_a,
145 qdss_cti_trig_in_a1, rgmi_dll1, pwm_led22, pwm_led23,
146 qdss_cti_trig_out_a0, rgmi_dll2, pwm_led1,
147 qdss_cti_trig_out_a1, pwm_led2, i2s_2, pll_bist,
148 ext_mclk1_a, mclk_in2, bimc_dte1, i2s_3_sck_a, i2s_3_ws_a
149
150- bias-disable:
151 Usage: optional
152 Value type: <none>
153 Definition: The specified pins should be configued as no pull.
154
155- bias-pull-down:
156 Usage: optional
157 Value type: <none>
158 Definition: The specified pins should be configued as pull down.
159
160- bias-pull-up:
161 Usage: optional
162 Value type: <none>
163 Definition: The specified pins should be configued as pull up.
164
165- output-high:
166 Usage: optional
167 Value type: <none>
168 Definition: The specified pins are configured in output mode, driven
169 high.
170 Not valid for sdc pins.
171
172- output-low:
173 Usage: optional
174 Value type: <none>
175 Definition: The specified pins are configured in output mode, driven
176 low.
177 Not valid for sdc pins.
178
179- drive-strength:
180 Usage: optional
181 Value type: <u32>
182 Definition: Selects the drive strength for the specified pins, in mA.
183 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
184
185Example:
186
187 tlmm: pinctrl@1000000 {
188 compatible = "qcom,qcs404-pinctrl";
189 reg = <0x01000000 0x200000>,
190 <0x01300000 0x200000>,
191 <0x07b00000 0x200000>;
192 reg-names = "south", "north", "east";
193 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
194 gpio-controller;
195 #gpio-cells = <2>;
196 gpio-ranges = <&tlmm 0 0 120>;
197 interrupt-controller;
198 #interrupt-cells = <2>;
199 };
Documentation/devicetree/bindings/pinctrl/qcom,sdm660-pinctrl.txt+191−0
@@ -0,0 +1,191 @@
1Qualcomm Technologies, Inc. SDM660 TLMM block
2
3This binding describes the Top Level Mode Multiplexer block found in the
4SDM660 platform.
5
6- compatible:
7 Usage: required
8 Value type: <string>
9 Definition: must be "qcom,sdm660-pinctrl" or
10 "qcom,sdm630-pinctrl".
11
12- reg:
13 Usage: required
14 Value type: <prop-encoded-array>
15 Definition: the base address and size of the north, center and south
16 TLMM tiles.
17
18- reg-names:
19 Usage: required
20 Value type: <stringlist>
21 Definition: names for the cells of reg, must contain "north", "center"
22 and "south".
23
24- interrupts:
25 Usage: required
26 Value type: <prop-encoded-array>
27 Definition: should specify the TLMM summary IRQ.
28
29- interrupt-controller:
30 Usage: required
31 Value type: <none>
32 Definition: identifies this node as an interrupt controller
33
34- #interrupt-cells:
35 Usage: required
36 Value type: <u32>
37 Definition: must be 2. Specifying the pin number and flags, as defined
38 in <dt-bindings/interrupt-controller/irq.h>
39
40- gpio-controller:
41 Usage: required
42 Value type: <none>
43 Definition: identifies this node as a gpio controller
44
45- gpio-ranges:
46 Usage: required
47 Value type: <prop-encoded-array>
48 Definition: Specifies the mapping between gpio controller and
49 pin-controller pins.
50
51- #gpio-cells:
52 Usage: required
53 Value type: <u32>
54 Definition: must be 2. Specifying the pin number and flags, as defined
55 in <dt-bindings/gpio/gpio.h>
56
57Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
58a general description of GPIO and interrupt bindings.
59
60Please refer to pinctrl-bindings.txt in this directory for details of the
61common pinctrl bindings used by client devices, including the meaning of the
62phrase "pin configuration node".
63
64The pin configuration nodes act as a container for an arbitrary number of
65subnodes. Each of these subnodes represents some desired configuration for a
66pin, a group, or a list of pins or groups. This configuration can include the
67mux function to select on those pin(s)/group(s), and various pin configuration
68parameters, such as pull-up, drive strength, etc.
69
70
71PIN CONFIGURATION NODES:
72
73The name of each subnode is not important; all subnodes should be enumerated
74and processed purely based on their content.
75
76Each subnode only affects those parameters that are explicitly listed. In
77other words, a subnode that lists a mux function but no pin configuration
78parameters implies no information about any pin configuration parameters.
79Similarly, a pin subnode that describes a pullup parameter implies no
80information about e.g. the mux function.
81
82
83The following generic properties as defined in pinctrl-bindings.txt are valid
84to specify in a pin configuration subnode:
85
86- pins:
87 Usage: required
88 Value type: <string-array>
89 Definition: List of gpio pins affected by the properties specified in
90 this subnode. Valid pins are:
91 gpio0-gpio113,
92 Supports mux, bias and drive-strength
93 sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd, sdc2_data sdc1_rclk,
94 Supports bias and drive-strength
95
96- function:
97 Usage: required
98 Value type: <string>
99 Definition: Specify the alternative function to be configured for the
100 specified pins. Functions are only valid for gpio pins.
101 Valid values are:
102 adsp_ext, agera_pll, atest_char, atest_char0, atest_char1,
103 atest_char2, atest_char3, atest_gpsadc0, atest_gpsadc1,
104 atest_tsens, atest_tsens2, atest_usb1, atest_usb10,
105 atest_usb11, atest_usb12, atest_usb13, atest_usb2,
106 atest_usb20, atest_usb21, atest_usb22, atest_usb23,
107 audio_ref, bimc_dte0, bimc_dte1, blsp_i2c1, blsp_i2c2,
108 blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7,
109 blsp_i2c8_a, blsp_i2c8_b, blsp_spi1, blsp_spi2, blsp_spi3,
110 blsp_spi3_cs1, blsp_spi3_cs2, blsp_spi4, blsp_spi5,
111 blsp_spi6, blsp_spi7, blsp_spi8_a, blsp_spi8_b,
112 blsp_spi8_cs1, blsp_spi8_cs2, blsp_uart1, blsp_uart2,
113 blsp_uart5, blsp_uart6_a, blsp_uart6_b, blsp_uim1,
114 blsp_uim2, blsp_uim5, blsp_uim6, cam_mclk, cci_async,
115 cci_i2c, cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist,
116 gcc_gp1, gcc_gp2, gcc_gp3, gpio, gps_tx_a, gps_tx_b, gps_tx_c,
117 isense_dbg, jitter_bist, ldo_en, ldo_update, m_voc, mdp_vsync,
118 mdss_vsync0, mdss_vsync1, mdss_vsync2, mdss_vsync3, mss_lte,
119 nav_pps_a, nav_pps_b, nav_pps_c, pa_indicator, phase_flag0,
120 phase_flag1, phase_flag10, phase_flag11, phase_flag12,
121 phase_flag13, phase_flag14, phase_flag15, phase_flag16,
122 phase_flag17, phase_flag18, phase_flag19, phase_flag2,
123 phase_flag20, phase_flag21, phase_flag22, phase_flag23,
124 phase_flag24, phase_flag25, phase_flag26, phase_flag27,
125 phase_flag28, phase_flag29, phase_flag3, phase_flag30,
126 phase_flag31, phase_flag4, phase_flag5, phase_flag6,
127 phase_flag7, phase_flag8, phase_flag9, pll_bypassnl,
128 pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc, pwr_crypto,
129 pwr_modem, pwr_nav, qdss_cti0_a, qdss_cti0_b, qdss_cti1_a,
130 qdss_cti1_b, qdss_gpio, qdss_gpio0, qdss_gpio1, qdss_gpio10,
131 qdss_gpio11, qdss_gpio12, qdss_gpio13, qdss_gpio14, qdss_gpio15,
132 qdss_gpio2, qdss_gpio3, qdss_gpio4, qdss_gpio5, qdss_gpio6,
133 qdss_gpio7, qdss_gpio8, qdss_gpio9, qlink_enable, qlink_request,
134 qspi_clk, qspi_cs, qspi_data0, qspi_data1, qspi_data2,
135 qspi_data3, qspi_resetn, sec_mi2s, sndwire_clk, sndwire_data,
136 sp_cmu, ssc_irq, tgu_ch0, tgu_ch1, tsense_pwm1, tsense_pwm2,
137 uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,
138 uim2_data, uim2_present, uim2_reset, uim_batt, vfr_1,
139 vsense_clkout, vsense_data0, vsense_data1, vsense_mode,
140 wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1
141
142- bias-disable:
143 Usage: optional
144 Value type: <none>
145 Definition: The specified pins should be configued as no pull.
146
147- bias-pull-down:
148 Usage: optional
149 Value type: <none>
150 Definition: The specified pins should be configued as pull down.
151
152- bias-pull-up:
153 Usage: optional
154 Value type: <none>
155 Definition: The specified pins should be configued as pull up.
156
157- output-high:
158 Usage: optional
159 Value type: <none>
160 Definition: The specified pins are configured in output mode, driven
161 high.
162 Not valid for sdc pins.
163
164- output-low:
165 Usage: optional
166 Value type: <none>
167 Definition: The specified pins are configured in output mode, driven
168 low.
169 Not valid for sdc pins.
170
171- drive-strength:
172 Usage: optional
173 Value type: <u32>
174 Definition: Selects the drive strength for the specified pins, in mA.
175 Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
176
177Example:
178
179 tlmm: pinctrl@3100000 {
180 compatible = "qcom,sdm660-pinctrl";
181 reg = <0x3100000 0x200000>,
182 <0x3500000 0x200000>,
183 <0x3900000 0x200000>;
184 reg-names = "south", "center", "north";
185 interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
186 gpio-controller;
187 gpio-ranges = <&tlmm 0 0 114>;
188 #gpio-cells = <2>;
189 interrupt-controller;
190 #interrupt-cells = <2>;
191 };
Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt+3−0
@@ -14,8 +14,11 @@ Required Properties: · 13 unmodified lines
14 - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.14 - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
15 - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.15 - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
16 - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.16 - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
17 - "renesas,pfc-r8a7744": for R8A7744 (RZ/G1N) compatible pin-controller.
17 - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.18 - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
18 - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller.19 - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller.
20 - "renesas,pfc-r8a774a1": for R8A774A1 (RZ/G2M) compatible pin-controller.
21 - "renesas,pfc-r8a774c0": for R8A774C0 (RZ/G2E) compatible pin-controller.
19 - "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.22 - "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.
20 - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.23 - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
21 - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.24 - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt+153−0
@@ -0,0 +1,153 @@
1Renesas RZ/N1 SoC Pinctrl node description.
2
3Pin controller node
4-------------------
5Required properties:
6- compatible: SoC-specific compatible string "renesas,<soc-specific>-pinctrl"
7 followed by "renesas,rzn1-pinctrl" as fallback. The SoC-specific compatible
8 strings must be one of:
9 "renesas,r9a06g032-pinctrl" for RZ/N1D
10 "renesas,r9a06g033-pinctrl" for RZ/N1S
11- reg: Address base and length of the memory area where the pin controller
12 hardware is mapped to.
13- clocks: phandle for the clock, see the description of clock-names below.
14- clock-names: Contains the name of the clock:
15 "bus", the bus clock, sometimes described as pclk, for register accesses.
16
17Example:
18 pinctrl: pin-controller@40067000 {
19 compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
20 reg = <0x40067000 0x1000>, <0x51000000 0x480>;
21 clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>;
22 clock-names = "bus";
23 };
24
25Sub-nodes
26---------
27
28The child nodes of the pin controller node describe a pin multiplexing
29function.
30
31- Pin multiplexing sub-nodes:
32 A pin multiplexing sub-node describes how to configure a set of
33 (or a single) pin in some desired alternate function mode.
34 A single sub-node may define several pin configurations.
35 Please refer to pinctrl-bindings.txt to get to know more on generic
36 pin properties usage.
37
38 The allowed generic formats for a pin multiplexing sub-node are the
39 following ones:
40
41 node-1 {
42 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ;
43 GENERIC_PINCONFIG;
44 };
45
46 node-2 {
47 sub-node-1 {
48 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ;
49 GENERIC_PINCONFIG;
50 };
51
52 sub-node-2 {
53 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ;
54 GENERIC_PINCONFIG;
55 };
56
57 ...
58
59 sub-node-n {
60 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ;
61 GENERIC_PINCONFIG;
62 };
63 };
64
65 node-3 {
66 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ;
67 GENERIC_PINCONFIG;
68
69 sub-node-1 {
70 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ;
71 GENERIC_PINCONFIG;
72 };
73
74 ...
75
76 sub-node-n {
77 pinmux = <PIN_ID_AND_MUX>, <PIN_ID_AND_MUX>, ... ;
78 GENERIC_PINCONFIG;
79 };
80 };
81
82 Use the latter two formats when pins part of the same logical group need to
83 have different generic pin configuration flags applied. Note that the generic
84 pinconfig in node-3 does not apply to the sub-nodes.
85
86 Client sub-nodes shall refer to pin multiplexing sub-nodes using the phandle
87 of the most external one.
88
89 Eg.
90
91 client-1 {
92 ...
93 pinctrl-0 = <&node-1>;
94 ...
95 };
96
97 client-2 {
98 ...
99 pinctrl-0 = <&node-2>;
100 ...
101 };
102
103 Required properties:
104 - pinmux:
105 integer array representing pin number and pin multiplexing configuration.
106 When a pin has to be configured in alternate function mode, use this
107 property to identify the pin by its global index, and provide its
108 alternate function configuration number along with it.
109 When multiple pins are required to be configured as part of the same
110 alternate function they shall be specified as members of the same
111 argument list of a single "pinmux" property.
112 Integers values in the "pinmux" argument list are assembled as:
113 (PIN | MUX_FUNC << 8)
114 where PIN directly corresponds to the pl_gpio pin number and MUX_FUNC is
115 one of the alternate function identifiers defined in:
116 <include/dt-bindings/pinctrl/rzn1-pinctrl.h>
117 These identifiers collapse the IO Multiplex Configuration Level 1 and
118 Level 2 numbers that are detailed in the hardware reference manual into a
119 single number. The identifiers for Level 2 are simply offset by 10.
120 Additional identifiers are provided to specify the MDIO source peripheral.
121
122 Optional generic pinconf properties:
123 - bias-disable - disable any pin bias
124 - bias-pull-up - pull up the pin with 50 KOhm
125 - bias-pull-down - pull down the pin with 50 KOhm
126 - bias-high-impedance - high impedance mode
127 - drive-strength - sink or source at most 4, 6, 8 or 12 mA
128
129 Example:
130 A serial communication interface with a TX output pin and an RX input pin.
131
132 &pinctrl {
133 pins_uart0: pins_uart0 {
134 pinmux = <
135 RZN1_PINMUX(103, RZN1_FUNC_UART0_I) /* UART0_TXD */
136 RZN1_PINMUX(104, RZN1_FUNC_UART0_I) /* UART0_RXD */
137 >;
138 };
139 };
140
141 Example 2:
142 Here we set the pull up on the RXD pin of the UART.
143
144 &pinctrl {
145 pins_uart0: pins_uart0 {
146 pinmux = <RZN1_PINMUX(103, RZN1_FUNC_UART0_I)>; /* TXD */
147
148 pins_uart6_rx {
149 pinmux = <RZN1_PINMUX(104, RZN1_FUNC_UART0_I)>; /* RXD */
150 bias-pull-up;
151 };
152 };
153 };
Documentation/devicetree/bindings/power/actions,owl-sps.txt+2−0
@@ -3,11 +3,13 @@ Actions Semi Owl Smart Power System (SPS) · 2 unmodified lines
3Required properties:3Required properties:
4- compatible : "actions,s500-sps" for S5004- compatible : "actions,s500-sps" for S500
5 "actions,s700-sps" for S7005 "actions,s700-sps" for S700
6 "actions,s900-sps" for S900
6- reg : Offset and length of the register set for the device.7- reg : Offset and length of the register set for the device.
7- #power-domain-cells : Must be 1.8- #power-domain-cells : Must be 1.
8 See macros in:9 See macros in:
9 include/dt-bindings/power/owl-s500-powergate.h for S50010 include/dt-bindings/power/owl-s500-powergate.h for S500
10 include/dt-bindings/power/owl-s700-powergate.h for S70011 include/dt-bindings/power/owl-s700-powergate.h for S700
12 include/dt-bindings/power/owl-s900-powergate.h for S900
11 13
12 14
13Example:15Example:
Documentation/devicetree/bindings/power/renesas,apmu.txt+2−0
@@ -8,7 +8,9 @@ Required properties: · 7 unmodified lines
8- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.8- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
9 Examples with soctypes are:9 Examples with soctypes are:
10 - "renesas,r8a7743-apmu" (RZ/G1M)10 - "renesas,r8a7743-apmu" (RZ/G1M)
11 - "renesas,r8a7744-apmu" (RZ/G1N)
11 - "renesas,r8a7745-apmu" (RZ/G1E)12 - "renesas,r8a7745-apmu" (RZ/G1E)
13 - "renesas,r8a77470-apmu" (RZ/G1C)
12 - "renesas,r8a7790-apmu" (R-Car H2)14 - "renesas,r8a7790-apmu" (R-Car H2)
13 - "renesas,r8a7791-apmu" (R-Car M2-W)15 - "renesas,r8a7791-apmu" (R-Car M2-W)
14 - "renesas,r8a7792-apmu" (R-Car V2H)16 - "renesas,r8a7792-apmu" (R-Car V2H)
Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt+3−0
@@ -8,8 +8,11 @@ and various coprocessors. · 7 unmodified lines
8Required properties:8Required properties:
9 - compatible: Must contain exactly one of the following:9 - compatible: Must contain exactly one of the following:
10 - "renesas,r8a7743-sysc" (RZ/G1M)10 - "renesas,r8a7743-sysc" (RZ/G1M)
11 - "renesas,r8a7744-sysc" (RZ/G1N)
11 - "renesas,r8a7745-sysc" (RZ/G1E)12 - "renesas,r8a7745-sysc" (RZ/G1E)
12 - "renesas,r8a77470-sysc" (RZ/G1C)13 - "renesas,r8a77470-sysc" (RZ/G1C)
14 - "renesas,r8a774a1-sysc" (RZ/G2M)
15 - "renesas,r8a774c0-sysc" (RZ/G2E)
13 - "renesas,r8a7779-sysc" (R-Car H1)16 - "renesas,r8a7779-sysc" (R-Car H1)
14 - "renesas,r8a7790-sysc" (R-Car H2)17 - "renesas,r8a7790-sysc" (R-Car H2)
15 - "renesas,r8a7791-sysc" (R-Car M2-W)18 - "renesas,r8a7791-sysc" (R-Car M2-W)
Documentation/devicetree/bindings/power/reset/qcom,pon.txt+4−1
@@ -6,7 +6,10 @@ and resin along with the Android reboot-mode. · 5 unmodified lines
6This DT node has pwrkey and resin as sub nodes.6This DT node has pwrkey and resin as sub nodes.
7 7
8Required Properties:8Required Properties:
9-compatible: "qcom,pm8916-pon"9-compatible: Must be one of:
10 "qcom,pm8916-pon"
11 "qcom,pms405-pon"
12
10-reg: Specifies the physical address of the pon register13-reg: Specifies the physical address of the pon register
11 14
12Optional subnode:15Optional subnode:
Documentation/devicetree/bindings/power/supply/bq25890.txt+3−0
@@ -1,5 +1,8 @@
1Binding for TI bq25890 Li-Ion Charger1Binding for TI bq25890 Li-Ion Charger
2 2
3This driver will support the bq25896 and the bq25890. There are other ICs
4in the same family but those have not been tested.
5
3Required properties:6Required properties:
4- compatible: Should contain one of the following:7- compatible: Should contain one of the following:
5 * "ti,bq25890"8 * "ti,bq25890"
Documentation/devicetree/bindings/power/supply/bq27xxx.txt+1−0
@@ -23,6 +23,7 @@ Required properties: · 22 unmodified lines
23 * "ti,bq27546" - BQ2754623 * "ti,bq27546" - BQ27546
24 * "ti,bq27742" - BQ2774224 * "ti,bq27742" - BQ27742
25 * "ti,bq27545" - BQ2754525 * "ti,bq27545" - BQ27545
26 * "ti,bq27411" - BQ27411
26 * "ti,bq27421" - BQ2742127 * "ti,bq27421" - BQ27421
27 * "ti,bq27425" - BQ2742528 * "ti,bq27425" - BQ27425
28 * "ti,bq27426" - BQ2742629 * "ti,bq27426" - BQ27426
Documentation/devicetree/bindings/power/supply/sc2731_charger.txt+40−0
@@ -0,0 +1,40 @@
1Spreadtrum SC2731 PMIC battery charger binding
2
3Required properties:
4 - compatible: Should be "sprd,sc2731-charger".
5 - reg: Address offset of charger register.
6 - phys: Contains a phandle to the USB phy.
7
8Optional Properties:
9- monitored-battery: phandle of battery characteristics devicetree node.
10 The charger uses the following battery properties:
11- charge-term-current-microamp: current for charge termination phase.
12- constant-charge-voltage-max-microvolt: maximum constant input voltage.
13 See Documentation/devicetree/bindings/power/supply/battery.txt
14
15Example:
16
17 bat: battery {
18 compatible = "simple-battery";
19 charge-term-current-microamp = <120000>;
20 constant-charge-voltage-max-microvolt = <4350000>;
21 ......
22 };
23
24 sc2731_pmic: pmic@0 {
25 compatible = "sprd,sc2731";
26 reg = <0>;
27 spi-max-frequency = <26000000>;
28 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
29 interrupt-controller;
30 #interrupt-cells = <2>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33
34 charger@0 {
35 compatible = "sprd,sc2731-charger";
36 reg = <0x0>;
37 phys = <&ssphy>;
38 monitored-battery = <&bat>;
39 };
40 };
Documentation/devicetree/bindings/pwm/pwm-tiecap.txt+1−0
@@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines
7 for da850 - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";7 for da850 - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
8 for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";8 for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
9 for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap";9 for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap";
10 for am654 - compatible = "ti,am654-ecap", "ti,am3352-ecap";
10- #pwm-cells: should be 3. See pwm.txt in this directory for a description of11- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
11 the cells format. The PWM channel index ranges from 0 to 4. The only third12 the cells format. The PWM channel index ranges from 0 to 4. The only third
12 cell flag supported by this binding is PWM_POLARITY_INVERTED.13 cell flag supported by this binding is PWM_POLARITY_INVERTED.
Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt+4−0
@@ -3,7 +3,9 @@ · 2 unmodified lines
3Required Properties:3Required Properties:
4- compatible: should be "renesas,pwm-rcar" and one of the following.4- compatible: should be "renesas,pwm-rcar" and one of the following.
5 - "renesas,pwm-r8a7743": for RZ/G1M5 - "renesas,pwm-r8a7743": for RZ/G1M
6 - "renesas,pwm-r8a7744": for RZ/G1N
6 - "renesas,pwm-r8a7745": for RZ/G1E7 - "renesas,pwm-r8a7745": for RZ/G1E
8 - "renesas,pwm-r8a774a1": for RZ/G2M
7 - "renesas,pwm-r8a7778": for R-Car M1A9 - "renesas,pwm-r8a7778": for R-Car M1A
8 - "renesas,pwm-r8a7779": for R-Car H110 - "renesas,pwm-r8a7779": for R-Car H1
9 - "renesas,pwm-r8a7790": for R-Car H211 - "renesas,pwm-r8a7790": for R-Car H2
@@ -12,6 +14,8 @@ Required Properties: · 2 unmodified lines
12 - "renesas,pwm-r8a7795": for R-Car H314 - "renesas,pwm-r8a7795": for R-Car H3
13 - "renesas,pwm-r8a7796": for R-Car M3-W15 - "renesas,pwm-r8a7796": for R-Car M3-W
14 - "renesas,pwm-r8a77965": for R-Car M3-N16 - "renesas,pwm-r8a77965": for R-Car M3-N
17 - "renesas,pwm-r8a77970": for R-Car V3M
18 - "renesas,pwm-r8a77980": for R-Car V3H
15 - "renesas,pwm-r8a77990": for R-Car E319 - "renesas,pwm-r8a77990": for R-Car E3
16 - "renesas,pwm-r8a77995": for R-Car D320 - "renesas,pwm-r8a77995": for R-Car D3
17- reg: base address and length of the registers block for the PWM.21- reg: base address and length of the registers block for the PWM.
Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt+8−2
@@ -2,13 +2,19 @@ · 1 unmodified line
2 2
3Required Properties:3Required Properties:
4 4
5 - compatible: should be one of the following.5 - compatible: must contain one or more of the following:
6 - "renesas,tpu-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible PWM controller.6 - "renesas,tpu-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible PWM controller.
7 - "renesas,tpu-r8a7740": for R8A7740 (R-Mobile A1) compatible PWM controller.7 - "renesas,tpu-r8a7740": for R8A7740 (R-Mobile A1) compatible PWM controller.
8 - "renesas,tpu-r8a7743": for R8A7743 (RZ/G1M) compatible PWM controller.8 - "renesas,tpu-r8a7743": for R8A7743 (RZ/G1M) compatible PWM controller.
9 - "renesas,tpu-r8a7744": for R8A7744 (RZ/G1N) compatible PWM controller.
9 - "renesas,tpu-r8a7745": for R8A7745 (RZ/G1E) compatible PWM controller.10 - "renesas,tpu-r8a7745": for R8A7745 (RZ/G1E) compatible PWM controller.
10 - "renesas,tpu-r8a7790": for R8A7790 (R-Car H2) compatible PWM controller.11 - "renesas,tpu-r8a7790": for R8A7790 (R-Car H2) compatible PWM controller.
11 - "renesas,tpu": for generic R-Car and RZ/G1 TPU PWM controller.12 - "renesas,tpu-r8a77970": for R8A77970 (R-Car V3M) compatible PWM
13 controller.
14 - "renesas,tpu-r8a77980": for R8A77980 (R-Car V3H) compatible PWM
15 controller.
16 - "renesas,tpu": for the generic TPU PWM controller; this is a fallback for
17 the entries listed above.
12 18
13 - reg: Base address and length of each memory resource used by the PWM19 - reg: Base address and length of each memory resource used by the PWM
14 controller hardware module.20 controller hardware module.
Documentation/devicetree/bindings/regulator/pfuze100.txt+5−0
@@ -12,6 +12,11 @@ Optional properties: · 11 unmodified lines
12 disabled. This binding is a workaround to keep backward compatibility with12 disabled. This binding is a workaround to keep backward compatibility with
13 old dtb's which rely on the fact that the switched regulators are always on13 old dtb's which rely on the fact that the switched regulators are always on
14 and don't mark them explicit as "regulator-always-on".14 and don't mark them explicit as "regulator-always-on".
15- fsl,pmic-stby-poweroff: if present, configure the PMIC to shutdown all
16 power rails when PMIC_STBY_REQ line is asserted during the power off sequence.
17 Use this option if the SoC should be powered off by external power
18 management IC (PMIC) on PMIC_STBY_REQ signal.
19 As opposite to PMIC_STBY_REQ boards can implement PMIC_ON_REQ signal.
15 20
16Required child node:21Required child node:
17- regulators: This is the list of child nodes that specify the regulator22- regulators: This is the list of child nodes that specify the regulator
Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.txt+23−0
@@ -26,6 +26,7 @@ Regulator nodes are identified by their compatible: · 25 unmodified lines
26 "qcom,rpm-pm8998-regulators"26 "qcom,rpm-pm8998-regulators"
27 "qcom,rpm-pma8084-regulators"27 "qcom,rpm-pma8084-regulators"
28 "qcom,rpm-pmi8998-regulators"28 "qcom,rpm-pmi8998-regulators"
29 "qcom,rpm-pms405-regulators"
29 30
30- vdd_s1-supply:31- vdd_s1-supply:
31- vdd_s2-supply:32- vdd_s2-supply:
@@ -188,6 +189,24 @@ Regulator nodes are identified by their compatible: · 156 unmodified lines
188 Definition: reference to regulator supplying the input pin, as189 Definition: reference to regulator supplying the input pin, as
189 described in the data sheet190 described in the data sheet
190 191
192- vdd_s1-supply:
193- vdd_s2-supply:
194- vdd_s3-supply:
195- vdd_s4-supply:
196- vdd_s5-supply:
197- vdd_l1_l2-supply:
198- vdd_l3_l8-supply:
199- vdd_l4-supply:
200- vdd_l5_l6-supply:
201- vdd_l7-supply:
202- vdd_l3_l8-supply:
203- vdd_l9-supply:
204- vdd_l10_l11_l12_l13-supply:
205 Usage: optional (pms405 only)
206 Value type: <phandle>
207 Definition: reference to regulator supplying the input pin, as
208 described in the data sheet
209
191The regulator node houses sub-nodes for each regulator within the device. Each210The regulator node houses sub-nodes for each regulator within the device. Each
192sub-node is identified using the node's name, with valid values listed for each211sub-node is identified using the node's name, with valid values listed for each
193of the pmics below.212of the pmics below.
@@ -222,6 +241,10 @@ pma8084: · 28 unmodified lines
222pmi8998:241pmi8998:
223 bob242 bob
224 243
244pms405:
245 s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12,
246 l13
247
225The content of each sub-node is defined by the standard binding for regulators -248The content of each sub-node is defined by the standard binding for regulators -
226see regulator.txt.249see regulator.txt.
227 250
Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.txt+9−3
@@ -1,7 +1,9 @@
1ROHM BD71837 Power Management Integrated Circuit (PMIC) regulator bindings1ROHM BD71837 and BD71847 Power Management Integrated Circuit regulator bindings
2 2
3Required properties:3Required properties:
4 - regulator-name: should be "buck1", ..., "buck8" and "ldo1", ..., "ldo7"4 - regulator-name: should be "buck1", ..., "buck8" and "ldo1", ..., "ldo7" for
5 BD71837. For BD71847 names should be "buck1", ..., "buck6"
6 and "ldo1", ..., "ldo6"
5 7
6List of regulators provided by this controller. BD71837 regulators node8List of regulators provided by this controller. BD71837 regulators node
7should be sub node of the BD71837 MFD node. See BD71837 MFD bindings at9should be sub node of the BD71837 MFD node. See BD71837 MFD bindings at
@@ -16,10 +18,14 @@ disabled by driver at startup. LDO5 and LDO6 are supplied by those and · 8 unmodified lines
16if they are disabled at startup the voltage monitoring for LDO5/LDO6 will18if they are disabled at startup the voltage monitoring for LDO5/LDO6 will
17cause PMIC to reset.19cause PMIC to reset.
18 20
19The valid names for regulator nodes are:21The valid names for BD71837 regulator nodes are:
20BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, BUCK7, BUCK822BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, BUCK7, BUCK8
21LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO723LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7
22 24
25The valid names for BD71847 regulator nodes are:
26BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6
27LDO1, LDO2, LDO3, LDO4, LDO5, LDO6
28
23Optional properties:29Optional properties:
24- Any optional property defined in bindings/regulator/regulator.txt30- Any optional property defined in bindings/regulator/regulator.txt
25 31
Documentation/devicetree/bindings/regulator/st,stpmic1-regulator.txt+68−0
@@ -0,0 +1,68 @@
1STMicroelectronics STPMIC1 Voltage regulators
2
3Regulator Nodes are optional depending on needs.
4
5Available Regulators in STPMIC1 device are:
6 - buck1 for Buck BUCK1
7 - buck2 for Buck BUCK2
8 - buck3 for Buck BUCK3
9 - buck4 for Buck BUCK4
10 - ldo1 for LDO LDO1
11 - ldo2 for LDO LDO2
12 - ldo3 for LDO LDO3
13 - ldo4 for LDO LDO4
14 - ldo5 for LDO LDO5
15 - ldo6 for LDO LDO6
16 - vref_ddr for LDO Vref DDR
17 - boost for Buck BOOST
18 - pwr_sw1 for VBUS_OTG switch
19 - pwr_sw2 for SW_OUT switch
20
21Switches are fixed voltage regulators with only enable/disable capability.
22
23Optional properties:
24- st,mask-reset: mask reset for this regulator: the regulator configuration
25 is maintained during pmic reset.
26- regulator-pull-down: enable high pull down
27 if not specified light pull down is used
28- regulator-over-current-protection:
29 if set, all regulators are switched off in case of over-current detection
30 on this regulator,
31 if not set, the driver only sends an over-current event.
32- interrupt-parent: phandle to the parent interrupt controller
33- interrupts: index of current limit detection interrupt
34- <regulator>-supply: phandle to the parent supply/regulator node
35 each regulator supply can be described except vref_ddr.
36
37Example:
38regulators {
39 compatible = "st,stpmic1-regulators";
40
41 ldo6-supply = <&v3v3>;
42
43 vdd_core: buck1 {
44 regulator-name = "vdd_core";
45 interrupts = <IT_CURLIM_BUCK1 0>;
46 interrupt-parent = <&pmic>;
47 st,mask-reset;
48 regulator-pull-down;
49 regulator-min-microvolt = <700000>;
50 regulator-max-microvolt = <1200000>;
51 };
52
53 v3v3: buck4 {
54 regulator-name = "v3v3";
55 interrupts = <IT_CURLIM_BUCK4 0>;
56 interrupt-parent = <&mypmic>;
57
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 };
61
62 v1v8: ldo6 {
63 regulator-name = "v1v8";
64 regulator-min-microvolt = <1800000>;
65 regulator-max-microvolt = <1800000>;
66 regulator-over-current-protection;
67 };
68};
Documentation/devicetree/bindings/remoteproc/qcom,adsp-pil.txt+126−0
@@ -0,0 +1,126 @@
1Qualcomm Technology Inc. ADSP Peripheral Image Loader
2
3This document defines the binding for a component that loads and boots firmware
4on the Qualcomm Technology Inc. ADSP Hexagon core.
5
6- compatible:
7 Usage: required
8 Value type: <string>
9 Definition: must be one of:
10 "qcom,sdm845-adsp-pil"
11
12- reg:
13 Usage: required
14 Value type: <prop-encoded-array>
15 Definition: must specify the base address and size of the qdsp6ss register
16
17- interrupts-extended:
18 Usage: required
19 Value type: <prop-encoded-array>
20 Definition: must list the watchdog, fatal IRQs ready, handover and
21 stop-ack IRQs
22
23- interrupt-names:
24 Usage: required
25 Value type: <stringlist>
26 Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
27
28- clocks:
29 Usage: required
30 Value type: <prop-encoded-array>
31 Definition: List of 8 phandle and clock specifier pairs for the adsp.
32
33- clock-names:
34 Usage: required
35 Value type: <stringlist>
36 Definition: List of clock input name strings sorted in the same
37 order as the clocks property. Definition must have
38 "xo", "sway_cbcr", "lpass_aon", "lpass_ahbs_aon_cbcr",
39 "lpass_ahbm_aon_cbcr", "qdsp6ss_xo", "qdsp6ss_sleep"
40 and "qdsp6ss_core".
41
42- power-domains:
43 Usage: required
44 Value type: <phandle>
45 Definition: reference to cx power domain node.
46
47- resets:
48 Usage: required
49 Value type: <phandle>
50 Definition: reference to the list of 2 reset-controller for the adsp.
51
52- reset-names:
53 Usage: required
54 Value type: <stringlist>
55 Definition: must be "pdc_sync" and "cc_lpass"
56
57- qcom,halt-regs:
58 Usage: required
59 Value type: <prop-encoded-array>
60 Definition: a phandle reference to a syscon representing TCSR followed
61 by the offset within syscon for lpass halt register.
62
63- memory-region:
64 Usage: required
65 Value type: <phandle>
66 Definition: reference to the reserved-memory for the ADSP
67
68- qcom,smem-states:
69 Usage: required
70 Value type: <phandle>
71 Definition: reference to the smem state for requesting the ADSP to
72 shut down
73
74- qcom,smem-state-names:
75 Usage: required
76 Value type: <stringlist>
77 Definition: must be "stop"
78
79
80= SUBNODES
81The adsp node may have an subnode named "glink-edge" that describes the
82communication edge, channels and devices related to the ADSP.
83See ../soc/qcom/qcom,glink.txt for details on how to describe these.
84
85= EXAMPLE
86The following example describes the resources needed to boot control the
87ADSP, as it is found on SDM845 boards.
88
89 remoteproc@17300000 {
90 compatible = "qcom,sdm845-adsp-pil";
91 reg = <0x17300000 0x40c>;
92
93 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
94 <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
95 <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
96 <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
97 <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
98 interrupt-names = "wdog", "fatal", "ready",
99 "handover", "stop-ack";
100
101 clocks = <&rpmhcc RPMH_CXO_CLK>,
102 <&gcc GCC_LPASS_SWAY_CLK>,
103 <&lpasscc LPASS_AUDIO_WRAPPER_AON_CLK>,
104 <&lpasscc LPASS_Q6SS_AHBS_AON_CLK>,
105 <&lpasscc LPASS_Q6SS_AHBM_AON_CLK>,
106 <&lpasscc LPASS_QDSP6SS_XO_CLK>,
107 <&lpasscc LPASS_QDSP6SS_SLEEP_CLK>,
108 <&lpasscc LPASS_QDSP6SS_CORE_CLK>;
109 clock-names = "xo", "sway_cbcr", "lpass_aon",
110 "lpass_ahbs_aon_cbcr",
111 "lpass_ahbm_aon_cbcr", "qdsp6ss_xo",
112 "qdsp6ss_sleep", "qdsp6ss_core";
113
114 power-domains = <&rpmhpd SDM845_CX>;
115
116 resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
117 <&aoss_reset AOSS_CC_LPASS_RESTART>;
118 reset-names = "pdc_sync", "cc_lpass";
119
120 qcom,halt-regs = <&tcsr_mutex_regs 0x22000>;
121
122 memory-region = <&pil_adsp_mem>;
123
124 qcom,smem-states = <&adsp_smp2p_out 0>;
125 qcom,smem-state-names = "stop";
126 };
Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt+5−0
@@ -10,6 +10,11 @@ on the Qualcomm ADSP Hexagon core. · 9 unmodified lines
10 "qcom,msm8974-adsp-pil"10 "qcom,msm8974-adsp-pil"
11 "qcom,msm8996-adsp-pil"11 "qcom,msm8996-adsp-pil"
12 "qcom,msm8996-slpi-pil"12 "qcom,msm8996-slpi-pil"
13 "qcom,qcs404-adsp-pas"
14 "qcom,qcs404-cdsp-pas"
15 "qcom,qcs404-wcss-pas"
16 "qcom,sdm845-adsp-pas"
17 "qcom,sdm845-cdsp-pas"
13 18
14- interrupts-extended:19- interrupts-extended:
15 Usage: required20 Usage: required
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt+6−2
@@ -53,13 +53,17 @@ on the Qualcomm Hexagon core. · 52 unmodified lines
53 Definition: reference to the reset-controller for the modem sub-system53 Definition: reference to the reset-controller for the modem sub-system
54 reference to the list of 3 reset-controllers for the54 reference to the list of 3 reset-controllers for the
55 wcss sub-system55 wcss sub-system
56 reference to the list of 2 reset-controllers for the modem
57 sub-system on SDM845 SoCs
56 58
57- reset-names:59- reset-names:
58 Usage: required60 Usage: required
59 Value type: <stringlist>61 Value type: <stringlist>
60 Definition: must be "mss_restart" for the modem sub-system62 Definition: must be "mss_restart" for the modem sub-system
61 Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"63 must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"
62 for the wcss syb-system64 for the wcss sub-system
65 must be "mss_restart", "pdc_reset" for the modem
66 sub-system on SDM845 SoCs
63 67
64- cx-supply:68- cx-supply:
65- mss-supply:69- mss-supply:
Documentation/devicetree/bindings/reset/fsl,imx7-src.txt+1−1
@@ -5,7 +5,7 @@ Please also refer to reset.txt in this directory for common reset · 4 unmodified lines
5controller binding usage.5controller binding usage.
6 6
7Required properties:7Required properties:
8- compatible: Should be "fsl,imx7-src", "syscon"8- compatible: Should be "fsl,imx7d-src", "syscon"
9- reg: should be register base and length as documented in the9- reg: should be register base and length as documented in the
10 datasheet10 datasheet
11- interrupts: Should contain SRC interrupt11- interrupts: Should contain SRC interrupt
Documentation/devicetree/bindings/reset/qcom,pdc-global.txt+52−0
@@ -0,0 +1,52 @@
1PDC Global
2======================================
3
4This binding describes a reset-controller found on PDC-Global (Power Domain
5Controller) block for Qualcomm Technologies Inc SDM845 SoCs.
6
7Required properties:
8- compatible:
9 Usage: required
10 Value type: <string>
11 Definition: must be:
12 "qcom,sdm845-pdc-global"
13
14- reg:
15 Usage: required
16 Value type: <prop-encoded-array>
17 Definition: must specify the base address and size of the register
18 space.
19
20- #reset-cells:
21 Usage: required
22 Value type: <uint>
23 Definition: must be 1; cell entry represents the reset index.
24
25Example:
26
27pdc_reset: reset-controller@b2e0000 {
28 compatible = "qcom,sdm845-pdc-global";
29 reg = <0xb2e0000 0x20000>;
30 #reset-cells = <1>;
31};
32
33PDC reset clients
34======================================
35
36Device nodes that need access to reset lines should
37specify them as a reset phandle in their corresponding node as
38specified in reset.txt.
39
40For a list of all valid reset indices see
41<dt-bindings/reset/qcom,sdm845-pdc.h>
42
43Example:
44
45modem-pil@4080000 {
46 ...
47
48 resets = <&pdc_reset PDC_MODEM_SYNC_RESET>;
49 reset-names = "pdc_reset";
50
51 ...
52};
Documentation/devicetree/bindings/reset/renesas,rst.txt+3−0
@@ -16,8 +16,11 @@ Required properties: · 15 unmodified lines
16 - "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G16 - "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G
17 Examples with soctypes are:17 Examples with soctypes are:
18 - "renesas,r8a7743-rst" (RZ/G1M)18 - "renesas,r8a7743-rst" (RZ/G1M)
19 - "renesas,r8a7744-rst" (RZ/G1N)
19 - "renesas,r8a7745-rst" (RZ/G1E)20 - "renesas,r8a7745-rst" (RZ/G1E)
20 - "renesas,r8a77470-rst" (RZ/G1C)21 - "renesas,r8a77470-rst" (RZ/G1C)
22 - "renesas,r8a774a1-rst" (RZ/G2M)
23 - "renesas,r8a774c0-rst" (RZ/G2E)
21 - "renesas,r8a7778-reset-wdt" (R-Car M1A)24 - "renesas,r8a7778-reset-wdt" (R-Car M1A)
22 - "renesas,r8a7779-reset-wdt" (R-Car H1)25 - "renesas,r8a7779-reset-wdt" (R-Car H1)
23 - "renesas,r8a7790-rst" (R-Car H2)26 - "renesas,r8a7790-rst" (R-Car H2)
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt+6−0
@@ -14,6 +14,10 @@ Required properties: · 13 unmodified lines
14 - "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.14 - "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.
15 - "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART.15 - "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART.
16 - "renesas,hscif-r8a7743" for R8A7743 (RZ/G1M) HSCIF compatible UART.16 - "renesas,hscif-r8a7743" for R8A7743 (RZ/G1M) HSCIF compatible UART.
17 - "renesas,scif-r8a7744" for R8A7744 (RZ/G1N) SCIF compatible UART.
18 - "renesas,scifa-r8a7744" for R8A7744 (RZ/G1N) SCIFA compatible UART.
19 - "renesas,scifb-r8a7744" for R8A7744 (RZ/G1N) SCIFB compatible UART.
20 - "renesas,hscif-r8a7744" for R8A7744 (RZ/G1N) HSCIF compatible UART.
17 - "renesas,scif-r8a7745" for R8A7745 (RZ/G1E) SCIF compatible UART.21 - "renesas,scif-r8a7745" for R8A7745 (RZ/G1E) SCIF compatible UART.
18 - "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART.22 - "renesas,scifa-r8a7745" for R8A7745 (RZ/G1E) SCIFA compatible UART.
19 - "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART.23 - "renesas,scifb-r8a7745" for R8A7745 (RZ/G1E) SCIFB compatible UART.
@@ -50,6 +54,8 @@ Required properties: · 30 unmodified lines
50 - "renesas,hscif-r8a77970" for R8A77970 (R-Car V3M) HSCIF compatible UART.54 - "renesas,hscif-r8a77970" for R8A77970 (R-Car V3M) HSCIF compatible UART.
51 - "renesas,scif-r8a77980" for R8A77980 (R-Car V3H) SCIF compatible UART.55 - "renesas,scif-r8a77980" for R8A77980 (R-Car V3H) SCIF compatible UART.
52 - "renesas,hscif-r8a77980" for R8A77980 (R-Car V3H) HSCIF compatible UART.56 - "renesas,hscif-r8a77980" for R8A77980 (R-Car V3H) HSCIF compatible UART.
57 - "renesas,scif-r8a77990" for R8A77990 (R-Car E3) SCIF compatible UART.
58 - "renesas,hscif-r8a77990" for R8A77990 (R-Car E3) HSCIF compatible UART.
53 - "renesas,scif-r8a77995" for R8A77995 (R-Car D3) SCIF compatible UART.59 - "renesas,scif-r8a77995" for R8A77995 (R-Car D3) SCIF compatible UART.
54 - "renesas,hscif-r8a77995" for R8A77995 (R-Car D3) HSCIF compatible UART.60 - "renesas,hscif-r8a77995" for R8A77995 (R-Car D3) HSCIF compatible UART.
55 - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.61 - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.
Documentation/devicetree/bindings/serial/uniphier-uart.txt+1−2
@@ -7,7 +7,7 @@ Required properties: · 6 unmodified lines
7- clocks: phandle to the input clock.7- clocks: phandle to the input clock.
8 8
9Optional properties:9Optional properties:
10- fifo-size: the RX/TX FIFO size. Defaults to 64 if not specified.10-auto-flow-control: enable automatic flow control support.
11 11
12Example:12Example:
13 aliases {13 aliases {
@@ -19,5 +19,4 @@ Example: · 5 unmodified lines
19 reg = <0x54006800 0x40>;19 reg = <0x54006800 0x40>;
20 interrupts = <0 33 4>;20 interrupts = <0 33 4>;
21 clocks = <&uart_clk>;21 clocks = <&uart_clk>;
22 fifo-size = <64>;
23 };22 };
Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.txt+29−0
@@ -0,0 +1,29 @@
1Amlogic Canvas
2================================
3
4A canvas is a collection of metadata that describes a pixel buffer.
5Those metadata include: width, height, phyaddr, wrapping, block mode
6and endianness.
7
8Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
9rather than use the phy addresses directly. For instance, this is the case for
10the video decoders and the display.
11
12Amlogic SoCs have 256 canvas.
13
14Device Tree Bindings:
15---------------------
16
17Video Lookup Table
18--------------------------
19
20Required properties:
21- compatible: "amlogic,canvas"
22- reg: Base physical address and size of the canvas registers.
23
24Example:
25
26canvas: video-lut@48 {
27 compatible = "amlogic,canvas";
28 reg = <0x0 0x48 0x0 0x14>;
29};
Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt+6−0
@@ -98,6 +98,12 @@ The property below is dependent on fsl,tdm-interface: · 97 unmodified lines
98 usage: optional for tdm interface98 usage: optional for tdm interface
99 value type: <empty>99 value type: <empty>
100 Definition : Internal loopback connecting on TDM layer.100 Definition : Internal loopback connecting on TDM layer.
101- fsl,hmask
102 usage: optional
103 Value type: <u16>
104 Definition: HDLC address recognition. Set to zero to disable
105 address filtering of packets:
106 fsl,hmask = /bits/ 16 <0x0000>;
101 107
102Example for tdm interface:108Example for tdm interface:
103 109
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt+2−0
@@ -19,10 +19,12 @@ IP Pairing · 18 unmodified lines
19Required properties in pwrap device node.19Required properties in pwrap device node.
20- compatible:20- compatible:
21 "mediatek,mt2701-pwrap" for MT2701/7623 SoCs21 "mediatek,mt2701-pwrap" for MT2701/7623 SoCs
22 "mediatek,mt6765-pwrap" for MT6765 SoCs
22 "mediatek,mt6797-pwrap" for MT6797 SoCs23 "mediatek,mt6797-pwrap" for MT6797 SoCs
23 "mediatek,mt7622-pwrap" for MT7622 SoCs24 "mediatek,mt7622-pwrap" for MT7622 SoCs
24 "mediatek,mt8135-pwrap" for MT8135 SoCs25 "mediatek,mt8135-pwrap" for MT8135 SoCs
25 "mediatek,mt8173-pwrap" for MT8173 SoCs26 "mediatek,mt8173-pwrap" for MT8173 SoCs
27 "mediatek,mt8183-pwrap" for MT8183 SoCs
26- interrupts: IRQ for pwrap in SOC28- interrupts: IRQ for pwrap in SOC
27- reg-names: Must include the following entries:29- reg-names: Must include the following entries:
28 "pwrap": Main registers base30 "pwrap": Main registers base
Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt+2−27
@@ -53,20 +53,8 @@ Required properties: · 52 unmodified lines
53- clocks: Serial engine core clock needed by the device.53- clocks: Serial engine core clock needed by the device.
54 54
55Qualcomm Technologies Inc. GENI Serial Engine based SPI Controller55Qualcomm Technologies Inc. GENI Serial Engine based SPI Controller
56 56node binding is described in
57Required properties:57Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt.
58- compatible: Must contain "qcom,geni-spi".
59- reg: Must contain SPI register location and length.
60- interrupts: Must contain SPI controller interrupts.
61- clock-names: Must contain "se".
62- clocks: Serial engine core clock needed by the device.
63- spi-max-frequency: Specifies maximum SPI clock frequency, units - Hz.
64- #address-cells: Must be <1> to define a chip select address on
65 the SPI bus.
66- #size-cells: Must be <0>.
67
68SPI slave nodes must be children of the SPI master node and conform to SPI bus
69binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt.
70 58
71Example:59Example:
72 geniqup@8c0000 {60 geniqup@8c0000 {
@@ -103,17 +91,4 @@ Example: · 30 unmodified lines
103 pinctrl-1 = <&qup_1_uart_3_sleep>;91 pinctrl-1 = <&qup_1_uart_3_sleep>;
104 };92 };
105 93
106 spi0: spi@a84000 {
107 compatible = "qcom,geni-spi";
108 reg = <0xa84000 0x4000>;
109 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
110 clock-names = "se";
111 clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>;
112 pinctrl-names = "default", "sleep";
113 pinctrl-0 = <&qup_1_spi_2_active>;
114 pinctrl-1 = <&qup_1_spi_2_sleep>;
115 spi-max-frequency = <19200000>;
116 #address-cells = <1>;
117 #size-cells = <0>;
118 };
119 }94 }
Documentation/devicetree/bindings/soc/rockchip/grf.txt+2−0
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF, · 12 unmodified lines
13Required Properties:13Required Properties:
14 14
15- compatible: GRF should be one of the following:15- compatible: GRF should be one of the following:
16 - "rockchip,px30-grf", "syscon": for px30
16 - "rockchip,rk3036-grf", "syscon": for rk303617 - "rockchip,rk3036-grf", "syscon": for rk3036
17 - "rockchip,rk3066-grf", "syscon": for rk306618 - "rockchip,rk3066-grf", "syscon": for rk3066
18 - "rockchip,rk3188-grf", "syscon": for rk318819 - "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties: · 4 unmodified lines
23 - "rockchip,rk3399-grf", "syscon": for rk339924 - "rockchip,rk3399-grf", "syscon": for rk3399
24 - "rockchip,rv1108-grf", "syscon": for rv110825 - "rockchip,rv1108-grf", "syscon": for rv1108
25- compatible: PMUGRF should be one of the following:26- compatible: PMUGRF should be one of the following:
27 - "rockchip,px30-pmugrf", "syscon": for px30
26 - "rockchip,rk3368-pmugrf", "syscon": for rk336828 - "rockchip,rk3368-pmugrf", "syscon": for rk3368
27 - "rockchip,rk3399-pmugrf", "syscon": for rk339929 - "rockchip,rk3399-pmugrf", "syscon": for rk3399
28- compatible: SGRF should be one of the following30- compatible: SGRF should be one of the following
Documentation/devicetree/bindings/sound/adi,adau1977.txt+54−0
@@ -0,0 +1,54 @@
1Analog Devices ADAU1977/ADAU1978/ADAU1979
2
3Datasheets:
4http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1977.pdf
5http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1978.pdf
6http://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1979.pdf
7
8This driver supports both the I2C and SPI bus.
9
10Required properties:
11 - compatible: Should contain one of the following:
12 "adi,adau1977"
13 "adi,adau1978"
14 "adi,adau1979"
15
16 - AVDD-supply: analog power supply for the device, please consult
17 Documentation/devicetree/bindings/regulator/regulator.txt
18
19Optional properties:
20 - reset-gpio: the reset pin for the chip, for more details consult
21 Documentation/devicetree/bindings/gpio/gpio.txt
22
23 - DVDD-supply: supply voltage for the digital core, please consult
24 Documentation/devicetree/bindings/regulator/regulator.txt
25
26For required properties on SPI, please consult
27Documentation/devicetree/bindings/spi/spi-bus.txt
28
29Required properties on I2C:
30
31 - reg: The i2c address. Value depends on the state of ADDR0
32 and ADDR1, as wired in hardware.
33
34Examples:
35
36 adau1977_spi: adau1977@0 {
37 compatible = "adi,adau1977";
38 spi-max-frequency = <600000>;
39
40 AVDD-supply = <&regulator>;
41 DVDD-supply = <&regulator_digital>;
42
43 reset_gpio = <&gpio 10 GPIO_ACTIVE_LOW>;
44 };
45
46 adau1977_i2c: adau1977@11 {
47 compatible = "adi,adau1977";
48 reg = <0x11>;
49
50 AVDD-supply = <&regulator>;
51 DVDD-supply = <&regulator_digital>;
52
53 reset_gpio = <&gpio 10 GPIO_ACTIVE_LOW>;
54 };
Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt+24−0
@@ -0,0 +1,24 @@
1* Amlogic Audio PDM input
2
3Required properties:
4- compatible: 'amlogic,axg-pdm'
5- reg: physical base address of the controller and length of memory
6 mapped region.
7- clocks: list of clock phandle, one for each entry clock-names.
8- clock-names: should contain the following:
9 * "pclk" : peripheral clock.
10 * "dclk" : pdm digital clock
11 * "sysclk" : dsp system clock
12- #sound-dai-cells: must be 0.
13
14Example of PDM on the A113 SoC:
15
16pdm: audio-controller@ff632000 {
17 compatible = "amlogic,axg-pdm";
18 reg = <0x0 0xff632000 0x0 0x34>;
19 #sound-dai-cells = <0>;
20 clocks = <&clkc_audio AUD_CLKID_PDM>,
21 <&clkc_audio AUD_CLKID_PDM_DCLK>,
22 <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
23 clock-names = "pclk", "dclk", "sysclk";
24};
Documentation/devicetree/bindings/sound/cs42l51.txt+17−0
@@ -0,0 +1,17 @@
1CS42L51 audio CODEC
2
3Optional properties:
4
5 - clocks : a list of phandles + clock-specifiers, one for each entry in
6 clock-names
7
8 - clock-names : must contain "MCLK"
9
10Example:
11
12cs42l51: cs42l51@4a {
13 compatible = "cirrus,cs42l51";
14 reg = <0x4a>;
15 clocks = <&mclk_prov>;
16 clock-names = "MCLK";
17};
Documentation/devicetree/bindings/sound/maxim,max98088.txt+23−0
@@ -0,0 +1,23 @@
1MAX98088 audio CODEC
2
3This device supports I2C only.
4
5Required properties:
6
7- compatible: "maxim,max98088" or "maxim,max98089".
8- reg: The I2C address of the device.
9
10Optional properties:
11
12- clocks: the clock provider of MCLK, see ../clock/clock-bindings.txt section
13 "consumer" for more information.
14- clock-names: must be set to "mclk"
15
16Example:
17
18max98089: codec@10 {
19 compatible = "maxim,max98089";
20 reg = <0x10>;
21 clocks = <&clks IMX6QDL_CLK_CKO2>;
22 clock-names = "mclk";
23};
Documentation/devicetree/bindings/sound/mikroe,mikroe-proto.txt+23−0
@@ -0,0 +1,23 @@
1Mikroe-PROTO audio board
2
3Required properties:
4 - compatible: "mikroe,mikroe-proto"
5 - dai-format: Must be "i2s".
6 - i2s-controller: The phandle of the I2S controller.
7 - audio-codec: The phandle of the WM8731 audio codec.
8Optional properties:
9 - model: The user-visible name of this sound complex.
10 - bitclock-master: Indicates dai-link bit clock master; for details see simple-card.txt (1).
11 - frame-master: Indicates dai-link frame master; for details see simple-card.txt (1).
12
13(1) : There must be the same master for both bit and frame clocks.
14
15Example:
16 sound {
17 compatible = "mikroe,mikroe-proto";
18 model = "wm8731 @ sama5d2_xplained";
19 i2s-controller = <&i2s0>;
20 audio-codec = <&wm8731>;
21 dai-format = "i2s";
22 };
23};
Documentation/devicetree/bindings/sound/nau8822.txt+16−0
@@ -0,0 +1,16 @@
1NAU8822 audio CODEC
2
3This device supports I2C only.
4
5Required properties:
6
7 - compatible : "nuvoton,nau8822"
8
9 - reg : the I2C address of the device.
10
11Example:
12
13codec: nau8822@1a {
14 compatible = "nuvoton,nau8822";
15 reg = <0x1a>;
16};
Documentation/devicetree/bindings/sound/pcm3060.txt+17−0
@@ -0,0 +1,17 @@
1PCM3060 audio CODEC
2
3This driver supports both I2C and SPI.
4
5Required properties:
6
7- compatible: "ti,pcm3060"
8
9- reg : the I2C address of the device for I2C, the chip select
10 number for SPI.
11
12Examples:
13
14 pcm3060: pcm3060@46 {
15 compatible = "ti,pcm3060";
16 reg = <0x46>;
17 };
Documentation/devicetree/bindings/sound/qcom,q6afe.txt+9−9
@@ -49,7 +49,7 @@ configuration of each dai. Must contain the following properties. · 48 unmodified lines
49 Usage: required for mi2s interface49 Usage: required for mi2s interface
50 Value type: <prop-encoded-array>50 Value type: <prop-encoded-array>
51 Definition: Must be list of serial data lines used by this dai.51 Definition: Must be list of serial data lines used by this dai.
52 should be one or more of the 1-4 sd lines.52 should be one or more of the 0-3 sd lines.
53 53
54 - qcom,tdm-sync-mode:54 - qcom,tdm-sync-mode:
55 Usage: required for tdm interface55 Usage: required for tdm interface
@@ -137,42 +137,42 @@ q6afe@4 { · 81 unmodified lines
137 137
138 prim-mi2s-rx@16 {138 prim-mi2s-rx@16 {
139 reg = <16>;139 reg = <16>;
140 qcom,sd-lines = <1 3>;140 qcom,sd-lines = <0 2>;
141 };141 };
142 142
143 prim-mi2s-tx@17 {143 prim-mi2s-tx@17 {
144 reg = <17>;144 reg = <17>;
145 qcom,sd-lines = <2>;145 qcom,sd-lines = <1>;
146 };146 };
147 147
148 sec-mi2s-rx@18 {148 sec-mi2s-rx@18 {
149 reg = <18>;149 reg = <18>;
150 qcom,sd-lines = <1 4>;150 qcom,sd-lines = <0 3>;
151 };151 };
152 152
153 sec-mi2s-tx@19 {153 sec-mi2s-tx@19 {
154 reg = <19>;154 reg = <19>;
155 qcom,sd-lines = <2>;155 qcom,sd-lines = <1>;
156 };156 };
157 157
158 tert-mi2s-rx@20 {158 tert-mi2s-rx@20 {
159 reg = <20>;159 reg = <20>;
160 qcom,sd-lines = <2 4>;160 qcom,sd-lines = <1 3>;
161 };161 };
162 162
163 tert-mi2s-tx@21 {163 tert-mi2s-tx@21 {
164 reg = <21>;164 reg = <21>;
165 qcom,sd-lines = <1>;165 qcom,sd-lines = <0>;
166 };166 };
167 167
168 quat-mi2s-rx@22 {168 quat-mi2s-rx@22 {
169 reg = <22>;169 reg = <22>;
170 qcom,sd-lines = <1>;170 qcom,sd-lines = <0>;
171 };171 };
172 172
173 quat-mi2s-tx@23 {173 quat-mi2s-tx@23 {
174 reg = <23>;174 reg = <23>;
175 qcom,sd-lines = <2>;175 qcom,sd-lines = <1>;
176 };176 };
177 };177 };
178};178};
Documentation/devicetree/bindings/sound/renesas,rsnd.txt+4−1
@@ -340,10 +340,12 @@ Required properties: · 339 unmodified lines
340- compatible : "renesas,rcar_sound-<soctype>", fallbacks340- compatible : "renesas,rcar_sound-<soctype>", fallbacks
341 "renesas,rcar_sound-gen1" if generation1, and341 "renesas,rcar_sound-gen1" if generation1, and
342 "renesas,rcar_sound-gen2" if generation2 (or RZ/G1)342 "renesas,rcar_sound-gen2" if generation2 (or RZ/G1)
343 "renesas,rcar_sound-gen3" if generation3343 "renesas,rcar_sound-gen3" if generation3 (or RZ/G2)
344 Examples with soctypes are:344 Examples with soctypes are:
345 - "renesas,rcar_sound-r8a7743" (RZ/G1M)345 - "renesas,rcar_sound-r8a7743" (RZ/G1M)
346 - "renesas,rcar_sound-r8a7744" (RZ/G1N)
346 - "renesas,rcar_sound-r8a7745" (RZ/G1E)347 - "renesas,rcar_sound-r8a7745" (RZ/G1E)
348 - "renesas,rcar_sound-r8a774a1" (RZ/G2M)
347 - "renesas,rcar_sound-r8a7778" (R-Car M1A)349 - "renesas,rcar_sound-r8a7778" (R-Car M1A)
348 - "renesas,rcar_sound-r8a7779" (R-Car H1)350 - "renesas,rcar_sound-r8a7779" (R-Car H1)
349 - "renesas,rcar_sound-r8a7790" (R-Car H2)351 - "renesas,rcar_sound-r8a7790" (R-Car H2)
@@ -353,6 +355,7 @@ Required properties: · 3 unmodified lines
353 - "renesas,rcar_sound-r8a7795" (R-Car H3)355 - "renesas,rcar_sound-r8a7795" (R-Car H3)
354 - "renesas,rcar_sound-r8a7796" (R-Car M3-W)356 - "renesas,rcar_sound-r8a7796" (R-Car M3-W)
355 - "renesas,rcar_sound-r8a77965" (R-Car M3-N)357 - "renesas,rcar_sound-r8a77965" (R-Car M3-N)
358 - "renesas,rcar_sound-r8a77990" (R-Car E3)
356- reg : Should contain the register physical address.359- reg : Should contain the register physical address.
357 required register is360 required register is
358 SRU/ADG/SSI if generation1361 SRU/ADG/SSI if generation1
Documentation/devicetree/bindings/sound/st,sta32x.txt+9−0
@@ -19,6 +19,10 @@ Required properties: · 18 unmodified lines
19 19
20Optional properties:20Optional properties:
21 21
22 - clocks, clock-names: Clock specifier for XTI input clock.
23 If specified, the clock will be enabled when the codec is probed,
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
25
22 - st,output-conf: number, Selects the output configuration:26 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out27 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power28 1: 2 (half-bridge). 1 (full-bridge) on-board power
@@ -39,6 +43,9 @@ Optional properties: · 14 unmodified lines
39 - st,thermal-warning-recover:43 - st,thermal-warning-recover:
40 If present, thermal warning recovery is enabled.44 If present, thermal warning recovery is enabled.
41 45
46 - st,fault-detect-recovery:
47 If present, fault detect recovery is enabled.
48
42 - st,thermal-warning-adjustment:49 - st,thermal-warning-adjustment:
43 If present, thermal warning adjustment is enabled.50 If present, thermal warning adjustment is enabled.
44 51
@@ -76,6 +83,8 @@ Example: · 31 unmodified lines
76codec: sta32x@38 {83codec: sta32x@38 {
77 compatible = "st,sta32x";84 compatible = "st,sta32x";
78 reg = <0x1c>;85 reg = <0x1c>;
86 clocks = <&clock>;
87 clock-names = "xti";
79 reset-gpios = <&gpio1 19 0>;88 reset-gpios = <&gpio1 19 0>;
80 power-down-gpios = <&gpio1 16 0>;89 power-down-gpios = <&gpio1 16 0>;
81 st,output-conf = /bits/ 8 <0x3>; // set output to 2-channel90 st,output-conf = /bits/ 8 <0x3>; // set output to 2-channel
Documentation/devicetree/bindings/sound/st,stm32-sai.txt+7−0
@@ -31,7 +31,11 @@ SAI subnodes required properties: · 30 unmodified lines
31 - reg: Base address and size of SAI sub-block register set.31 - reg: Base address and size of SAI sub-block register set.
32 - clocks: Must contain one phandle and clock specifier pair32 - clocks: Must contain one phandle and clock specifier pair
33 for sai_ck which feeds the internal clock generator.33 for sai_ck which feeds the internal clock generator.
34 If the SAI shares a master clock, with another SAI set as MCLK
35 clock provider, SAI provider phandle must be specified here.
34 - clock-names: Must contain "sai_ck".36 - clock-names: Must contain "sai_ck".
37 Must also contain "MCLK", if SAI shares a master clock,
38 with a SAI set as MCLK clock provider.
35 - dmas: see Documentation/devicetree/bindings/dma/stm32-dma.txt39 - dmas: see Documentation/devicetree/bindings/dma/stm32-dma.txt
36 - dma-names: identifier string for each DMA request line40 - dma-names: identifier string for each DMA request line
37 "tx": if sai sub-block is configured as playback DAI41 "tx": if sai sub-block is configured as playback DAI
@@ -51,6 +55,9 @@ SAI subnodes Optional properties: · 13 unmodified lines
51 configured according to protocol defined in related DAI link node,55 configured according to protocol defined in related DAI link node,
52 such as i2s, left justified, right justified, dsp and pdm protocols.56 such as i2s, left justified, right justified, dsp and pdm protocols.
53 Note: ac97 protocol is not supported by SAI driver57 Note: ac97 protocol is not supported by SAI driver
58 - #clock-cells: should be 0. This property must be present if the SAI device
59 is a master clock provider, according to clocks bindings, described in
60 Documentation/devicetree/bindings/clock/clock-bindings.txt.
54 61
55The device node should contain one 'port' child node with one child 'endpoint'62The device node should contain one 'port' child node with one child 'endpoint'
56node, according to the bindings defined in Documentation/devicetree/bindings/63node, according to the bindings defined in Documentation/devicetree/bindings/
Documentation/devicetree/bindings/sound/sun4i-i2s.txt+2−0
@@ -10,6 +10,7 @@ Required properties: · 9 unmodified lines
10 - "allwinner,sun6i-a31-i2s"10 - "allwinner,sun6i-a31-i2s"
11 - "allwinner,sun8i-a83t-i2s"11 - "allwinner,sun8i-a83t-i2s"
12 - "allwinner,sun8i-h3-i2s"12 - "allwinner,sun8i-h3-i2s"
13 - "allwinner,sun50i-a64-codec-i2s"
13- reg: physical base address of the controller and length of memory mapped14- reg: physical base address of the controller and length of memory mapped
14 region.15 region.
15- interrupts: should contain the I2S interrupt.16- interrupts: should contain the I2S interrupt.
@@ -26,6 +27,7 @@ Required properties for the following compatibles: · 10 unmodified lines
26 - "allwinner,sun6i-a31-i2s"27 - "allwinner,sun6i-a31-i2s"
27 - "allwinner,sun8i-a83t-i2s"28 - "allwinner,sun8i-a83t-i2s"
28 - "allwinner,sun8i-h3-i2s"29 - "allwinner,sun8i-h3-i2s"
30 - "allwinner,sun50i-a64-codec-i2s"
29- resets: phandle to the reset line for this codec31- resets: phandle to the reset line for this codec
30 32
31Example:33Example:
Documentation/devicetree/bindings/sound/sun50i-codec-analog.txt+12−0
@@ -0,0 +1,12 @@
1* Allwinner A64 Codec Analog Controls
2
3Required properties:
4- compatible: must be one of the following compatibles:
5 - "allwinner,sun50i-a64-codec-analog"
6- reg: must contain the registers location and length
7
8Example:
9 codec_analog: codec-analog@1f015c0 {
10 compatible = "allwinner,sun50i-a64-codec-analog";
11 reg = <0x01f015c0 0x4>;
12 };
Documentation/devicetree/bindings/sound/ts3a227e.txt+1−1
@@ -14,7 +14,7 @@ Required properties: · 13 unmodified lines
14 14
15Optional properies:15Optional properies:
16 - ti,micbias: Intended MICBIAS voltage (datasheet section 9.6.7).16 - ti,micbias: Intended MICBIAS voltage (datasheet section 9.6.7).
17 Select 0/1/2/3/4/5/6/7 to specify MACBIAS voltage17 Select 0/1/2/3/4/5/6/7 to specify MICBIAS voltage
18 2.1V/2.2V/2.3V/2.4V/2.5V/2.6V/2.7V/2.8V18 2.1V/2.2V/2.3V/2.4V/2.5V/2.6V/2.7V/2.8V
19 Default value is "1" (2.2V).19 Default value is "1" (2.2V).
20 20
Documentation/devicetree/bindings/sound/wm8782.txt+17−0
@@ -0,0 +1,17 @@
1WM8782 stereo ADC
2
3This device does not have any control interface or reset pins.
4
5Required properties:
6
7 - compatible : "wlf,wm8782"
8 - Vdda-supply : phandle to a regulator for the analog power supply (2.7V - 5.5V)
9 - Vdd-supply : phandle to a regulator for the digital power supply (2.7V - 3.6V)
10
11Example:
12
13wm8782: stereo-adc {
14 compatible = "wlf,wm8782";
15 Vdda-supply = <&vdda_supply>;
16 Vdd-supply = <&vdd_supply>;
17};
Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt+39−0
@@ -0,0 +1,39 @@
1GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
2
3The QUP v3 core is a GENI based AHB slave that provides a common data path
4(an output FIFO and an input FIFO) for serial peripheral interface (SPI)
5mini-core.
6
7SPI in master mode supports up to 50MHz, up to four chip selects, programmable
8data path from 4 bits to 32 bits and numerous protocol variants.
9
10Required properties:
11- compatible: Must contain "qcom,geni-spi".
12- reg: Must contain SPI register location and length.
13- interrupts: Must contain SPI controller interrupts.
14- clock-names: Must contain "se".
15- clocks: Serial engine core clock needed by the device.
16- #address-cells: Must be <1> to define a chip select address on
17 the SPI bus.
18- #size-cells: Must be <0>.
19
20SPI Controller nodes must be child of GENI based Qualcomm Universal
21Peripharal. Please refer GENI based QUP wrapper controller node bindings
22described in Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt.
23
24SPI slave nodes must be children of the SPI master node and conform to SPI bus
25binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt.
26
27Example:
28 spi0: spi@a84000 {
29 compatible = "qcom,geni-spi";
30 reg = <0xa84000 0x4000>;
31 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
32 clock-names = "se";
33 clocks = <&clock_gcc GCC_QUPV3_WRAP0_S0_CLK>;
34 pinctrl-names = "default", "sleep";
35 pinctrl-0 = <&qup_1_spi_2_active>;
36 pinctrl-1 = <&qup_1_spi_2_sleep>;
37 #address-cells = <1>;
38 #size-cells = <0>;
39 };
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.txt+36−0
@@ -0,0 +1,36 @@
1Qualcomm Quad Serial Peripheral Interface (QSPI)
2
3The QSPI controller allows SPI protocol communication in single, dual, or quad
4wire transmission modes for read/write access to slaves such as NOR flash.
5
6Required properties:
7- compatible: An SoC specific identifier followed by "qcom,qspi-v1", such as
8 "qcom,sdm845-qspi", "qcom,qspi-v1"
9- reg: Should contain the base register location and length.
10- interrupts: Interrupt number used by the controller.
11- clocks: Should contain the core and AHB clock.
12- clock-names: Should be "core" for core clock and "iface" for AHB clock.
13
14SPI slave nodes must be children of the SPI master node and can contain
15properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
16
17Example:
18
19 qspi: spi@88df000 {
20 compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
21 reg = <0x88df000 0x600>;
22 #address-cells = <1>;
23 #size-cells = <0>;
24 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
25 clock-names = "iface", "core";
26 clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
27 <&gcc GCC_QSPI_CORE_CLK>;
28
29 flash@0 {
30 compatible = "jedec,spi-nor";
31 reg = <0>;
32 spi-max-frequency = <25000000>;
33 spi-tx-bus-width = <2>;
34 spi-rx-bus-width = <2>;
35 };
36 };
Documentation/devicetree/bindings/spi/sh-msiof.txt+7−1
@@ -2,7 +2,9 @@ Renesas MSIOF spi controller · 1 unmodified line
2 2
3Required properties:3Required properties:
4- compatible : "renesas,msiof-r8a7743" (RZ/G1M)4- compatible : "renesas,msiof-r8a7743" (RZ/G1M)
5 "renesas,msiof-r8a7744" (RZ/G1N)
5 "renesas,msiof-r8a7745" (RZ/G1E)6 "renesas,msiof-r8a7745" (RZ/G1E)
7 "renesas,msiof-r8a774a1" (RZ/G2M)
6 "renesas,msiof-r8a7790" (R-Car H2)8 "renesas,msiof-r8a7790" (R-Car H2)
7 "renesas,msiof-r8a7791" (R-Car M2-W)9 "renesas,msiof-r8a7791" (R-Car M2-W)
8 "renesas,msiof-r8a7792" (R-Car V2H)10 "renesas,msiof-r8a7792" (R-Car V2H)
@@ -11,10 +13,14 @@ Required properties: · 2 unmodified lines
11 "renesas,msiof-r8a7795" (R-Car H3)13 "renesas,msiof-r8a7795" (R-Car H3)
12 "renesas,msiof-r8a7796" (R-Car M3-W)14 "renesas,msiof-r8a7796" (R-Car M3-W)
13 "renesas,msiof-r8a77965" (R-Car M3-N)15 "renesas,msiof-r8a77965" (R-Car M3-N)
16 "renesas,msiof-r8a77970" (R-Car V3M)
17 "renesas,msiof-r8a77980" (R-Car V3H)
18 "renesas,msiof-r8a77990" (R-Car E3)
19 "renesas,msiof-r8a77995" (R-Car D3)
14 "renesas,msiof-sh73a0" (SH-Mobile AG5)20 "renesas,msiof-sh73a0" (SH-Mobile AG5)
15 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)21 "renesas,sh-mobile-msiof" (generic SH-Mobile compatibile device)
16 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device)22 "renesas,rcar-gen2-msiof" (generic R-Car Gen2 and RZ/G1 compatible device)
17 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 compatible device)23 "renesas,rcar-gen3-msiof" (generic R-Car Gen3 and RZ/G2 compatible device)
18 "renesas,sh-msiof" (deprecated)24 "renesas,sh-msiof" (deprecated)
19 25
20 When compatible with the generic version, nodes26 When compatible with the generic version, nodes
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt+1−1
@@ -2,7 +2,7 @@ Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface. · 1 unmodified line
2 2
3Required properties:3Required properties:
4- compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or4- compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or
5 "jaguar2"5 "jaguar2", or "amazon,alpine-dw-apb-ssi"
6- reg : The register base for the controller. For "mscc,<soc>-spi", a second6- reg : The register base for the controller. For "mscc,<soc>-spi", a second
7 register set is required (named ICPU_CFG:SPI_MST)7 register set is required (named ICPU_CFG:SPI_MST)
8- interrupts : One interrupt, used by the controller.8- interrupts : One interrupt, used by the controller.
Documentation/devicetree/bindings/spi/spi-fsl-lpspi.txt+1−0
@@ -3,6 +3,7 @@ · 2 unmodified lines
3Required properties:3Required properties:
4- compatible :4- compatible :
5 - "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc5 - "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc
6 - "fsl,imx8qxp-spi" for LPSPI compatible with the one integrated on i.MX8QXP soc
6- reg : address and length of the lpspi master registers7- reg : address and length of the lpspi master registers
7- interrupts : lpspi interrupt8- interrupts : lpspi interrupt
8- clocks : lpspi clock specifier9- clocks : lpspi clock specifier
Documentation/devicetree/bindings/spi/spi-pxa2xx.txt+24−0
@@ -0,0 +1,24 @@
1PXA2xx SSP SPI Controller
2
3Required properties:
4- compatible: Must be "marvell,mmp2-ssp".
5- reg: Offset and length of the device's register set.
6- interrupts: Should be the interrupt number.
7- clocks: Should contain a single entry describing the clock input.
8- #address-cells: Number of cells required to define a chip select address.
9- #size-cells: Should be zero.
10
11Optional properties:
12- cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
13 Documentation/devicetree/bindings/spi/spi-bus.txt
14
15Child nodes represent devices on the SPI bus
16 See ../spi/spi-bus.txt
17
18Example:
19 ssp1: spi@d4035000 {
20 compatible = "marvell,mmp2-ssp";
21 reg = <0xd4035000 0x1000>;
22 clocks = <&soc_clocks MMP2_CLK_SSP0>;
23 interrupts = <0>;
24 };
Documentation/devicetree/bindings/spi/spi-rspi.txt+3−1
@@ -3,7 +3,7 @@ Device tree configuration for Renesas RSPI/QSPI driver · 2 unmodified lines
3Required properties:3Required properties:
4- compatible : For Renesas Serial Peripheral Interface on legacy SH:4- compatible : For Renesas Serial Peripheral Interface on legacy SH:
5 "renesas,rspi-<soctype>", "renesas,rspi" as fallback.5 "renesas,rspi-<soctype>", "renesas,rspi" as fallback.
6 For Renesas Serial Peripheral Interface on RZ/A1H:6 For Renesas Serial Peripheral Interface on RZ/A:
7 "renesas,rspi-<soctype>", "renesas,rspi-rz" as fallback.7 "renesas,rspi-<soctype>", "renesas,rspi-rz" as fallback.
8 For Quad Serial Peripheral Interface on R-Car Gen2 and8 For Quad Serial Peripheral Interface on R-Car Gen2 and
9 RZ/G1 devices:9 RZ/G1 devices:
@@ -11,7 +11,9 @@ Required properties: · 1 unmodified line
11 Examples with soctypes are:11 Examples with soctypes are:
12 - "renesas,rspi-sh7757" (SH)12 - "renesas,rspi-sh7757" (SH)
13 - "renesas,rspi-r7s72100" (RZ/A1H)13 - "renesas,rspi-r7s72100" (RZ/A1H)
14 - "renesas,rspi-r7s9210" (RZ/A2)
14 - "renesas,qspi-r8a7743" (RZ/G1M)15 - "renesas,qspi-r8a7743" (RZ/G1M)
16 - "renesas,qspi-r8a7744" (RZ/G1N)
15 - "renesas,qspi-r8a7745" (RZ/G1E)17 - "renesas,qspi-r8a7745" (RZ/G1E)
16 - "renesas,qspi-r8a7790" (R-Car H2)18 - "renesas,qspi-r8a7790" (R-Car H2)
17 - "renesas,qspi-r8a7791" (R-Car M2-W)19 - "renesas,qspi-r8a7791" (R-Car M2-W)
Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt+32−0
@@ -0,0 +1,32 @@
1Binding for MTK SPI Slave controller
2
3Required properties:
4- compatible: should be one of the following.
5 - mediatek,mt2712-spi-slave: for mt2712 platforms
6- reg: Address and length of the register set for the device.
7- interrupts: Should contain spi interrupt.
8- clocks: phandles to input clocks.
9 It's clock gate, and should be <&infracfg CLK_INFRA_AO_SPI1>.
10- clock-names: should be "spi" for the clock gate.
11
12Optional properties:
13- assigned-clocks: it's mux clock, should be <&topckgen CLK_TOP_SPISLV_SEL>.
14- assigned-clock-parents: parent of mux clock.
15 It's PLL, and should be one of the following.
16 - <&topckgen CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
17 It's the default one.
18 - <&topckgen CLK_TOP_UNIVPLL1_D4>: specify parent clock 156MHZ.
19 - <&topckgen CLK_TOP_UNIVPLL2_D4>: specify parent clock 104MHZ.
20 - <&topckgen CLK_TOP_UNIVPLL1_D8>: specify parent clock 78MHZ.
21
22Example:
23- SoC Specific Portion:
24spis1: spi@10013000 {
25 compatible = "mediatek,mt2712-spi-slave";
26 reg = <0 0x10013000 0 0x100>;
27 interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_LOW>;
28 clocks = <&infracfg CLK_INFRA_AO_SPI1>;
29 clock-names = "spi";
30 assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>;
31 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>;
32};
Documentation/devicetree/bindings/spi/spi-sprd.txt+26−0
@@ -0,0 +1,26 @@
1Spreadtrum SPI Controller
2
3Required properties:
4- compatible: Should be "sprd,sc9860-spi".
5- reg: Offset and length of SPI controller register space.
6- interrupts: Should contain SPI interrupt.
7- clock-names: Should contain following entries:
8 "spi" for SPI clock,
9 "source" for SPI source (parent) clock,
10 "enable" for SPI module enable clock.
11- clocks: List of clock input name strings sorted in the same order
12 as the clock-names property.
13- #address-cells: The number of cells required to define a chip select
14 address on the SPI bus. Should be set to 1.
15- #size-cells: Should be set to 0.
16
17Example:
18spi0: spi@70a00000{
19 compatible = "sprd,sc9860-spi";
20 reg = <0 0x70a00000 0 0x1000>;
21 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
22 clock-names = "spi", "source","enable";
23 clocks = <&clk_spi0>, <&ext_26m>, <&clk_ap_apb_gates 5>;
24 #address-cells = <1>;
25 #size-cells = <0>;
26};
Documentation/devicetree/bindings/spi/spi-stm32-qspi.txt+44−0
@@ -0,0 +1,44 @@
1* STMicroelectronics Quad Serial Peripheral Interface(QSPI)
2
3Required properties:
4- compatible: should be "st,stm32f469-qspi"
5- reg: the first contains the register location and length.
6 the second contains the memory mapping address and length
7- reg-names: should contain the reg names "qspi" "qspi_mm"
8- interrupts: should contain the interrupt for the device
9- clocks: the phandle of the clock needed by the QSPI controller
10- A pinctrl must be defined to set pins in mode of operation for QSPI transfer
11
12Optional properties:
13- resets: must contain the phandle to the reset controller.
14
15A spi flash (NOR/NAND) must be a child of spi node and could have some
16properties. Also see jedec,spi-nor.txt.
17
18Required properties:
19- reg: chip-Select number (QSPI controller may connect 2 flashes)
20- spi-max-frequency: max frequency of spi bus
21
22Optional property:
23- spi-rx-bus-width: see ./spi-bus.txt for the description
24
25Example:
26
27qspi: spi@a0001000 {
28 compatible = "st,stm32f469-qspi";
29 reg = <0xa0001000 0x1000>, <0x90000000 0x10000000>;
30 reg-names = "qspi", "qspi_mm";
31 interrupts = <91>;
32 resets = <&rcc STM32F4_AHB3_RESET(QSPI)>;
33 clocks = <&rcc 0 STM32F4_AHB3_CLOCK(QSPI)>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_qspi0>;
36
37 flash@0 {
38 compatible = "jedec,spi-nor";
39 reg = <0>;
40 spi-rx-bus-width = <4>;
41 spi-max-frequency = <108000000>;
42 ...
43 };
44};
Documentation/devicetree/bindings/sram/sunxi-sram.txt+4−0
@@ -18,6 +18,7 @@ Required properties: · 17 unmodified lines
18 - "allwinner,sun8i-h3-system-control"18 - "allwinner,sun8i-h3-system-control"
19 - "allwinner,sun50i-a64-sram-controller" (deprecated)19 - "allwinner,sun50i-a64-sram-controller" (deprecated)
20 - "allwinner,sun50i-a64-system-control"20 - "allwinner,sun50i-a64-system-control"
21 - "allwinner,sun50i-h6-system-control", "allwinner,sun50i-a64-system-control"
21- reg : sram controller register offset + length22- reg : sram controller register offset + length
22 23
23SRAM nodes24SRAM nodes
@@ -54,6 +55,9 @@ The valid sections compatible for H3 are: · 30 unmodified lines
54The valid sections compatible for A64 are:55The valid sections compatible for A64 are:
55 - allwinner,sun50i-a64-sram-c56 - allwinner,sun50i-a64-sram-c
56 57
58The valid sections compatible for H6 are:
59 - allwinner,sun50i-h6-sram-c, allwinner,sun50i-a64-sram-c
60
57Devices using SRAM sections61Devices using SRAM sections
58---------------------------62---------------------------
59 63
Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt+5−11
@@ -6,8 +6,7 @@ interrupt signal and status register to identify high PMIC die temperature. · 5 unmodified lines
6 6
7Required properties:7Required properties:
8- compatible: Should contain "qcom,spmi-temp-alarm".8- compatible: Should contain "qcom,spmi-temp-alarm".
9- reg: Specifies the SPMI address and length of the controller's9- reg: Specifies the SPMI address.
10 registers.
11- interrupts: PMIC temperature alarm interrupt.10- interrupts: PMIC temperature alarm interrupt.
12- #thermal-sensor-cells: Should be 0. See thermal.txt for a description.11- #thermal-sensor-cells: Should be 0. See thermal.txt for a description.
13 12
@@ -20,7 +19,7 @@ Example: · 6 unmodified lines
20 19
21 pm8941_temp: thermal-alarm@2400 {20 pm8941_temp: thermal-alarm@2400 {
22 compatible = "qcom,spmi-temp-alarm";21 compatible = "qcom,spmi-temp-alarm";
23 reg = <0x2400 0x100>;22 reg = <0x2400>;
24 interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;23 interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
25 #thermal-sensor-cells = <0>;24 #thermal-sensor-cells = <0>;
26 25
@@ -36,19 +35,14 @@ Example: · 9 unmodified lines
36 thermal-sensors = <&pm8941_temp>;35 thermal-sensors = <&pm8941_temp>;
37 36
38 trips {37 trips {
39 passive {38 stage1 {
40 temperature = <1050000>;39 temperature = <105000>;
41 hysteresis = <2000>;40 hysteresis = <2000>;
42 type = "passive";41 type = "passive";
43 };42 };
44 alert {43 stage2 {
45 temperature = <125000>;44 temperature = <125000>;
46 hysteresis = <2000>;45 hysteresis = <2000>;
47 type = "hot";
48 };
49 crit {
50 temperature = <145000>;
51 hysteresis = <2000>;
52 type = "critical";46 type = "critical";
53 };47 };
54 };48 };
Documentation/devicetree/bindings/thermal/qoriq-thermal.txt+3−3
@@ -1,9 +1,9 @@
1* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs1* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
2 2
3Required properties:3Required properties:
4- compatible : Must include "fsl,qoriq-tmu". The version of the device is4- compatible : Must include "fsl,qoriq-tmu" or "fsl,imx8mq-tmu". The
5 determined by the TMU IP Block Revision Register (IPBRR0) at5 version of the device is determined by the TMU IP Block Revision
6 offset 0x0BF8.6 Register (IPBRR0) at offset 0x0BF8.
7 Table of correspondences between IPBRR0 values and example chips:7 Table of correspondences between IPBRR0 values and example chips:
8 Value Device8 Value Device
9 ---------- -----9 ---------- -----
Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt+4−1
@@ -7,9 +7,11 @@ inside the LSI. · 6 unmodified lines
7Required properties:7Required properties:
8- compatible : "renesas,<soctype>-thermal",8- compatible : "renesas,<soctype>-thermal",
9 Examples with soctypes are:9 Examples with soctypes are:
10 - "renesas,r8a774a1-thermal" (RZ/G2M)
10 - "renesas,r8a7795-thermal" (R-Car H3)11 - "renesas,r8a7795-thermal" (R-Car H3)
11 - "renesas,r8a7796-thermal" (R-Car M3-W)12 - "renesas,r8a7796-thermal" (R-Car M3-W)
12 - "renesas,r8a77965-thermal" (R-Car M3-N)13 - "renesas,r8a77965-thermal" (R-Car M3-N)
14 - "renesas,r8a77980-thermal" (R-Car V3H)
13- reg : Address ranges of the thermal registers. Each sensor15- reg : Address ranges of the thermal registers. Each sensor
14 needs one address range. Sorting must be done in16 needs one address range. Sorting must be done in
15 increasing order according to datasheet, i.e.17 increasing order according to datasheet, i.e.
@@ -19,7 +21,8 @@ Required properties: · 3 unmodified lines
19 21
20Optional properties:22Optional properties:
21 23
22- interrupts : interrupts routed to the TSC (3 for H3, M3-W and M3-N)24- interrupts : interrupts routed to the TSC (3 for H3, M3-W, M3-N,
25 and V3H)
23- power-domain : Must contain a reference to the power domain. This26- power-domain : Must contain a reference to the power domain. This
24 property is mandatory if the thermal sensor instance27 property is mandatory if the thermal sensor instance
25 is part of a controllable power domain.28 is part of a controllable power domain.
Documentation/devicetree/bindings/thermal/rcar-thermal.txt+4−2
@@ -4,15 +4,17 @@ Required properties: · 3 unmodified lines
4- compatible : "renesas,thermal-<soctype>",4- compatible : "renesas,thermal-<soctype>",
5 "renesas,rcar-gen2-thermal" (with thermal-zone) or5 "renesas,rcar-gen2-thermal" (with thermal-zone) or
6 "renesas,rcar-thermal" (without thermal-zone) as6 "renesas,rcar-thermal" (without thermal-zone) as
7 fallback except R-Car D3.7 fallback except R-Car V3M/D3.
8 Examples with soctypes are:8 Examples with soctypes are:
9 - "renesas,thermal-r8a73a4" (R-Mobile APE6)9 - "renesas,thermal-r8a73a4" (R-Mobile APE6)
10 - "renesas,thermal-r8a7743" (RZ/G1M)10 - "renesas,thermal-r8a7743" (RZ/G1M)
11 - "renesas,thermal-r8a7744" (RZ/G1N)
11 - "renesas,thermal-r8a7779" (R-Car H1)12 - "renesas,thermal-r8a7779" (R-Car H1)
12 - "renesas,thermal-r8a7790" (R-Car H2)13 - "renesas,thermal-r8a7790" (R-Car H2)
13 - "renesas,thermal-r8a7791" (R-Car M2-W)14 - "renesas,thermal-r8a7791" (R-Car M2-W)
14 - "renesas,thermal-r8a7792" (R-Car V2H)15 - "renesas,thermal-r8a7792" (R-Car V2H)
15 - "renesas,thermal-r8a7793" (R-Car M2-N)16 - "renesas,thermal-r8a7793" (R-Car M2-N)
17 - "renesas,thermal-r8a77970" (R-Car V3M)
16 - "renesas,thermal-r8a77995" (R-Car D3)18 - "renesas,thermal-r8a77995" (R-Car D3)
17- reg : Address range of the thermal registers.19- reg : Address range of the thermal registers.
18 The 1st reg will be recognized as common register20 The 1st reg will be recognized as common register
@@ -21,7 +23,7 @@ Required properties: · 2 unmodified lines
21Option properties:23Option properties:
22 24
23- interrupts : If present should contain 3 interrupts for25- interrupts : If present should contain 3 interrupts for
24 R-Car D3 or 1 interrupt otherwise.26 R-Car V3M/D3 or 1 interrupt otherwise.
25 27
26Example (non interrupt support):28Example (non interrupt support):
27 29
Documentation/devicetree/bindings/thermal/stm32-thermal.txt+61−0
@@ -0,0 +1,61 @@
1Binding for Thermal Sensor for STMicroelectronics STM32 series of SoCs.
2
3On STM32 SoCs, the Digital Temperature Sensor (DTS) is in charge of managing an
4analog block which delivers a frequency depending on the internal SoC's
5temperature. By using a reference frequency, DTS is able to provide a sample
6number which can be translated into a temperature by the user.
7
8DTS provides interrupt notification mechanism by threshold. This mechanism
9offers two temperature trip points: passive and critical. The first is intended
10for passive cooling notification while the second is used for over-temperature
11reset.
12
13Required parameters:
14-------------------
15
16compatible: Should be "st,stm32-thermal"
17reg: This should be the physical base address and length of the
18 sensor's registers.
19clocks: Phandle of the clock used by the thermal sensor.
20 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
21clock-names: Should be "pclk" for register access clock and reference clock.
22 See: Documentation/devicetree/bindings/resource-names.txt
23#thermal-sensor-cells: Should be 0. See ./thermal.txt for a description.
24interrupts: Standard way to define interrupt number.
25
26Example:
27
28 thermal-zones {
29 cpu_thermal: cpu-thermal {
30 polling-delay-passive = <0>;
31 polling-delay = <0>;
32
33 thermal-sensors = <&thermal>;
34
35 trips {
36 cpu_alert1: cpu-alert1 {
37 temperature = <85000>;
38 hysteresis = <0>;
39 type = "passive";
40 };
41
42 cpu-crit: cpu-crit {
43 temperature = <120000>;
44 hysteresis = <0>;
45 type = "critical";
46 };
47 };
48
49 cooling-maps {
50 };
51 };
52 };
53
54 thermal: thermal@50028000 {
55 compatible = "st,stm32-thermal";
56 reg = <0x50028000 0x100>;
57 clocks = <&rcc TMPSENS>;
58 clock-names = "pclk";
59 #thermal-sensor-cells = <0>;
60 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
61 };
Documentation/devicetree/bindings/thermal/thermal.txt+1−1
@@ -152,7 +152,7 @@ Optional property: · 151 unmodified lines
152 Elem size: one cell the sensors listed in the thermal-sensors property.152 Elem size: one cell the sensors listed in the thermal-sensors property.
153 Elem type: signed Coefficients defaults to 1, in case this property153 Elem type: signed Coefficients defaults to 1, in case this property
154 is not specified. A simple linear polynomial is used:154 is not specified. A simple linear polynomial is used:
155 Z = c0 * x0 + c1 + x1 + ... + c(n-1) * x(n-1) + cn.155 Z = c0 * x0 + c1 * x1 + ... + c(n-1) * x(n-1) + cn.
156 156
157 The coefficients are ordered and they match with sensors157 The coefficients are ordered and they match with sensors
158 by means of sensor ID. Additional coefficients are158 by means of sensor ID. Additional coefficients are
Documentation/devicetree/bindings/timer/csky,gx6605s-timer.txt+42−0
@@ -0,0 +1,42 @@
1=================
2gx6605s SOC Timer
3=================
4
5The timer is used in gx6605s soc as system timer and the driver
6contain clk event and clk source.
7
8==============================
9timer node bindings definition
10==============================
11
12 Description: Describes gx6605s SOC timer
13
14 PROPERTIES
15
16 - compatible
17 Usage: required
18 Value type: <string>
19 Definition: must be "csky,gx6605s-timer"
20 - reg
21 Usage: required
22 Value type: <u32 u32>
23 Definition: <phyaddr size> in soc from cpu view
24 - clocks
25 Usage: required
26 Value type: phandle + clock specifier cells
27 Definition: must be input clk node
28 - interrupt
29 Usage: required
30 Value type: <u32>
31 Definition: must be timer irq num defined by soc
32
33Examples:
34---------
35
36 timer0: timer@20a000 {
37 compatible = "csky,gx6605s-timer";
38 reg = <0x0020a000 0x400>;
39 clocks = <&dummy_apb_clk>;
40 interrupts = <10>;
41 interrupt-parent = <&intc>;
42 };
Documentation/devicetree/bindings/timer/csky,mptimer.txt+42−0
@@ -0,0 +1,42 @@
1============================
2C-SKY Multi-processors Timer
3============================
4
5C-SKY multi-processors timer is designed for C-SKY SMP system and the
6regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
7
8 - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
9 - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
10 - PTIM_CCVR "cr<3, 14>" Current counter value reg.
11 - PTIM_LVR "cr<6, 14>" Window value reg to triger next event.
12
13==============================
14timer node bindings definition
15==============================
16
17 Description: Describes SMP timer
18
19 PROPERTIES
20
21 - compatible
22 Usage: required
23 Value type: <string>
24 Definition: must be "csky,mptimer"
25 - clocks
26 Usage: required
27 Value type: <node>
28 Definition: must be input clk node
29 - interrupts
30 Usage: required
31 Value type: <u32>
32 Definition: must be timer irq num defined by soc
33
34Examples:
35---------
36
37 timer: timer {
38 compatible = "csky,mptimer";
39 clocks = <&dummy_apb_clk>;
40 interrupts = <16>;
41 interrupt-parent = <&intc>;
42 };
Documentation/devicetree/bindings/timer/renesas,cmt.txt+9−0
@@ -24,6 +24,8 @@ Required Properties: · 23 unmodified lines
24 - "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.24 - "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.
25 - "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743.25 - "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743.
26 - "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743.26 - "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743.
27 - "renesas,r8a7744-cmt0" for the 32-bit CMT0 device included in r8a7744.
28 - "renesas,r8a7744-cmt1" for the 48-bit CMT1 device included in r8a7744.
27 - "renesas,r8a7745-cmt0" for the 32-bit CMT0 device included in r8a7745.29 - "renesas,r8a7745-cmt0" for the 32-bit CMT0 device included in r8a7745.
28 - "renesas,r8a7745-cmt1" for the 48-bit CMT1 device included in r8a7745.30 - "renesas,r8a7745-cmt1" for the 48-bit CMT1 device included in r8a7745.
29 - "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.31 - "renesas,r8a7790-cmt0" for the 32-bit CMT0 device included in r8a7790.
@@ -34,6 +36,10 @@ Required Properties: · 4 unmodified lines
34 - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.36 - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.
35 - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.37 - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
36 - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.38 - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.
39 - "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970.
40 - "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in r8a77970.
41 - "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980.
42 - "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980.
37 43
38 - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen244 - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2
39 and RZ/G1.45 and RZ/G1.
@@ -41,6 +47,9 @@ Required Properties: · 1 unmodified line
41 and RZ/G1.47 and RZ/G1.
42 These are fallbacks for r8a73a4, R-Car Gen2 and RZ/G1 entries48 These are fallbacks for r8a73a4, R-Car Gen2 and RZ/G1 entries
43 listed above.49 listed above.
50 - "renesas,rcar-gen3-cmt0" for 32-bit CMT0 devices included in R-Car Gen3.
51 - "renesas,rcar-gen3-cmt1" for 48-bit CMT1 devices included in R-Car Gen3.
52 These are fallbacks for R-Car Gen3 entries listed above.
44 53
45 - reg: base address and length of the registers block for the timer module.54 - reg: base address and length of the registers block for the timer module.
46 - interrupts: interrupt-specifier for the timer, one per channel.55 - interrupts: interrupt-specifier for the timer, one per channel.
Documentation/devicetree/bindings/timer/renesas,ostm.txt+2−1
@@ -9,7 +9,8 @@ Channels are independent from each other. · 8 unmodified lines
9Required Properties:9Required Properties:
10 10
11 - compatible: must be one or more of the following:11 - compatible: must be one or more of the following:
12 - "renesas,r7s72100-ostm" for the r7s72100 OSTM12 - "renesas,r7s72100-ostm" for the R7S72100 (RZ/A1) OSTM
13 - "renesas,r7s9210-ostm" for the R7S9210 (RZ/A2) OSTM
13 - "renesas,ostm" for any OSTM14 - "renesas,ostm" for any OSTM
14 This is a fallback for the above renesas,*-ostm entries15 This is a fallback for the above renesas,*-ostm entries
15 16
Documentation/devicetree/bindings/timer/renesas,tmu.txt+2−0
@@ -12,6 +12,8 @@ Required Properties: · 11 unmodified lines
12 - "renesas,tmu-r8a7740" for the r8a7740 TMU12 - "renesas,tmu-r8a7740" for the r8a7740 TMU
13 - "renesas,tmu-r8a7778" for the r8a7778 TMU13 - "renesas,tmu-r8a7778" for the r8a7778 TMU
14 - "renesas,tmu-r8a7779" for the r8a7779 TMU14 - "renesas,tmu-r8a7779" for the r8a7779 TMU
15 - "renesas,tmu-r8a77970" for the r8a77970 TMU
16 - "renesas,tmu-r8a77980" for the r8a77980 TMU
15 - "renesas,tmu" for any TMU.17 - "renesas,tmu" for any TMU.
16 This is a fallback for the above renesas,tmu-* entries18 This is a fallback for the above renesas,tmu-* entries
17 19
Documentation/devicetree/bindings/trivial-devices.txt+0−11
@@ -21,21 +21,10 @@ adi,adt7490 +/-1C TDM Extended Temp Range I.C · 20 unmodified lines
21adi,adxl345 Three-Axis Digital Accelerometer21adi,adxl345 Three-Axis Digital Accelerometer
22adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too)22adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too)
23ams,iaq-core AMS iAQ-Core VOC Sensor23ams,iaq-core AMS iAQ-Core VOC Sensor
24amstaos,tsl2571 AMS/TAOS ALS and proximity sensor
25amstaos,tsl2671 AMS/TAOS ALS and proximity sensor
26amstaos,tmd2671 AMS/TAOS ALS and proximity sensor
27amstaos,tsl2771 AMS/TAOS ALS and proximity sensor
28amstaos,tmd2771 AMS/TAOS ALS and proximity sensor
29amstaos,tsl2572 AMS/TAOS ALS and proximity sensor
30amstaos,tsl2672 AMS/TAOS ALS and proximity sensor
31amstaos,tmd2672 AMS/TAOS ALS and proximity sensor
32amstaos,tsl2772 AMS/TAOS ALS and proximity sensor
33amstaos,tmd2772 AMS/TAOS ALS and proximity sensor
34at,24c08 i2c serial eeprom (24cxx)24at,24c08 i2c serial eeprom (24cxx)
35atmel,at97sc3204t i2c trusted platform module (TPM)25atmel,at97sc3204t i2c trusted platform module (TPM)
36capella,cm32181 CM32181: Ambient Light Sensor26capella,cm32181 CM32181: Ambient Light Sensor
37capella,cm3232 CM3232: Ambient Light Sensor27capella,cm3232 CM3232: Ambient Light Sensor
38cirrus,cs42l51 Cirrus Logic CS42L51 audio codec
39dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output28dallas,ds1374 I2C, 32-Bit Binary Counter Watchdog RTC with Trickle Charger and Reset Input/Output
40dallas,ds1631 High-Precision Digital Thermometer29dallas,ds1631 High-Precision Digital Thermometer
41dallas,ds1672 Dallas DS1672 Real-time Clock30dallas,ds1672 Dallas DS1672 Real-time Clock
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt+2−0
@@ -80,6 +80,8 @@ Optional properties: · 79 unmodified lines
80 controller. It's expected that a mux state of 0 indicates device mode and a80 controller. It's expected that a mux state of 0 indicates device mode and a
81 mux state of 1 indicates host mode.81 mux state of 1 indicates host mode.
82- mux-control-names: Shall be "usb_switch" if mux-controls is specified.82- mux-control-names: Shall be "usb_switch" if mux-controls is specified.
83- pinctrl-names: Names for optional pin modes in "default", "host", "device"
84- pinctrl-n: alternate pin modes
83 85
84i.mx specific properties86i.mx specific properties
85- fsl,usbmisc: phandler of non-core register device, with one87- fsl,usbmisc: phandler of non-core register device, with one
Documentation/devicetree/bindings/usb/dwc2.txt+1−0
@@ -6,6 +6,7 @@ Required properties: · 5 unmodified lines
6 - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.6 - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
7 - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.7 - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
8 - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;8 - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
9 - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
9 - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;10 - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
10 - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;11 - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
11 - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;12 - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
Documentation/devicetree/bindings/usb/dwc3.txt+1−0
@@ -19,6 +19,7 @@ Exception for clocks: · 18 unmodified lines
19 "cavium,octeon-7130-usb-uctl"19 "cavium,octeon-7130-usb-uctl"
20 "qcom,dwc3"20 "qcom,dwc3"
21 "samsung,exynos5250-dwusb3"21 "samsung,exynos5250-dwusb3"
22 "samsung,exynos5433-dwusb3"
22 "samsung,exynos7-dwusb3"23 "samsung,exynos7-dwusb3"
23 "sprd,sc9860-dwc3"24 "sprd,sc9860-dwc3"
24 "st,stih407-dwc3"25 "st,stih407-dwc3"
Documentation/devicetree/bindings/usb/ehci-mv.txt+23−0
@@ -0,0 +1,23 @@
1* Marvell PXA/MMP EHCI controller.
2
3Required properties:
4
5- compatible: must be "marvell,pxau2o-ehci"
6- reg: physical base addresses of the controller and length of memory mapped region
7- interrupts: one EHCI controller interrupt should be described here
8- clocks: phandle list of usb clocks
9- clock-names: should be "USBCLK"
10- phys: phandle for the PHY device
11- phy-names: should be "usb"
12
13Example:
14
15 ehci0: usb-ehci@d4208000 {
16 compatible = "marvell,pxau2o-ehci";
17 reg = <0xd4208000 0x200>;
18 interrupts = <44>;
19 clocks = <&soc_clocks MMP2_CLK_USB>;
20 clock-names = "USBCLK";
21 phys = <&usb_otg_phy>;
22 phy-names = "usb";
23 };
Documentation/devicetree/bindings/usb/exynos-usb.txt+2−0
@@ -83,6 +83,8 @@ Required properties: · 82 unmodified lines
83 - compatible: should be one of the following -83 - compatible: should be one of the following -
84 "samsung,exynos5250-dwusb3": for USB 3.0 DWC3 controller on84 "samsung,exynos5250-dwusb3": for USB 3.0 DWC3 controller on
85 Exynos5250/5420.85 Exynos5250/5420.
86 "samsung,exynos5433-dwusb3": for USB 3.0 DWC3 controller on
87 Exynos5433.
86 "samsung,exynos7-dwusb3": for USB 3.0 DWC3 controller on Exynos7.88 "samsung,exynos7-dwusb3": for USB 3.0 DWC3 controller on Exynos7.
87 - #address-cells, #size-cells : should be '1' if the device has sub-nodes89 - #address-cells, #size-cells : should be '1' if the device has sub-nodes
88 with 'reg' property.90 with 'reg' property.
Documentation/devicetree/bindings/usb/faraday,fotg210.txt+35−0
@@ -0,0 +1,35 @@
1Faraday FOTG Host controller
2
3This OTG-capable USB host controller is found in Cortina Systems
4Gemini and other SoC products.
5
6Required properties:
7- compatible: should be one of:
8 "faraday,fotg210"
9 "cortina,gemini-usb", "faraday,fotg210"
10- reg: should contain one register range i.e. start and length
11- interrupts: description of the interrupt line
12
13Optional properties:
14- clocks: should contain the IP block clock
15- clock-names: should be "PCLK" for the IP block clock
16
17Required properties for "cortina,gemini-usb" compatible:
18- syscon: a phandle to the system controller to access PHY registers
19
20Optional properties for "cortina,gemini-usb" compatible:
21- cortina,gemini-mini-b: boolean property that indicates that a Mini-B
22 OTG connector is in use
23- wakeup-source: see power/wakeup-source.txt
24
25Example for Gemini:
26
27usb@68000000 {
28 compatible = "cortina,gemini-usb", "faraday,fotg210";
29 reg = <0x68000000 0x1000>;
30 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
31 clocks = <&cc 12>;
32 clock-names = "PCLK";
33 syscon = <&syscon>;
34 wakeup-source;
35};
Documentation/devicetree/bindings/usb/fcs,fusb302.txt+25−7
@@ -5,10 +5,19 @@ Required properties : · 4 unmodified lines
5- reg : I2C slave address5- reg : I2C slave address
6- interrupts : Interrupt specifier6- interrupts : Interrupt specifier
7 7
8Optional properties :8Required sub-node:
9- fcs,operating-sink-microwatt :9- connector : The "usb-c-connector" attached to the FUSB302 IC. The bindings
10 Minimum amount of power accepted from a sink10 of the connector node are specified in:
11 when negotiating11
12 Documentation/devicetree/bindings/connector/usb-connector.txt
13
14Deprecated properties :
15- fcs,max-sink-microvolt : Maximum sink voltage accepted by port controller
16- fcs,max-sink-microamp : Maximum sink current accepted by port controller
17- fcs,max-sink-microwatt : Maximum sink power accepted by port controller
18- fcs,operating-sink-microwatt : Minimum amount of power accepted from a sink
19 when negotiating
20
12 21
13Example:22Example:
14 23
@@ -17,7 +26,16 @@ fusb302: typec-portc@54 { · 2 unmodified lines
17 reg = <0x54>;26 reg = <0x54>;
18 interrupt-parent = <&nmi_intc>;27 interrupt-parent = <&nmi_intc>;
19 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;28 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
20 fcs,max-sink-microvolt = <12000000>;29
21 fcs,max-sink-microamp = <3000000>;30 usb_con: connector {
22 fcs,max-sink-microwatt = <36000000>;31 compatible = "usb-c-connector";
32 label = "USB-C";
33 power-role = "dual";
34 try-power-role = "sink";
35 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
36 sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
37 PDO_VAR(3000, 12000, 3000)
38 PDO_PPS_APDO(3000, 11000, 3000)>;
39 op-sink-microwatt = <10000000>;
40 };
23};41};
Documentation/devicetree/bindings/usb/renesas_usb3.txt+4−2
@@ -2,11 +2,13 @@ Renesas Electronics USB3.0 Peripheral driver · 1 unmodified line
2 2
3Required properties:3Required properties:
4 - compatible: Must contain one of the following:4 - compatible: Must contain one of the following:
5 - "renesas,r8a774a1-usb3-peri"
5 - "renesas,r8a7795-usb3-peri"6 - "renesas,r8a7795-usb3-peri"
6 - "renesas,r8a7796-usb3-peri"7 - "renesas,r8a7796-usb3-peri"
7 - "renesas,r8a77965-usb3-peri"8 - "renesas,r8a77965-usb3-peri"
8 - "renesas,rcar-gen3-usb3-peri" for a generic R-Car Gen3 compatible9 - "renesas,r8a77990-usb3-peri"
9 device10 - "renesas,rcar-gen3-usb3-peri" for a generic R-Car Gen3 or RZ/G2
11 compatible device
10 12
11 When compatible with the generic version, nodes must list the13 When compatible with the generic version, nodes must list the
12 SoC-specific version corresponding to the platform first14 SoC-specific version corresponding to the platform first
Documentation/devicetree/bindings/usb/renesas_usbhs.txt+9−2
@@ -4,7 +4,9 @@ Required properties: · 3 unmodified lines
4 - compatible: Must contain one or more of the following:4 - compatible: Must contain one or more of the following:
5 5
6 - "renesas,usbhs-r8a7743" for r8a7743 (RZ/G1M) compatible device6 - "renesas,usbhs-r8a7743" for r8a7743 (RZ/G1M) compatible device
7 - "renesas,usbhs-r8a7744" for r8a7744 (RZ/G1N) compatible device
7 - "renesas,usbhs-r8a7745" for r8a7745 (RZ/G1E) compatible device8 - "renesas,usbhs-r8a7745" for r8a7745 (RZ/G1E) compatible device
9 - "renesas,usbhs-r8a774a1" for r8a774a1 (RZ/G2M) compatible device
8 - "renesas,usbhs-r8a7790" for r8a7790 (R-Car H2) compatible device10 - "renesas,usbhs-r8a7790" for r8a7790 (R-Car H2) compatible device
9 - "renesas,usbhs-r8a7791" for r8a7791 (R-Car M2-W) compatible device11 - "renesas,usbhs-r8a7791" for r8a7791 (R-Car M2-W) compatible device
10 - "renesas,usbhs-r8a7792" for r8a7792 (R-Car V2H) compatible device12 - "renesas,usbhs-r8a7792" for r8a7792 (R-Car V2H) compatible device
@@ -13,10 +15,11 @@ Required properties: · 2 unmodified lines
13 - "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device15 - "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device
14 - "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device16 - "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device
15 - "renesas,usbhs-r8a77965" for r8a77965 (R-Car M3-N) compatible device17 - "renesas,usbhs-r8a77965" for r8a77965 (R-Car M3-N) compatible device
18 - "renesas,usbhs-r8a77990" for r8a77990 (R-Car E3) compatible device
16 - "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device19 - "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device
17 - "renesas,usbhs-r7s72100" for r7s72100 (RZ/A1) compatible device20 - "renesas,usbhs-r7s72100" for r7s72100 (RZ/A1) compatible device
18 - "renesas,rcar-gen2-usbhs" for R-Car Gen2 or RZ/G1 compatible devices21 - "renesas,rcar-gen2-usbhs" for R-Car Gen2 or RZ/G1 compatible devices
19 - "renesas,rcar-gen3-usbhs" for R-Car Gen3 compatible device22 - "renesas,rcar-gen3-usbhs" for R-Car Gen3 or RZ/G2 compatible devices
20 - "renesas,rza1-usbhs" for RZ/A1 compatible device23 - "renesas,rza1-usbhs" for RZ/A1 compatible device
21 24
22 When compatible with the generic version, nodes must list the25 When compatible with the generic version, nodes must list the
@@ -25,7 +28,11 @@ Required properties: · 2 unmodified lines
25 28
26 - reg: Base address and length of the register for the USBHS29 - reg: Base address and length of the register for the USBHS
27 - interrupts: Interrupt specifier for the USBHS30 - interrupts: Interrupt specifier for the USBHS
28 - clocks: A list of phandle + clock specifier pairs31 - clocks: A list of phandle + clock specifier pairs.
32 - In case of "renesas,rcar-gen3-usbhs", two clocks are required.
33 First clock should be peripheral and second one should be host.
34 - In case of except above, one clock is required. First clock
35 should be peripheral.
29 36
30Optional properties:37Optional properties:
31 - renesas,buswait: Integer to use BUSWAIT register38 - renesas,buswait: Integer to use BUSWAIT register
Documentation/devicetree/bindings/usb/usb-ehci.txt+5−1
@@ -15,7 +15,11 @@ Optional properties: · 14 unmodified lines
15 - needs-reset-on-resume : boolean, set this to force EHCI reset after resume15 - needs-reset-on-resume : boolean, set this to force EHCI reset after resume
16 - has-transaction-translator : boolean, set this if EHCI have a Transaction16 - has-transaction-translator : boolean, set this if EHCI have a Transaction
17 Translator built into the root hub.17 Translator built into the root hub.
18 - clocks : a list of phandle + clock specifier pairs18 - clocks : a list of phandle + clock specifier pairs. In case of Renesas
19 R-Car Gen3 SoCs:
20 - if a host only channel: first clock should be host.
21 - if a USB DRD channel: first clock should be host and second one
22 should be peripheral.
19 - phys : see usb-hcd.txt in the current directory23 - phys : see usb-hcd.txt in the current directory
20 - resets : phandle + reset specifier pair24 - resets : phandle + reset specifier pair
21 25
Documentation/devicetree/bindings/usb/usb-ohci.txt+5−1
@@ -12,7 +12,11 @@ Optional properties: · 11 unmodified lines
12- no-big-frame-no : boolean, set if frame_no lives in bits [15:0] of HCCA12- no-big-frame-no : boolean, set if frame_no lives in bits [15:0] of HCCA
13- remote-wakeup-connected: remote wakeup is wired on the platform13- remote-wakeup-connected: remote wakeup is wired on the platform
14- num-ports : u32, to override the detected port count14- num-ports : u32, to override the detected port count
15- clocks : a list of phandle + clock specifier pairs15- clocks : a list of phandle + clock specifier pairs. In case of Renesas
16 R-Car Gen3 SoCs:
17 - if a host only channel: first clock should be host.
18 - if a USB DRD channel: first clock should be host and second one
19 should be peripheral.
16- phys : see usb-hcd.txt in the current directory20- phys : see usb-hcd.txt in the current directory
17- resets : a list of phandle + reset specifier pairs21- resets : a list of phandle + reset specifier pairs
18 22
Documentation/devicetree/bindings/usb/usb-xhci.txt+4−1
@@ -8,6 +8,8 @@ Required properties: · 7 unmodified lines
8 - "marvell,armada-375-xhci" for Armada 375 SoCs8 - "marvell,armada-375-xhci" for Armada 375 SoCs
9 - "marvell,armada-380-xhci" for Armada 38x SoCs9 - "marvell,armada-380-xhci" for Armada 38x SoCs
10 - "renesas,xhci-r8a7743" for r8a7743 SoC10 - "renesas,xhci-r8a7743" for r8a7743 SoC
11 - "renesas,xhci-r8a7744" for r8a7744 SoC
12 - "renesas,xhci-r8a774a1" for r8a774a1 SoC
11 - "renesas,xhci-r8a7790" for r8a7790 SoC13 - "renesas,xhci-r8a7790" for r8a7790 SoC
12 - "renesas,xhci-r8a7791" for r8a7791 SoC14 - "renesas,xhci-r8a7791" for r8a7791 SoC
13 - "renesas,xhci-r8a7793" for r8a7793 SoC15 - "renesas,xhci-r8a7793" for r8a7793 SoC
@@ -17,7 +19,8 @@ Required properties: · 3 unmodified lines
17 - "renesas,xhci-r8a77990" for r8a77990 SoC19 - "renesas,xhci-r8a77990" for r8a77990 SoC
18 - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible20 - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible
19 device21 device
20 - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device22 - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 or RZ/G2 compatible
23 device
21 - "xhci-platform" (deprecated)24 - "xhci-platform" (deprecated)
22 25
23 When compatible with the generic version, nodes must list the26 When compatible with the generic version, nodes must list the
Documentation/devicetree/bindings/vendor-prefixes.txt+7−0
@@ -67,6 +67,7 @@ capella Capella Microsystems, Inc · 66 unmodified lines
67cascoda Cascoda, Ltd.67cascoda Cascoda, Ltd.
68cavium Cavium, Inc.68cavium Cavium, Inc.
69cdns Cadence Design Systems Inc.69cdns Cadence Design Systems Inc.
70cdtech CDTech(H.K.) Electronics Limited
70ceva Ceva, Inc.71ceva Ceva, Inc.
71chipidea Chipidea, Inc72chipidea Chipidea, Inc
72chipone ChipOne73chipone ChipOne
@@ -84,6 +85,7 @@ cosmic Cosmic Circuits · 11 unmodified lines
84crane Crane Connectivity Solutions85crane Crane Connectivity Solutions
85creative Creative Technology Ltd86creative Creative Technology Ltd
86crystalfontz Crystalfontz America, Inc.87crystalfontz Crystalfontz America, Inc.
88csky Hangzhou C-SKY Microsystems Co., Ltd
87cubietech Cubietech, Ltd.89cubietech Cubietech, Ltd.
88cypress Cypress Semiconductor Corporation90cypress Cypress Semiconductor Corporation
89cznic CZ.NIC, z.s.p.o.91cznic CZ.NIC, z.s.p.o.
@@ -114,6 +116,7 @@ elan Elan Microelectronic Corp. · 24 unmodified lines
114embest Shenzhen Embest Technology Co., Ltd.116embest Shenzhen Embest Technology Co., Ltd.
115emmicro EM Microelectronic117emmicro EM Microelectronic
116emtrion emtrion GmbH118emtrion emtrion GmbH
119endless Endless Mobile, Inc.
117energymicro Silicon Laboratories (formerly Energy Micro AS)120energymicro Silicon Laboratories (formerly Energy Micro AS)
118engicam Engicam S.r.l.121engicam Engicam S.r.l.
119epcos EPCOS AG122epcos EPCOS AG
@@ -127,6 +130,7 @@ everspin Everspin Technologies, Inc. · 7 unmodified lines
127exar Exar Corporation130exar Exar Corporation
128excito Excito131excito Excito
129ezchip EZchip Semiconductor132ezchip EZchip Semiconductor
133facebook Facebook
130fairphone Fairphone B.V.134fairphone Fairphone B.V.
131faraday Faraday Technology Corporation135faraday Faraday Technology Corporation
132fastrax Fastrax Oy136fastrax Fastrax Oy
@@ -235,6 +239,7 @@ micrel Micrel Inc. · 102 unmodified lines
235microchip Microchip Technology Inc.239microchip Microchip Technology Inc.
236microcrystal Micro Crystal AG240microcrystal Micro Crystal AG
237micron Micron Technology Inc.241micron Micron Technology Inc.
242mikroe MikroElektronika d.o.o.
238minix MINIX Technology Ltd.243minix MINIX Technology Ltd.
239miramems MiraMEMS Sensing Technology Co., Ltd.244miramems MiraMEMS Sensing Technology Co., Ltd.
240mitsubishi Mitsubishi Electric Corporation245mitsubishi Mitsubishi Electric Corporation
@@ -274,6 +279,7 @@ nxp NXP Semiconductors · 33 unmodified lines
274okaya Okaya Electric America, Inc.279okaya Okaya Electric America, Inc.
275oki Oki Electric Industry Co., Ltd.280oki Oki Electric Industry Co., Ltd.
276olimex OLIMEX Ltd.281olimex OLIMEX Ltd.
282olpc One Laptop Per Child
277onion Onion Corporation283onion Onion Corporation
278onnn ON Semiconductor Corp.284onnn ON Semiconductor Corp.
279ontat On Tat Industrial Company285ontat On Tat Industrial Company
@@ -297,6 +303,7 @@ pine64 Pine64 · 17 unmodified lines
297pixcir PIXCIR MICROELECTRONICS Co., Ltd303pixcir PIXCIR MICROELECTRONICS Co., Ltd
298plathome Plat'Home Co., Ltd.304plathome Plat'Home Co., Ltd.
299plda PLDA305plda PLDA
306plx Broadcom Corporation (formerly PLX Technology)
300portwell Portwell Inc.307portwell Portwell Inc.
301poslab Poslab Technology Co., Ltd.308poslab Poslab Technology Co., Ltd.
302powervr PowerVR (deprecated, use img)309powervr PowerVR (deprecated, use img)
Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt+23−0
@@ -0,0 +1,23 @@
1* Armada 37xx CPU Watchdog Timer Controller
2
3Required properties:
4- compatible : must be "marvell,armada-3700-wdt"
5- reg : base physical address of the controller and length of memory mapped
6 region.
7- clocks : the clock feeding the watchdog timer. See clock-bindings.txt
8- marvell,system-controller : reference to syscon node for the CPU Miscellaneous
9 Registers
10
11Example:
12
13 cpu_misc: system-controller@d000 {
14 compatible = "marvell,armada-3700-cpu-misc", "syscon";
15 reg = <0xd000 0x1000>;
16 };
17
18 wdt: watchdog@8300 {
19 compatible = "marvell,armada-3700-wdt";
20 reg = <0x8300 0x40>;
21 marvell,system-controller = <&cpu_misc>;
22 clocks = <&xtalclk>;
23 };
Documentation/devicetree/bindings/watchdog/mpc8xxx-wdt.txt+25−0
@@ -0,0 +1,25 @@
1* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx)
2
3Required properties:
4- compatible: Shall contain one of the following:
5 "mpc83xx_wdt" for an mpc83xx
6 "fsl,mpc8610-wdt" for an mpc86xx
7 "fsl,mpc823-wdt" for an mpc8xx
8- reg: base physical address and length of the area hosting the
9 watchdog registers.
10 On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100>
11 On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100>
12 On the 8xx, "General System Interface Unit" area: <0x0 0x10>
13
14Optional properties:
15- reg: additional physical address and length (4) of location of the
16 Reset Status Register (called RSTRSCR on the mpc86xx)
17 On the 83xx, it is located at offset 0x910
18 On the 86xx, it is located at offset 0xe0094
19 On the 8xx, it is located at offset 0x288
20
21Example:
22 WDT: watchdog@0 {
23 compatible = "fsl,mpc823-wdt";
24 reg = <0x0 0x10 0x288 0x4>;
25 };
Documentation/devicetree/bindings/watchdog/renesas-wdt.txt+2−0
@@ -6,6 +6,7 @@ Required properties: · 5 unmodified lines
6 version.6 version.
7 Examples with soctypes are:7 Examples with soctypes are:
8 - "renesas,r8a7743-wdt" (RZ/G1M)8 - "renesas,r8a7743-wdt" (RZ/G1M)
9 - "renesas,r8a7744-wdt" (RZ/G1N)
9 - "renesas,r8a7745-wdt" (RZ/G1E)10 - "renesas,r8a7745-wdt" (RZ/G1E)
10 - "renesas,r8a774a1-wdt" (RZ/G2M)11 - "renesas,r8a774a1-wdt" (RZ/G2M)
11 - "renesas,r8a7790-wdt" (R-Car H2)12 - "renesas,r8a7790-wdt" (R-Car H2)
@@ -20,6 +21,7 @@ Required properties: · 8 unmodified lines
20 - "renesas,r8a77990-wdt" (R-Car E3)21 - "renesas,r8a77990-wdt" (R-Car E3)
21 - "renesas,r8a77995-wdt" (R-Car D3)22 - "renesas,r8a77995-wdt" (R-Car D3)
22 - "renesas,r7s72100-wdt" (RZ/A1)23 - "renesas,r7s72100-wdt" (RZ/A1)
24 - "renesas,r7s9210-wdt" (RZ/A2)
23 The generic compatible string must be:25 The generic compatible string must be:
24 - "renesas,rza-wdt" for RZ/A26 - "renesas,rza-wdt" for RZ/A
25 - "renesas,rcar-gen2-wdt" for R-Car Gen2 and RZ/G127 - "renesas,rcar-gen2-wdt" for R-Car Gen2 and RZ/G1
Documentation/driver-api/basics.rst+3−0
@@ -121,6 +121,9 @@ Kernel utility functions · 120 unmodified lines
121.. kernel-doc:: kernel/rcu/update.c121.. kernel-doc:: kernel/rcu/update.c
122 :export:122 :export:
123 123
124.. kernel-doc:: include/linux/overflow.h
125 :internal:
126
124Device Resource Management127Device Resource Management
125--------------------------128--------------------------
126 129
Documentation/driver-api/firewire.rst+48−0
@@ -0,0 +1,48 @@
1===========================================
2Firewire (IEEE 1394) driver Interface Guide
3===========================================
4
5Introduction and Overview
6=========================
7
8The Linux FireWire subsystem adds some interfaces into the Linux system to
9 use/maintain+any resource on IEEE 1394 bus.
10
11The main purpose of these interfaces is to access address space on each node
12on IEEE 1394 bus by ISO/IEC 13213 (IEEE 1212) procedure, and to control
13isochronous resources on the bus by IEEE 1394 procedure.
14
15Two types of interfaces are added, according to consumers of the interface. A
16set of userspace interfaces is available via `firewire character devices`. A set
17of kernel interfaces is available via exported symbols in `firewire-core` module.
18
19Firewire char device data structures
20====================================
21
22.. include:: /ABI/stable/firewire-cdev
23 :literal:
24
25.. kernel-doc:: include/uapi/linux/firewire-cdev.h
26 :internal:
27
28Firewire device probing and sysfs interfaces
29============================================
30
31.. include:: /ABI/stable/sysfs-bus-firewire
32 :literal:
33
34.. kernel-doc:: drivers/firewire/core-device.c
35 :export:
36
37Firewire core transaction interfaces
38====================================
39
40.. kernel-doc:: drivers/firewire/core-transaction.c
41 :export:
42
43Firewire Isochronous I/O interfaces
44===================================
45
46.. kernel-doc:: drivers/firewire/core-iso.c
47 :export:
48
Documentation/driver-api/fpga/fpga-bridge.rst+7−30
@@ -4,6 +4,12 @@ FPGA Bridge · 3 unmodified lines
4API to implement a new FPGA bridge4API to implement a new FPGA bridge
5~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~5~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
6 6
7* struct :c:type:`fpga_bridge` — The FPGA Bridge structure
8* struct :c:type:`fpga_bridge_ops` — Low level Bridge driver ops
9* :c:func:`devm_fpga_bridge_create()` — Allocate and init a bridge struct
10* :c:func:`fpga_bridge_register()` — Register a bridge
11* :c:func:`fpga_bridge_unregister()` — Unregister a bridge
12
7.. kernel-doc:: include/linux/fpga/fpga-bridge.h13.. kernel-doc:: include/linux/fpga/fpga-bridge.h
8 :functions: fpga_bridge14 :functions: fpga_bridge
9 15
@@ -11,39 +17,10 @@ API to implement a new FPGA bridge · 1 unmodified line
11 :functions: fpga_bridge_ops17 :functions: fpga_bridge_ops
12 18
13.. kernel-doc:: drivers/fpga/fpga-bridge.c19.. kernel-doc:: drivers/fpga/fpga-bridge.c
14 :functions: fpga_bridge_create20 :functions: devm_fpga_bridge_create
15
16.. kernel-doc:: drivers/fpga/fpga-bridge.c
17 :functions: fpga_bridge_free
18 21
19.. kernel-doc:: drivers/fpga/fpga-bridge.c22.. kernel-doc:: drivers/fpga/fpga-bridge.c
20 :functions: fpga_bridge_register23 :functions: fpga_bridge_register
21 24
22.. kernel-doc:: drivers/fpga/fpga-bridge.c25.. kernel-doc:: drivers/fpga/fpga-bridge.c
23 :functions: fpga_bridge_unregister26 :functions: fpga_bridge_unregister
24
25API to control an FPGA bridge
26~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
27
28You probably won't need these directly. FPGA regions should handle this.
29
30.. kernel-doc:: drivers/fpga/fpga-bridge.c
31 :functions: of_fpga_bridge_get
32
33.. kernel-doc:: drivers/fpga/fpga-bridge.c
34 :functions: fpga_bridge_get
35
36.. kernel-doc:: drivers/fpga/fpga-bridge.c
37 :functions: fpga_bridge_put
38
39.. kernel-doc:: drivers/fpga/fpga-bridge.c
40 :functions: fpga_bridge_get_to_list
41
42.. kernel-doc:: drivers/fpga/fpga-bridge.c
43 :functions: of_fpga_bridge_get_to_list
44
45.. kernel-doc:: drivers/fpga/fpga-bridge.c
46 :functions: fpga_bridge_enable
47
48.. kernel-doc:: drivers/fpga/fpga-bridge.c
49 :functions: fpga_bridge_disable
Documentation/driver-api/fpga/fpga-mgr.rst+14−107
@@ -49,18 +49,14 @@ probe function calls fpga_mgr_register(), such as:: · 48 unmodified lines
49 * them in priv49 * them in priv
50 */50 */
51 51
52 mgr = fpga_mgr_create(dev, "Altera SOCFPGA FPGA Manager",52 mgr = devm_fpga_mgr_create(dev, "Altera SOCFPGA FPGA Manager",
53 &socfpga_fpga_ops, priv);53 &socfpga_fpga_ops, priv);
54 if (!mgr)54 if (!mgr)
55 return -ENOMEM;55 return -ENOMEM;
56 56
57 platform_set_drvdata(pdev, mgr);57 platform_set_drvdata(pdev, mgr);
58 58
59 ret = fpga_mgr_register(mgr);59 return fpga_mgr_register(mgr);
60 if (ret)
61 fpga_mgr_free(mgr);
62
63 return ret;
64 }60 }
65 61
66 static int socfpga_fpga_remove(struct platform_device *pdev)62 static int socfpga_fpga_remove(struct platform_device *pdev)
@@ -102,67 +98,19 @@ The ops include a .state function which will determine the state the FPGA is in · 35 unmodified lines
102and return a code of type enum fpga_mgr_states. It doesn't result in a change98and return a code of type enum fpga_mgr_states. It doesn't result in a change
103in state.99in state.
104 100
105How to write an image buffer to a supported FPGA
106------------------------------------------------
107
108Some sample code::
109
110 #include <linux/fpga/fpga-mgr.h>
111
112 struct fpga_manager *mgr;
113 struct fpga_image_info *info;
114 int ret;
115
116 /*
117 * Get a reference to FPGA manager. The manager is not locked, so you can
118 * hold onto this reference without it preventing programming.
119 *
120 * This example uses the device node of the manager. Alternatively, use
121 * fpga_mgr_get(dev) instead if you have the device.
122 */
123 mgr = of_fpga_mgr_get(mgr_node);
124
125 /* struct with information about the FPGA image to program. */
126 info = fpga_image_info_alloc(dev);
127
128 /* flags indicates whether to do full or partial reconfiguration */
129 info->flags = FPGA_MGR_PARTIAL_RECONFIG;
130
131 /*
132 * At this point, indicate where the image is. This is pseudo-code; you're
133 * going to use one of these three.
134 */
135 if (image is in a scatter gather table) {
136
137 info->sgt = [your scatter gather table]
138
139 } else if (image is in a buffer) {
140
141 info->buf = [your image buffer]
142 info->count = [image buffer size]
143
144 } else if (image is in a firmware file) {
145
146 info->firmware_name = devm_kstrdup(dev, firmware_name, GFP_KERNEL);
147
148 }
149
150 /* Get exclusive control of FPGA manager */
151 ret = fpga_mgr_lock(mgr);
152
153 /* Load the buffer to the FPGA */
154 ret = fpga_mgr_buf_load(mgr, &info, buf, count);
155
156 /* Release the FPGA manager */
157 fpga_mgr_unlock(mgr);
158 fpga_mgr_put(mgr);
159
160 /* Deallocate the image info if you're done with it */
161 fpga_image_info_free(info);
162
163API for implementing a new FPGA Manager driver101API for implementing a new FPGA Manager driver
164----------------------------------------------102----------------------------------------------
165 103
104* ``fpga_mgr_states`` — Values for :c:member:`fpga_manager->state`.
105* struct :c:type:`fpga_manager` — the FPGA manager struct
106* struct :c:type:`fpga_manager_ops` — Low level FPGA manager driver ops
107* :c:func:`devm_fpga_mgr_create` — Allocate and init a manager struct
108* :c:func:`fpga_mgr_register` — Register an FPGA manager
109* :c:func:`fpga_mgr_unregister` — Unregister an FPGA manager
110
111.. kernel-doc:: include/linux/fpga/fpga-mgr.h
112 :functions: fpga_mgr_states
113
166.. kernel-doc:: include/linux/fpga/fpga-mgr.h114.. kernel-doc:: include/linux/fpga/fpga-mgr.h
167 :functions: fpga_manager115 :functions: fpga_manager
168 116
@@ -170,51 +118,10 @@ API for implementing a new FPGA Manager driver · 1 unmodified line
170 :functions: fpga_manager_ops118 :functions: fpga_manager_ops
171 119
172.. kernel-doc:: drivers/fpga/fpga-mgr.c120.. kernel-doc:: drivers/fpga/fpga-mgr.c
173 :functions: fpga_mgr_create121 :functions: devm_fpga_mgr_create
174
175.. kernel-doc:: drivers/fpga/fpga-mgr.c
176 :functions: fpga_mgr_free
177 122
178.. kernel-doc:: drivers/fpga/fpga-mgr.c123.. kernel-doc:: drivers/fpga/fpga-mgr.c
179 :functions: fpga_mgr_register124 :functions: fpga_mgr_register
180 125
181.. kernel-doc:: drivers/fpga/fpga-mgr.c126.. kernel-doc:: drivers/fpga/fpga-mgr.c
182 :functions: fpga_mgr_unregister127 :functions: fpga_mgr_unregister
183
184API for programming an FPGA
185---------------------------
186
187.. kernel-doc:: include/linux/fpga/fpga-mgr.h
188 :functions: fpga_image_info
189
190.. kernel-doc:: include/linux/fpga/fpga-mgr.h
191 :functions: fpga_mgr_states
192
193.. kernel-doc:: drivers/fpga/fpga-mgr.c
194 :functions: fpga_image_info_alloc
195
196.. kernel-doc:: drivers/fpga/fpga-mgr.c
197 :functions: fpga_image_info_free
198
199.. kernel-doc:: drivers/fpga/fpga-mgr.c
200 :functions: of_fpga_mgr_get
201
202.. kernel-doc:: drivers/fpga/fpga-mgr.c
203 :functions: fpga_mgr_get
204
205.. kernel-doc:: drivers/fpga/fpga-mgr.c
206 :functions: fpga_mgr_put
207
208.. kernel-doc:: drivers/fpga/fpga-mgr.c
209 :functions: fpga_mgr_lock
210
211.. kernel-doc:: drivers/fpga/fpga-mgr.c
212 :functions: fpga_mgr_unlock
213
214.. kernel-doc:: include/linux/fpga/fpga-mgr.h
215 :functions: fpga_mgr_states
216
217Note - use :c:func:`fpga_region_program_fpga()` instead of :c:func:`fpga_mgr_load()`
218
219.. kernel-doc:: drivers/fpga/fpga-mgr.c
220 :functions: fpga_mgr_load
Documentation/driver-api/fpga/fpga-programming.rst+107−0
@@ -0,0 +1,107 @@
1In-kernel API for FPGA Programming
2==================================
3
4Overview
5--------
6
7The in-kernel API for FPGA programming is a combination of APIs from
8FPGA manager, bridge, and regions. The actual function used to
9trigger FPGA programming is :c:func:`fpga_region_program_fpga()`.
10
11:c:func:`fpga_region_program_fpga()` uses functionality supplied by
12the FPGA manager and bridges. It will:
13
14 * lock the region's mutex
15 * lock the mutex of the region's FPGA manager
16 * build a list of FPGA bridges if a method has been specified to do so
17 * disable the bridges
18 * program the FPGA using info passed in :c:member:`fpga_region->info`.
19 * re-enable the bridges
20 * release the locks
21
22The struct fpga_image_info specifies what FPGA image to program. It is
23allocated/freed by :c:func:`fpga_image_info_alloc()` and freed with
24:c:func:`fpga_image_info_free()`
25
26How to program an FPGA using a region
27-------------------------------------
28
29When the FPGA region driver probed, it was given a pointer to an FPGA manager
30driver so it knows which manager to use. The region also either has a list of
31bridges to control during programming or it has a pointer to a function that
32will generate that list. Here's some sample code of what to do next::
33
34 #include <linux/fpga/fpga-mgr.h>
35 #include <linux/fpga/fpga-region.h>
36
37 struct fpga_image_info *info;
38 int ret;
39
40 /*
41 * First, alloc the struct with information about the FPGA image to
42 * program.
43 */
44 info = fpga_image_info_alloc(dev);
45 if (!info)
46 return -ENOMEM;
47
48 /* Set flags as needed, such as: */
49 info->flags = FPGA_MGR_PARTIAL_RECONFIG;
50
51 /*
52 * Indicate where the FPGA image is. This is pseudo-code; you're
53 * going to use one of these three.
54 */
55 if (image is in a scatter gather table) {
56
57 info->sgt = [your scatter gather table]
58
59 } else if (image is in a buffer) {
60
61 info->buf = [your image buffer]
62 info->count = [image buffer size]
63
64 } else if (image is in a firmware file) {
65
66 info->firmware_name = devm_kstrdup(dev, firmware_name,
67 GFP_KERNEL);
68
69 }
70
71 /* Add info to region and do the programming */
72 region->info = info;
73 ret = fpga_region_program_fpga(region);
74
75 /* Deallocate the image info if you're done with it */
76 region->info = NULL;
77 fpga_image_info_free(info);
78
79 if (ret)
80 return ret;
81
82 /* Now enumerate whatever hardware has appeared in the FPGA. */
83
84API for programming an FPGA
85---------------------------
86
87* :c:func:`fpga_region_program_fpga` — Program an FPGA
88* :c:type:`fpga_image_info` — Specifies what FPGA image to program
89* :c:func:`fpga_image_info_alloc()` — Allocate an FPGA image info struct
90* :c:func:`fpga_image_info_free()` — Free an FPGA image info struct
91
92.. kernel-doc:: drivers/fpga/fpga-region.c
93 :functions: fpga_region_program_fpga
94
95FPGA Manager flags
96
97.. kernel-doc:: include/linux/fpga/fpga-mgr.h
98 :doc: FPGA Manager flags
99
100.. kernel-doc:: include/linux/fpga/fpga-mgr.h
101 :functions: fpga_image_info
102
103.. kernel-doc:: drivers/fpga/fpga-mgr.c
104 :functions: fpga_image_info_alloc
105
106.. kernel-doc:: drivers/fpga/fpga-mgr.c
107 :functions: fpga_image_info_free
Documentation/driver-api/fpga/fpga-region.rst+46−45
@@ -34,41 +34,6 @@ fpga_image_info including: · 33 unmodified lines
34 * flags indicating specifics such as whether the image is for partial34 * flags indicating specifics such as whether the image is for partial
35 reconfiguration.35 reconfiguration.
36 36
37How to program an FPGA using a region
38-------------------------------------
39
40First, allocate the info struct::
41
42 info = fpga_image_info_alloc(dev);
43 if (!info)
44 return -ENOMEM;
45
46Set flags as needed, i.e.::
47
48 info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
49
50Point to your FPGA image, such as::
51
52 info->sgt = &sgt;
53
54Add info to region and do the programming::
55
56 region->info = info;
57 ret = fpga_region_program_fpga(region);
58
59:c:func:`fpga_region_program_fpga()` operates on info passed in the
60fpga_image_info (region->info). This function will attempt to:
61
62 * lock the region's mutex
63 * lock the region's FPGA manager
64 * build a list of FPGA bridges if a method has been specified to do so
65 * disable the bridges
66 * program the FPGA
67 * re-enable the bridges
68 * release the locks
69
70Then you will want to enumerate whatever hardware has appeared in the FPGA.
71
72How to add a new FPGA region37How to add a new FPGA region
73----------------------------38----------------------------
74 39
@@ -77,26 +42,62 @@ An example of usage can be seen in the probe function of [#f2]_. · 2 unmodified lines
77.. [#f1] ../devicetree/bindings/fpga/fpga-region.txt42.. [#f1] ../devicetree/bindings/fpga/fpga-region.txt
78.. [#f2] ../../drivers/fpga/of-fpga-region.c43.. [#f2] ../../drivers/fpga/of-fpga-region.c
79 44
80API to program an FPGA
81----------------------
82
83.. kernel-doc:: drivers/fpga/fpga-region.c
84 :functions: fpga_region_program_fpga
85
86API to add a new FPGA region45API to add a new FPGA region
87----------------------------46----------------------------
88 47
48* struct :c:type:`fpga_region` — The FPGA region struct
49* :c:func:`devm_fpga_region_create` — Allocate and init a region struct
50* :c:func:`fpga_region_register` — Register an FPGA region
51* :c:func:`fpga_region_unregister` — Unregister an FPGA region
52
53The FPGA region's probe function will need to get a reference to the FPGA
54Manager it will be using to do the programming. This usually would happen
55during the region's probe function.
56
57* :c:func:`fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count
58* :c:func:`of_fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count,
59 given a device node.
60* :c:func:`fpga_mgr_put` — Put an FPGA manager
61
62The FPGA region will need to specify which bridges to control while programming
63the FPGA. The region driver can build a list of bridges during probe time
64(:c:member:`fpga_region->bridge_list`) or it can have a function that creates
65the list of bridges to program just before programming
66(:c:member:`fpga_region->get_bridges`). The FPGA bridge framework supplies the
67following APIs to handle building or tearing down that list.
68
69* :c:func:`fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a
70 list
71* :c:func:`of_fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a
72 list, given a device node
73* :c:func:`fpga_bridges_put` — Given a list of bridges, put them
74
89.. kernel-doc:: include/linux/fpga/fpga-region.h75.. kernel-doc:: include/linux/fpga/fpga-region.h
90 :functions: fpga_region76 :functions: fpga_region
91 77
92.. kernel-doc:: drivers/fpga/fpga-region.c78.. kernel-doc:: drivers/fpga/fpga-region.c
93 :functions: fpga_region_create79 :functions: devm_fpga_region_create
94
95.. kernel-doc:: drivers/fpga/fpga-region.c
96 :functions: fpga_region_free
97 80
98.. kernel-doc:: drivers/fpga/fpga-region.c81.. kernel-doc:: drivers/fpga/fpga-region.c
99 :functions: fpga_region_register82 :functions: fpga_region_register
100 83
101.. kernel-doc:: drivers/fpga/fpga-region.c84.. kernel-doc:: drivers/fpga/fpga-region.c
102 :functions: fpga_region_unregister85 :functions: fpga_region_unregister
86
87.. kernel-doc:: drivers/fpga/fpga-mgr.c
88 :functions: fpga_mgr_get
89
90.. kernel-doc:: drivers/fpga/fpga-mgr.c
91 :functions: of_fpga_mgr_get
92
93.. kernel-doc:: drivers/fpga/fpga-mgr.c
94 :functions: fpga_mgr_put
95
96.. kernel-doc:: drivers/fpga/fpga-bridge.c
97 :functions: fpga_bridge_get_to_list
98
99.. kernel-doc:: drivers/fpga/fpga-bridge.c
100 :functions: of_fpga_bridge_get_to_list
101
102.. kernel-doc:: drivers/fpga/fpga-bridge.c
103 :functions: fpga_bridges_put
Documentation/driver-api/fpga/index.rst+2−0
@@ -11,3 +11,5 @@ FPGA Subsystem · 10 unmodified lines
11 fpga-mgr11 fpga-mgr
12 fpga-bridge12 fpga-bridge
13 fpga-region13 fpga-region
14 fpga-programming
15
Documentation/driver-api/fpga/intro.rst+1−1
@@ -44,7 +44,7 @@ FPGA Region · 43 unmodified lines
44-----------44-----------
45 45
46If you are adding a new interface to the FPGA framework, add it on top46If you are adding a new interface to the FPGA framework, add it on top
47of an FPGA region to allow the most reuse of your interface.47of an FPGA region.
48 48
49The FPGA Region framework (fpga-region.c) associates managers and49The FPGA Region framework (fpga-region.c) associates managers and
50bridges as reconfigurable regions. A region may refer to the whole50bridges as reconfigurable regions. A region may refer to the whole
Documentation/driver-api/gpio/board.rst+24−0
@@ -193,3 +193,27 @@ And the table can be added to the board code as follows:: · 192 unmodified lines
193 193
194The line will be hogged as soon as the gpiochip is created or - in case the194The line will be hogged as soon as the gpiochip is created or - in case the
195chip was created earlier - when the hog table is registered.195chip was created earlier - when the hog table is registered.
196
197Arrays of pins
198--------------
199In addition to requesting pins belonging to a function one by one, a device may
200also request an array of pins assigned to the function. The way those pins are
201mapped to the device determines if the array qualifies for fast bitmap
202processing. If yes, a bitmap is passed over get/set array functions directly
203between a caller and a respective .get/set_multiple() callback of a GPIO chip.
204
205In order to qualify for fast bitmap processing, the array must meet the
206following requirements:
207- pin hardware number of array member 0 must also be 0,
208- pin hardware numbers of consecutive array members which belong to the same
209 chip as member 0 does must also match their array indexes.
210
211Otherwise fast bitmap processing path is not used in order to avoid consecutive
212pins which belong to the same chip but are not in hardware order being processed
213separately.
214
215If the array applies for fast bitmap processing path, pins which belong to
216different chips than member 0 does, as well as those with indexes different from
217their hardware pin numbers, are excluded from the fast path, both input and
218output. Moreover, open drain and open source pins are excluded from fast bitmap
219output processing.
Documentation/driver-api/gpio/consumer.rst+42−22
@@ -109,9 +109,11 @@ For a function using multiple GPIOs all of those can be obtained with one call:: · 108 unmodified lines
109 enum gpiod_flags flags)109 enum gpiod_flags flags)
110 110
111This function returns a struct gpio_descs which contains an array of111This function returns a struct gpio_descs which contains an array of
112descriptors::112descriptors. It also contains a pointer to a gpiolib private structure which,
113if passed back to get/set array functions, may speed up I/O proocessing::
113 114
114 struct gpio_descs {115 struct gpio_descs {
116 struct gpio_array *info;
115 unsigned int ndescs;117 unsigned int ndescs;
116 struct gpio_desc *desc[];118 struct gpio_desc *desc[];
117 }119 }
@@ -323,29 +325,37 @@ The following functions get or set the values of an array of GPIOs:: · 205 unmodified lines
323 325
324 int gpiod_get_array_value(unsigned int array_size,326 int gpiod_get_array_value(unsigned int array_size,
325 struct gpio_desc **desc_array,327 struct gpio_desc **desc_array,
326 int *value_array);328 struct gpio_array *array_info,
329 unsigned long *value_bitmap);
327 int gpiod_get_raw_array_value(unsigned int array_size,330 int gpiod_get_raw_array_value(unsigned int array_size,
328 struct gpio_desc **desc_array,331 struct gpio_desc **desc_array,
329 int *value_array);332 struct gpio_array *array_info,
333 unsigned long *value_bitmap);
330 int gpiod_get_array_value_cansleep(unsigned int array_size,334 int gpiod_get_array_value_cansleep(unsigned int array_size,
331 struct gpio_desc **desc_array,335 struct gpio_desc **desc_array,
332 int *value_array);336 struct gpio_array *array_info,
337 unsigned long *value_bitmap);
333 int gpiod_get_raw_array_value_cansleep(unsigned int array_size,338 int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
334 struct gpio_desc **desc_array,339 struct gpio_desc **desc_array,
335 int *value_array);340 struct gpio_array *array_info,
336 341 unsigned long *value_bitmap);
337 void gpiod_set_array_value(unsigned int array_size,342
338 struct gpio_desc **desc_array,343 int gpiod_set_array_value(unsigned int array_size,
339 int *value_array)344 struct gpio_desc **desc_array,
340 void gpiod_set_raw_array_value(unsigned int array_size,345 struct gpio_array *array_info,
341 struct gpio_desc **desc_array,346 unsigned long *value_bitmap)
342 int *value_array)347 int gpiod_set_raw_array_value(unsigned int array_size,
343 void gpiod_set_array_value_cansleep(unsigned int array_size,348 struct gpio_desc **desc_array,
344 struct gpio_desc **desc_array,349 struct gpio_array *array_info,
345 int *value_array)350 unsigned long *value_bitmap)
346 void gpiod_set_raw_array_value_cansleep(unsigned int array_size,351 int gpiod_set_array_value_cansleep(unsigned int array_size,
347 struct gpio_desc **desc_array,352 struct gpio_desc **desc_array,
348 int *value_array)353 struct gpio_array *array_info,
354 unsigned long *value_bitmap)
355 int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
356 struct gpio_desc **desc_array,
357 struct gpio_array *array_info,
358 unsigned long *value_bitmap)
349 359
350The array can be an arbitrary set of GPIOs. The functions will try to access360The array can be an arbitrary set of GPIOs. The functions will try to access
351GPIOs belonging to the same bank or chip simultaneously if supported by the361GPIOs belonging to the same bank or chip simultaneously if supported by the
@@ -356,8 +366,9 @@ accessed sequentially. · 4 unmodified lines
356The functions take three arguments:366The functions take three arguments:
357 * array_size - the number of array elements367 * array_size - the number of array elements
358 * desc_array - an array of GPIO descriptors368 * desc_array - an array of GPIO descriptors
359 * value_array - an array to store the GPIOs' values (get) or369 * array_info - optional information obtained from gpiod_array_get()
360 an array of values to assign to the GPIOs (set)370 * value_bitmap - a bitmap to store the GPIOs' values (get) or
371 a bitmap of values to assign to the GPIOs (set)
361 372
362The descriptor array can be obtained using the gpiod_get_array() function373The descriptor array can be obtained using the gpiod_get_array() function
363or one of its variants. If the group of descriptors returned by that function374or one of its variants. If the group of descriptors returned by that function
@@ -366,16 +377,25 @@ the struct gpio_descs returned by gpiod_get_array():: · 2 unmodified lines
366 377
367 struct gpio_descs *my_gpio_descs = gpiod_get_array(...);378 struct gpio_descs *my_gpio_descs = gpiod_get_array(...);
368 gpiod_set_array_value(my_gpio_descs->ndescs, my_gpio_descs->desc,379 gpiod_set_array_value(my_gpio_descs->ndescs, my_gpio_descs->desc,
369 my_gpio_values);380 my_gpio_descs->info, my_gpio_value_bitmap);
370 381
371It is also possible to access a completely arbitrary array of descriptors. The382It is also possible to access a completely arbitrary array of descriptors. The
372descriptors may be obtained using any combination of gpiod_get() and383descriptors may be obtained using any combination of gpiod_get() and
373gpiod_get_array(). Afterwards the array of descriptors has to be setup384gpiod_get_array(). Afterwards the array of descriptors has to be setup
374manually before it can be passed to one of the above functions.385manually before it can be passed to one of the above functions. In that case,
386array_info should be set to NULL.
375 387
376Note that for optimal performance GPIOs belonging to the same chip should be388Note that for optimal performance GPIOs belonging to the same chip should be
377contiguous within the array of descriptors.389contiguous within the array of descriptors.
378 390
391Still better performance may be achieved if array indexes of the descriptors
392match hardware pin numbers of a single chip. If an array passed to a get/set
393array function matches the one obtained from gpiod_get_array() and array_info
394associated with the array is also passed, the function may take a fast bitmap
395processing path, passing the value_bitmap argument directly to the respective
396.get/set_multiple() callback of the chip. That allows for utilization of GPIO
397banks as data I/O ports without much loss of performance.
398
379The return value of gpiod_get_array_value() and its variants is 0 on success399The return value of gpiod_get_array_value() and its variants is 0 on success
380or negative on error. Note the difference to gpiod_get_value(), which returns400or negative on error. Note the difference to gpiod_get_value(), which returns
3810 or 1 on success to convey the GPIO value. With the array functions, the GPIO4010 or 1 on success to convey the GPIO value. With the array functions, the GPIO
Documentation/driver-api/gpio/driver.rst+22−1
@@ -374,7 +374,28 @@ When implementing an irqchip inside a GPIO driver, these two functions should · 373 unmodified lines
374typically be called in the .startup() and .shutdown() callbacks from the374typically be called in the .startup() and .shutdown() callbacks from the
375irqchip.375irqchip.
376 376
377When using the gpiolib irqchip helpers, these callback are automatically377When using the gpiolib irqchip helpers, these callbacks are automatically
378assigned.
379
380
381Disabling and enabling IRQs
382---------------------------
383When a GPIO is used as an IRQ signal, then gpiolib also needs to know if
384the IRQ is enabled or disabled. In order to inform gpiolib about this,
385a driver should call::
386
387 void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
388
389This allows drivers to drive the GPIO as an output while the IRQ is
390disabled. When the IRQ is enabled again, a driver should call::
391
392 void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
393
394When implementing an irqchip inside a GPIO driver, these two functions should
395typically be called in the .irq_disable() and .irq_enable() callbacks from the
396irqchip.
397
398When using the gpiolib irqchip helpers, these callbacks are automatically
378assigned.399assigned.
379 400
380Real-Time compliance for GPIO IRQ chips401Real-Time compliance for GPIO IRQ chips
Documentation/driver-api/gpio/index.rst+1−1
@@ -38,7 +38,7 @@ Device tree support · 37 unmodified lines
38Device-managed API38Device-managed API
39==================39==================
40 40
41.. kernel-doc:: drivers/gpio/devres.c41.. kernel-doc:: drivers/gpio/gpiolib-devres.c
42 :export:42 :export:
43 43
44sysfs helpers44sysfs helpers
Documentation/driver-api/index.rst+2−1
@@ -29,7 +29,8 @@ available subsections can be seen below. · 28 unmodified lines
29 iio/index29 iio/index
30 input30 input
31 usb/index31 usb/index
32 pci32 firewire
33 pci/index
33 spi34 spi
34 i2c35 i2c
35 hsi36 hsi
Documentation/driver-api/mtdnand.rst+17−17
@@ -180,10 +180,10 @@ by a chip select decoder. · 179 unmodified lines
180 {180 {
181 struct nand_chip *this = mtd_to_nand(mtd);181 struct nand_chip *this = mtd_to_nand(mtd);
182 switch(cmd){182 switch(cmd){
183 case NAND_CTL_SETCLE: this->IO_ADDR_W |= CLE_ADRR_BIT; break;183 case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;
184 case NAND_CTL_CLRCLE: this->IO_ADDR_W &= ~CLE_ADRR_BIT; break;184 case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
185 case NAND_CTL_SETALE: this->IO_ADDR_W |= ALE_ADRR_BIT; break;185 case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;
186 case NAND_CTL_CLRALE: this->IO_ADDR_W &= ~ALE_ADRR_BIT; break;186 case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
187 }187 }
188 }188 }
189 189
@@ -197,7 +197,7 @@ to read back the state of the pin. The function has no arguments and · 7 unmodified lines
197should return 0, if the device is busy (R/B pin is low) and 1, if the197should return 0, if the device is busy (R/B pin is low) and 1, if the
198device is ready (R/B pin is high). If the hardware interface does not198device is ready (R/B pin is high). If the hardware interface does not
199give access to the ready busy pin, then the function must not be defined199give access to the ready busy pin, then the function must not be defined
200and the function pointer this->dev_ready is set to NULL.200and the function pointer this->legacy.dev_ready is set to NULL.
201 201
202Init function202Init function
203-------------203-------------
@@ -235,18 +235,18 @@ necessary information about the device. · 31 unmodified lines
235 }235 }
236 236
237 /* Set address of NAND IO lines */237 /* Set address of NAND IO lines */
238 this->IO_ADDR_R = baseaddr;238 this->legacy.IO_ADDR_R = baseaddr;
239 this->IO_ADDR_W = baseaddr;239 this->legacy.IO_ADDR_W = baseaddr;
240 /* Reference hardware control function */240 /* Reference hardware control function */
241 this->hwcontrol = board_hwcontrol;241 this->hwcontrol = board_hwcontrol;
242 /* Set command delay time, see datasheet for correct value */242 /* Set command delay time, see datasheet for correct value */
243 this->chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;243 this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;
244 /* Assign the device ready function, if available */244 /* Assign the device ready function, if available */
245 this->dev_ready = board_dev_ready;245 this->legacy.dev_ready = board_dev_ready;
246 this->eccmode = NAND_ECC_SOFT;246 this->eccmode = NAND_ECC_SOFT;
247 247
248 /* Scan to find existence of the device */248 /* Scan to find existence of the device */
249 if (nand_scan (board_mtd, 1)) {249 if (nand_scan (this, 1)) {
250 err = -ENXIO;250 err = -ENXIO;
251 goto out_ior;251 goto out_ior;
252 }252 }
@@ -277,7 +277,7 @@ unregisters the partitions in the MTD layer. · 24 unmodified lines
277 static void __exit board_cleanup (void)277 static void __exit board_cleanup (void)
278 {278 {
279 /* Release resources, unregister device */279 /* Release resources, unregister device */
280 nand_release (board_mtd);280 nand_release (mtd_to_nand(board_mtd));
281 281
282 /* unmap physical address */282 /* unmap physical address */
283 iounmap(baseaddr);283 iounmap(baseaddr);
@@ -336,17 +336,17 @@ connected to an address decoder. · 52 unmodified lines
336 struct nand_chip *this = mtd_to_nand(mtd);336 struct nand_chip *this = mtd_to_nand(mtd);
337 337
338 /* Deselect all chips */338 /* Deselect all chips */
339 this->IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;339 this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;
340 this->IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;340 this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
341 switch (chip) {341 switch (chip) {
342 case 0:342 case 0:
343 this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;343 this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;
344 this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;344 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
345 break;345 break;
346 ....346 ....
347 case n:347 case n:
348 this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;348 this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;
349 this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;349 this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
350 break;350 break;
351 }351 }
352 }352 }
Documentation/driver-api/pci/index.rst+22−0
@@ -0,0 +1,22 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3============================================
4The Linux PCI driver implementer's API guide
5============================================
6
7.. class:: toc-title
8
9 Table of contents
10
11.. toctree::
12 :maxdepth: 2
13
14 pci
15 p2pdma
16
17.. only:: subproject and html
18
19 Indices
20 =======
21
22 * :ref:`genindex`
Documentation/driver-api/pci/p2pdma.rst+145−0
@@ -0,0 +1,145 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3============================
4PCI Peer-to-Peer DMA Support
5============================
6
7The PCI bus has pretty decent support for performing DMA transfers
8between two devices on the bus. This type of transaction is henceforth
9called Peer-to-Peer (or P2P). However, there are a number of issues that
10make P2P transactions tricky to do in a perfectly safe way.
11
12One of the biggest issues is that PCI doesn't require forwarding
13transactions between hierarchy domains, and in PCIe, each Root Port
14defines a separate hierarchy domain. To make things worse, there is no
15simple way to determine if a given Root Complex supports this or not.
16(See PCIe r4.0, sec 1.3.1). Therefore, as of this writing, the kernel
17only supports doing P2P when the endpoints involved are all behind the
18same PCI bridge, as such devices are all in the same PCI hierarchy
19domain, and the spec guarantees that all transactions within the
20hierarchy will be routable, but it does not require routing
21between hierarchies.
22
23The second issue is that to make use of existing interfaces in Linux,
24memory that is used for P2P transactions needs to be backed by struct
25pages. However, PCI BARs are not typically cache coherent so there are
26a few corner case gotchas with these pages so developers need to
27be careful about what they do with them.
28
29
30Driver Writer's Guide
31=====================
32
33In a given P2P implementation there may be three or more different
34types of kernel drivers in play:
35
36* Provider - A driver which provides or publishes P2P resources like
37 memory or doorbell registers to other drivers.
38* Client - A driver which makes use of a resource by setting up a
39 DMA transaction to or from it.
40* Orchestrator - A driver which orchestrates the flow of data between
41 clients and providers.
42
43In many cases there could be overlap between these three types (i.e.,
44it may be typical for a driver to be both a provider and a client).
45
46For example, in the NVMe Target Copy Offload implementation:
47
48* The NVMe PCI driver is both a client, provider and orchestrator
49 in that it exposes any CMB (Controller Memory Buffer) as a P2P memory
50 resource (provider), it accepts P2P memory pages as buffers in requests
51 to be used directly (client) and it can also make use of the CMB as
52 submission queue entries (orchastrator).
53* The RDMA driver is a client in this arrangement so that an RNIC
54 can DMA directly to the memory exposed by the NVMe device.
55* The NVMe Target driver (nvmet) can orchestrate the data from the RNIC
56 to the P2P memory (CMB) and then to the NVMe device (and vice versa).
57
58This is currently the only arrangement supported by the kernel but
59one could imagine slight tweaks to this that would allow for the same
60functionality. For example, if a specific RNIC added a BAR with some
61memory behind it, its driver could add support as a P2P provider and
62then the NVMe Target could use the RNIC's memory instead of the CMB
63in cases where the NVMe cards in use do not have CMB support.
64
65
66Provider Drivers
67----------------
68
69A provider simply needs to register a BAR (or a portion of a BAR)
70as a P2P DMA resource using :c:func:`pci_p2pdma_add_resource()`.
71This will register struct pages for all the specified memory.
72
73After that it may optionally publish all of its resources as
74P2P memory using :c:func:`pci_p2pmem_publish()`. This will allow
75any orchestrator drivers to find and use the memory. When marked in
76this way, the resource must be regular memory with no side effects.
77
78For the time being this is fairly rudimentary in that all resources
79are typically going to be P2P memory. Future work will likely expand
80this to include other types of resources like doorbells.
81
82
83Client Drivers
84--------------
85
86A client driver typically only has to conditionally change its DMA map
87routine to use the mapping function :c:func:`pci_p2pdma_map_sg()` instead
88of the usual :c:func:`dma_map_sg()` function. Memory mapped in this
89way does not need to be unmapped.
90
91The client may also, optionally, make use of
92:c:func:`is_pci_p2pdma_page()` to determine when to use the P2P mapping
93functions and when to use the regular mapping functions. In some
94situations, it may be more appropriate to use a flag to indicate a
95given request is P2P memory and map appropriately. It is important to
96ensure that struct pages that back P2P memory stay out of code that
97does not have support for them as other code may treat the pages as
98regular memory which may not be appropriate.
99
100
101Orchestrator Drivers
102--------------------
103
104The first task an orchestrator driver must do is compile a list of
105all client devices that will be involved in a given transaction. For
106example, the NVMe Target driver creates a list including the namespace
107block device and the RNIC in use. If the orchestrator has access to
108a specific P2P provider to use it may check compatibility using
109:c:func:`pci_p2pdma_distance()` otherwise it may find a memory provider
110that's compatible with all clients using :c:func:`pci_p2pmem_find()`.
111If more than one provider is supported, the one nearest to all the clients will
112be chosen first. If more than one provider is an equal distance away, the
113one returned will be chosen at random (it is not an arbitrary but
114truely random). This function returns the PCI device to use for the provider
115with a reference taken and therefore when it's no longer needed it should be
116returned with pci_dev_put().
117
118Once a provider is selected, the orchestrator can then use
119:c:func:`pci_alloc_p2pmem()` and :c:func:`pci_free_p2pmem()` to
120allocate P2P memory from the provider. :c:func:`pci_p2pmem_alloc_sgl()`
121and :c:func:`pci_p2pmem_free_sgl()` are convenience functions for
122allocating scatter-gather lists with P2P memory.
123
124Struct Page Caveats
125-------------------
126
127Driver writers should be very careful about not passing these special
128struct pages to code that isn't prepared for it. At this time, the kernel
129interfaces do not have any checks for ensuring this. This obviously
130precludes passing these pages to userspace.
131
132P2P memory is also technically IO memory but should never have any side
133effects behind it. Thus, the order of loads and stores should not be important
134and ioreadX(), iowriteX() and friends should not be necessary.
135However, as the memory is not cache coherent, if access ever needs to
136be protected by a spinlock then :c:func:`mmiowb()` must be used before
137unlocking the lock. (See ACQUIRES VS I/O ACCESSES in
138Documentation/memory-barriers.txt)
139
140
141P2P DMA Support Library
142=======================
143
144.. kernel-doc:: drivers/pci/p2pdma.c
145 :export:
Documentation/driver-api/pci/pci.rstrenamed from Documentation/driver-api/pci.rst+0−0

File renamed without changes.

Documentation/driver-api/soundwire/stream.rst+36−0
@@ -101,6 +101,34 @@ interface. :: · 100 unmodified lines
101 +--------------------+ | |101 +--------------------+ | |
102 +----------------+102 +----------------+
103 103
104Example 5: Stereo Stream with L and R channel is rendered by 2 Masters, each
105rendering one channel, and is received by two different Slaves, each
106receiving one channel. Both Masters and both Slaves are using single port. ::
107
108 +---------------+ Clock Signal +---------------+
109 | Master +----------------------------------+ Slave |
110 | Interface | | Interface |
111 | 1 | | 1 |
112 | | Data Signal | |
113 | L +----------------------------------+ L |
114 | (Data) | Data Direction | (Data) |
115 +---------------+ +-----------------------> +---------------+
116
117 +---------------+ Clock Signal +---------------+
118 | Master +----------------------------------+ Slave |
119 | Interface | | Interface |
120 | 2 | | 2 |
121 | | Data Signal | |
122 | R +----------------------------------+ R |
123 | (Data) | Data Direction | (Data) |
124 +---------------+ +-----------------------> +---------------+
125
126Note: In multi-link cases like above, to lock, one would acquire a global
127lock and then go on locking bus instances. But, in this case the caller
128framework(ASoC DPCM) guarantees that stream operations on a card are
129always serialized. So, there is no race condition and hence no need for
130global lock.
131
104SoundWire Stream Management flow132SoundWire Stream Management flow
105================================133================================
106 134
@@ -174,6 +202,7 @@ per stream. From ASoC DPCM framework, this stream state maybe linked to · 67 unmodified lines
174.startup() operation.202.startup() operation.
175 203
176 .. code-block:: c204 .. code-block:: c
205
177 int sdw_alloc_stream(char * stream_name);206 int sdw_alloc_stream(char * stream_name);
178 207
179 208
@@ -200,6 +229,7 @@ only be invoked once by respective Master(s) and Slave(s). From ASoC DPCM · 20 unmodified lines
200framework, this stream state is linked to .hw_params() operation.229framework, this stream state is linked to .hw_params() operation.
201 230
202 .. code-block:: c231 .. code-block:: c
232
203 int sdw_stream_add_master(struct sdw_bus * bus,233 int sdw_stream_add_master(struct sdw_bus * bus,
204 struct sdw_stream_config * stream_config,234 struct sdw_stream_config * stream_config,
205 struct sdw_ports_config * ports_config,235 struct sdw_ports_config * ports_config,
@@ -245,6 +275,7 @@ stream. From ASoC DPCM framework, this stream state is linked to · 39 unmodified lines
245.prepare() operation.275.prepare() operation.
246 276
247 .. code-block:: c277 .. code-block:: c
278
248 int sdw_prepare_stream(struct sdw_stream_runtime * stream);279 int sdw_prepare_stream(struct sdw_stream_runtime * stream);
249 280
250 281
@@ -274,6 +305,7 @@ stream. From ASoC DPCM framework, this stream state is linked to · 23 unmodified lines
274.trigger() start operation.305.trigger() start operation.
275 306
276 .. code-block:: c307 .. code-block:: c
308
277 int sdw_enable_stream(struct sdw_stream_runtime * stream);309 int sdw_enable_stream(struct sdw_stream_runtime * stream);
278 310
279SDW_STREAM_DISABLED311SDW_STREAM_DISABLED
@@ -301,6 +333,7 @@ per stream. From ASoC DPCM framework, this stream state is linked to · 21 unmodified lines
301.trigger() stop operation.333.trigger() stop operation.
302 334
303 .. code-block:: c335 .. code-block:: c
336
304 int sdw_disable_stream(struct sdw_stream_runtime * stream);337 int sdw_disable_stream(struct sdw_stream_runtime * stream);
305 338
306 339
@@ -325,6 +358,7 @@ per stream. From ASoC DPCM framework, this stream state is linked to · 18 unmodified lines
325.trigger() stop operation.358.trigger() stop operation.
326 359
327 .. code-block:: c360 .. code-block:: c
361
328 int sdw_deprepare_stream(struct sdw_stream_runtime * stream);362 int sdw_deprepare_stream(struct sdw_stream_runtime * stream);
329 363
330 364
@@ -349,6 +383,7 @@ all the Master(s) and Slave(s) associated with stream. From ASoC DPCM · 18 unmodified lines
349framework, this stream state is linked to .hw_free() operation.383framework, this stream state is linked to .hw_free() operation.
350 384
351 .. code-block:: c385 .. code-block:: c
386
352 int sdw_stream_remove_master(struct sdw_bus * bus,387 int sdw_stream_remove_master(struct sdw_bus * bus,
353 struct sdw_stream_runtime * stream);388 struct sdw_stream_runtime * stream);
354 int sdw_stream_remove_slave(struct sdw_slave * slave,389 int sdw_stream_remove_slave(struct sdw_slave * slave,
@@ -361,6 +396,7 @@ stream assigned as part of ALLOCATED state. · 6 unmodified lines
361In .shutdown() the data structure maintaining stream state are freed up.396In .shutdown() the data structure maintaining stream state are freed up.
362 397
363 .. code-block:: c398 .. code-block:: c
399
364 void sdw_release_stream(struct sdw_stream_runtime * stream);400 void sdw_release_stream(struct sdw_stream_runtime * stream);
365 401
366Not Supported402Not Supported
Documentation/driver-api/uio-howto.rst+2−2
@@ -463,8 +463,8 @@ Getting information about your UIO device · 462 unmodified lines
463 463
464Information about all UIO devices is available in sysfs. The first thing464Information about all UIO devices is available in sysfs. The first thing
465you should do in your driver is check ``name`` and ``version`` to make465you should do in your driver is check ``name`` and ``version`` to make
466sure your talking to the right device and that its kernel driver has the466sure you're talking to the right device and that its kernel driver has
467version you expect.467the version you expect.
468 468
469You should also make sure that the memory mapping you need exists and469You should also make sure that the memory mapping you need exists and
470has the size you expect.470has the size you expect.
Documentation/efi-stub.txt+14−3
@@ -83,7 +83,18 @@ is passed to bzImage.efi. · 82 unmodified lines
83The "dtb=" option83The "dtb=" option
84-----------------84-----------------
85 85
86For the ARM and arm64 architectures, we also need to be able to provide a86For the ARM and arm64 architectures, a device tree must be provided to
87device tree to the kernel. This is done with the "dtb=" command line option,87the kernel. Normally firmware shall supply the device tree via the
88and is processed in the same manner as the "initrd=" option that is88EFI CONFIGURATION TABLE. However, the "dtb=" command line option can
89be used to override the firmware supplied device tree, or to supply
90one when firmware is unable to.
91
92Please note: Firmware adds runtime configuration information to the
93device tree before booting the kernel. If dtb= is used to override
94the device tree, then any runtime data provided by firmware will be
95lost. The dtb= option should only be used either as a debug tool, or
96as a last resort when a device tree is not provided in the EFI
97CONFIGURATION TABLE.
98
99"dtb=" is processed in the same manner as the "initrd=" option that is
89described above.100described above.
Documentation/fb/00-INDEX+0−75
@@ -1,75 +0,0 @@
1Index of files in Documentation/fb. If you think something about frame
2buffer devices needs an entry here, needs correction or you've written one
3please mail me.
4 Geert Uytterhoeven <geert@linux-m68k.org>
5
600-INDEX
7 - this file.
8api.txt
9 - The frame buffer API between applications and buffer devices.
10arkfb.txt
11 - info on the fbdev driver for ARK Logic chips.
12aty128fb.txt
13 - info on the ATI Rage128 frame buffer driver.
14cirrusfb.txt
15 - info on the driver for Cirrus Logic chipsets.
16cmap_xfbdev.txt
17 - an introduction to fbdev's cmap structures.
18deferred_io.txt
19 - an introduction to deferred IO.
20efifb.txt
21 - info on the EFI platform driver for Intel based Apple computers.
22ep93xx-fb.txt
23 - info on the driver for EP93xx LCD controller.
24fbcon.txt
25 - intro to and usage guide for the framebuffer console (fbcon).
26framebuffer.txt
27 - introduction to frame buffer devices.
28gxfb.txt
29 - info on the framebuffer driver for AMD Geode GX2 based processors.
30intel810.txt
31 - documentation for the Intel 810/815 framebuffer driver.
32intelfb.txt
33 - docs for Intel 830M/845G/852GM/855GM/865G/915G/945G fb driver.
34internals.txt
35 - quick overview of frame buffer device internals.
36lxfb.txt
37 - info on the framebuffer driver for AMD Geode LX based processors.
38matroxfb.txt
39 - info on the Matrox framebuffer driver for Alpha, Intel and PPC.
40metronomefb.txt
41 - info on the driver for the Metronome display controller.
42modedb.txt
43 - info on the video mode database.
44pvr2fb.txt
45 - info on the PowerVR 2 frame buffer driver.
46pxafb.txt
47 - info on the driver for the PXA25x LCD controller.
48s3fb.txt
49 - info on the fbdev driver for S3 Trio/Virge chips.
50sa1100fb.txt
51 - information about the driver for the SA-1100 LCD controller.
52sh7760fb.txt
53 - info on the SH7760/SH7763 integrated LCDC Framebuffer driver.
54sisfb.txt
55 - info on the framebuffer device driver for various SiS chips.
56sm501.txt
57 - info on the framebuffer device driver for sm501 videoframebuffer.
58sstfb.txt
59 - info on the frame buffer driver for 3dfx' Voodoo Graphics boards.
60tgafb.txt
61 - info on the TGA (DECChip 21030) frame buffer driver.
62tridentfb.txt
63 info on the framebuffer driver for some Trident chip based cards.
64udlfb.txt
65 - Driver for DisplayLink USB 2.0 chips.
66uvesafb.txt
67 - info on the userspace VESA (VBE2+ compliant) frame buffer device.
68vesafb.txt
69 - info on the VESA frame buffer device.
70viafb.modes
71 - list of modes for VIA Integration Graphic Chip.
72viafb.txt
73 - info on the VIA Integration Graphic Chip console framebuffer driver.
74vt8623fb.txt
75 - info on the fb driver for the graphics core in VIA VT8623 chipsets.
Documentation/fb/uvesafb.txt+3−2
@@ -15,7 +15,8 @@ than x86. Check the v86d documentation for a list of currently supported · 14 unmodified lines
15arches.15arches.
16 16
17v86d source code can be downloaded from the following website:17v86d source code can be downloaded from the following website:
18 http://dev.gentoo.org/~spock/projects/uvesafb18
19 https://github.com/mjanusz/v86d
19 20
20Please refer to the v86d documentation for detailed configuration and21Please refer to the v86d documentation for detailed configuration and
21installation instructions.22installation instructions.
@@ -177,7 +178,7 @@ from the Video BIOS if you set pixclock to 0 in fb_var_screeninfo. · 155 unmodified lines
177 178
178--179--
179 Michal Januszewski <spock@gentoo.org>180 Michal Januszewski <spock@gentoo.org>
180 Last updated: 2009-03-30181 Last updated: 2017-10-10
181 182
182 Documentation of the uvesafb options is loosely based on vesafb.txt.183 Documentation of the uvesafb options is loosely based on vesafb.txt.
183 184
Documentation/fb/vesafb.txt+2−2
@@ -114,11 +114,11 @@ to turn it on. · 113 unmodified lines
114 114
115You can pass options to vesafb using "video=vesafb:option" on115You can pass options to vesafb using "video=vesafb:option" on
116the kernel command line. Multiple options should be separated116the kernel command line. Multiple options should be separated
117by comma, like this: "video=vesafb:ypan,invers"117by comma, like this: "video=vesafb:ypan,inverse"
118 118
119Accepted options:119Accepted options:
120 120
121invers no comment...121inverse use inverse color map
122 122
123ypan enable display panning using the VESA protected mode 123ypan enable display panning using the VESA protected mode
124 interface. The visible screen is just a window of the124 interface. The visible screen is just a window of the
Documentation/filesystems/00-INDEX+0−153
@@ -1,153 +0,0 @@
100-INDEX
2 - this file (info on some of the filesystems supported by linux).
3Locking
4 - info on locking rules as they pertain to Linux VFS.
59p.txt
6 - 9p (v9fs) is an implementation of the Plan 9 remote fs protocol.
7adfs.txt
8 - info and mount options for the Acorn Advanced Disc Filing System.
9afs.txt
10 - info and examples for the distributed AFS (Andrew File System) fs.
11affs.txt
12 - info and mount options for the Amiga Fast File System.
13autofs-mount-control.txt
14 - info on device control operations for autofs module.
15automount-support.txt
16 - information about filesystem automount support.
17befs.txt
18 - information about the BeOS filesystem for Linux.
19bfs.txt
20 - info for the SCO UnixWare Boot Filesystem (BFS).
21btrfs.txt
22 - info for the BTRFS filesystem.
23caching/
24 - directory containing filesystem cache documentation.
25ceph.txt
26 - info for the Ceph Distributed File System.
27cifs/
28 - directory containing CIFS filesystem documentation and example code.
29coda.txt
30 - description of the CODA filesystem.
31configfs/
32 - directory containing configfs documentation and example code.
33cramfs.txt
34 - info on the cram filesystem for small storage (ROMs etc).
35dax.txt
36 - info on avoiding the page cache for files stored on CPU-addressable
37 storage devices.
38debugfs.txt
39 - info on the debugfs filesystem.
40devpts.txt
41 - info on the devpts filesystem.
42directory-locking
43 - info about the locking scheme used for directory operations.
44dlmfs.txt
45 - info on the userspace interface to the OCFS2 DLM.
46dnotify.txt
47 - info about directory notification in Linux.
48dnotify_test.c
49 - example program for dnotify.
50ecryptfs.txt
51 - docs on eCryptfs: stacked cryptographic filesystem for Linux.
52efivarfs.txt
53 - info for the efivarfs filesystem.
54exofs.txt
55 - info, usage, mount options, design about EXOFS.
56ext2.txt
57 - info, mount options and specifications for the Ext2 filesystem.
58ext3.txt
59 - info, mount options and specifications for the Ext3 filesystem.
60ext4.txt
61 - info, mount options and specifications for the Ext4 filesystem.
62f2fs.txt
63 - info and mount options for the F2FS filesystem.
64fiemap.txt
65 - info on fiemap ioctl.
66files.txt
67 - info on file management in the Linux kernel.
68fuse.txt
69 - info on the Filesystem in User SpacE including mount options.
70gfs2-glocks.txt
71 - info on the Global File System 2 - Glock internal locking rules.
72gfs2-uevents.txt
73 - info on the Global File System 2 - uevents.
74gfs2.txt
75 - info on the Global File System 2.
76hfs.txt
77 - info on the Macintosh HFS Filesystem for Linux.
78hfsplus.txt
79 - info on the Macintosh HFSPlus Filesystem for Linux.
80hpfs.txt
81 - info and mount options for the OS/2 HPFS.
82inotify.txt
83 - info on the powerful yet simple file change notification system.
84isofs.txt
85 - info and mount options for the ISO 9660 (CDROM) filesystem.
86jfs.txt
87 - info and mount options for the JFS filesystem.
88locks.txt
89 - info on file locking implementations, flock() vs. fcntl(), etc.
90mandatory-locking.txt
91 - info on the Linux implementation of Sys V mandatory file locking.
92nfs/
93 - nfs-related documentation.
94nilfs2.txt
95 - info and mount options for the NILFS2 filesystem.
96ntfs.txt
97 - info and mount options for the NTFS filesystem (Windows NT).
98ocfs2.txt
99 - info and mount options for the OCFS2 clustered filesystem.
100omfs.txt
101 - info on the Optimized MPEG FileSystem.
102path-lookup.txt
103 - info on path walking and name lookup locking.
104pohmelfs/
105 - directory containing pohmelfs filesystem documentation.
106porting
107 - various information on filesystem porting.
108proc.txt
109 - info on Linux's /proc filesystem.
110qnx6.txt
111 - info on the QNX6 filesystem.
112quota.txt
113 - info on Quota subsystem.
114ramfs-rootfs-initramfs.txt
115 - info on the 'in memory' filesystems ramfs, rootfs and initramfs.
116relay.txt
117 - info on relay, for efficient streaming from kernel to user space.
118romfs.txt
119 - description of the ROMFS filesystem.
120seq_file.txt
121 - how to use the seq_file API.
122sharedsubtree.txt
123 - a description of shared subtrees for namespaces.
124spufs.txt
125 - info and mount options for the SPU filesystem used on Cell.
126squashfs.txt
127 - info on the squashfs filesystem.
128sysfs-pci.txt
129 - info on accessing PCI device resources through sysfs.
130sysfs-tagging.txt
131 - info on sysfs tagging to avoid duplicates.
132sysfs.txt
133 - info on sysfs, a ram-based filesystem for exporting kernel objects.
134sysv-fs.txt
135 - info on the SystemV/V7/Xenix/Coherent filesystem.
136tmpfs.txt
137 - info on tmpfs, a filesystem that holds all files in virtual memory.
138ubifs.txt
139 - info on the Unsorted Block Images FileSystem.
140udf.txt
141 - info and mount options for the UDF filesystem.
142ufs.txt
143 - info on the ufs filesystem.
144vfat.txt
145 - info on using the VFAT filesystem used in Windows NT and Windows 95.
146vfs.txt
147 - overview of the Virtual File System.
148xfs-delayed-logging-design.txt
149 - info on the XFS Delayed Logging Design.
150xfs-self-describing-metadata.txt
151 - info on XFS Self Describing Metadata.
152xfs.txt
153 - info and mount options for the XFS filesystem.
Documentation/filesystems/ceph.txt+5−0
@@ -151,6 +151,11 @@ Mount Options · 150 unmodified lines
151 Report overall filesystem usage in statfs instead of using the root151 Report overall filesystem usage in statfs instead of using the root
152 directory quota.152 directory quota.
153 153
154 nocopyfrom
155 Don't use the RADOS 'copy-from' operation to perform remote object
156 copies. Currently, it's only used in copy_file_range, which will revert
157 to the default VFS implementation if this option is used.
158
154More Information159More Information
155================160================
156 161
Documentation/filesystems/dax.txt+1−1
@@ -75,7 +75,7 @@ exposure of uninitialized data through mmap. · 74 unmodified lines
75 75
76These filesystems may be used for inspiration:76These filesystems may be used for inspiration:
77- ext2: see Documentation/filesystems/ext2.txt77- ext2: see Documentation/filesystems/ext2.txt
78- ext4: see Documentation/filesystems/ext4.txt78- ext4: see Documentation/filesystems/ext4/ext4.rst
79- xfs: see Documentation/filesystems/xfs.txt79- xfs: see Documentation/filesystems/xfs.txt
80 80
81 81
Documentation/filesystems/ext2.txt+1−1
@@ -358,7 +358,7 @@ and are copied into the filesystem. If a transaction is incomplete at · 357 unmodified lines
358the time of the crash, then there is no guarantee of consistency for358the time of the crash, then there is no guarantee of consistency for
359the blocks in that transaction so they are discarded (which means any359the blocks in that transaction so they are discarded (which means any
360filesystem changes they represent are also lost).360filesystem changes they represent are also lost).
361Check Documentation/filesystems/ext4.txt if you want to read more about361Check Documentation/filesystems/ext4/ext4.rst if you want to read more about
362ext4 and journaling.362ext4 and journaling.
363 363
364References364References
Documentation/filesystems/ext4/about.rstrenamed from Documentation/filesystems/ext4/ondisk/about.rst+0−0

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@@ -30,7 +30,7 @@ Extended attributes, when stored after the inode, have a header · 29 unmodified lines
30``ext4_xattr_ibody_header`` that is 4 bytes long:30``ext4_xattr_ibody_header`` that is 4 bytes long:
31 31
32.. list-table::32.. list-table::
33 :widths: 1 1 1 7733 :widths: 8 8 24 40
34 :header-rows: 134 :header-rows: 1
35 35
36 * - Offset36 * - Offset
@@ -47,7 +47,7 @@ The beginning of an extended attribute block is in · 10 unmodified lines
47``struct ext4_xattr_header``, which is 32 bytes long:47``struct ext4_xattr_header``, which is 32 bytes long:
48 48
49.. list-table::49.. list-table::
50 :widths: 1 1 1 7750 :widths: 8 8 24 40
51 :header-rows: 151 :header-rows: 1
52 52
53 * - Offset53 * - Offset
@@ -92,7 +92,7 @@ entries must be stored in sorted order. The sort order is · 38 unmodified lines
92Attributes stored inside an inode do not need be stored in sorted order.92Attributes stored inside an inode do not need be stored in sorted order.
93 93
94.. list-table::94.. list-table::
95 :widths: 1 1 1 7795 :widths: 8 8 24 40
96 :header-rows: 196 :header-rows: 1
97 97
98 * - Offset98 * - Offset
@@ -157,7 +157,7 @@ attribute name index field is set, and matching string is removed from · 58 unmodified lines
157the key name. Here is a map of name index values to key prefixes:157the key name. Here is a map of name index values to key prefixes:
158 158
159.. list-table::159.. list-table::
160 :widths: 1 79160 :widths: 16 64
161 :header-rows: 1161 :header-rows: 1
162 162
163 * - Name Index163 * - Name Index
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Documentation/filesystems/ext4/checksums.rstrenamed from Documentation/filesystems/ext4/ondisk/checksums.rst+1−1
@@ -28,7 +28,7 @@ of checksum. The checksum function is whatever the superblock describes · 27 unmodified lines
28(crc32c as of October 2013) unless noted otherwise.28(crc32c as of October 2013) unless noted otherwise.
29 29
30.. list-table::30.. list-table::
31 :widths: 1 1 431 :widths: 20 8 50
32 :header-rows: 132 :header-rows: 1
33 33
34 * - Metadata34 * - Metadata
Documentation/filesystems/ext4/directory.rstrenamed from Documentation/filesystems/ext4/ondisk/directory.rst+9−9
@@ -34,7 +34,7 @@ is at most 263 bytes long, though on disk you'll need to reference · 33 unmodified lines
34``dirent.rec_len`` to know for sure.34``dirent.rec_len`` to know for sure.
35 35
36.. list-table::36.. list-table::
37 :widths: 1 1 1 7737 :widths: 8 8 24 40
38 :header-rows: 138 :header-rows: 1
39 39
40 * - Offset40 * - Offset
@@ -66,7 +66,7 @@ tree traversal. This format is ``ext4_dir_entry_2``, which is at most · 25 unmodified lines
66``dirent.rec_len`` to know for sure.66``dirent.rec_len`` to know for sure.
67 67
68.. list-table::68.. list-table::
69 :widths: 1 1 1 7769 :widths: 8 8 24 40
70 :header-rows: 170 :header-rows: 1
71 71
72 * - Offset72 * - Offset
@@ -99,7 +99,7 @@ tree traversal. This format is ``ext4_dir_entry_2``, which is at most · 26 unmodified lines
99The directory file type is one of the following values:99The directory file type is one of the following values:
100 100
101.. list-table::101.. list-table::
102 :widths: 1 79102 :widths: 16 64
103 :header-rows: 1103 :header-rows: 1
104 104
105 * - Value105 * - Value
@@ -130,7 +130,7 @@ in the place where the name normally goes. The structure is · 24 unmodified lines
130``struct ext4_dir_entry_tail``:130``struct ext4_dir_entry_tail``:
131 131
132.. list-table::132.. list-table::
133 :widths: 1 1 1 77133 :widths: 8 8 24 40
134 :header-rows: 1134 :header-rows: 1
135 135
136 * - Offset136 * - Offset
@@ -212,7 +212,7 @@ The root of the htree is in ``struct dx_root``, which is the full length · 75 unmodified lines
212of a data block:212of a data block:
213 213
214.. list-table::214.. list-table::
215 :widths: 1 1 1 77215 :widths: 8 8 24 40
216 :header-rows: 1216 :header-rows: 1
217 217
218 * - Offset218 * - Offset
@@ -305,7 +305,7 @@ of a data block: · 86 unmodified lines
305The directory hash is one of the following values:305The directory hash is one of the following values:
306 306
307.. list-table::307.. list-table::
308 :widths: 1 79308 :widths: 16 64
309 :header-rows: 1309 :header-rows: 1
310 310
311 * - Value311 * - Value
@@ -327,7 +327,7 @@ Interior nodes of an htree are recorded as ``struct dx_node``, which is · 15 unmodified lines
327also the full length of a data block:327also the full length of a data block:
328 328
329.. list-table::329.. list-table::
330 :widths: 1 1 1 77330 :widths: 8 8 24 40
331 :header-rows: 1331 :header-rows: 1
332 332
333 * - Offset333 * - Offset
@@ -375,7 +375,7 @@ The hash maps that exist in both ``struct dx_root`` and · 41 unmodified lines
375long:375long:
376 376
377.. list-table::377.. list-table::
378 :widths: 1 1 1 77378 :widths: 8 8 24 40
379 :header-rows: 1379 :header-rows: 1
380 380
381 * - Offset381 * - Offset
@@ -405,7 +405,7 @@ directory index (which will ensure that there's space for the checksum. · 23 unmodified lines
405The dx\_tail structure is 8 bytes long and looks like this:405The dx\_tail structure is 8 bytes long and looks like this:
406 406
407.. list-table::407.. list-table::
408 :widths: 1 1 1 77408 :widths: 8 8 24 40
409 :header-rows: 1409 :header-rows: 1
410 410
411 * - Offset411 * - Offset
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Documentation/filesystems/ext4/ext4.rst+0−613
@@ -1,613 +0,0 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3========================
4General Information
5========================
6
7Ext4 is an advanced level of the ext3 filesystem which incorporates
8scalability and reliability enhancements for supporting large filesystems
9(64 bit) in keeping with increasing disk capacities and state-of-the-art
10feature requirements.
11
12Mailing list: linux-ext4@vger.kernel.org
13Web site: http://ext4.wiki.kernel.org
14
15
16Quick usage instructions
17========================
18
19Note: More extensive information for getting started with ext4 can be
20found at the ext4 wiki site at the URL:
21http://ext4.wiki.kernel.org/index.php/Ext4_Howto
22
23 - The latest version of e2fsprogs can be found at:
24
25 https://www.kernel.org/pub/linux/kernel/people/tytso/e2fsprogs/
26
27 or
28
29 http://sourceforge.net/project/showfiles.php?group_id=2406
30
31 or grab the latest git repository from:
32
33 https://git.kernel.org/pub/scm/fs/ext2/e2fsprogs.git
34
35 - Create a new filesystem using the ext4 filesystem type:
36
37 # mke2fs -t ext4 /dev/hda1
38
39 Or to configure an existing ext3 filesystem to support extents:
40
41 # tune2fs -O extents /dev/hda1
42
43 If the filesystem was created with 128 byte inodes, it can be
44 converted to use 256 byte for greater efficiency via:
45
46 # tune2fs -I 256 /dev/hda1
47
48 - Mounting:
49
50 # mount -t ext4 /dev/hda1 /wherever
51
52 - When comparing performance with other filesystems, it's always
53 important to try multiple workloads; very often a subtle change in a
54 workload parameter can completely change the ranking of which
55 filesystems do well compared to others. When comparing versus ext3,
56 note that ext4 enables write barriers by default, while ext3 does
57 not enable write barriers by default. So it is useful to use
58 explicitly specify whether barriers are enabled or not when via the
59 '-o barriers=[0|1]' mount option for both ext3 and ext4 filesystems
60 for a fair comparison. When tuning ext3 for best benchmark numbers,
61 it is often worthwhile to try changing the data journaling mode; '-o
62 data=writeback' can be faster for some workloads. (Note however that
63 running mounted with data=writeback can potentially leave stale data
64 exposed in recently written files in case of an unclean shutdown,
65 which could be a security exposure in some situations.) Configuring
66 the filesystem with a large journal can also be helpful for
67 metadata-intensive workloads.
68
69Features
70========
71
72Currently Available
73-------------------
74
75* ability to use filesystems > 16TB (e2fsprogs support not available yet)
76* extent format reduces metadata overhead (RAM, IO for access, transactions)
77* extent format more robust in face of on-disk corruption due to magics,
78* internal redundancy in tree
79* improved file allocation (multi-block alloc)
80* lift 32000 subdirectory limit imposed by i_links_count[1]
81* nsec timestamps for mtime, atime, ctime, create time
82* inode version field on disk (NFSv4, Lustre)
83* reduced e2fsck time via uninit_bg feature
84* journal checksumming for robustness, performance
85* persistent file preallocation (e.g for streaming media, databases)
86* ability to pack bitmaps and inode tables into larger virtual groups via the
87 flex_bg feature
88* large file support
89* inode allocation using large virtual block groups via flex_bg
90* delayed allocation
91* large block (up to pagesize) support
92* efficient new ordered mode in JBD2 and ext4 (avoid using buffer head to force
93 the ordering)
94
95[1] Filesystems with a block size of 1k may see a limit imposed by the
96directory hash tree having a maximum depth of two.
97
98Options
99=======
100
101When mounting an ext4 filesystem, the following option are accepted:
102(*) == default
103
104======================= =======================================================
105Mount Option Description
106======================= =======================================================
107ro Mount filesystem read only. Note that ext4 will
108 replay the journal (and thus write to the
109 partition) even when mounted "read only". The
110 mount options "ro,noload" can be used to prevent
111 writes to the filesystem.
112
113journal_checksum Enable checksumming of the journal transactions.
114 This will allow the recovery code in e2fsck and the
115 kernel to detect corruption in the kernel. It is a
116 compatible change and will be ignored by older kernels.
117
118journal_async_commit Commit block can be written to disk without waiting
119 for descriptor blocks. If enabled older kernels cannot
120 mount the device. This will enable 'journal_checksum'
121 internally.
122
123journal_path=path
124journal_dev=devnum When the external journal device's major/minor numbers
125 have changed, these options allow the user to specify
126 the new journal location. The journal device is
127 identified through either its new major/minor numbers
128 encoded in devnum, or via a path to the device.
129
130norecovery Don't load the journal on mounting. Note that
131noload if the filesystem was not unmounted cleanly,
132 skipping the journal replay will lead to the
133 filesystem containing inconsistencies that can
134 lead to any number of problems.
135
136data=journal All data are committed into the journal prior to being
137 written into the main file system. Enabling
138 this mode will disable delayed allocation and
139 O_DIRECT support.
140
141data=ordered (*) All data are forced directly out to the main file
142 system prior to its metadata being committed to the
143 journal.
144
145data=writeback Data ordering is not preserved, data may be written
146 into the main file system after its metadata has been
147 committed to the journal.
148
149commit=nrsec (*) Ext4 can be told to sync all its data and metadata
150 every 'nrsec' seconds. The default value is 5 seconds.
151 This means that if you lose your power, you will lose
152 as much as the latest 5 seconds of work (your
153 filesystem will not be damaged though, thanks to the
154 journaling). This default value (or any low value)
155 will hurt performance, but it's good for data-safety.
156 Setting it to 0 will have the same effect as leaving
157 it at the default (5 seconds).
158 Setting it to very large values will improve
159 performance.
160
161barrier=<0|1(*)> This enables/disables the use of write barriers in
162barrier(*) the jbd code. barrier=0 disables, barrier=1 enables.
163nobarrier This also requires an IO stack which can support
164 barriers, and if jbd gets an error on a barrier
165 write, it will disable again with a warning.
166 Write barriers enforce proper on-disk ordering
167 of journal commits, making volatile disk write caches
168 safe to use, at some performance penalty. If
169 your disks are battery-backed in one way or another,
170 disabling barriers may safely improve performance.
171 The mount options "barrier" and "nobarrier" can
172 also be used to enable or disable barriers, for
173 consistency with other ext4 mount options.
174
175inode_readahead_blks=n This tuning parameter controls the maximum
176 number of inode table blocks that ext4's inode
177 table readahead algorithm will pre-read into
178 the buffer cache. The default value is 32 blocks.
179
180nouser_xattr Disables Extended User Attributes. See the
181 attr(5) manual page for more information about
182 extended attributes.
183
184noacl This option disables POSIX Access Control List
185 support. If ACL support is enabled in the kernel
186 configuration (CONFIG_EXT4_FS_POSIX_ACL), ACL is
187 enabled by default on mount. See the acl(5) manual
188 page for more information about acl.
189
190bsddf (*) Make 'df' act like BSD.
191minixdf Make 'df' act like Minix.
192
193debug Extra debugging information is sent to syslog.
194
195abort Simulate the effects of calling ext4_abort() for
196 debugging purposes. This is normally used while
197 remounting a filesystem which is already mounted.
198
199errors=remount-ro Remount the filesystem read-only on an error.
200errors=continue Keep going on a filesystem error.
201errors=panic Panic and halt the machine if an error occurs.
202 (These mount options override the errors behavior
203 specified in the superblock, which can be configured
204 using tune2fs)
205
206data_err=ignore(*) Just print an error message if an error occurs
207 in a file data buffer in ordered mode.
208data_err=abort Abort the journal if an error occurs in a file
209 data buffer in ordered mode.
210
211grpid New objects have the group ID of their parent.
212bsdgroups
213
214nogrpid (*) New objects have the group ID of their creator.
215sysvgroups
216
217resgid=n The group ID which may use the reserved blocks.
218
219resuid=n The user ID which may use the reserved blocks.
220
221sb=n Use alternate superblock at this location.
222
223quota These options are ignored by the filesystem. They
224noquota are used only by quota tools to recognize volumes
225grpquota where quota should be turned on. See documentation
226usrquota in the quota-tools package for more details
227 (http://sourceforge.net/projects/linuxquota).
228
229jqfmt=<quota type> These options tell filesystem details about quota
230usrjquota=<file> so that quota information can be properly updated
231grpjquota=<file> during journal replay. They replace the above
232 quota options. See documentation in the quota-tools
233 package for more details
234 (http://sourceforge.net/projects/linuxquota).
235
236stripe=n Number of filesystem blocks that mballoc will try
237 to use for allocation size and alignment. For RAID5/6
238 systems this should be the number of data
239 disks * RAID chunk size in file system blocks.
240
241delalloc (*) Defer block allocation until just before ext4
242 writes out the block(s) in question. This
243 allows ext4 to better allocation decisions
244 more efficiently.
245nodelalloc Disable delayed allocation. Blocks are allocated
246 when the data is copied from userspace to the
247 page cache, either via the write(2) system call
248 or when an mmap'ed page which was previously
249 unallocated is written for the first time.
250
251max_batch_time=usec Maximum amount of time ext4 should wait for
252 additional filesystem operations to be batch
253 together with a synchronous write operation.
254 Since a synchronous write operation is going to
255 force a commit and then a wait for the I/O
256 complete, it doesn't cost much, and can be a
257 huge throughput win, we wait for a small amount
258 of time to see if any other transactions can
259 piggyback on the synchronous write. The
260 algorithm used is designed to automatically tune
261 for the speed of the disk, by measuring the
262 amount of time (on average) that it takes to
263 finish committing a transaction. Call this time
264 the "commit time". If the time that the
265 transaction has been running is less than the
266 commit time, ext4 will try sleeping for the
267 commit time to see if other operations will join
268 the transaction. The commit time is capped by
269 the max_batch_time, which defaults to 15000us
270 (15ms). This optimization can be turned off
271 entirely by setting max_batch_time to 0.
272
273min_batch_time=usec This parameter sets the commit time (as
274 described above) to be at least min_batch_time.
275 It defaults to zero microseconds. Increasing
276 this parameter may improve the throughput of
277 multi-threaded, synchronous workloads on very
278 fast disks, at the cost of increasing latency.
279
280journal_ioprio=prio The I/O priority (from 0 to 7, where 0 is the
281 highest priority) which should be used for I/O
282 operations submitted by kjournald2 during a
283 commit operation. This defaults to 3, which is
284 a slightly higher priority than the default I/O
285 priority.
286
287auto_da_alloc(*) Many broken applications don't use fsync() when
288noauto_da_alloc replacing existing files via patterns such as
289 fd = open("foo.new")/write(fd,..)/close(fd)/
290 rename("foo.new", "foo"), or worse yet,
291 fd = open("foo", O_TRUNC)/write(fd,..)/close(fd).
292 If auto_da_alloc is enabled, ext4 will detect
293 the replace-via-rename and replace-via-truncate
294 patterns and force that any delayed allocation
295 blocks are allocated such that at the next
296 journal commit, in the default data=ordered
297 mode, the data blocks of the new file are forced
298 to disk before the rename() operation is
299 committed. This provides roughly the same level
300 of guarantees as ext3, and avoids the
301 "zero-length" problem that can happen when a
302 system crashes before the delayed allocation
303 blocks are forced to disk.
304
305noinit_itable Do not initialize any uninitialized inode table
306 blocks in the background. This feature may be
307 used by installation CD's so that the install
308 process can complete as quickly as possible; the
309 inode table initialization process would then be
310 deferred until the next time the file system
311 is unmounted.
312
313init_itable=n The lazy itable init code will wait n times the
314 number of milliseconds it took to zero out the
315 previous block group's inode table. This
316 minimizes the impact on the system performance
317 while file system's inode table is being initialized.
318
319discard Controls whether ext4 should issue discard/TRIM
320nodiscard(*) commands to the underlying block device when
321 blocks are freed. This is useful for SSD devices
322 and sparse/thinly-provisioned LUNs, but it is off
323 by default until sufficient testing has been done.
324
325nouid32 Disables 32-bit UIDs and GIDs. This is for
326 interoperability with older kernels which only
327 store and expect 16-bit values.
328
329block_validity(*) These options enable or disable the in-kernel
330noblock_validity facility for tracking filesystem metadata blocks
331 within internal data structures. This allows multi-
332 block allocator and other routines to notice
333 bugs or corrupted allocation bitmaps which cause
334 blocks to be allocated which overlap with
335 filesystem metadata blocks.
336
337dioread_lock Controls whether or not ext4 should use the DIO read
338dioread_nolock locking. If the dioread_nolock option is specified
339 ext4 will allocate uninitialized extent before buffer
340 write and convert the extent to initialized after IO
341 completes. This approach allows ext4 code to avoid
342 using inode mutex, which improves scalability on high
343 speed storages. However this does not work with
344 data journaling and dioread_nolock option will be
345 ignored with kernel warning. Note that dioread_nolock
346 code path is only used for extent-based files.
347 Because of the restrictions this options comprises
348 it is off by default (e.g. dioread_lock).
349
350max_dir_size_kb=n This limits the size of directories so that any
351 attempt to expand them beyond the specified
352 limit in kilobytes will cause an ENOSPC error.
353 This is useful in memory constrained
354 environments, where a very large directory can
355 cause severe performance problems or even
356 provoke the Out Of Memory killer. (For example,
357 if there is only 512mb memory available, a 176mb
358 directory may seriously cramp the system's style.)
359
360i_version Enable 64-bit inode version support. This option is
361 off by default.
362
363dax Use direct access (no page cache). See
364 Documentation/filesystems/dax.txt. Note that
365 this option is incompatible with data=journal.
366======================= =======================================================
367
368Data Mode
369=========
370There are 3 different data modes:
371
372* writeback mode
373
374 In data=writeback mode, ext4 does not journal data at all. This mode provides
375 a similar level of journaling as that of XFS, JFS, and ReiserFS in its default
376 mode - metadata journaling. A crash+recovery can cause incorrect data to
377 appear in files which were written shortly before the crash. This mode will
378 typically provide the best ext4 performance.
379
380* ordered mode
381
382 In data=ordered mode, ext4 only officially journals metadata, but it logically
383 groups metadata information related to data changes with the data blocks into
384 a single unit called a transaction. When it's time to write the new metadata
385 out to disk, the associated data blocks are written first. In general, this
386 mode performs slightly slower than writeback but significantly faster than
387 journal mode.
388
389* journal mode
390
391 data=journal mode provides full data and metadata journaling. All new data is
392 written to the journal first, and then to its final location. In the event of
393 a crash, the journal can be replayed, bringing both data and metadata into a
394 consistent state. This mode is the slowest except when data needs to be read
395 from and written to disk at the same time where it outperforms all others
396 modes. Enabling this mode will disable delayed allocation and O_DIRECT
397 support.
398
399/proc entries
400=============
401
402Information about mounted ext4 file systems can be found in
403/proc/fs/ext4. Each mounted filesystem will have a directory in
404/proc/fs/ext4 based on its device name (i.e., /proc/fs/ext4/hdc or
405/proc/fs/ext4/dm-0). The files in each per-device directory are shown
406in table below.
407
408Files in /proc/fs/ext4/<devname>
409
410================ =======
411 File Content
412================ =======
413 mb_groups details of multiblock allocator buddy cache of free blocks
414================ =======
415
416/sys entries
417============
418
419Information about mounted ext4 file systems can be found in
420/sys/fs/ext4. Each mounted filesystem will have a directory in
421/sys/fs/ext4 based on its device name (i.e., /sys/fs/ext4/hdc or
422/sys/fs/ext4/dm-0). The files in each per-device directory are shown
423in table below.
424
425Files in /sys/fs/ext4/<devname>:
426
427(see also Documentation/ABI/testing/sysfs-fs-ext4)
428
429============================= =================================================
430File Content
431============================= =================================================
432 delayed_allocation_blocks This file is read-only and shows the number of
433 blocks that are dirty in the page cache, but
434 which do not have their location in the
435 filesystem allocated yet.
436
437inode_goal Tuning parameter which (if non-zero) controls
438 the goal inode used by the inode allocator in
439 preference to all other allocation heuristics.
440 This is intended for debugging use only, and
441 should be 0 on production systems.
442
443inode_readahead_blks Tuning parameter which controls the maximum
444 number of inode table blocks that ext4's inode
445 table readahead algorithm will pre-read into
446 the buffer cache
447
448lifetime_write_kbytes This file is read-only and shows the number of
449 kilobytes of data that have been written to this
450 filesystem since it was created.
451
452 max_writeback_mb_bump The maximum number of megabytes the writeback
453 code will try to write out before move on to
454 another inode.
455
456 mb_group_prealloc The multiblock allocator will round up allocation
457 requests to a multiple of this tuning parameter if
458 the stripe size is not set in the ext4 superblock
459
460 mb_max_to_scan The maximum number of extents the multiblock
461 allocator will search to find the best extent
462
463 mb_min_to_scan The minimum number of extents the multiblock
464 allocator will search to find the best extent
465
466 mb_order2_req Tuning parameter which controls the minimum size
467 for requests (as a power of 2) where the buddy
468 cache is used
469
470 mb_stats Controls whether the multiblock allocator should
471 collect statistics, which are shown during the
472 unmount. 1 means to collect statistics, 0 means
473 not to collect statistics
474
475 mb_stream_req Files which have fewer blocks than this tunable
476 parameter will have their blocks allocated out
477 of a block group specific preallocation pool, so
478 that small files are packed closely together.
479 Each large file will have its blocks allocated
480 out of its own unique preallocation pool.
481
482 session_write_kbytes This file is read-only and shows the number of
483 kilobytes of data that have been written to this
484 filesystem since it was mounted.
485
486 reserved_clusters This is RW file and contains number of reserved
487 clusters in the file system which will be used
488 in the specific situations to avoid costly
489 zeroout, unexpected ENOSPC, or possible data
490 loss. The default is 2% or 4096 clusters,
491 whichever is smaller and this can be changed
492 however it can never exceed number of clusters
493 in the file system. If there is not enough space
494 for the reserved space when mounting the file
495 mount will _not_ fail.
496============================= =================================================
497
498Ioctls
499======
500
501There is some Ext4 specific functionality which can be accessed by applications
502through the system call interfaces. The list of all Ext4 specific ioctls are
503shown in the table below.
504
505Table of Ext4 specific ioctls
506
507============================= =================================================
508Ioctl Description
509============================= =================================================
510 EXT4_IOC_GETFLAGS Get additional attributes associated with inode.
511 The ioctl argument is an integer bitfield, with
512 bit values described in ext4.h. This ioctl is an
513 alias for FS_IOC_GETFLAGS.
514
515 EXT4_IOC_SETFLAGS Set additional attributes associated with inode.
516 The ioctl argument is an integer bitfield, with
517 bit values described in ext4.h. This ioctl is an
518 alias for FS_IOC_SETFLAGS.
519
520 EXT4_IOC_GETVERSION
521 EXT4_IOC_GETVERSION_OLD
522 Get the inode i_generation number stored for
523 each inode. The i_generation number is normally
524 changed only when new inode is created and it is
525 particularly useful for network filesystems. The
526 '_OLD' version of this ioctl is an alias for
527 FS_IOC_GETVERSION.
528
529 EXT4_IOC_SETVERSION
530 EXT4_IOC_SETVERSION_OLD
531 Set the inode i_generation number stored for
532 each inode. The '_OLD' version of this ioctl
533 is an alias for FS_IOC_SETVERSION.
534
535 EXT4_IOC_GROUP_EXTEND This ioctl has the same purpose as the resize
536 mount option. It allows to resize filesystem
537 to the end of the last existing block group,
538 further resize has to be done with resize2fs,
539 either online, or offline. The argument points
540 to the unsigned logn number representing the
541 filesystem new block count.
542
543 EXT4_IOC_MOVE_EXT Move the block extents from orig_fd (the one
544 this ioctl is pointing to) to the donor_fd (the
545 one specified in move_extent structure passed
546 as an argument to this ioctl). Then, exchange
547 inode metadata between orig_fd and donor_fd.
548 This is especially useful for online
549 defragmentation, because the allocator has the
550 opportunity to allocate moved blocks better,
551 ideally into one contiguous extent.
552
553 EXT4_IOC_GROUP_ADD Add a new group descriptor to an existing or
554 new group descriptor block. The new group
555 descriptor is described by ext4_new_group_input
556 structure, which is passed as an argument to
557 this ioctl. This is especially useful in
558 conjunction with EXT4_IOC_GROUP_EXTEND,
559 which allows online resize of the filesystem
560 to the end of the last existing block group.
561 Those two ioctls combined is used in userspace
562 online resize tool (e.g. resize2fs).
563
564 EXT4_IOC_MIGRATE This ioctl operates on the filesystem itself.
565 It converts (migrates) ext3 indirect block mapped
566 inode to ext4 extent mapped inode by walking
567 through indirect block mapping of the original
568 inode and converting contiguous block ranges
569 into ext4 extents of the temporary inode. Then,
570 inodes are swapped. This ioctl might help, when
571 migrating from ext3 to ext4 filesystem, however
572 suggestion is to create fresh ext4 filesystem
573 and copy data from the backup. Note, that
574 filesystem has to support extents for this ioctl
575 to work.
576
577 EXT4_IOC_ALLOC_DA_BLKS Force all of the delay allocated blocks to be
578 allocated to preserve application-expected ext3
579 behaviour. Note that this will also start
580 triggering a write of the data blocks, but this
581 behaviour may change in the future as it is
582 not necessary and has been done this way only
583 for sake of simplicity.
584
585 EXT4_IOC_RESIZE_FS Resize the filesystem to a new size. The number
586 of blocks of resized filesystem is passed in via
587 64 bit integer argument. The kernel allocates
588 bitmaps and inode table, the userspace tool thus
589 just passes the new number of blocks.
590
591 EXT4_IOC_SWAP_BOOT Swap i_blocks and associated attributes
592 (like i_blocks, i_size, i_flags, ...) from
593 the specified inode with inode
594 EXT4_BOOT_LOADER_INO (#5). This is typically
595 used to store a boot loader in a secure part of
596 the filesystem, where it can't be changed by a
597 normal user by accident.
598 The data blocks of the previous boot loader
599 will be associated with the given inode.
600============================= =================================================
601
602References
603==========
604
605kernel source: <file:fs/ext4/>
606 <file:fs/jbd2/>
607
608programs: http://e2fsprogs.sourceforge.net/
609
610useful links: http://fedoraproject.org/wiki/ext3-devel
611 http://www.bullopensource.org/ext4/
612 http://ext4.wiki.kernel.org/index.php/Main_Page
613 http://fedoraproject.org/wiki/Features/Ext4
Documentation/filesystems/ext4/globals.rstrenamed from Documentation/filesystems/ext4/ondisk/globals.rst+0−0

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Documentation/filesystems/ext4/group_descr.rstrenamed from Documentation/filesystems/ext4/ondisk/group_descr.rst+2−2
@@ -43,7 +43,7 @@ entire bitmap. · 42 unmodified lines
43The block group descriptor is laid out in ``struct ext4_group_desc``.43The block group descriptor is laid out in ``struct ext4_group_desc``.
44 44
45.. list-table::45.. list-table::
46 :widths: 1 1 1 7746 :widths: 8 8 24 40
47 :header-rows: 147 :header-rows: 1
48 48
49 * - Offset49 * - Offset
@@ -157,7 +157,7 @@ The block group descriptor is laid out in ``struct ext4_group_desc``. · 107 unmodified lines
157Block group flags can be any combination of the following:157Block group flags can be any combination of the following:
158 158
159.. list-table::159.. list-table::
160 :widths: 1 79160 :widths: 16 64
161 :header-rows: 1161 :header-rows: 1
162 162
163 * - Value163 * - Value
Documentation/filesystems/ext4/ifork.rstrenamed from Documentation/filesystems/ext4/ondisk/ifork.rst+4−4
@@ -68,7 +68,7 @@ The extent tree header is recorded in ``struct ext4_extent_header``, · 67 unmodified lines
68which is 12 bytes long:68which is 12 bytes long:
69 69
70.. list-table::70.. list-table::
71 :widths: 1 1 1 7771 :widths: 8 8 24 40
72 :header-rows: 172 :header-rows: 1
73 73
74 * - Offset74 * - Offset
@@ -104,7 +104,7 @@ Internal nodes of the extent tree, also known as index nodes, are · 29 unmodified lines
104recorded as ``struct ext4_extent_idx``, and are 12 bytes long:104recorded as ``struct ext4_extent_idx``, and are 12 bytes long:
105 105
106.. list-table::106.. list-table::
107 :widths: 1 1 1 77107 :widths: 8 8 24 40
108 :header-rows: 1108 :header-rows: 1
109 109
110 * - Offset110 * - Offset
@@ -134,7 +134,7 @@ Leaf nodes of the extent tree are recorded as ``struct ext4_extent``, · 23 unmodified lines
134and are also 12 bytes long:134and are also 12 bytes long:
135 135
136.. list-table::136.. list-table::
137 :widths: 1 1 1 77137 :widths: 8 8 24 40
138 :header-rows: 1138 :header-rows: 1
139 139
140 * - Offset140 * - Offset
@@ -174,7 +174,7 @@ including) the checksum itself. · 33 unmodified lines
174``struct ext4_extent_tail`` is 4 bytes long:174``struct ext4_extent_tail`` is 4 bytes long:
175 175
176.. list-table::176.. list-table::
177 :widths: 1 1 1 77177 :widths: 8 8 24 40
178 :header-rows: 1178 :header-rows: 1
179 179
180 * - Offset180 * - Offset
Documentation/filesystems/ext4/index.rst+8−11
@@ -1,17 +1,14 @@
1.. SPDX-License-Identifier: GPL-2.01.. SPDX-License-Identifier: GPL-2.0
2 2
3===============3===================================
4ext4 Filesystem4ext4 Data Structures and Algorithms
5===============5===================================
6
7General usage and on-disk artifacts writen by ext4. More documentation may
8be ported from the wiki as time permits. This should be considered the
9canonical source of information as the details here have been reviewed by
10the ext4 community.
11 6
12.. toctree::7.. toctree::
13 :maxdepth: 58 :maxdepth: 6
14 :numbered:9 :numbered:
15 10
16 ext411 about.rst
17 ondisk/index12 overview.rst
13 globals.rst
14 dynamic.rst
Documentation/filesystems/ext4/inlinedata.rstrenamed from Documentation/filesystems/ext4/ondisk/inlinedata.rst+0−0

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Documentation/filesystems/ext4/inodes.rstrenamed from Documentation/filesystems/ext4/ondisk/inodes.rst+10−9
@@ -29,8 +29,9 @@ and the inode structure itself. · 28 unmodified lines
29The inode table entry is laid out in ``struct ext4_inode``.29The inode table entry is laid out in ``struct ext4_inode``.
30 30
31.. list-table::31.. list-table::
32 :widths: 1 1 1 7732 :widths: 8 8 24 40
33 :header-rows: 133 :header-rows: 1
34 :class: longtable
34 35
35 * - Offset36 * - Offset
36 - Size37 - Size
@@ -176,7 +177,7 @@ The inode table entry is laid out in ``struct ext4_inode``. · 139 unmodified lines
176The ``i_mode`` value is a combination of the following flags:177The ``i_mode`` value is a combination of the following flags:
177 178
178.. list-table::179.. list-table::
179 :widths: 1 79180 :widths: 16 64
180 :header-rows: 1181 :header-rows: 1
181 182
182 * - Value183 * - Value
@@ -227,7 +228,7 @@ The ``i_mode`` value is a combination of the following flags: · 44 unmodified lines
227The ``i_flags`` field is a combination of these values:228The ``i_flags`` field is a combination of these values:
228 229
229.. list-table::230.. list-table::
230 :widths: 1 79231 :widths: 16 64
231 :header-rows: 1232 :header-rows: 1
232 233
233 * - Value234 * - Value
@@ -314,7 +315,7 @@ The ``osd1`` field has multiple meanings depending on the creator: · 80 unmodified lines
314Linux:315Linux:
315 316
316.. list-table::317.. list-table::
317 :widths: 1 1 1 77318 :widths: 8 8 24 40
318 :header-rows: 1319 :header-rows: 1
319 320
320 * - Offset321 * - Offset
@@ -331,7 +332,7 @@ Linux: · 10 unmodified lines
331Hurd:332Hurd:
332 333
333.. list-table::334.. list-table::
334 :widths: 1 1 1 77335 :widths: 8 8 24 40
335 :header-rows: 1336 :header-rows: 1
336 337
337 * - Offset338 * - Offset
@@ -346,7 +347,7 @@ Hurd: · 8 unmodified lines
346Masix:347Masix:
347 348
348.. list-table::349.. list-table::
349 :widths: 1 1 1 77350 :widths: 8 8 24 40
350 :header-rows: 1351 :header-rows: 1
351 352
352 * - Offset353 * - Offset
@@ -365,7 +366,7 @@ The ``osd2`` field has multiple meanings depending on the filesystem creator: · 12 unmodified lines
365Linux:366Linux:
366 367
367.. list-table::368.. list-table::
368 :widths: 1 1 1 77369 :widths: 8 8 24 40
369 :header-rows: 1370 :header-rows: 1
370 371
371 * - Offset372 * - Offset
@@ -402,7 +403,7 @@ Linux: · 30 unmodified lines
402Hurd:403Hurd:
403 404
404.. list-table::405.. list-table::
405 :widths: 1 1 1 77406 :widths: 8 8 24 40
406 :header-rows: 1407 :header-rows: 1
407 408
408 * - Offset409 * - Offset
@@ -433,7 +434,7 @@ Hurd: · 24 unmodified lines
433Masix:434Masix:
434 435
435.. list-table::436.. list-table::
436 :widths: 1 1 1 77437 :widths: 8 8 24 40
437 :header-rows: 1438 :header-rows: 1
438 439
439 * - Offset440 * - Offset
Documentation/filesystems/ext4/journal.rstrenamed from Documentation/filesystems/ext4/ondisk/journal.rst+16−16
@@ -48,7 +48,7 @@ Layout · 47 unmodified lines
48Generally speaking, the journal has this format:48Generally speaking, the journal has this format:
49 49
50.. list-table::50.. list-table::
51 :widths: 1 1 7851 :widths: 16 48 16
52 :header-rows: 152 :header-rows: 1
53 53
54 * - Superblock54 * - Superblock
@@ -76,7 +76,7 @@ The journal superblock will be in the next full block after the · 21 unmodified lines
76superblock.76superblock.
77 77
78.. list-table::78.. list-table::
79 :widths: 1 1 1 1 7679 :widths: 12 12 12 32 12
80 :header-rows: 180 :header-rows: 1
81 81
82 * - 1024 bytes of padding82 * - 1024 bytes of padding
@@ -98,7 +98,7 @@ Every block in the journal starts with a common 12-byte header · 15 unmodified lines
98``struct journal_header_s``:98``struct journal_header_s``:
99 99
100.. list-table::100.. list-table::
101 :widths: 1 1 1 77101 :widths: 8 8 24 40
102 :header-rows: 1102 :header-rows: 1
103 103
104 * - Offset104 * - Offset
@@ -124,7 +124,7 @@ Every block in the journal starts with a common 12-byte header · 19 unmodified lines
124The journal block type can be any one of:124The journal block type can be any one of:
125 125
126.. list-table::126.. list-table::
127 :widths: 1 79127 :widths: 16 64
128 :header-rows: 1128 :header-rows: 1
129 129
130 * - Value130 * - Value
@@ -154,7 +154,7 @@ The journal superblock is recorded as ``struct journal_superblock_s``, · 23 unmodified lines
154which is 1024 bytes long:154which is 1024 bytes long:
155 155
156.. list-table::156.. list-table::
157 :widths: 1 1 1 77157 :widths: 8 8 24 40
158 :header-rows: 1158 :header-rows: 1
159 159
160 * - Offset160 * - Offset
@@ -264,7 +264,7 @@ which is 1024 bytes long: · 103 unmodified lines
264The journal compat features are any combination of the following:264The journal compat features are any combination of the following:
265 265
266.. list-table::266.. list-table::
267 :widths: 1 79267 :widths: 16 64
268 :header-rows: 1268 :header-rows: 1
269 269
270 * - Value270 * - Value
@@ -278,7 +278,7 @@ The journal compat features are any combination of the following: · 7 unmodified lines
278The journal incompat features are any combination of the following:278The journal incompat features are any combination of the following:
279 279
280.. list-table::280.. list-table::
281 :widths: 1 79281 :widths: 16 64
282 :header-rows: 1282 :header-rows: 1
283 283
284 * - Value284 * - Value
@@ -306,7 +306,7 @@ Journal checksum type codes are one of the following. crc32 or crc32c are the · 21 unmodified lines
306most likely choices.306most likely choices.
307 307
308.. list-table::308.. list-table::
309 :widths: 1 79309 :widths: 16 64
310 :header-rows: 1310 :header-rows: 1
311 311
312 * - Value312 * - Value
@@ -330,7 +330,7 @@ described by a data structure, but here is the block structure anyway. · 17 unmodified lines
330Descriptor blocks consume at least 36 bytes, but use a full block:330Descriptor blocks consume at least 36 bytes, but use a full block:
331 331
332.. list-table::332.. list-table::
333 :widths: 1 1 1 77333 :widths: 8 8 24 40
334 :header-rows: 1334 :header-rows: 1
335 335
336 * - Offset336 * - Offset
@@ -355,7 +355,7 @@ defined as ``struct journal_block_tag3_s``, which looks like the · 18 unmodified lines
355following. The size is 16 or 32 bytes.355following. The size is 16 or 32 bytes.
356 356
357.. list-table::357.. list-table::
358 :widths: 1 1 1 77358 :widths: 8 8 24 40
359 :header-rows: 1359 :header-rows: 1
360 360
361 * - Offset361 * - Offset
@@ -400,7 +400,7 @@ following. The size is 16 or 32 bytes. · 38 unmodified lines
400The journal tag flags are any combination of the following:400The journal tag flags are any combination of the following:
401 401
402.. list-table::402.. list-table::
403 :widths: 1 79403 :widths: 16 64
404 :header-rows: 1404 :header-rows: 1
405 405
406 * - Value406 * - Value
@@ -421,7 +421,7 @@ is defined as ``struct journal_block_tag_s``, which looks like the · 14 unmodified lines
421following. The size is 8, 12, 24, or 28 bytes:421following. The size is 8, 12, 24, or 28 bytes:
422 422
423.. list-table::423.. list-table::
424 :widths: 1 1 1 77424 :widths: 8 8 24 40
425 :header-rows: 1425 :header-rows: 1
426 426
427 * - Offset427 * - Offset
@@ -471,7 +471,7 @@ JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3 are set, the end of the block is a · 43 unmodified lines
471``struct jbd2_journal_block_tail``, which looks like this:471``struct jbd2_journal_block_tail``, which looks like this:
472 472
473.. list-table::473.. list-table::
474 :widths: 1 1 1 77474 :widths: 8 8 24 40
475 :header-rows: 1475 :header-rows: 1
476 476
477 * - Offset477 * - Offset
@@ -513,7 +513,7 @@ Revocation blocks are described in · 35 unmodified lines
513length, but use a full block:513length, but use a full block:
514 514
515.. list-table::515.. list-table::
516 :widths: 1 1 1 77516 :widths: 8 8 24 40
517 :header-rows: 1517 :header-rows: 1
518 518
519 * - Offset519 * - Offset
@@ -543,7 +543,7 @@ JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3 are set, the end of the revocation · 23 unmodified lines
543block is a ``struct jbd2_journal_revoke_tail``, which has this format:543block is a ``struct jbd2_journal_revoke_tail``, which has this format:
544 544
545.. list-table::545.. list-table::
546 :widths: 1 1 1 77546 :widths: 8 8 24 40
547 :header-rows: 1547 :header-rows: 1
548 548
549 * - Offset549 * - Offset
@@ -567,7 +567,7 @@ The commit block is described by ``struct commit_header``, which is 32 · 17 unmodified lines
567bytes long (but uses a full block):567bytes long (but uses a full block):
568 568
569.. list-table::569.. list-table::
570 :widths: 1 1 1 77570 :widths: 8 8 24 40
571 :header-rows: 1571 :header-rows: 1
572 572
573 * - Offset573 * - Offset
Documentation/filesystems/ext4/mmp.rstrenamed from Documentation/filesystems/ext4/ondisk/mmp.rst+1−1
@@ -32,7 +32,7 @@ The checksum is calculated against the FS UUID and the MMP structure. · 31 unmodified lines
32The MMP structure (``struct mmp_struct``) is as follows:32The MMP structure (``struct mmp_struct``) is as follows:
33 33
34.. list-table::34.. list-table::
35 :widths: 1 1 1 7735 :widths: 8 12 20 40
36 :header-rows: 136 :header-rows: 1
37 37
38 * - Offset38 * - Offset
Documentation/filesystems/ext4/ondisk/index.rst+0−9
@@ -1,9 +0,0 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3==============================
4Data Structures and Algorithms
5==============================
6.. include:: about.rst
7.. include:: overview.rst
8.. include:: globals.rst
9.. include:: dynamic.rst
Documentation/filesystems/ext4/overview.rstrenamed from Documentation/filesystems/ext4/ondisk/overview.rst+0−0

File renamed without changes.

Documentation/filesystems/ext4/special_inodes.rstrenamed from Documentation/filesystems/ext4/ondisk/special_inodes.rst+1−1
@@ -6,7 +6,7 @@ Special inodes · 5 unmodified lines
6ext4 reserves some inode for special features, as follows:6ext4 reserves some inode for special features, as follows:
7 7
8.. list-table::8.. list-table::
9 :widths: 1 799 :widths: 6 70
10 :header-rows: 110 :header-rows: 1
11 11
12 * - inode Number12 * - inode Number
Documentation/filesystems/ext4/super.rstrenamed from Documentation/filesystems/ext4/ondisk/super.rst+12−12
@@ -19,7 +19,7 @@ The ext4 superblock is laid out as follows in · 18 unmodified lines
19``struct ext4_super_block``:19``struct ext4_super_block``:
20 20
21.. list-table::21.. list-table::
22 :widths: 1 1 1 7722 :widths: 8 8 24 40
23 :header-rows: 123 :header-rows: 1
24 24
25 * - Offset25 * - Offset
@@ -483,7 +483,7 @@ The ext4 superblock is laid out as follows in · 457 unmodified lines
483The superblock state is some combination of the following:483The superblock state is some combination of the following:
484 484
485.. list-table::485.. list-table::
486 :widths: 1 79486 :widths: 8 72
487 :header-rows: 1487 :header-rows: 1
488 488
489 * - Value489 * - Value
@@ -500,7 +500,7 @@ The superblock state is some combination of the following: · 10 unmodified lines
500The superblock error policy is one of the following:500The superblock error policy is one of the following:
501 501
502.. list-table::502.. list-table::
503 :widths: 1 79503 :widths: 8 72
504 :header-rows: 1504 :header-rows: 1
505 505
506 * - Value506 * - Value
@@ -517,7 +517,7 @@ The superblock error policy is one of the following: · 10 unmodified lines
517The filesystem creator is one of the following:517The filesystem creator is one of the following:
518 518
519.. list-table::519.. list-table::
520 :widths: 1 79520 :widths: 8 72
521 :header-rows: 1521 :header-rows: 1
522 522
523 * - Value523 * - Value
@@ -538,7 +538,7 @@ The filesystem creator is one of the following: · 14 unmodified lines
538The superblock revision is one of the following:538The superblock revision is one of the following:
539 539
540.. list-table::540.. list-table::
541 :widths: 1 79541 :widths: 8 72
542 :header-rows: 1542 :header-rows: 1
543 543
544 * - Value544 * - Value
@@ -556,7 +556,7 @@ The superblock compatible features field is a combination of any of the · 11 unmodified lines
556following:556following:
557 557
558.. list-table::558.. list-table::
559 :widths: 1 79559 :widths: 16 64
560 :header-rows: 1560 :header-rows: 1
561 561
562 * - Value562 * - Value
@@ -595,7 +595,7 @@ The superblock incompatible features field is a combination of any of the · 32 unmodified lines
595following:595following:
596 596
597.. list-table::597.. list-table::
598 :widths: 1 79598 :widths: 16 64
599 :header-rows: 1599 :header-rows: 1
600 600
601 * - Value601 * - Value
@@ -647,7 +647,7 @@ The superblock read-only compatible features field is a combination of any of · 45 unmodified lines
647the following:647the following:
648 648
649.. list-table::649.. list-table::
650 :widths: 1 79650 :widths: 16 64
651 :header-rows: 1651 :header-rows: 1
652 652
653 * - Value653 * - Value
@@ -702,7 +702,7 @@ the following: · 48 unmodified lines
702The ``s_def_hash_version`` field is one of the following:702The ``s_def_hash_version`` field is one of the following:
703 703
704.. list-table::704.. list-table::
705 :widths: 1 79705 :widths: 8 72
706 :header-rows: 1706 :header-rows: 1
707 707
708 * - Value708 * - Value
@@ -725,7 +725,7 @@ The ``s_def_hash_version`` field is one of the following: · 16 unmodified lines
725The ``s_default_mount_opts`` field is any combination of the following:725The ``s_default_mount_opts`` field is any combination of the following:
726 726
727.. list-table::727.. list-table::
728 :widths: 1 79728 :widths: 8 72
729 :header-rows: 1729 :header-rows: 1
730 730
731 * - Value731 * - Value
@@ -767,7 +767,7 @@ The ``s_default_mount_opts`` field is any combination of the following: · 35 unmodified lines
767The ``s_flags`` field is any combination of the following:767The ``s_flags`` field is any combination of the following:
768 768
769.. list-table::769.. list-table::
770 :widths: 1 79770 :widths: 8 72
771 :header-rows: 1771 :header-rows: 1
772 772
773 * - Value773 * - Value
@@ -784,7 +784,7 @@ The ``s_flags`` field is any combination of the following: · 10 unmodified lines
784The ``s_encrypt_algos`` list can contain any of the following:784The ``s_encrypt_algos`` list can contain any of the following:
785 785
786.. list-table::786.. list-table::
787 :widths: 1 79787 :widths: 8 72
788 :header-rows: 1788 :header-rows: 1
789 789
790 * - Value790 * - Value
Documentation/filesystems/f2fs.txt+7−1
@@ -172,9 +172,10 @@ fault_type=%d Support configuring fault injection type, should be · 171 unmodified lines
172 FAULT_DIR_DEPTH 0x000000100172 FAULT_DIR_DEPTH 0x000000100
173 FAULT_EVICT_INODE 0x000000200173 FAULT_EVICT_INODE 0x000000200
174 FAULT_TRUNCATE 0x000000400174 FAULT_TRUNCATE 0x000000400
175 FAULT_IO 0x000000800175 FAULT_READ_IO 0x000000800
176 FAULT_CHECKPOINT 0x000001000176 FAULT_CHECKPOINT 0x000001000
177 FAULT_DISCARD 0x000002000177 FAULT_DISCARD 0x000002000
178 FAULT_WRITE_IO 0x000004000
178mode=%s Control block allocation mode which supports "adaptive"179mode=%s Control block allocation mode which supports "adaptive"
179 and "lfs". In "lfs" mode, there should be no random180 and "lfs". In "lfs" mode, there should be no random
180 writes towards main area.181 writes towards main area.
@@ -211,6 +212,11 @@ fsync_mode=%s Control the policy of fsync. Currently supports "posix", · 30 unmodified lines
211 non-atomic files likewise "nobarrier" mount option.212 non-atomic files likewise "nobarrier" mount option.
212test_dummy_encryption Enable dummy encryption, which provides a fake fscrypt213test_dummy_encryption Enable dummy encryption, which provides a fake fscrypt
213 context. The fake fscrypt context is used by xfstests.214 context. The fake fscrypt context is used by xfstests.
215checkpoint=%s Set to "disable" to turn off checkpointing. Set to "enable"
216 to reenable checkpointing. Is enabled by default. While
217 disabled, any unmounting or unexpected shutdowns will cause
218 the filesystem contents to appear as they did when the
219 filesystem was mounted with that option.
214 220
215================================================================================221================================================================================
216DEBUGFS ENTRIES222DEBUGFS ENTRIES
Documentation/filesystems/fscrypt.rst+0−10
@@ -191,21 +191,11 @@ Currently, the following pairs of encryption modes are supported: · 190 unmodified lines
191 191
192- AES-256-XTS for contents and AES-256-CTS-CBC for filenames192- AES-256-XTS for contents and AES-256-CTS-CBC for filenames
193- AES-128-CBC for contents and AES-128-CTS-CBC for filenames193- AES-128-CBC for contents and AES-128-CTS-CBC for filenames
194- Speck128/256-XTS for contents and Speck128/256-CTS-CBC for filenames
195 194
196It is strongly recommended to use AES-256-XTS for contents encryption.195It is strongly recommended to use AES-256-XTS for contents encryption.
197AES-128-CBC was added only for low-powered embedded devices with196AES-128-CBC was added only for low-powered embedded devices with
198crypto accelerators such as CAAM or CESA that do not support XTS.197crypto accelerators such as CAAM or CESA that do not support XTS.
199 198
200Similarly, Speck128/256 support was only added for older or low-end
201CPUs which cannot do AES fast enough -- especially ARM CPUs which have
202NEON instructions but not the Cryptography Extensions -- and for which
203it would not otherwise be feasible to use encryption at all. It is
204not recommended to use Speck on CPUs that have AES instructions.
205Speck support is only available if it has been enabled in the crypto
206API via CONFIG_CRYPTO_SPECK. Also, on ARM platforms, to get
207acceptable performance CONFIG_CRYPTO_SPECK_NEON must be enabled.
208
209New encryption modes can be added relatively easily, without changes199New encryption modes can be added relatively easily, without changes
210to individual filesystems. However, authenticated encryption (AE)200to individual filesystems. However, authenticated encryption (AE)
211modes are not currently supported because of the difficulty of dealing201modes are not currently supported because of the difficulty of dealing
Documentation/filesystems/nfs/00-INDEX+0−26
@@ -1,26 +0,0 @@
100-INDEX
2 - this file (nfs-related documentation).
3Exporting
4 - explanation of how to make filesystems exportable.
5fault_injection.txt
6 - information for using fault injection on the server
7knfsd-stats.txt
8 - statistics which the NFS server makes available to user space.
9nfs.txt
10 - nfs client, and DNS resolution for fs_locations.
11nfs41-server.txt
12 - info on the Linux server implementation of NFSv4 minor version 1.
13nfs-rdma.txt
14 - how to install and setup the Linux NFS/RDMA client and server software
15nfsd-admin-interfaces.txt
16 - Administrative interfaces for nfsd.
17nfsroot.txt
18 - short guide on setting up a diskless box with NFS root filesystem.
19pnfs.txt
20 - short explanation of some of the internals of the pnfs client code
21rpc-cache.txt
22 - introduction to the caching mechanisms in the sunrpc layer.
23idmapper.txt
24 - information for configuring request-keys to be used by idmapper
25rpc-server-gss.txt
26 - Information on GSS authentication support in the NFS Server
Documentation/filesystems/nfs/rpc-cache.txt+3−3
@@ -84,7 +84,7 @@ Creating a Cache · 83 unmodified lines
84 A message from user space has arrived to fill out a84 A message from user space has arrived to fill out a
85 cache entry. It is in 'buf' of length 'len'.85 cache entry. It is in 'buf' of length 'len'.
86 cache_parse should parse this, find the item in the86 cache_parse should parse this, find the item in the
87 cache with sunrpc_cache_lookup, and update the item87 cache with sunrpc_cache_lookup_rcu, and update the item
88 with sunrpc_cache_update.88 with sunrpc_cache_update.
89 89
90 90
@@ -95,7 +95,7 @@ Creating a Cache · 4 unmodified lines
95Using a cache95Using a cache
96-------------96-------------
97 97
98To find a value in a cache, call sunrpc_cache_lookup passing a pointer98To find a value in a cache, call sunrpc_cache_lookup_rcu passing a pointer
99to the cache_head in a sample item with the 'key' fields filled in.99to the cache_head in a sample item with the 'key' fields filled in.
100This will be passed to ->match to identify the target entry. If no100This will be passed to ->match to identify the target entry. If no
101entry is found, a new entry will be create, added to the cache, and101entry is found, a new entry will be create, added to the cache, and
@@ -116,7 +116,7 @@ item does become valid, the deferred copy of the request will be · 14 unmodified lines
116revisited (->revisit). It is expected that this method will116revisited (->revisit). It is expected that this method will
117reschedule the request for processing.117reschedule the request for processing.
118 118
119The value returned by sunrpc_cache_lookup can also be passed to119The value returned by sunrpc_cache_lookup_rcu can also be passed to
120sunrpc_cache_update to set the content for the item. A second item is120sunrpc_cache_update to set the content for the item. A second item is
121passed which should hold the content. If the item found by _lookup121passed which should hold the content. If the item found by _lookup
122has valid data, then it is discarded and a new item is created. This122has valid data, then it is discarded and a new item is created. This
Documentation/filesystems/overlayfs.txt+6−0
@@ -286,6 +286,12 @@ pointed by REDIRECT. This should not be possible on local system as setting · 285 unmodified lines
286"trusted." xattrs will require CAP_SYS_ADMIN. But it should be possible286"trusted." xattrs will require CAP_SYS_ADMIN. But it should be possible
287for untrusted layers like from a pen drive.287for untrusted layers like from a pen drive.
288 288
289Note: redirect_dir={off|nofollow|follow(*)} conflicts with metacopy=on, and
290results in an error.
291
292(*) redirect_dir=follow only conflicts with metacopy=on if upperdir=... is
293given.
294
289Sharing and copying layers295Sharing and copying layers
290--------------------------296--------------------------
291 297
Documentation/filesystems/pohmelfs/design_notes.txt+0−72
@@ -1,72 +0,0 @@
1POHMELFS: Parallel Optimized Host Message Exchange Layered File System.
2
3 Evgeniy Polyakov <zbr@ioremap.net>
4
5Homepage: http://www.ioremap.net/projects/pohmelfs
6
7POHMELFS first began as a network filesystem with coherent local data and
8metadata caches but is now evolving into a parallel distributed filesystem.
9
10Main features of this FS include:
11 * Locally coherent cache for data and metadata with (potentially) byte-range locks.
12 Since all Linux filesystems lock the whole inode during writing, algorithm
13 is very simple and does not use byte-ranges, although they are sent in
14 locking messages.
15 * Completely async processing of all events except creation of hard and symbolic
16 links, and rename events.
17 Object creation and data reading and writing are processed asynchronously.
18 * Flexible object architecture optimized for network processing.
19 Ability to create long paths to objects and remove arbitrarily huge
20 directories with a single network command.
21 (like removing the whole kernel tree via a single network command).
22 * Very high performance.
23 * Fast and scalable multithreaded userspace server. Being in userspace it works
24 with any underlying filesystem and still is much faster than async in-kernel NFS one.
25 * Client is able to switch between different servers (if one goes down, client
26 automatically reconnects to second and so on).
27 * Transactions support. Full failover for all operations.
28 Resending transactions to different servers on timeout or error.
29 * Read request (data read, directory listing, lookup requests) balancing between multiple servers.
30 * Write requests are replicated to multiple servers and completed only when all of them are acked.
31 * Ability to add and/or remove servers from the working set at run-time.
32 * Strong authentication and possible data encryption in network channel.
33 * Extended attributes support.
34
35POHMELFS is based on transactions, which are potentially long-standing objects that live
36in the client's memory. Each transaction contains all the information needed to process a given
37command (or set of commands, which is frequently used during data writing: single transactions
38can contain creation and data writing commands). Transactions are committed by all the servers
39to which they are sent and, in case of failures, are eventually resent or dropped with an error.
40For example, reading will return an error if no servers are available.
41
42POHMELFS uses a asynchronous approach to data processing. Courtesy of transactions, it is
43possible to detach replies from requests and, if the command requires data to be received, the
44caller sleeps waiting for it. Thus, it is possible to issue multiple read commands to different
45servers and async threads will pick up replies in parallel, find appropriate transactions in the
46system and put the data where it belongs (like the page or inode cache).
47
48The main feature of POHMELFS is writeback data and the metadata cache.
49Only a few non-performance critical operations use the write-through cache and
50are synchronous: hard and symbolic link creation, and object rename. Creation,
51removal of objects and data writing are asynchronous and are sent to
52the server during system writeback. Only one writer at a time is allowed for any
53given inode, which is guarded by an appropriate locking protocol.
54Because of this feature, POHMELFS is extremely fast at metadata intensive
55workloads and can fully utilize the bandwidth to the servers when doing bulk
56data transfers.
57
58POHMELFS clients operate with a working set of servers and are capable of balancing read-only
59operations (like lookups or directory listings) between them according to IO priorities.
60Administrators can add or remove servers from the set at run-time via special commands (described
61in Documentation/filesystems/pohmelfs/info.txt file). Writes are replicated to all servers, which
62are connected with write permission turned on. IO priority and permissions can be changed in
63run-time.
64
65POHMELFS is capable of full data channel encryption and/or strong crypto hashing.
66One can select any kernel supported cipher, encryption mode, hash type and operation mode
67(hmac or digest). It is also possible to use both or neither (default). Crypto configuration
68is checked during mount time and, if the server does not support it, appropriate capabilities
69will be disabled or mount will fail (if 'crypto_fail_unsupported' mount option is specified).
70Crypto performance heavily depends on the number of crypto threads, which asynchronously perform
71crypto operations and send the resulting data to server or submit it up the stack. This number
72can be controlled via a mount option.
Documentation/filesystems/pohmelfs/info.txt+0−99
@@ -1,99 +0,0 @@
1POHMELFS usage information.
2
3Mount options.
4All but index, number of crypto threads and maximum IO size can changed via remount.
5
6idx=%u
7 Each mountpoint is associated with a special index via this option.
8 Administrator can add or remove servers from the given index, so all mounts,
9 which were attached to it, are updated.
10 Default it is 0.
11
12trans_scan_timeout=%u
13 This timeout, expressed in milliseconds, specifies time to scan transaction
14 trees looking for stale requests, which have to be resent, or if number of
15 retries exceed specified limit, dropped with error.
16 Default is 5 seconds.
17
18drop_scan_timeout=%u
19 Internal timeout, expressed in milliseconds, which specifies how frequently
20 inodes marked to be dropped are freed. It also specifies how frequently
21 the system checks that servers have to be added or removed from current working set.
22 Default is 1 second.
23
24wait_on_page_timeout=%u
25 Number of milliseconds to wait for reply from remote server for data reading command.
26 If this timeout is exceeded, reading returns an error.
27 Default is 5 seconds.
28
29trans_retries=%u
30 This is the number of times that a transaction will be resent to a server that did
31 not answer for the last @trans_scan_timeout milliseconds.
32 When the number of resends exceeds this limit, the transaction is completed with error.
33 Default is 5 resends.
34
35crypto_thread_num=%u
36 Number of crypto processing threads. Threads are used both for RX and TX traffic.
37 Default is 2, or no threads if crypto operations are not supported.
38
39trans_max_pages=%u
40 Maximum number of pages in a single transaction. This parameter also controls
41 the number of pages, allocated for crypto processing (each crypto thread has
42 pool of pages, the number of which is equal to 'trans_max_pages'.
43 Default is 100 pages.
44
45crypto_fail_unsupported
46 If specified, mount will fail if the server does not support requested crypto operations.
47 By default mount will disable non-matching crypto operations.
48
49mcache_timeout=%u
50 Maximum number of milliseconds to wait for the mcache objects to be processed.
51 Mcache includes locks (given lock should be granted by server), attributes (they should be
52 fully received in the given timeframe).
53 Default is 5 seconds.
54
55Usage examples.
56
57Add server server1.net:1025 into the working set with index $idx
58with appropriate hash algorithm and key file and cipher algorithm, mode and key file:
59$cfg A add -a server1.net -p 1025 -i $idx -K $hash_key -k $cipher_key
60
61Mount filesystem with given index $idx to /mnt mountpoint.
62Client will connect to all servers specified in the working set via previous command:
63mount -t pohmel -o idx=$idx q /mnt
64
65Change permissions to read-only (-I 1 option, '-I 2' - write-only, 3 - rw):
66$cfg A modify -a server1.net -p 1025 -i $idx -I 1
67
68Change IO priority to 123 (node with the highest priority gets read requests).
69$cfg A modify -a server1.net -p 1025 -i $idx -P 123
70
71One can check currect status of all connections in the mountstats file:
72# cat /proc/$PID/mountstats
73...
74device none mounted on /mnt with fstype pohmel
75idx addr(:port) socket_type protocol active priority permissions
760 server1.net:1026 1 6 1 250 1
770 server2.net:1025 1 6 1 123 3
78
79Server installation.
80
81Creating a server, which listens at port 1025 and 0.0.0.0 address.
82Working root directory (note, that server chroots there, so you have to have appropriate permissions)
83is set to /mnt, server will negotiate hash/cipher with client, in case client requested it, there
84are appropriate key files.
85Number of working threads is set to 10.
86
87# ./fserver -a 0.0.0.0 -p 1025 -r /mnt -w 10 -K hash_key -k cipher_key
88
89 -A 6 - listen on ipv6 address. Default: Disabled.
90 -r root - path to root directory. Default: /tmp.
91 -a addr - listen address. Default: 0.0.0.0.
92 -p port - listen port. Default: 1025.
93 -w workers - number of workers per connected client. Default: 1.
94 -K file - hash key size. Default: none.
95 -k file - cipher key size. Default: none.
96 -h - this help.
97
98Number of worker threads specifies how many workers will be created for each client.
99Bulk single-client transafers usually are better handled with smaller number (like 1-3).
Documentation/filesystems/pohmelfs/network_protocol.txt+0−227
@@ -1,227 +0,0 @@
1POHMELFS network protocol.
2
3Basic structure used in network communication is following command:
4
5struct netfs_cmd
6{
7 __u16 cmd; /* Command number */
8 __u16 csize; /* Attached crypto information size */
9 __u16 cpad; /* Attached padding size */
10 __u16 ext; /* External flags */
11 __u32 size; /* Size of the attached data */
12 __u32 trans; /* Transaction id */
13 __u64 id; /* Object ID to operate on. Used for feedback.*/
14 __u64 start; /* Start of the object. */
15 __u64 iv; /* IV sequence */
16 __u8 data[0];
17};
18
19Commands can be embedded into transaction command (which in turn has own command),
20so one can extend protocol as needed without breaking backward compatibility as long
21as old commands are supported. All string lengths include tail 0 byte.
22
23All commands are transferred over the network in big-endian. CPU endianness is used at the end peers.
24
25@cmd - command number, which specifies command to be processed. Following
26 commands are used currently:
27
28 NETFS_READDIR = 1, /* Read directory for given inode number */
29 NETFS_READ_PAGE, /* Read data page from the server */
30 NETFS_WRITE_PAGE, /* Write data page to the server */
31 NETFS_CREATE, /* Create directory entry */
32 NETFS_REMOVE, /* Remove directory entry */
33 NETFS_LOOKUP, /* Lookup single object */
34 NETFS_LINK, /* Create a link */
35 NETFS_TRANS, /* Transaction */
36 NETFS_OPEN, /* Open intent */
37 NETFS_INODE_INFO, /* Metadata cache coherency synchronization message */
38 NETFS_PAGE_CACHE, /* Page cache invalidation message */
39 NETFS_READ_PAGES, /* Read multiple contiguous pages in one go */
40 NETFS_RENAME, /* Rename object */
41 NETFS_CAPABILITIES, /* Capabilities of the client, for example supported crypto */
42 NETFS_LOCK, /* Distributed lock message */
43 NETFS_XATTR_SET, /* Set extended attribute */
44 NETFS_XATTR_GET, /* Get extended attribute */
45
46@ext - external flags. Used by different commands to specify some extra arguments
47 like partial size of the embedded objects or creation flags.
48
49@size - size of the attached data. For NETFS_READ_PAGE and NETFS_READ_PAGES no data is attached,
50 but size of the requested data is incorporated here. It does not include size of the command
51 header (struct netfs_cmd) itself.
52
53@id - id of the object this command operates on. Each command can use it for own purpose.
54
55@start - start of the object this command operates on. Each command can use it for own purpose.
56
57@csize, @cpad - size and padding size of the (attached if needed) crypto information.
58
59Command specifications.
60
61@NETFS_READDIR
62This command is used to sync content of the remote dir to the client.
63
64@ext - length of the path to object.
65@size - the same.
66@id - local inode number of the directory to read.
67@start - zero.
68
69
70@NETFS_READ_PAGE
71This command is used to read data from remote server.
72Data size does not exceed local page cache size.
73
74@id - inode number.
75@start - first byte offset.
76@size - number of bytes to read plus length of the path to object.
77@ext - object path length.
78
79
80@NETFS_CREATE
81Used to create object.
82It does not require that all directories on top of the object were
83already created, it will create them automatically. Each object has
84associated @netfs_path_entry data structure, which contains creation
85mode (permissions and type) and length of the name as long as name itself.
86
87@start - 0
88@size - size of the all data structures needed to create a path
89@id - local inode number
90@ext - 0
91
92
93@NETFS_REMOVE
94Used to remove object.
95
96@ext - length of the path to object.
97@size - the same.
98@id - local inode number.
99@start - zero.
100
101
102@NETFS_LOOKUP
103Lookup information about object on server.
104
105@ext - length of the path to object.
106@size - the same.
107@id - local inode number of the directory to look object in.
108@start - local inode number of the object to look at.
109
110
111@NETFS_LINK
112Create hard of symlink.
113Command is sent as "object_path|target_path".
114
115@size - size of the above string.
116@id - parent local inode number.
117@start - 1 for symlink, 0 for hardlink.
118@ext - size of the "object_path" above.
119
120
121@NETFS_TRANS
122Transaction header.
123
124@size - incorporates all embedded command sizes including theirs header sizes.
125@start - transaction generation number - unique id used to find transaction.
126@ext - transaction flags. Unused at the moment.
127@id - 0.
128
129
130@NETFS_OPEN
131Open intent for given transaction.
132
133@id - local inode number.
134@start - 0.
135@size - path length to the object.
136@ext - open flags (O_RDWR and so on).
137
138
139@NETFS_INODE_INFO
140Metadata update command.
141It is sent to servers when attributes of the object are changed and received
142when data or metadata were updated. It operates with the following structure:
143
144struct netfs_inode_info
145{
146 unsigned int mode;
147 unsigned int nlink;
148 unsigned int uid;
149 unsigned int gid;
150 unsigned int blocksize;
151 unsigned int padding;
152 __u64 ino;
153 __u64 blocks;
154 __u64 rdev;
155 __u64 size;
156 __u64 version;
157};
158
159It effectively mirrors stat(2) returned data.
160
161
162@ext - path length to the object.
163@size - the same plus size of the netfs_inode_info structure.
164@id - local inode number.
165@start - 0.
166
167
168@NETFS_PAGE_CACHE
169Command is only received by clients. It contains information about
170page to be marked as not up-to-date.
171
172@id - client's inode number.
173@start - last byte of the page to be invalidated. If it is not equal to
174 current inode size, it will be vmtruncated().
175@size - 0
176@ext - 0
177
178
179@NETFS_READ_PAGES
180Used to read multiple contiguous pages in one go.
181
182@start - first byte of the contiguous region to read.
183@size - contains of two fields: lower 8 bits are used to represent page cache shift
184 used by client, another 3 bytes are used to get number of pages.
185@id - local inode number.
186@ext - path length to the object.
187
188
189@NETFS_RENAME
190Used to rename object.
191Attached data is formed into following string: "old_path|new_path".
192
193@id - local inode number.
194@start - parent inode number.
195@size - length of the above string.
196@ext - length of the old path part.
197
198
199@NETFS_CAPABILITIES
200Used to exchange crypto capabilities with server.
201If crypto capabilities are not supported by server, then client will disable it
202or fail (if 'crypto_fail_unsupported' mount options was specified).
203
204@id - superblock index. Used to specify crypto information for group of servers.
205@size - size of the attached capabilities structure.
206@start - 0.
207@size - 0.
208@scsize - 0.
209
210@NETFS_LOCK
211Used to send lock request/release messages. Although it sends byte range request
212and is capable of flushing pages based on that, it is not used, since all Linux
213filesystems lock the whole inode.
214
215@id - lock generation number.
216@start - start of the locked range.
217@size - size of the locked range.
218@ext - lock type: read/write. Not used actually. 15'th bit is used to determine,
219 if it is lock request (1) or release (0).
220
221@NETFS_XATTR_SET
222@NETFS_XATTR_GET
223Used to set/get extended attributes for given inode.
224@id - attribute generation number or xattr setting type
225@start - size of the attribute (request or attached)
226@size - name length, path len and data size for given attribute
227@ext - path length for given object
Documentation/filesystems/porting+16−0
@@ -622,3 +622,19 @@ in your dentry operations instead. · 621 unmodified lines
622 alloc_file_clone(file, flags, ops) does not affect any caller's references.622 alloc_file_clone(file, flags, ops) does not affect any caller's references.
623 On success you get a new struct file sharing the mount/dentry with the623 On success you get a new struct file sharing the mount/dentry with the
624 original, on failure - ERR_PTR().624 original, on failure - ERR_PTR().
625--
626[mandatory]
627 ->clone_file_range() and ->dedupe_file_range have been replaced with
628 ->remap_file_range(). See Documentation/filesystems/vfs.txt for more
629 information.
630--
631[recommended]
632 ->lookup() instances doing an equivalent of
633 if (IS_ERR(inode))
634 return ERR_CAST(inode);
635 return d_splice_alias(inode, dentry);
636 don't need to bother with the check - d_splice_alias() will do the
637 right thing when given ERR_PTR(...) as inode. Moreover, passing NULL
638 inode to d_splice_alias() will also do the right thing (equivalent of
639 d_add(dentry, NULL); return NULL;), so that kind of special cases
640 also doesn't need a separate treatment.
Documentation/filesystems/proc.txt+4−0
@@ -858,6 +858,7 @@ Writeback: 0 kB · 857 unmodified lines
858AnonPages: 861800 kB858AnonPages: 861800 kB
859Mapped: 280372 kB859Mapped: 280372 kB
860Shmem: 644 kB860Shmem: 644 kB
861KReclaimable: 168048 kB
861Slab: 284364 kB862Slab: 284364 kB
862SReclaimable: 159856 kB863SReclaimable: 159856 kB
863SUnreclaim: 124508 kB864SUnreclaim: 124508 kB
@@ -925,6 +926,9 @@ AnonHugePages: Non-file backed huge pages mapped into userspace page tables · 61 unmodified lines
925ShmemHugePages: Memory used by shared memory (shmem) and tmpfs allocated926ShmemHugePages: Memory used by shared memory (shmem) and tmpfs allocated
926 with huge pages927 with huge pages
927ShmemPmdMapped: Shared memory mapped into userspace with huge pages928ShmemPmdMapped: Shared memory mapped into userspace with huge pages
929KReclaimable: Kernel allocations that the kernel will attempt to reclaim
930 under memory pressure. Includes SReclaimable (below), and other
931 direct allocations with a shrinker.
928 Slab: in-kernel data structures cache932 Slab: in-kernel data structures cache
929SReclaimable: Part of Slab, that might be reclaimed, such as caches933SReclaimable: Part of Slab, that might be reclaimed, such as caches
930 SUnreclaim: Part of Slab, that cannot be reclaimed on memory pressure934 SUnreclaim: Part of Slab, that cannot be reclaimed on memory pressure
Documentation/filesystems/ubifs-authentication.md+426−0
@@ -0,0 +1,426 @@
1% UBIFS Authentication
2% sigma star gmbh
3% 2018
4
5# Introduction
6
7UBIFS utilizes the fscrypt framework to provide confidentiality for file
8contents and file names. This prevents attacks where an attacker is able to
9read contents of the filesystem on a single point in time. A classic example
10is a lost smartphone where the attacker is unable to read personal data stored
11on the device without the filesystem decryption key.
12
13At the current state, UBIFS encryption however does not prevent attacks where
14the attacker is able to modify the filesystem contents and the user uses the
15device afterwards. In such a scenario an attacker can modify filesystem
16contents arbitrarily without the user noticing. One example is to modify a
17binary to perform a malicious action when executed [DMC-CBC-ATTACK]. Since
18most of the filesystem metadata of UBIFS is stored in plain, this makes it
19fairly easy to swap files and replace their contents.
20
21Other full disk encryption systems like dm-crypt cover all filesystem metadata,
22which makes such kinds of attacks more complicated, but not impossible.
23Especially, if the attacker is given access to the device multiple points in
24time. For dm-crypt and other filesystems that build upon the Linux block IO
25layer, the dm-integrity or dm-verity subsystems [DM-INTEGRITY, DM-VERITY]
26can be used to get full data authentication at the block layer.
27These can also be combined with dm-crypt [CRYPTSETUP2].
28
29This document describes an approach to get file contents _and_ full metadata
30authentication for UBIFS. Since UBIFS uses fscrypt for file contents and file
31name encryption, the authentication system could be tied into fscrypt such that
32existing features like key derivation can be utilized. It should however also
33be possible to use UBIFS authentication without using encryption.
34
35
36## MTD, UBI & UBIFS
37
38On Linux, the MTD (Memory Technology Devices) subsystem provides a uniform
39interface to access raw flash devices. One of the more prominent subsystems that
40work on top of MTD is UBI (Unsorted Block Images). It provides volume management
41for flash devices and is thus somewhat similar to LVM for block devices. In
42addition, it deals with flash-specific wear-leveling and transparent I/O error
43handling. UBI offers logical erase blocks (LEBs) to the layers on top of it
44and maps them transparently to physical erase blocks (PEBs) on the flash.
45
46UBIFS is a filesystem for raw flash which operates on top of UBI. Thus, wear
47leveling and some flash specifics are left to UBI, while UBIFS focuses on
48scalability, performance and recoverability.
49
50
51
52 +------------+ +*******+ +-----------+ +-----+
53 | | * UBIFS * | UBI-BLOCK | | ... |
54 | JFFS/JFFS2 | +*******+ +-----------+ +-----+
55 | | +-----------------------------+ +-----------+ +-----+
56 | | | UBI | | MTD-BLOCK | | ... |
57 +------------+ +-----------------------------+ +-----------+ +-----+
58 +------------------------------------------------------------------+
59 | MEMORY TECHNOLOGY DEVICES (MTD) |
60 +------------------------------------------------------------------+
61 +-----------------------------+ +--------------------------+ +-----+
62 | NAND DRIVERS | | NOR DRIVERS | | ... |
63 +-----------------------------+ +--------------------------+ +-----+
64
65 Figure 1: Linux kernel subsystems for dealing with raw flash
66
67
68
69Internally, UBIFS maintains multiple data structures which are persisted on
70the flash:
71
72- *Index*: an on-flash B+ tree where the leaf nodes contain filesystem data
73- *Journal*: an additional data structure to collect FS changes before updating
74 the on-flash index and reduce flash wear.
75- *Tree Node Cache (TNC)*: an in-memory B+ tree that reflects the current FS
76 state to avoid frequent flash reads. It is basically the in-memory
77 representation of the index, but contains additional attributes.
78- *LEB property tree (LPT)*: an on-flash B+ tree for free space accounting per
79 UBI LEB.
80
81In the remainder of this section we will cover the on-flash UBIFS data
82structures in more detail. The TNC is of less importance here since it is never
83persisted onto the flash directly. More details on UBIFS can also be found in
84[UBIFS-WP].
85
86
87### UBIFS Index & Tree Node Cache
88
89Basic on-flash UBIFS entities are called *nodes*. UBIFS knows different types
90of nodes. Eg. data nodes (`struct ubifs_data_node`) which store chunks of file
91contents or inode nodes (`struct ubifs_ino_node`) which represent VFS inodes.
92Almost all types of nodes share a common header (`ubifs_ch`) containing basic
93information like node type, node length, a sequence number, etc. (see
94`fs/ubifs/ubifs-media.h`in kernel source). Exceptions are entries of the LPT
95and some less important node types like padding nodes which are used to pad
96unusable content at the end of LEBs.
97
98To avoid re-writing the whole B+ tree on every single change, it is implemented
99as *wandering tree*, where only the changed nodes are re-written and previous
100versions of them are obsoleted without erasing them right away. As a result,
101the index is not stored in a single place on the flash, but *wanders* around
102and there are obsolete parts on the flash as long as the LEB containing them is
103not reused by UBIFS. To find the most recent version of the index, UBIFS stores
104a special node called *master node* into UBI LEB 1 which always points to the
105most recent root node of the UBIFS index. For recoverability, the master node
106is additionally duplicated to LEB 2. Mounting UBIFS is thus a simple read of
107LEB 1 and 2 to get the current master node and from there get the location of
108the most recent on-flash index.
109
110The TNC is the in-memory representation of the on-flash index. It contains some
111additional runtime attributes per node which are not persisted. One of these is
112a dirty-flag which marks nodes that have to be persisted the next time the
113index is written onto the flash. The TNC acts as a write-back cache and all
114modifications of the on-flash index are done through the TNC. Like other caches,
115the TNC does not have to mirror the full index into memory, but reads parts of
116it from flash whenever needed. A *commit* is the UBIFS operation of updating the
117on-flash filesystem structures like the index. On every commit, the TNC nodes
118marked as dirty are written to the flash to update the persisted index.
119
120
121### Journal
122
123To avoid wearing out the flash, the index is only persisted (*commited*) when
124certain conditions are met (eg. `fsync(2)`). The journal is used to record
125any changes (in form of inode nodes, data nodes etc.) between commits
126of the index. During mount, the journal is read from the flash and replayed
127onto the TNC (which will be created on-demand from the on-flash index).
128
129UBIFS reserves a bunch of LEBs just for the journal called *log area*. The
130amount of log area LEBs is configured on filesystem creation (using
131`mkfs.ubifs`) and stored in the superblock node. The log area contains only
132two types of nodes: *reference nodes* and *commit start nodes*. A commit start
133node is written whenever an index commit is performed. Reference nodes are
134written on every journal update. Each reference node points to the position of
135other nodes (inode nodes, data nodes etc.) on the flash that are part of this
136journal entry. These nodes are called *buds* and describe the actual filesystem
137changes including their data.
138
139The log area is maintained as a ring. Whenever the journal is almost full,
140a commit is initiated. This also writes a commit start node so that during
141mount, UBIFS will seek for the most recent commit start node and just replay
142every reference node after that. Every reference node before the commit start
143node will be ignored as they are already part of the on-flash index.
144
145When writing a journal entry, UBIFS first ensures that enough space is
146available to write the reference node and buds part of this entry. Then, the
147reference node is written and afterwards the buds describing the file changes.
148On replay, UBIFS will record every reference node and inspect the location of
149the referenced LEBs to discover the buds. If these are corrupt or missing,
150UBIFS will attempt to recover them by re-reading the LEB. This is however only
151done for the last referenced LEB of the journal. Only this can become corrupt
152because of a power cut. If the recovery fails, UBIFS will not mount. An error
153for every other LEB will directly cause UBIFS to fail the mount operation.
154
155
156 | ---- LOG AREA ---- | ---------- MAIN AREA ------------ |
157
158 -----+------+-----+--------+---- ------+-----+-----+---------------
159 \ | | | | / / | | | \
160 / CS | REF | REF | | \ \ DENT | INO | INO | /
161 \ | | | | / / | | | \
162 ----+------+-----+--------+--- -------+-----+-----+----------------
163 | | ^ ^
164 | | | |
165 +------------------------+ |
166 | |
167 +-------------------------------+
168
169
170 Figure 2: UBIFS flash layout of log area with commit start nodes
171 (CS) and reference nodes (REF) pointing to main area
172 containing their buds
173
174
175### LEB Property Tree/Table
176
177The LEB property tree is used to store per-LEB information. This includes the
178LEB type and amount of free and *dirty* (old, obsolete content) space [1] on
179the LEB. The type is important, because UBIFS never mixes index nodes with data
180nodes on a single LEB and thus each LEB has a specific purpose. This again is
181useful for free space calculations. See [UBIFS-WP] for more details.
182
183The LEB property tree again is a B+ tree, but it is much smaller than the
184index. Due to its smaller size it is always written as one chunk on every
185commit. Thus, saving the LPT is an atomic operation.
186
187
188[1] Since LEBs can only be appended and never overwritten, there is a
189difference between free space ie. the remaining space left on the LEB to be
190written to without erasing it and previously written content that is obsolete
191but can't be overwritten without erasing the full LEB.
192
193
194# UBIFS Authentication
195
196This chapter introduces UBIFS authentication which enables UBIFS to verify
197the authenticity and integrity of metadata and file contents stored on flash.
198
199
200## Threat Model
201
202UBIFS authentication enables detection of offline data modification. While it
203does not prevent it, it enables (trusted) code to check the integrity and
204authenticity of on-flash file contents and filesystem metadata. This covers
205attacks where file contents are swapped.
206
207UBIFS authentication will not protect against rollback of full flash contents.
208Ie. an attacker can still dump the flash and restore it at a later time without
209detection. It will also not protect against partial rollback of individual
210index commits. That means that an attacker is able to partially undo changes.
211This is possible because UBIFS does not immediately overwrites obsolete
212versions of the index tree or the journal, but instead marks them as obsolete
213and garbage collection erases them at a later time. An attacker can use this by
214erasing parts of the current tree and restoring old versions that are still on
215the flash and have not yet been erased. This is possible, because every commit
216will always write a new version of the index root node and the master node
217without overwriting the previous version. This is further helped by the
218wear-leveling operations of UBI which copies contents from one physical
219eraseblock to another and does not atomically erase the first eraseblock.
220
221UBIFS authentication does not cover attacks where an attacker is able to
222execute code on the device after the authentication key was provided.
223Additional measures like secure boot and trusted boot have to be taken to
224ensure that only trusted code is executed on a device.
225
226
227## Authentication
228
229To be able to fully trust data read from flash, all UBIFS data structures
230stored on flash are authenticated. That is:
231
232- The index which includes file contents, file metadata like extended
233 attributes, file length etc.
234- The journal which also contains file contents and metadata by recording changes
235 to the filesystem
236- The LPT which stores UBI LEB metadata which UBIFS uses for free space accounting
237
238
239### Index Authentication
240
241Through UBIFS' concept of a wandering tree, it already takes care of only
242updating and persisting changed parts from leaf node up to the root node
243of the full B+ tree. This enables us to augment the index nodes of the tree
244with a hash over each node's child nodes. As a result, the index basically also
245a Merkle tree. Since the leaf nodes of the index contain the actual filesystem
246data, the hashes of their parent index nodes thus cover all the file contents
247and file metadata. When a file changes, the UBIFS index is updated accordingly
248from the leaf nodes up to the root node including the master node. This process
249can be hooked to recompute the hash only for each changed node at the same time.
250Whenever a file is read, UBIFS can verify the hashes from each leaf node up to
251the root node to ensure the node's integrity.
252
253To ensure the authenticity of the whole index, the UBIFS master node stores a
254keyed hash (HMAC) over its own contents and a hash of the root node of the index
255tree. As mentioned above, the master node is always written to the flash whenever
256the index is persisted (ie. on index commit).
257
258Using this approach only UBIFS index nodes and the master node are changed to
259include a hash. All other types of nodes will remain unchanged. This reduces
260the storage overhead which is precious for users of UBIFS (ie. embedded
261devices).
262
263
264 +---------------+
265 | Master Node |
266 | (hash) |
267 +---------------+
268 |
269 v
270 +-------------------+
271 | Index Node #1 |
272 | |
273 | branch0 branchn |
274 | (hash) (hash) |
275 +-------------------+
276 | ... | (fanout: 8)
277 | |
278 +-------+ +------+
279 | |
280 v v
281 +-------------------+ +-------------------+
282 | Index Node #2 | | Index Node #3 |
283 | | | |
284 | branch0 branchn | | branch0 branchn |
285 | (hash) (hash) | | (hash) (hash) |
286 +-------------------+ +-------------------+
287 | ... | ... |
288 v v v
289 +-----------+ +----------+ +-----------+
290 | Data Node | | INO Node | | DENT Node |
291 +-----------+ +----------+ +-----------+
292
293
294 Figure 3: Coverage areas of index node hash and master node HMAC
295
296
297
298The most important part for robustness and power-cut safety is to atomically
299persist the hash and file contents. Here the existing UBIFS logic for how
300changed nodes are persisted is already designed for this purpose such that
301UBIFS can safely recover if a power-cut occurs while persisting. Adding
302hashes to index nodes does not change this since each hash will be persisted
303atomically together with its respective node.
304
305
306### Journal Authentication
307
308The journal is authenticated too. Since the journal is continuously written
309it is necessary to also add authentication information frequently to the
310journal so that in case of a powercut not too much data can't be authenticated.
311This is done by creating a continuous hash beginning from the commit start node
312over the previous reference nodes, the current reference node, and the bud
313nodes. From time to time whenever it is suitable authentication nodes are added
314between the bud nodes. This new node type contains a HMAC over the current state
315of the hash chain. That way a journal can be authenticated up to the last
316authentication node. The tail of the journal which may not have a authentication
317node cannot be authenticated and is skipped during journal replay.
318
319We get this picture for journal authentication:
320
321 ,,,,,,,,
322 ,......,...........................................
323 ,. CS , hash1.----. hash2.----.
324 ,. | , . |hmac . |hmac
325 ,. v , . v . v
326 ,.REF#0,-> bud -> bud -> bud.-> auth -> bud -> bud.-> auth ...
327 ,..|...,...........................................
328 , | ,
329 , | ,,,,,,,,,,,,,,,
330 . | hash3,----.
331 , | , |hmac
332 , v , v
333 , REF#1 -> bud -> bud,-> auth ...
334 ,,,|,,,,,,,,,,,,,,,,,,
335 v
336 REF#2 -> ...
337 |
338 V
339 ...
340
341Since the hash also includes the reference nodes an attacker cannot reorder or
342skip any journal heads for replay. An attacker can only remove bud nodes or
343reference nodes from the end of the journal, effectively rewinding the
344filesystem at maximum back to the last commit.
345
346The location of the log area is stored in the master node. Since the master
347node is authenticated with a HMAC as described above, it is not possible to
348tamper with that without detection. The size of the log area is specified when
349the filesystem is created using `mkfs.ubifs` and stored in the superblock node.
350To avoid tampering with this and other values stored there, a HMAC is added to
351the superblock struct. The superblock node is stored in LEB 0 and is only
352modified on feature flag or similar changes, but never on file changes.
353
354
355### LPT Authentication
356
357The location of the LPT root node on the flash is stored in the UBIFS master
358node. Since the LPT is written and read atomically on every commit, there is
359no need to authenticate individual nodes of the tree. It suffices to
360protect the integrity of the full LPT by a simple hash stored in the master
361node. Since the master node itself is authenticated, the LPTs authenticity can
362be verified by verifying the authenticity of the master node and comparing the
363LTP hash stored there with the hash computed from the read on-flash LPT.
364
365
366## Key Management
367
368For simplicity, UBIFS authentication uses a single key to compute the HMACs
369of superblock, master, commit start and reference nodes. This key has to be
370available on creation of the filesystem (`mkfs.ubifs`) to authenticate the
371superblock node. Further, it has to be available on mount of the filesystem
372to verify authenticated nodes and generate new HMACs for changes.
373
374UBIFS authentication is intended to operate side-by-side with UBIFS encryption
375(fscrypt) to provide confidentiality and authenticity. Since UBIFS encryption
376has a different approach of encryption policies per directory, there can be
377multiple fscrypt master keys and there might be folders without encryption.
378UBIFS authentication on the other hand has an all-or-nothing approach in the
379sense that it either authenticates everything of the filesystem or nothing.
380Because of this and because UBIFS authentication should also be usable without
381encryption, it does not share the same master key with fscrypt, but manages
382a dedicated authentication key.
383
384The API for providing the authentication key has yet to be defined, but the
385key can eg. be provided by userspace through a keyring similar to the way it
386is currently done in fscrypt. It should however be noted that the current
387fscrypt approach has shown its flaws and the userspace API will eventually
388change [FSCRYPT-POLICY2].
389
390Nevertheless, it will be possible for a user to provide a single passphrase
391or key in userspace that covers UBIFS authentication and encryption. This can
392be solved by the corresponding userspace tools which derive a second key for
393authentication in addition to the derived fscrypt master key used for
394encryption.
395
396To be able to check if the proper key is available on mount, the UBIFS
397superblock node will additionally store a hash of the authentication key. This
398approach is similar to the approach proposed for fscrypt encryption policy v2
399[FSCRYPT-POLICY2].
400
401
402# Future Extensions
403
404In certain cases where a vendor wants to provide an authenticated filesystem
405image to customers, it should be possible to do so without sharing the secret
406UBIFS authentication key. Instead, in addition the each HMAC a digital
407signature could be stored where the vendor shares the public key alongside the
408filesystem image. In case this filesystem has to be modified afterwards,
409UBIFS can exchange all digital signatures with HMACs on first mount similar
410to the way the IMA/EVM subsystem deals with such situations. The HMAC key
411will then have to be provided beforehand in the normal way.
412
413
414# References
415
416[CRYPTSETUP2] http://www.saout.de/pipermail/dm-crypt/2017-November/005745.html
417
418[DMC-CBC-ATTACK] http://www.jakoblell.com/blog/2013/12/22/practical-malleability-attack-against-cbc-encrypted-luks-partitions/
419
420[DM-INTEGRITY] https://www.kernel.org/doc/Documentation/device-mapper/dm-integrity.txt
421
422[DM-VERITY] https://www.kernel.org/doc/Documentation/device-mapper/verity.txt
423
424[FSCRYPT-POLICY2] https://www.spinics.net/lists/linux-ext4/msg58710.html
425
426[UBIFS-WP] http://www.linux-mtd.infradead.org/doc/ubifs_whitepaper.pdf
Documentation/filesystems/ubifs.txt+7−0
@@ -91,6 +91,13 @@ chk_data_crc do not skip checking CRCs on data nodes · 90 unmodified lines
91compr=none override default compressor and set it to "none"91compr=none override default compressor and set it to "none"
92compr=lzo override default compressor and set it to "lzo"92compr=lzo override default compressor and set it to "lzo"
93compr=zlib override default compressor and set it to "zlib"93compr=zlib override default compressor and set it to "zlib"
94auth_key= specify the key used for authenticating the filesystem.
95 Passing this option makes authentication mandatory.
96 The passed key must be present in the kernel keyring
97 and must be of type 'logon'
98auth_hash_name= The hash algorithm used for authentication. Used for
99 both hashing and for creating HMACs. Typical values
100 include "sha256" or "sha512"
94 101
95 102
96Quick usage instructions103Quick usage instructions
Documentation/filesystems/vfs.txt+15−7
@@ -883,8 +883,9 @@ struct file_operations { · 882 unmodified lines
883 unsigned (*mmap_capabilities)(struct file *);883 unsigned (*mmap_capabilities)(struct file *);
884#endif884#endif
885 ssize_t (*copy_file_range)(struct file *, loff_t, struct file *, loff_t, size_t, unsigned int);885 ssize_t (*copy_file_range)(struct file *, loff_t, struct file *, loff_t, size_t, unsigned int);
886 int (*clone_file_range)(struct file *, loff_t, struct file *, loff_t, u64);886 loff_t (*remap_file_range)(struct file *file_in, loff_t pos_in,
887 int (*dedupe_file_range)(struct file *, loff_t, struct file *, loff_t, u64);887 struct file *file_out, loff_t pos_out,
888 loff_t len, unsigned int remap_flags);
888 int (*fadvise)(struct file *, loff_t, loff_t, int);889 int (*fadvise)(struct file *, loff_t, loff_t, int);
889};890};
890 891
@@ -960,11 +961,18 @@ otherwise noted. · 69 unmodified lines
960 961
961 copy_file_range: called by the copy_file_range(2) system call.962 copy_file_range: called by the copy_file_range(2) system call.
962 963
963 clone_file_range: called by the ioctl(2) system call for FICLONERANGE and964 remap_file_range: called by the ioctl(2) system call for FICLONERANGE and
964 FICLONE commands.965 FICLONE and FIDEDUPERANGE commands to remap file ranges. An
965 966 implementation should remap len bytes at pos_in of the source file into
966 dedupe_file_range: called by the ioctl(2) system call for FIDEDUPERANGE967 the dest file at pos_out. Implementations must handle callers passing
967 command.968 in len == 0; this means "remap to the end of the source file". The
969 return value should the number of bytes remapped, or the usual
970 negative error code if errors occurred before any bytes were remapped.
971 The remap_flags parameter accepts REMAP_FILE_* flags. If
972 REMAP_FILE_DEDUP is set then the implementation must only remap if the
973 requested file ranges have identical contents. If REMAP_CAN_SHORTEN is
974 set, the caller is ok with the implementation shortening the request
975 length to satisfy alignment or EOF requirements (or any other reason).
968 976
969 fadvise: possibly called by the fadvise64() system call.977 fadvise: possibly called by the fadvise64() system call.
970 978
Documentation/fmc/00-INDEX+0−38
@@ -1,38 +0,0 @@
1
2Documentation in this directory comes from sections of the manual we
3wrote for the externally-developed fmc-bus package. The complete
4manual as of today (2013-02) is available in PDF format at
5http://www.ohwr.org/projects/fmc-bus/files
6
700-INDEX
8 - this file.
9
10FMC-and-SDB.txt
11 - What are FMC and SDB, basic concepts for this framework
12
13API.txt
14 - The functions that are exported by the bus driver
15
16parameters.txt
17 - The module parameters
18
19carrier.txt
20 - writing a carrier (a device)
21
22mezzanine.txt
23 - writing code for your mezzanine (a driver)
24
25identifiers.txt
26 - how identification and matching works
27
28fmc-fakedev.txt
29 - about drivers/fmc/fmc-fakedev.ko
30
31fmc-trivial.txt
32 - about drivers/fmc/fmc-trivial.ko
33
34fmc-write-eeprom.txt
35 - about drivers/fmc/fmc-write-eeprom.ko
36
37fmc-chardev.txt
38 - about drivers/fmc/fmc-chardev.ko
Documentation/gpio/00-INDEX+0−4
@@ -1,4 +0,0 @@
100-INDEX
2 - This file
3sysfs.txt
4 - Information about the GPIO sysfs interface
Documentation/gpu/amdgpu-dc.rst+68−0
@@ -0,0 +1,68 @@
1===================================
2drm/amd/display - Display Core (DC)
3===================================
4
5*placeholder - general description of supported platforms, what dc is, etc.*
6
7Because it is partially shared with other operating systems, the Display Core
8Driver is divided in two pieces.
9
101. **Display Core (DC)** contains the OS-agnostic components. Things like
11 hardware programming and resource management are handled here.
122. **Display Manager (DM)** contains the OS-dependent components. Hooks to the
13 amdgpu base driver and DRM are implemented here.
14
15It doesn't help that the entire package is frequently referred to as DC. But
16with the context in mind, it should be clear.
17
18When CONFIG_DRM_AMD_DC is enabled, DC will be initialized by default for
19supported ASICs. To force disable, set `amdgpu.dc=0` on kernel command line.
20Likewise, to force enable on unsupported ASICs, set `amdgpu.dc=1`.
21
22To determine if DC is loaded, search dmesg for the following entry:
23
24``Display Core initialized with <version number here>``
25
26AMDgpu Display Manager
27======================
28
29.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
30 :doc: overview
31
32.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
33 :internal:
34
35Lifecycle
36---------
37
38.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
39 :doc: DM Lifecycle
40
41.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
42 :functions: dm_hw_init dm_hw_fini
43
44Interrupts
45----------
46
47.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
48 :doc: overview
49
50.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
51 :internal:
52
53.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
54 :functions: register_hpd_handlers dm_crtc_high_irq dm_pflip_high_irq
55
56Atomic Implementation
57---------------------
58
59.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
60 :doc: atomic
61
62.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
63 :functions: amdgpu_dm_atomic_check amdgpu_dm_atomic_commit_tail
64
65Display Core
66============
67
68**WIP**
Documentation/gpu/drivers.rst+1−0
@@ -5,6 +5,7 @@ GPU Driver Documentation · 4 unmodified lines
5.. toctree::5.. toctree::
6 6
7 amdgpu7 amdgpu
8 amdgpu-dc
8 i9159 i915
9 meson10 meson
10 pl11111 pl111
Documentation/gpu/drm-kms-helpers.rst+14−5
@@ -59,19 +59,28 @@ Implementing Asynchronous Atomic Commit · 58 unmodified lines
59.. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c59.. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
60 :doc: implementing nonblocking commit60 :doc: implementing nonblocking commit
61 61
62Helper Functions Reference
63--------------------------
64
65.. kernel-doc:: include/drm/drm_atomic_helper.h
66 :internal:
67
68.. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
69 :export:
70
62Atomic State Reset and Initialization71Atomic State Reset and Initialization
63-------------------------------------72-------------------------------------
64 73
65.. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c74.. kernel-doc:: drivers/gpu/drm/drm_atomic_state_helper.c
66 :doc: atomic state reset and initialization75 :doc: atomic state reset and initialization
67 76
68Helper Functions Reference77Atomic State Helper Reference
69--------------------------78-----------------------------
70 79
71.. kernel-doc:: include/drm/drm_atomic_helper.h80.. kernel-doc:: include/drm/drm_atomic_state_helper.h
72 :internal:81 :internal:
73 82
74.. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c83.. kernel-doc:: drivers/gpu/drm/drm_atomic_state_helper.c
75 :export:84 :export:
76 85
77Simple KMS Helper Reference86Simple KMS Helper Reference
Documentation/gpu/drm-mm.rst+2−2
@@ -72,8 +72,8 @@ object TTM to provide a pool for buffer object allocation by clients and · 71 unmodified lines
72the kernel itself. The type of this object should be72the kernel itself. The type of this object should be
73TTM_GLOBAL_TTM_BO, and its size should be sizeof(struct73TTM_GLOBAL_TTM_BO, and its size should be sizeof(struct
74ttm_bo_global). Again, driver-specific init and release functions may74ttm_bo_global). Again, driver-specific init and release functions may
75be provided, likely eventually calling ttm_bo_global_init() and75be provided, likely eventually calling ttm_bo_global_ref_init() and
76ttm_bo_global_release(), respectively. Also, like the previous76ttm_bo_global_ref_release(), respectively. Also, like the previous
77object, ttm_global_item_ref() is used to create an initial reference77object, ttm_global_item_ref() is used to create an initial reference
78count for the TTM, which will call your initialization function.78count for the TTM, which will call your initialization function.
79 79
Documentation/gpu/drm-uapi.rst+3−0
@@ -197,6 +197,9 @@ EPERM/EACCESS: · 196 unmodified lines
197 difference between EACCESS and EPERM.197 difference between EACCESS and EPERM.
198 198
199ENODEV:199ENODEV:
200 The device is not (yet) present or fully initialized.
201
202EOPNOTSUPP:
200 Feature (like PRIME, modesetting, GEM) is not supported by the driver.203 Feature (like PRIME, modesetting, GEM) is not supported by the driver.
201 204
202ENXIO:205ENXIO:
Documentation/gpu/todo.rst+10−0
@@ -339,6 +339,16 @@ Some of these date from the very introduction of KMS in 2008 ... · 338 unmodified lines
339 leftovers from older (never merged into upstream) KMS designs where modes339 leftovers from older (never merged into upstream) KMS designs where modes
340 where set using their ID, including support to add/remove modes.340 where set using their ID, including support to add/remove modes.
341 341
342- Make ->funcs and ->helper_private vtables optional. There's a bunch of empty
343 function tables in drivers, but before we can remove them we need to make sure
344 that all the users in helpers and drivers do correctly check for a NULL
345 vtable.
346
347- Cleanup up the various ->destroy callbacks. A lot of them just wrapt the
348 drm_*_cleanup implementations and can be removed. Some tack a kfree() at the
349 end, for which we could add drm_*_cleanup_kfree(). And then there's the (for
350 historical reasons) misnamed drm_primary_helper_destroy() function.
351
342Better Testing352Better Testing
343==============353==============
344 354
Documentation/gpu/vkms.rst+99−2
@@ -10,8 +10,8 @@ · 9 unmodified lines
10TODO10TODO
11====11====
12 12
13CRC API13CRC API Improvements
14-------14--------------------
15 15
16- Optimize CRC computation ``compute_crc()`` and plane blending ``blend()``16- Optimize CRC computation ``compute_crc()`` and plane blending ``blend()``
17 17
@@ -22,3 +22,100 @@ CRC API · 4 unmodified lines
22 22
23- Add igt test to check extreme alpha values i.e. fully opaque and fully23- Add igt test to check extreme alpha values i.e. fully opaque and fully
24 transparent (intermediate values are affected by hw-specific rounding modes).24 transparent (intermediate values are affected by hw-specific rounding modes).
25
26Vblank issues
27-------------
28
29Some IGT test cases are failing. Need to analyze why and fix the issues:
30
31- plain-flip-fb-recreate
32- plain-flip-ts-check
33- flip-vs-blocking-wf-vblank
34- plain-flip-fb-recreate-interruptible
35- flip-vs-wf_vblank-interruptible
36
37Runtime Configuration
38---------------------
39
40We want to be able to reconfigure vkms instance without having to reload the
41module. Use/Test-cases:
42
43- Hotplug/hotremove connectors on the fly (to be able to test DP MST handling of
44 compositors).
45
46- Configure planes/crtcs/connectors (we'd need some code to have more than 1 of
47 them first).
48
49- Change output configuration: Plug/unplug screens, change EDID, allow changing
50 the refresh rate.
51
52The currently proposed solution is to expose vkms configuration through
53configfs. All existing module options should be supported through configfs too.
54
55Add Plane Features
56------------------
57
58There's lots of plane features we could add support for:
59
60- Real overlay planes, not just cursor.
61
62- Full alpha blending on all planes.
63
64- Rotation, scaling.
65
66- Additional buffer formats, especially YUV formats for video like NV12.
67 Low/high bpp RGB formats would also be interesting.
68
69- Async updates (currently only possible on cursor plane using the legacy cursor
70 api).
71
72For all of these, we also want to review the igt test coverage and make sure all
73relevant igt testcases work on vkms.
74
75Writeback support
76-----------------
77
78Currently vkms only computes a CRC for each frame. Once we have additional plane
79features, we could write back the entire composited frame, and expose it as:
80
81- Writeback connector. This is useful for testing compositors if you don't have
82 hardware with writeback support.
83
84- As a v4l device. This is useful for debugging compositors on special vkms
85 configurations, so that developers see what's really going on.
86
87Prime Buffer Sharing
88--------------------
89
90We already have vgem, which is a gem driver for testing rendering, similar to
91how vkms is for testing the modeset side. Adding buffer sharing support to vkms
92allows us to test them together, to test synchronization and lots of other
93features. Also, this allows compositors to test whether they work correctly on
94SoC chips, where the display and rendering is very often split between 2
95drivers.
96
97Output Features
98---------------
99
100- Variable refresh rate/freesync support. This probably needs prime buffer
101 sharing support, so that we can use vgem fences to simulate rendering in
102 testing. Also needs support to specify the EDID.
103
104- Add support for link status, so that compositors can validate their runtime
105 fallbacks when e.g. a Display Port link goes bad.
106
107- All the hotplug handling describe under "Runtime Configuration".
108
109Atomic Check using eBPF
110-----------------------
111
112Atomic drivers have lots of restrictions which are not exposed to userspace in
113any explicit form through e.g. possible property values. Userspace can only
114inquiry about these limits through the atomic IOCTL, possibly using the
115TEST_ONLY flag. Trying to add configurable code for all these limits, to allow
116compositors to be tested against them, would be rather futile exercise. Instead
117we could add support for eBPF to validate any kind of atomic state, and
118implement a library of different restrictions.
119
120This needs a bunch of features (plane compositing, multiple outputs, ...)
121enabled already to make sense.
Documentation/hwmon/ina3221+2−0
@@ -21,6 +21,8 @@ and power are calculated host-side from these. · 20 unmodified lines
21Sysfs entries21Sysfs entries
22-------------22-------------
23 23
24in[123]_label Voltage channel labels
25in[123]_enable Voltage channel enable controls
24in[123]_input Bus voltage(mV) channels26in[123]_input Bus voltage(mV) channels
25curr[123]_input Current(mA) measurement channels27curr[123]_input Current(mA) measurement channels
26shunt[123]_resistor Shunt resistance(uOhm) channels28shunt[123]_resistor Shunt resistance(uOhm) channels
Documentation/hwmon/lm75+3−3
@@ -17,8 +17,8 @@ Supported chips: · 16 unmodified lines
17 Addresses scanned: none17 Addresses scanned: none
18 Datasheet: Publicly available at the Maxim website18 Datasheet: Publicly available at the Maxim website
19 http://www.maximintegrated.com/19 http://www.maximintegrated.com/
20 * Maxim MAX6625, MAX662620 * Maxim MAX6625, MAX6626, MAX31725, MAX31726
21 Prefixes: 'max6625', 'max6626'21 Prefixes: 'max6625', 'max6626', 'max31725', 'max31726'
22 Addresses scanned: none22 Addresses scanned: none
23 Datasheet: Publicly available at the Maxim website23 Datasheet: Publicly available at the Maxim website
24 http://www.maxim-ic.com/24 http://www.maxim-ic.com/
@@ -86,7 +86,7 @@ The LM75 is essentially an industry standard; there may be other · 61 unmodified lines
86LM75 clones not listed here, with or without various enhancements,86LM75 clones not listed here, with or without various enhancements,
87that are supported. The clones are not detected by the driver, unless87that are supported. The clones are not detected by the driver, unless
88they reproduce the exact register tricks of the original LM75, and must88they reproduce the exact register tricks of the original LM75, and must
89therefore be instantiated explicitly. Higher resolution up to 12-bit89therefore be instantiated explicitly. Higher resolution up to 16-bit
90is supported by this driver, other specific enhancements are not.90is supported by this driver, other specific enhancements are not.
91 91
92The LM77 is not supported, contrary to what we pretended for a long time.92The LM77 is not supported, contrary to what we pretended for a long time.
Documentation/hwmon/ltc2978+5−0
@@ -55,6 +55,10 @@ Supported chips: · 54 unmodified lines
55 Prefix: 'ltm4676'55 Prefix: 'ltm4676'
56 Addresses scanned: -56 Addresses scanned: -
57 Datasheet: http://www.linear.com/product/ltm467657 Datasheet: http://www.linear.com/product/ltm4676
58 * Analog Devices LTM4686
59 Prefix: 'ltm4686'
60 Addresses scanned: -
61 Datasheet: http://www.analog.com/ltm4686
58 62
59Author: Guenter Roeck <linux@roeck-us.net>63Author: Guenter Roeck <linux@roeck-us.net>
60 64
@@ -76,6 +80,7 @@ additional components on a single die. The chip is instantiated and reported · 15 unmodified lines
76as two separate chips on two different I2C bus addresses.80as two separate chips on two different I2C bus addresses.
77LTM4675 is a dual 9A or single 18A μModule regulator81LTM4675 is a dual 9A or single 18A μModule regulator
78LTM4676 is a dual 13A or single 26A uModule regulator.82LTM4676 is a dual 13A or single 26A uModule regulator.
83LTM4686 is a dual 10A or single 20A uModule regulator.
79 84
80 85
81Usage Notes86Usage Notes
Documentation/hwmon/mc13783-adc+4−4
@@ -2,12 +2,12 @@ Kernel driver mc13783-adc · 1 unmodified line
2=========================2=========================
3 3
4Supported chips:4Supported chips:
5 * Freescale Atlas MC137835 * Freescale MC13783
6 Prefix: 'mc13783'6 Prefix: 'mc13783'
7 Datasheet: http://www.freescale.com/files/rf_if/doc/data_sheet/MC13783.pdf?fsrch=17 Datasheet: https://www.nxp.com/docs/en/data-sheet/MC13783.pdf
8 * Freescale Atlas MC138928 * Freescale MC13892
9 Prefix: 'mc13892'9 Prefix: 'mc13892'
10 Datasheet: http://cache.freescale.com/files/analog/doc/data_sheet/MC13892.pdf?fsrch=1&sr=110 Datasheet: https://www.nxp.com/docs/en/data-sheet/MC13892.pdf
11 11
12Authors:12Authors:
13 Sascha Hauer <s.hauer@pengutronix.de>13 Sascha Hauer <s.hauer@pengutronix.de>
Documentation/i2c/busses/i2c-nvidia-gpu+18−0
@@ -0,0 +1,18 @@
1Kernel driver i2c-nvidia-gpu
2
3Datasheet: not publicly available.
4
5Authors:
6 Ajay Gupta <ajayg@nvidia.com>
7
8Description
9-----------
10
11i2c-nvidia-gpu is a driver for I2C controller included in NVIDIA Turing
12and later GPUs and it is used to communicate with Type-C controller on GPUs.
13
14If your 'lspci -v' listing shows something like the following,
15
1601:00.3 Serial bus controller [0c80]: NVIDIA Corporation Device 1ad9 (rev a1)
17
18then this driver should support the I2C controller of your GPU.
Documentation/ide/00-INDEX+0−14
@@ -1,14 +0,0 @@
100-INDEX
2 - this file
3ChangeLog.ide-cd.1994-2004
4 - ide-cd changelog
5ChangeLog.ide-floppy.1996-2002
6 - ide-floppy changelog
7ChangeLog.ide-tape.1995-2002
8 - ide-tape changelog
9ide-tape.txt
10 - info on the IDE ATAPI streaming tape driver
11ide.txt
12 - important info for users of ATA devices (IDE/EIDE disks and CD-ROMS).
13warm-plug-howto.txt
14 - using sysfs to remove and add IDE devices.
Documentation/index.rst+1−4
@@ -22,10 +22,7 @@ The following describes the license of the Linux kernel source code · 21 unmodified lines
22(GPLv2), how to properly mark the license of individual files in the source22(GPLv2), how to properly mark the license of individual files in the source
23tree, as well as links to the full license text.23tree, as well as links to the full license text.
24 24
25.. toctree::25* :ref:`kernel_licensing`
26 :maxdepth: 2
27
28 process/license-rules.rst
29 26
30User-oriented documentation27User-oriented documentation
31---------------------------28---------------------------
Documentation/input/event-codes.rst+10−1
@@ -190,7 +190,16 @@ A few EV_REL codes have special meanings: · 189 unmodified lines
190* REL_WHEEL, REL_HWHEEL:190* REL_WHEEL, REL_HWHEEL:
191 191
192 - These codes are used for vertical and horizontal scroll wheels,192 - These codes are used for vertical and horizontal scroll wheels,
193 respectively.193 respectively. The value is the number of "notches" moved on the wheel, the
194 physical size of which varies by device. For high-resolution wheels (which
195 report multiple events for each notch of movement, or do not have notches)
196 this may be an approximation based on the high-resolution scroll events.
197
198* REL_WHEEL_HI_RES:
199
200 - If a vertical scroll wheel supports high-resolution scrolling, this code
201 will be emitted in addition to REL_WHEEL. The value is the (approximate)
202 distance travelled by the user's finger, in microns.
194 203
195EV_ABS204EV_ABS
196------205------
Documentation/ioctl/00-INDEX+0−12
@@ -1,12 +0,0 @@
100-INDEX
2 - this file
3botching-up-ioctls.txt
4 - how to avoid botching up ioctls
5cdrom.txt
6 - summary of CDROM ioctl calls
7hdio.txt
8 - summary of HDIO_ ioctl calls
9ioctl-decoding.txt
10 - how to decode the bits of an IOCTL code
11ioctl-number.txt
12 - how to implement and register device/driver ioctl calls
Documentation/ioctl/ioctl-number.txt+1−1
@@ -201,7 +201,7 @@ Code Seq#(hex) Include File Comments · 200 unmodified lines
201'X' 01 linux/pktcdvd.h conflict!201'X' 01 linux/pktcdvd.h conflict!
202'Y' all linux/cyclades.h202'Y' all linux/cyclades.h
203'Z' 14-15 drivers/message/fusion/mptctl.h203'Z' 14-15 drivers/message/fusion/mptctl.h
204'[' 00-07 linux/usb/tmc.h USB Test and Measurement Devices204'[' 00-3F linux/usb/tmc.h USB Test and Measurement Devices
205 <mailto:gregkh@linuxfoundation.org>205 <mailto:gregkh@linuxfoundation.org>
206'a' all linux/atm*.h, linux/sonet.h ATM on linux206'a' all linux/atm*.h, linux/sonet.h ATM on linux
207 <http://lrcwww.epfl.ch/>207 <http://lrcwww.epfl.ch/>
Documentation/isdn/00-INDEX+0−42
@@ -1,42 +0,0 @@
100-INDEX
2 - this file (info on ISDN implementation for Linux)
3CREDITS
4 - list of the kind folks that brought you this stuff.
5HiSax.cert
6 - information about the ITU approval certification of the HiSax driver.
7INTERFACE
8 - description of isdn4linux Link Level and Hardware Level interfaces.
9INTERFACE.fax
10 - description of the fax subinterface of isdn4linux.
11INTERFACE.CAPI
12 - description of kernel CAPI Link Level to Hardware Level interface.
13README
14 - general info on what you need and what to do for Linux ISDN.
15README.FAQ
16 - general info for FAQ.
17README.HiSax
18 - info on the HiSax driver which replaces the old teles.
19README.audio
20 - info for running audio over ISDN.
21README.avmb1
22 - info on driver for AVM-B1 ISDN card.
23README.concap
24 - info on "CONCAP" encapsulation protocol interface used for X.25.
25README.diversion
26 - info on module for isdn diversion services.
27README.fax
28 - info for using Fax over ISDN.
29README.gigaset
30 - info on the drivers for Siemens Gigaset ISDN adapters
31README.hfc-pci
32 - info on hfc-pci based cards.
33README.hysdn
34 - info on driver for Hypercope active HYSDN cards
35README.mISDN
36 - info on the Modular ISDN subsystem (mISDN)
37README.syncppp
38 - info on running Sync PPP over ISDN.
39README.x25
40 - info for running X.25 over ISDN.
41syncPPP.FAQ
42 - frequently asked questions about running PPP over ISDN.
Documentation/kbuild/00-INDEX+0−14
@@ -1,14 +0,0 @@
100-INDEX
2 - this file: info on the kernel build process
3headers_install.txt
4 - how to export Linux headers for use by userspace
5kbuild.txt
6 - developer information on kbuild
7kconfig.txt
8 - usage help for make *config
9kconfig-language.txt
10 - specification of Config Language, the language in Kconfig files
11makefiles.txt
12 - developer information for linux kernel makefiles
13modules.txt
14 - how to build modules and to install them
Documentation/kbuild/makefiles.txt+0−15
@@ -537,21 +537,6 @@ more details, with real examples. · 536 unmodified lines
537 The third parameter may be a text as in this example, but it may also537 The third parameter may be a text as in this example, but it may also
538 be an expanded variable or a macro.538 be an expanded variable or a macro.
539 539
540 cc-fullversion
541 cc-fullversion is useful when the exact version of gcc is needed.
542 One typical use-case is when a specific GCC version is broken.
543 cc-fullversion points out a more specific version than cc-version does.
544
545 Example:
546 #arch/powerpc/Makefile
547 $(Q)if test "$(cc-fullversion)" = "040200" ; then \
548 echo -n '*** GCC-4.2.0 cannot compile the 64-bit powerpc ' ; \
549 false ; \
550 fi
551
552 In this example for a specific GCC version the build will error out
553 explaining to the user why it stops.
554
555 cc-cross-prefix540 cc-cross-prefix
556 cc-cross-prefix is used to check if there exists a $(CC) in path with541 cc-cross-prefix is used to check if there exists a $(CC) in path with
557 one of the listed prefixes. The first prefix where there exist a542 one of the listed prefixes. The first prefix where there exist a
Documentation/kernel-per-CPU-kthreads.txt+1−1
@@ -321,7 +321,7 @@ To reduce its OS jitter, do at least one of the following: · 320 unmodified lines
321 to do.321 to do.
322 322
323Name:323Name:
324 rcuob/%d, rcuop/%d, and rcuos/%d324 rcuop/%d and rcuos/%d
325 325
326Purpose:326Purpose:
327 Offload RCU callbacks from the corresponding CPU.327 Offload RCU callbacks from the corresponding CPU.
Documentation/laptops/00-INDEX+0−16
@@ -1,16 +0,0 @@
100-INDEX
2 - This file
3asus-laptop.txt
4 - information on the Asus Laptop Extras driver.
5disk-shock-protection.txt
6 - information on hard disk shock protection.
7laptop-mode.txt
8 - how to conserve battery power using laptop-mode.
9sony-laptop.txt
10 - Sony Notebook Control Driver (SNC) Readme.
11sonypi.txt
12 - info on Linux Sony Programmable I/O Device support.
13thinkpad-acpi.txt
14 - information on the (IBM and Lenovo) ThinkPad ACPI Extras driver.
15toshiba_haps.txt
16 - information on the Toshiba HDD Active Protection Sensor driver.
Documentation/laptops/lg-laptop.rst+81−0
@@ -0,0 +1,81 @@
1.. SPDX-License-Identifier: GPL-2.0+
2LG Gram laptop extra features
3=============================
4
5By Matan Ziv-Av <matan@svgalib.org>
6
7
8Hotkeys
9-------
10
11The following FN keys are ignored by the kernel without this driver:
12- FN-F1 (LG control panel) - Generates F15
13- FN-F5 (Touchpad toggle) - Generates F13
14- FN-F6 (Airplane mode) - Generates RFKILL
15- FN-F8 (Keyboard backlight) - Generates F16.
16 This key also changes keyboard backlight mode.
17- FN-F9 (Reader mode) - Generates F14
18
19The rest of the FN key work without a need for a special driver.
20
21
22Reader mode
23-----------
24
25Writing 0/1 to /sys/devices/platform/lg-laptop/reader_mode disables/enables
26reader mode. In this mode the screen colors change (blue color reduced),
27and the reader mode indicator LED (on F9 key) turns on.
28
29
30FN Lock
31-------
32
33Writing 0/1 to /sys/devices/platform/lg-laptop/fn_lock disables/enables
34FN lock.
35
36
37Battery care limit
38------------------
39
40Writing 80/100 to /sys/devices/platform/lg-laptop/battery_care_limit
41sets the maximum capacity to charge the battery. Limiting the charge
42reduces battery capacity loss over time.
43
44This value is reset to 100 when the kernel boots.
45
46
47Fan mode
48--------
49
50Writing 1/0 to /sys/devices/platform/lg-laptop/fan_mode disables/enables
51the fan silent mode.
52
53
54USB charge
55----------
56
57Writing 0/1 to /sys/devices/platform/lg-laptop/usb_charge disables/enables
58charging another device from the USB port while the device is turned off.
59
60This value is reset to 0 when the kernel boots.
61
62
63LEDs
64~~~~
65
66The are two LED devices supported by the driver:
67
68Keyboard backlight
69------------------
70
71A led device named kbd_led controls the keyboard backlight. There are three
72lighting level: off (0), low (127) and high (255).
73
74The keyboard backlight is also controlled by the key combination FN-F8
75which cycles through those levels.
76
77
78Touchpad indicator LED
79----------------------
80
81On the F5 key. Controlled by led device names tpad_led.
Documentation/leds/00-INDEX+0−32
@@ -1,32 +0,0 @@
100-INDEX
2 - This file
3leds-blinkm.txt
4 - Driver for BlinkM LED-devices.
5leds-class.txt
6 - documents LED handling under Linux.
7leds-class-flash.txt
8 - documents flash LED handling under Linux.
9leds-lm3556.txt
10 - notes on how to use the leds-lm3556 driver.
11leds-lp3944.txt
12 - notes on how to use the leds-lp3944 driver.
13leds-lp5521.txt
14 - notes on how to use the leds-lp5521 driver.
15leds-lp5523.txt
16 - notes on how to use the leds-lp5523 driver.
17leds-lp5562.txt
18 - notes on how to use the leds-lp5562 driver.
19leds-lp55xx.txt
20 - description about lp55xx common driver.
21leds-lm3556.txt
22 - notes on how to use the leds-lm3556 driver.
23leds-mlxcpld.txt
24 - notes on how to use the leds-mlxcpld driver.
25ledtrig-oneshot.txt
26 - One-shot LED trigger for both sporadic and dense events.
27ledtrig-transient.txt
28 - LED Transient Trigger, one shot timer activation.
29ledtrig-usbport.txt
30 - notes on how to use the drivers/usb/core/ledtrig-usbport.c trigger.
31uleds.txt
32 - notes on how to use the uleds driver.
Documentation/locking/00-INDEX+0−16
@@ -1,16 +0,0 @@
100-INDEX
2 - this file.
3lockdep-design.txt
4 - documentation on the runtime locking correctness validator.
5lockstat.txt
6 - info on collecting statistics on locks (and contention).
7mutex-design.txt
8 - info on the generic mutex subsystem.
9rt-mutex-design.txt
10 - description of the RealTime mutex implementation design.
11rt-mutex.txt
12 - desc. of RT-mutex subsystem with PI (Priority Inheritance) support.
13spinlocks.txt
14 - info on using spinlocks to provide exclusive access in kernel.
15ww-mutex-design.txt
16 - Intro to Mutex wait/would deadlock handling.s
Documentation/locking/lockstat.txt+1−1
@@ -91,7 +91,7 @@ Look at the current lock statistics: · 90 unmodified lines
9107 &mm->mmap_sem-R: 37 100 1.31 299502.61 325629.52 3256.30 212344 34316685 0.10 7744.91 95016910.20 2.779107 &mm->mmap_sem-R: 37 100 1.31 299502.61 325629.52 3256.30 212344 34316685 0.10 7744.91 95016910.20 2.77
9208 ---------------9208 ---------------
9309 &mm->mmap_sem 1 [<ffffffff811502a7>] khugepaged_scan_mm_slot+0x57/0x2809309 &mm->mmap_sem 1 [<ffffffff811502a7>] khugepaged_scan_mm_slot+0x57/0x280
9419 &mm->mmap_sem 96 [<ffffffff815351c4>] __do_page_fault+0x1d4/0x5109410 &mm->mmap_sem 96 [<ffffffff815351c4>] __do_page_fault+0x1d4/0x510
9511 &mm->mmap_sem 34 [<ffffffff81113d77>] vm_mmap_pgoff+0x87/0xd09511 &mm->mmap_sem 34 [<ffffffff81113d77>] vm_mmap_pgoff+0x87/0xd0
9612 &mm->mmap_sem 17 [<ffffffff81127e71>] vm_munmap+0x41/0x809612 &mm->mmap_sem 17 [<ffffffff81127e71>] vm_munmap+0x41/0x80
9713 ---------------9713 ---------------
Documentation/m68k/00-INDEX+0−7
@@ -1,7 +0,0 @@
100-INDEX
2 - this file
3README.buddha
4 - Amiga Buddha and Catweasel IDE Driver
5kernel-options.txt
6 - command line options for Linux/m68k
7
Documentation/media/kapi/cec-core.rst+4−0
@@ -268,6 +268,10 @@ to 1, if the hardware does support retry then either set these counters to · 267 unmodified lines
2680 if the hardware provides no feedback of which errors occurred and how many2680 if the hardware provides no feedback of which errors occurred and how many
269times, or fill in the correct values as reported by the hardware.269times, or fill in the correct values as reported by the hardware.
270 270
271Be aware that calling these functions can immediately start a new transmit
272if there is one pending in the queue. So make sure that the hardware is in
273a state where new transmits can be started *before* calling these functions.
274
271The cec_transmit_attempt_done() function is a helper for cases where the275The cec_transmit_attempt_done() function is a helper for cases where the
272hardware never retries, so the transmit is always for just a single276hardware never retries, so the transmit is always for just a single
273attempt. It will call cec_transmit_done() in turn, filling in 1 for the277attempt. It will call cec_transmit_done() in turn, filling in 1 for the
Documentation/media/kapi/mc-core.rst+2−0
@@ -262,3 +262,5 @@ in the end provide a way to use driver-specific callbacks. · 261 unmodified lines
262.. kernel-doc:: include/media/media-devnode.h262.. kernel-doc:: include/media/media-devnode.h
263 263
264.. kernel-doc:: include/media/media-entity.h264.. kernel-doc:: include/media/media-entity.h
265
266.. kernel-doc:: include/media/media-request.h
Documentation/media/kapi/v4l2-subdev.rst+19−11
@@ -247,20 +247,28 @@ performed using the :c:func:`v4l2_async_unregister_subdev` call. Subdevices · 246 unmodified lines
247registered this way are stored in a global list of subdevices, ready to be247registered this way are stored in a global list of subdevices, ready to be
248picked up by bridge drivers.248picked up by bridge drivers.
249 249
250Bridge drivers in turn have to register a notifier object with an array of250Bridge drivers in turn have to register a notifier object. This is
251subdevice descriptors that the bridge device needs for its operation. This is
252performed using the :c:func:`v4l2_async_notifier_register` call. To251performed using the :c:func:`v4l2_async_notifier_register` call. To
253unregister the notifier the driver has to call252unregister the notifier the driver has to call
254:c:func:`v4l2_async_notifier_unregister`. The former of the two functions253:c:func:`v4l2_async_notifier_unregister`. The former of the two functions
255takes two arguments: a pointer to struct :c:type:`v4l2_device` and a pointer to254takes two arguments: a pointer to struct :c:type:`v4l2_device` and a
256struct :c:type:`v4l2_async_notifier`. The latter contains a pointer to an array255pointer to struct :c:type:`v4l2_async_notifier`.
257of pointers to subdevice descriptors of type struct :c:type:`v4l2_async_subdev`256
258type. The V4L2 core will then use these descriptors to match asynchronously257Before registering the notifier, bridge drivers must do two things:
259registered258first, the notifier must be initialized using the
260subdevices to them. If a match is detected the ``.bound()`` notifier callback259:c:func:`v4l2_async_notifier_init`. Second, bridge drivers can then
261is called. After all subdevices have been located the .complete() callback is260begin to form a list of subdevice descriptors that the bridge device
262called. When a subdevice is removed from the system the .unbind() method is261needs for its operation. Subdevice descriptors are added to the notifier
263called. All three callbacks are optional.262using the :c:func:`v4l2_async_notifier_add_subdev` call. This function
263takes two arguments: a pointer to struct :c:type:`v4l2_async_notifier`,
264and a pointer to the subdevice descripter, which is of type struct
265:c:type:`v4l2_async_subdev`.
266
267The V4L2 core will then use these descriptors to match asynchronously
268registered subdevices to them. If a match is detected the ``.bound()``
269notifier callback is called. After all subdevices have been located the
270.complete() callback is called. When a subdevice is removed from the
271system the .unbind() method is called. All three callbacks are optional.
264 272
265V4L2 sub-device userspace API273V4L2 sub-device userspace API
266-----------------------------274-----------------------------
Documentation/media/uapi/cec/cec-func-poll.rst+2−1
@@ -74,4 +74,5 @@ is returned, and the ``errno`` variable is set appropriately: · 73 unmodified lines
74 The call was interrupted by a signal.74 The call was interrupted by a signal.
75 75
76``EINVAL``76``EINVAL``
77 The ``nfds`` argument is greater than ``OPEN_MAX``.77 The ``nfds`` value exceeds the ``RLIMIT_NOFILE`` value. Use
78 ``getrlimit()`` to obtain this value.
Documentation/media/uapi/cec/cec-ioc-receive.rst+23−2
@@ -16,10 +16,10 @@ CEC_RECEIVE, CEC_TRANSMIT - Receive or transmit a CEC message · 15 unmodified lines
16Synopsis16Synopsis
17========17========
18 18
19.. c:function:: int ioctl( int fd, CEC_RECEIVE, struct cec_msg *argp )19.. c:function:: int ioctl( int fd, CEC_RECEIVE, struct cec_msg \*argp )
20 :name: CEC_RECEIVE20 :name: CEC_RECEIVE
21 21
22.. c:function:: int ioctl( int fd, CEC_TRANSMIT, struct cec_msg *argp )22.. c:function:: int ioctl( int fd, CEC_TRANSMIT, struct cec_msg \*argp )
23 :name: CEC_TRANSMIT23 :name: CEC_TRANSMIT
24 24
25Arguments25Arguments
@@ -272,6 +272,19 @@ View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV'). · 246 unmodified lines
272 - The transmit failed after one or more retries. This status bit is272 - The transmit failed after one or more retries. This status bit is
273 mutually exclusive with :ref:`CEC_TX_STATUS_OK <CEC-TX-STATUS-OK>`.273 mutually exclusive with :ref:`CEC_TX_STATUS_OK <CEC-TX-STATUS-OK>`.
274 Other bits can still be set to explain which failures were seen.274 Other bits can still be set to explain which failures were seen.
275 * .. _`CEC-TX-STATUS-ABORTED`:
276
277 - ``CEC_TX_STATUS_ABORTED``
278 - 0x40
279 - The transmit was aborted due to an HDMI disconnect, or the adapter
280 was unconfigured, or a transmit was interrupted, or the driver
281 returned an error when attempting to start a transmit.
282 * .. _`CEC-TX-STATUS-TIMEOUT`:
283
284 - ``CEC_TX_STATUS_TIMEOUT``
285 - 0x80
286 - The transmit timed out. This should not normally happen and this
287 indicates a driver problem.
275 288
276 289
277.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}|290.. tabularcolumns:: |p{5.6cm}|p{0.9cm}|p{11.0cm}|
@@ -300,6 +313,14 @@ View On' messages from initiator 0xf ('Unregistered') to destination 0 ('TV'). · 22 unmodified lines
300 - The message was received successfully but the reply was313 - The message was received successfully but the reply was
301 ``CEC_MSG_FEATURE_ABORT``. This status is only set if this message314 ``CEC_MSG_FEATURE_ABORT``. This status is only set if this message
302 was the reply to an earlier transmitted message.315 was the reply to an earlier transmitted message.
316 * .. _`CEC-RX-STATUS-ABORTED`:
317
318 - ``CEC_RX_STATUS_ABORTED``
319 - 0x08
320 - The wait for a reply to an earlier transmitted message was aborted
321 because the HDMI cable was disconnected, the adapter was unconfigured
322 or the :ref:`CEC_TRANSMIT <CEC_RECEIVE>` that waited for a
323 reply was interrupted.
303 324
304 325
305 326
Documentation/media/uapi/mediactl/media-controller.rst+1−0
@@ -21,6 +21,7 @@ Part IV - Media Controller API · 20 unmodified lines
21 media-controller-intro21 media-controller-intro
22 media-controller-model22 media-controller-model
23 media-types23 media-types
24 request-api
24 media-funcs25 media-funcs
25 media-header26 media-header
26 27
Documentation/media/uapi/mediactl/media-funcs.rst+6−0
@@ -16,3 +16,9 @@ Function Reference · 15 unmodified lines
16 media-ioc-enum-entities16 media-ioc-enum-entities
17 media-ioc-enum-links17 media-ioc-enum-links
18 media-ioc-setup-link18 media-ioc-setup-link
19 media-ioc-request-alloc
20 request-func-close
21 request-func-ioctl
22 request-func-poll
23 media-request-ioc-queue
24 media-request-ioc-reinit
Documentation/media/uapi/mediactl/media-ioc-device-info.rst+1−0
@@ -26,6 +26,7 @@ Arguments · 25 unmodified lines
26 File descriptor returned by :ref:`open() <media-func-open>`.26 File descriptor returned by :ref:`open() <media-func-open>`.
27 27
28``argp``28``argp``
29 Pointer to struct :c:type:`media_device_info`.
29 30
30 31
31Description32Description
Documentation/media/uapi/mediactl/media-ioc-enum-entities.rst+1−0
@@ -26,6 +26,7 @@ Arguments · 25 unmodified lines
26 File descriptor returned by :ref:`open() <media-func-open>`.26 File descriptor returned by :ref:`open() <media-func-open>`.
27 27
28``argp``28``argp``
29 Pointer to struct :c:type:`media_entity_desc`.
29 30
30 31
31Description32Description
Documentation/media/uapi/mediactl/media-ioc-enum-links.rst+1−0
@@ -26,6 +26,7 @@ Arguments · 25 unmodified lines
26 File descriptor returned by :ref:`open() <media-func-open>`.26 File descriptor returned by :ref:`open() <media-func-open>`.
27 27
28``argp``28``argp``
29 Pointer to struct :c:type:`media_links_enum`.
29 30
30 31
31Description32Description
Documentation/media/uapi/mediactl/media-ioc-g-topology.rst+1−0
@@ -26,6 +26,7 @@ Arguments · 25 unmodified lines
26 File descriptor returned by :ref:`open() <media-func-open>`.26 File descriptor returned by :ref:`open() <media-func-open>`.
27 27
28``argp``28``argp``
29 Pointer to struct :c:type:`media_v2_topology`.
29 30
30 31
31Description32Description
Documentation/media/uapi/mediactl/media-ioc-request-alloc.rst+66−0
@@ -0,0 +1,66 @@
1.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
2
3.. _media_ioc_request_alloc:
4
5*****************************
6ioctl MEDIA_IOC_REQUEST_ALLOC
7*****************************
8
9Name
10====
11
12MEDIA_IOC_REQUEST_ALLOC - Allocate a request
13
14
15Synopsis
16========
17
18.. c:function:: int ioctl( int fd, MEDIA_IOC_REQUEST_ALLOC, int *argp )
19 :name: MEDIA_IOC_REQUEST_ALLOC
20
21
22Arguments
23=========
24
25``fd``
26 File descriptor returned by :ref:`open() <media-func-open>`.
27
28``argp``
29 Pointer to an integer.
30
31
32Description
33===========
34
35If the media device supports :ref:`requests <media-request-api>`, then
36this ioctl can be used to allocate a request. If it is not supported, then
37``errno`` is set to ``ENOTTY``. A request is accessed through a file descriptor
38that is returned in ``*argp``.
39
40If the request was successfully allocated, then the request file descriptor
41can be passed to the :ref:`VIDIOC_QBUF <VIDIOC_QBUF>`,
42:ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`,
43:ref:`VIDIOC_S_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` and
44:ref:`VIDIOC_TRY_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` ioctls.
45
46In addition, the request can be queued by calling
47:ref:`MEDIA_REQUEST_IOC_QUEUE` and re-initialized by calling
48:ref:`MEDIA_REQUEST_IOC_REINIT`.
49
50Finally, the file descriptor can be :ref:`polled <request-func-poll>` to wait
51for the request to complete.
52
53The request will remain allocated until all the file descriptors associated
54with it are closed by :ref:`close() <request-func-close>` and the driver no
55longer uses the request internally. See also
56:ref:`here <media-request-life-time>` for more information.
57
58Return Value
59============
60
61On success 0 is returned, on error -1 and the ``errno`` variable is set
62appropriately. The generic error codes are described at the
63:ref:`Generic Error Codes <gen-errors>` chapter.
64
65ENOTTY
66 The driver has no support for requests.
Documentation/media/uapi/mediactl/media-ioc-setup-link.rst+1−0
@@ -26,6 +26,7 @@ Arguments · 25 unmodified lines
26 File descriptor returned by :ref:`open() <media-func-open>`.26 File descriptor returned by :ref:`open() <media-func-open>`.
27 27
28``argp``28``argp``
29 Pointer to struct :c:type:`media_link_desc`.
29 30
30 31
31Description32Description
Documentation/media/uapi/mediactl/media-request-ioc-queue.rst+78−0
@@ -0,0 +1,78 @@
1.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
2
3.. _media_request_ioc_queue:
4
5*****************************
6ioctl MEDIA_REQUEST_IOC_QUEUE
7*****************************
8
9Name
10====
11
12MEDIA_REQUEST_IOC_QUEUE - Queue a request
13
14
15Synopsis
16========
17
18.. c:function:: int ioctl( int request_fd, MEDIA_REQUEST_IOC_QUEUE )
19 :name: MEDIA_REQUEST_IOC_QUEUE
20
21
22Arguments
23=========
24
25``request_fd``
26 File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`.
27
28
29Description
30===========
31
32If the media device supports :ref:`requests <media-request-api>`, then
33this request ioctl can be used to queue a previously allocated request.
34
35If the request was successfully queued, then the file descriptor can be
36:ref:`polled <request-func-poll>` to wait for the request to complete.
37
38If the request was already queued before, then ``EBUSY`` is returned.
39Other errors can be returned if the contents of the request contained
40invalid or inconsistent data, see the next section for a list of
41common error codes. On error both the request and driver state are unchanged.
42
43Once a request is queued, then the driver is required to gracefully handle
44errors that occur when the request is applied to the hardware. The
45exception is the ``EIO`` error which signals a fatal error that requires
46the application to stop streaming to reset the hardware state.
47
48It is not allowed to mix queuing requests with queuing buffers directly
49(without a request). ``EBUSY`` will be returned if the first buffer was
50queued directly and you next try to queue a request, or vice versa.
51
52A request must contain at least one buffer, otherwise this ioctl will
53return an ``ENOENT`` error.
54
55Return Value
56============
57
58On success 0 is returned, on error -1 and the ``errno`` variable is set
59appropriately. The generic error codes are described at the
60:ref:`Generic Error Codes <gen-errors>` chapter.
61
62EBUSY
63 The request was already queued or the application queued the first
64 buffer directly, but later attempted to use a request. It is not permitted
65 to mix the two APIs.
66ENOENT
67 The request did not contain any buffers. All requests are required
68 to have at least one buffer. This can also be returned if some required
69 configuration is missing in the request.
70ENOMEM
71 Out of memory when allocating internal data structures for this
72 request.
73EINVAL
74 The request has invalid data.
75EIO
76 The hardware is in a bad state. To recover, the application needs to
77 stop streaming to reset the hardware state and then try to restart
78 streaming.
Documentation/media/uapi/mediactl/media-request-ioc-reinit.rst+51−0
@@ -0,0 +1,51 @@
1.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
2
3.. _media_request_ioc_reinit:
4
5******************************
6ioctl MEDIA_REQUEST_IOC_REINIT
7******************************
8
9Name
10====
11
12MEDIA_REQUEST_IOC_REINIT - Re-initialize a request
13
14
15Synopsis
16========
17
18.. c:function:: int ioctl( int request_fd, MEDIA_REQUEST_IOC_REINIT )
19 :name: MEDIA_REQUEST_IOC_REINIT
20
21
22Arguments
23=========
24
25``request_fd``
26 File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`.
27
28Description
29===========
30
31If the media device supports :ref:`requests <media-request-api>`, then
32this request ioctl can be used to re-initialize a previously allocated
33request.
34
35Re-initializing a request will clear any existing data from the request.
36This avoids having to :ref:`close() <request-func-close>` a completed
37request and allocate a new request. Instead the completed request can just
38be re-initialized and it is ready to be used again.
39
40A request can only be re-initialized if it either has not been queued
41yet, or if it was queued and completed. Otherwise it will set ``errno``
42to ``EBUSY``. No other error codes can be returned.
43
44Return Value
45============
46
47On success 0 is returned, on error -1 and the ``errno`` variable is set
48appropriately.
49
50EBUSY
51 The request is queued but not yet completed.
Documentation/media/uapi/mediactl/request-api.rst+252−0
@@ -0,0 +1,252 @@
1.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
2
3.. _media-request-api:
4
5Request API
6===========
7
8The Request API has been designed to allow V4L2 to deal with requirements of
9modern devices (stateless codecs, complex camera pipelines, ...) and APIs
10(Android Codec v2). One such requirement is the ability for devices belonging to
11the same pipeline to reconfigure and collaborate closely on a per-frame basis.
12Another is support of stateless codecs, which require controls to be applied
13to specific frames (aka 'per-frame controls') in order to be used efficiently.
14
15While the initial use-case was V4L2, it can be extended to other subsystems
16as well, as long as they use the media controller.
17
18Supporting these features without the Request API is not always possible and if
19it is, it is terribly inefficient: user-space would have to flush all activity
20on the media pipeline, reconfigure it for the next frame, queue the buffers to
21be processed with that configuration, and wait until they are all available for
22dequeuing before considering the next frame. This defeats the purpose of having
23buffer queues since in practice only one buffer would be queued at a time.
24
25The Request API allows a specific configuration of the pipeline (media
26controller topology + configuration for each media entity) to be associated with
27specific buffers. This allows user-space to schedule several tasks ("requests")
28with different configurations in advance, knowing that the configuration will be
29applied when needed to get the expected result. Configuration values at the time
30of request completion are also available for reading.
31
32Usage
33=====
34
35The Request API extends the Media Controller API and cooperates with
36subsystem-specific APIs to support request usage. At the Media Controller
37level, requests are allocated from the supporting Media Controller device
38node. Their life cycle is then managed through the request file descriptors in
39an opaque way. Configuration data, buffer handles and processing results
40stored in requests are accessed through subsystem-specific APIs extended for
41request support, such as V4L2 APIs that take an explicit ``request_fd``
42parameter.
43
44Request Allocation
45------------------
46
47User-space allocates requests using :ref:`MEDIA_IOC_REQUEST_ALLOC`
48for the media device node. This returns a file descriptor representing the
49request. Typically, several such requests will be allocated.
50
51Request Preparation
52-------------------
53
54Standard V4L2 ioctls can then receive a request file descriptor to express the
55fact that the ioctl is part of said request, and is not to be applied
56immediately. See :ref:`MEDIA_IOC_REQUEST_ALLOC` for a list of ioctls that
57support this. Configurations set with a ``request_fd`` parameter are stored
58instead of being immediately applied, and buffers queued to a request do not
59enter the regular buffer queue until the request itself is queued.
60
61Request Submission
62------------------
63
64Once the configuration and buffers of the request are specified, it can be
65queued by calling :ref:`MEDIA_REQUEST_IOC_QUEUE` on the request file descriptor.
66A request must contain at least one buffer, otherwise ``ENOENT`` is returned.
67A queued request cannot be modified anymore.
68
69.. caution::
70 For :ref:`memory-to-memory devices <codec>` you can use requests only for
71 output buffers, not for capture buffers. Attempting to add a capture buffer
72 to a request will result in an ``EACCES`` error.
73
74If the request contains configurations for multiple entities, individual drivers
75may synchronize so the requested pipeline's topology is applied before the
76buffers are processed. Media controller drivers do a best effort implementation
77since perfect atomicity may not be possible due to hardware limitations.
78
79.. caution::
80
81 It is not allowed to mix queuing requests with directly queuing buffers:
82 whichever method is used first locks this in place until
83 :ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>` is called or the device is
84 :ref:`closed <func-close>`. Attempts to directly queue a buffer when earlier
85 a buffer was queued via a request or vice versa will result in an ``EBUSY``
86 error.
87
88Controls can still be set without a request and are applied immediately,
89regardless of whether a request is in use or not.
90
91.. caution::
92
93 Setting the same control through a request and also directly can lead to
94 undefined behavior!
95
96User-space can :ref:`poll() <request-func-poll>` a request file descriptor in
97order to wait until the request completes. A request is considered complete
98once all its associated buffers are available for dequeuing and all the
99associated controls have been updated with the values at the time of completion.
100Note that user-space does not need to wait for the request to complete to
101dequeue its buffers: buffers that are available halfway through a request can
102be dequeued independently of the request's state.
103
104A completed request contains the state of the device after the request was
105executed. User-space can query that state by calling
106:ref:`ioctl VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` with the request file
107descriptor. Calling :ref:`ioctl VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` for a
108request that has been queued but not yet completed will return ``EBUSY``
109since the control values might be changed at any time by the driver while the
110request is in flight.
111
112.. _media-request-life-time:
113
114Recycling and Destruction
115-------------------------
116
117Finally, a completed request can either be discarded or be reused. Calling
118:ref:`close() <request-func-close>` on a request file descriptor will make
119that file descriptor unusable and the request will be freed once it is no
120longer in use by the kernel. That is, if the request is queued and then the
121file descriptor is closed, then it won't be freed until the driver completed
122the request.
123
124The :ref:`MEDIA_REQUEST_IOC_REINIT` will clear a request's state and make it
125available again. No state is retained by this operation: the request is as
126if it had just been allocated.
127
128Example for a Codec Device
129--------------------------
130
131For use-cases such as :ref:`codecs <codec>`, the request API can be used
132to associate specific controls to
133be applied by the driver for the OUTPUT buffer, allowing user-space
134to queue many such buffers in advance. It can also take advantage of requests'
135ability to capture the state of controls when the request completes to read back
136information that may be subject to change.
137
138Put into code, after obtaining a request, user-space can assign controls and one
139OUTPUT buffer to it:
140
141.. code-block:: c
142
143 struct v4l2_buffer buf;
144 struct v4l2_ext_controls ctrls;
145 int req_fd;
146 ...
147 if (ioctl(media_fd, MEDIA_IOC_REQUEST_ALLOC, &req_fd))
148 return errno;
149 ...
150 ctrls.which = V4L2_CTRL_WHICH_REQUEST_VAL;
151 ctrls.request_fd = req_fd;
152 if (ioctl(codec_fd, VIDIOC_S_EXT_CTRLS, &ctrls))
153 return errno;
154 ...
155 buf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
156 buf.flags |= V4L2_BUF_FLAG_REQUEST_FD;
157 buf.request_fd = req_fd;
158 if (ioctl(codec_fd, VIDIOC_QBUF, &buf))
159 return errno;
160
161Note that it is not allowed to use the Request API for CAPTURE buffers
162since there are no per-frame settings to report there.
163
164Once the request is fully prepared, it can be queued to the driver:
165
166.. code-block:: c
167
168 if (ioctl(req_fd, MEDIA_REQUEST_IOC_QUEUE))
169 return errno;
170
171User-space can then either wait for the request to complete by calling poll() on
172its file descriptor, or start dequeuing CAPTURE buffers. Most likely, it will
173want to get CAPTURE buffers as soon as possible and this can be done using a
174regular :ref:`VIDIOC_DQBUF <VIDIOC_QBUF>`:
175
176.. code-block:: c
177
178 struct v4l2_buffer buf;
179
180 memset(&buf, 0, sizeof(buf));
181 buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
182 if (ioctl(codec_fd, VIDIOC_DQBUF, &buf))
183 return errno;
184
185Note that this example assumes for simplicity that for every OUTPUT buffer
186there will be one CAPTURE buffer, but this does not have to be the case.
187
188We can then, after ensuring that the request is completed via polling the
189request file descriptor, query control values at the time of its completion via
190a call to :ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`.
191This is particularly useful for volatile controls for which we want to
192query values as soon as the capture buffer is produced.
193
194.. code-block:: c
195
196 struct pollfd pfd = { .events = POLLPRI, .fd = req_fd };
197 poll(&pfd, 1, -1);
198 ...
199 ctrls.which = V4L2_CTRL_WHICH_REQUEST_VAL;
200 ctrls.request_fd = req_fd;
201 if (ioctl(codec_fd, VIDIOC_G_EXT_CTRLS, &ctrls))
202 return errno;
203
204Once we don't need the request anymore, we can either recycle it for reuse with
205:ref:`MEDIA_REQUEST_IOC_REINIT`...
206
207.. code-block:: c
208
209 if (ioctl(req_fd, MEDIA_REQUEST_IOC_REINIT))
210 return errno;
211
212... or close its file descriptor to completely dispose of it.
213
214.. code-block:: c
215
216 close(req_fd);
217
218Example for a Simple Capture Device
219-----------------------------------
220
221With a simple capture device, requests can be used to specify controls to apply
222for a given CAPTURE buffer.
223
224.. code-block:: c
225
226 struct v4l2_buffer buf;
227 struct v4l2_ext_controls ctrls;
228 int req_fd;
229 ...
230 if (ioctl(media_fd, MEDIA_IOC_REQUEST_ALLOC, &req_fd))
231 return errno;
232 ...
233 ctrls.which = V4L2_CTRL_WHICH_REQUEST_VAL;
234 ctrls.request_fd = req_fd;
235 if (ioctl(camera_fd, VIDIOC_S_EXT_CTRLS, &ctrls))
236 return errno;
237 ...
238 buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
239 buf.flags |= V4L2_BUF_FLAG_REQUEST_FD;
240 buf.request_fd = req_fd;
241 if (ioctl(camera_fd, VIDIOC_QBUF, &buf))
242 return errno;
243
244Once the request is fully prepared, it can be queued to the driver:
245
246.. code-block:: c
247
248 if (ioctl(req_fd, MEDIA_REQUEST_IOC_QUEUE))
249 return errno;
250
251User-space can then dequeue buffers, wait for the request completion, query
252controls and recycle the request as in the M2M example above.
Documentation/media/uapi/mediactl/request-func-close.rst+49−0
@@ -0,0 +1,49 @@
1.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
2
3.. _request-func-close:
4
5***************
6request close()
7***************
8
9Name
10====
11
12request-close - Close a request file descriptor
13
14
15Synopsis
16========
17
18.. code-block:: c
19
20 #include <unistd.h>
21
22
23.. c:function:: int close( int fd )
24 :name: req-close
25
26Arguments
27=========
28
29``fd``
30 File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`.
31
32
33Description
34===========
35
36Closes the request file descriptor. Resources associated with the request
37are freed once all file descriptors associated with the request are closed
38and the driver has completed the request.
39See :ref:`here <media-request-life-time>` for more information.
40
41
42Return Value
43============
44
45:ref:`close() <request-func-close>` returns 0 on success. On error, -1 is
46returned, and ``errno`` is set appropriately. Possible error codes are:
47
48EBADF
49 ``fd`` is not a valid open file descriptor.
Documentation/media/uapi/mediactl/request-func-ioctl.rst+67−0
@@ -0,0 +1,67 @@
1.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
2
3.. _request-func-ioctl:
4
5***************
6request ioctl()
7***************
8
9Name
10====
11
12request-ioctl - Control a request file descriptor
13
14
15Synopsis
16========
17
18.. code-block:: c
19
20 #include <sys/ioctl.h>
21
22
23.. c:function:: int ioctl( int fd, int cmd, void *argp )
24 :name: req-ioctl
25
26Arguments
27=========
28
29``fd``
30 File descriptor returned by :ref:`MEDIA_IOC_REQUEST_ALLOC`.
31
32``cmd``
33 The request ioctl command code as defined in the media.h header file, for
34 example :ref:`MEDIA_REQUEST_IOC_QUEUE`.
35
36``argp``
37 Pointer to a request-specific structure.
38
39
40Description
41===========
42
43The :ref:`ioctl() <request-func-ioctl>` function manipulates request
44parameters. The argument ``fd`` must be an open file descriptor.
45
46The ioctl ``cmd`` code specifies the request function to be called. It
47has encoded in it whether the argument is an input, output or read/write
48parameter, and the size of the argument ``argp`` in bytes.
49
50Macros and structures definitions specifying request ioctl commands and
51their parameters are located in the media.h header file. All request ioctl
52commands, their respective function and parameters are specified in
53:ref:`media-user-func`.
54
55
56Return Value
57============
58
59On success 0 is returned, on error -1 and the ``errno`` variable is set
60appropriately. The generic error codes are described at the
61:ref:`Generic Error Codes <gen-errors>` chapter.
62
63Command-specific error codes are listed in the individual command
64descriptions.
65
66When an ioctl that takes an output or read/write parameter fails, the
67parameter remains unmodified.
Documentation/media/uapi/mediactl/request-func-poll.rst+77−0
@@ -0,0 +1,77 @@
1.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-or-later WITH no-invariant-sections
2
3.. _request-func-poll:
4
5**************
6request poll()
7**************
8
9Name
10====
11
12request-poll - Wait for some event on a file descriptor
13
14
15Synopsis
16========
17
18.. code-block:: c
19
20 #include <sys/poll.h>
21
22
23.. c:function:: int poll( struct pollfd *ufds, unsigned int nfds, int timeout )
24 :name: request-poll
25
26Arguments
27=========
28
29``ufds``
30 List of file descriptor events to be watched
31
32``nfds``
33 Number of file descriptor events at the \*ufds array
34
35``timeout``
36 Timeout to wait for events
37
38
39Description
40===========
41
42With the :c:func:`poll() <request-func-poll>` function applications can wait
43for a request to complete.
44
45On success :c:func:`poll() <request-func-poll>` returns the number of file
46descriptors that have been selected (that is, file descriptors for which the
47``revents`` field of the respective struct :c:type:`pollfd`
48is non-zero). Request file descriptor set the ``POLLPRI`` flag in ``revents``
49when the request was completed. When the function times out it returns
50a value of zero, on failure it returns -1 and the ``errno`` variable is
51set appropriately.
52
53Attempting to poll for a request that is not yet queued will
54set the ``POLLERR`` flag in ``revents``.
55
56
57Return Value
58============
59
60On success, :c:func:`poll() <request-func-poll>` returns the number of
61structures which have non-zero ``revents`` fields, or zero if the call
62timed out. On error -1 is returned, and the ``errno`` variable is set
63appropriately:
64
65``EBADF``
66 One or more of the ``ufds`` members specify an invalid file
67 descriptor.
68
69``EFAULT``
70 ``ufds`` references an inaccessible memory area.
71
72``EINTR``
73 The call was interrupted by a signal.
74
75``EINVAL``
76 The ``nfds`` value exceeds the ``RLIMIT_NOFILE`` value. Use
77 ``getrlimit()`` to obtain this value.
Documentation/media/uapi/v4l/biblio.rst+0−10
@@ -226,16 +226,6 @@ xvYCC · 225 unmodified lines
226 226
227:author: International Electrotechnical Commission (http://www.iec.ch)227:author: International Electrotechnical Commission (http://www.iec.ch)
228 228
229.. _adobergb:
230
231AdobeRGB
232========
233
234
235:title: Adobe© RGB (1998) Color Image Encoding Version 2005-05
236
237:author: Adobe Systems Incorporated (http://www.adobe.com)
238
239.. _oprgb:229.. _oprgb:
240 230
241opRGB231opRGB
Documentation/media/uapi/v4l/buffer.rst+26−3
@@ -306,10 +306,23 @@ struct v4l2_buffer · 305 unmodified lines
306 - A place holder for future extensions. Drivers and applications306 - A place holder for future extensions. Drivers and applications
307 must set this to 0.307 must set this to 0.
308 * - __u32308 * - __u32
309 - ``reserved``309 - ``request_fd``
310 -310 -
311 - A place holder for future extensions. Drivers and applications311 - The file descriptor of the request to queue the buffer to. If the flag
312 must set this to 0.312 ``V4L2_BUF_FLAG_REQUEST_FD`` is set, then the buffer will be
313 queued to this request. If the flag is not set, then this field will
314 be ignored.
315
316 The ``V4L2_BUF_FLAG_REQUEST_FD`` flag and this field are only used by
317 :ref:`ioctl VIDIOC_QBUF <VIDIOC_QBUF>` and ignored by other ioctls that
318 take a :c:type:`v4l2_buffer` as argument.
319
320 Applications should not set ``V4L2_BUF_FLAG_REQUEST_FD`` for any ioctls
321 other than :ref:`VIDIOC_QBUF <VIDIOC_QBUF>`.
322
323 If the device does not support requests, then ``EACCES`` will be returned.
324 If requests are supported but an invalid request file descriptor is
325 given, then ``EINVAL`` will be returned.
313 326
314 327
315 328
@@ -514,6 +527,11 @@ Buffer Flags · 198 unmodified lines
514 streaming may continue as normal and the buffer may be reused527 streaming may continue as normal and the buffer may be reused
515 normally. Drivers set this flag when the ``VIDIOC_DQBUF`` ioctl is528 normally. Drivers set this flag when the ``VIDIOC_DQBUF`` ioctl is
516 called.529 called.
530 * .. _`V4L2-BUF-FLAG-IN-REQUEST`:
531
532 - ``V4L2_BUF_FLAG_IN_REQUEST``
533 - 0x00000080
534 - This buffer is part of a request that hasn't been queued yet.
517 * .. _`V4L2-BUF-FLAG-KEYFRAME`:535 * .. _`V4L2-BUF-FLAG-KEYFRAME`:
518 536
519 - ``V4L2_BUF_FLAG_KEYFRAME``537 - ``V4L2_BUF_FLAG_KEYFRAME``
@@ -589,6 +607,11 @@ Buffer Flags · 69 unmodified lines
589 the format. Any Any subsequent call to the607 the format. Any Any subsequent call to the
590 :ref:`VIDIOC_DQBUF <VIDIOC_QBUF>` ioctl will not block anymore,608 :ref:`VIDIOC_DQBUF <VIDIOC_QBUF>` ioctl will not block anymore,
591 but return an ``EPIPE`` error code.609 but return an ``EPIPE`` error code.
610 * .. _`V4L2-BUF-FLAG-REQUEST-FD`:
611
612 - ``V4L2_BUF_FLAG_REQUEST_FD``
613 - 0x00800000
614 - The ``request_fd`` field contains a valid file descriptor.
592 * .. _`V4L2-BUF-FLAG-TIMESTAMP-MASK`:615 * .. _`V4L2-BUF-FLAG-TIMESTAMP-MASK`:
593 616
594 - ``V4L2_BUF_FLAG_TIMESTAMP_MASK``617 - ``V4L2_BUF_FLAG_TIMESTAMP_MASK``
Documentation/media/uapi/v4l/colorspaces-defs.rst+4−4
@@ -51,8 +51,8 @@ whole range, 0-255, dividing the angular value by 1.41. The enum · 50 unmodified lines
51 - See :ref:`col-rec709`.51 - See :ref:`col-rec709`.
52 * - ``V4L2_COLORSPACE_SRGB``52 * - ``V4L2_COLORSPACE_SRGB``
53 - See :ref:`col-srgb`.53 - See :ref:`col-srgb`.
54 * - ``V4L2_COLORSPACE_ADOBERGB``54 * - ``V4L2_COLORSPACE_OPRGB``
55 - See :ref:`col-adobergb`.55 - See :ref:`col-oprgb`.
56 * - ``V4L2_COLORSPACE_BT2020``56 * - ``V4L2_COLORSPACE_BT2020``
57 - See :ref:`col-bt2020`.57 - See :ref:`col-bt2020`.
58 * - ``V4L2_COLORSPACE_DCI_P3``58 * - ``V4L2_COLORSPACE_DCI_P3``
@@ -90,8 +90,8 @@ whole range, 0-255, dividing the angular value by 1.41. The enum · 31 unmodified lines
90 - Use the Rec. 709 transfer function.90 - Use the Rec. 709 transfer function.
91 * - ``V4L2_XFER_FUNC_SRGB``91 * - ``V4L2_XFER_FUNC_SRGB``
92 - Use the sRGB transfer function.92 - Use the sRGB transfer function.
93 * - ``V4L2_XFER_FUNC_ADOBERGB``93 * - ``V4L2_XFER_FUNC_OPRGB``
94 - Use the AdobeRGB transfer function.94 - Use the opRGB transfer function.
95 * - ``V4L2_XFER_FUNC_SMPTE240M``95 * - ``V4L2_XFER_FUNC_SMPTE240M``
96 - Use the SMPTE 240M transfer function.96 - Use the SMPTE 240M transfer function.
97 * - ``V4L2_XFER_FUNC_NONE``97 * - ``V4L2_XFER_FUNC_NONE``
Documentation/media/uapi/v4l/colorspaces-details.rst+6−7
@@ -290,15 +290,14 @@ Y' is clamped to the range [0…1] and Cb and Cr are clamped to the range · 289 unmodified lines
290170M/BT.601. The Y'CbCr quantization is limited range.290170M/BT.601. The Y'CbCr quantization is limited range.
291 291
292 292
293.. _col-adobergb:293.. _col-oprgb:
294 294
295Colorspace Adobe RGB (V4L2_COLORSPACE_ADOBERGB)295Colorspace opRGB (V4L2_COLORSPACE_OPRGB)
296===============================================296===============================================
297 297
298The :ref:`adobergb` standard defines the colorspace used by computer298The :ref:`oprgb` standard defines the colorspace used by computer
299graphics that use the AdobeRGB colorspace. This is also known as the299graphics that use the opRGB colorspace. The default transfer function is
300:ref:`oprgb` standard. The default transfer function is300``V4L2_XFER_FUNC_OPRGB``. The default Y'CbCr encoding is
301``V4L2_XFER_FUNC_ADOBERGB``. The default Y'CbCr encoding is
302``V4L2_YCBCR_ENC_601``. The default Y'CbCr quantization is limited301``V4L2_YCBCR_ENC_601``. The default Y'CbCr quantization is limited
303range.302range.
304 303
@@ -312,7 +311,7 @@ The chromaticities of the primary colors and the white reference are: · 7 unmodified lines
312 311
313.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|312.. tabularcolumns:: |p{4.4cm}|p{4.4cm}|p{8.7cm}|
314 313
315.. flat-table:: Adobe RGB Chromaticities314.. flat-table:: opRGB Chromaticities
316 :header-rows: 1315 :header-rows: 1
317 :stub-columns: 0316 :stub-columns: 0
318 :widths: 1 1 2317 :widths: 1 1 2
Documentation/media/uapi/v4l/extended-controls.rst+176−0
@@ -1497,6 +1497,182 @@ enum v4l2_mpeg_video_h264_hierarchical_coding_type - · 1496 unmodified lines
1497 1497
1498 1498
1499 1499
1500.. _v4l2-mpeg-mpeg2:
1501
1502``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS (struct)``
1503 Specifies the slice parameters (as extracted from the bitstream) for the
1504 associated MPEG-2 slice data. This includes the necessary parameters for
1505 configuring a stateless hardware decoding pipeline for MPEG-2.
1506 The bitstream parameters are defined according to :ref:`mpeg2part2`.
1507
1508.. c:type:: v4l2_ctrl_mpeg2_slice_params
1509
1510.. cssclass:: longtable
1511
1512.. flat-table:: struct v4l2_ctrl_mpeg2_slice_params
1513 :header-rows: 0
1514 :stub-columns: 0
1515 :widths: 1 1 2
1516
1517 * - __u32
1518 - ``bit_size``
1519 - Size (in bits) of the current slice data.
1520 * - __u32
1521 - ``data_bit_offset``
1522 - Offset (in bits) to the video data in the current slice data.
1523 * - struct :c:type:`v4l2_mpeg2_sequence`
1524 - ``sequence``
1525 - Structure with MPEG-2 sequence metadata, merging relevant fields from
1526 the sequence header and sequence extension parts of the bitstream.
1527 * - struct :c:type:`v4l2_mpeg2_picture`
1528 - ``picture``
1529 - Structure with MPEG-2 picture metadata, merging relevant fields from
1530 the picture header and picture coding extension parts of the bitstream.
1531 * - __u8
1532 - ``quantiser_scale_code``
1533 - Code used to determine the quantization scale to use for the IDCT.
1534 * - __u8
1535 - ``backward_ref_index``
1536 - Index for the V4L2 buffer to use as backward reference, used with
1537 B-coded and P-coded frames.
1538 * - __u8
1539 - ``forward_ref_index``
1540 - Index for the V4L2 buffer to use as forward reference, used with
1541 B-coded frames.
1542
1543.. c:type:: v4l2_mpeg2_sequence
1544
1545.. cssclass:: longtable
1546
1547.. flat-table:: struct v4l2_mpeg2_sequence
1548 :header-rows: 0
1549 :stub-columns: 0
1550 :widths: 1 1 2
1551
1552 * - __u16
1553 - ``horizontal_size``
1554 - The width of the displayable part of the frame's luminance component.
1555 * - __u16
1556 - ``vertical_size``
1557 - The height of the displayable part of the frame's luminance component.
1558 * - __u32
1559 - ``vbv_buffer_size``
1560 - Used to calculate the required size of the video buffering verifier,
1561 defined (in bits) as: 16 * 1024 * vbv_buffer_size.
1562 * - __u8
1563 - ``profile_and_level_indication``
1564 - The current profile and level indication as extracted from the
1565 bitstream.
1566 * - __u8
1567 - ``progressive_sequence``
1568 - Indication that all the frames for the sequence are progressive instead
1569 of interlaced.
1570 * - __u8
1571 - ``chroma_format``
1572 - The chrominance sub-sampling format (1: 4:2:0, 2: 4:2:2, 3: 4:4:4).
1573
1574.. c:type:: v4l2_mpeg2_picture
1575
1576.. cssclass:: longtable
1577
1578.. flat-table:: struct v4l2_mpeg2_picture
1579 :header-rows: 0
1580 :stub-columns: 0
1581 :widths: 1 1 2
1582
1583 * - __u8
1584 - ``picture_coding_type``
1585 - Picture coding type for the frame covered by the current slice
1586 (V4L2_MPEG2_PICTURE_CODING_TYPE_I, V4L2_MPEG2_PICTURE_CODING_TYPE_P or
1587 V4L2_MPEG2_PICTURE_CODING_TYPE_B).
1588 * - __u8
1589 - ``f_code[2][2]``
1590 - Motion vector codes.
1591 * - __u8
1592 - ``intra_dc_precision``
1593 - Precision of Discrete Cosine transform (0: 8 bits precision,
1594 1: 9 bits precision, 2: 10 bits precision, 3: 11 bits precision).
1595 * - __u8
1596 - ``picture_structure``
1597 - Picture structure (1: interlaced top field, 2: interlaced bottom field,
1598 3: progressive frame).
1599 * - __u8
1600 - ``top_field_first``
1601 - If set to 1 and interlaced stream, top field is output first.
1602 * - __u8
1603 - ``frame_pred_frame_dct``
1604 - If set to 1, only frame-DCT and frame prediction are used.
1605 * - __u8
1606 - ``concealment_motion_vectors``
1607 - If set to 1, motion vectors are coded for intra macroblocks.
1608 * - __u8
1609 - ``q_scale_type``
1610 - This flag affects the inverse quantization process.
1611 * - __u8
1612 - ``intra_vlc_format``
1613 - This flag affects the decoding of transform coefficient data.
1614 * - __u8
1615 - ``alternate_scan``
1616 - This flag affects the decoding of transform coefficient data.
1617 * - __u8
1618 - ``repeat_first_field``
1619 - This flag affects the decoding process of progressive frames.
1620 * - __u8
1621 - ``progressive_frame``
1622 - Indicates whether the current frame is progressive.
1623
1624``V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION (struct)``
1625 Specifies quantization matrices (as extracted from the bitstream) for the
1626 associated MPEG-2 slice data.
1627
1628.. c:type:: v4l2_ctrl_mpeg2_quantization
1629
1630.. cssclass:: longtable
1631
1632.. flat-table:: struct v4l2_ctrl_mpeg2_quantization
1633 :header-rows: 0
1634 :stub-columns: 0
1635 :widths: 1 1 2
1636
1637 * - __u8
1638 - ``load_intra_quantiser_matrix``
1639 - One bit to indicate whether to load the ``intra_quantiser_matrix`` data.
1640 * - __u8
1641 - ``load_non_intra_quantiser_matrix``
1642 - One bit to indicate whether to load the ``non_intra_quantiser_matrix``
1643 data.
1644 * - __u8
1645 - ``load_chroma_intra_quantiser_matrix``
1646 - One bit to indicate whether to load the
1647 ``chroma_intra_quantiser_matrix`` data, only relevant for non-4:2:0 YUV
1648 formats.
1649 * - __u8
1650 - ``load_chroma_non_intra_quantiser_matrix``
1651 - One bit to indicate whether to load the
1652 ``chroma_non_intra_quantiser_matrix`` data, only relevant for non-4:2:0
1653 YUV formats.
1654 * - __u8
1655 - ``intra_quantiser_matrix[64]``
1656 - The quantization matrix coefficients for intra-coded frames, in zigzag
1657 scanning order. It is relevant for both luma and chroma components,
1658 although it can be superseded by the chroma-specific matrix for
1659 non-4:2:0 YUV formats.
1660 * - __u8
1661 - ``non_intra_quantiser_matrix[64]``
1662 - The quantization matrix coefficients for non-intra-coded frames, in
1663 zigzag scanning order. It is relevant for both luma and chroma
1664 components, although it can be superseded by the chroma-specific matrix
1665 for non-4:2:0 YUV formats.
1666 * - __u8
1667 - ``chroma_intra_quantiser_matrix[64]``
1668 - The quantization matrix coefficients for the chominance component of
1669 intra-coded frames, in zigzag scanning order. Only relevant for
1670 non-4:2:0 YUV formats.
1671 * - __u8
1672 - ``chroma_non_intra_quantiser_matrix[64]``
1673 - The quantization matrix coefficients for the chrominance component of
1674 non-intra-coded frames, in zigzag scanning order. Only relevant for
1675 non-4:2:0 YUV formats.
1500 1676
1501MFC 5.1 MPEG Controls1677MFC 5.1 MPEG Controls
1502---------------------1678---------------------
Documentation/media/uapi/v4l/func-poll.rst+2−1
@@ -113,4 +113,5 @@ EINTR · 112 unmodified lines
113 The call was interrupted by a signal.113 The call was interrupted by a signal.
114 114
115EINVAL115EINVAL
116 The ``nfds`` argument is greater than ``OPEN_MAX``.116 The ``nfds`` value exceeds the ``RLIMIT_NOFILE`` value. Use
117 ``getrlimit()`` to obtain this value.
Documentation/media/uapi/v4l/meta-formats.rst+1−0
@@ -12,6 +12,7 @@ These formats are used for the :ref:`metadata` interface only. · 11 unmodified lines
12.. toctree::12.. toctree::
13 :maxdepth: 113 :maxdepth: 1
14 14
15 pixfmt-meta-d4xx
15 pixfmt-meta-uvc16 pixfmt-meta-uvc
16 pixfmt-meta-vsp1-hgo17 pixfmt-meta-vsp1-hgo
17 pixfmt-meta-vsp1-hgt18 pixfmt-meta-vsp1-hgt
Documentation/media/uapi/v4l/pixfmt-compressed.rst+17−1
@@ -60,6 +60,22 @@ Compressed Formats · 59 unmodified lines
60 - ``V4L2_PIX_FMT_MPEG2``60 - ``V4L2_PIX_FMT_MPEG2``
61 - 'MPG2'61 - 'MPG2'
62 - MPEG2 video elementary stream.62 - MPEG2 video elementary stream.
63 * .. _V4L2-PIX-FMT-MPEG2-SLICE:
64
65 - ``V4L2_PIX_FMT_MPEG2_SLICE``
66 - 'MG2S'
67 - MPEG-2 parsed slice data, as extracted from the MPEG-2 bitstream.
68 This format is adapted for stateless video decoders that implement a
69 MPEG-2 pipeline (using the :ref:`codec` and :ref:`media-request-api`).
70 Metadata associated with the frame to decode is required to be passed
71 through the ``V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS`` control and
72 quantization matrices can optionally be specified through the
73 ``V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION`` control.
74 See the :ref:`associated Codec Control IDs <v4l2-mpeg-mpeg2>`.
75 Exactly one output and one capture buffer must be provided for use with
76 this pixel format. The output buffer must contain the appropriate number
77 of macroblocks to decode a full corresponding frame to the matching
78 capture buffer.
63 * .. _V4L2-PIX-FMT-MPEG4:79 * .. _V4L2-PIX-FMT-MPEG4:
64 80
65 - ``V4L2_PIX_FMT_MPEG4``81 - ``V4L2_PIX_FMT_MPEG4``
@@ -101,4 +117,4 @@ Compressed Formats · 35 unmodified lines
101 - 'FWHT'117 - 'FWHT'
102 - Video elementary stream using a codec based on the Fast Walsh Hadamard118 - Video elementary stream using a codec based on the Fast Walsh Hadamard
103 Transform. This codec is implemented by the vicodec ('Virtual Codec')119 Transform. This codec is implemented by the vicodec ('Virtual Codec')
104 driver. See the vicodec-codec.h header for more details.120 driver. See the codec-fwht.h header for more details.
Documentation/media/uapi/v4l/pixfmt-meta-d4xx.rst+210−0
@@ -0,0 +1,210 @@
1.. -*- coding: utf-8; mode: rst -*-
2
3.. _v4l2-meta-fmt-d4xx:
4
5*******************************
6V4L2_META_FMT_D4XX ('D4XX')
7*******************************
8
9Intel D4xx UVC Cameras Metadata
10
11
12Description
13===========
14
15Intel D4xx (D435 and other) cameras include per-frame metadata in their UVC
16payload headers, following the Microsoft(R) UVC extension proposal [1_]. That
17means, that the private D4XX metadata, following the standard UVC header, is
18organised in blocks. D4XX cameras implement several standard block types,
19proposed by Microsoft, and several proprietary ones. Supported standard metadata
20types are MetadataId_CaptureStats (ID 3), MetadataId_CameraExtrinsics (ID 4),
21and MetadataId_CameraIntrinsics (ID 5). For their description see [1_]. This
22document describes proprietary metadata types, used by D4xx cameras.
23
24V4L2_META_FMT_D4XX buffers follow the metadata buffer layout of
25V4L2_META_FMT_UVC with the only difference, that it also includes proprietary
26payload header data. D4xx cameras use bulk transfers and only send one payload
27per frame, therefore their headers cannot be larger than 255 bytes.
28
29Below are proprietary Microsoft style metadata types, used by D4xx cameras,
30where all fields are in little endian order:
31
32.. flat-table:: D4xx metadata
33 :widths: 1 4
34 :header-rows: 1
35 :stub-columns: 0
36
37 * - Field
38 - Description
39 * - :cspan:`1` *Depth Control*
40 * - __u32 ID
41 - 0x80000000
42 * - __u32 Size
43 - Size in bytes (currently 56)
44 * - __u32 Version
45 - Version of this structure. The documentation herein corresponds to
46 version xxx. The version number will be incremented when new fields are
47 added.
48 * - __u32 Flags
49 - A bitmask of flags: see [2_] below
50 * - __u32 Gain
51 - Gain value in internal units, same as the V4L2_CID_GAIN control, used to
52 capture the frame
53 * - __u32 Exposure
54 - Exposure time (in microseconds) used to capture the frame
55 * - __u32 Laser power
56 - Power of the laser LED 0-360, used for depth measurement
57 * - __u32 AE mode
58 - 0: manual; 1: automatic exposure
59 * - __u32 Exposure priority
60 - Exposure priority value: 0 - constant frame rate
61 * - __u32 AE ROI left
62 - Left border of the AE Region of Interest (all ROI values are in pixels
63 and lie between 0 and maximum width or height respectively)
64 * - __u32 AE ROI right
65 - Right border of the AE Region of Interest
66 * - __u32 AE ROI top
67 - Top border of the AE Region of Interest
68 * - __u32 AE ROI bottom
69 - Bottom border of the AE Region of Interest
70 * - __u32 Preset
71 - Preset selector value, default: 0, unless changed by the user
72 * - __u32 Laser mode
73 - 0: off, 1: on
74 * - :cspan:`1` *Capture Timing*
75 * - __u32 ID
76 - 0x80000001
77 * - __u32 Size
78 - Size in bytes (currently 40)
79 * - __u32 Version
80 - Version of this structure. The documentation herein corresponds to
81 version xxx. The version number will be incremented when new fields are
82 added.
83 * - __u32 Flags
84 - A bitmask of flags: see [3_] below
85 * - __u32 Frame counter
86 - Monotonically increasing counter
87 * - __u32 Optical time
88 - Time in microseconds from the beginning of a frame till its middle
89 * - __u32 Readout time
90 - Time, used to read out a frame in microseconds
91 * - __u32 Exposure time
92 - Frame exposure time in microseconds
93 * - __u32 Frame interval
94 - In microseconds = 1000000 / framerate
95 * - __u32 Pipe latency
96 - Time in microseconds from start of frame to data in USB buffer
97 * - :cspan:`1` *Configuration*
98 * - __u32 ID
99 - 0x80000002
100 * - __u32 Size
101 - Size in bytes (currently 40)
102 * - __u32 Version
103 - Version of this structure. The documentation herein corresponds to
104 version xxx. The version number will be incremented when new fields are
105 added.
106 * - __u32 Flags
107 - A bitmask of flags: see [4_] below
108 * - __u8 Hardware type
109 - Camera hardware version [5_]
110 * - __u8 SKU ID
111 - Camera hardware configuration [6_]
112 * - __u32 Cookie
113 - Internal synchronisation
114 * - __u16 Format
115 - Image format code [7_]
116 * - __u16 Width
117 - Width in pixels
118 * - __u16 Height
119 - Height in pixels
120 * - __u16 Framerate
121 - Requested frame rate per second
122 * - __u16 Trigger
123 - Byte 0: bit 0: depth and RGB are synchronised, bit 1: external trigger
124
125.. _1:
126
127[1] https://docs.microsoft.com/en-us/windows-hardware/drivers/stream/uvc-extensions-1-5
128
129.. _2:
130
131[2] Depth Control flags specify which fields are valid: ::
132
133 0x00000001 Gain
134 0x00000002 Exposure
135 0x00000004 Laser power
136 0x00000008 AE mode
137 0x00000010 Exposure priority
138 0x00000020 AE ROI
139 0x00000040 Preset
140
141.. _3:
142
143[3] Capture Timing flags specify which fields are valid: ::
144
145 0x00000001 Frame counter
146 0x00000002 Optical time
147 0x00000004 Readout time
148 0x00000008 Exposure time
149 0x00000010 Frame interval
150 0x00000020 Pipe latency
151
152.. _4:
153
154[4] Configuration flags specify which fields are valid: ::
155
156 0x00000001 Hardware type
157 0x00000002 SKU ID
158 0x00000004 Cookie
159 0x00000008 Format
160 0x00000010 Width
161 0x00000020 Height
162 0x00000040 Framerate
163 0x00000080 Trigger
164 0x00000100 Cal count
165
166.. _5:
167
168[5] Camera model: ::
169
170 0 DS5
171 1 IVCAM2
172
173.. _6:
174
175[6] 8-bit camera hardware configuration bitfield: ::
176
177 [1:0] depthCamera
178 00: no depth
179 01: standard depth
180 10: wide depth
181 11: reserved
182 [2] depthIsActive - has a laser projector
183 [3] RGB presence
184 [4] Inertial Measurement Unit (IMU) presence
185 [5] projectorType
186 0: HPTG
187 1: Princeton
188 [6] 0: a projector, 1: an LED
189 [7] reserved
190
191.. _7:
192
193[7] Image format codes per video streaming interface:
194
195Depth: ::
196
197 1 Z16
198 2 Z
199
200Left sensor: ::
201
202 1 Y8
203 2 UYVY
204 3 R8L8
205 4 Calibration
206 5 W10
207
208Fish Eye sensor: ::
209
210 1 RAW8
Documentation/media/uapi/v4l/pixfmt-reserved.rst+14−1
@@ -243,7 +243,20 @@ please make a proposal on the linux-media mailing list. · 242 unmodified lines
243 It is an opaque intermediate format and the MDP hardware must be243 It is an opaque intermediate format and the MDP hardware must be
244 used to convert ``V4L2_PIX_FMT_MT21C`` to ``V4L2_PIX_FMT_NV12M``,244 used to convert ``V4L2_PIX_FMT_MT21C`` to ``V4L2_PIX_FMT_NV12M``,
245 ``V4L2_PIX_FMT_YUV420M`` or ``V4L2_PIX_FMT_YVU420``.245 ``V4L2_PIX_FMT_YUV420M`` or ``V4L2_PIX_FMT_YVU420``.
246 246 * .. _V4L2-PIX-FMT-SUNXI-TILED-NV12:
247
248 - ``V4L2_PIX_FMT_SUNXI_TILED_NV12``
249 - 'ST12'
250 - Two-planar NV12-based format used by the video engine found on Allwinner
251 (codenamed sunxi) platforms, with 32x32 tiles for the luminance plane
252 and 32x64 tiles for the chrominance plane. The data in each tile is
253 stored in linear order, within the tile bounds. Each tile follows the
254 previous one linearly in memory (from left to right, top to bottom).
255
256 The associated buffer dimensions are aligned to match an integer number
257 of tiles, resulting in 32-aligned resolutions for the luminance plane
258 and 16-aligned resolutions for the chrominance plane (with 2x2
259 subsampling).
247 260
248.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|261.. tabularcolumns:: |p{6.6cm}|p{2.2cm}|p{8.7cm}|
249 262
Documentation/media/uapi/v4l/vidioc-create-bufs.rst+13−1
@@ -102,7 +102,19 @@ than the number requested. · 101 unmodified lines
102 - ``format``102 - ``format``
103 - Filled in by the application, preserved by the driver.103 - Filled in by the application, preserved by the driver.
104 * - __u32104 * - __u32
105 - ``reserved``\ [8]105 - ``capabilities``
106 - Set by the driver. If 0, then the driver doesn't support
107 capabilities. In that case all you know is that the driver is
108 guaranteed to support ``V4L2_MEMORY_MMAP`` and *might* support
109 other :c:type:`v4l2_memory` types. It will not support any others
110 capabilities. See :ref:`here <v4l2-buf-capabilities>` for a list of the
111 capabilities.
112
113 If you want to just query the capabilities without making any
114 other changes, then set ``count`` to 0, ``memory`` to
115 ``V4L2_MEMORY_MMAP`` and ``format.type`` to the buffer type.
116 * - __u32
117 - ``reserved``\ [7]
106 - A place holder for future extensions. Drivers and applications118 - A place holder for future extensions. Drivers and applications
107 must set the array to zero.119 must set the array to zero.
108 120
Documentation/media/uapi/v4l/vidioc-cropcap.rst+1−1
@@ -58,7 +58,7 @@ overlay devices. · 57 unmodified lines
58 - Type of the data stream, set by the application. Only these types58 - Type of the data stream, set by the application. Only these types
59 are valid here: ``V4L2_BUF_TYPE_VIDEO_CAPTURE``, ``V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE``,59 are valid here: ``V4L2_BUF_TYPE_VIDEO_CAPTURE``, ``V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE``,
60 ``V4L2_BUF_TYPE_VIDEO_OUTPUT``, ``V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE`` and60 ``V4L2_BUF_TYPE_VIDEO_OUTPUT``, ``V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE`` and
61 ``V4L2_BUF_TYPE_VIDEO_OVERLAY``. See :c:type:`v4l2_buf_type` and the note above.61 ``V4L2_BUF_TYPE_VIDEO_OVERLAY``. See :c:type:`v4l2_buf_type` and the note below.
62 * - struct :ref:`v4l2_rect <v4l2-rect-crop>`62 * - struct :ref:`v4l2_rect <v4l2-rect-crop>`
63 - ``bounds``63 - ``bounds``
64 - Defines the window within capturing or output is possible, this64 - Defines the window within capturing or output is possible, this
Documentation/media/uapi/v4l/vidioc-dqevent.rst+11−1
@@ -379,7 +379,17 @@ call. · 378 unmodified lines
379 - 0x0001379 - 0x0001
380 - This event gets triggered when a resolution change is detected at380 - This event gets triggered when a resolution change is detected at
381 an input. This can come from an input connector or from a video381 an input. This can come from an input connector or from a video
382 decoder.382 decoder. Applications will have to query the new resolution (if
383 any, the signal may also have been lost).
384
385 *Important*: even if the new video timings appear identical to the old
386 ones, receiving this event indicates that there was an issue with the
387 video signal and you must stop and restart streaming
388 (:ref:`VIDIOC_STREAMOFF <VIDIOC_STREAMON>`
389 followed by :ref:`VIDIOC_STREAMON <VIDIOC_STREAMON>`). The reason is
390 that many devices are not able to recover from a temporary loss of
391 signal and so restarting streaming I/O is required in order for the
392 hardware to synchronize to the video signal.
383 393
384 394
385Return Value395Return Value
Documentation/media/uapi/v4l/vidioc-g-crop.rst+1−1
@@ -84,7 +84,7 @@ When cropping is not supported then no parameters are changed and · 83 unmodified lines
84 - Type of the data stream, set by the application. Only these types84 - Type of the data stream, set by the application. Only these types
85 are valid here: ``V4L2_BUF_TYPE_VIDEO_CAPTURE``, ``V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE``,85 are valid here: ``V4L2_BUF_TYPE_VIDEO_CAPTURE``, ``V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE``,
86 ``V4L2_BUF_TYPE_VIDEO_OUTPUT``, ``V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE`` and86 ``V4L2_BUF_TYPE_VIDEO_OUTPUT``, ``V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE`` and
87 ``V4L2_BUF_TYPE_VIDEO_OVERLAY``. See :c:type:`v4l2_buf_type` and the note above.87 ``V4L2_BUF_TYPE_VIDEO_OVERLAY``. See :c:type:`v4l2_buf_type` and the note below.
88 * - struct :c:type:`v4l2_rect`88 * - struct :c:type:`v4l2_rect`
89 - ``c``89 - ``c``
90 - Cropping rectangle. The same co-ordinate system as for struct90 - Cropping rectangle. The same co-ordinate system as for struct
Documentation/media/uapi/v4l/vidioc-g-dv-timings.rst+19−8
@@ -257,14 +257,19 @@ EBUSY · 256 unmodified lines
257 will also be cleared. This is a read-only flag, applications must257 will also be cleared. This is a read-only flag, applications must
258 not set this.258 not set this.
259 * - ``V4L2_DV_FL_REDUCED_FPS``259 * - ``V4L2_DV_FL_REDUCED_FPS``
260 - CEA-861 specific: only valid for video transmitters, the flag is260 - CEA-861 specific: only valid for video transmitters or video
261 cleared by receivers. It is also only valid for formats with the261 receivers that have the ``V4L2_DV_FL_CAN_DETECT_REDUCED_FPS``
262 ``V4L2_DV_FL_CAN_REDUCE_FPS`` flag set, for other formats the262 set. This flag is cleared otherwise. It is also only valid for
263 flag will be cleared by the driver. If the application sets this263 formats with the ``V4L2_DV_FL_CAN_REDUCE_FPS`` flag set, for other
264 flag, then the pixelclock used to set up the transmitter is264 formats the flag will be cleared by the driver.
265 divided by 1.001 to make it compatible with NTSC framerates. If265
266 the transmitter can't generate such frequencies, then the flag266 If the application sets this flag for a transmitter, then the
267 will also be cleared.267 pixelclock used to set up the transmitter is divided by 1.001 to
268 make it compatible with NTSC framerates. If the transmitter can't
269 generate such frequencies, then the flag will be cleared.
270
271 If a video receiver detects that the format uses a reduced framerate,
272 then it will set this flag to signal this to the application.
268 * - ``V4L2_DV_FL_HALF_LINE``273 * - ``V4L2_DV_FL_HALF_LINE``
269 - Specific to interlaced formats: if set, then the vertical274 - Specific to interlaced formats: if set, then the vertical
270 backporch of field 1 (aka the odd field) is really one half-line275 backporch of field 1 (aka the odd field) is really one half-line
@@ -294,3 +299,9 @@ EBUSY · 23 unmodified lines
294 - If set, then the hdmi_vic field is valid and contains the Video299 - If set, then the hdmi_vic field is valid and contains the Video
295 Identification Code as per the HDMI standard (HDMI Vendor Specific300 Identification Code as per the HDMI standard (HDMI Vendor Specific
296 InfoFrame).301 InfoFrame).
302 * - ``V4L2_DV_FL_CAN_DETECT_REDUCED_FPS``
303 - CEA-861 specific: only valid for video receivers, the flag is
304 cleared by transmitters.
305 If set, then the hardware can detect the difference between
306 regular framerates and framerates reduced by 1000/1001. E.g.:
307 60 vs 59.94 Hz, 30 vs 29.97 Hz or 24 vs 23.976 Hz.
Documentation/media/uapi/v4l/vidioc-g-ext-ctrls.rst+49−10
@@ -95,6 +95,25 @@ appropriate. In the first case the new value is set in struct · 94 unmodified lines
95is inappropriate (e.g. the given menu index is not supported by the menu95is inappropriate (e.g. the given menu index is not supported by the menu
96control), then this will also result in an ``EINVAL`` error code error.96control), then this will also result in an ``EINVAL`` error code error.
97 97
98If ``request_fd`` is set to a not-yet-queued :ref:`request <media-request-api>`
99file descriptor and ``which`` is set to ``V4L2_CTRL_WHICH_REQUEST_VAL``,
100then the controls are not applied immediately when calling
101:ref:`VIDIOC_S_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`, but instead are applied by
102the driver for the buffer associated with the same request.
103If the device does not support requests, then ``EACCES`` will be returned.
104If requests are supported but an invalid request file descriptor is given,
105then ``EINVAL`` will be returned.
106
107An attempt to call :ref:`VIDIOC_S_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` for a
108request that has already been queued will result in an ``EBUSY`` error.
109
110If ``request_fd`` is specified and ``which`` is set to
111``V4L2_CTRL_WHICH_REQUEST_VAL`` during a call to
112:ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`, then it will return the
113values of the controls at the time of request completion.
114If the request is not yet completed, then this will result in an
115``EACCES`` error.
116
98The driver will only set/get these controls if all control values are117The driver will only set/get these controls if all control values are
99correct. This prevents the situation where only some of the controls118correct. This prevents the situation where only some of the controls
100were set/get. Only low-level errors (e. g. a failed i2c command) can119were set/get. Only low-level errors (e. g. a failed i2c command) can
@@ -209,13 +228,17 @@ still cause this situation. · 108 unmodified lines
209 - ``which``228 - ``which``
210 - Which value of the control to get/set/try.229 - Which value of the control to get/set/try.
211 ``V4L2_CTRL_WHICH_CUR_VAL`` will return the current value of the230 ``V4L2_CTRL_WHICH_CUR_VAL`` will return the current value of the
212 control and ``V4L2_CTRL_WHICH_DEF_VAL`` will return the default231 control, ``V4L2_CTRL_WHICH_DEF_VAL`` will return the default
213 value of the control.232 value of the control and ``V4L2_CTRL_WHICH_REQUEST_VAL`` indicates that
233 these controls have to be retrieved from a request or tried/set for
234 a request. In the latter case the ``request_fd`` field contains the
235 file descriptor of the request that should be used. If the device
236 does not support requests, then ``EACCES`` will be returned.
214 237
215 .. note::238 .. note::
216 239
217 You can only get the default value of the control,240 When using ``V4L2_CTRL_WHICH_DEF_VAL`` be aware that you can only
218 you cannot set or try it.241 get the default value of the control, you cannot set or try it.
219 242
220 For backwards compatibility you can also use a control class here243 For backwards compatibility you can also use a control class here
221 (see :ref:`ctrl-class`). In that case all controls have to244 (see :ref:`ctrl-class`). In that case all controls have to
@@ -272,8 +295,15 @@ still cause this situation. · 50 unmodified lines
272 then you can call :ref:`VIDIOC_TRY_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` to try to discover the295 then you can call :ref:`VIDIOC_TRY_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>` to try to discover the
273 actual control that failed the validation step. Unfortunately,296 actual control that failed the validation step. Unfortunately,
274 there is no ``TRY`` equivalent for :ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`.297 there is no ``TRY`` equivalent for :ref:`VIDIOC_G_EXT_CTRLS <VIDIOC_G_EXT_CTRLS>`.
298 * - __s32
299 - ``request_fd``
300 - File descriptor of the request to be used by this operation. Only
301 valid if ``which`` is set to ``V4L2_CTRL_WHICH_REQUEST_VAL``.
302 If the device does not support requests, then ``EACCES`` will be returned.
303 If requests are supported but an invalid request file descriptor is
304 given, then ``EINVAL`` will be returned.
275 * - __u32305 * - __u32
276 - ``reserved``\ [2]306 - ``reserved``\ [1]
277 - Reserved for future extensions.307 - Reserved for future extensions.
278 308
279 Drivers and applications must set the array to zero.309 Drivers and applications must set the array to zero.
@@ -347,11 +377,14 @@ appropriately. The generic error codes are described at the · 67 unmodified lines
347 377
348EINVAL378EINVAL
349 The struct :c:type:`v4l2_ext_control` ``id`` is379 The struct :c:type:`v4l2_ext_control` ``id`` is

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arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dtsrenamed from arch/arm/boot/dts/socfpga_cyclone5_de0_sockit.dts+1−1

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crypto/crypto_user_base.crenamed from crypto/crypto_user.c+16−11

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crypto/xcbc.c+5−3

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crypto/xts.c+46−223

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drivers/acpi/acpica/exfield.c+70−256

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drivers/acpi/pci_root.c+13−4

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drivers/acpi/pmic/intel_pmic_bxtwc.c+2−10

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drivers/acpi/pmic/intel_pmic_chtdc_ti.c+1−0

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drivers/acpi/pmic/intel_pmic_chtwc.c+1−9

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drivers/acpi/pmic/intel_pmic_crc.c+4−12

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drivers/acpi/pmic/intel_pmic_xpower.c+17−16

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drivers/acpi/pmic/tps68470_pmic.c+1−1

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drivers/android/Kconfig+1−1

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drivers/android/binder_trace.h+27−9

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drivers/block/mtip32xx/mtip32xx.c+21−32

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drivers/block/null_blk_main.c+14−127

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drivers/bus/fsl-mc/fsl-mc-bus.c+20−7

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drivers/cdrom/gdrom.c+82−98

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drivers/char/Kconfig+1−1

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drivers/char/hw_random/core.c+2−2

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drivers/char/ipmi/ipmi_bt_sm.c+34−32

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drivers/char/ipmi/ipmi_devintf.c+5−6

This diff is large: its 41 lines aren’t shown here.

drivers/char/ipmi/ipmi_dmi.c+15−16

This diff is large: its 110 lines aren’t shown here.

drivers/char/ipmi/ipmi_kcs_sm.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/char/ipmi/ipmi_msghandler.c+25−28

This diff is large: its 190 lines aren’t shown here.

drivers/char/ipmi/ipmi_powernv.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/char/ipmi/ipmi_poweroff.c+30−37

This diff is large: its 199 lines aren’t shown here.

drivers/char/ipmi/ipmi_si_hardcode.c+5−4

This diff is large: its 39 lines aren’t shown here.

drivers/char/ipmi/ipmi_si_hotmod.c+9−8

This diff is large: its 67 lines aren’t shown here.

drivers/char/ipmi/ipmi_si_intf.c+14−14

This diff is large: its 123 lines aren’t shown here.

drivers/char/ipmi/ipmi_si_mem_io.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/char/ipmi/ipmi_si_pci.c+8−13

This diff is large: its 68 lines aren’t shown here.

drivers/char/ipmi/ipmi_si_platform.c+17−9

This diff is large: its 96 lines aren’t shown here.

drivers/char/ipmi/ipmi_smic_sm.c+11−15

This diff is large: its 75 lines aren’t shown here.

drivers/char/ipmi/ipmi_ssif.c+211−96

This diff is large: its 610 lines aren’t shown here.

drivers/char/ipmi/ipmi_watchdog.c+25−27

This diff is large: its 212 lines aren’t shown here.

drivers/char/pcmcia/cm4000_cs.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/char/pcmcia/cm4040_cs.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/char/pcmcia/synclink_cs.c+1−2

This diff is large: its 10 lines aren’t shown here.

drivers/char/random.c+12−12

This diff is large: its 101 lines aren’t shown here.

drivers/char/tpm/Kconfig+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/char/tpm/tpm-dev-common.c+109−38

This diff is large: its 236 lines aren’t shown here.

drivers/char/tpm/tpm-dev.c+3−8

This diff is large: its 31 lines aren’t shown here.

drivers/char/tpm/tpm-dev.h+12−6

This diff is large: its 40 lines aren’t shown here.

drivers/char/tpm/tpm-interface.c+23−7

This diff is large: its 66 lines aren’t shown here.

drivers/char/tpm/tpm.h+2−0

This diff is large: its 7 lines aren’t shown here.

drivers/char/tpm/tpm2-cmd.c+3−1

This diff is large: its 11 lines aren’t shown here.

drivers/char/tpm/tpmrm-dev.c+3−12

This diff is large: its 33 lines aren’t shown here.

drivers/char/tpm/xen-tpmfront.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/Kconfig+2−0

This diff is large: its 15 lines aren’t shown here.

drivers/clk/Makefile+3−1

This diff is large: its 15 lines aren’t shown here.

drivers/clk/actions/Kconfig+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/actions/Makefile+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/actions/owl-common.c+2−1

This diff is large: its 17 lines aren’t shown here.

drivers/clk/actions/owl-common.h+4−1

This diff is large: its 19 lines aren’t shown here.

drivers/clk/actions/owl-reset.c+66−0

This diff is large: its 67 lines aren’t shown here.

drivers/clk/actions/owl-reset.h+31−0

This diff is large: its 32 lines aren’t shown here.

drivers/clk/actions/owl-s700.c+53−2

This diff is large: its 83 lines aren’t shown here.

drivers/clk/actions/owl-s900.c+84−2

This diff is large: its 114 lines aren’t shown here.

drivers/clk/at91/Makefile+4−1

This diff is large: its 16 lines aren’t shown here.

drivers/clk/at91/at91sam9260.c+494−0

This diff is large: its 495 lines aren’t shown here.

drivers/clk/at91/at91sam9rl.c+171−0

This diff is large: its 172 lines aren’t shown here.

drivers/clk/at91/at91sam9x5.c+309−0

This diff is large: its 310 lines aren’t shown here.

drivers/clk/at91/clk-audio-pll.c+56−53

This diff is large: its 157 lines aren’t shown here.

drivers/clk/at91/clk-generated.c+3−78

This diff is large: its 110 lines aren’t shown here.

drivers/clk/at91/clk-h32mx.c+7−15

This diff is large: its 44 lines aren’t shown here.

drivers/clk/at91/clk-i2s-mux.c+2−38

This diff is large: its 58 lines aren’t shown here.

drivers/clk/at91/clk-main.c+4−108

This diff is large: its 172 lines aren’t shown here.

drivers/clk/at91/clk-master.c+3−96

This diff is large: its 129 lines aren’t shown here.

drivers/clk/at91/clk-peripheral.c+2−79

This diff is large: its 106 lines aren’t shown here.

drivers/clk/at91/clk-pll.c+8−182

This diff is large: its 234 lines aren’t shown here.

drivers/clk/at91/clk-plldiv.c+1−26

This diff is large: its 38 lines aren’t shown here.

drivers/clk/at91/clk-programmable.c+4−77

This diff is large: its 120 lines aren’t shown here.

drivers/clk/at91/clk-slow.c+1−31

This diff is large: its 43 lines aren’t shown here.

drivers/clk/at91/clk-smd.c+1−33

This diff is large: its 52 lines aren’t shown here.

drivers/clk/at91/clk-system.c+1−38

This diff is large: its 50 lines aren’t shown here.

drivers/clk/at91/clk-usb.c+3−91

This diff is large: its 126 lines aren’t shown here.

drivers/clk/at91/clk-utmi.c+1−44

This diff is large: its 56 lines aren’t shown here.

drivers/clk/at91/dt-compat.c+961−0

This diff is large: its 962 lines aren’t shown here.

drivers/clk/at91/pmc.c+78−0

This diff is large: its 92 lines aren’t shown here.

drivers/clk/at91/pmc.h+159−0

This diff is large: its 176 lines aren’t shown here.

drivers/clk/at91/sama5d2.c+336−0

This diff is large: its 337 lines aren’t shown here.

drivers/clk/at91/sama5d4.c+264−0

This diff is large: its 265 lines aren’t shown here.

drivers/clk/axs10x/pll_clock.c+2−2

This diff is large: its 16 lines aren’t shown here.

drivers/clk/bcm/clk-kona-setup.c+11−11

This diff is large: its 58 lines aren’t shown here.

drivers/clk/clk-asm9260.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/clk-bulk.c+80−0

This diff is large: its 96 lines aren’t shown here.

drivers/clk/clk-cdce925.c+6−5

This diff is large: its 39 lines aren’t shown here.

drivers/clk/clk-devres.c+24−0

This diff is large: its 31 lines aren’t shown here.

drivers/clk/clk-fixed-factor.c+5−4

This diff is large: its 27 lines aren’t shown here.

drivers/clk/clk-fixed-rate.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/clk-gpio.c+4−4

This diff is large: its 16 lines aren’t shown here.

drivers/clk/clk-hsdk-pll.c+2−2

This diff is large: its 16 lines aren’t shown here.

drivers/clk/clk-max77686.c+6−21

This diff is large: its 31 lines aren’t shown here.

drivers/clk/clk-nomadik.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/clk-npcm7xx.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/clk-palmas.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/clk-qoriq.c+7−7

This diff is large: its 42 lines aren’t shown here.

drivers/clk/clk-s2mps11.c+36−22

This diff is large: its 76 lines aren’t shown here.

drivers/clk/clk-scmi.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/clk-scpi.c+3−3

This diff is large: its 25 lines aren’t shown here.

drivers/clk/clk-si5351.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/clk-stm32f4.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/clk-stm32h7.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/clk-stm32mp1.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/clk-tango4.c+5−5

This diff is large: its 29 lines aren’t shown here.

drivers/clk/clk.c+95−0

This diff is large: its 102 lines aren’t shown here.

drivers/clk/davinci/psc.c+0−18

This diff is large: its 25 lines aren’t shown here.

drivers/clk/hisilicon/Kconfig+7−0

This diff is large: its 14 lines aren’t shown here.

drivers/clk/hisilicon/Makefile+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/hisilicon/clk-hi3670.c+1016−0

This diff is large: its 1017 lines aren’t shown here.

drivers/clk/hisilicon/reset.c+2−3

This diff is large: its 12 lines aren’t shown here.

drivers/clk/imx/clk-cpu.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/imx/clk-imx6q.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/imx/clk-imx6sl.c+2−0

This diff is large: its 9 lines aren’t shown here.

drivers/clk/imx/clk-imx6sll.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/imx/clk-imx6sx.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/imx/clk-imx6ul.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/imx/clk-imx7d.c+8−20

This diff is large: its 75 lines aren’t shown here.

drivers/clk/imx/clk.h+7−0

This diff is large: its 14 lines aren’t shown here.

drivers/clk/ingenic/Kconfig+47−0

This diff is large: its 48 lines aren’t shown here.

drivers/clk/ingenic/Makefile+5−4

This diff is large: its 10 lines aren’t shown here.

drivers/clk/ingenic/jz4725b-cgu.c+225−0

This diff is large: its 226 lines aren’t shown here.

drivers/clk/keystone/Kconfig+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/keystone/gate.c+6−1

This diff is large: its 18 lines aren’t shown here.

drivers/clk/keystone/pll.c+6−1

This diff is large: its 18 lines aren’t shown here.

drivers/clk/mediatek/clk-mt2701.c+0−5

This diff is large: its 12 lines aren’t shown here.

drivers/clk/meson/axg-audio.c+23−11

This diff is large: its 61 lines aren’t shown here.

drivers/clk/meson/axg.c+202−143

This diff is large: its 552 lines aren’t shown here.

drivers/clk/meson/axg.h+7−1

This diff is large: its 16 lines aren’t shown here.

drivers/clk/meson/clk-pll.c+101−55

This diff is large: its 274 lines aren’t shown here.

drivers/clk/meson/clkc.h+4−12

This diff is large: its 42 lines aren’t shown here.

drivers/clk/meson/gxbb.c+273−257

This diff is large: its 724 lines aren’t shown here.

drivers/clk/meson/gxbb.h+8−2

This diff is large: its 17 lines aren’t shown here.

drivers/clk/meson/meson8b.c+135−145

This diff is large: its 427 lines aren’t shown here.

drivers/clk/meson/meson8b.h+4−1

This diff is large: its 13 lines aren’t shown here.

drivers/clk/mmp/clk-of-mmp2.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/mvebu/ap806-system-controller.c+1−4

This diff is large: its 23 lines aren’t shown here.

drivers/clk/mvebu/armada-370.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/armada-375.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/armada-37xx-periph.c+50−8

This diff is large: its 104 lines aren’t shown here.

drivers/clk/mvebu/armada-37xx-tbg.c+3−5

This diff is large: its 30 lines aren’t shown here.

drivers/clk/mvebu/armada-37xx-xtal.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/armada-38x.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/armada-39x.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/armada-xp.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/clk-corediv.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/clk-cpu.c+3−5

This diff is large: its 33 lines aren’t shown here.

drivers/clk/mvebu/common.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/common.h+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/cp110-system-controller.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/dove.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/kirkwood.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/mv98dx3236.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/mvebu/orion.c+1−3

This diff is large: its 15 lines aren’t shown here.

drivers/clk/qcom/Kconfig+53−0

This diff is large: its 68 lines aren’t shown here.

drivers/clk/qcom/Makefile+8−0

This diff is large: its 23 lines aren’t shown here.

drivers/clk/qcom/camcc-sdm845.c+1745−0

This diff is large: its 1746 lines aren’t shown here.

drivers/clk/qcom/clk-alpha-pll.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/clk/qcom/clk-branch.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/qcom/clk-hfpll.c+244−0

This diff is large: its 245 lines aren’t shown here.

drivers/clk/qcom/clk-hfpll.h+44−0

This diff is large: its 45 lines aren’t shown here.

drivers/clk/qcom/clk-krait.c+126−0

This diff is large: its 127 lines aren’t shown here.

drivers/clk/qcom/clk-krait.h+40−0

This diff is large: its 41 lines aren’t shown here.

drivers/clk/qcom/clk-rcg.h+11−0

This diff is large: its 16 lines aren’t shown here.

drivers/clk/qcom/clk-rcg2.c+195−0

This diff is large: its 213 lines aren’t shown here.

drivers/clk/qcom/gcc-ipq806x.c+82−0

This diff is large: its 103 lines aren’t shown here.

drivers/clk/qcom/gcc-msm8960.c+172−0

This diff is large: its 207 lines aren’t shown here.

drivers/clk/qcom/gcc-msm8996.c+152−0

This diff is large: its 201 lines aren’t shown here.

drivers/clk/qcom/gcc-qcs404.c+2744−0

This diff is large: its 2745 lines aren’t shown here.

drivers/clk/qcom/gcc-sdm660.c+2480−0

This diff is large: its 2481 lines aren’t shown here.

drivers/clk/qcom/gcc-sdm845.c+209−112

This diff is large: its 484 lines aren’t shown here.

drivers/clk/qcom/hfpll.c+96−0

This diff is large: its 97 lines aren’t shown here.

drivers/clk/qcom/kpss-xcc.c+87−0

This diff is large: its 88 lines aren’t shown here.

drivers/clk/qcom/krait-cc.c+397−0

This diff is large: its 398 lines aren’t shown here.

drivers/clk/renesas/Kconfig+18−1

This diff is large: its 46 lines aren’t shown here.

drivers/clk/renesas/Makefile+3−0

This diff is large: its 15 lines aren’t shown here.

drivers/clk/renesas/clk-div6.c+7−10

This diff is large: its 48 lines aren’t shown here.

drivers/clk/renesas/clk-emev2.c+5−17

This diff is large: its 44 lines aren’t shown here.

drivers/clk/renesas/clk-mstp.c+5−8

This diff is large: its 38 lines aren’t shown here.

drivers/clk/renesas/clk-r8a73a4.c+3−6

This diff is large: its 24 lines aren’t shown here.

drivers/clk/renesas/clk-r8a7740.c+3−6

This diff is large: its 24 lines aren’t shown here.

drivers/clk/renesas/clk-r8a7778.c+3−6

This diff is large: its 24 lines aren’t shown here.

drivers/clk/renesas/clk-r8a7779.c+3−6

This diff is large: its 26 lines aren’t shown here.

drivers/clk/renesas/clk-rcar-gen2.c+3−6

This diff is large: its 26 lines aren’t shown here.

drivers/clk/renesas/clk-rz.c+3−6

This diff is large: its 25 lines aren’t shown here.

drivers/clk/renesas/clk-sh73a0.c+3−6

This diff is large: its 24 lines aren’t shown here.

drivers/clk/renesas/r7s9210-cpg-mssr.c+217−0

This diff is large: its 218 lines aren’t shown here.

drivers/clk/renesas/r8a7743-cpg-mssr.c+13−5

This diff is large: its 52 lines aren’t shown here.

drivers/clk/renesas/r8a7745-cpg-mssr.c+1−4

This diff is large: its 13 lines aren’t shown here.

drivers/clk/renesas/r8a774a1-cpg-mssr.c+323−0

This diff is large: its 324 lines aren’t shown here.

drivers/clk/renesas/r8a774c0-cpg-mssr.c+286−0

This diff is large: its 287 lines aren’t shown here.

drivers/clk/renesas/r8a7790-cpg-mssr.c+1−4

This diff is large: its 16 lines aren’t shown here.

drivers/clk/renesas/r8a7791-cpg-mssr.c+1−4

This diff is large: its 16 lines aren’t shown here.

drivers/clk/renesas/r8a7792-cpg-mssr.c+1−4

This diff is large: its 16 lines aren’t shown here.

drivers/clk/renesas/r8a7794-cpg-mssr.c+1−4

This diff is large: its 16 lines aren’t shown here.

drivers/clk/renesas/r8a7795-cpg-mssr.c+35−37

This diff is large: its 116 lines aren’t shown here.

drivers/clk/renesas/r8a7796-cpg-mssr.c+35−37

This diff is large: its 116 lines aren’t shown here.

drivers/clk/renesas/r8a77965-cpg-mssr.c+36−33

This diff is large: its 114 lines aren’t shown here.

drivers/clk/renesas/r8a77970-cpg-mssr.c+75−6

This diff is large: its 146 lines aren’t shown here.

drivers/clk/renesas/r8a77980-cpg-mssr.c+21−11

This diff is large: its 76 lines aren’t shown here.

drivers/clk/renesas/r8a77990-cpg-mssr.c+13−4

This diff is large: its 59 lines aren’t shown here.

drivers/clk/renesas/r8a77995-cpg-mssr.c+11−6

This diff is large: its 56 lines aren’t shown here.

drivers/clk/renesas/r9a06g032-clocks.c+2−1

This diff is large: its 10 lines aren’t shown here.

drivers/clk/renesas/rcar-gen2-cpg.c+1−4

This diff is large: its 13 lines aren’t shown here.

drivers/clk/renesas/rcar-gen2-cpg.h+2−5

This diff is large: its 14 lines aren’t shown here.

drivers/clk/renesas/rcar-gen3-cpg.c+32−13

This diff is large: its 95 lines aren’t shown here.

drivers/clk/renesas/rcar-gen3-cpg.h+24−9

This diff is large: its 63 lines aren’t shown here.

drivers/clk/renesas/rcar-usb2-clock-sel.c+1−4

This diff is large: its 16 lines aren’t shown here.

drivers/clk/renesas/renesas-cpg-mssr.c+168−37

This diff is large: its 374 lines aren’t shown here.

drivers/clk/renesas/renesas-cpg-mssr.h+33−5

This diff is large: its 104 lines aren’t shown here.

drivers/clk/rockchip/clk-ddr.c+0−4

This diff is large: its 17 lines aren’t shown here.

drivers/clk/rockchip/clk-rk3188.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/rockchip/clk-rk3288.c+25−4

This diff is large: its 48 lines aren’t shown here.

drivers/clk/rockchip/clk-rk3328.c+4−4

This diff is large: its 27 lines aren’t shown here.

drivers/clk/samsung/clk-cpu.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/clk/samsung/clk-cpu.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/samsung/clk-exynos-audss.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos3250.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/clk/samsung/clk-exynos4.c+14−212

This diff is large: its 310 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5250.c+2−40

This diff is large: its 70 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5420.c+8−68

This diff is large: its 120 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5433.c+32−1

This diff is large: its 82 lines aren’t shown here.

drivers/clk/samsung/clk-s3c2410.c+2−41

This diff is large: its 71 lines aren’t shown here.

drivers/clk/samsung/clk-s3c2412.c+2−41

This diff is large: its 71 lines aren’t shown here.

drivers/clk/samsung/clk-s3c2443.c+2−41

This diff is large: its 71 lines aren’t shown here.

drivers/clk/samsung/clk-s3c64xx.c+6−60

This diff is large: its 94 lines aren’t shown here.

drivers/clk/samsung/clk-s5pv210.c+2−39

This diff is large: its 69 lines aren’t shown here.

drivers/clk/samsung/clk.c+13−10

This diff is large: its 56 lines aren’t shown here.

drivers/clk/samsung/clk.h+16−2

This diff is large: its 33 lines aren’t shown here.

drivers/clk/st/clkgen-fsyn.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu-sun4i-a10.c+9−1

This diff is large: its 18 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu-sun50i-a64.c+26−22

This diff is large: its 62 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu-sun50i-a64.h+3−1

This diff is large: its 11 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu-sun50i-h6.c+28−25

This diff is large: its 91 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu-sun8i-a83t.c+2−0

This diff is large: its 16 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu-sun8i-h3.c+13−12

This diff is large: its 32 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu-sun8i-r40.c+26−26

This diff is large: its 66 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu_nkmp.c+7−0

This diff is large: its 14 lines aren’t shown here.

drivers/clk/sunxi-ng/ccu_nkmp.h+1−0

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drivers/clk/sunxi-ng/ccu_nm.c+7−0

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drivers/clk/sunxi-ng/ccu_nm.h+30−0

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drivers/clk/sunxi/clk-mod0.c+3−3

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drivers/clk/sunxi/clk-sun9i-core.c+10−10

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drivers/clk/sunxi/clk-sunxi.c+2−2

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drivers/clk/tegra/clk-dfll.c+6−2

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drivers/clk/tegra/clk-tegra210.c+4−3

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drivers/clk/ti/Makefile+6−3

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drivers/clk/ti/apll.c+9−9

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drivers/clk/ti/clk-33xx-compat.c+218−0

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drivers/clk/ti/clk-33xx.c+140−92

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drivers/clk/ti/clk-43xx-compat.c+225−0

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drivers/clk/ti/clk-43xx.c+150−99

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drivers/clk/ti/clk-7xx-compat.c+823−0

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drivers/clk/ti/clk-7xx.c+328−262

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drivers/clk/ti/clk-dra7-atl.c+2−2

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drivers/clk/ti/clk.c+20−12

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drivers/clk/ti/clkctrl.c+77−24

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drivers/clk/ti/clock.h+11−0

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drivers/clk/ti/composite.c+7−7

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drivers/clk/ti/divider.c+38−2

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drivers/clk/ti/dpll.c+12−6

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drivers/clk/ti/dpll3xxx.c+124−0

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drivers/clk/ti/fapll.c+4−4

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drivers/clk/ti/fixed-factor.c+2−2

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drivers/clk/ti/gate.c+4−1

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drivers/clk/ti/interface.c+1−1

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drivers/clk/ti/mux.c+31−2

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drivers/clk/zynq/clkc.c+2−2

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drivers/clk/zynqmp/Kconfig+10−0

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drivers/clk/zynqmp/Makefile+4−0

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drivers/clk/zynqmp/clk-gate-zynqmp.c+144−0

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drivers/clk/zynqmp/clk-mux-zynqmp.c+141−0

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drivers/clk/zynqmp/clk-zynqmp.h+68−0

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drivers/clk/zynqmp/clkc.c+716−0

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drivers/clk/zynqmp/divider.c+217−0

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drivers/clk/zynqmp/pll.c+335−0

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drivers/clocksource/Kconfig+18−0

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drivers/clocksource/Makefile+15−13

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drivers/clocksource/arm_arch_timer.c+15−0

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drivers/clocksource/asm9260_timer.c+1−1

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drivers/clocksource/dw_apb_timer_of.c+16−4

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drivers/clocksource/i8253.c+12−2

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drivers/clocksource/pxa_timer.c+3−3

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drivers/clocksource/renesas-ostm.c+1−10

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drivers/clocksource/riscv_timer.c+8−4

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drivers/clocksource/sh_cmt.c+53−53

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drivers/clocksource/sh_mtu2.c+1−9

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drivers/clocksource/sh_tmu.c+1−9

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drivers/clocksource/timer-armada-370-xp.crenamed from drivers/clocksource/time-armada-370-xp.c+0−0

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drivers/clocksource/timer-cadence-ttc.crenamed from drivers/clocksource/cadence_ttc_timer.c+1−1

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drivers/clocksource/timer-efm32.crenamed from drivers/clocksource/time-efm32.c+0−0

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drivers/clocksource/timer-fsl-ftm.crenamed from drivers/clocksource/fsl_ftm_timer.c+0−0

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drivers/clocksource/timer-gx6605s.c+154−0

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drivers/clocksource/timer-integrator-ap.c+1−1

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drivers/clocksource/timer-lpc32xx.crenamed from drivers/clocksource/time-lpc32xx.c+0−0

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drivers/clocksource/timer-mp-csky.c+173−0

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drivers/clocksource/timer-orion.crenamed from drivers/clocksource/time-orion.c+4−4

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drivers/clocksource/timer-owl.crenamed from drivers/clocksource/owl-timer.c+0−0

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drivers/clocksource/timer-pistachio.crenamed from drivers/clocksource/time-pistachio.c+0−0

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drivers/clocksource/timer-qcom.crenamed from drivers/clocksource/qcom-timer.c+0−0

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drivers/clocksource/timer-sp804.c+1−1

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drivers/clocksource/timer-versatile.crenamed from drivers/clocksource/versatile.c+0−0

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drivers/clocksource/timer-vf-pit.crenamed from drivers/clocksource/vf_pit_timer.c+0−0

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drivers/clocksource/timer-vt8500.crenamed from drivers/clocksource/vt8500_timer.c+0−0

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drivers/clocksource/timer-zevio.crenamed from drivers/clocksource/zevio-timer.c+4−4

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drivers/cpufreq/Kconfig.arm+1−8

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drivers/cpufreq/Makefile+0−3

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drivers/cpufreq/acpi-cpufreq.c+5−0

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drivers/cpufreq/amd_freq_sensitivity.c+7−2

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drivers/cpufreq/arm_big_little_dt.c+0−100

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drivers/cpufreq/cppc_cpufreq.c+1−1

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drivers/cpufreq/cpufreq-dt-platdev.c+5−1

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