Expose a new register type NT_RISCV_USER_CFI for risc-v CFI status and state. Intentionally, both landing pad and shadow stack status and state are rolled into the CFI state. Creating two different NT_RISCV_USER_XXX would not be useful and would waste a note type. Enabling, disabling and locking the CFI feature is not allowed via ptrace set interface. However, setting 'elp' state or setting shadow stack pointer are allowed via the ptrace set interface. It is expected that 'gdb' might need to fixup 'elp' state or 'shadow stack' pointer.
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| @@ -545,6 +545,8 @@ typedef struct elf64_shdr { · 544 unmodified lines | |||
| 545 | #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ | 545 | #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ |
| 546 | #define NN_RISCV_TAGGED_ADDR_CTRL "LINUX" | 546 | #define NN_RISCV_TAGGED_ADDR_CTRL "LINUX" |
| 547 | #define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ | 547 | #define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ |
| 548 | #define NN_RISCV_USER_CFI "LINUX" | ||
| 549 | #define NT_RISCV_USER_CFI 0x903 /* RISC-V shadow stack state */ | ||
| 548 | #define NN_LOONGARCH_CPUCFG "LINUX" | 550 | #define NN_LOONGARCH_CPUCFG "LINUX" |
| 549 | #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ | 551 | #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ |
| 550 | #define NN_LOONGARCH_CSR "LINUX" | 552 | #define NN_LOONGARCH_CSR "LINUX" |