Add the PCIe0 and PCIe1 GDSC defines & driver structures for SM8150.
Unified · Split
| @@ -3448,6 +3448,24 @@ static struct clk_branch gcc_video_xo_clk = { · 3447 unmodified lines | |||
| 3448 | }, | 3448 | }, |
| 3449 | }; | 3449 | }; |
| 3450 | 3450 | ||
| 3451 | static struct gdsc pcie_0_gdsc = { | ||
| 3452 | .gdscr = 0x6b004, | ||
| 3453 | .pd = { | ||
| 3454 | .name = "pcie_0_gdsc", | ||
| 3455 | }, | ||
| 3456 | .pwrsts = PWRSTS_OFF_ON, | ||
| 3457 | .flags = POLL_CFG_GDSCR, | ||
| 3458 | }; | ||
| 3459 | |||
| 3460 | static struct gdsc pcie_1_gdsc = { | ||
| 3461 | .gdscr = 0x8d004, | ||
| 3462 | .pd = { | ||
| 3463 | .name = "pcie_1_gdsc", | ||
| 3464 | }, | ||
| 3465 | .pwrsts = PWRSTS_OFF_ON, | ||
| 3466 | .flags = POLL_CFG_GDSCR, | ||
| 3467 | }; | ||
| 3468 | |||
| 3451 | static struct gdsc usb30_prim_gdsc = { | 3469 | static struct gdsc usb30_prim_gdsc = { |
| 3452 | .gdscr = 0xf004, | 3470 | .gdscr = 0xf004, |
| 3453 | .pd = { | 3471 | .pd = { |
| @@ -3714,6 +3732,8 @@ static const struct qcom_reset_map gcc_sm8150_resets[] = { · 260 unmodified lines | |||
| 3714 | }; | 3732 | }; |
| 3715 | 3733 | ||
| 3716 | static struct gdsc *gcc_sm8150_gdscs[] = { | 3734 | static struct gdsc *gcc_sm8150_gdscs[] = { |
| 3735 | [PCIE_0_GDSC] = &pcie_0_gdsc, | ||
| 3736 | [PCIE_1_GDSC] = &pcie_1_gdsc, | ||
| 3717 | [USB30_PRIM_GDSC] = &usb30_prim_gdsc, | 3737 | [USB30_PRIM_GDSC] = &usb30_prim_gdsc, |
| 3718 | [USB30_SEC_GDSC] = &usb30_sec_gdsc, | 3738 | [USB30_SEC_GDSC] = &usb30_sec_gdsc, |
| 3719 | }; | 3739 | }; |
| @@ -241,6 +241,8 @@ · 240 unmodified lines | |||
| 241 | #define GCC_USB_PHY_CFG_AHB2PHY_BCR 28 | 241 | #define GCC_USB_PHY_CFG_AHB2PHY_BCR 28 |
| 242 | 242 | ||
| 243 | /* GCC GDSCRs */ | 243 | /* GCC GDSCRs */ |
| 244 | #define PCIE_0_GDSC 0 | ||
| 245 | #define PCIE_1_GDSC 1 | ||
| 244 | #define USB30_PRIM_GDSC 4 | 246 | #define USB30_PRIM_GDSC 4 |
| 245 | #define USB30_SEC_GDSC 5 | 247 | #define USB30_SEC_GDSC 5 |
| 246 | 248 | ||