History

clk: qcom: gcc: Add PCIe0 and PCIe1 GDSC for SM8150

Add the PCIe0 and PCIe1 GDSC defines & driver structures for SM8150.

Bhupesh Sharma committed 4 years ago

Commit 2dc63e71 parent b5273582 files · +22 −0Browse files

Showing the changes to include (1 of 2 files). Show all

Unified · Split

include/dt-bindings/clock/qcom,gcc-sm8150.h+2−0
@@ -241,6 +241,8 @@ · 240 unmodified lines
241241 #define GCC_USB_PHY_CFG_AHB2PHY_BCR 28
242242
243243 /* GCC GDSCRs */
244+#define PCIE_0_GDSC 0
245+#define PCIE_1_GDSC 1
244246 #define USB30_PRIM_GDSC 4
245247 #define USB30_SEC_GDSC 5
246248

Keyboard shortcuts

General

Show keyboard shortcuts
?
Focus the current search
/

Issues and pull requests

Open filters
f

Issues, pull requests and Inbox

Select next item
j↓
Select previous item
k↑
Open selected item
Enter
Dismiss filters or clear selection
Esc

Repository code

Go to file
t