Merge drm/drm-next into drm-misc-next

Kickstart new drm-misc-next cycle.

Maxime Ripard committed 5 years ago

Commit 2f765202 parents 617d5b3 6880fa69850 files · +544816 −227932Browse files

Showing the changes to include/uapi (71 of 9850 files). Show all

Unified · Split

71 files

include/uapi/asm-generic/siginfo.h +5 −0
include/uapi/asm-generic/socket.h +2 −0
include/uapi/asm-generic/unistd.h +8 −6
include/uapi/drm/i915_drm.h +417 −81
include/uapi/drm/tegra_drm.h +402 −23
include/uapi/linux/bpf.h +114 −5
include/uapi/linux/btrfs.h +1 −0
include/uapi/linux/btrfs_tree.h +35 −0
include/uapi/linux/can/j1939.h +9 −0
include/uapi/linux/capability.h +0 −1
include/uapi/linux/cec.h +1 −1
include/uapi/linux/cxl_mem.h +1 −1
include/uapi/linux/dm-ioctl.h +6 −0
include/uapi/linux/dvb/audio.h +101 −0
include/uapi/linux/dvb/osd.h +181 −0
include/uapi/linux/dvb/video.h +220 −0
include/uapi/linux/ethtool.h +2 −0
include/uapi/linux/ethtool_netlink.h +2 −0
include/uapi/linux/fanotify.h +13 −0
include/uapi/linux/fs.h +1 −0
include/uapi/linux/idxd.h +25 −1
include/uapi/linux/if_arp.h +1 −0
include/uapi/linux/if_bridge.h +46 −0
include/uapi/linux/if_ether.h +3 −0
include/uapi/linux/if_link.h +13 −0
include/uapi/linux/in.h +32 −10
include/uapi/linux/in6.h +1 −0
include/uapi/linux/io_uring.h +18 −4
include/uapi/linux/ioam6.h +133 −0
include/uapi/linux/ioam6_genl.h +52 −0
include/uapi/linux/ioam6_iptunnel.h +20 −0
include/uapi/linux/ioprio.h +52 −0
include/uapi/linux/ipv6.h +3 −0
include/uapi/linux/ipx.h +0 −87
include/uapi/linux/kfd_ioctl.h +9 −7
include/uapi/linux/kvm.h +7 −4
include/uapi/linux/lightnvm.h +0 −224
include/uapi/linux/lwtunnel.h +1 −0
include/uapi/linux/mctp.h +36 −0
include/uapi/linux/mempolicy.h +1 −0
include/uapi/linux/mount.h +2 −1
include/uapi/linux/mptcp.h +1 −0
include/uapi/linux/neighbour.h +5 −2
include/uapi/linux/netfilter/nfnetlink_conntrack.h +2 −0
include/uapi/linux/netfilter/nfnetlink_hook.h +9 −0
include/uapi/linux/nfsd/nfsfh.h +0 −1
include/uapi/linux/nl80211-vnd-intel.h +77 −0
include/uapi/linux/nl80211.h +43 −0
include/uapi/linux/openvswitch.h +8 −0
include/uapi/linux/pkt_cls.h +1 −0
include/uapi/linux/pkt_sched.h +2 −0
include/uapi/linux/prctl.h +7 −5
include/uapi/linux/serial_reg.h +1 −0
include/uapi/linux/socket.h +5 −0
include/uapi/linux/target_core_user.h +2 −0
include/uapi/linux/tc_act/tc_skbmod.h +1 −0
include/uapi/linux/v4l2-controls.h +1 −0
include/uapi/linux/vduse.h +306 −0
include/uapi/linux/virtio_gpio.h +47 −0
include/uapi/linux/virtio_i2c.h +41 −0
include/uapi/linux/virtio_ids.h +12 −0
include/uapi/linux/virtio_pcidev.h +3 −2
include/uapi/linux/virtio_scmi.h +24 −0
include/uapi/linux/virtio_vsock.h +2 −1
include/uapi/linux/xfrm.h +11 −0
include/uapi/misc/habanalabs.h +166 −20
include/uapi/rdma/irdma-abi.h +1 −1
include/uapi/rdma/mlx5-abi.h +15 −2
include/uapi/scsi/fc/fc_els.h +106 −0
include/uapi/sound/asound.h +1 −0
include/uapi/sound/snd_sst_tokens.h +5 −1

@@ -29,6 +29,11 @@ typedef union sigval { · 28 unmodified lines
29	29	#define __ARCH_SI_ATTRIBUTES
30	30	#endif
31	31
	32	+/*
	33	+ * Be careful when extending this union. On 32bit siginfo_t is 32bit
	34	+ * aligned. Which means that a 64bit field or any other field that
	35	+ * would increase the alignment of siginfo_t will break the ABI.
	36	+ */
32	37	union __sifields {
33	38	/* kill() */
34	39	struct {

include/uapi/asm-generic/socket.h+2−0

@@ -124,6 +124,8 @@ · 123 unmodified lines
124	124
125	125	#define SO_NETNS_COOKIE 71
126	126
	127	+#define SO_BUF_LOCK 72
	128	+
127	129	#if !defined(__KERNEL__)
128	130
129	131	#if __BITS_PER_LONG == 64 \|\| (defined(__x86_64__) && defined(__ILP32__))

include/uapi/asm-generic/unistd.h+8−6

@@ -673,15 +673,15 @@ __SYSCALL(__NR_madvise, sys_madvise) · 672 unmodified lines
673	673	#define __NR_remap_file_pages 234
674	674	__SYSCALL(__NR_remap_file_pages, sys_remap_file_pages)
675	675	#define __NR_mbind 235
676		−__SC_COMP(__NR_mbind, sys_mbind, compat_sys_mbind)
	676	+__SYSCALL(__NR_mbind, sys_mbind)
677	677	#define __NR_get_mempolicy 236
678		−__SC_COMP(__NR_get_mempolicy, sys_get_mempolicy, compat_sys_get_mempolicy)
	678	+__SYSCALL(__NR_get_mempolicy, sys_get_mempolicy)
679	679	#define __NR_set_mempolicy 237
680		−__SC_COMP(__NR_set_mempolicy, sys_set_mempolicy, compat_sys_set_mempolicy)
	680	+__SYSCALL(__NR_set_mempolicy, sys_set_mempolicy)
681	681	#define __NR_migrate_pages 238
682		−__SC_COMP(__NR_migrate_pages, sys_migrate_pages, compat_sys_migrate_pages)
	682	+__SYSCALL(__NR_migrate_pages, sys_migrate_pages)
683	683	#define __NR_move_pages 239
684		−__SC_COMP(__NR_move_pages, sys_move_pages, compat_sys_move_pages)
	684	+__SYSCALL(__NR_move_pages, sys_move_pages)
685	685	#endif
686	686
687	687	#define __NR_rt_tgsigqueueinfo 240
@@ -877,9 +877,11 @@ __SYSCALL(__NR_landlock_restrict_self, sys_landlock_restrict_self) · 189 unmodified lines
877	877	#define __NR_memfd_secret 447
878	878	__SYSCALL(__NR_memfd_secret, sys_memfd_secret)
879	879	#endif
	880	+#define __NR_process_mrelease 448
	881	+__SYSCALL(__NR_process_mrelease, sys_process_mrelease)
880	882
881	883	#undef __NR_syscalls
882		−#define __NR_syscalls 448
	884	+#define __NR_syscalls 449
883	885
884	886	/*
885	887	* 32 bit systems traditionally used different

include/uapi/drm/i915_drm.h+417−81

@@ -572,6 +572,15 @@ typedef struct drm_i915_irq_wait { · 571 unmodified lines
572	572	#define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2)
573	573	#define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3)
574	574	#define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4)
	575	+/*
	576	+ * Indicates the 2k user priority levels are statically mapped into 3 buckets as
	577	+ * follows:
	578	+ *
	579	+ * -1k to -1 Low priority
	580	+ * 0 Normal priority
	581	+ * 1 to 1k Highest priority
	582	+ */
	583	+#define I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP (1ul << 5)
575	584
576	585	#define I915_PARAM_HUC_STATUS 42
577	586
@@ -674,6 +683,9 @@ typedef struct drm_i915_irq_wait { · 96 unmodified lines
674	683	*/
675	684	#define I915_PARAM_HAS_EXEC_TIMELINE_FENCES 55
676	685
	686	+/* Query if the kernel supports the I915_USERPTR_PROBE flag. */
	687	+#define I915_PARAM_HAS_USERPTR_PROBE 56
	688	+
677	689	/* Must be kept compact -- no holes and well documented */
678	690
679	691	typedef struct drm_i915_getparam {
@@ -849,45 +861,113 @@ struct drm_i915_gem_mmap_gtt { · 169 unmodified lines
849	861	__u64 offset;
850	862	};
851	863
	864	+/**
	865	+ * struct drm_i915_gem_mmap_offset - Retrieve an offset so we can mmap this buffer object.
	866	+ *
	867	+ * This struct is passed as argument to the `DRM_IOCTL_I915_GEM_MMAP_OFFSET` ioctl,
	868	+ * and is used to retrieve the fake offset to mmap an object specified by &handle.
	869	+ *
	870	+ * The legacy way of using `DRM_IOCTL_I915_GEM_MMAP` is removed on gen12+.
	871	+ * `DRM_IOCTL_I915_GEM_MMAP_GTT` is an older supported alias to this struct, but will behave
	872	+ * as setting the &extensions to 0, and &flags to `I915_MMAP_OFFSET_GTT`.
	873	+ */
852	874	struct drm_i915_gem_mmap_offset {
853		− /** Handle for the object being mapped. */
	875	+ /** @handle: Handle for the object being mapped. */
854	876	__u32 handle;
	877	+ /** @pad: Must be zero */
855	878	__u32 pad;
856	879	/**
857		− * Fake offset to use for subsequent mmap call
	880	+ * @offset: The fake offset to use for subsequent mmap call
858	881	*
859	882	* This is a fixed-size type for 32/64 compatibility.
860	883	*/
861	884	__u64 offset;
862	885
863	886	/**
864		− * Flags for extended behaviour.
	887	+ * @flags: Flags for extended behaviour.
	888	+ *
	889	+ * It is mandatory that one of the `MMAP_OFFSET` types
	890	+ * should be included:
865	891	*
866		− * It is mandatory that one of the MMAP_OFFSET types
867		− * (GTT, WC, WB, UC, etc) should be included.
	892	+ * - `I915_MMAP_OFFSET_GTT`: Use mmap with the object bound to GTT. (Write-Combined)
	893	+ * - `I915_MMAP_OFFSET_WC`: Use Write-Combined caching.
	894	+ * - `I915_MMAP_OFFSET_WB`: Use Write-Back caching.
	895	+ * - `I915_MMAP_OFFSET_FIXED`: Use object placement to determine caching.
	896	+ *
	897	+ * On devices with local memory `I915_MMAP_OFFSET_FIXED` is the only valid
	898	+ * type. On devices without local memory, this caching mode is invalid.
	899	+ *
	900	+ * As caching mode when specifying `I915_MMAP_OFFSET_FIXED`, WC or WB will
	901	+ * be used, depending on the object placement on creation. WB will be used
	902	+ * when the object can only exist in system memory, WC otherwise.
868	903	*/
869	904	__u64 flags;
870		−#define I915_MMAP_OFFSET_GTT 0
871		−#define I915_MMAP_OFFSET_WC 1
872		−#define I915_MMAP_OFFSET_WB 2
873		−#define I915_MMAP_OFFSET_UC 3
874	905
875		− /*
876		− * Zero-terminated chain of extensions.
	906	+#define I915_MMAP_OFFSET_GTT 0
	907	+#define I915_MMAP_OFFSET_WC 1
	908	+#define I915_MMAP_OFFSET_WB 2
	909	+#define I915_MMAP_OFFSET_UC 3
	910	+#define I915_MMAP_OFFSET_FIXED 4
	911	+
	912	+ /**
	913	+ * @extensions: Zero-terminated chain of extensions.
877	914	*
878	915	* No current extensions defined; mbz.
879	916	*/
880	917	__u64 extensions;
881	918	};
882	919
	920	+/**
	921	+ * struct drm_i915_gem_set_domain - Adjust the objects write or read domain, in
	922	+ * preparation for accessing the pages via some CPU domain.
	923	+ *
	924	+ * Specifying a new write or read domain will flush the object out of the
	925	+ * previous domain(if required), before then updating the objects domain
	926	+ * tracking with the new domain.
	927	+ *
	928	+ * Note this might involve waiting for the object first if it is still active on
	929	+ * the GPU.
	930	+ *
	931	+ * Supported values for @read_domains and @write_domain:
	932	+ *
	933	+ * - I915_GEM_DOMAIN_WC: Uncached write-combined domain
	934	+ * - I915_GEM_DOMAIN_CPU: CPU cache domain
	935	+ * - I915_GEM_DOMAIN_GTT: Mappable aperture domain
	936	+ *
	937	+ * All other domains are rejected.
	938	+ *
	939	+ * Note that for discrete, starting from DG1, this is no longer supported, and
	940	+ * is instead rejected. On such platforms the CPU domain is effectively static,
	941	+ * where we also only support a single &drm_i915_gem_mmap_offset cache mode,
	942	+ * which can't be set explicitly and instead depends on the object placements,
	943	+ * as per the below.
	944	+ *
	945	+ * Implicit caching rules, starting from DG1:
	946	+ *
	947	+ * - If any of the object placements (see &drm_i915_gem_create_ext_memory_regions)
	948	+ * contain I915_MEMORY_CLASS_DEVICE then the object will be allocated and
	949	+ * mapped as write-combined only.
	950	+ *
	951	+ * - Everything else is always allocated and mapped as write-back, with the
	952	+ * guarantee that everything is also coherent with the GPU.
	953	+ *
	954	+ * Note that this is likely to change in the future again, where we might need
	955	+ * more flexibility on future devices, so making this all explicit as part of a
	956	+ * new &drm_i915_gem_create_ext extension is probable.
	957	+ */
883	958	struct drm_i915_gem_set_domain {
884		− /** Handle for the object */
	959	+ /** @handle: Handle for the object. */
885	960	__u32 handle;
886	961
887		− /** New read domains */
	962	+ /** @read_domains: New read domains. */
888	963	__u32 read_domains;
889	964
890		− /** New write domain */
	965	+ /**
	966	+ * @write_domain: New write domain.
	967	+ *
	968	+ * Note that having something in the write domain implies it's in the
	969	+ * read domain, and only that read domain.
	970	+ */
891	971	__u32 write_domain;
892	972	};
893	973
@@ -1348,12 +1428,11 @@ struct drm_i915_gem_busy { · 454 unmodified lines
1348	1428	* reading from the object simultaneously.
1349	1429	*
1350	1430	* The value of each engine class is the same as specified in the
1351		− * I915_CONTEXT_SET_ENGINES parameter and via perf, i.e.
	1431	+ * I915_CONTEXT_PARAM_ENGINES context parameter and via perf, i.e.
1352	1432	* I915_ENGINE_CLASS_RENDER, I915_ENGINE_CLASS_COPY, etc.
1353		− * reported as active itself. Some hardware may have parallel
1354		− * execution engines, e.g. multiple media engines, which are
1355		− * mapped to the same class identifier and so are not separately
1356		− * reported for busyness.
	1433	+ * Some hardware may have parallel execution engines, e.g. multiple
	1434	+ * media engines, which are mapped to the same class identifier and so
	1435	+ * are not separately reported for busyness.
1357	1436	*
1358	1437	* Caveat emptor:
1359	1438	* Only the boolean result of this query is reliable; that is whether
@@ -1364,43 +1443,79 @@ struct drm_i915_gem_busy { · 4 unmodified lines
1364	1443	};
1365	1444
1366	1445	/**
1367		− * I915_CACHING_NONE
1368		− *
1369		− * GPU access is not coherent with cpu caches. Default for machines without an
1370		− * LLC.
1371		− */
1372		−#define I915_CACHING_NONE 0
1373		−/**
1374		− * I915_CACHING_CACHED
1375		− *
1376		− * GPU access is coherent with cpu caches and furthermore the data is cached in
1377		− * last-level caches shared between cpu cores and the gpu GT. Default on
1378		− * machines with HAS_LLC.
	1446	+ * struct drm_i915_gem_caching - Set or get the caching for given object
	1447	+ * handle.
	1448	+ *
	1449	+ * Allow userspace to control the GTT caching bits for a given object when the
	1450	+ * object is later mapped through the ppGTT(or GGTT on older platforms lacking
	1451	+ * ppGTT support, or if the object is used for scanout). Note that this might
	1452	+ * require unbinding the object from the GTT first, if its current caching value
	1453	+ * doesn't match.
	1454	+ *
	1455	+ * Note that this all changes on discrete platforms, starting from DG1, the
	1456	+ * set/get caching is no longer supported, and is now rejected. Instead the CPU
	1457	+ * caching attributes(WB vs WC) will become an immutable creation time property
	1458	+ * for the object, along with the GTT caching level. For now we don't expose any
	1459	+ * new uAPI for this, instead on DG1 this is all implicit, although this largely
	1460	+ * shouldn't matter since DG1 is coherent by default(without any way of
	1461	+ * controlling it).
	1462	+ *
	1463	+ * Implicit caching rules, starting from DG1:
	1464	+ *
	1465	+ * - If any of the object placements (see &drm_i915_gem_create_ext_memory_regions)
	1466	+ * contain I915_MEMORY_CLASS_DEVICE then the object will be allocated and
	1467	+ * mapped as write-combined only.
	1468	+ *
	1469	+ * - Everything else is always allocated and mapped as write-back, with the
	1470	+ * guarantee that everything is also coherent with the GPU.
	1471	+ *
	1472	+ * Note that this is likely to change in the future again, where we might need
	1473	+ * more flexibility on future devices, so making this all explicit as part of a
	1474	+ * new &drm_i915_gem_create_ext extension is probable.
	1475	+ *
	1476	+ * Side note: Part of the reason for this is that changing the at-allocation-time CPU
	1477	+ * caching attributes for the pages might be required(and is expensive) if we
	1478	+ * need to then CPU map the pages later with different caching attributes. This
	1479	+ * inconsistent caching behaviour, while supported on x86, is not universally
	1480	+ * supported on other architectures. So for simplicity we opt for setting
	1481	+ * everything at creation time, whilst also making it immutable, on discrete
	1482	+ * platforms.
1379	1483	*/
1380		−#define I915_CACHING_CACHED 1
1381		−/**
1382		− * I915_CACHING_DISPLAY
1383		− *
1384		− * Special GPU caching mode which is coherent with the scanout engines.
1385		− * Transparently falls back to I915_CACHING_NONE on platforms where no special
1386		− * cache mode (like write-through or gfdt flushing) is available. The kernel
1387		− * automatically sets this mode when using a buffer as a scanout target.
1388		− * Userspace can manually set this mode to avoid a costly stall and clflush in
1389		− * the hotpath of drawing the first frame.
1390		− */
1391		−#define I915_CACHING_DISPLAY 2
1392		−
1393	1484	struct drm_i915_gem_caching {
1394	1485	/**
1395		− * Handle of the buffer to set/get the caching level of. */
	1486	+ * @handle: Handle of the buffer to set/get the caching level.
	1487	+ */
1396	1488	__u32 handle;
1397	1489
1398	1490	/**
1399		− * Cacheing level to apply or return value
	1491	+ * @caching: The GTT caching level to apply or possible return value.
	1492	+ *
	1493	+ * The supported @caching values:
1400	1494	*
1401		− * bits0-15 are for generic caching control (i.e. the above defined
1402		− * values). bits16-31 are reserved for platform-specific variations
1403		− * (e.g. l3$ caching on gen7). */
	1495	+ * I915_CACHING_NONE:
	1496	+ *
	1497	+ * GPU access is not coherent with CPU caches. Default for machines
	1498	+ * without an LLC. This means manual flushing might be needed, if we
	1499	+ * want GPU access to be coherent.
	1500	+ *
	1501	+ * I915_CACHING_CACHED:
	1502	+ *
	1503	+ * GPU access is coherent with CPU caches and furthermore the data is
	1504	+ * cached in last-level caches shared between CPU cores and the GPU GT.
	1505	+ *
	1506	+ * I915_CACHING_DISPLAY:
	1507	+ *
	1508	+ * Special GPU caching mode which is coherent with the scanout engines.
	1509	+ * Transparently falls back to I915_CACHING_NONE on platforms where no
	1510	+ * special cache mode (like write-through or gfdt flushing) is
	1511	+ * available. The kernel automatically sets this mode when using a
	1512	+ * buffer as a scanout target. Userspace can manually set this mode to
	1513	+ * avoid a costly stall and clflush in the hotpath of drawing the first
	1514	+ * frame.
	1515	+ */
	1516	+#define I915_CACHING_NONE 0
	1517	+#define I915_CACHING_CACHED 1
	1518	+#define I915_CACHING_DISPLAY 2
1404	1519	__u32 caching;
1405	1520	};
1406	1521
@@ -1639,6 +1754,10 @@ struct drm_i915_gem_context_param { · 232 unmodified lines
1639	1754	__u32 size;
1640	1755	__u64 param;
1641	1756	#define I915_CONTEXT_PARAM_BAN_PERIOD 0x1
	1757	+/* I915_CONTEXT_PARAM_NO_ZEROMAP has been removed. On the off chance
	1758	+ * someone somewhere has attempted to use it, never re-use this context
	1759	+ * param number.
	1760	+ */
1642	1761	#define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2
1643	1762	#define I915_CONTEXT_PARAM_GTT_SIZE 0x3
1644	1763	#define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4
@@ -1723,24 +1842,8 @@ struct drm_i915_gem_context_param { · 78 unmodified lines
1723	1842	*/
1724	1843	#define I915_CONTEXT_PARAM_PERSISTENCE 0xb
1725	1844
1726		−/*
1727		− * I915_CONTEXT_PARAM_RINGSIZE:
1728		− *
1729		− * Sets the size of the CS ringbuffer to use for logical ring contexts. This
1730		− * applies a limit of how many batches can be queued to HW before the caller
1731		− * is blocked due to lack of space for more commands.
1732		− *
1733		− * Only reliably possible to be set prior to first use, i.e. during
1734		− * construction. At any later point, the current execution must be flushed as
1735		− * the ring can only be changed while the context is idle. Note, the ringsize
1736		− * can be specified as a constructor property, see
1737		− * I915_CONTEXT_CREATE_EXT_SETPARAM, but can also be set later if required.
1738		− *
1739		− * Only applies to the current set of engine and lost when those engines
1740		− * are replaced by a new mapping (see I915_CONTEXT_PARAM_ENGINES).
1741		− *
1742		− * Must be between 4 - 512 KiB, in intervals of page size [4 KiB].
1743		− * Default is 16 KiB.
	1845	+/* This API has been removed. On the off chance someone somewhere has
	1846	+ * attempted to use it, never re-use this context param number.
1744	1847	*/
1745	1848	#define I915_CONTEXT_PARAM_RINGSIZE 0xc
1746	1849	/* Must be kept compact -- no holes and well documented */
@@ -1807,6 +1910,69 @@ struct drm_i915_gem_context_param_sseu { · 60 unmodified lines
1807	1910	__u32 rsvd;
1808	1911	};
1809	1912
	1913	+/**
	1914	+ * DOC: Virtual Engine uAPI
	1915	+ *
	1916	+ * Virtual engine is a concept where userspace is able to configure a set of
	1917	+ * physical engines, submit a batch buffer, and let the driver execute it on any
	1918	+ * engine from the set as it sees fit.
	1919	+ *
	1920	+ * This is primarily useful on parts which have multiple instances of a same
	1921	+ * class engine, like for example GT3+ Skylake parts with their two VCS engines.
	1922	+ *
	1923	+ * For instance userspace can enumerate all engines of a certain class using the
	1924	+ * previously described `Engine Discovery uAPI`_. After that userspace can
	1925	+ * create a GEM context with a placeholder slot for the virtual engine (using
	1926	+ * `I915_ENGINE_CLASS_INVALID` and `I915_ENGINE_CLASS_INVALID_NONE` for class
	1927	+ * and instance respectively) and finally using the
	1928	+ * `I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE` extension place a virtual engine in
	1929	+ * the same reserved slot.
	1930	+ *
	1931	+ * Example of creating a virtual engine and submitting a batch buffer to it:
	1932	+ *
	1933	+ * .. code-block:: C
	1934	+ *
	1935	+ * I915_DEFINE_CONTEXT_ENGINES_LOAD_BALANCE(virtual, 2) = {
	1936	+ * .base.name = I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE,
	1937	+ * .engine_index = 0, // Place this virtual engine into engine map slot 0
	1938	+ * .num_siblings = 2,
	1939	+ * .engines = { { I915_ENGINE_CLASS_VIDEO, 0 },
	1940	+ * { I915_ENGINE_CLASS_VIDEO, 1 }, },
	1941	+ * };
	1942	+ * I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 1) = {
	1943	+ * .engines = { { I915_ENGINE_CLASS_INVALID,
	1944	+ * I915_ENGINE_CLASS_INVALID_NONE } },
	1945	+ * .extensions = to_user_pointer(&virtual), // Chains after load_balance extension
	1946	+ * };
	1947	+ * struct drm_i915_gem_context_create_ext_setparam p_engines = {
	1948	+ * .base = {
	1949	+ * .name = I915_CONTEXT_CREATE_EXT_SETPARAM,
	1950	+ * },
	1951	+ * .param = {
	1952	+ * .param = I915_CONTEXT_PARAM_ENGINES,
	1953	+ * .value = to_user_pointer(&engines),
	1954	+ * .size = sizeof(engines),
	1955	+ * },
	1956	+ * };
	1957	+ * struct drm_i915_gem_context_create_ext create = {
	1958	+ * .flags = I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS,
	1959	+ * .extensions = to_user_pointer(&p_engines);
	1960	+ * };
	1961	+ *
	1962	+ * ctx_id = gem_context_create_ext(drm_fd, &create);
	1963	+ *
	1964	+ * // Now we have created a GEM context with its engine map containing a
	1965	+ * // single virtual engine. Submissions to this slot can go either to
	1966	+ * // vcs0 or vcs1, depending on the load balancing algorithm used inside
	1967	+ * // the driver. The load balancing is dynamic from one batch buffer to
	1968	+ * // another and transparent to userspace.
	1969	+ *
	1970	+ * ...
	1971	+ * execbuf.rsvd1 = ctx_id;
	1972	+ * execbuf.flags = 0; // Submits to index 0 which is the virtual engine
	1973	+ * gem_execbuf(drm_fd, &execbuf);
	1974	+ */
	1975	+
1810	1976	/*
1811	1977	* i915_context_engines_load_balance:
1812	1978	*
@@ -1883,6 +2049,61 @@ struct i915_context_engines_bond { · 70 unmodified lines
1883	2049	struct i915_engine_class_instance engines[N__]; \
1884	2050	} __attribute__((packed)) name__
1885	2051
	2052	+/**
	2053	+ * DOC: Context Engine Map uAPI
	2054	+ *
	2055	+ * Context engine map is a new way of addressing engines when submitting batch-
	2056	+ * buffers, replacing the existing way of using identifiers like `I915_EXEC_BLT`
	2057	+ * inside the flags field of `struct drm_i915_gem_execbuffer2`.
	2058	+ *
	2059	+ * To use it created GEM contexts need to be configured with a list of engines
	2060	+ * the user is intending to submit to. This is accomplished using the
	2061	+ * `I915_CONTEXT_PARAM_ENGINES` parameter and `struct
	2062	+ * i915_context_param_engines`.
	2063	+ *
	2064	+ * For such contexts the `I915_EXEC_RING_MASK` field becomes an index into the
	2065	+ * configured map.
	2066	+ *
	2067	+ * Example of creating such context and submitting against it:
	2068	+ *
	2069	+ * .. code-block:: C
	2070	+ *
	2071	+ * I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 2) = {
	2072	+ * .engines = { { I915_ENGINE_CLASS_RENDER, 0 },
	2073	+ * { I915_ENGINE_CLASS_COPY, 0 } }
	2074	+ * };
	2075	+ * struct drm_i915_gem_context_create_ext_setparam p_engines = {
	2076	+ * .base = {
	2077	+ * .name = I915_CONTEXT_CREATE_EXT_SETPARAM,
	2078	+ * },
	2079	+ * .param = {
	2080	+ * .param = I915_CONTEXT_PARAM_ENGINES,
	2081	+ * .value = to_user_pointer(&engines),
	2082	+ * .size = sizeof(engines),
	2083	+ * },
	2084	+ * };
	2085	+ * struct drm_i915_gem_context_create_ext create = {
	2086	+ * .flags = I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS,
	2087	+ * .extensions = to_user_pointer(&p_engines);
	2088	+ * };
	2089	+ *
	2090	+ * ctx_id = gem_context_create_ext(drm_fd, &create);
	2091	+ *
	2092	+ * // We have now created a GEM context with two engines in the map:
	2093	+ * // Index 0 points to rcs0 while index 1 points to bcs0. Other engines
	2094	+ * // will not be accessible from this context.
	2095	+ *
	2096	+ * ...
	2097	+ * execbuf.rsvd1 = ctx_id;
	2098	+ * execbuf.flags = 0; // Submits to index 0, which is rcs0 for this context
	2099	+ * gem_execbuf(drm_fd, &execbuf);
	2100	+ *
	2101	+ * ...
	2102	+ * execbuf.rsvd1 = ctx_id;
	2103	+ * execbuf.flags = 1; // Submits to index 0, which is bcs0 for this context
	2104	+ * gem_execbuf(drm_fd, &execbuf);
	2105	+ */
	2106	+
1886	2107	struct i915_context_param_engines {
1887	2108	__u64 extensions; /* linked chain of extension blocks, 0 terminates */
1888	2109	#define I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE 0 /* see i915_context_engines_load_balance */
@@ -1901,20 +2122,10 @@ struct drm_i915_gem_context_create_ext_setparam { · 12 unmodified lines
1901	2122	struct drm_i915_gem_context_param param;
1902	2123	};
1903	2124
1904		−struct drm_i915_gem_context_create_ext_clone {
	2125	+/* This API has been removed. On the off chance someone somewhere has
	2126	+ * attempted to use it, never re-use this extension number.
	2127	+ */
1905	2128	#define I915_CONTEXT_CREATE_EXT_CLONE 1
1906		− struct i915_user_extension base;
1907		− __u32 clone_id;
1908		− __u32 flags;
1909		−#define I915_CONTEXT_CLONE_ENGINES (1u << 0)
1910		−#define I915_CONTEXT_CLONE_FLAGS (1u << 1)
1911		−#define I915_CONTEXT_CLONE_SCHEDATTR (1u << 2)
1912		−#define I915_CONTEXT_CLONE_SSEU (1u << 3)
1913		−#define I915_CONTEXT_CLONE_TIMELINE (1u << 4)
1914		−#define I915_CONTEXT_CLONE_VM (1u << 5)
1915		−#define I915_CONTEXT_CLONE_UNKNOWN -(I915_CONTEXT_CLONE_VM << 1)
1916		− __u64 rsvd;
1917		−};
1918	2129
1919	2130	struct drm_i915_gem_context_destroy {
1920	2131	__u32 ctx_id;
@@ -1986,14 +2197,69 @@ struct drm_i915_reset_stats { · 65 unmodified lines
1986	2197	__u32 pad;
1987	2198	};
1988	2199
	2200	+/**
	2201	+ * struct drm_i915_gem_userptr - Create GEM object from user allocated memory.
	2202	+ *
	2203	+ * Userptr objects have several restrictions on what ioctls can be used with the
	2204	+ * object handle.
	2205	+ */
1989	2206	struct drm_i915_gem_userptr {
	2207	+ /**
	2208	+ * @user_ptr: The pointer to the allocated memory.
	2209	+ *
	2210	+ * Needs to be aligned to PAGE_SIZE.
	2211	+ */
1990	2212	__u64 user_ptr;
	2213	+
	2214	+ /**
	2215	+ * @user_size:
	2216	+ *
	2217	+ * The size in bytes for the allocated memory. This will also become the
	2218	+ * object size.
	2219	+ *
	2220	+ * Needs to be aligned to PAGE_SIZE, and should be at least PAGE_SIZE,
	2221	+ * or larger.
	2222	+ */
1991	2223	__u64 user_size;
	2224	+
	2225	+ /**
	2226	+ * @flags:
	2227	+ *
	2228	+ * Supported flags:
	2229	+ *
	2230	+ * I915_USERPTR_READ_ONLY:
	2231	+ *
	2232	+ * Mark the object as readonly, this also means GPU access can only be
	2233	+ * readonly. This is only supported on HW which supports readonly access
	2234	+ * through the GTT. If the HW can't support readonly access, an error is
	2235	+ * returned.
	2236	+ *
	2237	+ * I915_USERPTR_PROBE:
	2238	+ *
	2239	+ * Probe the provided @user_ptr range and validate that the @user_ptr is
	2240	+ * indeed pointing to normal memory and that the range is also valid.
	2241	+ * For example if some garbage address is given to the kernel, then this
	2242	+ * should complain.
	2243	+ *
	2244	+ * Returns -EFAULT if the probe failed.
	2245	+ *
	2246	+ * Note that this doesn't populate the backing pages, and also doesn't
	2247	+ * guarantee that the object will remain valid when the object is
	2248	+ * eventually used.
	2249	+ *
	2250	+ * The kernel supports this feature if I915_PARAM_HAS_USERPTR_PROBE
	2251	+ * returns a non-zero value.
	2252	+ *
	2253	+ * I915_USERPTR_UNSYNCHRONIZED:
	2254	+ *
	2255	+ * NOT USED. Setting this flag will result in an error.
	2256	+ */
1992	2257	__u32 flags;
1993	2258	#define I915_USERPTR_READ_ONLY 0x1
	2259	+#define I915_USERPTR_PROBE 0x2
1994	2260	#define I915_USERPTR_UNSYNCHRONIZED 0x80000000
1995	2261	/**
1996		− * Returned handle for the object.
	2262	+ * @handle: Returned handle for the object.
1997	2263	*
1998	2264	* Object handles are nonzero.
1999	2265	*/
@@ -2376,6 +2642,76 @@ struct drm_i915_query_topology_info { · 376 unmodified lines
2376	2642	__u8 data[];
2377	2643	};
2378	2644
	2645	+/**
	2646	+ * DOC: Engine Discovery uAPI
	2647	+ *
	2648	+ * Engine discovery uAPI is a way of enumerating physical engines present in a
	2649	+ * GPU associated with an open i915 DRM file descriptor. This supersedes the old
	2650	+ * way of using `DRM_IOCTL_I915_GETPARAM` and engine identifiers like
	2651	+ * `I915_PARAM_HAS_BLT`.
	2652	+ *
	2653	+ * The need for this interface came starting with Icelake and newer GPUs, which
	2654	+ * started to establish a pattern of having multiple engines of a same class,
	2655	+ * where not all instances were always completely functionally equivalent.
	2656	+ *
	2657	+ * Entry point for this uapi is `DRM_IOCTL_I915_QUERY` with the
	2658	+ * `DRM_I915_QUERY_ENGINE_INFO` as the queried item id.
	2659	+ *
	2660	+ * Example for getting the list of engines:
	2661	+ *
	2662	+ * .. code-block:: C
	2663	+ *
	2664	+ * struct drm_i915_query_engine_info *info;
	2665	+ * struct drm_i915_query_item item = {
	2666	+ * .query_id = DRM_I915_QUERY_ENGINE_INFO;
	2667	+ * };
	2668	+ * struct drm_i915_query query = {
	2669	+ * .num_items = 1,
	2670	+ * .items_ptr = (uintptr_t)&item,
	2671	+ * };
	2672	+ * int err, i;
	2673	+ *
	2674	+ * // First query the size of the blob we need, this needs to be large
	2675	+ * // enough to hold our array of engines. The kernel will fill out the
	2676	+ * // item.length for us, which is the number of bytes we need.
	2677	+ * //
	2678	+ * // Alternatively a large buffer can be allocated straight away enabling
	2679	+ * // querying in one pass, in which case item.length should contain the
	2680	+ * // length of the provided buffer.
	2681	+ * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
	2682	+ * if (err) ...
	2683	+ *
	2684	+ * info = calloc(1, item.length);
	2685	+ * // Now that we allocated the required number of bytes, we call the ioctl
	2686	+ * // again, this time with the data_ptr pointing to our newly allocated
	2687	+ * // blob, which the kernel can then populate with info on all engines.
	2688	+ * item.data_ptr = (uintptr_t)&info,
	2689	+ *
	2690	+ * err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
	2691	+ * if (err) ...
	2692	+ *
	2693	+ * // We can now access each engine in the array
	2694	+ * for (i = 0; i < info->num_engines; i++) {
	2695	+ * struct drm_i915_engine_info einfo = info->engines[i];
	2696	+ * u16 class = einfo.engine.class;
	2697	+ * u16 instance = einfo.engine.instance;
	2698	+ * ....
	2699	+ * }
	2700	+ *
	2701	+ * free(info);
	2702	+ *
	2703	+ * Each of the enumerated engines, apart from being defined by its class and
	2704	+ * instance (see `struct i915_engine_class_instance`), also can have flags and
	2705	+ * capabilities defined as documented in i915_drm.h.
	2706	+ *
	2707	+ * For instance video engines which support HEVC encoding will have the
	2708	+ * `I915_VIDEO_CLASS_CAPABILITY_HEVC` capability bit set.
	2709	+ *
	2710	+ * Engine discovery only fully comes to its own when combined with the new way
	2711	+ * of addressing engines when submitting batch buffers using contexts with
	2712	+ * engine maps configured.
	2713	+ */
	2714	+
2379	2715	/**
2380	2716	* struct drm_i915_engine_info
2381	2717	*

include/uapi/drm/tegra_drm.h+402−23

@@ -1,24 +1,5 @@
1		−/*
2		− * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
3		− *
4		− * Permission is hereby granted, free of charge, to any person obtaining a
5		− * copy of this software and associated documentation files (the "Software"),
6		− * to deal in the Software without restriction, including without limitation
7		− * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8		− * and/or sell copies of the Software, and to permit persons to whom the
9		− * Software is furnished to do so, subject to the following conditions:
10		− *
11		− * The above copyright notice and this permission notice shall be included in
12		− * all copies or substantial portions of the Software.
13		− *
14		− * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15		− * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16		− * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17		− * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18		− * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19		− * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20		− * OTHER DEALINGS IN THE SOFTWARE.
21		− */
	1	+/* SPDX-License-Identifier: MIT */
	2	+/* Copyright (c) 2012-2020 NVIDIA Corporation */
22	3
23	4	#ifndef _UAPI_TEGRA_DRM_H_
24	5	#define _UAPI_TEGRA_DRM_H_
@@ -29,6 +10,8 @@ · 4 unmodified lines
29	10	extern "C" {
30	11	#endif
31	12
	13	+/* Tegra DRM legacy UAPI. Only enabled with STAGING */
	14	+
32	15	#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)
33	16	#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
34	17
@@ -649,8 +632,8 @@ struct drm_tegra_gem_get_flags { · 614 unmodified lines
649	632	#define DRM_TEGRA_SYNCPT_READ 0x02
650	633	#define DRM_TEGRA_SYNCPT_INCR 0x03
651	634	#define DRM_TEGRA_SYNCPT_WAIT 0x04
652		−#define DRM_TEGRA_OPEN_CHANNEL 0x05
653		−#define DRM_TEGRA_CLOSE_CHANNEL 0x06
	635	+#define DRM_TEGRA_OPEN_CHANNEL 0x05
	636	+#define DRM_TEGRA_CLOSE_CHANNEL 0x06
654	637	#define DRM_TEGRA_GET_SYNCPT 0x07
655	638	#define DRM_TEGRA_SUBMIT 0x08
656	639	#define DRM_TEGRA_GET_SYNCPT_BASE 0x09
@@ -674,6 +657,402 @@ struct drm_tegra_gem_get_flags { · 17 unmodified lines
674	657	#define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags)
675	658	#define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags)
676	659
	660	+/* New Tegra DRM UAPI */
	661	+
	662	+/*
	663	+ * Reported by the driver in the `capabilities` field.
	664	+ *
	665	+ * DRM_TEGRA_CHANNEL_CAP_CACHE_COHERENT: If set, the engine is cache coherent
	666	+ * with regard to the system memory.
	667	+ */
	668	+#define DRM_TEGRA_CHANNEL_CAP_CACHE_COHERENT (1 << 0)
	669	+
	670	+struct drm_tegra_channel_open {
	671	+ /**
	672	+ * @host1x_class: [in]
	673	+ *
	674	+ * Host1x class of the engine that will be programmed using this
	675	+ * channel.
	676	+ */
	677	+ __u32 host1x_class;
	678	+
	679	+ /**
	680	+ * @flags: [in]
	681	+ *
	682	+ * Flags.
	683	+ */
	684	+ __u32 flags;
	685	+
	686	+ /**
	687	+ * @context: [out]
	688	+ *
	689	+ * Opaque identifier corresponding to the opened channel.
	690	+ */
	691	+ __u32 context;
	692	+
	693	+ /**
	694	+ * @version: [out]
	695	+ *
	696	+ * Version of the engine hardware. This can be used by userspace
	697	+ * to determine how the engine needs to be programmed.
	698	+ */
	699	+ __u32 version;
	700	+
	701	+ /**
	702	+ * @capabilities: [out]
	703	+ *
	704	+ * Flags describing the hardware capabilities.
	705	+ */
	706	+ __u32 capabilities;
	707	+ __u32 padding;
	708	+};
	709	+
	710	+struct drm_tegra_channel_close {
	711	+ /**
	712	+ * @context: [in]
	713	+ *
	714	+ * Identifier of the channel to close.
	715	+ */
	716	+ __u32 context;
	717	+ __u32 padding;
	718	+};
	719	+
	720	+/*
	721	+ * Mapping flags that can be used to influence how the mapping is created.
	722	+ *
	723	+ * DRM_TEGRA_CHANNEL_MAP_READ: create mapping that allows HW read access
	724	+ * DRM_TEGRA_CHANNEL_MAP_WRITE: create mapping that allows HW write access
	725	+ */
	726	+#define DRM_TEGRA_CHANNEL_MAP_READ (1 << 0)
	727	+#define DRM_TEGRA_CHANNEL_MAP_WRITE (1 << 1)
	728	+#define DRM_TEGRA_CHANNEL_MAP_READ_WRITE (DRM_TEGRA_CHANNEL_MAP_READ \| \
	729	+ DRM_TEGRA_CHANNEL_MAP_WRITE)
	730	+
	731	+struct drm_tegra_channel_map {
	732	+ /**
	733	+ * @context: [in]
	734	+ *
	735	+ * Identifier of the channel to which make memory available for.
	736	+ */
	737	+ __u32 context;
	738	+
	739	+ /**
	740	+ * @handle: [in]
	741	+ *
	742	+ * GEM handle of the memory to map.
	743	+ */
	744	+ __u32 handle;
	745	+
	746	+ /**
	747	+ * @flags: [in]
	748	+ *
	749	+ * Flags.
	750	+ */
	751	+ __u32 flags;
	752	+
	753	+ /**
	754	+ * @mapping: [out]
	755	+ *
	756	+ * Identifier corresponding to the mapping, to be used for
	757	+ * relocations or unmapping later.
	758	+ */
	759	+ __u32 mapping;
	760	+};
	761	+
	762	+struct drm_tegra_channel_unmap {
	763	+ /**
	764	+ * @context: [in]
	765	+ *
	766	+ * Channel identifier of the channel to unmap memory from.
	767	+ */
	768	+ __u32 context;
	769	+
	770	+ /**
	771	+ * @mapping: [in]
	772	+ *
	773	+ * Mapping identifier of the memory mapping to unmap.
	774	+ */
	775	+ __u32 mapping;
	776	+};
	777	+
	778	+/* Submission */
	779	+
	780	+/**
	781	+ * Specify that bit 39 of the patched-in address should be set to switch
	782	+ * swizzling between Tegra and non-Tegra sector layout on systems that store
	783	+ * surfaces in system memory in non-Tegra sector layout.
	784	+ */
	785	+#define DRM_TEGRA_SUBMIT_RELOC_SECTOR_LAYOUT (1 << 0)
	786	+
	787	+struct drm_tegra_submit_buf {
	788	+ /**
	789	+ * @mapping: [in]
	790	+ *
	791	+ * Identifier of the mapping to use in the submission.
	792	+ */
	793	+ __u32 mapping;
	794	+
	795	+ /**
	796	+ * @flags: [in]
	797	+ *
	798	+ * Flags.
	799	+ */
	800	+ __u32 flags;
	801	+
	802	+ /**
	803	+ * Information for relocation patching.
	804	+ */
	805	+ struct {
	806	+ /**
	807	+ * @target_offset: [in]
	808	+ *
	809	+ * Offset from the start of the mapping of the data whose
	810	+ * address is to be patched into the gather.
	811	+ */
	812	+ __u64 target_offset;
	813	+
	814	+ /**
	815	+ * @gather_offset_words: [in]
	816	+ *
	817	+ * Offset in words from the start of the gather data to
	818	+ * where the address should be patched into.
	819	+ */
	820	+ __u32 gather_offset_words;
	821	+
	822	+ /**
	823	+ * @shift: [in]
	824	+ *
	825	+ * Number of bits the address should be shifted right before
	826	+ * patching in.
	827	+ */
	828	+ __u32 shift;
	829	+ } reloc;
	830	+};
	831	+
	832	+/**
	833	+ * Execute `words` words of Host1x opcodes specified in the `gather_data_ptr`
	834	+ * buffer. Each GATHER_UPTR command uses successive words from the buffer.
	835	+ */
	836	+#define DRM_TEGRA_SUBMIT_CMD_GATHER_UPTR 0
	837	+/**
	838	+ * Wait for a syncpoint to reach a value before continuing with further
	839	+ * commands.
	840	+ */
	841	+#define DRM_TEGRA_SUBMIT_CMD_WAIT_SYNCPT 1
	842	+/**
	843	+ * Wait for a syncpoint to reach a value before continuing with further
	844	+ * commands. The threshold is calculated relative to the start of the job.
	845	+ */
	846	+#define DRM_TEGRA_SUBMIT_CMD_WAIT_SYNCPT_RELATIVE 2
	847	+
	848	+struct drm_tegra_submit_cmd_gather_uptr {
	849	+ __u32 words;
	850	+ __u32 reserved[3];
	851	+};
	852	+
	853	+struct drm_tegra_submit_cmd_wait_syncpt {
	854	+ __u32 id;
	855	+ __u32 value;
	856	+ __u32 reserved[2];
	857	+};
	858	+
	859	+struct drm_tegra_submit_cmd {
	860	+ /**
	861	+ * @type: [in]
	862	+ *
	863	+ * Command type to execute. One of the DRM_TEGRA_SUBMIT_CMD*
	864	+ * defines.
	865	+ */
	866	+ __u32 type;
	867	+
	868	+ /**
	869	+ * @flags: [in]
	870	+ *
	871	+ * Flags.
	872	+ */
	873	+ __u32 flags;
	874	+
	875	+ union {
	876	+ struct drm_tegra_submit_cmd_gather_uptr gather_uptr;
	877	+ struct drm_tegra_submit_cmd_wait_syncpt wait_syncpt;
	878	+ __u32 reserved[4];
	879	+ };
	880	+};
	881	+
	882	+struct drm_tegra_submit_syncpt {
	883	+ /**
	884	+ * @id: [in]
	885	+ *
	886	+ * ID of the syncpoint that the job will increment.
	887	+ */
	888	+ __u32 id;
	889	+
	890	+ /**
	891	+ * @flags: [in]
	892	+ *
	893	+ * Flags.
	894	+ */
	895	+ __u32 flags;
	896	+
	897	+ /**
	898	+ * @increments: [in]
	899	+ *
	900	+ * Number of times the job will increment this syncpoint.
	901	+ */
	902	+ __u32 increments;
	903	+
	904	+ /**
	905	+ * @value: [out]
	906	+ *
	907	+ * Value the syncpoint will have once the job has completed all
	908	+ * its specified syncpoint increments.
	909	+ *
	910	+ * Note that the kernel may increment the syncpoint before or after
	911	+ * the job. These increments are not reflected in this field.
	912	+ *
	913	+ * If the job hangs or times out, not all of the increments may
	914	+ * get executed.
	915	+ */
	916	+ __u32 value;
	917	+};
	918	+
	919	+struct drm_tegra_channel_submit {
	920	+ /**
	921	+ * @context: [in]
	922	+ *
	923	+ * Identifier of the channel to submit this job to.
	924	+ */
	925	+ __u32 context;
	926	+
	927	+ /**
	928	+ * @num_bufs: [in]
	929	+ *
	930	+ * Number of elements in the `bufs_ptr` array.
	931	+ */
	932	+ __u32 num_bufs;
	933	+
	934	+ /**
	935	+ * @num_cmds: [in]
	936	+ *
	937	+ * Number of elements in the `cmds_ptr` array.
	938	+ */
	939	+ __u32 num_cmds;
	940	+
	941	+ /**
	942	+ * @gather_data_words: [in]
	943	+ *
	944	+ * Number of 32-bit words in the `gather_data_ptr` array.
	945	+ */
	946	+ __u32 gather_data_words;
	947	+
	948	+ /**
	949	+ * @bufs_ptr: [in]
	950	+ *
	951	+ * Pointer to an array of drm_tegra_submit_buf structures.
	952	+ */
	953	+ __u64 bufs_ptr;
	954	+
	955	+ /**
	956	+ * @cmds_ptr: [in]
	957	+ *
	958	+ * Pointer to an array of drm_tegra_submit_cmd structures.
	959	+ */
	960	+ __u64 cmds_ptr;
	961	+
	962	+ /**
	963	+ * @gather_data_ptr: [in]
	964	+ *
	965	+ * Pointer to an array of Host1x opcodes to be used by GATHER_UPTR
	966	+ * commands.
	967	+ */
	968	+ __u64 gather_data_ptr;
	969	+
	970	+ /**
	971	+ * @syncobj_in: [in]
	972	+ *
	973	+ * Handle for DRM syncobj that will be waited before submission.
	974	+ * Ignored if zero.
	975	+ */
	976	+ __u32 syncobj_in;
	977	+
	978	+ /**
	979	+ * @syncobj_out: [in]
	980	+ *
	981	+ * Handle for DRM syncobj that will have its fence replaced with
	982	+ * the job's completion fence. Ignored if zero.
	983	+ */
	984	+ __u32 syncobj_out;
	985	+
	986	+ /**
	987	+ * @syncpt_incr: [in,out]
	988	+ *
	989	+ * Information about the syncpoint the job will increment.
	990	+ */
	991	+ struct drm_tegra_submit_syncpt syncpt;
	992	+};
	993	+
	994	+struct drm_tegra_syncpoint_allocate {
	995	+ /**
	996	+ * @id: [out]
	997	+ *
	998	+ * ID of allocated syncpoint.
	999	+ */
	1000	+ __u32 id;
	1001	+ __u32 padding;
	1002	+};
	1003	+
	1004	+struct drm_tegra_syncpoint_free {
	1005	+ /**
	1006	+ * @id: [in]
	1007	+ *
	1008	+ * ID of syncpoint to free.
	1009	+ */
	1010	+ __u32 id;
	1011	+ __u32 padding;
	1012	+};
	1013	+
	1014	+struct drm_tegra_syncpoint_wait {
	1015	+ /**
	1016	+ * @timeout: [in]
	1017	+ *
	1018	+ * Absolute timestamp at which the wait will time out.
	1019	+ */
	1020	+ __s64 timeout_ns;
	1021	+
	1022	+ /**
	1023	+ * @id: [in]
	1024	+ *
	1025	+ * ID of syncpoint to wait on.
	1026	+ */
	1027	+ __u32 id;
	1028	+
	1029	+ /**
	1030	+ * @threshold: [in]
	1031	+ *
	1032	+ * Threshold to wait for.
	1033	+ */
	1034	+ __u32 threshold;
	1035	+
	1036	+ /**
	1037	+ * @value: [out]
	1038	+ *
	1039	+ * Value of the syncpoint upon wait completion.
	1040	+ */
	1041	+ __u32 value;
	1042	+
	1043	+ __u32 padding;
	1044	+};
	1045	+
	1046	+#define DRM_IOCTL_TEGRA_CHANNEL_OPEN DRM_IOWR(DRM_COMMAND_BASE + 0x10, struct drm_tegra_channel_open)
	1047	+#define DRM_IOCTL_TEGRA_CHANNEL_CLOSE DRM_IOWR(DRM_COMMAND_BASE + 0x11, struct drm_tegra_channel_close)
	1048	+#define DRM_IOCTL_TEGRA_CHANNEL_MAP DRM_IOWR(DRM_COMMAND_BASE + 0x12, struct drm_tegra_channel_map)
	1049	+#define DRM_IOCTL_TEGRA_CHANNEL_UNMAP DRM_IOWR(DRM_COMMAND_BASE + 0x13, struct drm_tegra_channel_unmap)
	1050	+#define DRM_IOCTL_TEGRA_CHANNEL_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + 0x14, struct drm_tegra_channel_submit)
	1051	+
	1052	+#define DRM_IOCTL_TEGRA_SYNCPOINT_ALLOCATE DRM_IOWR(DRM_COMMAND_BASE + 0x20, struct drm_tegra_syncpoint_allocate)
	1053	+#define DRM_IOCTL_TEGRA_SYNCPOINT_FREE DRM_IOWR(DRM_COMMAND_BASE + 0x21, struct drm_tegra_syncpoint_free)
	1054	+#define DRM_IOCTL_TEGRA_SYNCPOINT_WAIT DRM_IOWR(DRM_COMMAND_BASE + 0x22, struct drm_tegra_syncpoint_wait)
	1055	+
677	1056	#if defined(__cplusplus)
678	1057	}
679	1058	#endif

include/uapi/linux/bpf.h+114−5

@@ -84,7 +84,7 @@ struct bpf_lpm_trie_key { · 83 unmodified lines
84	84
85	85	struct bpf_cgroup_storage_key {
86	86	__u64 cgroup_inode_id; /* cgroup inode id */
87		− __u32 attach_type; /* program attach type */
	87	+ __u32 attach_type; /* program attach type (enum bpf_attach_type) */
88	88	};
89	89
90	90	union bpf_iter_link_info {
@@ -324,9 +324,6 @@ union bpf_iter_link_info { · 233 unmodified lines
324	324	* BPF_PROG_TYPE_SK_LOOKUP
325	325	* data_in and data_out must be NULL.
326	326	*
327		− * BPF_PROG_TYPE_XDP
328		− * ctx_in and ctx_out must be NULL.
329		− *
330	327	* BPF_PROG_TYPE_RAW_TRACEPOINT,
331	328	* BPF_PROG_TYPE_RAW_TRACEPOINT_WRITABLE
332	329	*
@@ -996,6 +993,7 @@ enum bpf_attach_type { · 663 unmodified lines
996	993	BPF_SK_SKB_VERDICT,
997	994	BPF_SK_REUSEPORT_SELECT,
998	995	BPF_SK_REUSEPORT_SELECT_OR_MIGRATE,
	996	+ BPF_PERF_EVENT,
999	997	__MAX_BPF_ATTACH_TYPE
1000	998	};
1001	999
@@ -1009,6 +1007,7 @@ enum bpf_link_type { · 7 unmodified lines
1009	1007	BPF_LINK_TYPE_ITER = 4,
1010	1008	BPF_LINK_TYPE_NETNS = 5,
1011	1009	BPF_LINK_TYPE_XDP = 6,
	1010	+ BPF_LINK_TYPE_PERF_EVENT = 7,
1012	1011
1013	1012	MAX_BPF_LINK_TYPE,
1014	1013	};
@@ -1449,6 +1448,13 @@ union bpf_attr { · 434 unmodified lines
1449	1448	__aligned_u64 iter_info; /* extra bpf_iter_link_info */
1450	1449	__u32 iter_info_len; /* iter_info length */
1451	1450	};
	1451	+ struct {
	1452	+ /* black box user-provided value passed through
	1453	+ * to BPF program at the execution time and
	1454	+ * accessible through bpf_get_attach_cookie() BPF helper
	1455	+ */
	1456	+ __u64 bpf_cookie;
	1457	+ } perf_event;
1452	1458	};
1453	1459	} link_create;
1454	1460
@@ -3249,7 +3255,7 @@ union bpf_attr { · 1794 unmodified lines
3249	3255	* long bpf_sk_select_reuseport(struct sk_reuseport_md reuse, struct bpf_map map, void *key, u64 flags)
3250	3256	* Description
3251	3257	* Select a SO_REUSEPORT socket from a
3252		− * BPF_MAP_TYPE_REUSEPORT_ARRAY map.
	3258	+ * BPF_MAP_TYPE_REUSEPORT_SOCKARRAY map.
3253	3259	* It checks the selected socket is matching the incoming
3254	3260	* request in the socket buffer.
3255	3261	* Return
@@ -4780,6 +4786,97 @@ union bpf_attr { · 1524 unmodified lines
4780	4786	* Execute close syscall for given FD.
4781	4787	* Return
4782	4788	* A syscall result.
	4789	+ *
	4790	+ * long bpf_timer_init(struct bpf_timer timer, struct bpf_map map, u64 flags)
	4791	+ * Description
	4792	+ * Initialize the timer.
	4793	+ * First 4 bits of flags specify clockid.
	4794	+ * Only CLOCK_MONOTONIC, CLOCK_REALTIME, CLOCK_BOOTTIME are allowed.
	4795	+ * All other bits of flags are reserved.
	4796	+ * The verifier will reject the program if timer is not from
	4797	+ * the same map.
	4798	+ * Return
	4799	+ * 0 on success.
	4800	+ * -EBUSY if timer is already initialized.
	4801	+ * -EINVAL if invalid flags are passed.
	4802	+ * -EPERM if timer is in a map that doesn't have any user references.
	4803	+ * The user space should either hold a file descriptor to a map with timers
	4804	+ * or pin such map in bpffs. When map is unpinned or file descriptor is
	4805	+ * closed all timers in the map will be cancelled and freed.
	4806	+ *
	4807	+ * long bpf_timer_set_callback(struct bpf_timer timer, void callback_fn)
	4808	+ * Description
	4809	+ * Configure the timer to call callback_fn static function.
	4810	+ * Return
	4811	+ * 0 on success.
	4812	+ * -EINVAL if timer was not initialized with bpf_timer_init() earlier.
	4813	+ * -EPERM if timer is in a map that doesn't have any user references.
	4814	+ * The user space should either hold a file descriptor to a map with timers
	4815	+ * or pin such map in bpffs. When map is unpinned or file descriptor is
	4816	+ * closed all timers in the map will be cancelled and freed.
	4817	+ *
	4818	+ * long bpf_timer_start(struct bpf_timer *timer, u64 nsecs, u64 flags)
	4819	+ * Description
	4820	+ * Set timer expiration N nanoseconds from the current time. The
	4821	+ * configured callback will be invoked in soft irq context on some cpu
	4822	+ * and will not repeat unless another bpf_timer_start() is made.
	4823	+ * In such case the next invocation can migrate to a different cpu.
	4824	+ * Since struct bpf_timer is a field inside map element the map
	4825	+ * owns the timer. The bpf_timer_set_callback() will increment refcnt
	4826	+ * of BPF program to make sure that callback_fn code stays valid.
	4827	+ * When user space reference to a map reaches zero all timers
	4828	+ * in a map are cancelled and corresponding program's refcnts are
	4829	+ * decremented. This is done to make sure that Ctrl-C of a user
	4830	+ * process doesn't leave any timers running. If map is pinned in
	4831	+ * bpffs the callback_fn can re-arm itself indefinitely.
	4832	+ * bpf_map_update/delete_elem() helpers and user space sys_bpf commands
	4833	+ * cancel and free the timer in the given map element.
	4834	+ * The map can contain timers that invoke callback_fn-s from different
	4835	+ * programs. The same callback_fn can serve different timers from
	4836	+ * different maps if key/value layout matches across maps.
	4837	+ * Every bpf_timer_set_callback() can have different callback_fn.
	4838	+ *
	4839	+ * Return
	4840	+ * 0 on success.
	4841	+ * -EINVAL if timer was not initialized with bpf_timer_init() earlier
	4842	+ * or invalid flags are passed.
	4843	+ *
	4844	+ * long bpf_timer_cancel(struct bpf_timer *timer)
	4845	+ * Description
	4846	+ * Cancel the timer and wait for callback_fn to finish if it was running.
	4847	+ * Return
	4848	+ * 0 if the timer was not active.
	4849	+ * 1 if the timer was active.
	4850	+ * -EINVAL if timer was not initialized with bpf_timer_init() earlier.
	4851	+ * -EDEADLK if callback_fn tried to call bpf_timer_cancel() on its
	4852	+ * own timer which would have led to a deadlock otherwise.
	4853	+ *
	4854	+ * u64 bpf_get_func_ip(void *ctx)
	4855	+ * Description
	4856	+ * Get address of the traced function (for tracing and kprobe programs).
	4857	+ * Return
	4858	+ * Address of the traced function.
	4859	+ *
	4860	+ * u64 bpf_get_attach_cookie(void *ctx)
	4861	+ * Description
	4862	+ * Get bpf_cookie value provided (optionally) during the program
	4863	+ * attachment. It might be different for each individual
	4864	+ * attachment, even if BPF program itself is the same.
	4865	+ * Expects BPF program context ctx as a first argument.
	4866	+ *
	4867	+ * Supported for the following program types:
	4868	+ * - kprobe/uprobe;
	4869	+ * - tracepoint;
	4870	+ * - perf_event.
	4871	+ * Return
	4872	+ * Value specified by user at BPF link creation/attachment time
	4873	+ * or 0, if it was not specified.
	4874	+ *
	4875	+ * long bpf_task_pt_regs(struct task_struct *task)
	4876	+ * Description
	4877	+ * Get the struct pt_regs associated with task.
	4878	+ * Return
	4879	+ * A pointer to struct pt_regs.
4783	4880	*/
4784	4881	#define __BPF_FUNC_MAPPER(FN) \
4785	4882	FN(unspec), \
@@ -4951,6 +5048,13 @@ union bpf_attr { · 165 unmodified lines
4951	5048	FN(sys_bpf), \
4952	5049	FN(btf_find_by_name_kind), \
4953	5050	FN(sys_close), \
	5051	+ FN(timer_init), \
	5052	+ FN(timer_set_callback), \
	5053	+ FN(timer_start), \
	5054	+ FN(timer_cancel), \
	5055	+ FN(get_func_ip), \
	5056	+ FN(get_attach_cookie), \
	5057	+ FN(task_pt_regs), \
4954	5058	/* */
4955	5059
4956	5060	/* integer value in 'imm' field of BPF_CALL instruction selects which helper
@@ -6077,6 +6181,11 @@ struct bpf_spin_lock { · 1120 unmodified lines
6077	6181	__u32 val;
6078	6182	};
6079	6183
	6184	+struct bpf_timer {
	6185	+ __u64 :64;
	6186	+ __u64 :64;
	6187	+} __attribute__((aligned(8)));
	6188	+
6080	6189	struct bpf_sysctl {
6081	6190	__u32 write; /* Sysctl is being read (= 0) or written (= 1).
6082	6191	* Allows 1,2,4-byte read, but no write.

include/uapi/linux/btrfs.h+1−0

@@ -288,6 +288,7 @@ struct btrfs_ioctl_fs_info_args { · 287 unmodified lines
288	288	* first mount when booting older kernel versions.
289	289	*/
290	290	#define BTRFS_FEATURE_COMPAT_RO_FREE_SPACE_TREE_VALID (1ULL << 1)
	291	+#define BTRFS_FEATURE_COMPAT_RO_VERITY (1ULL << 2)
291	292
292	293	#define BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF (1ULL << 0)
293	294	#define BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL (1ULL << 1)

include/uapi/linux/btrfs_tree.h+35−0

@@ -118,6 +118,29 @@ · 117 unmodified lines
118	118	#define BTRFS_INODE_REF_KEY 12
119	119	#define BTRFS_INODE_EXTREF_KEY 13
120	120	#define BTRFS_XATTR_ITEM_KEY 24
	121	+
	122	+/*
	123	+ * fs verity items are stored under two different key types on disk.
	124	+ * The descriptor items:
	125	+ * [ inode objectid, BTRFS_VERITY_DESC_ITEM_KEY, offset ]
	126	+ *
	127	+ * At offset 0, we store a btrfs_verity_descriptor_item which tracks the size
	128	+ * of the descriptor item and some extra data for encryption.
	129	+ * Starting at offset 1, these hold the generic fs verity descriptor. The
	130	+ * latter are opaque to btrfs, we just read and write them as a blob for the
	131	+ * higher level verity code. The most common descriptor size is 256 bytes.
	132	+ *
	133	+ * The merkle tree items:
	134	+ * [ inode objectid, BTRFS_VERITY_MERKLE_ITEM_KEY, offset ]
	135	+ *
	136	+ * These also start at offset 0, and correspond to the merkle tree bytes. When
	137	+ * fsverity asks for page 0 of the merkle tree, we pull up one page starting at
	138	+ * offset 0 for this key type. These are also opaque to btrfs, we're blindly
	139	+ * storing whatever fsverity sends down.
	140	+ */
	141	+#define BTRFS_VERITY_DESC_ITEM_KEY 36
	142	+#define BTRFS_VERITY_MERKLE_ITEM_KEY 37
	143	+
121	144	#define BTRFS_ORPHAN_ITEM_KEY 48
122	145	/* reserve 2-15 close to the inode for later flexibility */
123	146
@@ -991,4 +1014,16 @@ struct btrfs_qgroup_limit_item { · 867 unmodified lines
991	1014	__le64 rsv_excl;
992	1015	} __attribute__ ((__packed__));
993	1016
	1017	+struct btrfs_verity_descriptor_item {
	1018	+ /* Size of the verity descriptor in bytes */
	1019	+ __le64 size;
	1020	+ /*
	1021	+ * When we implement support for fscrypt, we will need to encrypt the
	1022	+ * Merkle tree for encrypted verity files. These 128 bits are for the
	1023	+ * eventual storage of an fscrypt initialization vector.
	1024	+ */
	1025	+ __le64 reserved[2];
	1026	+ __u8 encryption;
	1027	+} __attribute__ ((__packed__));
	1028	+
994	1029	#endif /* _BTRFS_CTREE_H_ */

include/uapi/linux/can/j1939.h+9−0

@@ -78,11 +78,20 @@ enum { · 77 unmodified lines
78	78	enum {
79	79	J1939_NLA_PAD,
80	80	J1939_NLA_BYTES_ACKED,
	81	+ J1939_NLA_TOTAL_SIZE,
	82	+ J1939_NLA_PGN,
	83	+ J1939_NLA_SRC_NAME,
	84	+ J1939_NLA_DEST_NAME,
	85	+ J1939_NLA_SRC_ADDR,
	86	+ J1939_NLA_DEST_ADDR,
81	87	};
82	88
83	89	enum {
84	90	J1939_EE_INFO_NONE,
85	91	J1939_EE_INFO_TX_ABORT,
	92	+ J1939_EE_INFO_RX_RTS,
	93	+ J1939_EE_INFO_RX_DPO,
	94	+ J1939_EE_INFO_RX_ABORT,
86	95	};
87	96
88	97	struct j1939_filter {

include/uapi/linux/capability.h+0−1

@@ -243,7 +243,6 @@ struct vfs_ns_cap_data { · 242 unmodified lines
243	243	/* Allow examination and configuration of disk quotas */
244	244	/* Allow setting the domainname */
245	245	/* Allow setting the hostname */
246		−/* Allow calling bdflush() */
247	246	/* Allow mount() and umount(), setting up new smb connection */
248	247	/* Allow some autofs root ioctls */
249	248	/* Allow nfsservctl */

include/uapi/linux/cec.h+1−1

@@ -642,7 +642,7 @@ struct cec_event { · 641 unmodified lines
642	642	#define CEC_OP_REC_SEQ_WEDNESDAY 0x08
643	643	#define CEC_OP_REC_SEQ_THURSDAY 0x10
644	644	#define CEC_OP_REC_SEQ_FRIDAY 0x20
645		−#define CEC_OP_REC_SEQ_SATERDAY 0x40
	645	+#define CEC_OP_REC_SEQ_SATURDAY 0x40
646	646	#define CEC_OP_REC_SEQ_ONCE_ONLY 0x00
647	647
648	648	#define CEC_MSG_CLEAR_DIGITAL_TIMER 0x99

include/uapi/linux/cxl_mem.h+1−1

@@ -50,7 +50,7 @@ enum { CXL_CMDS }; · 49 unmodified lines
50	50	#define ___C(a, b) { b }
51	51	static const struct {
52	52	const char *name;
53		−} cxl_command_names[] = { CXL_CMDS };
	53	+} cxl_command_names[] __attribute__((__unused__)) = { CXL_CMDS };
54	54
55	55	/*
56	56	* Here's how this actually breaks out:

include/uapi/linux/dm-ioctl.h+6−0

@@ -376,4 +376,10 @@ enum { · 375 unmodified lines
376	376	*/
377	377	#define DM_INTERNAL_SUSPEND_FLAG (1 << 18) /* Out */
378	378
	379	+/*
	380	+ * If set, returns in the in buffer passed by UM, the raw table information
	381	+ * that would be measured by IMA subsystem on device state change.
	382	+ */
	383	+#define DM_IMA_MEASUREMENT_FLAG (1 << 19) /* In */
	384	+
379	385	#endif /* _LINUX_DM_IOCTL_H */

include/uapi/linux/dvb/audio.h+101−0

@@ -0,0 +1,101 @@
	1	+/* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
	2	+/*
	3	+ * audio.h - DEPRECATED MPEG-TS audio decoder API
	4	+ *
	5	+ * NOTE: should not be used on future drivers
	6	+ *
	7	+ * Copyright (C) 2000 Ralph Metzler <ralph@convergence.de>
	8	+ * & Marcus Metzler <marcus@convergence.de>
	9	+ * for convergence integrated media GmbH
	10	+ *
	11	+ * This program is free software; you can redistribute it and/or
	12	+ * modify it under the terms of the GNU General Lesser Public License
	13	+ * as published by the Free Software Foundation; either version 2.1
	14	+ * of the License, or (at your option) any later version.
	15	+ *
	16	+ * This program is distributed in the hope that it will be useful,
	17	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	+ * GNU General Public License for more details.
	20	+ *
	21	+ * You should have received a copy of the GNU Lesser General Public License
	22	+ * along with this program; if not, write to the Free Software
	23	+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	24	+ *
	25	+ */
	26	+
	27	+#ifndef _DVBAUDIO_H_
	28	+#define _DVBAUDIO_H_
	29	+
	30	+#include <linux/types.h>
	31	+
	32	+typedef enum {
	33	+ AUDIO_SOURCE_DEMUX, /* Select the demux as the main source */
	34	+ AUDIO_SOURCE_MEMORY /* Select internal memory as the main source */
	35	+} audio_stream_source_t;
	36	+
	37	+
	38	+typedef enum {
	39	+ AUDIO_STOPPED, /* Device is stopped */
	40	+ AUDIO_PLAYING, /* Device is currently playing */
	41	+ AUDIO_PAUSED /* Device is paused */
	42	+} audio_play_state_t;
	43	+
	44	+
	45	+typedef enum {
	46	+ AUDIO_STEREO,
	47	+ AUDIO_MONO_LEFT,
	48	+ AUDIO_MONO_RIGHT,
	49	+ AUDIO_MONO,
	50	+ AUDIO_STEREO_SWAPPED
	51	+} audio_channel_select_t;
	52	+
	53	+
	54	+typedef struct audio_mixer {
	55	+ unsigned int volume_left;
	56	+ unsigned int volume_right;
	57	+ /* what else do we need? bass, pass-through, ... */
	58	+} audio_mixer_t;
	59	+
	60	+
	61	+typedef struct audio_status {
	62	+ int AV_sync_state; /* sync audio and video? */
	63	+ int mute_state; /* audio is muted */
	64	+ audio_play_state_t play_state; /* current playback state */
	65	+ audio_stream_source_t stream_source; /* current stream source */
	66	+ audio_channel_select_t channel_select; /* currently selected channel */
	67	+ int bypass_mode; /* pass on audio data to */
	68	+ audio_mixer_t mixer_state; /* current mixer state */
	69	+} audio_status_t; /* separate decoder hardware */
	70	+
	71	+
	72	+/* for GET_CAPABILITIES and SET_FORMAT, the latter should only set one bit */
	73	+#define AUDIO_CAP_DTS 1
	74	+#define AUDIO_CAP_LPCM 2
	75	+#define AUDIO_CAP_MP1 4
	76	+#define AUDIO_CAP_MP2 8
	77	+#define AUDIO_CAP_MP3 16
	78	+#define AUDIO_CAP_AAC 32
	79	+#define AUDIO_CAP_OGG 64
	80	+#define AUDIO_CAP_SDDS 128
	81	+#define AUDIO_CAP_AC3 256
	82	+
	83	+#define AUDIO_STOP _IO('o', 1)
	84	+#define AUDIO_PLAY _IO('o', 2)
	85	+#define AUDIO_PAUSE _IO('o', 3)
	86	+#define AUDIO_CONTINUE _IO('o', 4)
	87	+#define AUDIO_SELECT_SOURCE _IO('o', 5)
	88	+#define AUDIO_SET_MUTE _IO('o', 6)
	89	+#define AUDIO_SET_AV_SYNC _IO('o', 7)
	90	+#define AUDIO_SET_BYPASS_MODE _IO('o', 8)
	91	+#define AUDIO_CHANNEL_SELECT _IO('o', 9)
	92	+#define AUDIO_GET_STATUS _IOR('o', 10, audio_status_t)
	93	+
	94	+#define AUDIO_GET_CAPABILITIES _IOR('o', 11, unsigned int)
	95	+#define AUDIO_CLEAR_BUFFER _IO('o', 12)
	96	+#define AUDIO_SET_ID _IO('o', 13)
	97	+#define AUDIO_SET_MIXER _IOW('o', 14, audio_mixer_t)
	98	+#define AUDIO_SET_STREAMTYPE _IO('o', 15)
	99	+#define AUDIO_BILINGUAL_CHANNEL_SELECT _IO('o', 20)
	100	+
	101	+#endif /* _DVBAUDIO_H_ */

include/uapi/linux/dvb/osd.h+181−0

@@ -0,0 +1,181 @@
	1	+/* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
	2	+/*
	3	+ * osd.h - DEPRECATED On Screen Display API
	4	+ *
	5	+ * NOTE: should not be used on future drivers
	6	+ *
	7	+ * Copyright (C) 2001 Ralph Metzler <ralph@convergence.de>
	8	+ * & Marcus Metzler <marcus@convergence.de>
	9	+ * for convergence integrated media GmbH
	10	+ *
	11	+ * This program is free software; you can redistribute it and/or
	12	+ * modify it under the terms of the GNU General Lesser Public License
	13	+ * as published by the Free Software Foundation; either version 2.1
	14	+ * of the License, or (at your option) any later version.
	15	+ *
	16	+ * This program is distributed in the hope that it will be useful,
	17	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	+ * GNU General Public License for more details.
	20	+ *
	21	+ * You should have received a copy of the GNU Lesser General Public License
	22	+ * along with this program; if not, write to the Free Software
	23	+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	24	+ *
	25	+ */
	26	+
	27	+#ifndef _DVBOSD_H_
	28	+#define _DVBOSD_H_
	29	+
	30	+#include <linux/compiler.h>
	31	+
	32	+typedef enum {
	33	+ /* All functions return -2 on "not open" */
	34	+ OSD_Close = 1, /* () */
	35	+ /*
	36	+ * Disables OSD and releases the buffers
	37	+ * returns 0 on success
	38	+ */
	39	+ OSD_Open, /* (x0,y0,x1,y1,BitPerPixel[2/4/8](color&0x0F),mix[0..15](color&0xF0)) */
	40	+ /*
	41	+ * Opens OSD with this size and bit depth
	42	+ * returns 0 on success, -1 on DRAM allocation error, -2 on "already open"
	43	+ */
	44	+ OSD_Show, /* () */
	45	+ /*
	46	+ * enables OSD mode
	47	+ * returns 0 on success
	48	+ */
	49	+ OSD_Hide, /* () */
	50	+ /*
	51	+ * disables OSD mode
	52	+ * returns 0 on success
	53	+ */
	54	+ OSD_Clear, /* () */
	55	+ /*
	56	+ * Sets all pixel to color 0
	57	+ * returns 0 on success
	58	+ */
	59	+ OSD_Fill, /* (color) */
	60	+ /*
	61	+ * Sets all pixel to color <col>
	62	+ * returns 0 on success
	63	+ */
	64	+ OSD_SetColor, /* (color,R{x0},G{y0},B{x1},opacity{y1}) */
	65	+ /*
	66	+ * set palette entry <num> to <r,g,b>, <mix> and <trans> apply
	67	+ * R,G,B: 0..255
	68	+ * R=Red, G=Green, B=Blue
	69	+ * opacity=0: pixel opacity 0% (only video pixel shows)
	70	+ * opacity=1..254: pixel opacity as specified in header
	71	+ * opacity=255: pixel opacity 100% (only OSD pixel shows)
	72	+ * returns 0 on success, -1 on error
	73	+ */
	74	+ OSD_SetPalette, /* (firstcolor{color},lastcolor{x0},data) */
	75	+ /*
	76	+ * Set a number of entries in the palette
	77	+ * sets the entries "firstcolor" through "lastcolor" from the array "data"
	78	+ * data has 4 byte for each color:
	79	+ * R,G,B, and a opacity value: 0->transparent, 1..254->mix, 255->pixel
	80	+ */
	81	+ OSD_SetTrans, /* (transparency{color}) */
	82	+ /*
	83	+ * Sets transparency of mixed pixel (0..15)
	84	+ * returns 0 on success
	85	+ */
	86	+ OSD_SetPixel, /* (x0,y0,color) */
	87	+ /*
	88	+ * sets pixel <x>,<y> to color number <col>
	89	+ * returns 0 on success, -1 on error
	90	+ */
	91	+ OSD_GetPixel, /* (x0,y0) */
	92	+ /* returns color number of pixel <x>,<y>, or -1 */
	93	+ OSD_SetRow, /* (x0,y0,x1,data) */
	94	+ /*
	95	+ * fills pixels x0,y through x1,y with the content of data[]
	96	+ * returns 0 on success, -1 on clipping all pixel (no pixel drawn)
	97	+ */
	98	+ OSD_SetBlock, /* (x0,y0,x1,y1,increment{color},data) */
	99	+ /*
	100	+ * fills pixels x0,y0 through x1,y1 with the content of data[]
	101	+ * inc contains the width of one line in the data block,
	102	+ * inc<=0 uses blockwidth as linewidth
	103	+ * returns 0 on success, -1 on clipping all pixel
	104	+ */
	105	+ OSD_FillRow, /* (x0,y0,x1,color) */
	106	+ /*
	107	+ * fills pixels x0,y through x1,y with the color <col>
	108	+ * returns 0 on success, -1 on clipping all pixel
	109	+ */
	110	+ OSD_FillBlock, /* (x0,y0,x1,y1,color) */
	111	+ /*
	112	+ * fills pixels x0,y0 through x1,y1 with the color <col>
	113	+ * returns 0 on success, -1 on clipping all pixel
	114	+ */
	115	+ OSD_Line, /* (x0,y0,x1,y1,color) */
	116	+ /*
	117	+ * draw a line from x0,y0 to x1,y1 with the color <col>
	118	+ * returns 0 on success
	119	+ */
	120	+ OSD_Query, /* (x0,y0,x1,y1,xasp{color}}), yasp=11 */
	121	+ /*
	122	+ * fills parameters with the picture dimensions and the pixel aspect ratio
	123	+ * returns 0 on success
	124	+ */
	125	+ OSD_Test, /* () */
	126	+ /*
	127	+ * draws a test picture. for debugging purposes only
	128	+ * returns 0 on success
	129	+ * TODO: remove "test" in final version
	130	+ */
	131	+ OSD_Text, /* (x0,y0,size,color,text) */
	132	+ OSD_SetWindow, /* (x0) set window with number 0<x0<8 as current */
	133	+ OSD_MoveWindow, /* move current window to (x0, y0) */
	134	+ OSD_OpenRaw, /* Open other types of OSD windows */
	135	+} OSD_Command;
	136	+
	137	+typedef struct osd_cmd_s {
	138	+ OSD_Command cmd;
	139	+ int x0;
	140	+ int y0;
	141	+ int x1;
	142	+ int y1;
	143	+ int color;
	144	+ void __user *data;
	145	+} osd_cmd_t;
	146	+
	147	+/* OSD_OpenRaw: set 'color' to desired window type */
	148	+typedef enum {
	149	+ OSD_BITMAP1, /* 1 bit bitmap */
	150	+ OSD_BITMAP2, /* 2 bit bitmap */
	151	+ OSD_BITMAP4, /* 4 bit bitmap */
	152	+ OSD_BITMAP8, /* 8 bit bitmap */
	153	+ OSD_BITMAP1HR, /* 1 Bit bitmap half resolution */
	154	+ OSD_BITMAP2HR, /* 2 bit bitmap half resolution */
	155	+ OSD_BITMAP4HR, /* 4 bit bitmap half resolution */
	156	+ OSD_BITMAP8HR, /* 8 bit bitmap half resolution */
	157	+ OSD_YCRCB422, /* 4:2:2 YCRCB Graphic Display */
	158	+ OSD_YCRCB444, /* 4:4:4 YCRCB Graphic Display */
	159	+ OSD_YCRCB444HR, /* 4:4:4 YCRCB graphic half resolution */
	160	+ OSD_VIDEOTSIZE, /* True Size Normal MPEG Video Display */
	161	+ OSD_VIDEOHSIZE, /* MPEG Video Display Half Resolution */
	162	+ OSD_VIDEOQSIZE, /* MPEG Video Display Quarter Resolution */
	163	+ OSD_VIDEODSIZE, /* MPEG Video Display Double Resolution */
	164	+ OSD_VIDEOTHSIZE, /* True Size MPEG Video Display Half Resolution */
	165	+ OSD_VIDEOTQSIZE, /* True Size MPEG Video Display Quarter Resolution*/
	166	+ OSD_VIDEOTDSIZE, /* True Size MPEG Video Display Double Resolution */
	167	+ OSD_VIDEONSIZE, /* Full Size MPEG Video Display */
	168	+ OSD_CURSOR /* Cursor */
	169	+} osd_raw_window_t;
	170	+
	171	+typedef struct osd_cap_s {
	172	+ int cmd;
	173	+#define OSD_CAP_MEMSIZE 1 /* memory size */
	174	+ long val;
	175	+} osd_cap_t;
	176	+
	177	+
	178	+#define OSD_SEND_CMD _IOW('o', 160, osd_cmd_t)
	179	+#define OSD_GET_CAPABILITY _IOR('o', 161, osd_cap_t)
	180	+
	181	+#endif

include/uapi/linux/dvb/video.h+220−0

@@ -0,0 +1,220 @@
	1	+/* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
	2	+/*
	3	+ * video.h - DEPRECATED MPEG-TS video decoder API
	4	+ *
	5	+ * NOTE: should not be used on future drivers
	6	+ *
	7	+ * Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
	8	+ * & Ralph Metzler <ralph@convergence.de>
	9	+ * for convergence integrated media GmbH
	10	+ *
	11	+ * This program is free software; you can redistribute it and/or
	12	+ * modify it under the terms of the GNU Lesser General Public License
	13	+ * as published by the Free Software Foundation; either version 2.1
	14	+ * of the License, or (at your option) any later version.
	15	+ *
	16	+ * This program is distributed in the hope that it will be useful,
	17	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	+ * GNU General Public License for more details.
	20	+ *
	21	+ * You should have received a copy of the GNU Lesser General Public License
	22	+ * along with this program; if not, write to the Free Software
	23	+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	24	+ *
	25	+ */
	26	+
	27	+#ifndef _UAPI_DVBVIDEO_H_
	28	+#define _UAPI_DVBVIDEO_H_
	29	+
	30	+#include <linux/types.h>
	31	+#ifndef __KERNEL__
	32	+#include <time.h>
	33	+#endif
	34	+
	35	+typedef enum {
	36	+ VIDEO_FORMAT_4_3, /* Select 4:3 format */
	37	+ VIDEO_FORMAT_16_9, /* Select 16:9 format. */
	38	+ VIDEO_FORMAT_221_1 /* 2.21:1 */
	39	+} video_format_t;
	40	+
	41	+
	42	+typedef enum {
	43	+ VIDEO_PAN_SCAN, /* use pan and scan format */
	44	+ VIDEO_LETTER_BOX, /* use letterbox format */
	45	+ VIDEO_CENTER_CUT_OUT /* use center cut out format */
	46	+} video_displayformat_t;
	47	+
	48	+typedef struct {
	49	+ int w;
	50	+ int h;
	51	+ video_format_t aspect_ratio;
	52	+} video_size_t;
	53	+
	54	+typedef enum {
	55	+ VIDEO_SOURCE_DEMUX, /* Select the demux as the main source */
	56	+ VIDEO_SOURCE_MEMORY /* If this source is selected, the stream
	57	+ comes from the user through the write
	58	+ system call */
	59	+} video_stream_source_t;
	60	+
	61	+
	62	+typedef enum {
	63	+ VIDEO_STOPPED, /* Video is stopped */
	64	+ VIDEO_PLAYING, /* Video is currently playing */
	65	+ VIDEO_FREEZED /* Video is freezed */
	66	+} video_play_state_t;
	67	+
	68	+
	69	+/* Decoder commands */
	70	+#define VIDEO_CMD_PLAY (0)
	71	+#define VIDEO_CMD_STOP (1)
	72	+#define VIDEO_CMD_FREEZE (2)
	73	+#define VIDEO_CMD_CONTINUE (3)
	74	+
	75	+/* Flags for VIDEO_CMD_FREEZE */
	76	+#define VIDEO_CMD_FREEZE_TO_BLACK (1 << 0)
	77	+
	78	+/* Flags for VIDEO_CMD_STOP */
	79	+#define VIDEO_CMD_STOP_TO_BLACK (1 << 0)
	80	+#define VIDEO_CMD_STOP_IMMEDIATELY (1 << 1)
	81	+
	82	+/* Play input formats: */
	83	+/* The decoder has no special format requirements */
	84	+#define VIDEO_PLAY_FMT_NONE (0)
	85	+/* The decoder requires full GOPs */
	86	+#define VIDEO_PLAY_FMT_GOP (1)
	87	+
	88	+/* The structure must be zeroed before use by the application
	89	+ This ensures it can be extended safely in the future. */
	90	+struct video_command {
	91	+ __u32 cmd;
	92	+ __u32 flags;
	93	+ union {
	94	+ struct {
	95	+ __u64 pts;
	96	+ } stop;
	97	+
	98	+ struct {
	99	+ /* 0 or 1000 specifies normal speed,
	100	+ 1 specifies forward single stepping,
	101	+ -1 specifies backward single stepping,
	102	+ >1: playback at speed/1000 of the normal speed,
	103	+ <-1: reverse playback at (-speed/1000) of the normal speed. */
	104	+ __s32 speed;
	105	+ __u32 format;
	106	+ } play;
	107	+
	108	+ struct {
	109	+ __u32 data[16];
	110	+ } raw;
	111	+ };
	112	+};
	113	+
	114	+/* FIELD_UNKNOWN can be used if the hardware does not know whether
	115	+ the Vsync is for an odd, even or progressive (i.e. non-interlaced)
	116	+ field. */
	117	+#define VIDEO_VSYNC_FIELD_UNKNOWN (0)
	118	+#define VIDEO_VSYNC_FIELD_ODD (1)
	119	+#define VIDEO_VSYNC_FIELD_EVEN (2)
	120	+#define VIDEO_VSYNC_FIELD_PROGRESSIVE (3)
	121	+
	122	+struct video_event {
	123	+ __s32 type;
	124	+#define VIDEO_EVENT_SIZE_CHANGED 1
	125	+#define VIDEO_EVENT_FRAME_RATE_CHANGED 2
	126	+#define VIDEO_EVENT_DECODER_STOPPED 3
	127	+#define VIDEO_EVENT_VSYNC 4
	128	+ /* unused, make sure to use atomic time for y2038 if it ever gets used */
	129	+ long timestamp;
	130	+ union {
	131	+ video_size_t size;
	132	+ unsigned int frame_rate; /* in frames per 1000sec */
	133	+ unsigned char vsync_field; /* unknown/odd/even/progressive */
	134	+ } u;
	135	+};
	136	+
	137	+
	138	+struct video_status {
	139	+ int video_blank; /* blank video on freeze? */
	140	+ video_play_state_t play_state; /* current state of playback */
	141	+ video_stream_source_t stream_source; /* current source (demux/memory) */
	142	+ video_format_t video_format; /* current aspect ratio of stream*/
	143	+ video_displayformat_t display_format;/* selected cropping mode */
	144	+};
	145	+
	146	+
	147	+struct video_still_picture {
	148	+ char __user iFrame; / pointer to a single iframe in memory */
	149	+ __s32 size;
	150	+};
	151	+
	152	+
	153	+typedef __u16 video_attributes_t;
	154	+/* bits: descr. */
	155	+/* 15-14 Video compression mode (0=MPEG-1, 1=MPEG-2) */
	156	+/* 13-12 TV system (0=525/60, 1=625/50) */
	157	+/* 11-10 Aspect ratio (0=4:3, 3=16:9) */
	158	+/* 9- 8 permitted display mode on 4:3 monitor (0=both, 1=only pan-sca */
	159	+/* 7 line 21-1 data present in GOP (1=yes, 0=no) */
	160	+/* 6 line 21-2 data present in GOP (1=yes, 0=no) */
	161	+/* 5- 3 source resolution (0=720x480/576, 1=704x480/576, 2=352x480/57 */
	162	+/* 2 source letterboxed (1=yes, 0=no) */
	163	+/* 0 film/camera mode (0=
	164	+ camera, 1=film (625/50 only)) /
	165	+
	166	+
	167	+/* bit definitions for capabilities: */
	168	+/* can the hardware decode MPEG1 and/or MPEG2? */
	169	+#define VIDEO_CAP_MPEG1 1
	170	+#define VIDEO_CAP_MPEG2 2
	171	+/* can you send a system and/or program stream to video device?
	172	+ (you still have to open the video and the audio device but only
	173	+ send the stream to the video device) */
	174	+#define VIDEO_CAP_SYS 4
	175	+#define VIDEO_CAP_PROG 8
	176	+/* can the driver also handle SPU, NAVI and CSS encoded data?
	177	+ (CSS API is not present yet) */
	178	+#define VIDEO_CAP_SPU 16
	179	+#define VIDEO_CAP_NAVI 32
	180	+#define VIDEO_CAP_CSS 64
	181	+
	182	+
	183	+#define VIDEO_STOP _IO('o', 21)
	184	+#define VIDEO_PLAY _IO('o', 22)
	185	+#define VIDEO_FREEZE _IO('o', 23)
	186	+#define VIDEO_CONTINUE _IO('o', 24)
	187	+#define VIDEO_SELECT_SOURCE _IO('o', 25)
	188	+#define VIDEO_SET_BLANK _IO('o', 26)
	189	+#define VIDEO_GET_STATUS _IOR('o', 27, struct video_status)
	190	+#define VIDEO_GET_EVENT _IOR('o', 28, struct video_event)
	191	+#define VIDEO_SET_DISPLAY_FORMAT _IO('o', 29)
	192	+#define VIDEO_STILLPICTURE _IOW('o', 30, struct video_still_picture)
	193	+#define VIDEO_FAST_FORWARD _IO('o', 31)
	194	+#define VIDEO_SLOWMOTION _IO('o', 32)
	195	+#define VIDEO_GET_CAPABILITIES _IOR('o', 33, unsigned int)
	196	+#define VIDEO_CLEAR_BUFFER _IO('o', 34)
	197	+#define VIDEO_SET_STREAMTYPE _IO('o', 36)
	198	+#define VIDEO_SET_FORMAT _IO('o', 37)
	199	+#define VIDEO_GET_SIZE _IOR('o', 55, video_size_t)
	200	+
	201	+/**
	202	+ * VIDEO_GET_PTS
	203	+ *
	204	+ * Read the 33 bit presentation time stamp as defined
	205	+ * in ITU T-REC-H.222.0 / ISO/IEC 13818-1.
	206	+ *
	207	+ * The PTS should belong to the currently played
	208	+ * frame if possible, but may also be a value close to it
	209	+ * like the PTS of the last decoded frame or the last PTS
	210	+ * extracted by the PES parser.
	211	+ */
	212	+#define VIDEO_GET_PTS _IOR('o', 57, __u64)
	213	+
	214	+/* Read the number of displayed frames since the decoder was started */
	215	+#define VIDEO_GET_FRAME_COUNT _IOR('o', 58, __u64)
	216	+
	217	+#define VIDEO_COMMAND _IOWR('o', 59, struct video_command)
	218	+#define VIDEO_TRY_COMMAND _IOWR('o', 60, struct video_command)
	219	+
	220	+#endif /* _UAPI_DVBVIDEO_H_ */

include/uapi/linux/ethtool.h+2−0

@@ -639,6 +639,8 @@ enum ethtool_link_ext_substate_link_logical_mismatch { · 638 unmodified lines
639	639	enum ethtool_link_ext_substate_bad_signal_integrity {
640	640	ETHTOOL_LINK_EXT_SUBSTATE_BSI_LARGE_NUMBER_OF_PHYSICAL_ERRORS = 1,
641	641	ETHTOOL_LINK_EXT_SUBSTATE_BSI_UNSUPPORTED_RATE,
	642	+ ETHTOOL_LINK_EXT_SUBSTATE_BSI_SERDES_REFERENCE_CLOCK_LOST,
	643	+ ETHTOOL_LINK_EXT_SUBSTATE_BSI_SERDES_ALOS,
642	644	};
643	645
644	646	/* More information in addition to ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE. */

include/uapi/linux/ethtool_netlink.h+2−0

@@ -377,6 +377,8 @@ enum { · 376 unmodified lines
377	377	ETHTOOL_A_COALESCE_TX_USECS_HIGH, /* u32 */
378	378	ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH, /* u32 */
379	379	ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL, /* u32 */
	380	+ ETHTOOL_A_COALESCE_USE_CQE_MODE_TX, /* u8 */
	381	+ ETHTOOL_A_COALESCE_USE_CQE_MODE_RX, /* u8 */
380	382
381	383	/* add new constants above here */
382	384	__ETHTOOL_A_COALESCE_CNT,

include/uapi/linux/fanotify.h+13−0

@@ -51,6 +51,7 @@ · 50 unmodified lines
51	51	#define FAN_ENABLE_AUDIT 0x00000040
52	52
53	53	/* Flags to determine fanotify event format */
	54	+#define FAN_REPORT_PIDFD 0x00000080 /* Report pidfd for event->pid */
54	55	#define FAN_REPORT_TID 0x00000100 /* event->pid is thread id */
55	56	#define FAN_REPORT_FID 0x00000200 /* Report unique file id */
56	57	#define FAN_REPORT_DIR_FID 0x00000400 /* Report unique directory id */
@@ -123,6 +124,7 @@ struct fanotify_event_metadata { · 66 unmodified lines
123	124	#define FAN_EVENT_INFO_TYPE_FID 1
124	125	#define FAN_EVENT_INFO_TYPE_DFID_NAME 2
125	126	#define FAN_EVENT_INFO_TYPE_DFID 3
	127	+#define FAN_EVENT_INFO_TYPE_PIDFD 4
126	128
127	129	/* Variable length info record following event metadata */
128	130	struct fanotify_event_info_header {
@@ -148,6 +150,15 @@ struct fanotify_event_info_fid { · 19 unmodified lines
148	150	unsigned char handle[0];
149	151	};
150	152
	153	+/*
	154	+ * This structure is used for info records of type FAN_EVENT_INFO_TYPE_PIDFD.
	155	+ * It holds a pidfd for the pid that was responsible for generating an event.
	156	+ */
	157	+struct fanotify_event_info_pidfd {
	158	+ struct fanotify_event_info_header hdr;
	159	+ __s32 pidfd;
	160	+};
	161	+
151	162	struct fanotify_response {
152	163	__s32 fd;
153	164	__u32 response;
@@ -160,6 +171,8 @@ struct fanotify_response { · 6 unmodified lines
160	171
161	172	/* No fd set in event */
162	173	#define FAN_NOFD -1
	174	+#define FAN_NOPIDFD FAN_NOFD
	175	+#define FAN_EPIDFD -2
163	176
164	177	/* Helper functions to deal with fanotify_event_metadata buffers */
165	178	#define FAN_EVENT_METADATA_LEN (sizeof(struct fanotify_event_metadata))

include/uapi/linux/fs.h+1−0

@@ -184,6 +184,7 @@ struct fsxattr { · 183 unmodified lines
184	184	#define BLKSECDISCARD _IO(0x12,125)
185	185	#define BLKROTATIONAL _IO(0x12,126)
186	186	#define BLKZEROOUT _IO(0x12,127)
	187	+#define BLKGETDISKSEQ _IOR(0x12,128,__u64)
187	188	/*
188	189	* A jump here: 130-136 are reserved for zoned block devices
189	190	* (see uapi/linux/blkzoned.h)

include/uapi/linux/idxd.h+25−1

@@ -1,4 +1,4 @@
1		−/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
	1	+/* SPDX-License-Identifier: LGPL-2.1 WITH Linux-syscall-note */
2	2	/* Copyright(c) 2019 Intel Corporation. All rights rsvd. */
3	3	#ifndef _USR_IDXD_H_
4	4	#define _USR_IDXD_H_
@@ -9,6 +9,30 @@ · 4 unmodified lines
9	9	#include <stdint.h>
10	10	#endif
11	11
	12	+/* Driver command error status */
	13	+enum idxd_scmd_stat {
	14	+ IDXD_SCMD_DEV_ENABLED = 0x80000010,
	15	+ IDXD_SCMD_DEV_NOT_ENABLED = 0x80000020,
	16	+ IDXD_SCMD_WQ_ENABLED = 0x80000021,
	17	+ IDXD_SCMD_DEV_DMA_ERR = 0x80020000,
	18	+ IDXD_SCMD_WQ_NO_GRP = 0x80030000,
	19	+ IDXD_SCMD_WQ_NO_NAME = 0x80040000,
	20	+ IDXD_SCMD_WQ_NO_SVM = 0x80050000,
	21	+ IDXD_SCMD_WQ_NO_THRESH = 0x80060000,
	22	+ IDXD_SCMD_WQ_PORTAL_ERR = 0x80070000,
	23	+ IDXD_SCMD_WQ_RES_ALLOC_ERR = 0x80080000,
	24	+ IDXD_SCMD_PERCPU_ERR = 0x80090000,
	25	+ IDXD_SCMD_DMA_CHAN_ERR = 0x800a0000,
	26	+ IDXD_SCMD_CDEV_ERR = 0x800b0000,
	27	+ IDXD_SCMD_WQ_NO_SWQ_SUPPORT = 0x800c0000,
	28	+ IDXD_SCMD_WQ_NONE_CONFIGURED = 0x800d0000,
	29	+ IDXD_SCMD_WQ_NO_SIZE = 0x800e0000,
	30	+ IDXD_SCMD_WQ_NO_PRIV = 0x800f0000,
	31	+};
	32	+
	33	+#define IDXD_SCMD_SOFTERR_MASK 0x80000000
	34	+#define IDXD_SCMD_SOFTERR_SHIFT 16
	35	+
12	36	/* Descriptor flags */
13	37	#define IDXD_OP_FLAG_FENCE 0x0001
14	38	#define IDXD_OP_FLAG_BOF 0x0002

include/uapi/linux/if_arp.h+1−0

@@ -54,6 +54,7 @@ · 53 unmodified lines
54	54	#define ARPHRD_X25 271 /* CCITT X.25 */
55	55	#define ARPHRD_HWX25 272 /* Boards with X.25 in firmware */
56	56	#define ARPHRD_CAN 280 /* Controller Area Network */
	57	+#define ARPHRD_MCTP 290
57	58	#define ARPHRD_PPP 512
58	59	#define ARPHRD_CISCO 513 /* Cisco HDLC */
59	60	#define ARPHRD_HDLC ARPHRD_CISCO

include/uapi/linux/if_bridge.h+46−0

@@ -479,16 +479,22 @@ enum { · 478 unmodified lines
479	479
480	480	/* flags used in BRIDGE_VLANDB_DUMP_FLAGS attribute to affect dumps */
481	481	#define BRIDGE_VLANDB_DUMPF_STATS (1 << 0) /* Include stats in the dump */
	482	+#define BRIDGE_VLANDB_DUMPF_GLOBAL (1 << 1) /* Dump global vlan options only */
482	483
483	484	/* Bridge vlan RTM attributes
484	485	* [BRIDGE_VLANDB_ENTRY] = {
485	486	* [BRIDGE_VLANDB_ENTRY_INFO]
486	487	* ...
487	488	* }
	489	+ * [BRIDGE_VLANDB_GLOBAL_OPTIONS] = {
	490	+ * [BRIDGE_VLANDB_GOPTS_ID]
	491	+ * ...
	492	+ * }
488	493	*/
489	494	enum {
490	495	BRIDGE_VLANDB_UNSPEC,
491	496	BRIDGE_VLANDB_ENTRY,
	497	+ BRIDGE_VLANDB_GLOBAL_OPTIONS,
492	498	__BRIDGE_VLANDB_MAX,
493	499	};
494	500	#define BRIDGE_VLANDB_MAX (__BRIDGE_VLANDB_MAX - 1)
@@ -500,6 +506,7 @@ enum { · 5 unmodified lines
500	506	BRIDGE_VLANDB_ENTRY_STATE,
501	507	BRIDGE_VLANDB_ENTRY_TUNNEL_INFO,
502	508	BRIDGE_VLANDB_ENTRY_STATS,
	509	+ BRIDGE_VLANDB_ENTRY_MCAST_ROUTER,
503	510	__BRIDGE_VLANDB_ENTRY_MAX,
504	511	};
505	512	#define BRIDGE_VLANDB_ENTRY_MAX (__BRIDGE_VLANDB_ENTRY_MAX - 1)
@@ -538,6 +545,29 @@ enum { · 32 unmodified lines
538	545	};
539	546	#define BRIDGE_VLANDB_STATS_MAX (__BRIDGE_VLANDB_STATS_MAX - 1)
540	547
	548	+enum {
	549	+ BRIDGE_VLANDB_GOPTS_UNSPEC,
	550	+ BRIDGE_VLANDB_GOPTS_ID,
	551	+ BRIDGE_VLANDB_GOPTS_RANGE,
	552	+ BRIDGE_VLANDB_GOPTS_MCAST_SNOOPING,
	553	+ BRIDGE_VLANDB_GOPTS_MCAST_IGMP_VERSION,
	554	+ BRIDGE_VLANDB_GOPTS_MCAST_MLD_VERSION,
	555	+ BRIDGE_VLANDB_GOPTS_MCAST_LAST_MEMBER_CNT,
	556	+ BRIDGE_VLANDB_GOPTS_MCAST_STARTUP_QUERY_CNT,
	557	+ BRIDGE_VLANDB_GOPTS_MCAST_LAST_MEMBER_INTVL,
	558	+ BRIDGE_VLANDB_GOPTS_PAD,
	559	+ BRIDGE_VLANDB_GOPTS_MCAST_MEMBERSHIP_INTVL,
	560	+ BRIDGE_VLANDB_GOPTS_MCAST_QUERIER_INTVL,
	561	+ BRIDGE_VLANDB_GOPTS_MCAST_QUERY_INTVL,
	562	+ BRIDGE_VLANDB_GOPTS_MCAST_QUERY_RESPONSE_INTVL,
	563	+ BRIDGE_VLANDB_GOPTS_MCAST_STARTUP_QUERY_INTVL,
	564	+ BRIDGE_VLANDB_GOPTS_MCAST_QUERIER,
	565	+ BRIDGE_VLANDB_GOPTS_MCAST_ROUTER_PORTS,
	566	+ BRIDGE_VLANDB_GOPTS_MCAST_QUERIER_STATE,
	567	+ __BRIDGE_VLANDB_GOPTS_MAX
	568	+};
	569	+#define BRIDGE_VLANDB_GOPTS_MAX (__BRIDGE_VLANDB_GOPTS_MAX - 1)
	570	+
541	571	/* Bridge multicast database attributes
542	572	* [MDBA_MDB] = {
543	573	* [MDBA_MDB_ENTRY] = {
@@ -629,6 +659,7 @@ enum { · 85 unmodified lines
629	659	MDBA_ROUTER_PATTR_TYPE,
630	660	MDBA_ROUTER_PATTR_INET_TIMER,
631	661	MDBA_ROUTER_PATTR_INET6_TIMER,
	662	+ MDBA_ROUTER_PATTR_VID,
632	663	__MDBA_ROUTER_PATTR_MAX
633	664	};
634	665	#define MDBA_ROUTER_PATTR_MAX (__MDBA_ROUTER_PATTR_MAX - 1)
@@ -720,12 +751,14 @@ struct br_mcast_stats { · 85 unmodified lines
720	751
721	752	/* bridge boolean options
722	753	* BR_BOOLOPT_NO_LL_LEARN - disable learning from link-local packets
	754	+ * BR_BOOLOPT_MCAST_VLAN_SNOOPING - control vlan multicast snooping
723	755	*
724	756	* IMPORTANT: if adding a new option do not forget to handle
725	757	* it in br_boolopt_toggle/get and bridge sysfs
726	758	*/
727	759	enum br_boolopt_id {
728	760	BR_BOOLOPT_NO_LL_LEARN,
	761	+ BR_BOOLOPT_MCAST_VLAN_SNOOPING,
729	762	BR_BOOLOPT_MAX
730	763	};
731	764
@@ -738,4 +771,17 @@ struct br_boolopt_multi { · 6 unmodified lines
738	771	__u32 optval;
739	772	__u32 optmask;
740	773	};
	774	+
	775	+enum {
	776	+ BRIDGE_QUERIER_UNSPEC,
	777	+ BRIDGE_QUERIER_IP_ADDRESS,
	778	+ BRIDGE_QUERIER_IP_PORT,
	779	+ BRIDGE_QUERIER_IP_OTHER_TIMER,
	780	+ BRIDGE_QUERIER_PAD,
	781	+ BRIDGE_QUERIER_IPV6_ADDRESS,
	782	+ BRIDGE_QUERIER_IPV6_PORT,
	783	+ BRIDGE_QUERIER_IPV6_OTHER_TIMER,
	784	+ __BRIDGE_QUERIER_MAX
	785	+};
	786	+#define BRIDGE_QUERIER_MAX (__BRIDGE_QUERIER_MAX - 1)
741	787	#endif /* _UAPI_LINUX_IF_BRIDGE_H */

include/uapi/linux/if_ether.h+3−0

@@ -151,6 +151,9 @@ · 150 unmodified lines
151	151	#define ETH_P_MAP 0x00F9 /* Qualcomm multiplexing and
152	152	* aggregation protocol
153	153	*/
	154	+#define ETH_P_MCTP 0x00FA /* Management component transport
	155	+ * protocol packets
	156	+ */
154	157
155	158	/*
156	159	* This is an Ethernet frame header.

include/uapi/linux/if_link.h+13−0

@@ -417,6 +417,7 @@ enum { · 416 unmodified lines
417	417	IFLA_INET6_ICMP6STATS, /* statistics (icmpv6) */
418	418	IFLA_INET6_TOKEN, /* device token */
419	419	IFLA_INET6_ADDR_GEN_MODE, /* implicit address generator mode */
	420	+ IFLA_INET6_RA_MTU, /* mtu carried in the RA message */
420	421	__IFLA_INET6_MAX
421	422	};
422	423
@@ -479,6 +480,7 @@ enum { · 56 unmodified lines
479	480	IFLA_BR_MCAST_MLD_VERSION,
480	481	IFLA_BR_VLAN_STATS_PER_PORT,
481	482	IFLA_BR_MULTI_BOOLOPT,
	483	+ IFLA_BR_MCAST_QUERIER_STATE,
482	484	__IFLA_BR_MAX,
483	485	};
484	486
@@ -855,6 +857,7 @@ enum { · 370 unmodified lines
855	857	IFLA_BOND_AD_ACTOR_SYSTEM,
856	858	IFLA_BOND_TLB_DYNAMIC_LB,
857	859	IFLA_BOND_PEER_NOTIF_DELAY,
	860	+ IFLA_BOND_AD_LACP_ACTIVE,
858	861	__IFLA_BOND_MAX,
859	862	};
860	863
@@ -1260,4 +1263,14 @@ struct ifla_rmnet_flags { · 399 unmodified lines
1260	1263	__u32 mask;
1261	1264	};
1262	1265
	1266	+/* MCTP section */
	1267	+
	1268	+enum {
	1269	+ IFLA_MCTP_UNSPEC,
	1270	+ IFLA_MCTP_NET,
	1271	+ __IFLA_MCTP_MAX,
	1272	+};
	1273	+
	1274	+#define IFLA_MCTP_MAX (__IFLA_MCTP_MAX - 1)
	1275	+
1263	1276	#endif /* _UAPI_LINUX_IF_LINK_H */

include/uapi/linux/in.h+32−10

@@ -188,11 +188,22 @@ struct ip_mreq_source { · 187 unmodified lines
188	188	};
189	189
190	190	struct ip_msfilter {
191		− __be32 imsf_multiaddr;
192		− __be32 imsf_interface;
193		− __u32 imsf_fmode;
194		− __u32 imsf_numsrc;
195		− __be32 imsf_slist[1];
	191	+ union {
	192	+ struct {
	193	+ __be32 imsf_multiaddr_aux;
	194	+ __be32 imsf_interface_aux;
	195	+ __u32 imsf_fmode_aux;
	196	+ __u32 imsf_numsrc_aux;
	197	+ __be32 imsf_slist[1];
	198	+ };
	199	+ struct {
	200	+ __be32 imsf_multiaddr;
	201	+ __be32 imsf_interface;
	202	+ __u32 imsf_fmode;
	203	+ __u32 imsf_numsrc;
	204	+ __be32 imsf_slist_flex[];
	205	+ };
	206	+ };
196	207	};
197	208
198	209	#define IP_MSFILTER_SIZE(numsrc) \
@@ -211,11 +222,22 @@ struct group_source_req { · 12 unmodified lines
211	222	};
212	223
213	224	struct group_filter {
214		− __u32 gf_interface; /* interface index */
215		− struct __kernel_sockaddr_storage gf_group; /* multicast address */
216		− __u32 gf_fmode; /* filter mode */
217		− __u32 gf_numsrc; /* number of sources */
218		− struct __kernel_sockaddr_storage gf_slist[1]; /* interface index */
	225	+ union {
	226	+ struct {
	227	+ __u32 gf_interface_aux; /* interface index */
	228	+ struct __kernel_sockaddr_storage gf_group_aux; /* multicast address */
	229	+ __u32 gf_fmode_aux; /* filter mode */
	230	+ __u32 gf_numsrc_aux; /* number of sources */
	231	+ struct __kernel_sockaddr_storage gf_slist[1]; /* interface index */
	232	+ };
	233	+ struct {
	234	+ __u32 gf_interface; /* interface index */
	235	+ struct __kernel_sockaddr_storage gf_group; /* multicast address */
	236	+ __u32 gf_fmode; /* filter mode */
	237	+ __u32 gf_numsrc; /* number of sources */
	238	+ struct __kernel_sockaddr_storage gf_slist_flex[]; /* interface index */
	239	+ };
	240	+ };
219	241	};
220	242
221	243	#define GROUP_FILTER_SIZE(numsrc) \

include/uapi/linux/in6.h+1−0

@@ -145,6 +145,7 @@ struct in6_flowlabel_req { · 144 unmodified lines
145	145	#define IPV6_TLV_PADN 1
146	146	#define IPV6_TLV_ROUTERALERT 5
147	147	#define IPV6_TLV_CALIPSO 7 /* RFC 5570 */
	148	+#define IPV6_TLV_IOAM 49 /* TEMPORARY IANA allocation for IOAM */
148	149	#define IPV6_TLV_JUMBO 194
149	150	#define IPV6_TLV_HAO 201 /* home address option */
150	151

include/uapi/linux/io_uring.h+18−4

@@ -44,6 +44,7 @@ struct io_uring_sqe { · 43 unmodified lines
44	44	__u32 splice_flags;
45	45	__u32 rename_flags;
46	46	__u32 unlink_flags;
	47	+ __u32 hardlink_flags;
47	48	};
48	49	__u64 user_data; /* data to be passed back at completion time */
49	50	/* pack this to avoid bogus arm OABI complaints */
@@ -55,7 +56,10 @@ struct io_uring_sqe { · 5 unmodified lines
55	56	} __attribute__((packed));
56	57	/* personality to use, if used */
57	58	__u16 personality;
58		− __s32 splice_fd_in;
	59	+ union {
	60	+ __s32 splice_fd_in;
	61	+ __u32 file_index;
	62	+ };
59	63	__u64 __pad2[2];
60	64	};
61	65
@@ -133,6 +137,9 @@ enum { · 71 unmodified lines
133	137	IORING_OP_SHUTDOWN,
134	138	IORING_OP_RENAMEAT,
135	139	IORING_OP_UNLINKAT,
	140	+ IORING_OP_MKDIRAT,
	141	+ IORING_OP_SYMLINKAT,
	142	+ IORING_OP_LINKAT,
136	143
137	144	/* this goes last, obviously */
138	145	IORING_OP_LAST,
@@ -146,9 +153,13 @@ enum { · 7 unmodified lines
146	153	/*
147	154	* sqe->timeout_flags
148	155	*/
149		−#define IORING_TIMEOUT_ABS (1U << 0)
150		−#define IORING_TIMEOUT_UPDATE (1U << 1)
151		−
	156	+#define IORING_TIMEOUT_ABS (1U << 0)
	157	+#define IORING_TIMEOUT_UPDATE (1U << 1)
	158	+#define IORING_TIMEOUT_BOOTTIME (1U << 2)
	159	+#define IORING_TIMEOUT_REALTIME (1U << 3)
	160	+#define IORING_LINK_TIMEOUT_UPDATE (1U << 4)
	161	+#define IORING_TIMEOUT_CLOCK_MASK (IORING_TIMEOUT_BOOTTIME \| IORING_TIMEOUT_REALTIME)
	162	+#define IORING_TIMEOUT_UPDATE_MASK (IORING_TIMEOUT_UPDATE \| IORING_LINK_TIMEOUT_UPDATE)
152	163	/*
153	164	* sqe->splice_flags
154	165	* extends splice(2) flags
@@ -306,6 +317,9 @@ enum { · 151 unmodified lines
306	317	IORING_REGISTER_IOWQ_AFF = 17,
307	318	IORING_UNREGISTER_IOWQ_AFF = 18,
308	319
	320	+ /* set/get max number of workers */
	321	+ IORING_REGISTER_IOWQ_MAX_WORKERS = 19,
	322	+
309	323	/* this goes last */
310	324	IORING_REGISTER_LAST
311	325	};

include/uapi/linux/ioam6.h+133−0

@@ -0,0 +1,133 @@
	1	+/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
	2	+/*
	3	+ * IPv6 IOAM implementation
	4	+ *
	5	+ * Author:
	6	+ * Justin Iurman <justin.iurman@uliege.be>
	7	+ */
	8	+
	9	+#ifndef _UAPI_LINUX_IOAM6_H
	10	+#define _UAPI_LINUX_IOAM6_H
	11	+
	12	+#include <asm/byteorder.h>
	13	+#include <linux/types.h>
	14	+
	15	+#define IOAM6_U16_UNAVAILABLE U16_MAX
	16	+#define IOAM6_U32_UNAVAILABLE U32_MAX
	17	+#define IOAM6_U64_UNAVAILABLE U64_MAX
	18	+
	19	+#define IOAM6_DEFAULT_ID (IOAM6_U32_UNAVAILABLE >> 8)
	20	+#define IOAM6_DEFAULT_ID_WIDE (IOAM6_U64_UNAVAILABLE >> 8)
	21	+#define IOAM6_DEFAULT_IF_ID IOAM6_U16_UNAVAILABLE
	22	+#define IOAM6_DEFAULT_IF_ID_WIDE IOAM6_U32_UNAVAILABLE
	23	+
	24	+/*
	25	+ * IPv6 IOAM Option Header
	26	+ */
	27	+struct ioam6_hdr {
	28	+ __u8 opt_type;
	29	+ __u8 opt_len;
	30	+ __u8 :8; /* reserved */
	31	+#define IOAM6_TYPE_PREALLOC 0
	32	+ __u8 type;
	33	+} __attribute__((packed));
	34	+
	35	+/*
	36	+ * IOAM Trace Header
	37	+ */
	38	+struct ioam6_trace_hdr {
	39	+ __be16 namespace_id;
	40	+
	41	+#if defined(__LITTLE_ENDIAN_BITFIELD)
	42	+
	43	+ __u8 :1, /* unused */
	44	+ :1, /* unused */
	45	+ overflow:1,
	46	+ nodelen:5;
	47	+
	48	+ __u8 remlen:7,
	49	+ :1; /* unused */
	50	+
	51	+ union {
	52	+ __be32 type_be32;
	53	+
	54	+ struct {
	55	+ __u32 bit7:1,
	56	+ bit6:1,
	57	+ bit5:1,
	58	+ bit4:1,
	59	+ bit3:1,
	60	+ bit2:1,
	61	+ bit1:1,
	62	+ bit0:1,
	63	+ bit15:1, /* unused */
	64	+ bit14:1, /* unused */
	65	+ bit13:1, /* unused */
	66	+ bit12:1, /* unused */
	67	+ bit11:1,
	68	+ bit10:1,
	69	+ bit9:1,
	70	+ bit8:1,
	71	+ bit23:1, /* reserved */
	72	+ bit22:1,
	73	+ bit21:1, /* unused */
	74	+ bit20:1, /* unused */
	75	+ bit19:1, /* unused */
	76	+ bit18:1, /* unused */
	77	+ bit17:1, /* unused */
	78	+ bit16:1, /* unused */
	79	+ :8; /* reserved */
	80	+ } type;
	81	+ };
	82	+
	83	+#elif defined(__BIG_ENDIAN_BITFIELD)
	84	+
	85	+ __u8 nodelen:5,
	86	+ overflow:1,
	87	+ :1, /* unused */
	88	+ :1; /* unused */
	89	+
	90	+ __u8 :1, /* unused */
	91	+ remlen:7;
	92	+
	93	+ union {
	94	+ __be32 type_be32;
	95	+
	96	+ struct {
	97	+ __u32 bit0:1,
	98	+ bit1:1,
	99	+ bit2:1,
	100	+ bit3:1,
	101	+ bit4:1,
	102	+ bit5:1,
	103	+ bit6:1,
	104	+ bit7:1,
	105	+ bit8:1,
	106	+ bit9:1,
	107	+ bit10:1,
	108	+ bit11:1,
	109	+ bit12:1, /* unused */
	110	+ bit13:1, /* unused */
	111	+ bit14:1, /* unused */
	112	+ bit15:1, /* unused */
	113	+ bit16:1, /* unused */
	114	+ bit17:1, /* unused */
	115	+ bit18:1, /* unused */
	116	+ bit19:1, /* unused */
	117	+ bit20:1, /* unused */
	118	+ bit21:1, /* unused */
	119	+ bit22:1,
	120	+ bit23:1, /* reserved */
	121	+ :8; /* reserved */
	122	+ } type;
	123	+ };
	124	+
	125	+#else
	126	+#error "Please fix <asm/byteorder.h>"
	127	+#endif
	128	+
	129	+#define IOAM6_TRACE_DATA_SIZE_MAX 244
	130	+ __u8 data[0];
	131	+} __attribute__((packed));
	132	+
	133	+#endif /* _UAPI_LINUX_IOAM6_H */

include/uapi/linux/ioam6_genl.h+52−0

@@ -0,0 +1,52 @@
	1	+/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
	2	+/*
	3	+ * IPv6 IOAM Generic Netlink API
	4	+ *
	5	+ * Author:
	6	+ * Justin Iurman <justin.iurman@uliege.be>
	7	+ */
	8	+
	9	+#ifndef _UAPI_LINUX_IOAM6_GENL_H
	10	+#define _UAPI_LINUX_IOAM6_GENL_H
	11	+
	12	+#define IOAM6_GENL_NAME "IOAM6"
	13	+#define IOAM6_GENL_VERSION 0x1
	14	+
	15	+enum {
	16	+ IOAM6_ATTR_UNSPEC,
	17	+
	18	+ IOAM6_ATTR_NS_ID, /* u16 */
	19	+ IOAM6_ATTR_NS_DATA, /* u32 */
	20	+ IOAM6_ATTR_NS_DATA_WIDE,/* u64 */
	21	+
	22	+#define IOAM6_MAX_SCHEMA_DATA_LEN (255 * 4)
	23	+ IOAM6_ATTR_SC_ID, /* u32 */
	24	+ IOAM6_ATTR_SC_DATA, /* Binary */
	25	+ IOAM6_ATTR_SC_NONE, /* Flag */
	26	+
	27	+ IOAM6_ATTR_PAD,
	28	+
	29	+ __IOAM6_ATTR_MAX,
	30	+};
	31	+
	32	+#define IOAM6_ATTR_MAX (__IOAM6_ATTR_MAX - 1)
	33	+
	34	+enum {
	35	+ IOAM6_CMD_UNSPEC,
	36	+
	37	+ IOAM6_CMD_ADD_NAMESPACE,
	38	+ IOAM6_CMD_DEL_NAMESPACE,
	39	+ IOAM6_CMD_DUMP_NAMESPACES,
	40	+
	41	+ IOAM6_CMD_ADD_SCHEMA,
	42	+ IOAM6_CMD_DEL_SCHEMA,
	43	+ IOAM6_CMD_DUMP_SCHEMAS,
	44	+
	45	+ IOAM6_CMD_NS_SET_SCHEMA,
	46	+
	47	+ __IOAM6_CMD_MAX,
	48	+};
	49	+
	50	+#define IOAM6_CMD_MAX (__IOAM6_CMD_MAX - 1)
	51	+
	52	+#endif /* _UAPI_LINUX_IOAM6_GENL_H */

include/uapi/linux/ioam6_iptunnel.h+20−0

@@ -0,0 +1,20 @@
	1	+/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
	2	+/*
	3	+ * IPv6 IOAM Lightweight Tunnel API
	4	+ *
	5	+ * Author:
	6	+ * Justin Iurman <justin.iurman@uliege.be>
	7	+ */
	8	+
	9	+#ifndef _UAPI_LINUX_IOAM6_IPTUNNEL_H
	10	+#define _UAPI_LINUX_IOAM6_IPTUNNEL_H
	11	+
	12	+enum {
	13	+ IOAM6_IPTUNNEL_UNSPEC,
	14	+ IOAM6_IPTUNNEL_TRACE, /* struct ioam6_trace_hdr */
	15	+ __IOAM6_IPTUNNEL_MAX,
	16	+};
	17	+
	18	+#define IOAM6_IPTUNNEL_MAX (__IOAM6_IPTUNNEL_MAX - 1)
	19	+
	20	+#endif /* _UAPI_LINUX_IOAM6_IPTUNNEL_H */

include/uapi/linux/ioprio.h+52−0

@@ -0,0 +1,52 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
	2	+#ifndef _UAPI_LINUX_IOPRIO_H
	3	+#define _UAPI_LINUX_IOPRIO_H
	4	+
	5	+/*
	6	+ * Gives us 8 prio classes with 13-bits of data for each class
	7	+ */
	8	+#define IOPRIO_CLASS_SHIFT 13
	9	+#define IOPRIO_CLASS_MASK 0x07
	10	+#define IOPRIO_PRIO_MASK ((1UL << IOPRIO_CLASS_SHIFT) - 1)
	11	+
	12	+#define IOPRIO_PRIO_CLASS(ioprio) \
	13	+ (((ioprio) >> IOPRIO_CLASS_SHIFT) & IOPRIO_CLASS_MASK)
	14	+#define IOPRIO_PRIO_DATA(ioprio) ((ioprio) & IOPRIO_PRIO_MASK)
	15	+#define IOPRIO_PRIO_VALUE(class, data) \
	16	+ ((((class) & IOPRIO_CLASS_MASK) << IOPRIO_CLASS_SHIFT) \| \
	17	+ ((data) & IOPRIO_PRIO_MASK))
	18	+
	19	+/*
	20	+ * These are the io priority groups as implemented by the BFQ and mq-deadline
	21	+ * schedulers. RT is the realtime class, it always gets premium service. For
	22	+ * ATA disks supporting NCQ IO priority, RT class IOs will be processed using
	23	+ * high priority NCQ commands. BE is the best-effort scheduling class, the
	24	+ * default for any process. IDLE is the idle scheduling class, it is only
	25	+ * served when no one else is using the disk.
	26	+ */
	27	+enum {
	28	+ IOPRIO_CLASS_NONE,
	29	+ IOPRIO_CLASS_RT,
	30	+ IOPRIO_CLASS_BE,
	31	+ IOPRIO_CLASS_IDLE,
	32	+};
	33	+
	34	+/*
	35	+ * The RT and BE priority classes both support up to 8 priority levels.
	36	+ */
	37	+#define IOPRIO_NR_LEVELS 8
	38	+#define IOPRIO_BE_NR IOPRIO_NR_LEVELS
	39	+
	40	+enum {
	41	+ IOPRIO_WHO_PROCESS = 1,
	42	+ IOPRIO_WHO_PGRP,
	43	+ IOPRIO_WHO_USER,
	44	+};
	45	+
	46	+/*
	47	+ * Fallback BE priority level.
	48	+ */
	49	+#define IOPRIO_NORM 4
	50	+#define IOPRIO_BE_NORM IOPRIO_NORM
	51	+
	52	+#endif /* _UAPI_LINUX_IOPRIO_H */

include/uapi/linux/ipv6.h+3−0

@@ -190,6 +190,9 @@ enum { · 189 unmodified lines
190	190	DEVCONF_NDISC_TCLASS,
191	191	DEVCONF_RPL_SEG_ENABLED,
192	192	DEVCONF_RA_DEFRTR_METRIC,
	193	+ DEVCONF_IOAM6_ENABLED,
	194	+ DEVCONF_IOAM6_ID,
	195	+ DEVCONF_IOAM6_ID_WIDE,
193	196	DEVCONF_MAX
194	197	};
195	198

include/uapi/linux/ipx.h+0−87

@@ -1,87 +0,0 @@
1		−/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2		−#ifndef _IPX_H_
3		−#define _IPX_H_
4		−#include <linux/libc-compat.h> /* for compatibility with glibc netipx/ipx.h */
5		−#include <linux/types.h>
6		−#include <linux/sockios.h>
7		−#include <linux/socket.h>
8		−#define IPX_NODE_LEN 6
9		−#define IPX_MTU 576
10		−
11		−#if __UAPI_DEF_SOCKADDR_IPX
12		−struct sockaddr_ipx {
13		− __kernel_sa_family_t sipx_family;
14		− __be16 sipx_port;
15		− __be32 sipx_network;
16		− unsigned char sipx_node[IPX_NODE_LEN];
17		− __u8 sipx_type;
18		− unsigned char sipx_zero; /* 16 byte fill */
19		−};
20		−#endif /* __UAPI_DEF_SOCKADDR_IPX */
21		−
22		−/*
23		− * So we can fit the extra info for SIOCSIFADDR into the address nicely
24		− */
25		−#define sipx_special sipx_port
26		−#define sipx_action sipx_zero
27		−#define IPX_DLTITF 0
28		−#define IPX_CRTITF 1
29		−
30		−#if __UAPI_DEF_IPX_ROUTE_DEFINITION
31		−struct ipx_route_definition {
32		− __be32 ipx_network;
33		− __be32 ipx_router_network;
34		− unsigned char ipx_router_node[IPX_NODE_LEN];
35		−};
36		−#endif /* __UAPI_DEF_IPX_ROUTE_DEFINITION */
37		−
38		−#if __UAPI_DEF_IPX_INTERFACE_DEFINITION
39		−struct ipx_interface_definition {
40		− __be32 ipx_network;
41		− unsigned char ipx_device[16];
42		− unsigned char ipx_dlink_type;
43		−#define IPX_FRAME_NONE 0
44		−#define IPX_FRAME_SNAP 1
45		−#define IPX_FRAME_8022 2
46		−#define IPX_FRAME_ETHERII 3
47		−#define IPX_FRAME_8023 4
48		−#define IPX_FRAME_TR_8022 5 /* obsolete */
49		− unsigned char ipx_special;
50		−#define IPX_SPECIAL_NONE 0
51		−#define IPX_PRIMARY 1
52		−#define IPX_INTERNAL 2
53		− unsigned char ipx_node[IPX_NODE_LEN];
54		−};
55		−#endif /* __UAPI_DEF_IPX_INTERFACE_DEFINITION */
56		−
57		−#if __UAPI_DEF_IPX_CONFIG_DATA
58		−struct ipx_config_data {
59		− unsigned char ipxcfg_auto_select_primary;
60		− unsigned char ipxcfg_auto_create_interfaces;
61		−};
62		−#endif /* __UAPI_DEF_IPX_CONFIG_DATA */
63		−
64		−/*
65		− * OLD Route Definition for backward compatibility.
66		− */
67		−
68		−#if __UAPI_DEF_IPX_ROUTE_DEF
69		−struct ipx_route_def {
70		− __be32 ipx_network;
71		− __be32 ipx_router_network;
72		−#define IPX_ROUTE_NO_ROUTER 0
73		− unsigned char ipx_router_node[IPX_NODE_LEN];
74		− unsigned char ipx_device[16];
75		− unsigned short ipx_flags;
76		−#define IPX_RT_SNAP 8
77		−#define IPX_RT_8022 4
78		−#define IPX_RT_BLUEBOOK 2
79		−#define IPX_RT_ROUTED 1
80		−};
81		−#endif /* __UAPI_DEF_IPX_ROUTE_DEF */
82		−
83		−#define SIOCAIPXITFCRT (SIOCPROTOPRIVATE)
84		−#define SIOCAIPXPRISLT (SIOCPROTOPRIVATE + 1)
85		−#define SIOCIPXCFGDATA (SIOCPROTOPRIVATE + 2)
86		−#define SIOCIPXNCPCONN (SIOCPROTOPRIVATE + 3)
87		−#endif /* _IPX_H_ */

include/uapi/linux/kfd_ioctl.h+9−7

@@ -31,9 +31,10 @@ · 30 unmodified lines
31	31	* - 1.3 - Add SMI events support
32	32	* - 1.4 - Indicate new SRAM EDC bit in device properties
33	33	* - 1.5 - Add SVM API
	34	+ * - 1.6 - Query clear flags in SVM get_attr API
34	35	*/
35	36	#define KFD_IOCTL_MAJOR_VERSION 1
36		−#define KFD_IOCTL_MINOR_VERSION 5
	37	+#define KFD_IOCTL_MINOR_VERSION 6
37	38
38	39	struct kfd_ioctl_get_version_args {
39	40	__u32 major_version; /* from KFD */
@@ -575,18 +576,19 @@ struct kfd_ioctl_svm_attribute { · 535 unmodified lines
575	576	* @KFD_IOCTL_SVM_ATTR_PREFERRED_LOC or
576	577	* @KFD_IOCTL_SVM_ATTR_PREFETCH_LOC resepctively. For
577	578	* @KFD_IOCTL_SVM_ATTR_SET_FLAGS, flags of all pages will be
578		− * aggregated by bitwise AND. The minimum migration granularity
579		− * throughout the range will be returned for
580		− * @KFD_IOCTL_SVM_ATTR_GRANULARITY.
	579	+ * aggregated by bitwise AND. That means, a flag will be set in the
	580	+ * output, if that flag is set for all pages in the range. For
	581	+ * @KFD_IOCTL_SVM_ATTR_CLR_FLAGS, flags of all pages will be
	582	+ * aggregated by bitwise NOR. That means, a flag will be set in the
	583	+ * output, if that flag is clear for all pages in the range.
	584	+ * The minimum migration granularity throughout the range will be
	585	+ * returned for @KFD_IOCTL_SVM_ATTR_GRANULARITY.
581	586	*
582	587	* Querying of accessibility attributes works by initializing the
583	588	* attribute type to @KFD_IOCTL_SVM_ATTR_ACCESS and the value to the
584	589	* GPUID being queried. Multiple attributes can be given to allow
585	590	* querying multiple GPUIDs. The ioctl function overwrites the
586	591	* attribute type to indicate the access for the specified GPU.
587		− *
588		− * @KFD_IOCTL_SVM_ATTR_CLR_FLAGS is invalid for
589		− * @KFD_IOCTL_SVM_OP_GET_ATTR.
590	592	*/
591	593	struct kfd_ioctl_svm_args {
592	594	__u64 start_addr;

include/uapi/linux/kvm.h+7−4

@@ -1965,7 +1965,9 @@ struct kvm_stats_header { · 1964 unmodified lines
1965	1965	#define KVM_STATS_TYPE_CUMULATIVE (0x0 << KVM_STATS_TYPE_SHIFT)
1966	1966	#define KVM_STATS_TYPE_INSTANT (0x1 << KVM_STATS_TYPE_SHIFT)
1967	1967	#define KVM_STATS_TYPE_PEAK (0x2 << KVM_STATS_TYPE_SHIFT)
1968		−#define KVM_STATS_TYPE_MAX KVM_STATS_TYPE_PEAK
	1968	+#define KVM_STATS_TYPE_LINEAR_HIST (0x3 << KVM_STATS_TYPE_SHIFT)
	1969	+#define KVM_STATS_TYPE_LOG_HIST (0x4 << KVM_STATS_TYPE_SHIFT)
	1970	+#define KVM_STATS_TYPE_MAX KVM_STATS_TYPE_LOG_HIST
1969	1971
1970	1972	#define KVM_STATS_UNIT_SHIFT 4
1971	1973	#define KVM_STATS_UNIT_MASK (0xF << KVM_STATS_UNIT_SHIFT)
@@ -1988,8 +1990,9 @@ struct kvm_stats_header { · 16 unmodified lines
1988	1990	* @size: The number of data items for this stats.
1989	1991	* Every data item is of type __u64.
1990	1992	* @offset: The offset of the stats to the start of stat structure in
1991		− * struture kvm or kvm_vcpu.
1992		− * @unused: Unused field for future usage. Always 0 for now.
	1993	+ * structure kvm or kvm_vcpu.
	1994	+ * @bucket_size: A parameter value used for histogram stats. It is only used
	1995	+ * for linear histogram stats, specifying the size of the bucket;
1993	1996	* @name: The name string for the stats. Its size is indicated by the
1994	1997	* &kvm_stats_header->name_size.
1995	1998	*/
@@ -1998,7 +2001,7 @@ struct kvm_stats_desc { · 2 unmodified lines
1998	2001	__s16 exponent;
1999	2002	__u16 size;
2000	2003	__u32 offset;
2001		− __u32 unused;
	2004	+ __u32 bucket_size;
2002	2005	char name[];
2003	2006	};
2004	2007

include/uapi/linux/lightnvm.h+0−224

@@ -1,224 +0,0 @@
1		−/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2		−/*
3		− * Copyright (C) 2015 CNEX Labs. All rights reserved.
4		− *
5		− * This program is free software; you can redistribute it and/or
6		− * modify it under the terms of the GNU General Public License version
7		− * 2 as published by the Free Software Foundation.
8		− *
9		− * This program is distributed in the hope that it will be useful, but
10		− * WITHOUT ANY WARRANTY; without even the implied warranty of
11		− * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12		− * General Public License for more details.
13		− *
14		− * You should have received a copy of the GNU General Public License
15		− * along with this program; see the file COPYING. If not, write to
16		− * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139,
17		− * USA.
18		− */
19		−
20		−#ifndef _UAPI_LINUX_LIGHTNVM_H
21		−#define _UAPI_LINUX_LIGHTNVM_H
22		−
23		−#ifdef __KERNEL__
24		−#include <linux/const.h>
25		−#else /* __KERNEL__ */
26		−#include <stdio.h>
27		−#include <sys/ioctl.h>
28		−#define DISK_NAME_LEN 32
29		−#endif /* __KERNEL__ */
30		−
31		−#include <linux/types.h>
32		−#include <linux/ioctl.h>
33		−
34		−#define NVM_TTYPE_NAME_MAX 48
35		−#define NVM_TTYPE_MAX 63
36		−#define NVM_MMTYPE_LEN 8
37		−
38		−#define NVM_CTRL_FILE "/dev/lightnvm/control"
39		−
40		−struct nvm_ioctl_info_tgt {
41		− __u32 version[3];
42		− __u32 reserved;
43		− char tgtname[NVM_TTYPE_NAME_MAX];
44		−};
45		−
46		−struct nvm_ioctl_info {
47		− __u32 version[3]; /* in/out - major, minor, patch */
48		− __u16 tgtsize; /* number of targets */
49		− __u16 reserved16; /* pad to 4K page */
50		− __u32 reserved[12];
51		− struct nvm_ioctl_info_tgt tgts[NVM_TTYPE_MAX];
52		−};
53		−
54		−enum {
55		− NVM_DEVICE_ACTIVE = 1 << 0,
56		−};
57		−
58		−struct nvm_ioctl_device_info {
59		− char devname[DISK_NAME_LEN];
60		− char bmname[NVM_TTYPE_NAME_MAX];
61		− __u32 bmversion[3];
62		− __u32 flags;
63		− __u32 reserved[8];
64		−};
65		−
66		−struct nvm_ioctl_get_devices {
67		− __u32 nr_devices;
68		− __u32 reserved[31];
69		− struct nvm_ioctl_device_info info[31];
70		−};
71		−
72		−struct nvm_ioctl_create_simple {
73		− __u32 lun_begin;
74		− __u32 lun_end;
75		−};
76		−
77		−struct nvm_ioctl_create_extended {
78		− __u16 lun_begin;
79		− __u16 lun_end;
80		− __u16 op;
81		− __u16 rsv;
82		−};
83		−
84		−enum {
85		− NVM_CONFIG_TYPE_SIMPLE = 0,
86		− NVM_CONFIG_TYPE_EXTENDED = 1,
87		−};
88		−
89		−struct nvm_ioctl_create_conf {
90		− __u32 type;
91		− union {
92		− struct nvm_ioctl_create_simple s;
93		− struct nvm_ioctl_create_extended e;
94		− };
95		−};
96		−
97		−enum {
98		− NVM_TARGET_FACTORY = 1 << 0, /* Init target in factory mode */
99		−};
100		−
101		−struct nvm_ioctl_create {
102		− char dev[DISK_NAME_LEN]; /* open-channel SSD device */
103		− char tgttype[NVM_TTYPE_NAME_MAX]; /* target type name */
104		− char tgtname[DISK_NAME_LEN]; /* dev to expose target as */
105		−
106		− __u32 flags;
107		−
108		− struct nvm_ioctl_create_conf conf;
109		−};
110		−
111		−struct nvm_ioctl_remove {
112		− char tgtname[DISK_NAME_LEN];
113		−
114		− __u32 flags;
115		−};
116		−
117		−struct nvm_ioctl_dev_init {
118		− char dev[DISK_NAME_LEN]; /* open-channel SSD device */
119		− char mmtype[NVM_MMTYPE_LEN]; /* register to media manager */
120		−
121		− __u32 flags;
122		−};
123		−
124		−enum {
125		− NVM_FACTORY_ERASE_ONLY_USER = 1 << 0, /* erase only blocks used as
126		− * host blks or grown blks */
127		− NVM_FACTORY_RESET_HOST_BLKS = 1 << 1, /* remove host blk marks */
128		− NVM_FACTORY_RESET_GRWN_BBLKS = 1 << 2, /* remove grown blk marks */
129		− NVM_FACTORY_NR_BITS = 1 << 3, /* stops here */
130		−};
131		−
132		−struct nvm_ioctl_dev_factory {
133		− char dev[DISK_NAME_LEN];
134		−
135		− __u32 flags;
136		−};
137		−
138		−struct nvm_user_vio {
139		− __u8 opcode;
140		− __u8 flags;
141		− __u16 control;
142		− __u16 nppas;
143		− __u16 rsvd;
144		− __u64 metadata;
145		− __u64 addr;
146		− __u64 ppa_list;
147		− __u32 metadata_len;
148		− __u32 data_len;
149		− __u64 status;
150		− __u32 result;
151		− __u32 rsvd3[3];
152		−};
153		−
154		−struct nvm_passthru_vio {
155		− __u8 opcode;
156		− __u8 flags;
157		− __u8 rsvd[2];
158		− __u32 nsid;
159		− __u32 cdw2;
160		− __u32 cdw3;
161		− __u64 metadata;
162		− __u64 addr;
163		− __u32 metadata_len;
164		− __u32 data_len;
165		− __u64 ppa_list;
166		− __u16 nppas;
167		− __u16 control;
168		− __u32 cdw13;
169		− __u32 cdw14;
170		− __u32 cdw15;
171		− __u64 status;
172		− __u32 result;
173		− __u32 timeout_ms;
174		−};
175		−
176		−/* The ioctl type, 'L', 0x20 - 0x2F documented in ioctl-number.txt */
177		−enum {
178		− /* top level cmds */
179		− NVM_INFO_CMD = 0x20,
180		− NVM_GET_DEVICES_CMD,
181		−
182		− /* device level cmds */
183		− NVM_DEV_CREATE_CMD,
184		− NVM_DEV_REMOVE_CMD,
185		−
186		− /* Init a device to support LightNVM media managers */
187		− NVM_DEV_INIT_CMD,
188		−
189		− /* Factory reset device */
190		− NVM_DEV_FACTORY_CMD,
191		−
192		− /* Vector user I/O */
193		− NVM_DEV_VIO_ADMIN_CMD = 0x41,
194		− NVM_DEV_VIO_CMD = 0x42,
195		− NVM_DEV_VIO_USER_CMD = 0x43,
196		−};
197		−
198		−#define NVM_IOCTL 'L' /* 0x4c */
199		−
200		−#define NVM_INFO _IOWR(NVM_IOCTL, NVM_INFO_CMD, \
201		− struct nvm_ioctl_info)
202		−#define NVM_GET_DEVICES _IOR(NVM_IOCTL, NVM_GET_DEVICES_CMD, \
203		− struct nvm_ioctl_get_devices)
204		−#define NVM_DEV_CREATE _IOW(NVM_IOCTL, NVM_DEV_CREATE_CMD, \
205		− struct nvm_ioctl_create)
206		−#define NVM_DEV_REMOVE _IOW(NVM_IOCTL, NVM_DEV_REMOVE_CMD, \
207		− struct nvm_ioctl_remove)
208		−#define NVM_DEV_INIT _IOW(NVM_IOCTL, NVM_DEV_INIT_CMD, \
209		− struct nvm_ioctl_dev_init)
210		−#define NVM_DEV_FACTORY _IOW(NVM_IOCTL, NVM_DEV_FACTORY_CMD, \
211		− struct nvm_ioctl_dev_factory)
212		−
213		−#define NVME_NVM_IOCTL_IO_VIO _IOWR(NVM_IOCTL, NVM_DEV_VIO_USER_CMD, \
214		− struct nvm_passthru_vio)
215		−#define NVME_NVM_IOCTL_ADMIN_VIO _IOWR(NVM_IOCTL, NVM_DEV_VIO_ADMIN_CMD,\
216		− struct nvm_passthru_vio)
217		−#define NVME_NVM_IOCTL_SUBMIT_VIO _IOWR(NVM_IOCTL, NVM_DEV_VIO_CMD,\
218		− struct nvm_user_vio)
219		−
220		−#define NVM_VERSION_MAJOR 1
221		−#define NVM_VERSION_MINOR 0
222		−#define NVM_VERSION_PATCHLEVEL 0
223		−
224		−#endif

include/uapi/linux/lwtunnel.h+1−0

@@ -14,6 +14,7 @@ enum lwtunnel_encap_types { · 13 unmodified lines
14	14	LWTUNNEL_ENCAP_BPF,
15	15	LWTUNNEL_ENCAP_SEG6_LOCAL,
16	16	LWTUNNEL_ENCAP_RPL,
	17	+ LWTUNNEL_ENCAP_IOAM6,
17	18	__LWTUNNEL_ENCAP_MAX,
18	19	};
19	20

include/uapi/linux/mctp.h+36−0

@@ -0,0 +1,36 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
	2	+/*
	3	+ * Management Component Transport Protocol (MCTP)
	4	+ *
	5	+ * Copyright (c) 2021 Code Construct
	6	+ * Copyright (c) 2021 Google
	7	+ */
	8	+
	9	+#ifndef __UAPI_MCTP_H
	10	+#define __UAPI_MCTP_H
	11	+
	12	+#include <linux/types.h>
	13	+
	14	+typedef __u8 mctp_eid_t;
	15	+
	16	+struct mctp_addr {
	17	+ mctp_eid_t s_addr;
	18	+};
	19	+
	20	+struct sockaddr_mctp {
	21	+ unsigned short int smctp_family;
	22	+ int smctp_network;
	23	+ struct mctp_addr smctp_addr;
	24	+ __u8 smctp_type;
	25	+ __u8 smctp_tag;
	26	+};
	27	+
	28	+#define MCTP_NET_ANY 0x0
	29	+
	30	+#define MCTP_ADDR_NULL 0x00
	31	+#define MCTP_ADDR_ANY 0xff
	32	+
	33	+#define MCTP_TAG_MASK 0x07
	34	+#define MCTP_TAG_OWNER 0x08
	35	+
	36	+#endif /* __UAPI_MCTP_H */

include/uapi/linux/mempolicy.h+1−0

@@ -22,6 +22,7 @@ enum { · 21 unmodified lines
22	22	MPOL_BIND,
23	23	MPOL_INTERLEAVE,
24	24	MPOL_LOCAL,
	25	+ MPOL_PREFERRED_MANY,
25	26	MPOL_MAX, /* always last member of enum */
26	27	};
27	28

include/uapi/linux/mount.h+2−1

@@ -73,7 +73,8 @@ · 72 unmodified lines
73	73	#define MOVE_MOUNT_T_SYMLINKS 0x00000010 /* Follow symlinks on to path */
74	74	#define MOVE_MOUNT_T_AUTOMOUNTS 0x00000020 /* Follow automounts on to path */
75	75	#define MOVE_MOUNT_T_EMPTY_PATH 0x00000040 /* Empty to path permitted */
76		−#define MOVE_MOUNT__MASK 0x00000077
	76	+#define MOVE_MOUNT_SET_GROUP 0x00000100 /* Set sharing group instead */
	77	+#define MOVE_MOUNT__MASK 0x00000177
77	78
78	79	/*
79	80	* fsopen() flags.

include/uapi/linux/mptcp.h+1−0

@@ -73,6 +73,7 @@ enum { · 72 unmodified lines
73	73	#define MPTCP_PM_ADDR_FLAG_SIGNAL (1 << 0)
74	74	#define MPTCP_PM_ADDR_FLAG_SUBFLOW (1 << 1)
75	75	#define MPTCP_PM_ADDR_FLAG_BACKUP (1 << 2)
	76	+#define MPTCP_PM_ADDR_FLAG_FULLMESH (1 << 3)
76	77
77	78	enum {
78	79	MPTCP_PM_CMD_UNSPEC,

include/uapi/linux/neighbour.h+5−2

@@ -66,8 +66,11 @@ enum { · 65 unmodified lines
66	66	#define NUD_NONE 0x00
67	67
68	68	/* NUD_NOARP & NUD_PERMANENT are pseudostates, they never change
69		− and make no address resolution or NUD.
70		− NUD_PERMANENT also cannot be deleted by garbage collectors.
	69	+ * and make no address resolution or NUD.
	70	+ * NUD_PERMANENT also cannot be deleted by garbage collectors.
	71	+ * When NTF_EXT_LEARNED is set for a bridge fdb entry the different cache entry
	72	+ * states don't make sense and thus are ignored. Such entries don't age and
	73	+ * can roam.
71	74	*/
72	75
73	76	struct nda_cacheinfo {

include/uapi/linux/netfilter/nfnetlink_conntrack.h+2−0

@@ -56,6 +56,7 @@ enum ctattr_type { · 55 unmodified lines
56	56	CTA_LABELS_MASK,
57	57	CTA_SYNPROXY,
58	58	CTA_FILTER,
	59	+ CTA_STATUS_MASK,
59	60	__CTA_MAX
60	61	};
61	62	#define CTA_MAX (__CTA_MAX - 1)
@@ -257,6 +258,7 @@ enum ctattr_stats_cpu { · 195 unmodified lines
257	258	CTA_STATS_ERROR,
258	259	CTA_STATS_SEARCH_RESTART,
259	260	CTA_STATS_CLASH_RESOLVE,
	261	+ CTA_STATS_CHAIN_TOOLONG,
260	262	__CTA_STATS_MAX,
261	263	};
262	264	#define CTA_STATS_MAX (__CTA_STATS_MAX - 1)

include/uapi/linux/netfilter/nfnetlink_hook.h+9−0

@@ -43,6 +43,15 @@ enum nfnl_hook_chain_info_attributes { · 42 unmodified lines
43	43	};
44	44	#define NFNLA_HOOK_INFO_MAX (__NFNLA_HOOK_INFO_MAX - 1)
45	45
	46	+enum nfnl_hook_chain_desc_attributes {
	47	+ NFNLA_CHAIN_UNSPEC,
	48	+ NFNLA_CHAIN_TABLE,
	49	+ NFNLA_CHAIN_FAMILY,
	50	+ NFNLA_CHAIN_NAME,
	51	+ __NFNLA_CHAIN_MAX,
	52	+};
	53	+#define NFNLA_CHAIN_MAX (__NFNLA_CHAIN_MAX - 1)
	54	+
46	55	/**
47	56	* enum nfnl_hook_chaintype - chain type
48	57	*

include/uapi/linux/nfsd/nfsfh.h+0−1

@@ -33,7 +33,6 @@ struct nfs_fhbase_old { · 32 unmodified lines
33	33
34	34	/*
35	35	* This is the new flexible, extensible style NFSv2/v3/v4 file handle.
36		− * by Neil Brown <neilb@cse.unsw.edu.au> - March 2000
37	36	*
38	37	* The file handle starts with a sequence of four-byte words.
39	38	* The first word contains a version number (1) and three descriptor bytes

include/uapi/linux/nl80211-vnd-intel.h+77−0

@@ -0,0 +1,77 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
	2	+/*
	3	+ * Copyright (C) 2012-2014, 2018-2021 Intel Corporation
	4	+ * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
	5	+ * Copyright (C) 2016-2017 Intel Deutschland GmbH
	6	+ */
	7	+#ifndef __VENDOR_CMD_INTEL_H__
	8	+#define __VENDOR_CMD_INTEL_H__
	9	+
	10	+#define INTEL_OUI 0x001735
	11	+
	12	+/**
	13	+ * enum iwl_mvm_vendor_cmd - supported vendor commands
	14	+ * @IWL_MVM_VENDOR_CMD_GET_CSME_CONN_INFO: reports CSME connection info.
	15	+ * @IWL_MVM_VENDOR_CMD_HOST_GET_OWNERSHIP: asks for ownership on the device.
	16	+ * @IWL_MVM_VENDOR_CMD_ROAMING_FORBIDDEN_EVENT: notifies if roaming is allowed.
	17	+ * It contains a &IWL_MVM_VENDOR_ATTR_ROAMING_FORBIDDEN and a
	18	+ * &IWL_MVM_VENDOR_ATTR_VIF_ADDR attributes.
	19	+ */
	20	+
	21	+enum iwl_mvm_vendor_cmd {
	22	+ IWL_MVM_VENDOR_CMD_GET_CSME_CONN_INFO = 0x2d,
	23	+ IWL_MVM_VENDOR_CMD_HOST_GET_OWNERSHIP = 0x30,
	24	+ IWL_MVM_VENDOR_CMD_ROAMING_FORBIDDEN_EVENT = 0x32,
	25	+};
	26	+
	27	+enum iwl_vendor_auth_akm_mode {
	28	+ IWL_VENDOR_AUTH_OPEN,
	29	+ IWL_VENDOR_AUTH_RSNA = 0x6,
	30	+ IWL_VENDOR_AUTH_RSNA_PSK,
	31	+ IWL_VENDOR_AUTH_SAE = 0x9,
	32	+ IWL_VENDOR_AUTH_MAX,
	33	+};
	34	+
	35	+/**
	36	+ * enum iwl_mvm_vendor_attr - attributes used in vendor commands
	37	+ * @__IWL_MVM_VENDOR_ATTR_INVALID: attribute 0 is invalid
	38	+ * @IWL_MVM_VENDOR_ATTR_VIF_ADDR: interface MAC address
	39	+ * @IWL_MVM_VENDOR_ATTR_ADDR: MAC address
	40	+ * @IWL_MVM_VENDOR_ATTR_SSID: SSID (binary attribute, 0..32 octets)
	41	+ * @IWL_MVM_VENDOR_ATTR_STA_CIPHER: the cipher to use for the station with the
	42	+ * mac address specified in &IWL_MVM_VENDOR_ATTR_ADDR.
	43	+ * @IWL_MVM_VENDOR_ATTR_ROAMING_FORBIDDEN: u8 attribute. Indicates whether
	44	+ * roaming is forbidden or not. Value 1 means roaming is forbidden,
	45	+ * 0 mean roaming is allowed.
	46	+ * @IWL_MVM_VENDOR_ATTR_AUTH_MODE: u32 attribute. Authentication mode type
	47	+ * as specified in &enum iwl_vendor_auth_akm_mode.
	48	+ * @IWL_MVM_VENDOR_ATTR_CHANNEL_NUM: u8 attribute. Contains channel number.
	49	+ * @IWL_MVM_VENDOR_ATTR_BAND: u8 attribute.
	50	+ * 0 for 2.4 GHz band, 1 for 5.2GHz band and 2 for 6GHz band.
	51	+ * @IWL_MVM_VENDOR_ATTR_COLLOC_CHANNEL: u32 attribute. Channel number of
	52	+ * collocated AP. Relevant for 6GHz AP info.
	53	+ * @IWL_MVM_VENDOR_ATTR_COLLOC_ADDR: MAC address of a collocated AP.
	54	+ * Relevant for 6GHz AP info.
	55	+ *
	56	+ * @NUM_IWL_MVM_VENDOR_ATTR: number of vendor attributes
	57	+ * @MAX_IWL_MVM_VENDOR_ATTR: highest vendor attribute number
	58	+
	59	+ */
	60	+enum iwl_mvm_vendor_attr {
	61	+ __IWL_MVM_VENDOR_ATTR_INVALID = 0x00,
	62	+ IWL_MVM_VENDOR_ATTR_VIF_ADDR = 0x02,
	63	+ IWL_MVM_VENDOR_ATTR_ADDR = 0x0a,
	64	+ IWL_MVM_VENDOR_ATTR_SSID = 0x3d,
	65	+ IWL_MVM_VENDOR_ATTR_STA_CIPHER = 0x51,
	66	+ IWL_MVM_VENDOR_ATTR_ROAMING_FORBIDDEN = 0x64,
	67	+ IWL_MVM_VENDOR_ATTR_AUTH_MODE = 0x65,
	68	+ IWL_MVM_VENDOR_ATTR_CHANNEL_NUM = 0x66,
	69	+ IWL_MVM_VENDOR_ATTR_BAND = 0x69,
	70	+ IWL_MVM_VENDOR_ATTR_COLLOC_CHANNEL = 0x70,
	71	+ IWL_MVM_VENDOR_ATTR_COLLOC_ADDR = 0x71,
	72	+
	73	+ NUM_IWL_MVM_VENDOR_ATTR,
	74	+ MAX_IWL_MVM_VENDOR_ATTR = NUM_IWL_MVM_VENDOR_ATTR - 1,
	75	+};
	76	+
	77	+#endif /* __VENDOR_CMD_INTEL_H__ */

include/uapi/linux/nl80211.h+43−0

@@ -1185,6 +1185,21 @@ · 1184 unmodified lines
1185	1185	* passed using %NL80211_ATTR_SAR_SPEC. %NL80211_ATTR_WIPHY is used to
1186	1186	* specify the wiphy index to be applied to.
1187	1187	*
	1188	+ * @NL80211_CMD_OBSS_COLOR_COLLISION: This notification is sent out whenever
	1189	+ * mac80211/drv detects a bss color collision.
	1190	+ *
	1191	+ * @NL80211_CMD_COLOR_CHANGE_REQUEST: This command is used to indicate that
	1192	+ * userspace wants to change the BSS color.
	1193	+ *
	1194	+ * @NL80211_CMD_COLOR_CHANGE_STARTED: Notify userland, that a color change has
	1195	+ * started
	1196	+ *
	1197	+ * @NL80211_CMD_COLOR_CHANGE_ABORTED: Notify userland, that the color change has
	1198	+ * been aborted
	1199	+ *
	1200	+ * @NL80211_CMD_COLOR_CHANGE_COMPLETED: Notify userland that the color change
	1201	+ * has completed
	1202	+ *
1188	1203	* @NL80211_CMD_MAX: highest used command number
1189	1204	* @__NL80211_CMD_AFTER_LAST: internal use
1190	1205	*/
@@ -1417,6 +1432,14 @@ enum nl80211_commands { · 226 unmodified lines
1417	1432
1418	1433	NL80211_CMD_SET_SAR_SPECS,
1419	1434
	1435	+ NL80211_CMD_OBSS_COLOR_COLLISION,
	1436	+
	1437	+ NL80211_CMD_COLOR_CHANGE_REQUEST,
	1438	+
	1439	+ NL80211_CMD_COLOR_CHANGE_STARTED,
	1440	+ NL80211_CMD_COLOR_CHANGE_ABORTED,
	1441	+ NL80211_CMD_COLOR_CHANGE_COMPLETED,
	1442	+
1420	1443	/* add new commands above here */
1421	1444
1422	1445	/* used to define NL80211_CMD_MAX below */
@@ -2560,6 +2583,16 @@ enum nl80211_commands { · 1137 unmodified lines
2560	2583	* disassoc events to indicate that an immediate reconnect to the AP
2561	2584	* is desired.
2562	2585	*
	2586	+ * @NL80211_ATTR_OBSS_COLOR_BITMAP: bitmap of the u64 BSS colors for the
	2587	+ * %NL80211_CMD_OBSS_COLOR_COLLISION event.
	2588	+ *
	2589	+ * @NL80211_ATTR_COLOR_CHANGE_COUNT: u8 attribute specifying the number of TBTT's
	2590	+ * until the color switch event.
	2591	+ * @NL80211_ATTR_COLOR_CHANGE_COLOR: u8 attribute specifying the color that we are
	2592	+ * switching to
	2593	+ * @NL80211_ATTR_COLOR_CHANGE_ELEMS: Nested set of attributes containing the IE
	2594	+ * information for the time while performing a color switch.
	2595	+ *
2563	2596	* @NUM_NL80211_ATTR: total number of nl80211_attrs available
2564	2597	* @NL80211_ATTR_MAX: highest attribute number currently defined
2565	2598	* @__NL80211_ATTR_AFTER_LAST: internal use
@@ -3057,6 +3090,12 @@ enum nl80211_attrs { · 491 unmodified lines
3057	3090
3058	3091	NL80211_ATTR_DISABLE_HE,
3059	3092
	3093	+ NL80211_ATTR_OBSS_COLOR_BITMAP,
	3094	+
	3095	+ NL80211_ATTR_COLOR_CHANGE_COUNT,
	3096	+ NL80211_ATTR_COLOR_CHANGE_COLOR,
	3097	+ NL80211_ATTR_COLOR_CHANGE_ELEMS,
	3098	+
3060	3099	/* add attributes here, update the policy in nl80211.c */
3061	3100
3062	3101	__NL80211_ATTR_AFTER_LAST,
@@ -5953,6 +5992,9 @@ enum nl80211_feature_flags { · 2890 unmodified lines
5953	5992	* frame protection for all management frames exchanged during the
5954	5993	* negotiation and range measurement procedure.
5955	5994	*
	5995	+ * @NL80211_EXT_FEATURE_BSS_COLOR: The driver supports BSS color collision
	5996	+ * detection and change announcemnts.
	5997	+ *
5956	5998	* @NUM_NL80211_EXT_FEATURES: number of extended features.
5957	5999	* @MAX_NL80211_EXT_FEATURES: highest extended feature index.
5958	6000	*/
@@ -6017,6 +6059,7 @@ enum nl80211_ext_feature_index { · 58 unmodified lines
6017	6059	NL80211_EXT_FEATURE_SECURE_LTF,
6018	6060	NL80211_EXT_FEATURE_SECURE_RTT,
6019	6061	NL80211_EXT_FEATURE_PROT_RANGE_NEGO_AND_MEASURE,
	6062	+ NL80211_EXT_FEATURE_BSS_COLOR,
6020	6063
6021	6064	/* add new features before the definition below */
6022	6065	NUM_NL80211_EXT_FEATURES,

include/uapi/linux/openvswitch.h+8−0

@@ -70,6 +70,8 @@ enum ovs_datapath_cmd { · 69 unmodified lines
70	70	* set on the datapath port (for OVS_ACTION_ATTR_MISS). Only valid on
71	71	* %OVS_DP_CMD_NEW requests. A value of zero indicates that upcalls should
72	72	* not be sent.
	73	+ * @OVS_DP_ATTR_PER_CPU_PIDS: Per-cpu array of PIDs for upcalls when
	74	+ * OVS_DP_F_DISPATCH_UPCALL_PER_CPU feature is set.
73	75	* @OVS_DP_ATTR_STATS: Statistics about packets that have passed through the
74	76	* datapath. Always present in notifications.
75	77	* @OVS_DP_ATTR_MEGAFLOW_STATS: Statistics about mega flow masks usage for the
@@ -87,6 +89,9 @@ enum ovs_datapath_attr { · 11 unmodified lines
87	89	OVS_DP_ATTR_USER_FEATURES, /* OVS_DP_F_* */
88	90	OVS_DP_ATTR_PAD,
89	91	OVS_DP_ATTR_MASKS_CACHE_SIZE,
	92	+ OVS_DP_ATTR_PER_CPU_PIDS, /* Netlink PIDS to receive upcalls in
	93	+ * per-cpu dispatch mode
	94	+ */
90	95	__OVS_DP_ATTR_MAX
91	96	};
92	97
@@ -127,6 +132,9 @@ struct ovs_vport_stats { · 34 unmodified lines
127	132	/* Allow tc offload recirc sharing */
128	133	#define OVS_DP_F_TC_RECIRC_SHARING (1 << 2)
129	134
	135	+/* Allow per-cpu dispatch of upcalls */
	136	+#define OVS_DP_F_DISPATCH_UPCALL_PER_CPU (1 << 3)
	137	+
130	138	/* Fixed logical ports. */
131	139	#define OVSP_LOCAL ((__u32)0)
132	140

include/uapi/linux/pkt_cls.h+1−0

@@ -22,6 +22,7 @@ enum { · 21 unmodified lines
22	22	__TCA_ACT_MAX
23	23	};
24	24
	25	+/* See other TCA_ACT_FLAGS_ * flags in include/net/act_api.h. */
25	26	#define TCA_ACT_FLAGS_NO_PERCPU_STATS 1 /* Don't use percpu allocator for
26	27	* actions stats.
27	28	*/

include/uapi/linux/pkt_sched.h+2−0

@@ -827,6 +827,8 @@ struct tc_codel_xstats { · 826 unmodified lines
827	827
828	828	/* FQ_CODEL */
829	829
	830	+#define FQ_CODEL_QUANTUM_MAX (1 << 20)
	831	+
830	832	enum {
831	833	TCA_FQ_CODEL_UNSPEC,
832	834	TCA_FQ_CODEL_TARGET,

include/uapi/linux/prctl.h+7−5

@@ -213,6 +213,7 @@ struct prctl_mm_map { · 212 unmodified lines
213	213	/* Speculation control variants */
214	214	# define PR_SPEC_STORE_BYPASS 0
215	215	# define PR_SPEC_INDIRECT_BRANCH 1
	216	+# define PR_SPEC_L1D_FLUSH 2
216	217	/* Return and control values for PR_SET/GET_SPECULATION_CTRL */
217	218	# define PR_SPEC_NOT_AFFECTED 0
218	219	# define PR_SPEC_PRCTL (1UL << 0)
@@ -234,14 +235,15 @@ struct prctl_mm_map { · 15 unmodified lines
234	235	#define PR_GET_TAGGED_ADDR_CTRL 56
235	236	# define PR_TAGGED_ADDR_ENABLE (1UL << 0)
236	237	/* MTE tag check fault modes */
237		−# define PR_MTE_TCF_SHIFT 1
238		−# define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
239		−# define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
240		−# define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT)
241		−# define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
	238	+# define PR_MTE_TCF_NONE 0
	239	+# define PR_MTE_TCF_SYNC (1UL << 1)
	240	+# define PR_MTE_TCF_ASYNC (1UL << 2)
	241	+# define PR_MTE_TCF_MASK (PR_MTE_TCF_SYNC \| PR_MTE_TCF_ASYNC)
242	242	/* MTE tag inclusion mask */
243	243	# define PR_MTE_TAG_SHIFT 3
244	244	# define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
	245	+/* Unused; kept only for source compatibility */
	246	+# define PR_MTE_TCF_SHIFT 1
245	247
246	248	/* Control reclaim behavior when allocating memory */
247	249	#define PR_SET_IO_FLUSHER 57

include/uapi/linux/serial_reg.h+1−0

@@ -62,6 +62,7 @@ · 61 unmodified lines
62	62	* ST16C654: 8 16 56 60 8 16 32 56 PORT_16654
63	63	* TI16C750: 1 16 32 56 xx xx xx xx PORT_16750
64	64	* TI16C752: 8 16 56 60 8 16 32 56
	65	+ * OX16C950: 16 32 112 120 16 32 64 112 PORT_16C950
65	66	* Tegra: 1 4 8 14 16 8 4 1 PORT_TEGRA
66	67	*/
67	68	#define UART_FCR_R_TRIG_00 0x00

include/uapi/linux/socket.h+5−0

@@ -26,4 +26,9 @@ struct __kernel_sockaddr_storage { · 25 unmodified lines
26	26	};
27	27	};
28	28
	29	+#define SOCK_SNDBUF_LOCK 1
	30	+#define SOCK_RCVBUF_LOCK 2
	31	+
	32	+#define SOCK_BUF_LOCK_MASK (SOCK_SNDBUF_LOCK \| SOCK_RCVBUF_LOCK)
	33	+
29	34	#endif /* _UAPI_LINUX_SOCKET_H */

include/uapi/linux/target_core_user.h+2−0

@@ -46,6 +46,7 @@ · 45 unmodified lines
46	46	#define TCMU_MAILBOX_FLAG_CAP_OOOC (1 << 0) /* Out-of-order completions */
47	47	#define TCMU_MAILBOX_FLAG_CAP_READ_LEN (1 << 1) /* Read data length */
48	48	#define TCMU_MAILBOX_FLAG_CAP_TMR (1 << 2) /* TMR notifications */
	49	+#define TCMU_MAILBOX_FLAG_CAP_KEEP_BUF (1<<3) /* Keep buf after cmd completion */
49	50
50	51	struct tcmu_mailbox {
51	52	__u16 version;
@@ -75,6 +76,7 @@ struct tcmu_cmd_entry_hdr { · 23 unmodified lines
75	76	__u8 kflags;
76	77	#define TCMU_UFLAG_UNKNOWN_OP 0x1
77	78	#define TCMU_UFLAG_READ_LEN 0x2
	79	+#define TCMU_UFLAG_KEEP_BUF 0x4
78	80	__u8 uflags;
79	81
80	82	} __packed;

include/uapi/linux/tc_act/tc_skbmod.h+1−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	17	#define SKBMOD_F_SMAC 0x2
18	18	#define SKBMOD_F_ETYPE 0x4
19	19	#define SKBMOD_F_SWAPMAC 0x8
	20	+#define SKBMOD_F_ECN 0x10
20	21
21	22	struct tc_skbmod {
22	23	tc_gen;

include/uapi/linux/v4l2-controls.h+1−0

@@ -435,6 +435,7 @@ enum v4l2_mpeg_video_multi_slice_mode { · 434 unmodified lines
435	435	#define V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX (V4L2_CID_CODEC_BASE+233)
436	436	#define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234)
437	437	#define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235)
	438	+#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236)
438	439
439	440	/* CIDs for the MPEG-2 Part 2 (H.262) codec */
440	441	#define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270)

include/uapi/linux/vduse.h+306−0

@@ -0,0 +1,306 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
	2	+#ifndef _UAPI_VDUSE_H_
	3	+#define _UAPI_VDUSE_H_
	4	+
	5	+#include <linux/types.h>
	6	+
	7	+#define VDUSE_BASE 0x81
	8	+
	9	+/* The ioctls for control device (/dev/vduse/control) */
	10	+
	11	+#define VDUSE_API_VERSION 0
	12	+
	13	+/*
	14	+ * Get the version of VDUSE API that kernel supported (VDUSE_API_VERSION).
	15	+ * This is used for future extension.
	16	+ */
	17	+#define VDUSE_GET_API_VERSION _IOR(VDUSE_BASE, 0x00, __u64)
	18	+
	19	+/* Set the version of VDUSE API that userspace supported. */
	20	+#define VDUSE_SET_API_VERSION _IOW(VDUSE_BASE, 0x01, __u64)
	21	+
	22	+/**
	23	+ * struct vduse_dev_config - basic configuration of a VDUSE device
	24	+ * @name: VDUSE device name, needs to be NUL terminated
	25	+ * @vendor_id: virtio vendor id
	26	+ * @device_id: virtio device id
	27	+ * @features: virtio features
	28	+ * @vq_num: the number of virtqueues
	29	+ * @vq_align: the allocation alignment of virtqueue's metadata
	30	+ * @reserved: for future use, needs to be initialized to zero
	31	+ * @config_size: the size of the configuration space
	32	+ * @config: the buffer of the configuration space
	33	+ *
	34	+ * Structure used by VDUSE_CREATE_DEV ioctl to create VDUSE device.
	35	+ */
	36	+struct vduse_dev_config {
	37	+#define VDUSE_NAME_MAX 256
	38	+ char name[VDUSE_NAME_MAX];
	39	+ __u32 vendor_id;
	40	+ __u32 device_id;
	41	+ __u64 features;
	42	+ __u32 vq_num;
	43	+ __u32 vq_align;
	44	+ __u32 reserved[13];
	45	+ __u32 config_size;
	46	+ __u8 config[];
	47	+};
	48	+
	49	+/* Create a VDUSE device which is represented by a char device (/dev/vduse/$NAME) */
	50	+#define VDUSE_CREATE_DEV _IOW(VDUSE_BASE, 0x02, struct vduse_dev_config)
	51	+
	52	+/*
	53	+ * Destroy a VDUSE device. Make sure there are no more references
	54	+ * to the char device (/dev/vduse/$NAME).
	55	+ */
	56	+#define VDUSE_DESTROY_DEV _IOW(VDUSE_BASE, 0x03, char[VDUSE_NAME_MAX])
	57	+
	58	+/* The ioctls for VDUSE device (/dev/vduse/$NAME) */
	59	+
	60	+/**
	61	+ * struct vduse_iotlb_entry - entry of IOTLB to describe one IOVA region [start, last]
	62	+ * @offset: the mmap offset on returned file descriptor
	63	+ * @start: start of the IOVA region
	64	+ * @last: last of the IOVA region
	65	+ * @perm: access permission of the IOVA region
	66	+ *
	67	+ * Structure used by VDUSE_IOTLB_GET_FD ioctl to find an overlapped IOVA region.
	68	+ */
	69	+struct vduse_iotlb_entry {
	70	+ __u64 offset;
	71	+ __u64 start;
	72	+ __u64 last;
	73	+#define VDUSE_ACCESS_RO 0x1
	74	+#define VDUSE_ACCESS_WO 0x2
	75	+#define VDUSE_ACCESS_RW 0x3
	76	+ __u8 perm;
	77	+};
	78	+
	79	+/*
	80	+ * Find the first IOVA region that overlaps with the range [start, last]
	81	+ * and return the corresponding file descriptor. Return -EINVAL means the
	82	+ * IOVA region doesn't exist. Caller should set start and last fields.
	83	+ */
	84	+#define VDUSE_IOTLB_GET_FD _IOWR(VDUSE_BASE, 0x10, struct vduse_iotlb_entry)
	85	+
	86	+/*
	87	+ * Get the negotiated virtio features. It's a subset of the features in
	88	+ * struct vduse_dev_config which can be accepted by virtio driver. It's
	89	+ * only valid after FEATURES_OK status bit is set.
	90	+ */
	91	+#define VDUSE_DEV_GET_FEATURES _IOR(VDUSE_BASE, 0x11, __u64)
	92	+
	93	+/**
	94	+ * struct vduse_config_data - data used to update configuration space
	95	+ * @offset: the offset from the beginning of configuration space
	96	+ * @length: the length to write to configuration space
	97	+ * @buffer: the buffer used to write from
	98	+ *
	99	+ * Structure used by VDUSE_DEV_SET_CONFIG ioctl to update device
	100	+ * configuration space.
	101	+ */
	102	+struct vduse_config_data {
	103	+ __u32 offset;
	104	+ __u32 length;
	105	+ __u8 buffer[];
	106	+};
	107	+
	108	+/* Set device configuration space */
	109	+#define VDUSE_DEV_SET_CONFIG _IOW(VDUSE_BASE, 0x12, struct vduse_config_data)
	110	+
	111	+/*
	112	+ * Inject a config interrupt. It's usually used to notify virtio driver
	113	+ * that device configuration space has changed.
	114	+ */
	115	+#define VDUSE_DEV_INJECT_CONFIG_IRQ _IO(VDUSE_BASE, 0x13)
	116	+
	117	+/**
	118	+ * struct vduse_vq_config - basic configuration of a virtqueue
	119	+ * @index: virtqueue index
	120	+ * @max_size: the max size of virtqueue
	121	+ * @reserved: for future use, needs to be initialized to zero
	122	+ *
	123	+ * Structure used by VDUSE_VQ_SETUP ioctl to setup a virtqueue.
	124	+ */
	125	+struct vduse_vq_config {
	126	+ __u32 index;
	127	+ __u16 max_size;
	128	+ __u16 reserved[13];
	129	+};
	130	+
	131	+/*
	132	+ * Setup the specified virtqueue. Make sure all virtqueues have been
	133	+ * configured before the device is attached to vDPA bus.
	134	+ */
	135	+#define VDUSE_VQ_SETUP _IOW(VDUSE_BASE, 0x14, struct vduse_vq_config)
	136	+
	137	+/**
	138	+ * struct vduse_vq_state_split - split virtqueue state
	139	+ * @avail_index: available index
	140	+ */
	141	+struct vduse_vq_state_split {
	142	+ __u16 avail_index;
	143	+};
	144	+
	145	+/**
	146	+ * struct vduse_vq_state_packed - packed virtqueue state
	147	+ * @last_avail_counter: last driver ring wrap counter observed by device
	148	+ * @last_avail_idx: device available index
	149	+ * @last_used_counter: device ring wrap counter
	150	+ * @last_used_idx: used index
	151	+ */
	152	+struct vduse_vq_state_packed {
	153	+ __u16 last_avail_counter;
	154	+ __u16 last_avail_idx;
	155	+ __u16 last_used_counter;
	156	+ __u16 last_used_idx;
	157	+};
	158	+
	159	+/**
	160	+ * struct vduse_vq_info - information of a virtqueue
	161	+ * @index: virtqueue index
	162	+ * @num: the size of virtqueue
	163	+ * @desc_addr: address of desc area
	164	+ * @driver_addr: address of driver area
	165	+ * @device_addr: address of device area
	166	+ * @split: split virtqueue state
	167	+ * @packed: packed virtqueue state
	168	+ * @ready: ready status of virtqueue
	169	+ *
	170	+ * Structure used by VDUSE_VQ_GET_INFO ioctl to get virtqueue's information.
	171	+ */
	172	+struct vduse_vq_info {
	173	+ __u32 index;
	174	+ __u32 num;
	175	+ __u64 desc_addr;
	176	+ __u64 driver_addr;
	177	+ __u64 device_addr;
	178	+ union {
	179	+ struct vduse_vq_state_split split;
	180	+ struct vduse_vq_state_packed packed;
	181	+ };
	182	+ __u8 ready;
	183	+};
	184	+
	185	+/* Get the specified virtqueue's information. Caller should set index field. */
	186	+#define VDUSE_VQ_GET_INFO _IOWR(VDUSE_BASE, 0x15, struct vduse_vq_info)
	187	+
	188	+/**
	189	+ * struct vduse_vq_eventfd - eventfd configuration for a virtqueue
	190	+ * @index: virtqueue index
	191	+ * @fd: eventfd, -1 means de-assigning the eventfd
	192	+ *
	193	+ * Structure used by VDUSE_VQ_SETUP_KICKFD ioctl to setup kick eventfd.
	194	+ */
	195	+struct vduse_vq_eventfd {
	196	+ __u32 index;
	197	+#define VDUSE_EVENTFD_DEASSIGN -1
	198	+ int fd;
	199	+};
	200	+
	201	+/*
	202	+ * Setup kick eventfd for specified virtqueue. The kick eventfd is used
	203	+ * by VDUSE kernel module to notify userspace to consume the avail vring.
	204	+ */
	205	+#define VDUSE_VQ_SETUP_KICKFD _IOW(VDUSE_BASE, 0x16, struct vduse_vq_eventfd)
	206	+
	207	+/*
	208	+ * Inject an interrupt for specific virtqueue. It's used to notify virtio driver
	209	+ * to consume the used vring.
	210	+ */
	211	+#define VDUSE_VQ_INJECT_IRQ _IOW(VDUSE_BASE, 0x17, __u32)
	212	+
	213	+/* The control messages definition for read(2)/write(2) on /dev/vduse/$NAME */
	214	+
	215	+/**
	216	+ * enum vduse_req_type - request type
	217	+ * @VDUSE_GET_VQ_STATE: get the state for specified virtqueue from userspace
	218	+ * @VDUSE_SET_STATUS: set the device status
	219	+ * @VDUSE_UPDATE_IOTLB: Notify userspace to update the memory mapping for
	220	+ * specified IOVA range via VDUSE_IOTLB_GET_FD ioctl
	221	+ */
	222	+enum vduse_req_type {
	223	+ VDUSE_GET_VQ_STATE,
	224	+ VDUSE_SET_STATUS,
	225	+ VDUSE_UPDATE_IOTLB,
	226	+};
	227	+
	228	+/**
	229	+ * struct vduse_vq_state - virtqueue state
	230	+ * @index: virtqueue index
	231	+ * @split: split virtqueue state
	232	+ * @packed: packed virtqueue state
	233	+ */
	234	+struct vduse_vq_state {
	235	+ __u32 index;
	236	+ union {
	237	+ struct vduse_vq_state_split split;
	238	+ struct vduse_vq_state_packed packed;
	239	+ };
	240	+};
	241	+
	242	+/**
	243	+ * struct vduse_dev_status - device status
	244	+ * @status: device status
	245	+ */
	246	+struct vduse_dev_status {
	247	+ __u8 status;
	248	+};
	249	+
	250	+/**
	251	+ * struct vduse_iova_range - IOVA range [start, last]
	252	+ * @start: start of the IOVA range
	253	+ * @last: last of the IOVA range
	254	+ */
	255	+struct vduse_iova_range {
	256	+ __u64 start;
	257	+ __u64 last;
	258	+};
	259	+
	260	+/**
	261	+ * struct vduse_dev_request - control request
	262	+ * @type: request type
	263	+ * @request_id: request id
	264	+ * @reserved: for future use
	265	+ * @vq_state: virtqueue state, only index field is available
	266	+ * @s: device status
	267	+ * @iova: IOVA range for updating
	268	+ * @padding: padding
	269	+ *
	270	+ * Structure used by read(2) on /dev/vduse/$NAME.
	271	+ */
	272	+struct vduse_dev_request {
	273	+ __u32 type;
	274	+ __u32 request_id;
	275	+ __u32 reserved[4];
	276	+ union {
	277	+ struct vduse_vq_state vq_state;
	278	+ struct vduse_dev_status s;
	279	+ struct vduse_iova_range iova;
	280	+ __u32 padding[32];
	281	+ };
	282	+};
	283	+
	284	+/**
	285	+ * struct vduse_dev_response - response to control request
	286	+ * @request_id: corresponding request id
	287	+ * @result: the result of request
	288	+ * @reserved: for future use, needs to be initialized to zero
	289	+ * @vq_state: virtqueue state
	290	+ * @padding: padding
	291	+ *
	292	+ * Structure used by write(2) on /dev/vduse/$NAME.
	293	+ */
	294	+struct vduse_dev_response {
	295	+ __u32 request_id;
	296	+#define VDUSE_REQ_RESULT_OK 0x00
	297	+#define VDUSE_REQ_RESULT_FAILED 0x01
	298	+ __u32 result;
	299	+ __u32 reserved[4];
	300	+ union {
	301	+ struct vduse_vq_state vq_state;
	302	+ __u32 padding[32];
	303	+ };
	304	+};
	305	+
	306	+#endif /* _UAPI_VDUSE_H_ */

include/uapi/linux/virtio_gpio.h+47−0

@@ -0,0 +1,47 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
	2	+
	3	+#ifndef _LINUX_VIRTIO_GPIO_H
	4	+#define _LINUX_VIRTIO_GPIO_H
	5	+
	6	+#include <linux/types.h>
	7	+
	8	+/* Virtio GPIO request types */
	9	+#define VIRTIO_GPIO_MSG_GET_NAMES 0x0001
	10	+#define VIRTIO_GPIO_MSG_GET_DIRECTION 0x0002
	11	+#define VIRTIO_GPIO_MSG_SET_DIRECTION 0x0003
	12	+#define VIRTIO_GPIO_MSG_GET_VALUE 0x0004
	13	+#define VIRTIO_GPIO_MSG_SET_VALUE 0x0005
	14	+
	15	+/* Possible values of the status field */
	16	+#define VIRTIO_GPIO_STATUS_OK 0x0
	17	+#define VIRTIO_GPIO_STATUS_ERR 0x1
	18	+
	19	+/* Direction types */
	20	+#define VIRTIO_GPIO_DIRECTION_NONE 0x00
	21	+#define VIRTIO_GPIO_DIRECTION_OUT 0x01
	22	+#define VIRTIO_GPIO_DIRECTION_IN 0x02
	23	+
	24	+struct virtio_gpio_config {
	25	+ __le16 ngpio;
	26	+ __u8 padding[2];
	27	+ __le32 gpio_names_size;
	28	+} __packed;
	29	+
	30	+/* Virtio GPIO Request / Response */
	31	+struct virtio_gpio_request {
	32	+ __le16 type;
	33	+ __le16 gpio;
	34	+ __le32 value;
	35	+};
	36	+
	37	+struct virtio_gpio_response {
	38	+ __u8 status;
	39	+ __u8 value;
	40	+};
	41	+
	42	+struct virtio_gpio_response_get_names {
	43	+ __u8 status;
	44	+ __u8 value[];
	45	+};
	46	+
	47	+#endif /* _LINUX_VIRTIO_GPIO_H */

include/uapi/linux/virtio_i2c.h+41−0

@@ -0,0 +1,41 @@
	1	+/* SPDX-License-Identifier: GPL-2.0-or-later WITH Linux-syscall-note */
	2	+/*
	3	+ * Definitions for virtio I2C Adpter
	4	+ *
	5	+ * Copyright (c) 2021 Intel Corporation. All rights reserved.
	6	+ */
	7	+
	8	+#ifndef _UAPI_LINUX_VIRTIO_I2C_H
	9	+#define _UAPI_LINUX_VIRTIO_I2C_H
	10	+
	11	+#include <linux/const.h>
	12	+#include <linux/types.h>
	13	+
	14	+/* The bit 0 of the @virtio_i2c_out_hdr.@flags, used to group the requests */
	15	+#define VIRTIO_I2C_FLAGS_FAIL_NEXT _BITUL(0)
	16	+
	17	+/**
	18	+ * struct virtio_i2c_out_hdr - the virtio I2C message OUT header
	19	+ * @addr: the controlled device address
	20	+ * @padding: used to pad to full dword
	21	+ * @flags: used for feature extensibility
	22	+ */
	23	+struct virtio_i2c_out_hdr {
	24	+ __le16 addr;
	25	+ __le16 padding;
	26	+ __le32 flags;
	27	+};
	28	+
	29	+/**
	30	+ * struct virtio_i2c_in_hdr - the virtio I2C message IN header
	31	+ * @status: the processing result from the backend
	32	+ */
	33	+struct virtio_i2c_in_hdr {
	34	+ __u8 status;
	35	+};
	36	+
	37	+/* The final status written by the device */
	38	+#define VIRTIO_I2C_MSG_OK 0
	39	+#define VIRTIO_I2C_MSG_ERR 1
	40	+
	41	+#endif /* _UAPI_LINUX_VIRTIO_I2C_H */

include/uapi/linux/virtio_ids.h+12−0

@@ -54,8 +54,20 @@ · 53 unmodified lines
54	54	#define VIRTIO_ID_SOUND 25 /* virtio sound */
55	55	#define VIRTIO_ID_FS 26 /* virtio filesystem */
56	56	#define VIRTIO_ID_PMEM 27 /* virtio pmem */
	57	+#define VIRTIO_ID_RPMB 28 /* virtio rpmb */
57	58	#define VIRTIO_ID_MAC80211_HWSIM 29 /* virtio mac80211-hwsim */
	59	+#define VIRTIO_ID_VIDEO_ENCODER 30 /* virtio video encoder */
	60	+#define VIRTIO_ID_VIDEO_DECODER 31 /* virtio video decoder */
	61	+#define VIRTIO_ID_SCMI 32 /* virtio SCMI */
	62	+#define VIRTIO_ID_NITRO_SEC_MOD 33 /* virtio nitro secure module*/
	63	+#define VIRTIO_ID_I2C_ADAPTER 34 /* virtio i2c adapter */
	64	+#define VIRTIO_ID_WATCHDOG 35 /* virtio watchdog */
	65	+#define VIRTIO_ID_CAN 36 /* virtio can */
	66	+#define VIRTIO_ID_DMABUF 37 /* virtio dmabuf */
	67	+#define VIRTIO_ID_PARAM_SERV 38 /* virtio parameter server */
	68	+#define VIRTIO_ID_AUDIO_POLICY 39 /* virtio audio policy */
58	69	#define VIRTIO_ID_BT 40 /* virtio bluetooth */
	70	+#define VIRTIO_ID_GPIO 41 /* virtio gpio */
59	71
60	72	/*
61	73	* Virtio Transitional IDs

include/uapi/linux/virtio_pcidev.h+3−2

@@ -9,13 +9,14 @@ · 8 unmodified lines
9	9
10	10	/**
11	11	* enum virtio_pcidev_ops - virtual PCI device operations
	12	+ * @VIRTIO_PCIDEV_OP_RESERVED: reserved to catch errors
12	13	* @VIRTIO_PCIDEV_OP_CFG_READ: read config space, size is 1, 2, 4 or 8;
13	14	* the @data field should be filled in by the device (in little endian).
14	15	* @VIRTIO_PCIDEV_OP_CFG_WRITE: write config space, size is 1, 2, 4 or 8;
15	16	* the @data field contains the data to write (in little endian).
16		− * @VIRTIO_PCIDEV_OP_BAR_READ: read BAR mem/pio, size can be variable;
	17	+ * @VIRTIO_PCIDEV_OP_MMIO_READ: read BAR mem/pio, size can be variable;
17	18	* the @data field should be filled in by the device (in little endian).
18		− * @VIRTIO_PCIDEV_OP_BAR_WRITE: write BAR mem/pio, size can be variable;
	19	+ * @VIRTIO_PCIDEV_OP_MMIO_WRITE: write BAR mem/pio, size can be variable;
19	20	* the @data field contains the data to write (in little endian).
20	21	* @VIRTIO_PCIDEV_OP_MMIO_MEMSET: memset MMIO, size is variable but
21	22	* the @data field only has one byte (unlike @VIRTIO_PCIDEV_OP_MMIO_WRITE)

include/uapi/linux/virtio_scmi.h+24−0

@@ -0,0 +1,24 @@
	1	+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
	2	+/*
	3	+ * Copyright (C) 2020-2021 OpenSynergy GmbH
	4	+ * Copyright (C) 2021 ARM Ltd.
	5	+ */
	6	+
	7	+#ifndef _UAPI_LINUX_VIRTIO_SCMI_H
	8	+#define _UAPI_LINUX_VIRTIO_SCMI_H
	9	+
	10	+#include <linux/virtio_types.h>
	11	+
	12	+/* Device implements some SCMI notifications, or delayed responses. */
	13	+#define VIRTIO_SCMI_F_P2A_CHANNELS 0
	14	+
	15	+/* Device implements any SCMI statistics shared memory region */
	16	+#define VIRTIO_SCMI_F_SHARED_MEMORY 1
	17	+
	18	+/* Virtqueues */
	19	+
	20	+#define VIRTIO_SCMI_VQ_TX 0 /* cmdq */
	21	+#define VIRTIO_SCMI_VQ_RX 1 /* eventq */
	22	+#define VIRTIO_SCMI_VQ_MAX_CNT 2
	23	+
	24	+#endif /* _UAPI_LINUX_VIRTIO_SCMI_H */

include/uapi/linux/virtio_vsock.h+2−1

@@ -97,7 +97,8 @@ enum virtio_vsock_shutdown { · 96 unmodified lines
97	97
98	98	/* VIRTIO_VSOCK_OP_RW flags values */
99	99	enum virtio_vsock_rw {
100		− VIRTIO_VSOCK_SEQ_EOR = 1,
	100	+ VIRTIO_VSOCK_SEQ_EOM = 1,
	101	+ VIRTIO_VSOCK_SEQ_EOR = 2,
101	102	};
102	103
103	104	#endif /* _UAPI_LINUX_VIRTIO_VSOCK_H */

include/uapi/linux/xfrm.h+11−0

@@ -213,6 +213,11 @@ enum { · 212 unmodified lines
213	213	XFRM_MSG_GETSPDINFO,
214	214	#define XFRM_MSG_GETSPDINFO XFRM_MSG_GETSPDINFO
215	215
	216	+ XFRM_MSG_SETDEFAULT,
	217	+#define XFRM_MSG_SETDEFAULT XFRM_MSG_SETDEFAULT
	218	+ XFRM_MSG_GETDEFAULT,
	219	+#define XFRM_MSG_GETDEFAULT XFRM_MSG_GETDEFAULT
	220	+
216	221	XFRM_MSG_MAPPING,
217	222	#define XFRM_MSG_MAPPING XFRM_MSG_MAPPING
218	223	__XFRM_MSG_MAX
@@ -508,6 +513,12 @@ struct xfrm_user_offload { · 289 unmodified lines
508	513	#define XFRM_OFFLOAD_IPV6 1
509	514	#define XFRM_OFFLOAD_INBOUND 2
510	515
	516	+struct xfrm_userpolicy_default {
	517	+#define XFRM_USERPOLICY_DIRMASK_MAX (sizeof(__u8) * 8)
	518	+ __u8 dirmask;
	519	+ __u8 action;
	520	+};
	521	+
511	522	#ifndef __KERNEL__
512	523	/* backwards compatibility for userspace */
513	524	#define XFRMGRP_ACQUIRE 1

include/uapi/misc/habanalabs.h+166−20

@@ -276,7 +276,17 @@ enum hl_device_status { · 275 unmodified lines
276	276	HL_DEVICE_STATUS_OPERATIONAL,
277	277	HL_DEVICE_STATUS_IN_RESET,
278	278	HL_DEVICE_STATUS_MALFUNCTION,
279		− HL_DEVICE_STATUS_NEEDS_RESET
	279	+ HL_DEVICE_STATUS_NEEDS_RESET,
	280	+ HL_DEVICE_STATUS_IN_DEVICE_CREATION,
	281	+ HL_DEVICE_STATUS_LAST = HL_DEVICE_STATUS_IN_DEVICE_CREATION
	282	+};
	283	+
	284	+enum hl_server_type {
	285	+ HL_SERVER_TYPE_UNKNOWN = 0,
	286	+ HL_SERVER_GAUDI_HLS1 = 1,
	287	+ HL_SERVER_GAUDI_HLS1H = 2,
	288	+ HL_SERVER_GAUDI_TYPE1 = 3,
	289	+ HL_SERVER_GAUDI_TYPE2 = 4
280	290	};
281	291
282	292	/* Opcode for management ioctl
@@ -337,17 +347,49 @@ enum hl_device_status { · 54 unmodified lines
337	347	#define HL_INFO_VERSION_MAX_LEN 128
338	348	#define HL_INFO_CARD_NAME_MAX_LEN 16
339	349
	350	+/**
	351	+ * struct hl_info_hw_ip_info - hardware information on various IPs in the ASIC
	352	+ * @sram_base_address: The first SRAM physical base address that is free to be
	353	+ * used by the user.
	354	+ * @dram_base_address: The first DRAM virtual or physical base address that is
	355	+ * free to be used by the user.
	356	+ * @dram_size: The DRAM size that is available to the user.
	357	+ * @sram_size: The SRAM size that is available to the user.
	358	+ * @num_of_events: The number of events that can be received from the f/w. This
	359	+ * is needed so the user can what is the size of the h/w events
	360	+ * array he needs to pass to the kernel when he wants to fetch
	361	+ * the event counters.
	362	+ * @device_id: PCI device ID of the ASIC.
	363	+ * @module_id: Module ID of the ASIC for mezzanine cards in servers
	364	+ * (From OCP spec).
	365	+ * @first_available_interrupt_id: The first available interrupt ID for the user
	366	+ * to be used when it works with user interrupts.
	367	+ * @server_type: Server type that the Gaudi ASIC is currently installed in.
	368	+ * The value is according to enum hl_server_type
	369	+ * @cpld_version: CPLD version on the board.
	370	+ * @psoc_pci_pll_nr: PCI PLL NR value. Needed by the profiler in some ASICs.
	371	+ * @psoc_pci_pll_nf: PCI PLL NF value. Needed by the profiler in some ASICs.
	372	+ * @psoc_pci_pll_od: PCI PLL OD value. Needed by the profiler in some ASICs.
	373	+ * @psoc_pci_pll_div_factor: PCI PLL DIV factor value. Needed by the profiler
	374	+ * in some ASICs.
	375	+ * @tpc_enabled_mask: Bit-mask that represents which TPCs are enabled. Relevant
	376	+ * for Goya/Gaudi only.
	377	+ * @dram_enabled: Whether the DRAM is enabled.
	378	+ * @cpucp_version: The CPUCP f/w version.
	379	+ * @card_name: The card name as passed by the f/w.
	380	+ * @dram_page_size: The DRAM physical page size.
	381	+ */
340	382	struct hl_info_hw_ip_info {
341	383	__u64 sram_base_address;
342	384	__u64 dram_base_address;
343	385	__u64 dram_size;
344	386	__u32 sram_size;
345	387	__u32 num_of_events;
346		− __u32 device_id; /* PCI Device ID */
347		− __u32 module_id; /* For mezzanine cards in servers (From OCP spec.) */
	388	+ __u32 device_id;
	389	+ __u32 module_id;
348	390	__u32 reserved;
349	391	__u16 first_available_interrupt_id;
350		− __u16 reserved2;
	392	+ __u16 server_type;
351	393	__u32 cpld_version;
352	394	__u32 psoc_pci_pll_nr;
353	395	__u32 psoc_pci_pll_nf;
@@ -358,7 +400,7 @@ struct hl_info_hw_ip_info { · 4 unmodified lines
358	400	__u8 pad[2];
359	401	__u8 cpucp_version[HL_INFO_VERSION_MAX_LEN];
360	402	__u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
361		− __u64 reserved3;
	403	+ __u64 reserved2;
362	404	__u64 dram_page_size;
363	405	};
364	406
@@ -628,12 +670,21 @@ struct hl_cs_chunk { · 263 unmodified lines
628	670	__u64 cb_handle;
629	671
630	672	/* Relevant only when HL_CS_FLAGS_WAIT or
631		− * HL_CS_FLAGS_COLLECTIVE_WAIT is set.
	673	+ * HL_CS_FLAGS_COLLECTIVE_WAIT is set
632	674	* This holds address of array of u64 values that contain
633		− * signal CS sequence numbers. The wait described by this job
634		− * will listen on all those signals (wait event per signal)
	675	+ * signal CS sequence numbers. The wait described by
	676	+ * this job will listen on all those signals
	677	+ * (wait event per signal)
635	678	*/
636	679	__u64 signal_seq_arr;
	680	+
	681	+ /*
	682	+ * Relevant only when HL_CS_FLAGS_WAIT or
	683	+ * HL_CS_FLAGS_COLLECTIVE_WAIT is set
	684	+ * along with HL_CS_FLAGS_ENCAP_SIGNALS.
	685	+ * This is the CS sequence which has the encapsulated signals.
	686	+ */
	687	+ __u64 encaps_signal_seq;
637	688	};
638	689
639	690	/* Index of queue to put the CB on */
@@ -651,6 +702,17 @@ struct hl_cs_chunk { · 11 unmodified lines
651	702	* Number of entries in signal_seq_arr
652	703	*/
653	704	__u32 num_signal_seq_arr;
	705	+
	706	+ /* Relevant only when HL_CS_FLAGS_WAIT or
	707	+ * HL_CS_FLAGS_COLLECTIVE_WAIT is set along
	708	+ * with HL_CS_FLAGS_ENCAP_SIGNALS
	709	+ * This set the signals range that the user want to wait for
	710	+ * out of the whole reserved signals range.
	711	+ * e.g if the signals range is 20, and user don't want
	712	+ * to wait for signal 8, so he set this offset to 7, then
	713	+ * he call the API again with 9 and so on till 20.
	714	+ */
	715	+ __u32 encaps_signal_offset;
654	716	};
655	717
656	718	/* HL_CS_CHUNK_FLAGS_* */
@@ -678,6 +740,28 @@ struct hl_cs_chunk { · 21 unmodified lines
678	740	#define HL_CS_FLAGS_CUSTOM_TIMEOUT 0x200
679	741	#define HL_CS_FLAGS_SKIP_RESET_ON_TIMEOUT 0x400
680	742
	743	+/*
	744	+ * The encapsulated signals CS is merged into the existing CS ioctls.
	745	+ * In order to use this feature need to follow the below procedure:
	746	+ * 1. Reserve signals, set the CS type to HL_CS_FLAGS_RESERVE_SIGNALS_ONLY
	747	+ * the output of this API will be the SOB offset from CFG_BASE.
	748	+ * this address will be used to patch CB cmds to do the signaling for this
	749	+ * SOB by incrementing it's value.
	750	+ * for reverting the reservation use HL_CS_FLAGS_UNRESERVE_SIGNALS_ONLY
	751	+ * CS type, note that this might fail if out-of-sync happened to the SOB
	752	+ * value, in case other signaling request to the same SOB occurred between
	753	+ * reserve-unreserve calls.
	754	+ * 2. Use the staged CS to do the encapsulated signaling jobs.
	755	+ * use HL_CS_FLAGS_STAGED_SUBMISSION and HL_CS_FLAGS_STAGED_SUBMISSION_FIRST
	756	+ * along with HL_CS_FLAGS_ENCAP_SIGNALS flag, and set encaps_signal_offset
	757	+ * field. This offset allows app to wait on part of the reserved signals.
	758	+ * 3. Use WAIT/COLLECTIVE WAIT CS along with HL_CS_FLAGS_ENCAP_SIGNALS flag
	759	+ * to wait for the encapsulated signals.
	760	+ */
	761	+#define HL_CS_FLAGS_ENCAP_SIGNALS 0x800
	762	+#define HL_CS_FLAGS_RESERVE_SIGNALS_ONLY 0x1000
	763	+#define HL_CS_FLAGS_UNRESERVE_SIGNALS_ONLY 0x2000
	764	+
681	765	#define HL_CS_STATUS_SUCCESS 0
682	766
683	767	#define HL_MAX_JOBS_PER_CS 512
@@ -690,10 +774,35 @@ struct hl_cs_in { · 6 unmodified lines
690	774	/* holds address of array of hl_cs_chunk for execution phase */
691	775	__u64 chunks_execute;
692	776
693		− /* Sequence number of a staged submission CS
694		− * valid only if HL_CS_FLAGS_STAGED_SUBMISSION is set
695		− */
696		− __u64 seq;
	777	+ union {
	778	+ /*
	779	+ * Sequence number of a staged submission CS
	780	+ * valid only if HL_CS_FLAGS_STAGED_SUBMISSION is set and
	781	+ * HL_CS_FLAGS_STAGED_SUBMISSION_FIRST is unset.
	782	+ */
	783	+ __u64 seq;
	784	+
	785	+ /*
	786	+ * Encapsulated signals handle id
	787	+ * Valid for two flows:
	788	+ * 1. CS with encapsulated signals:
	789	+ * when HL_CS_FLAGS_STAGED_SUBMISSION and
	790	+ * HL_CS_FLAGS_STAGED_SUBMISSION_FIRST
	791	+ * and HL_CS_FLAGS_ENCAP_SIGNALS are set.
	792	+ * 2. unreserve signals:
	793	+ * valid when HL_CS_FLAGS_UNRESERVE_SIGNALS_ONLY is set.
	794	+ */
	795	+ __u32 encaps_sig_handle_id;
	796	+
	797	+ /* Valid only when HL_CS_FLAGS_RESERVE_SIGNALS_ONLY is set */
	798	+ struct {
	799	+ /* Encapsulated signals number */
	800	+ __u32 encaps_signals_count;
	801	+
	802	+ /* Encapsulated signals queue index (stream) */
	803	+ __u32 encaps_signals_q_idx;
	804	+ };
	805	+ };
697	806
698	807	/* Number of chunks in restore phase array. Maximum number is
699	808	* HL_MAX_JOBS_PER_CS
@@ -718,14 +827,31 @@ struct hl_cs_in { · 18 unmodified lines
718	827	};
719	828
720	829	struct hl_cs_out {
	830	+ union {
	831	+ /*
	832	+ * seq holds the sequence number of the CS to pass to wait
	833	+ * ioctl. All values are valid except for 0 and ULLONG_MAX
	834	+ */
	835	+ __u64 seq;
	836	+
	837	+ /* Valid only when HL_CS_FLAGS_RESERVE_SIGNALS_ONLY is set */
	838	+ struct {
	839	+ /* This is the resereved signal handle id */
	840	+ __u32 handle_id;
	841	+
	842	+ /* This is the signals count */
	843	+ __u32 count;
	844	+ };
	845	+ };
	846	+
	847	+ /* HL_CS_STATUS */
	848	+ __u32 status;
	849	+
721	850	/*
722		− * seq holds the sequence number of the CS to pass to wait ioctl. All
723		− * values are valid except for 0 and ULLONG_MAX
	851	+ * SOB base address offset
	852	+ * Valid only when HL_CS_FLAGS_RESERVE_SIGNALS_ONLY is set
724	853	*/
725		− __u64 seq;
726		− /* HL_CS_STATUS_* */
727		− __u32 status;
728		− __u32 pad;
	854	+ __u32 sob_base_addr_offset;
729	855	};
730	856
731	857	union hl_cs_args {
@@ -735,11 +861,18 @@ union hl_cs_args { · 3 unmodified lines
735	861
736	862	#define HL_WAIT_CS_FLAGS_INTERRUPT 0x2
737	863	#define HL_WAIT_CS_FLAGS_INTERRUPT_MASK 0xFFF00000
	864	+#define HL_WAIT_CS_FLAGS_MULTI_CS 0x4
	865	+
	866	+#define HL_WAIT_MULTI_CS_LIST_MAX_LEN 32
738	867
739	868	struct hl_wait_cs_in {
740	869	union {
741	870	struct {
742		− /* Command submission sequence number */
	871	+ /*
	872	+ * In case of wait_cs holds the CS sequence number.
	873	+ * In case of wait for multi CS hold a user pointer to
	874	+ * an array of CS sequence numbers
	875	+ */
743	876	__u64 seq;
744	877	/* Absolute timeout to wait for command submission
745	878	* in microseconds
@@ -767,12 +900,17 @@ struct hl_wait_cs_in { · 21 unmodified lines
767	900
768	901	/* Context ID - Currently not in use */
769	902	__u32 ctx_id;
	903	+
770	904	/* HL_WAIT_CS_FLAGS_*
771	905	* If HL_WAIT_CS_FLAGS_INTERRUPT is set, this field should include
772	906	* interrupt id according to HL_WAIT_CS_FLAGS_INTERRUPT_MASK, in order
773	907	* not to specify an interrupt id ,set mask to all 1s.
774	908	*/
775	909	__u32 flags;
	910	+
	911	+ /* Multi CS API info- valid entries in multi-CS array */
	912	+ __u8 seq_arr_len;
	913	+ __u8 pad[7];
776	914	};
777	915
778	916	#define HL_WAIT_CS_STATUS_COMPLETED 0
@@ -789,8 +927,15 @@ struct hl_wait_cs_out { · 10 unmodified lines
789	927	__u32 status;
790	928	/* HL_WAIT_CS_STATUS_FLAG* */
791	929	__u32 flags;
792		− /* valid only if HL_WAIT_CS_STATUS_FLAG_TIMESTAMP_VLD is set */
	930	+ /*
	931	+ * valid only if HL_WAIT_CS_STATUS_FLAG_TIMESTAMP_VLD is set
	932	+ * for wait_cs: timestamp of CS completion
	933	+ * for wait_multi_cs: timestamp of FIRST CS completion
	934	+ */
793	935	__s64 timestamp_nsec;
	936	+ /* multi CS completion bitmap */
	937	+ __u32 cs_completion_map;
	938	+ __u32 pad;
794	939	};
795	940
796	941	union hl_wait_cs_args {
@@ -813,6 +958,7 @@ union hl_wait_cs_args { · 16 unmodified lines
813	958	#define HL_MEM_CONTIGUOUS 0x1
814	959	#define HL_MEM_SHARED 0x2
815	960	#define HL_MEM_USERPTR 0x4
	961	+#define HL_MEM_FORCE_HINT 0x8
816	962
817	963	struct hl_mem_in {
818	964	union {

include/uapi/rdma/irdma-abi.h+1−1

@@ -1,4 +1,4 @@
1		−/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB) */
	1	+/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB */
2	2	/*
3	3	* Copyright (c) 2006 - 2021 Intel Corporation. All rights reserved.
4	4	* Copyright (c) 2005 Topspin Communications. All rights reserved.

include/uapi/rdma/mlx5-abi.h+15−2

@@ -50,6 +50,7 @@ enum { · 49 unmodified lines
50	50	MLX5_QP_FLAG_ALLOW_SCATTER_CQE = 1 << 8,
51	51	MLX5_QP_FLAG_PACKET_BASED_CREDIT_MODE = 1 << 9,
52	52	MLX5_QP_FLAG_UAR_PAGE_INDEX = 1 << 10,
	53	+ MLX5_QP_FLAG_DCI_STREAM = 1 << 11,
53	54	};
54	55
55	56	enum {
@@ -238,6 +239,11 @@ struct mlx5_ib_striding_rq_caps { · 182 unmodified lines
238	239	__u32 reserved;
239	240	};
240	241
	242	+struct mlx5_ib_dci_streams_caps {
	243	+ __u8 max_log_num_concurent;
	244	+ __u8 max_log_num_errored;
	245	+};
	246	+
241	247	enum mlx5_ib_query_dev_resp_flags {
242	248	/* Support 128B CQE compression */
243	249	MLX5_IB_QUERY_DEV_RESP_FLAGS_CQE_128B_COMP = 1 << 0,
@@ -266,7 +272,8 @@ struct mlx5_ib_query_device_resp { · 22 unmodified lines
266	272	struct mlx5_ib_sw_parsing_caps sw_parsing_caps;
267	273	struct mlx5_ib_striding_rq_caps striding_rq_caps;
268	274	__u32 tunnel_offloads_caps; /* enum mlx5_ib_tunnel_offloads */
269		− __u32 reserved;
	275	+ struct mlx5_ib_dci_streams_caps dci_streams_caps;
	276	+ __u16 reserved;
270	277	};
271	278
272	279	enum mlx5_ib_create_cq_flags {
@@ -313,6 +320,11 @@ struct mlx5_ib_create_srq_resp { · 40 unmodified lines
313	320	__u32 reserved;
314	321	};
315	322
	323	+struct mlx5_ib_create_qp_dci_streams {
	324	+ __u8 log_num_concurent;
	325	+ __u8 log_num_errored;
	326	+};
	327	+
316	328	struct mlx5_ib_create_qp {
317	329	__aligned_u64 buf_addr;
318	330	__aligned_u64 db_addr;
@@ -327,7 +339,8 @@ struct mlx5_ib_create_qp { · 8 unmodified lines
327	339	__aligned_u64 access_key;
328	340	};
329	341	__u32 ece_options;
330		− __u32 reserved;
	342	+ struct mlx5_ib_create_qp_dci_streams dci_streams;
	343	+ __u16 reserved;
331	344	};
332	345
333	346	/* RX Hash function flags */

include/uapi/scsi/fc/fc_els.h+106−0

@@ -41,6 +41,7 @@ enum fc_els_cmd { · 40 unmodified lines
41	41	ELS_REC = 0x13, /* read exchange concise */
42	42	ELS_SRR = 0x14, /* sequence retransmission request */
43	43	ELS_FPIN = 0x16, /* Fabric Performance Impact Notification */
	44	+ ELS_EDC = 0x17, /* Exchange Diagnostic Capabilities */
44	45	ELS_RDP = 0x18, /* Read Diagnostic Parameters */
45	46	ELS_RDF = 0x19, /* Register Diagnostic Functions */
46	47	ELS_PRLI = 0x20, /* process login */
@@ -111,6 +112,7 @@ enum fc_els_cmd { · 64 unmodified lines
111	112	[ELS_REC] = "REC", \
112	113	[ELS_SRR] = "SRR", \
113	114	[ELS_FPIN] = "FPIN", \
	115	+ [ELS_EDC] = "EDC", \
114	116	[ELS_RDP] = "RDP", \
115	117	[ELS_RDF] = "RDF", \
116	118	[ELS_PRLI] = "PRLI", \
@@ -218,6 +220,10 @@ enum fc_els_rjt_explan { · 101 unmodified lines
218	220	enum fc_ls_tlv_dtag {
219	221	ELS_DTAG_LS_REQ_INFO = 0x00000001,
220	222	/* Link Service Request Information Descriptor */
	223	+ ELS_DTAG_LNK_FAULT_CAP = 0x0001000D,
	224	+ /* Link Fault Capability Descriptor */
	225	+ ELS_DTAG_CG_SIGNAL_CAP = 0x0001000F,
	226	+ /* Congestion Signaling Capability Descriptor */
221	227	ELS_DTAG_LNK_INTEGRITY = 0x00020001,
222	228	/* Link Integrity Notification Descriptor */
223	229	ELS_DTAG_DELIVERY = 0x00020002,
@@ -236,6 +242,8 @@ enum fc_ls_tlv_dtag { · 12 unmodified lines
236	242	*/
237	243	#define FC_LS_TLV_DTAG_INIT { \
238	244	{ ELS_DTAG_LS_REQ_INFO, "Link Service Request Information" }, \
	245	+ { ELS_DTAG_LNK_FAULT_CAP, "Link Fault Capability" }, \
	246	+ { ELS_DTAG_CG_SIGNAL_CAP, "Congestion Signaling Capability" }, \
239	247	{ ELS_DTAG_LNK_INTEGRITY, "Link Integrity Notification" }, \
240	248	{ ELS_DTAG_DELIVERY, "Delivery Notification Present" }, \
241	249	{ ELS_DTAG_PEER_CONGEST, "Peer Congestion Notification" }, \
@@ -1144,4 +1152,102 @@ struct fc_els_rdf_resp { · 902 unmodified lines
1144	1152	};
1145	1153
1146	1154
	1155	+/*
	1156	+ * Diagnostic Capability Descriptors for EDC ELS
	1157	+ */
	1158	+
	1159	+/*
	1160	+ * Diagnostic: Link Fault Capability Descriptor
	1161	+ */
	1162	+struct fc_diag_lnkflt_desc {
	1163	+ __be32 desc_tag; /* Descriptor Tag (0x0001000D) */
	1164	+ __be32 desc_len; /* Length of Descriptor (in bytes).
	1165	+ * Size of descriptor excluding
	1166	+ * desc_tag and desc_len fields.
	1167	+ * 12 bytes
	1168	+ */
	1169	+ __be32 degrade_activate_threshold;
	1170	+ __be32 degrade_deactivate_threshold;
	1171	+ __be32 fec_degrade_interval;
	1172	+};
	1173	+
	1174	+enum fc_edc_cg_signal_cap_types {
	1175	+ /* Note: Capability: bits 31:4 Rsvd; bits 3:0 are capabilities */
	1176	+ EDC_CG_SIG_NOTSUPPORTED = 0x00, /* neither supported */
	1177	+ EDC_CG_SIG_WARN_ONLY = 0x01,
	1178	+ EDC_CG_SIG_WARN_ALARM = 0x02, /* both supported */
	1179	+};
	1180	+
	1181	+/*
	1182	+ * Initializer useful for decoding table.
	1183	+ * Please keep this in sync with the above definitions.
	1184	+ */
	1185	+#define FC_EDC_CG_SIGNAL_CAP_TYPES_INIT { \
	1186	+ { EDC_CG_SIG_NOTSUPPORTED, "Signaling Not Supported" }, \
	1187	+ { EDC_CG_SIG_WARN_ONLY, "Warning Signal" }, \
	1188	+ { EDC_CG_SIG_WARN_ALARM, "Warning and Alarm Signals" }, \
	1189	+}
	1190	+
	1191	+enum fc_diag_cg_sig_freq_types {
	1192	+ EDC_CG_SIGFREQ_CNT_MIN = 1, /* Min Frequency Count */
	1193	+ EDC_CG_SIGFREQ_CNT_MAX = 999, /* Max Frequency Count */
	1194	+
	1195	+ EDC_CG_SIGFREQ_SEC = 0x1, /* Units: seconds */
	1196	+ EDC_CG_SIGFREQ_MSEC = 0x2, /* Units: milliseconds */
	1197	+};
	1198	+
	1199	+struct fc_diag_cg_sig_freq {
	1200	+ __be16 count; /* Time between signals
	1201	+ * note: upper 6 bits rsvd
	1202	+ */
	1203	+ __be16 units; /* Time unit for count
	1204	+ * note: upper 12 bits rsvd
	1205	+ */
	1206	+};
	1207	+
	1208	+/*
	1209	+ * Diagnostic: Congestion Signaling Capability Descriptor
	1210	+ */
	1211	+struct fc_diag_cg_sig_desc {
	1212	+ __be32 desc_tag; /* Descriptor Tag (0x0001000F) */
	1213	+ __be32 desc_len; /* Length of Descriptor (in bytes).
	1214	+ * Size of descriptor excluding
	1215	+ * desc_tag and desc_len fields.
	1216	+ * 16 bytes
	1217	+ */
	1218	+ __be32 xmt_signal_capability;
	1219	+ struct fc_diag_cg_sig_freq xmt_signal_frequency;
	1220	+ __be32 rcv_signal_capability;
	1221	+ struct fc_diag_cg_sig_freq rcv_signal_frequency;
	1222	+};
	1223	+
	1224	+/*
	1225	+ * ELS_EDC - Exchange Diagnostic Capabilities
	1226	+ */
	1227	+struct fc_els_edc {
	1228	+ __u8 edc_cmd; /* command (0x17) */
	1229	+ __u8 edc_zero[3]; /* specified as zero - part of cmd */
	1230	+ __be32 desc_len; /* Length of Descriptor List (in bytes).
	1231	+ * Size of ELS excluding edc_cmd,
	1232	+ * edc_zero and desc_len fields.
	1233	+ */
	1234	+ struct fc_tlv_desc desc[0];
	1235	+ /* Diagnostic Descriptor list */
	1236	+};
	1237	+
	1238	+/*
	1239	+ * ELS EDC LS_ACC Response.
	1240	+ */
	1241	+struct fc_els_edc_resp {
	1242	+ struct fc_els_ls_acc acc_hdr;
	1243	+ __be32 desc_list_len; /* Length of response (in
	1244	+ * bytes). Excludes acc_hdr
	1245	+ * and desc_list_len fields.
	1246	+ */
	1247	+ struct fc_els_lsri_desc lsri;
	1248	+ struct fc_tlv_desc desc[0];
	1249	+ /* Supported Diagnostic Descriptor list */
	1250	+};
	1251	+
	1252	+
1147	1253	#endif /* _FC_ELS_H_ */

include/uapi/sound/asound.h+1−0

@@ -299,6 +299,7 @@ typedef int __bitwise snd_pcm_subformat_t; · 298 unmodified lines
299	299	#define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 /* report absolute hardware link audio time, not reset on startup */
300	300	#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 /* report estimated link audio time */
301	301	#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 /* report synchronized audio/system time */
	302	+#define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000 /* needs explicit sync of pointers and data */
302	303
303	304	#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 /* internal kernel flag - trigger in drain */
304	305	#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 /* internal kernel flag - FIFO size is in frames */

include/uapi/sound/snd_sst_tokens.h+5−1

@@ -233,6 +233,8 @@ · 232 unmodified lines
233	233	*
234	234	* %SKL_TKN_U32_ASTATE_CLK_SRC: Clock source for A-State entry
235	235	*
	236	+ * %SKL_TKN_U32_FMT_CFG_IDX: Format config index
	237	+ *
236	238	* module_id and loadable flags dont have tokens as these values will be
237	239	* read from the DSP FW manifest
238	240	*
@@ -324,7 +326,9 @@ enum SKL_TKNS { · 85 unmodified lines
324	326	SKL_TKN_U32_ASTATE_COUNT,
325	327	SKL_TKN_U32_ASTATE_KCPS,
326	328	SKL_TKN_U32_ASTATE_CLK_SRC,
327		− SKL_TKN_MAX = SKL_TKN_U32_ASTATE_CLK_SRC,
	329	+
	330	+ SKL_TKN_U32_FMT_CFG_IDX = 96,
	331	+ SKL_TKN_MAX = SKL_TKN_U32_FMT_CFG_IDX,
328	332	};
329	333
330	334	#endif