Pull x86 fixes from Dave Hansen: "The most important fix here adds a missing CPU model to the recent Gather Data Sampling (GDS) mitigation list to ensure that mitigations are available on that CPU. There are also a pair of warning fixes, and closure of a covert channel that pops up when protection keys are disabled. Summary: - Mark all Skylake CPUs as vulnerable to GDS - Fix PKRU covert channel - Fix -Wmissing-variable-declarations warning for ia32_xyz_class - Fix kernel-doc annotation warning" * tag 'x86-urgent-2023-09-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/fpu/xstate: Fix PKRU covert channel x86/irq/i8259: Fix kernel-doc annotation warning x86/speculation: Mark all Skylake CPUs as vulnerable to GDS x86/audit: Fix -Wmissing-variable-declarations warning for ia32_xyz_class
Unified · Split
| @@ -4,4 +4,11 @@ · 3 unmodified lines | ||
| 4 | 4 | |
| 5 | 5 | int ia32_classify_syscall(unsigned int syscall); |
| 6 | 6 | |
| 7 | +extern unsigned ia32_dir_class[]; | |
| 8 | +extern unsigned ia32_write_class[]; | |
| 9 | +extern unsigned ia32_read_class[]; | |
| 10 | +extern unsigned ia32_chattr_class[]; | |
| 11 | +extern unsigned ia32_signal_class[]; | |
| 12 | + | |
| 13 | + | |
| 7 | 14 | #endif /* _ASM_X86_AUDIT_H */ |
| @@ -63,11 +63,6 @@ int audit_classify_syscall(int abi, unsigned syscall) · 62 unmodified lines | ||
| 63 | 63 | static int __init audit_classes_init(void) |
| 64 | 64 | { |
| 65 | 65 | #ifdef CONFIG_IA32_EMULATION |
| 66 | − extern __u32 ia32_dir_class[]; | |
| 67 | − extern __u32 ia32_write_class[]; | |
| 68 | − extern __u32 ia32_read_class[]; | |
| 69 | − extern __u32 ia32_chattr_class[]; | |
| 70 | − extern __u32 ia32_signal_class[]; | |
| 71 | 66 | audit_register_class(AUDIT_CLASS_WRITE_32, ia32_write_class); |
| 72 | 67 | audit_register_class(AUDIT_CLASS_READ_32, ia32_read_class); |
| 73 | 68 | audit_register_class(AUDIT_CLASS_DIR_WRITE_32, ia32_dir_class); |
| @@ -1280,11 +1280,11 @@ static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = { · 1279 unmodified lines | ||
| 1280 | 1280 | VULNBL_INTEL_STEPPINGS(BROADWELL_G, X86_STEPPING_ANY, SRBDS), |
| 1281 | 1281 | VULNBL_INTEL_STEPPINGS(BROADWELL_X, X86_STEPPING_ANY, MMIO), |
| 1282 | 1282 | VULNBL_INTEL_STEPPINGS(BROADWELL, X86_STEPPING_ANY, SRBDS), |
| 1283 | − VULNBL_INTEL_STEPPINGS(SKYLAKE_L, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED), | |
| 1284 | 1283 | VULNBL_INTEL_STEPPINGS(SKYLAKE_X, X86_STEPPING_ANY, MMIO | RETBLEED | GDS), |
| 1285 | − VULNBL_INTEL_STEPPINGS(SKYLAKE, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED), | |
| 1286 | − VULNBL_INTEL_STEPPINGS(KABYLAKE_L, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED | GDS), | |
| 1287 | − VULNBL_INTEL_STEPPINGS(KABYLAKE, X86_STEPPING_ANY, SRBDS | MMIO | RETBLEED | GDS), | |
| 1284 | + VULNBL_INTEL_STEPPINGS(SKYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS), | |
| 1285 | + VULNBL_INTEL_STEPPINGS(SKYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS), | |
| 1286 | + VULNBL_INTEL_STEPPINGS(KABYLAKE_L, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS), | |
| 1287 | + VULNBL_INTEL_STEPPINGS(KABYLAKE, X86_STEPPING_ANY, MMIO | RETBLEED | GDS | SRBDS), | |
| 1288 | 1288 | VULNBL_INTEL_STEPPINGS(CANNONLAKE_L, X86_STEPPING_ANY, RETBLEED), |
| 1289 | 1289 | VULNBL_INTEL_STEPPINGS(ICELAKE_L, X86_STEPPING_ANY, MMIO | MMIO_SBDS | RETBLEED | GDS), |
| 1290 | 1290 | VULNBL_INTEL_STEPPINGS(ICELAKE_D, X86_STEPPING_ANY, MMIO | GDS), |
| @@ -71,7 +71,7 @@ static unsigned short xsave_cpuid_features[] __initdata = { · 70 unmodified lines | ||
| 71 | 71 | [XFEATURE_ZMM_Hi256] = X86_FEATURE_AVX512F, |
| 72 | 72 | [XFEATURE_Hi16_ZMM] = X86_FEATURE_AVX512F, |
| 73 | 73 | [XFEATURE_PT_UNIMPLEMENTED_SO_FAR] = X86_FEATURE_INTEL_PT, |
| 74 | − [XFEATURE_PKRU] = X86_FEATURE_PKU, | |
| 74 | + [XFEATURE_PKRU] = X86_FEATURE_OSPKE, | |
| 75 | 75 | [XFEATURE_PASID] = X86_FEATURE_ENQCMD, |
| 76 | 76 | [XFEATURE_CET_USER] = X86_FEATURE_SHSTK, |
| 77 | 77 | [XFEATURE_XTILE_CFG] = X86_FEATURE_AMX_TILE, |
| @@ -231,9 +231,7 @@ struct irq_chip i8259A_chip = { · 230 unmodified lines | ||
| 231 | 231 | }; |
| 232 | 232 | |
| 233 | 233 | static char irq_trigger[2]; |
| 234 | −/** | |
| 235 | − * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ | |
| 236 | − */ | |
| 234 | +/* ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ */ | |
| 237 | 235 | static void restore_ELCR(char *trigger) |
| 238 | 236 | { |
| 239 | 237 | outb(trigger[0], PIC_ELCR1); |