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IB/mlx5: Introduce UAPIs to manage packet pacing

Introduce packet pacing uobject and its alloc and destroy methods. This uobject holds mlx5 packet pacing context according to the device specification and enables managing packet pacing device entries that are needed by DEVX applications.

Yishai Hadas committed 6 years ago

Commit 30f2fe41 parent 13260346 files · +165 −0Browse files

Unified · Split

6 files
  1. drivers/infiniband/hw/mlx5/Makefile +1 −0
  2. drivers/infiniband/hw/mlx5/main.c +1 −0
  3. drivers/infiniband/hw/mlx5/mlx5_ib.h +6 −0
  4. drivers/infiniband/hw/mlx5/qos.c +136 −0
  5. include/uapi/rdma/mlx5_user_ioctl_cmds.h +17 −0
  6. include/uapi/rdma/mlx5_user_ioctl_verbs.h +4 −0
drivers/infiniband/hw/mlx5/Makefile+1−0
@@ -8,3 +8,4 @@ mlx5_ib-$(CONFIG_INFINIBAND_ON_DEMAND_PAGING) += odp.o · 7 unmodified lines
8mlx5_ib-$(CONFIG_MLX5_ESWITCH) += ib_rep.o8mlx5_ib-$(CONFIG_MLX5_ESWITCH) += ib_rep.o
9mlx5_ib-$(CONFIG_INFINIBAND_USER_ACCESS) += devx.o9mlx5_ib-$(CONFIG_INFINIBAND_USER_ACCESS) += devx.o
10mlx5_ib-$(CONFIG_INFINIBAND_USER_ACCESS) += flow.o10mlx5_ib-$(CONFIG_INFINIBAND_USER_ACCESS) += flow.o
11mlx5_ib-$(CONFIG_INFINIBAND_USER_ACCESS) += qos.o
drivers/infiniband/hw/mlx5/main.c+1−0
@@ -6251,6 +6251,7 @@ ADD_UVERBS_ATTRIBUTES_SIMPLE( · 6250 unmodified lines
6251static const struct uapi_definition mlx5_ib_defs[] = {6251static const struct uapi_definition mlx5_ib_defs[] = {
6252 UAPI_DEF_CHAIN(mlx5_ib_devx_defs),6252 UAPI_DEF_CHAIN(mlx5_ib_devx_defs),
6253 UAPI_DEF_CHAIN(mlx5_ib_flow_defs),6253 UAPI_DEF_CHAIN(mlx5_ib_flow_defs),
6254 UAPI_DEF_CHAIN(mlx5_ib_qos_defs),
6254 6255
6255 UAPI_DEF_CHAIN_OBJ_TREE(UVERBS_OBJECT_FLOW_ACTION,6256 UAPI_DEF_CHAIN_OBJ_TREE(UVERBS_OBJECT_FLOW_ACTION,
6256 &mlx5_ib_flow_action),6257 &mlx5_ib_flow_action),
drivers/infiniband/hw/mlx5/mlx5_ib.h+6−0
@@ -203,6 +203,11 @@ struct mlx5_ib_flow_matcher { · 202 unmodified lines
203 u8 match_criteria_enable;203 u8 match_criteria_enable;
204};204};
205 205
206struct mlx5_ib_pp {
207 u16 index;
208 struct mlx5_core_dev *mdev;
209};
210
206struct mlx5_ib_flow_db {211struct mlx5_ib_flow_db {
207 struct mlx5_ib_flow_prio prios[MLX5_IB_NUM_FLOW_FT];212 struct mlx5_ib_flow_prio prios[MLX5_IB_NUM_FLOW_FT];
208 struct mlx5_ib_flow_prio egress_prios[MLX5_IB_NUM_FLOW_FT];213 struct mlx5_ib_flow_prio egress_prios[MLX5_IB_NUM_FLOW_FT];
@@ -1381,6 +1386,7 @@ int mlx5_ib_fill_stat_entry(struct sk_buff *msg, · 1172 unmodified lines
1381 1386
1382extern const struct uapi_definition mlx5_ib_devx_defs[];1387extern const struct uapi_definition mlx5_ib_devx_defs[];
1383extern const struct uapi_definition mlx5_ib_flow_defs[];1388extern const struct uapi_definition mlx5_ib_flow_defs[];
1389extern const struct uapi_definition mlx5_ib_qos_defs[];
1384 1390
1385#if IS_ENABLED(CONFIG_INFINIBAND_USER_ACCESS)1391#if IS_ENABLED(CONFIG_INFINIBAND_USER_ACCESS)
1386int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user);1392int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user);
drivers/infiniband/hw/mlx5/qos.c+136−0
@@ -0,0 +1,136 @@
1// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2/*
3 * Copyright (c) 2020, Mellanox Technologies inc. All rights reserved.
4 */
5
6#include <rdma/uverbs_ioctl.h>
7#include <rdma/mlx5_user_ioctl_cmds.h>
8#include <rdma/mlx5_user_ioctl_verbs.h>
9#include <linux/mlx5/driver.h>
10#include "mlx5_ib.h"
11
12#define UVERBS_MODULE_NAME mlx5_ib
13#include <rdma/uverbs_named_ioctl.h>
14
15static bool pp_is_supported(struct ib_device *device)
16{
17 struct mlx5_ib_dev *dev = to_mdev(device);
18
19 return (MLX5_CAP_GEN(dev->mdev, qos) &&
20 MLX5_CAP_QOS(dev->mdev, packet_pacing) &&
21 MLX5_CAP_QOS(dev->mdev, packet_pacing_uid));
22}
23
24static int UVERBS_HANDLER(MLX5_IB_METHOD_PP_OBJ_ALLOC)(
25 struct uverbs_attr_bundle *attrs)
26{
27 u8 rl_raw[MLX5_ST_SZ_BYTES(set_pp_rate_limit_context)] = {};
28 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
29 MLX5_IB_ATTR_PP_OBJ_ALLOC_HANDLE);
30 struct mlx5_ib_dev *dev;
31 struct mlx5_ib_ucontext *c;
32 struct mlx5_ib_pp *pp_entry;
33 void *in_ctx;
34 u16 uid;
35 int inlen;
36 u32 flags;
37 int err;
38
39 c = to_mucontext(ib_uverbs_get_ucontext(attrs));
40 if (IS_ERR(c))
41 return PTR_ERR(c);
42
43 /* The allocated entry can be used only by a DEVX context */
44 if (!c->devx_uid)
45 return -EINVAL;
46
47 dev = to_mdev(c->ibucontext.device);
48 pp_entry = kzalloc(sizeof(*pp_entry), GFP_KERNEL);
49 if (IS_ERR(pp_entry))
50 return PTR_ERR(pp_entry);
51
52 in_ctx = uverbs_attr_get_alloced_ptr(attrs,
53 MLX5_IB_ATTR_PP_OBJ_ALLOC_CTX);
54 inlen = uverbs_attr_get_len(attrs,
55 MLX5_IB_ATTR_PP_OBJ_ALLOC_CTX);
56 memcpy(rl_raw, in_ctx, inlen);
57 err = uverbs_get_flags32(&flags, attrs,
58 MLX5_IB_ATTR_PP_OBJ_ALLOC_FLAGS,
59 MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_INDEX);
60 if (err)
61 goto err;
62
63 uid = (flags & MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_INDEX) ?
64 c->devx_uid : MLX5_SHARED_RESOURCE_UID;
65
66 err = mlx5_rl_add_rate_raw(dev->mdev, rl_raw, uid,
67 (flags & MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_INDEX),
68 &pp_entry->index);
69 if (err)
70 goto err;
71
72 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_PP_OBJ_ALLOC_INDEX,
73 &pp_entry->index, sizeof(pp_entry->index));
74 if (err)
75 goto clean;
76
77 pp_entry->mdev = dev->mdev;
78 uobj->object = pp_entry;
79 return 0;
80
81clean:
82 mlx5_rl_remove_rate_raw(dev->mdev, pp_entry->index);
83err:
84 kfree(pp_entry);
85 return err;
86}
87
88static int pp_obj_cleanup(struct ib_uobject *uobject,
89 enum rdma_remove_reason why,
90 struct uverbs_attr_bundle *attrs)
91{
92 struct mlx5_ib_pp *pp_entry = uobject->object;
93
94 mlx5_rl_remove_rate_raw(pp_entry->mdev, pp_entry->index);
95 kfree(pp_entry);
96 return 0;
97}
98
99DECLARE_UVERBS_NAMED_METHOD(
100 MLX5_IB_METHOD_PP_OBJ_ALLOC,
101 UVERBS_ATTR_IDR(MLX5_IB_ATTR_PP_OBJ_ALLOC_HANDLE,
102 MLX5_IB_OBJECT_PP,
103 UVERBS_ACCESS_NEW,
104 UA_MANDATORY),
105 UVERBS_ATTR_PTR_IN(
106 MLX5_IB_ATTR_PP_OBJ_ALLOC_CTX,
107 UVERBS_ATTR_SIZE(1,
108 MLX5_ST_SZ_BYTES(set_pp_rate_limit_context)),
109 UA_MANDATORY,
110 UA_ALLOC_AND_COPY),
111 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_PP_OBJ_ALLOC_FLAGS,
112 enum mlx5_ib_uapi_pp_alloc_flags,
113 UA_MANDATORY),
114 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_PP_OBJ_ALLOC_INDEX,
115 UVERBS_ATTR_TYPE(u16),
116 UA_MANDATORY));
117
118DECLARE_UVERBS_NAMED_METHOD_DESTROY(
119 MLX5_IB_METHOD_PP_OBJ_DESTROY,
120 UVERBS_ATTR_IDR(MLX5_IB_ATTR_PP_OBJ_DESTROY_HANDLE,
121 MLX5_IB_OBJECT_PP,
122 UVERBS_ACCESS_DESTROY,
123 UA_MANDATORY));
124
125DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_PP,
126 UVERBS_TYPE_ALLOC_IDR(pp_obj_cleanup),
127 &UVERBS_METHOD(MLX5_IB_METHOD_PP_OBJ_ALLOC),
128 &UVERBS_METHOD(MLX5_IB_METHOD_PP_OBJ_DESTROY));
129
130
131const struct uapi_definition mlx5_ib_qos_defs[] = {
132 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
133 MLX5_IB_OBJECT_PP,
134 UAPI_DEF_IS_OBJ_SUPPORTED(pp_is_supported)),
135 {},
136};
include/uapi/rdma/mlx5_user_ioctl_cmds.h+17−0
@@ -143,6 +143,22 @@ enum mlx5_ib_devx_umem_dereg_attrs { · 142 unmodified lines
143 MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE = (1U << UVERBS_ID_NS_SHIFT),143 MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
144};144};
145 145
146enum mlx5_ib_pp_obj_methods {
147 MLX5_IB_METHOD_PP_OBJ_ALLOC = (1U << UVERBS_ID_NS_SHIFT),
148 MLX5_IB_METHOD_PP_OBJ_DESTROY,
149};
150
151enum mlx5_ib_pp_alloc_attrs {
152 MLX5_IB_ATTR_PP_OBJ_ALLOC_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
153 MLX5_IB_ATTR_PP_OBJ_ALLOC_CTX,
154 MLX5_IB_ATTR_PP_OBJ_ALLOC_FLAGS,
155 MLX5_IB_ATTR_PP_OBJ_ALLOC_INDEX,
156};
157
158enum mlx5_ib_pp_obj_destroy_attrs {
159 MLX5_IB_ATTR_PP_OBJ_DESTROY_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
160};
161
146enum mlx5_ib_devx_umem_methods {162enum mlx5_ib_devx_umem_methods {
147 MLX5_IB_METHOD_DEVX_UMEM_REG = (1U << UVERBS_ID_NS_SHIFT),163 MLX5_IB_METHOD_DEVX_UMEM_REG = (1U << UVERBS_ID_NS_SHIFT),
148 MLX5_IB_METHOD_DEVX_UMEM_DEREG,164 MLX5_IB_METHOD_DEVX_UMEM_DEREG,
@@ -173,6 +189,7 @@ enum mlx5_ib_objects { · 24 unmodified lines
173 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,189 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
174 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,190 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
175 MLX5_IB_OBJECT_VAR,191 MLX5_IB_OBJECT_VAR,
192 MLX5_IB_OBJECT_PP,
176};193};
177 194
178enum mlx5_ib_flow_matcher_create_attrs {195enum mlx5_ib_flow_matcher_create_attrs {
include/uapi/rdma/mlx5_user_ioctl_verbs.h+4−0
@@ -73,5 +73,9 @@ struct mlx5_ib_uapi_devx_async_event_hdr { · 72 unmodified lines
73 __u8 out_data[];73 __u8 out_data[];
74};74};
75 75
76enum mlx5_ib_uapi_pp_alloc_flags {
77 MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_INDEX = 1 << 0,
78};
79
76#endif80#endif
77 81