RDMA/mlx5: Support real-time timestamp directly from the device

Currently, if the user asks for a real-time timestamp, the device will return a free-running one, and the timestamp will be translated to real-time in the user-space. When the device supports only real-time timestamp and not free-running, the creation of the QP will fail even though the user needs supported the real-time one. To prevent this, we will return the real-time timestamp directly from the device.

Aharon Landau committed 5 years ago

Commit 33652951 parent 9a1ac955 files · +45 −6Browse files

Unified · Split

5 files

drivers/infiniband/hw/mlx5/cq.c +5 −1
drivers/infiniband/hw/mlx5/main.c +6 −0
drivers/infiniband/hw/mlx5/mlx5_ib.h +7 −0
drivers/infiniband/hw/mlx5/qp.c +25 −5
include/uapi/rdma/mlx5-abi.h +2 −0

drivers/infiniband/hw/mlx5/cq.c+5−1

@@ -725,7 +725,8 @@ static int create_cq_user(struct mlx5_ib_dev dev, struct ib_udata udata, · 724 unmodified lines
725	725	return -EFAULT;
726	726
727	727	if ((ucmd.flags & ~(MLX5_IB_CREATE_CQ_FLAGS_CQE_128B_PAD \|
728		− MLX5_IB_CREATE_CQ_FLAGS_UAR_PAGE_INDEX)))
	728	+ MLX5_IB_CREATE_CQ_FLAGS_UAR_PAGE_INDEX \|
	729	+ MLX5_IB_CREATE_CQ_FLAGS_REAL_TIME_TS)))
729	730	return -EINVAL;
730	731
731	732	if ((ucmd.cqe_size != 64 && ucmd.cqe_size != 128) \|\|
@@ -826,6 +827,9 @@ static int create_cq_user(struct mlx5_ib_dev dev, struct ib_udata udata, · 94 unmodified lines
826	827	cq->private_flags \|= MLX5_IB_CQ_PR_FLAGS_CQE_128_PAD;
827	828	}
828	829
	830	+ if (ucmd.flags & MLX5_IB_CREATE_CQ_FLAGS_REAL_TIME_TS)
	831	+ cq->private_flags \|= MLX5_IB_CQ_PR_FLAGS_REAL_TIME_TS;
	832	+
829	833	MLX5_SET(create_cq_in, *cqb, uid, context->devx_uid);
830	834	return 0;
831	835

drivers/infiniband/hw/mlx5/main.c+6−0

@@ -1816,6 +1816,12 @@ static int set_ucontext_resp(struct ib_ucontext *uctx, · 1815 unmodified lines
1816	1816	if (MLX5_CAP_GEN(dev->mdev, ece_support))
1817	1817	resp->comp_mask \|= MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_ECE;
1818	1818
	1819	+ if (rt_supported(MLX5_CAP_GEN(dev->mdev, sq_ts_format)) &&
	1820	+ rt_supported(MLX5_CAP_GEN(dev->mdev, rq_ts_format)) &&
	1821	+ rt_supported(MLX5_CAP_ROCE(dev->mdev, qp_ts_format)))
	1822	+ resp->comp_mask \|=
	1823	+ MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_REAL_TIME_TS;
	1824	+
1819	1825	resp->num_dyn_bfregs = bfregi->num_dyn_bfregs;
1820	1826	return 0;
1821	1827	}

drivers/infiniband/hw/mlx5/mlx5_ib.h+7−0

@@ -550,6 +550,7 @@ static inline const struct mlx5_umr_wr umr_wr(const struct ib_send_wr wr) · 549 unmodified lines
550	550
551	551	enum mlx5_ib_cq_pr_flags {
552	552	MLX5_IB_CQ_PR_FLAGS_CQE_128_PAD = 1 << 0,
	553	+ MLX5_IB_CQ_PR_FLAGS_REAL_TIME_TS = 1 << 1,
553	554	};
554	555
555	556	struct mlx5_ib_cq {
@@ -1614,4 +1615,10 @@ static inline bool mlx5_ib_lag_should_assign_affinity(struct mlx5_ib_dev *dev) · 1058 unmodified lines
1614	1615	(MLX5_CAP_GEN(dev->mdev, num_lag_ports) > 1 &&
1615	1616	MLX5_CAP_GEN(dev->mdev, lag_tx_port_affinity));
1616	1617	}
	1618	+
	1619	+static inline bool rt_supported(int ts_cap)
	1620	+{
	1621	+ return ts_cap == MLX5_TIMESTAMP_FORMAT_CAP_REAL_TIME \|\|
	1622	+ ts_cap == MLX5_TIMESTAMP_FORMAT_CAP_FREE_RUNNING_AND_REAL_TIME;
	1623	+}
1617	1624	#endif /* MLX5_IB_H */

drivers/infiniband/hw/mlx5/qp.c+25−5

@@ -1180,8 +1180,16 @@ static bool fr_supported(int ts_cap) · 1179 unmodified lines
1180	1180	}
1181	1181
1182	1182	static int get_ts_format(struct mlx5_ib_dev dev, struct mlx5_ib_cq cq,
1183		− bool fr_sup)
	1183	+ bool fr_sup, bool rt_sup)
1184	1184	{
	1185	+ if (cq->private_flags & MLX5_IB_CQ_PR_FLAGS_REAL_TIME_TS) {
	1186	+ if (!rt_sup) {
	1187	+ mlx5_ib_dbg(dev,
	1188	+ "Real time TS format is not supported\n");
	1189	+ return -EOPNOTSUPP;
	1190	+ }
	1191	+ return MLX5_TIMESTAMP_FORMAT_REAL_TIME;
	1192	+ }
1185	1193	if (cq->create_flags & IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION) {
1186	1194	if (!fr_sup) {
1187	1195	mlx5_ib_dbg(dev,
@@ -1198,14 +1206,16 @@ static int get_rq_ts_format(struct mlx5_ib_dev dev, struct mlx5_ib_cq recv_cq) · 10 unmodified lines
1198	1206	{
1199	1207	u8 ts_cap = MLX5_CAP_GEN(dev->mdev, rq_ts_format);
1200	1208
1201		− return get_ts_format(dev, recv_cq, fr_supported(ts_cap));
	1209	+ return get_ts_format(dev, recv_cq, fr_supported(ts_cap),
	1210	+ rt_supported(ts_cap));
1202	1211	}
1203	1212
1204	1213	static int get_sq_ts_format(struct mlx5_ib_dev dev, struct mlx5_ib_cq send_cq)
1205	1214	{
1206	1215	u8 ts_cap = MLX5_CAP_GEN(dev->mdev, sq_ts_format);
1207	1216
1208		− return get_ts_format(dev, send_cq, fr_supported(ts_cap));
	1217	+ return get_ts_format(dev, send_cq, fr_supported(ts_cap),
	1218	+ rt_supported(ts_cap));
1209	1219	}
1210	1220
1211	1221	static int get_qp_ts_format(struct mlx5_ib_dev dev, struct mlx5_ib_cq send_cq,
@@ -1213,18 +1223,28 @@ static int get_qp_ts_format(struct mlx5_ib_dev dev, struct mlx5_ib_cq send_cq, · 1 unmodified line
1213	1223	{
1214	1224	u8 ts_cap = MLX5_CAP_ROCE(dev->mdev, qp_ts_format);
1215	1225	bool fr_sup = fr_supported(ts_cap);
	1226	+ bool rt_sup = rt_supported(ts_cap);
1216	1227	u8 default_ts = fr_sup ? MLX5_TIMESTAMP_FORMAT_FREE_RUNNING :
1217	1228	MLX5_TIMESTAMP_FORMAT_DEFAULT;
1218	1229	int send_ts_format =
1219		− send_cq ? get_ts_format(dev, send_cq, fr_sup) :
	1230	+ send_cq ? get_ts_format(dev, send_cq, fr_sup, rt_sup) :
1220	1231	default_ts;
1221	1232	int recv_ts_format =
1222		− recv_cq ? get_ts_format(dev, recv_cq, fr_sup) :
	1233	+ recv_cq ? get_ts_format(dev, recv_cq, fr_sup, rt_sup) :
1223	1234	default_ts;
1224	1235
1225	1236	if (send_ts_format < 0 \|\| recv_ts_format < 0)
1226	1237	return -EOPNOTSUPP;
1227	1238
	1239	+ if (send_ts_format != MLX5_TIMESTAMP_FORMAT_DEFAULT &&
	1240	+ recv_ts_format != MLX5_TIMESTAMP_FORMAT_DEFAULT &&
	1241	+ send_ts_format != recv_ts_format) {
	1242	+ mlx5_ib_dbg(
	1243	+ dev,
	1244	+ "The send ts_format does not match the receive ts_format\n");
	1245	+ return -EOPNOTSUPP;
	1246	+ }
	1247	+
1228	1248	return send_ts_format == default_ts ? recv_ts_format : send_ts_format;
1229	1249	}
1230	1250

include/uapi/rdma/mlx5-abi.h+2−0

@@ -101,6 +101,7 @@ enum mlx5_ib_alloc_ucontext_resp_mask { · 100 unmodified lines
101	101	MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
102	102	MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_DUMP_FILL_MKEY = 1UL << 1,
103	103	MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_ECE = 1UL << 2,
	104	+ MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_REAL_TIME_TS = 1UL << 4,
104	105	};
105	106
106	107	enum mlx5_user_cmds_supp_uhw {
@@ -270,6 +271,7 @@ struct mlx5_ib_query_device_resp { · 163 unmodified lines
270	271	enum mlx5_ib_create_cq_flags {
271	272	MLX5_IB_CREATE_CQ_FLAGS_CQE_128B_PAD = 1 << 0,
272	273	MLX5_IB_CREATE_CQ_FLAGS_UAR_PAGE_INDEX = 1 << 1,
	274	+ MLX5_IB_CREATE_CQ_FLAGS_REAL_TIME_TS = 1 << 2,
273	275	};
274	276
275	277	struct mlx5_ib_create_cq {