VPU stands for Versatile Processing Unit and it's a CPU-integrated inference accelerator for Computer Vision and Deep Learning applications. The VPU device consist of following components: - Buttress - provides CPU to VPU integration, interrupt, frequency and power management. - Memory Management Unit (based on ARM MMU-600) - translates VPU to host DMA addresses, isolates user workloads. - RISC based microcontroller - executes firmware that provides job execution API for the kernel-mode driver - Neural Compute Subsystem (NCS) - does the actual work, provides Compute and Copy engines. - Network on Chip (NoC) - network fabric connecting all the components This driver supports VPU IP v2.7 integrated into Intel Meteor Lake client CPUs (14th generation). Module sources are at drivers/accel/ivpu and module name is "intel_vpu.ko". This patch includes only very besic functionality: - module, PCI device and IRQ initialization - register definitions and low level register manipulation functions - SET/GET_PARAM ioctls - power up without firmware
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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | +/* | |
| 3 | + * Copyright (C) 2020-2023 Intel Corporation | |
| 4 | + */ | |
| 5 | + | |
| 6 | +#ifndef __UAPI_IVPU_DRM_H__ | |
| 7 | +#define __UAPI_IVPU_DRM_H__ | |
| 8 | + | |
| 9 | +#include "drm.h" | |
| 10 | + | |
| 11 | +#if defined(__cplusplus) | |
| 12 | +extern "C" { | |
| 13 | +#endif | |
| 14 | + | |
| 15 | +#define DRM_IVPU_DRIVER_MAJOR 1 | |
| 16 | +#define DRM_IVPU_DRIVER_MINOR 0 | |
| 17 | + | |
| 18 | +#define DRM_IVPU_GET_PARAM 0x00 | |
| 19 | +#define DRM_IVPU_SET_PARAM 0x01 | |
| 20 | + | |
| 21 | +#define DRM_IOCTL_IVPU_GET_PARAM \ | |
| 22 | + DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param) | |
| 23 | + | |
| 24 | +#define DRM_IOCTL_IVPU_SET_PARAM \ | |
| 25 | + DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SET_PARAM, struct drm_ivpu_param) | |
| 26 | + | |
| 27 | +/** | |
| 28 | + * DOC: contexts | |
| 29 | + * | |
| 30 | + * VPU contexts have private virtual address space, job queues and priority. | |
| 31 | + * Each context is identified by an unique ID. Context is created on open(). | |
| 32 | + */ | |
| 33 | + | |
| 34 | +#define DRM_IVPU_PARAM_DEVICE_ID 0 | |
| 35 | +#define DRM_IVPU_PARAM_DEVICE_REVISION 1 | |
| 36 | +#define DRM_IVPU_PARAM_PLATFORM_TYPE 2 | |
| 37 | +#define DRM_IVPU_PARAM_CORE_CLOCK_RATE 3 | |
| 38 | +#define DRM_IVPU_PARAM_NUM_CONTEXTS 4 | |
| 39 | +#define DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS 5 | |
| 40 | +#define DRM_IVPU_PARAM_CONTEXT_PRIORITY 6 | |
| 41 | + | |
| 42 | +#define DRM_IVPU_PLATFORM_TYPE_SILICON 0 | |
| 43 | + | |
| 44 | +#define DRM_IVPU_CONTEXT_PRIORITY_IDLE 0 | |
| 45 | +#define DRM_IVPU_CONTEXT_PRIORITY_NORMAL 1 | |
| 46 | +#define DRM_IVPU_CONTEXT_PRIORITY_FOCUS 2 | |
| 47 | +#define DRM_IVPU_CONTEXT_PRIORITY_REALTIME 3 | |
| 48 | + | |
| 49 | +/** | |
| 50 | + * struct drm_ivpu_param - Get/Set VPU parameters | |
| 51 | + */ | |
| 52 | +struct drm_ivpu_param { | |
| 53 | + /** | |
| 54 | + * @param: | |
| 55 | + * | |
| 56 | + * Supported params: | |
| 57 | + * | |
| 58 | + * %DRM_IVPU_PARAM_DEVICE_ID: | |
| 59 | + * PCI Device ID of the VPU device (read-only) | |
| 60 | + * | |
| 61 | + * %DRM_IVPU_PARAM_DEVICE_REVISION: | |
| 62 | + * VPU device revision (read-only) | |
| 63 | + * | |
| 64 | + * %DRM_IVPU_PARAM_PLATFORM_TYPE: | |
| 65 | + * Returns %DRM_IVPU_PLATFORM_TYPE_SILICON on real hardware or device specific | |
| 66 | + * platform type when executing on a simulator or emulator (read-only) | |
| 67 | + * | |
| 68 | + * %DRM_IVPU_PARAM_CORE_CLOCK_RATE: | |
| 69 | + * Current PLL frequency (read-only) | |
| 70 | + * | |
| 71 | + * %DRM_IVPU_PARAM_NUM_CONTEXTS: | |
| 72 | + * Maximum number of simultaneously existing contexts (read-only) | |
| 73 | + * | |
| 74 | + * %DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS: | |
| 75 | + * Lowest VPU virtual address available in the current context (read-only) | |
| 76 | + * | |
| 77 | + * %DRM_IVPU_PARAM_CONTEXT_PRIORITY: | |
| 78 | + * Value of current context scheduling priority (read-write). | |
| 79 | + * See DRM_IVPU_CONTEXT_PRIORITY_* for possible values. | |
| 80 | + * | |
| 81 | + */ | |
| 82 | + __u32 param; | |
| 83 | + | |
| 84 | + /** @index: Index for params that have multiple instances */ | |
| 85 | + __u32 index; | |
| 86 | + | |
| 87 | + /** @value: Param value */ | |
| 88 | + __u64 value; | |
| 89 | +}; | |
| 90 | + | |
| 91 | +#if defined(__cplusplus) | |
| 92 | +} | |
| 93 | +#endif | |
| 94 | + | |
| 95 | +#endif /* __UAPI_IVPU_DRM_H__ */ | |