History

mtd: rawnand: Allocate the interface configurations dynamically

Instead of manipulating the statically allocated structure and copy timings around, allocate one at identification time and save it in the nand_chip structure once it has been initialized. All NAND chips using the same interface configuration during reset and startup, we define a helper to retrieve a single reset interface configuration object, shared across all NAND chips. We use a second pointer to always have a reference on the currently applied interface configuration, which may either point to the "best interface configuration" or to the "default reset interface configuration".

Miquel Raynal committed 6 years ago

Commit 35b6bcc1 parent a69ad114 files · +67 −35Browse files

Unified · Split

4 files
  1. drivers/mtd/nand/raw/internals.h +1 −0
  2. drivers/mtd/nand/raw/nand_base.c +52 −32
  3. drivers/mtd/nand/raw/nand_timings.c +6 −0
  4. include/linux/mtd/rawnand.h +8 −3
drivers/mtd/nand/raw/internals.h+1−0
@@ -93,6 +93,7 @@ onfi_find_closest_sdr_mode(const struct nand_sdr_timings *spec_timings); · 92 unmodified lines
93int nand_choose_best_sdr_timings(struct nand_chip *chip,93int nand_choose_best_sdr_timings(struct nand_chip *chip,
94 struct nand_interface_config *iface,94 struct nand_interface_config *iface,
95 struct nand_sdr_timings *spec_timings);95 struct nand_sdr_timings *spec_timings);
96const struct nand_interface_config *nand_get_reset_interface_config(void);
96int nand_get_features(struct nand_chip *chip, int addr, u8 *subfeature_param);97int nand_get_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
97int nand_set_features(struct nand_chip *chip, int addr, u8 *subfeature_param);98int nand_set_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
98int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf,99int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf,
drivers/mtd/nand/raw/nand_base.c+52−32
@@ -928,9 +928,9 @@ static int nand_reset_interface(struct nand_chip *chip, int chipnr) · 927 unmodified lines
928 * timings to timing mode 0.928 * timings to timing mode 0.
929 */929 */
930 930
931 onfi_fill_interface_config(chip, &chip->interface_config,931 chip->current_interface_config = nand_get_reset_interface_config();
932 NAND_SDR_IFACE, 0);932 ret = ops->setup_interface(chip, chipnr,
933 ret = ops->setup_interface(chip, chipnr, &chip->interface_config);933 chip->current_interface_config);
934 if (ret)934 if (ret)
935 pr_err("Failed to configure data interface to SDR timing mode 0\n");935 pr_err("Failed to configure data interface to SDR timing mode 0\n");
936 936
@@ -949,13 +949,25 @@ static int nand_reset_interface(struct nand_chip *chip, int chipnr) · 12 unmodified lines
949 */949 */
950static int nand_setup_interface(struct nand_chip *chip, int chipnr)950static int nand_setup_interface(struct nand_chip *chip, int chipnr)
951{951{
952 u8 mode = chip->interface_config.timings.mode;952 const struct nand_controller_ops *ops = chip->controller->ops;
953 u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = { mode, };953 u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = { };
954 int ret;954 int ret;
955 955
956 if (!nand_controller_can_setup_interface(chip))956 if (!nand_controller_can_setup_interface(chip))
957 return 0;957 return 0;
958 958
959 /*
960 * A nand_reset_interface() put both the NAND chip and the NAND
961 * controller in timings mode 0. If the default mode for this chip is
962 * also 0, no need to proceed to the change again. Plus, at probe time,
963 * nand_setup_interface() uses ->set/get_features() which would
964 * fail anyway as the parameter page is not available yet.
965 */
966 if (!chip->best_interface_config)
967 return 0;
968
969 tmode_param[0] = chip->best_interface_config->timings.mode;
970
959 /* Change the mode on the chip side (if supported by the NAND chip) */971 /* Change the mode on the chip side (if supported by the NAND chip) */
960 if (nand_supports_set_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE)) {972 if (nand_supports_set_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE)) {
961 nand_select_target(chip, chipnr);973 nand_select_target(chip, chipnr);
@@ -967,14 +979,13 @@ static int nand_setup_interface(struct nand_chip *chip, int chipnr) · 5 unmodified lines
967 }979 }
968 980
969 /* Change the mode on the controller side */981 /* Change the mode on the controller side */
970 ret = chip->controller->ops->setup_interface(chip, chipnr,982 ret = ops->setup_interface(chip, chipnr, chip->best_interface_config);
971 &chip->interface_config);
972 if (ret)983 if (ret)
973 return ret;984 return ret;
974 985
975 /* Check the mode has been accepted by the chip, if supported */986 /* Check the mode has been accepted by the chip, if supported */
976 if (!nand_supports_get_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE))987 if (!nand_supports_get_features(chip, ONFI_FEATURE_ADDR_TIMING_MODE))
977 return 0;988 goto update_interface_config;
978 989
979 memset(tmode_param, 0, ONFI_SUBFEATURE_PARAM_LEN);990 memset(tmode_param, 0, ONFI_SUBFEATURE_PARAM_LEN);
980 nand_select_target(chip, chipnr);991 nand_select_target(chip, chipnr);
@@ -984,12 +995,15 @@ static int nand_setup_interface(struct nand_chip *chip, int chipnr) · 3 unmodified lines
984 if (ret)995 if (ret)
985 goto err_reset_chip;996 goto err_reset_chip;
986 997
987 if (tmode_param[0] != mode) {998 if (tmode_param[0] != chip->best_interface_config->timings.mode) {
988 pr_warn("timing mode %d not acknowledged by the NAND chip\n",999 pr_warn("timing mode %d not acknowledged by the NAND chip\n",
989 mode);1000 chip->best_interface_config->timings.mode);
990 goto err_reset_chip;1001 goto err_reset_chip;
991 }1002 }
992 1003
1004update_interface_config:
1005 chip->current_interface_config = chip->best_interface_config;
1006
993 return 0;1007 return 0;
994 1008
995err_reset_chip:1009err_reset_chip:
@@ -1031,8 +1045,10 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip, · 35 unmodified lines
1031 /* Verify the controller supports the requested interface */1045 /* Verify the controller supports the requested interface */
1032 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY,1046 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY,
1033 iface);1047 iface);
1034 if (!ret)1048 if (!ret) {
1049 chip->best_interface_config = iface;
1035 return ret;1050 return ret;
1051 }
1036 1052
1037 /* Fallback to slower modes */1053 /* Fallback to slower modes */
1038 best_mode = iface->timings.mode;1054 best_mode = iface->timings.mode;
@@ -1046,9 +1062,11 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip, · 7 unmodified lines
1046 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY,1062 ret = ops->setup_interface(chip, NAND_DATA_IFACE_CHECK_ONLY,
1047 iface);1063 iface);
1048 if (!ret)1064 if (!ret)
1049 return 0;1065 break;
1050 }1066 }
1051 1067
1068 chip->best_interface_config = iface;
1069
1052 return 0;1070 return 0;
1053}1071}
1054 1072
@@ -1067,15 +1085,25 @@ int nand_choose_best_sdr_timings(struct nand_chip *chip, · 12 unmodified lines
1067 */1085 */
1068static int nand_choose_interface_config(struct nand_chip *chip)1086static int nand_choose_interface_config(struct nand_chip *chip)
1069{1087{
1088 struct nand_interface_config *iface;
1089 int ret;
1090
1070 if (!nand_controller_can_setup_interface(chip))1091 if (!nand_controller_can_setup_interface(chip))
1071 return 0;1092 return 0;
1072 1093
1094 iface = kzalloc(sizeof(*iface), GFP_KERNEL);
1095 if (!iface)
1096 return -ENOMEM;
1097
1073 if (chip->ops.choose_interface_config)1098 if (chip->ops.choose_interface_config)
1074 return chip->ops.choose_interface_config(chip,1099 ret = chip->ops.choose_interface_config(chip, iface);
1075 &chip->interface_config);1100 else
1101 ret = nand_choose_best_sdr_timings(chip, iface, NULL);
1076 1102
1077 return nand_choose_best_sdr_timings(chip, &chip->interface_config,1103 if (ret)
1078 NULL);1104 kfree(iface);
1105
1106 return ret;
1079}1107}
1080 1108
1081/**1109/**
@@ -2501,7 +2529,6 @@ EXPORT_SYMBOL_GPL(nand_subop_get_data_len); · 1419 unmodified lines
2501 */2529 */
2502int nand_reset(struct nand_chip *chip, int chipnr)2530int nand_reset(struct nand_chip *chip, int chipnr)
2503{2531{
2504 struct nand_interface_config saved_intf_config = chip->interface_config;
2505 int ret;2532 int ret;
2506 2533
2507 ret = nand_reset_interface(chip, chipnr);2534 ret = nand_reset_interface(chip, chipnr);
@@ -2519,18 +2546,6 @@ int nand_reset(struct nand_chip *chip, int chipnr) · 11 unmodified lines
2519 if (ret)2546 if (ret)
2520 return ret;2547 return ret;
2521 2548
2522 /*
2523 * A nand_reset_interface() put both the NAND chip and the NAND
2524 * controller in timings mode 0. If the default mode for this chip is
2525 * also 0, no need to proceed to the change again. Plus, at probe time,
2526 * nand_setup_interface() uses ->set/get_features() which would
2527 * fail anyway as the parameter page is not available yet.
2528 */
2529 if (!memcmp(&chip->interface_config, &saved_intf_config,
2530 sizeof(saved_intf_config)))
2531 return 0;
2532
2533 chip->interface_config = saved_intf_config;
2534 ret = nand_setup_interface(chip, chipnr);2549 ret = nand_setup_interface(chip, chipnr);
2535 if (ret)2550 if (ret)
2536 return ret;2551 return ret;
@@ -5198,7 +5213,7 @@ static int nand_scan_ident(struct nand_chip *chip, unsigned int maxchips, · 2661 unmodified lines
5198 mutex_init(&chip->lock);5213 mutex_init(&chip->lock);
5199 5214
5200 /* Enforce the right timings for reset/detection */5215 /* Enforce the right timings for reset/detection */
5201 onfi_fill_interface_config(chip, &chip->interface_config, NAND_SDR_IFACE, 0);5216 chip->current_interface_config = nand_get_reset_interface_config();
5202 5217
5203 ret = nand_dt_init(chip);5218 ret = nand_dt_init(chip);
5204 if (ret)5219 if (ret)
@@ -5994,7 +6009,7 @@ static int nand_scan_tail(struct nand_chip *chip) · 789 unmodified lines
5994 for (i = 0; i < nanddev_ntargets(&chip->base); i++) {6009 for (i = 0; i < nanddev_ntargets(&chip->base); i++) {
5995 ret = nand_setup_interface(chip, i);6010 ret = nand_setup_interface(chip, i);
5996 if (ret)6011 if (ret)
5997 goto err_nanddev_cleanup;6012 goto err_free_interface_config;
5998 }6013 }
5999 6014
6000 /* Check, if we should skip the bad block table scan */6015 /* Check, if we should skip the bad block table scan */
@@ -6004,10 +6019,12 @@ static int nand_scan_tail(struct nand_chip *chip) · 3 unmodified lines
6004 /* Build bad block table */6019 /* Build bad block table */
6005 ret = nand_create_bbt(chip);6020 ret = nand_create_bbt(chip);
6006 if (ret)6021 if (ret)
6007 goto err_nanddev_cleanup;6022 goto err_free_interface_config;
6008 6023
6009 return 0;6024 return 0;
6010 6025
6026err_free_interface_config:
6027 kfree(chip->best_interface_config);
6011 6028
6012err_nanddev_cleanup:6029err_nanddev_cleanup:
6013 nanddev_cleanup(&chip->base);6030 nanddev_cleanup(&chip->base);
@@ -6101,6 +6118,9 @@ void nand_cleanup(struct nand_chip *chip) · 87 unmodified lines
6101 & NAND_BBT_DYNAMICSTRUCT)6118 & NAND_BBT_DYNAMICSTRUCT)
6102 kfree(chip->badblock_pattern);6119 kfree(chip->badblock_pattern);
6103 6120
6121 /* Free the data interface */
6122 kfree(chip->best_interface_config);
6123
6104 /* Free manufacturer priv data. */6124 /* Free manufacturer priv data. */
6105 nand_manufacturer_cleanup(chip);6125 nand_manufacturer_cleanup(chip);
6106 6126
drivers/mtd/nand/raw/nand_timings.c+6−0
@@ -292,6 +292,12 @@ static const struct nand_interface_config onfi_sdr_timings[] = { · 291 unmodified lines
292 },292 },
293};293};
294 294
295/* All NAND chips share the same reset data interface: SDR mode 0 */
296const struct nand_interface_config *nand_get_reset_interface_config(void)
297{
298 return &onfi_sdr_timings[0];
299}
300
295/**301/**
296 * onfi_find_closest_sdr_mode - Derive the closest ONFI SDR timing mode given a302 * onfi_find_closest_sdr_mode - Derive the closest ONFI SDR timing mode given a
297 * set of timings303 * set of timings
include/linux/mtd/rawnand.h+8−3
@@ -1069,7 +1069,11 @@ struct nand_manufacturer { · 1068 unmodified lines
1069 * @options: Various chip options. They can partly be set to inform nand_scan1069 * @options: Various chip options. They can partly be set to inform nand_scan
1070 * about special functionality. See the defines for further1070 * about special functionality. See the defines for further
1071 * explanation.1071 * explanation.
1072 * @interface_config: NAND interface timing information1072 * @current_interface_config: The currently used NAND interface configuration
1073 * @best_interface_config: The best NAND interface configuration which fits both
1074 * the NAND chip and NAND controller constraints. If
1075 * unset, the default reset interface configuration must
1076 * be used.
1073 * @bbt_erase_shift: Number of address bits in a bbt entry1077 * @bbt_erase_shift: Number of address bits in a bbt entry
1074 * @bbt_options: Bad block table specific options. All options used here must1078 * @bbt_options: Bad block table specific options. All options used here must
1075 * come from bbm.h. By default, these options will be copied to1079 * come from bbm.h. By default, these options will be copied to
@@ -1116,7 +1120,8 @@ struct nand_chip { · 40 unmodified lines
1116 unsigned int options;1120 unsigned int options;
1117 1121
1118 /* Data interface */1122 /* Data interface */
1119 struct nand_interface_config interface_config;1123 const struct nand_interface_config *current_interface_config;
1124 struct nand_interface_config *best_interface_config;
1120 1125
1121 /* Bad block information */1126 /* Bad block information */
1122 unsigned int bbt_erase_shift;1127 unsigned int bbt_erase_shift;
@@ -1209,7 +1214,7 @@ static inline struct device_node *nand_get_flash_node(struct nand_chip *chip) · 86 unmodified lines
1209static inline const struct nand_interface_config *1214static inline const struct nand_interface_config *
1210nand_get_interface_config(struct nand_chip *chip)1215nand_get_interface_config(struct nand_chip *chip)
1211{1216{
1212 return &chip->interface_config;1217 return chip->current_interface_config;
1213}1218}
1214 1219
1215/*1220/*