Use direct function call for clock_enable instead of eemi ops.
Unified · Split
| @@ -39,7 +39,7 @@ static int zynqmp_clk_gate_enable(struct clk_hw *hw) · 38 unmodified lines | ||
| 39 | 39 | int ret; |
| 40 | 40 | const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); |
| 41 | 41 | |
| 42 | − ret = eemi_ops->clock_enable(clk_id); | |
| 42 | + ret = zynqmp_pm_clock_enable(clk_id); | |
| 43 | 43 | |
| 44 | 44 | if (ret) |
| 45 | 45 | pr_warn_once("%s() clock enabled failed for %s, ret = %d\n", |
| @@ -246,12 +246,11 @@ static int zynqmp_pll_enable(struct clk_hw *hw) · 245 unmodified lines | ||
| 246 | 246 | const char *clk_name = clk_hw_get_name(hw); |
| 247 | 247 | u32 clk_id = clk->clk_id; |
| 248 | 248 | int ret; |
| 249 | − const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); | |
| 250 | 249 | |
| 251 | 250 | if (zynqmp_pll_is_enabled(hw)) |
| 252 | 251 | return 0; |
| 253 | 252 | |
| 254 | − ret = eemi_ops->clock_enable(clk_id); | |
| 253 | + ret = zynqmp_pm_clock_enable(clk_id); | |
| 255 | 254 | if (ret) |
| 256 | 255 | pr_warn_once("%s() clock enable failed for %s, ret = %d\n", |
| 257 | 256 | __func__, clk_name, ret); |
| @@ -351,10 +351,11 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); · 350 unmodified lines | ||
| 351 | 351 | * |
| 352 | 352 | * Return: Returns status, either success or error+reason |
| 353 | 353 | */ |
| 354 | −static int zynqmp_pm_clock_enable(u32 clock_id) | |
| 354 | +int zynqmp_pm_clock_enable(u32 clock_id) | |
| 355 | 355 | { |
| 356 | 356 | return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL); |
| 357 | 357 | } |
| 358 | +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); | |
| 358 | 359 | |
| 359 | 360 | /** |
| 360 | 361 | * zynqmp_pm_clock_disable() - Disable the clock for given id |
| @@ -737,7 +738,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) · 376 unmodified lines | ||
| 737 | 738 | } |
| 738 | 739 | |
| 739 | 740 | static const struct zynqmp_eemi_ops eemi_ops = { |
| 740 | − .clock_enable = zynqmp_pm_clock_enable, | |
| 741 | 741 | .clock_disable = zynqmp_pm_clock_disable, |
| 742 | 742 | .clock_getstate = zynqmp_pm_clock_getstate, |
| 743 | 743 | .clock_setdivider = zynqmp_pm_clock_setdivider, |
| @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { · 295 unmodified lines | ||
| 296 | 296 | struct zynqmp_eemi_ops { |
| 297 | 297 | int (*fpga_load)(const u64 address, const u32 size, const u32 flags); |
| 298 | 298 | int (*fpga_get_status)(u32 *value); |
| 299 | − int (*clock_enable)(u32 clock_id); | |
| 300 | 299 | int (*clock_disable)(u32 clock_id); |
| 301 | 300 | int (*clock_getstate)(u32 clock_id, u32 *state); |
| 302 | 301 | int (*clock_setdivider)(u32 clock_id, u32 divider); |
| @@ -331,6 +330,7 @@ const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void); · 28 unmodified lines | ||
| 331 | 330 | int zynqmp_pm_get_api_version(u32 *version); |
| 332 | 331 | int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); |
| 333 | 332 | int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); |
| 333 | +int zynqmp_pm_clock_enable(u32 clock_id); | |
| 334 | 334 | #else |
| 335 | 335 | static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) |
| 336 | 336 | { |
| @@ -349,6 +349,10 @@ static inline int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, · 12 unmodified lines | ||
| 349 | 349 | { |
| 350 | 350 | return -ENODEV; |
| 351 | 351 | } |
| 352 | +static inline int zynqmp_pm_clock_enable(u32 clock_id) | |
| 353 | +{ | |
| 354 | + return -ENODEV; | |
| 355 | +} | |
| 352 | 356 | #endif |
| 353 | 357 | |
| 354 | 358 | #endif /* __FIRMWARE_ZYNQMP_H__ */ |