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arm64: Enable perf events based hard lockup detector

With the recent feature added to enable perf events to use pseudo NMIs as interrupts on platforms which support GICv3 or later, its now been possible to enable hard lockup detector (or NMI watchdog) on arm64 platforms. So enable corresponding support. One thing to note here is that normally lockup detector is initialized just after the early initcalls but PMU on arm64 comes up much later as device_initcall(). So we need to re-initialize lockup detection once PMU has been initialized.

Sumit Garg committed 6 years ago

Commit 367c8201 parent 6b463384 files · +48 −2Browse files

Unified · Split

4 files
  1. arch/arm64/Kconfig +2 −0
  2. arch/arm64/kernel/perf_event.c +39 −2
  3. drivers/perf/arm_pmu.c +5 −0
  4. include/linux/perf/arm_pmu.h +2 −0
arch/arm64/Kconfig+2−0
@@ -170,6 +170,8 @@ config ARM64 · 169 unmodified lines
170170 select HAVE_NMI
171171 select HAVE_PATA_PLATFORM
172172 select HAVE_PERF_EVENTS
173+ select HAVE_PERF_EVENTS_NMI if ARM64_PSEUDO_NMI
174+ select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
173175 select HAVE_PERF_REGS
174176 select HAVE_PERF_USER_STACK_DUMP
175177 select HAVE_REGS_AND_STACK_ACCESS_API
arch/arm64/kernel/perf_event.c+39−2
@@ -23,6 +23,8 @@ · 22 unmodified lines
2323 #include <linux/platform_device.h>
2424 #include <linux/sched_clock.h>
2525 #include <linux/smp.h>
26+#include <linux/nmi.h>
27+#include <linux/cpufreq.h>
2628
2729 /* ARMv8 Cortex-A53 specific event types. */
2830 #define ARMV8_A53_PERFCTR_PREF_LINEFILL 0xC2
@@ -1248,10 +1250,21 @@ static struct platform_driver armv8_pmu_driver = { · 1219 unmodified lines
12481250
12491251 static int __init armv8_pmu_driver_init(void)
12501252 {
1253+ int ret;
1254+
12511255 if (acpi_disabled)
1252− return platform_driver_register(&armv8_pmu_driver);
1256+ ret = platform_driver_register(&armv8_pmu_driver);
12531257 else
1254− return arm_pmu_acpi_probe(armv8_pmuv3_init);
1258+ ret = arm_pmu_acpi_probe(armv8_pmuv3_init);
1259+
1260+ /*
1261+ * Try to re-initialize lockup detector after PMU init in
1262+ * case PMU events are triggered via NMIs.
1263+ */
1264+ if (ret == 0 && arm_pmu_irq_is_nmi())
1265+ lockup_detector_init();
1266+
1267+ return ret;
12551268 }
12561269 device_initcall(armv8_pmu_driver_init)
12571270
@@ -1309,3 +1322,27 @@ void arch_perf_update_userpage(struct perf_event *event, · 51 unmodified lines
13091322 userpg->cap_user_time_zero = 1;
13101323 userpg->cap_user_time_short = 1;
13111324 }
1325+
1326+#ifdef CONFIG_HARDLOCKUP_DETECTOR_PERF
1327+/*
1328+ * Safe maximum CPU frequency in case a particular platform doesn't implement
1329+ * cpufreq driver. Although, architecture doesn't put any restrictions on
1330+ * maximum frequency but 5 GHz seems to be safe maximum given the available
1331+ * Arm CPUs in the market which are clocked much less than 5 GHz. On the other
1332+ * hand, we can't make it much higher as it would lead to a large hard-lockup
1333+ * detection timeout on parts which are running slower (eg. 1GHz on
1334+ * Developerbox) and doesn't possess a cpufreq driver.
1335+ */
1336+#define SAFE_MAX_CPU_FREQ 5000000000UL // 5 GHz
1337+u64 hw_nmi_get_sample_period(int watchdog_thresh)
1338+{
1339+ unsigned int cpu = smp_processor_id();
1340+ unsigned long max_cpu_freq;
1341+
1342+ max_cpu_freq = cpufreq_get_hw_max_freq(cpu) * 1000UL;
1343+ if (!max_cpu_freq)
1344+ max_cpu_freq = SAFE_MAX_CPU_FREQ;
1345+
1346+ return (u64)max_cpu_freq * watchdog_thresh;
1347+}
1348+#endif
drivers/perf/arm_pmu.c+5−0
@@ -726,6 +726,11 @@ static int armpmu_get_cpu_irq(struct arm_pmu *pmu, int cpu) · 725 unmodified lines
726726 return per_cpu(hw_events->irq, cpu);
727727 }
728728
729+bool arm_pmu_irq_is_nmi(void)
730+{
731+ return has_nmi;
732+}
733+
729734 /*
730735 * PMU hardware loses all context when a CPU goes offline.
731736 * When a CPU is hotplugged back in, since some hardware registers are
include/linux/perf/arm_pmu.h+2−0
@@ -163,6 +163,8 @@ int arm_pmu_acpi_probe(armpmu_init_fn init_fn); · 162 unmodified lines
163163 static inline int arm_pmu_acpi_probe(armpmu_init_fn init_fn) { return 0; }
164164 #endif
165165
166+bool arm_pmu_irq_is_nmi(void);
167+
166168 /* Internal functions only for core arm_pmu code */
167169 struct arm_pmu *armpmu_alloc(void);
168170 struct arm_pmu *armpmu_alloc_atomic(void);

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