Add definitions of four clocks which need to be manipulated in order to initialize the AHB bus which exposes the SCC block in the global address space.
Unified · Split
| @@ -186,6 +186,10 @@ · 185 unmodified lines | |||
| 186 | #define UFS_UNIPRO_CORE_CLK_SRC 177 | 186 | #define UFS_UNIPRO_CORE_CLK_SRC 177 |
| 187 | #define GCC_MMSS_GPLL0_CLK 178 | 187 | #define GCC_MMSS_GPLL0_CLK 178 |
| 188 | #define HMSS_GPLL0_CLK_SRC 179 | 188 | #define HMSS_GPLL0_CLK_SRC 179 |
| 189 | #define GCC_IM_SLEEP 180 | ||
| 190 | #define AGGRE2_SNOC_NORTH_AXI 181 | ||
| 191 | #define SSC_XO 182 | ||
| 192 | #define SSC_CNOC_AHBS_CLK 183 | ||
| 189 | 193 | ||
| 190 | #define PCIE_0_GDSC 0 | 194 | #define PCIE_0_GDSC 0 |
| 191 | #define UFS_GDSC 1 | 195 | #define UFS_GDSC 1 |