Add definitions of four clocks which need to be manipulated in order to initialize the AHB bus which exposes the SCC block in the global address space.
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| @@ -186,6 +186,10 @@ · 185 unmodified lines | ||
| 186 | 186 | #define UFS_UNIPRO_CORE_CLK_SRC 177 |
| 187 | 187 | #define GCC_MMSS_GPLL0_CLK 178 |
| 188 | 188 | #define HMSS_GPLL0_CLK_SRC 179 |
| 189 | +#define GCC_IM_SLEEP 180 | |
| 190 | +#define AGGRE2_SNOC_NORTH_AXI 181 | |
| 191 | +#define SSC_XO 182 | |
| 192 | +#define SSC_CNOC_AHBS_CLK 183 | |
| 189 | 193 | |
| 190 | 194 | #define PCIE_0_GDSC 0 |
| 191 | 195 | #define UFS_GDSC 1 |