On x86_64, currently 3 variants of AVX512, 3 variants of AVX2 and 3 variants of SSE2 are benchmarked on initialization, taking between 144-153 jiffies. Testing across a hardware pool of various generations of intel cpus I could not find a single case where SSE2 won over AVX2 or AVX512. There are cases where AVX2 wins over AVX512 however. Change "prefer" into an integer priority field (similar to how recov selection works) to have more than one ranking level available, which is backwards compatible with existing behavior. Give AVX2/512 variants higher priority over SSE2 in order to skip SSE testing when AVX is available. in a AVX2/x86_64/HZ=250 case this saves in the order of 200ms of initialization time.
Unified · Split
| @@ -81,7 +81,7 @@ struct raid6_calls { · 80 unmodified lines | ||
| 81 | 81 | void (*xor_syndrome)(int, int, int, size_t, void **); |
| 82 | 82 | int (*valid)(void); /* Returns 1 if this routine set is usable */ |
| 83 | 83 | const char *name; /* Name of this routine set */ |
| 84 | − int prefer; /* Has special performance attribute */ | |
| 84 | + int priority; /* Relative priority ranking if non-zero */ | |
| 85 | 85 | }; |
| 86 | 86 | |
| 87 | 87 | /* Selected algorithm */ |
| @@ -151,7 +151,7 @@ static inline const struct raid6_calls *raid6_choose_gen( · 150 unmodified lines | ||
| 151 | 151 | const struct raid6_calls *best; |
| 152 | 152 | |
| 153 | 153 | for (bestgenperf = 0, best = NULL, algo = raid6_algos; *algo; algo++) { |
| 154 | − if (!best || (*algo)->prefer >= best->prefer) { | |
| 154 | + if (!best || (*algo)->priority >= best->priority) { | |
| 155 | 155 | if ((*algo)->valid && !(*algo)->valid()) |
| 156 | 156 | continue; |
| 157 | 157 | |
| @@ -132,7 +132,7 @@ const struct raid6_calls raid6_avx2x1 = { · 131 unmodified lines | ||
| 132 | 132 | raid6_avx21_xor_syndrome, |
| 133 | 133 | raid6_have_avx2, |
| 134 | 134 | "avx2x1", |
| 135 | − 1 /* Has cache hints */ | |
| 135 | + .priority = 2 /* Prefer AVX2 over priority 1 (SSE2 and others) */ | |
| 136 | 136 | }; |
| 137 | 137 | |
| 138 | 138 | /* |
| @@ -262,7 +262,7 @@ const struct raid6_calls raid6_avx2x2 = { · 123 unmodified lines | ||
| 262 | 262 | raid6_avx22_xor_syndrome, |
| 263 | 263 | raid6_have_avx2, |
| 264 | 264 | "avx2x2", |
| 265 | − 1 /* Has cache hints */ | |
| 265 | + .priority = 2 /* Prefer AVX2 over priority 1 (SSE2 and others) */ | |
| 266 | 266 | }; |
| 267 | 267 | |
| 268 | 268 | #ifdef CONFIG_X86_64 |
| @@ -465,6 +465,6 @@ const struct raid6_calls raid6_avx2x4 = { · 196 unmodified lines | ||
| 465 | 465 | raid6_avx24_xor_syndrome, |
| 466 | 466 | raid6_have_avx2, |
| 467 | 467 | "avx2x4", |
| 468 | − 1 /* Has cache hints */ | |
| 468 | + .priority = 2 /* Prefer AVX2 over priority 1 (SSE2 and others) */ | |
| 469 | 469 | }; |
| 470 | −#endif | |
| 470 | +#endif /* CONFIG_X86_64 */ | |
| @@ -162,7 +162,7 @@ const struct raid6_calls raid6_avx512x1 = { · 161 unmodified lines | ||
| 162 | 162 | raid6_avx5121_xor_syndrome, |
| 163 | 163 | raid6_have_avx512, |
| 164 | 164 | "avx512x1", |
| 165 | − 1 /* Has cache hints */ | |
| 165 | + .priority = 2 /* Prefer AVX512 over priority 1 (SSE2 and others) */ | |
| 166 | 166 | }; |
| 167 | 167 | |
| 168 | 168 | /* |
| @@ -319,7 +319,7 @@ const struct raid6_calls raid6_avx512x2 = { · 150 unmodified lines | ||
| 319 | 319 | raid6_avx5122_xor_syndrome, |
| 320 | 320 | raid6_have_avx512, |
| 321 | 321 | "avx512x2", |
| 322 | − 1 /* Has cache hints */ | |
| 322 | + .priority = 2 /* Prefer AVX512 over priority 1 (SSE2 and others) */ | |
| 323 | 323 | }; |
| 324 | 324 | |
| 325 | 325 | #ifdef CONFIG_X86_64 |
| @@ -557,7 +557,7 @@ const struct raid6_calls raid6_avx512x4 = { · 231 unmodified lines | ||
| 557 | 557 | raid6_avx5124_xor_syndrome, |
| 558 | 558 | raid6_have_avx512, |
| 559 | 559 | "avx512x4", |
| 560 | − 1 /* Has cache hints */ | |
| 560 | + .priority = 2 /* Prefer AVX512 over priority 1 (SSE2 and others) */ | |
| 561 | 561 | }; |
| 562 | 562 | #endif |
| 563 | 563 | |