The caller of i915_oa_init_reg_state() already sets this.
Unified · Split
| @@ -2098,9 +2098,6 @@ gen8_update_reg_state_unlocked(const struct intel_context *ce, · 2097 unmodified lines | |||
| 2098 | for (i = 0; i < ARRAY_SIZE(flex_regs); i++) | 2098 | for (i = 0; i < ARRAY_SIZE(flex_regs); i++) |
| 2099 | reg_state[ctx_flexeu0 + i * 2 + 1] = | 2099 | reg_state[ctx_flexeu0 + i * 2 + 1] = |
| 2100 | oa_config_flex_reg(stream->oa_config, flex_regs[i]); | 2100 | oa_config_flex_reg(stream->oa_config, flex_regs[i]); |
| 2101 | |||
| 2102 | reg_state[CTX_R_PWR_CLK_STATE] = | ||
| 2103 | intel_sseu_make_rpcs(ce->engine->i915, &ce->sseu); | ||
| 2104 | } | 2101 | } |
| 2105 | 2102 | ||
| 2106 | struct flex { | 2103 | struct flex { |
| @@ -2906,10 +2903,6 @@ void i915_oa_init_reg_state(const struct intel_context *ce, · 799 unmodified lines | |||
| 2906 | 2903 | ||
| 2907 | /* perf.exclusive_stream serialised by lrc_configure_all_contexts() */ | 2904 | /* perf.exclusive_stream serialised by lrc_configure_all_contexts() */ |
| 2908 | stream = READ_ONCE(engine->i915->perf.exclusive_stream); | 2905 | stream = READ_ONCE(engine->i915->perf.exclusive_stream); |
| 2909 | /* | ||
| 2910 | * For gen12, only CTX_R_PWR_CLK_STATE needs update, but the caller | ||
| 2911 | * is already doing that, so nothing to be done for gen12 here. | ||
| 2912 | */ | ||
| 2913 | if (stream && INTEL_GEN(stream->perf->i915) < 12) | 2906 | if (stream && INTEL_GEN(stream->perf->i915) < 12) |
| 2914 | gen8_update_reg_state_unlocked(ce, stream); | 2907 | gen8_update_reg_state_unlocked(ce, stream); |
| 2915 | } | 2908 | } |