Unified · Split
| @@ -2576,7 +2576,7 @@ S: Toronto, Ontario · 2575 unmodified lines | |||
| 2576 | S: Canada | 2576 | S: Canada |
| 2577 | 2577 | ||
| 2578 | N: Zwane Mwaikambo | 2578 | N: Zwane Mwaikambo |
| 2579 | E: zwane@arm.linux.org.uk | 2579 | E: zwanem@gmail.com |
| 2580 | D: Various driver hacking | 2580 | D: Various driver hacking |
| 2581 | D: Lowlevel x86 kernel hacking | 2581 | D: Lowlevel x86 kernel hacking |
| 2582 | D: General debugging | 2582 | D: General debugging |
| @@ -2808,8 +2808,7 @@ S: Ottawa, Ontario · 225 unmodified lines | |||
| 2808 | S: Canada K2P 0X8 | 2808 | S: Canada K2P 0X8 |
| 2809 | 2809 | ||
| 2810 | N: Mikael Pettersson | 2810 | N: Mikael Pettersson |
| 2811 | E: mikpe@it.uu.se | 2811 | E: mikpelinux@gmail.com |
| 2812 | W: http://user.it.uu.se/~mikpe/linux/ | ||
| 2813 | D: Miscellaneous fixes | 2812 | D: Miscellaneous fixes |
| 2814 | 2813 | ||
| 2815 | N: Reed H. Petty | 2814 | N: Reed H. Petty |
| @@ -2896,6 +2895,11 @@ S: Framewood Road · 80 unmodified lines | |||
| 2896 | S: Wexham SL3 6PJ | 2895 | S: Wexham SL3 6PJ |
| 2897 | S: United Kingdom | 2896 | S: United Kingdom |
| 2898 | 2897 | ||
| 2898 | N: Richard Purdie | ||
| 2899 | E: rpurdie@rpsys.net | ||
| 2900 | D: Backlight subsystem maintainer | ||
| 2901 | S: United Kingdom | ||
| 2902 | |||
| 2899 | N: Daniel Quinlan | 2903 | N: Daniel Quinlan |
| 2900 | E: quinlan@pathname.com | 2904 | E: quinlan@pathname.com |
| 2901 | W: http://www.pathname.com/~quinlan/ | 2905 | W: http://www.pathname.com/~quinlan/ |
| @@ -3153,6 +3157,11 @@ N: Dipankar Sarma · 251 unmodified lines | |||
| 3153 | E: dipankar@in.ibm.com | 3157 | E: dipankar@in.ibm.com |
| 3154 | D: RCU | 3158 | D: RCU |
| 3155 | 3159 | ||
| 3160 | N: Yoshinori Sato | ||
| 3161 | E: ysato@users.sourceforge.jp | ||
| 3162 | D: uClinux for Renesas H8/300 (H8300) | ||
| 3163 | D: http://uclinux-h8.sourceforge.jp/ | ||
| 3164 | |||
| 3156 | N: Hannu Savolainen | 3165 | N: Hannu Savolainen |
| 3157 | E: hannu@opensound.com | 3166 | E: hannu@opensound.com |
| 3158 | D: Maintainer of the sound drivers until 2.1.x days. | 3167 | D: Maintainer of the sound drivers until 2.1.x days. |
| @@ -72,3 +72,16 @@ kernel tree without going through the obsolete state first. · 71 unmodified lines | |||
| 72 | 72 | ||
| 73 | It's up to the developer to place their interfaces in the category they | 73 | It's up to the developer to place their interfaces in the category they |
| 74 | wish for it to start out in. | 74 | wish for it to start out in. |
| 75 | |||
| 76 | |||
| 77 | Notable bits of non-ABI, which should not under any circumstances be considered | ||
| 78 | stable: | ||
| 79 | |||
| 80 | - Kconfig. Userspace should not rely on the presence or absence of any | ||
| 81 | particular Kconfig symbol, in /proc/config.gz, in the copy of .config | ||
| 82 | commonly installed to /boot, or in any invocation of the kernel build | ||
| 83 | process. | ||
| 84 | |||
| 85 | - Kernel-internal symbols. Do not rely on the presence, absence, location, or | ||
| 86 | type of any kernel symbol, either in System.map files or the kernel binary | ||
| 87 | itself. See Documentation/stable_api_nonsense.txt. | ||
| @@ -37,8 +37,8 @@ Description: · 36 unmodified lines | |||
| 37 | that the USB device has been connected to the machine. This | 37 | that the USB device has been connected to the machine. This |
| 38 | file is read-only. | 38 | file is read-only. |
| 39 | Users: | 39 | Users: |
| 40 | PowerTOP <power@bughost.org> | 40 | PowerTOP <powertop@lists.01.org> |
| 41 | http://www.lesswatts.org/projects/powertop/ | 41 | https://01.org/powertop/ |
| 42 | 42 | ||
| 43 | What: /sys/bus/usb/device/.../power/active_duration | 43 | What: /sys/bus/usb/device/.../power/active_duration |
| 44 | Date: January 2008 | 44 | Date: January 2008 |
| @@ -57,8 +57,8 @@ Description: · 12 unmodified lines | |||
| 57 | will give an integer percentage. Note that this does not | 57 | will give an integer percentage. Note that this does not |
| 58 | account for counter wrap. | 58 | account for counter wrap. |
| 59 | Users: | 59 | Users: |
| 60 | PowerTOP <power@bughost.org> | 60 | PowerTOP <powertop@lists.01.org> |
| 61 | http://www.lesswatts.org/projects/powertop/ | 61 | https://01.org/powertop/ |
| 62 | 62 | ||
| 63 | What: /sys/bus/usb/devices/<busnum>-<port[.port]>...:<config num>-<interface num>/supports_autosuspend | 63 | What: /sys/bus/usb/devices/<busnum>-<port[.port]>...:<config num>-<interface num>/supports_autosuspend |
| 64 | Date: January 2008 | 64 | Date: January 2008 |
| @@ -61,6 +61,12 @@ Description: Interface for making ib_srp connect to a new target. · 60 unmodified lines | |||
| 61 | interrupt is handled by a different CPU then the comp_vector | 61 | interrupt is handled by a different CPU then the comp_vector |
| 62 | parameter can be used to spread the SRP completion workload | 62 | parameter can be used to spread the SRP completion workload |
| 63 | over multiple CPU's. | 63 | over multiple CPU's. |
| 64 | * tl_retry_count, a number in the range 2..7 specifying the | ||
| 65 | IB RC retry count. | ||
| 66 | * queue_size, the maximum number of commands that the | ||
| 67 | initiator is allowed to queue per SCSI host. The default | ||
| 68 | value for this parameter is 62. The lowest supported value | ||
| 69 | is 2. | ||
| 64 | 70 | ||
| 65 | What: /sys/class/infiniband_srp/srp-<hca>-<port_number>/ibdev | 71 | What: /sys/class/infiniband_srp/srp-<hca>-<port_number>/ibdev |
| 66 | Date: January 2, 2006 | 72 | Date: January 2, 2006 |
| @@ -153,6 +159,13 @@ Contact: linux-rdma@vger.kernel.org · 86 unmodified lines | |||
| 153 | Description: InfiniBand service ID used for establishing communication with | 159 | Description: InfiniBand service ID used for establishing communication with |
| 154 | the SRP target. | 160 | the SRP target. |
| 155 | 161 | ||
| 162 | What: /sys/class/scsi_host/host<n>/sgid | ||
| 163 | Date: February 1, 2014 | ||
| 164 | KernelVersion: 3.13 | ||
| 165 | Contact: linux-rdma@vger.kernel.org | ||
| 166 | Description: InfiniBand GID of the source port used for communication with | ||
| 167 | the SRP target. | ||
| 168 | |||
| 156 | What: /sys/class/scsi_host/host<n>/zero_req_lim | 169 | What: /sys/class/scsi_host/host<n>/zero_req_lim |
| 157 | Date: September 20, 2006 | 170 | Date: September 20, 2006 |
| 158 | KernelVersion: 2.6.18 | 171 | KernelVersion: 2.6.18 |
| @@ -5,6 +5,24 @@ Contact: linux-scsi@vger.kernel.org, linux-rdma@vger.kernel.org · 4 unmodified lines | |||
| 5 | Description: Instructs an SRP initiator to disconnect from a target and to | 5 | Description: Instructs an SRP initiator to disconnect from a target and to |
| 6 | remove all LUNs imported from that target. | 6 | remove all LUNs imported from that target. |
| 7 | 7 | ||
| 8 | What: /sys/class/srp_remote_ports/port-<h>:<n>/dev_loss_tmo | ||
| 9 | Date: February 1, 2014 | ||
| 10 | KernelVersion: 3.13 | ||
| 11 | Contact: linux-scsi@vger.kernel.org, linux-rdma@vger.kernel.org | ||
| 12 | Description: Number of seconds the SCSI layer will wait after a transport | ||
| 13 | layer error has been observed before removing a target port. | ||
| 14 | Zero means immediate removal. Setting this attribute to "off" | ||
| 15 | will disable the dev_loss timer. | ||
| 16 | |||
| 17 | What: /sys/class/srp_remote_ports/port-<h>:<n>/fast_io_fail_tmo | ||
| 18 | Date: February 1, 2014 | ||
| 19 | KernelVersion: 3.13 | ||
| 20 | Contact: linux-scsi@vger.kernel.org, linux-rdma@vger.kernel.org | ||
| 21 | Description: Number of seconds the SCSI layer will wait after a transport | ||
| 22 | layer error has been observed before failing I/O. Zero means | ||
| 23 | failing I/O immediately. Setting this attribute to "off" will | ||
| 24 | disable the fast_io_fail timer. | ||
| 25 | |||
| 8 | What: /sys/class/srp_remote_ports/port-<h>:<n>/port_id | 26 | What: /sys/class/srp_remote_ports/port-<h>:<n>/port_id |
| 9 | Date: June 27, 2007 | 27 | Date: June 27, 2007 |
| 10 | KernelVersion: 2.6.24 | 28 | KernelVersion: 2.6.24 |
| @@ -12,8 +30,29 @@ Contact: linux-scsi@vger.kernel.org · 1 unmodified line | |||
| 12 | Description: 16-byte local SRP port identifier in hexadecimal format. An | 30 | Description: 16-byte local SRP port identifier in hexadecimal format. An |
| 13 | example: 4c:49:4e:55:58:20:56:49:4f:00:00:00:00:00:00:00. | 31 | example: 4c:49:4e:55:58:20:56:49:4f:00:00:00:00:00:00:00. |
| 14 | 32 | ||
| 33 | What: /sys/class/srp_remote_ports/port-<h>:<n>/reconnect_delay | ||
| 34 | Date: February 1, 2014 | ||
| 35 | KernelVersion: 3.13 | ||
| 36 | Contact: linux-scsi@vger.kernel.org, linux-rdma@vger.kernel.org | ||
| 37 | Description: Number of seconds the SCSI layer will wait after a reconnect | ||
| 38 | attempt failed before retrying. Setting this attribute to | ||
| 39 | "off" will disable time-based reconnecting. | ||
| 40 | |||
| 15 | What: /sys/class/srp_remote_ports/port-<h>:<n>/roles | 41 | What: /sys/class/srp_remote_ports/port-<h>:<n>/roles |
| 16 | Date: June 27, 2007 | 42 | Date: June 27, 2007 |
| 17 | KernelVersion: 2.6.24 | 43 | KernelVersion: 2.6.24 |
| 18 | Contact: linux-scsi@vger.kernel.org | 44 | Contact: linux-scsi@vger.kernel.org |
| 19 | Description: Role of the remote port. Either "SRP Initiator" or "SRP Target". | 45 | Description: Role of the remote port. Either "SRP Initiator" or "SRP Target". |
| 46 | |||
| 47 | What: /sys/class/srp_remote_ports/port-<h>:<n>/state | ||
| 48 | Date: February 1, 2014 | ||
| 49 | KernelVersion: 3.13 | ||
| 50 | Contact: linux-scsi@vger.kernel.org, linux-rdma@vger.kernel.org | ||
| 51 | Description: State of the transport layer used for communication with the | ||
| 52 | remote port. "running" if the transport layer is operational; | ||
| 53 | "blocked" if a transport layer error has been encountered but | ||
| 54 | the fast_io_fail_tmo timer has not yet fired; "fail-fast" | ||
| 55 | after the fast_io_fail_tmo timer has fired and before the | ||
| 56 | "dev_loss_tmo" timer has fired; "lost" after the | ||
| 57 | "dev_loss_tmo" timer has fired and before the port is finally | ||
| 58 | removed. | ||
| @@ -0,0 +1,31 @@ | |||
| 1 | What: /config/usb-gadget/gadget/functions/mass_storage.name | ||
| 2 | Date: Oct 2013 | ||
| 3 | KenelVersion: 3.13 | ||
| 4 | Description: | ||
| 5 | The attributes: | ||
| 6 | |||
| 7 | stall - Set to permit function to halt bulk endpoints. | ||
| 8 | Disabled on some USB devices known not to work | ||
| 9 | correctly. You should set it to true. | ||
| 10 | num_buffers - Number of pipeline buffers. Valid numbers | ||
| 11 | are 2..4. Available only if | ||
| 12 | CONFIG_USB_GADGET_DEBUG_FILES is set. | ||
| 13 | |||
| 14 | What: /config/usb-gadget/gadget/functions/mass_storage.name/lun.name | ||
| 15 | Date: Oct 2013 | ||
| 16 | KenelVersion: 3.13 | ||
| 17 | Description: | ||
| 18 | The attributes: | ||
| 19 | |||
| 20 | file - The path to the backing file for the LUN. | ||
| 21 | Required if LUN is not marked as removable. | ||
| 22 | ro - Flag specifying access to the LUN shall be | ||
| 23 | read-only. This is implied if CD-ROM emulation | ||
| 24 | is enabled as well as when it was impossible | ||
| 25 | to open "filename" in R/W mode. | ||
| 26 | removable - Flag specifying that LUN shall be indicated as | ||
| 27 | being removable. | ||
| 28 | cdrom - Flag specifying that LUN shall be reported as | ||
| 29 | being a CD-ROM. | ||
| 30 | nofua - Flag specifying that FUA flag | ||
| 31 | in SCSI WRITE(10,12) | ||
| @@ -79,7 +79,7 @@ Description: · 78 unmodified lines | |||
| 79 | correspond to externally available input one of the named | 79 | correspond to externally available input one of the named |
| 80 | versions may be used. The number must always be specified and | 80 | versions may be used. The number must always be specified and |
| 81 | unique to allow association with event codes. Units after | 81 | unique to allow association with event codes. Units after |
| 82 | application of scale and offset are microvolts. | 82 | application of scale and offset are millivolts. |
| 83 | 83 | ||
| 84 | What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_raw | 84 | What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_raw |
| 85 | KernelVersion: 2.6.35 | 85 | KernelVersion: 2.6.35 |
| @@ -90,7 +90,7 @@ Description: · 4 unmodified lines | |||
| 90 | physically equivalent inputs when non differential readings are | 90 | physically equivalent inputs when non differential readings are |
| 91 | separately available. In differential only parts, then all that | 91 | separately available. In differential only parts, then all that |
| 92 | is required is a consistent labeling. Units after application | 92 | is required is a consistent labeling. Units after application |
| 93 | of scale and offset are microvolts. | 93 | of scale and offset are millivolts. |
| 94 | 94 | ||
| 95 | What: /sys/bus/iio/devices/iio:deviceX/in_capacitanceY_raw | 95 | What: /sys/bus/iio/devices/iio:deviceX/in_capacitanceY_raw |
| 96 | KernelVersion: 3.2 | 96 | KernelVersion: 3.2 |
| @@ -537,6 +537,62 @@ Description: · 440 unmodified lines | |||
| 537 | value is in raw device units or in processed units (as _raw | 537 | value is in raw device units or in processed units (as _raw |
| 538 | and _input do on sysfs direct channel read attributes). | 538 | and _input do on sysfs direct channel read attributes). |
| 539 | 539 | ||
| 540 | What: /sys/.../events/in_accel_x_thresh_rising_hysteresis | ||
| 541 | What: /sys/.../events/in_accel_x_thresh_falling_hysteresis | ||
| 542 | What: /sys/.../events/in_accel_x_thresh_either_hysteresis | ||
| 543 | What: /sys/.../events/in_accel_y_thresh_rising_hysteresis | ||
| 544 | What: /sys/.../events/in_accel_y_thresh_falling_hysteresis | ||
| 545 | What: /sys/.../events/in_accel_y_thresh_either_hysteresis | ||
| 546 | What: /sys/.../events/in_accel_z_thresh_rising_hysteresis | ||
| 547 | What: /sys/.../events/in_accel_z_thresh_falling_hysteresis | ||
| 548 | What: /sys/.../events/in_accel_z_thresh_either_hysteresis | ||
| 549 | What: /sys/.../events/in_anglvel_x_thresh_rising_hysteresis | ||
| 550 | What: /sys/.../events/in_anglvel_x_thresh_falling_hysteresis | ||
| 551 | What: /sys/.../events/in_anglvel_x_thresh_either_hysteresis | ||
| 552 | What: /sys/.../events/in_anglvel_y_thresh_rising_hysteresis | ||
| 553 | What: /sys/.../events/in_anglvel_y_thresh_falling_hysteresis | ||
| 554 | What: /sys/.../events/in_anglvel_y_thresh_either_hysteresis | ||
| 555 | What: /sys/.../events/in_anglvel_z_thresh_rising_hysteresis | ||
| 556 | What: /sys/.../events/in_anglvel_z_thresh_falling_hysteresis | ||
| 557 | What: /sys/.../events/in_anglvel_z_thresh_either_hysteresis | ||
| 558 | What: /sys/.../events/in_magn_x_thresh_rising_hysteresis | ||
| 559 | What: /sys/.../events/in_magn_x_thresh_falling_hysteresis | ||
| 560 | What: /sys/.../events/in_magn_x_thresh_either_hysteresis | ||
| 561 | What: /sys/.../events/in_magn_y_thresh_rising_hysteresis | ||
| 562 | What: /sys/.../events/in_magn_y_thresh_falling_hysteresis | ||
| 563 | What: /sys/.../events/in_magn_y_thresh_either_hysteresis | ||
| 564 | What: /sys/.../events/in_magn_z_thresh_rising_hysteresis | ||
| 565 | What: /sys/.../events/in_magn_z_thresh_falling_hysteresis | ||
| 566 | What: /sys/.../events/in_magn_z_thresh_either_hysteresis | ||
| 567 | What: /sys/.../events/in_voltageY_thresh_rising_hysteresis | ||
| 568 | What: /sys/.../events/in_voltageY_thresh_falling_hysteresis | ||
| 569 | What: /sys/.../events/in_voltageY_thresh_either_hysteresis | ||
| 570 | What: /sys/.../events/in_tempY_thresh_rising_hysteresis | ||
| 571 | What: /sys/.../events/in_tempY_thresh_falling_hysteresis | ||
| 572 | What: /sys/.../events/in_tempY_thresh_either_hysteresis | ||
| 573 | What: /sys/.../events/in_illuminance0_thresh_falling_hysteresis | ||
| 574 | what: /sys/.../events/in_illuminance0_thresh_rising_hysteresis | ||
| 575 | what: /sys/.../events/in_illuminance0_thresh_either_hysteresis | ||
| 576 | what: /sys/.../events/in_proximity0_thresh_falling_hysteresis | ||
| 577 | what: /sys/.../events/in_proximity0_thresh_rising_hysteresis | ||
| 578 | what: /sys/.../events/in_proximity0_thresh_either_hysteresis | ||
| 579 | KernelVersion: 3.13 | ||
| 580 | Contact: linux-iio@vger.kernel.org | ||
| 581 | Description: | ||
| 582 | Specifies the hysteresis of threshold that the device is comparing | ||
| 583 | against for the events enabled by | ||
| 584 | <type>Y[_name]_thresh[_(rising|falling)]_hysteresis. | ||
| 585 | If separate attributes exist for the two directions, but | ||
| 586 | direction is not specified for this attribute, then a single | ||
| 587 | hysteresis value applies to both directions. | ||
| 588 | For falling events the hysteresis is added to the _value attribute for | ||
| 589 | this event to get the upper threshold for when the event goes back to | ||
| 590 | normal, for rising events the hysteresis is subtracted from the _value | ||
| 591 | attribute. E.g. if in_voltage0_raw_thresh_rising_value is set to 1200 | ||
| 592 | and in_voltage0_raw_thresh_rising_hysteresis is set to 50. The event | ||
| 593 | will get activated once in_voltage0_raw goes above 1200 and will become | ||
| 594 | deactived again once the value falls below 1150. | ||
| 595 | |||
| 540 | What: /sys/.../events/in_accel_x_raw_roc_rising_value | 596 | What: /sys/.../events/in_accel_x_raw_roc_rising_value |
| 541 | What: /sys/.../events/in_accel_x_raw_roc_falling_value | 597 | What: /sys/.../events/in_accel_x_raw_roc_falling_value |
| 542 | What: /sys/.../events/in_accel_y_raw_roc_rising_value | 598 | What: /sys/.../events/in_accel_y_raw_roc_rising_value |
| @@ -811,3 +867,14 @@ Description: · 268 unmodified lines | |||
| 811 | Writing '1' stores the current device configuration into | 867 | Writing '1' stores the current device configuration into |
| 812 | on-chip EEPROM. After power-up or chip reset the device will | 868 | on-chip EEPROM. After power-up or chip reset the device will |
| 813 | automatically load the saved configuration. | 869 | automatically load the saved configuration. |
| 870 | |||
| 871 | What: /sys/.../iio:deviceX/in_intensity_red_integration_time | ||
| 872 | What: /sys/.../iio:deviceX/in_intensity_green_integration_time | ||
| 873 | What: /sys/.../iio:deviceX/in_intensity_blue_integration_time | ||
| 874 | What: /sys/.../iio:deviceX/in_intensity_clear_integration_time | ||
| 875 | What: /sys/.../iio:deviceX/in_illuminance_integration_time | ||
| 876 | KernelVersion: 3.12 | ||
| 877 | Contact: linux-iio@vger.kernel.org | ||
| 878 | Description: | ||
| 879 | This attribute is used to get/set the integration time in | ||
| 880 | seconds. | ||
| @@ -0,0 +1,157 @@ | |||
| 1 | What: /sys/class/mic/ | ||
| 2 | Date: October 2013 | ||
| 3 | KernelVersion: 3.13 | ||
| 4 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 5 | Description: | ||
| 6 | The mic class directory belongs to Intel MIC devices and | ||
| 7 | provides information per MIC device. An Intel MIC device is a | ||
| 8 | PCIe form factor add-in Coprocessor card based on the Intel Many | ||
| 9 | Integrated Core (MIC) architecture that runs a Linux OS. | ||
| 10 | |||
| 11 | What: /sys/class/mic/mic(x) | ||
| 12 | Date: October 2013 | ||
| 13 | KernelVersion: 3.13 | ||
| 14 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 15 | Description: | ||
| 16 | The directories /sys/class/mic/mic0, /sys/class/mic/mic1 etc., | ||
| 17 | represent MIC devices (0,1,..etc). Each directory has | ||
| 18 | information specific to that MIC device. | ||
| 19 | |||
| 20 | What: /sys/class/mic/mic(x)/family | ||
| 21 | Date: October 2013 | ||
| 22 | KernelVersion: 3.13 | ||
| 23 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 24 | Description: | ||
| 25 | Provides information about the Coprocessor family for an Intel | ||
| 26 | MIC device. For example - "x100" | ||
| 27 | |||
| 28 | What: /sys/class/mic/mic(x)/stepping | ||
| 29 | Date: October 2013 | ||
| 30 | KernelVersion: 3.13 | ||
| 31 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 32 | Description: | ||
| 33 | Provides information about the silicon stepping for an Intel | ||
| 34 | MIC device. For example - "A0" or "B0" | ||
| 35 | |||
| 36 | What: /sys/class/mic/mic(x)/state | ||
| 37 | Date: October 2013 | ||
| 38 | KernelVersion: 3.13 | ||
| 39 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 40 | Description: | ||
| 41 | When read, this entry provides the current state of an Intel | ||
| 42 | MIC device in the context of the card OS. Possible values that | ||
| 43 | will be read are: | ||
| 44 | "offline" - The MIC device is ready to boot the card OS. On | ||
| 45 | reading this entry after an OSPM resume, a "boot" has to be | ||
| 46 | written to this entry if the card was previously shutdown | ||
| 47 | during OSPM suspend. | ||
| 48 | "online" - The MIC device has initiated booting a card OS. | ||
| 49 | "shutting_down" - The card OS is shutting down. | ||
| 50 | "reset_failed" - The MIC device has failed to reset. | ||
| 51 | "suspending" - The MIC device is currently being prepared for | ||
| 52 | suspend. On reading this entry, a "suspend" has to be written | ||
| 53 | to the state sysfs entry to ensure the card is shutdown during | ||
| 54 | OSPM suspend. | ||
| 55 | "suspended" - The MIC device has been suspended. | ||
| 56 | |||
| 57 | When written, this sysfs entry triggers different state change | ||
| 58 | operations depending upon the current state of the card OS. | ||
| 59 | Acceptable values are: | ||
| 60 | "boot" - Boot the card OS image specified by the combination | ||
| 61 | of firmware, ramdisk, cmdline and bootmode | ||
| 62 | sysfs entries. | ||
| 63 | "reset" - Initiates device reset. | ||
| 64 | "shutdown" - Initiates card OS shutdown. | ||
| 65 | "suspend" - Initiates card OS shutdown and also marks the card | ||
| 66 | as suspended. | ||
| 67 | |||
| 68 | What: /sys/class/mic/mic(x)/shutdown_status | ||
| 69 | Date: October 2013 | ||
| 70 | KernelVersion: 3.13 | ||
| 71 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 72 | Description: | ||
| 73 | An Intel MIC device runs a Linux OS during its operation. This | ||
| 74 | OS can shutdown because of various reasons. When read, this | ||
| 75 | entry provides the status on why the card OS was shutdown. | ||
| 76 | Possible values are: | ||
| 77 | "nop" - shutdown status is not applicable, when the card OS is | ||
| 78 | "online" | ||
| 79 | "crashed" - Shutdown because of a HW or SW crash. | ||
| 80 | "halted" - Shutdown because of a halt command. | ||
| 81 | "poweroff" - Shutdown because of a poweroff command. | ||
| 82 | "restart" - Shutdown because of a restart command. | ||
| 83 | |||
| 84 | What: /sys/class/mic/mic(x)/cmdline | ||
| 85 | Date: October 2013 | ||
| 86 | KernelVersion: 3.13 | ||
| 87 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 88 | Description: | ||
| 89 | An Intel MIC device runs a Linux OS during its operation. Before | ||
| 90 | booting this card OS, it is possible to pass kernel command line | ||
| 91 | options to configure various features in it, similar to | ||
| 92 | self-bootable machines. When read, this entry provides | ||
| 93 | information about the current kernel command line options set to | ||
| 94 | boot the card OS. This entry can be written to change the | ||
| 95 | existing kernel command line options. Typically, the user would | ||
| 96 | want to read the current command line options, append new ones | ||
| 97 | or modify existing ones and then write the whole kernel command | ||
| 98 | line back to this entry. | ||
| 99 | |||
| 100 | What: /sys/class/mic/mic(x)/firmware | ||
| 101 | Date: October 2013 | ||
| 102 | KernelVersion: 3.13 | ||
| 103 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 104 | Description: | ||
| 105 | When read, this sysfs entry provides the path name under | ||
| 106 | /lib/firmware/ where the firmware image to be booted on the | ||
| 107 | card can be found. The entry can be written to change the | ||
| 108 | firmware image location under /lib/firmware/. | ||
| 109 | |||
| 110 | What: /sys/class/mic/mic(x)/ramdisk | ||
| 111 | Date: October 2013 | ||
| 112 | KernelVersion: 3.13 | ||
| 113 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 114 | Description: | ||
| 115 | When read, this sysfs entry provides the path name under | ||
| 116 | /lib/firmware/ where the ramdisk image to be used during card | ||
| 117 | OS boot can be found. The entry can be written to change | ||
| 118 | the ramdisk image location under /lib/firmware/. | ||
| 119 | |||
| 120 | What: /sys/class/mic/mic(x)/bootmode | ||
| 121 | Date: October 2013 | ||
| 122 | KernelVersion: 3.13 | ||
| 123 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 124 | Description: | ||
| 125 | When read, this sysfs entry provides the current bootmode for | ||
| 126 | the card. This sysfs entry can be written with the following | ||
| 127 | valid strings: | ||
| 128 | a) linux - Boot a Linux image. | ||
| 129 | b) elf - Boot an elf image for flash updates. | ||
| 130 | |||
| 131 | What: /sys/class/mic/mic(x)/log_buf_addr | ||
| 132 | Date: October 2013 | ||
| 133 | KernelVersion: 3.13 | ||
| 134 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 135 | Description: | ||
| 136 | An Intel MIC device runs a Linux OS during its operation. For | ||
| 137 | debugging purpose and early kernel boot messages, the user can | ||
| 138 | access the card OS log buffer via debugfs. When read, this entry | ||
| 139 | provides the kernel virtual address of the buffer where the card | ||
| 140 | OS log buffer can be read. This entry is written by the host | ||
| 141 | configuration daemon to set the log buffer address. The correct | ||
| 142 | log buffer address to be written can be found in the System.map | ||
| 143 | file of the card OS. | ||
| 144 | |||
| 145 | What: /sys/class/mic/mic(x)/log_buf_len | ||
| 146 | Date: October 2013 | ||
| 147 | KernelVersion: 3.13 | ||
| 148 | Contact: Sudeep Dutt <sudeep.dutt@intel.com> | ||
| 149 | Description: | ||
| 150 | An Intel MIC device runs a Linux OS during its operation. For | ||
| 151 | debugging purpose and early kernel boot messages, the user can | ||
| 152 | access the card OS log buffer via debugfs. When read, this entry | ||
| 153 | provides the kernel virtual address where the card OS log buffer | ||
| 154 | length can be read. This entry is written by host configuration | ||
| 155 | daemon to set the log buffer length address. The correct log | ||
| 156 | buffer length address to be written can be found in the | ||
| 157 | System.map file of the card OS. | ||
| @@ -104,7 +104,7 @@ Description: · 103 unmodified lines | |||
| 104 | One of the following ASCII strings, representing the device | 104 | One of the following ASCII strings, representing the device |
| 105 | type: | 105 | type: |
| 106 | 106 | ||
| 107 | absent, ram, rom, nor, nand, dataflash, ubi, unknown | 107 | absent, ram, rom, nor, nand, mlc-nand, dataflash, ubi, unknown |
| 108 | 108 | ||
| 109 | What: /sys/class/mtd/mtdX/writesize | 109 | What: /sys/class/mtd/mtdX/writesize |
| 110 | Date: April 2009 | 110 | Date: April 2009 |
| @@ -1,13 +1,13 @@ | |||
| 1 | 1 | ||
| 2 | What: /sys/class/net/<iface>/batman-adv/iface_status | 2 | What: /sys/class/net/<iface>/batman-adv/iface_status |
| 3 | Date: May 2010 | 3 | Date: May 2010 |
| 4 | Contact: Marek Lindner <lindner_marek@yahoo.de> | 4 | Contact: Marek Lindner <mareklindner@neomailbox.ch> |
| 5 | Description: | 5 | Description: |
| 6 | Indicates the status of <iface> as it is seen by batman. | 6 | Indicates the status of <iface> as it is seen by batman. |
| 7 | 7 | ||
| 8 | What: /sys/class/net/<iface>/batman-adv/mesh_iface | 8 | What: /sys/class/net/<iface>/batman-adv/mesh_iface |
| 9 | Date: May 2010 | 9 | Date: May 2010 |
| 10 | Contact: Marek Lindner <lindner_marek@yahoo.de> | 10 | Contact: Marek Lindner <mareklindner@neomailbox.ch> |
| 11 | Description: | 11 | Description: |
| 12 | The /sys/class/net/<iface>/batman-adv/mesh_iface file | 12 | The /sys/class/net/<iface>/batman-adv/mesh_iface file |
| 13 | displays the batman mesh interface this <iface> | 13 | displays the batman mesh interface this <iface> |
| @@ -1,22 +1,23 @@ | |||
| 1 | 1 | ||
| 2 | What: /sys/class/net/<mesh_iface>/mesh/aggregated_ogms | 2 | What: /sys/class/net/<mesh_iface>/mesh/aggregated_ogms |
| 3 | Date: May 2010 | 3 | Date: May 2010 |
| 4 | Contact: Marek Lindner <lindner_marek@yahoo.de> | 4 | Contact: Marek Lindner <mareklindner@neomailbox.ch> |
| 5 | Description: | 5 | Description: |
| 6 | Indicates whether the batman protocol messages of the | 6 | Indicates whether the batman protocol messages of the |
| 7 | mesh <mesh_iface> shall be aggregated or not. | 7 | mesh <mesh_iface> shall be aggregated or not. |
| 8 | 8 | ||
| 9 | What: /sys/class/net/<mesh_iface>/mesh/ap_isolation | 9 | What: /sys/class/net/<mesh_iface>/mesh/<vlan_subdir>/ap_isolation |
| 10 | Date: May 2011 | 10 | Date: May 2011 |
| 11 | Contact: Antonio Quartulli <ordex@autistici.org> | 11 | Contact: Antonio Quartulli <antonio@meshcoding.com> |
| 12 | Description: | 12 | Description: |
| 13 | Indicates whether the data traffic going from a | 13 | Indicates whether the data traffic going from a |
| 14 | wireless client to another wireless client will be | 14 | wireless client to another wireless client will be |
| 15 | silently dropped. | 15 | silently dropped. <vlan_subdir> is empty when referring |
| 16 | to the untagged lan. | ||
| 16 | 17 | ||
| 17 | What: /sys/class/net/<mesh_iface>/mesh/bonding | 18 | What: /sys/class/net/<mesh_iface>/mesh/bonding |
| 18 | Date: June 2010 | 19 | Date: June 2010 |
| 19 | Contact: Simon Wunderlich <siwu@hrz.tu-chemnitz.de> | 20 | Contact: Simon Wunderlich <sw@simonwunderlich.de> |
| 20 | Description: | 21 | Description: |
| 21 | Indicates whether the data traffic going through the | 22 | Indicates whether the data traffic going through the |
| 22 | mesh will be sent using multiple interfaces at the | 23 | mesh will be sent using multiple interfaces at the |
| @@ -24,7 +25,7 @@ Description: · 1 unmodified line | |||
| 24 | 25 | ||
| 25 | What: /sys/class/net/<mesh_iface>/mesh/bridge_loop_avoidance | 26 | What: /sys/class/net/<mesh_iface>/mesh/bridge_loop_avoidance |
| 26 | Date: November 2011 | 27 | Date: November 2011 |
| 27 | Contact: Simon Wunderlich <siwu@hrz.tu-chemnitz.de> | 28 | Contact: Simon Wunderlich <sw@simonwunderlich.de> |
| 28 | Description: | 29 | Description: |
| 29 | Indicates whether the bridge loop avoidance feature | 30 | Indicates whether the bridge loop avoidance feature |
| 30 | is enabled. This feature detects and avoids loops | 31 | is enabled. This feature detects and avoids loops |
| @@ -41,21 +42,21 @@ Description: · 10 unmodified lines | |||
| 41 | 42 | ||
| 42 | What: /sys/class/net/<mesh_iface>/mesh/gw_bandwidth | 43 | What: /sys/class/net/<mesh_iface>/mesh/gw_bandwidth |
| 43 | Date: October 2010 | 44 | Date: October 2010 |
| 44 | Contact: Marek Lindner <lindner_marek@yahoo.de> | 45 | Contact: Marek Lindner <mareklindner@neomailbox.ch> |
| 45 | Description: | 46 | Description: |
| 46 | Defines the bandwidth which is propagated by this | 47 | Defines the bandwidth which is propagated by this |
| 47 | node if gw_mode was set to 'server'. | 48 | node if gw_mode was set to 'server'. |
| 48 | 49 | ||
| 49 | What: /sys/class/net/<mesh_iface>/mesh/gw_mode | 50 | What: /sys/class/net/<mesh_iface>/mesh/gw_mode |
| 50 | Date: October 2010 | 51 | Date: October 2010 |
| 51 | Contact: Marek Lindner <lindner_marek@yahoo.de> | 52 | Contact: Marek Lindner <mareklindner@neomailbox.ch> |
| 52 | Description: | 53 | Description: |
| 53 | Defines the state of the gateway features. Can be | 54 | Defines the state of the gateway features. Can be |
| 54 | either 'off', 'client' or 'server'. | 55 | either 'off', 'client' or 'server'. |
| 55 | 56 | ||
| 56 | What: /sys/class/net/<mesh_iface>/mesh/gw_sel_class | 57 | What: /sys/class/net/<mesh_iface>/mesh/gw_sel_class |
| 57 | Date: October 2010 | 58 | Date: October 2010 |
| 58 | Contact: Marek Lindner <lindner_marek@yahoo.de> | 59 | Contact: Marek Lindner <mareklindner@neomailbox.ch> |
| 59 | Description: | 60 | Description: |
| 60 | Defines the selection criteria this node will use | 61 | Defines the selection criteria this node will use |
| 61 | to choose a gateway if gw_mode was set to 'client'. | 62 | to choose a gateway if gw_mode was set to 'client'. |
| @@ -77,25 +78,14 @@ Description: · 15 unmodified lines | |||
| 77 | 78 | ||
| 78 | What: /sys/class/net/<mesh_iface>/mesh/orig_interval | 79 | What: /sys/class/net/<mesh_iface>/mesh/orig_interval |
| 79 | Date: May 2010 | 80 | Date: May 2010 |
| 80 | Contact: Marek Lindner <lindner_marek@yahoo.de> | 81 | Contact: Marek Lindner <mareklindner@neomailbox.ch> |
| 81 | Description: | 82 | Description: |
| 82 | Defines the interval in milliseconds in which batman | 83 | Defines the interval in milliseconds in which batman |
| 83 | sends its protocol messages. | 84 | sends its protocol messages. |
| 84 | 85 | ||
| 85 | What: /sys/class/net/<mesh_iface>/mesh/routing_algo | 86 | What: /sys/class/net/<mesh_iface>/mesh/routing_algo |
| 86 | Date: Dec 2011 | 87 | Date: Dec 2011 |
| 87 | Contact: Marek Lindner <lindner_marek@yahoo.de> | 88 | Contact: Marek Lindner <mareklindner@neomailbox.ch> |
| 88 | Description: | 89 | Description: |
| 89 | Defines the routing procotol this mesh instance | 90 | Defines the routing procotol this mesh instance |
| 90 | uses to find the optimal paths through the mesh. | 91 | uses to find the optimal paths through the mesh. |
| 91 | |||
| 92 | What: /sys/class/net/<mesh_iface>/mesh/vis_mode | ||
| 93 | Date: May 2010 | ||
| 94 | Contact: Marek Lindner <lindner_marek@yahoo.de> | ||
| 95 | Description: | ||
| 96 | Each batman node only maintains information about its | ||
| 97 | own local neighborhood, therefore generating graphs | ||
| 98 | showing the topology of the entire mesh is not easily | ||
| 99 | feasible without having a central instance to collect | ||
| 100 | the local topologies from all nodes. This file allows | ||
| 101 | to activate the collecting (server) mode. | ||
| @@ -0,0 +1,152 @@ | |||
| 1 | What: /sys/class/powercap/ | ||
| 2 | Date: September 2013 | ||
| 3 | KernelVersion: 3.13 | ||
| 4 | Contact: linux-pm@vger.kernel.org | ||
| 5 | Description: | ||
| 6 | The powercap/ class sub directory belongs to the power cap | ||
| 7 | subsystem. Refer to | ||
| 8 | Documentation/power/powercap/powercap.txt for details. | ||
| 9 | |||
| 10 | What: /sys/class/powercap/<control type> | ||
| 11 | Date: September 2013 | ||
| 12 | KernelVersion: 3.13 | ||
| 13 | Contact: linux-pm@vger.kernel.org | ||
| 14 | Description: | ||
| 15 | A <control type> is a unique name under /sys/class/powercap. | ||
| 16 | Here <control type> determines how the power is going to be | ||
| 17 | controlled. A <control type> can contain multiple power zones. | ||
| 18 | |||
| 19 | What: /sys/class/powercap/<control type>/enabled | ||
| 20 | Date: September 2013 | ||
| 21 | KernelVersion: 3.13 | ||
| 22 | Contact: linux-pm@vger.kernel.org | ||
| 23 | Description: | ||
| 24 | This allows to enable/disable power capping for a "control type". | ||
| 25 | This status affects every power zone using this "control_type. | ||
| 26 | |||
| 27 | What: /sys/class/powercap/<control type>/<power zone> | ||
| 28 | Date: September 2013 | ||
| 29 | KernelVersion: 3.13 | ||
| 30 | Contact: linux-pm@vger.kernel.org | ||
| 31 | Description: | ||
| 32 | A power zone is a single or a collection of devices, which can | ||
| 33 | be independently monitored and controlled. A power zone sysfs | ||
| 34 | entry is qualified with the name of the <control type>. | ||
| 35 | E.g. intel-rapl:0:1:1. | ||
| 36 | |||
| 37 | What: /sys/class/powercap/<control type>/<power zone>/<child power zone> | ||
| 38 | Date: September 2013 | ||
| 39 | KernelVersion: 3.13 | ||
| 40 | Contact: linux-pm@vger.kernel.org | ||
| 41 | Description: | ||
| 42 | Power zones may be organized in a hierarchy in which child | ||
| 43 | power zones provide monitoring and control for a subset of | ||
| 44 | devices under the parent. For example, if there is a parent | ||
| 45 | power zone for a whole CPU package, each CPU core in it can | ||
| 46 | be a child power zone. | ||
| 47 | |||
| 48 | What: /sys/class/powercap/.../<power zone>/name | ||
| 49 | Date: September 2013 | ||
| 50 | KernelVersion: 3.13 | ||
| 51 | Contact: linux-pm@vger.kernel.org | ||
| 52 | Description: | ||
| 53 | Specifies the name of this power zone. | ||
| 54 | |||
| 55 | What: /sys/class/powercap/.../<power zone>/energy_uj | ||
| 56 | Date: September 2013 | ||
| 57 | KernelVersion: 3.13 | ||
| 58 | Contact: linux-pm@vger.kernel.org | ||
| 59 | Description: | ||
| 60 | Current energy counter in micro-joules. Write "0" to reset. | ||
| 61 | If the counter can not be reset, then this attribute is | ||
| 62 | read-only. | ||
| 63 | |||
| 64 | What: /sys/class/powercap/.../<power zone>/max_energy_range_uj | ||
| 65 | Date: September 2013 | ||
| 66 | KernelVersion: 3.13 | ||
| 67 | Contact: linux-pm@vger.kernel.org | ||
| 68 | Description: | ||
| 69 | Range of the above energy counter in micro-joules. | ||
| 70 | |||
| 71 | |||
| 72 | What: /sys/class/powercap/.../<power zone>/power_uw | ||
| 73 | Date: September 2013 | ||
| 74 | KernelVersion: 3.13 | ||
| 75 | Contact: linux-pm@vger.kernel.org | ||
| 76 | Description: | ||
| 77 | Current power in micro-watts. | ||
| 78 | |||
| 79 | What: /sys/class/powercap/.../<power zone>/max_power_range_uw | ||
| 80 | Date: September 2013 | ||
| 81 | KernelVersion: 3.13 | ||
| 82 | Contact: linux-pm@vger.kernel.org | ||
| 83 | Description: | ||
| 84 | Range of the above power value in micro-watts. | ||
| 85 | |||
| 86 | What: /sys/class/powercap/.../<power zone>/constraint_X_name | ||
| 87 | Date: September 2013 | ||
| 88 | KernelVersion: 3.13 | ||
| 89 | Contact: linux-pm@vger.kernel.org | ||
| 90 | Description: | ||
| 91 | Each power zone can define one or more constraints. Each | ||
| 92 | constraint can have an optional name. Here "X" can have values | ||
| 93 | from 0 to max integer. | ||
| 94 | |||
| 95 | What: /sys/class/powercap/.../<power zone>/constraint_X_power_limit_uw | ||
| 96 | Date: September 2013 | ||
| 97 | KernelVersion: 3.13 | ||
| 98 | Contact: linux-pm@vger.kernel.org | ||
| 99 | Description: | ||
| 100 | Power limit in micro-watts should be applicable for | ||
| 101 | the time window specified by "constraint_X_time_window_us". | ||
| 102 | Here "X" can have values from 0 to max integer. | ||
| 103 | |||
| 104 | What: /sys/class/powercap/.../<power zone>/constraint_X_time_window_us | ||
| 105 | Date: September 2013 | ||
| 106 | KernelVersion: 3.13 | ||
| 107 | Contact: linux-pm@vger.kernel.org | ||
| 108 | Description: | ||
| 109 | Time window in micro seconds. This is used along with | ||
| 110 | constraint_X_power_limit_uw to define a power constraint. | ||
| 111 | Here "X" can have values from 0 to max integer. | ||
| 112 | |||
| 113 | |||
| 114 | What: /sys/class/powercap/<control type>/.../constraint_X_max_power_uw | ||
| 115 | Date: September 2013 | ||
| 116 | KernelVersion: 3.13 | ||
| 117 | Contact: linux-pm@vger.kernel.org | ||
| 118 | Description: | ||
| 119 | Maximum allowed power in micro watts for this constraint. | ||
| 120 | Here "X" can have values from 0 to max integer. | ||
| 121 | |||
| 122 | What: /sys/class/powercap/<control type>/.../constraint_X_min_power_uw | ||
| 123 | Date: September 2013 | ||
| 124 | KernelVersion: 3.13 | ||
| 125 | Contact: linux-pm@vger.kernel.org | ||
| 126 | Description: | ||
| 127 | Minimum allowed power in micro watts for this constraint. | ||
| 128 | Here "X" can have values from 0 to max integer. | ||
| 129 | |||
| 130 | What: /sys/class/powercap/.../<power zone>/constraint_X_max_time_window_us | ||
| 131 | Date: September 2013 | ||
| 132 | KernelVersion: 3.13 | ||
| 133 | Contact: linux-pm@vger.kernel.org | ||
| 134 | Description: | ||
| 135 | Maximum allowed time window in micro seconds for this | ||
| 136 | constraint. Here "X" can have values from 0 to max integer. | ||
| 137 | |||
| 138 | What: /sys/class/powercap/.../<power zone>/constraint_X_min_time_window_us | ||
| 139 | Date: September 2013 | ||
| 140 | KernelVersion: 3.13 | ||
| 141 | Contact: linux-pm@vger.kernel.org | ||
| 142 | Description: | ||
| 143 | Minimum allowed time window in micro seconds for this | ||
| 144 | constraint. Here "X" can have values from 0 to max integer. | ||
| 145 | |||
| 146 | What: /sys/class/powercap/.../<power zone>/enabled | ||
| 147 | Date: September 2013 | ||
| 148 | KernelVersion: 3.13 | ||
| 149 | Contact: linux-pm@vger.kernel.org | ||
| 150 | Description | ||
| 151 | This allows to enable/disable power capping at power zone level. | ||
| 152 | This applies to current power zone and its children. | ||
| @@ -1,6 +1,6 @@ | |||
| 1 | What: /sys/devices/.../power/ | 1 | What: /sys/devices/.../power/ |
| 2 | Date: January 2009 | 2 | Date: January 2009 |
| 3 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 3 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 4 | Description: | 4 | Description: |
| 5 | The /sys/devices/.../power directory contains attributes | 5 | The /sys/devices/.../power directory contains attributes |
| 6 | allowing the user space to check and modify some power | 6 | allowing the user space to check and modify some power |
| @@ -8,7 +8,7 @@ Description: · 1 unmodified line | |||
| 8 | 8 | ||
| 9 | What: /sys/devices/.../power/wakeup | 9 | What: /sys/devices/.../power/wakeup |
| 10 | Date: January 2009 | 10 | Date: January 2009 |
| 11 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 11 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 12 | Description: | 12 | Description: |
| 13 | The /sys/devices/.../power/wakeup attribute allows the user | 13 | The /sys/devices/.../power/wakeup attribute allows the user |
| 14 | space to check if the device is enabled to wake up the system | 14 | space to check if the device is enabled to wake up the system |
| @@ -34,7 +34,7 @@ Description: · 19 unmodified lines | |||
| 34 | 34 | ||
| 35 | What: /sys/devices/.../power/control | 35 | What: /sys/devices/.../power/control |
| 36 | Date: January 2009 | 36 | Date: January 2009 |
| 37 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 37 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 38 | Description: | 38 | Description: |
| 39 | The /sys/devices/.../power/control attribute allows the user | 39 | The /sys/devices/.../power/control attribute allows the user |
| 40 | space to control the run-time power management of the device. | 40 | space to control the run-time power management of the device. |
| @@ -53,7 +53,7 @@ Description: · 12 unmodified lines | |||
| 53 | 53 | ||
| 54 | What: /sys/devices/.../power/async | 54 | What: /sys/devices/.../power/async |
| 55 | Date: January 2009 | 55 | Date: January 2009 |
| 56 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 56 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 57 | Description: | 57 | Description: |
| 58 | The /sys/devices/.../async attribute allows the user space to | 58 | The /sys/devices/.../async attribute allows the user space to |
| 59 | enable or diasble the device's suspend and resume callbacks to | 59 | enable or diasble the device's suspend and resume callbacks to |
| @@ -79,7 +79,7 @@ Description: · 19 unmodified lines | |||
| 79 | 79 | ||
| 80 | What: /sys/devices/.../power/wakeup_count | 80 | What: /sys/devices/.../power/wakeup_count |
| 81 | Date: September 2010 | 81 | Date: September 2010 |
| 82 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 82 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 83 | Description: | 83 | Description: |
| 84 | The /sys/devices/.../wakeup_count attribute contains the number | 84 | The /sys/devices/.../wakeup_count attribute contains the number |
| 85 | of signaled wakeup events associated with the device. This | 85 | of signaled wakeup events associated with the device. This |
| @@ -88,7 +88,7 @@ Description: · 2 unmodified lines | |||
| 88 | 88 | ||
| 89 | What: /sys/devices/.../power/wakeup_active_count | 89 | What: /sys/devices/.../power/wakeup_active_count |
| 90 | Date: September 2010 | 90 | Date: September 2010 |
| 91 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 91 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 92 | Description: | 92 | Description: |
| 93 | The /sys/devices/.../wakeup_active_count attribute contains the | 93 | The /sys/devices/.../wakeup_active_count attribute contains the |
| 94 | number of times the processing of wakeup events associated with | 94 | number of times the processing of wakeup events associated with |
| @@ -98,7 +98,7 @@ Description: · 3 unmodified lines | |||
| 98 | 98 | ||
| 99 | What: /sys/devices/.../power/wakeup_abort_count | 99 | What: /sys/devices/.../power/wakeup_abort_count |
| 100 | Date: February 2012 | 100 | Date: February 2012 |
| 101 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 101 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 102 | Description: | 102 | Description: |
| 103 | The /sys/devices/.../wakeup_abort_count attribute contains the | 103 | The /sys/devices/.../wakeup_abort_count attribute contains the |
| 104 | number of times the processing of a wakeup event associated with | 104 | number of times the processing of a wakeup event associated with |
| @@ -109,7 +109,7 @@ Description: · 4 unmodified lines | |||
| 109 | 109 | ||
| 110 | What: /sys/devices/.../power/wakeup_expire_count | 110 | What: /sys/devices/.../power/wakeup_expire_count |
| 111 | Date: February 2012 | 111 | Date: February 2012 |
| 112 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 112 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 113 | Description: | 113 | Description: |
| 114 | The /sys/devices/.../wakeup_expire_count attribute contains the | 114 | The /sys/devices/.../wakeup_expire_count attribute contains the |
| 115 | number of times a wakeup event associated with the device has | 115 | number of times a wakeup event associated with the device has |
| @@ -119,7 +119,7 @@ Description: · 3 unmodified lines | |||
| 119 | 119 | ||
| 120 | What: /sys/devices/.../power/wakeup_active | 120 | What: /sys/devices/.../power/wakeup_active |
| 121 | Date: September 2010 | 121 | Date: September 2010 |
| 122 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 122 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 123 | Description: | 123 | Description: |
| 124 | The /sys/devices/.../wakeup_active attribute contains either 1, | 124 | The /sys/devices/.../wakeup_active attribute contains either 1, |
| 125 | or 0, depending on whether or not a wakeup event associated with | 125 | or 0, depending on whether or not a wakeup event associated with |
| @@ -129,7 +129,7 @@ Description: · 3 unmodified lines | |||
| 129 | 129 | ||
| 130 | What: /sys/devices/.../power/wakeup_total_time_ms | 130 | What: /sys/devices/.../power/wakeup_total_time_ms |
| 131 | Date: September 2010 | 131 | Date: September 2010 |
| 132 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 132 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 133 | Description: | 133 | Description: |
| 134 | The /sys/devices/.../wakeup_total_time_ms attribute contains | 134 | The /sys/devices/.../wakeup_total_time_ms attribute contains |
| 135 | the total time of processing wakeup events associated with the | 135 | the total time of processing wakeup events associated with the |
| @@ -139,7 +139,7 @@ Description: · 3 unmodified lines | |||
| 139 | 139 | ||
| 140 | What: /sys/devices/.../power/wakeup_max_time_ms | 140 | What: /sys/devices/.../power/wakeup_max_time_ms |
| 141 | Date: September 2010 | 141 | Date: September 2010 |
| 142 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 142 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 143 | Description: | 143 | Description: |
| 144 | The /sys/devices/.../wakeup_max_time_ms attribute contains | 144 | The /sys/devices/.../wakeup_max_time_ms attribute contains |
| 145 | the maximum time of processing a single wakeup event associated | 145 | the maximum time of processing a single wakeup event associated |
| @@ -149,7 +149,7 @@ Description: · 3 unmodified lines | |||
| 149 | 149 | ||
| 150 | What: /sys/devices/.../power/wakeup_last_time_ms | 150 | What: /sys/devices/.../power/wakeup_last_time_ms |
| 151 | Date: September 2010 | 151 | Date: September 2010 |
| 152 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 152 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 153 | Description: | 153 | Description: |
| 154 | The /sys/devices/.../wakeup_last_time_ms attribute contains | 154 | The /sys/devices/.../wakeup_last_time_ms attribute contains |
| 155 | the value of the monotonic clock corresponding to the time of | 155 | the value of the monotonic clock corresponding to the time of |
| @@ -160,7 +160,7 @@ Description: · 4 unmodified lines | |||
| 160 | 160 | ||
| 161 | What: /sys/devices/.../power/wakeup_prevent_sleep_time_ms | 161 | What: /sys/devices/.../power/wakeup_prevent_sleep_time_ms |
| 162 | Date: February 2012 | 162 | Date: February 2012 |
| 163 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 163 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 164 | Description: | 164 | Description: |
| 165 | The /sys/devices/.../wakeup_prevent_sleep_time_ms attribute | 165 | The /sys/devices/.../wakeup_prevent_sleep_time_ms attribute |
| 166 | contains the total time the device has been preventing | 166 | contains the total time the device has been preventing |
| @@ -189,7 +189,7 @@ Description: · 22 unmodified lines | |||
| 189 | 189 | ||
| 190 | What: /sys/devices/.../power/pm_qos_latency_us | 190 | What: /sys/devices/.../power/pm_qos_latency_us |
| 191 | Date: March 2012 | 191 | Date: March 2012 |
| 192 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 192 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 193 | Description: | 193 | Description: |
| 194 | The /sys/devices/.../power/pm_qos_resume_latency_us attribute | 194 | The /sys/devices/.../power/pm_qos_resume_latency_us attribute |
| 195 | contains the PM QoS resume latency limit for the given device, | 195 | contains the PM QoS resume latency limit for the given device, |
| @@ -207,7 +207,7 @@ Description: · 11 unmodified lines | |||
| 207 | 207 | ||
| 208 | What: /sys/devices/.../power/pm_qos_no_power_off | 208 | What: /sys/devices/.../power/pm_qos_no_power_off |
| 209 | Date: September 2012 | 209 | Date: September 2012 |
| 210 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 210 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 211 | Description: | 211 | Description: |
| 212 | The /sys/devices/.../power/pm_qos_no_power_off attribute | 212 | The /sys/devices/.../power/pm_qos_no_power_off attribute |
| 213 | is used for manipulating the PM QoS "no power off" flag. If | 213 | is used for manipulating the PM QoS "no power off" flag. If |
| @@ -222,7 +222,7 @@ Description: · 8 unmodified lines | |||
| 222 | 222 | ||
| 223 | What: /sys/devices/.../power/pm_qos_remote_wakeup | 223 | What: /sys/devices/.../power/pm_qos_remote_wakeup |
| 224 | Date: September 2012 | 224 | Date: September 2012 |
| 225 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 225 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 226 | Description: | 226 | Description: |
| 227 | The /sys/devices/.../power/pm_qos_remote_wakeup attribute | 227 | The /sys/devices/.../power/pm_qos_remote_wakeup attribute |
| 228 | is used for manipulating the PM QoS "remote wakeup required" | 228 | is used for manipulating the PM QoS "remote wakeup required" |
| @@ -0,0 +1,178 @@ | |||
| 1 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/control | ||
| 2 | Date: October 2013 | ||
| 3 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 4 | Description: When written, this file lets one select which data from which | ||
| 5 | profile will be read next. The data has to be 3 bytes long. | ||
| 6 | This file is writeonly. | ||
| 7 | Users: http://roccat.sourceforge.net | ||
| 8 | |||
| 9 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/profile | ||
| 10 | Date: October 2013 | ||
| 11 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 12 | Description: The mouse can store 5 profiles which can be switched by the | ||
| 13 | press of a button. profile holds index of actual profile. | ||
| 14 | This value is persistent, so its value determines the profile | ||
| 15 | that's active when the device is powered on next time. | ||
| 16 | When written, the device activates the set profile immediately. | ||
| 17 | The data has to be 3 bytes long. | ||
| 18 | The device will reject invalid data. | ||
| 19 | Users: http://roccat.sourceforge.net | ||
| 20 | |||
| 21 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/keys_primary | ||
| 22 | Date: October 2013 | ||
| 23 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 24 | Description: When written, this file lets one set the default of all keys for | ||
| 25 | a specific profile. Profile index is included in written data. | ||
| 26 | The data has to be 125 bytes long. | ||
| 27 | Before reading this file, control has to be written to select | ||
| 28 | which profile to read. | ||
| 29 | Users: http://roccat.sourceforge.net | ||
| 30 | |||
| 31 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/keys_function | ||
| 32 | Date: October 2013 | ||
| 33 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 34 | Description: When written, this file lets one set the function of the | ||
| 35 | function keys for a specific profile. Profile index is included | ||
| 36 | in written data. The data has to be 95 bytes long. | ||
| 37 | Before reading this file, control has to be written to select | ||
| 38 | which profile to read. | ||
| 39 | Users: http://roccat.sourceforge.net | ||
| 40 | |||
| 41 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/keys_macro | ||
| 42 | Date: October 2013 | ||
| 43 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 44 | Description: When written, this file lets one set the function of the macro | ||
| 45 | keys for a specific profile. Profile index is included in | ||
| 46 | written data. The data has to be 35 bytes long. | ||
| 47 | Before reading this file, control has to be written to select | ||
| 48 | which profile to read. | ||
| 49 | Users: http://roccat.sourceforge.net | ||
| 50 | |||
| 51 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/keys_thumbster | ||
| 52 | Date: October 2013 | ||
| 53 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 54 | Description: When written, this file lets one set the function of the | ||
| 55 | thumbster keys for a specific profile. Profile index is included | ||
| 56 | in written data. The data has to be 23 bytes long. | ||
| 57 | Before reading this file, control has to be written to select | ||
| 58 | which profile to read. | ||
| 59 | Users: http://roccat.sourceforge.net | ||
| 60 | |||
| 61 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/keys_extra | ||
| 62 | Date: October 2013 | ||
| 63 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 64 | Description: When written, this file lets one set the function of the | ||
| 65 | capslock and function keys for a specific profile. Profile index | ||
| 66 | is included in written data. The data has to be 8 bytes long. | ||
| 67 | Before reading this file, control has to be written to select | ||
| 68 | which profile to read. | ||
| 69 | Users: http://roccat.sourceforge.net | ||
| 70 | |||
| 71 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/keys_easyzone | ||
| 72 | Date: October 2013 | ||
| 73 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 74 | Description: When written, this file lets one set the function of the | ||
| 75 | easyzone keys for a specific profile. Profile index is included | ||
| 76 | in written data. The data has to be 294 bytes long. | ||
| 77 | Before reading this file, control has to be written to select | ||
| 78 | which profile to read. | ||
| 79 | Users: http://roccat.sourceforge.net | ||
| 80 | |||
| 81 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/key_mask | ||
| 82 | Date: October 2013 | ||
| 83 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 84 | Description: When written, this file lets one deactivate certain keys like | ||
| 85 | windows and application keys, to prevent accidental presses. | ||
| 86 | Profile index for which this settings occur is included in | ||
| 87 | written data. The data has to be 6 bytes long. | ||
| 88 | Before reading this file, control has to be written to select | ||
| 89 | which profile to read. | ||
| 90 | Users: http://roccat.sourceforge.net | ||
| 91 | |||
| 92 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/light | ||
| 93 | Date: October 2013 | ||
| 94 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 95 | Description: When written, this file lets one set the backlight intensity for | ||
| 96 | a specific profile. Profile index is included in written data. | ||
| 97 | This attribute is only valid for the glow and pro variant. | ||
| 98 | The data has to be 16 bytes long. | ||
| 99 | Before reading this file, control has to be written to select | ||
| 100 | which profile to read. | ||
| 101 | Users: http://roccat.sourceforge.net | ||
| 102 | |||
| 103 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/macro | ||
| 104 | Date: October 2013 | ||
| 105 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 106 | Description: When written, this file lets one store macros with max 480 | ||
| 107 | keystrokes for a specific button for a specific profile. | ||
| 108 | Button and profile indexes are included in written data. | ||
| 109 | The data has to be 2002 bytes long. | ||
| 110 | Before reading this file, control has to be written to select | ||
| 111 | which profile and key to read. | ||
| 112 | Users: http://roccat.sourceforge.net | ||
| 113 | |||
| 114 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/info | ||
| 115 | Date: October 2013 | ||
| 116 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 117 | Description: When read, this file returns general data like firmware version. | ||
| 118 | The data is 8 bytes long. | ||
| 119 | This file is readonly. | ||
| 120 | Users: http://roccat.sourceforge.net | ||
| 121 | |||
| 122 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/reset | ||
| 123 | Date: October 2013 | ||
| 124 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 125 | Description: When written, this file lets one reset the device. | ||
| 126 | The data has to be 3 bytes long. | ||
| 127 | This file is writeonly. | ||
| 128 | Users: http://roccat.sourceforge.net | ||
| 129 | |||
| 130 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/talk | ||
| 131 | Date: October 2013 | ||
| 132 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 133 | Description: When written, this file lets one trigger easyshift functionality | ||
| 134 | from the host. | ||
| 135 | The data has to be 16 bytes long. | ||
| 136 | This file is writeonly. | ||
| 137 | Users: http://roccat.sourceforge.net | ||
| 138 | |||
| 139 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/light_control | ||
| 140 | Date: October 2013 | ||
| 141 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 142 | Description: When written, this file lets one switch between stored and custom | ||
| 143 | light settings. | ||
| 144 | This attribute is only valid for the pro variant. | ||
| 145 | The data has to be 8 bytes long. | ||
| 146 | This file is writeonly. | ||
| 147 | Users: http://roccat.sourceforge.net | ||
| 148 | |||
| 149 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/stored_lights | ||
| 150 | Date: October 2013 | ||
| 151 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 152 | Description: When written, this file lets one set per-key lighting for different | ||
| 153 | layers. | ||
| 154 | This attribute is only valid for the pro variant. | ||
| 155 | The data has to be 1382 bytes long. | ||
| 156 | Before reading this file, control has to be written to select | ||
| 157 | which profile to read. | ||
| 158 | Users: http://roccat.sourceforge.net | ||
| 159 | |||
| 160 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/custom_lights | ||
| 161 | Date: October 2013 | ||
| 162 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 163 | Description: When written, this file lets one set the actual per-key lighting. | ||
| 164 | This attribute is only valid for the pro variant. | ||
| 165 | The data has to be 20 bytes long. | ||
| 166 | This file is writeonly. | ||
| 167 | Users: http://roccat.sourceforge.net | ||
| 168 | |||
| 169 | What: /sys/bus/usb/devices/<busnum>-<devnum>:<config num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/ryos/roccatryos<minor>/light_macro | ||
| 170 | Date: October 2013 | ||
| 171 | Contact: Stefan Achatz <erazor_de@users.sourceforge.net> | ||
| 172 | Description: When written, this file lets one set a light macro that is looped | ||
| 173 | whenever the device gets in dimness mode. | ||
| 174 | This attribute is only valid for the pro variant. | ||
| 175 | The data has to be 2002 bytes long. | ||
| 176 | Before reading this file, control has to be written to select | ||
| 177 | which profile to read. | ||
| 178 | Users: http://roccat.sourceforge.net | ||
| @@ -57,3 +57,21 @@ Description: This attribute is only provided if the device was detected as a · 56 unmodified lines | |||
| 57 | Calibration data is already applied by the kernel to all input | 57 | Calibration data is already applied by the kernel to all input |
| 58 | values but may be used by user-space to perform other | 58 | values but may be used by user-space to perform other |
| 59 | transformations. | 59 | transformations. |
| 60 | |||
| 61 | What: /sys/bus/hid/drivers/wiimote/<dev>/pro_calib | ||
| 62 | Date: October 2013 | ||
| 63 | KernelVersion: 3.13 | ||
| 64 | Contact: David Herrmann <dh.herrmann@gmail.com> | ||
| 65 | Description: This attribute is only provided if the device was detected as a | ||
| 66 | pro-controller. It provides a single line with 4 calibration | ||
| 67 | values for all 4 analog sticks. Format is: "x1:y1 x2:y2". Data | ||
| 68 | is prefixed with a +/-. Each value is a signed 16bit number. | ||
| 69 | Data is encoded as decimal numbers and specifies the offsets of | ||
| 70 | the analog sticks of the pro-controller. | ||
| 71 | Calibration data is already applied by the kernel to all input | ||
| 72 | values but may be used by user-space to perform other | ||
| 73 | transformations. | ||
| 74 | Calibration data is detected by the kernel during device setup. | ||
| 75 | You can write "scan\n" into this file to re-trigger calibration. | ||
| 76 | You can also write data directly in the form "x1:y1 x2:y2" to | ||
| 77 | set the calibration values manually. | ||
| @@ -0,0 +1,22 @@ | |||
| 1 | What: /sys/devices/*/<our-device>/eeprom | ||
| 2 | Date: August 2013 | ||
| 3 | Contact: Oliver Schinagl <oliver@schinagl.nl> | ||
| 4 | Description: read-only access to the SID (Security-ID) on current | ||
| 5 | A-series SoC's from Allwinner. Currently supports A10, A10s, A13 | ||
| 6 | and A20 CPU's. The earlier A1x series of SoCs exports 16 bytes, | ||
| 7 | whereas the newer A20 SoC exposes 512 bytes split into sections. | ||
| 8 | Besides the 16 bytes of SID, there's also an SJTAG area, | ||
| 9 | HDMI-HDCP key and some custom keys. Below a quick overview, for | ||
| 10 | details see the user manual: | ||
| 11 | 0x000 128 bit root-key (sun[457]i) | ||
| 12 | 0x010 128 bit boot-key (sun7i) | ||
| 13 | 0x020 64 bit security-jtag-key (sun7i) | ||
| 14 | 0x028 16 bit key configuration (sun7i) | ||
| 15 | 0x02b 16 bit custom-vendor-key (sun7i) | ||
| 16 | 0x02c 320 bit low general key (sun7i) | ||
| 17 | 0x040 32 bit read-control access (sun7i) | ||
| 18 | 0x064 224 bit low general key (sun7i) | ||
| 19 | 0x080 2304 bit HDCP-key (sun7i) | ||
| 20 | 0x1a0 768 bit high general key (sun7i) | ||
| 21 | Users: any user space application which wants to read the SID on | ||
| 22 | Allwinner's A-series of CPU's. | ||
| @@ -1,6 +1,6 @@ | |||
| 1 | What: /sys/power/ | 1 | What: /sys/power/ |
| 2 | Date: August 2006 | 2 | Date: August 2006 |
| 3 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 3 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 4 | Description: | 4 | Description: |
| 5 | The /sys/power directory will contain files that will | 5 | The /sys/power directory will contain files that will |
| 6 | provide a unified interface to the power management | 6 | provide a unified interface to the power management |
| @@ -8,7 +8,7 @@ Description: · 1 unmodified line | |||
| 8 | 8 | ||
| 9 | What: /sys/power/state | 9 | What: /sys/power/state |
| 10 | Date: August 2006 | 10 | Date: August 2006 |
| 11 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 11 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 12 | Description: | 12 | Description: |
| 13 | The /sys/power/state file controls the system power state. | 13 | The /sys/power/state file controls the system power state. |
| 14 | Reading from this file returns what states are supported, | 14 | Reading from this file returns what states are supported, |
| @@ -22,7 +22,7 @@ Description: · 7 unmodified lines | |||
| 22 | 22 | ||
| 23 | What: /sys/power/disk | 23 | What: /sys/power/disk |
| 24 | Date: September 2006 | 24 | Date: September 2006 |
| 25 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 25 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 26 | Description: | 26 | Description: |
| 27 | The /sys/power/disk file controls the operating mode of the | 27 | The /sys/power/disk file controls the operating mode of the |
| 28 | suspend-to-disk mechanism. Reading from this file returns | 28 | suspend-to-disk mechanism. Reading from this file returns |
| @@ -67,7 +67,7 @@ Description: · 38 unmodified lines | |||
| 67 | 67 | ||
| 68 | What: /sys/power/image_size | 68 | What: /sys/power/image_size |
| 69 | Date: August 2006 | 69 | Date: August 2006 |
| 70 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 70 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 71 | Description: | 71 | Description: |
| 72 | The /sys/power/image_size file controls the size of the image | 72 | The /sys/power/image_size file controls the size of the image |
| 73 | created by the suspend-to-disk mechanism. It can be written a | 73 | created by the suspend-to-disk mechanism. It can be written a |
| @@ -84,7 +84,7 @@ Description: · 10 unmodified lines | |||
| 84 | 84 | ||
| 85 | What: /sys/power/pm_trace | 85 | What: /sys/power/pm_trace |
| 86 | Date: August 2006 | 86 | Date: August 2006 |
| 87 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 87 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 88 | Description: | 88 | Description: |
| 89 | The /sys/power/pm_trace file controls the code which saves the | 89 | The /sys/power/pm_trace file controls the code which saves the |
| 90 | last PM event point in the RTC across reboots, so that you can | 90 | last PM event point in the RTC across reboots, so that you can |
| @@ -133,7 +133,7 @@ Description: · 42 unmodified lines | |||
| 133 | 133 | ||
| 134 | What: /sys/power/pm_async | 134 | What: /sys/power/pm_async |
| 135 | Date: January 2009 | 135 | Date: January 2009 |
| 136 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 136 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 137 | Description: | 137 | Description: |
| 138 | The /sys/power/pm_async file controls the switch allowing the | 138 | The /sys/power/pm_async file controls the switch allowing the |
| 139 | user space to enable or disable asynchronous suspend and resume | 139 | user space to enable or disable asynchronous suspend and resume |
| @@ -146,7 +146,7 @@ Description: · 6 unmodified lines | |||
| 146 | 146 | ||
| 147 | What: /sys/power/wakeup_count | 147 | What: /sys/power/wakeup_count |
| 148 | Date: July 2010 | 148 | Date: July 2010 |
| 149 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 149 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 150 | Description: | 150 | Description: |
| 151 | The /sys/power/wakeup_count file allows user space to put the | 151 | The /sys/power/wakeup_count file allows user space to put the |
| 152 | system into a sleep state while taking into account the | 152 | system into a sleep state while taking into account the |
| @@ -161,7 +161,7 @@ Description: · 8 unmodified lines | |||
| 161 | 161 | ||
| 162 | What: /sys/power/reserved_size | 162 | What: /sys/power/reserved_size |
| 163 | Date: May 2011 | 163 | Date: May 2011 |
| 164 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 164 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 165 | Description: | 165 | Description: |
| 166 | The /sys/power/reserved_size file allows user space to control | 166 | The /sys/power/reserved_size file allows user space to control |
| 167 | the amount of memory reserved for allocations made by device | 167 | the amount of memory reserved for allocations made by device |
| @@ -175,7 +175,7 @@ Description: · 7 unmodified lines | |||
| 175 | 175 | ||
| 176 | What: /sys/power/autosleep | 176 | What: /sys/power/autosleep |
| 177 | Date: April 2012 | 177 | Date: April 2012 |
| 178 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 178 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 179 | Description: | 179 | Description: |
| 180 | The /sys/power/autosleep file can be written one of the strings | 180 | The /sys/power/autosleep file can be written one of the strings |
| 181 | returned by reads from /sys/power/state. If that happens, a | 181 | returned by reads from /sys/power/state. If that happens, a |
| @@ -192,7 +192,7 @@ Description: · 10 unmodified lines | |||
| 192 | 192 | ||
| 193 | What: /sys/power/wake_lock | 193 | What: /sys/power/wake_lock |
| 194 | Date: February 2012 | 194 | Date: February 2012 |
| 195 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 195 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 196 | Description: | 196 | Description: |
| 197 | The /sys/power/wake_lock file allows user space to create | 197 | The /sys/power/wake_lock file allows user space to create |
| 198 | wakeup source objects and activate them on demand (if one of | 198 | wakeup source objects and activate them on demand (if one of |
| @@ -219,7 +219,7 @@ Description: · 20 unmodified lines | |||
| 219 | 219 | ||
| 220 | What: /sys/power/wake_unlock | 220 | What: /sys/power/wake_unlock |
| 221 | Date: February 2012 | 221 | Date: February 2012 |
| 222 | Contact: Rafael J. Wysocki <rjw@sisk.pl> | 222 | Contact: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 223 | Description: | 223 | Description: |
| 224 | The /sys/power/wake_unlock file allows user space to deactivate | 224 | The /sys/power/wake_unlock file allows user space to deactivate |
| 225 | wakeup sources created with the help of /sys/power/wake_lock. | 225 | wakeup sources created with the help of /sys/power/wake_lock. |
| @@ -101,14 +101,23 @@ style to do this even if your device holds the default setting, · 100 unmodified lines | |||
| 101 | because this shows that you did think about these issues wrt. your | 101 | because this shows that you did think about these issues wrt. your |
| 102 | device. | 102 | device. |
| 103 | 103 | ||
| 104 | The query is performed via a call to dma_set_mask(): | 104 | The query is performed via a call to dma_set_mask_and_coherent(): |
| 105 | 105 | ||
| 106 | int dma_set_mask(struct device *dev, u64 mask); | 106 | int dma_set_mask_and_coherent(struct device *dev, u64 mask); |
| 107 | 107 | ||
| 108 | The query for consistent allocations is performed via a call to | 108 | which will query the mask for both streaming and coherent APIs together. |
| 109 | dma_set_coherent_mask(): | 109 | If you have some special requirements, then the following two separate |
| 110 | queries can be used instead: | ||
| 110 | 111 | ||
| 111 | int dma_set_coherent_mask(struct device *dev, u64 mask); | 112 | The query for streaming mappings is performed via a call to |
| 113 | dma_set_mask(): | ||
| 114 | |||
| 115 | int dma_set_mask(struct device *dev, u64 mask); | ||
| 116 | |||
| 117 | The query for consistent allocations is performed via a call | ||
| 118 | to dma_set_coherent_mask(): | ||
| 119 | |||
| 120 | int dma_set_coherent_mask(struct device *dev, u64 mask); | ||
| 112 | 121 | ||
| 113 | Here, dev is a pointer to the device struct of your device, and mask | 122 | Here, dev is a pointer to the device struct of your device, and mask |
| 114 | is a bit mask describing which bits of an address your device | 123 | is a bit mask describing which bits of an address your device |
| @@ -137,7 +146,7 @@ exactly why. · 22 unmodified lines | |||
| 137 | 146 | ||
| 138 | The standard 32-bit addressing device would do something like this: | 147 | The standard 32-bit addressing device would do something like this: |
| 139 | 148 | ||
| 140 | if (dma_set_mask(dev, DMA_BIT_MASK(32))) { | 149 | if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) { |
| 141 | printk(KERN_WARNING | 150 | printk(KERN_WARNING |
| 142 | "mydev: No suitable DMA available.\n"); | 151 | "mydev: No suitable DMA available.\n"); |
| 143 | goto ignore_this_device; | 152 | goto ignore_this_device; |
| @@ -171,22 +180,20 @@ the case would look like this: · 27 unmodified lines | |||
| 171 | 180 | ||
| 172 | int using_dac, consistent_using_dac; | 181 | int using_dac, consistent_using_dac; |
| 173 | 182 | ||
| 174 | if (!dma_set_mask(dev, DMA_BIT_MASK(64))) { | 183 | if (!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64))) { |
| 175 | using_dac = 1; | 184 | using_dac = 1; |
| 176 | consistent_using_dac = 1; | 185 | consistent_using_dac = 1; |
| 177 | dma_set_coherent_mask(dev, DMA_BIT_MASK(64)); | 186 | } else if (!dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))) { |
| 178 | } else if (!dma_set_mask(dev, DMA_BIT_MASK(32))) { | ||
| 179 | using_dac = 0; | 187 | using_dac = 0; |
| 180 | consistent_using_dac = 0; | 188 | consistent_using_dac = 0; |
| 181 | dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); | ||
| 182 | } else { | 189 | } else { |
| 183 | printk(KERN_WARNING | 190 | printk(KERN_WARNING |
| 184 | "mydev: No suitable DMA available.\n"); | 191 | "mydev: No suitable DMA available.\n"); |
| 185 | goto ignore_this_device; | 192 | goto ignore_this_device; |
| 186 | } | 193 | } |
| 187 | 194 | ||
| 188 | dma_set_coherent_mask() will always be able to set the same or a | 195 | The coherent coherent mask will always be able to set the same or a |
| 189 | smaller mask as dma_set_mask(). However for the rare case that a | 196 | smaller mask as the streaming mask. However for the rare case that a |
| 190 | device driver only uses consistent allocations, one would have to | 197 | device driver only uses consistent allocations, one would have to |
| 191 | check the return value from dma_set_coherent_mask(). | 198 | check the return value from dma_set_coherent_mask(). |
| 192 | 199 | ||
| @@ -199,9 +206,9 @@ address you might do something like: · 6 unmodified lines | |||
| 199 | goto ignore_this_device; | 206 | goto ignore_this_device; |
| 200 | } | 207 | } |
| 201 | 208 | ||
| 202 | When dma_set_mask() is successful, and returns zero, the kernel saves | 209 | When dma_set_mask() or dma_set_mask_and_coherent() is successful, and |
| 203 | away this mask you have provided. The kernel will use this | 210 | returns zero, the kernel saves away this mask you have provided. The |
| 204 | information later when you make DMA mappings. | 211 | kernel will use this information later when you make DMA mappings. |
| 205 | 212 | ||
| 206 | There is a case which we are aware of at this time, which is worth | 213 | There is a case which we are aware of at this time, which is worth |
| 207 | mentioning in this documentation. If your device supports multiple | 214 | mentioning in this documentation. If your device supports multiple |
| @@ -141,6 +141,14 @@ won't change the current mask settings. It is more intended as an · 140 unmodified lines | |||
| 141 | internal API for use by the platform than an external API for use by | 141 | internal API for use by the platform than an external API for use by |
| 142 | driver writers. | 142 | driver writers. |
| 143 | 143 | ||
| 144 | int | ||
| 145 | dma_set_mask_and_coherent(struct device *dev, u64 mask) | ||
| 146 | |||
| 147 | Checks to see if the mask is possible and updates the device | ||
| 148 | streaming and coherent DMA mask parameters if it is. | ||
| 149 | |||
| 150 | Returns: 0 if successful and a negative error if not. | ||
| 151 | |||
| 144 | int | 152 | int |
| 145 | dma_set_mask(struct device *dev, u64 mask) | 153 | dma_set_mask(struct device *dev, u64 mask) |
| 146 | 154 | ||
| @@ -13,7 +13,7 @@ all pending DMA writes to complete, and thus provides a mechanism to · 12 unmodified lines | |||
| 13 | strictly order DMA from a device across all intervening busses and | 13 | strictly order DMA from a device across all intervening busses and |
| 14 | bridges. This barrier is not specific to a particular type of | 14 | bridges. This barrier is not specific to a particular type of |
| 15 | interconnect, it applies to the system as a whole, and so its | 15 | interconnect, it applies to the system as a whole, and so its |
| 16 | implementation must account for the idiosyncracies of the system all | 16 | implementation must account for the idiosyncrasies of the system all |
| 17 | the way from the DMA device to memory. | 17 | the way from the DMA device to memory. |
| 18 | 18 | ||
| 19 | As an example of a situation where DMA_ATTR_WRITE_BARRIER would be | 19 | As an example of a situation where DMA_ATTR_WRITE_BARRIER would be |
| @@ -60,7 +60,7 @@ such mapping is non-trivial task and consumes very limited resources · 40 unmodified lines | |||
| 60 | Buffers allocated with this attribute can be only passed to user space | 60 | Buffers allocated with this attribute can be only passed to user space |
| 61 | by calling dma_mmap_attrs(). By using this API, you are guaranteeing | 61 | by calling dma_mmap_attrs(). By using this API, you are guaranteeing |
| 62 | that you won't dereference the pointer returned by dma_alloc_attr(). You | 62 | that you won't dereference the pointer returned by dma_alloc_attr(). You |
| 63 | can threat it as a cookie that must be passed to dma_mmap_attrs() and | 63 | can treat it as a cookie that must be passed to dma_mmap_attrs() and |
| 64 | dma_free_attrs(). Make sure that both of these also get this attribute | 64 | dma_free_attrs(). Make sure that both of these also get this attribute |
| 65 | set on each call. | 65 | set on each call. |
| 66 | 66 | ||
| @@ -82,7 +82,7 @@ to 'device' domain, what synchronizes CPU caches for the given region · 15 unmodified lines | |||
| 82 | (usually it means that the cache has been flushed or invalidated | 82 | (usually it means that the cache has been flushed or invalidated |
| 83 | depending on the dma direction). However, next calls to | 83 | depending on the dma direction). However, next calls to |
| 84 | dma_map_{single,page,sg}() for other devices will perform exactly the | 84 | dma_map_{single,page,sg}() for other devices will perform exactly the |
| 85 | same sychronization operation on the CPU cache. CPU cache sychronization | 85 | same synchronization operation on the CPU cache. CPU cache synchronization |
| 86 | might be a time consuming operation, especially if the buffers are | 86 | might be a time consuming operation, especially if the buffers are |
| 87 | large, so it is highly recommended to avoid it if possible. | 87 | large, so it is highly recommended to avoid it if possible. |
| 88 | DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of | 88 | DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of |
| @@ -152,8 +152,8 @@ · 151 unmodified lines | |||
| 152 | !Finclude/net/cfg80211.h cfg80211_scan_request | 152 | !Finclude/net/cfg80211.h cfg80211_scan_request |
| 153 | !Finclude/net/cfg80211.h cfg80211_scan_done | 153 | !Finclude/net/cfg80211.h cfg80211_scan_done |
| 154 | !Finclude/net/cfg80211.h cfg80211_bss | 154 | !Finclude/net/cfg80211.h cfg80211_bss |
| 155 | !Finclude/net/cfg80211.h cfg80211_inform_bss_frame | 155 | !Finclude/net/cfg80211.h cfg80211_inform_bss_width_frame |
| 156 | !Finclude/net/cfg80211.h cfg80211_inform_bss | 156 | !Finclude/net/cfg80211.h cfg80211_inform_bss_width |
| 157 | !Finclude/net/cfg80211.h cfg80211_unlink_bss | 157 | !Finclude/net/cfg80211.h cfg80211_unlink_bss |
| 158 | !Finclude/net/cfg80211.h cfg80211_find_ie | 158 | !Finclude/net/cfg80211.h cfg80211_find_ie |
| 159 | !Finclude/net/cfg80211.h ieee80211_bss_get_ie | 159 | !Finclude/net/cfg80211.h ieee80211_bss_get_ie |
| @@ -87,7 +87,10 @@ X!Iinclude/linux/kobject.h · 86 unmodified lines | |||
| 87 | !Ekernel/printk/printk.c | 87 | !Ekernel/printk/printk.c |
| 88 | !Ekernel/panic.c | 88 | !Ekernel/panic.c |
| 89 | !Ekernel/sys.c | 89 | !Ekernel/sys.c |
| 90 | !Ekernel/rcupdate.c | 90 | !Ekernel/rcu/srcu.c |
| 91 | !Ekernel/rcu/tree.c | ||
| 92 | !Ekernel/rcu/tree_plugin.h | ||
| 93 | !Ekernel/rcu/update.c | ||
| 91 | </sect1> | 94 | </sect1> |
| 92 | 95 | ||
| 93 | <sect1><title>Device Resource Management</title> | 96 | <sect1><title>Device Resource Management</title> |
| @@ -91,7 +91,6 @@ · 90 unmodified lines | |||
| 91 | <title>The Filesystem for Exporting Kernel Objects</title> | 91 | <title>The Filesystem for Exporting Kernel Objects</title> |
| 92 | !Efs/sysfs/file.c | 92 | !Efs/sysfs/file.c |
| 93 | !Efs/sysfs/symlink.c | 93 | !Efs/sysfs/symlink.c |
| 94 | !Efs/sysfs/bin.c | ||
| 95 | </chapter> | 94 | </chapter> |
| 96 | 95 | ||
| 97 | <chapter id="debugfs"> | 96 | <chapter id="debugfs"> |
| @@ -87,7 +87,7 @@ · 86 unmodified lines | |||
| 87 | <chapter id="rationale"> | 87 | <chapter id="rationale"> |
| 88 | <title>Rationale</title> | 88 | <title>Rationale</title> |
| 89 | <para> | 89 | <para> |
| 90 | The original implementation of interrupt handling in Linux is using | 90 | The original implementation of interrupt handling in Linux uses |
| 91 | the __do_IRQ() super-handler, which is able to deal with every | 91 | the __do_IRQ() super-handler, which is able to deal with every |
| 92 | type of interrupt logic. | 92 | type of interrupt logic. |
| 93 | </para> | 93 | </para> |
| @@ -111,19 +111,19 @@ · 17 unmodified lines | |||
| 111 | </itemizedlist> | 111 | </itemizedlist> |
| 112 | </para> | 112 | </para> |
| 113 | <para> | 113 | <para> |
| 114 | This split implementation of highlevel IRQ handlers allows us to | 114 | This split implementation of high-level IRQ handlers allows us to |
| 115 | optimize the flow of the interrupt handling for each specific | 115 | optimize the flow of the interrupt handling for each specific |
| 116 | interrupt type. This reduces complexity in that particular codepath | 116 | interrupt type. This reduces complexity in that particular code path |
| 117 | and allows the optimized handling of a given type. | 117 | and allows the optimized handling of a given type. |
| 118 | </para> | 118 | </para> |
| 119 | <para> | 119 | <para> |
| 120 | The original general IRQ implementation used hw_interrupt_type | 120 | The original general IRQ implementation used hw_interrupt_type |
| 121 | structures and their ->ack(), ->end() [etc.] callbacks to | 121 | structures and their ->ack(), ->end() [etc.] callbacks to |
| 122 | differentiate the flow control in the super-handler. This leads to | 122 | differentiate the flow control in the super-handler. This leads to |
| 123 | a mix of flow logic and lowlevel hardware logic, and it also leads | 123 | a mix of flow logic and low-level hardware logic, and it also leads |
| 124 | to unnecessary code duplication: for example in i386, there is a | 124 | to unnecessary code duplication: for example in i386, there is an |
| 125 | ioapic_level_irq and a ioapic_edge_irq irq-type which share many | 125 | ioapic_level_irq and an ioapic_edge_irq IRQ-type which share many |
| 126 | of the lowlevel details but have different flow handling. | 126 | of the low-level details but have different flow handling. |
| 127 | </para> | 127 | </para> |
| 128 | <para> | 128 | <para> |
| 129 | A more natural abstraction is the clean separation of the | 129 | A more natural abstraction is the clean separation of the |
| @@ -132,23 +132,23 @@ · 2 unmodified lines | |||
| 132 | <para> | 132 | <para> |
| 133 | Analysing a couple of architecture's IRQ subsystem implementations | 133 | Analysing a couple of architecture's IRQ subsystem implementations |
| 134 | reveals that most of them can use a generic set of 'irq flow' | 134 | reveals that most of them can use a generic set of 'irq flow' |
| 135 | methods and only need to add the chip level specific code. | 135 | methods and only need to add the chip-level specific code. |
| 136 | The separation is also valuable for (sub)architectures | 136 | The separation is also valuable for (sub)architectures |
| 137 | which need specific quirks in the irq flow itself but not in the | 137 | which need specific quirks in the IRQ flow itself but not in the |
| 138 | chip-details - and thus provides a more transparent IRQ subsystem | 138 | chip details - and thus provides a more transparent IRQ subsystem |
| 139 | design. | 139 | design. |
| 140 | </para> | 140 | </para> |
| 141 | <para> | 141 | <para> |
| 142 | Each interrupt descriptor is assigned its own highlevel flow | 142 | Each interrupt descriptor is assigned its own high-level flow |
| 143 | handler, which is normally one of the generic | 143 | handler, which is normally one of the generic |
| 144 | implementations. (This highlevel flow handler implementation also | 144 | implementations. (This high-level flow handler implementation also |
| 145 | makes it simple to provide demultiplexing handlers which can be | 145 | makes it simple to provide demultiplexing handlers which can be |
| 146 | found in embedded platforms on various architectures.) | 146 | found in embedded platforms on various architectures.) |
| 147 | </para> | 147 | </para> |
| 148 | <para> | 148 | <para> |
| 149 | The separation makes the generic interrupt handling layer more | 149 | The separation makes the generic interrupt handling layer more |
| 150 | flexible and extensible. For example, an (sub)architecture can | 150 | flexible and extensible. For example, an (sub)architecture can |
| 151 | use a generic irq-flow implementation for 'level type' interrupts | 151 | use a generic IRQ-flow implementation for 'level type' interrupts |
| 152 | and add a (sub)architecture specific 'edge type' implementation. | 152 | and add a (sub)architecture specific 'edge type' implementation. |
| 153 | </para> | 153 | </para> |
| 154 | <para> | 154 | <para> |
| @@ -172,9 +172,9 @@ · 17 unmodified lines | |||
| 172 | <para> | 172 | <para> |
| 173 | There are three main levels of abstraction in the interrupt code: | 173 | There are three main levels of abstraction in the interrupt code: |
| 174 | <orderedlist> | 174 | <orderedlist> |
| 175 | <listitem><para>Highlevel driver API</para></listitem> | 175 | <listitem><para>High-level driver API</para></listitem> |
| 176 | <listitem><para>Highlevel IRQ flow handlers</para></listitem> | 176 | <listitem><para>High-level IRQ flow handlers</para></listitem> |
| 177 | <listitem><para>Chiplevel hardware encapsulation</para></listitem> | 177 | <listitem><para>Chip-level hardware encapsulation</para></listitem> |
| 178 | </orderedlist> | 178 | </orderedlist> |
| 179 | </para> | 179 | </para> |
| 180 | <sect1 id="Interrupt_control_flow"> | 180 | <sect1 id="Interrupt_control_flow"> |
| @@ -189,16 +189,16 @@ · 8 unmodified lines | |||
| 189 | which are assigned to this interrupt. | 189 | which are assigned to this interrupt. |
| 190 | </para> | 190 | </para> |
| 191 | <para> | 191 | <para> |
| 192 | Whenever an interrupt triggers, the lowlevel arch code calls into | 192 | Whenever an interrupt triggers, the low-level architecture code calls |
| 193 | the generic interrupt code by calling desc->handle_irq(). | 193 | into the generic interrupt code by calling desc->handle_irq(). |
| 194 | This highlevel IRQ handling function only uses desc->irq_data.chip | 194 | This high-level IRQ handling function only uses desc->irq_data.chip |
| 195 | primitives referenced by the assigned chip descriptor structure. | 195 | primitives referenced by the assigned chip descriptor structure. |
| 196 | </para> | 196 | </para> |
| 197 | </sect1> | 197 | </sect1> |
| 198 | <sect1 id="Highlevel_Driver_API"> | 198 | <sect1 id="Highlevel_Driver_API"> |
| 199 | <title>Highlevel Driver API</title> | 199 | <title>High-level Driver API</title> |
| 200 | <para> | 200 | <para> |
| 201 | The highlevel Driver API consists of following functions: | 201 | The high-level Driver API consists of following functions: |
| 202 | <itemizedlist> | 202 | <itemizedlist> |
| 203 | <listitem><para>request_irq()</para></listitem> | 203 | <listitem><para>request_irq()</para></listitem> |
| 204 | <listitem><para>free_irq()</para></listitem> | 204 | <listitem><para>free_irq()</para></listitem> |
| @@ -216,7 +216,7 @@ · 11 unmodified lines | |||
| 216 | </para> | 216 | </para> |
| 217 | </sect1> | 217 | </sect1> |
| 218 | <sect1 id="Highlevel_IRQ_flow_handlers"> | 218 | <sect1 id="Highlevel_IRQ_flow_handlers"> |
| 219 | <title>Highlevel IRQ flow handlers</title> | 219 | <title>High-level IRQ flow handlers</title> |
| 220 | <para> | 220 | <para> |
| 221 | The generic layer provides a set of pre-defined irq-flow methods: | 221 | The generic layer provides a set of pre-defined irq-flow methods: |
| 222 | <itemizedlist> | 222 | <itemizedlist> |
| @@ -228,7 +228,7 @@ · 5 unmodified lines | |||
| 228 | <listitem><para>handle_edge_eoi_irq</para></listitem> | 228 | <listitem><para>handle_edge_eoi_irq</para></listitem> |
| 229 | <listitem><para>handle_bad_irq</para></listitem> | 229 | <listitem><para>handle_bad_irq</para></listitem> |
| 230 | </itemizedlist> | 230 | </itemizedlist> |
| 231 | The interrupt flow handlers (either predefined or architecture | 231 | The interrupt flow handlers (either pre-defined or architecture |
| 232 | specific) are assigned to specific interrupts by the architecture | 232 | specific) are assigned to specific interrupts by the architecture |
| 233 | either during bootup or during device initialization. | 233 | either during bootup or during device initialization. |
| 234 | </para> | 234 | </para> |
| @@ -297,7 +297,7 @@ desc->irq_data.chip->irq_unmask(); · 62 unmodified lines | |||
| 297 | <para> | 297 | <para> |
| 298 | handle_fasteoi_irq provides a generic implementation | 298 | handle_fasteoi_irq provides a generic implementation |
| 299 | for interrupts, which only need an EOI at the end of | 299 | for interrupts, which only need an EOI at the end of |
| 300 | the handler | 300 | the handler. |
| 301 | </para> | 301 | </para> |
| 302 | <para> | 302 | <para> |
| 303 | The following control flow is implemented (simplified excerpt): | 303 | The following control flow is implemented (simplified excerpt): |
| @@ -394,7 +394,7 @@ if (desc->irq_data.chip->irq_eoi) · 90 unmodified lines | |||
| 394 | The generic functions are intended for 'clean' architectures and chips, | 394 | The generic functions are intended for 'clean' architectures and chips, |
| 395 | which have no platform-specific IRQ handling quirks. If an architecture | 395 | which have no platform-specific IRQ handling quirks. If an architecture |
| 396 | needs to implement quirks on the 'flow' level then it can do so by | 396 | needs to implement quirks on the 'flow' level then it can do so by |
| 397 | overriding the highlevel irq-flow handler. | 397 | overriding the high-level irq-flow handler. |
| 398 | </para> | 398 | </para> |
| 399 | </sect2> | 399 | </sect2> |
| 400 | <sect2 id="Delayed_interrupt_disable"> | 400 | <sect2 id="Delayed_interrupt_disable"> |
| @@ -419,9 +419,9 @@ if (desc->irq_data.chip->irq_eoi) · 18 unmodified lines | |||
| 419 | </sect2> | 419 | </sect2> |
| 420 | </sect1> | 420 | </sect1> |
| 421 | <sect1 id="Chiplevel_hardware_encapsulation"> | 421 | <sect1 id="Chiplevel_hardware_encapsulation"> |
| 422 | <title>Chiplevel hardware encapsulation</title> | 422 | <title>Chip-level hardware encapsulation</title> |
| 423 | <para> | 423 | <para> |
| 424 | The chip level hardware descriptor structure irq_chip | 424 | The chip-level hardware descriptor structure irq_chip |
| 425 | contains all the direct chip relevant functions, which | 425 | contains all the direct chip relevant functions, which |
| 426 | can be utilized by the irq flow implementations. | 426 | can be utilized by the irq flow implementations. |
| 427 | <itemizedlist> | 427 | <itemizedlist> |
| @@ -429,14 +429,14 @@ if (desc->irq_data.chip->irq_eoi) · 1 unmodified line | |||
| 429 | <listitem><para>irq_mask_ack() - Optional, recommended for performance</para></listitem> | 429 | <listitem><para>irq_mask_ack() - Optional, recommended for performance</para></listitem> |
| 430 | <listitem><para>irq_mask()</para></listitem> | 430 | <listitem><para>irq_mask()</para></listitem> |
| 431 | <listitem><para>irq_unmask()</para></listitem> | 431 | <listitem><para>irq_unmask()</para></listitem> |
| 432 | <listitem><para>irq_eoi() - Optional, required for eoi flow handlers</para></listitem> | 432 | <listitem><para>irq_eoi() - Optional, required for EOI flow handlers</para></listitem> |
| 433 | <listitem><para>irq_retrigger() - Optional</para></listitem> | 433 | <listitem><para>irq_retrigger() - Optional</para></listitem> |
| 434 | <listitem><para>irq_set_type() - Optional</para></listitem> | 434 | <listitem><para>irq_set_type() - Optional</para></listitem> |
| 435 | <listitem><para>irq_set_wake() - Optional</para></listitem> | 435 | <listitem><para>irq_set_wake() - Optional</para></listitem> |
| 436 | </itemizedlist> | 436 | </itemizedlist> |
| 437 | These primitives are strictly intended to mean what they say: ack means | 437 | These primitives are strictly intended to mean what they say: ack means |
| 438 | ACK, masking means masking of an IRQ line, etc. It is up to the flow | 438 | ACK, masking means masking of an IRQ line, etc. It is up to the flow |
| 439 | handler(s) to use these basic units of lowlevel functionality. | 439 | handler(s) to use these basic units of low-level functionality. |
| 440 | </para> | 440 | </para> |
| 441 | </sect1> | 441 | </sect1> |
| 442 | </chapter> | 442 | </chapter> |
| @@ -445,7 +445,7 @@ if (desc->irq_data.chip->irq_eoi) · 2 unmodified lines | |||
| 445 | <title>__do_IRQ entry point</title> | 445 | <title>__do_IRQ entry point</title> |
| 446 | <para> | 446 | <para> |
| 447 | The original implementation __do_IRQ() was an alternative entry | 447 | The original implementation __do_IRQ() was an alternative entry |
| 448 | point for all types of interrupts. It not longer exists. | 448 | point for all types of interrupts. It no longer exists. |
| 449 | </para> | 449 | </para> |
| 450 | <para> | 450 | <para> |
| 451 | This handler turned out to be not suitable for all | 451 | This handler turned out to be not suitable for all |
| @@ -468,11 +468,11 @@ if (desc->irq_data.chip->irq_eoi) · 16 unmodified lines | |||
| 468 | <chapter id="genericchip"> | 468 | <chapter id="genericchip"> |
| 469 | <title>Generic interrupt chip</title> | 469 | <title>Generic interrupt chip</title> |
| 470 | <para> | 470 | <para> |
| 471 | To avoid copies of identical implementations of irq chips the | 471 | To avoid copies of identical implementations of IRQ chips the |
| 472 | core provides a configurable generic interrupt chip | 472 | core provides a configurable generic interrupt chip |
| 473 | implementation. Developers should check carefuly whether the | 473 | implementation. Developers should check carefuly whether the |
| 474 | generic chip fits their needs before implementing the same | 474 | generic chip fits their needs before implementing the same |
| 475 | functionality slightly different themself. | 475 | functionality slightly differently themselves. |
| 476 | </para> | 476 | </para> |
| 477 | !Ekernel/irq/generic-chip.c | 477 | !Ekernel/irq/generic-chip.c |
| 478 | </chapter> | 478 | </chapter> |
| @@ -1958,7 +1958,7 @@ machines due to caching. · 1957 unmodified lines | |||
| 1958 | <chapter id="apiref-mutex"> | 1958 | <chapter id="apiref-mutex"> |
| 1959 | <title>Mutex API reference</title> | 1959 | <title>Mutex API reference</title> |
| 1960 | !Iinclude/linux/mutex.h | 1960 | !Iinclude/linux/mutex.h |
| 1961 | !Ekernel/mutex.c | 1961 | !Ekernel/locking/mutex.c |
| 1962 | </chapter> | 1962 | </chapter> |
| 1963 | 1963 | ||
| 1964 | <chapter id="apiref-futex"> | 1964 | <chapter id="apiref-futex"> |
| @@ -1222,8 +1222,6 @@ in this page</entry> · 1221 unmodified lines | |||
| 1222 | #define NAND_BBT_VERSION 0x00000100 | 1222 | #define NAND_BBT_VERSION 0x00000100 |
| 1223 | /* Create a bbt if none axists */ | 1223 | /* Create a bbt if none axists */ |
| 1224 | #define NAND_BBT_CREATE 0x00000200 | 1224 | #define NAND_BBT_CREATE 0x00000200 |
| 1225 | /* Search good / bad pattern through all pages of a block */ | ||
| 1226 | #define NAND_BBT_SCANALLPAGES 0x00000400 | ||
| 1227 | /* Write bbt if neccecary */ | 1225 | /* Write bbt if neccecary */ |
| 1228 | #define NAND_BBT_WRITE 0x00001000 | 1226 | #define NAND_BBT_WRITE 0x00001000 |
| 1229 | /* Read and write back block contents when writing bbt */ | 1227 | /* Read and write back block contents when writing bbt */ |
| @@ -525,8 +525,9 @@ corresponding register block for you. · 524 unmodified lines | |||
| 525 | 6. Other interesting functions | 525 | 6. Other interesting functions |
| 526 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | 526 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 527 | 527 | ||
| 528 | pci_find_slot() Find pci_dev corresponding to given bus and | 528 | pci_get_domain_bus_and_slot() Find pci_dev corresponding to given domain, |
| 529 | slot numbers. | 529 | bus and slot and number. If the device is |
| 530 | found, its reference count is increased. | ||
| 530 | pci_set_power_state() Set PCI Power Management state (0=D0 ... 3=D3) | 531 | pci_set_power_state() Set PCI Power Management state (0=D0 ... 3=D3) |
| 531 | pci_find_capability() Find specified capability in device's capability | 532 | pci_find_capability() Find specified capability in device's capability |
| 532 | list. | 533 | list. |
| @@ -582,7 +583,8 @@ having sane locking. · 49 unmodified lines | |||
| 582 | 583 | ||
| 583 | pci_find_device() Superseded by pci_get_device() | 584 | pci_find_device() Superseded by pci_get_device() |
| 584 | pci_find_subsys() Superseded by pci_get_subsys() | 585 | pci_find_subsys() Superseded by pci_get_subsys() |
| 585 | pci_find_slot() Superseded by pci_get_slot() | 586 | pci_find_slot() Superseded by pci_get_domain_bus_and_slot() |
| 587 | pci_get_slot() Superseded by pci_get_domain_bus_and_slot() | ||
| 586 | 588 | ||
| 587 | 589 | ||
| 588 | The alternative is the traditional PCI device driver that walks PCI | 590 | The alternative is the traditional PCI device driver that walks PCI |
| @@ -202,8 +202,8 @@ over a rather long period of time, but improvements are always welcome! · 201 unmodified lines | |||
| 202 | updater uses call_rcu_sched() or synchronize_sched(), then | 202 | updater uses call_rcu_sched() or synchronize_sched(), then |
| 203 | the corresponding readers must disable preemption, possibly | 203 | the corresponding readers must disable preemption, possibly |
| 204 | by calling rcu_read_lock_sched() and rcu_read_unlock_sched(). | 204 | by calling rcu_read_lock_sched() and rcu_read_unlock_sched(). |
| 205 | If the updater uses synchronize_srcu() or call_srcu(), | 205 | If the updater uses synchronize_srcu() or call_srcu(), then |
| 206 | the the corresponding readers must use srcu_read_lock() and | 206 | the corresponding readers must use srcu_read_lock() and |
| 207 | srcu_read_unlock(), and with the same srcu_struct. The rules for | 207 | srcu_read_unlock(), and with the same srcu_struct. The rules for |
| 208 | the expedited primitives are the same as for their non-expedited | 208 | the expedited primitives are the same as for their non-expedited |
| 209 | counterparts. Mixing things up will result in confusion and | 209 | counterparts. Mixing things up will result in confusion and |
| @@ -12,12 +12,12 @@ CONFIG_RCU_CPU_STALL_TIMEOUT · 11 unmodified lines | |||
| 12 | This kernel configuration parameter defines the period of time | 12 | This kernel configuration parameter defines the period of time |
| 13 | that RCU will wait from the beginning of a grace period until it | 13 | that RCU will wait from the beginning of a grace period until it |
| 14 | issues an RCU CPU stall warning. This time period is normally | 14 | issues an RCU CPU stall warning. This time period is normally |
| 15 | sixty seconds. | 15 | 21 seconds. |
| 16 | 16 | ||
| 17 | This configuration parameter may be changed at runtime via the | 17 | This configuration parameter may be changed at runtime via the |
| 18 | /sys/module/rcutree/parameters/rcu_cpu_stall_timeout, however | 18 | /sys/module/rcutree/parameters/rcu_cpu_stall_timeout, however |
| 19 | this parameter is checked only at the beginning of a cycle. | 19 | this parameter is checked only at the beginning of a cycle. |
| 20 | So if you are 30 seconds into a 70-second stall, setting this | 20 | So if you are 10 seconds into a 40-second stall, setting this |
| 21 | sysfs parameter to (say) five will shorten the timeout for the | 21 | sysfs parameter to (say) five will shorten the timeout for the |
| 22 | -next- stall, or the following warning for the current stall | 22 | -next- stall, or the following warning for the current stall |
| 23 | (assuming the stall lasts long enough). It will not affect the | 23 | (assuming the stall lasts long enough). It will not affect the |
| @@ -32,7 +32,7 @@ CONFIG_RCU_CPU_STALL_VERBOSE · 8 unmodified lines | |||
| 32 | also dump the stacks of any tasks that are blocking the current | 32 | also dump the stacks of any tasks that are blocking the current |
| 33 | RCU-preempt grace period. | 33 | RCU-preempt grace period. |
| 34 | 34 | ||
| 35 | RCU_CPU_STALL_INFO | 35 | CONFIG_RCU_CPU_STALL_INFO |
| 36 | 36 | ||
| 37 | This kernel configuration parameter causes the stall warning to | 37 | This kernel configuration parameter causes the stall warning to |
| 38 | print out additional per-CPU diagnostic information, including | 38 | print out additional per-CPU diagnostic information, including |
| @@ -43,7 +43,8 @@ RCU_STALL_DELAY_DELTA · 4 unmodified lines | |||
| 43 | Although the lockdep facility is extremely useful, it does add | 43 | Although the lockdep facility is extremely useful, it does add |
| 44 | some overhead. Therefore, under CONFIG_PROVE_RCU, the | 44 | some overhead. Therefore, under CONFIG_PROVE_RCU, the |
| 45 | RCU_STALL_DELAY_DELTA macro allows five extra seconds before | 45 | RCU_STALL_DELAY_DELTA macro allows five extra seconds before |
| 46 | giving an RCU CPU stall warning message. | 46 | giving an RCU CPU stall warning message. (This is a cpp |
| 47 | macro, not a kernel configuration parameter.) | ||
| 47 | 48 | ||
| 48 | RCU_STALL_RAT_DELAY | 49 | RCU_STALL_RAT_DELAY |
| 49 | 50 | ||
| @@ -52,7 +53,8 @@ RCU_STALL_RAT_DELAY · 2 unmodified lines | |||
| 52 | However, if the offending CPU does not detect its own stall in | 53 | However, if the offending CPU does not detect its own stall in |
| 53 | the number of jiffies specified by RCU_STALL_RAT_DELAY, then | 54 | the number of jiffies specified by RCU_STALL_RAT_DELAY, then |
| 54 | some other CPU will complain. This delay is normally set to | 55 | some other CPU will complain. This delay is normally set to |
| 55 | two jiffies. | 56 | two jiffies. (This is a cpp macro, not a kernel configuration |
| 57 | parameter.) | ||
| 56 | 58 | ||
| 57 | When a CPU detects that it is stalling, it will print a message similar | 59 | When a CPU detects that it is stalling, it will print a message similar |
| 58 | to the following: | 60 | to the following: |
| @@ -86,7 +88,12 @@ printing, there will be a spurious stall-warning message: · 27 unmodified lines | |||
| 86 | 88 | ||
| 87 | INFO: rcu_bh_state detected stalls on CPUs/tasks: { } (detected by 4, 2502 jiffies) | 89 | INFO: rcu_bh_state detected stalls on CPUs/tasks: { } (detected by 4, 2502 jiffies) |
| 88 | 90 | ||
| 89 | This is rare, but does happen from time to time in real life. | 91 | This is rare, but does happen from time to time in real life. It is also |
| 92 | possible for a zero-jiffy stall to be flagged in this case, depending | ||
| 93 | on how the stall warning and the grace-period initialization happen to | ||
| 94 | interact. Please note that it is not possible to entirely eliminate this | ||
| 95 | sort of false positive without resorting to things like stop_machine(), | ||
| 96 | which is overkill for this sort of problem. | ||
| 90 | 97 | ||
| 91 | If the CONFIG_RCU_CPU_STALL_INFO kernel configuration parameter is set, | 98 | If the CONFIG_RCU_CPU_STALL_INFO kernel configuration parameter is set, |
| 92 | more information is printed with the stall-warning message, for example: | 99 | more information is printed with the stall-warning message, for example: |
| @@ -216,4 +223,5 @@ that portion of the stack which remains the same from trace to trace. · 123 unmodified lines | |||
| 216 | If you can reliably trigger the stall, ftrace can be quite helpful. | 223 | If you can reliably trigger the stall, ftrace can be quite helpful. |
| 217 | 224 | ||
| 218 | RCU bugs can often be debugged with the help of CONFIG_RCU_TRACE | 225 | RCU bugs can often be debugged with the help of CONFIG_RCU_TRACE |
| 219 | and with RCU's event tracing. | 226 | and with RCU's event tracing. For information on RCU's event tracing, |
| 227 | see include/trace/events/rcu.h. | ||
| @@ -4,4 +4,4 @@ CONFIG_ACPI_CUSTOM_DSDT builds the image into the kernel. · 3 unmodified lines | |||
| 4 | 4 | ||
| 5 | When to use this method is described in detail on the | 5 | When to use this method is described in detail on the |
| 6 | Linux/ACPI home page: | 6 | Linux/ACPI home page: |
| 7 | http://www.lesswatts.org/projects/acpi/overridingDSDT.php | 7 | https://01.org/linux-acpi/documentation/overriding-dsdt |
| @@ -295,10 +295,6 @@ These GPIO numbers are controller relative and path "\\_SB.PCI0.GPI0" · 294 unmodified lines | |||
| 295 | specifies the path to the controller. In order to use these GPIOs in Linux | 295 | specifies the path to the controller. In order to use these GPIOs in Linux |
| 296 | we need to translate them to the Linux GPIO numbers. | 296 | we need to translate them to the Linux GPIO numbers. |
| 297 | 297 | ||
| 298 | The driver can do this by including <linux/acpi_gpio.h> and then calling | ||
| 299 | acpi_get_gpio(path, gpio). This will return the Linux GPIO number or | ||
| 300 | negative errno if there was no translation found. | ||
| 301 | |||
| 302 | In a simple case of just getting the Linux GPIO number from device | 298 | In a simple case of just getting the Linux GPIO number from device |
| 303 | resources one can use acpi_get_gpio_by_index() helper function. It takes | 299 | resources one can use acpi_get_gpio_by_index() helper function. It takes |
| 304 | pointer to the device and index of the GpioIo/GpioInt descriptor in the | 300 | pointer to the device and index of the GpioIo/GpioInt descriptor in the |
| @@ -322,3 +318,25 @@ suitable to the gpiolib before passing them. · 17 unmodified lines | |||
| 322 | 318 | ||
| 323 | In case of GpioInt resource an additional call to gpio_to_irq() must be | 319 | In case of GpioInt resource an additional call to gpio_to_irq() must be |
| 324 | done before calling request_irq(). | 320 | done before calling request_irq(). |
| 321 | |||
| 322 | Note that the above API is ACPI specific and not recommended for drivers | ||
| 323 | that need to support non-ACPI systems. The recommended way is to use | ||
| 324 | the descriptor based GPIO interfaces. The above example looks like this | ||
| 325 | when converted to the GPIO desc: | ||
| 326 | |||
| 327 | #include <linux/gpio/consumer.h> | ||
| 328 | ... | ||
| 329 | |||
| 330 | struct gpio_desc *irq_desc, *power_desc; | ||
| 331 | |||
| 332 | irq_desc = gpiod_get_index(dev, NULL, 1); | ||
| 333 | if (IS_ERR(irq_desc)) | ||
| 334 | /* handle error */ | ||
| 335 | |||
| 336 | power_desc = gpiod_get_index(dev, NULL, 0); | ||
| 337 | if (IS_ERR(power_desc)) | ||
| 338 | /* handle error */ | ||
| 339 | |||
| 340 | /* Now we can use the GPIO descriptors */ | ||
| 341 | |||
| 342 | See also Documentation/gpio.txt. | ||
| @@ -88,6 +88,7 @@ EBU Armada family · 87 unmodified lines | |||
| 88 | MV78230 | 88 | MV78230 |
| 89 | MV78260 | 89 | MV78260 |
| 90 | MV78460 | 90 | MV78460 |
| 91 | NOTE: not to be confused with the non-SMP 78xx0 SoCs | ||
| 91 | 92 | ||
| 92 | Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf | 93 | Product Brief: http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf |
| 93 | No public datasheet available. | 94 | No public datasheet available. |
| @@ -10,6 +10,10 @@ SunXi family · 9 unmodified lines | |||
| 10 | Linux kernel mach directory: arch/arm/mach-sunxi | 10 | Linux kernel mach directory: arch/arm/mach-sunxi |
| 11 | 11 | ||
| 12 | Flavors: | 12 | Flavors: |
| 13 | * ARM926 based SoCs | ||
| 14 | - Allwinner F20 (sun3i) | ||
| 15 | + Not Supported | ||
| 16 | |||
| 13 | * ARM Cortex-A8 based SoCs | 17 | * ARM Cortex-A8 based SoCs |
| 14 | - Allwinner A10 (sun4i) | 18 | - Allwinner A10 (sun4i) |
| 15 | + Datasheet | 19 | + Datasheet |
| @@ -25,4 +29,24 @@ SunXi family · 9 unmodified lines | |||
| 25 | + Datasheet | 29 | + Datasheet |
| 26 | http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf | 30 | http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf |
| 27 | + User Manual | 31 | + User Manual |
| 28 | http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-08-08%29.pdf | 32 | http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-01-08%29.pdf |
| 33 | |||
| 34 | * Dual ARM Cortex-A7 based SoCs | ||
| 35 | - Allwinner A20 (sun7i) | ||
| 36 | + User Manual | ||
| 37 | http://dl.linux-sunxi.org/A20/A20%20User%20Manual%202013-03-22.pdf | ||
| 38 | |||
| 39 | - Allwinner A23 | ||
| 40 | + Not Supported | ||
| 41 | |||
| 42 | * Quad ARM Cortex-A7 based SoCs | ||
| 43 | - Allwinner A31 (sun6i) | ||
| 44 | + Datasheet | ||
| 45 | http://dl.linux-sunxi.org/A31/A31%20Datasheet%20-%20v1.00%20(2012-12-24).pdf | ||
| 46 | |||
| 47 | - Allwinner A31s (sun6i) | ||
| 48 | + Not Supported | ||
| 49 | |||
| 50 | * Quad ARM Cortex-A15, Quad ARM Cortex-A7 based SoCs | ||
| 51 | - Allwinner A80 | ||
| 52 | + Not Supported | ||
| @@ -115,9 +115,10 @@ Before jumping into the kernel, the following conditions must be met: · 114 unmodified lines | |||
| 115 | External caches (if present) must be configured and disabled. | 115 | External caches (if present) must be configured and disabled. |
| 116 | 116 | ||
| 117 | - Architected timers | 117 | - Architected timers |
| 118 | CNTFRQ must be programmed with the timer frequency. | 118 | CNTFRQ must be programmed with the timer frequency and CNTVOFF must |
| 119 | If entering the kernel at EL1, CNTHCTL_EL2 must have EL1PCTEN (bit 0) | 119 | be programmed with a consistent value on all CPUs. If entering the |
| 120 | set where available. | 120 | kernel at EL1, CNTHCTL_EL2 must have EL1PCTEN (bit 0) set where |
| 121 | available. | ||
| 121 | 122 | ||
| 122 | - Coherency | 123 | - Coherency |
| 123 | All CPUs to be booted by the kernel must be part of the same coherency | 124 | All CPUs to be booted by the kernel must be part of the same coherency |
| @@ -130,30 +131,46 @@ Before jumping into the kernel, the following conditions must be met: · 6 unmodified lines | |||
| 130 | the kernel image will be entered must be initialised by software at a | 131 | the kernel image will be entered must be initialised by software at a |
| 131 | higher exception level to prevent execution in an UNKNOWN state. | 132 | higher exception level to prevent execution in an UNKNOWN state. |
| 132 | 133 | ||
| 134 | The requirements described above for CPU mode, caches, MMUs, architected | ||
| 135 | timers, coherency and system registers apply to all CPUs. All CPUs must | ||
| 136 | enter the kernel in the same exception level. | ||
| 137 | |||
| 133 | The boot loader is expected to enter the kernel on each CPU in the | 138 | The boot loader is expected to enter the kernel on each CPU in the |
| 134 | following manner: | 139 | following manner: |
| 135 | 140 | ||
| 136 | - The primary CPU must jump directly to the first instruction of the | 141 | - The primary CPU must jump directly to the first instruction of the |
| 137 | kernel image. The device tree blob passed by this CPU must contain | 142 | kernel image. The device tree blob passed by this CPU must contain |
| 138 | for each CPU node: | 143 | an 'enable-method' property for each cpu node. The supported |
| 139 | 144 | enable-methods are described below. | |
| 140 | 1. An 'enable-method' property. Currently, the only supported value | ||
| 141 | for this field is the string "spin-table". | ||
| 142 | |||
| 143 | 2. A 'cpu-release-addr' property identifying a 64-bit, | ||
| 144 | zero-initialised memory location. | ||
| 145 | 145 | ||
| 146 | It is expected that the bootloader will generate these device tree | 146 | It is expected that the bootloader will generate these device tree |
| 147 | properties and insert them into the blob prior to kernel entry. | 147 | properties and insert them into the blob prior to kernel entry. |
| 148 | 148 | ||
| 149 | - Any secondary CPUs must spin outside of the kernel in a reserved area | 149 | - CPUs with a "spin-table" enable-method must have a 'cpu-release-addr' |
| 150 | of memory (communicated to the kernel by a /memreserve/ region in the | 150 | property in their cpu node. This property identifies a |
| 151 | naturally-aligned 64-bit zero-initalised memory location. | ||
| 152 | |||
| 153 | These CPUs should spin outside of the kernel in a reserved area of | ||
| 154 | memory (communicated to the kernel by a /memreserve/ region in the | ||
| 151 | device tree) polling their cpu-release-addr location, which must be | 155 | device tree) polling their cpu-release-addr location, which must be |
| 152 | contained in the reserved region. A wfe instruction may be inserted | 156 | contained in the reserved region. A wfe instruction may be inserted |
| 153 | to reduce the overhead of the busy-loop and a sev will be issued by | 157 | to reduce the overhead of the busy-loop and a sev will be issued by |
| 154 | the primary CPU. When a read of the location pointed to by the | 158 | the primary CPU. When a read of the location pointed to by the |
| 155 | cpu-release-addr returns a non-zero value, the CPU must jump directly | 159 | cpu-release-addr returns a non-zero value, the CPU must jump to this |
| 156 | to this value. | 160 | value. The value will be written as a single 64-bit little-endian |
| 161 | value, so CPUs must convert the read value to their native endianness | ||
| 162 | before jumping to it. | ||
| 163 | |||
| 164 | - CPUs with a "psci" enable method should remain outside of | ||
| 165 | the kernel (i.e. outside of the regions of memory described to the | ||
| 166 | kernel in the memory node, or in a reserved area of memory described | ||
| 167 | to the kernel by a /memreserve/ region in the device tree). The | ||
| 168 | kernel will issue CPU_ON calls as described in ARM document number ARM | ||
| 169 | DEN 0022A ("Power State Coordination Interface System Software on ARM | ||
| 170 | processors") to bring CPUs into the kernel. | ||
| 171 | |||
| 172 | The device tree should contain a 'psci' node, as described in | ||
| 173 | Documentation/devicetree/bindings/arm/psci.txt. | ||
| 157 | 174 | ||
| 158 | - Secondary CPU general-purpose register settings | 175 | - Secondary CPU general-purpose register settings |
| 159 | x0 = 0 (reserved for future use) | 176 | x0 = 0 (reserved for future use) |
| @@ -21,7 +21,7 @@ The swapper_pgd_dir address is written to TTBR1 and never written to · 20 unmodified lines | |||
| 21 | TTBR0. | 21 | TTBR0. |
| 22 | 22 | ||
| 23 | 23 | ||
| 24 | AArch64 Linux memory layout: | 24 | AArch64 Linux memory layout with 4KB pages: |
| 25 | 25 | ||
| 26 | Start End Size Use | 26 | Start End Size Use |
| 27 | ----------------------------------------------------------------------- | 27 | ----------------------------------------------------------------------- |
| @@ -39,13 +39,38 @@ ffffffbffbc00000 ffffffbffbdfffff 2MB earlyprintk device · 11 unmodified lines | |||
| 39 | 39 | ||
| 40 | ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space | 40 | ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space |
| 41 | 41 | ||
| 42 | ffffffbbffff0000 ffffffbcffffffff ~2MB [guard] | 42 | ffffffbffbe10000 ffffffbcffffffff ~2MB [guard] |
| 43 | 43 | ||
| 44 | ffffffbffc000000 ffffffbfffffffff 64MB modules | 44 | ffffffbffc000000 ffffffbfffffffff 64MB modules |
| 45 | 45 | ||
| 46 | ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map | 46 | ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map |
| 47 | 47 | ||
| 48 | 48 | ||
| 49 | AArch64 Linux memory layout with 64KB pages: | ||
| 50 | |||
| 51 | Start End Size Use | ||
| 52 | ----------------------------------------------------------------------- | ||
| 53 | 0000000000000000 000003ffffffffff 4TB user | ||
| 54 | |||
| 55 | fffffc0000000000 fffffdfbfffeffff ~2TB vmalloc | ||
| 56 | |||
| 57 | fffffdfbffff0000 fffffdfbffffffff 64KB [guard page] | ||
| 58 | |||
| 59 | fffffdfc00000000 fffffdfdffffffff 8GB vmemmap | ||
| 60 | |||
| 61 | fffffdfe00000000 fffffdfffbbfffff ~8GB [guard, future vmmemap] | ||
| 62 | |||
| 63 | fffffdfffbc00000 fffffdfffbdfffff 2MB earlyprintk device | ||
| 64 | |||
| 65 | fffffdfffbe00000 fffffdfffbe0ffff 64KB PCI I/O space | ||
| 66 | |||
| 67 | fffffdfffbe10000 fffffdfffbffffff ~2MB [guard] | ||
| 68 | |||
| 69 | fffffdfffc000000 fffffdffffffffff 64MB modules | ||
| 70 | |||
| 71 | fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map | ||
| 72 | |||
| 73 | |||
| 49 | Translation table lookup with 4KB pages: | 74 | Translation table lookup with 4KB pages: |
| 50 | 75 | ||
| 51 | +--------+--------+--------+--------+--------+--------+--------+--------+ | 76 | +--------+--------+--------+--------+--------+--------+--------+--------+ |
| @@ -18,17 +18,17 @@ this byte for application use, with the following caveats: · 17 unmodified lines | |||
| 18 | parameters containing user virtual addresses *must* have | 18 | parameters containing user virtual addresses *must* have |
| 19 | their top byte cleared before trapping to the kernel. | 19 | their top byte cleared before trapping to the kernel. |
| 20 | 20 | ||
| 21 | (2) Tags are not guaranteed to be preserved when delivering | 21 | (2) Non-zero tags are not preserved when delivering signals. |
| 22 | signals. This means that signal handlers in applications | 22 | This means that signal handlers in applications making use |
| 23 | making use of tags cannot rely on the tag information for | 23 | of tags cannot rely on the tag information for user virtual |
| 24 | user virtual addresses being maintained for fields inside | 24 | addresses being maintained for fields inside siginfo_t. |
| 25 | siginfo_t. One exception to this rule is for signals raised | 25 | One exception to this rule is for signals raised in response |
| 26 | in response to debug exceptions, where the tag information | 26 | to watchpoint debug exceptions, where the tag information |
| 27 | will be preserved. | 27 | will be preserved. |
| 28 | 28 | ||
| 29 | (3) Special care should be taken when using tagged pointers, | 29 | (3) Special care should be taken when using tagged pointers, |
| 30 | since it is likely that C compilers will not hazard two | 30 | since it is likely that C compilers will not hazard two |
| 31 | addresses differing only in the upper bits. | 31 | virtual addresses differing only in the upper byte. |
| 32 | 32 | ||
| 33 | The architecture prevents the use of a tagged PC, so the upper byte will | 33 | The architecture prevents the use of a tagged PC, so the upper byte will |
| 34 | be set to a sign-extension of bit 55 on exception return. | 34 | be set to a sign-extension of bit 55 on exception return. |
| @@ -0,0 +1,574 @@ | |||
| 1 | ======================================== | ||
| 2 | GENERIC ASSOCIATIVE ARRAY IMPLEMENTATION | ||
| 3 | ======================================== | ||
| 4 | |||
| 5 | Contents: | ||
| 6 | |||
| 7 | - Overview. | ||
| 8 | |||
| 9 | - The public API. | ||
| 10 | - Edit script. | ||
| 11 | - Operations table. | ||
| 12 | - Manipulation functions. | ||
| 13 | - Access functions. | ||
| 14 | - Index key form. | ||
| 15 | |||
| 16 | - Internal workings. | ||
| 17 | - Basic internal tree layout. | ||
| 18 | - Shortcuts. | ||
| 19 | - Splitting and collapsing nodes. | ||
| 20 | - Non-recursive iteration. | ||
| 21 | - Simultaneous alteration and iteration. | ||
| 22 | |||
| 23 | |||
| 24 | ======== | ||
| 25 | OVERVIEW | ||
| 26 | ======== | ||
| 27 | |||
| 28 | This associative array implementation is an object container with the following | ||
| 29 | properties: | ||
| 30 | |||
| 31 | (1) Objects are opaque pointers. The implementation does not care where they | ||
| 32 | point (if anywhere) or what they point to (if anything). | ||
| 33 | |||
| 34 | [!] NOTE: Pointers to objects _must_ be zero in the least significant bit. | ||
| 35 | |||
| 36 | (2) Objects do not need to contain linkage blocks for use by the array. This | ||
| 37 | permits an object to be located in multiple arrays simultaneously. | ||
| 38 | Rather, the array is made up of metadata blocks that point to objects. | ||
| 39 | |||
| 40 | (3) Objects require index keys to locate them within the array. | ||
| 41 | |||
| 42 | (4) Index keys must be unique. Inserting an object with the same key as one | ||
| 43 | already in the array will replace the old object. | ||
| 44 | |||
| 45 | (5) Index keys can be of any length and can be of different lengths. | ||
| 46 | |||
| 47 | (6) Index keys should encode the length early on, before any variation due to | ||
| 48 | length is seen. | ||
| 49 | |||
| 50 | (7) Index keys can include a hash to scatter objects throughout the array. | ||
| 51 | |||
| 52 | (8) The array can iterated over. The objects will not necessarily come out in | ||
| 53 | key order. | ||
| 54 | |||
| 55 | (9) The array can be iterated over whilst it is being modified, provided the | ||
| 56 | RCU readlock is being held by the iterator. Note, however, under these | ||
| 57 | circumstances, some objects may be seen more than once. If this is a | ||
| 58 | problem, the iterator should lock against modification. Objects will not | ||
| 59 | be missed, however, unless deleted. | ||
| 60 | |||
| 61 | (10) Objects in the array can be looked up by means of their index key. | ||
| 62 | |||
| 63 | (11) Objects can be looked up whilst the array is being modified, provided the | ||
| 64 | RCU readlock is being held by the thread doing the look up. | ||
| 65 | |||
| 66 | The implementation uses a tree of 16-pointer nodes internally that are indexed | ||
| 67 | on each level by nibbles from the index key in the same manner as in a radix | ||
| 68 | tree. To improve memory efficiency, shortcuts can be emplaced to skip over | ||
| 69 | what would otherwise be a series of single-occupancy nodes. Further, nodes | ||
| 70 | pack leaf object pointers into spare space in the node rather than making an | ||
| 71 | extra branch until as such time an object needs to be added to a full node. | ||
| 72 | |||
| 73 | |||
| 74 | ============== | ||
| 75 | THE PUBLIC API | ||
| 76 | ============== | ||
| 77 | |||
| 78 | The public API can be found in <linux/assoc_array.h>. The associative array is | ||
| 79 | rooted on the following structure: | ||
| 80 | |||
| 81 | struct assoc_array { | ||
| 82 | ... | ||
| 83 | }; | ||
| 84 | |||
| 85 | The code is selected by enabling CONFIG_ASSOCIATIVE_ARRAY. | ||
| 86 | |||
| 87 | |||
| 88 | EDIT SCRIPT | ||
| 89 | ----------- | ||
| 90 | |||
| 91 | The insertion and deletion functions produce an 'edit script' that can later be | ||
| 92 | applied to effect the changes without risking ENOMEM. This retains the | ||
| 93 | preallocated metadata blocks that will be installed in the internal tree and | ||
| 94 | keeps track of the metadata blocks that will be removed from the tree when the | ||
| 95 | script is applied. | ||
| 96 | |||
| 97 | This is also used to keep track of dead blocks and dead objects after the | ||
| 98 | script has been applied so that they can be freed later. The freeing is done | ||
| 99 | after an RCU grace period has passed - thus allowing access functions to | ||
| 100 | proceed under the RCU read lock. | ||
| 101 | |||
| 102 | The script appears as outside of the API as a pointer of the type: | ||
| 103 | |||
| 104 | struct assoc_array_edit; | ||
| 105 | |||
| 106 | There are two functions for dealing with the script: | ||
| 107 | |||
| 108 | (1) Apply an edit script. | ||
| 109 | |||
| 110 | void assoc_array_apply_edit(struct assoc_array_edit *edit); | ||
| 111 | |||
| 112 | This will perform the edit functions, interpolating various write barriers | ||
| 113 | to permit accesses under the RCU read lock to continue. The edit script | ||
| 114 | will then be passed to call_rcu() to free it and any dead stuff it points | ||
| 115 | to. | ||
| 116 | |||
| 117 | (2) Cancel an edit script. | ||
| 118 | |||
| 119 | void assoc_array_cancel_edit(struct assoc_array_edit *edit); | ||
| 120 | |||
| 121 | This frees the edit script and all preallocated memory immediately. If | ||
| 122 | this was for insertion, the new object is _not_ released by this function, | ||
| 123 | but must rather be released by the caller. | ||
| 124 | |||
| 125 | These functions are guaranteed not to fail. | ||
| 126 | |||
| 127 | |||
| 128 | OPERATIONS TABLE | ||
| 129 | ---------------- | ||
| 130 | |||
| 131 | Various functions take a table of operations: | ||
| 132 | |||
| 133 | struct assoc_array_ops { | ||
| 134 | ... | ||
| 135 | }; | ||
| 136 | |||
| 137 | This points to a number of methods, all of which need to be provided: | ||
| 138 | |||
| 139 | (1) Get a chunk of index key from caller data: | ||
| 140 | |||
| 141 | unsigned long (*get_key_chunk)(const void *index_key, int level); | ||
| 142 | |||
| 143 | This should return a chunk of caller-supplied index key starting at the | ||
| 144 | *bit* position given by the level argument. The level argument will be a | ||
| 145 | multiple of ASSOC_ARRAY_KEY_CHUNK_SIZE and the function should return | ||
| 146 | ASSOC_ARRAY_KEY_CHUNK_SIZE bits. No error is possible. | ||
| 147 | |||
| 148 | |||
| 149 | (2) Get a chunk of an object's index key. | ||
| 150 | |||
| 151 | unsigned long (*get_object_key_chunk)(const void *object, int level); | ||
| 152 | |||
| 153 | As the previous function, but gets its data from an object in the array | ||
| 154 | rather than from a caller-supplied index key. | ||
| 155 | |||
| 156 | |||
| 157 | (3) See if this is the object we're looking for. | ||
| 158 | |||
| 159 | bool (*compare_object)(const void *object, const void *index_key); | ||
| 160 | |||
| 161 | Compare the object against an index key and return true if it matches and | ||
| 162 | false if it doesn't. | ||
| 163 | |||
| 164 | |||
| 165 | (4) Diff the index keys of two objects. | ||
| 166 | |||
| 167 | int (*diff_objects)(const void *a, const void *b); | ||
| 168 | |||
| 169 | Return the bit position at which the index keys of two objects differ or | ||
| 170 | -1 if they are the same. | ||
| 171 | |||
| 172 | |||
| 173 | (5) Free an object. | ||
| 174 | |||
| 175 | void (*free_object)(void *object); | ||
| 176 | |||
| 177 | Free the specified object. Note that this may be called an RCU grace | ||
| 178 | period after assoc_array_apply_edit() was called, so synchronize_rcu() may | ||
| 179 | be necessary on module unloading. | ||
| 180 | |||
| 181 | |||
| 182 | MANIPULATION FUNCTIONS | ||
| 183 | ---------------------- | ||
| 184 | |||
| 185 | There are a number of functions for manipulating an associative array: | ||
| 186 | |||
| 187 | (1) Initialise an associative array. | ||
| 188 | |||
| 189 | void assoc_array_init(struct assoc_array *array); | ||
| 190 | |||
| 191 | This initialises the base structure for an associative array. It can't | ||
| 192 | fail. | ||
| 193 | |||
| 194 | |||
| 195 | (2) Insert/replace an object in an associative array. | ||
| 196 | |||
| 197 | struct assoc_array_edit * | ||
| 198 | assoc_array_insert(struct assoc_array *array, | ||
| 199 | const struct assoc_array_ops *ops, | ||
| 200 | const void *index_key, | ||
| 201 | void *object); | ||
| 202 | |||
| 203 | This inserts the given object into the array. Note that the least | ||
| 204 | significant bit of the pointer must be zero as it's used to type-mark | ||
| 205 | pointers internally. | ||
| 206 | |||
| 207 | If an object already exists for that key then it will be replaced with the | ||
| 208 | new object and the old one will be freed automatically. | ||
| 209 | |||
| 210 | The index_key argument should hold index key information and is | ||
| 211 | passed to the methods in the ops table when they are called. | ||
| 212 | |||
| 213 | This function makes no alteration to the array itself, but rather returns | ||
| 214 | an edit script that must be applied. -ENOMEM is returned in the case of | ||
| 215 | an out-of-memory error. | ||
| 216 | |||
| 217 | The caller should lock exclusively against other modifiers of the array. | ||
| 218 | |||
| 219 | |||
| 220 | (3) Delete an object from an associative array. | ||
| 221 | |||
| 222 | struct assoc_array_edit * | ||
| 223 | assoc_array_delete(struct assoc_array *array, | ||
| 224 | const struct assoc_array_ops *ops, | ||
| 225 | const void *index_key); | ||
| 226 | |||
| 227 | This deletes an object that matches the specified data from the array. | ||
| 228 | |||
| 229 | The index_key argument should hold index key information and is | ||
| 230 | passed to the methods in the ops table when they are called. | ||
| 231 | |||
| 232 | This function makes no alteration to the array itself, but rather returns | ||
| 233 | an edit script that must be applied. -ENOMEM is returned in the case of | ||
| 234 | an out-of-memory error. NULL will be returned if the specified object is | ||
| 235 | not found within the array. | ||
| 236 | |||
| 237 | The caller should lock exclusively against other modifiers of the array. | ||
| 238 | |||
| 239 | |||
| 240 | (4) Delete all objects from an associative array. | ||
| 241 | |||
| 242 | struct assoc_array_edit * | ||
| 243 | assoc_array_clear(struct assoc_array *array, | ||
| 244 | const struct assoc_array_ops *ops); | ||
| 245 | |||
| 246 | This deletes all the objects from an associative array and leaves it | ||
| 247 | completely empty. | ||
| 248 | |||
| 249 | This function makes no alteration to the array itself, but rather returns | ||
| 250 | an edit script that must be applied. -ENOMEM is returned in the case of | ||
| 251 | an out-of-memory error. | ||
| 252 | |||
| 253 | The caller should lock exclusively against other modifiers of the array. | ||
| 254 | |||
| 255 | |||
| 256 | (5) Destroy an associative array, deleting all objects. | ||
| 257 | |||
| 258 | void assoc_array_destroy(struct assoc_array *array, | ||
| 259 | const struct assoc_array_ops *ops); | ||
| 260 | |||
| 261 | This destroys the contents of the associative array and leaves it | ||
| 262 | completely empty. It is not permitted for another thread to be traversing | ||
| 263 | the array under the RCU read lock at the same time as this function is | ||
| 264 | destroying it as no RCU deferral is performed on memory release - | ||
| 265 | something that would require memory to be allocated. | ||
| 266 | |||
| 267 | The caller should lock exclusively against other modifiers and accessors | ||
| 268 | of the array. | ||
| 269 | |||
| 270 | |||
| 271 | (6) Garbage collect an associative array. | ||
| 272 | |||
| 273 | int assoc_array_gc(struct assoc_array *array, | ||
| 274 | const struct assoc_array_ops *ops, | ||
| 275 | bool (*iterator)(void *object, void *iterator_data), | ||
| 276 | void *iterator_data); | ||
| 277 | |||
| 278 | This iterates over the objects in an associative array and passes each one | ||
| 279 | to iterator(). If iterator() returns true, the object is kept. If it | ||
| 280 | returns false, the object will be freed. If the iterator() function | ||
| 281 | returns true, it must perform any appropriate refcount incrementing on the | ||
| 282 | object before returning. | ||
| 283 | |||
| 284 | The internal tree will be packed down if possible as part of the iteration | ||
| 285 | to reduce the number of nodes in it. | ||
| 286 | |||
| 287 | The iterator_data is passed directly to iterator() and is otherwise | ||
| 288 | ignored by the function. | ||
| 289 | |||
| 290 | The function will return 0 if successful and -ENOMEM if there wasn't | ||
| 291 | enough memory. | ||
| 292 | |||
| 293 | It is possible for other threads to iterate over or search the array under | ||
| 294 | the RCU read lock whilst this function is in progress. The caller should | ||
| 295 | lock exclusively against other modifiers of the array. | ||
| 296 | |||
| 297 | |||
| 298 | ACCESS FUNCTIONS | ||
| 299 | ---------------- | ||
| 300 | |||
| 301 | There are two functions for accessing an associative array: | ||
| 302 | |||
| 303 | (1) Iterate over all the objects in an associative array. | ||
| 304 | |||
| 305 | int assoc_array_iterate(const struct assoc_array *array, | ||
| 306 | int (*iterator)(const void *object, | ||
| 307 | void *iterator_data), | ||
| 308 | void *iterator_data); | ||
| 309 | |||
| 310 | This passes each object in the array to the iterator callback function. | ||
| 311 | iterator_data is private data for that function. | ||
| 312 | |||
| 313 | This may be used on an array at the same time as the array is being | ||
| 314 | modified, provided the RCU read lock is held. Under such circumstances, | ||
| 315 | it is possible for the iteration function to see some objects twice. If | ||
| 316 | this is a problem, then modification should be locked against. The | ||
| 317 | iteration algorithm should not, however, miss any objects. | ||
| 318 | |||
| 319 | The function will return 0 if no objects were in the array or else it will | ||
| 320 | return the result of the last iterator function called. Iteration stops | ||
| 321 | immediately if any call to the iteration function results in a non-zero | ||
| 322 | return. | ||
| 323 | |||
| 324 | |||
| 325 | (2) Find an object in an associative array. | ||
| 326 | |||
| 327 | void *assoc_array_find(const struct assoc_array *array, | ||
| 328 | const struct assoc_array_ops *ops, | ||
| 329 | const void *index_key); | ||
| 330 | |||
| 331 | This walks through the array's internal tree directly to the object | ||
| 332 | specified by the index key.. | ||
| 333 | |||
| 334 | This may be used on an array at the same time as the array is being | ||
| 335 | modified, provided the RCU read lock is held. | ||
| 336 | |||
| 337 | The function will return the object if found (and set *_type to the object | ||
| 338 | type) or will return NULL if the object was not found. | ||
| 339 | |||
| 340 | |||
| 341 | INDEX KEY FORM | ||
| 342 | -------------- | ||
| 343 | |||
| 344 | The index key can be of any form, but since the algorithms aren't told how long | ||
| 345 | the key is, it is strongly recommended that the index key includes its length | ||
| 346 | very early on before any variation due to the length would have an effect on | ||
| 347 | comparisons. | ||
| 348 | |||
| 349 | This will cause leaves with different length keys to scatter away from each | ||
| 350 | other - and those with the same length keys to cluster together. | ||
| 351 | |||
| 352 | It is also recommended that the index key begin with a hash of the rest of the | ||
| 353 | key to maximise scattering throughout keyspace. | ||
| 354 | |||
| 355 | The better the scattering, the wider and lower the internal tree will be. | ||
| 356 | |||
| 357 | Poor scattering isn't too much of a problem as there are shortcuts and nodes | ||
| 358 | can contain mixtures of leaves and metadata pointers. | ||
| 359 | |||
| 360 | The index key is read in chunks of machine word. Each chunk is subdivided into | ||
| 361 | one nibble (4 bits) per level, so on a 32-bit CPU this is good for 8 levels and | ||
| 362 | on a 64-bit CPU, 16 levels. Unless the scattering is really poor, it is | ||
| 363 | unlikely that more than one word of any particular index key will have to be | ||
| 364 | used. | ||
| 365 | |||
| 366 | |||
| 367 | ================= | ||
| 368 | INTERNAL WORKINGS | ||
| 369 | ================= | ||
| 370 | |||
| 371 | The associative array data structure has an internal tree. This tree is | ||
| 372 | constructed of two types of metadata blocks: nodes and shortcuts. | ||
| 373 | |||
| 374 | A node is an array of slots. Each slot can contain one of four things: | ||
| 375 | |||
| 376 | (*) A NULL pointer, indicating that the slot is empty. | ||
| 377 | |||
| 378 | (*) A pointer to an object (a leaf). | ||
| 379 | |||
| 380 | (*) A pointer to a node at the next level. | ||
| 381 | |||
| 382 | (*) A pointer to a shortcut. | ||
| 383 | |||
| 384 | |||
| 385 | BASIC INTERNAL TREE LAYOUT | ||
| 386 | -------------------------- | ||
| 387 | |||
| 388 | Ignoring shortcuts for the moment, the nodes form a multilevel tree. The index | ||
| 389 | key space is strictly subdivided by the nodes in the tree and nodes occur on | ||
| 390 | fixed levels. For example: | ||
| 391 | |||
| 392 | Level: 0 1 2 3 | ||
| 393 | =============== =============== =============== =============== | ||
| 394 | NODE D | ||
| 395 | NODE B NODE C +------>+---+ | ||
| 396 | +------>+---+ +------>+---+ | | 0 | | ||
| 397 | NODE A | | 0 | | | 0 | | +---+ | ||
| 398 | +---+ | +---+ | +---+ | : : | ||
| 399 | | 0 | | : : | : : | +---+ | ||
| 400 | +---+ | +---+ | +---+ | | f | | ||
| 401 | | 1 |---+ | 3 |---+ | 7 |---+ +---+ | ||
| 402 | +---+ +---+ +---+ | ||
| 403 | : : : : | 8 |---+ | ||
| 404 | +---+ +---+ +---+ | NODE E | ||
| 405 | | e |---+ | f | : : +------>+---+ | ||
| 406 | +---+ | +---+ +---+ | 0 | | ||
| 407 | | f | | | f | +---+ | ||
| 408 | +---+ | +---+ : : | ||
| 409 | | NODE F +---+ | ||
| 410 | +------>+---+ | f | | ||
| 411 | | 0 | NODE G +---+ | ||
| 412 | +---+ +------>+---+ | ||
| 413 | : : | | 0 | | ||
| 414 | +---+ | +---+ | ||
| 415 | | 6 |---+ : : | ||
| 416 | +---+ +---+ | ||
| 417 | : : | f | | ||
| 418 | +---+ +---+ | ||
| 419 | | f | | ||
| 420 | +---+ | ||
| 421 | |||
| 422 | In the above example, there are 7 nodes (A-G), each with 16 slots (0-f). | ||
| 423 | Assuming no other meta data nodes in the tree, the key space is divided thusly: | ||
| 424 | |||
| 425 | KEY PREFIX NODE | ||
| 426 | ========== ==== | ||
| 427 | 137* D | ||
| 428 | 138* E | ||
| 429 | 13[0-69-f]* C | ||
| 430 | 1[0-24-f]* B | ||
| 431 | e6* G | ||
| 432 | e[0-57-f]* F | ||
| 433 | [02-df]* A | ||
| 434 | |||
| 435 | So, for instance, keys with the following example index keys will be found in | ||
| 436 | the appropriate nodes: | ||
| 437 | |||
| 438 | INDEX KEY PREFIX NODE | ||
| 439 | =============== ======= ==== | ||
| 440 | 13694892892489 13 C | ||
| 441 | 13795289025897 137 D | ||
| 442 | 13889dde88793 138 E | ||
| 443 | 138bbb89003093 138 E | ||
| 444 | 1394879524789 12 C | ||
| 445 | 1458952489 1 B | ||
| 446 | 9431809de993ba - A | ||
| 447 | b4542910809cd - A | ||
| 448 | e5284310def98 e F | ||
| 449 | e68428974237 e6 G | ||
| 450 | e7fffcbd443 e F | ||
| 451 | f3842239082 - A | ||
| 452 | |||
| 453 | To save memory, if a node can hold all the leaves in its portion of keyspace, | ||
| 454 | then the node will have all those leaves in it and will not have any metadata | ||
| 455 | pointers - even if some of those leaves would like to be in the same slot. | ||
| 456 | |||
| 457 | A node can contain a heterogeneous mix of leaves and metadata pointers. | ||
| 458 | Metadata pointers must be in the slots that match their subdivisions of key | ||
| 459 | space. The leaves can be in any slot not occupied by a metadata pointer. It | ||
| 460 | is guaranteed that none of the leaves in a node will match a slot occupied by a | ||
| 461 | metadata pointer. If the metadata pointer is there, any leaf whose key matches | ||
| 462 | the metadata key prefix must be in the subtree that the metadata pointer points | ||
| 463 | to. | ||
| 464 | |||
| 465 | In the above example list of index keys, node A will contain: | ||
| 466 | |||
| 467 | SLOT CONTENT INDEX KEY (PREFIX) | ||
| 468 | ==== =============== ================== | ||
| 469 | 1 PTR TO NODE B 1* | ||
| 470 | any LEAF 9431809de993ba | ||
| 471 | any LEAF b4542910809cd | ||
| 472 | e PTR TO NODE F e* | ||
| 473 | any LEAF f3842239082 | ||
| 474 | |||
| 475 | and node B: | ||
| 476 | |||
| 477 | 3 PTR TO NODE C 13* | ||
| 478 | any LEAF 1458952489 | ||
| 479 | |||
| 480 | |||
| 481 | SHORTCUTS | ||
| 482 | --------- | ||
| 483 | |||
| 484 | Shortcuts are metadata records that jump over a piece of keyspace. A shortcut | ||
| 485 | is a replacement for a series of single-occupancy nodes ascending through the | ||
| 486 | levels. Shortcuts exist to save memory and to speed up traversal. | ||
| 487 | |||
| 488 | It is possible for the root of the tree to be a shortcut - say, for example, | ||
| 489 | the tree contains at least 17 nodes all with key prefix '1111'. The insertion | ||
| 490 | algorithm will insert a shortcut to skip over the '1111' keyspace in a single | ||
| 491 | bound and get to the fourth level where these actually become different. | ||
| 492 | |||
| 493 | |||
| 494 | SPLITTING AND COLLAPSING NODES | ||
| 495 | ------------------------------ | ||
| 496 | |||
| 497 | Each node has a maximum capacity of 16 leaves and metadata pointers. If the | ||
| 498 | insertion algorithm finds that it is trying to insert a 17th object into a | ||
| 499 | node, that node will be split such that at least two leaves that have a common | ||
| 500 | key segment at that level end up in a separate node rooted on that slot for | ||
| 501 | that common key segment. | ||
| 502 | |||
| 503 | If the leaves in a full node and the leaf that is being inserted are | ||
| 504 | sufficiently similar, then a shortcut will be inserted into the tree. | ||
| 505 | |||
| 506 | When the number of objects in the subtree rooted at a node falls to 16 or | ||
| 507 | fewer, then the subtree will be collapsed down to a single node - and this will | ||
| 508 | ripple towards the root if possible. | ||
| 509 | |||
| 510 | |||
| 511 | NON-RECURSIVE ITERATION | ||
| 512 | ----------------------- | ||
| 513 | |||
| 514 | Each node and shortcut contains a back pointer to its parent and the number of | ||
| 515 | slot in that parent that points to it. None-recursive iteration uses these to | ||
| 516 | proceed rootwards through the tree, going to the parent node, slot N + 1 to | ||
| 517 | make sure progress is made without the need for a stack. | ||
| 518 | |||
| 519 | The backpointers, however, make simultaneous alteration and iteration tricky. | ||
| 520 | |||
| 521 | |||
| 522 | SIMULTANEOUS ALTERATION AND ITERATION | ||
| 523 | ------------------------------------- | ||
| 524 | |||
| 525 | There are a number of cases to consider: | ||
| 526 | |||
| 527 | (1) Simple insert/replace. This involves simply replacing a NULL or old | ||
| 528 | matching leaf pointer with the pointer to the new leaf after a barrier. | ||
| 529 | The metadata blocks don't change otherwise. An old leaf won't be freed | ||
| 530 | until after the RCU grace period. | ||
| 531 | |||
| 532 | (2) Simple delete. This involves just clearing an old matching leaf. The | ||
| 533 | metadata blocks don't change otherwise. The old leaf won't be freed until | ||
| 534 | after the RCU grace period. | ||
| 535 | |||
| 536 | (3) Insertion replacing part of a subtree that we haven't yet entered. This | ||
| 537 | may involve replacement of part of that subtree - but that won't affect | ||
| 538 | the iteration as we won't have reached the pointer to it yet and the | ||
| 539 | ancestry blocks are not replaced (the layout of those does not change). | ||
| 540 | |||
| 541 | (4) Insertion replacing nodes that we're actively processing. This isn't a | ||
| 542 | problem as we've passed the anchoring pointer and won't switch onto the | ||
| 543 | new layout until we follow the back pointers - at which point we've | ||
| 544 | already examined the leaves in the replaced node (we iterate over all the | ||
| 545 | leaves in a node before following any of its metadata pointers). | ||
| 546 | |||
| 547 | We might, however, re-see some leaves that have been split out into a new | ||
| 548 | branch that's in a slot further along than we were at. | ||
| 549 | |||
| 550 | (5) Insertion replacing nodes that we're processing a dependent branch of. | ||
| 551 | This won't affect us until we follow the back pointers. Similar to (4). | ||
| 552 | |||
| 553 | (6) Deletion collapsing a branch under us. This doesn't affect us because the | ||
| 554 | back pointers will get us back to the parent of the new node before we | ||
| 555 | could see the new node. The entire collapsed subtree is thrown away | ||
| 556 | unchanged - and will still be rooted on the same slot, so we shouldn't | ||
| 557 | process it a second time as we'll go back to slot + 1. | ||
| 558 | |||
| 559 | Note: | ||
| 560 | |||
| 561 | (*) Under some circumstances, we need to simultaneously change the parent | ||
| 562 | pointer and the parent slot pointer on a node (say, for example, we | ||
| 563 | inserted another node before it and moved it up a level). We cannot do | ||
| 564 | this without locking against a read - so we have to replace that node too. | ||
| 565 | |||
| 566 | However, when we're changing a shortcut into a node this isn't a problem | ||
| 567 | as shortcuts only have one slot and so the parent slot number isn't used | ||
| 568 | when traversing backwards over one. This means that it's okay to change | ||
| 569 | the slot number first - provided suitable barriers are used to make sure | ||
| 570 | the parent slot number is read after the back pointer. | ||
| 571 | |||
| 572 | Obsolete blocks and leaves are freed up after an RCU grace period has passed, | ||
| 573 | so as long as anyone doing walking or iteration holds the RCU read lock, the | ||
| 574 | old superstructure should not go away on them. | ||
| @@ -4,7 +4,8 @@ Kernel driver lp855x · 3 unmodified lines | |||
| 4 | Backlight driver for LP855x ICs | 4 | Backlight driver for LP855x ICs |
| 5 | 5 | ||
| 6 | Supported chips: | 6 | Supported chips: |
| 7 | Texas Instruments LP8550, LP8551, LP8552, LP8553, LP8556 and LP8557 | 7 | Texas Instruments LP8550, LP8551, LP8552, LP8553, LP8555, LP8556 and |
| 8 | LP8557 | ||
| 8 | 9 | ||
| 9 | Author: Milo(Woogyom) Kim <milo.kim@ti.com> | 10 | Author: Milo(Woogyom) Kim <milo.kim@ti.com> |
| 10 | 11 | ||
| @@ -24,7 +25,7 @@ Value : pwm based or register based · 13 unmodified lines | |||
| 24 | 25 | ||
| 25 | 2) chip_id | 26 | 2) chip_id |
| 26 | The lp855x chip id. | 27 | The lp855x chip id. |
| 27 | Value : lp8550/lp8551/lp8552/lp8553/lp8556/lp8557 | 28 | Value : lp8550/lp8551/lp8552/lp8553/lp8555/lp8556/lp8557 |
| 28 | 29 | ||
| 29 | Platform data for lp855x | 30 | Platform data for lp855x |
| 30 | ------------------------ | 31 | ------------------------ |
| @@ -6,6 +6,8 @@ capability.txt · 5 unmodified lines | |||
| 6 | - Generic Block Device Capability (/sys/block/<device>/capability) | 6 | - Generic Block Device Capability (/sys/block/<device>/capability) |
| 7 | cfq-iosched.txt | 7 | cfq-iosched.txt |
| 8 | - CFQ IO scheduler tunables | 8 | - CFQ IO scheduler tunables |
| 9 | cmdline-partition.txt | ||
| 10 | - how to specify block device partitions on kernel command line | ||
| 9 | data-integrity.txt | 11 | data-integrity.txt |
| 10 | - Block data integrity | 12 | - Block data integrity |
| 11 | deadline-iosched.txt | 13 | deadline-iosched.txt |
| @@ -1,9 +1,9 @@ | |||
| 1 | Embedded device command line partition | 1 | Embedded device command line partition parsing |
| 2 | ===================================================================== | 2 | ===================================================================== |
| 3 | 3 | ||
| 4 | Read block device partition table from command line. | 4 | Support for reading the block device partition table from the command line. |
| 5 | The partition used for fixed block device (eMMC) embedded device. | 5 | It is typically used for fixed block (eMMC) embedded devices. |
| 6 | It is no MBR, save storage space. Bootloader can be easily accessed | 6 | It has no MBR, so saves storage space. Bootloader can be easily accessed |
| 7 | by absolute address of data on the block device. | 7 | by absolute address of data on the block device. |
| 8 | Users can easily change the partition. | 8 | Users can easily change the partition. |
| 9 | 9 | ||
| @@ -39,15 +39,15 @@ Module configuration options · 38 unmodified lines | |||
| 39 | ============================ | 39 | ============================ |
| 40 | 40 | ||
| 41 | If you use the floppy driver as a module, use the following syntax: | 41 | If you use the floppy driver as a module, use the following syntax: |
| 42 | modprobe floppy <options> | 42 | modprobe floppy floppy="<options>" |
| 43 | 43 | ||
| 44 | Example: | 44 | Example: |
| 45 | modprobe floppy omnibook messages | 45 | modprobe floppy floppy="omnibook messages" |
| 46 | 46 | ||
| 47 | If you need certain options enabled every time you load the floppy driver, | 47 | If you need certain options enabled every time you load the floppy driver, |
| 48 | you can put: | 48 | you can put: |
| 49 | 49 | ||
| 50 | options floppy omnibook messages | 50 | options floppy floppy="omnibook messages" |
| 51 | 51 | ||
| 52 | in a configuration file in /etc/modprobe.d/. | 52 | in a configuration file in /etc/modprobe.d/. |
| 53 | 53 | ||
| @@ -573,15 +573,19 @@ an memcg since the pages are allowed to be allocated from any physical · 572 unmodified lines | |||
| 573 | node. One of the use cases is evaluating application performance by | 573 | node. One of the use cases is evaluating application performance by |
| 574 | combining this information with the application's CPU allocation. | 574 | combining this information with the application's CPU allocation. |
| 575 | 575 | ||
| 576 | We export "total", "file", "anon" and "unevictable" pages per-node for | 576 | Each memcg's numa_stat file includes "total", "file", "anon" and "unevictable" |
| 577 | each memcg. The ouput format of memory.numa_stat is: | 577 | per-node page counts including "hierarchical_<counter>" which sums up all |
| 578 | hierarchical children's values in addition to the memcg's own value. | ||
| 579 | |||
| 580 | The ouput format of memory.numa_stat is: | ||
| 578 | 581 | ||
| 579 | total=<total pages> N0=<node 0 pages> N1=<node 1 pages> ... | 582 | total=<total pages> N0=<node 0 pages> N1=<node 1 pages> ... |
| 580 | file=<total file pages> N0=<node 0 pages> N1=<node 1 pages> ... | 583 | file=<total file pages> N0=<node 0 pages> N1=<node 1 pages> ... |
| 581 | anon=<total anon pages> N0=<node 0 pages> N1=<node 1 pages> ... | 584 | anon=<total anon pages> N0=<node 0 pages> N1=<node 1 pages> ... |
| 582 | unevictable=<total anon pages> N0=<node 0 pages> N1=<node 1 pages> ... | 585 | unevictable=<total anon pages> N0=<node 0 pages> N1=<node 1 pages> ... |
| 586 | hierarchical_<counter>=<counter pages> N0=<node 0 pages> N1=<node 1 pages> ... | ||
| 583 | 587 | ||
| 584 | And we have total = file + anon + unevictable. | 588 | The "total" count is sum of file + anon + unevictable. |
| 585 | 589 | ||
| 586 | 6. Hierarchy support | 590 | 6. Hierarchy support |
| 587 | 591 | ||
| @@ -71,7 +71,7 @@ static int netlink_send(int s, struct cn_msg *msg) · 70 unmodified lines | |||
| 71 | nlh->nlmsg_seq = seq++; | 71 | nlh->nlmsg_seq = seq++; |
| 72 | nlh->nlmsg_pid = getpid(); | 72 | nlh->nlmsg_pid = getpid(); |
| 73 | nlh->nlmsg_type = NLMSG_DONE; | 73 | nlh->nlmsg_type = NLMSG_DONE; |
| 74 | nlh->nlmsg_len = NLMSG_LENGTH(size - sizeof(*nlh)); | 74 | nlh->nlmsg_len = size; |
| 75 | nlh->nlmsg_flags = 0; | 75 | nlh->nlmsg_flags = 0; |
| 76 | 76 | ||
| 77 | m = NLMSG_DATA(nlh); | 77 | m = NLMSG_DATA(nlh); |
| @@ -23,8 +23,8 @@ Contents: · 22 unmodified lines | |||
| 23 | 1.1 Initialization | 23 | 1.1 Initialization |
| 24 | 1.2 Per-CPU Initialization | 24 | 1.2 Per-CPU Initialization |
| 25 | 1.3 verify | 25 | 1.3 verify |
| 26 | 1.4 target or setpolicy? | 26 | 1.4 target/target_index or setpolicy? |
| 27 | 1.5 target | 27 | 1.5 target/target_index |
| 28 | 1.6 setpolicy | 28 | 1.6 setpolicy |
| 29 | 2. Frequency Table Helpers | 29 | 2. Frequency Table Helpers |
| 30 | 30 | ||
| @@ -56,7 +56,8 @@ cpufreq_driver.init - A pointer to the per-CPU initialization · 25 unmodified lines | |||
| 56 | cpufreq_driver.verify - A pointer to a "verification" function. | 56 | cpufreq_driver.verify - A pointer to a "verification" function. |
| 57 | 57 | ||
| 58 | cpufreq_driver.setpolicy _or_ | 58 | cpufreq_driver.setpolicy _or_ |
| 59 | cpufreq_driver.target - See below on the differences. | 59 | cpufreq_driver.target/ |
| 60 | target_index - See below on the differences. | ||
| 60 | 61 | ||
| 61 | And optionally | 62 | And optionally |
| 62 | 63 | ||
| @@ -66,7 +67,7 @@ cpufreq_driver.resume - A pointer to a per-CPU resume function · 3 unmodified lines | |||
| 66 | which is called with interrupts disabled | 67 | which is called with interrupts disabled |
| 67 | and _before_ the pre-suspend frequency | 68 | and _before_ the pre-suspend frequency |
| 68 | and/or policy is restored by a call to | 69 | and/or policy is restored by a call to |
| 69 | ->target or ->setpolicy. | 70 | ->target/target_index or ->setpolicy. |
| 70 | 71 | ||
| 71 | cpufreq_driver.attr - A pointer to a NULL-terminated list of | 72 | cpufreq_driver.attr - A pointer to a NULL-terminated list of |
| 72 | "struct freq_attr" which allow to | 73 | "struct freq_attr" which allow to |
| @@ -103,8 +104,8 @@ policy->governor must contain the "default policy" for · 30 unmodified lines | |||
| 103 | this CPU. A few moments later, | 104 | this CPU. A few moments later, |
| 104 | cpufreq_driver.verify and either | 105 | cpufreq_driver.verify and either |
| 105 | cpufreq_driver.setpolicy or | 106 | cpufreq_driver.setpolicy or |
| 106 | cpufreq_driver.target is called with | 107 | cpufreq_driver.target/target_index is called |
| 107 | these values. | 108 | with these values. |
| 108 | 109 | ||
| 109 | For setting some of these values (cpuinfo.min[max]_freq, policy->min[max]), the | 110 | For setting some of these values (cpuinfo.min[max]_freq, policy->min[max]), the |
| 110 | frequency table helpers might be helpful. See the section 2 for more information | 111 | frequency table helpers might be helpful. See the section 2 for more information |
| @@ -133,20 +134,28 @@ range) is within policy->min and policy->max. If necessary, increase · 22 unmodified lines | |||
| 133 | policy->max first, and only if this is no solution, decrease policy->min. | 134 | policy->max first, and only if this is no solution, decrease policy->min. |
| 134 | 135 | ||
| 135 | 136 | ||
| 136 | 1.4 target or setpolicy? | 137 | 1.4 target/target_index or setpolicy? |
| 137 | ---------------------------- | 138 | ---------------------------- |
| 138 | 139 | ||
| 139 | Most cpufreq drivers or even most cpu frequency scaling algorithms | 140 | Most cpufreq drivers or even most cpu frequency scaling algorithms |
| 140 | only allow the CPU to be set to one frequency. For these, you use the | 141 | only allow the CPU to be set to one frequency. For these, you use the |
| 141 | ->target call. | 142 | ->target/target_index call. |
| 142 | 143 | ||
| 143 | Some cpufreq-capable processors switch the frequency between certain | 144 | Some cpufreq-capable processors switch the frequency between certain |
| 144 | limits on their own. These shall use the ->setpolicy call | 145 | limits on their own. These shall use the ->setpolicy call |
| 145 | 146 | ||
| 146 | 147 | ||
| 147 | 1.4. target | 148 | 1.4. target/target_index |
| 148 | ------------- | 149 | ------------- |
| 149 | 150 | ||
| 151 | The target_index call has two arguments: struct cpufreq_policy *policy, | ||
| 152 | and unsigned int index (into the exposed frequency table). | ||
| 153 | |||
| 154 | The CPUfreq driver must set the new frequency when called here. The | ||
| 155 | actual frequency must be determined by freq_table[index].frequency. | ||
| 156 | |||
| 157 | Deprecated: | ||
| 158 | ---------- | ||
| 150 | The target call has three arguments: struct cpufreq_policy *policy, | 159 | The target call has three arguments: struct cpufreq_policy *policy, |
| 151 | unsigned int target_frequency, unsigned int relation. | 160 | unsigned int target_frequency, unsigned int relation. |
| 152 | 161 | ||
| @@ -40,7 +40,7 @@ Most cpufreq drivers (in fact, all except one, longrun) or even most · 39 unmodified lines | |||
| 40 | cpu frequency scaling algorithms only offer the CPU to be set to one | 40 | cpu frequency scaling algorithms only offer the CPU to be set to one |
| 41 | frequency. In order to offer dynamic frequency scaling, the cpufreq | 41 | frequency. In order to offer dynamic frequency scaling, the cpufreq |
| 42 | core must be able to tell these drivers of a "target frequency". So | 42 | core must be able to tell these drivers of a "target frequency". So |
| 43 | these specific drivers will be transformed to offer a "->target" | 43 | these specific drivers will be transformed to offer a "->target/target_index" |
| 44 | call instead of the existing "->setpolicy" call. For "longrun", all | 44 | call instead of the existing "->setpolicy" call. For "longrun", all |
| 45 | stays the same, though. | 45 | stays the same, though. |
| 46 | 46 | ||
| @@ -71,7 +71,7 @@ CPU can be set to switch independently | CPU can only be set · 24 unmodified lines | |||
| 71 | / the limits of policy->{min,max} | 71 | / the limits of policy->{min,max} |
| 72 | / \ | 72 | / \ |
| 73 | / \ | 73 | / \ |
| 74 | Using the ->setpolicy call, Using the ->target call, | 74 | Using the ->setpolicy call, Using the ->target/target_index call, |
| 75 | the limits and the the frequency closest | 75 | the limits and the the frequency closest |
| 76 | "policy" is set. to target_freq is set. | 76 | "policy" is set. to target_freq is set. |
| 77 | It is assured that it | 77 | It is assured that it |
| @@ -5,7 +5,7 @@ · 4 unmodified lines | |||
| 5 | Rusty Russell <rusty@rustcorp.com.au> | 5 | Rusty Russell <rusty@rustcorp.com.au> |
| 6 | Srivatsa Vaddagiri <vatsa@in.ibm.com> | 6 | Srivatsa Vaddagiri <vatsa@in.ibm.com> |
| 7 | i386: | 7 | i386: |
| 8 | Zwane Mwaikambo <zwane@arm.linux.org.uk> | 8 | Zwane Mwaikambo <zwanem@gmail.com> |
| 9 | ppc64: | 9 | ppc64: |
| 10 | Nathan Lynch <nathanl@austin.ibm.com> | 10 | Nathan Lynch <nathanl@austin.ibm.com> |
| 11 | Joel Schopp <jschopp@austin.ibm.com> | 11 | Joel Schopp <jschopp@austin.ibm.com> |
| @@ -25,5 +25,4 @@ kernel configuration and platform will be selected by cpuidle. · 24 unmodified lines | |||
| 25 | 25 | ||
| 26 | Interfaces: | 26 | Interfaces: |
| 27 | extern int cpuidle_register_governor(struct cpuidle_governor *gov); | 27 | extern int cpuidle_register_governor(struct cpuidle_governor *gov); |
| 28 | extern void cpuidle_unregister_governor(struct cpuidle_governor *gov); | ||
| 29 | struct cpuidle_governor | 28 | struct cpuidle_governor |
| @@ -30,8 +30,10 @@ multiqueue · 29 unmodified lines | |||
| 30 | 30 | ||
| 31 | This policy is the default. | 31 | This policy is the default. |
| 32 | 32 | ||
| 33 | The multiqueue policy has two sets of 16 queues: one set for entries | 33 | The multiqueue policy has three sets of 16 queues: one set for entries |
| 34 | waiting for the cache and another one for those in the cache. | 34 | waiting for the cache and another two for those in the cache (a set for |
| 35 | clean entries and a set for dirty entries). | ||
| 36 | |||
| 35 | Cache entries in the queues are aged based on logical time. Entry into | 37 | Cache entries in the queues are aged based on logical time. Entry into |
| 36 | the cache is based on variable thresholds and queue selection is based | 38 | the cache is based on variable thresholds and queue selection is based |
| 37 | on hit count on entry. The policy aims to take different cache miss | 39 | on hit count on entry. The policy aims to take different cache miss |
| @@ -68,10 +68,11 @@ So large block sizes are bad because they waste cache space. And small · 67 unmodified lines | |||
| 68 | block sizes are bad because they increase the amount of metadata (both | 68 | block sizes are bad because they increase the amount of metadata (both |
| 69 | in core and on disk). | 69 | in core and on disk). |
| 70 | 70 | ||
| 71 | Writeback/writethrough | 71 | Cache operating modes |
| 72 | ---------------------- | 72 | --------------------- |
| 73 | 73 | ||
| 74 | The cache has two modes, writeback and writethrough. | 74 | The cache has three operating modes: writeback, writethrough and |
| 75 | passthrough. | ||
| 75 | 76 | ||
| 76 | If writeback, the default, is selected then a write to a block that is | 77 | If writeback, the default, is selected then a write to a block that is |
| 77 | cached will go only to the cache and the block will be marked dirty in | 78 | cached will go only to the cache and the block will be marked dirty in |
| @@ -81,8 +82,31 @@ If writethrough is selected then a write to a cached block will not · 3 unmodified lines | |||
| 81 | complete until it has hit both the origin and cache devices. Clean | 82 | complete until it has hit both the origin and cache devices. Clean |
| 82 | blocks should remain clean. | 83 | blocks should remain clean. |
| 83 | 84 | ||
| 85 | If passthrough is selected, useful when the cache contents are not known | ||
| 86 | to be coherent with the origin device, then all reads are served from | ||
| 87 | the origin device (all reads miss the cache) and all writes are | ||
| 88 | forwarded to the origin device; additionally, write hits cause cache | ||
| 89 | block invalidates. To enable passthrough mode the cache must be clean. | ||
| 90 | Passthrough mode allows a cache device to be activated without having to | ||
| 91 | worry about coherency. Coherency that exists is maintained, although | ||
| 92 | the cache will gradually cool as writes take place. If the coherency of | ||
| 93 | the cache can later be verified, or established through use of the | ||
| 94 | "invalidate_cblocks" message, the cache device can be transitioned to | ||
| 95 | writethrough or writeback mode while still warm. Otherwise, the cache | ||
| 96 | contents can be discarded prior to transitioning to the desired | ||
| 97 | operating mode. | ||
| 98 | |||
| 84 | A simple cleaner policy is provided, which will clean (write back) all | 99 | A simple cleaner policy is provided, which will clean (write back) all |
| 85 | dirty blocks in a cache. Useful for decommissioning a cache. | 100 | dirty blocks in a cache. Useful for decommissioning a cache or when |
| 101 | shrinking a cache. Shrinking the cache's fast device requires all cache | ||
| 102 | blocks, in the area of the cache being removed, to be clean. If the | ||
| 103 | area being removed from the cache still contains dirty blocks the resize | ||
| 104 | will fail. Care must be taken to never reduce the volume used for the | ||
| 105 | cache's fast device until the cache is clean. This is of particular | ||
| 106 | importance if writeback mode is used. Writethrough and passthrough | ||
| 107 | modes already maintain a clean cache. Future support to partially clean | ||
| 108 | the cache, above a specified threshold, will allow for keeping the cache | ||
| 109 | warm and in writeback mode during resize. | ||
| 86 | 110 | ||
| 87 | Migration throttling | 111 | Migration throttling |
| 88 | -------------------- | 112 | -------------------- |
| @@ -161,7 +185,7 @@ Constructor · 72 unmodified lines | |||
| 161 | block size : cache unit size in sectors | 185 | block size : cache unit size in sectors |
| 162 | 186 | ||
| 163 | #feature args : number of feature arguments passed | 187 | #feature args : number of feature arguments passed |
| 164 | feature args : writethrough. (The default is writeback.) | 188 | feature args : writethrough or passthrough (The default is writeback.) |
| 165 | 189 | ||
| 166 | policy : the replacement policy to use | 190 | policy : the replacement policy to use |
| 167 | #policy args : an even number of arguments corresponding to | 191 | #policy args : an even number of arguments corresponding to |
| @@ -177,6 +201,13 @@ Optional feature arguments are: · 9 unmodified lines | |||
| 177 | back cache block contents later for performance reasons, | 201 | back cache block contents later for performance reasons, |
| 178 | so they may differ from the corresponding origin blocks. | 202 | so they may differ from the corresponding origin blocks. |
| 179 | 203 | ||
| 204 | passthrough : a degraded mode useful for various cache coherency | ||
| 205 | situations (e.g., rolling back snapshots of | ||
| 206 | underlying storage). Reads and writes always go to | ||
| 207 | the origin. If a write goes to a cached origin | ||
| 208 | block, then the cache block is invalidated. | ||
| 209 | To enable passthrough mode the cache must be clean. | ||
| 210 | |||
| 180 | A policy called 'default' is always registered. This is an alias for | 211 | A policy called 'default' is always registered. This is an alias for |
| 181 | the policy we currently think is giving best all round performance. | 212 | the policy we currently think is giving best all round performance. |
| 182 | 213 | ||
| @@ -231,12 +262,26 @@ The message format is: · 48 unmodified lines | |||
| 231 | E.g. | 262 | E.g. |
| 232 | dmsetup message my_cache 0 sequential_threshold 1024 | 263 | dmsetup message my_cache 0 sequential_threshold 1024 |
| 233 | 264 | ||
| 265 | |||
| 266 | Invalidation is removing an entry from the cache without writing it | ||
| 267 | back. Cache blocks can be invalidated via the invalidate_cblocks | ||
| 268 | message, which takes an arbitrary number of cblock ranges. Each cblock | ||
| 269 | must be expressed as a decimal value, in the future a variant message | ||
| 270 | that takes cblock ranges expressed in hexidecimal may be needed to | ||
| 271 | better support efficient invalidation of larger caches. The cache must | ||
| 272 | be in passthrough mode when invalidate_cblocks is used. | ||
| 273 | |||
| 274 | invalidate_cblocks [<cblock>|<cblock begin>-<cblock end>]* | ||
| 275 | |||
| 276 | E.g. | ||
| 277 | dmsetup message my_cache 0 invalidate_cblocks 2345 3456-4567 5678-6789 | ||
| 278 | |||
| 234 | Examples | 279 | Examples |
| 235 | ======== | 280 | ======== |
| 236 | 281 | ||
| 237 | The test suite can be found here: | 282 | The test suite can be found here: |
| 238 | 283 | ||
| 239 | https://github.com/jthornber/thinp-test-suite | 284 | https://github.com/jthornber/device-mapper-test-suite |
| 240 | 285 | ||
| 241 | dmsetup create my_cache --table '0 41943040 cache /dev/mapper/metadata \ | 286 | dmsetup create my_cache --table '0 41943040 cache /dev/mapper/metadata \ |
| 242 | /dev/mapper/ssd /dev/mapper/origin 512 1 writeback default 0' | 287 | /dev/mapper/ssd /dev/mapper/origin 512 1 writeback default 0' |
| @@ -4,12 +4,15 @@ dm-crypt · 3 unmodified lines | |||
| 4 | Device-Mapper's "crypt" target provides transparent encryption of block devices | 4 | Device-Mapper's "crypt" target provides transparent encryption of block devices |
| 5 | using the kernel crypto API. | 5 | using the kernel crypto API. |
| 6 | 6 | ||
| 7 | For a more detailed description of supported parameters see: | ||
| 8 | http://code.google.com/p/cryptsetup/wiki/DMCrypt | ||
| 9 | |||
| 7 | Parameters: <cipher> <key> <iv_offset> <device path> \ | 10 | Parameters: <cipher> <key> <iv_offset> <device path> \ |
| 8 | <offset> [<#opt_params> <opt_params>] | 11 | <offset> [<#opt_params> <opt_params>] |
| 9 | 12 | ||
| 10 | <cipher> | 13 | <cipher> |
| 11 | Encryption cipher and an optional IV generation mode. | 14 | Encryption cipher and an optional IV generation mode. |
| 12 | (In format cipher[:keycount]-chainmode-ivopts:ivmode). | 15 | (In format cipher[:keycount]-chainmode-ivmode[:ivopts]). |
| 13 | Examples: | 16 | Examples: |
| 14 | des | 17 | des |
| 15 | aes-cbc-essiv:sha256 | 18 | aes-cbc-essiv:sha256 |
| @@ -19,7 +22,11 @@ Parameters: <cipher> <key> <iv_offset> <device path> \ · 3 unmodified lines | |||
| 19 | 22 | ||
| 20 | <key> | 23 | <key> |
| 21 | Key used for encryption. It is encoded as a hexadecimal number. | 24 | Key used for encryption. It is encoded as a hexadecimal number. |
| 22 | You can only use key sizes that are valid for the selected cipher. | 25 | You can only use key sizes that are valid for the selected cipher |
| 26 | in combination with the selected iv mode. | ||
| 27 | Note that for some iv modes the key string can contain additional | ||
| 28 | keys (for example IV seed) so the key contains more parts concatenated | ||
| 29 | into a single string. | ||
| 23 | 30 | ||
| 24 | <keycount> | 31 | <keycount> |
| 25 | Multi-key compatibility mode. You can define <keycount> keys and | 32 | Multi-key compatibility mode. You can define <keycount> keys and |
| @@ -414,6 +414,7 @@ Your cooperation is appreciated. · 413 unmodified lines | |||
| 414 | 200 = /dev/net/tun TAP/TUN network device | 414 | 200 = /dev/net/tun TAP/TUN network device |
| 415 | 201 = /dev/button/gulpb Transmeta GULP-B buttons | 415 | 201 = /dev/button/gulpb Transmeta GULP-B buttons |
| 416 | 202 = /dev/emd/ctl Enhanced Metadisk RAID (EMD) control | 416 | 202 = /dev/emd/ctl Enhanced Metadisk RAID (EMD) control |
| 417 | 203 = /dev/cuse Cuse (character device in user-space) | ||
| 417 | 204 = /dev/video/em8300 EM8300 DVD decoder control | 418 | 204 = /dev/video/em8300 EM8300 DVD decoder control |
| 418 | 205 = /dev/video/em8300_mv EM8300 DVD decoder video | 419 | 205 = /dev/video/em8300_mv EM8300 DVD decoder video |
| 419 | 206 = /dev/video/em8300_ma EM8300 DVD decoder audio | 420 | 206 = /dev/video/em8300_ma EM8300 DVD decoder audio |
| @@ -0,0 +1,24 @@ | |||
| 1 | * ARC Performance Monitor Unit | ||
| 2 | |||
| 3 | The ARC 700 can be configured with a pipeline performance monitor for counting | ||
| 4 | CPU and cache events like cache misses and hits. | ||
| 5 | |||
| 6 | Note that: | ||
| 7 | * ARC 700 refers to a family of ARC processor cores; | ||
| 8 | - There is only one type of PMU available for the whole family; | ||
| 9 | - The PMU may support different sets of events; supported events are probed | ||
| 10 | at boot time, as required by the reference manual. | ||
| 11 | |||
| 12 | * The ARC 700 PMU does not support interrupts; although HW events may be | ||
| 13 | counted, the HW events themselves cannot serve as a trigger for a sample. | ||
| 14 | |||
| 15 | Required properties: | ||
| 16 | |||
| 17 | - compatible : should contain | ||
| 18 | "snps,arc700-pmu" | ||
| 19 | |||
| 20 | Example: | ||
| 21 | |||
| 22 | pmu { | ||
| 23 | compatible = "snps,arc700-pmu"; | ||
| 24 | }; | ||
| @@ -9,9 +9,53 @@ Required properties (in root node): · 8 unmodified lines | |||
| 9 | 9 | ||
| 10 | FPGA type interrupt controllers, see the versatile-fpga-irq binding doc. | 10 | FPGA type interrupt controllers, see the versatile-fpga-irq binding doc. |
| 11 | 11 | ||
| 12 | In the root node the Integrator/CP must have a /cpcon node pointing | 12 | Required nodes: |
| 13 | to the CP control registers, and the Integrator/AP must have a | 13 | |
| 14 | /syscon node pointing to the Integrator/AP system controller. | 14 | - core-module: the root node to the Integrator platforms must have |
| 15 | a core-module with regs and the compatible string | ||
| 16 | "arm,core-module-integrator" | ||
| 17 | |||
| 18 | Required properties for the core module: | ||
| 19 | - regs: the location and size of the core module registers, one | ||
| 20 | range of 0x200 bytes. | ||
| 21 | |||
| 22 | - syscon: the root node of the Integrator platforms must have a | ||
| 23 | system controller node pointong to the control registers, | ||
| 24 | with the compatible string | ||
| 25 | "arm,integrator-ap-syscon" | ||
| 26 | "arm,integrator-cp-syscon" | ||
| 27 | respectively. | ||
| 28 | |||
| 29 | Required properties for the system controller: | ||
| 30 | - regs: the location and size of the system controller registers, | ||
| 31 | one range of 0x100 bytes. | ||
| 32 | |||
| 33 | Required properties for the AP system controller: | ||
| 34 | - interrupts: the AP syscon node must include the logical module | ||
| 35 | interrupts, stated in order of module instance <module 0>, | ||
| 36 | <module 1>, <module 2> ... for the CP system controller this | ||
| 37 | is not required not of any use. | ||
| 38 | |||
| 39 | /dts-v1/; | ||
| 40 | /include/ "integrator.dtsi" | ||
| 41 | |||
| 42 | / { | ||
| 43 | model = "ARM Integrator/AP"; | ||
| 44 | compatible = "arm,integrator-ap"; | ||
| 45 | |||
| 46 | core-module@10000000 { | ||
| 47 | compatible = "arm,core-module-integrator"; | ||
| 48 | reg = <0x10000000 0x200>; | ||
| 49 | }; | ||
| 50 | |||
| 51 | syscon { | ||
| 52 | compatible = "arm,integrator-ap-syscon"; | ||
| 53 | reg = <0x11000000 0x100>; | ||
| 54 | interrupt-parent = <&pic>; | ||
| 55 | /* These are the logic module IRQs */ | ||
| 56 | interrupts = <9>, <10>, <11>, <12>; | ||
| 57 | }; | ||
| 58 | }; | ||
| 15 | 59 | ||
| 16 | 60 | ||
| 17 | ARM Versatile Application and Platform Baseboards | 61 | ARM Versatile Application and Platform Baseboards |
| @@ -4,6 +4,8 @@ Marvell Armada 370 and Armada XP Interrupt Controller · 3 unmodified lines | |||
| 4 | Required properties: | 4 | Required properties: |
| 5 | - compatible: Should be "marvell,mpic" | 5 | - compatible: Should be "marvell,mpic" |
| 6 | - interrupt-controller: Identifies the node as an interrupt controller. | 6 | - interrupt-controller: Identifies the node as an interrupt controller. |
| 7 | - msi-controller: Identifies the node as an PCI Message Signaled | ||
| 8 | Interrupt controller. | ||
| 7 | - #interrupt-cells: The number of cells to define the interrupts. Should be 1. | 9 | - #interrupt-cells: The number of cells to define the interrupts. Should be 1. |
| 8 | The cell is the IRQ number | 10 | The cell is the IRQ number |
| 9 | 11 | ||
| @@ -24,6 +26,7 @@ Example: · 14 unmodified lines | |||
| 24 | #address-cells = <1>; | 26 | #address-cells = <1>; |
| 25 | #size-cells = <1>; | 27 | #size-cells = <1>; |
| 26 | interrupt-controller; | 28 | interrupt-controller; |
| 29 | msi-controller; | ||
| 27 | reg = <0xd0020a00 0x1d0>, | 30 | reg = <0xd0020a00 0x1d0>, |
| 28 | <0xd0021070 0x58>; | 31 | <0xd0021070 0x58>; |
| 29 | }; | 32 | }; |
| @@ -7,7 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - interrupts: Should contain the IRQ line for the ADC | 7 | - interrupts: Should contain the IRQ line for the ADC |
| 8 | - atmel,adc-channels-used: Bitmask of the channels muxed and enable for this | 8 | - atmel,adc-channels-used: Bitmask of the channels muxed and enable for this |
| 9 | device | 9 | device |
| 10 | - atmel,adc-num-channels: Number of channels available in the ADC | ||
| 11 | - atmel,adc-startup-time: Startup Time of the ADC in microseconds as | 10 | - atmel,adc-startup-time: Startup Time of the ADC in microseconds as |
| 12 | defined in the datasheet | 11 | defined in the datasheet |
| 13 | - atmel,adc-vref: Reference voltage in millivolts for the conversions | 12 | - atmel,adc-vref: Reference voltage in millivolts for the conversions |
| @@ -24,6 +23,13 @@ Optional properties: · 10 unmodified lines | |||
| 24 | resolution will be used. | 23 | resolution will be used. |
| 25 | - atmel,adc-sleep-mode: Boolean to enable sleep mode when no conversion | 24 | - atmel,adc-sleep-mode: Boolean to enable sleep mode when no conversion |
| 26 | - atmel,adc-sample-hold-time: Sample and Hold Time in microseconds | 25 | - atmel,adc-sample-hold-time: Sample and Hold Time in microseconds |
| 26 | - atmel,adc-ts-wires: Number of touch screen wires. Should be 4 or 5. If this | ||
| 27 | value is set, then adc driver will enable touch screen | ||
| 28 | support. | ||
| 29 | NOTE: when adc touch screen enabled, the adc hardware trigger will be | ||
| 30 | disabled. Since touch screen will occupied the trigger register. | ||
| 31 | - atmel,adc-ts-pressure-threshold: a pressure threshold for touchscreen. It | ||
| 32 | make touch detect more precision. | ||
| 27 | 33 | ||
| 28 | Optional trigger Nodes: | 34 | Optional trigger Nodes: |
| 29 | - Required properties: | 35 | - Required properties: |
| @@ -1,7 +1,9 @@ | |||
| 1 | Calxeda DDR memory controller | 1 | Calxeda DDR memory controller |
| 2 | 2 | ||
| 3 | Properties: | 3 | Properties: |
| 4 | - compatible : Should be "calxeda,hb-ddr-ctrl" | 4 | - compatible : Should be: |
| 5 | - "calxeda,hb-ddr-ctrl" for ECX-1000 | ||
| 6 | - "calxeda,ecx-2000-ddr-ctrl" for ECX-2000 | ||
| 5 | - reg : Address and size for DDR controller registers. | 7 | - reg : Address and size for DDR controller registers. |
| 6 | - interrupts : Interrupt for DDR controller. | 8 | - interrupts : Interrupt for DDR controller. |
| 7 | 9 | ||
| @@ -36,14 +36,18 @@ specific to ARM. · 35 unmodified lines | |||
| 36 | 36 | ||
| 37 | - reg | 37 | - reg |
| 38 | Usage: required | 38 | Usage: required |
| 39 | Value type: <prop-encoded-array> | 39 | Value type: Integer cells. A register entry, expressed as a pair |
| 40 | of cells, containing base and size. | ||
| 40 | Definition: A standard property. Specifies base physical | 41 | Definition: A standard property. Specifies base physical |
| 41 | address of CCI control registers common to all | 42 | address of CCI control registers common to all |
| 42 | interfaces. | 43 | interfaces. |
| 43 | 44 | ||
| 44 | - ranges: | 45 | - ranges: |
| 45 | Usage: required | 46 | Usage: required |
| 46 | Value type: <prop-encoded-array> | 47 | Value type: Integer cells. An array of range entries, expressed |
| 48 | as a tuple of cells, containing child address, | ||
| 49 | parent address and the size of the region in the | ||
| 50 | child address space. | ||
| 47 | Definition: A standard property. Follow rules in the ePAPR for | 51 | Definition: A standard property. Follow rules in the ePAPR for |
| 48 | hierarchical bus addressing. CCI interfaces | 52 | hierarchical bus addressing. CCI interfaces |
| 49 | addresses refer to the parent node addressing | 53 | addresses refer to the parent node addressing |
| @@ -74,11 +78,49 @@ specific to ARM. · 24 unmodified lines | |||
| 74 | 78 | ||
| 75 | - reg: | 79 | - reg: |
| 76 | Usage: required | 80 | Usage: required |
| 77 | Value type: <prop-encoded-array> | 81 | Value type: Integer cells. A register entry, expressed |
| 82 | as a pair of cells, containing base and | ||
| 83 | size. | ||
| 78 | Definition: the base address and size of the | 84 | Definition: the base address and size of the |
| 79 | corresponding interface programming | 85 | corresponding interface programming |
| 80 | registers. | 86 | registers. |
| 81 | 87 | ||
| 88 | - CCI PMU node | ||
| 89 | |||
| 90 | Parent node must be CCI interconnect node. | ||
| 91 | |||
| 92 | A CCI pmu node must contain the following properties: | ||
| 93 | |||
| 94 | - compatible | ||
| 95 | Usage: required | ||
| 96 | Value type: <string> | ||
| 97 | Definition: must be "arm,cci-400-pmu" | ||
| 98 | |||
| 99 | - reg: | ||
| 100 | Usage: required | ||
| 101 | Value type: Integer cells. A register entry, expressed | ||
| 102 | as a pair of cells, containing base and | ||
| 103 | size. | ||
| 104 | Definition: the base address and size of the | ||
| 105 | corresponding interface programming | ||
| 106 | registers. | ||
| 107 | |||
| 108 | - interrupts: | ||
| 109 | Usage: required | ||
| 110 | Value type: Integer cells. Array of interrupt specifier | ||
| 111 | entries, as defined in | ||
| 112 | ../interrupt-controller/interrupts.txt. | ||
| 113 | Definition: list of counter overflow interrupts, one per | ||
| 114 | counter. The interrupts must be specified | ||
| 115 | starting with the cycle counter overflow | ||
| 116 | interrupt, followed by counter0 overflow | ||
| 117 | interrupt, counter1 overflow interrupt,... | ||
| 118 | ,counterN overflow interrupt. | ||
| 119 | |||
| 120 | The CCI PMU has an interrupt signal for each | ||
| 121 | counter. The number of interrupts must be | ||
| 122 | equal to the number of counters. | ||
| 123 | |||
| 82 | * CCI interconnect bus masters | 124 | * CCI interconnect bus masters |
| 83 | 125 | ||
| 84 | Description: masters in the device tree connected to a CCI port | 126 | Description: masters in the device tree connected to a CCI port |
| @@ -144,7 +186,7 @@ Example: · 59 unmodified lines | |||
| 144 | #address-cells = <1>; | 186 | #address-cells = <1>; |
| 145 | #size-cells = <1>; | 187 | #size-cells = <1>; |
| 146 | reg = <0x0 0x2c090000 0 0x1000>; | 188 | reg = <0x0 0x2c090000 0 0x1000>; |
| 147 | ranges = <0x0 0x0 0x2c090000 0x6000>; | 189 | ranges = <0x0 0x0 0x2c090000 0x10000>; |
| 148 | 190 | ||
| 149 | cci_control0: slave-if@1000 { | 191 | cci_control0: slave-if@1000 { |
| 150 | compatible = "arm,cci-400-ctrl-if"; | 192 | compatible = "arm,cci-400-ctrl-if"; |
| @@ -163,6 +205,16 @@ Example: · 12 unmodified lines | |||
| 163 | interface-type = "ace"; | 205 | interface-type = "ace"; |
| 164 | reg = <0x5000 0x1000>; | 206 | reg = <0x5000 0x1000>; |
| 165 | }; | 207 | }; |
| 208 | |||
| 209 | pmu@9000 { | ||
| 210 | compatible = "arm,cci-400-pmu"; | ||
| 211 | reg = <0x9000 0x5000>; | ||
| 212 | interrupts = <0 101 4>, | ||
| 213 | <0 102 4>, | ||
| 214 | <0 103 4>, | ||
| 215 | <0 104 4>, | ||
| 216 | <0 105 4>; | ||
| 217 | }; | ||
| 166 | }; | 218 | }; |
| 167 | 219 | ||
| 168 | This CCI node corresponds to a CCI component whose control registers sits | 220 | This CCI node corresponds to a CCI component whose control registers sits |
| @@ -1,77 +1,384 @@ | |||
| 1 | * ARM CPUs binding description | 1 | ================= |
| 2 | ARM CPUs bindings | ||
| 3 | ================= | ||
| 2 | 4 | ||
| 3 | The device tree allows to describe the layout of CPUs in a system through | 5 | The device tree allows to describe the layout of CPUs in a system through |
| 4 | the "cpus" node, which in turn contains a number of subnodes (ie "cpu") | 6 | the "cpus" node, which in turn contains a number of subnodes (ie "cpu") |
| 5 | defining properties for every cpu. | 7 | defining properties for every cpu. |
| 6 | 8 | ||
| 7 | Bindings for CPU nodes follow the ePAPR standard, available from: | 9 | Bindings for CPU nodes follow the ePAPR v1.1 standard, available from: |
| 8 | 10 | ||
| 9 | http://devicetree.org | 11 | https://www.power.org/documentation/epapr-version-1-1/ |
| 10 | 12 | ||
| 11 | For the ARM architecture every CPU node must contain the following properties: | 13 | with updates for 32-bit and 64-bit ARM systems provided in this document. |
| 12 | 14 | ||
| 13 | - device_type: must be "cpu" | 15 | ================================ |
| 14 | - reg: property matching the CPU MPIDR[23:0] register bits | 16 | Convention used in this document |
| 15 | reg[31:24] bits must be set to 0 | 17 | ================================ |
| 16 | - compatible: should be one of: | 18 | |
| 17 | "arm,arm1020" | 19 | This document follows the conventions described in the ePAPR v1.1, with |
| 18 | "arm,arm1020e" | 20 | the addition: |
| 19 | "arm,arm1022" | 21 | |
| 20 | "arm,arm1026" | 22 | - square brackets define bitfields, eg reg[7:0] value of the bitfield in |
| 21 | "arm,arm720" | 23 | the reg property contained in bits 7 down to 0 |
| 22 | "arm,arm740" | 24 | |
| 23 | "arm,arm7tdmi" | 25 | ===================================== |
| 24 | "arm,arm920" | 26 | cpus and cpu node bindings definition |
| 25 | "arm,arm922" | 27 | ===================================== |
| 26 | "arm,arm925" | 28 | |
| 27 | "arm,arm926" | 29 | The ARM architecture, in accordance with the ePAPR, requires the cpus and cpu |
| 28 | "arm,arm940" | 30 | nodes to be present and contain the properties described below. |
| 29 | "arm,arm946" | 31 | |
| 30 | "arm,arm9tdmi" | 32 | - cpus node |
| 31 | "arm,cortex-a5" | 33 | |
| 32 | "arm,cortex-a7" | 34 | Description: Container of cpu nodes |
| 33 | "arm,cortex-a8" | 35 | |
| 34 | "arm,cortex-a9" | 36 | The node name must be "cpus". |
| 35 | "arm,cortex-a15" | 37 | |
| 36 | "arm,arm1136" | 38 | A cpus node must define the following properties: |
| 37 | "arm,arm1156" | 39 | |
| 38 | "arm,arm1176" | 40 | - #address-cells |
| 39 | "arm,arm11mpcore" | 41 | Usage: required |
| 40 | "faraday,fa526" | 42 | Value type: <u32> |
| 41 | "intel,sa110" | 43 | |
| 42 | "intel,sa1100" | 44 | Definition depends on ARM architecture version and |
| 43 | "marvell,feroceon" | 45 | configuration: |
| 44 | "marvell,mohawk" | 46 | |
| 45 | "marvell,xsc3" | 47 | # On uniprocessor ARM architectures previous to v7 |
| 46 | "marvell,xscale" | 48 | value must be 1, to enable a simple enumeration |
| 47 | 49 | scheme for processors that do not have a HW CPU | |
| 48 | Example: | 50 | identification register. |
| 51 | # On 32-bit ARM 11 MPcore, ARM v7 or later systems | ||
| 52 | value must be 1, that corresponds to CPUID/MPIDR | ||
| 53 | registers sizes. | ||
| 54 | # On ARM v8 64-bit systems value should be set to 2, | ||
| 55 | that corresponds to the MPIDR_EL1 register size. | ||
| 56 | If MPIDR_EL1[63:32] value is equal to 0 on all CPUs | ||
| 57 | in the system, #address-cells can be set to 1, since | ||
| 58 | MPIDR_EL1[63:32] bits are not used for CPUs | ||
| 59 | identification. | ||
| 60 | - #size-cells | ||
| 61 | Usage: required | ||
| 62 | Value type: <u32> | ||
| 63 | Definition: must be set to 0 | ||
| 64 | |||
| 65 | - cpu node | ||
| 66 | |||
| 67 | Description: Describes a CPU in an ARM based system | ||
| 68 | |||
| 69 | PROPERTIES | ||
| 70 | |||
| 71 | - device_type | ||
| 72 | Usage: required | ||
| 73 | Value type: <string> | ||
| 74 | Definition: must be "cpu" | ||
| 75 | - reg | ||
| 76 | Usage and definition depend on ARM architecture version and | ||
| 77 | configuration: | ||
| 78 | |||
| 79 | # On uniprocessor ARM architectures previous to v7 | ||
| 80 | this property is required and must be set to 0. | ||
| 81 | |||
| 82 | # On ARM 11 MPcore based systems this property is | ||
| 83 | required and matches the CPUID[11:0] register bits. | ||
| 84 | |||
| 85 | Bits [11:0] in the reg cell must be set to | ||
| 86 | bits [11:0] in CPU ID register. | ||
| 87 | |||
| 88 | All other bits in the reg cell must be set to 0. | ||
| 89 | |||
| 90 | # On 32-bit ARM v7 or later systems this property is | ||
| 91 | required and matches the CPU MPIDR[23:0] register | ||
| 92 | bits. | ||
| 93 | |||
| 94 | Bits [23:0] in the reg cell must be set to | ||
| 95 | bits [23:0] in MPIDR. | ||
| 96 | |||
| 97 | All other bits in the reg cell must be set to 0. | ||
| 98 | |||
| 99 | # On ARM v8 64-bit systems this property is required | ||
| 100 | and matches the MPIDR_EL1 register affinity bits. | ||
| 101 | |||
| 102 | * If cpus node's #address-cells property is set to 2 | ||
| 103 | |||
| 104 | The first reg cell bits [7:0] must be set to | ||
| 105 | bits [39:32] of MPIDR_EL1. | ||
| 106 | |||
| 107 | The second reg cell bits [23:0] must be set to | ||
| 108 | bits [23:0] of MPIDR_EL1. | ||
| 109 | |||
| 110 | * If cpus node's #address-cells property is set to 1 | ||
| 111 | |||
| 112 | The reg cell bits [23:0] must be set to bits [23:0] | ||
| 113 | of MPIDR_EL1. | ||
| 114 | |||
| 115 | All other bits in the reg cells must be set to 0. | ||
| 116 | |||
| 117 | - compatible: | ||
| 118 | Usage: required | ||
| 119 | Value type: <string> | ||
| 120 | Definition: should be one of: | ||
| 121 | "arm,arm710t" | ||
| 122 | "arm,arm720t" | ||
| 123 | "arm,arm740t" | ||
| 124 | "arm,arm7ej-s" | ||
| 125 | "arm,arm7tdmi" | ||
| 126 | "arm,arm7tdmi-s" | ||
| 127 | "arm,arm9es" | ||
| 128 | "arm,arm9ej-s" | ||
| 129 | "arm,arm920t" | ||
| 130 | "arm,arm922t" | ||
| 131 | "arm,arm925" | ||
| 132 | "arm,arm926e-s" | ||
| 133 | "arm,arm926ej-s" | ||
| 134 | "arm,arm940t" | ||
| 135 | "arm,arm946e-s" | ||
| 136 | "arm,arm966e-s" | ||
| 137 | "arm,arm968e-s" | ||
| 138 | "arm,arm9tdmi" | ||
| 139 | "arm,arm1020e" | ||
| 140 | "arm,arm1020t" | ||
| 141 | "arm,arm1022e" | ||
| 142 | "arm,arm1026ej-s" | ||
| 143 | "arm,arm1136j-s" | ||
| 144 | "arm,arm1136jf-s" | ||
| 145 | "arm,arm1156t2-s" | ||
| 146 | "arm,arm1156t2f-s" | ||
| 147 | "arm,arm1176jzf" | ||
| 148 | "arm,arm1176jz-s" | ||
| 149 | "arm,arm1176jzf-s" | ||
| 150 | "arm,arm11mpcore" | ||
| 151 | "arm,cortex-a5" | ||
| 152 | "arm,cortex-a7" | ||
| 153 | "arm,cortex-a8" | ||
| 154 | "arm,cortex-a9" | ||
| 155 | "arm,cortex-a15" | ||
| 156 | "arm,cortex-a53" | ||
| 157 | "arm,cortex-a57" | ||
| 158 | "arm,cortex-m0" | ||
| 159 | "arm,cortex-m0+" | ||
| 160 | "arm,cortex-m1" | ||
| 161 | "arm,cortex-m3" | ||
| 162 | "arm,cortex-m4" | ||
| 163 | "arm,cortex-r4" | ||
| 164 | "arm,cortex-r5" | ||
| 165 | "arm,cortex-r7" | ||
| 166 | "faraday,fa526" | ||
| 167 | "intel,sa110" | ||
| 168 | "intel,sa1100" | ||
| 169 | "marvell,feroceon" | ||
| 170 | "marvell,mohawk" | ||
| 171 | "marvell,pj4a" | ||
| 172 | "marvell,pj4b" | ||
| 173 | "marvell,sheeva-v5" | ||
| 174 | "qcom,krait" | ||
| 175 | "qcom,scorpion" | ||
| 176 | - enable-method | ||
| 177 | Value type: <stringlist> | ||
| 178 | Usage and definition depend on ARM architecture version. | ||
| 179 | # On ARM v8 64-bit this property is required and must | ||
| 180 | be one of: | ||
| 181 | "spin-table" | ||
| 182 | "psci" | ||
| 183 | # On ARM 32-bit systems this property is optional. | ||
| 184 | |||
| 185 | - cpu-release-addr | ||
| 186 | Usage: required for systems that have an "enable-method" | ||
| 187 | property value of "spin-table". | ||
| 188 | Value type: <prop-encoded-array> | ||
| 189 | Definition: | ||
| 190 | # On ARM v8 64-bit systems must be a two cell | ||
| 191 | property identifying a 64-bit zero-initialised | ||
| 192 | memory location. | ||
| 193 | |||
| 194 | Example 1 (dual-cluster big.LITTLE system 32-bit): | ||
| 49 | 195 | ||
| 50 | cpus { | 196 | cpus { |
| 51 | #size-cells = <0>; | 197 | #size-cells = <0>; |
| 52 | #address-cells = <1>; | 198 | #address-cells = <1>; |
| 53 | 199 | ||
| 54 | CPU0: cpu@0 { | 200 | cpu@0 { |
| 55 | device_type = "cpu"; | 201 | device_type = "cpu"; |
| 56 | compatible = "arm,cortex-a15"; | 202 | compatible = "arm,cortex-a15"; |
| 57 | reg = <0x0>; | 203 | reg = <0x0>; |
| 58 | }; | 204 | }; |
| 59 | 205 | ||
| 60 | CPU1: cpu@1 { | 206 | cpu@1 { |
| 61 | device_type = "cpu"; | 207 | device_type = "cpu"; |
| 62 | compatible = "arm,cortex-a15"; | 208 | compatible = "arm,cortex-a15"; |
| 63 | reg = <0x1>; | 209 | reg = <0x1>; |
| 64 | }; | 210 | }; |
| 65 | 211 | ||
| 66 | CPU2: cpu@100 { | 212 | cpu@100 { |
| 67 | device_type = "cpu"; | 213 | device_type = "cpu"; |
| 68 | compatible = "arm,cortex-a7"; | 214 | compatible = "arm,cortex-a7"; |
| 69 | reg = <0x100>; | 215 | reg = <0x100>; |
| 70 | }; | 216 | }; |
| 71 | 217 | ||
| 72 | CPU3: cpu@101 { | 218 | cpu@101 { |
| 73 | device_type = "cpu"; | 219 | device_type = "cpu"; |
| 74 | compatible = "arm,cortex-a7"; | 220 | compatible = "arm,cortex-a7"; |
| 75 | reg = <0x101>; | 221 | reg = <0x101>; |
| 76 | }; | 222 | }; |
| 77 | }; | 223 | }; |
| 224 | |||
| 225 | Example 2 (Cortex-A8 uniprocessor 32-bit system): | ||
| 226 | |||
| 227 | cpus { | ||
| 228 | #size-cells = <0>; | ||
| 229 | #address-cells = <1>; | ||
| 230 | |||
| 231 | cpu@0 { | ||
| 232 | device_type = "cpu"; | ||
| 233 | compatible = "arm,cortex-a8"; | ||
| 234 | reg = <0x0>; | ||
| 235 | }; | ||
| 236 | }; | ||
| 237 | |||
| 238 | Example 3 (ARM 926EJ-S uniprocessor 32-bit system): | ||
| 239 | |||
| 240 | cpus { | ||
| 241 | #size-cells = <0>; | ||
| 242 | #address-cells = <1>; | ||
| 243 | |||
| 244 | cpu@0 { | ||
| 245 | device_type = "cpu"; | ||
| 246 | compatible = "arm,arm926ej-s"; | ||
| 247 | reg = <0x0>; | ||
| 248 | }; | ||
| 249 | }; | ||
| 250 | |||
| 251 | Example 4 (ARM Cortex-A57 64-bit system): | ||
| 252 | |||
| 253 | cpus { | ||
| 254 | #size-cells = <0>; | ||
| 255 | #address-cells = <2>; | ||
| 256 | |||
| 257 | cpu@0 { | ||
| 258 | device_type = "cpu"; | ||
| 259 | compatible = "arm,cortex-a57"; | ||
| 260 | reg = <0x0 0x0>; | ||
| 261 | enable-method = "spin-table"; | ||
| 262 | cpu-release-addr = <0 0x20000000>; | ||
| 263 | }; | ||
| 264 | |||
| 265 | cpu@1 { | ||
| 266 | device_type = "cpu"; | ||
| 267 | compatible = "arm,cortex-a57"; | ||
| 268 | reg = <0x0 0x1>; | ||
| 269 | enable-method = "spin-table"; | ||
| 270 | cpu-release-addr = <0 0x20000000>; | ||
| 271 | }; | ||
| 272 | |||
| 273 | cpu@100 { | ||
| 274 | device_type = "cpu"; | ||
| 275 | compatible = "arm,cortex-a57"; | ||
| 276 | reg = <0x0 0x100>; | ||
| 277 | enable-method = "spin-table"; | ||
| 278 | cpu-release-addr = <0 0x20000000>; | ||
| 279 | }; | ||
| 280 | |||
| 281 | cpu@101 { | ||
| 282 | device_type = "cpu"; | ||
| 283 | compatible = "arm,cortex-a57"; | ||
| 284 | reg = <0x0 0x101>; | ||
| 285 | enable-method = "spin-table"; | ||
| 286 | cpu-release-addr = <0 0x20000000>; | ||
| 287 | }; | ||
| 288 | |||
| 289 | cpu@10000 { | ||
| 290 | device_type = "cpu"; | ||
| 291 | compatible = "arm,cortex-a57"; | ||
| 292 | reg = <0x0 0x10000>; | ||
| 293 | enable-method = "spin-table"; | ||
| 294 | cpu-release-addr = <0 0x20000000>; | ||
| 295 | }; | ||
| 296 | |||
| 297 | cpu@10001 { | ||
| 298 | device_type = "cpu"; | ||
| 299 | compatible = "arm,cortex-a57"; | ||
| 300 | reg = <0x0 0x10001>; | ||
| 301 | enable-method = "spin-table"; | ||
| 302 | cpu-release-addr = <0 0x20000000>; | ||
| 303 | }; | ||
| 304 | |||
| 305 | cpu@10100 { | ||
| 306 | device_type = "cpu"; | ||
| 307 | compatible = "arm,cortex-a57"; | ||
| 308 | reg = <0x0 0x10100>; | ||
| 309 | enable-method = "spin-table"; | ||
| 310 | cpu-release-addr = <0 0x20000000>; | ||
| 311 | }; | ||
| 312 | |||
| 313 | cpu@10101 { | ||
| 314 | device_type = "cpu"; | ||
| 315 | compatible = "arm,cortex-a57"; | ||
| 316 | reg = <0x0 0x10101>; | ||
| 317 | enable-method = "spin-table"; | ||
| 318 | cpu-release-addr = <0 0x20000000>; | ||
| 319 | }; | ||
| 320 | |||
| 321 | cpu@100000000 { | ||
| 322 | device_type = "cpu"; | ||
| 323 | compatible = "arm,cortex-a57"; | ||
| 324 | reg = <0x1 0x0>; | ||
| 325 | enable-method = "spin-table"; | ||
| 326 | cpu-release-addr = <0 0x20000000>; | ||
| 327 | }; | ||
| 328 | |||
| 329 | cpu@100000001 { | ||
| 330 | device_type = "cpu"; | ||
| 331 | compatible = "arm,cortex-a57"; | ||
| 332 | reg = <0x1 0x1>; | ||
| 333 | enable-method = "spin-table"; | ||
| 334 | cpu-release-addr = <0 0x20000000>; | ||
| 335 | }; | ||
| 336 | |||
| 337 | cpu@100000100 { | ||
| 338 | device_type = "cpu"; | ||
| 339 | compatible = "arm,cortex-a57"; | ||
| 340 | reg = <0x1 0x100>; | ||
| 341 | enable-method = "spin-table"; | ||
| 342 | cpu-release-addr = <0 0x20000000>; | ||
| 343 | }; | ||
| 344 | |||
| 345 | cpu@100000101 { | ||
| 346 | device_type = "cpu"; | ||
| 347 | compatible = "arm,cortex-a57"; | ||
| 348 | reg = <0x1 0x101>; | ||
| 349 | enable-method = "spin-table"; | ||
| 350 | cpu-release-addr = <0 0x20000000>; | ||
| 351 | }; | ||
| 352 | |||
| 353 | cpu@100010000 { | ||
| 354 | device_type = "cpu"; | ||
| 355 | compatible = "arm,cortex-a57"; | ||
| 356 | reg = <0x1 0x10000>; | ||
| 357 | enable-method = "spin-table"; | ||
| 358 | cpu-release-addr = <0 0x20000000>; | ||
| 359 | }; | ||
| 360 | |||
| 361 | cpu@100010001 { | ||
| 362 | device_type = "cpu"; | ||
| 363 | compatible = "arm,cortex-a57"; | ||
| 364 | reg = <0x1 0x10001>; | ||
| 365 | enable-method = "spin-table"; | ||
| 366 | cpu-release-addr = <0 0x20000000>; | ||
| 367 | }; | ||
| 368 | |||
| 369 | cpu@100010100 { | ||
| 370 | device_type = "cpu"; | ||
| 371 | compatible = "arm,cortex-a57"; | ||
| 372 | reg = <0x1 0x10100>; | ||
| 373 | enable-method = "spin-table"; | ||
| 374 | cpu-release-addr = <0 0x20000000>; | ||
| 375 | }; | ||
| 376 | |||
| 377 | cpu@100010101 { | ||
| 378 | device_type = "cpu"; | ||
| 379 | compatible = "arm,cortex-a57"; | ||
| 380 | reg = <0x1 0x10101>; | ||
| 381 | enable-method = "spin-table"; | ||
| 382 | cpu-release-addr = <0 0x20000000>; | ||
| 383 | }; | ||
| 384 | }; | ||
| @@ -21,7 +21,8 @@ Required properties: · 20 unmodified lines | |||
| 21 | Optional properties: | 21 | Optional properties: |
| 22 | - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module | 22 | - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module |
| 23 | during suspend. | 23 | during suspend. |
| 24 | 24 | - ti,no-reset-on-init: When present, the module should not be reset at init | |
| 25 | - ti,no-idle-on-init: When present, the module should not be idled at init | ||
| 25 | 26 | ||
| 26 | Example: | 27 | Example: |
| 27 | 28 | ||
| @@ -0,0 +1,474 @@ | |||
| 1 | =========================================== | ||
| 2 | ARM topology binding description | ||
| 3 | =========================================== | ||
| 4 | |||
| 5 | =========================================== | ||
| 6 | 1 - Introduction | ||
| 7 | =========================================== | ||
| 8 | |||
| 9 | In an ARM system, the hierarchy of CPUs is defined through three entities that | ||
| 10 | are used to describe the layout of physical CPUs in the system: | ||
| 11 | |||
| 12 | - cluster | ||
| 13 | - core | ||
| 14 | - thread | ||
| 15 | |||
| 16 | The cpu nodes (bindings defined in [1]) represent the devices that | ||
| 17 | correspond to physical CPUs and are to be mapped to the hierarchy levels. | ||
| 18 | |||
| 19 | The bottom hierarchy level sits at core or thread level depending on whether | ||
| 20 | symmetric multi-threading (SMT) is supported or not. | ||
| 21 | |||
| 22 | For instance in a system where CPUs support SMT, "cpu" nodes represent all | ||
| 23 | threads existing in the system and map to the hierarchy level "thread" above. | ||
| 24 | In systems where SMT is not supported "cpu" nodes represent all cores present | ||
| 25 | in the system and map to the hierarchy level "core" above. | ||
| 26 | |||
| 27 | ARM topology bindings allow one to associate cpu nodes with hierarchical groups | ||
| 28 | corresponding to the system hierarchy; syntactically they are defined as device | ||
| 29 | tree nodes. | ||
| 30 | |||
| 31 | The remainder of this document provides the topology bindings for ARM, based | ||
| 32 | on the ePAPR standard, available from: | ||
| 33 | |||
| 34 | http://www.power.org/documentation/epapr-version-1-1/ | ||
| 35 | |||
| 36 | If not stated otherwise, whenever a reference to a cpu node phandle is made its | ||
| 37 | value must point to a cpu node compliant with the cpu node bindings as | ||
| 38 | documented in [1]. | ||
| 39 | A topology description containing phandles to cpu nodes that are not compliant | ||
| 40 | with bindings standardized in [1] is therefore considered invalid. | ||
| 41 | |||
| 42 | =========================================== | ||
| 43 | 2 - cpu-map node | ||
| 44 | =========================================== | ||
| 45 | |||
| 46 | The ARM CPU topology is defined within the cpu-map node, which is a direct | ||
| 47 | child of the cpus node and provides a container where the actual topology | ||
| 48 | nodes are listed. | ||
| 49 | |||
| 50 | - cpu-map node | ||
| 51 | |||
| 52 | Usage: Optional - On ARM SMP systems provide CPUs topology to the OS. | ||
| 53 | ARM uniprocessor systems do not require a topology | ||
| 54 | description and therefore should not define a | ||
| 55 | cpu-map node. | ||
| 56 | |||
| 57 | Description: The cpu-map node is just a container node where its | ||
| 58 | subnodes describe the CPU topology. | ||
| 59 | |||
| 60 | Node name must be "cpu-map". | ||
| 61 | |||
| 62 | The cpu-map node's parent node must be the cpus node. | ||
| 63 | |||
| 64 | The cpu-map node's child nodes can be: | ||
| 65 | |||
| 66 | - one or more cluster nodes | ||
| 67 | |||
| 68 | Any other configuration is considered invalid. | ||
| 69 | |||
| 70 | The cpu-map node can only contain three types of child nodes: | ||
| 71 | |||
| 72 | - cluster node | ||
| 73 | - core node | ||
| 74 | - thread node | ||
| 75 | |||
| 76 | whose bindings are described in paragraph 3. | ||
| 77 | |||
| 78 | The nodes describing the CPU topology (cluster/core/thread) can only be | ||
| 79 | defined within the cpu-map node. | ||
| 80 | Any other configuration is consider invalid and therefore must be ignored. | ||
| 81 | |||
| 82 | =========================================== | ||
| 83 | 2.1 - cpu-map child nodes naming convention | ||
| 84 | =========================================== | ||
| 85 | |||
| 86 | cpu-map child nodes must follow a naming convention where the node name | ||
| 87 | must be "clusterN", "coreN", "threadN" depending on the node type (ie | ||
| 88 | cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes which | ||
| 89 | are siblings within a single common parent node must be given a unique and | ||
| 90 | sequential N value, starting from 0). | ||
| 91 | cpu-map child nodes which do not share a common parent node can have the same | ||
| 92 | name (ie same number N as other cpu-map child nodes at different device tree | ||
| 93 | levels) since name uniqueness will be guaranteed by the device tree hierarchy. | ||
| 94 | |||
| 95 | =========================================== | ||
| 96 | 3 - cluster/core/thread node bindings | ||
| 97 | =========================================== | ||
| 98 | |||
| 99 | Bindings for cluster/cpu/thread nodes are defined as follows: | ||
| 100 | |||
| 101 | - cluster node | ||
| 102 | |||
| 103 | Description: must be declared within a cpu-map node, one node | ||
| 104 | per cluster. A system can contain several layers of | ||
| 105 | clustering and cluster nodes can be contained in parent | ||
| 106 | cluster nodes. | ||
| 107 | |||
| 108 | The cluster node name must be "clusterN" as described in 2.1 above. | ||
| 109 | A cluster node can not be a leaf node. | ||
| 110 | |||
| 111 | A cluster node's child nodes must be: | ||
| 112 | |||
| 113 | - one or more cluster nodes; or | ||
| 114 | - one or more core nodes | ||
| 115 | |||
| 116 | Any other configuration is considered invalid. | ||
| 117 | |||
| 118 | - core node | ||
| 119 | |||
| 120 | Description: must be declared in a cluster node, one node per core in | ||
| 121 | the cluster. If the system does not support SMT, core | ||
| 122 | nodes are leaf nodes, otherwise they become containers of | ||
| 123 | thread nodes. | ||
| 124 | |||
| 125 | The core node name must be "coreN" as described in 2.1 above. | ||
| 126 | |||
| 127 | A core node must be a leaf node if SMT is not supported. | ||
| 128 | |||
| 129 | Properties for core nodes that are leaf nodes: | ||
| 130 | |||
| 131 | - cpu | ||
| 132 | Usage: required | ||
| 133 | Value type: <phandle> | ||
| 134 | Definition: a phandle to the cpu node that corresponds to the | ||
| 135 | core node. | ||
| 136 | |||
| 137 | If a core node is not a leaf node (CPUs supporting SMT) a core node's | ||
| 138 | child nodes can be: | ||
| 139 | |||
| 140 | - one or more thread nodes | ||
| 141 | |||
| 142 | Any other configuration is considered invalid. | ||
| 143 | |||
| 144 | - thread node | ||
| 145 | |||
| 146 | Description: must be declared in a core node, one node per thread | ||
| 147 | in the core if the system supports SMT. Thread nodes are | ||
| 148 | always leaf nodes in the device tree. | ||
| 149 | |||
| 150 | The thread node name must be "threadN" as described in 2.1 above. | ||
| 151 | |||
| 152 | A thread node must be a leaf node. | ||
| 153 | |||
| 154 | A thread node must contain the following property: | ||
| 155 | |||
| 156 | - cpu | ||
| 157 | Usage: required | ||
| 158 | Value type: <phandle> | ||
| 159 | Definition: a phandle to the cpu node that corresponds to | ||
| 160 | the thread node. | ||
| 161 | |||
| 162 | =========================================== | ||
| 163 | 4 - Example dts | ||
| 164 | =========================================== | ||
| 165 | |||
| 166 | Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters): | ||
| 167 | |||
| 168 | cpus { | ||
| 169 | #size-cells = <0>; | ||
| 170 | #address-cells = <2>; | ||
| 171 | |||
| 172 | cpu-map { | ||
| 173 | cluster0 { | ||
| 174 | cluster0 { | ||
| 175 | core0 { | ||
| 176 | thread0 { | ||
| 177 | cpu = <&CPU0>; | ||
| 178 | }; | ||
| 179 | thread1 { | ||
| 180 | cpu = <&CPU1>; | ||
| 181 | }; | ||
| 182 | }; | ||
| 183 | |||
| 184 | core1 { | ||
| 185 | thread0 { | ||
| 186 | cpu = <&CPU2>; | ||
| 187 | }; | ||
| 188 | thread1 { | ||
| 189 | cpu = <&CPU3>; | ||
| 190 | }; | ||
| 191 | }; | ||
| 192 | }; | ||
| 193 | |||
| 194 | cluster1 { | ||
| 195 | core0 { | ||
| 196 | thread0 { | ||
| 197 | cpu = <&CPU4>; | ||
| 198 | }; | ||
| 199 | thread1 { | ||
| 200 | cpu = <&CPU5>; | ||
| 201 | }; | ||
| 202 | }; | ||
| 203 | |||
| 204 | core1 { | ||
| 205 | thread0 { | ||
| 206 | cpu = <&CPU6>; | ||
| 207 | }; | ||
| 208 | thread1 { | ||
| 209 | cpu = <&CPU7>; | ||
| 210 | }; | ||
| 211 | }; | ||
| 212 | }; | ||
| 213 | }; | ||
| 214 | |||
| 215 | cluster1 { | ||
| 216 | cluster0 { | ||
| 217 | core0 { | ||
| 218 | thread0 { | ||
| 219 | cpu = <&CPU8>; | ||
| 220 | }; | ||
| 221 | thread1 { | ||
| 222 | cpu = <&CPU9>; | ||
| 223 | }; | ||
| 224 | }; | ||
| 225 | core1 { | ||
| 226 | thread0 { | ||
| 227 | cpu = <&CPU10>; | ||
| 228 | }; | ||
| 229 | thread1 { | ||
| 230 | cpu = <&CPU11>; | ||
| 231 | }; | ||
| 232 | }; | ||
| 233 | }; | ||
| 234 | |||
| 235 | cluster1 { | ||
| 236 | core0 { | ||
| 237 | thread0 { | ||
| 238 | cpu = <&CPU12>; | ||
| 239 | }; | ||
| 240 | thread1 { | ||
| 241 | cpu = <&CPU13>; | ||
| 242 | }; | ||
| 243 | }; | ||
| 244 | core1 { | ||
| 245 | thread0 { | ||
| 246 | cpu = <&CPU14>; | ||
| 247 | }; | ||
| 248 | thread1 { | ||
| 249 | cpu = <&CPU15>; | ||
| 250 | }; | ||
| 251 | }; | ||
| 252 | }; | ||
| 253 | }; | ||
| 254 | }; | ||
| 255 | |||
| 256 | CPU0: cpu@0 { | ||
| 257 | device_type = "cpu"; | ||
| 258 | compatible = "arm,cortex-a57"; | ||
| 259 | reg = <0x0 0x0>; | ||
| 260 | enable-method = "spin-table"; | ||
| 261 | cpu-release-addr = <0 0x20000000>; | ||
| 262 | }; | ||
| 263 | |||
| 264 | CPU1: cpu@1 { | ||
| 265 | device_type = "cpu"; | ||
| 266 | compatible = "arm,cortex-a57"; | ||
| 267 | reg = <0x0 0x1>; | ||
| 268 | enable-method = "spin-table"; | ||
| 269 | cpu-release-addr = <0 0x20000000>; | ||
| 270 | }; | ||
| 271 | |||
| 272 | CPU2: cpu@100 { | ||
| 273 | device_type = "cpu"; | ||
| 274 | compatible = "arm,cortex-a57"; | ||
| 275 | reg = <0x0 0x100>; | ||
| 276 | enable-method = "spin-table"; | ||
| 277 | cpu-release-addr = <0 0x20000000>; | ||
| 278 | }; | ||
| 279 | |||
| 280 | CPU3: cpu@101 { | ||
| 281 | device_type = "cpu"; | ||
| 282 | compatible = "arm,cortex-a57"; | ||
| 283 | reg = <0x0 0x101>; | ||
| 284 | enable-method = "spin-table"; | ||
| 285 | cpu-release-addr = <0 0x20000000>; | ||
| 286 | }; | ||
| 287 | |||
| 288 | CPU4: cpu@10000 { | ||
| 289 | device_type = "cpu"; | ||
| 290 | compatible = "arm,cortex-a57"; | ||
| 291 | reg = <0x0 0x10000>; | ||
| 292 | enable-method = "spin-table"; | ||
| 293 | cpu-release-addr = <0 0x20000000>; | ||
| 294 | }; | ||
| 295 | |||
| 296 | CPU5: cpu@10001 { | ||
| 297 | device_type = "cpu"; | ||
| 298 | compatible = "arm,cortex-a57"; | ||
| 299 | reg = <0x0 0x10001>; | ||
| 300 | enable-method = "spin-table"; | ||
| 301 | cpu-release-addr = <0 0x20000000>; | ||
| 302 | }; | ||
| 303 | |||
| 304 | CPU6: cpu@10100 { | ||
| 305 | device_type = "cpu"; | ||
| 306 | compatible = "arm,cortex-a57"; | ||
| 307 | reg = <0x0 0x10100>; | ||
| 308 | enable-method = "spin-table"; | ||
| 309 | cpu-release-addr = <0 0x20000000>; | ||
| 310 | }; | ||
| 311 | |||
| 312 | CPU7: cpu@10101 { | ||
| 313 | device_type = "cpu"; | ||
| 314 | compatible = "arm,cortex-a57"; | ||
| 315 | reg = <0x0 0x10101>; | ||
| 316 | enable-method = "spin-table"; | ||
| 317 | cpu-release-addr = <0 0x20000000>; | ||
| 318 | }; | ||
| 319 | |||
| 320 | CPU8: cpu@100000000 { | ||
| 321 | device_type = "cpu"; | ||
| 322 | compatible = "arm,cortex-a57"; | ||
| 323 | reg = <0x1 0x0>; | ||
| 324 | enable-method = "spin-table"; | ||
| 325 | cpu-release-addr = <0 0x20000000>; | ||
| 326 | }; | ||
| 327 | |||
| 328 | CPU9: cpu@100000001 { | ||
| 329 | device_type = "cpu"; | ||
| 330 | compatible = "arm,cortex-a57"; | ||
| 331 | reg = <0x1 0x1>; | ||
| 332 | enable-method = "spin-table"; | ||
| 333 | cpu-release-addr = <0 0x20000000>; | ||
| 334 | }; | ||
| 335 | |||
| 336 | CPU10: cpu@100000100 { | ||
| 337 | device_type = "cpu"; | ||
| 338 | compatible = "arm,cortex-a57"; | ||
| 339 | reg = <0x1 0x100>; | ||
| 340 | enable-method = "spin-table"; | ||
| 341 | cpu-release-addr = <0 0x20000000>; | ||
| 342 | }; | ||
| 343 | |||
| 344 | CPU11: cpu@100000101 { | ||
| 345 | device_type = "cpu"; | ||
| 346 | compatible = "arm,cortex-a57"; | ||
| 347 | reg = <0x1 0x101>; | ||
| 348 | enable-method = "spin-table"; | ||
| 349 | cpu-release-addr = <0 0x20000000>; | ||
| 350 | }; | ||
| 351 | |||
| 352 | CPU12: cpu@100010000 { | ||
| 353 | device_type = "cpu"; | ||
| 354 | compatible = "arm,cortex-a57"; | ||
| 355 | reg = <0x1 0x10000>; | ||
| 356 | enable-method = "spin-table"; | ||
| 357 | cpu-release-addr = <0 0x20000000>; | ||
| 358 | }; | ||
| 359 | |||
| 360 | CPU13: cpu@100010001 { | ||
| 361 | device_type = "cpu"; | ||
| 362 | compatible = "arm,cortex-a57"; | ||
| 363 | reg = <0x1 0x10001>; | ||
| 364 | enable-method = "spin-table"; | ||
| 365 | cpu-release-addr = <0 0x20000000>; | ||
| 366 | }; | ||
| 367 | |||
| 368 | CPU14: cpu@100010100 { | ||
| 369 | device_type = "cpu"; | ||
| 370 | compatible = "arm,cortex-a57"; | ||
| 371 | reg = <0x1 0x10100>; | ||
| 372 | enable-method = "spin-table"; | ||
| 373 | cpu-release-addr = <0 0x20000000>; | ||
| 374 | }; | ||
| 375 | |||
| 376 | CPU15: cpu@100010101 { | ||
| 377 | device_type = "cpu"; | ||
| 378 | compatible = "arm,cortex-a57"; | ||
| 379 | reg = <0x1 0x10101>; | ||
| 380 | enable-method = "spin-table"; | ||
| 381 | cpu-release-addr = <0 0x20000000>; | ||
| 382 | }; | ||
| 383 | }; | ||
| 384 | |||
| 385 | Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT): | ||
| 386 | |||
| 387 | cpus { | ||
| 388 | #size-cells = <0>; | ||
| 389 | #address-cells = <1>; | ||
| 390 | |||
| 391 | cpu-map { | ||
| 392 | cluster0 { | ||
| 393 | core0 { | ||
| 394 | cpu = <&CPU0>; | ||
| 395 | }; | ||
| 396 | core1 { | ||
| 397 | cpu = <&CPU1>; | ||
| 398 | }; | ||
| 399 | core2 { | ||
| 400 | cpu = <&CPU2>; | ||
| 401 | }; | ||
| 402 | core3 { | ||
| 403 | cpu = <&CPU3>; | ||
| 404 | }; | ||
| 405 | }; | ||
| 406 | |||
| 407 | cluster1 { | ||
| 408 | core0 { | ||
| 409 | cpu = <&CPU4>; | ||
| 410 | }; | ||
| 411 | core1 { | ||
| 412 | cpu = <&CPU5>; | ||
| 413 | }; | ||
| 414 | core2 { | ||
| 415 | cpu = <&CPU6>; | ||
| 416 | }; | ||
| 417 | core3 { | ||
| 418 | cpu = <&CPU7>; | ||
| 419 | }; | ||
| 420 | }; | ||
| 421 | }; | ||
| 422 | |||
| 423 | CPU0: cpu@0 { | ||
| 424 | device_type = "cpu"; | ||
| 425 | compatible = "arm,cortex-a15"; | ||
| 426 | reg = <0x0>; | ||
| 427 | }; | ||
| 428 | |||
| 429 | CPU1: cpu@1 { | ||
| 430 | device_type = "cpu"; | ||
| 431 | compatible = "arm,cortex-a15"; | ||
| 432 | reg = <0x1>; | ||
| 433 | }; | ||
| 434 | |||
| 435 | CPU2: cpu@2 { | ||
| 436 | device_type = "cpu"; | ||
| 437 | compatible = "arm,cortex-a15"; | ||
| 438 | reg = <0x2>; | ||
| 439 | }; | ||
| 440 | |||
| 441 | CPU3: cpu@3 { | ||
| 442 | device_type = "cpu"; | ||
| 443 | compatible = "arm,cortex-a15"; | ||
| 444 | reg = <0x3>; | ||
| 445 | }; | ||
| 446 | |||
| 447 | CPU4: cpu@100 { | ||
| 448 | device_type = "cpu"; | ||
| 449 | compatible = "arm,cortex-a7"; | ||
| 450 | reg = <0x100>; | ||
| 451 | }; | ||
| 452 | |||
| 453 | CPU5: cpu@101 { | ||
| 454 | device_type = "cpu"; | ||
| 455 | compatible = "arm,cortex-a7"; | ||
| 456 | reg = <0x101>; | ||
| 457 | }; | ||
| 458 | |||
| 459 | CPU6: cpu@102 { | ||
| 460 | device_type = "cpu"; | ||
| 461 | compatible = "arm,cortex-a7"; | ||
| 462 | reg = <0x102>; | ||
| 463 | }; | ||
| 464 | |||
| 465 | CPU7: cpu@103 { | ||
| 466 | device_type = "cpu"; | ||
| 467 | compatible = "arm,cortex-a7"; | ||
| 468 | reg = <0x103>; | ||
| 469 | }; | ||
| 470 | }; | ||
| 471 | |||
| 472 | =============================================================================== | ||
| 473 | [1] ARM Linux kernel documentation | ||
| 474 | Documentation/devicetree/bindings/arm/cpus.txt | ||
| @@ -18,6 +18,15 @@ Required properties: · 17 unmodified lines | |||
| 18 | Optional properties: | 18 | Optional properties: |
| 19 | 19 | ||
| 20 | - interrupts : Interrupt source for parent controllers if the VIC is nested. | 20 | - interrupts : Interrupt source for parent controllers if the VIC is nested. |
| 21 | - valid-mask : A one cell big bit mask of valid interrupt sources. Each bit | ||
| 22 | represents single interrupt source, starting from source 0 at LSb and ending | ||
| 23 | at source 31 at MSb. A bit that is set means that the source is wired and | ||
| 24 | clear means otherwise. If unspecified, defaults to all valid. | ||
| 25 | - valid-wakeup-mask : A one cell big bit mask of interrupt sources that can be | ||
| 26 | configured as wake up source for the system. Order of bits is the same as for | ||
| 27 | valid-mask property. A set bit means that this interrupt source can be | ||
| 28 | configured as a wake up source for the system. If unspecied, defaults to all | ||
| 29 | interrupt sources configurable as wake up sources. | ||
| 21 | 30 | ||
| 22 | Example: | 31 | Example: |
| 23 | 32 | ||
| @@ -26,4 +35,7 @@ Example: · 2 unmodified lines | |||
| 26 | interrupt-controller; | 35 | interrupt-controller; |
| 27 | #interrupt-cells = <1>; | 36 | #interrupt-cells = <1>; |
| 28 | reg = <0x60000 0x1000>; | 37 | reg = <0x60000 0x1000>; |
| 38 | |||
| 39 | valid-mask = <0xffffff7f>; | ||
| 40 | valid-wakeup-mask = <0x0000ff7f>; | ||
| 29 | }; | 41 | }; |
| @@ -0,0 +1,11 @@ | |||
| 1 | * Clock bindings for Energy Micro efm32 Giant Gecko's Clock Management Unit | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be "efm32gg,cmu" | ||
| 5 | - reg: Base address and length of the register set | ||
| 6 | - interrupts: Interrupt used by the CMU | ||
| 7 | - #clock-cells: Should be <1> | ||
| 8 | |||
| 9 | The clock consumer should specify the desired clock by having the clock ID in | ||
| 10 | its "clocks" phandle cell. The header efm32-clk.h contains a list of available | ||
| 11 | IDs. | ||
| @@ -215,6 +215,11 @@ clocks and IDs. · 214 unmodified lines | |||
| 215 | cko2 200 | 215 | cko2 200 |
| 216 | cko 201 | 216 | cko 201 |
| 217 | vdoa 202 | 217 | vdoa 202 |
| 218 | pll4_audio_div 203 | ||
| 219 | lvds1_sel 204 | ||
| 220 | lvds2_sel 205 | ||
| 221 | lvds1_gate 206 | ||
| 222 | lvds2_gate 207 | ||
| 218 | 223 | ||
| 219 | Examples: | 224 | Examples: |
| 220 | 225 | ||
| @@ -0,0 +1,29 @@ | |||
| 1 | Status: Unstable - ABI compatibility may be broken in the future | ||
| 2 | |||
| 3 | Binding for Keystone gate control driver which uses PSC controller IP. | ||
| 4 | |||
| 5 | This binding uses the common clock binding[1]. | ||
| 6 | |||
| 7 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt | ||
| 8 | |||
| 9 | Required properties: | ||
| 10 | - compatible : shall be "ti,keystone,psc-clock". | ||
| 11 | - #clock-cells : from common clock binding; shall be set to 0. | ||
| 12 | - clocks : parent clock phandle | ||
| 13 | - reg : psc control and domain address address space | ||
| 14 | - reg-names : psc control and domain registers | ||
| 15 | - domain-id : psc domain id needed to check the transition state register | ||
| 16 | |||
| 17 | Optional properties: | ||
| 18 | - clock-output-names : From common clock binding to override the | ||
| 19 | default output clock name | ||
| 20 | Example: | ||
| 21 | clkusb: clkusb { | ||
| 22 | #clock-cells = <0>; | ||
| 23 | compatible = "ti,keystone,psc-clock"; | ||
| 24 | clocks = <&chipclk16>; | ||
| 25 | clock-output-names = "usb"; | ||
| 26 | reg = <0x02350008 0xb00>, <0x02350000 0x400>; | ||
| 27 | reg-names = "control", "domain"; | ||
| 28 | domain-id = <0>; | ||
| 29 | }; | ||
| @@ -0,0 +1,84 @@ | |||
| 1 | Status: Unstable - ABI compatibility may be broken in the future | ||
| 2 | |||
| 3 | Binding for keystone PLLs. The main PLL IP typically has a multiplier, | ||
| 4 | a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL | ||
| 5 | and PAPLL are controlled by the memory mapped register where as the Main | ||
| 6 | PLL is controlled by a PLL controller registers along with memory mapped | ||
| 7 | registers. | ||
| 8 | |||
| 9 | This binding uses the common clock binding[1]. | ||
| 10 | |||
| 11 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt | ||
| 12 | |||
| 13 | Required properties: | ||
| 14 | - #clock-cells : from common clock binding; shall be set to 0. | ||
| 15 | - compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock" | ||
| 16 | - clocks : parent clock phandle | ||
| 17 | - reg - pll control0 and pll multipler registers | ||
| 18 | - reg-names : control and multiplier. The multiplier is applicable only for | ||
| 19 | main pll clock | ||
| 20 | - fixed-postdiv : fixed post divider value | ||
| 21 | |||
| 22 | Example: | ||
| 23 | mainpllclk: mainpllclk@2310110 { | ||
| 24 | #clock-cells = <0>; | ||
| 25 | compatible = "ti,keystone,main-pll-clock"; | ||
| 26 | clocks = <&refclkmain>; | ||
| 27 | reg = <0x02620350 4>, <0x02310110 4>; | ||
| 28 | reg-names = "control", "multiplier"; | ||
| 29 | fixed-postdiv = <2>; | ||
| 30 | }; | ||
| 31 | |||
| 32 | papllclk: papllclk@2620358 { | ||
| 33 | #clock-cells = <0>; | ||
| 34 | compatible = "ti,keystone,pll-clock"; | ||
| 35 | clocks = <&refclkmain>; | ||
| 36 | clock-output-names = "pa-pll-clk"; | ||
| 37 | reg = <0x02620358 4>; | ||
| 38 | reg-names = "control"; | ||
| 39 | fixed-postdiv = <6>; | ||
| 40 | }; | ||
| 41 | |||
| 42 | Required properties: | ||
| 43 | - #clock-cells : from common clock binding; shall be set to 0. | ||
| 44 | - compatible : shall be "ti,keystone,pll-mux-clock" | ||
| 45 | - clocks : link phandles of parent clocks | ||
| 46 | - reg - pll mux register | ||
| 47 | - bit-shift : number of bits to shift the bit-mask | ||
| 48 | - bit-mask : arbitrary bitmask for programming the mux | ||
| 49 | |||
| 50 | Optional properties: | ||
| 51 | - clock-output-names : From common clock binding. | ||
| 52 | |||
| 53 | Example: | ||
| 54 | mainmuxclk: mainmuxclk@2310108 { | ||
| 55 | #clock-cells = <0>; | ||
| 56 | compatible = "ti,keystone,pll-mux-clock"; | ||
| 57 | clocks = <&mainpllclk>, <&refclkmain>; | ||
| 58 | reg = <0x02310108 4>; | ||
| 59 | bit-shift = <23>; | ||
| 60 | bit-mask = <1>; | ||
| 61 | clock-output-names = "mainmuxclk"; | ||
| 62 | }; | ||
| 63 | |||
| 64 | Required properties: | ||
| 65 | - #clock-cells : from common clock binding; shall be set to 0. | ||
| 66 | - compatible : shall be "ti,keystone,pll-divider-clock" | ||
| 67 | - clocks : parent clock phandle | ||
| 68 | - reg - pll mux register | ||
| 69 | - bit-shift : number of bits to shift the bit-mask | ||
| 70 | - bit-mask : arbitrary bitmask for programming the divider | ||
| 71 | |||
| 72 | Optional properties: | ||
| 73 | - clock-output-names : From common clock binding. | ||
| 74 | |||
| 75 | Example: | ||
| 76 | gemtraceclk: gemtraceclk@2310120 { | ||
| 77 | #clock-cells = <0>; | ||
| 78 | compatible = "ti,keystone,pll-divider-clock"; | ||
| 79 | clocks = <&mainmuxclk>; | ||
| 80 | reg = <0x02310120 4>; | ||
| 81 | bit-shift = <0>; | ||
| 82 | bit-mask = <8>; | ||
| 83 | clock-output-names = "gemtraceclk"; | ||
| 84 | }; | ||
| @@ -0,0 +1,19 @@ | |||
| 1 | * Core Divider Clock bindings for Marvell MVEBU SoCs | ||
| 2 | |||
| 3 | The following is a list of provided IDs and clock names on Armada 370/XP: | ||
| 4 | 0 = nand (NAND clock) | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible : must be "marvell,armada-370-corediv-clock" | ||
| 8 | - reg : must be the register address of Core Divider control register | ||
| 9 | - #clock-cells : from common clock binding; shall be set to 1 | ||
| 10 | - clocks : must be set to the parent's phandle | ||
| 11 | |||
| 12 | Example: | ||
| 13 | |||
| 14 | corediv_clk: corediv-clocks@18740 { | ||
| 15 | compatible = "marvell,armada-370-corediv-clock"; | ||
| 16 | reg = <0x18740 0xc>; | ||
| 17 | #clock-cells = <1>; | ||
| 18 | clocks = <&pll>; | ||
| 19 | }; | ||
| @@ -1,10 +1,10 @@ | |||
| 1 | * Gated Clock bindings for Marvell Orion SoCs | 1 | * Gated Clock bindings for Marvell EBU SoCs |
| 2 | 2 | ||
| 3 | Marvell Dove and Kirkwood allow some peripheral clocks to be gated to save | 3 | Marvell Armada 370/XP, Dove and Kirkwood allow some peripheral clocks to be |
| 4 | some power. The clock consumer should specify the desired clock by having | 4 | gated to save some power. The clock consumer should specify the desired clock |
| 5 | the clock ID in its "clocks" phandle cell. The clock ID is directly mapped to | 5 | by having the clock ID in its "clocks" phandle cell. The clock ID is directly |
| 6 | the corresponding clock gating control bit in HW to ease manual clock lookup | 6 | mapped to the corresponding clock gating control bit in HW to ease manual clock |
| 7 | in datasheet. | 7 | lookup in datasheet. |
| 8 | 8 | ||
| 9 | The following is a list of provided IDs for Armada 370: | 9 | The following is a list of provided IDs for Armada 370: |
| 10 | ID Clock Peripheral | 10 | ID Clock Peripheral |
| @@ -94,6 +94,8 @@ ID Clock Peripheral · 83 unmodified lines | |||
| 94 | 94 | ||
| 95 | Required properties: | 95 | Required properties: |
| 96 | - compatible : shall be one of the following: | 96 | - compatible : shall be one of the following: |
| 97 | "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating | ||
| 98 | "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating | ||
| 97 | "marvell,dove-gating-clock" - for Dove SoC clock gating | 99 | "marvell,dove-gating-clock" - for Dove SoC clock gating |
| 98 | "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating | 100 | "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating |
| 99 | - reg : shall be the register address of the Clock Gating Control register | 101 | - reg : shall be the register address of the Clock Gating Control register |
| @@ -45,8 +45,8 @@ Additionally, "allwinner,*-gates-clk" clocks require: · 44 unmodified lines | |||
| 45 | 45 | ||
| 46 | Clock consumers should specify the desired clocks they use with a | 46 | Clock consumers should specify the desired clocks they use with a |
| 47 | "clocks" phandle cell. Consumers that are using a gated clock should | 47 | "clocks" phandle cell. Consumers that are using a gated clock should |
| 48 | provide an additional ID in their clock property. The values of this | 48 | provide an additional ID in their clock property. This ID is the |
| 49 | ID are documented in sunxi/<soc>-gates.txt. | 49 | offset of the bit controlling this particular gate in the register. |
| 50 | 50 | ||
| 51 | For example: | 51 | For example: |
| 52 | 52 | ||
| @@ -1,93 +0,0 @@ | |||
| 1 | Gate clock outputs | ||
| 2 | ------------------ | ||
| 3 | |||
| 4 | * AXI gates ("allwinner,sun4i-axi-gates-clk") | ||
| 5 | |||
| 6 | DRAM 0 | ||
| 7 | |||
| 8 | * AHB gates ("allwinner,sun4i-ahb-gates-clk") | ||
| 9 | |||
| 10 | USB0 0 | ||
| 11 | EHCI0 1 | ||
| 12 | OHCI0 2* | ||
| 13 | EHCI1 3 | ||
| 14 | OHCI1 4* | ||
| 15 | SS 5 | ||
| 16 | DMA 6 | ||
| 17 | BIST 7 | ||
| 18 | MMC0 8 | ||
| 19 | MMC1 9 | ||
| 20 | MMC2 10 | ||
| 21 | MMC3 11 | ||
| 22 | MS 12** | ||
| 23 | NAND 13 | ||
| 24 | SDRAM 14 | ||
| 25 | |||
| 26 | ACE 16 | ||
| 27 | EMAC 17 | ||
| 28 | TS 18 | ||
| 29 | |||
| 30 | SPI0 20 | ||
| 31 | SPI1 21 | ||
| 32 | SPI2 22 | ||
| 33 | SPI3 23 | ||
| 34 | PATA 24 | ||
| 35 | SATA 25** | ||
| 36 | GPS 26* | ||
| 37 | |||
| 38 | VE 32 | ||
| 39 | TVD 33 | ||
| 40 | TVE0 34 | ||
| 41 | TVE1 35 | ||
| 42 | LCD0 36 | ||
| 43 | LCD1 37 | ||
| 44 | |||
| 45 | CSI0 40 | ||
| 46 | CSI1 41 | ||
| 47 | |||
| 48 | HDMI 43 | ||
| 49 | DE_BE0 44 | ||
| 50 | DE_BE1 45 | ||
| 51 | DE_FE1 46 | ||
| 52 | DE_FE1 47 | ||
| 53 | |||
| 54 | MP 50 | ||
| 55 | |||
| 56 | MALI400 52 | ||
| 57 | |||
| 58 | * APB0 gates ("allwinner,sun4i-apb0-gates-clk") | ||
| 59 | |||
| 60 | CODEC 0 | ||
| 61 | SPDIF 1* | ||
| 62 | AC97 2 | ||
| 63 | IIS 3 | ||
| 64 | |||
| 65 | PIO 5 | ||
| 66 | IR0 6 | ||
| 67 | IR1 7 | ||
| 68 | |||
| 69 | KEYPAD 10 | ||
| 70 | |||
| 71 | * APB1 gates ("allwinner,sun4i-apb1-gates-clk") | ||
| 72 | |||
| 73 | I2C0 0 | ||
| 74 | I2C1 1 | ||
| 75 | I2C2 2 | ||
| 76 | |||
| 77 | CAN 4 | ||
| 78 | SCR 5 | ||
| 79 | PS20 6 | ||
| 80 | PS21 7 | ||
| 81 | |||
| 82 | UART0 16 | ||
| 83 | UART1 17 | ||
| 84 | UART2 18 | ||
| 85 | UART3 19 | ||
| 86 | UART4 20 | ||
| 87 | UART5 21 | ||
| 88 | UART6 22 | ||
| 89 | UART7 23 | ||
| 90 | |||
| 91 | Notation: | ||
| 92 | [*]: The datasheet didn't mention these, but they are present on AW code | ||
| 93 | [**]: The datasheet had this marked as "NC" but they are used on AW code | ||
| @@ -1,75 +0,0 @@ | |||
| 1 | Gate clock outputs | ||
| 2 | ------------------ | ||
| 3 | |||
| 4 | * AXI gates ("allwinner,sun4i-axi-gates-clk") | ||
| 5 | |||
| 6 | DRAM 0 | ||
| 7 | |||
| 8 | * AHB gates ("allwinner,sun5i-a10s-ahb-gates-clk") | ||
| 9 | |||
| 10 | USB0 0 | ||
| 11 | EHCI0 1 | ||
| 12 | OHCI0 2 | ||
| 13 | |||
| 14 | SS 5 | ||
| 15 | DMA 6 | ||
| 16 | BIST 7 | ||
| 17 | MMC0 8 | ||
| 18 | MMC1 9 | ||
| 19 | MMC2 10 | ||
| 20 | |||
| 21 | NAND 13 | ||
| 22 | SDRAM 14 | ||
| 23 | |||
| 24 | EMAC 17 | ||
| 25 | TS 18 | ||
| 26 | |||
| 27 | SPI0 20 | ||
| 28 | SPI1 21 | ||
| 29 | SPI2 22 | ||
| 30 | |||
| 31 | GPS 26 | ||
| 32 | |||
| 33 | HSTIMER 28 | ||
| 34 | |||
| 35 | VE 32 | ||
| 36 | |||
| 37 | TVE 34 | ||
| 38 | |||
| 39 | LCD 36 | ||
| 40 | |||
| 41 | CSI 40 | ||
| 42 | |||
| 43 | HDMI 43 | ||
| 44 | DE_BE 44 | ||
| 45 | |||
| 46 | DE_FE 46 | ||
| 47 | |||
| 48 | IEP 51 | ||
| 49 | MALI400 52 | ||
| 50 | |||
| 51 | * APB0 gates ("allwinner,sun5i-a10s-apb0-gates-clk") | ||
| 52 | |||
| 53 | CODEC 0 | ||
| 54 | |||
| 55 | IIS 3 | ||
| 56 | |||
| 57 | PIO 5 | ||
| 58 | IR 6 | ||
| 59 | |||
| 60 | KEYPAD 10 | ||
| 61 | |||
| 62 | * APB1 gates ("allwinner,sun5i-a10s-apb1-gates-clk") | ||
| 63 | |||
| 64 | I2C0 0 | ||
| 65 | I2C1 1 | ||
| 66 | I2C2 2 | ||
| 67 | |||
| 68 | UART0 16 | ||
| 69 | UART1 17 | ||
| 70 | UART2 18 | ||
| 71 | UART3 19 | ||
| 72 | |||
| 73 | Notation: | ||
| 74 | [*]: The datasheet didn't mention these, but they are present on AW code | ||
| 75 | [**]: The datasheet had this marked as "NC" but they are used on AW code | ||
| @@ -1,58 +0,0 @@ | |||
| 1 | Gate clock outputs | ||
| 2 | ------------------ | ||
| 3 | |||
| 4 | * AXI gates ("allwinner,sun4i-axi-gates-clk") | ||
| 5 | |||
| 6 | DRAM 0 | ||
| 7 | |||
| 8 | * AHB gates ("allwinner,sun5i-a13-ahb-gates-clk") | ||
| 9 | |||
| 10 | USBOTG 0 | ||
| 11 | EHCI 1 | ||
| 12 | OHCI 2 | ||
| 13 | |||
| 14 | SS 5 | ||
| 15 | DMA 6 | ||
| 16 | BIST 7 | ||
| 17 | MMC0 8 | ||
| 18 | MMC1 9 | ||
| 19 | MMC2 10 | ||
| 20 | |||
| 21 | NAND 13 | ||
| 22 | SDRAM 14 | ||
| 23 | |||
| 24 | SPI0 20 | ||
| 25 | SPI1 21 | ||
| 26 | SPI2 22 | ||
| 27 | |||
| 28 | STIMER 28 | ||
| 29 | |||
| 30 | VE 32 | ||
| 31 | |||
| 32 | LCD 36 | ||
| 33 | |||
| 34 | CSI 40 | ||
| 35 | |||
| 36 | DE_BE 44 | ||
| 37 | |||
| 38 | DE_FE 46 | ||
| 39 | |||
| 40 | IEP 51 | ||
| 41 | MALI400 52 | ||
| 42 | |||
| 43 | * APB0 gates ("allwinner,sun5i-a13-apb0-gates-clk") | ||
| 44 | |||
| 45 | CODEC 0 | ||
| 46 | |||
| 47 | PIO 5 | ||
| 48 | IR 6 | ||
| 49 | |||
| 50 | * APB1 gates ("allwinner,sun5i-a13-apb1-gates-clk") | ||
| 51 | |||
| 52 | I2C0 0 | ||
| 53 | I2C1 1 | ||
| 54 | I2C2 2 | ||
| 55 | |||
| 56 | UART1 17 | ||
| 57 | |||
| 58 | UART3 19 | ||
| @@ -1,83 +0,0 @@ | |||
| 1 | Gate clock outputs | ||
| 2 | ------------------ | ||
| 3 | |||
| 4 | * AHB1 gates ("allwinner,sun6i-a31-ahb1-gates-clk") | ||
| 5 | |||
| 6 | MIPI DSI 1 | ||
| 7 | |||
| 8 | SS 5 | ||
| 9 | DMA 6 | ||
| 10 | |||
| 11 | MMC0 8 | ||
| 12 | MMC1 9 | ||
| 13 | MMC2 10 | ||
| 14 | MMC3 11 | ||
| 15 | |||
| 16 | NAND1 12 | ||
| 17 | NAND0 13 | ||
| 18 | SDRAM 14 | ||
| 19 | |||
| 20 | GMAC 17 | ||
| 21 | TS 18 | ||
| 22 | HSTIMER 19 | ||
| 23 | SPI0 20 | ||
| 24 | SPI1 21 | ||
| 25 | SPI2 22 | ||
| 26 | SPI3 23 | ||
| 27 | USB_OTG 24 | ||
| 28 | |||
| 29 | EHCI0 26 | ||
| 30 | EHCI1 27 | ||
| 31 | |||
| 32 | OHCI0 29 | ||
| 33 | OHCI1 30 | ||
| 34 | OHCI2 31 | ||
| 35 | VE 32 | ||
| 36 | |||
| 37 | LCD0 36 | ||
| 38 | LCD1 37 | ||
| 39 | |||
| 40 | CSI 40 | ||
| 41 | |||
| 42 | HDMI 43 | ||
| 43 | DE_BE0 44 | ||
| 44 | DE_BE1 45 | ||
| 45 | DE_FE1 46 | ||
| 46 | DE_FE1 47 | ||
| 47 | |||
| 48 | MP 50 | ||
| 49 | |||
| 50 | GPU 52 | ||
| 51 | |||
| 52 | DEU0 55 | ||
| 53 | DEU1 56 | ||
| 54 | DRC0 57 | ||
| 55 | DRC1 58 | ||
| 56 | |||
| 57 | * APB1 gates ("allwinner,sun6i-a31-apb1-gates-clk") | ||
| 58 | |||
| 59 | CODEC 0 | ||
| 60 | |||
| 61 | DIGITAL MIC 4 | ||
| 62 | PIO 5 | ||
| 63 | |||
| 64 | DAUDIO0 12 | ||
| 65 | DAUDIO1 13 | ||
| 66 | |||
| 67 | * APB2 gates ("allwinner,sun6i-a31-apb2-gates-clk") | ||
| 68 | |||
| 69 | I2C0 0 | ||
| 70 | I2C1 1 | ||
| 71 | I2C2 2 | ||
| 72 | I2C3 3 | ||
| 73 | |||
| 74 | UART0 16 | ||
| 75 | UART1 17 | ||
| 76 | UART2 18 | ||
| 77 | UART3 19 | ||
| 78 | UART4 20 | ||
| 79 | UART5 21 | ||
| 80 | |||
| 81 | Notation: | ||
| 82 | [*]: The datasheet didn't mention these, but they are present on AW code | ||
| 83 | [**]: The datasheet had this marked as "NC" but they are used on AW code | ||
| @@ -1,98 +0,0 @@ | |||
| 1 | Gate clock outputs | ||
| 2 | ------------------ | ||
| 3 | |||
| 4 | * AXI gates ("allwinner,sun4i-axi-gates-clk") | ||
| 5 | |||
| 6 | DRAM 0 | ||
| 7 | |||
| 8 | * AHB gates ("allwinner,sun7i-a20-ahb-gates-clk") | ||
| 9 | |||
| 10 | USB0 0 | ||
| 11 | EHCI0 1 | ||
| 12 | OHCI0 2 | ||
| 13 | EHCI1 3 | ||
| 14 | OHCI1 4 | ||
| 15 | SS 5 | ||
| 16 | DMA 6 | ||
| 17 | BIST 7 | ||
| 18 | MMC0 8 | ||
| 19 | MMC1 9 | ||
| 20 | MMC2 10 | ||
| 21 | MMC3 11 | ||
| 22 | MS 12 | ||
| 23 | NAND 13 | ||
| 24 | SDRAM 14 | ||
| 25 | |||
| 26 | ACE 16 | ||
| 27 | EMAC 17 | ||
| 28 | TS 18 | ||
| 29 | |||
| 30 | SPI0 20 | ||
| 31 | SPI1 21 | ||
| 32 | SPI2 22 | ||
| 33 | SPI3 23 | ||
| 34 | |||
| 35 | SATA 25 | ||
| 36 | |||
| 37 | HSTIMER 28 | ||
| 38 | |||
| 39 | VE 32 | ||
| 40 | TVD 33 | ||
| 41 | TVE0 34 | ||
| 42 | TVE1 35 | ||
| 43 | LCD0 36 | ||
| 44 | LCD1 37 | ||
| 45 | |||
| 46 | CSI0 40 | ||
| 47 | CSI1 41 | ||
| 48 | |||
| 49 | HDMI1 42 | ||
| 50 | HDMI0 43 | ||
| 51 | DE_BE0 44 | ||
| 52 | DE_BE1 45 | ||
| 53 | DE_FE1 46 | ||
| 54 | DE_FE1 47 | ||
| 55 | |||
| 56 | GMAC 49 | ||
| 57 | MP 50 | ||
| 58 | |||
| 59 | MALI400 52 | ||
| 60 | |||
| 61 | * APB0 gates ("allwinner,sun7i-a20-apb0-gates-clk") | ||
| 62 | |||
| 63 | CODEC 0 | ||
| 64 | SPDIF 1 | ||
| 65 | AC97 2 | ||
| 66 | IIS0 3 | ||
| 67 | IIS1 4 | ||
| 68 | PIO 5 | ||
| 69 | IR0 6 | ||
| 70 | IR1 7 | ||
| 71 | IIS2 8 | ||
| 72 | |||
| 73 | KEYPAD 10 | ||
| 74 | |||
| 75 | * APB1 gates ("allwinner,sun7i-a20-apb1-gates-clk") | ||
| 76 | |||
| 77 | I2C0 0 | ||
| 78 | I2C1 1 | ||
| 79 | I2C2 2 | ||
| 80 | I2C3 3 | ||
| 81 | CAN 4 | ||
| 82 | SCR 5 | ||
| 83 | PS20 6 | ||
| 84 | PS21 7 | ||
| 85 | |||
| 86 | I2C4 15 | ||
| 87 | UART0 16 | ||
| 88 | UART1 17 | ||
| 89 | UART2 18 | ||
| 90 | UART3 19 | ||
| 91 | UART4 20 | ||
| 92 | UART5 21 | ||
| 93 | UART6 22 | ||
| 94 | UART7 23 | ||
| 95 | |||
| 96 | Notation: | ||
| 97 | [*]: The datasheet didn't mention these, but they are present on AW code | ||
| 98 | [**]: The datasheet had this marked as "NC" but they are used on AW code | ||
| @@ -0,0 +1,111 @@ | |||
| 1 | Device Tree Clock bindings for APM X-Gene | ||
| 2 | |||
| 3 | This binding uses the common clock binding[1]. | ||
| 4 | |||
| 5 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt | ||
| 6 | |||
| 7 | Required properties: | ||
| 8 | - compatible : shall be one of the following: | ||
| 9 | "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock | ||
| 10 | "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock | ||
| 11 | "apm,xgene-device-clock" - for a X-Gene device clock | ||
| 12 | |||
| 13 | Required properties for SoC or PCP PLL clocks: | ||
| 14 | - reg : shall be the physical PLL register address for the pll clock. | ||
| 15 | - clocks : shall be the input parent clock phandle for the clock. This should | ||
| 16 | be the reference clock. | ||
| 17 | - #clock-cells : shall be set to 1. | ||
| 18 | - clock-output-names : shall be the name of the PLL referenced by derive | ||
| 19 | clock. | ||
| 20 | Optional properties for PLL clocks: | ||
| 21 | - clock-names : shall be the name of the PLL. If missing, use the device name. | ||
| 22 | |||
| 23 | Required properties for device clocks: | ||
| 24 | - reg : shall be a list of address and length pairs describing the CSR | ||
| 25 | reset and/or the divider. Either may be omitted, but at least | ||
| 26 | one must be present. | ||
| 27 | - reg-names : shall be a string list describing the reg resource. This | ||
| 28 | may include "csr-reg" and/or "div-reg". If this property | ||
| 29 | is not present, the reg property is assumed to describe | ||
| 30 | only "csr-reg". | ||
| 31 | - clocks : shall be the input parent clock phandle for the clock. | ||
| 32 | - #clock-cells : shall be set to 1. | ||
| 33 | - clock-output-names : shall be the name of the device referenced. | ||
| 34 | Optional properties for device clocks: | ||
| 35 | - clock-names : shall be the name of the device clock. If missing, use the | ||
| 36 | device name. | ||
| 37 | - csr-offset : Offset to the CSR reset register from the reset address base. | ||
| 38 | Default is 0. | ||
| 39 | - csr-mask : CSR reset mask bit. Default is 0xF. | ||
| 40 | - enable-offset : Offset to the enable register from the reset address base. | ||
| 41 | Default is 0x8. | ||
| 42 | - enable-mask : CSR enable mask bit. Default is 0xF. | ||
| 43 | - divider-offset : Offset to the divider CSR register from the divider base. | ||
| 44 | Default is 0x0. | ||
| 45 | - divider-width : Width of the divider register. Default is 0. | ||
| 46 | - divider-shift : Bit shift of the divider register. Default is 0. | ||
| 47 | |||
| 48 | For example: | ||
| 49 | |||
| 50 | pcppll: pcppll@17000100 { | ||
| 51 | compatible = "apm,xgene-pcppll-clock"; | ||
| 52 | #clock-cells = <1>; | ||
| 53 | clocks = <&refclk 0>; | ||
| 54 | clock-names = "pcppll"; | ||
| 55 | reg = <0x0 0x17000100 0x0 0x1000>; | ||
| 56 | clock-output-names = "pcppll"; | ||
| 57 | type = <0>; | ||
| 58 | }; | ||
| 59 | |||
| 60 | socpll: socpll@17000120 { | ||
| 61 | compatible = "apm,xgene-socpll-clock"; | ||
| 62 | #clock-cells = <1>; | ||
| 63 | clocks = <&refclk 0>; | ||
| 64 | clock-names = "socpll"; | ||
| 65 | reg = <0x0 0x17000120 0x0 0x1000>; | ||
| 66 | clock-output-names = "socpll"; | ||
| 67 | type = <1>; | ||
| 68 | }; | ||
| 69 | |||
| 70 | qmlclk: qmlclk { | ||
| 71 | compatible = "apm,xgene-device-clock"; | ||
| 72 | #clock-cells = <1>; | ||
| 73 | clocks = <&socplldiv2 0>; | ||
| 74 | clock-names = "qmlclk"; | ||
| 75 | reg = <0x0 0x1703C000 0x0 0x1000>; | ||
| 76 | reg-name = "csr-reg"; | ||
| 77 | clock-output-names = "qmlclk"; | ||
| 78 | }; | ||
| 79 | |||
| 80 | ethclk: ethclk { | ||
| 81 | compatible = "apm,xgene-device-clock"; | ||
| 82 | #clock-cells = <1>; | ||
| 83 | clocks = <&socplldiv2 0>; | ||
| 84 | clock-names = "ethclk"; | ||
| 85 | reg = <0x0 0x17000000 0x0 0x1000>; | ||
| 86 | reg-names = "div-reg"; | ||
| 87 | divider-offset = <0x238>; | ||
| 88 | divider-width = <0x9>; | ||
| 89 | divider-shift = <0x0>; | ||
| 90 | clock-output-names = "ethclk"; | ||
| 91 | }; | ||
| 92 | |||
| 93 | apbclk: apbclk { | ||
| 94 | compatible = "apm,xgene-device-clock"; | ||
| 95 | #clock-cells = <1>; | ||
| 96 | clocks = <&ahbclk 0>; | ||
| 97 | clock-names = "apbclk"; | ||
| 98 | reg = <0x0 0x1F2AC000 0x0 0x1000 | ||
| 99 | 0x0 0x1F2AC000 0x0 0x1000>; | ||
| 100 | reg-names = "csr-reg", "div-reg"; | ||
| 101 | csr-offset = <0x0>; | ||
| 102 | csr-mask = <0x200>; | ||
| 103 | enable-offset = <0x8>; | ||
| 104 | enable-mask = <0x200>; | ||
| 105 | divider-offset = <0x10>; | ||
| 106 | divider-width = <0x2>; | ||
| 107 | divider-shift = <0x0>; | ||
| 108 | flags = <0x8>; | ||
| 109 | clock-output-names = "apbclk"; | ||
| 110 | }; | ||
| 111 | |||
| @@ -0,0 +1,31 @@ | |||
| 1 | OMAP SoC AES crypto Module | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible : Should contain entries for this and backward compatible | ||
| 6 | AES versions: | ||
| 7 | - "ti,omap2-aes" for OMAP2. | ||
| 8 | - "ti,omap3-aes" for OMAP3. | ||
| 9 | - "ti,omap4-aes" for OMAP4 and AM33XX. | ||
| 10 | Note that the OMAP2 and 3 versions are compatible (OMAP3 supports | ||
| 11 | more algorithms) but they are incompatible with OMAP4. | ||
| 12 | - ti,hwmods: Name of the hwmod associated with the AES module | ||
| 13 | - reg : Offset and length of the register set for the module | ||
| 14 | - interrupts : the interrupt-specifier for the AES module. | ||
| 15 | |||
| 16 | Optional properties: | ||
| 17 | - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, | ||
| 18 | Documentation/devicetree/bindings/dma/dma.txt | ||
| 19 | - dma-names: DMA request names should include "tx" and "rx" if present. | ||
| 20 | |||
| 21 | Example: | ||
| 22 | /* AM335x */ | ||
| 23 | aes: aes@53500000 { | ||
| 24 | compatible = "ti,omap4-aes"; | ||
| 25 | ti,hwmods = "aes"; | ||
| 26 | reg = <0x53500000 0xa0>; | ||
| 27 | interrupts = <102>; | ||
| 28 | dmas = <&edma 6>, | ||
| 29 | <&edma 5>; | ||
| 30 | dma-names = "tx", "rx"; | ||
| 31 | }; | ||
| @@ -0,0 +1,30 @@ | |||
| 1 | OMAP SoC DES crypto Module | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible : Should contain "ti,omap4-des" | ||
| 6 | - ti,hwmods: Name of the hwmod associated with the DES module | ||
| 7 | - reg : Offset and length of the register set for the module | ||
| 8 | - interrupts : the interrupt-specifier for the DES module | ||
| 9 | - clocks : A phandle to the functional clock node of the DES module | ||
| 10 | corresponding to each entry in clock-names | ||
| 11 | - clock-names : Name of the functional clock, should be "fck" | ||
| 12 | |||
| 13 | Optional properties: | ||
| 14 | - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, | ||
| 15 | Documentation/devicetree/bindings/dma/dma.txt | ||
| 16 | Each entry corresponds to an entry in dma-names | ||
| 17 | - dma-names: DMA request names should include "tx" and "rx" if present | ||
| 18 | |||
| 19 | Example: | ||
| 20 | /* DRA7xx SoC */ | ||
| 21 | des: des@480a5000 { | ||
| 22 | compatible = "ti,omap4-des"; | ||
| 23 | ti,hwmods = "des"; | ||
| 24 | reg = <0x480a5000 0xa0>; | ||
| 25 | interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; | ||
| 26 | dmas = <&sdma 117>, <&sdma 116>; | ||
| 27 | dma-names = "tx", "rx"; | ||
| 28 | clocks = <&l3_iclk_div>; | ||
| 29 | clock-names = "fck"; | ||
| 30 | }; | ||
| @@ -0,0 +1,28 @@ | |||
| 1 | OMAP SoC SHA crypto Module | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible : Should contain entries for this and backward compatible | ||
| 6 | SHAM versions: | ||
| 7 | - "ti,omap2-sham" for OMAP2 & OMAP3. | ||
| 8 | - "ti,omap4-sham" for OMAP4 and AM33XX. | ||
| 9 | - "ti,omap5-sham" for OMAP5, DRA7 and AM43XX. | ||
| 10 | - ti,hwmods: Name of the hwmod associated with the SHAM module | ||
| 11 | - reg : Offset and length of the register set for the module | ||
| 12 | - interrupts : the interrupt-specifier for the SHAM module. | ||
| 13 | |||
| 14 | Optional properties: | ||
| 15 | - dmas: DMA specifiers for the rx dma. See the DMA client binding, | ||
| 16 | Documentation/devicetree/bindings/dma/dma.txt | ||
| 17 | - dma-names: DMA request name. Should be "rx" if a dma is present. | ||
| 18 | |||
| 19 | Example: | ||
| 20 | /* AM335x */ | ||
| 21 | sham: sham@53100000 { | ||
| 22 | compatible = "ti,omap4-sham"; | ||
| 23 | ti,hwmods = "sham"; | ||
| 24 | reg = <0x53100000 0x200>; | ||
| 25 | interrupts = <109>; | ||
| 26 | dmas = <&edma 36>; | ||
| 27 | dma-names = "rx"; | ||
| 28 | }; | ||
| @@ -28,7 +28,7 @@ The three cells in order are: · 27 unmodified lines | |||
| 28 | dependent: | 28 | dependent: |
| 29 | - bit 7-0: peripheral identifier for the hardware handshaking interface. The | 29 | - bit 7-0: peripheral identifier for the hardware handshaking interface. The |
| 30 | identifier can be different for tx and rx. | 30 | identifier can be different for tx and rx. |
| 31 | - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP. | 31 | - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP. |
| 32 | 32 | ||
| 33 | Example: | 33 | Example: |
| 34 | 34 | ||
| @@ -0,0 +1,36 @@ | |||
| 1 | * Abilis TB10x GPIO controller | ||
| 2 | |||
| 3 | Required Properties: | ||
| 4 | - compatible: Should be "abilis,tb10x-gpio" | ||
| 5 | - reg: Address and length of the register set for the device | ||
| 6 | - gpio-controller: Marks the device node as a gpio controller. | ||
| 7 | - #gpio-cells: Should be <2>. The first cell is the pin number and the | ||
| 8 | second cell is used to specify optional parameters: | ||
| 9 | - bit 0 specifies polarity (0 for normal, 1 for inverted). | ||
| 10 | - abilis,ngpio: the number of GPIO pins this driver controls. | ||
| 11 | |||
| 12 | Optional Properties: | ||
| 13 | - interrupt-controller: Marks the device node as an interrupt controller. | ||
| 14 | - #interrupt-cells: Should be <1>. Interrupts are triggered on both edges. | ||
| 15 | - interrupts: Defines the interrupt line connecting this GPIO controller to | ||
| 16 | its parent interrupt controller. | ||
| 17 | - interrupt-parent: Defines the parent interrupt controller. | ||
| 18 | |||
| 19 | GPIO ranges are specified as described in | ||
| 20 | Documentation/devicetree/bindings/gpio/gpio.txt | ||
| 21 | |||
| 22 | Example: | ||
| 23 | |||
| 24 | gpioa: gpio@FF140000 { | ||
| 25 | compatible = "abilis,tb10x-gpio"; | ||
| 26 | interrupt-controller; | ||
| 27 | #interrupt-cells = <1>; | ||
| 28 | interrupt-parent = <&tb10x_ictl>; | ||
| 29 | interrupts = <27 2>; | ||
| 30 | reg = <0xFF140000 0x1000>; | ||
| 31 | gpio-controller; | ||
| 32 | #gpio-cells = <2>; | ||
| 33 | abilis,ngpio = <3>; | ||
| 34 | gpio-ranges = <&iomux 0 0 0>; | ||
| 35 | gpio-ranges-group-names = "gpioa_pins"; | ||
| 36 | }; | ||
| @@ -0,0 +1,52 @@ | |||
| 1 | Broadcom Kona Family GPIO | ||
| 2 | ========================= | ||
| 3 | |||
| 4 | This GPIO driver is used in the following Broadcom SoCs: | ||
| 5 | BCM11130, BCM11140, BCM11351, BCM28145, BCM28155 | ||
| 6 | |||
| 7 | The Broadcom GPIO Controller IP can be configured prior to synthesis to | ||
| 8 | support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The | ||
| 9 | GPIO controller only supports edge, not level, triggering of interrupts. | ||
| 10 | |||
| 11 | Required properties | ||
| 12 | ------------------- | ||
| 13 | |||
| 14 | - compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio" | ||
| 15 | - reg: Physical base address and length of the controller's registers. | ||
| 16 | - interrupts: The interrupt outputs from the controller. There is one GPIO | ||
| 17 | interrupt per GPIO bank. The number of interrupts listed depends on the | ||
| 18 | number of GPIO banks on the SoC. The interrupts must be ordered by bank, | ||
| 19 | starting with bank 0. There is always a 1:1 mapping between banks and | ||
| 20 | IRQs. | ||
| 21 | - #gpio-cells: Should be <2>. The first cell is the pin number, the second | ||
| 22 | cell is used to specify optional parameters: | ||
| 23 | - bit 0 specifies polarity (0 for normal, 1 for inverted) | ||
| 24 | See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt. | ||
| 25 | - #interrupt-cells: Should be <2>. The first cell is the GPIO number. The | ||
| 26 | second cell is used to specify flags. The following subset of flags is | ||
| 27 | supported: | ||
| 28 | - trigger type (bits[1:0]): | ||
| 29 | 1 = low-to-high edge triggered. | ||
| 30 | 2 = high-to-low edge triggered. | ||
| 31 | 3 = low-to-high or high-to-low edge triggered | ||
| 32 | Valid values are 1, 2, 3 | ||
| 33 | See also .../devicetree/bindings/interrupt-controller/interrupts.txt. | ||
| 34 | - gpio-controller: Marks the device node as a GPIO controller. | ||
| 35 | - interrupt-controller: Marks the device node as an interrupt controller. | ||
| 36 | |||
| 37 | Example: | ||
| 38 | gpio: gpio@35003000 { | ||
| 39 | compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio"; | ||
| 40 | reg = <0x35003000 0x800>; | ||
| 41 | interrupts = | ||
| 42 | <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH | ||
| 43 | GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH | ||
| 44 | GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH | ||
| 45 | GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH | ||
| 46 | GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH | ||
| 47 | GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; | ||
| 48 | #gpio-cells = <2>; | ||
| 49 | #interrupt-cells = <2>; | ||
| 50 | gpio-controller; | ||
| 51 | interrupt-controller; | ||
| 52 | }; | ||
| @@ -0,0 +1,71 @@ | |||
| 1 | * PCF857x-compatible I/O expanders | ||
| 2 | |||
| 3 | The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be | ||
| 4 | driven high by a pull-up current source or driven low to ground. This combines | ||
| 5 | the direction and output level into a single bit per line, which can't be read | ||
| 6 | back. We can't actually know at initialization time whether a line is configured | ||
| 7 | (a) as output and driving the signal low/high, or (b) as input and reporting a | ||
| 8 | low/high value, without knowing the last value written since the chip came out | ||
| 9 | of reset (if any). The only reliable solution for setting up line direction is | ||
| 10 | thus to do it explicitly. | ||
| 11 | |||
| 12 | Required Properties: | ||
| 13 | |||
| 14 | - compatible: should be one of the following. | ||
| 15 | - "maxim,max7328": For the Maxim MAX7378 | ||
| 16 | - "maxim,max7329": For the Maxim MAX7329 | ||
| 17 | - "nxp,pca8574": For the NXP PCA8574 | ||
| 18 | - "nxp,pca8575": For the NXP PCA8575 | ||
| 19 | - "nxp,pca9670": For the NXP PCA9670 | ||
| 20 | - "nxp,pca9671": For the NXP PCA9671 | ||
| 21 | - "nxp,pca9672": For the NXP PCA9672 | ||
| 22 | - "nxp,pca9673": For the NXP PCA9673 | ||
| 23 | - "nxp,pca9674": For the NXP PCA9674 | ||
| 24 | - "nxp,pca9675": For the NXP PCA9675 | ||
| 25 | - "nxp,pcf8574": For the NXP PCF8574 | ||
| 26 | - "nxp,pcf8574a": For the NXP PCF8574A | ||
| 27 | - "nxp,pcf8575": For the NXP PCF8575 | ||
| 28 | - "ti,tca9554": For the TI TCA9554 | ||
| 29 | |||
| 30 | - reg: I2C slave address. | ||
| 31 | |||
| 32 | - gpio-controller: Marks the device node as a gpio controller. | ||
| 33 | - #gpio-cells: Should be 2. The first cell is the GPIO number and the second | ||
| 34 | cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the | ||
| 35 | GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. | ||
| 36 | |||
| 37 | Optional Properties: | ||
| 38 | |||
| 39 | - lines-initial-states: Bitmask that specifies the initial state of each | ||
| 40 | line. When a bit is set to zero, the corresponding line will be initialized to | ||
| 41 | the input (pulled-up) state. When the bit is set to one, the line will be | ||
| 42 | initialized the the low-level output state. If the property is not specified | ||
| 43 | all lines will be initialized to the input state. | ||
| 44 | |||
| 45 | The I/O expander can detect input state changes, and thus optionally act as | ||
| 46 | an interrupt controller. When the expander interrupt line is connected all the | ||
| 47 | following properties must be set. For more information please see the | ||
| 48 | interrupt controller device tree bindings documentation available at | ||
| 49 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt. | ||
| 50 | |||
| 51 | - interrupt-controller: Identifies the node as an interrupt controller. | ||
| 52 | - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2. | ||
| 53 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 54 | - interrupts: Interrupt specifier for the controllers interrupt. | ||
| 55 | |||
| 56 | |||
| 57 | Please refer to gpio.txt in this directory for details of the common GPIO | ||
| 58 | bindings used by client devices. | ||
| 59 | |||
| 60 | Example: PCF8575 I/O expander node | ||
| 61 | |||
| 62 | pcf8575: gpio@20 { | ||
| 63 | compatible = "nxp,pcf8575"; | ||
| 64 | reg = <0x20>; | ||
| 65 | interrupt-parent = <&irqpin2>; | ||
| 66 | interrupts = <3 0>; | ||
| 67 | gpio-controller; | ||
| 68 | #gpio-cells = <2>; | ||
| 69 | interrupt-controller; | ||
| 70 | #interrupt-cells = <2>; | ||
| 71 | }; | ||
| @@ -87,8 +87,10 @@ controllers. The gpio-ranges property described below represents this, and · 86 unmodified lines | |||
| 87 | contains information structures as follows: | 87 | contains information structures as follows: |
| 88 | 88 | ||
| 89 | gpio-range-list ::= <single-gpio-range> [gpio-range-list] | 89 | gpio-range-list ::= <single-gpio-range> [gpio-range-list] |
| 90 | single-gpio-range ::= | 90 | single-gpio-range ::= <numeric-gpio-range> | <named-gpio-range> |
| 91 | numeric-gpio-range ::= | ||
| 91 | <pinctrl-phandle> <gpio-base> <pinctrl-base> <count> | 92 | <pinctrl-phandle> <gpio-base> <pinctrl-base> <count> |
| 93 | named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>' | ||
| 92 | gpio-phandle : phandle to pin controller node. | 94 | gpio-phandle : phandle to pin controller node. |
| 93 | gpio-base : Base GPIO ID in the GPIO controller | 95 | gpio-base : Base GPIO ID in the GPIO controller |
| 94 | pinctrl-base : Base pinctrl pin ID in the pin controller | 96 | pinctrl-base : Base pinctrl pin ID in the pin controller |
| @@ -97,6 +99,19 @@ contains information structures as follows: · 2 unmodified lines | |||
| 97 | The "pin controller node" mentioned above must conform to the bindings | 99 | The "pin controller node" mentioned above must conform to the bindings |
| 98 | described in ../pinctrl/pinctrl-bindings.txt. | 100 | described in ../pinctrl/pinctrl-bindings.txt. |
| 99 | 101 | ||
| 102 | In case named gpio ranges are used (ranges with both <pinctrl-base> and | ||
| 103 | <count> set to 0), the property gpio-ranges-group-names contains one string | ||
| 104 | for every single-gpio-range in gpio-ranges: | ||
| 105 | gpiorange-names-list ::= <gpiorange-name> [gpiorange-names-list] | ||
| 106 | gpiorange-name : Name of the pingroup associated to the GPIO range in | ||
| 107 | the respective pin controller. | ||
| 108 | |||
| 109 | Elements of gpiorange-names-list corresponding to numeric ranges contain | ||
| 110 | the empty string. Elements of gpiorange-names-list corresponding to named | ||
| 111 | ranges contain the name of a pin group defined in the respective pin | ||
| 112 | controller. The number of pins/GPIOs in the range is the number of pins in | ||
| 113 | that pin group. | ||
| 114 | |||
| 100 | Previous versions of this binding required all pin controller nodes that | 115 | Previous versions of this binding required all pin controller nodes that |
| 101 | were referenced by any gpio-ranges property to contain a property named | 116 | were referenced by any gpio-ranges property to contain a property named |
| 102 | #gpio-range-cells with value <3>. This requirement is now deprecated. | 117 | #gpio-range-cells with value <3>. This requirement is now deprecated. |
| @@ -104,7 +119,7 @@ However, that property may still exist in older device trees for · 1 unmodified line | |||
| 104 | compatibility reasons, and would still be required even in new device | 119 | compatibility reasons, and would still be required even in new device |
| 105 | trees that need to be compatible with older software. | 120 | trees that need to be compatible with older software. |
| 106 | 121 | ||
| 107 | Example: | 122 | Example 1: |
| 108 | 123 | ||
| 109 | qe_pio_e: gpio-controller@1460 { | 124 | qe_pio_e: gpio-controller@1460 { |
| 110 | #gpio-cells = <2>; | 125 | #gpio-cells = <2>; |
| @@ -117,3 +132,24 @@ Example: · 6 unmodified lines | |||
| 117 | Here, a single GPIO controller has GPIOs 0..9 routed to pin controller | 132 | Here, a single GPIO controller has GPIOs 0..9 routed to pin controller |
| 118 | pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's | 133 | pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's |
| 119 | pins 50..59. | 134 | pins 50..59. |
| 135 | |||
| 136 | Example 2: | ||
| 137 | |||
| 138 | gpio_pio_i: gpio-controller@14B0 { | ||
| 139 | #gpio-cells = <2>; | ||
| 140 | compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; | ||
| 141 | reg = <0x1480 0x18>; | ||
| 142 | gpio-controller; | ||
| 143 | gpio-ranges = <&pinctrl1 0 20 10>, | ||
| 144 | <&pinctrl2 10 0 0>, | ||
| 145 | <&pinctrl1 15 0 10>, | ||
| 146 | <&pinctrl2 25 0 0>; | ||
| 147 | gpio-ranges-group-names = "", | ||
| 148 | "foo", | ||
| 149 | "", | ||
| 150 | "bar"; | ||
| 151 | }; | ||
| 152 | |||
| 153 | Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO | ||
| 154 | ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2 | ||
| 155 | are named "foo" and "bar". | ||
| @@ -0,0 +1,44 @@ | |||
| 1 | * LM90 series thermometer. | ||
| 2 | |||
| 3 | Required node properties: | ||
| 4 | - compatible: manufacturer and chip name, one of | ||
| 5 | "adi,adm1032" | ||
| 6 | "adi,adt7461" | ||
| 7 | "adi,adt7461a" | ||
| 8 | "gmt,g781" | ||
| 9 | "national,lm90" | ||
| 10 | "national,lm86" | ||
| 11 | "national,lm89" | ||
| 12 | "national,lm99" | ||
| 13 | "dallas,max6646" | ||
| 14 | "dallas,max6647" | ||
| 15 | "dallas,max6649" | ||
| 16 | "dallas,max6657" | ||
| 17 | "dallas,max6658" | ||
| 18 | "dallas,max6659" | ||
| 19 | "dallas,max6680" | ||
| 20 | "dallas,max6681" | ||
| 21 | "dallas,max6695" | ||
| 22 | "dallas,max6696" | ||
| 23 | "onnn,nct1008" | ||
| 24 | "winbond,w83l771" | ||
| 25 | "nxp,sa56004" | ||
| 26 | |||
| 27 | - reg: I2C bus address of the device | ||
| 28 | |||
| 29 | - vcc-supply: vcc regulator for the supply voltage. | ||
| 30 | |||
| 31 | Optional properties: | ||
| 32 | - interrupts: Contains a single interrupt specifier which describes the | ||
| 33 | LM90 "-ALERT" pin output. | ||
| 34 | See interrupt-controller/interrupts.txt for the format. | ||
| 35 | |||
| 36 | Example LM90 node: | ||
| 37 | |||
| 38 | temp-sensor { | ||
| 39 | compatible = "onnn,nct1008"; | ||
| 40 | reg = <0x4c>; | ||
| 41 | vcc-supply = <&palmas_ldo6_reg>; | ||
| 42 | interrupt-parent = <&gpio>; | ||
| 43 | interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>; | ||
| 44 | } | ||
| @@ -0,0 +1,22 @@ | |||
| 1 | OMAP SoC HWRNG Module | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible : Should contain entries for this and backward compatible | ||
| 6 | RNG versions: | ||
| 7 | - "ti,omap2-rng" for OMAP2. | ||
| 8 | - "ti,omap4-rng" for OMAP4, OMAP5 and AM33XX. | ||
| 9 | Note that these two versions are incompatible. | ||
| 10 | - ti,hwmods: Name of the hwmod associated with the RNG module | ||
| 11 | - reg : Offset and length of the register set for the module | ||
| 12 | - interrupts : the interrupt number for the RNG module. | ||
| 13 | Only used for "ti,omap4-rng". | ||
| 14 | |||
| 15 | Example: | ||
| 16 | /* AM335x */ | ||
| 17 | rng: rng@48310000 { | ||
| 18 | compatible = "ti,omap4-rng"; | ||
| 19 | ti,hwmods = "rng"; | ||
| 20 | reg = <0x48310000 0x2000>; | ||
| 21 | interrupts = <111>; | ||
| 22 | }; | ||
| @@ -0,0 +1,35 @@ | |||
| 1 | Broadcom Kona Family I2C | ||
| 2 | ========================= | ||
| 3 | |||
| 4 | This I2C controller is used in the following Broadcom SoCs: | ||
| 5 | |||
| 6 | BCM11130 | ||
| 7 | BCM11140 | ||
| 8 | BCM11351 | ||
| 9 | BCM28145 | ||
| 10 | BCM28155 | ||
| 11 | |||
| 12 | Required Properties | ||
| 13 | ------------------- | ||
| 14 | - compatible: "brcm,bcm11351-i2c", "brcm,kona-i2c" | ||
| 15 | - reg: Physical base address and length of controller registers | ||
| 16 | - interrupts: The interrupt number used by the controller | ||
| 17 | - clocks: clock specifier for the kona i2c external clock | ||
| 18 | - clock-frequency: The I2C bus frequency in Hz | ||
| 19 | - #address-cells: Should be <1> | ||
| 20 | - #size-cells: Should be <0> | ||
| 21 | |||
| 22 | Refer to clocks/clock-bindings.txt for generic clock consumer | ||
| 23 | properties. | ||
| 24 | |||
| 25 | Example: | ||
| 26 | |||
| 27 | i2c@3e016000 { | ||
| 28 | compatible = "brcm,bcm11351-i2c","brcm,kona-i2c"; | ||
| 29 | reg = <0x3e016000 0x80>; | ||
| 30 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; | ||
| 31 | clocks = <&bsc1_clk>; | ||
| 32 | clock-frequency = <400000>; | ||
| 33 | #address-cells = <1>; | ||
| 34 | #size-cells = <0>; | ||
| 35 | }; | ||
| @@ -0,0 +1,44 @@ | |||
| 1 | * Samsung's High Speed I2C controller | ||
| 2 | |||
| 3 | The Samsung's High Speed I2C controller is used to interface with I2C devices | ||
| 4 | at various speeds ranging from 100khz to 3.4Mhz. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: value should be. | ||
| 8 | -> "samsung,exynos5-hsi2c", for i2c compatible with exynos5 hsi2c. | ||
| 9 | - reg: physical base address of the controller and length of memory mapped | ||
| 10 | region. | ||
| 11 | - interrupts: interrupt number to the cpu. | ||
| 12 | - #address-cells: always 1 (for i2c addresses) | ||
| 13 | - #size-cells: always 0 | ||
| 14 | |||
| 15 | - Pinctrl: | ||
| 16 | - pinctrl-0: Pin control group to be used for this controller. | ||
| 17 | - pinctrl-names: Should contain only one value - "default". | ||
| 18 | |||
| 19 | Optional properties: | ||
| 20 | - clock-frequency: Desired operating frequency in Hz of the bus. | ||
| 21 | -> If not specified, the bus operates in fast-speed mode at | ||
| 22 | at 100khz. | ||
| 23 | -> If specified, the bus operates in high-speed mode only if the | ||
| 24 | clock-frequency is >= 1Mhz. | ||
| 25 | |||
| 26 | Example: | ||
| 27 | |||
| 28 | hsi2c@12ca0000 { | ||
| 29 | compatible = "samsung,exynos5-hsi2c"; | ||
| 30 | reg = <0x12ca0000 0x100>; | ||
| 31 | interrupts = <56>; | ||
| 32 | clock-frequency = <100000>; | ||
| 33 | |||
| 34 | pinctrl-0 = <&i2c4_bus>; | ||
| 35 | pinctrl-names = "default"; | ||
| 36 | |||
| 37 | #address-cells = <1>; | ||
| 38 | #size-cells = <0>; | ||
| 39 | |||
| 40 | s2mps11_pmic@66 { | ||
| 41 | compatible = "samsung,s2mps11-pmic"; | ||
| 42 | reg = <0x66>; | ||
| 43 | }; | ||
| 44 | }; | ||
| @@ -0,0 +1,23 @@ | |||
| 1 | I2C for R-Car platforms | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Must be one of | ||
| 5 | "renesas,i2c-rcar" | ||
| 6 | "renesas,i2c-r8a7778" | ||
| 7 | "renesas,i2c-r8a7779" | ||
| 8 | "renesas,i2c-r8a7790" | ||
| 9 | - reg: physical base address of the controller and length of memory mapped | ||
| 10 | region. | ||
| 11 | - interrupts: interrupt specifier. | ||
| 12 | |||
| 13 | Optional properties: | ||
| 14 | - clock-frequency: desired I2C bus clock frequency in Hz. The absence of this | ||
| 15 | propoerty indicates the default frequency 100 kHz. | ||
| 16 | |||
| 17 | Examples : | ||
| 18 | |||
| 19 | i2c0: i2c@e6500000 { | ||
| 20 | compatible = "renesas,i2c-rcar-h2"; | ||
| 21 | reg = <0 0xe6500000 0 0x428>; | ||
| 22 | interrupts = <0 174 0x4>; | ||
| 23 | }; | ||
| @@ -0,0 +1,41 @@ | |||
| 1 | ST SSC binding, for I2C mode operation | ||
| 2 | |||
| 3 | Required properties : | ||
| 4 | - compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c" | ||
| 5 | - reg : Offset and length of the register set for the device | ||
| 6 | - interrupts : the interrupt specifier | ||
| 7 | - clock-names: Must contain "ssc". | ||
| 8 | - clocks: Must contain an entry for each name in clock-names. See the common | ||
| 9 | clock bindings. | ||
| 10 | - A pinctrl state named "default" must be defined to set pins in mode of | ||
| 11 | operation for I2C transfer. | ||
| 12 | |||
| 13 | Optional properties : | ||
| 14 | - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified, | ||
| 15 | the default 100 kHz frequency will be used. As only Normal and Fast modes | ||
| 16 | are supported, possible values are 100000 and 400000. | ||
| 17 | - st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is | ||
| 18 | allowed through the deglitch circuit. In units of us. | ||
| 19 | - st,i2c-min-sda-pulse-width-us : The minimum valid SDA pulse width that is | ||
| 20 | allowed through the deglitch circuit. In units of us. | ||
| 21 | - A pinctrl state named "idle" could be defined to set pins in idle state | ||
| 22 | when I2C instance is not performing a transfer. | ||
| 23 | - A pinctrl state named "sleep" could be defined to set pins in sleep state | ||
| 24 | when driver enters in suspend. | ||
| 25 | |||
| 26 | |||
| 27 | |||
| 28 | Example : | ||
| 29 | |||
| 30 | i2c0: i2c@fed40000 { | ||
| 31 | compatible = "st,comms-ssc4-i2c"; | ||
| 32 | reg = <0xfed40000 0x110>; | ||
| 33 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; | ||
| 34 | clocks = <&CLK_S_ICN_REG_0>; | ||
| 35 | clock-names = "ssc"; | ||
| 36 | clock-frequency = <400000>; | ||
| 37 | pinctrl-names = "default"; | ||
| 38 | pinctrl-0 = <&pinctrl_i2c0_default>; | ||
| 39 | st,i2c-min-scl-pulse-width-us = <0>; | ||
| 40 | st,i2c-min-sda-pulse-width-us = <5>; | ||
| 41 | }; | ||
| @@ -15,6 +15,7 @@ adi,adt7461 +/-1C TDM Extended Temp Range I.C · 14 unmodified lines | |||
| 15 | adt7461 +/-1C TDM Extended Temp Range I.C | 15 | adt7461 +/-1C TDM Extended Temp Range I.C |
| 16 | at,24c08 i2c serial eeprom (24cxx) | 16 | at,24c08 i2c serial eeprom (24cxx) |
| 17 | atmel,24c02 i2c serial eeprom (24cxx) | 17 | atmel,24c02 i2c serial eeprom (24cxx) |
| 18 | atmel,at97sc3204t i2c trusted platform module (TPM) | ||
| 18 | catalyst,24c32 i2c serial eeprom | 19 | catalyst,24c32 i2c serial eeprom |
| 19 | dallas,ds1307 64 x 8, Serial, I2C Real-Time Clock | 20 | dallas,ds1307 64 x 8, Serial, I2C Real-Time Clock |
| 20 | dallas,ds1338 I2C RTC with 56-Byte NV RAM | 21 | dallas,ds1338 I2C RTC with 56-Byte NV RAM |
| @@ -35,6 +36,7 @@ fsl,mc13892 MC13892: Power Management Integrated Circuit (PMIC) for i.MX35/51 · 14 unmodified lines | |||
| 35 | fsl,mma8450 MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer | 36 | fsl,mma8450 MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer |
| 36 | fsl,mpr121 MPR121: Proximity Capacitive Touch Sensor Controller | 37 | fsl,mpr121 MPR121: Proximity Capacitive Touch Sensor Controller |
| 37 | fsl,sgtl5000 SGTL5000: Ultra Low-Power Audio Codec | 38 | fsl,sgtl5000 SGTL5000: Ultra Low-Power Audio Codec |
| 39 | gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface | ||
| 38 | infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz) | 40 | infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz) |
| 39 | infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz) | 41 | infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz) |
| 40 | maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator | 42 | maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator |
| @@ -44,6 +46,7 @@ mc,rv3029c2 Real Time Clock Module with I2C-Bus · 3 unmodified lines | |||
| 44 | national,lm75 I2C TEMP SENSOR | 46 | national,lm75 I2C TEMP SENSOR |
| 45 | national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor | 47 | national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor |
| 46 | national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface | 48 | national,lm92 ±0.33°C Accurate, 12-Bit + Sign Temperature Sensor and Thermal Window Comparator with Two-Wire Interface |
| 49 | nuvoton,npct501 i2c trusted platform module (TPM) | ||
| 47 | nxp,pca9556 Octal SMBus and I2C registered interface | 50 | nxp,pca9556 Octal SMBus and I2C registered interface |
| 48 | nxp,pca9557 8-bit I2C-bus and SMBus I/O port with reset | 51 | nxp,pca9557 8-bit I2C-bus and SMBus I/O port with reset |
| 49 | nxp,pcf8563 Real-time clock/calendar | 52 | nxp,pcf8563 Real-time clock/calendar |
| @@ -61,3 +64,4 @@ taos,tsl2550 Ambient Light Sensor with SMBUS/Two Wire Serial Interface · 11 unmodified lines | |||
| 61 | ti,tsc2003 I2C Touch-Screen Controller | 64 | ti,tsc2003 I2C Touch-Screen Controller |
| 62 | ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface | 65 | ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface |
| 63 | ti,tmp275 Digital Temperature Sensor | 66 | ti,tmp275 Digital Temperature Sensor |
| 67 | winbond,wpct301 i2c trusted platform module (TPM) | ||
| @@ -0,0 +1,26 @@ | |||
| 1 | * Capella CM36651 I2C Proximity and Color Light sensor | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "capella,cm36651" | ||
| 5 | - reg: the I2C address of the device | ||
| 6 | - interrupts: interrupt-specifier for the sole interrupt | ||
| 7 | generated by the device | ||
| 8 | - vled-supply: regulator for the IR LED. IR_LED is a part | ||
| 9 | of the cm36651 for proximity detection. | ||
| 10 | As covered in ../../regulator/regulator.txt | ||
| 11 | |||
| 12 | Example: | ||
| 13 | |||
| 14 | i2c_cm36651: i2c-gpio { | ||
| 15 | /* ... */ | ||
| 16 | |||
| 17 | cm36651@18 { | ||
| 18 | compatible = "capella,cm36651"; | ||
| 19 | reg = <0x18>; | ||
| 20 | interrupt-parent = <&gpx0>; | ||
| 21 | interrupts = <2 0>; | ||
| 22 | vled-supply = <&ps_als_reg>; | ||
| 23 | }; | ||
| 24 | |||
| 25 | /* ... */ | ||
| 26 | }; | ||
| @@ -0,0 +1,21 @@ | |||
| 1 | * Sharp GP2AP020A00F I2C Proximity/ALS sensor | ||
| 2 | |||
| 3 | The proximity detector sensor requires power supply | ||
| 4 | for its built-in led. It is also defined by this binding. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | |||
| 8 | - compatible : should be "sharp,gp2ap020a00f" | ||
| 9 | - reg : the I2C slave address of the light sensor | ||
| 10 | - interrupts : interrupt specifier for the sole interrupt generated | ||
| 11 | by the device | ||
| 12 | - vled-supply : VLED power supply, as covered in ../regulator/regulator.txt | ||
| 13 | |||
| 14 | Example: | ||
| 15 | |||
| 16 | gp2ap020a00f@39 { | ||
| 17 | compatible = "sharp,gp2ap020a00f"; | ||
| 18 | reg = <0x39>; | ||
| 19 | interrupts = <2 0>; | ||
| 20 | vled-supply = <...>; | ||
| 21 | }; | ||
| @@ -6,7 +6,7 @@ Required properties: · 5 unmodified lines | |||
| 6 | ti,wires: Wires refer to application modes i.e. 4/5/8 wire touchscreen | 6 | ti,wires: Wires refer to application modes i.e. 4/5/8 wire touchscreen |
| 7 | support on the platform. | 7 | support on the platform. |
| 8 | ti,x-plate-resistance: X plate resistance | 8 | ti,x-plate-resistance: X plate resistance |
| 9 | ti,coordiante-readouts: The sequencer supports a total of 16 | 9 | ti,coordinate-readouts: The sequencer supports a total of 16 |
| 10 | programmable steps each step is used to | 10 | programmable steps each step is used to |
| 11 | read a single coordinate. A single | 11 | read a single coordinate. A single |
| 12 | readout is enough but multiple reads can | 12 | readout is enough but multiple reads can |
| @@ -8,9 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - #interrupt-cells : Specifies the number of cells needed to encode an | 8 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 9 | interrupt source. The value shall be 1. | 9 | interrupt source. The value shall be 1. |
| 10 | 10 | ||
| 11 | For the valid interrupt sources for your SoC, see the documentation in | ||
| 12 | sunxi/<soc>.txt | ||
| 13 | |||
| 14 | Example: | 11 | Example: |
| 15 | 12 | ||
| 16 | intc: interrupt-controller { | 13 | intc: interrupt-controller { |
| @@ -4,16 +4,33 @@ Specifying interrupt information for devices · 3 unmodified lines | |||
| 4 | 1) Interrupt client nodes | 4 | 1) Interrupt client nodes |
| 5 | ------------------------- | 5 | ------------------------- |
| 6 | 6 | ||
| 7 | Nodes that describe devices which generate interrupts must contain an | 7 | Nodes that describe devices which generate interrupts must contain an either an |
| 8 | "interrupts" property. This property must contain a list of interrupt | 8 | "interrupts" property or an "interrupts-extended" property. These properties |
| 9 | specifiers, one per output interrupt. The format of the interrupt specifier is | 9 | contain a list of interrupt specifiers, one per output interrupt. The format of |
| 10 | determined by the interrupt controller to which the interrupts are routed; see | 10 | the interrupt specifier is determined by the interrupt controller to which the |
| 11 | section 2 below for details. | 11 | interrupts are routed; see section 2 below for details. |
| 12 | |||
| 13 | Example: | ||
| 14 | interrupt-parent = <&intc1>; | ||
| 15 | interrupts = <5 0>, <6 0>; | ||
| 12 | 16 | ||
| 13 | The "interrupt-parent" property is used to specify the controller to which | 17 | The "interrupt-parent" property is used to specify the controller to which |
| 14 | interrupts are routed and contains a single phandle referring to the interrupt | 18 | interrupts are routed and contains a single phandle referring to the interrupt |
| 15 | controller node. This property is inherited, so it may be specified in an | 19 | controller node. This property is inherited, so it may be specified in an |
| 16 | interrupt client node or in any of its parent nodes. | 20 | interrupt client node or in any of its parent nodes. Interrupts listed in the |
| 21 | "interrupts" property are always in reference to the node's interrupt parent. | ||
| 22 | |||
| 23 | The "interrupts-extended" property is a special form for use when a node needs | ||
| 24 | to reference multiple interrupt parents. Each entry in this property contains | ||
| 25 | both the parent phandle and the interrupt specifier. "interrupts-extended" | ||
| 26 | should only be used when a device has multiple interrupt parents. | ||
| 27 | |||
| 28 | Example: | ||
| 29 | interrupts-extended = <&intc1 5 1>, <&intc2 1 0>; | ||
| 30 | |||
| 31 | A device node may contain either "interrupts" or "interrupts-extended", but not | ||
| 32 | both. If both properties are present, then the operating system should log an | ||
| 33 | error and use only the data in "interrupts". | ||
| 17 | 34 | ||
| 18 | 2) Interrupt controller nodes | 35 | 2) Interrupt controller nodes |
| 19 | ----------------------------- | 36 | ----------------------------- |
| @@ -1,89 +0,0 @@ | |||
| 1 | Allwinner A10 (sun4i) interrupt sources | ||
| 2 | --------------------------------------- | ||
| 3 | |||
| 4 | The interrupt sources available for the Allwinner A10 SoC are the | ||
| 5 | following one: | ||
| 6 | |||
| 7 | 0: ENMI | ||
| 8 | 1: UART0 | ||
| 9 | 2: UART1 | ||
| 10 | 3: UART2 | ||
| 11 | 4: UART3 | ||
| 12 | 5: IR0 | ||
| 13 | 6: IR1 | ||
| 14 | 7: I2C0 | ||
| 15 | 8: I2C1 | ||
| 16 | 9: I2C2 | ||
| 17 | 10: SPI0 | ||
| 18 | 11: SPI1 | ||
| 19 | 12: SPI2 | ||
| 20 | 13: SPDIF | ||
| 21 | 14: AC97 | ||
| 22 | 15: TS | ||
| 23 | 16: I2S | ||
| 24 | 17: UART4 | ||
| 25 | 18: UART5 | ||
| 26 | 19: UART6 | ||
| 27 | 20: UART7 | ||
| 28 | 21: KEYPAD | ||
| 29 | 22: TIMER0 | ||
| 30 | 23: TIMER1 | ||
| 31 | 24: TIMER2 | ||
| 32 | 25: TIMER3 | ||
| 33 | 26: CAN | ||
| 34 | 27: DMA | ||
| 35 | 28: PIO | ||
| 36 | 29: TOUCH_PANEL | ||
| 37 | 30: AUDIO_CODEC | ||
| 38 | 31: LRADC | ||
| 39 | 32: MMC0 | ||
| 40 | 33: MMC1 | ||
| 41 | 34: MMC2 | ||
| 42 | 35: MMC3 | ||
| 43 | 36: MEMSTICK | ||
| 44 | 37: NAND | ||
| 45 | 38: USB0 | ||
| 46 | 39: USB1 | ||
| 47 | 40: USB2 | ||
| 48 | 41: SCR | ||
| 49 | 42: CSI0 | ||
| 50 | 43: CSI1 | ||
| 51 | 44: LCDCTRL0 | ||
| 52 | 45: LCDCTRL1 | ||
| 53 | 46: MP | ||
| 54 | 47: DEFEBE0 | ||
| 55 | 48: DEFEBE1 | ||
| 56 | 49: PMU | ||
| 57 | 50: SPI3 | ||
| 58 | 51: TZASC | ||
| 59 | 52: PATA | ||
| 60 | 53: VE | ||
| 61 | 54: SS | ||
| 62 | 55: EMAC | ||
| 63 | 56: SATA | ||
| 64 | 57: GPS | ||
| 65 | 58: HDMI | ||
| 66 | 59: TVE | ||
| 67 | 60: ACE | ||
| 68 | 61: TVD | ||
| 69 | 62: PS2_0 | ||
| 70 | 63: PS2_1 | ||
| 71 | 64: USB3 | ||
| 72 | 65: USB4 | ||
| 73 | 66: PLE_PFM | ||
| 74 | 67: TIMER4 | ||
| 75 | 68: TIMER5 | ||
| 76 | 69: GPU_GP | ||
| 77 | 70: GPU_GPMMU | ||
| 78 | 71: GPU_PP0 | ||
| 79 | 72: GPU_PPMMU0 | ||
| 80 | 73: GPU_PMU | ||
| 81 | 74: GPU_RSV0 | ||
| 82 | 75: GPU_RSV1 | ||
| 83 | 76: GPU_RSV2 | ||
| 84 | 77: GPU_RSV3 | ||
| 85 | 78: GPU_RSV4 | ||
| 86 | 79: GPU_RSV5 | ||
| 87 | 80: GPU_RSV6 | ||
| 88 | 82: SYNC_TIMER0 | ||
| 89 | 83: SYNC_TIMER1 | ||
| @@ -1,55 +0,0 @@ | |||
| 1 | Allwinner A13 (sun5i) interrupt sources | ||
| 2 | --------------------------------------- | ||
| 3 | |||
| 4 | The interrupt sources available for the Allwinner A13 SoC are the | ||
| 5 | following one: | ||
| 6 | |||
| 7 | 0: ENMI | ||
| 8 | 2: UART1 | ||
| 9 | 4: UART3 | ||
| 10 | 5: IR | ||
| 11 | 7: I2C0 | ||
| 12 | 8: I2C1 | ||
| 13 | 9: I2C2 | ||
| 14 | 10: SPI0 | ||
| 15 | 11: SPI1 | ||
| 16 | 12: SPI2 | ||
| 17 | 22: TIMER0 | ||
| 18 | 23: TIMER1 | ||
| 19 | 24: TIMER2 | ||
| 20 | 25: TIMER3 | ||
| 21 | 27: DMA | ||
| 22 | 28: PIO | ||
| 23 | 29: TOUCH_PANEL | ||
| 24 | 30: AUDIO_CODEC | ||
| 25 | 31: LRADC | ||
| 26 | 32: MMC0 | ||
| 27 | 33: MMC1 | ||
| 28 | 34: MMC2 | ||
| 29 | 37: NAND | ||
| 30 | 38: USB OTG | ||
| 31 | 39: USB EHCI | ||
| 32 | 40: USB OHCI | ||
| 33 | 42: CSI | ||
| 34 | 44: LCDCTRL | ||
| 35 | 47: DEFEBE | ||
| 36 | 49: PMU | ||
| 37 | 53: VE | ||
| 38 | 54: SS | ||
| 39 | 66: PLE_PFM | ||
| 40 | 67: TIMER4 | ||
| 41 | 68: TIMER5 | ||
| 42 | 69: GPU_GP | ||
| 43 | 70: GPU_GPMMU | ||
| 44 | 71: GPU_PP0 | ||
| 45 | 72: GPU_PPMMU0 | ||
| 46 | 73: GPU_PMU | ||
| 47 | 74: GPU_RSV0 | ||
| 48 | 75: GPU_RSV1 | ||
| 49 | 76: GPU_RSV2 | ||
| 50 | 77: GPU_RSV3 | ||
| 51 | 78: GPU_RSV4 | ||
| 52 | 79: GPU_RSV5 | ||
| 53 | 80: GPU_RSV6 | ||
| 54 | 82: SYNC_TIMER0 | ||
| 55 | 83: SYNC_TIMER1 | ||
| @@ -10,6 +10,7 @@ Each child has own specific current settings · 9 unmodified lines | |||
| 10 | - max-cur: Maximun current at each led channel. | 10 | - max-cur: Maximun current at each led channel. |
| 11 | 11 | ||
| 12 | Optional properties: | 12 | Optional properties: |
| 13 | - enable-gpio: GPIO attached to the chip's enable pin | ||
| 13 | - label: Used for naming LEDs | 14 | - label: Used for naming LEDs |
| 14 | - pwr-sel: LP8501 specific property. Power selection for output channels. | 15 | - pwr-sel: LP8501 specific property. Power selection for output channels. |
| 15 | 0: D1~9 are connected to VDD | 16 | 0: D1~9 are connected to VDD |
| @@ -17,12 +18,15 @@ Optional properties: · 1 unmodified line | |||
| 17 | 2: D1~6 with VOUT, D7~9 with VDD | 18 | 2: D1~6 with VOUT, D7~9 with VDD |
| 18 | 3: D1~9 are connected to VOUT | 19 | 3: D1~9 are connected to VOUT |
| 19 | 20 | ||
| 20 | Alternatively, each child can have specific channel name | 21 | Alternatively, each child can have a specific channel name and trigger: |
| 21 | - chan-name: Name of each channel name | 22 | - chan-name (optional): name of channel |
| 23 | - linux,default-trigger (optional): see | ||
| 24 | Documentation/devicetree/bindings/leds/common.txt | ||
| 22 | 25 | ||
| 23 | example 1) LP5521 | 26 | example 1) LP5521 |
| 24 | 3 LED channels, external clock used. Channel names are 'lp5521_pri:channel0', | 27 | 3 LED channels, external clock used. Channel names are 'lp5521_pri:channel0', |
| 25 | 'lp5521_pri:channel1' and 'lp5521_pri:channel2' | 28 | 'lp5521_pri:channel1' and 'lp5521_pri:channel2', with a heartbeat trigger |
| 29 | on channel 0. | ||
| 26 | 30 | ||
| 27 | lp5521@32 { | 31 | lp5521@32 { |
| 28 | compatible = "national,lp5521"; | 32 | compatible = "national,lp5521"; |
| @@ -33,6 +37,7 @@ lp5521@32 { · 4 unmodified lines | |||
| 33 | chan0 { | 37 | chan0 { |
| 34 | led-cur = /bits/ 8 <0x2f>; | 38 | led-cur = /bits/ 8 <0x2f>; |
| 35 | max-cur = /bits/ 8 <0x5f>; | 39 | max-cur = /bits/ 8 <0x5f>; |
| 40 | linux,default-trigger = "heartbeat"; | ||
| 36 | }; | 41 | }; |
| 37 | 42 | ||
| 38 | chan1 { | 43 | chan1 { |
| @@ -0,0 +1,29 @@ | |||
| 1 | Device-Tree bindings for ST IRB IP | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should contain "st,comms-irb". | ||
| 5 | - reg: Base physical address of the controller and length of memory | ||
| 6 | mapped region. | ||
| 7 | - interrupts: interrupt-specifier for the sole interrupt generated by | ||
| 8 | the device. The interrupt specifier format depends on the interrupt | ||
| 9 | controller parent. | ||
| 10 | - rx-mode: can be "infrared" or "uhf". This property specifies the L1 | ||
| 11 | protocol used for receiving remote control signals. rx-mode should | ||
| 12 | be present iff the rx pins are wired up. | ||
| 13 | - tx-mode: should be "infrared". This property specifies the L1 | ||
| 14 | protocol used for transmitting remote control signals. tx-mode should | ||
| 15 | be present iff the tx pins are wired up. | ||
| 16 | |||
| 17 | Optional properties: | ||
| 18 | - pinctrl-names, pinctrl-0: the pincontrol settings to configure muxing | ||
| 19 | properly for IRB pins. | ||
| 20 | - clocks : phandle with clock-specifier pair for IRB. | ||
| 21 | |||
| 22 | Example node: | ||
| 23 | |||
| 24 | rc: rc@fe518000 { | ||
| 25 | compatible = "st,comms-irb"; | ||
| 26 | reg = <0xfe518000 0x234>; | ||
| 27 | interrupts = <0 203 0>; | ||
| 28 | rx-mode = "infrared"; | ||
| 29 | }; | ||
| @@ -1,168 +0,0 @@ | |||
| 1 | *** Memory binding *** | ||
| 2 | |||
| 3 | The /memory node provides basic information about the address and size | ||
| 4 | of the physical memory. This node is usually filled or updated by the | ||
| 5 | bootloader, depending on the actual memory configuration of the given | ||
| 6 | hardware. | ||
| 7 | |||
| 8 | The memory layout is described by the following node: | ||
| 9 | |||
| 10 | / { | ||
| 11 | #address-cells = <(n)>; | ||
| 12 | #size-cells = <(m)>; | ||
| 13 | memory { | ||
| 14 | device_type = "memory"; | ||
| 15 | reg = <(baseaddr1) (size1) | ||
| 16 | (baseaddr2) (size2) | ||
| 17 | ... | ||
| 18 | (baseaddrN) (sizeN)>; | ||
| 19 | }; | ||
| 20 | ... | ||
| 21 | }; | ||
| 22 | |||
| 23 | A memory node follows the typical device tree rules for "reg" property: | ||
| 24 | n: number of cells used to store base address value | ||
| 25 | m: number of cells used to store size value | ||
| 26 | baseaddrX: defines a base address of the defined memory bank | ||
| 27 | sizeX: the size of the defined memory bank | ||
| 28 | |||
| 29 | |||
| 30 | More than one memory bank can be defined. | ||
| 31 | |||
| 32 | |||
| 33 | *** Reserved memory regions *** | ||
| 34 | |||
| 35 | In /memory/reserved-memory node one can create child nodes describing | ||
| 36 | particular reserved (excluded from normal use) memory regions. Such | ||
| 37 | memory regions are usually designed for the special usage by various | ||
| 38 | device drivers. A good example are contiguous memory allocations or | ||
| 39 | memory sharing with other operating system on the same hardware board. | ||
| 40 | Those special memory regions might depend on the board configuration and | ||
| 41 | devices used on the target system. | ||
| 42 | |||
| 43 | Parameters for each memory region can be encoded into the device tree | ||
| 44 | with the following convention: | ||
| 45 | |||
| 46 | [(label):] (name) { | ||
| 47 | compatible = "linux,contiguous-memory-region", "reserved-memory-region"; | ||
| 48 | reg = <(address) (size)>; | ||
| 49 | (linux,default-contiguous-region); | ||
| 50 | }; | ||
| 51 | |||
| 52 | compatible: one or more of: | ||
| 53 | - "linux,contiguous-memory-region" - enables binding of this | ||
| 54 | region to Contiguous Memory Allocator (special region for | ||
| 55 | contiguous memory allocations, shared with movable system | ||
| 56 | memory, Linux kernel-specific). | ||
| 57 | - "reserved-memory-region" - compatibility is defined, given | ||
| 58 | region is assigned for exclusive usage for by the respective | ||
| 59 | devices. | ||
| 60 | |||
| 61 | reg: standard property defining the base address and size of | ||
| 62 | the memory region | ||
| 63 | |||
| 64 | linux,default-contiguous-region: property indicating that the region | ||
| 65 | is the default region for all contiguous memory | ||
| 66 | allocations, Linux specific (optional) | ||
| 67 | |||
| 68 | It is optional to specify the base address, so if one wants to use | ||
| 69 | autoconfiguration of the base address, '0' can be specified as a base | ||
| 70 | address in the 'reg' property. | ||
| 71 | |||
| 72 | The /memory/reserved-memory node must contain the same #address-cells | ||
| 73 | and #size-cells value as the root node. | ||
| 74 | |||
| 75 | |||
| 76 | *** Device node's properties *** | ||
| 77 | |||
| 78 | Once regions in the /memory/reserved-memory node have been defined, they | ||
| 79 | may be referenced by other device nodes. Bindings that wish to reference | ||
| 80 | memory regions should explicitly document their use of the following | ||
| 81 | property: | ||
| 82 | |||
| 83 | memory-region = <&phandle_to_defined_region>; | ||
| 84 | |||
| 85 | This property indicates that the device driver should use the memory | ||
| 86 | region pointed by the given phandle. | ||
| 87 | |||
| 88 | |||
| 89 | *** Example *** | ||
| 90 | |||
| 91 | This example defines a memory consisting of 4 memory banks. 3 contiguous | ||
| 92 | regions are defined for Linux kernel, one default of all device drivers | ||
| 93 | (named contig_mem, placed at 0x72000000, 64MiB), one dedicated to the | ||
| 94 | framebuffer device (labelled display_mem, placed at 0x78000000, 8MiB) | ||
| 95 | and one for multimedia processing (labelled multimedia_mem, placed at | ||
| 96 | 0x77000000, 64MiB). 'display_mem' region is then assigned to fb@12300000 | ||
| 97 | device for DMA memory allocations (Linux kernel drivers will use CMA is | ||
| 98 | available or dma-exclusive usage otherwise). 'multimedia_mem' is | ||
| 99 | assigned to scaler@12500000 and codec@12600000 devices for contiguous | ||
| 100 | memory allocations when CMA driver is enabled. | ||
| 101 | |||
| 102 | The reason for creating a separate region for framebuffer device is to | ||
| 103 | match the framebuffer base address to the one configured by bootloader, | ||
| 104 | so once Linux kernel drivers starts no glitches on the displayed boot | ||
| 105 | logo appears. Scaller and codec drivers should share the memory | ||
| 106 | allocations. | ||
| 107 | |||
| 108 | / { | ||
| 109 | #address-cells = <1>; | ||
| 110 | #size-cells = <1>; | ||
| 111 | |||
| 112 | /* ... */ | ||
| 113 | |||
| 114 | memory { | ||
| 115 | reg = <0x40000000 0x10000000 | ||
| 116 | 0x50000000 0x10000000 | ||
| 117 | 0x60000000 0x10000000 | ||
| 118 | 0x70000000 0x10000000>; | ||
| 119 | |||
| 120 | reserved-memory { | ||
| 121 | #address-cells = <1>; | ||
| 122 | #size-cells = <1>; | ||
| 123 | |||
| 124 | /* | ||
| 125 | * global autoconfigured region for contiguous allocations | ||
| 126 | * (used only with Contiguous Memory Allocator) | ||
| 127 | */ | ||
| 128 | contig_region@0 { | ||
| 129 | compatible = "linux,contiguous-memory-region"; | ||
| 130 | reg = <0x0 0x4000000>; | ||
| 131 | linux,default-contiguous-region; | ||
| 132 | }; | ||
| 133 | |||
| 134 | /* | ||
| 135 | * special region for framebuffer | ||
| 136 | */ | ||
| 137 | display_region: region@78000000 { | ||
| 138 | compatible = "linux,contiguous-memory-region", "reserved-memory-region"; | ||
| 139 | reg = <0x78000000 0x800000>; | ||
| 140 | }; | ||
| 141 | |||
| 142 | /* | ||
| 143 | * special region for multimedia processing devices | ||
| 144 | */ | ||
| 145 | multimedia_region: region@77000000 { | ||
| 146 | compatible = "linux,contiguous-memory-region"; | ||
| 147 | reg = <0x77000000 0x4000000>; | ||
| 148 | }; | ||
| 149 | }; | ||
| 150 | }; | ||
| 151 | |||
| 152 | /* ... */ | ||
| 153 | |||
| 154 | fb0: fb@12300000 { | ||
| 155 | status = "okay"; | ||
| 156 | memory-region = <&display_region>; | ||
| 157 | }; | ||
| 158 | |||
| 159 | scaler: scaler@12500000 { | ||
| 160 | status = "okay"; | ||
| 161 | memory-region = <&multimedia_region>; | ||
| 162 | }; | ||
| 163 | |||
| 164 | codec: codec@12600000 { | ||
| 165 | status = "okay"; | ||
| 166 | memory-region = <&multimedia_region>; | ||
| 167 | }; | ||
| 168 | }; | ||
| @@ -0,0 +1,194 @@ | |||
| 1 | * ams AS3722 Power management IC. | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | ------------------- | ||
| 5 | - compatible: Must be "ams,as3722". | ||
| 6 | - reg: I2C device address. | ||
| 7 | - interrupt-controller: AS3722 has internal interrupt controller which takes the | ||
| 8 | interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well | ||
| 9 | as external input. | ||
| 10 | - #interrupt-cells: Should be set to 2 for IRQ number and flags. | ||
| 11 | The first cell is the IRQ number. IRQ numbers for different interrupt source | ||
| 12 | of AS3722 are defined at dt-bindings/mfd/as3722.h | ||
| 13 | The second cell is the flags, encoded as the trigger masks from binding document | ||
| 14 | interrupts.txt, using dt-bindings/irq. | ||
| 15 | |||
| 16 | Optional submodule and their properties: | ||
| 17 | ======================================= | ||
| 18 | |||
| 19 | Pinmux and GPIO: | ||
| 20 | =============== | ||
| 21 | Device has 8 GPIO pins which can be configured as GPIO as well as the special IO | ||
| 22 | functions. | ||
| 23 | |||
| 24 | Please refer to pinctrl-bindings.txt in this directory for details of the | ||
| 25 | common pinctrl bindings used by client devices, including the meaning of the | ||
| 26 | phrase "pin configuration node". | ||
| 27 | |||
| 28 | Following are properties which is needed if GPIO and pinmux functionality | ||
| 29 | is required: | ||
| 30 | Required properties: | ||
| 31 | ------------------- | ||
| 32 | - gpio-controller: Marks the device node as a GPIO controller. | ||
| 33 | - #gpio-cells: Number of GPIO cells. Refer to binding document | ||
| 34 | gpio/gpio.txt | ||
| 35 | |||
| 36 | Optional properties: | ||
| 37 | -------------------- | ||
| 38 | Following properties are require if pin control setting is required | ||
| 39 | at boot. | ||
| 40 | - pinctrl-names: A pinctrl state named "default" be defined, using the | ||
| 41 | bindings in pinctrl/pinctrl-binding.txt. | ||
| 42 | - pinctrl[0...n]: Properties to contain the phandle that refer to | ||
| 43 | different nodes of pin control settings. These nodes represents | ||
| 44 | the pin control setting of state 0 to state n. Each of these | ||
| 45 | nodes contains different subnodes to represents some desired | ||
| 46 | configuration for a list of pins. This configuration can | ||
| 47 | include the mux function to select on those pin(s), and | ||
| 48 | various pin configuration parameters, such as pull-up, | ||
| 49 | open drain. | ||
| 50 | |||
| 51 | Each subnode have following properties: | ||
| 52 | Required properties: | ||
| 53 | - pins: List of pins. Valid values of pins properties are: | ||
| 54 | gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, | ||
| 55 | gpio6, gpio7 | ||
| 56 | |||
| 57 | Optional properties: | ||
| 58 | function, bias-disable, bias-pull-up, bias-pull-down, | ||
| 59 | bias-high-impedance, drive-open-drain. | ||
| 60 | |||
| 61 | Valid values for function properties are: | ||
| 62 | gpio, interrupt-out, gpio-in-interrupt, | ||
| 63 | vsup-vbat-low-undebounce-out, | ||
| 64 | vsup-vbat-low-debounce-out, | ||
| 65 | voltage-in-standby, oc-pg-sd0, oc-pg-sd6, | ||
| 66 | powergood-out, pwm-in, pwm-out, clk32k-out, | ||
| 67 | watchdog-in, soft-reset-in | ||
| 68 | |||
| 69 | Regulators: | ||
| 70 | =========== | ||
| 71 | Device has multiple DCDC and LDOs. The node "regulators" is require if regulator | ||
| 72 | functionality is needed. | ||
| 73 | |||
| 74 | Following are properties of regulator subnode. | ||
| 75 | |||
| 76 | Optional properties: | ||
| 77 | ------------------- | ||
| 78 | The input supply of regulators are the optional properties on the | ||
| 79 | regulator node. The input supply of these regulators are provided | ||
| 80 | through following properties: | ||
| 81 | vsup-sd2-supply: Input supply for SD2. | ||
| 82 | vsup-sd3-supply: Input supply for SD3. | ||
| 83 | vsup-sd4-supply: Input supply for SD4. | ||
| 84 | vsup-sd5-supply: Input supply for SD5. | ||
| 85 | vin-ldo0-supply: Input supply for LDO0. | ||
| 86 | vin-ldo1-6-supply: Input supply for LDO1 and LDO6. | ||
| 87 | vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7. | ||
| 88 | vin-ldo3-4-supply: Input supply for LDO3 and LDO4. | ||
| 89 | vin-ldo9-10-supply: Input supply for LDO9 and LDO10. | ||
| 90 | vin-ldo11-supply: Input supply for LDO11. | ||
| 91 | |||
| 92 | Optional sub nodes for regulators: | ||
| 93 | --------------------------------- | ||
| 94 | The subnodes name is the name of regulator and it must be one of: | ||
| 95 | sd[0-6], ldo[0-7], ldo[9-11] | ||
| 96 | |||
| 97 | Each sub-node should contain the constraints and initialization | ||
| 98 | information for that regulator. See regulator.txt for a description | ||
| 99 | of standard properties for these sub-nodes. | ||
| 100 | Additional optional custom properties are listed below. | ||
| 101 | ams,ext-control: External control of the rail. The option of | ||
| 102 | this properties will tell which external input is | ||
| 103 | controlling this rail. Valid values are 0, 1, 2 ad 3. | ||
| 104 | 0: There is no external control of this rail. | ||
| 105 | 1: Rail is controlled by ENABLE1 input pin. | ||
| 106 | 2: Rail is controlled by ENABLE2 input pin. | ||
| 107 | 3: Rail is controlled by ENABLE3 input pin. | ||
| 108 | Missing this property on DT will be assume as no | ||
| 109 | external control. The external control pin macros | ||
| 110 | are defined @dt-bindings/mfd/as3722.h | ||
| 111 | |||
| 112 | ams,enable-tracking: Enable tracking with SD1, only supported | ||
| 113 | by LDO3. | ||
| 114 | |||
| 115 | Example: | ||
| 116 | -------- | ||
| 117 | #include <dt-bindings/mfd/as3722.h> | ||
| 118 | ... | ||
| 119 | ams3722 { | ||
| 120 | compatible = "ams,as3722"; | ||
| 121 | reg = <0x48>; | ||
| 122 | |||
| 123 | interrupt-parent = <&intc>; | ||
| 124 | interrupt-controller; | ||
| 125 | #interrupt-cells = <2>; | ||
| 126 | |||
| 127 | gpio-controller; | ||
| 128 | #gpio-cells = <2>; | ||
| 129 | |||
| 130 | pinctrl-names = "default"; | ||
| 131 | pinctrl-0 = <&as3722_default>; | ||
| 132 | |||
| 133 | as3722_default: pinmux { | ||
| 134 | gpio0 { | ||
| 135 | pins = "gpio0"; | ||
| 136 | function = "gpio"; | ||
| 137 | bias-pull-down; | ||
| 138 | }; | ||
| 139 | |||
| 140 | gpio1_2_4_7 { | ||
| 141 | pins = "gpio1", "gpio2", "gpio4", "gpio7"; | ||
| 142 | function = "gpio"; | ||
| 143 | bias-pull-up; | ||
| 144 | }; | ||
| 145 | |||
| 146 | gpio5 { | ||
| 147 | pins = "gpio5"; | ||
| 148 | function = "clk32k_out"; | ||
| 149 | }; | ||
| 150 | } | ||
| 151 | |||
| 152 | regulators { | ||
| 153 | vsup-sd2-supply = <...>; | ||
| 154 | ... | ||
| 155 | |||
| 156 | sd0 { | ||
| 157 | regulator-name = "vdd_cpu"; | ||
| 158 | regulator-min-microvolt = <700000>; | ||
| 159 | regulator-max-microvolt = <1400000>; | ||
| 160 | regulator-always-on; | ||
| 161 | ams,ext-control = <2>; | ||
| 162 | }; | ||
| 163 | |||
| 164 | sd1 { | ||
| 165 | regulator-name = "vdd_core"; | ||
| 166 | regulator-min-microvolt = <700000>; | ||
| 167 | regulator-max-microvolt = <1400000>; | ||
| 168 | regulator-always-on; | ||
| 169 | ams,ext-control = <1>; | ||
| 170 | }; | ||
| 171 | |||
| 172 | sd2 { | ||
| 173 | regulator-name = "vddio_ddr"; | ||
| 174 | regulator-min-microvolt = <1350000>; | ||
| 175 | regulator-max-microvolt = <1350000>; | ||
| 176 | regulator-always-on; | ||
| 177 | }; | ||
| 178 | |||
| 179 | sd4 { | ||
| 180 | regulator-name = "avdd-hdmi-pex"; | ||
| 181 | regulator-min-microvolt = <1050000>; | ||
| 182 | regulator-max-microvolt = <1050000>; | ||
| 183 | regulator-always-on; | ||
| 184 | }; | ||
| 185 | |||
| 186 | sd5 { | ||
| 187 | regulator-name = "vdd-1v8"; | ||
| 188 | regulator-min-microvolt = <1800000>; | ||
| 189 | regulator-max-microvolt = <1800000>; | ||
| 190 | regulator-always-on; | ||
| 191 | }; | ||
| 192 | .... | ||
| 193 | }; | ||
| 194 | }; | ||
| @@ -1,10 +1,10 @@ | |||
| 1 | 1 | ||
| 2 | * Samsung S2MPS11 Voltage and Current Regulator | 2 | * Samsung S2MPS11 Voltage and Current Regulator |
| 3 | 3 | ||
| 4 | The Samsung S2MP211 is a multi-function device which includes voltage and | 4 | The Samsung S2MPS11 is a multi-function device which includes voltage and |
| 5 | current regulators, RTC, charger controller and other sub-blocks. It is | 5 | current regulators, RTC, charger controller and other sub-blocks. It is |
| 6 | interfaced to the host controller using a I2C interface. Each sub-block is | 6 | interfaced to the host controller using an I2C interface. Each sub-block is |
| 7 | addressed by the host system using different I2C slave address. | 7 | addressed by the host system using different I2C slave addresses. |
| 8 | 8 | ||
| 9 | Required properties: | 9 | Required properties: |
| 10 | - compatible: Should be "samsung,s2mps11-pmic". | 10 | - compatible: Should be "samsung,s2mps11-pmic". |
| @@ -43,7 +43,8 @@ sub-node should be of the format as listed below. · 32 unmodified lines | |||
| 43 | 43 | ||
| 44 | BUCK[2/3/4/6] supports disabling ramp delay on hardware, so explictly | 44 | BUCK[2/3/4/6] supports disabling ramp delay on hardware, so explictly |
| 45 | regulator-ramp-delay = <0> can be used for them to disable ramp delay. | 45 | regulator-ramp-delay = <0> can be used for them to disable ramp delay. |
| 46 | In absence of regulator-ramp-delay property, default ramp delay will be used. | 46 | In the absence of the regulator-ramp-delay property, the default ramp |
| 47 | delay will be used. | ||
| 47 | 48 | ||
| 48 | NOTE: Some BUCKs share the ramp rate setting i.e. same ramp value will be set | 49 | NOTE: Some BUCKs share the ramp rate setting i.e. same ramp value will be set |
| 49 | for a particular group of BUCKs. So provide same regulator-ramp-delay<value>. | 50 | for a particular group of BUCKs. So provide same regulator-ramp-delay<value>. |
| @@ -58,10 +59,10 @@ supports. Note: The 'n' in LDOn and BUCKn represents the LDO or BUCK number · 8 unmodified lines | |||
| 58 | as per the datasheet of s2mps11. | 59 | as per the datasheet of s2mps11. |
| 59 | 60 | ||
| 60 | - LDOn | 61 | - LDOn |
| 61 | - valid values for n are 1 to 28 | 62 | - valid values for n are 1 to 38 |
| 62 | - Example: LDO0, LD01, LDO28 | 63 | - Example: LDO0, LD01, LDO28 |
| 63 | - BUCKn | 64 | - BUCKn |
| 64 | - valid values for n are 1 to 9. | 65 | - valid values for n are 1 to 10. |
| 65 | - Example: BUCK1, BUCK2, BUCK9 | 66 | - Example: BUCK1, BUCK2, BUCK9 |
| 66 | 67 | ||
| 67 | Example: | 68 | Example: |
| @@ -0,0 +1,17 @@ | |||
| 1 | Allwinner sunxi-sid | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "allwinner,sun4i-sid" or "allwinner,sun7i-a20-sid". | ||
| 5 | - reg: Should contain registers location and length | ||
| 6 | |||
| 7 | Example for sun4i: | ||
| 8 | sid@01c23800 { | ||
| 9 | compatible = "allwinner,sun4i-sid"; | ||
| 10 | reg = <0x01c23800 0x10> | ||
| 11 | }; | ||
| 12 | |||
| 13 | Example for sun7i: | ||
| 14 | sid@01c23800 { | ||
| 15 | compatible = "allwinner,sun7i-a20-sid"; | ||
| 16 | reg = <0x01c23800 0x200> | ||
| 17 | }; | ||
| @@ -0,0 +1,20 @@ | |||
| 1 | TI DAC7512 DEVICETREE BINDINGS | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - "compatible" Must be set to "ti,dac7512" | ||
| 6 | |||
| 7 | Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt | ||
| 8 | apply. In particular, "reg" and "spi-max-frequency" properties must be given. | ||
| 9 | |||
| 10 | |||
| 11 | Example: | ||
| 12 | |||
| 13 | spi_master { | ||
| 14 | dac7512: dac7512@0 { | ||
| 15 | compatible = "ti,dac7512"; | ||
| 16 | reg = <0>; /* CS0 */ | ||
| 17 | spi-max-frequency = <1000000>; | ||
| 18 | }; | ||
| 19 | }; | ||
| 20 | |||
| @@ -1,11 +1,11 @@ | |||
| 1 | * Samsung Exynos specific extensions to the Synopsis Designware Mobile | 1 | * Samsung Exynos specific extensions to the Synopsys Designware Mobile |
| 2 | Storage Host Controller | 2 | Storage Host Controller |
| 3 | 3 | ||
| 4 | The Synopsis designware mobile storage host controller is used to interface | 4 | The Synopsys designware mobile storage host controller is used to interface |
| 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents | 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
| 6 | differences between the core Synopsis dw mshc controller properties described | 6 | differences between the core Synopsys dw mshc controller properties described |
| 7 | by synopsis-dw-mshc.txt and the properties used by the Samsung Exynos specific | 7 | by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific |
| 8 | extensions to the Synopsis Designware Mobile Storage Host Controller. | 8 | extensions to the Synopsys Designware Mobile Storage Host Controller. |
| 9 | 9 | ||
| 10 | Required Properties: | 10 | Required Properties: |
| 11 | 11 | ||
| @@ -12,6 +12,11 @@ Required properties: · 11 unmodified lines | |||
| 12 | Optional properties: | 12 | Optional properties: |
| 13 | - fsl,cd-controller : Indicate to use controller internal card detection | 13 | - fsl,cd-controller : Indicate to use controller internal card detection |
| 14 | - fsl,wp-controller : Indicate to use controller internal write protection | 14 | - fsl,wp-controller : Indicate to use controller internal write protection |
| 15 | - fsl,delay-line : Specify the number of delay cells for override mode. | ||
| 16 | This is used to set the clock delay for DLL(Delay Line) on override mode | ||
| 17 | to select a proper data sampling window in case the clock quality is not good | ||
| 18 | due to signal path is too long on the board. Please refer to eSDHC/uSDHC | ||
| 19 | chapter, DLL (Delay Line) section in RM for details. | ||
| 15 | 20 | ||
| 16 | Examples: | 21 | Examples: |
| 17 | 22 | ||
| @@ -1,11 +1,11 @@ | |||
| 1 | * Rockchip specific extensions to the Synopsis Designware Mobile | 1 | * Rockchip specific extensions to the Synopsys Designware Mobile |
| 2 | Storage Host Controller | 2 | Storage Host Controller |
| 3 | 3 | ||
| 4 | The Synopsis designware mobile storage host controller is used to interface | 4 | The Synopsys designware mobile storage host controller is used to interface |
| 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents | 5 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
| 6 | differences between the core Synopsis dw mshc controller properties described | 6 | differences between the core Synopsys dw mshc controller properties described |
| 7 | by synopsis-dw-mshc.txt and the properties used by the Rockchip specific | 7 | by synopsys-dw-mshc.txt and the properties used by the Rockchip specific |
| 8 | extensions to the Synopsis Designware Mobile Storage Host Controller. | 8 | extensions to the Synopsys Designware Mobile Storage Host Controller. |
| 9 | 9 | ||
| 10 | Required Properties: | 10 | Required Properties: |
| 11 | 11 | ||
| @@ -1,14 +1,14 @@ | |||
| 1 | * Synopsis Designware Mobile Storage Host Controller | 1 | * Synopsys Designware Mobile Storage Host Controller |
| 2 | 2 | ||
| 3 | The Synopsis designware mobile storage host controller is used to interface | 3 | The Synopsys designware mobile storage host controller is used to interface |
| 4 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents | 4 | a SoC with storage medium such as eMMC or SD/MMC cards. This file documents |
| 5 | differences between the core mmc properties described by mmc.txt and the | 5 | differences between the core mmc properties described by mmc.txt and the |
| 6 | properties used by the Synopsis Designware Mobile Storage Host Controller. | 6 | properties used by the Synopsys Designware Mobile Storage Host Controller. |
| 7 | 7 | ||
| 8 | Required Properties: | 8 | Required Properties: |
| 9 | 9 | ||
| 10 | * compatible: should be | 10 | * compatible: should be |
| 11 | - snps,dw-mshc: for controllers compliant with synopsis dw-mshc. | 11 | - snps,dw-mshc: for controllers compliant with synopsys dw-mshc. |
| 12 | * #address-cells: should be 1. | 12 | * #address-cells: should be 1. |
| 13 | * #size-cells: should be 0. | 13 | * #size-cells: should be 0. |
| 14 | 14 | ||
| @@ -52,6 +52,9 @@ Optional properties: · 37 unmodified lines | |||
| 52 | is specified and the ciu clock is specified then we'll try to set the ciu | 52 | is specified and the ciu clock is specified then we'll try to set the ciu |
| 53 | clock to this at probe time. | 53 | clock to this at probe time. |
| 54 | 54 | ||
| 55 | * clock-freq-min-max: Minimum and Maximum clock frequency for card output | ||
| 56 | clock(cclk_out). If it's not specified, max is 200MHZ and min is 400KHz by default. | ||
| 57 | |||
| 55 | * num-slots: specifies the number of slots supported by the controller. | 58 | * num-slots: specifies the number of slots supported by the controller. |
| 56 | The number of physical slots actually used could be equal or less than the | 59 | The number of physical slots actually used could be equal or less than the |
| 57 | value specified by num-slots. If this property is not specified, the value | 60 | value specified by num-slots. If this property is not specified, the value |
| @@ -66,6 +69,10 @@ Optional properties: · 8 unmodified lines | |||
| 66 | 69 | ||
| 67 | * supports-highspeed: Enables support for high speed cards (up to 50MHz) | 70 | * supports-highspeed: Enables support for high speed cards (up to 50MHz) |
| 68 | 71 | ||
| 72 | * caps2-mmc-hs200-1_8v: Supports mmc HS200 SDR 1.8V mode | ||
| 73 | |||
| 74 | * caps2-mmc-hs200-1_2v: Supports mmc HS200 SDR 1.2V mode | ||
| 75 | |||
| 69 | * broken-cd: as documented in mmc core bindings. | 76 | * broken-cd: as documented in mmc core bindings. |
| 70 | 77 | ||
| 71 | * vmmc-supply: The phandle to the regulator to use for vmmc. If this is | 78 | * vmmc-supply: The phandle to the regulator to use for vmmc. If this is |
| @@ -93,8 +100,10 @@ board specific portions as listed below. · 21 unmodified lines | |||
| 93 | 100 | ||
| 94 | dwmmc0@12200000 { | 101 | dwmmc0@12200000 { |
| 95 | clock-frequency = <400000000>; | 102 | clock-frequency = <400000000>; |
| 103 | clock-freq-min-max = <400000 200000000>; | ||
| 96 | num-slots = <1>; | 104 | num-slots = <1>; |
| 97 | supports-highspeed; | 105 | supports-highspeed; |
| 106 | caps2-mmc-hs200-1_8v; | ||
| 98 | broken-cd; | 107 | broken-cd; |
| 99 | fifo-depth = <0x80>; | 108 | fifo-depth = <0x80>; |
| 100 | card-detect-delay = <200>; | 109 | card-detect-delay = <200>; |
| @@ -20,8 +20,29 @@ ti,dual-volt: boolean, supports dual voltage cards · 19 unmodified lines | |||
| 20 | ti,non-removable: non-removable slot (like eMMC) | 20 | ti,non-removable: non-removable slot (like eMMC) |
| 21 | ti,needs-special-reset: Requires a special softreset sequence | 21 | ti,needs-special-reset: Requires a special softreset sequence |
| 22 | ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed | 22 | ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed |
| 23 | dmas: List of DMA specifiers with the controller specific format | ||
| 24 | as described in the generic DMA client binding. A tx and rx | ||
| 25 | specifier is required. | ||
| 26 | dma-names: List of DMA request names. These strings correspond | ||
| 27 | 1:1 with the DMA specifiers listed in dmas. The string naming is | ||
| 28 | to be "rx" and "tx" for RX and TX DMA requests, respectively. | ||
| 29 | |||
| 30 | Examples: | ||
| 31 | |||
| 32 | [hwmod populated DMA resources] | ||
| 33 | |||
| 34 | mmc1: mmc@0x4809c000 { | ||
| 35 | compatible = "ti,omap4-hsmmc"; | ||
| 36 | reg = <0x4809c000 0x400>; | ||
| 37 | ti,hwmods = "mmc1"; | ||
| 38 | ti,dual-volt; | ||
| 39 | bus-width = <4>; | ||
| 40 | vmmc-supply = <&vmmc>; /* phandle to regulator node */ | ||
| 41 | ti,non-removable; | ||
| 42 | }; | ||
| 43 | |||
| 44 | [generic DMA request binding] | ||
| 23 | 45 | ||
| 24 | Example: | ||
| 25 | mmc1: mmc@0x4809c000 { | 46 | mmc1: mmc@0x4809c000 { |
| 26 | compatible = "ti,omap4-hsmmc"; | 47 | compatible = "ti,omap4-hsmmc"; |
| 27 | reg = <0x4809c000 0x400>; | 48 | reg = <0x4809c000 0x400>; |
| @@ -30,4 +51,7 @@ Example: · 2 unmodified lines | |||
| 30 | bus-width = <4>; | 51 | bus-width = <4>; |
| 31 | vmmc-supply = <&vmmc>; /* phandle to regulator node */ | 52 | vmmc-supply = <&vmmc>; /* phandle to regulator node */ |
| 32 | ti,non-removable; | 53 | ti,non-removable; |
| 54 | dmas = <&edma 24 | ||
| 55 | &edma 25>; | ||
| 56 | dma-names = "tx", "rx"; | ||
| 33 | }; | 57 | }; |
| @@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as · 8 unmodified lines | |||
| 9 | described in mmc.txt, can be used. Additionally the following tmio_mmc-specific | 9 | described in mmc.txt, can be used. Additionally the following tmio_mmc-specific |
| 10 | optional bindings can be used. | 10 | optional bindings can be used. |
| 11 | 11 | ||
| 12 | Required properties: | ||
| 13 | - compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit | ||
| 14 | "renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC | ||
| 15 | "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC | ||
| 16 | "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC | ||
| 17 | "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC | ||
| 18 | "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC | ||
| 19 | "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC | ||
| 20 | "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC | ||
| 21 | |||
| 12 | Optional properties: | 22 | Optional properties: |
| 13 | - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable | 23 | - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable |
| 14 | |||
| 15 | When used with Renesas SDHI hardware, the following compatibility strings | ||
| 16 | configure various model-specific properties: | ||
| 17 | |||
| 18 | "renesas,sh7372-sdhi": (default) compatible with SH7372 | ||
| 19 | "renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to | ||
| 20 | wait for the interface to become idle. | ||
| @@ -22,10 +22,10 @@ Optional properties: · 21 unmodified lines | |||
| 22 | width of 8 is assumed. | 22 | width of 8 is assumed. |
| 23 | 23 | ||
| 24 | - ti,nand-ecc-opt: A string setting the ECC layout to use. One of: | 24 | - ti,nand-ecc-opt: A string setting the ECC layout to use. One of: |
| 25 | 25 | "sw" <deprecated> use "ham1" instead | |
| 26 | "sw" Software method (default) | 26 | "hw" <deprecated> use "ham1" instead |
| 27 | "hw" Hardware method | 27 | "hw-romcode" <deprecated> use "ham1" instead |
| 28 | "hw-romcode" gpmc hamming mode method & romcode layout | 28 | "ham1" 1-bit Hamming ecc code |
| 29 | "bch4" 4-bit BCH ecc code | 29 | "bch4" 4-bit BCH ecc code |
| 30 | "bch8" 8-bit BCH ecc code | 30 | "bch8" 8-bit BCH ecc code |
| 31 | 31 | ||
| @@ -36,8 +36,12 @@ Optional properties: · 4 unmodified lines | |||
| 36 | "prefetch-dma" Prefetch enabled sDMA mode | 36 | "prefetch-dma" Prefetch enabled sDMA mode |
| 37 | "prefetch-irq" Prefetch enabled irq mode | 37 | "prefetch-irq" Prefetch enabled irq mode |
| 38 | 38 | ||
| 39 | - elm_id: Specifies elm device node. This is required to support BCH | 39 | - elm_id: <deprecated> use "ti,elm-id" instead |
| 40 | error correction using ELM module. | 40 | - ti,elm-id: Specifies phandle of the ELM devicetree node. |
| 41 | ELM is an on-chip hardware engine on TI SoC which is used for | ||
| 42 | locating ECC errors for BCHx algorithms. SoC devices which have | ||
| 43 | ELM hardware engines should specify this device node in .dtsi | ||
| 44 | Using ELM for ECC error correction frees some CPU cycles. | ||
| 41 | 45 | ||
| 42 | For inline partiton table parsing (optional): | 46 | For inline partiton table parsing (optional): |
| 43 | 47 | ||
| @@ -0,0 +1,28 @@ | |||
| 1 | TI CPSW Phy mode Selection Device Tree Bindings | ||
| 2 | ----------------------------------------------- | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible : Should be "ti,am3352-cpsw-phy-sel" | ||
| 6 | - reg : physical base address and size of the cpsw | ||
| 7 | registers map | ||
| 8 | - reg-names : names of the register map given in "reg" node | ||
| 9 | |||
| 10 | Optional properties: | ||
| 11 | -rmii-clock-ext : If present, the driver will configure the RMII | ||
| 12 | interface to external clock usage | ||
| 13 | |||
| 14 | Examples: | ||
| 15 | |||
| 16 | phy_sel: cpsw-phy-sel@44e10650 { | ||
| 17 | compatible = "ti,am3352-cpsw-phy-sel"; | ||
| 18 | reg= <0x44e10650 0x4>; | ||
| 19 | reg-names = "gmii-sel"; | ||
| 20 | }; | ||
| 21 | |||
| 22 | (or) | ||
| 23 | phy_sel: cpsw-phy-sel@44e10650 { | ||
| 24 | compatible = "ti,am3352-cpsw-phy-sel"; | ||
| 25 | reg= <0x44e10650 0x4>; | ||
| 26 | reg-names = "gmii-sel"; | ||
| 27 | rmii-clock-ext; | ||
| 28 | }; | ||
| @@ -86,6 +86,7 @@ General Properties: · 85 unmodified lines | |||
| 86 | 86 | ||
| 87 | Clock Properties: | 87 | Clock Properties: |
| 88 | 88 | ||
| 89 | - fsl,cksel Timer reference clock source. | ||
| 89 | - fsl,tclk-period Timer reference clock period in nanoseconds. | 90 | - fsl,tclk-period Timer reference clock period in nanoseconds. |
| 90 | - fsl,tmr-prsc Prescaler, divides the output clock. | 91 | - fsl,tmr-prsc Prescaler, divides the output clock. |
| 91 | - fsl,tmr-add Frequency compensation value. | 92 | - fsl,tmr-add Frequency compensation value. |
| @@ -97,7 +98,7 @@ Clock Properties: · 5 unmodified lines | |||
| 97 | clock. You must choose these carefully for the clock to work right. | 98 | clock. You must choose these carefully for the clock to work right. |
| 98 | Here is how to figure good values: | 99 | Here is how to figure good values: |
| 99 | 100 | ||
| 100 | TimerOsc = system clock MHz | 101 | TimerOsc = selected reference clock MHz |
| 101 | tclk_period = desired clock period nanoseconds | 102 | tclk_period = desired clock period nanoseconds |
| 102 | NominalFreq = 1000 / tclk_period MHz | 103 | NominalFreq = 1000 / tclk_period MHz |
| 103 | FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) | 104 | FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) |
| @@ -114,6 +115,20 @@ Clock Properties: · 10 unmodified lines | |||
| 114 | Pulse Per Second (PPS) signal, since this will be offered to the PPS | 115 | Pulse Per Second (PPS) signal, since this will be offered to the PPS |
| 115 | subsystem to synchronize the Linux clock. | 116 | subsystem to synchronize the Linux clock. |
| 116 | 117 | ||
| 118 | Reference clock source is determined by the value, which is holded | ||
| 119 | in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the | ||
| 120 | value, which will be directly written in those bits, that is why, | ||
| 121 | according to reference manual, the next clock sources can be used: | ||
| 122 | |||
| 123 | <0> - external high precision timer reference clock (TSEC_TMR_CLK | ||
| 124 | input is used for this purpose); | ||
| 125 | <1> - eTSEC system clock; | ||
| 126 | <2> - eTSEC1 transmit clock; | ||
| 127 | <3> - RTC clock input. | ||
| 128 | |||
| 129 | When this attribute is not used, eTSEC system clock will serve as | ||
| 130 | IEEE 1588 timer reference clock. | ||
| 131 | |||
| 117 | Example: | 132 | Example: |
| 118 | 133 | ||
| 119 | ptp_clock@24E00 { | 134 | ptp_clock@24E00 { |
| @@ -121,6 +136,7 @@ Example: · 1 unmodified line | |||
| 121 | reg = <0x24E00 0xB0>; | 136 | reg = <0x24E00 0xB0>; |
| 122 | interrupts = <12 0x8 13 0x8>; | 137 | interrupts = <12 0x8 13 0x8>; |
| 123 | interrupt-parent = < &ipic >; | 138 | interrupt-parent = < &ipic >; |
| 139 | fsl,cksel = <1>; | ||
| 124 | fsl,tclk-period = <10>; | 140 | fsl,tclk-period = <10>; |
| 125 | fsl,tmr-prsc = <100>; | 141 | fsl,tmr-prsc = <100>; |
| 126 | fsl,tmr-add = <0x999999A4>; | 142 | fsl,tmr-add = <0x999999A4>; |
| @@ -1,9 +1,9 @@ | |||
| 1 | * Synopsis Designware PCIe interface | 1 | * Synopsys Designware PCIe interface |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: should contain "snps,dw-pcie" to identify the | 4 | - compatible: should contain "snps,dw-pcie" to identify the |
| 5 | core, plus an identifier for the specific instance, such | 5 | core, plus an identifier for the specific instance, such |
| 6 | as "samsung,exynos5440-pcie". | 6 | as "samsung,exynos5440-pcie" or "fsl,imx6q-pcie". |
| 7 | - reg: base addresses and lengths of the pcie controller, | 7 | - reg: base addresses and lengths of the pcie controller, |
| 8 | the phy controller, additional register for the phy controller. | 8 | the phy controller, additional register for the phy controller. |
| 9 | - interrupts: interrupt values for level interrupt, | 9 | - interrupts: interrupt values for level interrupt, |
| @@ -21,6 +21,11 @@ Required properties: · 11 unmodified lines | |||
| 21 | - num-lanes: number of lanes to use | 21 | - num-lanes: number of lanes to use |
| 22 | - reset-gpio: gpio pin number of power good signal | 22 | - reset-gpio: gpio pin number of power good signal |
| 23 | 23 | ||
| 24 | Optional properties for fsl,imx6q-pcie | ||
| 25 | - power-on-gpio: gpio pin number of power-enable signal | ||
| 26 | - wake-up-gpio: gpio pin number of incoming wakeup signal | ||
| 27 | - disable-gpio: gpio pin number of outgoing rfkill/endpoint disable signal | ||
| 28 | |||
| 24 | Example: | 29 | Example: |
| 25 | 30 | ||
| 26 | SoC specific DT Entry: | 31 | SoC specific DT Entry: |
| @@ -5,6 +5,7 @@ Mandatory properties: · 4 unmodified lines | |||
| 5 | - compatible: one of the following values: | 5 | - compatible: one of the following values: |
| 6 | marvell,armada-370-pcie | 6 | marvell,armada-370-pcie |
| 7 | marvell,armada-xp-pcie | 7 | marvell,armada-xp-pcie |
| 8 | marvell,dove-pcie | ||
| 8 | marvell,kirkwood-pcie | 9 | marvell,kirkwood-pcie |
| 9 | - #address-cells, set to <3> | 10 | - #address-cells, set to <3> |
| 10 | - #size-cells, set to <2> | 11 | - #size-cells, set to <2> |
| @@ -14,6 +15,8 @@ Mandatory properties: · 3 unmodified lines | |||
| 14 | - ranges: ranges describing the MMIO registers to control the PCIe | 15 | - ranges: ranges describing the MMIO registers to control the PCIe |
| 15 | interfaces, and ranges describing the MBus windows needed to access | 16 | interfaces, and ranges describing the MBus windows needed to access |
| 16 | the memory and I/O regions of each PCIe interface. | 17 | the memory and I/O regions of each PCIe interface. |
| 18 | - msi-parent: Link to the hardware entity that serves as the Message | ||
| 19 | Signaled Interrupt controller for this PCI controller. | ||
| 17 | 20 | ||
| 18 | The ranges describing the MMIO registers have the following layout: | 21 | The ranges describing the MMIO registers have the following layout: |
| 19 | 22 | ||
| @@ -74,6 +77,8 @@ and the following optional properties: · 54 unmodified lines | |||
| 74 | - marvell,pcie-lane: the physical PCIe lane number, for ports having | 77 | - marvell,pcie-lane: the physical PCIe lane number, for ports having |
| 75 | multiple lanes. If this property is not found, we assume that the | 78 | multiple lanes. If this property is not found, we assume that the |
| 76 | value is 0. | 79 | value is 0. |
| 80 | - reset-gpios: optional gpio to PERST# | ||
| 81 | - reset-delay-us: delay in us to wait after reset de-assertion | ||
| 77 | 82 | ||
| 78 | Example: | 83 | Example: |
| 79 | 84 | ||
| @@ -86,6 +91,7 @@ pcie-controller { · 6 unmodified lines | |||
| 86 | #size-cells = <2>; | 91 | #size-cells = <2>; |
| 87 | 92 | ||
| 88 | bus-range = <0x00 0xff>; | 93 | bus-range = <0x00 0xff>; |
| 94 | msi-parent = <&mpic>; | ||
| 89 | 95 | ||
| 90 | ranges = | 96 | ranges = |
| 91 | <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ | 97 | <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ |
| @@ -135,6 +141,10 @@ pcie-controller { · 43 unmodified lines | |||
| 135 | interrupt-map = <0 0 0 0 &mpic 58>; | 141 | interrupt-map = <0 0 0 0 &mpic 58>; |
| 136 | marvell,pcie-port = <0>; | 142 | marvell,pcie-port = <0>; |
| 137 | marvell,pcie-lane = <0>; | 143 | marvell,pcie-lane = <0>; |
| 144 | /* low-active PERST# reset on GPIO 25 */ | ||
| 145 | reset-gpios = <&gpio0 25 1>; | ||
| 146 | /* wait 20ms for device settle after reset deassertion */ | ||
| 147 | reset-delay-us = <20000>; | ||
| 138 | clocks = <&gateclk 5>; | 148 | clocks = <&gateclk 5>; |
| 139 | status = "disabled"; | 149 | status = "disabled"; |
| 140 | }; | 150 | }; |
| @@ -0,0 +1,66 @@ | |||
| 1 | This document explains only the device tree data binding. For general | ||
| 2 | information about PHY subsystem refer to Documentation/phy.txt | ||
| 3 | |||
| 4 | PHY device node | ||
| 5 | =============== | ||
| 6 | |||
| 7 | Required Properties: | ||
| 8 | #phy-cells: Number of cells in a PHY specifier; The meaning of all those | ||
| 9 | cells is defined by the binding for the phy node. The PHY | ||
| 10 | provider can use the values in cells to find the appropriate | ||
| 11 | PHY. | ||
| 12 | |||
| 13 | For example: | ||
| 14 | |||
| 15 | phys: phy { | ||
| 16 | compatible = "xxx"; | ||
| 17 | reg = <...>; | ||
| 18 | . | ||
| 19 | . | ||
| 20 | #phy-cells = <1>; | ||
| 21 | . | ||
| 22 | . | ||
| 23 | }; | ||
| 24 | |||
| 25 | That node describes an IP block (PHY provider) that implements 2 different PHYs. | ||
| 26 | In order to differentiate between these 2 PHYs, an additonal specifier should be | ||
| 27 | given while trying to get a reference to it. | ||
| 28 | |||
| 29 | PHY user node | ||
| 30 | ============= | ||
| 31 | |||
| 32 | Required Properties: | ||
| 33 | phys : the phandle for the PHY device (used by the PHY subsystem) | ||
| 34 | phy-names : the names of the PHY corresponding to the PHYs present in the | ||
| 35 | *phys* phandle | ||
| 36 | |||
| 37 | Example 1: | ||
| 38 | usb1: usb_otg_ss@xxx { | ||
| 39 | compatible = "xxx"; | ||
| 40 | reg = <xxx>; | ||
| 41 | . | ||
| 42 | . | ||
| 43 | phys = <&usb2_phy>, <&usb3_phy>; | ||
| 44 | phy-names = "usb2phy", "usb3phy"; | ||
| 45 | . | ||
| 46 | . | ||
| 47 | }; | ||
| 48 | |||
| 49 | This node represents a controller that uses two PHYs, one for usb2 and one for | ||
| 50 | usb3. | ||
| 51 | |||
| 52 | Example 2: | ||
| 53 | usb2: usb_otg_ss@xxx { | ||
| 54 | compatible = "xxx"; | ||
| 55 | reg = <xxx>; | ||
| 56 | . | ||
| 57 | . | ||
| 58 | phys = <&phys 1>; | ||
| 59 | phy-names = "usbphy"; | ||
| 60 | . | ||
| 61 | . | ||
| 62 | }; | ||
| 63 | |||
| 64 | This node represents a controller that uses one of the PHYs of the PHY provider | ||
| 65 | device defined previously. Note that the phy handle has an additional specifier | ||
| 66 | "1" to differentiate between the two PHYs. | ||
| @@ -0,0 +1,22 @@ | |||
| 1 | Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY | ||
| 2 | ------------------------------------------------- | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible : should be "samsung,s5pv210-mipi-video-phy"; | ||
| 6 | - reg : offset and length of the MIPI DPHY register set; | ||
| 7 | - #phy-cells : from the generic phy bindings, must be 1; | ||
| 8 | |||
| 9 | For "samsung,s5pv210-mipi-video-phy" compatible PHYs the second cell in | ||
| 10 | the PHY specifier identifies the PHY and its meaning is as follows: | ||
| 11 | 0 - MIPI CSIS 0, | ||
| 12 | 1 - MIPI DSIM 0, | ||
| 13 | 2 - MIPI CSIS 1, | ||
| 14 | 3 - MIPI DSIM 1. | ||
| 15 | |||
| 16 | Samsung EXYNOS SoC series Display Port PHY | ||
| 17 | ------------------------------------------------- | ||
| 18 | |||
| 19 | Required properties: | ||
| 20 | - compatible : should be "samsung,exynos5250-dp-video-phy"; | ||
| 21 | - reg : offset and length of the Display Port PHY register set; | ||
| 22 | - #phy-cells : from the generic PHY bindings, must be 0; | ||
| @@ -0,0 +1,80 @@ | |||
| 1 | Abilis Systems TB10x pin controller | ||
| 2 | =================================== | ||
| 3 | |||
| 4 | Required properties | ||
| 5 | ------------------- | ||
| 6 | |||
| 7 | - compatible: should be "abilis,tb10x-iomux"; | ||
| 8 | - reg: should contain the physical address and size of the pin controller's | ||
| 9 | register range. | ||
| 10 | |||
| 11 | |||
| 12 | Function definitions | ||
| 13 | -------------------- | ||
| 14 | |||
| 15 | Functions are defined (and referenced) by sub-nodes of the pin controller. | ||
| 16 | Every sub-node defines exactly one function (implying a set of pins). | ||
| 17 | Every function is associated to one named pin group inside the pin controller | ||
| 18 | driver and these names are used to associate pin group predefinitions to pin | ||
| 19 | controller sub-nodes. | ||
| 20 | |||
| 21 | Required function definition subnode properties: | ||
| 22 | - abilis,function: should be set to the name of the function's pin group. | ||
| 23 | |||
| 24 | The following pin groups are available: | ||
| 25 | - GPIO ports: gpioa, gpiob, gpioc, gpiod, gpioe, gpiof, gpiog, | ||
| 26 | gpioh, gpioi, gpioj, gpiok, gpiol, gpiom, gpion | ||
| 27 | - Serial TS input ports: mis0, mis1, mis2, mis3, mis4, mis5, mis6, mis7 | ||
| 28 | - Parallel TS input ports: mip1, mip3, mip5, mip7 | ||
| 29 | - Serial TS output ports: mos0, mos1, mos2, mos3 | ||
| 30 | - Parallel TS output port: mop | ||
| 31 | - CI+ port: ciplus | ||
| 32 | - CableCard (Mcard) port: mcard | ||
| 33 | - Smart card ports: stc0, stc1 | ||
| 34 | - UART ports: uart0, uart1 | ||
| 35 | - SPI ports: spi1, spi3 | ||
| 36 | - JTAG: jtag | ||
| 37 | |||
| 38 | All other ports of the chip are not multiplexed and thus not managed by this | ||
| 39 | driver. | ||
| 40 | |||
| 41 | |||
| 42 | GPIO ranges definition | ||
| 43 | ---------------------- | ||
| 44 | |||
| 45 | The named pin groups of GPIO ports can be used to define GPIO ranges as | ||
| 46 | explained in Documentation/devicetree/bindings/gpio/gpio.txt. | ||
| 47 | |||
| 48 | |||
| 49 | Example | ||
| 50 | ------- | ||
| 51 | |||
| 52 | iomux: iomux@FF10601c { | ||
| 53 | compatible = "abilis,tb10x-iomux"; | ||
| 54 | reg = <0xFF10601c 0x4>; | ||
| 55 | pctl_gpio_a: pctl-gpio-a { | ||
| 56 | abilis,function = "gpioa"; | ||
| 57 | }; | ||
| 58 | pctl_uart0: pctl-uart0 { | ||
| 59 | abilis,function = "uart0"; | ||
| 60 | }; | ||
| 61 | }; | ||
| 62 | uart@FF100000 { | ||
| 63 | compatible = "snps,dw-apb-uart"; | ||
| 64 | reg = <0xFF100000 0x100>; | ||
| 65 | clock-frequency = <166666666>; | ||
| 66 | interrupts = <25 1>; | ||
| 67 | reg-shift = <2>; | ||
| 68 | reg-io-width = <4>; | ||
| 69 | pinctrl-names = "default"; | ||
| 70 | pinctrl-0 = <&pctl_uart0>; | ||
| 71 | }; | ||
| 72 | gpioa: gpio@FF140000 { | ||
| 73 | compatible = "abilis,tb10x-gpio"; | ||
| 74 | reg = <0xFF140000 0x1000>; | ||
| 75 | gpio-controller; | ||
| 76 | #gpio-cells = <2>; | ||
| 77 | ngpio = <3>; | ||
| 78 | gpio-ranges = <&iomux 0 0>; | ||
| 79 | gpio-ranges-group-names = "gpioa"; | ||
| 80 | }; | ||
| @@ -18,7 +18,7 @@ mode) this pin can work on and the 'config' configures various pad settings · 17 unmodified lines | |||
| 18 | such as pull-up, multi drive, etc. | 18 | such as pull-up, multi drive, etc. |
| 19 | 19 | ||
| 20 | Required properties for iomux controller: | 20 | Required properties for iomux controller: |
| 21 | - compatible: "atmel,at91rm9200-pinctrl" | 21 | - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl" |
| 22 | - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be | 22 | - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be |
| 23 | configured in this periph mode. All the periph and bank need to be describe. | 23 | configured in this periph mode. All the periph and bank need to be describe. |
| 24 | 24 | ||
| @@ -22,11 +22,12 @@ Required properties for iomux controller: · 21 unmodified lines | |||
| 22 | Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs. | 22 | Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs. |
| 23 | 23 | ||
| 24 | Required properties for pin configuration node: | 24 | Required properties for pin configuration node: |
| 25 | - fsl,pins: two integers array, represents a group of pins mux and config | 25 | - fsl,pins: each entry consists of 6 integers and represents the mux and config |
| 26 | setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a | 26 | setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val |
| 27 | pin working on a specific function, which consists of a tuple of | 27 | input_val> are specified using a PIN_FUNC_ID macro, which can be found in |
| 28 | <mux_reg conf_reg input_reg mux_val input_val>. CONFIG is the pad setting | 28 | imx*-pinfunc.h under device tree source folder. The last integer CONFIG is |
| 29 | value like pull-up on this pin. | 29 | the pad setting value like pull-up on this pin. And that's why fsl,pins entry |
| 30 | looks like <PIN_FUNC_ID CONFIG> in the example below. | ||
| 30 | 31 | ||
| 31 | Bits used for CONFIG: | 32 | Bits used for CONFIG: |
| 32 | NO_PAD_CTL(1 << 31): indicate this pin does not need config. | 33 | NO_PAD_CTL(1 << 31): indicate this pin does not need config. |
| @@ -72,17 +73,18 @@ iomuxc@020e0000 { · 39 unmodified lines | |||
| 72 | /* shared pinctrl settings */ | 73 | /* shared pinctrl settings */ |
| 73 | usdhc4 { | 74 | usdhc4 { |
| 74 | pinctrl_usdhc4_1: usdhc4grp-1 { | 75 | pinctrl_usdhc4_1: usdhc4grp-1 { |
| 75 | fsl,pins = <1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */ | 76 | fsl,pins = < |
| 76 | 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */ | 77 | MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 |
| 77 | 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */ | 78 | MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 |
| 78 | 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */ | 79 | MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 |
| 79 | 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */ | 80 | MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 |
| 80 | 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */ | 81 | MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 |
| 81 | 1493 0x17059 /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */ | 82 | MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 |
| 82 | 1501 0x17059 /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */ | 83 | MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 |
| 83 | 1509 0x17059 /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */ | 84 | MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 |
| 84 | 1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */ | 85 | MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 |
| 85 | }; | 86 | MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 |
| 87 | >; | ||
| 86 | }; | 88 | }; |
| 87 | .... | 89 | .... |
| 88 | }; | 90 | }; |
| @@ -90,6 +92,3 @@ Refer to the IOMUXC controller chapter in imx6q datasheet, · 1 unmodified line | |||
| 90 | 0x17059 means enable hysteresis, 47KOhm Pull Up, 50Mhz speed, | 92 | 0x17059 means enable hysteresis, 47KOhm Pull Up, 50Mhz speed, |
| 91 | 80Ohm driver strength and Fast Slew Rate. | 93 | 80Ohm driver strength and Fast Slew Rate. |
| 92 | User should refer to each SoC spec to set the correct value. | 94 | User should refer to each SoC spec to set the correct value. |
| 93 | |||
| 94 | TODO: when dtc macro support is available, we can change above raw data | ||
| 95 | to dt macro which can get better readability in dts file. | ||
| @@ -0,0 +1,99 @@ | |||
| 1 | * Freescale IMX27 IOMUX Controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "fsl,imx27-iomuxc" | ||
| 5 | |||
| 6 | The iomuxc driver node should define subnodes containing of pinctrl configuration subnodes. | ||
| 7 | |||
| 8 | Required properties for pin configuration node: | ||
| 9 | - fsl,pins: three integers array, represents a group of pins mux and config | ||
| 10 | setting. The format is fsl,pins = <PIN MUX_ID CONFIG>. | ||
| 11 | |||
| 12 | PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable | ||
| 13 | configurable pins each. PIN is PORT * 32 + PORT_PIN, PORT_PIN is the pin | ||
| 14 | number on the specific port (between 0 and 31). | ||
| 15 | |||
| 16 | MUX_ID is | ||
| 17 | function + (direction << 2) + (gpio_oconf << 4) + (gpio_iconfa << 8) + (gpio_iconfb << 10) | ||
| 18 | |||
| 19 | function value is used to select the pin function. | ||
| 20 | Possible values: | ||
| 21 | 0 - Primary function | ||
| 22 | 1 - Alternate function | ||
| 23 | 2 - GPIO | ||
| 24 | Registers: GIUS (GPIO In Use), GPR (General Purpose Register) | ||
| 25 | |||
| 26 | direction defines the data direction of the pin. | ||
| 27 | Possible values: | ||
| 28 | 0 - Input | ||
| 29 | 1 - Output | ||
| 30 | Register: DDIR | ||
| 31 | |||
| 32 | gpio_oconf configures the gpio submodule output signal. This does not | ||
| 33 | have any effect unless GPIO function is selected. A/B/C_IN are output | ||
| 34 | signals of function blocks A,B and C. Specific function blocks are | ||
| 35 | described in the reference manual. | ||
| 36 | Possible values: | ||
| 37 | 0 - A_IN | ||
| 38 | 1 - B_IN | ||
| 39 | 2 - C_IN | ||
| 40 | 3 - Data Register | ||
| 41 | Registers: OCR1, OCR2 | ||
| 42 | |||
| 43 | gpio_iconfa/b configures the gpio submodule input to functionblocks A and | ||
| 44 | B. GPIO function should be selected if this is configured. | ||
| 45 | Possible values: | ||
| 46 | 0 - GPIO_IN | ||
| 47 | 1 - Interrupt Status Register | ||
| 48 | 2 - Pulldown | ||
| 49 | 3 - Pullup | ||
| 50 | Registers ICONFA1, ICONFA2, ICONFB1 and ICONFB2 | ||
| 51 | |||
| 52 | CONFIG can be 0 or 1, meaning Pullup disable/enable. | ||
| 53 | |||
| 54 | |||
| 55 | |||
| 56 | Example: | ||
| 57 | |||
| 58 | iomuxc: iomuxc@10015000 { | ||
| 59 | compatible = "fsl,imx27-iomuxc"; | ||
| 60 | reg = <0x10015000 0x600>; | ||
| 61 | |||
| 62 | uart { | ||
| 63 | pinctrl_uart1: uart-1 { | ||
| 64 | fsl,pins = < | ||
| 65 | 0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */ | ||
| 66 | 0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */ | ||
| 67 | 0x8e 0x004 0x0 /* UART1_CTS__UART1_CTS */ | ||
| 68 | 0x8f 0x000 0x0 /* UART1_RTS__UART1_RTS */ | ||
| 69 | >; | ||
| 70 | }; | ||
| 71 | |||
| 72 | ... | ||
| 73 | }; | ||
| 74 | }; | ||
| 75 | |||
| 76 | |||
| 77 | For convenience there are macros defined in imx27-pinfunc.h which provide PIN | ||
| 78 | and MUX_ID. They are structured as MX27_PAD_<Pad name>__<Signal name>. The names | ||
| 79 | are defined in the i.MX27 reference manual. | ||
| 80 | |||
| 81 | The above example using macros: | ||
| 82 | |||
| 83 | iomuxc: iomuxc@10015000 { | ||
| 84 | compatible = "fsl,imx27-iomuxc"; | ||
| 85 | reg = <0x10015000 0x600>; | ||
| 86 | |||
| 87 | uart { | ||
| 88 | pinctrl_uart1: uart-1 { | ||
| 89 | fsl,pins = < | ||
| 90 | MX27_PAD_UART1_TXD__UART1_TXD 0x0 | ||
| 91 | MX27_PAD_UART1_RXD__UART1_RXD 0x0 | ||
| 92 | MX27_PAD_UART1_CTS__UART1_CTS 0x0 | ||
| 93 | MX27_PAD_UART1_RTS__UART1_RTS 0x0 | ||
| 94 | >; | ||
| 95 | }; | ||
| 96 | |||
| 97 | ... | ||
| 98 | }; | ||
| 99 | }; | ||
| @@ -59,16 +59,16 @@ Required subnode-properties: · 58 unmodified lines | |||
| 59 | 59 | ||
| 60 | Optional subnode-properties: | 60 | Optional subnode-properties: |
| 61 | - fsl,drive-strength: Integer. | 61 | - fsl,drive-strength: Integer. |
| 62 | 0: 4 mA | 62 | 0: MXS_DRIVE_4mA |
| 63 | 1: 8 mA | 63 | 1: MXS_DRIVE_8mA |
| 64 | 2: 12 mA | 64 | 2: MXS_DRIVE_12mA |
| 65 | 3: 16 mA | 65 | 3: MXS_DRIVE_16mA |
| 66 | - fsl,voltage: Integer. | 66 | - fsl,voltage: Integer. |
| 67 | 0: 1.8 V | 67 | 0: MXS_VOLTAGE_LOW - 1.8 V |
| 68 | 1: 3.3 V | 68 | 1: MXS_VOLTAGE_HIGH - 3.3 V |
| 69 | - fsl,pull-up: Integer. | 69 | - fsl,pull-up: Integer. |
| 70 | 0: Disable the internal pull-up | 70 | 0: MXS_PULL_DISABLE - Disable the internal pull-up |
| 71 | 1: Enable the internal pull-up | 71 | 1: MXS_PULL_ENABLE - Enable the internal pull-up |
| 72 | 72 | ||
| 73 | Note that when enabling the pull-up, the internal pad keeper gets disabled. | 73 | Note that when enabling the pull-up, the internal pad keeper gets disabled. |
| 74 | Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up | 74 | Also, some pins doesn't have a pull up, in that case, setting the fsl,pull-up |
| @@ -85,23 +85,32 @@ pinctrl@80018000 { · 10 unmodified lines | |||
| 85 | mmc0_8bit_pins_a: mmc0-8bit@0 { | 85 | mmc0_8bit_pins_a: mmc0-8bit@0 { |
| 86 | reg = <0>; | 86 | reg = <0>; |
| 87 | fsl,pinmux-ids = < | 87 | fsl,pinmux-ids = < |
| 88 | 0x2000 0x2010 0x2020 0x2030 | 88 | MX28_PAD_SSP0_DATA0__SSP0_D0 |
| 89 | 0x2040 0x2050 0x2060 0x2070 | 89 | MX28_PAD_SSP0_DATA1__SSP0_D1 |
| 90 | 0x2080 0x2090 0x20a0>; | 90 | MX28_PAD_SSP0_DATA2__SSP0_D2 |
| 91 | fsl,drive-strength = <1>; | 91 | MX28_PAD_SSP0_DATA3__SSP0_D3 |
| 92 | fsl,voltage = <1>; | 92 | MX28_PAD_SSP0_DATA4__SSP0_D4 |
| 93 | fsl,pull-up = <1>; | 93 | MX28_PAD_SSP0_DATA5__SSP0_D5 |
| 94 | MX28_PAD_SSP0_DATA6__SSP0_D6 | ||
| 95 | MX28_PAD_SSP0_DATA7__SSP0_D7 | ||
| 96 | MX28_PAD_SSP0_CMD__SSP0_CMD | ||
| 97 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | ||
| 98 | MX28_PAD_SSP0_SCK__SSP0_SCK | ||
| 99 | >; | ||
| 100 | fsl,drive-strength = <MXS_DRIVE_4mA>; | ||
| 101 | fsl,voltage = <MXS_VOLTAGE_HIGH>; | ||
| 102 | fsl,pull-up = <MXS_PULL_ENABLE>; | ||
| 94 | }; | 103 | }; |
| 95 | 104 | ||
| 96 | mmc_cd_cfg: mmc-cd-cfg { | 105 | mmc_cd_cfg: mmc-cd-cfg { |
| 97 | fsl,pinmux-ids = <0x2090>; | 106 | fsl,pinmux-ids = <MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT>; |
| 98 | fsl,pull-up = <0>; | 107 | fsl,pull-up = <MXS_PULL_DISABLE>; |
| 99 | }; | 108 | }; |
| 100 | 109 | ||
| 101 | mmc_sck_cfg: mmc-sck-cfg { | 110 | mmc_sck_cfg: mmc-sck-cfg { |
| 102 | fsl,pinmux-ids = <0x20a0>; | 111 | fsl,pinmux-ids = <MX28_PAD_SSP0_SCK__SSP0_SCK>; |
| 103 | fsl,drive-strength = <2>; | 112 | fsl,drive-strength = <MXS_DRIVE_12mA>; |
| 104 | fsl,pull-up = <0>; | 113 | fsl,pull-up = <MXS_PULL_DISABLE>; |
| 105 | }; | 114 | }; |
| 106 | }; | 115 | }; |
| 107 | 116 | ||
| @@ -112,811 +121,7 @@ adjusting the configuration for pins card-detection and clock from what group · 4 unmodified lines | |||
| 112 | node mmc0-8bit defines. Only the configuration properties to be adjusted need | 121 | node mmc0-8bit defines. Only the configuration properties to be adjusted need |
| 113 | to be listed in the config nodes. | 122 | to be listed in the config nodes. |
| 114 | 123 | ||
| 115 | Valid values for i.MX28 pinmux-id: | 124 | Valid values for i.MX28/i.MX23 pinmux-id are defined in |
| 116 | 125 | arch/arm/boot/dts/imx28-pinfunc.h and arch/arm/boot/dts/imx23-pinfunc.h. | |
| 117 | pinmux id | 126 | The definitions for the padconfig properties can be found in |
| 118 | ------ -- | 127 | arch/arm/boot/dts/mxs-pinfunc.h. |
| 119 | MX28_PAD_GPMI_D00__GPMI_D0 0x0000 | ||
| 120 | MX28_PAD_GPMI_D01__GPMI_D1 0x0010 | ||
| 121 | MX28_PAD_GPMI_D02__GPMI_D2 0x0020 | ||
| 122 | MX28_PAD_GPMI_D03__GPMI_D3 0x0030 | ||
| 123 | MX28_PAD_GPMI_D04__GPMI_D4 0x0040 | ||
| 124 | MX28_PAD_GPMI_D05__GPMI_D5 0x0050 | ||
| 125 | MX28_PAD_GPMI_D06__GPMI_D6 0x0060 | ||
| 126 | MX28_PAD_GPMI_D07__GPMI_D7 0x0070 | ||
| 127 | MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100 | ||
| 128 | MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110 | ||
| 129 | MX28_PAD_GPMI_CE2N__GPMI_CE2N 0x0120 | ||
| 130 | MX28_PAD_GPMI_CE3N__GPMI_CE3N 0x0130 | ||
| 131 | MX28_PAD_GPMI_RDY0__GPMI_READY0 0x0140 | ||
| 132 | MX28_PAD_GPMI_RDY1__GPMI_READY1 0x0150 | ||
| 133 | MX28_PAD_GPMI_RDY2__GPMI_READY2 0x0160 | ||
| 134 | MX28_PAD_GPMI_RDY3__GPMI_READY3 0x0170 | ||
| 135 | MX28_PAD_GPMI_RDN__GPMI_RDN 0x0180 | ||
| 136 | MX28_PAD_GPMI_WRN__GPMI_WRN 0x0190 | ||
| 137 | MX28_PAD_GPMI_ALE__GPMI_ALE 0x01a0 | ||
| 138 | MX28_PAD_GPMI_CLE__GPMI_CLE 0x01b0 | ||
| 139 | MX28_PAD_GPMI_RESETN__GPMI_RESETN 0x01c0 | ||
| 140 | MX28_PAD_LCD_D00__LCD_D0 0x1000 | ||
| 141 | MX28_PAD_LCD_D01__LCD_D1 0x1010 | ||
| 142 | MX28_PAD_LCD_D02__LCD_D2 0x1020 | ||
| 143 | MX28_PAD_LCD_D03__LCD_D3 0x1030 | ||
| 144 | MX28_PAD_LCD_D04__LCD_D4 0x1040 | ||
| 145 | MX28_PAD_LCD_D05__LCD_D5 0x1050 | ||
| 146 | MX28_PAD_LCD_D06__LCD_D6 0x1060 | ||
| 147 | MX28_PAD_LCD_D07__LCD_D7 0x1070 | ||
| 148 | MX28_PAD_LCD_D08__LCD_D8 0x1080 | ||
| 149 | MX28_PAD_LCD_D09__LCD_D9 0x1090 | ||
| 150 | MX28_PAD_LCD_D10__LCD_D10 0x10a0 | ||
| 151 | MX28_PAD_LCD_D11__LCD_D11 0x10b0 | ||
| 152 | MX28_PAD_LCD_D12__LCD_D12 0x10c0 | ||
| 153 | MX28_PAD_LCD_D13__LCD_D13 0x10d0 | ||
| 154 | MX28_PAD_LCD_D14__LCD_D14 0x10e0 | ||
| 155 | MX28_PAD_LCD_D15__LCD_D15 0x10f0 | ||
| 156 | MX28_PAD_LCD_D16__LCD_D16 0x1100 | ||
| 157 | MX28_PAD_LCD_D17__LCD_D17 0x1110 | ||
| 158 | MX28_PAD_LCD_D18__LCD_D18 0x1120 | ||
| 159 | MX28_PAD_LCD_D19__LCD_D19 0x1130 | ||
| 160 | MX28_PAD_LCD_D20__LCD_D20 0x1140 | ||
| 161 | MX28_PAD_LCD_D21__LCD_D21 0x1150 | ||
| 162 | MX28_PAD_LCD_D22__LCD_D22 0x1160 | ||
| 163 | MX28_PAD_LCD_D23__LCD_D23 0x1170 | ||
| 164 | MX28_PAD_LCD_RD_E__LCD_RD_E 0x1180 | ||
| 165 | MX28_PAD_LCD_WR_RWN__LCD_WR_RWN 0x1190 | ||
| 166 | MX28_PAD_LCD_RS__LCD_RS 0x11a0 | ||
| 167 | MX28_PAD_LCD_CS__LCD_CS 0x11b0 | ||
| 168 | MX28_PAD_LCD_VSYNC__LCD_VSYNC 0x11c0 | ||
| 169 | MX28_PAD_LCD_HSYNC__LCD_HSYNC 0x11d0 | ||
| 170 | MX28_PAD_LCD_DOTCLK__LCD_DOTCLK 0x11e0 | ||
| 171 | MX28_PAD_LCD_ENABLE__LCD_ENABLE 0x11f0 | ||
| 172 | MX28_PAD_SSP0_DATA0__SSP0_D0 0x2000 | ||
| 173 | MX28_PAD_SSP0_DATA1__SSP0_D1 0x2010 | ||
| 174 | MX28_PAD_SSP0_DATA2__SSP0_D2 0x2020 | ||
| 175 | MX28_PAD_SSP0_DATA3__SSP0_D3 0x2030 | ||
| 176 | MX28_PAD_SSP0_DATA4__SSP0_D4 0x2040 | ||
| 177 | MX28_PAD_SSP0_DATA5__SSP0_D5 0x2050 | ||
| 178 | MX28_PAD_SSP0_DATA6__SSP0_D6 0x2060 | ||
| 179 | MX28_PAD_SSP0_DATA7__SSP0_D7 0x2070 | ||
| 180 | MX28_PAD_SSP0_CMD__SSP0_CMD 0x2080 | ||
| 181 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT 0x2090 | ||
| 182 | MX28_PAD_SSP0_SCK__SSP0_SCK 0x20a0 | ||
| 183 | MX28_PAD_SSP1_SCK__SSP1_SCK 0x20c0 | ||
| 184 | MX28_PAD_SSP1_CMD__SSP1_CMD 0x20d0 | ||
| 185 | MX28_PAD_SSP1_DATA0__SSP1_D0 0x20e0 | ||
| 186 | MX28_PAD_SSP1_DATA3__SSP1_D3 0x20f0 | ||
| 187 | MX28_PAD_SSP2_SCK__SSP2_SCK 0x2100 | ||
| 188 | MX28_PAD_SSP2_MOSI__SSP2_CMD 0x2110 | ||
| 189 | MX28_PAD_SSP2_MISO__SSP2_D0 0x2120 | ||
| 190 | MX28_PAD_SSP2_SS0__SSP2_D3 0x2130 | ||
| 191 | MX28_PAD_SSP2_SS1__SSP2_D4 0x2140 | ||
| 192 | MX28_PAD_SSP2_SS2__SSP2_D5 0x2150 | ||
| 193 | MX28_PAD_SSP3_SCK__SSP3_SCK 0x2180 | ||
| 194 | MX28_PAD_SSP3_MOSI__SSP3_CMD 0x2190 | ||
| 195 | MX28_PAD_SSP3_MISO__SSP3_D0 0x21a0 | ||
| 196 | MX28_PAD_SSP3_SS0__SSP3_D3 0x21b0 | ||
| 197 | MX28_PAD_AUART0_RX__AUART0_RX 0x3000 | ||
| 198 | MX28_PAD_AUART0_TX__AUART0_TX 0x3010 | ||
| 199 | MX28_PAD_AUART0_CTS__AUART0_CTS 0x3020 | ||
| 200 | MX28_PAD_AUART0_RTS__AUART0_RTS 0x3030 | ||
| 201 | MX28_PAD_AUART1_RX__AUART1_RX 0x3040 | ||
| 202 | MX28_PAD_AUART1_TX__AUART1_TX 0x3050 | ||
| 203 | MX28_PAD_AUART1_CTS__AUART1_CTS 0x3060 | ||
| 204 | MX28_PAD_AUART1_RTS__AUART1_RTS 0x3070 | ||
| 205 | MX28_PAD_AUART2_RX__AUART2_RX 0x3080 | ||
| 206 | MX28_PAD_AUART2_TX__AUART2_TX 0x3090 | ||
| 207 | MX28_PAD_AUART2_CTS__AUART2_CTS 0x30a0 | ||
| 208 | MX28_PAD_AUART2_RTS__AUART2_RTS 0x30b0 | ||
| 209 | MX28_PAD_AUART3_RX__AUART3_RX 0x30c0 | ||
| 210 | MX28_PAD_AUART3_TX__AUART3_TX 0x30d0 | ||
| 211 | MX28_PAD_AUART3_CTS__AUART3_CTS 0x30e0 | ||
| 212 | MX28_PAD_AUART3_RTS__AUART3_RTS 0x30f0 | ||
| 213 | MX28_PAD_PWM0__PWM_0 0x3100 | ||
| 214 | MX28_PAD_PWM1__PWM_1 0x3110 | ||
| 215 | MX28_PAD_PWM2__PWM_2 0x3120 | ||
| 216 | MX28_PAD_SAIF0_MCLK__SAIF0_MCLK 0x3140 | ||
| 217 | MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK 0x3150 | ||
| 218 | MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK 0x3160 | ||
| 219 | MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 0x3170 | ||
| 220 | MX28_PAD_I2C0_SCL__I2C0_SCL 0x3180 | ||
| 221 | MX28_PAD_I2C0_SDA__I2C0_SDA 0x3190 | ||
| 222 | MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 0x31a0 | ||
| 223 | MX28_PAD_SPDIF__SPDIF_TX 0x31b0 | ||
| 224 | MX28_PAD_PWM3__PWM_3 0x31c0 | ||
| 225 | MX28_PAD_PWM4__PWM_4 0x31d0 | ||
| 226 | MX28_PAD_LCD_RESET__LCD_RESET 0x31e0 | ||
| 227 | MX28_PAD_ENET0_MDC__ENET0_MDC 0x4000 | ||
| 228 | MX28_PAD_ENET0_MDIO__ENET0_MDIO 0x4010 | ||
| 229 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN 0x4020 | ||
| 230 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 0x4030 | ||
| 231 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 0x4040 | ||
| 232 | MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK 0x4050 | ||
| 233 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN 0x4060 | ||
| 234 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 0x4070 | ||
| 235 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 0x4080 | ||
| 236 | MX28_PAD_ENET0_RXD2__ENET0_RXD2 0x4090 | ||
| 237 | MX28_PAD_ENET0_RXD3__ENET0_RXD3 0x40a0 | ||
| 238 | MX28_PAD_ENET0_TXD2__ENET0_TXD2 0x40b0 | ||
| 239 | MX28_PAD_ENET0_TXD3__ENET0_TXD3 0x40c0 | ||
| 240 | MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK 0x40d0 | ||
| 241 | MX28_PAD_ENET0_COL__ENET0_COL 0x40e0 | ||
| 242 | MX28_PAD_ENET0_CRS__ENET0_CRS 0x40f0 | ||
| 243 | MX28_PAD_ENET_CLK__CLKCTRL_ENET 0x4100 | ||
| 244 | MX28_PAD_JTAG_RTCK__JTAG_RTCK 0x4140 | ||
| 245 | MX28_PAD_EMI_D00__EMI_DATA0 0x5000 | ||
| 246 | MX28_PAD_EMI_D01__EMI_DATA1 0x5010 | ||
| 247 | MX28_PAD_EMI_D02__EMI_DATA2 0x5020 | ||
| 248 | MX28_PAD_EMI_D03__EMI_DATA3 0x5030 | ||
| 249 | MX28_PAD_EMI_D04__EMI_DATA4 0x5040 | ||
| 250 | MX28_PAD_EMI_D05__EMI_DATA5 0x5050 | ||
| 251 | MX28_PAD_EMI_D06__EMI_DATA6 0x5060 | ||
| 252 | MX28_PAD_EMI_D07__EMI_DATA7 0x5070 | ||
| 253 | MX28_PAD_EMI_D08__EMI_DATA8 0x5080 | ||
| 254 | MX28_PAD_EMI_D09__EMI_DATA9 0x5090 | ||
| 255 | MX28_PAD_EMI_D10__EMI_DATA10 0x50a0 | ||
| 256 | MX28_PAD_EMI_D11__EMI_DATA11 0x50b0 | ||
| 257 | MX28_PAD_EMI_D12__EMI_DATA12 0x50c0 | ||
| 258 | MX28_PAD_EMI_D13__EMI_DATA13 0x50d0 | ||
| 259 | MX28_PAD_EMI_D14__EMI_DATA14 0x50e0 | ||
| 260 | MX28_PAD_EMI_D15__EMI_DATA15 0x50f0 | ||
| 261 | MX28_PAD_EMI_ODT0__EMI_ODT0 0x5100 | ||
| 262 | MX28_PAD_EMI_DQM0__EMI_DQM0 0x5110 | ||
| 263 | MX28_PAD_EMI_ODT1__EMI_ODT1 0x5120 | ||
| 264 | MX28_PAD_EMI_DQM1__EMI_DQM1 0x5130 | ||
| 265 | MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK 0x5140 | ||
| 266 | MX28_PAD_EMI_CLK__EMI_CLK 0x5150 | ||
| 267 | MX28_PAD_EMI_DQS0__EMI_DQS0 0x5160 | ||
| 268 | MX28_PAD_EMI_DQS1__EMI_DQS1 0x5170 | ||
| 269 | MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN 0x51a0 | ||
| 270 | MX28_PAD_EMI_A00__EMI_ADDR0 0x6000 | ||
| 271 | MX28_PAD_EMI_A01__EMI_ADDR1 0x6010 | ||
| 272 | MX28_PAD_EMI_A02__EMI_ADDR2 0x6020 | ||
| 273 | MX28_PAD_EMI_A03__EMI_ADDR3 0x6030 | ||
| 274 | MX28_PAD_EMI_A04__EMI_ADDR4 0x6040 | ||
| 275 | MX28_PAD_EMI_A05__EMI_ADDR5 0x6050 | ||
| 276 | MX28_PAD_EMI_A06__EMI_ADDR6 0x6060 | ||
| 277 | MX28_PAD_EMI_A07__EMI_ADDR7 0x6070 | ||
| 278 | MX28_PAD_EMI_A08__EMI_ADDR8 0x6080 | ||
| 279 | MX28_PAD_EMI_A09__EMI_ADDR9 0x6090 | ||
| 280 | MX28_PAD_EMI_A10__EMI_ADDR10 0x60a0 | ||
| 281 | MX28_PAD_EMI_A11__EMI_ADDR11 0x60b0 | ||
| 282 | MX28_PAD_EMI_A12__EMI_ADDR12 0x60c0 | ||
| 283 | MX28_PAD_EMI_A13__EMI_ADDR13 0x60d0 | ||
| 284 | MX28_PAD_EMI_A14__EMI_ADDR14 0x60e0 | ||
| 285 | MX28_PAD_EMI_BA0__EMI_BA0 0x6100 | ||
| 286 | MX28_PAD_EMI_BA1__EMI_BA1 0x6110 | ||
| 287 | MX28_PAD_EMI_BA2__EMI_BA2 0x6120 | ||
| 288 | MX28_PAD_EMI_CASN__EMI_CASN 0x6130 | ||
| 289 | MX28_PAD_EMI_RASN__EMI_RASN 0x6140 | ||
| 290 | MX28_PAD_EMI_WEN__EMI_WEN 0x6150 | ||
| 291 | MX28_PAD_EMI_CE0N__EMI_CE0N 0x6160 | ||
| 292 | MX28_PAD_EMI_CE1N__EMI_CE1N 0x6170 | ||
| 293 | MX28_PAD_EMI_CKE__EMI_CKE 0x6180 | ||
| 294 | MX28_PAD_GPMI_D00__SSP1_D0 0x0001 | ||
| 295 | MX28_PAD_GPMI_D01__SSP1_D1 0x0011 | ||
| 296 | MX28_PAD_GPMI_D02__SSP1_D2 0x0021 | ||
| 297 | MX28_PAD_GPMI_D03__SSP1_D3 0x0031 | ||
| 298 | MX28_PAD_GPMI_D04__SSP1_D4 0x0041 | ||
| 299 | MX28_PAD_GPMI_D05__SSP1_D5 0x0051 | ||
| 300 | MX28_PAD_GPMI_D06__SSP1_D6 0x0061 | ||
| 301 | MX28_PAD_GPMI_D07__SSP1_D7 0x0071 | ||
| 302 | MX28_PAD_GPMI_CE0N__SSP3_D0 0x0101 | ||
| 303 | MX28_PAD_GPMI_CE1N__SSP3_D3 0x0111 | ||
| 304 | MX28_PAD_GPMI_CE2N__CAN1_TX 0x0121 | ||
| 305 | MX28_PAD_GPMI_CE3N__CAN1_RX 0x0131 | ||
| 306 | MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT 0x0141 | ||
| 307 | MX28_PAD_GPMI_RDY1__SSP1_CMD 0x0151 | ||
| 308 | MX28_PAD_GPMI_RDY2__CAN0_TX 0x0161 | ||
| 309 | MX28_PAD_GPMI_RDY3__CAN0_RX 0x0171 | ||
| 310 | MX28_PAD_GPMI_RDN__SSP3_SCK 0x0181 | ||
| 311 | MX28_PAD_GPMI_WRN__SSP1_SCK 0x0191 | ||
| 312 | MX28_PAD_GPMI_ALE__SSP3_D1 0x01a1 | ||
| 313 | MX28_PAD_GPMI_CLE__SSP3_D2 0x01b1 | ||
| 314 | MX28_PAD_GPMI_RESETN__SSP3_CMD 0x01c1 | ||
| 315 | MX28_PAD_LCD_D03__ETM_DA8 0x1031 | ||
| 316 | MX28_PAD_LCD_D04__ETM_DA9 0x1041 | ||
| 317 | MX28_PAD_LCD_D08__ETM_DA3 0x1081 | ||
| 318 | MX28_PAD_LCD_D09__ETM_DA4 0x1091 | ||
| 319 | MX28_PAD_LCD_D20__ENET1_1588_EVENT2_OUT 0x1141 | ||
| 320 | MX28_PAD_LCD_D21__ENET1_1588_EVENT2_IN 0x1151 | ||
| 321 | MX28_PAD_LCD_D22__ENET1_1588_EVENT3_OUT 0x1161 | ||
| 322 | MX28_PAD_LCD_D23__ENET1_1588_EVENT3_IN 0x1171 | ||
| 323 | MX28_PAD_LCD_RD_E__LCD_VSYNC 0x1181 | ||
| 324 | MX28_PAD_LCD_WR_RWN__LCD_HSYNC 0x1191 | ||
| 325 | MX28_PAD_LCD_RS__LCD_DOTCLK 0x11a1 | ||
| 326 | MX28_PAD_LCD_CS__LCD_ENABLE 0x11b1 | ||
| 327 | MX28_PAD_LCD_VSYNC__SAIF1_SDATA0 0x11c1 | ||
| 328 | MX28_PAD_LCD_HSYNC__SAIF1_SDATA1 0x11d1 | ||
| 329 | MX28_PAD_LCD_DOTCLK__SAIF1_MCLK 0x11e1 | ||
| 330 | MX28_PAD_SSP0_DATA4__SSP2_D0 0x2041 | ||
| 331 | MX28_PAD_SSP0_DATA5__SSP2_D3 0x2051 | ||
| 332 | MX28_PAD_SSP0_DATA6__SSP2_CMD 0x2061 | ||
| 333 | MX28_PAD_SSP0_DATA7__SSP2_SCK 0x2071 | ||
| 334 | MX28_PAD_SSP1_SCK__SSP2_D1 0x20c1 | ||
| 335 | MX28_PAD_SSP1_CMD__SSP2_D2 0x20d1 | ||
| 336 | MX28_PAD_SSP1_DATA0__SSP2_D6 0x20e1 | ||
| 337 | MX28_PAD_SSP1_DATA3__SSP2_D7 0x20f1 | ||
| 338 | MX28_PAD_SSP2_SCK__AUART2_RX 0x2101 | ||
| 339 | MX28_PAD_SSP2_MOSI__AUART2_TX 0x2111 | ||
| 340 | MX28_PAD_SSP2_MISO__AUART3_RX 0x2121 | ||
| 341 | MX28_PAD_SSP2_SS0__AUART3_TX 0x2131 | ||
| 342 | MX28_PAD_SSP2_SS1__SSP2_D1 0x2141 | ||
| 343 | MX28_PAD_SSP2_SS2__SSP2_D2 0x2151 | ||
| 344 | MX28_PAD_SSP3_SCK__AUART4_TX 0x2181 | ||
| 345 | MX28_PAD_SSP3_MOSI__AUART4_RX 0x2191 | ||
| 346 | MX28_PAD_SSP3_MISO__AUART4_RTS 0x21a1 | ||
| 347 | MX28_PAD_SSP3_SS0__AUART4_CTS 0x21b1 | ||
| 348 | MX28_PAD_AUART0_RX__I2C0_SCL 0x3001 | ||
| 349 | MX28_PAD_AUART0_TX__I2C0_SDA 0x3011 | ||
| 350 | MX28_PAD_AUART0_CTS__AUART4_RX 0x3021 | ||
| 351 | MX28_PAD_AUART0_RTS__AUART4_TX 0x3031 | ||
| 352 | MX28_PAD_AUART1_RX__SSP2_CARD_DETECT 0x3041 | ||
| 353 | MX28_PAD_AUART1_TX__SSP3_CARD_DETECT 0x3051 | ||
| 354 | MX28_PAD_AUART1_CTS__USB0_OVERCURRENT 0x3061 | ||
| 355 | MX28_PAD_AUART1_RTS__USB0_ID 0x3071 | ||
| 356 | MX28_PAD_AUART2_RX__SSP3_D1 0x3081 | ||
| 357 | MX28_PAD_AUART2_TX__SSP3_D2 0x3091 | ||
| 358 | MX28_PAD_AUART2_CTS__I2C1_SCL 0x30a1 | ||
| 359 | MX28_PAD_AUART2_RTS__I2C1_SDA 0x30b1 | ||
| 360 | MX28_PAD_AUART3_RX__CAN0_TX 0x30c1 | ||
| 361 | MX28_PAD_AUART3_TX__CAN0_RX 0x30d1 | ||
| 362 | MX28_PAD_AUART3_CTS__CAN1_TX 0x30e1 | ||
| 363 | MX28_PAD_AUART3_RTS__CAN1_RX 0x30f1 | ||
| 364 | MX28_PAD_PWM0__I2C1_SCL 0x3101 | ||
| 365 | MX28_PAD_PWM1__I2C1_SDA 0x3111 | ||
| 366 | MX28_PAD_PWM2__USB0_ID 0x3121 | ||
| 367 | MX28_PAD_SAIF0_MCLK__PWM_3 0x3141 | ||
| 368 | MX28_PAD_SAIF0_LRCLK__PWM_4 0x3151 | ||
| 369 | MX28_PAD_SAIF0_BITCLK__PWM_5 0x3161 | ||
| 370 | MX28_PAD_SAIF0_SDATA0__PWM_6 0x3171 | ||
| 371 | MX28_PAD_I2C0_SCL__TIMROT_ROTARYA 0x3181 | ||
| 372 | MX28_PAD_I2C0_SDA__TIMROT_ROTARYB 0x3191 | ||
| 373 | MX28_PAD_SAIF1_SDATA0__PWM_7 0x31a1 | ||
| 374 | MX28_PAD_LCD_RESET__LCD_VSYNC 0x31e1 | ||
| 375 | MX28_PAD_ENET0_MDC__GPMI_CE4N 0x4001 | ||
| 376 | MX28_PAD_ENET0_MDIO__GPMI_CE5N 0x4011 | ||
| 377 | MX28_PAD_ENET0_RX_EN__GPMI_CE6N 0x4021 | ||
| 378 | MX28_PAD_ENET0_RXD0__GPMI_CE7N 0x4031 | ||
| 379 | MX28_PAD_ENET0_RXD1__GPMI_READY4 0x4041 | ||
| 380 | MX28_PAD_ENET0_TX_CLK__HSADC_TRIGGER 0x4051 | ||
| 381 | MX28_PAD_ENET0_TX_EN__GPMI_READY5 0x4061 | ||
| 382 | MX28_PAD_ENET0_TXD0__GPMI_READY6 0x4071 | ||
| 383 | MX28_PAD_ENET0_TXD1__GPMI_READY7 0x4081 | ||
| 384 | MX28_PAD_ENET0_RXD2__ENET1_RXD0 0x4091 | ||
| 385 | MX28_PAD_ENET0_RXD3__ENET1_RXD1 0x40a1 | ||
| 386 | MX28_PAD_ENET0_TXD2__ENET1_TXD0 0x40b1 | ||
| 387 | MX28_PAD_ENET0_TXD3__ENET1_TXD1 0x40c1 | ||
| 388 | MX28_PAD_ENET0_RX_CLK__ENET0_RX_ER 0x40d1 | ||
| 389 | MX28_PAD_ENET0_COL__ENET1_TX_EN 0x40e1 | ||
| 390 | MX28_PAD_ENET0_CRS__ENET1_RX_EN 0x40f1 | ||
| 391 | MX28_PAD_GPMI_CE2N__ENET0_RX_ER 0x0122 | ||
| 392 | MX28_PAD_GPMI_CE3N__SAIF1_MCLK 0x0132 | ||
| 393 | MX28_PAD_GPMI_RDY0__USB0_ID 0x0142 | ||
| 394 | MX28_PAD_GPMI_RDY2__ENET0_TX_ER 0x0162 | ||
| 395 | MX28_PAD_GPMI_RDY3__HSADC_TRIGGER 0x0172 | ||
| 396 | MX28_PAD_GPMI_ALE__SSP3_D4 0x01a2 | ||
| 397 | MX28_PAD_GPMI_CLE__SSP3_D5 0x01b2 | ||
| 398 | MX28_PAD_LCD_D00__ETM_DA0 0x1002 | ||
| 399 | MX28_PAD_LCD_D01__ETM_DA1 0x1012 | ||
| 400 | MX28_PAD_LCD_D02__ETM_DA2 0x1022 | ||
| 401 | MX28_PAD_LCD_D03__ETM_DA3 0x1032 | ||
| 402 | MX28_PAD_LCD_D04__ETM_DA4 0x1042 | ||
| 403 | MX28_PAD_LCD_D05__ETM_DA5 0x1052 | ||
| 404 | MX28_PAD_LCD_D06__ETM_DA6 0x1062 | ||
| 405 | MX28_PAD_LCD_D07__ETM_DA7 0x1072 | ||
| 406 | MX28_PAD_LCD_D08__ETM_DA8 0x1082 | ||
| 407 | MX28_PAD_LCD_D09__ETM_DA9 0x1092 | ||
| 408 | MX28_PAD_LCD_D10__ETM_DA10 0x10a2 | ||
| 409 | MX28_PAD_LCD_D11__ETM_DA11 0x10b2 | ||
| 410 | MX28_PAD_LCD_D12__ETM_DA12 0x10c2 | ||
| 411 | MX28_PAD_LCD_D13__ETM_DA13 0x10d2 | ||
| 412 | MX28_PAD_LCD_D14__ETM_DA14 0x10e2 | ||
| 413 | MX28_PAD_LCD_D15__ETM_DA15 0x10f2 | ||
| 414 | MX28_PAD_LCD_D16__ETM_DA7 0x1102 | ||
| 415 | MX28_PAD_LCD_D17__ETM_DA6 0x1112 | ||
| 416 | MX28_PAD_LCD_D18__ETM_DA5 0x1122 | ||
| 417 | MX28_PAD_LCD_D19__ETM_DA4 0x1132 | ||
| 418 | MX28_PAD_LCD_D20__ETM_DA3 0x1142 | ||
| 419 | MX28_PAD_LCD_D21__ETM_DA2 0x1152 | ||
| 420 | MX28_PAD_LCD_D22__ETM_DA1 0x1162 | ||
| 421 | MX28_PAD_LCD_D23__ETM_DA0 0x1172 | ||
| 422 | MX28_PAD_LCD_RD_E__ETM_TCTL 0x1182 | ||
| 423 | MX28_PAD_LCD_WR_RWN__ETM_TCLK 0x1192 | ||
| 424 | MX28_PAD_LCD_HSYNC__ETM_TCTL 0x11d2 | ||
| 425 | MX28_PAD_LCD_DOTCLK__ETM_TCLK 0x11e2 | ||
| 426 | MX28_PAD_SSP1_SCK__ENET0_1588_EVENT2_OUT 0x20c2 | ||
| 427 | MX28_PAD_SSP1_CMD__ENET0_1588_EVENT2_IN 0x20d2 | ||
| 428 | MX28_PAD_SSP1_DATA0__ENET0_1588_EVENT3_OUT 0x20e2 | ||
| 429 | MX28_PAD_SSP1_DATA3__ENET0_1588_EVENT3_IN 0x20f2 | ||
| 430 | MX28_PAD_SSP2_SCK__SAIF0_SDATA1 0x2102 | ||
| 431 | MX28_PAD_SSP2_MOSI__SAIF0_SDATA2 0x2112 | ||
| 432 | MX28_PAD_SSP2_MISO__SAIF1_SDATA1 0x2122 | ||
| 433 | MX28_PAD_SSP2_SS0__SAIF1_SDATA2 0x2132 | ||
| 434 | MX28_PAD_SSP2_SS1__USB1_OVERCURRENT 0x2142 | ||
| 435 | MX28_PAD_SSP2_SS2__USB0_OVERCURRENT 0x2152 | ||
| 436 | MX28_PAD_SSP3_SCK__ENET1_1588_EVENT0_OUT 0x2182 | ||
| 437 | MX28_PAD_SSP3_MOSI__ENET1_1588_EVENT0_IN 0x2192 | ||
| 438 | MX28_PAD_SSP3_MISO__ENET1_1588_EVENT1_OUT 0x21a2 | ||
| 439 | MX28_PAD_SSP3_SS0__ENET1_1588_EVENT1_IN 0x21b2 | ||
| 440 | MX28_PAD_AUART0_RX__DUART_CTS 0x3002 | ||
| 441 | MX28_PAD_AUART0_TX__DUART_RTS 0x3012 | ||
| 442 | MX28_PAD_AUART0_CTS__DUART_RX 0x3022 | ||
| 443 | MX28_PAD_AUART0_RTS__DUART_TX 0x3032 | ||
| 444 | MX28_PAD_AUART1_RX__PWM_0 0x3042 | ||
| 445 | MX28_PAD_AUART1_TX__PWM_1 0x3052 | ||
| 446 | MX28_PAD_AUART1_CTS__TIMROT_ROTARYA 0x3062 | ||
| 447 | MX28_PAD_AUART1_RTS__TIMROT_ROTARYB 0x3072 | ||
| 448 | MX28_PAD_AUART2_RX__SSP3_D4 0x3082 | ||
| 449 | MX28_PAD_AUART2_TX__SSP3_D5 0x3092 | ||
| 450 | MX28_PAD_AUART2_CTS__SAIF1_BITCLK 0x30a2 | ||
| 451 | MX28_PAD_AUART2_RTS__SAIF1_LRCLK 0x30b2 | ||
| 452 | MX28_PAD_AUART3_RX__ENET0_1588_EVENT0_OUT 0x30c2 | ||
| 453 | MX28_PAD_AUART3_TX__ENET0_1588_EVENT0_IN 0x30d2 | ||
| 454 | MX28_PAD_AUART3_CTS__ENET0_1588_EVENT1_OUT 0x30e2 | ||
| 455 | MX28_PAD_AUART3_RTS__ENET0_1588_EVENT1_IN 0x30f2 | ||
| 456 | MX28_PAD_PWM0__DUART_RX 0x3102 | ||
| 457 | MX28_PAD_PWM1__DUART_TX 0x3112 | ||
| 458 | MX28_PAD_PWM2__USB1_OVERCURRENT 0x3122 | ||
| 459 | MX28_PAD_SAIF0_MCLK__AUART4_CTS 0x3142 | ||
| 460 | MX28_PAD_SAIF0_LRCLK__AUART4_RTS 0x3152 | ||
| 461 | MX28_PAD_SAIF0_BITCLK__AUART4_RX 0x3162 | ||
| 462 | MX28_PAD_SAIF0_SDATA0__AUART4_TX 0x3172 | ||
| 463 | MX28_PAD_I2C0_SCL__DUART_RX 0x3182 | ||
| 464 | MX28_PAD_I2C0_SDA__DUART_TX 0x3192 | ||
| 465 | MX28_PAD_SAIF1_SDATA0__SAIF0_SDATA1 0x31a2 | ||
| 466 | MX28_PAD_SPDIF__ENET1_RX_ER 0x31b2 | ||
| 467 | MX28_PAD_ENET0_MDC__SAIF0_SDATA1 0x4002 | ||
| 468 | MX28_PAD_ENET0_MDIO__SAIF0_SDATA2 0x4012 | ||
| 469 | MX28_PAD_ENET0_RX_EN__SAIF1_SDATA1 0x4022 | ||
| 470 | MX28_PAD_ENET0_RXD0__SAIF1_SDATA2 0x4032 | ||
| 471 | MX28_PAD_ENET0_TX_CLK__ENET0_1588_EVENT2_OUT 0x4052 | ||
| 472 | MX28_PAD_ENET0_RXD2__ENET0_1588_EVENT0_OUT 0x4092 | ||
| 473 | MX28_PAD_ENET0_RXD3__ENET0_1588_EVENT0_IN 0x40a2 | ||
| 474 | MX28_PAD_ENET0_TXD2__ENET0_1588_EVENT1_OUT 0x40b2 | ||
| 475 | MX28_PAD_ENET0_TXD3__ENET0_1588_EVENT1_IN 0x40c2 | ||
| 476 | MX28_PAD_ENET0_RX_CLK__ENET0_1588_EVENT2_IN 0x40d2 | ||
| 477 | MX28_PAD_ENET0_COL__ENET0_1588_EVENT3_OUT 0x40e2 | ||
| 478 | MX28_PAD_ENET0_CRS__ENET0_1588_EVENT3_IN 0x40f2 | ||
| 479 | MX28_PAD_GPMI_D00__GPIO_0_0 0x0003 | ||
| 480 | MX28_PAD_GPMI_D01__GPIO_0_1 0x0013 | ||
| 481 | MX28_PAD_GPMI_D02__GPIO_0_2 0x0023 | ||
| 482 | MX28_PAD_GPMI_D03__GPIO_0_3 0x0033 | ||
| 483 | MX28_PAD_GPMI_D04__GPIO_0_4 0x0043 | ||
| 484 | MX28_PAD_GPMI_D05__GPIO_0_5 0x0053 | ||
| 485 | MX28_PAD_GPMI_D06__GPIO_0_6 0x0063 | ||
| 486 | MX28_PAD_GPMI_D07__GPIO_0_7 0x0073 | ||
| 487 | MX28_PAD_GPMI_CE0N__GPIO_0_16 0x0103 | ||
| 488 | MX28_PAD_GPMI_CE1N__GPIO_0_17 0x0113 | ||
| 489 | MX28_PAD_GPMI_CE2N__GPIO_0_18 0x0123 | ||
| 490 | MX28_PAD_GPMI_CE3N__GPIO_0_19 0x0133 | ||
| 491 | MX28_PAD_GPMI_RDY0__GPIO_0_20 0x0143 | ||
| 492 | MX28_PAD_GPMI_RDY1__GPIO_0_21 0x0153 | ||
| 493 | MX28_PAD_GPMI_RDY2__GPIO_0_22 0x0163 | ||
| 494 | MX28_PAD_GPMI_RDY3__GPIO_0_23 0x0173 | ||
| 495 | MX28_PAD_GPMI_RDN__GPIO_0_24 0x0183 | ||
| 496 | MX28_PAD_GPMI_WRN__GPIO_0_25 0x0193 | ||
| 497 | MX28_PAD_GPMI_ALE__GPIO_0_26 0x01a3 | ||
| 498 | MX28_PAD_GPMI_CLE__GPIO_0_27 0x01b3 | ||
| 499 | MX28_PAD_GPMI_RESETN__GPIO_0_28 0x01c3 | ||
| 500 | MX28_PAD_LCD_D00__GPIO_1_0 0x1003 | ||
| 501 | MX28_PAD_LCD_D01__GPIO_1_1 0x1013 | ||
| 502 | MX28_PAD_LCD_D02__GPIO_1_2 0x1023 | ||
| 503 | MX28_PAD_LCD_D03__GPIO_1_3 0x1033 | ||
| 504 | MX28_PAD_LCD_D04__GPIO_1_4 0x1043 | ||
| 505 | MX28_PAD_LCD_D05__GPIO_1_5 0x1053 | ||
| 506 | MX28_PAD_LCD_D06__GPIO_1_6 0x1063 | ||
| 507 | MX28_PAD_LCD_D07__GPIO_1_7 0x1073 | ||
| 508 | MX28_PAD_LCD_D08__GPIO_1_8 0x1083 | ||
| 509 | MX28_PAD_LCD_D09__GPIO_1_9 0x1093 | ||
| 510 | MX28_PAD_LCD_D10__GPIO_1_10 0x10a3 | ||
| 511 | MX28_PAD_LCD_D11__GPIO_1_11 0x10b3 | ||
| 512 | MX28_PAD_LCD_D12__GPIO_1_12 0x10c3 | ||
| 513 | MX28_PAD_LCD_D13__GPIO_1_13 0x10d3 | ||
| 514 | MX28_PAD_LCD_D14__GPIO_1_14 0x10e3 | ||
| 515 | MX28_PAD_LCD_D15__GPIO_1_15 0x10f3 | ||
| 516 | MX28_PAD_LCD_D16__GPIO_1_16 0x1103 | ||
| 517 | MX28_PAD_LCD_D17__GPIO_1_17 0x1113 | ||
| 518 | MX28_PAD_LCD_D18__GPIO_1_18 0x1123 | ||
| 519 | MX28_PAD_LCD_D19__GPIO_1_19 0x1133 | ||
| 520 | MX28_PAD_LCD_D20__GPIO_1_20 0x1143 | ||
| 521 | MX28_PAD_LCD_D21__GPIO_1_21 0x1153 | ||
| 522 | MX28_PAD_LCD_D22__GPIO_1_22 0x1163 | ||
| 523 | MX28_PAD_LCD_D23__GPIO_1_23 0x1173 | ||
| 524 | MX28_PAD_LCD_RD_E__GPIO_1_24 0x1183 | ||
| 525 | MX28_PAD_LCD_WR_RWN__GPIO_1_25 0x1193 | ||
| 526 | MX28_PAD_LCD_RS__GPIO_1_26 0x11a3 | ||
| 527 | MX28_PAD_LCD_CS__GPIO_1_27 0x11b3 | ||
| 528 | MX28_PAD_LCD_VSYNC__GPIO_1_28 0x11c3 | ||
| 529 | MX28_PAD_LCD_HSYNC__GPIO_1_29 0x11d3 | ||
| 530 | MX28_PAD_LCD_DOTCLK__GPIO_1_30 0x11e3 | ||
| 531 | MX28_PAD_LCD_ENABLE__GPIO_1_31 0x11f3 | ||
| 532 | MX28_PAD_SSP0_DATA0__GPIO_2_0 0x2003 | ||
| 533 | MX28_PAD_SSP0_DATA1__GPIO_2_1 0x2013 | ||
| 534 | MX28_PAD_SSP0_DATA2__GPIO_2_2 0x2023 | ||
| 535 | MX28_PAD_SSP0_DATA3__GPIO_2_3 0x2033 | ||
| 536 | MX28_PAD_SSP0_DATA4__GPIO_2_4 0x2043 | ||
| 537 | MX28_PAD_SSP0_DATA5__GPIO_2_5 0x2053 | ||
| 538 | MX28_PAD_SSP0_DATA6__GPIO_2_6 0x2063 | ||
| 539 | MX28_PAD_SSP0_DATA7__GPIO_2_7 0x2073 | ||
| 540 | MX28_PAD_SSP0_CMD__GPIO_2_8 0x2083 | ||
| 541 | MX28_PAD_SSP0_DETECT__GPIO_2_9 0x2093 | ||
| 542 | MX28_PAD_SSP0_SCK__GPIO_2_10 0x20a3 | ||
| 543 | MX28_PAD_SSP1_SCK__GPIO_2_12 0x20c3 | ||
| 544 | MX28_PAD_SSP1_CMD__GPIO_2_13 0x20d3 | ||
| 545 | MX28_PAD_SSP1_DATA0__GPIO_2_14 0x20e3 | ||
| 546 | MX28_PAD_SSP1_DATA3__GPIO_2_15 0x20f3 | ||
| 547 | MX28_PAD_SSP2_SCK__GPIO_2_16 0x2103 | ||
| 548 | MX28_PAD_SSP2_MOSI__GPIO_2_17 0x2113 | ||
| 549 | MX28_PAD_SSP2_MISO__GPIO_2_18 0x2123 | ||
| 550 | MX28_PAD_SSP2_SS0__GPIO_2_19 0x2133 | ||
| 551 | MX28_PAD_SSP2_SS1__GPIO_2_20 0x2143 | ||
| 552 | MX28_PAD_SSP2_SS2__GPIO_2_21 0x2153 | ||
| 553 | MX28_PAD_SSP3_SCK__GPIO_2_24 0x2183 | ||
| 554 | MX28_PAD_SSP3_MOSI__GPIO_2_25 0x2193 | ||
| 555 | MX28_PAD_SSP3_MISO__GPIO_2_26 0x21a3 | ||
| 556 | MX28_PAD_SSP3_SS0__GPIO_2_27 0x21b3 | ||
| 557 | MX28_PAD_AUART0_RX__GPIO_3_0 0x3003 | ||
| 558 | MX28_PAD_AUART0_TX__GPIO_3_1 0x3013 | ||
| 559 | MX28_PAD_AUART0_CTS__GPIO_3_2 0x3023 | ||
| 560 | MX28_PAD_AUART0_RTS__GPIO_3_3 0x3033 | ||
| 561 | MX28_PAD_AUART1_RX__GPIO_3_4 0x3043 | ||
| 562 | MX28_PAD_AUART1_TX__GPIO_3_5 0x3053 | ||
| 563 | MX28_PAD_AUART1_CTS__GPIO_3_6 0x3063 | ||
| 564 | MX28_PAD_AUART1_RTS__GPIO_3_7 0x3073 | ||
| 565 | MX28_PAD_AUART2_RX__GPIO_3_8 0x3083 | ||
| 566 | MX28_PAD_AUART2_TX__GPIO_3_9 0x3093 | ||
| 567 | MX28_PAD_AUART2_CTS__GPIO_3_10 0x30a3 | ||
| 568 | MX28_PAD_AUART2_RTS__GPIO_3_11 0x30b3 | ||
| 569 | MX28_PAD_AUART3_RX__GPIO_3_12 0x30c3 | ||
| 570 | MX28_PAD_AUART3_TX__GPIO_3_13 0x30d3 | ||
| 571 | MX28_PAD_AUART3_CTS__GPIO_3_14 0x30e3 | ||
| 572 | MX28_PAD_AUART3_RTS__GPIO_3_15 0x30f3 | ||
| 573 | MX28_PAD_PWM0__GPIO_3_16 0x3103 | ||
| 574 | MX28_PAD_PWM1__GPIO_3_17 0x3113 | ||
| 575 | MX28_PAD_PWM2__GPIO_3_18 0x3123 | ||
| 576 | MX28_PAD_SAIF0_MCLK__GPIO_3_20 0x3143 | ||
| 577 | MX28_PAD_SAIF0_LRCLK__GPIO_3_21 0x3153 | ||
| 578 | MX28_PAD_SAIF0_BITCLK__GPIO_3_22 0x3163 | ||
| 579 | MX28_PAD_SAIF0_SDATA0__GPIO_3_23 0x3173 | ||
| 580 | MX28_PAD_I2C0_SCL__GPIO_3_24 0x3183 | ||
| 581 | MX28_PAD_I2C0_SDA__GPIO_3_25 0x3193 | ||
| 582 | MX28_PAD_SAIF1_SDATA0__GPIO_3_26 0x31a3 | ||
| 583 | MX28_PAD_SPDIF__GPIO_3_27 0x31b3 | ||
| 584 | MX28_PAD_PWM3__GPIO_3_28 0x31c3 | ||
| 585 | MX28_PAD_PWM4__GPIO_3_29 0x31d3 | ||
| 586 | MX28_PAD_LCD_RESET__GPIO_3_30 0x31e3 | ||
| 587 | MX28_PAD_ENET0_MDC__GPIO_4_0 0x4003 | ||
| 588 | MX28_PAD_ENET0_MDIO__GPIO_4_1 0x4013 | ||
| 589 | MX28_PAD_ENET0_RX_EN__GPIO_4_2 0x4023 | ||
| 590 | MX28_PAD_ENET0_RXD0__GPIO_4_3 0x4033 | ||
| 591 | MX28_PAD_ENET0_RXD1__GPIO_4_4 0x4043 | ||
| 592 | MX28_PAD_ENET0_TX_CLK__GPIO_4_5 0x4053 | ||
| 593 | MX28_PAD_ENET0_TX_EN__GPIO_4_6 0x4063 | ||
| 594 | MX28_PAD_ENET0_TXD0__GPIO_4_7 0x4073 | ||
| 595 | MX28_PAD_ENET0_TXD1__GPIO_4_8 0x4083 | ||
| 596 | MX28_PAD_ENET0_RXD2__GPIO_4_9 0x4093 | ||
| 597 | MX28_PAD_ENET0_RXD3__GPIO_4_10 0x40a3 | ||
| 598 | MX28_PAD_ENET0_TXD2__GPIO_4_11 0x40b3 | ||
| 599 | MX28_PAD_ENET0_TXD3__GPIO_4_12 0x40c3 | ||
| 600 | MX28_PAD_ENET0_RX_CLK__GPIO_4_13 0x40d3 | ||
| 601 | MX28_PAD_ENET0_COL__GPIO_4_14 0x40e3 | ||
| 602 | MX28_PAD_ENET0_CRS__GPIO_4_15 0x40f3 | ||
| 603 | MX28_PAD_ENET_CLK__GPIO_4_16 0x4103 | ||
| 604 | MX28_PAD_JTAG_RTCK__GPIO_4_20 0x4143 | ||
| 605 | |||
| 606 | Valid values for i.MX23 pinmux-id: | ||
| 607 | |||
| 608 | pinmux id | ||
| 609 | ------ -- | ||
| 610 | MX23_PAD_GPMI_D00__GPMI_D00 0x0000 | ||
| 611 | MX23_PAD_GPMI_D01__GPMI_D01 0x0010 | ||
| 612 | MX23_PAD_GPMI_D02__GPMI_D02 0x0020 | ||
| 613 | MX23_PAD_GPMI_D03__GPMI_D03 0x0030 | ||
| 614 | MX23_PAD_GPMI_D04__GPMI_D04 0x0040 | ||
| 615 | MX23_PAD_GPMI_D05__GPMI_D05 0x0050 | ||
| 616 | MX23_PAD_GPMI_D06__GPMI_D06 0x0060 | ||
| 617 | MX23_PAD_GPMI_D07__GPMI_D07 0x0070 | ||
| 618 | MX23_PAD_GPMI_D08__GPMI_D08 0x0080 | ||
| 619 | MX23_PAD_GPMI_D09__GPMI_D09 0x0090 | ||
| 620 | MX23_PAD_GPMI_D10__GPMI_D10 0x00a0 | ||
| 621 | MX23_PAD_GPMI_D11__GPMI_D11 0x00b0 | ||
| 622 | MX23_PAD_GPMI_D12__GPMI_D12 0x00c0 | ||
| 623 | MX23_PAD_GPMI_D13__GPMI_D13 0x00d0 | ||
| 624 | MX23_PAD_GPMI_D14__GPMI_D14 0x00e0 | ||
| 625 | MX23_PAD_GPMI_D15__GPMI_D15 0x00f0 | ||
| 626 | MX23_PAD_GPMI_CLE__GPMI_CLE 0x0100 | ||
| 627 | MX23_PAD_GPMI_ALE__GPMI_ALE 0x0110 | ||
| 628 | MX23_PAD_GPMI_CE2N__GPMI_CE2N 0x0120 | ||
| 629 | MX23_PAD_GPMI_RDY0__GPMI_RDY0 0x0130 | ||
| 630 | MX23_PAD_GPMI_RDY1__GPMI_RDY1 0x0140 | ||
| 631 | MX23_PAD_GPMI_RDY2__GPMI_RDY2 0x0150 | ||
| 632 | MX23_PAD_GPMI_RDY3__GPMI_RDY3 0x0160 | ||
| 633 | MX23_PAD_GPMI_WPN__GPMI_WPN 0x0170 | ||
| 634 | MX23_PAD_GPMI_WRN__GPMI_WRN 0x0180 | ||
| 635 | MX23_PAD_GPMI_RDN__GPMI_RDN 0x0190 | ||
| 636 | MX23_PAD_AUART1_CTS__AUART1_CTS 0x01a0 | ||
| 637 | MX23_PAD_AUART1_RTS__AUART1_RTS 0x01b0 | ||
| 638 | MX23_PAD_AUART1_RX__AUART1_RX 0x01c0 | ||
| 639 | MX23_PAD_AUART1_TX__AUART1_TX 0x01d0 | ||
| 640 | MX23_PAD_I2C_SCL__I2C_SCL 0x01e0 | ||
| 641 | MX23_PAD_I2C_SDA__I2C_SDA 0x01f0 | ||
| 642 | MX23_PAD_LCD_D00__LCD_D00 0x1000 | ||
| 643 | MX23_PAD_LCD_D01__LCD_D01 0x1010 | ||
| 644 | MX23_PAD_LCD_D02__LCD_D02 0x1020 | ||
| 645 | MX23_PAD_LCD_D03__LCD_D03 0x1030 | ||
| 646 | MX23_PAD_LCD_D04__LCD_D04 0x1040 | ||
| 647 | MX23_PAD_LCD_D05__LCD_D05 0x1050 | ||
| 648 | MX23_PAD_LCD_D06__LCD_D06 0x1060 | ||
| 649 | MX23_PAD_LCD_D07__LCD_D07 0x1070 | ||
| 650 | MX23_PAD_LCD_D08__LCD_D08 0x1080 | ||
| 651 | MX23_PAD_LCD_D09__LCD_D09 0x1090 | ||
| 652 | MX23_PAD_LCD_D10__LCD_D10 0x10a0 | ||
| 653 | MX23_PAD_LCD_D11__LCD_D11 0x10b0 | ||
| 654 | MX23_PAD_LCD_D12__LCD_D12 0x10c0 | ||
| 655 | MX23_PAD_LCD_D13__LCD_D13 0x10d0 | ||
| 656 | MX23_PAD_LCD_D14__LCD_D14 0x10e0 | ||
| 657 | MX23_PAD_LCD_D15__LCD_D15 0x10f0 | ||
| 658 | MX23_PAD_LCD_D16__LCD_D16 0x1100 | ||
| 659 | MX23_PAD_LCD_D17__LCD_D17 0x1110 | ||
| 660 | MX23_PAD_LCD_RESET__LCD_RESET 0x1120 | ||
| 661 | MX23_PAD_LCD_RS__LCD_RS 0x1130 | ||
| 662 | MX23_PAD_LCD_WR__LCD_WR 0x1140 | ||
| 663 | MX23_PAD_LCD_CS__LCD_CS 0x1150 | ||
| 664 | MX23_PAD_LCD_DOTCK__LCD_DOTCK 0x1160 | ||
| 665 | MX23_PAD_LCD_ENABLE__LCD_ENABLE 0x1170 | ||
| 666 | MX23_PAD_LCD_HSYNC__LCD_HSYNC 0x1180 | ||
| 667 | MX23_PAD_LCD_VSYNC__LCD_VSYNC 0x1190 | ||
| 668 | MX23_PAD_PWM0__PWM0 0x11a0 | ||
| 669 | MX23_PAD_PWM1__PWM1 0x11b0 | ||
| 670 | MX23_PAD_PWM2__PWM2 0x11c0 | ||
| 671 | MX23_PAD_PWM3__PWM3 0x11d0 | ||
| 672 | MX23_PAD_PWM4__PWM4 0x11e0 | ||
| 673 | MX23_PAD_SSP1_CMD__SSP1_CMD 0x2000 | ||
| 674 | MX23_PAD_SSP1_DETECT__SSP1_DETECT 0x2010 | ||
| 675 | MX23_PAD_SSP1_DATA0__SSP1_DATA0 0x2020 | ||
| 676 | MX23_PAD_SSP1_DATA1__SSP1_DATA1 0x2030 | ||
| 677 | MX23_PAD_SSP1_DATA2__SSP1_DATA2 0x2040 | ||
| 678 | MX23_PAD_SSP1_DATA3__SSP1_DATA3 0x2050 | ||
| 679 | MX23_PAD_SSP1_SCK__SSP1_SCK 0x2060 | ||
| 680 | MX23_PAD_ROTARYA__ROTARYA 0x2070 | ||
| 681 | MX23_PAD_ROTARYB__ROTARYB 0x2080 | ||
| 682 | MX23_PAD_EMI_A00__EMI_A00 0x2090 | ||
| 683 | MX23_PAD_EMI_A01__EMI_A01 0x20a0 | ||
| 684 | MX23_PAD_EMI_A02__EMI_A02 0x20b0 | ||
| 685 | MX23_PAD_EMI_A03__EMI_A03 0x20c0 | ||
| 686 | MX23_PAD_EMI_A04__EMI_A04 0x20d0 | ||
| 687 | MX23_PAD_EMI_A05__EMI_A05 0x20e0 | ||
| 688 | MX23_PAD_EMI_A06__EMI_A06 0x20f0 | ||
| 689 | MX23_PAD_EMI_A07__EMI_A07 0x2100 | ||
| 690 | MX23_PAD_EMI_A08__EMI_A08 0x2110 | ||
| 691 | MX23_PAD_EMI_A09__EMI_A09 0x2120 | ||
| 692 | MX23_PAD_EMI_A10__EMI_A10 0x2130 | ||
| 693 | MX23_PAD_EMI_A11__EMI_A11 0x2140 | ||
| 694 | MX23_PAD_EMI_A12__EMI_A12 0x2150 | ||
| 695 | MX23_PAD_EMI_BA0__EMI_BA0 0x2160 | ||
| 696 | MX23_PAD_EMI_BA1__EMI_BA1 0x2170 | ||
| 697 | MX23_PAD_EMI_CASN__EMI_CASN 0x2180 | ||
| 698 | MX23_PAD_EMI_CE0N__EMI_CE0N 0x2190 | ||
| 699 | MX23_PAD_EMI_CE1N__EMI_CE1N 0x21a0 | ||
| 700 | MX23_PAD_GPMI_CE1N__GPMI_CE1N 0x21b0 | ||
| 701 | MX23_PAD_GPMI_CE0N__GPMI_CE0N 0x21c0 | ||
| 702 | MX23_PAD_EMI_CKE__EMI_CKE 0x21d0 | ||
| 703 | MX23_PAD_EMI_RASN__EMI_RASN 0x21e0 | ||
| 704 | MX23_PAD_EMI_WEN__EMI_WEN 0x21f0 | ||
| 705 | MX23_PAD_EMI_D00__EMI_D00 0x3000 | ||
| 706 | MX23_PAD_EMI_D01__EMI_D01 0x3010 | ||
| 707 | MX23_PAD_EMI_D02__EMI_D02 0x3020 | ||
| 708 | MX23_PAD_EMI_D03__EMI_D03 0x3030 | ||
| 709 | MX23_PAD_EMI_D04__EMI_D04 0x3040 | ||
| 710 | MX23_PAD_EMI_D05__EMI_D05 0x3050 | ||
| 711 | MX23_PAD_EMI_D06__EMI_D06 0x3060 | ||
| 712 | MX23_PAD_EMI_D07__EMI_D07 0x3070 | ||
| 713 | MX23_PAD_EMI_D08__EMI_D08 0x3080 | ||
| 714 | MX23_PAD_EMI_D09__EMI_D09 0x3090 | ||
| 715 | MX23_PAD_EMI_D10__EMI_D10 0x30a0 | ||
| 716 | MX23_PAD_EMI_D11__EMI_D11 0x30b0 | ||
| 717 | MX23_PAD_EMI_D12__EMI_D12 0x30c0 | ||
| 718 | MX23_PAD_EMI_D13__EMI_D13 0x30d0 | ||
| 719 | MX23_PAD_EMI_D14__EMI_D14 0x30e0 | ||
| 720 | MX23_PAD_EMI_D15__EMI_D15 0x30f0 | ||
| 721 | MX23_PAD_EMI_DQM0__EMI_DQM0 0x3100 | ||
| 722 | MX23_PAD_EMI_DQM1__EMI_DQM1 0x3110 | ||
| 723 | MX23_PAD_EMI_DQS0__EMI_DQS0 0x3120 | ||
| 724 | MX23_PAD_EMI_DQS1__EMI_DQS1 0x3130 | ||
| 725 | MX23_PAD_EMI_CLK__EMI_CLK 0x3140 | ||
| 726 | MX23_PAD_EMI_CLKN__EMI_CLKN 0x3150 | ||
| 727 | MX23_PAD_GPMI_D00__LCD_D8 0x0001 | ||
| 728 | MX23_PAD_GPMI_D01__LCD_D9 0x0011 | ||
| 729 | MX23_PAD_GPMI_D02__LCD_D10 0x0021 | ||
| 730 | MX23_PAD_GPMI_D03__LCD_D11 0x0031 | ||
| 731 | MX23_PAD_GPMI_D04__LCD_D12 0x0041 | ||
| 732 | MX23_PAD_GPMI_D05__LCD_D13 0x0051 | ||
| 733 | MX23_PAD_GPMI_D06__LCD_D14 0x0061 | ||
| 734 | MX23_PAD_GPMI_D07__LCD_D15 0x0071 | ||
| 735 | MX23_PAD_GPMI_D08__LCD_D18 0x0081 | ||
| 736 | MX23_PAD_GPMI_D09__LCD_D19 0x0091 | ||
| 737 | MX23_PAD_GPMI_D10__LCD_D20 0x00a1 | ||
| 738 | MX23_PAD_GPMI_D11__LCD_D21 0x00b1 | ||
| 739 | MX23_PAD_GPMI_D12__LCD_D22 0x00c1 | ||
| 740 | MX23_PAD_GPMI_D13__LCD_D23 0x00d1 | ||
| 741 | MX23_PAD_GPMI_D14__AUART2_RX 0x00e1 | ||
| 742 | MX23_PAD_GPMI_D15__AUART2_TX 0x00f1 | ||
| 743 | MX23_PAD_GPMI_CLE__LCD_D16 0x0101 | ||
| 744 | MX23_PAD_GPMI_ALE__LCD_D17 0x0111 | ||
| 745 | MX23_PAD_GPMI_CE2N__ATA_A2 0x0121 | ||
| 746 | MX23_PAD_AUART1_RTS__IR_CLK 0x01b1 | ||
| 747 | MX23_PAD_AUART1_RX__IR_RX 0x01c1 | ||
| 748 | MX23_PAD_AUART1_TX__IR_TX 0x01d1 | ||
| 749 | MX23_PAD_I2C_SCL__GPMI_RDY2 0x01e1 | ||
| 750 | MX23_PAD_I2C_SDA__GPMI_CE2N 0x01f1 | ||
| 751 | MX23_PAD_LCD_D00__ETM_DA8 0x1001 | ||
| 752 | MX23_PAD_LCD_D01__ETM_DA9 0x1011 | ||
| 753 | MX23_PAD_LCD_D02__ETM_DA10 0x1021 | ||
| 754 | MX23_PAD_LCD_D03__ETM_DA11 0x1031 | ||
| 755 | MX23_PAD_LCD_D04__ETM_DA12 0x1041 | ||
| 756 | MX23_PAD_LCD_D05__ETM_DA13 0x1051 | ||
| 757 | MX23_PAD_LCD_D06__ETM_DA14 0x1061 | ||
| 758 | MX23_PAD_LCD_D07__ETM_DA15 0x1071 | ||
| 759 | MX23_PAD_LCD_D08__ETM_DA0 0x1081 | ||
| 760 | MX23_PAD_LCD_D09__ETM_DA1 0x1091 | ||
| 761 | MX23_PAD_LCD_D10__ETM_DA2 0x10a1 | ||
| 762 | MX23_PAD_LCD_D11__ETM_DA3 0x10b1 | ||
| 763 | MX23_PAD_LCD_D12__ETM_DA4 0x10c1 | ||
| 764 | MX23_PAD_LCD_D13__ETM_DA5 0x10d1 | ||
| 765 | MX23_PAD_LCD_D14__ETM_DA6 0x10e1 | ||
| 766 | MX23_PAD_LCD_D15__ETM_DA7 0x10f1 | ||
| 767 | MX23_PAD_LCD_RESET__ETM_TCTL 0x1121 | ||
| 768 | MX23_PAD_LCD_RS__ETM_TCLK 0x1131 | ||
| 769 | MX23_PAD_LCD_DOTCK__GPMI_RDY3 0x1161 | ||
| 770 | MX23_PAD_LCD_ENABLE__I2C_SCL 0x1171 | ||
| 771 | MX23_PAD_LCD_HSYNC__I2C_SDA 0x1181 | ||
| 772 | MX23_PAD_LCD_VSYNC__LCD_BUSY 0x1191 | ||
| 773 | MX23_PAD_PWM0__ROTARYA 0x11a1 | ||
| 774 | MX23_PAD_PWM1__ROTARYB 0x11b1 | ||
| 775 | MX23_PAD_PWM2__GPMI_RDY3 0x11c1 | ||
| 776 | MX23_PAD_PWM3__ETM_TCTL 0x11d1 | ||
| 777 | MX23_PAD_PWM4__ETM_TCLK 0x11e1 | ||
| 778 | MX23_PAD_SSP1_DETECT__GPMI_CE3N 0x2011 | ||
| 779 | MX23_PAD_SSP1_DATA1__I2C_SCL 0x2031 | ||
| 780 | MX23_PAD_SSP1_DATA2__I2C_SDA 0x2041 | ||
| 781 | MX23_PAD_ROTARYA__AUART2_RTS 0x2071 | ||
| 782 | MX23_PAD_ROTARYB__AUART2_CTS 0x2081 | ||
| 783 | MX23_PAD_GPMI_D00__SSP2_DATA0 0x0002 | ||
| 784 | MX23_PAD_GPMI_D01__SSP2_DATA1 0x0012 | ||
| 785 | MX23_PAD_GPMI_D02__SSP2_DATA2 0x0022 | ||
| 786 | MX23_PAD_GPMI_D03__SSP2_DATA3 0x0032 | ||
| 787 | MX23_PAD_GPMI_D04__SSP2_DATA4 0x0042 | ||
| 788 | MX23_PAD_GPMI_D05__SSP2_DATA5 0x0052 | ||
| 789 | MX23_PAD_GPMI_D06__SSP2_DATA6 0x0062 | ||
| 790 | MX23_PAD_GPMI_D07__SSP2_DATA7 0x0072 | ||
| 791 | MX23_PAD_GPMI_D08__SSP1_DATA4 0x0082 | ||
| 792 | MX23_PAD_GPMI_D09__SSP1_DATA5 0x0092 | ||
| 793 | MX23_PAD_GPMI_D10__SSP1_DATA6 0x00a2 | ||
| 794 | MX23_PAD_GPMI_D11__SSP1_DATA7 0x00b2 | ||
| 795 | MX23_PAD_GPMI_D15__GPMI_CE3N 0x00f2 | ||
| 796 | MX23_PAD_GPMI_RDY0__SSP2_DETECT 0x0132 | ||
| 797 | MX23_PAD_GPMI_RDY1__SSP2_CMD 0x0142 | ||
| 798 | MX23_PAD_GPMI_WRN__SSP2_SCK 0x0182 | ||
| 799 | MX23_PAD_AUART1_CTS__SSP1_DATA4 0x01a2 | ||
| 800 | MX23_PAD_AUART1_RTS__SSP1_DATA5 0x01b2 | ||
| 801 | MX23_PAD_AUART1_RX__SSP1_DATA6 0x01c2 | ||
| 802 | MX23_PAD_AUART1_TX__SSP1_DATA7 0x01d2 | ||
| 803 | MX23_PAD_I2C_SCL__AUART1_TX 0x01e2 | ||
| 804 | MX23_PAD_I2C_SDA__AUART1_RX 0x01f2 | ||
| 805 | MX23_PAD_LCD_D08__SAIF2_SDATA0 0x1082 | ||
| 806 | MX23_PAD_LCD_D09__SAIF1_SDATA0 0x1092 | ||
| 807 | MX23_PAD_LCD_D10__SAIF_MCLK_BITCLK 0x10a2 | ||
| 808 | MX23_PAD_LCD_D11__SAIF_LRCLK 0x10b2 | ||
| 809 | MX23_PAD_LCD_D12__SAIF2_SDATA1 0x10c2 | ||
| 810 | MX23_PAD_LCD_D13__SAIF2_SDATA2 0x10d2 | ||
| 811 | MX23_PAD_LCD_D14__SAIF1_SDATA2 0x10e2 | ||
| 812 | MX23_PAD_LCD_D15__SAIF1_SDATA1 0x10f2 | ||
| 813 | MX23_PAD_LCD_D16__SAIF_ALT_BITCLK 0x1102 | ||
| 814 | MX23_PAD_LCD_RESET__GPMI_CE3N 0x1122 | ||
| 815 | MX23_PAD_PWM0__DUART_RX 0x11a2 | ||
| 816 | MX23_PAD_PWM1__DUART_TX 0x11b2 | ||
| 817 | MX23_PAD_PWM3__AUART1_CTS 0x11d2 | ||
| 818 | MX23_PAD_PWM4__AUART1_RTS 0x11e2 | ||
| 819 | MX23_PAD_SSP1_CMD__JTAG_TDO 0x2002 | ||
| 820 | MX23_PAD_SSP1_DETECT__USB_OTG_ID 0x2012 | ||
| 821 | MX23_PAD_SSP1_DATA0__JTAG_TDI 0x2022 | ||
| 822 | MX23_PAD_SSP1_DATA1__JTAG_TCLK 0x2032 | ||
| 823 | MX23_PAD_SSP1_DATA2__JTAG_RTCK 0x2042 | ||
| 824 | MX23_PAD_SSP1_DATA3__JTAG_TMS 0x2052 | ||
| 825 | MX23_PAD_SSP1_SCK__JTAG_TRST 0x2062 | ||
| 826 | MX23_PAD_ROTARYA__SPDIF 0x2072 | ||
| 827 | MX23_PAD_ROTARYB__GPMI_CE3N 0x2082 | ||
| 828 | MX23_PAD_GPMI_D00__GPIO_0_0 0x0003 | ||
| 829 | MX23_PAD_GPMI_D01__GPIO_0_1 0x0013 | ||
| 830 | MX23_PAD_GPMI_D02__GPIO_0_2 0x0023 | ||
| 831 | MX23_PAD_GPMI_D03__GPIO_0_3 0x0033 | ||
| 832 | MX23_PAD_GPMI_D04__GPIO_0_4 0x0043 | ||
| 833 | MX23_PAD_GPMI_D05__GPIO_0_5 0x0053 | ||
| 834 | MX23_PAD_GPMI_D06__GPIO_0_6 0x0063 | ||
| 835 | MX23_PAD_GPMI_D07__GPIO_0_7 0x0073 | ||
| 836 | MX23_PAD_GPMI_D08__GPIO_0_8 0x0083 | ||
| 837 | MX23_PAD_GPMI_D09__GPIO_0_9 0x0093 | ||
| 838 | MX23_PAD_GPMI_D10__GPIO_0_10 0x00a3 | ||
| 839 | MX23_PAD_GPMI_D11__GPIO_0_11 0x00b3 | ||
| 840 | MX23_PAD_GPMI_D12__GPIO_0_12 0x00c3 | ||
| 841 | MX23_PAD_GPMI_D13__GPIO_0_13 0x00d3 | ||
| 842 | MX23_PAD_GPMI_D14__GPIO_0_14 0x00e3 | ||
| 843 | MX23_PAD_GPMI_D15__GPIO_0_15 0x00f3 | ||
| 844 | MX23_PAD_GPMI_CLE__GPIO_0_16 0x0103 | ||
| 845 | MX23_PAD_GPMI_ALE__GPIO_0_17 0x0113 | ||
| 846 | MX23_PAD_GPMI_CE2N__GPIO_0_18 0x0123 | ||
| 847 | MX23_PAD_GPMI_RDY0__GPIO_0_19 0x0133 | ||
| 848 | MX23_PAD_GPMI_RDY1__GPIO_0_20 0x0143 | ||
| 849 | MX23_PAD_GPMI_RDY2__GPIO_0_21 0x0153 | ||
| 850 | MX23_PAD_GPMI_RDY3__GPIO_0_22 0x0163 | ||
| 851 | MX23_PAD_GPMI_WPN__GPIO_0_23 0x0173 | ||
| 852 | MX23_PAD_GPMI_WRN__GPIO_0_24 0x0183 | ||
| 853 | MX23_PAD_GPMI_RDN__GPIO_0_25 0x0193 | ||
| 854 | MX23_PAD_AUART1_CTS__GPIO_0_26 0x01a3 | ||
| 855 | MX23_PAD_AUART1_RTS__GPIO_0_27 0x01b3 | ||
| 856 | MX23_PAD_AUART1_RX__GPIO_0_28 0x01c3 | ||
| 857 | MX23_PAD_AUART1_TX__GPIO_0_29 0x01d3 | ||
| 858 | MX23_PAD_I2C_SCL__GPIO_0_30 0x01e3 | ||
| 859 | MX23_PAD_I2C_SDA__GPIO_0_31 0x01f3 | ||
| 860 | MX23_PAD_LCD_D00__GPIO_1_0 0x1003 | ||
| 861 | MX23_PAD_LCD_D01__GPIO_1_1 0x1013 | ||
| 862 | MX23_PAD_LCD_D02__GPIO_1_2 0x1023 | ||
| 863 | MX23_PAD_LCD_D03__GPIO_1_3 0x1033 | ||
| 864 | MX23_PAD_LCD_D04__GPIO_1_4 0x1043 | ||
| 865 | MX23_PAD_LCD_D05__GPIO_1_5 0x1053 | ||
| 866 | MX23_PAD_LCD_D06__GPIO_1_6 0x1063 | ||
| 867 | MX23_PAD_LCD_D07__GPIO_1_7 0x1073 | ||
| 868 | MX23_PAD_LCD_D08__GPIO_1_8 0x1083 | ||
| 869 | MX23_PAD_LCD_D09__GPIO_1_9 0x1093 | ||
| 870 | MX23_PAD_LCD_D10__GPIO_1_10 0x10a3 | ||
| 871 | MX23_PAD_LCD_D11__GPIO_1_11 0x10b3 | ||
| 872 | MX23_PAD_LCD_D12__GPIO_1_12 0x10c3 | ||
| 873 | MX23_PAD_LCD_D13__GPIO_1_13 0x10d3 | ||
| 874 | MX23_PAD_LCD_D14__GPIO_1_14 0x10e3 | ||
| 875 | MX23_PAD_LCD_D15__GPIO_1_15 0x10f3 | ||
| 876 | MX23_PAD_LCD_D16__GPIO_1_16 0x1103 | ||
| 877 | MX23_PAD_LCD_D17__GPIO_1_17 0x1113 | ||
| 878 | MX23_PAD_LCD_RESET__GPIO_1_18 0x1123 | ||
| 879 | MX23_PAD_LCD_RS__GPIO_1_19 0x1133 | ||
| 880 | MX23_PAD_LCD_WR__GPIO_1_20 0x1143 | ||
| 881 | MX23_PAD_LCD_CS__GPIO_1_21 0x1153 | ||
| 882 | MX23_PAD_LCD_DOTCK__GPIO_1_22 0x1163 | ||
| 883 | MX23_PAD_LCD_ENABLE__GPIO_1_23 0x1173 | ||
| 884 | MX23_PAD_LCD_HSYNC__GPIO_1_24 0x1183 | ||
| 885 | MX23_PAD_LCD_VSYNC__GPIO_1_25 0x1193 | ||
| 886 | MX23_PAD_PWM0__GPIO_1_26 0x11a3 | ||
| 887 | MX23_PAD_PWM1__GPIO_1_27 0x11b3 | ||
| 888 | MX23_PAD_PWM2__GPIO_1_28 0x11c3 | ||
| 889 | MX23_PAD_PWM3__GPIO_1_29 0x11d3 | ||
| 890 | MX23_PAD_PWM4__GPIO_1_30 0x11e3 | ||
| 891 | MX23_PAD_SSP1_CMD__GPIO_2_0 0x2003 | ||
| 892 | MX23_PAD_SSP1_DETECT__GPIO_2_1 0x2013 | ||
| 893 | MX23_PAD_SSP1_DATA0__GPIO_2_2 0x2023 | ||
| 894 | MX23_PAD_SSP1_DATA1__GPIO_2_3 0x2033 | ||
| 895 | MX23_PAD_SSP1_DATA2__GPIO_2_4 0x2043 | ||
| 896 | MX23_PAD_SSP1_DATA3__GPIO_2_5 0x2053 | ||
| 897 | MX23_PAD_SSP1_SCK__GPIO_2_6 0x2063 | ||
| 898 | MX23_PAD_ROTARYA__GPIO_2_7 0x2073 | ||
| 899 | MX23_PAD_ROTARYB__GPIO_2_8 0x2083 | ||
| 900 | MX23_PAD_EMI_A00__GPIO_2_9 0x2093 | ||
| 901 | MX23_PAD_EMI_A01__GPIO_2_10 0x20a3 | ||
| 902 | MX23_PAD_EMI_A02__GPIO_2_11 0x20b3 | ||
| 903 | MX23_PAD_EMI_A03__GPIO_2_12 0x20c3 | ||
| 904 | MX23_PAD_EMI_A04__GPIO_2_13 0x20d3 | ||
| 905 | MX23_PAD_EMI_A05__GPIO_2_14 0x20e3 | ||
| 906 | MX23_PAD_EMI_A06__GPIO_2_15 0x20f3 | ||
| 907 | MX23_PAD_EMI_A07__GPIO_2_16 0x2103 | ||
| 908 | MX23_PAD_EMI_A08__GPIO_2_17 0x2113 | ||
| 909 | MX23_PAD_EMI_A09__GPIO_2_18 0x2123 | ||
| 910 | MX23_PAD_EMI_A10__GPIO_2_19 0x2133 | ||
| 911 | MX23_PAD_EMI_A11__GPIO_2_20 0x2143 | ||
| 912 | MX23_PAD_EMI_A12__GPIO_2_21 0x2153 | ||
| 913 | MX23_PAD_EMI_BA0__GPIO_2_22 0x2163 | ||
| 914 | MX23_PAD_EMI_BA1__GPIO_2_23 0x2173 | ||
| 915 | MX23_PAD_EMI_CASN__GPIO_2_24 0x2183 | ||
| 916 | MX23_PAD_EMI_CE0N__GPIO_2_25 0x2193 | ||
| 917 | MX23_PAD_EMI_CE1N__GPIO_2_26 0x21a3 | ||
| 918 | MX23_PAD_GPMI_CE1N__GPIO_2_27 0x21b3 | ||
| 919 | MX23_PAD_GPMI_CE0N__GPIO_2_28 0x21c3 | ||
| 920 | MX23_PAD_EMI_CKE__GPIO_2_29 0x21d3 | ||
| 921 | MX23_PAD_EMI_RASN__GPIO_2_30 0x21e3 | ||
| 922 | MX23_PAD_EMI_WEN__GPIO_2_31 0x21f3 | ||
| @@ -41,7 +41,7 @@ pinctrl-bindings.txt: · 40 unmodified lines | |||
| 41 | 41 | ||
| 42 | Required: pins | 42 | Required: pins |
| 43 | Options: function, bias-disable, bias-pull-up, bias-pull-down, | 43 | Options: function, bias-disable, bias-pull-up, bias-pull-down, |
| 44 | bias-pin-default, drive-open-drain. | 44 | drive-open-drain. |
| 45 | 45 | ||
| 46 | Note that many of these properties are only valid for certain specific pins. | 46 | Note that many of these properties are only valid for certain specific pins. |
| 47 | See the Palmas device datasheet for complete details regarding which pins | 47 | See the Palmas device datasheet for complete details regarding which pins |
| @@ -72,6 +72,13 @@ Optional properties: · 71 unmodified lines | |||
| 72 | /* pin base, nr pins & gpio function */ | 72 | /* pin base, nr pins & gpio function */ |
| 73 | pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>; | 73 | pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>; |
| 74 | 74 | ||
| 75 | - interrupt-controller : standard interrupt controller binding if using | ||
| 76 | interrupts for wake-up events for example. In this case pinctrl-single | ||
| 77 | is set up as a chained interrupt controller and the wake-up interrupts | ||
| 78 | can be requested by the drivers using request_irq(). | ||
| 79 | |||
| 80 | - #interrupt-cells : standard interrupt binding if using interrupts | ||
| 81 | |||
| 75 | This driver assumes that there is only one register for each pin (unless the | 82 | This driver assumes that there is only one register for each pin (unless the |
| 76 | pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as | 83 | pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as |
| 77 | specified in the pinctrl-bindings.txt document in this directory. | 84 | specified in the pinctrl-bindings.txt document in this directory. |
| @@ -121,6 +128,8 @@ pmx_core: pinmux@4a100040 { · 43 unmodified lines | |||
| 121 | reg = <0x4a100040 0x0196>; | 128 | reg = <0x4a100040 0x0196>; |
| 122 | #address-cells = <1>; | 129 | #address-cells = <1>; |
| 123 | #size-cells = <0>; | 130 | #size-cells = <0>; |
| 131 | #interrupt-cells = <1>; | ||
| 132 | interrupt-controller; | ||
| 124 | pinctrl-single,register-width = <16>; | 133 | pinctrl-single,register-width = <16>; |
| 125 | pinctrl-single,function-mask = <0xffff>; | 134 | pinctrl-single,function-mask = <0xffff>; |
| 126 | }; | 135 | }; |
| @@ -131,6 +140,8 @@ pmx_wkup: pinmux@4a31e040 { · 4 unmodified lines | |||
| 131 | reg = <0x4a31e040 0x0038>; | 140 | reg = <0x4a31e040 0x0038>; |
| 132 | #address-cells = <1>; | 141 | #address-cells = <1>; |
| 133 | #size-cells = <0>; | 142 | #size-cells = <0>; |
| 143 | #interrupt-cells = <1>; | ||
| 144 | interrupt-controller; | ||
| 134 | pinctrl-single,register-width = <16>; | 145 | pinctrl-single,register-width = <16>; |
| 135 | pinctrl-single,function-mask = <0xffff>; | 146 | pinctrl-single,function-mask = <0xffff>; |
| 136 | }; | 147 | }; |
| @@ -21,10 +21,13 @@ defined as gpio sub-nodes of the pinmux controller. · 20 unmodified lines | |||
| 21 | Required properties for iomux controller: | 21 | Required properties for iomux controller: |
| 22 | - compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl" | 22 | - compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl" |
| 23 | "rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl" | 23 | "rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl" |
| 24 | - reg: first element is the general register space of the iomux controller | ||
| 25 | second element is the separate pull register space of the rk3188 | ||
| 24 | 26 | ||
| 25 | Required properties for gpio sub nodes: | 27 | Required properties for gpio sub nodes: |
| 26 | - compatible: "rockchip,gpio-bank" | 28 | - compatible: "rockchip,gpio-bank", "rockchip,rk3188-gpio-bank0" |
| 27 | - reg: register of the gpio bank (different than the iomux registerset) | 29 | - reg: register of the gpio bank (different than the iomux registerset) |
| 30 | second element: separate pull register for rk3188 bank0 | ||
| 28 | - interrupts: base interrupt of the gpio bank in the interrupt controller | 31 | - interrupts: base interrupt of the gpio bank in the interrupt controller |
| 29 | - clocks: clock that drives this bank | 32 | - clocks: clock that drives this bank |
| 30 | - gpio-controller: identifies the node as a gpio controller and pin bank. | 33 | - gpio-controller: identifies the node as a gpio controller and pin bank. |
| @@ -95,3 +98,44 @@ uart2: serial@20064000 { · 64 unmodified lines | |||
| 95 | pinctrl-names = "default"; | 98 | pinctrl-names = "default"; |
| 96 | pinctrl-0 = <&uart2_xfer>; | 99 | pinctrl-0 = <&uart2_xfer>; |
| 97 | }; | 100 | }; |
| 101 | |||
| 102 | Example for rk3188: | ||
| 103 | |||
| 104 | pinctrl@20008000 { | ||
| 105 | compatible = "rockchip,rk3188-pinctrl"; | ||
| 106 | reg = <0x20008000 0xa0>, | ||
| 107 | <0x20008164 0x1a0>; | ||
| 108 | #address-cells = <1>; | ||
| 109 | #size-cells = <1>; | ||
| 110 | ranges; | ||
| 111 | |||
| 112 | gpio0: gpio0@0x2000a000 { | ||
| 113 | compatible = "rockchip,rk3188-gpio-bank0"; | ||
| 114 | reg = <0x2000a000 0x100>, | ||
| 115 | <0x20004064 0x8>; | ||
| 116 | interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; | ||
| 117 | clocks = <&clk_gates8 9>; | ||
| 118 | |||
| 119 | gpio-controller; | ||
| 120 | #gpio-cells = <2>; | ||
| 121 | |||
| 122 | interrupt-controller; | ||
| 123 | #interrupt-cells = <2>; | ||
| 124 | }; | ||
| 125 | |||
| 126 | gpio1: gpio1@0x2003c000 { | ||
| 127 | compatible = "rockchip,gpio-bank"; | ||
| 128 | reg = <0x2003c000 0x100>; | ||
| 129 | interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; | ||
| 130 | clocks = <&clk_gates8 10>; | ||
| 131 | |||
| 132 | gpio-controller; | ||
| 133 | #gpio-cells = <2>; | ||
| 134 | |||
| 135 | interrupt-controller; | ||
| 136 | #interrupt-cells = <2>; | ||
| 137 | }; | ||
| 138 | |||
| 139 | ... | ||
| 140 | |||
| 141 | }; | ||
| @@ -0,0 +1,20 @@ | |||
| 1 | TWL BCI (Battery Charger Interface) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: | ||
| 5 | - "ti,twl4030-bci" | ||
| 6 | - interrupts: two interrupt lines from the TWL SIH (secondary | ||
| 7 | interrupt handler) - interrupts 9 and 2. | ||
| 8 | |||
| 9 | Optional properties: | ||
| 10 | - ti,bb-uvolt: microvolts for charging the backup battery. | ||
| 11 | - ti,bb-uamp: microamps for charging the backup battery. | ||
| 12 | |||
| 13 | Examples: | ||
| 14 | |||
| 15 | bci { | ||
| 16 | compatible = "ti,twl4030-bci"; | ||
| 17 | interrupts = <9>, <2>; | ||
| 18 | ti,bb-uvolt = <3200000>; | ||
| 19 | ti,bb-uamp = <150>; | ||
| 20 | }; | ||
| @@ -0,0 +1,32 @@ | |||
| 1 | TI BQ24735 Charge Controller | ||
| 2 | ~~~~~~~~~~ | ||
| 3 | |||
| 4 | Required properties : | ||
| 5 | - compatible : "ti,bq24735" | ||
| 6 | |||
| 7 | Optional properties : | ||
| 8 | - interrupts : Specify the interrupt to be used to trigger when the AC | ||
| 9 | adapter is either plugged in or removed. | ||
| 10 | - ti,ac-detect-gpios : This GPIO is optionally used to read the AC adapter | ||
| 11 | presence. This is a Host GPIO that is configured as an input and | ||
| 12 | connected to the bq24735. | ||
| 13 | - ti,charge-current : Used to control and set the charging current. This value | ||
| 14 | must be between 128mA and 8.128A with a 64mA step resolution. The POR value | ||
| 15 | is 0x0000h. This number is in mA (e.g. 8192), see spec for more information | ||
| 16 | about the ChargeCurrent (0x14h) register. | ||
| 17 | - ti,charge-voltage : Used to control and set the charging voltage. This value | ||
| 18 | must be between 1.024V and 19.2V with a 16mV step resolution. The POR value | ||
| 19 | is 0x0000h. This number is in mV (e.g. 19200), see spec for more information | ||
| 20 | about the ChargeVoltage (0x15h) register. | ||
| 21 | - ti,input-current : Used to control and set the charger input current. This | ||
| 22 | value must be between 128mA and 8.064A with a 128mA step resolution. The | ||
| 23 | POR value is 0x1000h. This number is in mA (e.g. 8064), see the spec for | ||
| 24 | more information about the InputCurrent (0x3fh) register. | ||
| 25 | |||
| 26 | Example: | ||
| 27 | |||
| 28 | bq24735@9 { | ||
| 29 | compatible = "ti,bq24735"; | ||
| 30 | reg = <0x9>; | ||
| 31 | ti,ac-detect-gpios = <&gpio 72 0x1>; | ||
| 32 | } | ||
| @@ -1,33 +1,30 @@ | |||
| 1 | * Freescale 83xx DMA Controller | 1 | * Freescale DMA Controllers |
| 2 | 2 | ||
| 3 | Freescale PowerPC 83xx have on chip general purpose DMA controllers. | 3 | ** Freescale Elo DMA Controller |
| 4 | This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx | ||
| 5 | series chips such as mpc8315, mpc8349, mpc8379 etc. | ||
| 4 | 6 | ||
| 5 | Required properties: | 7 | Required properties: |
| 6 | 8 | ||
| 7 | - compatible : compatible list, contains 2 entries, first is | 9 | - compatible : must include "fsl,elo-dma" |
| 8 | "fsl,CHIP-dma", where CHIP is the processor | 10 | - reg : DMA General Status Register, i.e. DGSR which contains |
| 9 | (mpc8349, mpc8360, etc.) and the second is | 11 | status for all the 4 DMA channels |
| 10 | "fsl,elo-dma" | 12 | - ranges : describes the mapping between the address space of the |
| 11 | - reg : <registers mapping for DMA general status reg> | 13 | DMA channels and the address space of the DMA controller |
| 12 | - ranges : Should be defined as specified in 1) to describe the | ||
| 13 | DMA controller channels. | ||
| 14 | - cell-index : controller index. 0 for controller @ 0x8100 | 14 | - cell-index : controller index. 0 for controller @ 0x8100 |
| 15 | - interrupts : <interrupt mapping for DMA IRQ> | 15 | - interrupts : interrupt specifier for DMA IRQ |
| 16 | - interrupt-parent : optional, if needed for interrupt mapping | 16 | - interrupt-parent : optional, if needed for interrupt mapping |
| 17 | 17 | ||
| 18 | |||
| 19 | - DMA channel nodes: | 18 | - DMA channel nodes: |
| 20 | - compatible : compatible list, contains 2 entries, first is | 19 | - compatible : must include "fsl,elo-dma-channel" |
| 21 | "fsl,CHIP-dma-channel", where CHIP is the processor | 20 | However, see note below. |
| 22 | (mpc8349, mpc8350, etc.) and the second is | 21 | - reg : DMA channel specific registers |
| 23 | "fsl,elo-dma-channel". However, see note below. | 22 | - cell-index : DMA channel index starts at 0. |
| 24 | - reg : <registers mapping for channel> | ||
| 25 | - cell-index : dma channel index starts at 0. | ||
| 26 | 23 | ||
| 27 | Optional properties: | 24 | Optional properties: |
| 28 | - interrupts : <interrupt mapping for DMA channel IRQ> | 25 | - interrupts : interrupt specifier for DMA channel IRQ |
| 29 | (on 83xx this is expected to be identical to | 26 | (on 83xx this is expected to be identical to |
| 30 | the interrupts property of the parent node) | 27 | the interrupts property of the parent node) |
| 31 | - interrupt-parent : optional, if needed for interrupt mapping | 28 | - interrupt-parent : optional, if needed for interrupt mapping |
| 32 | 29 | ||
| 33 | Example: | 30 | Example: |
| @@ -70,30 +67,27 @@ Example: · 36 unmodified lines | |||
| 70 | }; | 67 | }; |
| 71 | }; | 68 | }; |
| 72 | 69 | ||
| 73 | * Freescale 85xx/86xx DMA Controller | 70 | ** Freescale EloPlus DMA Controller |
| 74 | 71 | This is a 4-channel DMA controller with extended addresses and chaining, | |
| 75 | Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers. | 72 | mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as |
| 73 | mpc8540, mpc8641 p4080, bsc9131 etc. | ||
| 76 | 74 | ||
| 77 | Required properties: | 75 | Required properties: |
| 78 | 76 | ||
| 79 | - compatible : compatible list, contains 2 entries, first is | 77 | - compatible : must include "fsl,eloplus-dma" |
| 80 | "fsl,CHIP-dma", where CHIP is the processor | 78 | - reg : DMA General Status Register, i.e. DGSR which contains |
| 81 | (mpc8540, mpc8540, etc.) and the second is | 79 | status for all the 4 DMA channels |
| 82 | "fsl,eloplus-dma" | ||
| 83 | - reg : <registers mapping for DMA general status reg> | ||
| 84 | - cell-index : controller index. 0 for controller @ 0x21000, | 80 | - cell-index : controller index. 0 for controller @ 0x21000, |
| 85 | 1 for controller @ 0xc000 | 81 | 1 for controller @ 0xc000 |
| 86 | - ranges : Should be defined as specified in 1) to describe the | 82 | - ranges : describes the mapping between the address space of the |
| 87 | DMA controller channels. | 83 | DMA channels and the address space of the DMA controller |
| 88 | 84 | ||
| 89 | - DMA channel nodes: | 85 | - DMA channel nodes: |
| 90 | - compatible : compatible list, contains 2 entries, first is | 86 | - compatible : must include "fsl,eloplus-dma-channel" |
| 91 | "fsl,CHIP-dma-channel", where CHIP is the processor | 87 | However, see note below. |
| 92 | (mpc8540, mpc8560, etc.) and the second is | 88 | - cell-index : DMA channel index starts at 0. |
| 93 | "fsl,eloplus-dma-channel". However, see note below. | 89 | - reg : DMA channel specific registers |
| 94 | - cell-index : dma channel index starts at 0. | 90 | - interrupts : interrupt specifier for DMA channel IRQ |
| 95 | - reg : <registers mapping for channel> | ||
| 96 | - interrupts : <interrupt mapping for DMA channel IRQ> | ||
| 97 | - interrupt-parent : optional, if needed for interrupt mapping | 91 | - interrupt-parent : optional, if needed for interrupt mapping |
| 98 | 92 | ||
| 99 | Example: | 93 | Example: |
| @@ -134,6 +128,76 @@ Example: · 34 unmodified lines | |||
| 134 | }; | 128 | }; |
| 135 | }; | 129 | }; |
| 136 | 130 | ||
| 131 | ** Freescale Elo3 DMA Controller | ||
| 132 | DMA controller which has same function as EloPlus except that Elo3 has 8 | ||
| 133 | channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx | ||
| 134 | series chips, such as t1040, t4240, b4860. | ||
| 135 | |||
| 136 | Required properties: | ||
| 137 | |||
| 138 | - compatible : must include "fsl,elo3-dma" | ||
| 139 | - reg : contains two entries for DMA General Status Registers, | ||
| 140 | i.e. DGSR0 which includes status for channel 1~4, and | ||
| 141 | DGSR1 for channel 5~8 | ||
| 142 | - ranges : describes the mapping between the address space of the | ||
| 143 | DMA channels and the address space of the DMA controller | ||
| 144 | |||
| 145 | - DMA channel nodes: | ||
| 146 | - compatible : must include "fsl,eloplus-dma-channel" | ||
| 147 | - reg : DMA channel specific registers | ||
| 148 | - interrupts : interrupt specifier for DMA channel IRQ | ||
| 149 | - interrupt-parent : optional, if needed for interrupt mapping | ||
| 150 | |||
| 151 | Example: | ||
| 152 | dma@100300 { | ||
| 153 | #address-cells = <1>; | ||
| 154 | #size-cells = <1>; | ||
| 155 | compatible = "fsl,elo3-dma"; | ||
| 156 | reg = <0x100300 0x4>, | ||
| 157 | <0x100600 0x4>; | ||
| 158 | ranges = <0x0 0x100100 0x500>; | ||
| 159 | dma-channel@0 { | ||
| 160 | compatible = "fsl,eloplus-dma-channel"; | ||
| 161 | reg = <0x0 0x80>; | ||
| 162 | interrupts = <28 2 0 0>; | ||
| 163 | }; | ||
| 164 | dma-channel@80 { | ||
| 165 | compatible = "fsl,eloplus-dma-channel"; | ||
| 166 | reg = <0x80 0x80>; | ||
| 167 | interrupts = <29 2 0 0>; | ||
| 168 | }; | ||
| 169 | dma-channel@100 { | ||
| 170 | compatible = "fsl,eloplus-dma-channel"; | ||
| 171 | reg = <0x100 0x80>; | ||
| 172 | interrupts = <30 2 0 0>; | ||
| 173 | }; | ||
| 174 | dma-channel@180 { | ||
| 175 | compatible = "fsl,eloplus-dma-channel"; | ||
| 176 | reg = <0x180 0x80>; | ||
| 177 | interrupts = <31 2 0 0>; | ||
| 178 | }; | ||
| 179 | dma-channel@300 { | ||
| 180 | compatible = "fsl,eloplus-dma-channel"; | ||
| 181 | reg = <0x300 0x80>; | ||
| 182 | interrupts = <76 2 0 0>; | ||
| 183 | }; | ||
| 184 | dma-channel@380 { | ||
| 185 | compatible = "fsl,eloplus-dma-channel"; | ||
| 186 | reg = <0x380 0x80>; | ||
| 187 | interrupts = <77 2 0 0>; | ||
| 188 | }; | ||
| 189 | dma-channel@400 { | ||
| 190 | compatible = "fsl,eloplus-dma-channel"; | ||
| 191 | reg = <0x400 0x80>; | ||
| 192 | interrupts = <78 2 0 0>; | ||
| 193 | }; | ||
| 194 | dma-channel@480 { | ||
| 195 | compatible = "fsl,eloplus-dma-channel"; | ||
| 196 | reg = <0x480 0x80>; | ||
| 197 | interrupts = <79 2 0 0>; | ||
| 198 | }; | ||
| 199 | }; | ||
| 200 | |||
| 137 | Note on DMA channel compatible properties: The compatible property must say | 201 | Note on DMA channel compatible properties: The compatible property must say |
| 138 | "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA | 202 | "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA |
| 139 | driver (fsldma). Any DMA channel used by fsldma cannot be used by another | 203 | driver (fsldma). Any DMA channel used by fsldma cannot be used by another |
| @@ -15,7 +15,7 @@ Required properties: · 14 unmodified lines | |||
| 15 | samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210, | 15 | samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210, |
| 16 | Exynos4210 rev0 SoCs | 16 | Exynos4210 rev0 SoCs |
| 17 | samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210, | 17 | samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210, |
| 18 | Exynos4x12 and Exynos5250 SoCs | 18 | Exynos4x12, Exynos5250 and Exynos5420 SoCs |
| 19 | - reg: base address and size of register area | 19 | - reg: base address and size of register area |
| 20 | - interrupts: list of timer interrupts (one interrupt per timer, starting at | 20 | - interrupts: list of timer interrupts (one interrupt per timer, starting at |
| 21 | timer 0) | 21 | timer 0) |
| @@ -0,0 +1,91 @@ | |||
| 1 | Regulator of AMS AS3722 PMIC. | ||
| 2 | Name of the regulator subnode must be "regulators". | ||
| 3 | |||
| 4 | Optional properties: | ||
| 5 | -------------------- | ||
| 6 | The input supply of regulators are the optional properties on the | ||
| 7 | regulator node. The AS3722 is having 7 DCDC step-down regulators as | ||
| 8 | sd[0-6], 10 LDOs as ldo[0-7], ldo[9-11]. The input supply of these | ||
| 9 | regulators are provided through following properties: | ||
| 10 | vsup-sd2-supply: Input supply for SD2. | ||
| 11 | vsup-sd3-supply: Input supply for SD3. | ||
| 12 | vsup-sd4-supply: Input supply for SD4. | ||
| 13 | vsup-sd5-supply: Input supply for SD5. | ||
| 14 | vin-ldo0-supply: Input supply for LDO0. | ||
| 15 | vin-ldo1-6-supply: Input supply for LDO1 and LDO6. | ||
| 16 | vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7. | ||
| 17 | vin-ldo3-4-supply: Input supply for LDO3 and LDO4. | ||
| 18 | vin-ldo9-10-supply: Input supply for LDO9 and LDO10. | ||
| 19 | vin-ldo11-supply: Input supply for LDO11. | ||
| 20 | |||
| 21 | Optional nodes: | ||
| 22 | -------------- | ||
| 23 | - regulators : Must contain a sub-node per regulator from the list below. | ||
| 24 | Each sub-node should contain the constraints and initialization | ||
| 25 | information for that regulator. See regulator.txt for a | ||
| 26 | description of standard properties for these sub-nodes. | ||
| 27 | Additional custom properties are listed below. | ||
| 28 | sd[0-6], ldo[0-7], ldo[9-11]. | ||
| 29 | |||
| 30 | Optional sub-node properties: | ||
| 31 | ---------------------------- | ||
| 32 | ams,ext-control: External control of the rail. The option of | ||
| 33 | this properties will tell which external input is | ||
| 34 | controlling this rail. Valid values are 0, 1, 2 ad 3. | ||
| 35 | 0: There is no external control of this rail. | ||
| 36 | 1: Rail is controlled by ENABLE1 input pin. | ||
| 37 | 2: Rail is controlled by ENABLE2 input pin. | ||
| 38 | 3: Rail is controlled by ENABLE3 input pin. | ||
| 39 | ams,enable-tracking: Enable tracking with SD1, only supported | ||
| 40 | by LDO3. | ||
| 41 | |||
| 42 | Example: | ||
| 43 | ------- | ||
| 44 | ams3722: ams3722 { | ||
| 45 | compatible = "ams,as3722"; | ||
| 46 | reg = <0x40>; | ||
| 47 | ... | ||
| 48 | |||
| 49 | regulators { | ||
| 50 | vsup-sd2-supply = <...>; | ||
| 51 | ... | ||
| 52 | |||
| 53 | sd0 { | ||
| 54 | regulator-name = "vdd_cpu"; | ||
| 55 | regulator-min-microvolt = <700000>; | ||
| 56 | regulator-max-microvolt = <1400000>; | ||
| 57 | regulator-always-on; | ||
| 58 | ams,ext-control = <2>; | ||
| 59 | }; | ||
| 60 | |||
| 61 | sd1 { | ||
| 62 | regulator-name = "vdd_core"; | ||
| 63 | regulator-min-microvolt = <700000>; | ||
| 64 | regulator-max-microvolt = <1400000>; | ||
| 65 | regulator-always-on; | ||
| 66 | ams,ext-control = <1>; | ||
| 67 | }; | ||
| 68 | |||
| 69 | sd2 { | ||
| 70 | regulator-name = "vddio_ddr"; | ||
| 71 | regulator-min-microvolt = <1350000>; | ||
| 72 | regulator-max-microvolt = <1350000>; | ||
| 73 | regulator-always-on; | ||
| 74 | }; | ||
| 75 | |||
| 76 | sd4 { | ||
| 77 | regulator-name = "avdd-hdmi-pex"; | ||
| 78 | regulator-min-microvolt = <1050000>; | ||
| 79 | regulator-max-microvolt = <1050000>; | ||
| 80 | regulator-always-on; | ||
| 81 | }; | ||
| 82 | |||
| 83 | sd5 { | ||
| 84 | regulator-name = "vdd-1v8"; | ||
| 85 | regulator-min-microvolt = <1800000>; | ||
| 86 | regulator-max-microvolt = <1800000>; | ||
| 87 | regulator-always-on; | ||
| 88 | }; | ||
| 89 | .... | ||
| 90 | }; | ||
| 91 | }; | ||
| @@ -0,0 +1,21 @@ | |||
| 1 | * Dialog Semiconductor DA9210 Voltage Regulator | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible: must be "diasemi,da9210" | ||
| 6 | - reg: the i2c slave address of the regulator. It should be 0x68. | ||
| 7 | |||
| 8 | Any standard regulator properties can be used to configure the single da9210 | ||
| 9 | DCDC. | ||
| 10 | |||
| 11 | Example: | ||
| 12 | |||
| 13 | da9210@68 { | ||
| 14 | compatible = "diasemi,da9210"; | ||
| 15 | reg = <0x68>; | ||
| 16 | |||
| 17 | regulator-min-microvolt = <900000>; | ||
| 18 | regulator-max-microvolt = <1000000>; | ||
| 19 | regulator-boot-on; | ||
| 20 | regulator-always-on; | ||
| 21 | }; | ||
| @@ -26,11 +26,17 @@ Optional nodes: · 25 unmodified lines | |||
| 26 | 26 | ||
| 27 | For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP, | 27 | For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP, |
| 28 | smps45, smps457, smps7 depending on variant, smps6, smps[8-9], | 28 | smps45, smps457, smps7 depending on variant, smps6, smps[8-9], |
| 29 | smps10_out2, smps10_out1, do[1-9], ldoln, ldousb. | 29 | smps10_out2, smps10_out1, ldo[1-9], ldoln, ldousb. |
| 30 | 30 | ||
| 31 | Optional sub-node properties: | 31 | Optional sub-node properties: |
| 32 | ti,warm-reset - maintain voltage during warm reset(boolean) | 32 | ti,warm-reset - maintain voltage during warm reset(boolean) |
| 33 | ti,roof-floor - control voltage selection by pin(boolean) | 33 | ti,roof-floor - This takes as optional argument on platform supporting |
| 34 | the rail from desired external control. If there is no argument then | ||
| 35 | it will be assume that it is controlled by NSLEEP pin. | ||
| 36 | The valid value for external pins are: | ||
| 37 | ENABLE1 then 1, | ||
| 38 | ENABLE2 then 2 or | ||
| 39 | NSLEEP then 3. | ||
| 34 | ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto, | 40 | ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto, |
| 35 | 2 - eco, 3 - forced pwm | 41 | 2 - eco, 3 - forced pwm |
| 36 | ti,smps-range - OTP has the wrong range set for the hardware so override | 42 | ti,smps-range - OTP has the wrong range set for the hardware so override |
| @@ -61,7 +67,7 @@ pmic { · 24 unmodified lines | |||
| 61 | regulator-always-on; | 67 | regulator-always-on; |
| 62 | regulator-boot-on; | 68 | regulator-boot-on; |
| 63 | ti,warm-reset; | 69 | ti,warm-reset; |
| 64 | ti,roof-floor; | 70 | ti,roof-floor = <1>; /* ENABLE1 control */ |
| 65 | ti,mode-sleep = <0>; | 71 | ti,mode-sleep = <0>; |
| 66 | ti,smps-range = <1>; | 72 | ti,smps-range = <1>; |
| 67 | }; | 73 | }; |
| @@ -14,6 +14,11 @@ Optional properties: · 13 unmodified lines | |||
| 14 | - regulator-ramp-delay: ramp delay for regulator(in uV/uS) | 14 | - regulator-ramp-delay: ramp delay for regulator(in uV/uS) |
| 15 | For hardwares which support disabling ramp rate, it should be explicitly | 15 | For hardwares which support disabling ramp rate, it should be explicitly |
| 16 | intialised to zero (regulator-ramp-delay = <0>) for disabling ramp delay. | 16 | intialised to zero (regulator-ramp-delay = <0>) for disabling ramp delay. |
| 17 | - regulator-enable-ramp-delay: The time taken, in microseconds, for the supply | ||
| 18 | rail to reach the target voltage, plus/minus whatever tolerance the board | ||
| 19 | design requires. This property describes the total system ramp time | ||
| 20 | required due to the combination of internal ramping of the regulator itself, | ||
| 21 | and board design issues such as trace capacitance and load on the supply. | ||
| 17 | 22 | ||
| 18 | Deprecated properties: | 23 | Deprecated properties: |
| 19 | - regulator-compatible: If a regulator chip contains multiple | 24 | - regulator-compatible: If a regulator chip contains multiple |
File renamed without changes.
| @@ -0,0 +1,22 @@ | |||
| 1 | CS42L73 audio CODEC | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible : "cirrus,cs42l73" | ||
| 6 | |||
| 7 | - reg : the I2C address of the device for I2C | ||
| 8 | |||
| 9 | Optional properties: | ||
| 10 | |||
| 11 | - reset_gpio : a GPIO spec for the reset pin. | ||
| 12 | - chgfreq : Charge Pump Frequency values 0x00-0x0F | ||
| 13 | |||
| 14 | |||
| 15 | Example: | ||
| 16 | |||
| 17 | codec: cs42l73@4a { | ||
| 18 | compatible = "cirrus,cs42l73"; | ||
| 19 | reg = <0x4a>; | ||
| 20 | reset_gpio = <&gpio 10 0>; | ||
| 21 | chgfreq = <0x05>; | ||
| 22 | }; | ||
| @@ -0,0 +1,42 @@ | |||
| 1 | * Texas Instruments SoC audio setups with TLV320AIC3X Codec | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "ti,da830-evm-audio" : forDM365/DA8xx/OMAPL1x/AM33xx | ||
| 5 | - ti,model : The user-visible name of this sound complex. | ||
| 6 | - ti,audio-codec : The phandle of the TLV320AIC3x audio codec | ||
| 7 | - ti,mcasp-controller : The phandle of the McASP controller | ||
| 8 | - ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec | ||
| 9 | - ti,audio-routing : A list of the connections between audio components. | ||
| 10 | Each entry is a pair of strings, the first being the connection's sink, | ||
| 11 | the second being the connection's source. Valid names for sources and | ||
| 12 | sinks are the codec's pins, and the jacks on the board: | ||
| 13 | |||
| 14 | Board connectors: | ||
| 15 | |||
| 16 | * Headphone Jack | ||
| 17 | * Line Out | ||
| 18 | * Mic Jack | ||
| 19 | * Line In | ||
| 20 | |||
| 21 | |||
| 22 | Example: | ||
| 23 | |||
| 24 | sound { | ||
| 25 | compatible = "ti,da830-evm-audio"; | ||
| 26 | ti,model = "DA830 EVM"; | ||
| 27 | ti,audio-codec = <&tlv320aic3x>; | ||
| 28 | ti,mcasp-controller = <&mcasp1>; | ||
| 29 | ti,codec-clock-rate = <12000000>; | ||
| 30 | ti,audio-routing = | ||
| 31 | "Headphone Jack", "HPLOUT", | ||
| 32 | "Headphone Jack", "HPROUT", | ||
| 33 | "Line Out", "LLOUT", | ||
| 34 | "Line Out", "RLOUT", | ||
| 35 | "MIC3L", "Mic Bias 2V", | ||
| 36 | "MIC3R", "Mic Bias 2V", | ||
| 37 | "Mic Bias 2V", "Mic Jack", | ||
| 38 | "LINE1L", "Line In", | ||
| 39 | "LINE2L", "Line In", | ||
| 40 | "LINE1R", "Line In", | ||
| 41 | "LINE2R", "Line In"; | ||
| 42 | }; | ||
| @@ -4,17 +4,25 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible : | 4 | - compatible : |
| 5 | "ti,dm646x-mcasp-audio" : for DM646x platforms | 5 | "ti,dm646x-mcasp-audio" : for DM646x platforms |
| 6 | "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms | 6 | "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms |
| 7 | "ti,omap2-mcasp-audio" : for OMAP2 platforms (TI81xx, AM33xx) | 7 | "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, TI81xx) |
| 8 | |||
| 9 | - reg : Should contain McASP registers offset and length | ||
| 10 | - interrupts : Interrupt number for McASP | ||
| 11 | - op-mode : I2S/DIT ops mode. | ||
| 12 | - tdm-slots : Slots for TDM operation. | ||
| 13 | - num-serializer : Serializers used by McASP. | ||
| 14 | - serial-dir : A list of serializer pin mode. The list number should be equal | ||
| 15 | to "num-serializer" parameter. Each entry is a number indication | ||
| 16 | serializer pin direction. (0 - INACTIVE, 1 - TX, 2 - RX) | ||
| 17 | 8 | ||
| 9 | - reg : Should contain reg specifiers for the entries in the reg-names property. | ||
| 10 | - reg-names : Should contain: | ||
| 11 | * "mpu" for the main registers (required). For compatibility with | ||
| 12 | existing software, it is recommended this is the first entry. | ||
| 13 | * "dat" for separate data port register access (optional). | ||
| 14 | - op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF, | ||
| 15 | IEC60958-1, and AES-3 formats. | ||
| 16 | - tdm-slots : Slots for TDM operation. Indicates number of channels transmitted | ||
| 17 | or received over one serializer. | ||
| 18 | - serial-dir : A list of serializer configuration. Each entry is a number | ||
| 19 | indication for serializer pin direction. | ||
| 20 | (0 - INACTIVE, 1 - TX, 2 - RX) | ||
| 21 | - dmas: two element list of DMA controller phandles and DMA request line | ||
| 22 | ordered pairs. | ||
| 23 | - dma-names: identifier string for each DMA request line in the dmas property. | ||
| 24 | These strings correspond 1:1 with the ordered pairs in dmas. The dma | ||
| 25 | identifiers must be "rx" and "tx". | ||
| 18 | 26 | ||
| 19 | Optional properties: | 27 | Optional properties: |
| 20 | 28 | ||
| @@ -23,18 +31,23 @@ Optional properties: · 2 unmodified lines | |||
| 23 | - rx-num-evt : FIFO levels. | 31 | - rx-num-evt : FIFO levels. |
| 24 | - sram-size-playback : size of sram to be allocated during playback | 32 | - sram-size-playback : size of sram to be allocated during playback |
| 25 | - sram-size-capture : size of sram to be allocated during capture | 33 | - sram-size-capture : size of sram to be allocated during capture |
| 34 | - interrupts : Interrupt numbers for McASP, currently not used by the driver | ||
| 35 | - interrupt-names : Known interrupt names are "tx" and "rx" | ||
| 36 | - pinctrl-0: Should specify pin control group used for this controller. | ||
| 37 | - pinctrl-names: Should contain only one value - "default", for more details | ||
| 38 | please refer to pinctrl-bindings.txt | ||
| 39 | |||
| 26 | 40 | ||
| 27 | Example: | 41 | Example: |
| 28 | 42 | ||
| 29 | mcasp0: mcasp0@1d00000 { | 43 | mcasp0: mcasp0@1d00000 { |
| 30 | compatible = "ti,da830-mcasp-audio"; | 44 | compatible = "ti,da830-mcasp-audio"; |
| 31 | #address-cells = <1>; | ||
| 32 | #size-cells = <0>; | ||
| 33 | reg = <0x100000 0x3000>; | 45 | reg = <0x100000 0x3000>; |
| 34 | interrupts = <82 83>; | 46 | reg-names "mpu"; |
| 47 | interrupts = <82>, <83>; | ||
| 48 | interrupts-names = "tx", "rx"; | ||
| 35 | op-mode = <0>; /* MCASP_IIS_MODE */ | 49 | op-mode = <0>; /* MCASP_IIS_MODE */ |
| 36 | tdm-slots = <2>; | 50 | tdm-slots = <2>; |
| 37 | num-serializer = <16>; | ||
| 38 | serial-dir = < | 51 | serial-dir = < |
| 39 | 0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */ | 52 | 0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */ |
| 40 | 0 0 0 0 | 53 | 0 0 0 0 |
| @@ -24,10 +24,36 @@ Optional properties: · 23 unmodified lines | |||
| 24 | 3 - MICBIAS output is connected to AVDD, | 24 | 3 - MICBIAS output is connected to AVDD, |
| 25 | If this node is not mentioned or if the value is incorrect, then MicBias | 25 | If this node is not mentioned or if the value is incorrect, then MicBias |
| 26 | is powered down. | 26 | is powered down. |
| 27 | - AVDD-supply, IOVDD-supply, DRVDD-supply, DVDD-supply : power supplies for the | ||
| 28 | device as covered in Documentation/devicetree/bindings/regulator/regulator.txt | ||
| 29 | |||
| 30 | CODEC output pins: | ||
| 31 | * LLOUT | ||
| 32 | * RLOUT | ||
| 33 | * MONO_LOUT | ||
| 34 | * HPLOUT | ||
| 35 | * HPROUT | ||
| 36 | * HPLCOM | ||
| 37 | * HPRCOM | ||
| 38 | |||
| 39 | CODEC input pins: | ||
| 40 | * MIC3L | ||
| 41 | * MIC3R | ||
| 42 | * LINE1L | ||
| 43 | * LINE2L | ||
| 44 | * LINE1R | ||
| 45 | * LINE2R | ||
| 46 | |||
| 47 | The pins can be used in referring sound node's audio-routing property. | ||
| 27 | 48 | ||
| 28 | Example: | 49 | Example: |
| 29 | 50 | ||
| 30 | tlv320aic3x: tlv320aic3x@1b { | 51 | tlv320aic3x: tlv320aic3x@1b { |
| 31 | compatible = "ti,tlv320aic3x"; | 52 | compatible = "ti,tlv320aic3x"; |
| 32 | reg = <0x1b>; | 53 | reg = <0x1b>; |
| 54 | |||
| 55 | AVDD-supply = <®ulator>; | ||
| 56 | IOVDD-supply = <®ulator>; | ||
| 57 | DRVDD-supply = <®ulator>; | ||
| 58 | DVDD-supply = <®ulator>; | ||
| 33 | }; | 59 | }; |
| @@ -0,0 +1,27 @@ | |||
| 1 | Texas Instruments - tpa6130a2 Codec module | ||
| 2 | |||
| 3 | The tpa6130a2 serial control bus communicates through I2C protocols | ||
| 4 | |||
| 5 | Required properties: | ||
| 6 | |||
| 7 | - compatible - "string" - One of: | ||
| 8 | "ti,tpa6130a2" - TPA6130A2 | ||
| 9 | "ti,tpa6140a2" - TPA6140A2 | ||
| 10 | |||
| 11 | |||
| 12 | - reg - <int> - I2C slave address | ||
| 13 | |||
| 14 | - Vdd-supply - <phandle> - power supply regulator | ||
| 15 | |||
| 16 | Optional properties: | ||
| 17 | |||
| 18 | - power-gpio - gpio pin to power the device | ||
| 19 | |||
| 20 | Example: | ||
| 21 | |||
| 22 | tpa6130a2: tpa6130a2@60 { | ||
| 23 | compatible = "ti,tpa6130a2"; | ||
| 24 | reg = <0x60>; | ||
| 25 | Vdd-supply = <&vmmc2>; | ||
| 26 | power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; | ||
| 27 | }; | ||
| @@ -2,8 +2,8 @@ OMAP2+ McSPI device · 1 unmodified line | |||
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : | 4 | - compatible : |
| 5 | - "ti,omap2-spi" for OMAP2 & OMAP3. | 5 | - "ti,omap2-mcspi" for OMAP2 & OMAP3. |
| 6 | - "ti,omap4-spi" for OMAP4+. | 6 | - "ti,omap4-mcspi" for OMAP4+. |
| 7 | - ti,spi-num-cs : Number of chipselect supported by the instance. | 7 | - ti,spi-num-cs : Number of chipselect supported by the instance. |
| 8 | - ti,hwmods: Name of the hwmod associated to the McSPI | 8 | - ti,hwmods: Name of the hwmod associated to the McSPI |
| 9 | - ti,pindir-d0-out-d1-in: Select the D0 pin as output and D1 as | 9 | - ti,pindir-d0-out-d1-in: Select the D0 pin as output and D1 as |
| @@ -0,0 +1,7 @@ | |||
| 1 | Renesas HSPI. | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "renesas,hspi" | ||
| 5 | - reg : Offset and length of the register set for the device | ||
| 6 | - interrupts : interrupt line used by HSPI | ||
| 7 | |||
| @@ -1,7 +1,8 @@ | |||
| 1 | * Freescale i.MX28 LRADC device driver | 1 | * Freescale i.MX28 LRADC device driver |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "fsl,imx28-lradc" | 4 | - compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lradc" |
| 5 | for i.MX28 SoC | ||
| 5 | - reg: Address and length of the register set for the device | 6 | - reg: Address and length of the register set for the device |
| 6 | - interrupts: Should contain the LRADC interrupts | 7 | - interrupts: Should contain the LRADC interrupts |
| 7 | 8 | ||
| @@ -9,13 +10,38 @@ Optional properties: · 1 unmodified line | |||
| 9 | - fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen | 10 | - fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen |
| 10 | to LRADC. Valid value is either 4 or 5. If this | 11 | to LRADC. Valid value is either 4 or 5. If this |
| 11 | property is not present, then the touchscreen is | 12 | property is not present, then the touchscreen is |
| 12 | disabled. | 13 | disabled. 5 wires is valid for i.MX28 SoC only. |
| 14 | - fsl,ave-ctrl: number of samples per direction to calculate an average value. | ||
| 15 | Allowed value is 1 ... 31, default is 4 | ||
| 16 | - fsl,ave-delay: delay between consecutive samples. Allowed value is | ||
| 17 | 1 ... 2047. It is used if 'fsl,ave-ctrl' > 1, counts at | ||
| 18 | 2 kHz and its default is 2 (= 1 ms) | ||
| 19 | - fsl,settling: delay between plate switch to next sample. Allowed value is | ||
| 20 | 1 ... 2047. It counts at 2 kHz and its default is | ||
| 21 | 10 (= 5 ms) | ||
| 13 | 22 | ||
| 14 | Examples: | 23 | Example for i.MX23 SoC: |
| 24 | |||
| 25 | lradc@80050000 { | ||
| 26 | compatible = "fsl,imx23-lradc"; | ||
| 27 | reg = <0x80050000 0x2000>; | ||
| 28 | interrupts = <36 37 38 39 40 41 42 43 44>; | ||
| 29 | status = "okay"; | ||
| 30 | fsl,lradc-touchscreen-wires = <4>; | ||
| 31 | fsl,ave-ctrl = <4>; | ||
| 32 | fsl,ave-delay = <2>; | ||
| 33 | fsl,settling = <10>; | ||
| 34 | }; | ||
| 35 | |||
| 36 | Example for i.MX28 SoC: | ||
| 15 | 37 | ||
| 16 | lradc@80050000 { | 38 | lradc@80050000 { |
| 17 | compatible = "fsl,imx28-lradc"; | 39 | compatible = "fsl,imx28-lradc"; |
| 18 | reg = <0x80050000 0x2000>; | 40 | reg = <0x80050000 0x2000>; |
| 19 | interrupts = <10 14 15 16 17 18 19 | 41 | interrupts = <10 14 15 16 17 18 19 20 21 22 23 24 25>; |
| 20 | 20 21 22 23 24 25>; | 42 | status = "okay"; |
| 43 | fsl,lradc-touchscreen-wires = <5>; | ||
| 44 | fsl,ave-ctrl = <4>; | ||
| 45 | fsl,ave-delay = <2>; | ||
| 46 | fsl,settling = <10>; | ||
| 21 | }; | 47 | }; |
| @@ -0,0 +1,23 @@ | |||
| 1 | * EFM32 timer hardware | ||
| 2 | |||
| 3 | The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be | ||
| 4 | connected to form a 32 bit counter. Each timer has three Compare/Capture | ||
| 5 | channels and can be used as PWM or Quadrature Decoder. Available clock sources | ||
| 6 | are the cpu's HFPERCLK (with a 10-bit prescaler) or an external pin. | ||
| 7 | |||
| 8 | Required properties: | ||
| 9 | - compatible : Should be efm32,timer | ||
| 10 | - reg : Address and length of the register set | ||
| 11 | - clocks : Should contain a reference to the HFPERCLK | ||
| 12 | |||
| 13 | Optional properties: | ||
| 14 | - interrupts : Reference to the timer interrupt | ||
| 15 | |||
| 16 | Example: | ||
| 17 | |||
| 18 | timer@40010c00 { | ||
| 19 | compatible = "efm32,timer"; | ||
| 20 | reg = <0x40010c00 0x400>; | ||
| 21 | interrupts = <14>; | ||
| 22 | clocks = <&cmu clk_HFPERCLKTIMER3>; | ||
| 23 | }; | ||
| @@ -0,0 +1,17 @@ | |||
| 1 | MSM SoC HSUSB controllers | ||
| 2 | |||
| 3 | EHCI | ||
| 4 | |||
| 5 | Required properties: | ||
| 6 | - compatible: Should contain "qcom,ehci-host" | ||
| 7 | - regs: offset and length of the register set in the memory map | ||
| 8 | - usb-phy: phandle for the PHY device | ||
| 9 | |||
| 10 | Example EHCI controller device node: | ||
| 11 | |||
| 12 | ehci: ehci@f9a55000 { | ||
| 13 | compatible = "qcom,ehci-host"; | ||
| 14 | reg = <0xf9a55000 0x400>; | ||
| 15 | usb-phy = <&usb_otg>; | ||
| 16 | }; | ||
| 17 | |||
| @@ -3,9 +3,6 @@ OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS · 2 unmodified lines | |||
| 3 | OMAP MUSB GLUE | 3 | OMAP MUSB GLUE |
| 4 | - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb" | 4 | - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb" |
| 5 | - ti,hwmods : must be "usb_otg_hs" | 5 | - ti,hwmods : must be "usb_otg_hs" |
| 6 | - ti,has-mailbox : to specify that omap uses an external mailbox | ||
| 7 | (in control module) to communicate with the musb core during device connect | ||
| 8 | and disconnect. | ||
| 9 | - multipoint : Should be "1" indicating the musb controller supports | 6 | - multipoint : Should be "1" indicating the musb controller supports |
| 10 | multipoint. This is a MUSB configuration-specific setting. | 7 | multipoint. This is a MUSB configuration-specific setting. |
| 11 | - num-eps : Specifies the number of endpoints. This is also a | 8 | - num-eps : Specifies the number of endpoints. This is also a |
| @@ -19,6 +16,9 @@ OMAP MUSB GLUE · 7 unmodified lines | |||
| 19 | - power : Should be "50". This signifies the controller can supply up to | 16 | - power : Should be "50". This signifies the controller can supply up to |
| 20 | 100mA when operating in host mode. | 17 | 100mA when operating in host mode. |
| 21 | - usb-phy : the phandle for the PHY device | 18 | - usb-phy : the phandle for the PHY device |
| 19 | - phys : the phandle for the PHY device (used by generic PHY framework) | ||
| 20 | - phy-names : the names of the PHY corresponding to the PHYs present in the | ||
| 21 | *phy* phandle. | ||
| 22 | 22 | ||
| 23 | Optional properties: | 23 | Optional properties: |
| 24 | - ctrl-module : phandle of the control module this glue uses to write to | 24 | - ctrl-module : phandle of the control module this glue uses to write to |
| @@ -28,11 +28,12 @@ SOC specific device node entry · 3 unmodified lines | |||
| 28 | usb_otg_hs: usb_otg_hs@4a0ab000 { | 28 | usb_otg_hs: usb_otg_hs@4a0ab000 { |
| 29 | compatible = "ti,omap4-musb"; | 29 | compatible = "ti,omap4-musb"; |
| 30 | ti,hwmods = "usb_otg_hs"; | 30 | ti,hwmods = "usb_otg_hs"; |
| 31 | ti,has-mailbox; | ||
| 32 | multipoint = <1>; | 31 | multipoint = <1>; |
| 33 | num-eps = <16>; | 32 | num-eps = <16>; |
| 34 | ram-bits = <12>; | 33 | ram-bits = <12>; |
| 35 | ctrl-module = <&omap_control_usb>; | 34 | ctrl-module = <&omap_control_usb>; |
| 35 | phys = <&usb2_phy>; | ||
| 36 | phy-names = "usb2-phy"; | ||
| 36 | }; | 37 | }; |
| 37 | 38 | ||
| 38 | Board specific device node entry | 39 | Board specific device node entry |
| @@ -78,22 +79,22 @@ omap_dwc3 { · 39 unmodified lines | |||
| 78 | OMAP CONTROL USB | 79 | OMAP CONTROL USB |
| 79 | 80 | ||
| 80 | Required properties: | 81 | Required properties: |
| 81 | - compatible: Should be "ti,omap-control-usb" | 82 | - compatible: Should be one of |
| 83 | "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4. | ||
| 84 | "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register | ||
| 85 | e.g. USB2_PHY on OMAP5. | ||
| 86 | "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control | ||
| 87 | e.g. USB3 PHY and SATA PHY on OMAP5. | ||
| 88 | "ti,control-phy-dra7usb2" - if it has power down register like USB2 PHY on | ||
| 89 | DRA7 platform. | ||
| 82 | - reg : Address and length of the register set for the device. It contains | 90 | - reg : Address and length of the register set for the device. It contains |
| 83 | the address of "control_dev_conf" and "otghs_control" or "phy_power_usb" | 91 | the address of "otghs_control" for control-phy-otghs or "power" register |
| 84 | depending upon omap4 or omap5. | 92 | for other types. |
| 85 | - reg-names: The names of the register addresses corresponding to the registers | 93 | - reg-names: should be "otghs_control" control-phy-otghs and "power" for |
| 86 | filled in "reg". | 94 | other types. |
| 87 | - ti,type: This is used to differentiate whether the control module has | ||
| 88 | usb mailbox or usb3 phy power. omap4 has usb mailbox in control module to | ||
| 89 | notify events to the musb core and omap5 has usb3 phy power register to | ||
| 90 | power on usb3 phy. Should be "1" if it has mailbox and "2" if it has usb3 | ||
| 91 | phy power. | ||
| 92 | 95 | ||
| 93 | omap_control_usb: omap-control-usb@4a002300 { | 96 | omap_control_usb: omap-control-usb@4a002300 { |
| 94 | compatible = "ti,omap-control-usb"; | 97 | compatible = "ti,control-phy-otghs"; |
| 95 | reg = <0x4a002300 0x4>, | 98 | reg = <0x4a00233c 0x4>; |
| 96 | <0x4a00233c 0x4>; | 99 | reg-names = "otghs_control"; |
| 97 | reg-names = "control_dev_conf", "otghs_control"; | ||
| 98 | ti,type = <1>; | ||
| 99 | }; | 100 | }; |
| @@ -15,7 +15,7 @@ Optional properties: · 14 unmodified lines | |||
| 15 | 15 | ||
| 16 | - vcc-supply: phandle to the regulator that provides RESET to the PHY. | 16 | - vcc-supply: phandle to the regulator that provides RESET to the PHY. |
| 17 | 17 | ||
| 18 | - reset-supply: phandle to the regulator that provides power to the PHY. | 18 | - reset-gpios: Should specify the GPIO for reset. |
| 19 | 19 | ||
| 20 | Example: | 20 | Example: |
| 21 | 21 | ||
| @@ -25,10 +25,9 @@ Example: · 3 unmodified lines | |||
| 25 | clocks = <&osc 0>; | 25 | clocks = <&osc 0>; |
| 26 | clock-names = "main_clk"; | 26 | clock-names = "main_clk"; |
| 27 | vcc-supply = <&hsusb1_vcc_regulator>; | 27 | vcc-supply = <&hsusb1_vcc_regulator>; |
| 28 | reset-supply = <&hsusb1_reset_regulator>; | 28 | reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; |
| 29 | }; | 29 | }; |
| 30 | 30 | ||
| 31 | hsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator | 31 | hsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator |
| 32 | and expects that clock to be configured to 19.2MHz by the NOP PHY driver. | 32 | and expects that clock to be configured to 19.2MHz by the NOP PHY driver. |
| 33 | hsusb1_vcc_regulator provides power to the PHY and hsusb1_reset_regulator | 33 | hsusb1_vcc_regulator provides power to the PHY and GPIO 7 controls RESET. |
| 34 | controls RESET. | ||
| @@ -5,6 +5,8 @@ OMAP USB2 PHY · 4 unmodified lines | |||
| 5 | Required properties: | 5 | Required properties: |
| 6 | - compatible: Should be "ti,omap-usb2" | 6 | - compatible: Should be "ti,omap-usb2" |
| 7 | - reg : Address and length of the register set for the device. | 7 | - reg : Address and length of the register set for the device. |
| 8 | - #phy-cells: determine the number of cells that should be given in the | ||
| 9 | phandle while referencing this phy. | ||
| 8 | 10 | ||
| 9 | Optional properties: | 11 | Optional properties: |
| 10 | - ctrl-module : phandle of the control module used by PHY driver to power on | 12 | - ctrl-module : phandle of the control module used by PHY driver to power on |
| @@ -16,6 +18,7 @@ usb2phy@4a0ad080 { · 5 unmodified lines | |||
| 16 | compatible = "ti,omap-usb2"; | 18 | compatible = "ti,omap-usb2"; |
| 17 | reg = <0x4a0ad080 0x58>; | 19 | reg = <0x4a0ad080 0x58>; |
| 18 | ctrl-module = <&omap_control_usb>; | 20 | ctrl-module = <&omap_control_usb>; |
| 21 | #phy-cells = <0>; | ||
| 19 | }; | 22 | }; |
| 20 | 23 | ||
| 21 | OMAP USB3 PHY | 24 | OMAP USB3 PHY |
| @@ -25,6 +28,8 @@ Required properties: · 3 unmodified lines | |||
| 25 | - reg : Address and length of the register set for the device. | 28 | - reg : Address and length of the register set for the device. |
| 26 | - reg-names: The names of the register addresses corresponding to the registers | 29 | - reg-names: The names of the register addresses corresponding to the registers |
| 27 | filled in "reg". | 30 | filled in "reg". |
| 31 | - #phy-cells: determine the number of cells that should be given in the | ||
| 32 | phandle while referencing this phy. | ||
| 28 | 33 | ||
| 29 | Optional properties: | 34 | Optional properties: |
| 30 | - ctrl-module : phandle of the control module used by PHY driver to power on | 35 | - ctrl-module : phandle of the control module used by PHY driver to power on |
| @@ -39,4 +44,5 @@ usb3phy@4a084400 { · 8 unmodified lines | |||
| 39 | <0x4a084c00 0x40>; | 44 | <0x4a084c00 0x40>; |
| 40 | reg-names = "phy_rx", "phy_tx", "pll_ctrl"; | 45 | reg-names = "phy_rx", "phy_tx", "pll_ctrl"; |
| 41 | ctrl-module = <&omap_control_usb>; | 46 | ctrl-module = <&omap_control_usb>; |
| 47 | #phy-cells = <0>; | ||
| 42 | }; | 48 | }; |
| @@ -15,7 +15,7 @@ Optional properties: · 14 unmodified lines | |||
| 15 | Example: | 15 | Example: |
| 16 | 16 | ||
| 17 | usb_per5@a03e0000 { | 17 | usb_per5@a03e0000 { |
| 18 | compatible = "stericsson,db8500-musb", "mentor,musb"; | 18 | compatible = "stericsson,db8500-musb"; |
| 19 | reg = <0xa03e0000 0x10000>; | 19 | reg = <0xa03e0000 0x10000>; |
| 20 | interrupts = <0 23 0x4>; | 20 | interrupts = <0 23 0x4>; |
| 21 | interrupt-names = "mc"; | 21 | interrupt-names = "mc"; |
| @@ -12,11 +12,15 @@ amcc Applied Micro Circuits Corporation (APM, formally AMCC) · 11 unmodified lines | |||
| 12 | apm Applied Micro Circuits Corporation (APM) | 12 | apm Applied Micro Circuits Corporation (APM) |
| 13 | arm ARM Ltd. | 13 | arm ARM Ltd. |
| 14 | atmel Atmel Corporation | 14 | atmel Atmel Corporation |
| 15 | auo AU Optronics Corporation | ||
| 15 | avago Avago Technologies | 16 | avago Avago Technologies |
| 16 | bosch Bosch Sensortec GmbH | 17 | bosch Bosch Sensortec GmbH |
| 17 | brcm Broadcom Corporation | 18 | brcm Broadcom Corporation |
| 19 | capella Capella Microsystems, Inc | ||
| 18 | cavium Cavium, Inc. | 20 | cavium Cavium, Inc. |
| 21 | cdns Cadence Design Systems Inc. | ||
| 19 | chrp Common Hardware Reference Platform | 22 | chrp Common Hardware Reference Platform |
| 23 | chunghwa Chunghwa Picture Tubes Ltd. | ||
| 20 | cirrus Cirrus Logic, Inc. | 24 | cirrus Cirrus Logic, Inc. |
| 21 | cortina Cortina Systems, Inc. | 25 | cortina Cortina Systems, Inc. |
| 22 | dallas Maxim Integrated Products (formerly Dallas Semiconductor) | 26 | dallas Maxim Integrated Products (formerly Dallas Semiconductor) |
| @@ -45,6 +49,8 @@ nintendo Nintendo · 22 unmodified lines | |||
| 45 | nvidia NVIDIA | 49 | nvidia NVIDIA |
| 46 | nxp NXP Semiconductors | 50 | nxp NXP Semiconductors |
| 47 | onnn ON Semiconductor Corp. | 51 | onnn ON Semiconductor Corp. |
| 52 | panasonic Panasonic Corporation | ||
| 53 | phytec PHYTEC Messtechnik GmbH | ||
| 48 | picochip Picochip Ltd | 54 | picochip Picochip Ltd |
| 49 | powervr PowerVR (deprecated, use img) | 55 | powervr PowerVR (deprecated, use img) |
| 50 | qca Qualcomm Atheros, Inc. | 56 | qca Qualcomm Atheros, Inc. |
| @@ -64,12 +70,12 @@ snps Synopsys, Inc. · 13 unmodified lines | |||
| 64 | st STMicroelectronics | 70 | st STMicroelectronics |
| 65 | ste ST-Ericsson | 71 | ste ST-Ericsson |
| 66 | stericsson ST-Ericsson | 72 | stericsson ST-Ericsson |
| 67 | toumaz Toumaz | ||
| 68 | ti Texas Instruments | 73 | ti Texas Instruments |
| 69 | toshiba Toshiba Corporation | 74 | toshiba Toshiba Corporation |
| 75 | toumaz Toumaz | ||
| 70 | v3 V3 Semiconductor | 76 | v3 V3 Semiconductor |
| 71 | via VIA Technologies, Inc. | 77 | via VIA Technologies, Inc. |
| 78 | winbond Winbond Electronics corp. | ||
| 72 | wlf Wolfson Microelectronics | 79 | wlf Wolfson Microelectronics |
| 73 | wm Wondermedia Technologies, Inc. | 80 | wm Wondermedia Technologies, Inc. |
| 74 | winbond Winbond Electronics corp. | ||
| 75 | xlnx Xilinx | 81 | xlnx Xilinx |
| @@ -0,0 +1,75 @@ | |||
| 1 | Atmel LCDC Framebuffer | ||
| 2 | ----------------------------------------------------- | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible : | ||
| 6 | "atmel,at91sam9261-lcdc" , | ||
| 7 | "atmel,at91sam9263-lcdc" , | ||
| 8 | "atmel,at91sam9g10-lcdc" , | ||
| 9 | "atmel,at91sam9g45-lcdc" , | ||
| 10 | "atmel,at91sam9g45es-lcdc" , | ||
| 11 | "atmel,at91sam9rl-lcdc" , | ||
| 12 | "atmel,at32ap-lcdc" | ||
| 13 | - reg : Should contain 1 register ranges(address and length) | ||
| 14 | - interrupts : framebuffer controller interrupt | ||
| 15 | - display: a phandle pointing to the display node | ||
| 16 | |||
| 17 | Required nodes: | ||
| 18 | - display: a display node is required to initialize the lcd panel | ||
| 19 | This should be in the board dts. | ||
| 20 | - default-mode: a videomode within the display with timing parameters | ||
| 21 | as specified below. | ||
| 22 | |||
| 23 | Example: | ||
| 24 | |||
| 25 | fb0: fb@0x00500000 { | ||
| 26 | compatible = "atmel,at91sam9g45-lcdc"; | ||
| 27 | reg = <0x00500000 0x1000>; | ||
| 28 | interrupts = <23 3 0>; | ||
| 29 | pinctrl-names = "default"; | ||
| 30 | pinctrl-0 = <&pinctrl_fb>; | ||
| 31 | display = <&display0>; | ||
| 32 | status = "okay"; | ||
| 33 | #address-cells = <1>; | ||
| 34 | #size-cells = <1>; | ||
| 35 | |||
| 36 | }; | ||
| 37 | |||
| 38 | Atmel LCDC Display | ||
| 39 | ----------------------------------------------------- | ||
| 40 | Required properties (as per of_videomode_helper): | ||
| 41 | |||
| 42 | - atmel,dmacon: dma controler configuration | ||
| 43 | - atmel,lcdcon2: lcd controler configuration | ||
| 44 | - atmel,guard-time: lcd guard time (Delay in frame periods) | ||
| 45 | - bits-per-pixel: lcd panel bit-depth. | ||
| 46 | |||
| 47 | Optional properties (as per of_videomode_helper): | ||
| 48 | - atmel,lcdcon-backlight: enable backlight | ||
| 49 | - atmel,lcd-wiring-mode: lcd wiring mode "RGB" or "BRG" | ||
| 50 | - atmel,power-control-gpio: gpio to power on or off the LCD (as many as needed) | ||
| 51 | |||
| 52 | Example: | ||
| 53 | display0: display { | ||
| 54 | bits-per-pixel = <32>; | ||
| 55 | atmel,lcdcon-backlight; | ||
| 56 | atmel,dmacon = <0x1>; | ||
| 57 | atmel,lcdcon2 = <0x80008002>; | ||
| 58 | atmel,guard-time = <9>; | ||
| 59 | atmel,lcd-wiring-mode = <1>; | ||
| 60 | |||
| 61 | display-timings { | ||
| 62 | native-mode = <&timing0>; | ||
| 63 | timing0: timing0 { | ||
| 64 | clock-frequency = <9000000>; | ||
| 65 | hactive = <480>; | ||
| 66 | vactive = <272>; | ||
| 67 | hback-porch = <1>; | ||
| 68 | hfront-porch = <1>; | ||
| 69 | vback-porch = <40>; | ||
| 70 | vfront-porch = <1>; | ||
| 71 | hsync-len = <45>; | ||
| 72 | vsync-len = <1>; | ||
| 73 | }; | ||
| 74 | }; | ||
| 75 | }; | ||
| @@ -2,7 +2,7 @@ lp855x bindings · 1 unmodified line | |||
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: "ti,lp8550", "ti,lp8551", "ti,lp8552", "ti,lp8553", | 4 | - compatible: "ti,lp8550", "ti,lp8551", "ti,lp8552", "ti,lp8553", |
| 5 | "ti,lp8556", "ti,lp8557" | 5 | "ti,lp8555", "ti,lp8556", "ti,lp8557" |
| 6 | - reg: I2C slave address (u8) | 6 | - reg: I2C slave address (u8) |
| 7 | - dev-ctrl: Value of DEVICE CONTROL register (u8). It depends on the device. | 7 | - dev-ctrl: Value of DEVICE CONTROL register (u8). It depends on the device. |
| 8 | 8 | ||
| @@ -15,6 +15,33 @@ Optional properties: · 6 unmodified lines | |||
| 15 | 15 | ||
| 16 | Example: | 16 | Example: |
| 17 | 17 | ||
| 18 | /* LP8555 */ | ||
| 19 | backlight@2c { | ||
| 20 | compatible = "ti,lp8555"; | ||
| 21 | reg = <0x2c>; | ||
| 22 | |||
| 23 | dev-ctrl = /bits/ 8 <0x00>; | ||
| 24 | pwm-period = <10000>; | ||
| 25 | |||
| 26 | /* 4V OV, 4 output LED0 string enabled */ | ||
| 27 | rom_14h { | ||
| 28 | rom-addr = /bits/ 8 <0x14>; | ||
| 29 | rom-val = /bits/ 8 <0xcf>; | ||
| 30 | }; | ||
| 31 | |||
| 32 | /* Heavy smoothing, 24ms ramp time step */ | ||
| 33 | rom_15h { | ||
| 34 | rom-addr = /bits/ 8 <0x15>; | ||
| 35 | rom-val = /bits/ 8 <0xc7>; | ||
| 36 | }; | ||
| 37 | |||
| 38 | /* 4 output LED1 string enabled */ | ||
| 39 | rom_19h { | ||
| 40 | rom-addr = /bits/ 8 <0x19>; | ||
| 41 | rom-val = /bits/ 8 <0x0f>; | ||
| 42 | }; | ||
| 43 | }; | ||
| 44 | |||
| 18 | /* LP8556 */ | 45 | /* LP8556 */ |
| 19 | backlight@2c { | 46 | backlight@2c { |
| 20 | compatible = "ti,lp8556"; | 47 | compatible = "ti,lp8556"; |
| @@ -10,12 +10,16 @@ Required properties: · 9 unmodified lines | |||
| 10 | last value in the array represents a 100% duty cycle (brightest). | 10 | last value in the array represents a 100% duty cycle (brightest). |
| 11 | - default-brightness-level: the default brightness level (index into the | 11 | - default-brightness-level: the default brightness level (index into the |
| 12 | array defined by the "brightness-levels" property) | 12 | array defined by the "brightness-levels" property) |
| 13 | - power-supply: regulator for supply voltage | ||
| 13 | 14 | ||
| 14 | Optional properties: | 15 | Optional properties: |
| 15 | - pwm-names: a list of names for the PWM devices specified in the | 16 | - pwm-names: a list of names for the PWM devices specified in the |
| 16 | "pwms" property (see PWM binding[0]) | 17 | "pwms" property (see PWM binding[0]) |
| 18 | - enable-gpios: contains a single GPIO specifier for the GPIO which enables | ||
| 19 | and disables the backlight (see GPIO binding[1]) | ||
| 17 | 20 | ||
| 18 | [0]: Documentation/devicetree/bindings/pwm/pwm.txt | 21 | [0]: Documentation/devicetree/bindings/pwm/pwm.txt |
| 22 | [1]: Documentation/devicetree/bindings/gpio/gpio.txt | ||
| 19 | 23 | ||
| 20 | Example: | 24 | Example: |
| 21 | 25 | ||
| @@ -25,4 +29,7 @@ Example: · 3 unmodified lines | |||
| 25 | 29 | ||
| 26 | brightness-levels = <0 4 8 16 32 64 128 255>; | 30 | brightness-levels = <0 4 8 16 32 64 128 255>; |
| 27 | default-brightness-level = <6>; | 31 | default-brightness-level = <6>; |
| 32 | |||
| 33 | power-supply = <&vdd_bl_reg>; | ||
| 34 | enable-gpios = <&gpio 58 0>; | ||
| 28 | }; | 35 | }; |
| @@ -6,10 +6,10 @@ We use two nodes: · 5 unmodified lines | |||
| 6 | -dptx-phy node(defined inside dp-controller node) | 6 | -dptx-phy node(defined inside dp-controller node) |
| 7 | 7 | ||
| 8 | For the DP-PHY initialization, we use the dptx-phy node. | 8 | For the DP-PHY initialization, we use the dptx-phy node. |
| 9 | Required properties for dptx-phy: | 9 | Required properties for dptx-phy: deprecated, use phys and phy-names |
| 10 | -reg: | 10 | -reg: deprecated |
| 11 | Base address of DP PHY register. | 11 | Base address of DP PHY register. |
| 12 | -samsung,enable-mask: | 12 | -samsung,enable-mask: deprecated |
| 13 | The bit-mask used to enable/disable DP PHY. | 13 | The bit-mask used to enable/disable DP PHY. |
| 14 | 14 | ||
| 15 | For the Panel initialization, we read data from dp-controller node. | 15 | For the Panel initialization, we read data from dp-controller node. |
| @@ -27,6 +27,10 @@ Required properties for dp-controller: · 11 unmodified lines | |||
| 27 | from common clock binding: Shall be "dp". | 27 | from common clock binding: Shall be "dp". |
| 28 | -interrupt-parent: | 28 | -interrupt-parent: |
| 29 | phandle to Interrupt combiner node. | 29 | phandle to Interrupt combiner node. |
| 30 | -phys: | ||
| 31 | from general PHY binding: the phandle for the PHY device. | ||
| 32 | -phy-names: | ||
| 33 | from general PHY binding: Should be "dp". | ||
| 30 | -samsung,color-space: | 34 | -samsung,color-space: |
| 31 | input video data format. | 35 | input video data format. |
| 32 | COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2 | 36 | COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2 |
| @@ -68,11 +72,8 @@ SOC specific portion: · 35 unmodified lines | |||
| 68 | clocks = <&clock 342>; | 72 | clocks = <&clock 342>; |
| 69 | clock-names = "dp"; | 73 | clock-names = "dp"; |
| 70 | 74 | ||
| 71 | dptx-phy { | 75 | phys = <&dp_phy>; |
| 72 | reg = <0x10040720>; | 76 | phy-names = "dp"; |
| 73 | samsung,enable-mask = <1>; | ||
| 74 | }; | ||
| 75 | |||
| 76 | }; | 77 | }; |
| 77 | 78 | ||
| 78 | Board Specific portion: | 79 | Board Specific portion: |
| @@ -12,7 +12,19 @@ Required properties: · 11 unmodified lines | |||
| 12 | a) phandle of the gpio controller node. | 12 | a) phandle of the gpio controller node. |
| 13 | b) pin number within the gpio controller. | 13 | b) pin number within the gpio controller. |
| 14 | c) optional flags and pull up/down. | 14 | c) optional flags and pull up/down. |
| 15 | 15 | - clocks: list of clock IDs from SoC clock driver. | |
| 16 | a) hdmi: Gate of HDMI IP bus clock. | ||
| 17 | b) sclk_hdmi: Gate of HDMI special clock. | ||
| 18 | c) sclk_pixel: Pixel special clock, one of the two possible inputs of | ||
| 19 | HDMI clock mux. | ||
| 20 | d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of | ||
| 21 | HDMI clock mux. | ||
| 22 | e) mout_hdmi: It is required by the driver to switch between the 2 | ||
| 23 | parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable | ||
| 24 | after configuration, parent is set to sclk_hdmiphy else | ||
| 25 | sclk_pixel. | ||
| 26 | - clock-names: aliases as per driver requirements for above clock IDs: | ||
| 27 | "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi". | ||
| 16 | Example: | 28 | Example: |
| 17 | 29 | ||
| 18 | hdmi { | 30 | hdmi { |
| @@ -10,6 +10,10 @@ Required properties: · 9 unmodified lines | |||
| 10 | - reg: physical base address of the mixer and length of memory mapped | 10 | - reg: physical base address of the mixer and length of memory mapped |
| 11 | region. | 11 | region. |
| 12 | - interrupts: interrupt number to the cpu. | 12 | - interrupts: interrupt number to the cpu. |
| 13 | - clocks: list of clock IDs from SoC clock driver. | ||
| 14 | a) mixer: Gate of Mixer IP bus clock. | ||
| 15 | b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of | ||
| 16 | mixer mux. | ||
| 13 | 17 | ||
| 14 | Example: | 18 | Example: |
| 15 | 19 | ||
| @@ -0,0 +1,21 @@ | |||
| 1 | Synopsys Designware Watchdog Timer | ||
| 2 | |||
| 3 | Required Properties: | ||
| 4 | |||
| 5 | - compatible : Should contain "snps,dw-wdt" | ||
| 6 | - reg : Base address and size of the watchdog timer registers. | ||
| 7 | - clocks : phandle + clock-specifier for the clock that drives the | ||
| 8 | watchdog timer. | ||
| 9 | |||
| 10 | Optional Properties: | ||
| 11 | |||
| 12 | - interrupts : The interrupt used for the watchdog timeout warning. | ||
| 13 | |||
| 14 | Example: | ||
| 15 | |||
| 16 | watchdog0: wd@ffd02000 { | ||
| 17 | compatible = "snps,dw-wdt"; | ||
| 18 | reg = <0xffd02000 0x1000>; | ||
| 19 | interrupts = <0 171 4>; | ||
| 20 | clocks = <&per_base_clk>; | ||
| 21 | }; | ||
File renamed without changes.
| @@ -0,0 +1,15 @@ | |||
| 1 | MOXA ART Watchdog timer | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible : Must be "moxa,moxart-watchdog" | ||
| 6 | - reg : Should contain registers location and length | ||
| 7 | - clocks : Should contain phandle for the clock that drives the counter | ||
| 8 | |||
| 9 | Example: | ||
| 10 | |||
| 11 | watchdog: watchdog@98500000 { | ||
| 12 | compatible = "moxa,moxart-watchdog"; | ||
| 13 | reg = <0x98500000 0x10>; | ||
| 14 | clocks = <&coreclk>; | ||
| 15 | }; | ||
| @@ -0,0 +1,19 @@ | |||
| 1 | Ralink Watchdog Timers | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "ralink,rt2880-wdt" | ||
| 5 | - reg: physical base address of the controller and length of the register range | ||
| 6 | |||
| 7 | Optional properties: | ||
| 8 | - interrupt-parent: phandle to the INTC device node | ||
| 9 | - interrupts: Specify the INTC interrupt number | ||
| 10 | |||
| 11 | Example: | ||
| 12 | |||
| 13 | watchdog@120 { | ||
| 14 | compatible = "ralink,rt2880-wdt"; | ||
| 15 | reg = <0x120 0x10>; | ||
| 16 | |||
| 17 | interrupt-parent = <&intc>; | ||
| 18 | interrupts = <1>; | ||
| 19 | }; | ||
| @@ -0,0 +1,14 @@ | |||
| 1 | SiRFSoC Timer and Watchdog Timer(WDT) Controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: "sirf,prima2-tick" | ||
| 5 | - reg: Address range of tick timer/WDT register set | ||
| 6 | - interrupts: interrupt number to the cpu | ||
| 7 | |||
| 8 | Example: | ||
| 9 | |||
| 10 | timer@b0020000 { | ||
| 11 | compatible = "sirf,prima2-tick"; | ||
| 12 | reg = <0xb0020000 0x1000>; | ||
| 13 | interrupts = <0>; | ||
| 14 | }; | ||
| @@ -15,39 +15,48 @@ be built as module or inside kernel. Let's consider those cases. · 14 unmodified lines | |||
| 15 | 15 | ||
| 16 | Part 2 - When dmatest is built as a module... | 16 | Part 2 - When dmatest is built as a module... |
| 17 | 17 | ||
| 18 | After mounting debugfs and loading the module, the /sys/kernel/debug/dmatest | ||
| 19 | folder with nodes will be created. There are two important files located. First | ||
| 20 | is the 'run' node that controls run and stop phases of the test, and the second | ||
| 21 | one, 'results', is used to get the test case results. | ||
| 22 | |||
| 23 | Note that in this case test will not run on load automatically. | ||
| 24 | |||
| 25 | Example of usage: | 18 | Example of usage: |
| 19 | % modprobe dmatest channel=dma0chan0 timeout=2000 iterations=1 run=1 | ||
| 20 | |||
| 21 | ...or: | ||
| 22 | % modprobe dmatest | ||
| 26 | % echo dma0chan0 > /sys/module/dmatest/parameters/channel | 23 | % echo dma0chan0 > /sys/module/dmatest/parameters/channel |
| 27 | % echo 2000 > /sys/module/dmatest/parameters/timeout | 24 | % echo 2000 > /sys/module/dmatest/parameters/timeout |
| 28 | % echo 1 > /sys/module/dmatest/parameters/iterations | 25 | % echo 1 > /sys/module/dmatest/parameters/iterations |
| 29 | % echo 1 > /sys/kernel/debug/dmatest/run | 26 | % echo 1 > /sys/module/dmatest/parameters/run |
| 27 | |||
| 28 | ...or on the kernel command line: | ||
| 29 | |||
| 30 | dmatest.channel=dma0chan0 dmatest.timeout=2000 dmatest.iterations=1 dmatest.run=1 | ||
| 30 | 31 | ||
| 31 | Hint: available channel list could be extracted by running the following | 32 | Hint: available channel list could be extracted by running the following |
| 32 | command: | 33 | command: |
| 33 | % ls -1 /sys/class/dma/ | 34 | % ls -1 /sys/class/dma/ |
| 34 | 35 | ||
| 35 | After a while you will start to get messages about current status or error like | 36 | Once started a message like "dmatest: Started 1 threads using dma0chan0" is |
| 36 | in the original code. | 37 | emitted. After that only test failure messages are reported until the test |
| 38 | stops. | ||
| 37 | 39 | ||
| 38 | Note that running a new test will not stop any in progress test. | 40 | Note that running a new test will not stop any in progress test. |
| 39 | 41 | ||
| 40 | The following command should return actual state of the test. | 42 | The following command returns the state of the test. |
| 41 | % cat /sys/kernel/debug/dmatest/run | 43 | % cat /sys/module/dmatest/parameters/run |
| 42 | 44 | ||
| 43 | To wait for test done the user may perform a busy loop that checks the state. | 45 | To wait for test completion userpace can poll 'run' until it is false, or use |
| 44 | 46 | the wait parameter. Specifying 'wait=1' when loading the module causes module | |
| 45 | % while [ $(cat /sys/kernel/debug/dmatest/run) = "Y" ] | 47 | initialization to pause until a test run has completed, while reading |
| 46 | > do | 48 | /sys/module/dmatest/parameters/wait waits for any running test to complete |
| 47 | > echo -n "." | 49 | before returning. For example, the following scripts wait for 42 tests |
| 48 | > sleep 1 | 50 | to complete before exiting. Note that if 'iterations' is set to 'infinite' then |
| 49 | > done | 51 | waiting is disabled. |
| 50 | > echo | 52 | |
| 53 | Example: | ||
| 54 | % modprobe dmatest run=1 iterations=42 wait=1 | ||
| 55 | % modprobe -r dmatest | ||
| 56 | ...or: | ||
| 57 | % modprobe dmatest run=1 iterations=42 | ||
| 58 | % cat /sys/module/dmatest/parameters/wait | ||
| 59 | % modprobe -r dmatest | ||
| 51 | 60 | ||
| 52 | Part 3 - When built-in in the kernel... | 61 | Part 3 - When built-in in the kernel... |
| 53 | 62 | ||
| @@ -62,21 +71,22 @@ case. You always could check them at run-time by running · 8 unmodified lines | |||
| 62 | 71 | ||
| 63 | Part 4 - Gathering the test results | 72 | Part 4 - Gathering the test results |
| 64 | 73 | ||
| 65 | The module provides a storage for the test results in the memory. The gathered | 74 | Test results are printed to the kernel log buffer with the format: |
| 66 | data could be used after test is done. | ||
| 67 | 75 | ||
| 68 | The special file 'results' in the debugfs represents gathered data of the in | 76 | "dmatest: result <channel>: <test id>: '<error msg>' with src_off=<val> dst_off=<val> len=<val> (<err code>)" |
| 69 | progress test. The messages collected are printed to the kernel log as well. | ||
| 70 | 77 | ||
| 71 | Example of output: | 78 | Example of output: |
| 72 | % cat /sys/kernel/debug/dmatest/results | 79 | % dmesg | tail -n 1 |
| 73 | dma0chan0-copy0: #1: No errors with src_off=0x7bf dst_off=0x8ad len=0x3fea (0) | 80 | dmatest: result dma0chan0-copy0: #1: No errors with src_off=0x7bf dst_off=0x8ad len=0x3fea (0) |
| 74 | 81 | ||
| 75 | The message format is unified across the different types of errors. A number in | 82 | The message format is unified across the different types of errors. A number in |
| 76 | the parens represents additional information, e.g. error code, error counter, | 83 | the parens represents additional information, e.g. error code, error counter, |
| 77 | or status. | 84 | or status. A test thread also emits a summary line at completion listing the |
| 85 | number of tests executed, number that failed, and a result code. | ||
| 78 | 86 | ||
| 79 | Comparison between buffers is stored to the dedicated structure. | 87 | Example: |
| 88 | % dmesg | tail -n 1 | ||
| 89 | dmatest: dma0chan0-copy0: summary 1 test, 0 failures 1000 iops 100000 KB/s (0) | ||
| 80 | 90 | ||
| 81 | Note that the verify result is now accessible only via file 'results' in the | 91 | The details of a data miscompare error are also emitted, but do not follow the |
| 82 | debugfs. | 92 | above format. |
| @@ -283,6 +283,7 @@ REGULATOR · 282 unmodified lines | |||
| 283 | devm_regulator_get() | 283 | devm_regulator_get() |
| 284 | devm_regulator_put() | 284 | devm_regulator_put() |
| 285 | devm_regulator_bulk_get() | 285 | devm_regulator_bulk_get() |
| 286 | devm_regulator_register() | ||
| 286 | 287 | ||
| 287 | CLOCK | 288 | CLOCK |
| 288 | devm_clk_get() | 289 | devm_clk_get() |
| @@ -302,3 +303,6 @@ PHY · 13 unmodified lines | |||
| 302 | 303 | ||
| 303 | SLAVE DMA ENGINE | 304 | SLAVE DMA ENGINE |
| 304 | devm_acpi_dma_controller_register() | 305 | devm_acpi_dma_controller_register() |
| 306 | |||
| 307 | SPI | ||
| 308 | devm_spi_register_master() | ||
File renamed without changes.
| @@ -25,8 +25,10 @@ MyungJoo Ham <myungjoo.ham@samsung.com> · 24 unmodified lines | |||
| 25 | @print_state: no change but type change (switch_dev->extcon_dev) | 25 | @print_state: no change but type change (switch_dev->extcon_dev) |
| 26 | 26 | ||
| 27 | - switch_dev_register(sdev, dev) | 27 | - switch_dev_register(sdev, dev) |
| 28 | => extcon_dev_register(edev, dev) | 28 | => extcon_dev_register(edev) |
| 29 | : no change but type change (sdev->edev) | 29 | : type change (sdev->edev) |
| 30 | : remove second param('dev'). if edev has parent device, should store | ||
| 31 | 'dev' to 'edev.dev.parent' before registering extcon device | ||
| 30 | - switch_dev_unregister(sdev) | 32 | - switch_dev_unregister(sdev) |
| 31 | => extcon_dev_unregister(edev) | 33 | => extcon_dev_unregister(edev) |
| 32 | : no change but type change (sdev->edev) | 34 | : no change but type change (sdev->edev) |
| @@ -70,6 +70,12 @@ Unless otherwise specified, all options default to off. · 69 unmodified lines | |||
| 70 | 70 | ||
| 71 | See comments at the top of fs/btrfs/check-integrity.c for more info. | 71 | See comments at the top of fs/btrfs/check-integrity.c for more info. |
| 72 | 72 | ||
| 73 | commit=<seconds> | ||
| 74 | Set the interval of periodic commit, 30 seconds by default. Higher | ||
| 75 | values defer data being synced to permanent storage with obvious | ||
| 76 | consequences when the system crashes. The upper bound is not forced, | ||
| 77 | but a warning is printed if it's more than 300 seconds (5 minutes). | ||
| 78 | |||
| 73 | compress | 79 | compress |
| 74 | compress=<type> | 80 | compress=<type> |
| 75 | compress-force | 81 | compress-force |
| @@ -154,7 +160,11 @@ Unless otherwise specified, all options default to off. · 78 unmodified lines | |||
| 154 | Currently this scans a list of several previous tree roots and tries to | 160 | Currently this scans a list of several previous tree roots and tries to |
| 155 | use the first readable. | 161 | use the first readable. |
| 156 | 162 | ||
| 157 | skip_balance | 163 | rescan_uuid_tree |
| 164 | Force check and rebuild procedure of the UUID tree. This should not | ||
| 165 | normally be needed. | ||
| 166 | |||
| 167 | skip_balance | ||
| 158 | Skip automatic resume of interrupted balance operation after mount. | 168 | Skip automatic resume of interrupted balance operation after mount. |
| 159 | May be resumed with "btrfs balance resume." | 169 | May be resumed with "btrfs balance resume." |
| 160 | 170 | ||
| @@ -234,24 +244,14 @@ available from the git repository at the following location: · 73 unmodified lines | |||
| 234 | 244 | ||
| 235 | These include the following tools: | 245 | These include the following tools: |
| 236 | 246 | ||
| 237 | mkfs.btrfs: create a filesystem | 247 | * mkfs.btrfs: create a filesystem |
| 238 | |||
| 239 | btrfsctl: control program to create snapshots and subvolumes: | ||
| 240 | 248 | ||
| 241 | mount /dev/sda2 /mnt | 249 | * btrfs: a single tool to manage the filesystems, refer to the manpage for more details |
| 242 | btrfsctl -s new_subvol_name /mnt | ||
| 243 | btrfsctl -s snapshot_of_default /mnt/default | ||
| 244 | btrfsctl -s snapshot_of_new_subvol /mnt/new_subvol_name | ||
| 245 | btrfsctl -s snapshot_of_a_snapshot /mnt/snapshot_of_new_subvol | ||
| 246 | ls /mnt | ||
| 247 | default snapshot_of_a_snapshot snapshot_of_new_subvol | ||
| 248 | new_subvol_name snapshot_of_default | ||
| 249 | 250 | ||
| 250 | Snapshots and subvolumes cannot be deleted right now, but you can | 251 | * 'btrfsck' or 'btrfs check': do a consistency check of the filesystem |
| 251 | rm -rf all the files and directories inside them. | ||
| 252 | 252 | ||
| 253 | btrfsck: do a limited check of the FS extent trees. | 253 | Other tools for specific tasks: |
| 254 | 254 | ||
| 255 | btrfs-debug-tree: print all of the FS metadata in text form. Example: | 255 | * btrfs-convert: in-place conversion from ext2/3/4 filesystems |
| 256 | 256 | ||
| 257 | btrfs-debug-tree /dev/sda2 >& big_output_file | 257 | * btrfs-image: dump filesystem metadata for debugging |
| @@ -29,15 +29,16 @@ This document contains the following sections: · 28 unmodified lines | |||
| 29 | (6) Index registration | 29 | (6) Index registration |
| 30 | (7) Data file registration | 30 | (7) Data file registration |
| 31 | (8) Miscellaneous object registration | 31 | (8) Miscellaneous object registration |
| 32 | (9) Setting the data file size | 32 | (9) Setting the data file size |
| 33 | (10) Page alloc/read/write | 33 | (10) Page alloc/read/write |
| 34 | (11) Page uncaching | 34 | (11) Page uncaching |
| 35 | (12) Index and data file consistency | 35 | (12) Index and data file consistency |
| 36 | (13) Miscellaneous cookie operations | 36 | (13) Cookie enablement |
| 37 | (14) Cookie unregistration | 37 | (14) Miscellaneous cookie operations |
| 38 | (15) Index invalidation | 38 | (15) Cookie unregistration |
| 39 | (16) Data file invalidation | 39 | (16) Index invalidation |
| 40 | (17) FS-Cache specific page flags. | 40 | (17) Data file invalidation |
| 41 | (18) FS-Cache specific page flags. | ||
| 41 | 42 | ||
| 42 | 43 | ||
| 43 | ============================= | 44 | ============================= |
| @@ -334,7 +335,8 @@ the path to the file: · 290 unmodified lines | |||
| 334 | struct fscache_cookie * | 335 | struct fscache_cookie * |
| 335 | fscache_acquire_cookie(struct fscache_cookie *parent, | 336 | fscache_acquire_cookie(struct fscache_cookie *parent, |
| 336 | const struct fscache_object_def *def, | 337 | const struct fscache_object_def *def, |
| 337 | void *netfs_data); | 338 | void *netfs_data, |
| 339 | bool enable); | ||
| 338 | 340 | ||
| 339 | This function creates an index entry in the index represented by parent, | 341 | This function creates an index entry in the index represented by parent, |
| 340 | filling in the index entry by calling the operations pointed to by def. | 342 | filling in the index entry by calling the operations pointed to by def. |
| @@ -350,6 +352,10 @@ object needs to be created somewhere down the hierarchy. Furthermore, an index · 9 unmodified lines | |||
| 350 | may be created in several different caches independently at different times. | 352 | may be created in several different caches independently at different times. |
| 351 | This is all handled transparently, and the netfs doesn't see any of it. | 353 | This is all handled transparently, and the netfs doesn't see any of it. |
| 352 | 354 | ||
| 355 | A cookie will be created in the disabled state if enabled is false. A cookie | ||
| 356 | must be enabled to do anything with it. A disabled cookie can be enabled by | ||
| 357 | calling fscache_enable_cookie() (see below). | ||
| 358 | |||
| 353 | For example, with AFS, a cell would be added to the primary index. This index | 359 | For example, with AFS, a cell would be added to the primary index. This index |
| 354 | entry would have a dependent inode containing a volume location index for the | 360 | entry would have a dependent inode containing a volume location index for the |
| 355 | volume mappings within this cell: | 361 | volume mappings within this cell: |
| @@ -357,7 +363,7 @@ volume mappings within this cell: · 1 unmodified line | |||
| 357 | cell->cache = | 363 | cell->cache = |
| 358 | fscache_acquire_cookie(afs_cache_netfs.primary_index, | 364 | fscache_acquire_cookie(afs_cache_netfs.primary_index, |
| 359 | &afs_cell_cache_index_def, | 365 | &afs_cell_cache_index_def, |
| 360 | cell); | 366 | cell, true); |
| 361 | 367 | ||
| 362 | Then when a volume location was accessed, it would be entered into the cell's | 368 | Then when a volume location was accessed, it would be entered into the cell's |
| 363 | index and an inode would be allocated that acts as a volume type and hash chain | 369 | index and an inode would be allocated that acts as a volume type and hash chain |
| @@ -366,7 +372,7 @@ combination: · 2 unmodified lines | |||
| 366 | vlocation->cache = | 372 | vlocation->cache = |
| 367 | fscache_acquire_cookie(cell->cache, | 373 | fscache_acquire_cookie(cell->cache, |
| 368 | &afs_vlocation_cache_index_def, | 374 | &afs_vlocation_cache_index_def, |
| 369 | vlocation); | 375 | vlocation, true); |
| 370 | 376 | ||
| 371 | And then a particular flavour of volume (R/O for example) could be added to | 377 | And then a particular flavour of volume (R/O for example) could be added to |
| 372 | that index, creating another index for vnodes (AFS inode equivalents): | 378 | that index, creating another index for vnodes (AFS inode equivalents): |
| @@ -374,7 +380,7 @@ that index, creating another index for vnodes (AFS inode equivalents): · 1 unmodified line | |||
| 374 | volume->cache = | 380 | volume->cache = |
| 375 | fscache_acquire_cookie(vlocation->cache, | 381 | fscache_acquire_cookie(vlocation->cache, |
| 376 | &afs_volume_cache_index_def, | 382 | &afs_volume_cache_index_def, |
| 377 | volume); | 383 | volume, true); |
| 378 | 384 | ||
| 379 | 385 | ||
| 380 | ====================== | 386 | ====================== |
| @@ -388,7 +394,7 @@ the object definition should be something other than index type. · 7 unmodified lines | |||
| 388 | vnode->cache = | 394 | vnode->cache = |
| 389 | fscache_acquire_cookie(volume->cache, | 395 | fscache_acquire_cookie(volume->cache, |
| 390 | &afs_vnode_cache_object_def, | 396 | &afs_vnode_cache_object_def, |
| 391 | vnode); | 397 | vnode, true); |
| 392 | 398 | ||
| 393 | 399 | ||
| 394 | ================================= | 400 | ================================= |
| @@ -404,7 +410,7 @@ it would be some other type of object such as a data file. · 9 unmodified lines | |||
| 404 | xattr->cache = | 410 | xattr->cache = |
| 405 | fscache_acquire_cookie(vnode->cache, | 411 | fscache_acquire_cookie(vnode->cache, |
| 406 | &afs_xattr_cache_object_def, | 412 | &afs_xattr_cache_object_def, |
| 407 | xattr); | 413 | xattr, true); |
| 408 | 414 | ||
| 409 | Miscellaneous objects might be used to store extended attributes or directory | 415 | Miscellaneous objects might be used to store extended attributes or directory |
| 410 | entries for example. | 416 | entries for example. |
| @@ -733,6 +739,47 @@ Note that partial updates may happen automatically at other times, such as when · 322 unmodified lines | |||
| 733 | data blocks are added to a data file object. | 739 | data blocks are added to a data file object. |
| 734 | 740 | ||
| 735 | 741 | ||
| 742 | ================= | ||
| 743 | COOKIE ENABLEMENT | ||
| 744 | ================= | ||
| 745 | |||
| 746 | Cookies exist in one of two states: enabled and disabled. If a cookie is | ||
| 747 | disabled, it ignores all attempts to acquire child cookies; check, update or | ||
| 748 | invalidate its state; allocate, read or write backing pages - though it is | ||
| 749 | still possible to uncache pages and relinquish the cookie. | ||
| 750 | |||
| 751 | The initial enablement state is set by fscache_acquire_cookie(), but the cookie | ||
| 752 | can be enabled or disabled later. To disable a cookie, call: | ||
| 753 | |||
| 754 | void fscache_disable_cookie(struct fscache_cookie *cookie, | ||
| 755 | bool invalidate); | ||
| 756 | |||
| 757 | If the cookie is not already disabled, this locks the cookie against other | ||
| 758 | enable and disable ops, marks the cookie as being disabled, discards or | ||
| 759 | invalidates any backing objects and waits for cessation of activity on any | ||
| 760 | associated object before unlocking the cookie. | ||
| 761 | |||
| 762 | All possible failures are handled internally. The caller should consider | ||
| 763 | calling fscache_uncache_all_inode_pages() afterwards to make sure all page | ||
| 764 | markings are cleared up. | ||
| 765 | |||
| 766 | Cookies can be enabled or reenabled with: | ||
| 767 | |||
| 768 | void fscache_enable_cookie(struct fscache_cookie *cookie, | ||
| 769 | bool (*can_enable)(void *data), | ||
| 770 | void *data) | ||
| 771 | |||
| 772 | If the cookie is not already enabled, this locks the cookie against other | ||
| 773 | enable and disable ops, invokes can_enable() and, if the cookie is not an index | ||
| 774 | cookie, will begin the procedure of acquiring backing objects. | ||
| 775 | |||
| 776 | The optional can_enable() function is passed the data argument and returns a | ||
| 777 | ruling as to whether or not enablement should actually be permitted to begin. | ||
| 778 | |||
| 779 | All possible failures are handled internally. The cookie will only be marked | ||
| 780 | as enabled if provisional backing objects are allocated. | ||
| 781 | |||
| 782 | |||
| 736 | =============================== | 783 | =============================== |
| 737 | MISCELLANEOUS COOKIE OPERATIONS | 784 | MISCELLANEOUS COOKIE OPERATIONS |
| 738 | =============================== | 785 | =============================== |
| @@ -778,7 +825,7 @@ COOKIE UNREGISTRATION · 39 unmodified lines | |||
| 778 | To get rid of a cookie, this function should be called. | 825 | To get rid of a cookie, this function should be called. |
| 779 | 826 | ||
| 780 | void fscache_relinquish_cookie(struct fscache_cookie *cookie, | 827 | void fscache_relinquish_cookie(struct fscache_cookie *cookie, |
| 781 | int retire); | 828 | bool retire); |
| 782 | 829 | ||
| 783 | If retire is non-zero, then the object will be marked for recycling, and all | 830 | If retire is non-zero, then the object will be marked for recycling, and all |
| 784 | copies of it will be removed from all active caches in which it is present. | 831 | copies of it will be removed from all active caches in which it is present. |
| @@ -2,6 +2,10 @@ · 1 unmodified line | |||
| 2 | kinds of locks - per-inode (->i_mutex) and per-filesystem | 2 | kinds of locks - per-inode (->i_mutex) and per-filesystem |
| 3 | (->s_vfs_rename_mutex). | 3 | (->s_vfs_rename_mutex). |
| 4 | 4 | ||
| 5 | When taking the i_mutex on multiple non-directory objects, we | ||
| 6 | always acquire the locks in order by increasing address. We'll call | ||
| 7 | that "inode pointer" order in the following. | ||
| 8 | |||
| 5 | For our purposes all operations fall in 5 classes: | 9 | For our purposes all operations fall in 5 classes: |
| 6 | 10 | ||
| 7 | 1) read access. Locking rules: caller locks directory we are accessing. | 11 | 1) read access. Locking rules: caller locks directory we are accessing. |
| @@ -12,8 +16,9 @@ kinds of locks - per-inode (->i_mutex) and per-filesystem · 4 unmodified lines | |||
| 12 | locks victim and calls the method. | 16 | locks victim and calls the method. |
| 13 | 17 | ||
| 14 | 4) rename() that is _not_ cross-directory. Locking rules: caller locks | 18 | 4) rename() that is _not_ cross-directory. Locking rules: caller locks |
| 15 | the parent, finds source and target, if target already exists - locks it | 19 | the parent and finds source and target. If target already exists, lock |
| 16 | and then calls the method. | 20 | it. If source is a non-directory, lock it. If that means we need to |
| 21 | lock both, lock them in inode pointer order. | ||
| 17 | 22 | ||
| 18 | 5) link creation. Locking rules: | 23 | 5) link creation. Locking rules: |
| 19 | * lock parent | 24 | * lock parent |
| @@ -30,7 +35,9 @@ rules: · 10 unmodified lines | |||
| 30 | fail with -ENOTEMPTY | 35 | fail with -ENOTEMPTY |
| 31 | * if new parent is equal to or is a descendent of source | 36 | * if new parent is equal to or is a descendent of source |
| 32 | fail with -ELOOP | 37 | fail with -ELOOP |
| 33 | * if target exists - lock it. | 38 | * If target exists, lock it. If source is a non-directory, lock |
| 39 | it. In case that means we need to lock both source and target, | ||
| 40 | do so in inode pointer order. | ||
| 34 | * call the method. | 41 | * call the method. |
| 35 | 42 | ||
| 36 | 43 | ||
| @@ -56,9 +63,11 @@ objects - A < B iff A is an ancestor of B. · 19 unmodified lines | |||
| 56 | renames will be blocked on filesystem lock and we don't start changing | 63 | renames will be blocked on filesystem lock and we don't start changing |
| 57 | the order until we had acquired all locks). | 64 | the order until we had acquired all locks). |
| 58 | 65 | ||
| 59 | (3) any operation holds at most one lock on non-directory object and | 66 | (3) locks on non-directory objects are acquired only after locks on |
| 60 | that lock is acquired after all other locks. (Proof: see descriptions | 67 | directory objects, and are acquired in inode pointer order. |
| 61 | of operations). | 68 | (Proof: all operations but renames take lock on at most one |
| 69 | non-directory object, except renames, which take locks on source and | ||
| 70 | target in inode pointer order in the case they are not directories.) | ||
| 62 | 71 | ||
| 63 | Now consider the minimal deadlock. Each process is blocked on | 72 | Now consider the minimal deadlock. Each process is blocked on |
| 64 | attempt to acquire some lock and already holds at least one lock. Let's | 73 | attempt to acquire some lock and already holds at least one lock. Let's |
| @@ -66,9 +75,13 @@ consider the set of contended locks. First of all, filesystem lock is · 1 unmodified line | |||
| 66 | not contended, since any process blocked on it is not holding any locks. | 75 | not contended, since any process blocked on it is not holding any locks. |
| 67 | Thus all processes are blocked on ->i_mutex. | 76 | Thus all processes are blocked on ->i_mutex. |
| 68 | 77 | ||
| 69 | Non-directory objects are not contended due to (3). Thus link | 78 | By (3), any process holding a non-directory lock can only be |
| 70 | creation can't be a part of deadlock - it can't be blocked on source | 79 | waiting on another non-directory lock with a larger address. Therefore |
| 71 | and it means that it doesn't hold any locks. | 80 | the process holding the "largest" such lock can always make progress, and |
| 81 | non-directory objects are not included in the set of contended locks. | ||
| 82 | |||
| 83 | Thus link creation can't be a part of deadlock - it can't be | ||
| 84 | blocked on source and it means that it doesn't hold any locks. | ||
| 72 | 85 | ||
| 73 | Any contended object is either held by cross-directory rename or | 86 | Any contended object is either held by cross-directory rename or |
| 74 | has a child that is also contended. Indeed, suppose that it is held by | 87 | has a child that is also contended. Indeed, suppose that it is held by |
| @@ -119,6 +119,7 @@ active_logs=%u Support configuring the number of active logs. In the · 118 unmodified lines | |||
| 119 | Default number is 6. | 119 | Default number is 6. |
| 120 | disable_ext_identify Disable the extension list configured by mkfs, so f2fs | 120 | disable_ext_identify Disable the extension list configured by mkfs, so f2fs |
| 121 | does not aware of cold files such as media files. | 121 | does not aware of cold files such as media files. |
| 122 | inline_xattr Enable the inline xattrs feature. | ||
| 122 | 123 | ||
| 123 | ================================================================================ | 124 | ================================================================================ |
| 124 | DEBUGFS ENTRIES | 125 | DEBUGFS ENTRIES |
| @@ -164,6 +165,12 @@ Files in /sys/fs/f2fs/<devname> · 39 unmodified lines | |||
| 164 | gc_idle = 1 will select the Cost Benefit approach | 165 | gc_idle = 1 will select the Cost Benefit approach |
| 165 | & setting gc_idle = 2 will select the greedy aproach. | 166 | & setting gc_idle = 2 will select the greedy aproach. |
| 166 | 167 | ||
| 168 | reclaim_segments This parameter controls the number of prefree | ||
| 169 | segments to be reclaimed. If the number of prefree | ||
| 170 | segments is larger than this number, f2fs tries to | ||
| 171 | conduct checkpoint to reclaim the prefree segments | ||
| 172 | to free segments. By default, 100 segments, 200MB. | ||
| 173 | |||
| 167 | ================================================================================ | 174 | ================================================================================ |
| 168 | USAGE | 175 | USAGE |
| 169 | ================================================================================ | 176 | ================================================================================ |
| @@ -455,3 +455,11 @@ in your dentry operations instead. · 454 unmodified lines | |||
| 455 | vfs_follow_link has been removed. Filesystems must use nd_set_link | 455 | vfs_follow_link has been removed. Filesystems must use nd_set_link |
| 456 | from ->follow_link for normal symlinks, or nd_jump_link for magic | 456 | from ->follow_link for normal symlinks, or nd_jump_link for magic |
| 457 | /proc/<pid> style links. | 457 | /proc/<pid> style links. |
| 458 | -- | ||
| 459 | [mandatory] | ||
| 460 | iget5_locked()/ilookup5()/ilookup5_nowait() test() callback used to be | ||
| 461 | called with both ->i_lock and inode_hash_lock held; the former is *not* | ||
| 462 | taken anymore, so verify that your callbacks do not rely on it (none | ||
| 463 | of the in-tree instances did). inode_hash_lock is still held, | ||
| 464 | of course, so they are still serialized wrt removal from inode hash, | ||
| 465 | as well as wrt set() callback of iget5_locked(). | ||
| @@ -460,6 +460,7 @@ manner. The codes are the following: · 459 unmodified lines | |||
| 460 | nl - non-linear mapping | 460 | nl - non-linear mapping |
| 461 | ar - architecture specific flag | 461 | ar - architecture specific flag |
| 462 | dd - do not include area into core dump | 462 | dd - do not include area into core dump |
| 463 | sd - soft-dirty flag | ||
| 463 | mm - mixed map area | 464 | mm - mixed map area |
| 464 | hg - huge page advise flag | 465 | hg - huge page advise flag |
| 465 | nh - no-huge page advise flag | 466 | nh - no-huge page advise flag |
| @@ -307,7 +307,7 @@ the following: · 306 unmodified lines | |||
| 307 | 307 | ||
| 308 | <proceeding files...> | 308 | <proceeding files...> |
| 309 | <slot #3, id = 0x43, characters = "h is long"> | 309 | <slot #3, id = 0x43, characters = "h is long"> |
| 310 | <slot #2, id = 0x02, characters = "xtension which"> | 310 | <slot #2, id = 0x02, characters = "xtension whic"> |
| 311 | <slot #1, id = 0x01, characters = "My Big File.E"> | 311 | <slot #1, id = 0x01, characters = "My Big File.E"> |
| 312 | <directory entry, name = "MYBIGFIL.EXT"> | 312 | <directory entry, name = "MYBIGFIL.EXT"> |
| 313 | 313 | ||
| @@ -359,11 +359,9 @@ struct inode_operations { · 358 unmodified lines | |||
| 359 | ssize_t (*listxattr) (struct dentry *, char *, size_t); | 359 | ssize_t (*listxattr) (struct dentry *, char *, size_t); |
| 360 | int (*removexattr) (struct dentry *, const char *); | 360 | int (*removexattr) (struct dentry *, const char *); |
| 361 | void (*update_time)(struct inode *, struct timespec *, int); | 361 | void (*update_time)(struct inode *, struct timespec *, int); |
| 362 | int (*atomic_open)(struct inode *, struct dentry *, | 362 | int (*atomic_open)(struct inode *, struct dentry *, struct file *, |
| 363 | unsigned open_flag, umode_t create_mode, int *opened); | ||
| 363 | int (*tmpfile) (struct inode *, struct dentry *, umode_t); | 364 | int (*tmpfile) (struct inode *, struct dentry *, umode_t); |
| 364 | } ____cacheline_aligned; | ||
| 365 | struct file *, unsigned open_flag, | ||
| 366 | umode_t create_mode, int *opened); | ||
| 367 | }; | 365 | }; |
| 368 | 366 | ||
| 369 | Again, all methods are called without any locks being held, unless | 367 | Again, all methods are called without any locks being held, unless |
| @@ -470,9 +468,11 @@ otherwise noted. · 100 unmodified lines | |||
| 470 | method the filesystem can look up, possibly create and open the file in | 468 | method the filesystem can look up, possibly create and open the file in |
| 471 | one atomic operation. If it cannot perform this (e.g. the file type | 469 | one atomic operation. If it cannot perform this (e.g. the file type |
| 472 | turned out to be wrong) it may signal this by returning 1 instead of | 470 | turned out to be wrong) it may signal this by returning 1 instead of |
| 473 | usual 0 or -ve . This method is only called if the last | 471 | usual 0 or -ve . This method is only called if the last component is |
| 474 | component is negative or needs lookup. Cached positive dentries are | 472 | negative or needs lookup. Cached positive dentries are still handled by |
| 475 | still handled by f_op->open(). | 473 | f_op->open(). If the file was created, the FILE_CREATED flag should be |
| 474 | set in "opened". In case of O_EXCL the method must only succeed if the | ||
| 475 | file didn't exist and hence FILE_CREATED shall always be set on success. | ||
| 476 | 476 | ||
| 477 | tmpfile: called in the end of O_TMPFILE open(). Optional, equivalent to | 477 | tmpfile: called in the end of O_TMPFILE open(). Optional, equivalent to |
| 478 | atomically creating, opening and unlinking a file in given directory. | 478 | atomically creating, opening and unlinking a file in given directory. |
| @@ -50,6 +50,10 @@ Configure the kernel with: · 49 unmodified lines | |||
| 50 | CONFIG_DEBUG_FS=y | 50 | CONFIG_DEBUG_FS=y |
| 51 | CONFIG_GCOV_KERNEL=y | 51 | CONFIG_GCOV_KERNEL=y |
| 52 | 52 | ||
| 53 | select the gcc's gcov format, default is autodetect based on gcc version: | ||
| 54 | |||
| 55 | CONFIG_GCOV_FORMAT_AUTODETECT=y | ||
| 56 | |||
| 53 | and to get coverage data for the entire kernel: | 57 | and to get coverage data for the entire kernel: |
| 54 | 58 | ||
| 55 | CONFIG_GCOV_PROFILE_ALL=y | 59 | CONFIG_GCOV_PROFILE_ALL=y |
| @@ -8,6 +8,11 @@ Supported chips: · 7 unmodified lines | |||
| 8 | Datasheets: | 8 | Datasheets: |
| 9 | http://www.ti.com/lit/gpn/lm25056 | 9 | http://www.ti.com/lit/gpn/lm25056 |
| 10 | http://www.ti.com/lit/gpn/lm25056a | 10 | http://www.ti.com/lit/gpn/lm25056a |
| 11 | * TI LM25063 | ||
| 12 | Prefix: 'lm25063' | ||
| 13 | Addresses scanned: - | ||
| 14 | Datasheet: | ||
| 15 | To be announced | ||
| 11 | * National Semiconductor LM25066 | 16 | * National Semiconductor LM25066 |
| 12 | Prefix: 'lm25066' | 17 | Prefix: 'lm25066' |
| 13 | Addresses scanned: - | 18 | Addresses scanned: - |
| @@ -32,7 +37,7 @@ Description · 18 unmodified lines | |||
| 32 | ----------- | 37 | ----------- |
| 33 | 38 | ||
| 34 | This driver supports hardware montoring for National Semiconductor / TI LM25056, | 39 | This driver supports hardware montoring for National Semiconductor / TI LM25056, |
| 35 | LM25066, LM5064, and LM5064 Power Management, Monitoring, Control, and | 40 | LM25063, LM25066, LM5064, and LM5066 Power Management, Monitoring, Control, and |
| 36 | Protection ICs. | 41 | Protection ICs. |
| 37 | 42 | ||
| 38 | The driver is a client driver to the core PMBus driver. Please see | 43 | The driver is a client driver to the core PMBus driver. Please see |
| @@ -64,8 +69,12 @@ in1_input Measured input voltage. · 25 unmodified lines | |||
| 64 | in1_average Average measured input voltage. | 69 | in1_average Average measured input voltage. |
| 65 | in1_min Minimum input voltage. | 70 | in1_min Minimum input voltage. |
| 66 | in1_max Maximum input voltage. | 71 | in1_max Maximum input voltage. |
| 72 | in1_crit Critical high input voltage (LM25063 only). | ||
| 73 | in1_lcrit Critical low input voltage (LM25063 only). | ||
| 67 | in1_min_alarm Input voltage low alarm. | 74 | in1_min_alarm Input voltage low alarm. |
| 68 | in1_max_alarm Input voltage high alarm. | 75 | in1_max_alarm Input voltage high alarm. |
| 76 | in1_lcrit_alarm Input voltage critical low alarm (LM25063 only). | ||
| 77 | in1_crit_alarm Input voltage critical high alarm. (LM25063 only). | ||
| 69 | 78 | ||
| 70 | in2_label "vmon" | 79 | in2_label "vmon" |
| 71 | in2_input Measured voltage on VAUX pin | 80 | in2_input Measured voltage on VAUX pin |
| @@ -80,12 +89,16 @@ in3_input Measured output voltage. · 8 unmodified lines | |||
| 80 | in3_average Average measured output voltage. | 89 | in3_average Average measured output voltage. |
| 81 | in3_min Minimum output voltage. | 90 | in3_min Minimum output voltage. |
| 82 | in3_min_alarm Output voltage low alarm. | 91 | in3_min_alarm Output voltage low alarm. |
| 92 | in3_highest Historical minimum output voltage (LM25063 only). | ||
| 93 | in3_lowest Historical maximum output voltage (LM25063 only). | ||
| 83 | 94 | ||
| 84 | curr1_label "iin" | 95 | curr1_label "iin" |
| 85 | curr1_input Measured input current. | 96 | curr1_input Measured input current. |
| 86 | curr1_average Average measured input current. | 97 | curr1_average Average measured input current. |
| 87 | curr1_max Maximum input current. | 98 | curr1_max Maximum input current. |
| 99 | curr1_crit Critical input current (LM25063 only). | ||
| 88 | curr1_max_alarm Input current high alarm. | 100 | curr1_max_alarm Input current high alarm. |
| 101 | curr1_crit_alarm Input current critical high alarm (LM25063 only). | ||
| 89 | 102 | ||
| 90 | power1_label "pin" | 103 | power1_label "pin" |
| 91 | power1_input Measured input power. | 104 | power1_input Measured input power. |
| @@ -95,6 +108,11 @@ power1_alarm Input power alarm · 3 unmodified lines | |||
| 95 | power1_input_highest Historical maximum power. | 108 | power1_input_highest Historical maximum power. |
| 96 | power1_reset_history Write any value to reset maximum power history. | 109 | power1_reset_history Write any value to reset maximum power history. |
| 97 | 110 | ||
| 111 | power2_label "pout". LM25063 only. | ||
| 112 | power2_input Measured output power. | ||
| 113 | power2_max Maximum output power limit. | ||
| 114 | power2_crit Critical output power limit. | ||
| 115 | |||
| 98 | temp1_input Measured temperature. | 116 | temp1_input Measured temperature. |
| 99 | temp1_max Maximum temperature. | 117 | temp1_max Maximum temperature. |
| 100 | temp1_crit Critical high temperature. | 118 | temp1_crit Critical high temperature. |
| @@ -122,6 +122,12 @@ Supported chips: · 121 unmodified lines | |||
| 122 | Prefix: 'g781' | 122 | Prefix: 'g781' |
| 123 | Addresses scanned: I2C 0x4c, 0x4d | 123 | Addresses scanned: I2C 0x4c, 0x4d |
| 124 | Datasheet: Not publicly available from GMT | 124 | Datasheet: Not publicly available from GMT |
| 125 | * Texas Instruments TMP451 | ||
| 126 | Prefix: 'tmp451' | ||
| 127 | Addresses scanned: I2C 0x4c | ||
| 128 | Datasheet: Publicly available at TI website | ||
| 129 | http://www.ti.com/litv/pdf/sbos686 | ||
| 130 | |||
| 125 | 131 | ||
| 126 | Author: Jean Delvare <khali@linux-fr.org> | 132 | Author: Jean Delvare <khali@linux-fr.org> |
| 127 | 133 | ||
| @@ -6,10 +6,15 @@ Supported chips: · 5 unmodified lines | |||
| 6 | Prefix: 'ltc2974' | 6 | Prefix: 'ltc2974' |
| 7 | Addresses scanned: - | 7 | Addresses scanned: - |
| 8 | Datasheet: http://www.linear.com/product/ltc2974 | 8 | Datasheet: http://www.linear.com/product/ltc2974 |
| 9 | * Linear Technology LTC2978 | 9 | * Linear Technology LTC2977 |
| 10 | Prefix: 'ltc2977' | ||
| 11 | Addresses scanned: - | ||
| 12 | Datasheet: http://www.linear.com/product/ltc2977 | ||
| 13 | * Linear Technology LTC2978, LTC2978A | ||
| 10 | Prefix: 'ltc2978' | 14 | Prefix: 'ltc2978' |
| 11 | Addresses scanned: - | 15 | Addresses scanned: - |
| 12 | Datasheet: http://www.linear.com/product/ltc2978 | 16 | Datasheet: http://www.linear.com/product/ltc2978 |
| 17 | http://www.linear.com/product/ltc2978a | ||
| 13 | * Linear Technology LTC3880 | 18 | * Linear Technology LTC3880 |
| 14 | Prefix: 'ltc3880' | 19 | Prefix: 'ltc3880' |
| 15 | Addresses scanned: - | 20 | Addresses scanned: - |
| @@ -26,8 +31,9 @@ Description · 10 unmodified lines | |||
| 26 | ----------- | 31 | ----------- |
| 27 | 32 | ||
| 28 | LTC2974 is a quad digital power supply manager. LTC2978 is an octal power supply | 33 | LTC2974 is a quad digital power supply manager. LTC2978 is an octal power supply |
| 29 | monitor. LTC3880 is a dual output poly-phase step-down DC/DC controller. LTC3883 | 34 | monitor. LTC2977 is a pin compatible replacement for LTC2978. LTC3880 is a dual |
| 30 | is a single phase step-down DC/DC controller. | 35 | output poly-phase step-down DC/DC controller. LTC3883 is a single phase |
| 36 | step-down DC/DC controller. | ||
| 31 | 37 | ||
| 32 | 38 | ||
| 33 | Usage Notes | 39 | Usage Notes |
| @@ -49,21 +55,25 @@ Sysfs attributes · 15 unmodified lines | |||
| 49 | in1_label "vin" | 55 | in1_label "vin" |
| 50 | in1_input Measured input voltage. | 56 | in1_input Measured input voltage. |
| 51 | in1_min Minimum input voltage. | 57 | in1_min Minimum input voltage. |
| 52 | in1_max Maximum input voltage. LTC2974 and LTC2978 only. | 58 | in1_max Maximum input voltage. |
| 53 | in1_lcrit Critical minimum input voltage. LTC2974 and LTC2978 | 59 | LTC2974, LTC2977, and LTC2978 only. |
| 54 | only. | 60 | in1_lcrit Critical minimum input voltage. |
| 61 | LTC2974, LTC2977, and LTC2978 only. | ||
| 55 | in1_crit Critical maximum input voltage. | 62 | in1_crit Critical maximum input voltage. |
| 56 | in1_min_alarm Input voltage low alarm. | 63 | in1_min_alarm Input voltage low alarm. |
| 57 | in1_max_alarm Input voltage high alarm. LTC2974 and LTC2978 only. | 64 | in1_max_alarm Input voltage high alarm. |
| 58 | in1_lcrit_alarm Input voltage critical low alarm. LTC2974 and LTC2978 | 65 | LTC2974, LTC2977, and LTC2978 only. |
| 59 | only. | 66 | in1_lcrit_alarm Input voltage critical low alarm. |
| 67 | LTC2974, LTC2977, and LTC2978 only. | ||
| 60 | in1_crit_alarm Input voltage critical high alarm. | 68 | in1_crit_alarm Input voltage critical high alarm. |
| 61 | in1_lowest Lowest input voltage. LTC2974 and LTC2978 only. | 69 | in1_lowest Lowest input voltage. |
| 70 | LTC2974, LTC2977, and LTC2978 only. | ||
| 62 | in1_highest Highest input voltage. | 71 | in1_highest Highest input voltage. |
| 63 | in1_reset_history Reset input voltage history. | 72 | in1_reset_history Reset input voltage history. |
| 64 | 73 | ||
| 65 | in[N]_label "vout[1-8]". | 74 | in[N]_label "vout[1-8]". |
| 66 | LTC2974: N=2-5 | 75 | LTC2974: N=2-5 |
| 76 | LTC2977: N=2-9 | ||
| 67 | LTC2978: N=2-9 | 77 | LTC2978: N=2-9 |
| 68 | LTC3880: N=2-3 | 78 | LTC3880: N=2-3 |
| 69 | LTC3883: N=2 | 79 | LTC3883: N=2 |
| @@ -83,21 +93,23 @@ in[N]_reset_history Reset output voltage history. · 13 unmodified lines | |||
| 83 | temp[N]_input Measured temperature. | 93 | temp[N]_input Measured temperature. |
| 84 | On LTC2974, temp[1-4] report external temperatures, | 94 | On LTC2974, temp[1-4] report external temperatures, |
| 85 | and temp5 reports the chip temperature. | 95 | and temp5 reports the chip temperature. |
| 86 | On LTC2978, only one temperature measurement is | 96 | On LTC2977 and LTC2978, only one temperature measurement |
| 87 | supported and reports the chip temperature. | 97 | is supported and reports the chip temperature. |
| 88 | On LTC3880, temp1 and temp2 report external | 98 | On LTC3880, temp1 and temp2 report external |
| 89 | temperatures, and temp3 reports the chip temperature. | 99 | temperatures, and temp3 reports the chip temperature. |
| 90 | On LTC3883, temp1 reports an external temperature, | 100 | On LTC3883, temp1 reports an external temperature, |
| 91 | and temp2 reports the chip temperature. | 101 | and temp2 reports the chip temperature. |
| 92 | temp[N]_min Mimimum temperature. LTC2974 and LTC2978 only. | 102 | temp[N]_min Mimimum temperature. LTC2974, LCT2977, and LTC2978 only. |
| 93 | temp[N]_max Maximum temperature. | 103 | temp[N]_max Maximum temperature. |
| 94 | temp[N]_lcrit Critical low temperature. | 104 | temp[N]_lcrit Critical low temperature. |
| 95 | temp[N]_crit Critical high temperature. | 105 | temp[N]_crit Critical high temperature. |
| 96 | temp[N]_min_alarm Temperature low alarm. LTC2974 and LTC2978 only. | 106 | temp[N]_min_alarm Temperature low alarm. |
| 107 | LTC2974, LTC2977, and LTC2978 only. | ||
| 97 | temp[N]_max_alarm Temperature high alarm. | 108 | temp[N]_max_alarm Temperature high alarm. |
| 98 | temp[N]_lcrit_alarm Temperature critical low alarm. | 109 | temp[N]_lcrit_alarm Temperature critical low alarm. |
| 99 | temp[N]_crit_alarm Temperature critical high alarm. | 110 | temp[N]_crit_alarm Temperature critical high alarm. |
| 100 | temp[N]_lowest Lowest measured temperature. LTC2974 and LTC2978 only. | 111 | temp[N]_lowest Lowest measured temperature. |
| 112 | LTC2974, LTC2977, and LTC2978 only. | ||
| 101 | Not supported for chip temperature sensor on LTC2974. | 113 | Not supported for chip temperature sensor on LTC2974. |
| 102 | temp[N]_highest Highest measured temperature. Not supported for chip | 114 | temp[N]_highest Highest measured temperature. Not supported for chip |
| 103 | temperature sensor on LTC2974. | 115 | temperature sensor on LTC2974. |
| @@ -109,6 +121,7 @@ power1_input Measured input power. · 5 unmodified lines | |||
| 109 | 121 | ||
| 110 | power[N]_label "pout[1-4]". | 122 | power[N]_label "pout[1-4]". |
| 111 | LTC2974: N=1-4 | 123 | LTC2974: N=1-4 |
| 124 | LTC2977: Not supported | ||
| 112 | LTC2978: Not supported | 125 | LTC2978: Not supported |
| 113 | LTC3880: N=1-2 | 126 | LTC3880: N=1-2 |
| 114 | LTC3883: N=2 | 127 | LTC3883: N=2 |
| @@ -123,6 +136,7 @@ curr1_reset_history Reset input current history. LTC3883 only. · 8 unmodified lines | |||
| 123 | 136 | ||
| 124 | curr[N]_label "iout[1-4]". | 137 | curr[N]_label "iout[1-4]". |
| 125 | LTC2974: N=1-4 | 138 | LTC2974: N=1-4 |
| 139 | LTC2977: not supported | ||
| 126 | LTC2978: not supported | 140 | LTC2978: not supported |
| 127 | LTC3880: N=2-3 | 141 | LTC3880: N=2-3 |
| 128 | LTC3883: N=2 | 142 | LTC3883: N=2 |
| @@ -25,6 +25,7 @@ Supported adapters: · 24 unmodified lines | |||
| 25 | * Intel Avoton (SOC) | 25 | * Intel Avoton (SOC) |
| 26 | * Intel Wellsburg (PCH) | 26 | * Intel Wellsburg (PCH) |
| 27 | * Intel Coleto Creek (PCH) | 27 | * Intel Coleto Creek (PCH) |
| 28 | * Intel Wildcat Point-LP (PCH) | ||
| 28 | Datasheets: Publicly available at the Intel website | 29 | Datasheets: Publicly available at the Intel website |
| 29 | 30 | ||
| 30 | On Intel Patsburg and later chipsets, both the normal host SMBus controller | 31 | On Intel Patsburg and later chipsets, both the normal host SMBus controller |
| @@ -122,12 +122,14 @@ D-Pad: · 121 unmodified lines | |||
| 122 | BTN_DPAD_* | 122 | BTN_DPAD_* |
| 123 | Analog buttons are reported as: | 123 | Analog buttons are reported as: |
| 124 | ABS_HAT0X and ABS_HAT0Y | 124 | ABS_HAT0X and ABS_HAT0Y |
| 125 | (for ABS values negative is left/up, positive is right/down) | ||
| 125 | 126 | ||
| 126 | Analog-Sticks: | 127 | Analog-Sticks: |
| 127 | The left analog-stick is reported as ABS_X, ABS_Y. The right analog stick is | 128 | The left analog-stick is reported as ABS_X, ABS_Y. The right analog stick is |
| 128 | reported as ABS_RX, ABS_RY. Zero, one or two sticks may be present. | 129 | reported as ABS_RX, ABS_RY. Zero, one or two sticks may be present. |
| 129 | If analog-sticks provide digital buttons, they are mapped accordingly as | 130 | If analog-sticks provide digital buttons, they are mapped accordingly as |
| 130 | BTN_THUMBL (first/left) and BTN_THUMBR (second/right). | 131 | BTN_THUMBL (first/left) and BTN_THUMBR (second/right). |
| 132 | (for ABS values negative is left/up, positive is right/down) | ||
| 131 | 133 | ||
| 132 | Triggers: | 134 | Triggers: |
| 133 | Trigger buttons can be available as digital or analog buttons or both. User- | 135 | Trigger buttons can be available as digital or analog buttons or both. User- |
| @@ -138,6 +140,7 @@ Triggers: · 4 unmodified lines | |||
| 138 | ABS_HAT2X (right/ZR) and BTN_TL2 or ABS_HAT2Y (left/ZL). | 140 | ABS_HAT2X (right/ZR) and BTN_TL2 or ABS_HAT2Y (left/ZL). |
| 139 | If only one trigger-button combination is present (upper+lower), they are | 141 | If only one trigger-button combination is present (upper+lower), they are |
| 140 | reported as "right" triggers (BTN_TR/ABS_HAT1X). | 142 | reported as "right" triggers (BTN_TR/ABS_HAT1X). |
| 143 | (ABS trigger values start at 0, pressure is reported as positive values) | ||
| 141 | 144 | ||
| 142 | Menu-Pad: | 145 | Menu-Pad: |
| 143 | Menu buttons are always digital and are mapped according to their location | 146 | Menu buttons are always digital and are mapped according to their location |
| @@ -138,6 +138,7 @@ Code Seq#(hex) Include File Comments · 137 unmodified lines | |||
| 138 | 'H' C0-DF net/bluetooth/cmtp/cmtp.h conflict! | 138 | 'H' C0-DF net/bluetooth/cmtp/cmtp.h conflict! |
| 139 | 'H' C0-DF net/bluetooth/bnep/bnep.h conflict! | 139 | 'H' C0-DF net/bluetooth/bnep/bnep.h conflict! |
| 140 | 'H' F1 linux/hid-roccat.h <mailto:erazor_de@users.sourceforge.net> | 140 | 'H' F1 linux/hid-roccat.h <mailto:erazor_de@users.sourceforge.net> |
| 141 | 'H' F8-FA sound/firewire.h | ||
| 141 | 'I' all linux/isdn.h conflict! | 142 | 'I' all linux/isdn.h conflict! |
| 142 | 'I' 00-0F drivers/isdn/divert/isdn_divert.h conflict! | 143 | 'I' 00-0F drivers/isdn/divert/isdn_divert.h conflict! |
| 143 | 'I' 40-4F linux/mISDNif.h conflict! | 144 | 'I' 40-4F linux/mISDNif.h conflict! |
| @@ -20,16 +20,9 @@ symbols have been introduced. · 19 unmodified lines | |||
| 20 | To see a list of new config symbols when using "make oldconfig", use | 20 | To see a list of new config symbols when using "make oldconfig", use |
| 21 | 21 | ||
| 22 | cp user/some/old.config .config | 22 | cp user/some/old.config .config |
| 23 | yes "" | make oldconfig >conf.new | 23 | make listnewconfig |
| 24 | 24 | ||
| 25 | and the config program will list as (NEW) any new symbols that have | 25 | and the config program will list any new symbols, one per line. |
| 26 | unknown values. Of course, the .config file is also updated with | ||
| 27 | new (default) values, so you can use: | ||
| 28 | |||
| 29 | grep "(NEW)" conf.new | ||
| 30 | |||
| 31 | to see the new config symbols or you can use diffconfig to see the | ||
| 32 | differences between the previous and new .config files: | ||
| 33 | 26 | ||
| 34 | scripts/diffconfig .config.old .config | less | 27 | scripts/diffconfig .config.old .config | less |
| 35 | 28 | ||
| @@ -480,6 +480,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 479 unmodified lines | |||
| 480 | Format: <io>,<irq>,<mode> | 480 | Format: <io>,<irq>,<mode> |
| 481 | See header of drivers/net/hamradio/baycom_ser_hdx.c. | 481 | See header of drivers/net/hamradio/baycom_ser_hdx.c. |
| 482 | 482 | ||
| 483 | blkdevparts= Manual partition parsing of block device(s) for | ||
| 484 | embedded devices based on command line input. | ||
| 485 | See Documentation/block/cmdline-partition.txt | ||
| 486 | |||
| 483 | boot_delay= Milliseconds to delay each printk during boot. | 487 | boot_delay= Milliseconds to delay each printk during boot. |
| 484 | Values larger than 10 seconds (10000) are changed to | 488 | Values larger than 10 seconds (10000) are changed to |
| 485 | no delay (0). | 489 | no delay (0). |
| @@ -843,6 +847,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 357 unmodified lines | |||
| 843 | 847 | ||
| 844 | earlyprintk= [X86,SH,BLACKFIN,ARM] | 848 | earlyprintk= [X86,SH,BLACKFIN,ARM] |
| 845 | earlyprintk=vga | 849 | earlyprintk=vga |
| 850 | earlyprintk=efi | ||
| 846 | earlyprintk=xen | 851 | earlyprintk=xen |
| 847 | earlyprintk=serial[,ttySn[,baudrate]] | 852 | earlyprintk=serial[,ttySn[,baudrate]] |
| 848 | earlyprintk=serial[,0x...[,baudrate]] | 853 | earlyprintk=serial[,0x...[,baudrate]] |
| @@ -856,7 +861,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 7 unmodified lines | |||
| 856 | Append ",keep" to not disable it when the real console | 861 | Append ",keep" to not disable it when the real console |
| 857 | takes over. | 862 | takes over. |
| 858 | 863 | ||
| 859 | Only vga or serial or usb debug port at a time. | 864 | Only one of vga, efi, serial, or usb debug port can |
| 865 | be used at a time. | ||
| 860 | 866 | ||
| 861 | Currently only ttyS0 and ttyS1 may be specified by | 867 | Currently only ttyS0 and ttyS1 may be specified by |
| 862 | name. Other I/O ports may be explicitly specified | 868 | name. Other I/O ports may be explicitly specified |
| @@ -870,8 +876,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 7 unmodified lines | |||
| 870 | Interaction with the standard serial driver is not | 876 | Interaction with the standard serial driver is not |
| 871 | very good. | 877 | very good. |
| 872 | 878 | ||
| 873 | The VGA output is eventually overwritten by the real | 879 | The VGA and EFI output is eventually overwritten by |
| 874 | console. | 880 | the real console. |
| 875 | 881 | ||
| 876 | The xen output can only be used by Xen PV guests. | 882 | The xen output can only be used by Xen PV guests. |
| 877 | 883 | ||
| @@ -1064,6 +1070,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 186 unmodified lines | |||
| 1064 | VIA, nVidia) | 1070 | VIA, nVidia) |
| 1065 | verbose: show contents of HPET registers during setup | 1071 | verbose: show contents of HPET registers during setup |
| 1066 | 1072 | ||
| 1073 | hpet_mmap= [X86, HPET_MMAP] Allow userspace to mmap HPET | ||
| 1074 | registers. Default set by CONFIG_HPET_MMAP_DEFAULT. | ||
| 1075 | |||
| 1067 | hugepages= [HW,X86-32,IA-64] HugeTLB pages to allocate at boot. | 1076 | hugepages= [HW,X86-32,IA-64] HugeTLB pages to allocate at boot. |
| 1068 | hugepagesz= [HW,IA-64,PPC,X86-64] The size of the HugeTLB pages. | 1077 | hugepagesz= [HW,IA-64,PPC,X86-64] The size of the HugeTLB pages. |
| 1069 | On x86-64 and powerpc, this option can be specified | 1078 | On x86-64 and powerpc, this option can be specified |
| @@ -1181,15 +1190,24 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 111 unmodified lines | |||
| 1181 | owned by uid=0. | 1190 | owned by uid=0. |
| 1182 | 1191 | ||
| 1183 | ima_hash= [IMA] | 1192 | ima_hash= [IMA] |
| 1184 | Format: { "sha1" | "md5" } | 1193 | Format: { md5 | sha1 | rmd160 | sha256 | sha384 |
| 1194 | | sha512 | ... } | ||
| 1185 | default: "sha1" | 1195 | default: "sha1" |
| 1186 | 1196 | ||
| 1197 | The list of supported hash algorithms is defined | ||
| 1198 | in crypto/hash_info.h. | ||
| 1199 | |||
| 1187 | ima_tcb [IMA] | 1200 | ima_tcb [IMA] |
| 1188 | Load a policy which meets the needs of the Trusted | 1201 | Load a policy which meets the needs of the Trusted |
| 1189 | Computing Base. This means IMA will measure all | 1202 | Computing Base. This means IMA will measure all |
| 1190 | programs exec'd, files mmap'd for exec, and all files | 1203 | programs exec'd, files mmap'd for exec, and all files |
| 1191 | opened for read by uid=0. | 1204 | opened for read by uid=0. |
| 1192 | 1205 | ||
| 1206 | ima_template= [IMA] | ||
| 1207 | Select one of defined IMA measurements template formats. | ||
| 1208 | Formats: { "ima" | "ima-ng" } | ||
| 1209 | Default: "ima-ng" | ||
| 1210 | |||
| 1193 | init= [KNL] | 1211 | init= [KNL] |
| 1194 | Format: <full_path> | 1212 | Format: <full_path> |
| 1195 | Run specified binary instead of /sbin/init as init | 1213 | Run specified binary instead of /sbin/init as init |
| @@ -1357,7 +1375,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 161 unmodified lines | |||
| 1357 | pages. In the event, a node is too small to have both | 1375 | pages. In the event, a node is too small to have both |
| 1358 | kernelcore and Movable pages, kernelcore pages will | 1376 | kernelcore and Movable pages, kernelcore pages will |
| 1359 | take priority and other nodes will have a larger number | 1377 | take priority and other nodes will have a larger number |
| 1360 | of kernelcore pages. The Movable zone is used for the | 1378 | of Movable pages. The Movable zone is used for the |
| 1361 | allocation of pages that may be reclaimed or moved | 1379 | allocation of pages that may be reclaimed or moved |
| 1362 | by the page migration subsystem. This means that | 1380 | by the page migration subsystem. This means that |
| 1363 | HugeTLB pages may not be allocated from this zone. | 1381 | HugeTLB pages may not be allocated from this zone. |
| @@ -1769,6 +1787,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 405 unmodified lines | |||
| 1769 | that the amount of memory usable for all allocations | 1787 | that the amount of memory usable for all allocations |
| 1770 | is not too small. | 1788 | is not too small. |
| 1771 | 1789 | ||
| 1790 | movable_node [KNL,X86] Boot-time switch to enable the effects | ||
| 1791 | of CONFIG_MOVABLE_NODE=y. See mm/Kconfig for details. | ||
| 1792 | |||
| 1772 | MTD_Partition= [MTD] | 1793 | MTD_Partition= [MTD] |
| 1773 | Format: <name>,<region-number>,<size>,<offset> | 1794 | Format: <name>,<region-number>,<size>,<offset> |
| 1774 | 1795 | ||
| @@ -2595,7 +2616,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 820 unmodified lines | |||
| 2595 | ramdisk_size= [RAM] Sizes of RAM disks in kilobytes | 2616 | ramdisk_size= [RAM] Sizes of RAM disks in kilobytes |
| 2596 | See Documentation/blockdev/ramdisk.txt. | 2617 | See Documentation/blockdev/ramdisk.txt. |
| 2597 | 2618 | ||
| 2598 | rcu_nocbs= [KNL,BOOT] | 2619 | rcu_nocbs= [KNL] |
| 2599 | In kernels built with CONFIG_RCU_NOCB_CPU=y, set | 2620 | In kernels built with CONFIG_RCU_NOCB_CPU=y, set |
| 2600 | the specified list of CPUs to be no-callback CPUs. | 2621 | the specified list of CPUs to be no-callback CPUs. |
| 2601 | Invocation of these CPUs' RCU callbacks will | 2622 | Invocation of these CPUs' RCU callbacks will |
| @@ -2608,7 +2629,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 6 unmodified lines | |||
| 2608 | real-time workloads. It can also improve energy | 2629 | real-time workloads. It can also improve energy |
| 2609 | efficiency for asymmetric multiprocessors. | 2630 | efficiency for asymmetric multiprocessors. |
| 2610 | 2631 | ||
| 2611 | rcu_nocb_poll [KNL,BOOT] | 2632 | rcu_nocb_poll [KNL] |
| 2612 | Rather than requiring that offloaded CPUs | 2633 | Rather than requiring that offloaded CPUs |
| 2613 | (specified by rcu_nocbs= above) explicitly | 2634 | (specified by rcu_nocbs= above) explicitly |
| 2614 | awaken the corresponding "rcuoN" kthreads, | 2635 | awaken the corresponding "rcuoN" kthreads, |
| @@ -2619,126 +2640,145 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 4 unmodified lines | |||
| 2619 | energy efficiency by requiring that the kthreads | 2640 | energy efficiency by requiring that the kthreads |
| 2620 | periodically wake up to do the polling. | 2641 | periodically wake up to do the polling. |
| 2621 | 2642 | ||
| 2622 | rcutree.blimit= [KNL,BOOT] | 2643 | rcutree.blimit= [KNL] |
| 2623 | Set maximum number of finished RCU callbacks to process | 2644 | Set maximum number of finished RCU callbacks to process |
| 2624 | in one batch. | 2645 | in one batch. |
| 2625 | 2646 | ||
| 2626 | rcutree.fanout_leaf= [KNL,BOOT] | 2647 | rcutree.rcu_fanout_leaf= [KNL] |
| 2627 | Increase the number of CPUs assigned to each | 2648 | Increase the number of CPUs assigned to each |
| 2628 | leaf rcu_node structure. Useful for very large | 2649 | leaf rcu_node structure. Useful for very large |
| 2629 | systems. | 2650 | systems. |
| 2630 | 2651 | ||
| 2631 | rcutree.jiffies_till_first_fqs= [KNL,BOOT] | 2652 | rcutree.jiffies_till_first_fqs= [KNL] |
| 2632 | Set delay from grace-period initialization to | 2653 | Set delay from grace-period initialization to |
| 2633 | first attempt to force quiescent states. | 2654 | first attempt to force quiescent states. |
| 2634 | Units are jiffies, minimum value is zero, | 2655 | Units are jiffies, minimum value is zero, |
| 2635 | and maximum value is HZ. | 2656 | and maximum value is HZ. |
| 2636 | 2657 | ||
| 2637 | rcutree.jiffies_till_next_fqs= [KNL,BOOT] | 2658 | rcutree.jiffies_till_next_fqs= [KNL] |
| 2638 | Set delay between subsequent attempts to force | 2659 | Set delay between subsequent attempts to force |
| 2639 | quiescent states. Units are jiffies, minimum | 2660 | quiescent states. Units are jiffies, minimum |
| 2640 | value is one, and maximum value is HZ. | 2661 | value is one, and maximum value is HZ. |
| 2641 | 2662 | ||
| 2642 | rcutree.qhimark= [KNL,BOOT] | 2663 | rcutree.qhimark= [KNL] |
| 2643 | Set threshold of queued | 2664 | Set threshold of queued |
| 2644 | RCU callbacks over which batch limiting is disabled. | 2665 | RCU callbacks over which batch limiting is disabled. |
| 2645 | 2666 | ||
| 2646 | rcutree.qlowmark= [KNL,BOOT] | 2667 | rcutree.qlowmark= [KNL] |
| 2647 | Set threshold of queued RCU callbacks below which | 2668 | Set threshold of queued RCU callbacks below which |
| 2648 | batch limiting is re-enabled. | 2669 | batch limiting is re-enabled. |
| 2649 | 2670 | ||
| 2650 | rcutree.rcu_cpu_stall_suppress= [KNL,BOOT] | 2671 | rcutree.rcu_idle_gp_delay= [KNL] |
| 2651 | Suppress RCU CPU stall warning messages. | ||
| 2652 | |||
| 2653 | rcutree.rcu_cpu_stall_timeout= [KNL,BOOT] | ||
| 2654 | Set timeout for RCU CPU stall warning messages. | ||
| 2655 | |||
| 2656 | rcutree.rcu_idle_gp_delay= [KNL,BOOT] | ||
| 2657 | Set wakeup interval for idle CPUs that have | 2672 | Set wakeup interval for idle CPUs that have |
| 2658 | RCU callbacks (RCU_FAST_NO_HZ=y). | 2673 | RCU callbacks (RCU_FAST_NO_HZ=y). |
| 2659 | 2674 | ||
| 2660 | rcutree.rcu_idle_lazy_gp_delay= [KNL,BOOT] | 2675 | rcutree.rcu_idle_lazy_gp_delay= [KNL] |
| 2661 | Set wakeup interval for idle CPUs that have | 2676 | Set wakeup interval for idle CPUs that have |
| 2662 | only "lazy" RCU callbacks (RCU_FAST_NO_HZ=y). | 2677 | only "lazy" RCU callbacks (RCU_FAST_NO_HZ=y). |
| 2663 | Lazy RCU callbacks are those which RCU can | 2678 | Lazy RCU callbacks are those which RCU can |
| 2664 | prove do nothing more than free memory. | 2679 | prove do nothing more than free memory. |
| 2665 | 2680 | ||
| 2666 | rcutorture.fqs_duration= [KNL,BOOT] | 2681 | rcutorture.fqs_duration= [KNL] |
| 2667 | Set duration of force_quiescent_state bursts. | 2682 | Set duration of force_quiescent_state bursts. |
| 2668 | 2683 | ||
| 2669 | rcutorture.fqs_holdoff= [KNL,BOOT] | 2684 | rcutorture.fqs_holdoff= [KNL] |
| 2670 | Set holdoff time within force_quiescent_state bursts. | 2685 | Set holdoff time within force_quiescent_state bursts. |
| 2671 | 2686 | ||
| 2672 | rcutorture.fqs_stutter= [KNL,BOOT] | 2687 | rcutorture.fqs_stutter= [KNL] |
| 2673 | Set wait time between force_quiescent_state bursts. | 2688 | Set wait time between force_quiescent_state bursts. |
| 2674 | 2689 | ||
| 2675 | rcutorture.irqreader= [KNL,BOOT] | 2690 | rcutorture.gp_exp= [KNL] |
| 2676 | Test RCU readers from irq handlers. | 2691 | Use expedited update-side primitives. |
| 2677 | 2692 | ||
| 2678 | rcutorture.n_barrier_cbs= [KNL,BOOT] | 2693 | rcutorture.gp_normal= [KNL] |
| 2694 | Use normal (non-expedited) update-side primitives. | ||
| 2695 | If both gp_exp and gp_normal are set, do both. | ||
| 2696 | If neither gp_exp nor gp_normal are set, still | ||
| 2697 | do both. | ||
| 2698 | |||
| 2699 | rcutorture.n_barrier_cbs= [KNL] | ||
| 2679 | Set callbacks/threads for rcu_barrier() testing. | 2700 | Set callbacks/threads for rcu_barrier() testing. |
| 2680 | 2701 | ||
| 2681 | rcutorture.nfakewriters= [KNL,BOOT] | 2702 | rcutorture.nfakewriters= [KNL] |
| 2682 | Set number of concurrent RCU writers. These just | 2703 | Set number of concurrent RCU writers. These just |
| 2683 | stress RCU, they don't participate in the actual | 2704 | stress RCU, they don't participate in the actual |
| 2684 | test, hence the "fake". | 2705 | test, hence the "fake". |
| 2685 | 2706 | ||
| 2686 | rcutorture.nreaders= [KNL,BOOT] | 2707 | rcutorture.nreaders= [KNL] |
| 2687 | Set number of RCU readers. | 2708 | Set number of RCU readers. |
| 2688 | 2709 | ||
| 2689 | rcutorture.onoff_holdoff= [KNL,BOOT] | 2710 | rcutorture.object_debug= [KNL] |
| 2711 | Enable debug-object double-call_rcu() testing. | ||
| 2712 | |||
| 2713 | rcutorture.onoff_holdoff= [KNL] | ||
| 2690 | Set time (s) after boot for CPU-hotplug testing. | 2714 | Set time (s) after boot for CPU-hotplug testing. |
| 2691 | 2715 | ||
| 2692 | rcutorture.onoff_interval= [KNL,BOOT] | 2716 | rcutorture.onoff_interval= [KNL] |
| 2693 | Set time (s) between CPU-hotplug operations, or | 2717 | Set time (s) between CPU-hotplug operations, or |
| 2694 | zero to disable CPU-hotplug testing. | 2718 | zero to disable CPU-hotplug testing. |
| 2695 | 2719 | ||
| 2696 | rcutorture.shuffle_interval= [KNL,BOOT] | 2720 | rcutorture.rcutorture_runnable= [BOOT] |
| 2721 | Start rcutorture running at boot time. | ||
| 2722 | |||
| 2723 | rcutorture.shuffle_interval= [KNL] | ||
| 2697 | Set task-shuffle interval (s). Shuffling tasks | 2724 | Set task-shuffle interval (s). Shuffling tasks |
| 2698 | allows some CPUs to go into dyntick-idle mode | 2725 | allows some CPUs to go into dyntick-idle mode |
| 2699 | during the rcutorture test. | 2726 | during the rcutorture test. |
| 2700 | 2727 | ||
| 2701 | rcutorture.shutdown_secs= [KNL,BOOT] | 2728 | rcutorture.shutdown_secs= [KNL] |
| 2702 | Set time (s) after boot system shutdown. This | 2729 | Set time (s) after boot system shutdown. This |
| 2703 | is useful for hands-off automated testing. | 2730 | is useful for hands-off automated testing. |
| 2704 | 2731 | ||
| 2705 | rcutorture.stall_cpu= [KNL,BOOT] | 2732 | rcutorture.stall_cpu= [KNL] |
| 2706 | Duration of CPU stall (s) to test RCU CPU stall | 2733 | Duration of CPU stall (s) to test RCU CPU stall |
| 2707 | warnings, zero to disable. | 2734 | warnings, zero to disable. |
| 2708 | 2735 | ||
| 2709 | rcutorture.stall_cpu_holdoff= [KNL,BOOT] | 2736 | rcutorture.stall_cpu_holdoff= [KNL] |
| 2710 | Time to wait (s) after boot before inducing stall. | 2737 | Time to wait (s) after boot before inducing stall. |
| 2711 | 2738 | ||
| 2712 | rcutorture.stat_interval= [KNL,BOOT] | 2739 | rcutorture.stat_interval= [KNL] |
| 2713 | Time (s) between statistics printk()s. | 2740 | Time (s) between statistics printk()s. |
| 2714 | 2741 | ||
| 2715 | rcutorture.stutter= [KNL,BOOT] | 2742 | rcutorture.stutter= [KNL] |
| 2716 | Time (s) to stutter testing, for example, specifying | 2743 | Time (s) to stutter testing, for example, specifying |
| 2717 | five seconds causes the test to run for five seconds, | 2744 | five seconds causes the test to run for five seconds, |
| 2718 | wait for five seconds, and so on. This tests RCU's | 2745 | wait for five seconds, and so on. This tests RCU's |
| 2719 | ability to transition abruptly to and from idle. | 2746 | ability to transition abruptly to and from idle. |
| 2720 | 2747 | ||
| 2721 | rcutorture.test_boost= [KNL,BOOT] | 2748 | rcutorture.test_boost= [KNL] |
| 2722 | Test RCU priority boosting? 0=no, 1=maybe, 2=yes. | 2749 | Test RCU priority boosting? 0=no, 1=maybe, 2=yes. |
| 2723 | "Maybe" means test if the RCU implementation | 2750 | "Maybe" means test if the RCU implementation |
| 2724 | under test support RCU priority boosting. | 2751 | under test support RCU priority boosting. |
| 2725 | 2752 | ||
| 2726 | rcutorture.test_boost_duration= [KNL,BOOT] | 2753 | rcutorture.test_boost_duration= [KNL] |
| 2727 | Duration (s) of each individual boost test. | 2754 | Duration (s) of each individual boost test. |
| 2728 | 2755 | ||
| 2729 | rcutorture.test_boost_interval= [KNL,BOOT] | 2756 | rcutorture.test_boost_interval= [KNL] |
| 2730 | Interval (s) between each boost test. | 2757 | Interval (s) between each boost test. |
| 2731 | 2758 | ||
| 2732 | rcutorture.test_no_idle_hz= [KNL,BOOT] | 2759 | rcutorture.test_no_idle_hz= [KNL] |
| 2733 | Test RCU's dyntick-idle handling. See also the | 2760 | Test RCU's dyntick-idle handling. See also the |
| 2734 | rcutorture.shuffle_interval parameter. | 2761 | rcutorture.shuffle_interval parameter. |
| 2735 | 2762 | ||
| 2736 | rcutorture.torture_type= [KNL,BOOT] | 2763 | rcutorture.torture_type= [KNL] |
| 2737 | Specify the RCU implementation to test. | 2764 | Specify the RCU implementation to test. |
| 2738 | 2765 | ||
| 2739 | rcutorture.verbose= [KNL,BOOT] | 2766 | rcutorture.verbose= [KNL] |
| 2740 | Enable additional printk() statements. | 2767 | Enable additional printk() statements. |
| 2741 | 2768 | ||
| 2769 | rcupdate.rcu_expedited= [KNL] | ||
| 2770 | Use expedited grace-period primitives, for | ||
| 2771 | example, synchronize_rcu_expedited() instead | ||
| 2772 | of synchronize_rcu(). This reduces latency, | ||
| 2773 | but can increase CPU utilization, degrade | ||
| 2774 | real-time latency, and degrade energy efficiency. | ||
| 2775 | |||
| 2776 | rcupdate.rcu_cpu_stall_suppress= [KNL] | ||
| 2777 | Suppress RCU CPU stall warning messages. | ||
| 2778 | |||
| 2779 | rcupdate.rcu_cpu_stall_timeout= [KNL] | ||
| 2780 | Set timeout for RCU CPU stall warning messages. | ||
| 2781 | |||
| 2742 | rdinit= [KNL] | 2782 | rdinit= [KNL] |
| 2743 | Format: <full_path> | 2783 | Format: <full_path> |
| 2744 | Run specified binary instead of /init from the ramdisk, | 2784 | Run specified binary instead of /init from the ramdisk, |
| @@ -3467,11 +3507,11 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 722 unmodified lines | |||
| 3467 | default x2apic cluster mode on platforms | 3507 | default x2apic cluster mode on platforms |
| 3468 | supporting x2apic. | 3508 | supporting x2apic. |
| 3469 | 3509 | ||
| 3470 | x86_mrst_timer= [X86-32,APBT] | 3510 | x86_intel_mid_timer= [X86-32,APBT] |
| 3471 | Choose timer option for x86 Moorestown MID platform. | 3511 | Choose timer option for x86 Intel MID platform. |
| 3472 | Two valid options are apbt timer only and lapic timer | 3512 | Two valid options are apbt timer only and lapic timer |
| 3473 | plus one apbt timer for broadcast timer. | 3513 | plus one apbt timer for broadcast timer. |
| 3474 | x86_mrst_timer=apbt_only | lapic_and_apbt | 3514 | x86_intel_mid_timer=apbt_only | lapic_and_apbt |
| 3475 | 3515 | ||
| 3476 | xen_emul_unplug= [HW,X86,XEN] | 3516 | xen_emul_unplug= [HW,X86,XEN] |
| 3477 | Unplug Xen emulated devices | 3517 | Unplug Xen emulated devices |
| @@ -3485,6 +3525,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 7 unmodified lines | |||
| 3485 | the unplug protocol | 3525 | the unplug protocol |
| 3486 | never -- do not unplug even if version check succeeds | 3526 | never -- do not unplug even if version check succeeds |
| 3487 | 3527 | ||
| 3528 | xen_nopvspin [X86,XEN] | ||
| 3529 | Disables the ticketlock slowpath using Xen PV | ||
| 3530 | optimizations. | ||
| 3531 | |||
| 3488 | xirc2ps_cs= [NET,PCMCIA] | 3532 | xirc2ps_cs= [NET,PCMCIA] |
| 3489 | Format: | 3533 | Format: |
| 3490 | <irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]] | 3534 | <irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]] |
| @@ -181,12 +181,17 @@ To reduce its OS jitter, do any of the following: · 180 unmodified lines | |||
| 181 | make sure that this is safe on your particular system. | 181 | make sure that this is safe on your particular system. |
| 182 | d. It is not possible to entirely get rid of OS jitter | 182 | d. It is not possible to entirely get rid of OS jitter |
| 183 | from vmstat_update() on CONFIG_SMP=y systems, but you | 183 | from vmstat_update() on CONFIG_SMP=y systems, but you |
| 184 | can decrease its frequency by writing a large value to | 184 | can decrease its frequency by writing a large value |
| 185 | /proc/sys/vm/stat_interval. The default value is HZ, | 185 | to /proc/sys/vm/stat_interval. The default value is |
| 186 | for an interval of one second. Of course, larger values | 186 | HZ, for an interval of one second. Of course, larger |
| 187 | will make your virtual-memory statistics update more | 187 | values will make your virtual-memory statistics update |
| 188 | slowly. Of course, you can also run your workload at | 188 | more slowly. Of course, you can also run your workload |
| 189 | a real-time priority, thus preempting vmstat_update(). | 189 | at a real-time priority, thus preempting vmstat_update(), |
| 190 | but if your workload is CPU-bound, this is a bad idea. | ||
| 191 | However, there is an RFC patch from Christoph Lameter | ||
| 192 | (based on an earlier one from Gilad Ben-Yossef) that | ||
| 193 | reduces or even eliminates vmstat overhead for some | ||
| 194 | workloads at https://lkml.org/lkml/2013/9/4/379. | ||
| 190 | e. If running on high-end powerpc servers, build with | 195 | e. If running on high-end powerpc servers, build with |
| 191 | CONFIG_PPC_RTAS_DAEMON=n. This prevents the RTAS | 196 | CONFIG_PPC_RTAS_DAEMON=n. This prevents the RTAS |
| 192 | daemon from running on each CPU every second or so. | 197 | daemon from running on each CPU every second or so. |
| @@ -1,7 +1,7 @@ | |||
| 1 | ThinkPad ACPI Extras Driver | 1 | ThinkPad ACPI Extras Driver |
| 2 | 2 | ||
| 3 | Version 0.24 | 3 | Version 0.25 |
| 4 | December 11th, 2009 | 4 | October 16th, 2013 |
| 5 | 5 | ||
| 6 | Borislav Deianov <borislav@users.sf.net> | 6 | Borislav Deianov <borislav@users.sf.net> |
| 7 | Henrique de Moraes Holschuh <hmh@hmh.eng.br> | 7 | Henrique de Moraes Holschuh <hmh@hmh.eng.br> |
| @@ -741,6 +741,9 @@ compiled with the CONFIG_THINKPAD_ACPI_UNSAFE_LEDS option enabled. · 733 unmodified lines | |||
| 741 | Distributions must never enable this option. Individual users that | 741 | Distributions must never enable this option. Individual users that |
| 742 | are aware of the consequences are welcome to enabling it. | 742 | are aware of the consequences are welcome to enabling it. |
| 743 | 743 | ||
| 744 | Audio mute and microphone mute LEDs are supported, but currently not | ||
| 745 | visible to userspace. They are used by the snd-hda-intel audio driver. | ||
| 746 | |||
| 744 | procfs notes: | 747 | procfs notes: |
| 745 | 748 | ||
| 746 | The available commands are: | 749 | The available commands are: |
| @@ -46,16 +46,14 @@ With these hooks we provide the following statistics: · 45 unmodified lines | |||
| 46 | contentions - number of lock acquisitions that had to wait | 46 | contentions - number of lock acquisitions that had to wait |
| 47 | wait time min - shortest (non-0) time we ever had to wait for a lock | 47 | wait time min - shortest (non-0) time we ever had to wait for a lock |
| 48 | max - longest time we ever had to wait for a lock | 48 | max - longest time we ever had to wait for a lock |
| 49 | total - total time we spend waiting on this lock | 49 | total - total time we spend waiting on this lock |
| 50 | avg - average time spent waiting on this lock | ||
| 50 | acq-bounces - number of lock acquisitions that involved x-cpu data | 51 | acq-bounces - number of lock acquisitions that involved x-cpu data |
| 51 | acquisitions - number of times we took the lock | 52 | acquisitions - number of times we took the lock |
| 52 | hold time min - shortest (non-0) time we ever held the lock | 53 | hold time min - shortest (non-0) time we ever held the lock |
| 53 | max - longest time we ever held the lock | 54 | max - longest time we ever held the lock |
| 54 | total - total time this lock was held | 55 | total - total time this lock was held |
| 55 | 56 | avg - average time this lock was held | |
| 56 | From these number various other statistics can be derived, such as: | ||
| 57 | |||
| 58 | hold time average = hold time total / acquisitions | ||
| 59 | 57 | ||
| 60 | These numbers are gathered per lock class, per read/write state (when | 58 | These numbers are gathered per lock class, per read/write state (when |
| 61 | applicable). | 59 | applicable). |
| @@ -84,37 +82,38 @@ Look at the current lock statistics: · 22 unmodified lines | |||
| 84 | 82 | ||
| 85 | # less /proc/lock_stat | 83 | # less /proc/lock_stat |
| 86 | 84 | ||
| 87 | 01 lock_stat version 0.3 | 85 | 01 lock_stat version 0.4 |
| 88 | 02 ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | 86 | 02----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
| 89 | 03 class name con-bounces contentions waittime-min waittime-max waittime-total acq-bounces acquisitions holdtime-min holdtime-max holdtime-total | 87 | 03 class name con-bounces contentions waittime-min waittime-max waittime-total waittime-avg acq-bounces acquisitions holdtime-min holdtime-max holdtime-total holdtime-avg |
| 90 | 04 ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | 88 | 04----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
| 91 | 05 | 89 | 05 |
| 92 | 06 &mm->mmap_sem-W: 233 538 18446744073708 22924.27 607243.51 1342 45806 1.71 8595.89 1180582.34 | 90 | 06 &mm->mmap_sem-W: 46 84 0.26 939.10 16371.53 194.90 47291 2922365 0.16 2220301.69 17464026916.32 5975.99 |
| 93 | 07 &mm->mmap_sem-R: 205 587 18446744073708 28403.36 731975.00 1940 412426 0.58 187825.45 6307502.88 | 91 | 07 &mm->mmap_sem-R: 37 100 1.31 299502.61 325629.52 3256.30 212344 34316685 0.10 7744.91 95016910.20 2.77 |
| 94 | 08 --------------- | 92 | 08 --------------- |
| 95 | 09 &mm->mmap_sem 487 [<ffffffff8053491f>] do_page_fault+0x466/0x928 | 93 | 09 &mm->mmap_sem 1 [<ffffffff811502a7>] khugepaged_scan_mm_slot+0x57/0x280 |
| 96 | 10 &mm->mmap_sem 179 [<ffffffff802a6200>] sys_mprotect+0xcd/0x21d | 94 | 19 &mm->mmap_sem 96 [<ffffffff815351c4>] __do_page_fault+0x1d4/0x510 |
| 97 | 11 &mm->mmap_sem 279 [<ffffffff80210a57>] sys_mmap+0x75/0xce | 95 | 11 &mm->mmap_sem 34 [<ffffffff81113d77>] vm_mmap_pgoff+0x87/0xd0 |
| 98 | 12 &mm->mmap_sem 76 [<ffffffff802a490b>] sys_munmap+0x32/0x59 | 96 | 12 &mm->mmap_sem 17 [<ffffffff81127e71>] vm_munmap+0x41/0x80 |
| 99 | 13 --------------- | 97 | 13 --------------- |
| 100 | 14 &mm->mmap_sem 270 [<ffffffff80210a57>] sys_mmap+0x75/0xce | 98 | 14 &mm->mmap_sem 1 [<ffffffff81046fda>] dup_mmap+0x2a/0x3f0 |
| 101 | 15 &mm->mmap_sem 431 [<ffffffff8053491f>] do_page_fault+0x466/0x928 | 99 | 15 &mm->mmap_sem 60 [<ffffffff81129e29>] SyS_mprotect+0xe9/0x250 |
| 102 | 16 &mm->mmap_sem 138 [<ffffffff802a490b>] sys_munmap+0x32/0x59 | 100 | 16 &mm->mmap_sem 41 [<ffffffff815351c4>] __do_page_fault+0x1d4/0x510 |
| 103 | 17 &mm->mmap_sem 145 [<ffffffff802a6200>] sys_mprotect+0xcd/0x21d | 101 | 17 &mm->mmap_sem 68 [<ffffffff81113d77>] vm_mmap_pgoff+0x87/0xd0 |
| 104 | 18 | 102 | 18 |
| 105 | 19 ............................................................................................................................................................................................... | 103 | 19............................................................................................................................................................................................................................. |
| 106 | 20 | 104 | 20 |
| 107 | 21 dcache_lock: 621 623 0.52 118.26 1053.02 6745 91930 0.29 316.29 118423.41 | 105 | 21 unix_table_lock: 110 112 0.21 49.24 163.91 1.46 21094 66312 0.12 624.42 31589.81 0.48 |
| 108 | 22 ----------- | 106 | 22 --------------- |
| 109 | 23 dcache_lock 179 [<ffffffff80378274>] _atomic_dec_and_lock+0x34/0x54 | 107 | 23 unix_table_lock 45 [<ffffffff8150ad8e>] unix_create1+0x16e/0x1b0 |
| 110 | 24 dcache_lock 113 [<ffffffff802cc17b>] d_alloc+0x19a/0x1eb | 108 | 24 unix_table_lock 47 [<ffffffff8150b111>] unix_release_sock+0x31/0x250 |
| 111 | 25 dcache_lock 99 [<ffffffff802ca0dc>] d_rehash+0x1b/0x44 | 109 | 25 unix_table_lock 15 [<ffffffff8150ca37>] unix_find_other+0x117/0x230 |
| 112 | 26 dcache_lock 104 [<ffffffff802cbca0>] d_instantiate+0x36/0x8a | 110 | 26 unix_table_lock 5 [<ffffffff8150a09f>] unix_autobind+0x11f/0x1b0 |
| 113 | 27 ----------- | 111 | 27 --------------- |
| 114 | 28 dcache_lock 192 [<ffffffff80378274>] _atomic_dec_and_lock+0x34/0x54 | 112 | 28 unix_table_lock 39 [<ffffffff8150b111>] unix_release_sock+0x31/0x250 |
| 115 | 29 dcache_lock 98 [<ffffffff802ca0dc>] d_rehash+0x1b/0x44 | 113 | 29 unix_table_lock 49 [<ffffffff8150ad8e>] unix_create1+0x16e/0x1b0 |
| 116 | 30 dcache_lock 72 [<ffffffff802cc17b>] d_alloc+0x19a/0x1eb | 114 | 30 unix_table_lock 20 [<ffffffff8150ca37>] unix_find_other+0x117/0x230 |
| 117 | 31 dcache_lock 112 [<ffffffff802cbca0>] d_instantiate+0x36/0x8a | 115 | 31 unix_table_lock 4 [<ffffffff8150a09f>] unix_autobind+0x11f/0x1b0 |
| 116 | |||
| 118 | 117 | ||
| 119 | This excerpt shows the first two lock class statistics. Line 01 shows the | 118 | This excerpt shows the first two lock class statistics. Line 01 shows the |
| 120 | output version - each time the format changes this will be updated. Line 02-04 | 119 | output version - each time the format changes this will be updated. Line 02-04 |
| @@ -131,30 +130,30 @@ The integer part of the time values is in us. · 10 unmodified lines | |||
| 131 | 130 | ||
| 132 | Dealing with nested locks, subclasses may appear: | 131 | Dealing with nested locks, subclasses may appear: |
| 133 | 132 | ||
| 134 | 32............................................................................................................................................................................................... | 133 | 32........................................................................................................................................................................................................................... |
| 135 | 33 | 134 | 33 |
| 136 | 34 &rq->lock: 13128 13128 0.43 190.53 103881.26 97454 3453404 0.00 401.11 13224683.11 | 135 | 34 &rq->lock: 13128 13128 0.43 190.53 103881.26 7.91 97454 3453404 0.00 401.11 13224683.11 3.82 |
| 137 | 35 --------- | 136 | 35 --------- |
| 138 | 36 &rq->lock 645 [<ffffffff8103bfc4>] task_rq_lock+0x43/0x75 | 137 | 36 &rq->lock 645 [<ffffffff8103bfc4>] task_rq_lock+0x43/0x75 |
| 139 | 37 &rq->lock 297 [<ffffffff8104ba65>] try_to_wake_up+0x127/0x25a | 138 | 37 &rq->lock 297 [<ffffffff8104ba65>] try_to_wake_up+0x127/0x25a |
| 140 | 38 &rq->lock 360 [<ffffffff8103c4c5>] select_task_rq_fair+0x1f0/0x74a | 139 | 38 &rq->lock 360 [<ffffffff8103c4c5>] select_task_rq_fair+0x1f0/0x74a |
| 141 | 39 &rq->lock 428 [<ffffffff81045f98>] scheduler_tick+0x46/0x1fb | 140 | 39 &rq->lock 428 [<ffffffff81045f98>] scheduler_tick+0x46/0x1fb |
| 142 | 40 --------- | 141 | 40 --------- |
| 143 | 41 &rq->lock 77 [<ffffffff8103bfc4>] task_rq_lock+0x43/0x75 | 142 | 41 &rq->lock 77 [<ffffffff8103bfc4>] task_rq_lock+0x43/0x75 |
| 144 | 42 &rq->lock 174 [<ffffffff8104ba65>] try_to_wake_up+0x127/0x25a | 143 | 42 &rq->lock 174 [<ffffffff8104ba65>] try_to_wake_up+0x127/0x25a |
| 145 | 43 &rq->lock 4715 [<ffffffff8103ed4b>] double_rq_lock+0x42/0x54 | 144 | 43 &rq->lock 4715 [<ffffffff8103ed4b>] double_rq_lock+0x42/0x54 |
| 146 | 44 &rq->lock 893 [<ffffffff81340524>] schedule+0x157/0x7b8 | 145 | 44 &rq->lock 893 [<ffffffff81340524>] schedule+0x157/0x7b8 |
| 147 | 45 | 146 | 45 |
| 148 | 46............................................................................................................................................................................................... | 147 | 46........................................................................................................................................................................................................................... |
| 149 | 47 | 148 | 47 |
| 150 | 48 &rq->lock/1: 11526 11488 0.33 388.73 136294.31 21461 38404 0.00 37.93 109388.53 | 149 | 48 &rq->lock/1: 1526 11488 0.33 388.73 136294.31 11.86 21461 38404 0.00 37.93 109388.53 2.84 |
| 151 | 49 ----------- | 150 | 49 ----------- |
| 152 | 50 &rq->lock/1 11526 [<ffffffff8103ed58>] double_rq_lock+0x4f/0x54 | 151 | 50 &rq->lock/1 11526 [<ffffffff8103ed58>] double_rq_lock+0x4f/0x54 |
| 153 | 51 ----------- | 152 | 51 ----------- |
| 154 | 52 &rq->lock/1 5645 [<ffffffff8103ed4b>] double_rq_lock+0x42/0x54 | 153 | 52 &rq->lock/1 5645 [<ffffffff8103ed4b>] double_rq_lock+0x42/0x54 |
| 155 | 53 &rq->lock/1 1224 [<ffffffff81340524>] schedule+0x157/0x7b8 | 154 | 53 &rq->lock/1 1224 [<ffffffff81340524>] schedule+0x157/0x7b8 |
| 156 | 54 &rq->lock/1 4336 [<ffffffff8103ed58>] double_rq_lock+0x4f/0x54 | 155 | 54 &rq->lock/1 4336 [<ffffffff8103ed58>] double_rq_lock+0x4f/0x54 |
| 157 | 55 &rq->lock/1 181 [<ffffffff8104ba65>] try_to_wake_up+0x127/0x25a | 156 | 55 &rq->lock/1 181 [<ffffffff8104ba65>] try_to_wake_up+0x127/0x25a |
| 158 | 157 | ||
| 159 | Line 48 shows statistics for the second subclass (/1) of &rq->lock class | 158 | Line 48 shows statistics for the second subclass (/1) of &rq->lock class |
| 160 | (subclass starts from 0), since in this case, as line 50 suggests, | 159 | (subclass starts from 0), since in this case, as line 50 suggests, |
| @@ -163,16 +162,16 @@ double_rq_lock actually acquires a nested lock of two spinlocks. · 2 unmodified lines | |||
| 163 | View the top contending locks: | 162 | View the top contending locks: |
| 164 | 163 | ||
| 165 | # grep : /proc/lock_stat | head | 164 | # grep : /proc/lock_stat | head |
| 166 | &inode->i_data.tree_lock-W: 15 21657 0.18 1093295.30 11547131054.85 58 10415 0.16 87.51 6387.60 | 165 | clockevents_lock: 2926159 2947636 0.15 46882.81 1784540466.34 605.41 3381345 3879161 0.00 2260.97 53178395.68 13.71 |
| 167 | &inode->i_data.tree_lock-R: 0 0 0.00 0.00 0.00 23302 231198 0.25 8.45 98023.38 | 166 | tick_broadcast_lock: 346460 346717 0.18 2257.43 39364622.71 113.54 3642919 4242696 0.00 2263.79 49173646.60 11.59 |
| 168 | dcache_lock: 1037 1161 0.38 45.32 774.51 6611 243371 0.15 306.48 77387.24 | 167 | &mapping->i_mmap_mutex: 203896 203899 3.36 645530.05 31767507988.39 155800.21 3361776 8893984 0.17 2254.15 14110121.02 1.59 |
| 169 | &inode->i_mutex: 161 286 18446744073709 62882.54 1244614.55 3653 20598 18446744073709 62318.60 1693822.74 | 168 | &rq->lock: 135014 136909 0.18 606.09 842160.68 6.15 1540728 10436146 0.00 728.72 17606683.41 1.69 |
| 170 | &zone->lru_lock: 94 94 0.53 7.33 92.10 4366 32690 0.29 59.81 16350.06 | 169 | &(&zone->lru_lock)->rlock: 93000 94934 0.16 59.18 188253.78 1.98 1199912 3809894 0.15 391.40 3559518.81 0.93 |
| 171 | &inode->i_data.i_mmap_mutex: 79 79 0.40 3.77 53.03 11779 87755 0.28 116.93 29898.44 | 170 | tasklist_lock-W: 40667 41130 0.23 1189.42 428980.51 10.43 270278 510106 0.16 653.51 3939674.91 7.72 |
| 172 | &q->__queue_lock: 48 50 0.52 31.62 86.31 774 13131 0.17 113.08 12277.52 | 171 | tasklist_lock-R: 21298 21305 0.20 1310.05 215511.12 10.12 186204 241258 0.14 1162.33 1179779.23 4.89 |
| 173 | &rq->rq_lock_key: 43 47 0.74 68.50 170.63 3706 33929 0.22 107.99 17460.62 | 172 | rcu_node_1: 47656 49022 0.16 635.41 193616.41 3.95 844888 1865423 0.00 764.26 1656226.96 0.89 |
| 174 | &rq->rq_lock_key#2: 39 46 0.75 6.68 49.03 2979 32292 0.17 125.17 17137.63 | 173 | &(&dentry->d_lockref.lock)->rlock: 39791 40179 0.15 1302.08 88851.96 2.21 2790851 12527025 0.10 1910.75 3379714.27 0.27 |
| 175 | tasklist_lock-W: 15 15 1.45 10.87 32.70 1201 7390 0.58 62.55 13648.47 | 174 | rcu_node_0: 29203 30064 0.16 786.55 1555573.00 51.74 88963 244254 0.00 398.87 428872.51 1.76 |
| 176 | 175 | ||
| 177 | Clear the statistics: | 176 | Clear the statistics: |
| 178 | 177 | ||
| @@ -0,0 +1,51 @@ | |||
| 1 | An Intel MIC X100 device is a PCIe form factor add-in coprocessor | ||
| 2 | card based on the Intel Many Integrated Core (MIC) architecture | ||
| 3 | that runs a Linux OS. It is a PCIe endpoint in a platform and therefore | ||
| 4 | implements the three required standard address spaces i.e. configuration, | ||
| 5 | memory and I/O. The host OS loads a device driver as is typical for | ||
| 6 | PCIe devices. The card itself runs a bootstrap after reset that | ||
| 7 | transfers control to the card OS downloaded from the host driver. The | ||
| 8 | host driver supports OSPM suspend and resume operations. It shuts down | ||
| 9 | the card during suspend and reboots the card OS during resume. | ||
| 10 | The card OS as shipped by Intel is a Linux kernel with modifications | ||
| 11 | for the X100 devices. | ||
| 12 | |||
| 13 | Since it is a PCIe card, it does not have the ability to host hardware | ||
| 14 | devices for networking, storage and console. We provide these devices | ||
| 15 | on X100 coprocessors thus enabling a self-bootable equivalent environment | ||
| 16 | for applications. A key benefit of our solution is that it leverages | ||
| 17 | the standard virtio framework for network, disk and console devices, | ||
| 18 | though in our case the virtio framework is used across a PCIe bus. | ||
| 19 | |||
| 20 | Here is a block diagram of the various components described above. The | ||
| 21 | virtio backends are situated on the host rather than the card given better | ||
| 22 | single threaded performance for the host compared to MIC, the ability of | ||
| 23 | the host to initiate DMA's to/from the card using the MIC DMA engine and | ||
| 24 | the fact that the virtio block storage backend can only be on the host. | ||
| 25 | |||
| 26 | | | ||
| 27 | +----------+ | +----------+ | ||
| 28 | | Card OS | | | Host OS | | ||
| 29 | +----------+ | +----------+ | ||
| 30 | | | ||
| 31 | +-------+ +--------+ +------+ | +---------+ +--------+ +--------+ | ||
| 32 | | Virtio| |Virtio | |Virtio| | |Virtio | |Virtio | |Virtio | | ||
| 33 | | Net | |Console | |Block | | |Net | |Console | |Block | | ||
| 34 | | Driver| |Driver | |Driver| | |backend | |backend | |backend | | ||
| 35 | +-------+ +--------+ +------+ | +---------+ +--------+ +--------+ | ||
| 36 | | | | | | | | | ||
| 37 | | | | |User | | | | ||
| 38 | | | | |------|------------|---------|------- | ||
| 39 | +-------------------+ |Kernel +--------------------------+ | ||
| 40 | | | | Virtio over PCIe IOCTLs | | ||
| 41 | | | +--------------------------+ | ||
| 42 | +--------------+ | | | ||
| 43 | |Intel MIC | | +---------------+ | ||
| 44 | |Card Driver | | |Intel MIC | | ||
| 45 | +--------------+ | |Host Driver | | ||
| 46 | | | +---------------+ | ||
| 47 | | | | | ||
| 48 | +-------------------------------------------------------------+ | ||
| 49 | | | | ||
| 50 | | PCIe Bus | | ||
| 51 | +-------------------------------------------------------------+ | ||
| @@ -0,0 +1 @@ | |||
| 1 | mpssd | ||
| @@ -0,0 +1,19 @@ | |||
| 1 | # | ||
| 2 | # Makefile - Intel MIC User Space Tools. | ||
| 3 | # Copyright(c) 2013, Intel Corporation. | ||
| 4 | # | ||
| 5 | ifdef DEBUG | ||
| 6 | CFLAGS += $(USERWARNFLAGS) -I. -g -Wall -DDEBUG=$(DEBUG) | ||
| 7 | else | ||
| 8 | CFLAGS += $(USERWARNFLAGS) -I. -g -Wall | ||
| 9 | endif | ||
| 10 | |||
| 11 | mpssd: mpssd.o sysfs.o | ||
| 12 | $(CC) $(CFLAGS) -o $@ $^ -lpthread | ||
| 13 | |||
| 14 | install: | ||
| 15 | install mpssd /usr/sbin/mpssd | ||
| 16 | install micctrl /usr/sbin/micctrl | ||
| 17 | |||
| 18 | clean: | ||
| 19 | rm -f mpssd *.o | ||
| @@ -0,0 +1,173 @@ | |||
| 1 | #!/bin/bash | ||
| 2 | # Intel MIC Platform Software Stack (MPSS) | ||
| 3 | # | ||
| 4 | # Copyright(c) 2013 Intel Corporation. | ||
| 5 | # | ||
| 6 | # This program is free software; you can redistribute it and/or modify | ||
| 7 | # it under the terms of the GNU General Public License, version 2, as | ||
| 8 | # published by the Free Software Foundation. | ||
| 9 | # | ||
| 10 | # This program is distributed in the hope that it will be useful, but | ||
| 11 | # WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 13 | # General Public License for more details. | ||
| 14 | # | ||
| 15 | # The full GNU General Public License is included in this distribution in | ||
| 16 | # the file called "COPYING". | ||
| 17 | # | ||
| 18 | # Intel MIC User Space Tools. | ||
| 19 | # | ||
| 20 | # micctrl - Controls MIC boot/start/stop. | ||
| 21 | # | ||
| 22 | # chkconfig: 2345 95 05 | ||
| 23 | # description: start MPSS stack processing. | ||
| 24 | # | ||
| 25 | ### BEGIN INIT INFO | ||
| 26 | # Provides: micctrl | ||
| 27 | ### END INIT INFO | ||
| 28 | |||
| 29 | # Source function library. | ||
| 30 | . /etc/init.d/functions | ||
| 31 | |||
| 32 | sysfs="/sys/class/mic" | ||
| 33 | |||
| 34 | _status() | ||
| 35 | { | ||
| 36 | f=$sysfs/$1 | ||
| 37 | echo -e $1 state: "`cat $f/state`" shutdown_status: "`cat $f/shutdown_status`" | ||
| 38 | } | ||
| 39 | |||
| 40 | status() | ||
| 41 | { | ||
| 42 | if [ "`echo $1 | head -c3`" == "mic" ]; then | ||
| 43 | _status $1 | ||
| 44 | return $? | ||
| 45 | fi | ||
| 46 | for f in $sysfs/* | ||
| 47 | do | ||
| 48 | _status `basename $f` | ||
| 49 | RETVAL=$? | ||
| 50 | [ $RETVAL -ne 0 ] && return $RETVAL | ||
| 51 | done | ||
| 52 | return 0 | ||
| 53 | } | ||
| 54 | |||
| 55 | _reset() | ||
| 56 | { | ||
| 57 | f=$sysfs/$1 | ||
| 58 | echo reset > $f/state | ||
| 59 | } | ||
| 60 | |||
| 61 | reset() | ||
| 62 | { | ||
| 63 | if [ "`echo $1 | head -c3`" == "mic" ]; then | ||
| 64 | _reset $1 | ||
| 65 | return $? | ||
| 66 | fi | ||
| 67 | for f in $sysfs/* | ||
| 68 | do | ||
| 69 | _reset `basename $f` | ||
| 70 | RETVAL=$? | ||
| 71 | [ $RETVAL -ne 0 ] && return $RETVAL | ||
| 72 | done | ||
| 73 | return 0 | ||
| 74 | } | ||
| 75 | |||
| 76 | _boot() | ||
| 77 | { | ||
| 78 | f=$sysfs/$1 | ||
| 79 | echo "linux" > $f/bootmode | ||
| 80 | echo "mic/uos.img" > $f/firmware | ||
| 81 | echo "mic/$1.image" > $f/ramdisk | ||
| 82 | echo "boot" > $f/state | ||
| 83 | } | ||
| 84 | |||
| 85 | boot() | ||
| 86 | { | ||
| 87 | if [ "`echo $1 | head -c3`" == "mic" ]; then | ||
| 88 | _boot $1 | ||
| 89 | return $? | ||
| 90 | fi | ||
| 91 | for f in $sysfs/* | ||
| 92 | do | ||
| 93 | _boot `basename $f` | ||
| 94 | RETVAL=$? | ||
| 95 | [ $RETVAL -ne 0 ] && return $RETVAL | ||
| 96 | done | ||
| 97 | return 0 | ||
| 98 | } | ||
| 99 | |||
| 100 | _shutdown() | ||
| 101 | { | ||
| 102 | f=$sysfs/$1 | ||
| 103 | echo shutdown > $f/state | ||
| 104 | } | ||
| 105 | |||
| 106 | shutdown() | ||
| 107 | { | ||
| 108 | if [ "`echo $1 | head -c3`" == "mic" ]; then | ||
| 109 | _shutdown $1 | ||
| 110 | return $? | ||
| 111 | fi | ||
| 112 | for f in $sysfs/* | ||
| 113 | do | ||
| 114 | _shutdown `basename $f` | ||
| 115 | RETVAL=$? | ||
| 116 | [ $RETVAL -ne 0 ] && return $RETVAL | ||
| 117 | done | ||
| 118 | return 0 | ||
| 119 | } | ||
| 120 | |||
| 121 | _wait() | ||
| 122 | { | ||
| 123 | f=$sysfs/$1 | ||
| 124 | while [ "`cat $f/state`" != "offline" -a "`cat $f/state`" != "online" ] | ||
| 125 | do | ||
| 126 | sleep 1 | ||
| 127 | echo -e "Waiting for $1 to go offline" | ||
| 128 | done | ||
| 129 | } | ||
| 130 | |||
| 131 | wait() | ||
| 132 | { | ||
| 133 | if [ "`echo $1 | head -c3`" == "mic" ]; then | ||
| 134 | _wait $1 | ||
| 135 | return $? | ||
| 136 | fi | ||
| 137 | # Wait for the cards to go offline | ||
| 138 | for f in $sysfs/* | ||
| 139 | do | ||
| 140 | _wait `basename $f` | ||
| 141 | RETVAL=$? | ||
| 142 | [ $RETVAL -ne 0 ] && return $RETVAL | ||
| 143 | done | ||
| 144 | return 0 | ||
| 145 | } | ||
| 146 | |||
| 147 | if [ ! -d "$sysfs" ]; then | ||
| 148 | echo -e $"Module unloaded " | ||
| 149 | exit 3 | ||
| 150 | fi | ||
| 151 | |||
| 152 | case $1 in | ||
| 153 | -s) | ||
| 154 | status $2 | ||
| 155 | ;; | ||
| 156 | -r) | ||
| 157 | reset $2 | ||
| 158 | ;; | ||
| 159 | -b) | ||
| 160 | boot $2 | ||
| 161 | ;; | ||
| 162 | -S) | ||
| 163 | shutdown $2 | ||
| 164 | ;; | ||
| 165 | -w) | ||
| 166 | wait $2 | ||
| 167 | ;; | ||
| 168 | *) | ||
| 169 | echo $"Usage: $0 {-s (status) |-r (reset) |-b (boot) |-S (shutdown) |-w (wait)}" | ||
| 170 | exit 2 | ||
| 171 | esac | ||
| 172 | |||
| 173 | exit $? | ||
| @@ -0,0 +1,202 @@ | |||
| 1 | #!/bin/bash | ||
| 2 | # Intel MIC Platform Software Stack (MPSS) | ||
| 3 | # | ||
| 4 | # Copyright(c) 2013 Intel Corporation. | ||
| 5 | # | ||
| 6 | # This program is free software; you can redistribute it and/or modify | ||
| 7 | # it under the terms of the GNU General Public License, version 2, as | ||
| 8 | # published by the Free Software Foundation. | ||
| 9 | # | ||
| 10 | # This program is distributed in the hope that it will be useful, but | ||
| 11 | # WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 13 | # General Public License for more details. | ||
| 14 | # | ||
| 15 | # The full GNU General Public License is included in this distribution in | ||
| 16 | # the file called "COPYING". | ||
| 17 | # | ||
| 18 | # Intel MIC User Space Tools. | ||
| 19 | # | ||
| 20 | # mpss Start mpssd. | ||
| 21 | # | ||
| 22 | # chkconfig: 2345 95 05 | ||
| 23 | # description: start MPSS stack processing. | ||
| 24 | # | ||
| 25 | ### BEGIN INIT INFO | ||
| 26 | # Provides: mpss | ||
| 27 | # Required-Start: | ||
| 28 | # Required-Stop: | ||
| 29 | # Short-Description: MPSS stack control | ||
| 30 | # Description: MPSS stack control | ||
| 31 | ### END INIT INFO | ||
| 32 | |||
| 33 | # Source function library. | ||
| 34 | . /etc/init.d/functions | ||
| 35 | |||
| 36 | exec=/usr/sbin/mpssd | ||
| 37 | sysfs="/sys/class/mic" | ||
| 38 | |||
| 39 | start() | ||
| 40 | { | ||
| 41 | [ -x $exec ] || exit 5 | ||
| 42 | |||
| 43 | if [ "`ps -e | awk '{print $4}' | grep mpssd | head -1`" = "mpssd" ]; then | ||
| 44 | echo -e $"MPSSD already running! " | ||
| 45 | success | ||
| 46 | echo | ||
| 47 | return 0 | ||
| 48 | fi | ||
| 49 | |||
| 50 | echo -e $"Starting MPSS Stack" | ||
| 51 | echo -e $"Loading MIC_HOST Module" | ||
| 52 | |||
| 53 | # Ensure the driver is loaded | ||
| 54 | if [ ! -d "$sysfs" ]; then | ||
| 55 | modprobe mic_host | ||
| 56 | RETVAL=$? | ||
| 57 | if [ $RETVAL -ne 0 ]; then | ||
| 58 | failure | ||
| 59 | echo | ||
| 60 | return $RETVAL | ||
| 61 | fi | ||
| 62 | fi | ||
| 63 | |||
| 64 | # Start the daemon | ||
| 65 | echo -n $"Starting MPSSD " | ||
| 66 | $exec | ||
| 67 | RETVAL=$? | ||
| 68 | if [ $RETVAL -ne 0 ]; then | ||
| 69 | failure | ||
| 70 | echo | ||
| 71 | return $RETVAL | ||
| 72 | fi | ||
| 73 | success | ||
| 74 | echo | ||
| 75 | |||
| 76 | sleep 5 | ||
| 77 | |||
| 78 | # Boot the cards | ||
| 79 | micctrl -b | ||
| 80 | |||
| 81 | # Wait till ping works | ||
| 82 | for f in $sysfs/* | ||
| 83 | do | ||
| 84 | count=100 | ||
| 85 | ipaddr=`cat $f/cmdline` | ||
| 86 | ipaddr=${ipaddr#*address,} | ||
| 87 | ipaddr=`echo $ipaddr | cut -d, -f1 | cut -d\; -f1` | ||
| 88 | while [ $count -ge 0 ] | ||
| 89 | do | ||
| 90 | echo -e "Pinging "`basename $f`" " | ||
| 91 | ping -c 1 $ipaddr &> /dev/null | ||
| 92 | RETVAL=$? | ||
| 93 | if [ $RETVAL -eq 0 ]; then | ||
| 94 | success | ||
| 95 | break | ||
| 96 | fi | ||
| 97 | sleep 1 | ||
| 98 | count=`expr $count - 1` | ||
| 99 | done | ||
| 100 | [ $RETVAL -ne 0 ] && failure || success | ||
| 101 | echo | ||
| 102 | done | ||
| 103 | return $RETVAL | ||
| 104 | } | ||
| 105 | |||
| 106 | stop() | ||
| 107 | { | ||
| 108 | echo -e $"Shutting down MPSS Stack: " | ||
| 109 | |||
| 110 | # Bail out if module is unloaded | ||
| 111 | if [ ! -d "$sysfs" ]; then | ||
| 112 | echo -n $"Module unloaded " | ||
| 113 | success | ||
| 114 | echo | ||
| 115 | return 0 | ||
| 116 | fi | ||
| 117 | |||
| 118 | # Shut down the cards. | ||
| 119 | micctrl -S | ||
| 120 | |||
| 121 | # Wait for the cards to go offline | ||
| 122 | for f in $sysfs/* | ||
| 123 | do | ||
| 124 | while [ "`cat $f/state`" != "offline" ] | ||
| 125 | do | ||
| 126 | sleep 1 | ||
| 127 | echo -e "Waiting for "`basename $f`" to go offline" | ||
| 128 | done | ||
| 129 | done | ||
| 130 | |||
| 131 | # Display the status of the cards | ||
| 132 | micctrl -s | ||
| 133 | |||
| 134 | # Kill MPSSD now | ||
| 135 | echo -n $"Killing MPSSD" | ||
| 136 | killall -9 mpssd 2>/dev/null | ||
| 137 | RETVAL=$? | ||
| 138 | [ $RETVAL -ne 0 ] && failure || success | ||
| 139 | echo | ||
| 140 | return $RETVAL | ||
| 141 | } | ||
| 142 | |||
| 143 | restart() | ||
| 144 | { | ||
| 145 | stop | ||
| 146 | sleep 5 | ||
| 147 | start | ||
| 148 | } | ||
| 149 | |||
| 150 | status() | ||
| 151 | { | ||
| 152 | micctrl -s | ||
| 153 | if [ "`ps -e | awk '{print $4}' | grep mpssd | head -n 1`" = "mpssd" ]; then | ||
| 154 | echo "mpssd is running" | ||
| 155 | else | ||
| 156 | echo "mpssd is stopped" | ||
| 157 | fi | ||
| 158 | return 0 | ||
| 159 | } | ||
| 160 | |||
| 161 | unload() | ||
| 162 | { | ||
| 163 | if [ ! -d "$sysfs" ]; then | ||
| 164 | echo -n $"No MIC_HOST Module: " | ||
| 165 | success | ||
| 166 | echo | ||
| 167 | return | ||
| 168 | fi | ||
| 169 | |||
| 170 | stop | ||
| 171 | |||
| 172 | sleep 5 | ||
| 173 | echo -n $"Removing MIC_HOST Module: " | ||
| 174 | modprobe -r mic_host | ||
| 175 | RETVAL=$? | ||
| 176 | [ $RETVAL -ne 0 ] && failure || success | ||
| 177 | echo | ||
| 178 | return $RETVAL | ||
| 179 | } | ||
| 180 | |||
| 181 | case $1 in | ||
| 182 | start) | ||
| 183 | start | ||
| 184 | ;; | ||
| 185 | stop) | ||
| 186 | stop | ||
| 187 | ;; | ||
| 188 | restart) | ||
| 189 | restart | ||
| 190 | ;; | ||
| 191 | status) | ||
| 192 | status | ||
| 193 | ;; | ||
| 194 | unload) | ||
| 195 | unload | ||
| 196 | ;; | ||
| 197 | *) | ||
| 198 | echo $"Usage: $0 {start|stop|restart|status|unload}" | ||
| 199 | exit 2 | ||
| 200 | esac | ||
| 201 | |||
| 202 | exit $? | ||
| @@ -0,0 +1,1721 @@ | |||
| 1 | /* | ||
| 2 | * Intel MIC Platform Software Stack (MPSS) | ||
| 3 | * | ||
| 4 | * Copyright(c) 2013 Intel Corporation. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License, version 2, as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, but | ||
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 13 | * General Public License for more details. | ||
| 14 | * | ||
| 15 | * The full GNU General Public License is included in this distribution in | ||
| 16 | * the file called "COPYING". | ||
| 17 | * | ||
| 18 | * Intel MIC User Space Tools. | ||
| 19 | */ | ||
| 20 | |||
| 21 | #define _GNU_SOURCE | ||
| 22 | |||
| 23 | #include <stdlib.h> | ||
| 24 | #include <fcntl.h> | ||
| 25 | #include <getopt.h> | ||
| 26 | #include <assert.h> | ||
| 27 | #include <unistd.h> | ||
| 28 | #include <stdbool.h> | ||
| 29 | #include <signal.h> | ||
| 30 | #include <poll.h> | ||
| 31 | #include <features.h> | ||
| 32 | #include <sys/types.h> | ||
| 33 | #include <sys/stat.h> | ||
| 34 | #include <sys/mman.h> | ||
| 35 | #include <sys/socket.h> | ||
| 36 | #include <linux/virtio_ring.h> | ||
| 37 | #include <linux/virtio_net.h> | ||
| 38 | #include <linux/virtio_console.h> | ||
| 39 | #include <linux/virtio_blk.h> | ||
| 40 | #include <linux/version.h> | ||
| 41 | #include "mpssd.h" | ||
| 42 | #include <linux/mic_ioctl.h> | ||
| 43 | #include <linux/mic_common.h> | ||
| 44 | |||
| 45 | static void init_mic(struct mic_info *mic); | ||
| 46 | |||
| 47 | static FILE *logfp; | ||
| 48 | static struct mic_info mic_list; | ||
| 49 | |||
| 50 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) | ||
| 51 | |||
| 52 | #define min_t(type, x, y) ({ \ | ||
| 53 | type __min1 = (x); \ | ||
| 54 | type __min2 = (y); \ | ||
| 55 | __min1 < __min2 ? __min1 : __min2; }) | ||
| 56 | |||
| 57 | /* align addr on a size boundary - adjust address up/down if needed */ | ||
| 58 | #define _ALIGN_DOWN(addr, size) ((addr)&(~((size)-1))) | ||
| 59 | #define _ALIGN_UP(addr, size) _ALIGN_DOWN(addr + size - 1, size) | ||
| 60 | |||
| 61 | /* align addr on a size boundary - adjust address up if needed */ | ||
| 62 | #define _ALIGN(addr, size) _ALIGN_UP(addr, size) | ||
| 63 | |||
| 64 | /* to align the pointer to the (next) page boundary */ | ||
| 65 | #define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE) | ||
| 66 | |||
| 67 | #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) | ||
| 68 | |||
| 69 | #define GSO_ENABLED 1 | ||
| 70 | #define MAX_GSO_SIZE (64 * 1024) | ||
| 71 | #define ETH_H_LEN 14 | ||
| 72 | #define MAX_NET_PKT_SIZE (_ALIGN_UP(MAX_GSO_SIZE + ETH_H_LEN, 64)) | ||
| 73 | #define MIC_DEVICE_PAGE_END 0x1000 | ||
| 74 | |||
| 75 | #ifndef VIRTIO_NET_HDR_F_DATA_VALID | ||
| 76 | #define VIRTIO_NET_HDR_F_DATA_VALID 2 /* Csum is valid */ | ||
| 77 | #endif | ||
| 78 | |||
| 79 | static struct { | ||
| 80 | struct mic_device_desc dd; | ||
| 81 | struct mic_vqconfig vqconfig[2]; | ||
| 82 | __u32 host_features, guest_acknowledgements; | ||
| 83 | struct virtio_console_config cons_config; | ||
| 84 | } virtcons_dev_page = { | ||
| 85 | .dd = { | ||
| 86 | .type = VIRTIO_ID_CONSOLE, | ||
| 87 | .num_vq = ARRAY_SIZE(virtcons_dev_page.vqconfig), | ||
| 88 | .feature_len = sizeof(virtcons_dev_page.host_features), | ||
| 89 | .config_len = sizeof(virtcons_dev_page.cons_config), | ||
| 90 | }, | ||
| 91 | .vqconfig[0] = { | ||
| 92 | .num = htole16(MIC_VRING_ENTRIES), | ||
| 93 | }, | ||
| 94 | .vqconfig[1] = { | ||
| 95 | .num = htole16(MIC_VRING_ENTRIES), | ||
| 96 | }, | ||
| 97 | }; | ||
| 98 | |||
| 99 | static struct { | ||
| 100 | struct mic_device_desc dd; | ||
| 101 | struct mic_vqconfig vqconfig[2]; | ||
| 102 | __u32 host_features, guest_acknowledgements; | ||
| 103 | struct virtio_net_config net_config; | ||
| 104 | } virtnet_dev_page = { | ||
| 105 | .dd = { | ||
| 106 | .type = VIRTIO_ID_NET, | ||
| 107 | .num_vq = ARRAY_SIZE(virtnet_dev_page.vqconfig), | ||
| 108 | .feature_len = sizeof(virtnet_dev_page.host_features), | ||
| 109 | .config_len = sizeof(virtnet_dev_page.net_config), | ||
| 110 | }, | ||
| 111 | .vqconfig[0] = { | ||
| 112 | .num = htole16(MIC_VRING_ENTRIES), | ||
| 113 | }, | ||
| 114 | .vqconfig[1] = { | ||
| 115 | .num = htole16(MIC_VRING_ENTRIES), | ||
| 116 | }, | ||
| 117 | #if GSO_ENABLED | ||
| 118 | .host_features = htole32( | ||
| 119 | 1 << VIRTIO_NET_F_CSUM | | ||
| 120 | 1 << VIRTIO_NET_F_GSO | | ||
| 121 | 1 << VIRTIO_NET_F_GUEST_TSO4 | | ||
| 122 | 1 << VIRTIO_NET_F_GUEST_TSO6 | | ||
| 123 | 1 << VIRTIO_NET_F_GUEST_ECN | | ||
| 124 | 1 << VIRTIO_NET_F_GUEST_UFO), | ||
| 125 | #else | ||
| 126 | .host_features = 0, | ||
| 127 | #endif | ||
| 128 | }; | ||
| 129 | |||
| 130 | static const char *mic_config_dir = "/etc/sysconfig/mic"; | ||
| 131 | static const char *virtblk_backend = "VIRTBLK_BACKEND"; | ||
| 132 | static struct { | ||
| 133 | struct mic_device_desc dd; | ||
| 134 | struct mic_vqconfig vqconfig[1]; | ||
| 135 | __u32 host_features, guest_acknowledgements; | ||
| 136 | struct virtio_blk_config blk_config; | ||
| 137 | } virtblk_dev_page = { | ||
| 138 | .dd = { | ||
| 139 | .type = VIRTIO_ID_BLOCK, | ||
| 140 | .num_vq = ARRAY_SIZE(virtblk_dev_page.vqconfig), | ||
| 141 | .feature_len = sizeof(virtblk_dev_page.host_features), | ||
| 142 | .config_len = sizeof(virtblk_dev_page.blk_config), | ||
| 143 | }, | ||
| 144 | .vqconfig[0] = { | ||
| 145 | .num = htole16(MIC_VRING_ENTRIES), | ||
| 146 | }, | ||
| 147 | .host_features = | ||
| 148 | htole32(1<<VIRTIO_BLK_F_SEG_MAX), | ||
| 149 | .blk_config = { | ||
| 150 | .seg_max = htole32(MIC_VRING_ENTRIES - 2), | ||
| 151 | .capacity = htole64(0), | ||
| 152 | } | ||
| 153 | }; | ||
| 154 | |||
| 155 | static char *myname; | ||
| 156 | |||
| 157 | static int | ||
| 158 | tap_configure(struct mic_info *mic, char *dev) | ||
| 159 | { | ||
| 160 | pid_t pid; | ||
| 161 | char *ifargv[7]; | ||
| 162 | char ipaddr[IFNAMSIZ]; | ||
| 163 | int ret = 0; | ||
| 164 | |||
| 165 | pid = fork(); | ||
| 166 | if (pid == 0) { | ||
| 167 | ifargv[0] = "ip"; | ||
| 168 | ifargv[1] = "link"; | ||
| 169 | ifargv[2] = "set"; | ||
| 170 | ifargv[3] = dev; | ||
| 171 | ifargv[4] = "up"; | ||
| 172 | ifargv[5] = NULL; | ||
| 173 | mpsslog("Configuring %s\n", dev); | ||
| 174 | ret = execvp("ip", ifargv); | ||
| 175 | if (ret < 0) { | ||
| 176 | mpsslog("%s execvp failed errno %s\n", | ||
| 177 | mic->name, strerror(errno)); | ||
| 178 | return ret; | ||
| 179 | } | ||
| 180 | } | ||
| 181 | if (pid < 0) { | ||
| 182 | mpsslog("%s fork failed errno %s\n", | ||
| 183 | mic->name, strerror(errno)); | ||
| 184 | return ret; | ||
| 185 | } | ||
| 186 | |||
| 187 | ret = waitpid(pid, NULL, 0); | ||
| 188 | if (ret < 0) { | ||
| 189 | mpsslog("%s waitpid failed errno %s\n", | ||
| 190 | mic->name, strerror(errno)); | ||
| 191 | return ret; | ||
| 192 | } | ||
| 193 | |||
| 194 | snprintf(ipaddr, IFNAMSIZ, "172.31.%d.254/24", mic->id); | ||
| 195 | |||
| 196 | pid = fork(); | ||
| 197 | if (pid == 0) { | ||
| 198 | ifargv[0] = "ip"; | ||
| 199 | ifargv[1] = "addr"; | ||
| 200 | ifargv[2] = "add"; | ||
| 201 | ifargv[3] = ipaddr; | ||
| 202 | ifargv[4] = "dev"; | ||
| 203 | ifargv[5] = dev; | ||
| 204 | ifargv[6] = NULL; | ||
| 205 | mpsslog("Configuring %s ipaddr %s\n", dev, ipaddr); | ||
| 206 | ret = execvp("ip", ifargv); | ||
| 207 | if (ret < 0) { | ||
| 208 | mpsslog("%s execvp failed errno %s\n", | ||
| 209 | mic->name, strerror(errno)); | ||
| 210 | return ret; | ||
| 211 | } | ||
| 212 | } | ||
| 213 | if (pid < 0) { | ||
| 214 | mpsslog("%s fork failed errno %s\n", | ||
| 215 | mic->name, strerror(errno)); | ||
| 216 | return ret; | ||
| 217 | } | ||
| 218 | |||
| 219 | ret = waitpid(pid, NULL, 0); | ||
| 220 | if (ret < 0) { | ||
| 221 | mpsslog("%s waitpid failed errno %s\n", | ||
| 222 | mic->name, strerror(errno)); | ||
| 223 | return ret; | ||
| 224 | } | ||
| 225 | mpsslog("MIC name %s %s %d DONE!\n", | ||
| 226 | mic->name, __func__, __LINE__); | ||
| 227 | return 0; | ||
| 228 | } | ||
| 229 | |||
| 230 | static int tun_alloc(struct mic_info *mic, char *dev) | ||
| 231 | { | ||
| 232 | struct ifreq ifr; | ||
| 233 | int fd, err; | ||
| 234 | #if GSO_ENABLED | ||
| 235 | unsigned offload; | ||
| 236 | #endif | ||
| 237 | fd = open("/dev/net/tun", O_RDWR); | ||
| 238 | if (fd < 0) { | ||
| 239 | mpsslog("Could not open /dev/net/tun %s\n", strerror(errno)); | ||
| 240 | goto done; | ||
| 241 | } | ||
| 242 | |||
| 243 | memset(&ifr, 0, sizeof(ifr)); | ||
| 244 | |||
| 245 | ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_VNET_HDR; | ||
| 246 | if (*dev) | ||
| 247 | strncpy(ifr.ifr_name, dev, IFNAMSIZ); | ||
| 248 | |||
| 249 | err = ioctl(fd, TUNSETIFF, (void *)&ifr); | ||
| 250 | if (err < 0) { | ||
| 251 | mpsslog("%s %s %d TUNSETIFF failed %s\n", | ||
| 252 | mic->name, __func__, __LINE__, strerror(errno)); | ||
| 253 | close(fd); | ||
| 254 | return err; | ||
| 255 | } | ||
| 256 | #if GSO_ENABLED | ||
| 257 | offload = TUN_F_CSUM | TUN_F_TSO4 | TUN_F_TSO6 | | ||
| 258 | TUN_F_TSO_ECN | TUN_F_UFO; | ||
| 259 | |||
| 260 | err = ioctl(fd, TUNSETOFFLOAD, offload); | ||
| 261 | if (err < 0) { | ||
| 262 | mpsslog("%s %s %d TUNSETOFFLOAD failed %s\n", | ||
| 263 | mic->name, __func__, __LINE__, strerror(errno)); | ||
| 264 | close(fd); | ||
| 265 | return err; | ||
| 266 | } | ||
| 267 | #endif | ||
| 268 | strcpy(dev, ifr.ifr_name); | ||
| 269 | mpsslog("Created TAP %s\n", dev); | ||
| 270 | done: | ||
| 271 | return fd; | ||
| 272 | } | ||
| 273 | |||
| 274 | #define NET_FD_VIRTIO_NET 0 | ||
| 275 | #define NET_FD_TUN 1 | ||
| 276 | #define MAX_NET_FD 2 | ||
| 277 | |||
| 278 | static void set_dp(struct mic_info *mic, int type, void *dp) | ||
| 279 | { | ||
| 280 | switch (type) { | ||
| 281 | case VIRTIO_ID_CONSOLE: | ||
| 282 | mic->mic_console.console_dp = dp; | ||
| 283 | return; | ||
| 284 | case VIRTIO_ID_NET: | ||
| 285 | mic->mic_net.net_dp = dp; | ||
| 286 | return; | ||
| 287 | case VIRTIO_ID_BLOCK: | ||
| 288 | mic->mic_virtblk.block_dp = dp; | ||
| 289 | return; | ||
| 290 | } | ||
| 291 | mpsslog("%s %s %d not found\n", mic->name, __func__, type); | ||
| 292 | assert(0); | ||
| 293 | } | ||
| 294 | |||
| 295 | static void *get_dp(struct mic_info *mic, int type) | ||
| 296 | { | ||
| 297 | switch (type) { | ||
| 298 | case VIRTIO_ID_CONSOLE: | ||
| 299 | return mic->mic_console.console_dp; | ||
| 300 | case VIRTIO_ID_NET: | ||
| 301 | return mic->mic_net.net_dp; | ||
| 302 | case VIRTIO_ID_BLOCK: | ||
| 303 | return mic->mic_virtblk.block_dp; | ||
| 304 | } | ||
| 305 | mpsslog("%s %s %d not found\n", mic->name, __func__, type); | ||
| 306 | assert(0); | ||
| 307 | return NULL; | ||
| 308 | } | ||
| 309 | |||
| 310 | static struct mic_device_desc *get_device_desc(struct mic_info *mic, int type) | ||
| 311 | { | ||
| 312 | struct mic_device_desc *d; | ||
| 313 | int i; | ||
| 314 | void *dp = get_dp(mic, type); | ||
| 315 | |||
| 316 | for (i = mic_aligned_size(struct mic_bootparam); i < PAGE_SIZE; | ||
| 317 | i += mic_total_desc_size(d)) { | ||
| 318 | d = dp + i; | ||
| 319 | |||
| 320 | /* End of list */ | ||
| 321 | if (d->type == 0) | ||
| 322 | break; | ||
| 323 | |||
| 324 | if (d->type == -1) | ||
| 325 | continue; | ||
| 326 | |||
| 327 | mpsslog("%s %s d-> type %d d %p\n", | ||
| 328 | mic->name, __func__, d->type, d); | ||
| 329 | |||
| 330 | if (d->type == (__u8)type) | ||
| 331 | return d; | ||
| 332 | } | ||
| 333 | mpsslog("%s %s %d not found\n", mic->name, __func__, type); | ||
| 334 | assert(0); | ||
| 335 | return NULL; | ||
| 336 | } | ||
| 337 | |||
| 338 | /* See comments in vhost.c for explanation of next_desc() */ | ||
| 339 | static unsigned next_desc(struct vring_desc *desc) | ||
| 340 | { | ||
| 341 | unsigned int next; | ||
| 342 | |||
| 343 | if (!(le16toh(desc->flags) & VRING_DESC_F_NEXT)) | ||
| 344 | return -1U; | ||
| 345 | next = le16toh(desc->next); | ||
| 346 | return next; | ||
| 347 | } | ||
| 348 | |||
| 349 | /* Sum up all the IOVEC length */ | ||
| 350 | static ssize_t | ||
| 351 | sum_iovec_len(struct mic_copy_desc *copy) | ||
| 352 | { | ||
| 353 | ssize_t sum = 0; | ||
| 354 | int i; | ||
| 355 | |||
| 356 | for (i = 0; i < copy->iovcnt; i++) | ||
| 357 | sum += copy->iov[i].iov_len; | ||
| 358 | return sum; | ||
| 359 | } | ||
| 360 | |||
| 361 | static inline void verify_out_len(struct mic_info *mic, | ||
| 362 | struct mic_copy_desc *copy) | ||
| 363 | { | ||
| 364 | if (copy->out_len != sum_iovec_len(copy)) { | ||
| 365 | mpsslog("%s %s %d BUG copy->out_len 0x%x len 0x%zx\n", | ||
| 366 | mic->name, __func__, __LINE__, | ||
| 367 | copy->out_len, sum_iovec_len(copy)); | ||
| 368 | assert(copy->out_len == sum_iovec_len(copy)); | ||
| 369 | } | ||
| 370 | } | ||
| 371 | |||
| 372 | /* Display an iovec */ | ||
| 373 | static void | ||
| 374 | disp_iovec(struct mic_info *mic, struct mic_copy_desc *copy, | ||
| 375 | const char *s, int line) | ||
| 376 | { | ||
| 377 | int i; | ||
| 378 | |||
| 379 | for (i = 0; i < copy->iovcnt; i++) | ||
| 380 | mpsslog("%s %s %d copy->iov[%d] addr %p len 0x%zx\n", | ||
| 381 | mic->name, s, line, i, | ||
| 382 | copy->iov[i].iov_base, copy->iov[i].iov_len); | ||
| 383 | } | ||
| 384 | |||
| 385 | static inline __u16 read_avail_idx(struct mic_vring *vr) | ||
| 386 | { | ||
| 387 | return ACCESS_ONCE(vr->info->avail_idx); | ||
| 388 | } | ||
| 389 | |||
| 390 | static inline void txrx_prepare(int type, bool tx, struct mic_vring *vr, | ||
| 391 | struct mic_copy_desc *copy, ssize_t len) | ||
| 392 | { | ||
| 393 | copy->vr_idx = tx ? 0 : 1; | ||
| 394 | copy->update_used = true; | ||
| 395 | if (type == VIRTIO_ID_NET) | ||
| 396 | copy->iov[1].iov_len = len - sizeof(struct virtio_net_hdr); | ||
| 397 | else | ||
| 398 | copy->iov[0].iov_len = len; | ||
| 399 | } | ||
| 400 | |||
| 401 | /* Central API which triggers the copies */ | ||
| 402 | static int | ||
| 403 | mic_virtio_copy(struct mic_info *mic, int fd, | ||
| 404 | struct mic_vring *vr, struct mic_copy_desc *copy) | ||
| 405 | { | ||
| 406 | int ret; | ||
| 407 | |||
| 408 | ret = ioctl(fd, MIC_VIRTIO_COPY_DESC, copy); | ||
| 409 | if (ret) { | ||
| 410 | mpsslog("%s %s %d errno %s ret %d\n", | ||
| 411 | mic->name, __func__, __LINE__, | ||
| 412 | strerror(errno), ret); | ||
| 413 | } | ||
| 414 | return ret; | ||
| 415 | } | ||
| 416 | |||
| 417 | /* | ||
| 418 | * This initialization routine requires at least one | ||
| 419 | * vring i.e. vr0. vr1 is optional. | ||
| 420 | */ | ||
| 421 | static void * | ||
| 422 | init_vr(struct mic_info *mic, int fd, int type, | ||
| 423 | struct mic_vring *vr0, struct mic_vring *vr1, int num_vq) | ||
| 424 | { | ||
| 425 | int vr_size; | ||
| 426 | char *va; | ||
| 427 | |||
| 428 | vr_size = PAGE_ALIGN(vring_size(MIC_VRING_ENTRIES, | ||
| 429 | MIC_VIRTIO_RING_ALIGN) + sizeof(struct _mic_vring_info)); | ||
| 430 | va = mmap(NULL, MIC_DEVICE_PAGE_END + vr_size * num_vq, | ||
| 431 | PROT_READ, MAP_SHARED, fd, 0); | ||
| 432 | if (MAP_FAILED == va) { | ||
| 433 | mpsslog("%s %s %d mmap failed errno %s\n", | ||
| 434 | mic->name, __func__, __LINE__, | ||
| 435 | strerror(errno)); | ||
| 436 | goto done; | ||
| 437 | } | ||
| 438 | set_dp(mic, type, va); | ||
| 439 | vr0->va = (struct mic_vring *)&va[MIC_DEVICE_PAGE_END]; | ||
| 440 | vr0->info = vr0->va + | ||
| 441 | vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN); | ||
| 442 | vring_init(&vr0->vr, | ||
| 443 | MIC_VRING_ENTRIES, vr0->va, MIC_VIRTIO_RING_ALIGN); | ||
| 444 | mpsslog("%s %s vr0 %p vr0->info %p vr_size 0x%x vring 0x%x ", | ||
| 445 | __func__, mic->name, vr0->va, vr0->info, vr_size, | ||
| 446 | vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN)); | ||
| 447 | mpsslog("magic 0x%x expected 0x%x\n", | ||
| 448 | vr0->info->magic, MIC_MAGIC + type); | ||
| 449 | assert(vr0->info->magic == MIC_MAGIC + type); | ||
| 450 | if (vr1) { | ||
| 451 | vr1->va = (struct mic_vring *) | ||
| 452 | &va[MIC_DEVICE_PAGE_END + vr_size]; | ||
| 453 | vr1->info = vr1->va + vring_size(MIC_VRING_ENTRIES, | ||
| 454 | MIC_VIRTIO_RING_ALIGN); | ||
| 455 | vring_init(&vr1->vr, | ||
| 456 | MIC_VRING_ENTRIES, vr1->va, MIC_VIRTIO_RING_ALIGN); | ||
| 457 | mpsslog("%s %s vr1 %p vr1->info %p vr_size 0x%x vring 0x%x ", | ||
| 458 | __func__, mic->name, vr1->va, vr1->info, vr_size, | ||
| 459 | vring_size(MIC_VRING_ENTRIES, MIC_VIRTIO_RING_ALIGN)); | ||
| 460 | mpsslog("magic 0x%x expected 0x%x\n", | ||
| 461 | vr1->info->magic, MIC_MAGIC + type + 1); | ||
| 462 | assert(vr1->info->magic == MIC_MAGIC + type + 1); | ||
| 463 | } | ||
| 464 | done: | ||
| 465 | return va; | ||
| 466 | } | ||
| 467 | |||
| 468 | static void | ||
| 469 | wait_for_card_driver(struct mic_info *mic, int fd, int type) | ||
| 470 | { | ||
| 471 | struct pollfd pollfd; | ||
| 472 | int err; | ||
| 473 | struct mic_device_desc *desc = get_device_desc(mic, type); | ||
| 474 | |||
| 475 | pollfd.fd = fd; | ||
| 476 | mpsslog("%s %s Waiting .... desc-> type %d status 0x%x\n", | ||
| 477 | mic->name, __func__, type, desc->status); | ||
| 478 | while (1) { | ||
| 479 | pollfd.events = POLLIN; | ||
| 480 | pollfd.revents = 0; | ||
| 481 | err = poll(&pollfd, 1, -1); | ||
| 482 | if (err < 0) { | ||
| 483 | mpsslog("%s %s poll failed %s\n", | ||
| 484 | mic->name, __func__, strerror(errno)); | ||
| 485 | continue; | ||
| 486 | } | ||
| 487 | |||
| 488 | if (pollfd.revents) { | ||
| 489 | mpsslog("%s %s Waiting... desc-> type %d status 0x%x\n", | ||
| 490 | mic->name, __func__, type, desc->status); | ||
| 491 | if (desc->status & VIRTIO_CONFIG_S_DRIVER_OK) { | ||
| 492 | mpsslog("%s %s poll.revents %d\n", | ||
| 493 | mic->name, __func__, pollfd.revents); | ||
| 494 | mpsslog("%s %s desc-> type %d status 0x%x\n", | ||
| 495 | mic->name, __func__, type, | ||
| 496 | desc->status); | ||
| 497 | break; | ||
| 498 | } | ||
| 499 | } | ||
| 500 | } | ||
| 501 | } | ||
| 502 | |||
| 503 | /* Spin till we have some descriptors */ | ||
| 504 | static void | ||
| 505 | spin_for_descriptors(struct mic_info *mic, struct mic_vring *vr) | ||
| 506 | { | ||
| 507 | __u16 avail_idx = read_avail_idx(vr); | ||
| 508 | |||
| 509 | while (avail_idx == le16toh(ACCESS_ONCE(vr->vr.avail->idx))) { | ||
| 510 | #ifdef DEBUG | ||
| 511 | mpsslog("%s %s waiting for desc avail %d info_avail %d\n", | ||
| 512 | mic->name, __func__, | ||
| 513 | le16toh(vr->vr.avail->idx), vr->info->avail_idx); | ||
| 514 | #endif | ||
| 515 | sched_yield(); | ||
| 516 | } | ||
| 517 | } | ||
| 518 | |||
| 519 | static void * | ||
| 520 | virtio_net(void *arg) | ||
| 521 | { | ||
| 522 | static __u8 vnet_hdr[2][sizeof(struct virtio_net_hdr)]; | ||
| 523 | static __u8 vnet_buf[2][MAX_NET_PKT_SIZE] __aligned(64); | ||
| 524 | struct iovec vnet_iov[2][2] = { | ||
| 525 | { { .iov_base = vnet_hdr[0], .iov_len = sizeof(vnet_hdr[0]) }, | ||
| 526 | { .iov_base = vnet_buf[0], .iov_len = sizeof(vnet_buf[0]) } }, | ||
| 527 | { { .iov_base = vnet_hdr[1], .iov_len = sizeof(vnet_hdr[1]) }, | ||
| 528 | { .iov_base = vnet_buf[1], .iov_len = sizeof(vnet_buf[1]) } }, | ||
| 529 | }; | ||
| 530 | struct iovec *iov0 = vnet_iov[0], *iov1 = vnet_iov[1]; | ||
| 531 | struct mic_info *mic = (struct mic_info *)arg; | ||
| 532 | char if_name[IFNAMSIZ]; | ||
| 533 | struct pollfd net_poll[MAX_NET_FD]; | ||
| 534 | struct mic_vring tx_vr, rx_vr; | ||
| 535 | struct mic_copy_desc copy; | ||
| 536 | struct mic_device_desc *desc; | ||
| 537 | int err; | ||
| 538 | |||
| 539 | snprintf(if_name, IFNAMSIZ, "mic%d", mic->id); | ||
| 540 | mic->mic_net.tap_fd = tun_alloc(mic, if_name); | ||
| 541 | if (mic->mic_net.tap_fd < 0) | ||
| 542 | goto done; | ||
| 543 | |||
| 544 | if (tap_configure(mic, if_name)) | ||
| 545 | goto done; | ||
| 546 | mpsslog("MIC name %s id %d\n", mic->name, mic->id); | ||
| 547 | |||
| 548 | net_poll[NET_FD_VIRTIO_NET].fd = mic->mic_net.virtio_net_fd; | ||
| 549 | net_poll[NET_FD_VIRTIO_NET].events = POLLIN; | ||
| 550 | net_poll[NET_FD_TUN].fd = mic->mic_net.tap_fd; | ||
| 551 | net_poll[NET_FD_TUN].events = POLLIN; | ||
| 552 | |||
| 553 | if (MAP_FAILED == init_vr(mic, mic->mic_net.virtio_net_fd, | ||
| 554 | VIRTIO_ID_NET, &tx_vr, &rx_vr, | ||
| 555 | virtnet_dev_page.dd.num_vq)) { | ||
| 556 | mpsslog("%s init_vr failed %s\n", | ||
| 557 | mic->name, strerror(errno)); | ||
| 558 | goto done; | ||
| 559 | } | ||
| 560 | |||
| 561 | copy.iovcnt = 2; | ||
| 562 | desc = get_device_desc(mic, VIRTIO_ID_NET); | ||
| 563 | |||
| 564 | while (1) { | ||
| 565 | ssize_t len; | ||
| 566 | |||
| 567 | net_poll[NET_FD_VIRTIO_NET].revents = 0; | ||
| 568 | net_poll[NET_FD_TUN].revents = 0; | ||
| 569 | |||
| 570 | /* Start polling for data from tap and virtio net */ | ||
| 571 | err = poll(net_poll, 2, -1); | ||
| 572 | if (err < 0) { | ||
| 573 | mpsslog("%s poll failed %s\n", | ||
| 574 | __func__, strerror(errno)); | ||
| 575 | continue; | ||
| 576 | } | ||
| 577 | if (!(desc->status & VIRTIO_CONFIG_S_DRIVER_OK)) | ||
| 578 | wait_for_card_driver(mic, mic->mic_net.virtio_net_fd, | ||
| 579 | VIRTIO_ID_NET); | ||
| 580 | /* | ||
| 581 | * Check if there is data to be read from TUN and write to | ||
| 582 | * virtio net fd if there is. | ||
| 583 | */ | ||
| 584 | if (net_poll[NET_FD_TUN].revents & POLLIN) { | ||
| 585 | copy.iov = iov0; | ||
| 586 | len = readv(net_poll[NET_FD_TUN].fd, | ||
| 587 | copy.iov, copy.iovcnt); | ||
| 588 | if (len > 0) { | ||
| 589 | struct virtio_net_hdr *hdr | ||
| 590 | = (struct virtio_net_hdr *)vnet_hdr[0]; | ||
| 591 | |||
| 592 | /* Disable checksums on the card since we are on | ||
| 593 | a reliable PCIe link */ | ||
| 594 | hdr->flags |= VIRTIO_NET_HDR_F_DATA_VALID; | ||
| 595 | #ifdef DEBUG | ||
| 596 | mpsslog("%s %s %d hdr->flags 0x%x ", mic->name, | ||
| 597 | __func__, __LINE__, hdr->flags); | ||
| 598 | mpsslog("copy.out_len %d hdr->gso_type 0x%x\n", | ||
| 599 | copy.out_len, hdr->gso_type); | ||
| 600 | #endif | ||
| 601 | #ifdef DEBUG | ||
| 602 | disp_iovec(mic, copy, __func__, __LINE__); | ||
| 603 | mpsslog("%s %s %d read from tap 0x%lx\n", | ||
| 604 | mic->name, __func__, __LINE__, | ||
| 605 | len); | ||
| 606 | #endif | ||
| 607 | spin_for_descriptors(mic, &tx_vr); | ||
| 608 | txrx_prepare(VIRTIO_ID_NET, 1, &tx_vr, ©, | ||
| 609 | len); | ||
| 610 | |||
| 611 | err = mic_virtio_copy(mic, | ||
| 612 | mic->mic_net.virtio_net_fd, &tx_vr, | ||
| 613 | ©); | ||
| 614 | if (err < 0) { | ||
| 615 | mpsslog("%s %s %d mic_virtio_copy %s\n", | ||
| 616 | mic->name, __func__, __LINE__, | ||
| 617 | strerror(errno)); | ||
| 618 | } | ||
| 619 | if (!err) | ||
| 620 | verify_out_len(mic, ©); | ||
| 621 | #ifdef DEBUG | ||
| 622 | disp_iovec(mic, copy, __func__, __LINE__); | ||
| 623 | mpsslog("%s %s %d wrote to net 0x%lx\n", | ||
| 624 | mic->name, __func__, __LINE__, | ||
| 625 | sum_iovec_len(©)); | ||
| 626 | #endif | ||
| 627 | /* Reinitialize IOV for next run */ | ||
| 628 | iov0[1].iov_len = MAX_NET_PKT_SIZE; | ||
| 629 | } else if (len < 0) { | ||
| 630 | disp_iovec(mic, ©, __func__, __LINE__); | ||
| 631 | mpsslog("%s %s %d read failed %s ", mic->name, | ||
| 632 | __func__, __LINE__, strerror(errno)); | ||
| 633 | mpsslog("cnt %d sum %zd\n", | ||
| 634 | copy.iovcnt, sum_iovec_len(©)); | ||
| 635 | } | ||
| 636 | } | ||
| 637 | |||
| 638 | /* | ||
| 639 | * Check if there is data to be read from virtio net and | ||
| 640 | * write to TUN if there is. | ||
| 641 | */ | ||
| 642 | if (net_poll[NET_FD_VIRTIO_NET].revents & POLLIN) { | ||
| 643 | while (rx_vr.info->avail_idx != | ||
| 644 | le16toh(rx_vr.vr.avail->idx)) { | ||
| 645 | copy.iov = iov1; | ||
| 646 | txrx_prepare(VIRTIO_ID_NET, 0, &rx_vr, ©, | ||
| 647 | MAX_NET_PKT_SIZE | ||
| 648 | + sizeof(struct virtio_net_hdr)); | ||
| 649 | |||
| 650 | err = mic_virtio_copy(mic, | ||
| 651 | mic->mic_net.virtio_net_fd, &rx_vr, | ||
| 652 | ©); | ||
| 653 | if (!err) { | ||
| 654 | #ifdef DEBUG | ||
| 655 | struct virtio_net_hdr *hdr | ||
| 656 | = (struct virtio_net_hdr *) | ||
| 657 | vnet_hdr[1]; | ||
| 658 | |||
| 659 | mpsslog("%s %s %d hdr->flags 0x%x, ", | ||
| 660 | mic->name, __func__, __LINE__, | ||
| 661 | hdr->flags); | ||
| 662 | mpsslog("out_len %d gso_type 0x%x\n", | ||
| 663 | copy.out_len, | ||
| 664 | hdr->gso_type); | ||
| 665 | #endif | ||
| 666 | /* Set the correct output iov_len */ | ||
| 667 | iov1[1].iov_len = copy.out_len - | ||
| 668 | sizeof(struct virtio_net_hdr); | ||
| 669 | verify_out_len(mic, ©); | ||
| 670 | #ifdef DEBUG | ||
| 671 | disp_iovec(mic, copy, __func__, | ||
| 672 | __LINE__); | ||
| 673 | mpsslog("%s %s %d ", | ||
| 674 | mic->name, __func__, __LINE__); | ||
| 675 | mpsslog("read from net 0x%lx\n", | ||
| 676 | sum_iovec_len(copy)); | ||
| 677 | #endif | ||
| 678 | len = writev(net_poll[NET_FD_TUN].fd, | ||
| 679 | copy.iov, copy.iovcnt); | ||
| 680 | if (len != sum_iovec_len(©)) { | ||
| 681 | mpsslog("Tun write failed %s ", | ||
| 682 | strerror(errno)); | ||
| 683 | mpsslog("len 0x%zx ", len); | ||
| 684 | mpsslog("read_len 0x%zx\n", | ||
| 685 | sum_iovec_len(©)); | ||
| 686 | } else { | ||
| 687 | #ifdef DEBUG | ||
| 688 | disp_iovec(mic, ©, __func__, | ||
| 689 | __LINE__); | ||
| 690 | mpsslog("%s %s %d ", | ||
| 691 | mic->name, __func__, | ||
| 692 | __LINE__); | ||
| 693 | mpsslog("wrote to tap 0x%lx\n", | ||
| 694 | len); | ||
| 695 | #endif | ||
| 696 | } | ||
| 697 | } else { | ||
| 698 | mpsslog("%s %s %d mic_virtio_copy %s\n", | ||
| 699 | mic->name, __func__, __LINE__, | ||
| 700 | strerror(errno)); | ||
| 701 | break; | ||
| 702 | } | ||
| 703 | } | ||
| 704 | } | ||
| 705 | if (net_poll[NET_FD_VIRTIO_NET].revents & POLLERR) | ||
| 706 | mpsslog("%s: %s: POLLERR\n", __func__, mic->name); | ||
| 707 | } | ||
| 708 | done: | ||
| 709 | pthread_exit(NULL); | ||
| 710 | } | ||
| 711 | |||
| 712 | /* virtio_console */ | ||
| 713 | #define VIRTIO_CONSOLE_FD 0 | ||
| 714 | #define MONITOR_FD (VIRTIO_CONSOLE_FD + 1) | ||
| 715 | #define MAX_CONSOLE_FD (MONITOR_FD + 1) /* must be the last one + 1 */ | ||
| 716 | #define MAX_BUFFER_SIZE PAGE_SIZE | ||
| 717 | |||
| 718 | static void * | ||
| 719 | virtio_console(void *arg) | ||
| 720 | { | ||
| 721 | static __u8 vcons_buf[2][PAGE_SIZE]; | ||
| 722 | struct iovec vcons_iov[2] = { | ||
| 723 | { .iov_base = vcons_buf[0], .iov_len = sizeof(vcons_buf[0]) }, | ||
| 724 | { .iov_base = vcons_buf[1], .iov_len = sizeof(vcons_buf[1]) }, | ||
| 725 | }; | ||
| 726 | struct iovec *iov0 = &vcons_iov[0], *iov1 = &vcons_iov[1]; | ||
| 727 | struct mic_info *mic = (struct mic_info *)arg; | ||
| 728 | int err; | ||
| 729 | struct pollfd console_poll[MAX_CONSOLE_FD]; | ||
| 730 | int pty_fd; | ||
| 731 | char *pts_name; | ||
| 732 | ssize_t len; | ||
| 733 | struct mic_vring tx_vr, rx_vr; | ||
| 734 | struct mic_copy_desc copy; | ||
| 735 | struct mic_device_desc *desc; | ||
| 736 | |||
| 737 | pty_fd = posix_openpt(O_RDWR); | ||
| 738 | if (pty_fd < 0) { | ||
| 739 | mpsslog("can't open a pseudoterminal master device: %s\n", | ||
| 740 | strerror(errno)); | ||
| 741 | goto _return; | ||
| 742 | } | ||
| 743 | pts_name = ptsname(pty_fd); | ||
| 744 | if (pts_name == NULL) { | ||
| 745 | mpsslog("can't get pts name\n"); | ||
| 746 | goto _close_pty; | ||
| 747 | } | ||
| 748 | printf("%s console message goes to %s\n", mic->name, pts_name); | ||
| 749 | mpsslog("%s console message goes to %s\n", mic->name, pts_name); | ||
| 750 | err = grantpt(pty_fd); | ||
| 751 | if (err < 0) { | ||
| 752 | mpsslog("can't grant access: %s %s\n", | ||
| 753 | pts_name, strerror(errno)); | ||
| 754 | goto _close_pty; | ||
| 755 | } | ||
| 756 | err = unlockpt(pty_fd); | ||
| 757 | if (err < 0) { | ||
| 758 | mpsslog("can't unlock a pseudoterminal: %s %s\n", | ||
| 759 | pts_name, strerror(errno)); | ||
| 760 | goto _close_pty; | ||
| 761 | } | ||
| 762 | console_poll[MONITOR_FD].fd = pty_fd; | ||
| 763 | console_poll[MONITOR_FD].events = POLLIN; | ||
| 764 | |||
| 765 | console_poll[VIRTIO_CONSOLE_FD].fd = mic->mic_console.virtio_console_fd; | ||
| 766 | console_poll[VIRTIO_CONSOLE_FD].events = POLLIN; | ||
| 767 | |||
| 768 | if (MAP_FAILED == init_vr(mic, mic->mic_console.virtio_console_fd, | ||
| 769 | VIRTIO_ID_CONSOLE, &tx_vr, &rx_vr, | ||
| 770 | virtcons_dev_page.dd.num_vq)) { | ||
| 771 | mpsslog("%s init_vr failed %s\n", | ||
| 772 | mic->name, strerror(errno)); | ||
| 773 | goto _close_pty; | ||
| 774 | } | ||
| 775 | |||
| 776 | copy.iovcnt = 1; | ||
| 777 | desc = get_device_desc(mic, VIRTIO_ID_CONSOLE); | ||
| 778 | |||
| 779 | for (;;) { | ||
| 780 | console_poll[MONITOR_FD].revents = 0; | ||
| 781 | console_poll[VIRTIO_CONSOLE_FD].revents = 0; | ||
| 782 | err = poll(console_poll, MAX_CONSOLE_FD, -1); | ||
| 783 | if (err < 0) { | ||
| 784 | mpsslog("%s %d: poll failed: %s\n", __func__, __LINE__, | ||
| 785 | strerror(errno)); | ||
| 786 | continue; | ||
| 787 | } | ||
| 788 | if (!(desc->status & VIRTIO_CONFIG_S_DRIVER_OK)) | ||
| 789 | wait_for_card_driver(mic, | ||
| 790 | mic->mic_console.virtio_console_fd, | ||
| 791 | VIRTIO_ID_CONSOLE); | ||
| 792 | |||
| 793 | if (console_poll[MONITOR_FD].revents & POLLIN) { | ||
| 794 | copy.iov = iov0; | ||
| 795 | len = readv(pty_fd, copy.iov, copy.iovcnt); | ||
| 796 | if (len > 0) { | ||
| 797 | #ifdef DEBUG | ||
| 798 | disp_iovec(mic, copy, __func__, __LINE__); | ||
| 799 | mpsslog("%s %s %d read from tap 0x%lx\n", | ||
| 800 | mic->name, __func__, __LINE__, | ||
| 801 | len); | ||
| 802 | #endif | ||
| 803 | spin_for_descriptors(mic, &tx_vr); | ||
| 804 | txrx_prepare(VIRTIO_ID_CONSOLE, 1, &tx_vr, | ||
| 805 | ©, len); | ||
| 806 | |||
| 807 | err = mic_virtio_copy(mic, | ||
| 808 | mic->mic_console.virtio_console_fd, | ||
| 809 | &tx_vr, ©); | ||
| 810 | if (err < 0) { | ||
| 811 | mpsslog("%s %s %d mic_virtio_copy %s\n", | ||
| 812 | mic->name, __func__, __LINE__, | ||
| 813 | strerror(errno)); | ||
| 814 | } | ||
| 815 | if (!err) | ||
| 816 | verify_out_len(mic, ©); | ||
| 817 | #ifdef DEBUG | ||
| 818 | disp_iovec(mic, copy, __func__, __LINE__); | ||
| 819 | mpsslog("%s %s %d wrote to net 0x%lx\n", | ||
| 820 | mic->name, __func__, __LINE__, | ||
| 821 | sum_iovec_len(copy)); | ||
| 822 | #endif | ||
| 823 | /* Reinitialize IOV for next run */ | ||
| 824 | iov0->iov_len = PAGE_SIZE; | ||
| 825 | } else if (len < 0) { | ||
| 826 | disp_iovec(mic, ©, __func__, __LINE__); | ||
| 827 | mpsslog("%s %s %d read failed %s ", | ||
| 828 | mic->name, __func__, __LINE__, | ||
| 829 | strerror(errno)); | ||
| 830 | mpsslog("cnt %d sum %zd\n", | ||
| 831 | copy.iovcnt, sum_iovec_len(©)); | ||
| 832 | } | ||
| 833 | } | ||
| 834 | |||
| 835 | if (console_poll[VIRTIO_CONSOLE_FD].revents & POLLIN) { | ||
| 836 | while (rx_vr.info->avail_idx != | ||
| 837 | le16toh(rx_vr.vr.avail->idx)) { | ||
| 838 | copy.iov = iov1; | ||
| 839 | txrx_prepare(VIRTIO_ID_CONSOLE, 0, &rx_vr, | ||
| 840 | ©, PAGE_SIZE); | ||
| 841 | |||
| 842 | err = mic_virtio_copy(mic, | ||
| 843 | mic->mic_console.virtio_console_fd, | ||
| 844 | &rx_vr, ©); | ||
| 845 | if (!err) { | ||
| 846 | /* Set the correct output iov_len */ | ||
| 847 | iov1->iov_len = copy.out_len; | ||
| 848 | verify_out_len(mic, ©); | ||
| 849 | #ifdef DEBUG | ||
| 850 | disp_iovec(mic, copy, __func__, | ||
| 851 | __LINE__); | ||
| 852 | mpsslog("%s %s %d ", | ||
| 853 | mic->name, __func__, __LINE__); | ||
| 854 | mpsslog("read from net 0x%lx\n", | ||
| 855 | sum_iovec_len(copy)); | ||
| 856 | #endif | ||
| 857 | len = writev(pty_fd, | ||
| 858 | copy.iov, copy.iovcnt); | ||
| 859 | if (len != sum_iovec_len(©)) { | ||
| 860 | mpsslog("Tun write failed %s ", | ||
| 861 | strerror(errno)); | ||
| 862 | mpsslog("len 0x%zx ", len); | ||
| 863 | mpsslog("read_len 0x%zx\n", | ||
| 864 | sum_iovec_len(©)); | ||
| 865 | } else { | ||
| 866 | #ifdef DEBUG | ||
| 867 | disp_iovec(mic, copy, __func__, | ||
| 868 | __LINE__); | ||
| 869 | mpsslog("%s %s %d ", | ||
| 870 | mic->name, __func__, | ||
| 871 | __LINE__); | ||
| 872 | mpsslog("wrote to tap 0x%lx\n", | ||
| 873 | len); | ||
| 874 | #endif | ||
| 875 | } | ||
| 876 | } else { | ||
| 877 | mpsslog("%s %s %d mic_virtio_copy %s\n", | ||
| 878 | mic->name, __func__, __LINE__, | ||
| 879 | strerror(errno)); | ||
| 880 | break; | ||
| 881 | } | ||
| 882 | } | ||
| 883 | } | ||
| 884 | if (console_poll[NET_FD_VIRTIO_NET].revents & POLLERR) | ||
| 885 | mpsslog("%s: %s: POLLERR\n", __func__, mic->name); | ||
| 886 | } | ||
| 887 | _close_pty: | ||
| 888 | close(pty_fd); | ||
| 889 | _return: | ||
| 890 | pthread_exit(NULL); | ||
| 891 | } | ||
| 892 | |||
| 893 | static void | ||
| 894 | add_virtio_device(struct mic_info *mic, struct mic_device_desc *dd) | ||
| 895 | { | ||
| 896 | char path[PATH_MAX]; | ||
| 897 | int fd, err; | ||
| 898 | |||
| 899 | snprintf(path, PATH_MAX, "/dev/mic%d", mic->id); | ||
| 900 | fd = open(path, O_RDWR); | ||
| 901 | if (fd < 0) { | ||
| 902 | mpsslog("Could not open %s %s\n", path, strerror(errno)); | ||
| 903 | return; | ||
| 904 | } | ||
| 905 | |||
| 906 | err = ioctl(fd, MIC_VIRTIO_ADD_DEVICE, dd); | ||
| 907 | if (err < 0) { | ||
| 908 | mpsslog("Could not add %d %s\n", dd->type, strerror(errno)); | ||
| 909 | close(fd); | ||
| 910 | return; | ||
| 911 | } | ||
| 912 | switch (dd->type) { | ||
| 913 | case VIRTIO_ID_NET: | ||
| 914 | mic->mic_net.virtio_net_fd = fd; | ||
| 915 | mpsslog("Added VIRTIO_ID_NET for %s\n", mic->name); | ||
| 916 | break; | ||
| 917 | case VIRTIO_ID_CONSOLE: | ||
| 918 | mic->mic_console.virtio_console_fd = fd; | ||
| 919 | mpsslog("Added VIRTIO_ID_CONSOLE for %s\n", mic->name); | ||
| 920 | break; | ||
| 921 | case VIRTIO_ID_BLOCK: | ||
| 922 | mic->mic_virtblk.virtio_block_fd = fd; | ||
| 923 | mpsslog("Added VIRTIO_ID_BLOCK for %s\n", mic->name); | ||
| 924 | break; | ||
| 925 | } | ||
| 926 | } | ||
| 927 | |||
| 928 | static bool | ||
| 929 | set_backend_file(struct mic_info *mic) | ||
| 930 | { | ||
| 931 | FILE *config; | ||
| 932 | char buff[PATH_MAX], *line, *evv, *p; | ||
| 933 | |||
| 934 | snprintf(buff, PATH_MAX, "%s/mpssd%03d.conf", mic_config_dir, mic->id); | ||
| 935 | config = fopen(buff, "r"); | ||
| 936 | if (config == NULL) | ||
| 937 | return false; | ||
| 938 | do { /* look for "virtblk_backend=XXXX" */ | ||
| 939 | line = fgets(buff, PATH_MAX, config); | ||
| 940 | if (line == NULL) | ||
| 941 | break; | ||
| 942 | if (*line == '#') | ||
| 943 | continue; | ||
| 944 | p = strchr(line, '\n'); | ||
| 945 | if (p) | ||
| 946 | *p = '\0'; | ||
| 947 | } while (strncmp(line, virtblk_backend, strlen(virtblk_backend)) != 0); | ||
| 948 | fclose(config); | ||
| 949 | if (line == NULL) | ||
| 950 | return false; | ||
| 951 | evv = strchr(line, '='); | ||
| 952 | if (evv == NULL) | ||
| 953 | return false; | ||
| 954 | mic->mic_virtblk.backend_file = malloc(strlen(evv) + 1); | ||
| 955 | if (mic->mic_virtblk.backend_file == NULL) { | ||
| 956 | mpsslog("%s %d can't allocate memory\n", mic->name, mic->id); | ||
| 957 | return false; | ||
| 958 | } | ||
| 959 | strcpy(mic->mic_virtblk.backend_file, evv + 1); | ||
| 960 | return true; | ||
| 961 | } | ||
| 962 | |||
| 963 | #define SECTOR_SIZE 512 | ||
| 964 | static bool | ||
| 965 | set_backend_size(struct mic_info *mic) | ||
| 966 | { | ||
| 967 | mic->mic_virtblk.backend_size = lseek(mic->mic_virtblk.backend, 0, | ||
| 968 | SEEK_END); | ||
| 969 | if (mic->mic_virtblk.backend_size < 0) { | ||
| 970 | mpsslog("%s: can't seek: %s\n", | ||
| 971 | mic->name, mic->mic_virtblk.backend_file); | ||
| 972 | return false; | ||
| 973 | } | ||
| 974 | virtblk_dev_page.blk_config.capacity = | ||
| 975 | mic->mic_virtblk.backend_size / SECTOR_SIZE; | ||
| 976 | if ((mic->mic_virtblk.backend_size % SECTOR_SIZE) != 0) | ||
| 977 | virtblk_dev_page.blk_config.capacity++; | ||
| 978 | |||
| 979 | virtblk_dev_page.blk_config.capacity = | ||
| 980 | htole64(virtblk_dev_page.blk_config.capacity); | ||
| 981 | |||
| 982 | return true; | ||
| 983 | } | ||
| 984 | |||
| 985 | static bool | ||
| 986 | open_backend(struct mic_info *mic) | ||
| 987 | { | ||
| 988 | if (!set_backend_file(mic)) | ||
| 989 | goto _error_exit; | ||
| 990 | mic->mic_virtblk.backend = open(mic->mic_virtblk.backend_file, O_RDWR); | ||
| 991 | if (mic->mic_virtblk.backend < 0) { | ||
| 992 | mpsslog("%s: can't open: %s\n", mic->name, | ||
| 993 | mic->mic_virtblk.backend_file); | ||
| 994 | goto _error_free; | ||
| 995 | } | ||
| 996 | if (!set_backend_size(mic)) | ||
| 997 | goto _error_close; | ||
| 998 | mic->mic_virtblk.backend_addr = mmap(NULL, | ||
| 999 | mic->mic_virtblk.backend_size, | ||
| 1000 | PROT_READ|PROT_WRITE, MAP_SHARED, | ||
| 1001 | mic->mic_virtblk.backend, 0L); | ||
| 1002 | if (mic->mic_virtblk.backend_addr == MAP_FAILED) { | ||
| 1003 | mpsslog("%s: can't map: %s %s\n", | ||
| 1004 | mic->name, mic->mic_virtblk.backend_file, | ||
| 1005 | strerror(errno)); | ||
| 1006 | goto _error_close; | ||
| 1007 | } | ||
| 1008 | return true; | ||
| 1009 | |||
| 1010 | _error_close: | ||
| 1011 | close(mic->mic_virtblk.backend); | ||
| 1012 | _error_free: | ||
| 1013 | free(mic->mic_virtblk.backend_file); | ||
| 1014 | _error_exit: | ||
| 1015 | return false; | ||
| 1016 | } | ||
| 1017 | |||
| 1018 | static void | ||
| 1019 | close_backend(struct mic_info *mic) | ||
| 1020 | { | ||
| 1021 | munmap(mic->mic_virtblk.backend_addr, mic->mic_virtblk.backend_size); | ||
| 1022 | close(mic->mic_virtblk.backend); | ||
| 1023 | free(mic->mic_virtblk.backend_file); | ||
| 1024 | } | ||
| 1025 | |||
| 1026 | static bool | ||
| 1027 | start_virtblk(struct mic_info *mic, struct mic_vring *vring) | ||
| 1028 | { | ||
| 1029 | if (((unsigned long)&virtblk_dev_page.blk_config % 8) != 0) { | ||
| 1030 | mpsslog("%s: blk_config is not 8 byte aligned.\n", | ||
| 1031 | mic->name); | ||
| 1032 | return false; | ||
| 1033 | } | ||
| 1034 | add_virtio_device(mic, &virtblk_dev_page.dd); | ||
| 1035 | if (MAP_FAILED == init_vr(mic, mic->mic_virtblk.virtio_block_fd, | ||
| 1036 | VIRTIO_ID_BLOCK, vring, NULL, | ||
| 1037 | virtblk_dev_page.dd.num_vq)) { | ||
| 1038 | mpsslog("%s init_vr failed %s\n", | ||
| 1039 | mic->name, strerror(errno)); | ||
| 1040 | return false; | ||
| 1041 | } | ||
| 1042 | return true; | ||
| 1043 | } | ||
| 1044 | |||
| 1045 | static void | ||
| 1046 | stop_virtblk(struct mic_info *mic) | ||
| 1047 | { | ||
| 1048 | int vr_size, ret; | ||
| 1049 | |||
| 1050 | vr_size = PAGE_ALIGN(vring_size(MIC_VRING_ENTRIES, | ||
| 1051 | MIC_VIRTIO_RING_ALIGN) + sizeof(struct _mic_vring_info)); | ||
| 1052 | ret = munmap(mic->mic_virtblk.block_dp, | ||
| 1053 | MIC_DEVICE_PAGE_END + vr_size * virtblk_dev_page.dd.num_vq); | ||
| 1054 | if (ret < 0) | ||
| 1055 | mpsslog("%s munmap errno %d\n", mic->name, errno); | ||
| 1056 | close(mic->mic_virtblk.virtio_block_fd); | ||
| 1057 | } | ||
| 1058 | |||
| 1059 | static __u8 | ||
| 1060 | header_error_check(struct vring_desc *desc) | ||
| 1061 | { | ||
| 1062 | if (le32toh(desc->len) != sizeof(struct virtio_blk_outhdr)) { | ||
| 1063 | mpsslog("%s() %d: length is not sizeof(virtio_blk_outhd)\n", | ||
| 1064 | __func__, __LINE__); | ||
| 1065 | return -EIO; | ||
| 1066 | } | ||
| 1067 | if (!(le16toh(desc->flags) & VRING_DESC_F_NEXT)) { | ||
| 1068 | mpsslog("%s() %d: alone\n", | ||
| 1069 | __func__, __LINE__); | ||
| 1070 | return -EIO; | ||
| 1071 | } | ||
| 1072 | if (le16toh(desc->flags) & VRING_DESC_F_WRITE) { | ||
| 1073 | mpsslog("%s() %d: not read\n", | ||
| 1074 | __func__, __LINE__); | ||
| 1075 | return -EIO; | ||
| 1076 | } | ||
| 1077 | return 0; | ||
| 1078 | } | ||
| 1079 | |||
| 1080 | static int | ||
| 1081 | read_header(int fd, struct virtio_blk_outhdr *hdr, __u32 desc_idx) | ||
| 1082 | { | ||
| 1083 | struct iovec iovec; | ||
| 1084 | struct mic_copy_desc copy; | ||
| 1085 | |||
| 1086 | iovec.iov_len = sizeof(*hdr); | ||
| 1087 | iovec.iov_base = hdr; | ||
| 1088 | copy.iov = &iovec; | ||
| 1089 | copy.iovcnt = 1; | ||
| 1090 | copy.vr_idx = 0; /* only one vring on virtio_block */ | ||
| 1091 | copy.update_used = false; /* do not update used index */ | ||
| 1092 | return ioctl(fd, MIC_VIRTIO_COPY_DESC, ©); | ||
| 1093 | } | ||
| 1094 | |||
| 1095 | static int | ||
| 1096 | transfer_blocks(int fd, struct iovec *iovec, __u32 iovcnt) | ||
| 1097 | { | ||
| 1098 | struct mic_copy_desc copy; | ||
| 1099 | |||
| 1100 | copy.iov = iovec; | ||
| 1101 | copy.iovcnt = iovcnt; | ||
| 1102 | copy.vr_idx = 0; /* only one vring on virtio_block */ | ||
| 1103 | copy.update_used = false; /* do not update used index */ | ||
| 1104 | return ioctl(fd, MIC_VIRTIO_COPY_DESC, ©); | ||
| 1105 | } | ||
| 1106 | |||
| 1107 | static __u8 | ||
| 1108 | status_error_check(struct vring_desc *desc) | ||
| 1109 | { | ||
| 1110 | if (le32toh(desc->len) != sizeof(__u8)) { | ||
| 1111 | mpsslog("%s() %d: length is not sizeof(status)\n", | ||
| 1112 | __func__, __LINE__); | ||
| 1113 | return -EIO; | ||
| 1114 | } | ||
| 1115 | return 0; | ||
| 1116 | } | ||
| 1117 | |||
| 1118 | static int | ||
| 1119 | write_status(int fd, __u8 *status) | ||
| 1120 | { | ||
| 1121 | struct iovec iovec; | ||
| 1122 | struct mic_copy_desc copy; | ||
| 1123 | |||
| 1124 | iovec.iov_base = status; | ||
| 1125 | iovec.iov_len = sizeof(*status); | ||
| 1126 | copy.iov = &iovec; | ||
| 1127 | copy.iovcnt = 1; | ||
| 1128 | copy.vr_idx = 0; /* only one vring on virtio_block */ | ||
| 1129 | copy.update_used = true; /* Update used index */ | ||
| 1130 | return ioctl(fd, MIC_VIRTIO_COPY_DESC, ©); | ||
| 1131 | } | ||
| 1132 | |||
| 1133 | static void * | ||
| 1134 | virtio_block(void *arg) | ||
| 1135 | { | ||
| 1136 | struct mic_info *mic = (struct mic_info *)arg; | ||
| 1137 | int ret; | ||
| 1138 | struct pollfd block_poll; | ||
| 1139 | struct mic_vring vring; | ||
| 1140 | __u16 avail_idx; | ||
| 1141 | __u32 desc_idx; | ||
| 1142 | struct vring_desc *desc; | ||
| 1143 | struct iovec *iovec, *piov; | ||
| 1144 | __u8 status; | ||
| 1145 | __u32 buffer_desc_idx; | ||
| 1146 | struct virtio_blk_outhdr hdr; | ||
| 1147 | void *fos; | ||
| 1148 | |||
| 1149 | for (;;) { /* forever */ | ||
| 1150 | if (!open_backend(mic)) { /* No virtblk */ | ||
| 1151 | for (mic->mic_virtblk.signaled = 0; | ||
| 1152 | !mic->mic_virtblk.signaled;) | ||
| 1153 | sleep(1); | ||
| 1154 | continue; | ||
| 1155 | } | ||
| 1156 | |||
| 1157 | /* backend file is specified. */ | ||
| 1158 | if (!start_virtblk(mic, &vring)) | ||
| 1159 | goto _close_backend; | ||
| 1160 | iovec = malloc(sizeof(*iovec) * | ||
| 1161 | le32toh(virtblk_dev_page.blk_config.seg_max)); | ||
| 1162 | if (!iovec) { | ||
| 1163 | mpsslog("%s: can't alloc iovec: %s\n", | ||
| 1164 | mic->name, strerror(ENOMEM)); | ||
| 1165 | goto _stop_virtblk; | ||
| 1166 | } | ||
| 1167 | |||
| 1168 | block_poll.fd = mic->mic_virtblk.virtio_block_fd; | ||
| 1169 | block_poll.events = POLLIN; | ||
| 1170 | for (mic->mic_virtblk.signaled = 0; | ||
| 1171 | !mic->mic_virtblk.signaled;) { | ||
| 1172 | block_poll.revents = 0; | ||
| 1173 | /* timeout in 1 sec to see signaled */ | ||
| 1174 | ret = poll(&block_poll, 1, 1000); | ||
| 1175 | if (ret < 0) { | ||
| 1176 | mpsslog("%s %d: poll failed: %s\n", | ||
| 1177 | __func__, __LINE__, | ||
| 1178 | strerror(errno)); | ||
| 1179 | continue; | ||
| 1180 | } | ||
| 1181 | |||
| 1182 | if (!(block_poll.revents & POLLIN)) { | ||
| 1183 | #ifdef DEBUG | ||
| 1184 | mpsslog("%s %d: block_poll.revents=0x%x\n", | ||
| 1185 | __func__, __LINE__, block_poll.revents); | ||
| 1186 | #endif | ||
| 1187 | continue; | ||
| 1188 | } | ||
| 1189 | |||
| 1190 | /* POLLIN */ | ||
| 1191 | while (vring.info->avail_idx != | ||
| 1192 | le16toh(vring.vr.avail->idx)) { | ||
| 1193 | /* read header element */ | ||
| 1194 | avail_idx = | ||
| 1195 | vring.info->avail_idx & | ||
| 1196 | (vring.vr.num - 1); | ||
| 1197 | desc_idx = le16toh( | ||
| 1198 | vring.vr.avail->ring[avail_idx]); | ||
| 1199 | desc = &vring.vr.desc[desc_idx]; | ||
| 1200 | #ifdef DEBUG | ||
| 1201 | mpsslog("%s() %d: avail_idx=%d ", | ||
| 1202 | __func__, __LINE__, | ||
| 1203 | vring.info->avail_idx); | ||
| 1204 | mpsslog("vring.vr.num=%d desc=%p\n", | ||
| 1205 | vring.vr.num, desc); | ||
| 1206 | #endif | ||
| 1207 | status = header_error_check(desc); | ||
| 1208 | ret = read_header( | ||
| 1209 | mic->mic_virtblk.virtio_block_fd, | ||
| 1210 | &hdr, desc_idx); | ||
| 1211 | if (ret < 0) { | ||
| 1212 | mpsslog("%s() %d %s: ret=%d %s\n", | ||
| 1213 | __func__, __LINE__, | ||
| 1214 | mic->name, ret, | ||
| 1215 | strerror(errno)); | ||
| 1216 | break; | ||
| 1217 | } | ||
| 1218 | /* buffer element */ | ||
| 1219 | piov = iovec; | ||
| 1220 | status = 0; | ||
| 1221 | fos = mic->mic_virtblk.backend_addr + | ||
| 1222 | (hdr.sector * SECTOR_SIZE); | ||
| 1223 | buffer_desc_idx = next_desc(desc); | ||
| 1224 | desc_idx = buffer_desc_idx; | ||
| 1225 | for (desc = &vring.vr.desc[buffer_desc_idx]; | ||
| 1226 | desc->flags & VRING_DESC_F_NEXT; | ||
| 1227 | desc_idx = next_desc(desc), | ||
| 1228 | desc = &vring.vr.desc[desc_idx]) { | ||
| 1229 | piov->iov_len = desc->len; | ||
| 1230 | piov->iov_base = fos; | ||
| 1231 | piov++; | ||
| 1232 | fos += desc->len; | ||
| 1233 | } | ||
| 1234 | /* Returning NULLs for VIRTIO_BLK_T_GET_ID. */ | ||
| 1235 | if (hdr.type & ~(VIRTIO_BLK_T_OUT | | ||
| 1236 | VIRTIO_BLK_T_GET_ID)) { | ||
| 1237 | /* | ||
| 1238 | VIRTIO_BLK_T_IN - does not do | ||
| 1239 | anything. Probably for documenting. | ||
| 1240 | VIRTIO_BLK_T_SCSI_CMD - for | ||
| 1241 | virtio_scsi. | ||
| 1242 | VIRTIO_BLK_T_FLUSH - turned off in | ||
| 1243 | config space. | ||
| 1244 | VIRTIO_BLK_T_BARRIER - defined but not | ||
| 1245 | used in anywhere. | ||
| 1246 | */ | ||
| 1247 | mpsslog("%s() %d: type %x ", | ||
| 1248 | __func__, __LINE__, | ||
| 1249 | hdr.type); | ||
| 1250 | mpsslog("is not supported\n"); | ||
| 1251 | status = -ENOTSUP; | ||
| 1252 | |||
| 1253 | } else { | ||
| 1254 | ret = transfer_blocks( | ||
| 1255 | mic->mic_virtblk.virtio_block_fd, | ||
| 1256 | iovec, | ||
| 1257 | piov - iovec); | ||
| 1258 | if (ret < 0 && | ||
| 1259 | status != 0) | ||
| 1260 | status = ret; | ||
| 1261 | } | ||
| 1262 | /* write status and update used pointer */ | ||
| 1263 | if (status != 0) | ||
| 1264 | status = status_error_check(desc); | ||
| 1265 | ret = write_status( | ||
| 1266 | mic->mic_virtblk.virtio_block_fd, | ||
| 1267 | &status); | ||
| 1268 | #ifdef DEBUG | ||
| 1269 | mpsslog("%s() %d: write status=%d on desc=%p\n", | ||
| 1270 | __func__, __LINE__, | ||
| 1271 | status, desc); | ||
| 1272 | #endif | ||
| 1273 | } | ||
| 1274 | } | ||
| 1275 | free(iovec); | ||
| 1276 | _stop_virtblk: | ||
| 1277 | stop_virtblk(mic); | ||
| 1278 | _close_backend: | ||
| 1279 | close_backend(mic); | ||
| 1280 | } /* forever */ | ||
| 1281 | |||
| 1282 | pthread_exit(NULL); | ||
| 1283 | } | ||
| 1284 | |||
| 1285 | static void | ||
| 1286 | reset(struct mic_info *mic) | ||
| 1287 | { | ||
| 1288 | #define RESET_TIMEOUT 120 | ||
| 1289 | int i = RESET_TIMEOUT; | ||
| 1290 | setsysfs(mic->name, "state", "reset"); | ||
| 1291 | while (i) { | ||
| 1292 | char *state; | ||
| 1293 | state = readsysfs(mic->name, "state"); | ||
| 1294 | if (!state) | ||
| 1295 | goto retry; | ||
| 1296 | mpsslog("%s: %s %d state %s\n", | ||
| 1297 | mic->name, __func__, __LINE__, state); | ||
| 1298 | |||
| 1299 | /* | ||
| 1300 | * If the shutdown was initiated by OSPM, the state stays | ||
| 1301 | * in "suspended" which is also a valid condition for reset. | ||
| 1302 | */ | ||
| 1303 | if ((!strcmp(state, "offline")) || | ||
| 1304 | (!strcmp(state, "suspended"))) { | ||
| 1305 | free(state); | ||
| 1306 | break; | ||
| 1307 | } | ||
| 1308 | free(state); | ||
| 1309 | retry: | ||
| 1310 | sleep(1); | ||
| 1311 | i--; | ||
| 1312 | } | ||
| 1313 | } | ||
| 1314 | |||
| 1315 | static int | ||
| 1316 | get_mic_shutdown_status(struct mic_info *mic, char *shutdown_status) | ||
| 1317 | { | ||
| 1318 | if (!strcmp(shutdown_status, "nop")) | ||
| 1319 | return MIC_NOP; | ||
| 1320 | if (!strcmp(shutdown_status, "crashed")) | ||
| 1321 | return MIC_CRASHED; | ||
| 1322 | if (!strcmp(shutdown_status, "halted")) | ||
| 1323 | return MIC_HALTED; | ||
| 1324 | if (!strcmp(shutdown_status, "poweroff")) | ||
| 1325 | return MIC_POWER_OFF; | ||
| 1326 | if (!strcmp(shutdown_status, "restart")) | ||
| 1327 | return MIC_RESTART; | ||
| 1328 | mpsslog("%s: BUG invalid status %s\n", mic->name, shutdown_status); | ||
| 1329 | /* Invalid state */ | ||
| 1330 | assert(0); | ||
| 1331 | }; | ||
| 1332 | |||
| 1333 | static int get_mic_state(struct mic_info *mic, char *state) | ||
| 1334 | { | ||
| 1335 | if (!strcmp(state, "offline")) | ||
| 1336 | return MIC_OFFLINE; | ||
| 1337 | if (!strcmp(state, "online")) | ||
| 1338 | return MIC_ONLINE; | ||
| 1339 | if (!strcmp(state, "shutting_down")) | ||
| 1340 | return MIC_SHUTTING_DOWN; | ||
| 1341 | if (!strcmp(state, "reset_failed")) | ||
| 1342 | return MIC_RESET_FAILED; | ||
| 1343 | if (!strcmp(state, "suspending")) | ||
| 1344 | return MIC_SUSPENDING; | ||
| 1345 | if (!strcmp(state, "suspended")) | ||
| 1346 | return MIC_SUSPENDED; | ||
| 1347 | mpsslog("%s: BUG invalid state %s\n", mic->name, state); | ||
| 1348 | /* Invalid state */ | ||
| 1349 | assert(0); | ||
| 1350 | }; | ||
| 1351 | |||
| 1352 | static void mic_handle_shutdown(struct mic_info *mic) | ||
| 1353 | { | ||
| 1354 | #define SHUTDOWN_TIMEOUT 60 | ||
| 1355 | int i = SHUTDOWN_TIMEOUT, ret, stat = 0; | ||
| 1356 | char *shutdown_status; | ||
| 1357 | while (i) { | ||
| 1358 | shutdown_status = readsysfs(mic->name, "shutdown_status"); | ||
| 1359 | if (!shutdown_status) | ||
| 1360 | continue; | ||
| 1361 | mpsslog("%s: %s %d shutdown_status %s\n", | ||
| 1362 | mic->name, __func__, __LINE__, shutdown_status); | ||
| 1363 | switch (get_mic_shutdown_status(mic, shutdown_status)) { | ||
| 1364 | case MIC_RESTART: | ||
| 1365 | mic->restart = 1; | ||
| 1366 | case MIC_HALTED: | ||
| 1367 | case MIC_POWER_OFF: | ||
| 1368 | case MIC_CRASHED: | ||
| 1369 | free(shutdown_status); | ||
| 1370 | goto reset; | ||
| 1371 | default: | ||
| 1372 | break; | ||
| 1373 | } | ||
| 1374 | free(shutdown_status); | ||
| 1375 | sleep(1); | ||
| 1376 | i--; | ||
| 1377 | } | ||
| 1378 | reset: | ||
| 1379 | ret = kill(mic->pid, SIGTERM); | ||
| 1380 | mpsslog("%s: %s %d kill pid %d ret %d\n", | ||
| 1381 | mic->name, __func__, __LINE__, | ||
| 1382 | mic->pid, ret); | ||
| 1383 | if (!ret) { | ||
| 1384 | ret = waitpid(mic->pid, &stat, | ||
| 1385 | WIFSIGNALED(stat)); | ||
| 1386 | mpsslog("%s: %s %d waitpid ret %d pid %d\n", | ||
| 1387 | mic->name, __func__, __LINE__, | ||
| 1388 | ret, mic->pid); | ||
| 1389 | } | ||
| 1390 | if (ret == mic->pid) | ||
| 1391 | reset(mic); | ||
| 1392 | } | ||
| 1393 | |||
| 1394 | static void * | ||
| 1395 | mic_config(void *arg) | ||
| 1396 | { | ||
| 1397 | struct mic_info *mic = (struct mic_info *)arg; | ||
| 1398 | char *state = NULL; | ||
| 1399 | char pathname[PATH_MAX]; | ||
| 1400 | int fd, ret; | ||
| 1401 | struct pollfd ufds[1]; | ||
| 1402 | char value[4096]; | ||
| 1403 | |||
| 1404 | snprintf(pathname, PATH_MAX - 1, "%s/%s/%s", | ||
| 1405 | MICSYSFSDIR, mic->name, "state"); | ||
| 1406 | |||
| 1407 | fd = open(pathname, O_RDONLY); | ||
| 1408 | if (fd < 0) { | ||
| 1409 | mpsslog("%s: opening file %s failed %s\n", | ||
| 1410 | mic->name, pathname, strerror(errno)); | ||
| 1411 | goto error; | ||
| 1412 | } | ||
| 1413 | |||
| 1414 | do { | ||
| 1415 | ret = read(fd, value, sizeof(value)); | ||
| 1416 | if (ret < 0) { | ||
| 1417 | mpsslog("%s: Failed to read sysfs entry '%s': %s\n", | ||
| 1418 | mic->name, pathname, strerror(errno)); | ||
| 1419 | goto close_error1; | ||
| 1420 | } | ||
| 1421 | retry: | ||
| 1422 | state = readsysfs(mic->name, "state"); | ||
| 1423 | if (!state) | ||
| 1424 | goto retry; | ||
| 1425 | mpsslog("%s: %s %d state %s\n", | ||
| 1426 | mic->name, __func__, __LINE__, state); | ||
| 1427 | switch (get_mic_state(mic, state)) { | ||
| 1428 | case MIC_SHUTTING_DOWN: | ||
| 1429 | mic_handle_shutdown(mic); | ||
| 1430 | goto close_error; | ||
| 1431 | case MIC_SUSPENDING: | ||
| 1432 | mic->boot_on_resume = 1; | ||
| 1433 | setsysfs(mic->name, "state", "suspend"); | ||
| 1434 | mic_handle_shutdown(mic); | ||
| 1435 | goto close_error; | ||
| 1436 | case MIC_OFFLINE: | ||
| 1437 | if (mic->boot_on_resume) { | ||
| 1438 | setsysfs(mic->name, "state", "boot"); | ||
| 1439 | mic->boot_on_resume = 0; | ||
| 1440 | } | ||
| 1441 | break; | ||
| 1442 | default: | ||
| 1443 | break; | ||
| 1444 | } | ||
| 1445 | free(state); | ||
| 1446 | |||
| 1447 | ufds[0].fd = fd; | ||
| 1448 | ufds[0].events = POLLERR | POLLPRI; | ||
| 1449 | ret = poll(ufds, 1, -1); | ||
| 1450 | if (ret < 0) { | ||
| 1451 | mpsslog("%s: poll failed %s\n", | ||
| 1452 | mic->name, strerror(errno)); | ||
| 1453 | goto close_error1; | ||
| 1454 | } | ||
| 1455 | } while (1); | ||
| 1456 | close_error: | ||
| 1457 | free(state); | ||
| 1458 | close_error1: | ||
| 1459 | close(fd); | ||
| 1460 | error: | ||
| 1461 | init_mic(mic); | ||
| 1462 | pthread_exit(NULL); | ||
| 1463 | } | ||
| 1464 | |||
| 1465 | static void | ||
| 1466 | set_cmdline(struct mic_info *mic) | ||
| 1467 | { | ||
| 1468 | char buffer[PATH_MAX]; | ||
| 1469 | int len; | ||
| 1470 | |||
| 1471 | len = snprintf(buffer, PATH_MAX, | ||
| 1472 | "clocksource=tsc highres=off nohz=off "); | ||
| 1473 | len += snprintf(buffer + len, PATH_MAX, | ||
| 1474 | "cpufreq_on;corec6_off;pc3_off;pc6_off "); | ||
| 1475 | len += snprintf(buffer + len, PATH_MAX, | ||
| 1476 | "ifcfg=static;address,172.31.%d.1;netmask,255.255.255.0", | ||
| 1477 | mic->id); | ||
| 1478 | |||
| 1479 | setsysfs(mic->name, "cmdline", buffer); | ||
| 1480 | mpsslog("%s: Command line: \"%s\"\n", mic->name, buffer); | ||
| 1481 | snprintf(buffer, PATH_MAX, "172.31.%d.1", mic->id); | ||
| 1482 | mpsslog("%s: IPADDR: \"%s\"\n", mic->name, buffer); | ||
| 1483 | } | ||
| 1484 | |||
| 1485 | static void | ||
| 1486 | set_log_buf_info(struct mic_info *mic) | ||
| 1487 | { | ||
| 1488 | int fd; | ||
| 1489 | off_t len; | ||
| 1490 | char system_map[] = "/lib/firmware/mic/System.map"; | ||
| 1491 | char *map, *temp, log_buf[17] = {'\0'}; | ||
| 1492 | |||
| 1493 | fd = open(system_map, O_RDONLY); | ||
| 1494 | if (fd < 0) { | ||
| 1495 | mpsslog("%s: Opening System.map failed: %d\n", | ||
| 1496 | mic->name, errno); | ||
| 1497 | return; | ||
| 1498 | } | ||
| 1499 | len = lseek(fd, 0, SEEK_END); | ||
| 1500 | if (len < 0) { | ||
| 1501 | mpsslog("%s: Reading System.map size failed: %d\n", | ||
| 1502 | mic->name, errno); | ||
| 1503 | close(fd); | ||
| 1504 | return; | ||
| 1505 | } | ||
| 1506 | map = mmap(NULL, len, PROT_READ, MAP_PRIVATE, fd, 0); | ||
| 1507 | if (map == MAP_FAILED) { | ||
| 1508 | mpsslog("%s: mmap of System.map failed: %d\n", | ||
| 1509 | mic->name, errno); | ||
| 1510 | close(fd); | ||
| 1511 | return; | ||
| 1512 | } | ||
| 1513 | temp = strstr(map, "__log_buf"); | ||
| 1514 | if (!temp) { | ||
| 1515 | mpsslog("%s: __log_buf not found: %d\n", mic->name, errno); | ||
| 1516 | munmap(map, len); | ||
| 1517 | close(fd); | ||
| 1518 | return; | ||
| 1519 | } | ||
| 1520 | strncpy(log_buf, temp - 19, 16); | ||
| 1521 | setsysfs(mic->name, "log_buf_addr", log_buf); | ||
| 1522 | mpsslog("%s: log_buf_addr: %s\n", mic->name, log_buf); | ||
| 1523 | temp = strstr(map, "log_buf_len"); | ||
| 1524 | if (!temp) { | ||
| 1525 | mpsslog("%s: log_buf_len not found: %d\n", mic->name, errno); | ||
| 1526 | munmap(map, len); | ||
| 1527 | close(fd); | ||
| 1528 | return; | ||
| 1529 | } | ||
| 1530 | strncpy(log_buf, temp - 19, 16); | ||
| 1531 | setsysfs(mic->name, "log_buf_len", log_buf); | ||
| 1532 | mpsslog("%s: log_buf_len: %s\n", mic->name, log_buf); | ||
| 1533 | munmap(map, len); | ||
| 1534 | close(fd); | ||
| 1535 | } | ||
| 1536 | |||
| 1537 | static void init_mic(struct mic_info *mic); | ||
| 1538 | |||
| 1539 | static void | ||
| 1540 | change_virtblk_backend(int x, siginfo_t *siginfo, void *p) | ||
| 1541 | { | ||
| 1542 | struct mic_info *mic; | ||
| 1543 | |||
| 1544 | for (mic = mic_list.next; mic != NULL; mic = mic->next) | ||
| 1545 | mic->mic_virtblk.signaled = 1/* true */; | ||
| 1546 | } | ||
| 1547 | |||
| 1548 | static void | ||
| 1549 | init_mic(struct mic_info *mic) | ||
| 1550 | { | ||
| 1551 | struct sigaction ignore = { | ||
| 1552 | .sa_flags = 0, | ||
| 1553 | .sa_handler = SIG_IGN | ||
| 1554 | }; | ||
| 1555 | struct sigaction act = { | ||
| 1556 | .sa_flags = SA_SIGINFO, | ||
| 1557 | .sa_sigaction = change_virtblk_backend, | ||
| 1558 | }; | ||
| 1559 | char buffer[PATH_MAX]; | ||
| 1560 | int err; | ||
| 1561 | |||
| 1562 | /* | ||
| 1563 | * Currently, one virtio block device is supported for each MIC card | ||
| 1564 | * at a time. Any user (or test) can send a SIGUSR1 to the MIC daemon. | ||
| 1565 | * The signal informs the virtio block backend about a change in the | ||
| 1566 | * configuration file which specifies the virtio backend file name on | ||
| 1567 | * the host. Virtio block backend then re-reads the configuration file | ||
| 1568 | * and switches to the new block device. This signalling mechanism may | ||
| 1569 | * not be required once multiple virtio block devices are supported by | ||
| 1570 | * the MIC daemon. | ||
| 1571 | */ | ||
| 1572 | sigaction(SIGUSR1, &ignore, NULL); | ||
| 1573 | |||
| 1574 | mic->pid = fork(); | ||
| 1575 | switch (mic->pid) { | ||
| 1576 | case 0: | ||
| 1577 | set_log_buf_info(mic); | ||
| 1578 | set_cmdline(mic); | ||
| 1579 | add_virtio_device(mic, &virtcons_dev_page.dd); | ||
| 1580 | add_virtio_device(mic, &virtnet_dev_page.dd); | ||
| 1581 | err = pthread_create(&mic->mic_console.console_thread, NULL, | ||
| 1582 | virtio_console, mic); | ||
| 1583 | if (err) | ||
| 1584 | mpsslog("%s virtcons pthread_create failed %s\n", | ||
| 1585 | mic->name, strerror(err)); | ||
| 1586 | err = pthread_create(&mic->mic_net.net_thread, NULL, | ||
| 1587 | virtio_net, mic); | ||
| 1588 | if (err) | ||
| 1589 | mpsslog("%s virtnet pthread_create failed %s\n", | ||
| 1590 | mic->name, strerror(err)); | ||
| 1591 | err = pthread_create(&mic->mic_virtblk.block_thread, NULL, | ||
| 1592 | virtio_block, mic); | ||
| 1593 | if (err) | ||
| 1594 | mpsslog("%s virtblk pthread_create failed %s\n", | ||
| 1595 | mic->name, strerror(err)); | ||
| 1596 | sigemptyset(&act.sa_mask); | ||
| 1597 | err = sigaction(SIGUSR1, &act, NULL); | ||
| 1598 | if (err) | ||
| 1599 | mpsslog("%s sigaction SIGUSR1 failed %s\n", | ||
| 1600 | mic->name, strerror(errno)); | ||
| 1601 | while (1) | ||
| 1602 | sleep(60); | ||
| 1603 | case -1: | ||
| 1604 | mpsslog("fork failed MIC name %s id %d errno %d\n", | ||
| 1605 | mic->name, mic->id, errno); | ||
| 1606 | break; | ||
| 1607 | default: | ||
| 1608 | if (mic->restart) { | ||
| 1609 | snprintf(buffer, PATH_MAX, "boot"); | ||
| 1610 | setsysfs(mic->name, "state", buffer); | ||
| 1611 | mpsslog("%s restarting mic %d\n", | ||
| 1612 | mic->name, mic->restart); | ||
| 1613 | mic->restart = 0; | ||
| 1614 | } | ||
| 1615 | pthread_create(&mic->config_thread, NULL, mic_config, mic); | ||
| 1616 | } | ||
| 1617 | } | ||
| 1618 | |||
| 1619 | static void | ||
| 1620 | start_daemon(void) | ||
| 1621 | { | ||
| 1622 | struct mic_info *mic; | ||
| 1623 | |||
| 1624 | for (mic = mic_list.next; mic != NULL; mic = mic->next) | ||
| 1625 | init_mic(mic); | ||
| 1626 | |||
| 1627 | while (1) | ||
| 1628 | sleep(60); | ||
| 1629 | } | ||
| 1630 | |||
| 1631 | static int | ||
| 1632 | init_mic_list(void) | ||
| 1633 | { | ||
| 1634 | struct mic_info *mic = &mic_list; | ||
| 1635 | struct dirent *file; | ||
| 1636 | DIR *dp; | ||
| 1637 | int cnt = 0; | ||
| 1638 | |||
| 1639 | dp = opendir(MICSYSFSDIR); | ||
| 1640 | if (!dp) | ||
| 1641 | return 0; | ||
| 1642 | |||
| 1643 | while ((file = readdir(dp)) != NULL) { | ||
| 1644 | if (!strncmp(file->d_name, "mic", 3)) { | ||
| 1645 | mic->next = calloc(1, sizeof(struct mic_info)); | ||
| 1646 | if (mic->next) { | ||
| 1647 | mic = mic->next; | ||
| 1648 | mic->id = atoi(&file->d_name[3]); | ||
| 1649 | mic->name = malloc(strlen(file->d_name) + 16); | ||
| 1650 | if (mic->name) | ||
| 1651 | strcpy(mic->name, file->d_name); | ||
| 1652 | mpsslog("MIC name %s id %d\n", mic->name, | ||
| 1653 | mic->id); | ||
| 1654 | cnt++; | ||
| 1655 | } | ||
| 1656 | } | ||
| 1657 | } | ||
| 1658 | |||
| 1659 | closedir(dp); | ||
| 1660 | return cnt; | ||
| 1661 | } | ||
| 1662 | |||
| 1663 | void | ||
| 1664 | mpsslog(char *format, ...) | ||
| 1665 | { | ||
| 1666 | va_list args; | ||
| 1667 | char buffer[4096]; | ||
| 1668 | char ts[52], *ts1; | ||
| 1669 | time_t t; | ||
| 1670 | |||
| 1671 | if (logfp == NULL) | ||
| 1672 | return; | ||
| 1673 | |||
| 1674 | va_start(args, format); | ||
| 1675 | vsprintf(buffer, format, args); | ||
| 1676 | va_end(args); | ||
| 1677 | |||
| 1678 | time(&t); | ||
| 1679 | ts1 = ctime_r(&t, ts); | ||
| 1680 | ts1[strlen(ts1) - 1] = '\0'; | ||
| 1681 | fprintf(logfp, "%s: %s", ts1, buffer); | ||
| 1682 | |||
| 1683 | fflush(logfp); | ||
| 1684 | } | ||
| 1685 | |||
| 1686 | int | ||
| 1687 | main(int argc, char *argv[]) | ||
| 1688 | { | ||
| 1689 | int cnt; | ||
| 1690 | pid_t pid; | ||
| 1691 | |||
| 1692 | myname = argv[0]; | ||
| 1693 | |||
| 1694 | logfp = fopen(LOGFILE_NAME, "a+"); | ||
| 1695 | if (!logfp) { | ||
| 1696 | fprintf(stderr, "cannot open logfile '%s'\n", LOGFILE_NAME); | ||
| 1697 | exit(1); | ||
| 1698 | } | ||
| 1699 | pid = fork(); | ||
| 1700 | switch (pid) { | ||
| 1701 | case 0: | ||
| 1702 | break; | ||
| 1703 | case -1: | ||
| 1704 | exit(2); | ||
| 1705 | default: | ||
| 1706 | exit(0); | ||
| 1707 | } | ||
| 1708 | |||
| 1709 | mpsslog("MIC Daemon start\n"); | ||
| 1710 | |||
| 1711 | cnt = init_mic_list(); | ||
| 1712 | if (cnt == 0) { | ||
| 1713 | mpsslog("MIC module not loaded\n"); | ||
| 1714 | exit(3); | ||
| 1715 | } | ||
| 1716 | mpsslog("MIC found %d devices\n", cnt); | ||
| 1717 | |||
| 1718 | start_daemon(); | ||
| 1719 | |||
| 1720 | exit(0); | ||
| 1721 | } | ||
| @@ -0,0 +1,102 @@ | |||
| 1 | /* | ||
| 2 | * Intel MIC Platform Software Stack (MPSS) | ||
| 3 | * | ||
| 4 | * Copyright(c) 2013 Intel Corporation. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License, version 2, as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, but | ||
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 13 | * General Public License for more details. | ||
| 14 | * | ||
| 15 | * The full GNU General Public License is included in this distribution in | ||
| 16 | * the file called "COPYING". | ||
| 17 | * | ||
| 18 | * Intel MIC User Space Tools. | ||
| 19 | */ | ||
| 20 | #ifndef _MPSSD_H_ | ||
| 21 | #define _MPSSD_H_ | ||
| 22 | |||
| 23 | #include <stdio.h> | ||
| 24 | #include <stdlib.h> | ||
| 25 | #include <string.h> | ||
| 26 | #include <fcntl.h> | ||
| 27 | #include <unistd.h> | ||
| 28 | #include <dirent.h> | ||
| 29 | #include <libgen.h> | ||
| 30 | #include <pthread.h> | ||
| 31 | #include <stdarg.h> | ||
| 32 | #include <time.h> | ||
| 33 | #include <errno.h> | ||
| 34 | #include <sys/dir.h> | ||
| 35 | #include <sys/ioctl.h> | ||
| 36 | #include <sys/poll.h> | ||
| 37 | #include <sys/types.h> | ||
| 38 | #include <sys/socket.h> | ||
| 39 | #include <sys/stat.h> | ||
| 40 | #include <sys/types.h> | ||
| 41 | #include <sys/mman.h> | ||
| 42 | #include <sys/utsname.h> | ||
| 43 | #include <sys/wait.h> | ||
| 44 | #include <netinet/in.h> | ||
| 45 | #include <arpa/inet.h> | ||
| 46 | #include <netdb.h> | ||
| 47 | #include <pthread.h> | ||
| 48 | #include <signal.h> | ||
| 49 | #include <limits.h> | ||
| 50 | #include <syslog.h> | ||
| 51 | #include <getopt.h> | ||
| 52 | #include <net/if.h> | ||
| 53 | #include <linux/if_tun.h> | ||
| 54 | #include <linux/if_tun.h> | ||
| 55 | #include <linux/virtio_ids.h> | ||
| 56 | |||
| 57 | #define MICSYSFSDIR "/sys/class/mic" | ||
| 58 | #define LOGFILE_NAME "/var/log/mpssd" | ||
| 59 | #define PAGE_SIZE 4096 | ||
| 60 | |||
| 61 | struct mic_console_info { | ||
| 62 | pthread_t console_thread; | ||
| 63 | int virtio_console_fd; | ||
| 64 | void *console_dp; | ||
| 65 | }; | ||
| 66 | |||
| 67 | struct mic_net_info { | ||
| 68 | pthread_t net_thread; | ||
| 69 | int virtio_net_fd; | ||
| 70 | int tap_fd; | ||
| 71 | void *net_dp; | ||
| 72 | }; | ||
| 73 | |||
| 74 | struct mic_virtblk_info { | ||
| 75 | pthread_t block_thread; | ||
| 76 | int virtio_block_fd; | ||
| 77 | void *block_dp; | ||
| 78 | volatile sig_atomic_t signaled; | ||
| 79 | char *backend_file; | ||
| 80 | int backend; | ||
| 81 | void *backend_addr; | ||
| 82 | long backend_size; | ||
| 83 | }; | ||
| 84 | |||
| 85 | struct mic_info { | ||
| 86 | int id; | ||
| 87 | char *name; | ||
| 88 | pthread_t config_thread; | ||
| 89 | pid_t pid; | ||
| 90 | struct mic_console_info mic_console; | ||
| 91 | struct mic_net_info mic_net; | ||
| 92 | struct mic_virtblk_info mic_virtblk; | ||
| 93 | int restart; | ||
| 94 | int boot_on_resume; | ||
| 95 | struct mic_info *next; | ||
| 96 | }; | ||
| 97 | |||
| 98 | __attribute__((format(printf, 1, 2))) | ||
| 99 | void mpsslog(char *format, ...); | ||
| 100 | char *readsysfs(char *dir, char *entry); | ||
| 101 | int setsysfs(char *dir, char *entry, char *value); | ||
| 102 | #endif | ||
| @@ -0,0 +1,102 @@ | |||
| 1 | /* | ||
| 2 | * Intel MIC Platform Software Stack (MPSS) | ||
| 3 | * | ||
| 4 | * Copyright(c) 2013 Intel Corporation. | ||
| 5 | * | ||
| 6 | * This program is free software; you can redistribute it and/or modify | ||
| 7 | * it under the terms of the GNU General Public License, version 2, as | ||
| 8 | * published by the Free Software Foundation. | ||
| 9 | * | ||
| 10 | * This program is distributed in the hope that it will be useful, but | ||
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 13 | * General Public License for more details. | ||
| 14 | * | ||
| 15 | * The full GNU General Public License is included in this distribution in | ||
| 16 | * the file called "COPYING". | ||
| 17 | * | ||
| 18 | * Intel MIC User Space Tools. | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include "mpssd.h" | ||
| 22 | |||
| 23 | #define PAGE_SIZE 4096 | ||
| 24 | |||
| 25 | char * | ||
| 26 | readsysfs(char *dir, char *entry) | ||
| 27 | { | ||
| 28 | char filename[PATH_MAX]; | ||
| 29 | char value[PAGE_SIZE]; | ||
| 30 | char *string = NULL; | ||
| 31 | int fd; | ||
| 32 | int len; | ||
| 33 | |||
| 34 | if (dir == NULL) | ||
| 35 | snprintf(filename, PATH_MAX, "%s/%s", MICSYSFSDIR, entry); | ||
| 36 | else | ||
| 37 | snprintf(filename, PATH_MAX, | ||
| 38 | "%s/%s/%s", MICSYSFSDIR, dir, entry); | ||
| 39 | |||
| 40 | fd = open(filename, O_RDONLY); | ||
| 41 | if (fd < 0) { | ||
| 42 | mpsslog("Failed to open sysfs entry '%s': %s\n", | ||
| 43 | filename, strerror(errno)); | ||
| 44 | return NULL; | ||
| 45 | } | ||
| 46 | |||
| 47 | len = read(fd, value, sizeof(value)); | ||
| 48 | if (len < 0) { | ||
| 49 | mpsslog("Failed to read sysfs entry '%s': %s\n", | ||
| 50 | filename, strerror(errno)); | ||
| 51 | goto readsys_ret; | ||
| 52 | } | ||
| 53 | if (len == 0) | ||
| 54 | goto readsys_ret; | ||
| 55 | |||
| 56 | value[len - 1] = '\0'; | ||
| 57 | |||
| 58 | string = malloc(strlen(value) + 1); | ||
| 59 | if (string) | ||
| 60 | strcpy(string, value); | ||
| 61 | |||
| 62 | readsys_ret: | ||
| 63 | close(fd); | ||
| 64 | return string; | ||
| 65 | } | ||
| 66 | |||
| 67 | int | ||
| 68 | setsysfs(char *dir, char *entry, char *value) | ||
| 69 | { | ||
| 70 | char filename[PATH_MAX]; | ||
| 71 | char *oldvalue; | ||
| 72 | int fd, ret = 0; | ||
| 73 | |||
| 74 | if (dir == NULL) | ||
| 75 | snprintf(filename, PATH_MAX, "%s/%s", MICSYSFSDIR, entry); | ||
| 76 | else | ||
| 77 | snprintf(filename, PATH_MAX, "%s/%s/%s", | ||
| 78 | MICSYSFSDIR, dir, entry); | ||
| 79 | |||
| 80 | oldvalue = readsysfs(dir, entry); | ||
| 81 | |||
| 82 | fd = open(filename, O_RDWR); | ||
| 83 | if (fd < 0) { | ||
| 84 | ret = errno; | ||
| 85 | mpsslog("Failed to open sysfs entry '%s': %s\n", | ||
| 86 | filename, strerror(errno)); | ||
| 87 | goto done; | ||
| 88 | } | ||
| 89 | |||
| 90 | if (!oldvalue || strcmp(value, oldvalue)) { | ||
| 91 | if (write(fd, value, strlen(value)) < 0) { | ||
| 92 | ret = errno; | ||
| 93 | mpsslog("Failed to write new sysfs entry '%s': %s\n", | ||
| 94 | filename, strerror(errno)); | ||
| 95 | } | ||
| 96 | } | ||
| 97 | close(fd); | ||
| 98 | done: | ||
| 99 | if (oldvalue) | ||
| 100 | free(oldvalue); | ||
| 101 | return ret; | ||
| 102 | } | ||
| @@ -116,11 +116,11 @@ using mutexes at the moment, please let me know if you find any. ] · 115 unmodified lines | |||
| 116 | Implementation of mutexes | 116 | Implementation of mutexes |
| 117 | ------------------------- | 117 | ------------------------- |
| 118 | 118 | ||
| 119 | 'struct mutex' is the new mutex type, defined in include/linux/mutex.h | 119 | 'struct mutex' is the new mutex type, defined in include/linux/mutex.h and |
| 120 | and implemented in kernel/mutex.c. It is a counter-based mutex with a | 120 | implemented in kernel/locking/mutex.c. It is a counter-based mutex with a |
| 121 | spinlock and a wait-list. The counter has 3 states: 1 for "unlocked", | 121 | spinlock and a wait-list. The counter has 3 states: 1 for "unlocked", 0 for |
| 122 | 0 for "locked" and negative numbers (usually -1) for "locked, potential | 122 | "locked" and negative numbers (usually -1) for "locked, potential waiters |
| 123 | waiters queued". | 123 | queued". |
| 124 | 124 | ||
| 125 | the APIs of 'struct mutex' have been streamlined: | 125 | the APIs of 'struct mutex' have been streamlined: |
| 126 | 126 | ||
| @@ -69,8 +69,7 @@ folder: · 68 unmodified lines | |||
| 69 | # aggregated_ogms gw_bandwidth log_level | 69 | # aggregated_ogms gw_bandwidth log_level |
| 70 | # ap_isolation gw_mode orig_interval | 70 | # ap_isolation gw_mode orig_interval |
| 71 | # bonding gw_sel_class routing_algo | 71 | # bonding gw_sel_class routing_algo |
| 72 | # bridge_loop_avoidance hop_penalty vis_mode | 72 | # bridge_loop_avoidance hop_penalty fragmentation |
| 73 | # fragmentation | ||
| 74 | 73 | ||
| 75 | 74 | ||
| 76 | There is a special folder for debugging information: | 75 | There is a special folder for debugging information: |
| @@ -78,7 +77,7 @@ There is a special folder for debugging information: · 1 unmodified line | |||
| 78 | # ls /sys/kernel/debug/batman_adv/bat0/ | 77 | # ls /sys/kernel/debug/batman_adv/bat0/ |
| 79 | # bla_backbone_table log transtable_global | 78 | # bla_backbone_table log transtable_global |
| 80 | # bla_claim_table originators transtable_local | 79 | # bla_claim_table originators transtable_local |
| 81 | # gateways socket vis_data | 80 | # gateways socket |
| 82 | 81 | ||
| 83 | Some of the files contain all sort of status information regard- | 82 | Some of the files contain all sort of status information regard- |
| 84 | ing the mesh network. For example, you can view the table of | 83 | ing the mesh network. For example, you can view the table of |
| @@ -127,51 +126,6 @@ ously assigned to interfaces now used by batman advanced, e.g. · 42 unmodified lines | |||
| 127 | # ifconfig eth0 0.0.0.0 | 126 | # ifconfig eth0 0.0.0.0 |
| 128 | 127 | ||
| 129 | 128 | ||
| 130 | VISUALIZATION | ||
| 131 | ------------- | ||
| 132 | |||
| 133 | If you want topology visualization, at least one mesh node must | ||
| 134 | be configured as VIS-server: | ||
| 135 | |||
| 136 | # echo "server" > /sys/class/net/bat0/mesh/vis_mode | ||
| 137 | |||
| 138 | Each node is either configured as "server" or as "client" (de- | ||
| 139 | fault: "client"). Clients send their topology data to the server | ||
| 140 | next to them, and server synchronize with other servers. If there | ||
| 141 | is no server configured (default) within the mesh, no topology | ||
| 142 | information will be transmitted. With these "synchronizing | ||
| 143 | servers", there can be 1 or more vis servers sharing the same (or | ||
| 144 | at least very similar) data. | ||
| 145 | |||
| 146 | When configured as server, you can get a topology snapshot of | ||
| 147 | your mesh: | ||
| 148 | |||
| 149 | # cat /sys/kernel/debug/batman_adv/bat0/vis_data | ||
| 150 | |||
| 151 | This raw output is intended to be easily parsable and convertable | ||
| 152 | with other tools. Have a look at the batctl README if you want a | ||
| 153 | vis output in dot or json format for instance and how those out- | ||
| 154 | puts could then be visualised in an image. | ||
| 155 | |||
| 156 | The raw format consists of comma separated values per entry where | ||
| 157 | each entry is giving information about a certain source inter- | ||
| 158 | face. Each entry can/has to have the following values: | ||
| 159 | -> "mac" - mac address of an originator's source interface | ||
| 160 | (each line begins with it) | ||
| 161 | -> "TQ mac value" - src mac's link quality towards mac address | ||
| 162 | of a neighbor originator's interface which | ||
| 163 | is being used for routing | ||
| 164 | -> "TT mac" - TT announced by source mac | ||
| 165 | -> "PRIMARY" - this is a primary interface | ||
| 166 | -> "SEC mac" - secondary mac address of source | ||
| 167 | (requires preceding PRIMARY) | ||
| 168 | |||
| 169 | The TQ value has a range from 4 to 255 with 255 being the best. | ||
| 170 | The TT entries are showing which hosts are connected to the mesh | ||
| 171 | via bat0 or being bridged into the mesh network. The PRIMARY/SEC | ||
| 172 | values are only applied on primary interfaces | ||
| 173 | |||
| 174 | |||
| 175 | LOGGING/DEBUGGING | 129 | LOGGING/DEBUGGING |
| 176 | ----------------- | 130 | ----------------- |
| 177 | 131 | ||
| @@ -245,5 +199,5 @@ Mailing-list: b.a.t.m.a.n@open-mesh.org (optional subscription · 67 unmodified lines | |||
| 245 | 199 | ||
| 246 | You can also contact the Authors: | 200 | You can also contact the Authors: |
| 247 | 201 | ||
| 248 | Marek Lindner <lindner_marek@yahoo.de> | 202 | Marek Lindner <mareklindner@neomailbox.ch> |
| 249 | Simon Wunderlich <siwu@hrz.tu-chemnitz.de> | 203 | Simon Wunderlich <sw@simonwunderlich.de> |
| @@ -639,6 +639,15 @@ num_unsol_na · 638 unmodified lines | |||
| 639 | are generated by the ipv4 and ipv6 code and the numbers of | 639 | are generated by the ipv4 and ipv6 code and the numbers of |
| 640 | repetitions cannot be set independently. | 640 | repetitions cannot be set independently. |
| 641 | 641 | ||
| 642 | packets_per_slave | ||
| 643 | |||
| 644 | Specify the number of packets to transmit through a slave before | ||
| 645 | moving to the next one. When set to 0 then a slave is chosen at | ||
| 646 | random. | ||
| 647 | |||
| 648 | The valid range is 0 - 65535; the default value is 1. This option | ||
| 649 | has effect only in balance-rr mode. | ||
| 650 | |||
| 642 | primary | 651 | primary |
| 643 | 652 | ||
| 644 | A string (eth0, eth2, etc) specifying which slave is the | 653 | A string (eth0, eth2, etc) specifying which slave is the |
| @@ -743,21 +752,16 @@ xmit_hash_policy · 98 unmodified lines | |||
| 743 | protocol information to generate the hash. | 752 | protocol information to generate the hash. |
| 744 | 753 | ||
| 745 | Uses XOR of hardware MAC addresses and IP addresses to | 754 | Uses XOR of hardware MAC addresses and IP addresses to |
| 746 | generate the hash. The IPv4 formula is | 755 | generate the hash. The formula is |
| 747 | |||
| 748 | (((source IP XOR dest IP) AND 0xffff) XOR | ||
| 749 | ( source MAC XOR destination MAC )) | ||
| 750 | modulo slave count | ||
| 751 | 756 | ||
| 752 | The IPv6 formula is | 757 | hash = source MAC XOR destination MAC |
| 758 | hash = hash XOR source IP XOR destination IP | ||
| 759 | hash = hash XOR (hash RSHIFT 16) | ||
| 760 | hash = hash XOR (hash RSHIFT 8) | ||
| 761 | And then hash is reduced modulo slave count. | ||
| 753 | 762 | ||
| 754 | hash = (source ip quad 2 XOR dest IP quad 2) XOR | 763 | If the protocol is IPv6 then the source and destination |
| 755 | (source ip quad 3 XOR dest IP quad 3) XOR | 764 | addresses are first hashed using ipv6_addr_hash. |
| 756 | (source ip quad 4 XOR dest IP quad 4) | ||
| 757 | |||
| 758 | (((hash >> 24) XOR (hash >> 16) XOR (hash >> 8) XOR hash) | ||
| 759 | XOR (source MAC XOR destination MAC)) | ||
| 760 | modulo slave count | ||
| 761 | 765 | ||
| 762 | This algorithm will place all traffic to a particular | 766 | This algorithm will place all traffic to a particular |
| 763 | network peer on the same slave. For non-IP traffic, | 767 | network peer on the same slave. For non-IP traffic, |
| @@ -779,21 +783,16 @@ xmit_hash_policy · 15 unmodified lines | |||
| 779 | slaves, although a single connection will not span | 783 | slaves, although a single connection will not span |
| 780 | multiple slaves. | 784 | multiple slaves. |
| 781 | 785 | ||
| 782 | The formula for unfragmented IPv4 TCP and UDP packets is | 786 | The formula for unfragmented TCP and UDP packets is |
| 783 | |||
| 784 | ((source port XOR dest port) XOR | ||
| 785 | ((source IP XOR dest IP) AND 0xffff) | ||
| 786 | modulo slave count | ||
| 787 | |||
| 788 | The formula for unfragmented IPv6 TCP and UDP packets is | ||
| 789 | 787 | ||
| 790 | hash = (source port XOR dest port) XOR | 788 | hash = source port, destination port (as in the header) |
| 791 | ((source ip quad 2 XOR dest IP quad 2) XOR | 789 | hash = hash XOR source IP XOR destination IP |
| 792 | (source ip quad 3 XOR dest IP quad 3) XOR | 790 | hash = hash XOR (hash RSHIFT 16) |
| 793 | (source ip quad 4 XOR dest IP quad 4)) | 791 | hash = hash XOR (hash RSHIFT 8) |
| 792 | And then hash is reduced modulo slave count. | ||
| 794 | 793 | ||
| 795 | ((hash >> 24) XOR (hash >> 16) XOR (hash >> 8) XOR hash) | 794 | If the protocol is IPv6 then the source and destination |
| 796 | modulo slave count | 795 | addresses are first hashed using ipv6_addr_hash. |
| 797 | 796 | ||
| 798 | For fragmented TCP or UDP packets and all other IPv4 and | 797 | For fragmented TCP or UDP packets and all other IPv4 and |
| 799 | IPv6 protocol traffic, the source and destination port | 798 | IPv6 protocol traffic, the source and destination port |
| @@ -801,10 +800,6 @@ xmit_hash_policy · 1 unmodified line | |||
| 801 | formula is the same as for the layer2 transmit hash | 800 | formula is the same as for the layer2 transmit hash |
| 802 | policy. | 801 | policy. |
| 803 | 802 | ||
| 804 | The IPv4 policy is intended to mimic the behavior of | ||
| 805 | certain switches, notably Cisco switches with PFC2 as | ||
| 806 | well as some Foundry and IBM products. | ||
| 807 | |||
| 808 | This algorithm is not fully 802.3ad compliant. A | 803 | This algorithm is not fully 802.3ad compliant. A |
| 809 | single TCP or UDP conversation containing both | 804 | single TCP or UDP conversation containing both |
| 810 | fragmented and unfragmented packets will see packets | 805 | fragmented and unfragmented packets will see packets |
| @@ -815,6 +810,26 @@ xmit_hash_policy · 4 unmodified lines | |||
| 815 | conversations. Other implementations of 802.3ad may | 810 | conversations. Other implementations of 802.3ad may |
| 816 | or may not tolerate this noncompliance. | 811 | or may not tolerate this noncompliance. |
| 817 | 812 | ||
| 813 | encap2+3 | ||
| 814 | |||
| 815 | This policy uses the same formula as layer2+3 but it | ||
| 816 | relies on skb_flow_dissect to obtain the header fields | ||
| 817 | which might result in the use of inner headers if an | ||
| 818 | encapsulation protocol is used. For example this will | ||
| 819 | improve the performance for tunnel users because the | ||
| 820 | packets will be distributed according to the encapsulated | ||
| 821 | flows. | ||
| 822 | |||
| 823 | encap3+4 | ||
| 824 | |||
| 825 | This policy uses the same formula as layer3+4 but it | ||
| 826 | relies on skb_flow_dissect to obtain the header fields | ||
| 827 | which might result in the use of inner headers if an | ||
| 828 | encapsulation protocol is used. For example this will | ||
| 829 | improve the performance for tunnel users because the | ||
| 830 | packets will be distributed according to the encapsulated | ||
| 831 | flows. | ||
| 832 | |||
| 818 | The default value is layer2. This option was added in bonding | 833 | The default value is layer2. This option was added in bonding |
| 819 | version 2.6.3. In earlier versions of bonding, this parameter | 834 | version 2.6.3. In earlier versions of bonding, this parameter |
| 820 | does not exist, and the layer2 policy is the only policy. The | 835 | does not exist, and the layer2 policy is the only policy. The |
| @@ -1362,6 +1377,12 @@ To add ARP targets: · 541 unmodified lines | |||
| 1362 | To remove an ARP target: | 1377 | To remove an ARP target: |
| 1363 | # echo -192.168.0.100 > /sys/class/net/bond0/bonding/arp_ip_target | 1378 | # echo -192.168.0.100 > /sys/class/net/bond0/bonding/arp_ip_target |
| 1364 | 1379 | ||
| 1380 | To configure the interval between learning packet transmits: | ||
| 1381 | # echo 12 > /sys/class/net/bond0/bonding/lp_interval | ||
| 1382 | NOTE: the lp_inteval is the number of seconds between instances where | ||
| 1383 | the bonding driver sends learning packets to each slaves peer switch. The | ||
| 1384 | default interval is 1 second. | ||
| 1385 | |||
| 1365 | Example Configuration | 1386 | Example Configuration |
| 1366 | --------------------- | 1387 | --------------------- |
| 1367 | We begin with the same example that is shown in section 3.3, | 1388 | We begin with the same example that is shown in section 3.3, |
| @@ -25,6 +25,12 @@ This file contains · 24 unmodified lines | |||
| 25 | 4.1.5 RAW socket option CAN_RAW_FD_FRAMES | 25 | 4.1.5 RAW socket option CAN_RAW_FD_FRAMES |
| 26 | 4.1.6 RAW socket returned message flags | 26 | 4.1.6 RAW socket returned message flags |
| 27 | 4.2 Broadcast Manager protocol sockets (SOCK_DGRAM) | 27 | 4.2 Broadcast Manager protocol sockets (SOCK_DGRAM) |
| 28 | 4.2.1 Broadcast Manager operations | ||
| 29 | 4.2.2 Broadcast Manager message flags | ||
| 30 | 4.2.3 Broadcast Manager transmission timers | ||
| 31 | 4.2.4 Broadcast Manager message sequence transmission | ||
| 32 | 4.2.5 Broadcast Manager receive filter timers | ||
| 33 | 4.2.6 Broadcast Manager multiplex message receive filter | ||
| 28 | 4.3 connected transport protocols (SOCK_SEQPACKET) | 34 | 4.3 connected transport protocols (SOCK_SEQPACKET) |
| 29 | 4.4 unconnected transport protocols (SOCK_DGRAM) | 35 | 4.4 unconnected transport protocols (SOCK_DGRAM) |
| 30 | 36 | ||
| @@ -593,6 +599,217 @@ solution for a couple of reasons: · 562 unmodified lines | |||
| 593 | In order to receive such messages, CAN_RAW_RECV_OWN_MSGS must be set. | 599 | In order to receive such messages, CAN_RAW_RECV_OWN_MSGS must be set. |
| 594 | 600 | ||
| 595 | 4.2 Broadcast Manager protocol sockets (SOCK_DGRAM) | 601 | 4.2 Broadcast Manager protocol sockets (SOCK_DGRAM) |
| 602 | |||
| 603 | The Broadcast Manager protocol provides a command based configuration | ||
| 604 | interface to filter and send (e.g. cyclic) CAN messages in kernel space. | ||
| 605 | |||
| 606 | Receive filters can be used to down sample frequent messages; detect events | ||
| 607 | such as message contents changes, packet length changes, and do time-out | ||
| 608 | monitoring of received messages. | ||
| 609 | |||
| 610 | Periodic transmission tasks of CAN frames or a sequence of CAN frames can be | ||
| 611 | created and modified at runtime; both the message content and the two | ||
| 612 | possible transmit intervals can be altered. | ||
| 613 | |||
| 614 | A BCM socket is not intended for sending individual CAN frames using the | ||
| 615 | struct can_frame as known from the CAN_RAW socket. Instead a special BCM | ||
| 616 | configuration message is defined. The basic BCM configuration message used | ||
| 617 | to communicate with the broadcast manager and the available operations are | ||
| 618 | defined in the linux/can/bcm.h include. The BCM message consists of a | ||
| 619 | message header with a command ('opcode') followed by zero or more CAN frames. | ||
| 620 | The broadcast manager sends responses to user space in the same form: | ||
| 621 | |||
| 622 | struct bcm_msg_head { | ||
| 623 | __u32 opcode; /* command */ | ||
| 624 | __u32 flags; /* special flags */ | ||
| 625 | __u32 count; /* run 'count' times with ival1 */ | ||
| 626 | struct timeval ival1, ival2; /* count and subsequent interval */ | ||
| 627 | canid_t can_id; /* unique can_id for task */ | ||
| 628 | __u32 nframes; /* number of can_frames following */ | ||
| 629 | struct can_frame frames[0]; | ||
| 630 | }; | ||
| 631 | |||
| 632 | The aligned payload 'frames' uses the same basic CAN frame structure defined | ||
| 633 | at the beginning of section 4 and in the include/linux/can.h include. All | ||
| 634 | messages to the broadcast manager from user space have this structure. | ||
| 635 | |||
| 636 | Note a CAN_BCM socket must be connected instead of bound after socket | ||
| 637 | creation (example without error checking): | ||
| 638 | |||
| 639 | int s; | ||
| 640 | struct sockaddr_can addr; | ||
| 641 | struct ifreq ifr; | ||
| 642 | |||
| 643 | s = socket(PF_CAN, SOCK_DGRAM, CAN_BCM); | ||
| 644 | |||
| 645 | strcpy(ifr.ifr_name, "can0"); | ||
| 646 | ioctl(s, SIOCGIFINDEX, &ifr); | ||
| 647 | |||
| 648 | addr.can_family = AF_CAN; | ||
| 649 | addr.can_ifindex = ifr.ifr_ifindex; | ||
| 650 | |||
| 651 | connect(s, (struct sockaddr *)&addr, sizeof(addr)) | ||
| 652 | |||
| 653 | (..) | ||
| 654 | |||
| 655 | The broadcast manager socket is able to handle any number of in flight | ||
| 656 | transmissions or receive filters concurrently. The different RX/TX jobs are | ||
| 657 | distinguished by the unique can_id in each BCM message. However additional | ||
| 658 | CAN_BCM sockets are recommended to communicate on multiple CAN interfaces. | ||
| 659 | When the broadcast manager socket is bound to 'any' CAN interface (=> the | ||
| 660 | interface index is set to zero) the configured receive filters apply to any | ||
| 661 | CAN interface unless the sendto() syscall is used to overrule the 'any' CAN | ||
| 662 | interface index. When using recvfrom() instead of read() to retrieve BCM | ||
| 663 | socket messages the originating CAN interface is provided in can_ifindex. | ||
| 664 | |||
| 665 | 4.2.1 Broadcast Manager operations | ||
| 666 | |||
| 667 | The opcode defines the operation for the broadcast manager to carry out, | ||
| 668 | or details the broadcast managers response to several events, including | ||
| 669 | user requests. | ||
| 670 | |||
| 671 | Transmit Operations (user space to broadcast manager): | ||
| 672 | |||
| 673 | TX_SETUP: Create (cyclic) transmission task. | ||
| 674 | |||
| 675 | TX_DELETE: Remove (cyclic) transmission task, requires only can_id. | ||
| 676 | |||
| 677 | TX_READ: Read properties of (cyclic) transmission task for can_id. | ||
| 678 | |||
| 679 | TX_SEND: Send one CAN frame. | ||
| 680 | |||
| 681 | Transmit Responses (broadcast manager to user space): | ||
| 682 | |||
| 683 | TX_STATUS: Reply to TX_READ request (transmission task configuration). | ||
| 684 | |||
| 685 | TX_EXPIRED: Notification when counter finishes sending at initial interval | ||
| 686 | 'ival1'. Requires the TX_COUNTEVT flag to be set at TX_SETUP. | ||
| 687 | |||
| 688 | Receive Operations (user space to broadcast manager): | ||
| 689 | |||
| 690 | RX_SETUP: Create RX content filter subscription. | ||
| 691 | |||
| 692 | RX_DELETE: Remove RX content filter subscription, requires only can_id. | ||
| 693 | |||
| 694 | RX_READ: Read properties of RX content filter subscription for can_id. | ||
| 695 | |||
| 696 | Receive Responses (broadcast manager to user space): | ||
| 697 | |||
| 698 | RX_STATUS: Reply to RX_READ request (filter task configuration). | ||
| 699 | |||
| 700 | RX_TIMEOUT: Cyclic message is detected to be absent (timer ival1 expired). | ||
| 701 | |||
| 702 | RX_CHANGED: BCM message with updated CAN frame (detected content change). | ||
| 703 | Sent on first message received or on receipt of revised CAN messages. | ||
| 704 | |||
| 705 | 4.2.2 Broadcast Manager message flags | ||
| 706 | |||
| 707 | When sending a message to the broadcast manager the 'flags' element may | ||
| 708 | contain the following flag definitions which influence the behaviour: | ||
| 709 | |||
| 710 | SETTIMER: Set the values of ival1, ival2 and count | ||
| 711 | |||
| 712 | STARTTIMER: Start the timer with the actual values of ival1, ival2 | ||
| 713 | and count. Starting the timer leads simultaneously to emit a CAN frame. | ||
| 714 | |||
| 715 | TX_COUNTEVT: Create the message TX_EXPIRED when count expires | ||
| 716 | |||
| 717 | TX_ANNOUNCE: A change of data by the process is emitted immediately. | ||
| 718 | |||
| 719 | TX_CP_CAN_ID: Copies the can_id from the message header to each | ||
| 720 | subsequent frame in frames. This is intended as usage simplification. For | ||
| 721 | TX tasks the unique can_id from the message header may differ from the | ||
| 722 | can_id(s) stored for transmission in the subsequent struct can_frame(s). | ||
| 723 | |||
| 724 | RX_FILTER_ID: Filter by can_id alone, no frames required (nframes=0). | ||
| 725 | |||
| 726 | RX_CHECK_DLC: A change of the DLC leads to an RX_CHANGED. | ||
| 727 | |||
| 728 | RX_NO_AUTOTIMER: Prevent automatically starting the timeout monitor. | ||
| 729 | |||
| 730 | RX_ANNOUNCE_RESUME: If passed at RX_SETUP and a receive timeout occured, a | ||
| 731 | RX_CHANGED message will be generated when the (cyclic) receive restarts. | ||
| 732 | |||
| 733 | TX_RESET_MULTI_IDX: Reset the index for the multiple frame transmission. | ||
| 734 | |||
| 735 | RX_RTR_FRAME: Send reply for RTR-request (placed in op->frames[0]). | ||
| 736 | |||
| 737 | 4.2.3 Broadcast Manager transmission timers | ||
| 738 | |||
| 739 | Periodic transmission configurations may use up to two interval timers. | ||
| 740 | In this case the BCM sends a number of messages ('count') at an interval | ||
| 741 | 'ival1', then continuing to send at another given interval 'ival2'. When | ||
| 742 | only one timer is needed 'count' is set to zero and only 'ival2' is used. | ||
| 743 | When SET_TIMER and START_TIMER flag were set the timers are activated. | ||
| 744 | The timer values can be altered at runtime when only SET_TIMER is set. | ||
| 745 | |||
| 746 | 4.2.4 Broadcast Manager message sequence transmission | ||
| 747 | |||
| 748 | Up to 256 CAN frames can be transmitted in a sequence in the case of a cyclic | ||
| 749 | TX task configuration. The number of CAN frames is provided in the 'nframes' | ||
| 750 | element of the BCM message head. The defined number of CAN frames are added | ||
| 751 | as array to the TX_SETUP BCM configuration message. | ||
| 752 | |||
| 753 | /* create a struct to set up a sequence of four CAN frames */ | ||
| 754 | struct { | ||
| 755 | struct bcm_msg_head msg_head; | ||
| 756 | struct can_frame frame[4]; | ||
| 757 | } mytxmsg; | ||
| 758 | |||
| 759 | (..) | ||
| 760 | mytxmsg.nframes = 4; | ||
| 761 | (..) | ||
| 762 | |||
| 763 | write(s, &mytxmsg, sizeof(mytxmsg)); | ||
| 764 | |||
| 765 | With every transmission the index in the array of CAN frames is increased | ||
| 766 | and set to zero at index overflow. | ||
| 767 | |||
| 768 | 4.2.5 Broadcast Manager receive filter timers | ||
| 769 | |||
| 770 | The timer values ival1 or ival2 may be set to non-zero values at RX_SETUP. | ||
| 771 | When the SET_TIMER flag is set the timers are enabled: | ||
| 772 | |||
| 773 | ival1: Send RX_TIMEOUT when a received message is not received again within | ||
| 774 | the given time. When START_TIMER is set at RX_SETUP the timeout detection | ||
| 775 | is activated directly - even without a former CAN frame reception. | ||
| 776 | |||
| 777 | ival2: Throttle the received message rate down to the value of ival2. This | ||
| 778 | is useful to reduce messages for the application when the signal inside the | ||
| 779 | CAN frame is stateless as state changes within the ival2 periode may get | ||
| 780 | lost. | ||
| 781 | |||
| 782 | 4.2.6 Broadcast Manager multiplex message receive filter | ||
| 783 | |||
| 784 | To filter for content changes in multiplex message sequences an array of more | ||
| 785 | than one CAN frames can be passed in a RX_SETUP configuration message. The | ||
| 786 | data bytes of the first CAN frame contain the mask of relevant bits that | ||
| 787 | have to match in the subsequent CAN frames with the received CAN frame. | ||
| 788 | If one of the subsequent CAN frames is matching the bits in that frame data | ||
| 789 | mark the relevant content to be compared with the previous received content. | ||
| 790 | Up to 257 CAN frames (multiplex filter bit mask CAN frame plus 256 CAN | ||
| 791 | filters) can be added as array to the TX_SETUP BCM configuration message. | ||
| 792 | |||
| 793 | /* usually used to clear CAN frame data[] - beware of endian problems! */ | ||
| 794 | #define U64_DATA(p) (*(unsigned long long*)(p)->data) | ||
| 795 | |||
| 796 | struct { | ||
| 797 | struct bcm_msg_head msg_head; | ||
| 798 | struct can_frame frame[5]; | ||
| 799 | } msg; | ||
| 800 | |||
| 801 | msg.msg_head.opcode = RX_SETUP; | ||
| 802 | msg.msg_head.can_id = 0x42; | ||
| 803 | msg.msg_head.flags = 0; | ||
| 804 | msg.msg_head.nframes = 5; | ||
| 805 | U64_DATA(&msg.frame[0]) = 0xFF00000000000000ULL; /* MUX mask */ | ||
| 806 | U64_DATA(&msg.frame[1]) = 0x01000000000000FFULL; /* data mask (MUX 0x01) */ | ||
| 807 | U64_DATA(&msg.frame[2]) = 0x0200FFFF000000FFULL; /* data mask (MUX 0x02) */ | ||
| 808 | U64_DATA(&msg.frame[3]) = 0x330000FFFFFF0003ULL; /* data mask (MUX 0x33) */ | ||
| 809 | U64_DATA(&msg.frame[4]) = 0x4F07FC0FF0000000ULL; /* data mask (MUX 0x4F) */ | ||
| 810 | |||
| 811 | write(s, &msg, sizeof(msg)); | ||
| 812 | |||
| 596 | 4.3 connected transport protocols (SOCK_SEQPACKET) | 813 | 4.3 connected transport protocols (SOCK_SEQPACKET) |
| 597 | 4.4 unconnected transport protocols (SOCK_DGRAM) | 814 | 4.4 unconnected transport protocols (SOCK_DGRAM) |
| 598 | 815 | ||
| @@ -18,8 +18,8 @@ Introduction · 17 unmodified lines | |||
| 18 | Datagram Congestion Control Protocol (DCCP) is an unreliable, connection | 18 | Datagram Congestion Control Protocol (DCCP) is an unreliable, connection |
| 19 | oriented protocol designed to solve issues present in UDP and TCP, particularly | 19 | oriented protocol designed to solve issues present in UDP and TCP, particularly |
| 20 | for real-time and multimedia (streaming) traffic. | 20 | for real-time and multimedia (streaming) traffic. |
| 21 | It divides into a base protocol (RFC 4340) and plugable congestion control | 21 | It divides into a base protocol (RFC 4340) and pluggable congestion control |
| 22 | modules called CCIDs. Like plugable TCP congestion control, at least one CCID | 22 | modules called CCIDs. Like pluggable TCP congestion control, at least one CCID |
| 23 | needs to be enabled in order for the protocol to function properly. In the Linux | 23 | needs to be enabled in order for the protocol to function properly. In the Linux |
| 24 | implementation, this is the TCP-like CCID2 (RFC 4341). Additional CCIDs, such as | 24 | implementation, this is the TCP-like CCID2 (RFC 4341). Additional CCIDs, such as |
| 25 | the TCP-friendly CCID3 (RFC 4342), are optional. | 25 | the TCP-friendly CCID3 (RFC 4342), are optional. |
| @@ -103,7 +103,7 @@ Additional Configurations · 102 unmodified lines | |||
| 103 | PRO/100 Family of Adapters is e100. | 103 | PRO/100 Family of Adapters is e100. |
| 104 | 104 | ||
| 105 | As an example, if you install the e100 driver for two PRO/100 adapters | 105 | As an example, if you install the e100 driver for two PRO/100 adapters |
| 106 | (eth0 and eth1), add the following to a configuraton file in /etc/modprobe.d/ | 106 | (eth0 and eth1), add the following to a configuration file in /etc/modprobe.d/ |
| 107 | 107 | ||
| 108 | alias eth0 e100 | 108 | alias eth0 e100 |
| 109 | alias eth1 e100 | 109 | alias eth1 e100 |
| @@ -4,7 +4,7 @@ · 3 unmodified lines | |||
| 4 | 4 | ||
| 5 | Introduction | 5 | Introduction |
| 6 | ============ | 6 | ============ |
| 7 | The IEEE 802.15.4 working group focuses on standartization of bottom | 7 | The IEEE 802.15.4 working group focuses on standardization of bottom |
| 8 | two layers: Medium Access Control (MAC) and Physical (PHY). And there | 8 | two layers: Medium Access Control (MAC) and Physical (PHY). And there |
| 9 | are mainly two options available for upper layers: | 9 | are mainly two options available for upper layers: |
| 10 | - ZigBee - proprietary protocol from ZigBee Alliance | 10 | - ZigBee - proprietary protocol from ZigBee Alliance |
| @@ -66,7 +66,7 @@ net_device, with .type = ARPHRD_IEEE802154. Data is exchanged with socket family · 55 unmodified lines | |||
| 66 | code via plain sk_buffs. On skb reception skb->cb must contain additional | 66 | code via plain sk_buffs. On skb reception skb->cb must contain additional |
| 67 | info as described in the struct ieee802154_mac_cb. During packet transmission | 67 | info as described in the struct ieee802154_mac_cb. During packet transmission |
| 68 | the skb->cb is used to provide additional data to device's header_ops->create | 68 | the skb->cb is used to provide additional data to device's header_ops->create |
| 69 | function. Be aware, that this data can be overriden later (when socket code | 69 | function. Be aware that this data can be overridden later (when socket code |
| 70 | submits skb to qdisc), so if you need something from that cb later, you should | 70 | submits skb to qdisc), so if you need something from that cb later, you should |
| 71 | store info in the skb->data on your own. | 71 | store info in the skb->data on your own. |
| 72 | 72 | ||
| @@ -267,17 +267,6 @@ tcp_max_orphans - INTEGER · 266 unmodified lines | |||
| 267 | more aggressively. Let me to remind again: each orphan eats | 267 | more aggressively. Let me to remind again: each orphan eats |
| 268 | up to ~64K of unswappable memory. | 268 | up to ~64K of unswappable memory. |
| 269 | 269 | ||
| 270 | tcp_max_ssthresh - INTEGER | ||
| 271 | Limited Slow-Start for TCP with large congestion windows (cwnd) defined in | ||
| 272 | RFC3742. Limited slow-start is a mechanism to limit growth of the cwnd | ||
| 273 | on the region where cwnd is larger than tcp_max_ssthresh. TCP increases cwnd | ||
| 274 | by at most tcp_max_ssthresh segments, and by at least tcp_max_ssthresh/2 | ||
| 275 | segments per RTT when the cwnd is above tcp_max_ssthresh. | ||
| 276 | If TCP connection increased cwnd to thousands (or tens of thousands) segments, | ||
| 277 | and thousands of packets were being dropped during slow-start, you can set | ||
| 278 | tcp_max_ssthresh to improve performance for new TCP connection. | ||
| 279 | Default: 0 (off) | ||
| 280 | |||
| 281 | tcp_max_syn_backlog - INTEGER | 270 | tcp_max_syn_backlog - INTEGER |
| 282 | Maximal number of remembered connection requests, which have not | 271 | Maximal number of remembered connection requests, which have not |
| 283 | received an acknowledgment from connecting client. | 272 | received an acknowledgment from connecting client. |
| @@ -451,7 +440,7 @@ tcp_fastopen - INTEGER · 167 unmodified lines | |||
| 451 | connect() to perform a TCP handshake automatically. | 440 | connect() to perform a TCP handshake automatically. |
| 452 | 441 | ||
| 453 | The values (bitmap) are | 442 | The values (bitmap) are |
| 454 | 1: Enables sending data in the opening SYN on the client. | 443 | 1: Enables sending data in the opening SYN on the client w/ MSG_FASTOPEN. |
| 455 | 2: Enables TCP Fast Open on the server side, i.e., allowing data in | 444 | 2: Enables TCP Fast Open on the server side, i.e., allowing data in |
| 456 | a SYN packet to be accepted and passed to the application before | 445 | a SYN packet to be accepted and passed to the application before |
| 457 | 3-way hand shake finishes. | 446 | 3-way hand shake finishes. |
| @@ -464,7 +453,7 @@ tcp_fastopen - INTEGER · 6 unmodified lines | |||
| 464 | different ways of setting max_qlen without the TCP_FASTOPEN socket | 453 | different ways of setting max_qlen without the TCP_FASTOPEN socket |
| 465 | option. | 454 | option. |
| 466 | 455 | ||
| 467 | Default: 0 | 456 | Default: 1 |
| 468 | 457 | ||
| 469 | Note that the client & server side Fast Open flags (1 and 2 | 458 | Note that the client & server side Fast Open flags (1 and 2 |
| 470 | respectively) must be also enabled before the rest of flags can take | 459 | respectively) must be also enabled before the rest of flags can take |
| @@ -588,9 +577,6 @@ tcp_limit_output_bytes - INTEGER · 117 unmodified lines | |||
| 588 | typical pfifo_fast qdiscs. | 577 | typical pfifo_fast qdiscs. |
| 589 | tcp_limit_output_bytes limits the number of bytes on qdisc | 578 | tcp_limit_output_bytes limits the number of bytes on qdisc |
| 590 | or device to reduce artificial RTT/cwnd and reduce bufferbloat. | 579 | or device to reduce artificial RTT/cwnd and reduce bufferbloat. |
| 591 | Note: For GSO/TSO enabled flows, we try to have at least two | ||
| 592 | packets in flight. Reducing tcp_limit_output_bytes might also | ||
| 593 | reduce the size of individual GSO packet (64KB being the max) | ||
| 594 | Default: 131072 | 580 | Default: 131072 |
| 595 | 581 | ||
| 596 | tcp_challenge_ack_limit - INTEGER | 582 | tcp_challenge_ack_limit - INTEGER |
| @@ -197,7 +197,7 @@ state information because the file format is subject to change. It is · 196 unmodified lines | |||
| 197 | implemented to provide extra debug information to help diagnose | 197 | implemented to provide extra debug information to help diagnose |
| 198 | problems.) Users should use the netlink API. | 198 | problems.) Users should use the netlink API. |
| 199 | 199 | ||
| 200 | /proc/net/pppol2tp is also provided for backwards compaibility with | 200 | /proc/net/pppol2tp is also provided for backwards compatibility with |
| 201 | the original pppol2tp driver. It lists information about L2TPv2 | 201 | the original pppol2tp driver. It lists information about L2TPv2 |
| 202 | tunnels and sessions only. Its use is discouraged. | 202 | tunnels and sessions only. Its use is discouraged. |
| 203 | 203 | ||
| @@ -4,23 +4,23 @@ Information you need to know about netdev · 3 unmodified lines | |||
| 4 | 4 | ||
| 5 | Q: What is netdev? | 5 | Q: What is netdev? |
| 6 | 6 | ||
| 7 | A: It is a mailing list for all network related linux stuff. This includes | 7 | A: It is a mailing list for all network-related Linux stuff. This includes |
| 8 | anything found under net/ (i.e. core code like IPv6) and drivers/net | 8 | anything found under net/ (i.e. core code like IPv6) and drivers/net |
| 9 | (i.e. hardware specific drivers) in the linux source tree. | 9 | (i.e. hardware specific drivers) in the Linux source tree. |
| 10 | 10 | ||
| 11 | Note that some subsystems (e.g. wireless drivers) which have a high volume | 11 | Note that some subsystems (e.g. wireless drivers) which have a high volume |
| 12 | of traffic have their own specific mailing lists. | 12 | of traffic have their own specific mailing lists. |
| 13 | 13 | ||
| 14 | The netdev list is managed (like many other linux mailing lists) through | 14 | The netdev list is managed (like many other Linux mailing lists) through |
| 15 | VGER ( http://vger.kernel.org/ ) and archives can be found below: | 15 | VGER ( http://vger.kernel.org/ ) and archives can be found below: |
| 16 | 16 | ||
| 17 | http://marc.info/?l=linux-netdev | 17 | http://marc.info/?l=linux-netdev |
| 18 | http://www.spinics.net/lists/netdev/ | 18 | http://www.spinics.net/lists/netdev/ |
| 19 | 19 | ||
| 20 | Aside from subsystems like that mentioned above, all network related linux | 20 | Aside from subsystems like that mentioned above, all network-related Linux |
| 21 | development (i.e. RFC, review, comments, etc) takes place on netdev. | 21 | development (i.e. RFC, review, comments, etc.) takes place on netdev. |
| 22 | 22 | ||
| 23 | Q: How do the changes posted to netdev make their way into linux? | 23 | Q: How do the changes posted to netdev make their way into Linux? |
| 24 | 24 | ||
| 25 | A: There are always two trees (git repositories) in play. Both are driven | 25 | A: There are always two trees (git repositories) in play. Both are driven |
| 26 | by David Miller, the main network maintainer. There is the "net" tree, | 26 | by David Miller, the main network maintainer. There is the "net" tree, |
| @@ -35,7 +35,7 @@ A: There are always two trees (git repositories) in play. Both are driven · 8 unmodified lines | |||
| 35 | Q: How often do changes from these trees make it to the mainline Linus tree? | 35 | Q: How often do changes from these trees make it to the mainline Linus tree? |
| 36 | 36 | ||
| 37 | A: To understand this, you need to know a bit of background information | 37 | A: To understand this, you need to know a bit of background information |
| 38 | on the cadence of linux development. Each new release starts off with | 38 | on the cadence of Linux development. Each new release starts off with |
| 39 | a two week "merge window" where the main maintainers feed their new | 39 | a two week "merge window" where the main maintainers feed their new |
| 40 | stuff to Linus for merging into the mainline tree. After the two weeks, | 40 | stuff to Linus for merging into the mainline tree. After the two weeks, |
| 41 | the merge window is closed, and it is called/tagged "-rc1". No new | 41 | the merge window is closed, and it is called/tagged "-rc1". No new |
| @@ -46,7 +46,7 @@ A: To understand this, you need to know a bit of background information · 4 unmodified lines | |||
| 46 | things are in a state of churn), and a week after the last vX.Y-rcN | 46 | things are in a state of churn), and a week after the last vX.Y-rcN |
| 47 | was done, the official "vX.Y" is released. | 47 | was done, the official "vX.Y" is released. |
| 48 | 48 | ||
| 49 | Relating that to netdev: At the beginning of the 2 week merge window, | 49 | Relating that to netdev: At the beginning of the 2-week merge window, |
| 50 | the net-next tree will be closed - no new changes/features. The | 50 | the net-next tree will be closed - no new changes/features. The |
| 51 | accumulated new content of the past ~10 weeks will be passed onto | 51 | accumulated new content of the past ~10 weeks will be passed onto |
| 52 | mainline/Linus via a pull request for vX.Y -- at the same time, | 52 | mainline/Linus via a pull request for vX.Y -- at the same time, |
| @@ -59,16 +59,16 @@ A: To understand this, you need to know a bit of background information · 6 unmodified lines | |||
| 59 | IMPORTANT: Do not send new net-next content to netdev during the | 59 | IMPORTANT: Do not send new net-next content to netdev during the |
| 60 | period during which net-next tree is closed. | 60 | period during which net-next tree is closed. |
| 61 | 61 | ||
| 62 | Shortly after the two weeks have passed, (and vX.Y-rc1 is released) the | 62 | Shortly after the two weeks have passed (and vX.Y-rc1 is released), the |
| 63 | tree for net-next reopens to collect content for the next (vX.Y+1) release. | 63 | tree for net-next reopens to collect content for the next (vX.Y+1) release. |
| 64 | 64 | ||
| 65 | If you aren't subscribed to netdev and/or are simply unsure if net-next | 65 | If you aren't subscribed to netdev and/or are simply unsure if net-next |
| 66 | has re-opened yet, simply check the net-next git repository link above for | 66 | has re-opened yet, simply check the net-next git repository link above for |
| 67 | any new networking related commits. | 67 | any new networking-related commits. |
| 68 | 68 | ||
| 69 | The "net" tree continues to collect fixes for the vX.Y content, and | 69 | The "net" tree continues to collect fixes for the vX.Y content, and |
| 70 | is fed back to Linus at regular (~weekly) intervals. Meaning that the | 70 | is fed back to Linus at regular (~weekly) intervals. Meaning that the |
| 71 | focus for "net" is on stablilization and bugfixes. | 71 | focus for "net" is on stabilization and bugfixes. |
| 72 | 72 | ||
| 73 | Finally, the vX.Y gets released, and the whole cycle starts over. | 73 | Finally, the vX.Y gets released, and the whole cycle starts over. |
| 74 | 74 | ||
| @@ -217,7 +217,7 @@ A: Attention to detail. Re-read your own work as if you were the · 142 unmodified lines | |||
| 217 | to why it happens, and then if necessary, explain why the fix proposed | 217 | to why it happens, and then if necessary, explain why the fix proposed |
| 218 | is the best way to get things done. Don't mangle whitespace, and as | 218 | is the best way to get things done. Don't mangle whitespace, and as |
| 219 | is common, don't mis-indent function arguments that span multiple lines. | 219 | is common, don't mis-indent function arguments that span multiple lines. |
| 220 | If it is your 1st patch, mail it to yourself so you can test apply | 220 | If it is your first patch, mail it to yourself so you can test apply |
| 221 | it to an unpatched tree to confirm infrastructure didn't mangle it. | 221 | it to an unpatched tree to confirm infrastructure didn't mangle it. |
| 222 | 222 | ||
| 223 | Finally, go back and read Documentation/SubmittingPatches to be | 223 | Finally, go back and read Documentation/SubmittingPatches to be |
| @@ -10,12 +10,12 @@ network devices. · 9 unmodified lines | |||
| 10 | struct net_device allocation rules | 10 | struct net_device allocation rules |
| 11 | ================================== | 11 | ================================== |
| 12 | Network device structures need to persist even after module is unloaded and | 12 | Network device structures need to persist even after module is unloaded and |
| 13 | must be allocated with kmalloc. If device has registered successfully, | 13 | must be allocated with alloc_netdev_mqs() and friends. |
| 14 | it will be freed on last use by free_netdev. This is required to handle the | 14 | If device has registered successfully, it will be freed on last use |
| 15 | pathologic case cleanly (example: rmmod mydriver </sys/class/net/myeth/mtu ) | 15 | by free_netdev(). This is required to handle the pathologic case cleanly |
| 16 | (example: rmmod mydriver </sys/class/net/myeth/mtu ) | ||
| 16 | 17 | ||
| 17 | There are routines in net_init.c to handle the common cases of | 18 | alloc_netdev_mqs()/alloc_netdev() reserve extra space for driver |
| 18 | alloc_etherdev, alloc_netdev. These reserve extra space for driver | ||
| 19 | private data which gets freed when the network device is freed. If | 19 | private data which gets freed when the network device is freed. If |
| 20 | separately allocated data is attached to the network device | 20 | separately allocated data is attached to the network device |
| 21 | (netdev_priv(dev)) then it is up to the module exit handler to free that. | 21 | (netdev_priv(dev)) then it is up to the module exit handler to free that. |
| @@ -45,7 +45,7 @@ processing. · 44 unmodified lines | |||
| 45 | 45 | ||
| 46 | Conversion of the reception path involves calling poll() on the file | 46 | Conversion of the reception path involves calling poll() on the file |
| 47 | descriptor, once the socket is readable the frames from the ring are | 47 | descriptor, once the socket is readable the frames from the ring are |
| 48 | processsed in order until no more messages are available, as indicated by | 48 | processed in order until no more messages are available, as indicated by |
| 49 | a status word in the frame header. | 49 | a status word in the frame header. |
| 50 | 50 | ||
| 51 | On kernel side, in order to make use of memory mapped I/O on receive, the | 51 | On kernel side, in order to make use of memory mapped I/O on receive, the |
| @@ -56,7 +56,7 @@ Dumps of kernel databases automatically support memory mapped I/O. · 4 unmodified lines | |||
| 56 | 56 | ||
| 57 | Conversion of the transmit path involves changing message construction to | 57 | Conversion of the transmit path involves changing message construction to |
| 58 | use memory from the TX ring instead of (usually) a buffer declared on the | 58 | use memory from the TX ring instead of (usually) a buffer declared on the |
| 59 | stack and setting up the frame header approriately. Optionally poll() can | 59 | stack and setting up the frame header appropriately. Optionally poll() can |
| 60 | be used to wait for free frames in the TX ring. | 60 | be used to wait for free frames in the TX ring. |
| 61 | 61 | ||
| 62 | Structured and definitions for using memory mapped I/O are contained in | 62 | Structured and definitions for using memory mapped I/O are contained in |
| @@ -231,7 +231,7 @@ Ring setup: · 168 unmodified lines | |||
| 231 | if (setsockopt(fd, NETLINK_TX_RING, &req, sizeof(req)) < 0) | 231 | if (setsockopt(fd, NETLINK_TX_RING, &req, sizeof(req)) < 0) |
| 232 | exit(1) | 232 | exit(1) |
| 233 | 233 | ||
| 234 | /* Calculate size of each invididual ring */ | 234 | /* Calculate size of each individual ring */ |
| 235 | ring_size = req.nm_block_nr * req.nm_block_size; | 235 | ring_size = req.nm_block_nr * req.nm_block_size; |
| 236 | 236 | ||
| 237 | /* Map RX/TX rings. The TX ring is located after the RX ring */ | 237 | /* Map RX/TX rings. The TX ring is located after the RX ring */ |
| @@ -89,8 +89,8 @@ packets. The name 'carrier' and the inversion are historical, think of · 88 unmodified lines | |||
| 89 | it as lower layer. | 89 | it as lower layer. |
| 90 | 90 | ||
| 91 | Note that for certain kind of soft-devices, which are not managing any | 91 | Note that for certain kind of soft-devices, which are not managing any |
| 92 | real hardware, there is possible to set this bit from userpsace. | 92 | real hardware, it is possible to set this bit from userspace. One |
| 93 | One should use TVL IFLA_CARRIER to do so. | 93 | should use TVL IFLA_CARRIER to do so. |
| 94 | 94 | ||
| 95 | netif_carrier_ok() can be used to query that bit. | 95 | netif_carrier_ok() can be used to query that bit. |
| 96 | 96 | ||
| @@ -144,7 +144,7 @@ An overview of the RxRPC protocol: · 143 unmodified lines | |||
| 144 | (*) Calls use ACK packets to handle reliability. Data packets are also | 144 | (*) Calls use ACK packets to handle reliability. Data packets are also |
| 145 | explicitly sequenced per call. | 145 | explicitly sequenced per call. |
| 146 | 146 | ||
| 147 | (*) There are two types of positive acknowledgement: hard-ACKs and soft-ACKs. | 147 | (*) There are two types of positive acknowledgment: hard-ACKs and soft-ACKs. |
| 148 | A hard-ACK indicates to the far side that all the data received to a point | 148 | A hard-ACK indicates to the far side that all the data received to a point |
| 149 | has been received and processed; a soft-ACK indicates that the data has | 149 | has been received and processed; a soft-ACK indicates that the data has |
| 150 | been received but may yet be discarded and re-requested. The sender may | 150 | been received but may yet be discarded and re-requested. The sender may |
| @@ -160,7 +160,7 @@ Where: · 159 unmodified lines | |||
| 160 | o pmt: core has the embedded power module (optional). | 160 | o pmt: core has the embedded power module (optional). |
| 161 | o force_sf_dma_mode: force DMA to use the Store and Forward mode | 161 | o force_sf_dma_mode: force DMA to use the Store and Forward mode |
| 162 | instead of the Threshold. | 162 | instead of the Threshold. |
| 163 | o force_thresh_dma_mode: force DMA to use the Shreshold mode other than | 163 | o force_thresh_dma_mode: force DMA to use the Threshold mode other than |
| 164 | the Store and Forward mode. | 164 | the Store and Forward mode. |
| 165 | o riwt_off: force to disable the RX watchdog feature and switch to NAPI mode. | 165 | o riwt_off: force to disable the RX watchdog feature and switch to NAPI mode. |
| 166 | o fix_mac_speed: this callback is used for modifying some syscfg registers | 166 | o fix_mac_speed: this callback is used for modifying some syscfg registers |
| @@ -175,7 +175,7 @@ Where: · 8 unmodified lines | |||
| 175 | registers. | 175 | registers. |
| 176 | o custom_cfg/custom_data: this is a custom configuration that can be passed | 176 | o custom_cfg/custom_data: this is a custom configuration that can be passed |
| 177 | while initializing the resources. | 177 | while initializing the resources. |
| 178 | o bsp_priv: another private poiter. | 178 | o bsp_priv: another private pointer. |
| 179 | 179 | ||
| 180 | For MDIO bus The we have: | 180 | For MDIO bus The we have: |
| 181 | 181 | ||
| @@ -271,7 +271,7 @@ reset procedure etc). · 89 unmodified lines | |||
| 271 | o dwmac1000_dma.c: dma functions for the GMAC chip; | 271 | o dwmac1000_dma.c: dma functions for the GMAC chip; |
| 272 | o dwmac1000.h: specific header file for the GMAC; | 272 | o dwmac1000.h: specific header file for the GMAC; |
| 273 | o dwmac100_core: MAC 100 core and dma code; | 273 | o dwmac100_core: MAC 100 core and dma code; |
| 274 | o dwmac100_dma.c: dma funtions for the MAC chip; | 274 | o dwmac100_dma.c: dma functions for the MAC chip; |
| 275 | o dwmac1000.h: specific header file for the MAC; | 275 | o dwmac1000.h: specific header file for the MAC; |
| 276 | o dwmac_lib.c: generic DMA functions shared among chips; | 276 | o dwmac_lib.c: generic DMA functions shared among chips; |
| 277 | o enh_desc.c: functions for handling enhanced descriptors; | 277 | o enh_desc.c: functions for handling enhanced descriptors; |
| @@ -364,4 +364,4 @@ Auto-negotiated Link Parter Ability. · 86 unmodified lines | |||
| 364 | 10) TODO: | 364 | 10) TODO: |
| 365 | o XGMAC is not supported. | 365 | o XGMAC is not supported. |
| 366 | o Complete the TBI & RTBI support. | 366 | o Complete the TBI & RTBI support. |
| 367 | o extened VLAN support for 3.70a SYNP GMAC. | 367 | o extend VLAN support for 3.70a SYNP GMAC. |
| @@ -68,7 +68,7 @@ Module parameters · 67 unmodified lines | |||
| 68 | 68 | ||
| 69 | There are several parameters which may be provided to the driver when | 69 | There are several parameters which may be provided to the driver when |
| 70 | its module is loaded. These are usually placed in /etc/modprobe.d/*.conf | 70 | its module is loaded. These are usually placed in /etc/modprobe.d/*.conf |
| 71 | configuretion files. Example: | 71 | configuration files. Example: |
| 72 | 72 | ||
| 73 | options 3c59x debug=3 rx_copybreak=300 | 73 | options 3c59x debug=3 rx_copybreak=300 |
| 74 | 74 | ||
| @@ -178,7 +178,7 @@ max_interrupt_work=N · 103 unmodified lines | |||
| 178 | 178 | ||
| 179 | The driver's interrupt service routine can handle many receive and | 179 | The driver's interrupt service routine can handle many receive and |
| 180 | transmit packets in a single invocation. It does this in a loop. | 180 | transmit packets in a single invocation. It does this in a loop. |
| 181 | The value of max_interrupt_work governs how mnay times the interrupt | 181 | The value of max_interrupt_work governs how many times the interrupt |
| 182 | service routine will loop. The default value is 32 loops. If this | 182 | service routine will loop. The default value is 32 loops. If this |
| 183 | is exceeded the interrupt service routine gives up and generates a | 183 | is exceeded the interrupt service routine gives up and generates a |
| 184 | warning message "eth0: Too much work in interrupt". | 184 | warning message "eth0: Too much work in interrupt". |
| @@ -105,7 +105,7 @@ reduced by the following measures or a combination thereof: · 104 unmodified lines | |||
| 105 | later. | 105 | later. |
| 106 | The lapb module interface was modified to support this. Its | 106 | The lapb module interface was modified to support this. Its |
| 107 | data_indication() method should now transparently pass the | 107 | data_indication() method should now transparently pass the |
| 108 | netif_rx() return value to the (lapb mopdule) caller. | 108 | netif_rx() return value to the (lapb module) caller. |
| 109 | (2) Drivers for kernel versions 2.2.x should always check the global | 109 | (2) Drivers for kernel versions 2.2.x should always check the global |
| 110 | variable netdev_dropping when a new frame is received. The driver | 110 | variable netdev_dropping when a new frame is received. The driver |
| 111 | should only call netif_rx() if netdev_dropping is zero. Otherwise | 111 | should only call netif_rx() if netdev_dropping is zero. Otherwise |
| @@ -0,0 +1,166 @@ | |||
| 1 | PHY SUBSYSTEM | ||
| 2 | Kishon Vijay Abraham I <kishon@ti.com> | ||
| 3 | |||
| 4 | This document explains the Generic PHY Framework along with the APIs provided, | ||
| 5 | and how-to-use. | ||
| 6 | |||
| 7 | 1. Introduction | ||
| 8 | |||
| 9 | *PHY* is the abbreviation for physical layer. It is used to connect a device | ||
| 10 | to the physical medium e.g., the USB controller has a PHY to provide functions | ||
| 11 | such as serialization, de-serialization, encoding, decoding and is responsible | ||
| 12 | for obtaining the required data transmission rate. Note that some USB | ||
| 13 | controllers have PHY functionality embedded into it and others use an external | ||
| 14 | PHY. Other peripherals that use PHY include Wireless LAN, Ethernet, | ||
| 15 | SATA etc. | ||
| 16 | |||
| 17 | The intention of creating this framework is to bring the PHY drivers spread | ||
| 18 | all over the Linux kernel to drivers/phy to increase code re-use and for | ||
| 19 | better code maintainability. | ||
| 20 | |||
| 21 | This framework will be of use only to devices that use external PHY (PHY | ||
| 22 | functionality is not embedded within the controller). | ||
| 23 | |||
| 24 | 2. Registering/Unregistering the PHY provider | ||
| 25 | |||
| 26 | PHY provider refers to an entity that implements one or more PHY instances. | ||
| 27 | For the simple case where the PHY provider implements only a single instance of | ||
| 28 | the PHY, the framework provides its own implementation of of_xlate in | ||
| 29 | of_phy_simple_xlate. If the PHY provider implements multiple instances, it | ||
| 30 | should provide its own implementation of of_xlate. of_xlate is used only for | ||
| 31 | dt boot case. | ||
| 32 | |||
| 33 | #define of_phy_provider_register(dev, xlate) \ | ||
| 34 | __of_phy_provider_register((dev), THIS_MODULE, (xlate)) | ||
| 35 | |||
| 36 | #define devm_of_phy_provider_register(dev, xlate) \ | ||
| 37 | __devm_of_phy_provider_register((dev), THIS_MODULE, (xlate)) | ||
| 38 | |||
| 39 | of_phy_provider_register and devm_of_phy_provider_register macros can be used to | ||
| 40 | register the phy_provider and it takes device and of_xlate as | ||
| 41 | arguments. For the dt boot case, all PHY providers should use one of the above | ||
| 42 | 2 macros to register the PHY provider. | ||
| 43 | |||
| 44 | void devm_of_phy_provider_unregister(struct device *dev, | ||
| 45 | struct phy_provider *phy_provider); | ||
| 46 | void of_phy_provider_unregister(struct phy_provider *phy_provider); | ||
| 47 | |||
| 48 | devm_of_phy_provider_unregister and of_phy_provider_unregister can be used to | ||
| 49 | unregister the PHY. | ||
| 50 | |||
| 51 | 3. Creating the PHY | ||
| 52 | |||
| 53 | The PHY driver should create the PHY in order for other peripheral controllers | ||
| 54 | to make use of it. The PHY framework provides 2 APIs to create the PHY. | ||
| 55 | |||
| 56 | struct phy *phy_create(struct device *dev, const struct phy_ops *ops, | ||
| 57 | struct phy_init_data *init_data); | ||
| 58 | struct phy *devm_phy_create(struct device *dev, const struct phy_ops *ops, | ||
| 59 | struct phy_init_data *init_data); | ||
| 60 | |||
| 61 | The PHY drivers can use one of the above 2 APIs to create the PHY by passing | ||
| 62 | the device pointer, phy ops and init_data. | ||
| 63 | phy_ops is a set of function pointers for performing PHY operations such as | ||
| 64 | init, exit, power_on and power_off. *init_data* is mandatory to get a reference | ||
| 65 | to the PHY in the case of non-dt boot. See section *Board File Initialization* | ||
| 66 | on how init_data should be used. | ||
| 67 | |||
| 68 | Inorder to dereference the private data (in phy_ops), the phy provider driver | ||
| 69 | can use phy_set_drvdata() after creating the PHY and use phy_get_drvdata() in | ||
| 70 | phy_ops to get back the private data. | ||
| 71 | |||
| 72 | 4. Getting a reference to the PHY | ||
| 73 | |||
| 74 | Before the controller can make use of the PHY, it has to get a reference to | ||
| 75 | it. This framework provides the following APIs to get a reference to the PHY. | ||
| 76 | |||
| 77 | struct phy *phy_get(struct device *dev, const char *string); | ||
| 78 | struct phy *devm_phy_get(struct device *dev, const char *string); | ||
| 79 | |||
| 80 | phy_get and devm_phy_get can be used to get the PHY. In the case of dt boot, | ||
| 81 | the string arguments should contain the phy name as given in the dt data and | ||
| 82 | in the case of non-dt boot, it should contain the label of the PHY. | ||
| 83 | The only difference between the two APIs is that devm_phy_get associates the | ||
| 84 | device with the PHY using devres on successful PHY get. On driver detach, | ||
| 85 | release function is invoked on the the devres data and devres data is freed. | ||
| 86 | |||
| 87 | 5. Releasing a reference to the PHY | ||
| 88 | |||
| 89 | When the controller no longer needs the PHY, it has to release the reference | ||
| 90 | to the PHY it has obtained using the APIs mentioned in the above section. The | ||
| 91 | PHY framework provides 2 APIs to release a reference to the PHY. | ||
| 92 | |||
| 93 | void phy_put(struct phy *phy); | ||
| 94 | void devm_phy_put(struct device *dev, struct phy *phy); | ||
| 95 | |||
| 96 | Both these APIs are used to release a reference to the PHY and devm_phy_put | ||
| 97 | destroys the devres associated with this PHY. | ||
| 98 | |||
| 99 | 6. Destroying the PHY | ||
| 100 | |||
| 101 | When the driver that created the PHY is unloaded, it should destroy the PHY it | ||
| 102 | created using one of the following 2 APIs. | ||
| 103 | |||
| 104 | void phy_destroy(struct phy *phy); | ||
| 105 | void devm_phy_destroy(struct device *dev, struct phy *phy); | ||
| 106 | |||
| 107 | Both these APIs destroy the PHY and devm_phy_destroy destroys the devres | ||
| 108 | associated with this PHY. | ||
| 109 | |||
| 110 | 7. PM Runtime | ||
| 111 | |||
| 112 | This subsystem is pm runtime enabled. So while creating the PHY, | ||
| 113 | pm_runtime_enable of the phy device created by this subsystem is called and | ||
| 114 | while destroying the PHY, pm_runtime_disable is called. Note that the phy | ||
| 115 | device created by this subsystem will be a child of the device that calls | ||
| 116 | phy_create (PHY provider device). | ||
| 117 | |||
| 118 | So pm_runtime_get_sync of the phy_device created by this subsystem will invoke | ||
| 119 | pm_runtime_get_sync of PHY provider device because of parent-child relationship. | ||
| 120 | It should also be noted that phy_power_on and phy_power_off performs | ||
| 121 | phy_pm_runtime_get_sync and phy_pm_runtime_put respectively. | ||
| 122 | There are exported APIs like phy_pm_runtime_get, phy_pm_runtime_get_sync, | ||
| 123 | phy_pm_runtime_put, phy_pm_runtime_put_sync, phy_pm_runtime_allow and | ||
| 124 | phy_pm_runtime_forbid for performing PM operations. | ||
| 125 | |||
| 126 | 8. Board File Initialization | ||
| 127 | |||
| 128 | Certain board file initialization is necessary in order to get a reference | ||
| 129 | to the PHY in the case of non-dt boot. | ||
| 130 | Say we have a single device that implements 3 PHYs that of USB, SATA and PCIe, | ||
| 131 | then in the board file the following initialization should be done. | ||
| 132 | |||
| 133 | struct phy_consumer consumers[] = { | ||
| 134 | PHY_CONSUMER("dwc3.0", "usb"), | ||
| 135 | PHY_CONSUMER("pcie.0", "pcie"), | ||
| 136 | PHY_CONSUMER("sata.0", "sata"), | ||
| 137 | }; | ||
| 138 | PHY_CONSUMER takes 2 parameters, first is the device name of the controller | ||
| 139 | (PHY consumer) and second is the port name. | ||
| 140 | |||
| 141 | struct phy_init_data init_data = { | ||
| 142 | .consumers = consumers, | ||
| 143 | .num_consumers = ARRAY_SIZE(consumers), | ||
| 144 | }; | ||
| 145 | |||
| 146 | static const struct platform_device pipe3_phy_dev = { | ||
| 147 | .name = "pipe3-phy", | ||
| 148 | .id = -1, | ||
| 149 | .dev = { | ||
| 150 | .platform_data = { | ||
| 151 | .init_data = &init_data, | ||
| 152 | }, | ||
| 153 | }, | ||
| 154 | }; | ||
| 155 | |||
| 156 | then, while doing phy_create, the PHY driver should pass this init_data | ||
| 157 | phy_create(dev, ops, pdata->init_data); | ||
| 158 | |||
| 159 | and the controller driver (phy consumer) should pass the port name along with | ||
| 160 | the device to get a reference to the PHY | ||
| 161 | phy_get(dev, "pcie"); | ||
| 162 | |||
| 163 | 9. DeviceTree Binding | ||
| 164 | |||
| 165 | The documentation for PHY dt binding can be found @ | ||
| 166 | Documentation/devicetree/bindings/phy/phy-bindings.txt | ||
| @@ -358,7 +358,12 @@ static struct pinctrl_gpio_range gpio_range = { · 357 unmodified lines | |||
| 358 | .gc = &chip; | 358 | .gc = &chip; |
| 359 | }; | 359 | }; |
| 360 | 360 | ||
| 361 | In this case the pin_base property will be ignored. | 361 | In this case the pin_base property will be ignored. If the name of a pin |
| 362 | group is known, the pins and npins elements of the above structure can be | ||
| 363 | initialised using the function pinctrl_get_group_pins(), e.g. for pin | ||
| 364 | group "foo": | ||
| 365 | |||
| 366 | pinctrl_get_group_pins(pctl, "foo", &gpio_range.pins, &gpio_range.npins); | ||
| 362 | 367 | ||
| 363 | When GPIO-specific functions in the pin control subsystem are called, these | 368 | When GPIO-specific functions in the pin control subsystem are called, these |
| 364 | ranges will be used to look up the appropriate pin controller by inspecting | 369 | ranges will be used to look up the appropriate pin controller by inspecting |
| @@ -42,7 +42,7 @@ We can represent these as three OPPs as the following {Hz, uV} tuples: · 41 unmodified lines | |||
| 42 | 42 | ||
| 43 | OPP library provides a set of helper functions to organize and query the OPP | 43 | OPP library provides a set of helper functions to organize and query the OPP |
| 44 | information. The library is located in drivers/base/power/opp.c and the header | 44 | information. The library is located in drivers/base/power/opp.c and the header |
| 45 | is located in include/linux/opp.h. OPP library can be enabled by enabling | 45 | is located in include/linux/pm_opp.h. OPP library can be enabled by enabling |
| 46 | CONFIG_PM_OPP from power management menuconfig menu. OPP library depends on | 46 | CONFIG_PM_OPP from power management menuconfig menu. OPP library depends on |
| 47 | CONFIG_PM as certain SoCs such as Texas Instrument's OMAP framework allows to | 47 | CONFIG_PM as certain SoCs such as Texas Instrument's OMAP framework allows to |
| 48 | optionally boot at a certain OPP without needing cpufreq. | 48 | optionally boot at a certain OPP without needing cpufreq. |
| @@ -71,14 +71,14 @@ operations until that OPP could be re-enabled if possible. · 22 unmodified lines | |||
| 71 | 71 | ||
| 72 | OPP library facilitates this concept in it's implementation. The following | 72 | OPP library facilitates this concept in it's implementation. The following |
| 73 | operational functions operate only on available opps: | 73 | operational functions operate only on available opps: |
| 74 | opp_find_freq_{ceil, floor}, opp_get_voltage, opp_get_freq, opp_get_opp_count | 74 | opp_find_freq_{ceil, floor}, dev_pm_opp_get_voltage, dev_pm_opp_get_freq, dev_pm_opp_get_opp_count |
| 75 | and opp_init_cpufreq_table | 75 | and dev_pm_opp_init_cpufreq_table |
| 76 | 76 | ||
| 77 | opp_find_freq_exact is meant to be used to find the opp pointer which can then | 77 | dev_pm_opp_find_freq_exact is meant to be used to find the opp pointer which can then |
| 78 | be used for opp_enable/disable functions to make an opp available as required. | 78 | be used for dev_pm_opp_enable/disable functions to make an opp available as required. |
| 79 | 79 | ||
| 80 | WARNING: Users of OPP library should refresh their availability count using | 80 | WARNING: Users of OPP library should refresh their availability count using |
| 81 | get_opp_count if opp_enable/disable functions are invoked for a device, the | 81 | get_opp_count if dev_pm_opp_enable/disable functions are invoked for a device, the |
| 82 | exact mechanism to trigger these or the notification mechanism to other | 82 | exact mechanism to trigger these or the notification mechanism to other |
| 83 | dependent subsystems such as cpufreq are left to the discretion of the SoC | 83 | dependent subsystems such as cpufreq are left to the discretion of the SoC |
| 84 | specific framework which uses the OPP library. Similar care needs to be taken | 84 | specific framework which uses the OPP library. Similar care needs to be taken |
| @@ -96,24 +96,24 @@ using RCU read locks. The opp_find_freq_{exact,ceil,floor}, · 11 unmodified lines | |||
| 96 | opp_get_{voltage, freq, opp_count} fall into this category. | 96 | opp_get_{voltage, freq, opp_count} fall into this category. |
| 97 | 97 | ||
| 98 | opp_{add,enable,disable} are updaters which use mutex and implement it's own | 98 | opp_{add,enable,disable} are updaters which use mutex and implement it's own |
| 99 | RCU locking mechanisms. opp_init_cpufreq_table acts as an updater and uses | 99 | RCU locking mechanisms. dev_pm_opp_init_cpufreq_table acts as an updater and uses |
| 100 | mutex to implment RCU updater strategy. These functions should *NOT* be called | 100 | mutex to implment RCU updater strategy. These functions should *NOT* be called |
| 101 | under RCU locks and other contexts that prevent blocking functions in RCU or | 101 | under RCU locks and other contexts that prevent blocking functions in RCU or |
| 102 | mutex operations from working. | 102 | mutex operations from working. |
| 103 | 103 | ||
| 104 | 2. Initial OPP List Registration | 104 | 2. Initial OPP List Registration |
| 105 | ================================ | 105 | ================================ |
| 106 | The SoC implementation calls opp_add function iteratively to add OPPs per | 106 | The SoC implementation calls dev_pm_opp_add function iteratively to add OPPs per |
| 107 | device. It is expected that the SoC framework will register the OPP entries | 107 | device. It is expected that the SoC framework will register the OPP entries |
| 108 | optimally- typical numbers range to be less than 5. The list generated by | 108 | optimally- typical numbers range to be less than 5. The list generated by |
| 109 | registering the OPPs is maintained by OPP library throughout the device | 109 | registering the OPPs is maintained by OPP library throughout the device |
| 110 | operation. The SoC framework can subsequently control the availability of the | 110 | operation. The SoC framework can subsequently control the availability of the |
| 111 | OPPs dynamically using the opp_enable / disable functions. | 111 | OPPs dynamically using the dev_pm_opp_enable / disable functions. |
| 112 | 112 | ||
| 113 | opp_add - Add a new OPP for a specific domain represented by the device pointer. | 113 | dev_pm_opp_add - Add a new OPP for a specific domain represented by the device pointer. |
| 114 | The OPP is defined using the frequency and voltage. Once added, the OPP | 114 | The OPP is defined using the frequency and voltage. Once added, the OPP |
| 115 | is assumed to be available and control of it's availability can be done | 115 | is assumed to be available and control of it's availability can be done |
| 116 | with the opp_enable/disable functions. OPP library internally stores | 116 | with the dev_pm_opp_enable/disable functions. OPP library internally stores |
| 117 | and manages this information in the opp struct. This function may be | 117 | and manages this information in the opp struct. This function may be |
| 118 | used by SoC framework to define a optimal list as per the demands of | 118 | used by SoC framework to define a optimal list as per the demands of |
| 119 | SoC usage environment. | 119 | SoC usage environment. |
| @@ -124,7 +124,7 @@ opp_add - Add a new OPP for a specific domain represented by the device pointer. · 4 unmodified lines | |||
| 124 | soc_pm_init() | 124 | soc_pm_init() |
| 125 | { | 125 | { |
| 126 | /* Do things */ | 126 | /* Do things */ |
| 127 | r = opp_add(mpu_dev, 1000000, 900000); | 127 | r = dev_pm_opp_add(mpu_dev, 1000000, 900000); |
| 128 | if (!r) { | 128 | if (!r) { |
| 129 | pr_err("%s: unable to register mpu opp(%d)\n", r); | 129 | pr_err("%s: unable to register mpu opp(%d)\n", r); |
| 130 | goto no_cpufreq; | 130 | goto no_cpufreq; |
| @@ -143,44 +143,44 @@ functions return the matching pointer representing the opp if a match is · 12 unmodified lines | |||
| 143 | found, else returns error. These errors are expected to be handled by standard | 143 | found, else returns error. These errors are expected to be handled by standard |
| 144 | error checks such as IS_ERR() and appropriate actions taken by the caller. | 144 | error checks such as IS_ERR() and appropriate actions taken by the caller. |
| 145 | 145 | ||
| 146 | opp_find_freq_exact - Search for an OPP based on an *exact* frequency and | 146 | dev_pm_opp_find_freq_exact - Search for an OPP based on an *exact* frequency and |
| 147 | availability. This function is especially useful to enable an OPP which | 147 | availability. This function is especially useful to enable an OPP which |
| 148 | is not available by default. | 148 | is not available by default. |
| 149 | Example: In a case when SoC framework detects a situation where a | 149 | Example: In a case when SoC framework detects a situation where a |
| 150 | higher frequency could be made available, it can use this function to | 150 | higher frequency could be made available, it can use this function to |
| 151 | find the OPP prior to call the opp_enable to actually make it available. | 151 | find the OPP prior to call the dev_pm_opp_enable to actually make it available. |
| 152 | rcu_read_lock(); | 152 | rcu_read_lock(); |
| 153 | opp = opp_find_freq_exact(dev, 1000000000, false); | 153 | opp = dev_pm_opp_find_freq_exact(dev, 1000000000, false); |
| 154 | rcu_read_unlock(); | 154 | rcu_read_unlock(); |
| 155 | /* dont operate on the pointer.. just do a sanity check.. */ | 155 | /* dont operate on the pointer.. just do a sanity check.. */ |
| 156 | if (IS_ERR(opp)) { | 156 | if (IS_ERR(opp)) { |
| 157 | pr_err("frequency not disabled!\n"); | 157 | pr_err("frequency not disabled!\n"); |
| 158 | /* trigger appropriate actions.. */ | 158 | /* trigger appropriate actions.. */ |
| 159 | } else { | 159 | } else { |
| 160 | opp_enable(dev,1000000000); | 160 | dev_pm_opp_enable(dev,1000000000); |
| 161 | } | 161 | } |
| 162 | 162 | ||
| 163 | NOTE: This is the only search function that operates on OPPs which are | 163 | NOTE: This is the only search function that operates on OPPs which are |
| 164 | not available. | 164 | not available. |
| 165 | 165 | ||
| 166 | opp_find_freq_floor - Search for an available OPP which is *at most* the | 166 | dev_pm_opp_find_freq_floor - Search for an available OPP which is *at most* the |
| 167 | provided frequency. This function is useful while searching for a lesser | 167 | provided frequency. This function is useful while searching for a lesser |
| 168 | match OR operating on OPP information in the order of decreasing | 168 | match OR operating on OPP information in the order of decreasing |
| 169 | frequency. | 169 | frequency. |
| 170 | Example: To find the highest opp for a device: | 170 | Example: To find the highest opp for a device: |
| 171 | freq = ULONG_MAX; | 171 | freq = ULONG_MAX; |
| 172 | rcu_read_lock(); | 172 | rcu_read_lock(); |
| 173 | opp_find_freq_floor(dev, &freq); | 173 | dev_pm_opp_find_freq_floor(dev, &freq); |
| 174 | rcu_read_unlock(); | 174 | rcu_read_unlock(); |
| 175 | 175 | ||
| 176 | opp_find_freq_ceil - Search for an available OPP which is *at least* the | 176 | dev_pm_opp_find_freq_ceil - Search for an available OPP which is *at least* the |
| 177 | provided frequency. This function is useful while searching for a | 177 | provided frequency. This function is useful while searching for a |
| 178 | higher match OR operating on OPP information in the order of increasing | 178 | higher match OR operating on OPP information in the order of increasing |
| 179 | frequency. | 179 | frequency. |
| 180 | Example 1: To find the lowest opp for a device: | 180 | Example 1: To find the lowest opp for a device: |
| 181 | freq = 0; | 181 | freq = 0; |
| 182 | rcu_read_lock(); | 182 | rcu_read_lock(); |
| 183 | opp_find_freq_ceil(dev, &freq); | 183 | dev_pm_opp_find_freq_ceil(dev, &freq); |
| 184 | rcu_read_unlock(); | 184 | rcu_read_unlock(); |
| 185 | Example 2: A simplified implementation of a SoC cpufreq_driver->target: | 185 | Example 2: A simplified implementation of a SoC cpufreq_driver->target: |
| 186 | soc_cpufreq_target(..) | 186 | soc_cpufreq_target(..) |
| @@ -188,7 +188,7 @@ opp_find_freq_ceil - Search for an available OPP which is *at least* the · 1 unmodified line | |||
| 188 | /* Do stuff like policy checks etc. */ | 188 | /* Do stuff like policy checks etc. */ |
| 189 | /* Find the best frequency match for the req */ | 189 | /* Find the best frequency match for the req */ |
| 190 | rcu_read_lock(); | 190 | rcu_read_lock(); |
| 191 | opp = opp_find_freq_ceil(dev, &freq); | 191 | opp = dev_pm_opp_find_freq_ceil(dev, &freq); |
| 192 | rcu_read_unlock(); | 192 | rcu_read_unlock(); |
| 193 | if (!IS_ERR(opp)) | 193 | if (!IS_ERR(opp)) |
| 194 | soc_switch_to_freq_voltage(freq); | 194 | soc_switch_to_freq_voltage(freq); |
| @@ -208,34 +208,34 @@ as thermal considerations (e.g. don't use OPPx until the temperature drops). · 13 unmodified lines | |||
| 208 | 208 | ||
| 209 | WARNING: Do not use these functions in interrupt context. | 209 | WARNING: Do not use these functions in interrupt context. |
| 210 | 210 | ||
| 211 | opp_enable - Make a OPP available for operation. | 211 | dev_pm_opp_enable - Make a OPP available for operation. |
| 212 | Example: Lets say that 1GHz OPP is to be made available only if the | 212 | Example: Lets say that 1GHz OPP is to be made available only if the |
| 213 | SoC temperature is lower than a certain threshold. The SoC framework | 213 | SoC temperature is lower than a certain threshold. The SoC framework |
| 214 | implementation might choose to do something as follows: | 214 | implementation might choose to do something as follows: |
| 215 | if (cur_temp < temp_low_thresh) { | 215 | if (cur_temp < temp_low_thresh) { |
| 216 | /* Enable 1GHz if it was disabled */ | 216 | /* Enable 1GHz if it was disabled */ |
| 217 | rcu_read_lock(); | 217 | rcu_read_lock(); |
| 218 | opp = opp_find_freq_exact(dev, 1000000000, false); | 218 | opp = dev_pm_opp_find_freq_exact(dev, 1000000000, false); |
| 219 | rcu_read_unlock(); | 219 | rcu_read_unlock(); |
| 220 | /* just error check */ | 220 | /* just error check */ |
| 221 | if (!IS_ERR(opp)) | 221 | if (!IS_ERR(opp)) |
| 222 | ret = opp_enable(dev, 1000000000); | 222 | ret = dev_pm_opp_enable(dev, 1000000000); |
| 223 | else | 223 | else |
| 224 | goto try_something_else; | 224 | goto try_something_else; |
| 225 | } | 225 | } |
| 226 | 226 | ||
| 227 | opp_disable - Make an OPP to be not available for operation | 227 | dev_pm_opp_disable - Make an OPP to be not available for operation |
| 228 | Example: Lets say that 1GHz OPP is to be disabled if the temperature | 228 | Example: Lets say that 1GHz OPP is to be disabled if the temperature |
| 229 | exceeds a threshold value. The SoC framework implementation might | 229 | exceeds a threshold value. The SoC framework implementation might |
| 230 | choose to do something as follows: | 230 | choose to do something as follows: |
| 231 | if (cur_temp > temp_high_thresh) { | 231 | if (cur_temp > temp_high_thresh) { |
| 232 | /* Disable 1GHz if it was enabled */ | 232 | /* Disable 1GHz if it was enabled */ |
| 233 | rcu_read_lock(); | 233 | rcu_read_lock(); |
| 234 | opp = opp_find_freq_exact(dev, 1000000000, true); | 234 | opp = dev_pm_opp_find_freq_exact(dev, 1000000000, true); |
| 235 | rcu_read_unlock(); | 235 | rcu_read_unlock(); |
| 236 | /* just error check */ | 236 | /* just error check */ |
| 237 | if (!IS_ERR(opp)) | 237 | if (!IS_ERR(opp)) |
| 238 | ret = opp_disable(dev, 1000000000); | 238 | ret = dev_pm_opp_disable(dev, 1000000000); |
| 239 | else | 239 | else |
| 240 | goto try_something_else; | 240 | goto try_something_else; |
| 241 | } | 241 | } |
| @@ -247,7 +247,7 @@ information from the OPP structure is necessary. Once an OPP pointer is · 5 unmodified lines | |||
| 247 | retrieved using the search functions, the following functions can be used by SoC | 247 | retrieved using the search functions, the following functions can be used by SoC |
| 248 | framework to retrieve the information represented inside the OPP layer. | 248 | framework to retrieve the information represented inside the OPP layer. |
| 249 | 249 | ||
| 250 | opp_get_voltage - Retrieve the voltage represented by the opp pointer. | 250 | dev_pm_opp_get_voltage - Retrieve the voltage represented by the opp pointer. |
| 251 | Example: At a cpufreq transition to a different frequency, SoC | 251 | Example: At a cpufreq transition to a different frequency, SoC |
| 252 | framework requires to set the voltage represented by the OPP using | 252 | framework requires to set the voltage represented by the OPP using |
| 253 | the regulator framework to the Power Management chip providing the | 253 | the regulator framework to the Power Management chip providing the |
| @@ -256,15 +256,15 @@ opp_get_voltage - Retrieve the voltage represented by the opp pointer. · 2 unmodified lines | |||
| 256 | { | 256 | { |
| 257 | /* do things */ | 257 | /* do things */ |
| 258 | rcu_read_lock(); | 258 | rcu_read_lock(); |
| 259 | opp = opp_find_freq_ceil(dev, &freq); | 259 | opp = dev_pm_opp_find_freq_ceil(dev, &freq); |
| 260 | v = opp_get_voltage(opp); | 260 | v = dev_pm_opp_get_voltage(opp); |
| 261 | rcu_read_unlock(); | 261 | rcu_read_unlock(); |
| 262 | if (v) | 262 | if (v) |
| 263 | regulator_set_voltage(.., v); | 263 | regulator_set_voltage(.., v); |
| 264 | /* do other things */ | 264 | /* do other things */ |
| 265 | } | 265 | } |
| 266 | 266 | ||
| 267 | opp_get_freq - Retrieve the freq represented by the opp pointer. | 267 | dev_pm_opp_get_freq - Retrieve the freq represented by the opp pointer. |
| 268 | Example: Lets say the SoC framework uses a couple of helper functions | 268 | Example: Lets say the SoC framework uses a couple of helper functions |
| 269 | we could pass opp pointers instead of doing additional parameters to | 269 | we could pass opp pointers instead of doing additional parameters to |
| 270 | handle quiet a bit of data parameters. | 270 | handle quiet a bit of data parameters. |
| @@ -273,8 +273,8 @@ opp_get_freq - Retrieve the freq represented by the opp pointer. · 2 unmodified lines | |||
| 273 | /* do things.. */ | 273 | /* do things.. */ |
| 274 | max_freq = ULONG_MAX; | 274 | max_freq = ULONG_MAX; |
| 275 | rcu_read_lock(); | 275 | rcu_read_lock(); |
| 276 | max_opp = opp_find_freq_floor(dev,&max_freq); | 276 | max_opp = dev_pm_opp_find_freq_floor(dev,&max_freq); |
| 277 | requested_opp = opp_find_freq_ceil(dev,&freq); | 277 | requested_opp = dev_pm_opp_find_freq_ceil(dev,&freq); |
| 278 | if (!IS_ERR(max_opp) && !IS_ERR(requested_opp)) | 278 | if (!IS_ERR(max_opp) && !IS_ERR(requested_opp)) |
| 279 | r = soc_test_validity(max_opp, requested_opp); | 279 | r = soc_test_validity(max_opp, requested_opp); |
| 280 | rcu_read_unlock(); | 280 | rcu_read_unlock(); |
| @@ -282,25 +282,25 @@ opp_get_freq - Retrieve the freq represented by the opp pointer. · 1 unmodified line | |||
| 282 | } | 282 | } |
| 283 | soc_test_validity(..) | 283 | soc_test_validity(..) |
| 284 | { | 284 | { |
| 285 | if(opp_get_voltage(max_opp) < opp_get_voltage(requested_opp)) | 285 | if(dev_pm_opp_get_voltage(max_opp) < dev_pm_opp_get_voltage(requested_opp)) |
| 286 | return -EINVAL; | 286 | return -EINVAL; |
| 287 | if(opp_get_freq(max_opp) < opp_get_freq(requested_opp)) | 287 | if(dev_pm_opp_get_freq(max_opp) < dev_pm_opp_get_freq(requested_opp)) |
| 288 | return -EINVAL; | 288 | return -EINVAL; |
| 289 | /* do things.. */ | 289 | /* do things.. */ |
| 290 | } | 290 | } |
| 291 | 291 | ||
| 292 | opp_get_opp_count - Retrieve the number of available opps for a device | 292 | dev_pm_opp_get_opp_count - Retrieve the number of available opps for a device |
| 293 | Example: Lets say a co-processor in the SoC needs to know the available | 293 | Example: Lets say a co-processor in the SoC needs to know the available |
| 294 | frequencies in a table, the main processor can notify as following: | 294 | frequencies in a table, the main processor can notify as following: |
| 295 | soc_notify_coproc_available_frequencies() | 295 | soc_notify_coproc_available_frequencies() |
| 296 | { | 296 | { |
| 297 | /* Do things */ | 297 | /* Do things */ |
| 298 | rcu_read_lock(); | 298 | rcu_read_lock(); |
| 299 | num_available = opp_get_opp_count(dev); | 299 | num_available = dev_pm_opp_get_opp_count(dev); |
| 300 | speeds = kzalloc(sizeof(u32) * num_available, GFP_KERNEL); | 300 | speeds = kzalloc(sizeof(u32) * num_available, GFP_KERNEL); |
| 301 | /* populate the table in increasing order */ | 301 | /* populate the table in increasing order */ |
| 302 | freq = 0; | 302 | freq = 0; |
| 303 | while (!IS_ERR(opp = opp_find_freq_ceil(dev, &freq))) { | 303 | while (!IS_ERR(opp = dev_pm_opp_find_freq_ceil(dev, &freq))) { |
| 304 | speeds[i] = freq; | 304 | speeds[i] = freq; |
| 305 | freq++; | 305 | freq++; |
| 306 | i++; | 306 | i++; |
| @@ -313,7 +313,7 @@ opp_get_opp_count - Retrieve the number of available opps for a device · 6 unmodified lines | |||
| 313 | 313 | ||
| 314 | 6. Cpufreq Table Generation | 314 | 6. Cpufreq Table Generation |
| 315 | =========================== | 315 | =========================== |
| 316 | opp_init_cpufreq_table - cpufreq framework typically is initialized with | 316 | dev_pm_opp_init_cpufreq_table - cpufreq framework typically is initialized with |
| 317 | cpufreq_frequency_table_cpuinfo which is provided with the list of | 317 | cpufreq_frequency_table_cpuinfo which is provided with the list of |
| 318 | frequencies that are available for operation. This function provides | 318 | frequencies that are available for operation. This function provides |
| 319 | a ready to use conversion routine to translate the OPP layer's internal | 319 | a ready to use conversion routine to translate the OPP layer's internal |
| @@ -326,7 +326,7 @@ opp_init_cpufreq_table - cpufreq framework typically is initialized with · 6 unmodified lines | |||
| 326 | soc_pm_init() | 326 | soc_pm_init() |
| 327 | { | 327 | { |
| 328 | /* Do things */ | 328 | /* Do things */ |
| 329 | r = opp_init_cpufreq_table(dev, &freq_table); | 329 | r = dev_pm_opp_init_cpufreq_table(dev, &freq_table); |
| 330 | if (!r) | 330 | if (!r) |
| 331 | cpufreq_frequency_table_cpuinfo(policy, freq_table); | 331 | cpufreq_frequency_table_cpuinfo(policy, freq_table); |
| 332 | /* Do other things */ | 332 | /* Do other things */ |
| @@ -336,7 +336,7 @@ opp_init_cpufreq_table - cpufreq framework typically is initialized with · 3 unmodified lines | |||
| 336 | addition to CONFIG_PM as power management feature is required to | 336 | addition to CONFIG_PM as power management feature is required to |
| 337 | dynamically scale voltage and frequency in a system. | 337 | dynamically scale voltage and frequency in a system. |
| 338 | 338 | ||
| 339 | opp_free_cpufreq_table - Free up the table allocated by opp_init_cpufreq_table | 339 | dev_pm_opp_free_cpufreq_table - Free up the table allocated by dev_pm_opp_init_cpufreq_table |
| 340 | 340 | ||
| 341 | 7. Data Structures | 341 | 7. Data Structures |
| 342 | ================== | 342 | ================== |
| @@ -358,16 +358,16 @@ accessed by various functions as described above. However, the structures · 15 unmodified lines | |||
| 358 | representing the actual OPPs and domains are internal to the OPP library itself | 358 | representing the actual OPPs and domains are internal to the OPP library itself |
| 359 | to allow for suitable abstraction reusable across systems. | 359 | to allow for suitable abstraction reusable across systems. |
| 360 | 360 | ||
| 361 | struct opp - The internal data structure of OPP library which is used to | 361 | struct dev_pm_opp - The internal data structure of OPP library which is used to |
| 362 | represent an OPP. In addition to the freq, voltage, availability | 362 | represent an OPP. In addition to the freq, voltage, availability |
| 363 | information, it also contains internal book keeping information required | 363 | information, it also contains internal book keeping information required |
| 364 | for the OPP library to operate on. Pointer to this structure is | 364 | for the OPP library to operate on. Pointer to this structure is |
| 365 | provided back to the users such as SoC framework to be used as a | 365 | provided back to the users such as SoC framework to be used as a |
| 366 | identifier for OPP in the interactions with OPP layer. | 366 | identifier for OPP in the interactions with OPP layer. |
| 367 | 367 | ||
| 368 | WARNING: The struct opp pointer should not be parsed or modified by the | 368 | WARNING: The struct dev_pm_opp pointer should not be parsed or modified by the |
| 369 | users. The defaults of for an instance is populated by opp_add, but the | 369 | users. The defaults of for an instance is populated by dev_pm_opp_add, but the |
| 370 | availability of the OPP can be modified by opp_enable/disable functions. | 370 | availability of the OPP can be modified by dev_pm_opp_enable/disable functions. |
| 371 | 371 | ||
| 372 | struct device - This is used to identify a domain to the OPP layer. The | 372 | struct device - This is used to identify a domain to the OPP layer. The |
| 373 | nature of the device and it's implementation is left to the user of | 373 | nature of the device and it's implementation is left to the user of |
| @@ -377,19 +377,19 @@ Overall, in a simplistic view, the data structure operations is represented as · 3 unmodified lines | |||
| 377 | following: | 377 | following: |
| 378 | 378 | ||
| 379 | Initialization / modification: | 379 | Initialization / modification: |
| 380 | +-----+ /- opp_enable | 380 | +-----+ /- dev_pm_opp_enable |
| 381 | opp_add --> | opp | <------- | 381 | dev_pm_opp_add --> | opp | <------- |
| 382 | | +-----+ \- opp_disable | 382 | | +-----+ \- dev_pm_opp_disable |
| 383 | \-------> domain_info(device) | 383 | \-------> domain_info(device) |
| 384 | 384 | ||
| 385 | Search functions: | 385 | Search functions: |
| 386 | /-- opp_find_freq_ceil ---\ +-----+ | 386 | /-- dev_pm_opp_find_freq_ceil ---\ +-----+ |
| 387 | domain_info<---- opp_find_freq_exact -----> | opp | | 387 | domain_info<---- dev_pm_opp_find_freq_exact -----> | opp | |
| 388 | \-- opp_find_freq_floor ---/ +-----+ | 388 | \-- dev_pm_opp_find_freq_floor ---/ +-----+ |
| 389 | 389 | ||
| 390 | Retrieval functions: | 390 | Retrieval functions: |
| 391 | +-----+ /- opp_get_voltage | 391 | +-----+ /- dev_pm_opp_get_voltage |
| 392 | | opp | <--- | 392 | | opp | <--- |
| 393 | +-----+ \- opp_get_freq | 393 | +-----+ \- dev_pm_opp_get_freq |
| 394 | 394 | ||
| 395 | domain_info <- opp_get_opp_count | 395 | domain_info <- dev_pm_opp_get_opp_count |
| @@ -135,11 +135,11 @@ CAPACITY_LEVEL - capacity level. This corresponds to · 134 unmodified lines | |||
| 135 | POWER_SUPPLY_CAPACITY_LEVEL_*. | 135 | POWER_SUPPLY_CAPACITY_LEVEL_*. |
| 136 | 136 | ||
| 137 | TEMP - temperature of the power supply. | 137 | TEMP - temperature of the power supply. |
| 138 | TEMP_ALERT_MIN - minimum battery temperature alert value in milli centigrade. | 138 | TEMP_ALERT_MIN - minimum battery temperature alert. |
| 139 | TEMP_ALERT_MAX - maximum battery temperature alert value in milli centigrade. | 139 | TEMP_ALERT_MAX - maximum battery temperature alert. |
| 140 | TEMP_AMBIENT - ambient temperature. | 140 | TEMP_AMBIENT - ambient temperature. |
| 141 | TEMP_AMBIENT_ALERT_MIN - minimum ambient temperature alert value in milli centigrade. | 141 | TEMP_AMBIENT_ALERT_MIN - minimum ambient temperature alert. |
| 142 | TEMP_AMBIENT_ALERT_MAX - maximum ambient temperature alert value in milli centigrade. | 142 | TEMP_AMBIENT_ALERT_MAX - maximum ambient temperature alert. |
| 143 | 143 | ||
| 144 | TIME_TO_EMPTY - seconds left for battery to be considered empty (i.e. | 144 | TIME_TO_EMPTY - seconds left for battery to be considered empty (i.e. |
| 145 | while battery powers a load) | 145 | while battery powers a load) |
| @@ -0,0 +1,236 @@ | |||
| 1 | Power Capping Framework | ||
| 2 | ================================== | ||
| 3 | |||
| 4 | The power capping framework provides a consistent interface between the kernel | ||
| 5 | and the user space that allows power capping drivers to expose the settings to | ||
| 6 | user space in a uniform way. | ||
| 7 | |||
| 8 | Terminology | ||
| 9 | ========================= | ||
| 10 | The framework exposes power capping devices to user space via sysfs in the | ||
| 11 | form of a tree of objects. The objects at the root level of the tree represent | ||
| 12 | 'control types', which correspond to different methods of power capping. For | ||
| 13 | example, the intel-rapl control type represents the Intel "Running Average | ||
| 14 | Power Limit" (RAPL) technology, whereas the 'idle-injection' control type | ||
| 15 | corresponds to the use of idle injection for controlling power. | ||
| 16 | |||
| 17 | Power zones represent different parts of the system, which can be controlled and | ||
| 18 | monitored using the power capping method determined by the control type the | ||
| 19 | given zone belongs to. They each contain attributes for monitoring power, as | ||
| 20 | well as controls represented in the form of power constraints. If the parts of | ||
| 21 | the system represented by different power zones are hierarchical (that is, one | ||
| 22 | bigger part consists of multiple smaller parts that each have their own power | ||
| 23 | controls), those power zones may also be organized in a hierarchy with one | ||
| 24 | parent power zone containing multiple subzones and so on to reflect the power | ||
| 25 | control topology of the system. In that case, it is possible to apply power | ||
| 26 | capping to a set of devices together using the parent power zone and if more | ||
| 27 | fine grained control is required, it can be applied through the subzones. | ||
| 28 | |||
| 29 | |||
| 30 | Example sysfs interface tree: | ||
| 31 | |||
| 32 | /sys/devices/virtual/powercap | ||
| 33 | ??? intel-rapl | ||
| 34 | ??? intel-rapl:0 | ||
| 35 | ? ??? constraint_0_name | ||
| 36 | ? ??? constraint_0_power_limit_uw | ||
| 37 | ? ??? constraint_0_time_window_us | ||
| 38 | ? ??? constraint_1_name | ||
| 39 | ? ??? constraint_1_power_limit_uw | ||
| 40 | ? ??? constraint_1_time_window_us | ||
| 41 | ? ??? device -> ../../intel-rapl | ||
| 42 | ? ??? energy_uj | ||
| 43 | ? ??? intel-rapl:0:0 | ||
| 44 | ? ? ??? constraint_0_name | ||
| 45 | ? ? ??? constraint_0_power_limit_uw | ||
| 46 | ? ? ??? constraint_0_time_window_us | ||
| 47 | ? ? ??? constraint_1_name | ||
| 48 | ? ? ??? constraint_1_power_limit_uw | ||
| 49 | ? ? ??? constraint_1_time_window_us | ||
| 50 | ? ? ??? device -> ../../intel-rapl:0 | ||
| 51 | ? ? ??? energy_uj | ||
| 52 | ? ? ??? max_energy_range_uj | ||
| 53 | ? ? ??? name | ||
| 54 | ? ? ??? enabled | ||
| 55 | ? ? ??? power | ||
| 56 | ? ? ? ??? async | ||
| 57 | ? ? ? [] | ||
| 58 | ? ? ??? subsystem -> ../../../../../../class/power_cap | ||
| 59 | ? ? ??? uevent | ||
| 60 | ? ??? intel-rapl:0:1 | ||
| 61 | ? ? ??? constraint_0_name | ||
| 62 | ? ? ??? constraint_0_power_limit_uw | ||
| 63 | ? ? ??? constraint_0_time_window_us | ||
| 64 | ? ? ??? constraint_1_name | ||
| 65 | ? ? ??? constraint_1_power_limit_uw | ||
| 66 | ? ? ??? constraint_1_time_window_us | ||
| 67 | ? ? ??? device -> ../../intel-rapl:0 | ||
| 68 | ? ? ??? energy_uj | ||
| 69 | ? ? ??? max_energy_range_uj | ||
| 70 | ? ? ??? name | ||
| 71 | ? ? ??? enabled | ||
| 72 | ? ? ??? power | ||
| 73 | ? ? ? ??? async | ||
| 74 | ? ? ? [] | ||
| 75 | ? ? ??? subsystem -> ../../../../../../class/power_cap | ||
| 76 | ? ? ??? uevent | ||
| 77 | ? ??? max_energy_range_uj | ||
| 78 | ? ??? max_power_range_uw | ||
| 79 | ? ??? name | ||
| 80 | ? ??? enabled | ||
| 81 | ? ??? power | ||
| 82 | ? ? ??? async | ||
| 83 | ? ? [] | ||
| 84 | ? ??? subsystem -> ../../../../../class/power_cap | ||
| 85 | ? ??? enabled | ||
| 86 | ? ??? uevent | ||
| 87 | ??? intel-rapl:1 | ||
| 88 | ? ??? constraint_0_name | ||
| 89 | ? ??? constraint_0_power_limit_uw | ||
| 90 | ? ??? constraint_0_time_window_us | ||
| 91 | ? ??? constraint_1_name | ||
| 92 | ? ??? constraint_1_power_limit_uw | ||
| 93 | ? ??? constraint_1_time_window_us | ||
| 94 | ? ??? device -> ../../intel-rapl | ||
| 95 | ? ??? energy_uj | ||
| 96 | ? ??? intel-rapl:1:0 | ||
| 97 | ? ? ??? constraint_0_name | ||
| 98 | ? ? ??? constraint_0_power_limit_uw | ||
| 99 | ? ? ??? constraint_0_time_window_us | ||
| 100 | ? ? ??? constraint_1_name | ||
| 101 | ? ? ??? constraint_1_power_limit_uw | ||
| 102 | ? ? ??? constraint_1_time_window_us | ||
| 103 | ? ? ??? device -> ../../intel-rapl:1 | ||
| 104 | ? ? ??? energy_uj | ||
| 105 | ? ? ??? max_energy_range_uj | ||
| 106 | ? ? ??? name | ||
| 107 | ? ? ??? enabled | ||
| 108 | ? ? ??? power | ||
| 109 | ? ? ? ??? async | ||
| 110 | ? ? ? [] | ||
| 111 | ? ? ??? subsystem -> ../../../../../../class/power_cap | ||
| 112 | ? ? ??? uevent | ||
| 113 | ? ??? intel-rapl:1:1 | ||
| 114 | ? ? ??? constraint_0_name | ||
| 115 | ? ? ??? constraint_0_power_limit_uw | ||
| 116 | ? ? ??? constraint_0_time_window_us | ||
| 117 | ? ? ??? constraint_1_name | ||
| 118 | ? ? ??? constraint_1_power_limit_uw | ||
| 119 | ? ? ??? constraint_1_time_window_us | ||
| 120 | ? ? ??? device -> ../../intel-rapl:1 | ||
| 121 | ? ? ??? energy_uj | ||
| 122 | ? ? ??? max_energy_range_uj | ||
| 123 | ? ? ??? name | ||
| 124 | ? ? ??? enabled | ||
| 125 | ? ? ??? power | ||
| 126 | ? ? ? ??? async | ||
| 127 | ? ? ? [] | ||
| 128 | ? ? ??? subsystem -> ../../../../../../class/power_cap | ||
| 129 | ? ? ??? uevent | ||
| 130 | ? ??? max_energy_range_uj | ||
| 131 | ? ??? max_power_range_uw | ||
| 132 | ? ??? name | ||
| 133 | ? ??? enabled | ||
| 134 | ? ??? power | ||
| 135 | ? ? ??? async | ||
| 136 | ? ? [] | ||
| 137 | ? ??? subsystem -> ../../../../../class/power_cap | ||
| 138 | ? ??? uevent | ||
| 139 | ??? power | ||
| 140 | ? ??? async | ||
| 141 | ? [] | ||
| 142 | ??? subsystem -> ../../../../class/power_cap | ||
| 143 | ??? enabled | ||
| 144 | ??? uevent | ||
| 145 | |||
| 146 | The above example illustrates a case in which the Intel RAPL technology, | ||
| 147 | available in Intel® IA-64 and IA-32 Processor Architectures, is used. There is one | ||
| 148 | control type called intel-rapl which contains two power zones, intel-rapl:0 and | ||
| 149 | intel-rapl:1, representing CPU packages. Each of these power zones contains | ||
| 150 | two subzones, intel-rapl:j:0 and intel-rapl:j:1 (j = 0, 1), representing the | ||
| 151 | "core" and the "uncore" parts of the given CPU package, respectively. All of | ||
| 152 | the zones and subzones contain energy monitoring attributes (energy_uj, | ||
| 153 | max_energy_range_uj) and constraint attributes (constraint_*) allowing controls | ||
| 154 | to be applied (the constraints in the 'package' power zones apply to the whole | ||
| 155 | CPU packages and the subzone constraints only apply to the respective parts of | ||
| 156 | the given package individually). Since Intel RAPL doesn't provide instantaneous | ||
| 157 | power value, there is no power_uw attribute. | ||
| 158 | |||
| 159 | In addition to that, each power zone contains a name attribute, allowing the | ||
| 160 | part of the system represented by that zone to be identified. | ||
| 161 | For example: | ||
| 162 | |||
| 163 | cat /sys/class/power_cap/intel-rapl/intel-rapl:0/name | ||
| 164 | package-0 | ||
| 165 | |||
| 166 | The Intel RAPL technology allows two constraints, short term and long term, | ||
| 167 | with two different time windows to be applied to each power zone. Thus for | ||
| 168 | each zone there are 2 attributes representing the constraint names, 2 power | ||
| 169 | limits and 2 attributes representing the sizes of the time windows. Such that, | ||
| 170 | constraint_j_* attributes correspond to the jth constraint (j = 0,1). | ||
| 171 | |||
| 172 | For example: | ||
| 173 | constraint_0_name | ||
| 174 | constraint_0_power_limit_uw | ||
| 175 | constraint_0_time_window_us | ||
| 176 | constraint_1_name | ||
| 177 | constraint_1_power_limit_uw | ||
| 178 | constraint_1_time_window_us | ||
| 179 | |||
| 180 | Power Zone Attributes | ||
| 181 | ================================= | ||
| 182 | Monitoring attributes | ||
| 183 | ---------------------- | ||
| 184 | |||
| 185 | energy_uj (rw): Current energy counter in micro joules. Write "0" to reset. | ||
| 186 | If the counter can not be reset, then this attribute is read only. | ||
| 187 | |||
| 188 | max_energy_range_uj (ro): Range of the above energy counter in micro-joules. | ||
| 189 | |||
| 190 | power_uw (ro): Current power in micro watts. | ||
| 191 | |||
| 192 | max_power_range_uw (ro): Range of the above power value in micro-watts. | ||
| 193 | |||
| 194 | name (ro): Name of this power zone. | ||
| 195 | |||
| 196 | It is possible that some domains have both power ranges and energy counter ranges; | ||
| 197 | however, only one is mandatory. | ||
| 198 | |||
| 199 | Constraints | ||
| 200 | ---------------- | ||
| 201 | constraint_X_power_limit_uw (rw): Power limit in micro watts, which should be | ||
| 202 | applicable for the time window specified by "constraint_X_time_window_us". | ||
| 203 | |||
| 204 | constraint_X_time_window_us (rw): Time window in micro seconds. | ||
| 205 | |||
| 206 | constraint_X_name (ro): An optional name of the constraint | ||
| 207 | |||
| 208 | constraint_X_max_power_uw(ro): Maximum allowed power in micro watts. | ||
| 209 | |||
| 210 | constraint_X_min_power_uw(ro): Minimum allowed power in micro watts. | ||
| 211 | |||
| 212 | constraint_X_max_time_window_us(ro): Maximum allowed time window in micro seconds. | ||
| 213 | |||
| 214 | constraint_X_min_time_window_us(ro): Minimum allowed time window in micro seconds. | ||
| 215 | |||
| 216 | Except power_limit_uw and time_window_us other fields are optional. | ||
| 217 | |||
| 218 | Common zone and control type attributes | ||
| 219 | ---------------------------------------- | ||
| 220 | enabled (rw): Enable/Disable controls at zone level or for all zones using | ||
| 221 | a control type. | ||
| 222 | |||
| 223 | Power Cap Client Driver Interface | ||
| 224 | ================================== | ||
| 225 | The API summary: | ||
| 226 | |||
| 227 | Call powercap_register_control_type() to register control type object. | ||
| 228 | Call powercap_register_zone() to register a power zone (under a given | ||
| 229 | control type), either as a top-level power zone or as a subzone of another | ||
| 230 | power zone registered earlier. | ||
| 231 | The number of constraints in a power zone and the corresponding callbacks have | ||
| 232 | to be defined prior to calling powercap_register_zone() to register that zone. | ||
| 233 | |||
| 234 | To Free a power zone call powercap_unregister_zone(). | ||
| 235 | To free a control type object call powercap_unregister_control_type(). | ||
| 236 | Detailed API can be generated using kernel-doc on include/linux/powercap.h. | ||
| @@ -145,11 +145,13 @@ The action performed by the idle callback is totally dependent on the subsystem · 144 unmodified lines | |||
| 145 | if the device can be suspended (i.e. if all of the conditions necessary for | 145 | if the device can be suspended (i.e. if all of the conditions necessary for |
| 146 | suspending the device are satisfied) and to queue up a suspend request for the | 146 | suspending the device are satisfied) and to queue up a suspend request for the |
| 147 | device in that case. If there is no idle callback, or if the callback returns | 147 | device in that case. If there is no idle callback, or if the callback returns |
| 148 | 0, then the PM core will attempt to carry out a runtime suspend of the device; | 148 | 0, then the PM core will attempt to carry out a runtime suspend of the device, |
| 149 | in essence, it will call pm_runtime_suspend() directly. To prevent this (for | 149 | also respecting devices configured for autosuspend. In essence this means a |
| 150 | example, if the callback routine has started a delayed suspend), the routine | 150 | call to pm_runtime_autosuspend() (do note that drivers needs to update the |
| 151 | should return a non-zero value. Negative error return codes are ignored by the | 151 | device last busy mark, pm_runtime_mark_last_busy(), to control the delay under |
| 152 | PM core. | 152 | this circumstance). To prevent this (for example, if the callback routine has |
| 153 | started a delayed suspend), the routine must return a non-zero value. Negative | ||
| 154 | error return codes are ignored by the PM core. | ||
| 153 | 155 | ||
| 154 | The helper functions provided by the PM core, described in Section 4, guarantee | 156 | The helper functions provided by the PM core, described in Section 4, guarantee |
| 155 | that the following constraints are met with respect to runtime PM callbacks for | 157 | that the following constraints are met with respect to runtime PM callbacks for |
| @@ -308,7 +310,7 @@ drivers/base/power/runtime.c and include/linux/pm_runtime.h: · 152 unmodified lines | |||
| 308 | - execute the subsystem-level idle callback for the device; returns an | 310 | - execute the subsystem-level idle callback for the device; returns an |
| 309 | error code on failure, where -EINPROGRESS means that ->runtime_idle() is | 311 | error code on failure, where -EINPROGRESS means that ->runtime_idle() is |
| 310 | already being executed; if there is no callback or the callback returns 0 | 312 | already being executed; if there is no callback or the callback returns 0 |
| 311 | then run pm_runtime_suspend(dev) and return its result | 313 | then run pm_runtime_autosuspend(dev) and return its result |
| 312 | 314 | ||
| 313 | int pm_runtime_suspend(struct device *dev); | 315 | int pm_runtime_suspend(struct device *dev); |
| 314 | - execute the subsystem-level suspend callback for the device; returns 0 on | 316 | - execute the subsystem-level suspend callback for the device; returns 0 on |
| @@ -545,13 +547,11 @@ helper functions described in Section 4. In that case, pm_runtime_resume() · 230 unmodified lines | |||
| 545 | should be used. Of course, for this purpose the device's runtime PM has to be | 547 | should be used. Of course, for this purpose the device's runtime PM has to be |
| 546 | enabled earlier by calling pm_runtime_enable(). | 548 | enabled earlier by calling pm_runtime_enable(). |
| 547 | 549 | ||
| 548 | If the device bus type's or driver's ->probe() callback runs | 550 | It may be desirable to suspend the device once ->probe() has finished. |
| 549 | pm_runtime_suspend() or pm_runtime_idle() or their asynchronous counterparts, | 551 | Therefore the driver core uses the asyncronous pm_request_idle() to submit a |
| 550 | they will fail returning -EAGAIN, because the device's usage counter is | 552 | request to execute the subsystem-level idle callback for the device at that |
| 551 | incremented by the driver core before executing ->probe(). Still, it may be | 553 | time. A driver that makes use of the runtime autosuspend feature, may want to |
| 552 | desirable to suspend the device as soon as ->probe() has finished, so the driver | 554 | update the last busy mark before returning from ->probe(). |
| 553 | core uses pm_runtime_put_sync() to invoke the subsystem-level idle callback for | ||
| 554 | the device at that time. | ||
| 555 | 555 | ||
| 556 | Moreover, the driver core prevents runtime PM callbacks from racing with the bus | 556 | Moreover, the driver core prevents runtime PM callbacks from racing with the bus |
| 557 | notifier callback in __device_release_driver(), which is necessary, because the | 557 | notifier callback in __device_release_driver(), which is necessary, because the |
| @@ -654,7 +654,7 @@ out the following operations: · 96 unmodified lines | |||
| 654 | __pm_runtime_disable() with 'false' as the second argument for every device | 654 | __pm_runtime_disable() with 'false' as the second argument for every device |
| 655 | right before executing the subsystem-level .suspend_late() callback for it. | 655 | right before executing the subsystem-level .suspend_late() callback for it. |
| 656 | 656 | ||
| 657 | * During system resume it calls pm_runtime_enable() and pm_runtime_put_sync() | 657 | * During system resume it calls pm_runtime_enable() and pm_runtime_put() |
| 658 | for every device right after executing the subsystem-level .resume_early() | 658 | for every device right after executing the subsystem-level .resume_early() |
| 659 | callback and right after executing the subsystem-level .resume() callback | 659 | callback and right after executing the subsystem-level .resume() callback |
| 660 | for it, respectively. | 660 | for it, respectively. |
| @@ -66,6 +66,21 @@ In LinuxPPS the PPS sources are simply char devices usually mapped · 65 unmodified lines | |||
| 66 | into files /dev/pps0, /dev/pps1, etc.. | 66 | into files /dev/pps0, /dev/pps1, etc.. |
| 67 | 67 | ||
| 68 | 68 | ||
| 69 | PPS with USB to serial devices | ||
| 70 | ------------------------------ | ||
| 71 | |||
| 72 | It is possible to grab the PPS from an USB to serial device. However, | ||
| 73 | you should take into account the latencies and jitter introduced by | ||
| 74 | the USB stack. Users has reported clock instability around +-1ms when | ||
| 75 | synchronized with PPS through USB. This isn't suited for time server | ||
| 76 | synchronization. | ||
| 77 | |||
| 78 | If your device doesn't report PPS, you can check that the feature is | ||
| 79 | supported by its driver. Most of the time, you only need to add a call | ||
| 80 | to usb_serial_handle_dcd_change after checking the DCD status (see | ||
| 81 | ch341 and pl2303 examples). | ||
| 82 | |||
| 83 | |||
| 69 | Coding example | 84 | Coding example |
| 70 | -------------- | 85 | -------------- |
| 71 | 86 | ||
| @@ -100,6 +100,11 @@ static long ppb_to_scaled_ppm(int ppb) · 99 unmodified lines | |||
| 100 | return (long) (ppb * 65.536); | 100 | return (long) (ppb * 65.536); |
| 101 | } | 101 | } |
| 102 | 102 | ||
| 103 | static int64_t pctns(struct ptp_clock_time *t) | ||
| 104 | { | ||
| 105 | return t->sec * 1000000000LL + t->nsec; | ||
| 106 | } | ||
| 107 | |||
| 103 | static void usage(char *progname) | 108 | static void usage(char *progname) |
| 104 | { | 109 | { |
| 105 | fprintf(stderr, | 110 | fprintf(stderr, |
| @@ -112,6 +117,8 @@ static void usage(char *progname) · 6 unmodified lines | |||
| 112 | " -f val adjust the ptp clock frequency by 'val' ppb\n" | 117 | " -f val adjust the ptp clock frequency by 'val' ppb\n" |
| 113 | " -g get the ptp clock time\n" | 118 | " -g get the ptp clock time\n" |
| 114 | " -h prints this message\n" | 119 | " -h prints this message\n" |
| 120 | " -k val measure the time offset between system and phc clock\n" | ||
| 121 | " for 'val' times (Maximum 25)\n" | ||
| 115 | " -p val enable output with a period of 'val' nanoseconds\n" | 122 | " -p val enable output with a period of 'val' nanoseconds\n" |
| 116 | " -P val enable or disable (val=1|0) the system clock PPS\n" | 123 | " -P val enable or disable (val=1|0) the system clock PPS\n" |
| 117 | " -s set the ptp clock time from the system time\n" | 124 | " -s set the ptp clock time from the system time\n" |
| @@ -133,8 +140,12 @@ int main(int argc, char *argv[]) · 15 unmodified lines | |||
| 133 | struct itimerspec timeout; | 140 | struct itimerspec timeout; |
| 134 | struct sigevent sigevent; | 141 | struct sigevent sigevent; |
| 135 | 142 | ||
| 143 | struct ptp_clock_time *pct; | ||
| 144 | struct ptp_sys_offset *sysoff; | ||
| 145 | |||
| 146 | |||
| 136 | char *progname; | 147 | char *progname; |
| 137 | int c, cnt, fd; | 148 | int i, c, cnt, fd; |
| 138 | 149 | ||
| 139 | char *device = DEVICE; | 150 | char *device = DEVICE; |
| 140 | clockid_t clkid; | 151 | clockid_t clkid; |
| @@ -144,14 +155,19 @@ int main(int argc, char *argv[]) · 3 unmodified lines | |||
| 144 | int extts = 0; | 155 | int extts = 0; |
| 145 | int gettime = 0; | 156 | int gettime = 0; |
| 146 | int oneshot = 0; | 157 | int oneshot = 0; |
| 158 | int pct_offset = 0; | ||
| 159 | int n_samples = 0; | ||
| 147 | int periodic = 0; | 160 | int periodic = 0; |
| 148 | int perout = -1; | 161 | int perout = -1; |
| 149 | int pps = -1; | 162 | int pps = -1; |
| 150 | int settime = 0; | 163 | int settime = 0; |
| 151 | 164 | ||
| 165 | int64_t t1, t2, tp; | ||
| 166 | int64_t interval, offset; | ||
| 167 | |||
| 152 | progname = strrchr(argv[0], '/'); | 168 | progname = strrchr(argv[0], '/'); |
| 153 | progname = progname ? 1+progname : argv[0]; | 169 | progname = progname ? 1+progname : argv[0]; |
| 154 | while (EOF != (c = getopt(argc, argv, "a:A:cd:e:f:ghp:P:sSt:v"))) { | 170 | while (EOF != (c = getopt(argc, argv, "a:A:cd:e:f:ghk:p:P:sSt:v"))) { |
| 155 | switch (c) { | 171 | switch (c) { |
| 156 | case 'a': | 172 | case 'a': |
| 157 | oneshot = atoi(optarg); | 173 | oneshot = atoi(optarg); |
| @@ -174,6 +190,10 @@ int main(int argc, char *argv[]) · 16 unmodified lines | |||
| 174 | case 'g': | 190 | case 'g': |
| 175 | gettime = 1; | 191 | gettime = 1; |
| 176 | break; | 192 | break; |
| 193 | case 'k': | ||
| 194 | pct_offset = 1; | ||
| 195 | n_samples = atoi(optarg); | ||
| 196 | break; | ||
| 177 | case 'p': | 197 | case 'p': |
| 178 | perout = atoi(optarg); | 198 | perout = atoi(optarg); |
| 179 | break; | 199 | break; |
| @@ -376,6 +396,47 @@ int main(int argc, char *argv[]) · 196 unmodified lines | |||
| 376 | } | 396 | } |
| 377 | } | 397 | } |
| 378 | 398 | ||
| 399 | if (pct_offset) { | ||
| 400 | if (n_samples <= 0 || n_samples > 25) { | ||
| 401 | puts("n_samples should be between 1 and 25"); | ||
| 402 | usage(progname); | ||
| 403 | return -1; | ||
| 404 | } | ||
| 405 | |||
| 406 | sysoff = calloc(1, sizeof(*sysoff)); | ||
| 407 | if (!sysoff) { | ||
| 408 | perror("calloc"); | ||
| 409 | return -1; | ||
| 410 | } | ||
| 411 | sysoff->n_samples = n_samples; | ||
| 412 | |||
| 413 | if (ioctl(fd, PTP_SYS_OFFSET, sysoff)) | ||
| 414 | perror("PTP_SYS_OFFSET"); | ||
| 415 | else | ||
| 416 | puts("system and phc clock time offset request okay"); | ||
| 417 | |||
| 418 | pct = &sysoff->ts[0]; | ||
| 419 | for (i = 0; i < sysoff->n_samples; i++) { | ||
| 420 | t1 = pctns(pct+2*i); | ||
| 421 | tp = pctns(pct+2*i+1); | ||
| 422 | t2 = pctns(pct+2*i+2); | ||
| 423 | interval = t2 - t1; | ||
| 424 | offset = (t2 + t1) / 2 - tp; | ||
| 425 | |||
| 426 | printf("system time: %ld.%ld\n", | ||
| 427 | (pct+2*i)->sec, (pct+2*i)->nsec); | ||
| 428 | printf("phc time: %ld.%ld\n", | ||
| 429 | (pct+2*i+1)->sec, (pct+2*i+1)->nsec); | ||
| 430 | printf("system time: %ld.%ld\n", | ||
| 431 | (pct+2*i+2)->sec, (pct+2*i+2)->nsec); | ||
| 432 | printf("system/phc clock time offset is %ld ns\n" | ||
| 433 | "system clock time delay is %ld ns\n", | ||
| 434 | offset, interval); | ||
| 435 | } | ||
| 436 | |||
| 437 | free(sysoff); | ||
| 438 | } | ||
| 439 | |||
| 379 | close(fd); | 440 | close(fd); |
| 380 | return 0; | 441 | return 0; |
| 381 | } | 442 | } |
| @@ -39,7 +39,7 @@ New users should use the pwm_get() function and pass to it the consumer · 38 unmodified lines | |||
| 39 | device or a consumer name. pwm_put() is used to free the PWM device. Managed | 39 | device or a consumer name. pwm_put() is used to free the PWM device. Managed |
| 40 | variants of these functions, devm_pwm_get() and devm_pwm_put(), also exist. | 40 | variants of these functions, devm_pwm_get() and devm_pwm_put(), also exist. |
| 41 | 41 | ||
| 42 | After being requested a PWM has to be configured using: | 42 | After being requested, a PWM has to be configured using: |
| 43 | 43 | ||
| 44 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns); | 44 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns); |
| 45 | 45 | ||
| @@ -94,7 +94,7 @@ for new drivers to use the generic PWM framework. · 48 unmodified lines | |||
| 94 | A new PWM controller/chip can be added using pwmchip_add() and removed | 94 | A new PWM controller/chip can be added using pwmchip_add() and removed |
| 95 | again with pwmchip_remove(). pwmchip_add() takes a filled in struct | 95 | again with pwmchip_remove(). pwmchip_add() takes a filled in struct |
| 96 | pwm_chip as argument which provides a description of the PWM chip, the | 96 | pwm_chip as argument which provides a description of the PWM chip, the |
| 97 | number of PWM devices provider by the chip and the chip-specific | 97 | number of PWM devices provided by the chip and the chip-specific |
| 98 | implementation of the supported PWM operations to the framework. | 98 | implementation of the supported PWM operations to the framework. |
| 99 | 99 | ||
| 100 | Locking | 100 | Locking |
| @@ -157,6 +157,16 @@ Return Value: none · 156 unmodified lines | |||
| 157 | 157 | ||
| 158 | Description: Sets new actual debug level if new_level is valid. | 158 | Description: Sets new actual debug level if new_level is valid. |
| 159 | 159 | ||
| 160 | --------------------------------------------------------------------------- | ||
| 161 | bool debug_level_enabled (debug_info_t * id, int level); | ||
| 162 | |||
| 163 | Parameter: id: handle for debug log | ||
| 164 | level: debug level | ||
| 165 | |||
| 166 | Return Value: True if level is less or equal to the current debug level. | ||
| 167 | |||
| 168 | Description: Returns true if debug events for the specified level would be | ||
| 169 | logged. Otherwise returns false. | ||
| 160 | --------------------------------------------------------------------------- | 170 | --------------------------------------------------------------------------- |
| 161 | void debug_stop_all(void); | 171 | void debug_stop_all(void); |
| 162 | 172 | ||
| @@ -65,11 +65,6 @@ Possible arch/ problems · 64 unmodified lines | |||
| 65 | 65 | ||
| 66 | Possible arch problems I found (and either tried to fix or didn't): | 66 | Possible arch problems I found (and either tried to fix or didn't): |
| 67 | 67 | ||
| 68 | h8300 - Is such sleeping racy vs interrupts? (See #4a). | ||
| 69 | The H8/300 manual I found indicates yes, however disabling IRQs | ||
| 70 | over the sleep mean only NMIs can wake it up, so can't fix easily | ||
| 71 | without doing spin waiting. | ||
| 72 | |||
| 73 | ia64 - is safe_halt call racy vs interrupts? (does it sleep?) (See #4a) | 68 | ia64 - is safe_halt call racy vs interrupts? (does it sleep?) (See #4a) |
| 74 | 69 | ||
| 75 | sh64 - Is sleeping racy vs interrupts? (See #4a) | 70 | sh64 - Is sleeping racy vs interrupts? (See #4a) |
| @@ -66,9 +66,7 @@ rq->cfs.load value, which is the sum of the weights of the tasks queued on the · 65 unmodified lines | |||
| 66 | runqueue. | 66 | runqueue. |
| 67 | 67 | ||
| 68 | CFS maintains a time-ordered rbtree, where all runnable tasks are sorted by the | 68 | CFS maintains a time-ordered rbtree, where all runnable tasks are sorted by the |
| 69 | p->se.vruntime key (there is a subtraction using rq->cfs.min_vruntime to | 69 | p->se.vruntime key. CFS picks the "leftmost" task from this tree and sticks to it. |
| 70 | account for possible wraparounds). CFS picks the "leftmost" task from this | ||
| 71 | tree and sticks to it. | ||
| 72 | As the system progresses forwards, the executed tasks are put into the tree | 70 | As the system progresses forwards, the executed tasks are put into the tree |
| 73 | more and more to the right --- slowly but surely giving a chance for every task | 71 | more and more to the right --- slowly but surely giving a chance for every task |
| 74 | to become the "leftmost task" and thus get on the CPU within a deterministic | 72 | to become the "leftmost task" and thus get on the CPU within a deterministic |
| @@ -22,3 +22,5 @@ keys.txt · 21 unmodified lines | |||
| 22 | - description of the kernel key retention service. | 22 | - description of the kernel key retention service. |
| 23 | tomoyo.txt | 23 | tomoyo.txt |
| 24 | - documentation on the TOMOYO Linux Security Module. | 24 | - documentation on the TOMOYO Linux Security Module. |
| 25 | IMA-templates.txt | ||
| 26 | - documentation on the template management mechanism for IMA. | ||
| @@ -0,0 +1,87 @@ | |||
| 1 | IMA Template Management Mechanism | ||
| 2 | |||
| 3 | |||
| 4 | ==== INTRODUCTION ==== | ||
| 5 | |||
| 6 | The original 'ima' template is fixed length, containing the filedata hash | ||
| 7 | and pathname. The filedata hash is limited to 20 bytes (md5/sha1). | ||
| 8 | The pathname is a null terminated string, limited to 255 characters. | ||
| 9 | To overcome these limitations and to add additional file metadata, it is | ||
| 10 | necessary to extend the current version of IMA by defining additional | ||
| 11 | templates. For example, information that could be possibly reported are | ||
| 12 | the inode UID/GID or the LSM labels either of the inode and of the process | ||
| 13 | that is accessing it. | ||
| 14 | |||
| 15 | However, the main problem to introduce this feature is that, each time | ||
| 16 | a new template is defined, the functions that generate and display | ||
| 17 | the measurements list would include the code for handling a new format | ||
| 18 | and, thus, would significantly grow over the time. | ||
| 19 | |||
| 20 | The proposed solution solves this problem by separating the template | ||
| 21 | management from the remaining IMA code. The core of this solution is the | ||
| 22 | definition of two new data structures: a template descriptor, to determine | ||
| 23 | which information should be included in the measurement list; a template | ||
| 24 | field, to generate and display data of a given type. | ||
| 25 | |||
| 26 | Managing templates with these structures is very simple. To support | ||
| 27 | a new data type, developers define the field identifier and implement | ||
| 28 | two functions, init() and show(), respectively to generate and display | ||
| 29 | measurement entries. Defining a new template descriptor requires | ||
| 30 | specifying the template format, a string of field identifiers separated | ||
| 31 | by the '|' character. While in the current implementation it is possible | ||
| 32 | to define new template descriptors only by adding their definition in the | ||
| 33 | template specific code (ima_template.c), in a future version it will be | ||
| 34 | possible to register a new template on a running kernel by supplying to IMA | ||
| 35 | the desired format string. In this version, IMA initializes at boot time | ||
| 36 | all defined template descriptors by translating the format into an array | ||
| 37 | of template fields structures taken from the set of the supported ones. | ||
| 38 | |||
| 39 | After the initialization step, IMA will call ima_alloc_init_template() | ||
| 40 | (new function defined within the patches for the new template management | ||
| 41 | mechanism) to generate a new measurement entry by using the template | ||
| 42 | descriptor chosen through the kernel configuration or through the newly | ||
| 43 | introduced 'ima_template=' kernel command line parameter. It is during this | ||
| 44 | phase that the advantages of the new architecture are clearly shown: | ||
| 45 | the latter function will not contain specific code to handle a given template | ||
| 46 | but, instead, it simply calls the init() method of the template fields | ||
| 47 | associated to the chosen template descriptor and store the result (pointer | ||
| 48 | to allocated data and data length) in the measurement entry structure. | ||
| 49 | |||
| 50 | The same mechanism is employed to display measurements entries. | ||
| 51 | The functions ima[_ascii]_measurements_show() retrieve, for each entry, | ||
| 52 | the template descriptor used to produce that entry and call the show() | ||
| 53 | method for each item of the array of template fields structures. | ||
| 54 | |||
| 55 | |||
| 56 | |||
| 57 | ==== SUPPORTED TEMPLATE FIELDS AND DESCRIPTORS ==== | ||
| 58 | |||
| 59 | In the following, there is the list of supported template fields | ||
| 60 | ('<identifier>': description), that can be used to define new template | ||
| 61 | descriptors by adding their identifier to the format string | ||
| 62 | (support for more data types will be added later): | ||
| 63 | |||
| 64 | - 'd': the digest of the event (i.e. the digest of a measured file), | ||
| 65 | calculated with the SHA1 or MD5 hash algorithm; | ||
| 66 | - 'n': the name of the event (i.e. the file name), with size up to 255 bytes; | ||
| 67 | - 'd-ng': the digest of the event, calculated with an arbitrary hash | ||
| 68 | algorithm (field format: [<hash algo>:]digest, where the digest | ||
| 69 | prefix is shown only if the hash algorithm is not SHA1 or MD5); | ||
| 70 | - 'n-ng': the name of the event, without size limitations. | ||
| 71 | |||
| 72 | |||
| 73 | Below, there is the list of defined template descriptors: | ||
| 74 | - "ima": its format is 'd|n'; | ||
| 75 | - "ima-ng" (default): its format is 'd-ng|n-ng'. | ||
| 76 | |||
| 77 | |||
| 78 | |||
| 79 | ==== USE ==== | ||
| 80 | |||
| 81 | To specify the template descriptor to be used to generate measurement entries, | ||
| 82 | currently the following methods are supported: | ||
| 83 | |||
| 84 | - select a template descriptor among those supported in the kernel | ||
| 85 | configuration ('ima-ng' is the default choice); | ||
| 86 | - specify a template descriptor name from the kernel command line through | ||
| 87 | the 'ima_template=' parameter. | ||
| @@ -865,15 +865,14 @@ encountered: · 864 unmodified lines | |||
| 865 | calling processes has a searchable link to the key from one of its | 865 | calling processes has a searchable link to the key from one of its |
| 866 | keyrings. There are three functions for dealing with these: | 866 | keyrings. There are three functions for dealing with these: |
| 867 | 867 | ||
| 868 | key_ref_t make_key_ref(const struct key *key, | 868 | key_ref_t make_key_ref(const struct key *key, bool possession); |
| 869 | unsigned long possession); | ||
| 870 | 869 | ||
| 871 | struct key *key_ref_to_ptr(const key_ref_t key_ref); | 870 | struct key *key_ref_to_ptr(const key_ref_t key_ref); |
| 872 | 871 | ||
| 873 | unsigned long is_key_possessed(const key_ref_t key_ref); | 872 | bool is_key_possessed(const key_ref_t key_ref); |
| 874 | 873 | ||
| 875 | The first function constructs a key reference from a key pointer and | 874 | The first function constructs a key reference from a key pointer and |
| 876 | possession information (which must be 0 or 1 and not any other value). | 875 | possession information (which must be true or false). |
| 877 | 876 | ||
| 878 | The second function retrieves the key pointer from a reference and the | 877 | The second function retrieves the key pointer from a reference and the |
| 879 | third retrieves the possession flag. | 878 | third retrieves the possession flag. |
| @@ -961,14 +960,17 @@ payload contents" for more information. · 81 unmodified lines | |||
| 961 | the argument will not be parsed. | 960 | the argument will not be parsed. |
| 962 | 961 | ||
| 963 | 962 | ||
| 964 | (*) Extra references can be made to a key by calling the following function: | 963 | (*) Extra references can be made to a key by calling one of the following |
| 964 | functions: | ||
| 965 | 965 | ||
| 966 | struct key *__key_get(struct key *key); | ||
| 966 | struct key *key_get(struct key *key); | 967 | struct key *key_get(struct key *key); |
| 967 | 968 | ||
| 968 | These need to be disposed of by calling key_put() when they've been | 969 | Keys so references will need to be disposed of by calling key_put() when |
| 969 | finished with. The key pointer passed in will be returned. If the pointer | 970 | they've been finished with. The key pointer passed in will be returned. |
| 970 | is NULL or CONFIG_KEYS is not set then the key will not be dereferenced and | 971 | |
| 971 | no increment will take place. | 972 | In the case of key_get(), if the pointer is NULL or CONFIG_KEYS is not set |
| 973 | then the key will not be dereferenced and no increment will take place. | ||
| 972 | 974 | ||
| 973 | 975 | ||
| 974 | (*) A key's serial number can be obtained by calling: | 976 | (*) A key's serial number can be obtained by calling: |
| @@ -264,10 +264,6 @@ hardware. · 263 unmodified lines | |||
| 264 | Locking: none. | 264 | Locking: none. |
| 265 | Interrupts: caller dependent. | 265 | Interrupts: caller dependent. |
| 266 | 266 | ||
| 267 | set_wake(port,state) | ||
| 268 | Enable/disable power management wakeup on serial activity. Not | ||
| 269 | currently implemented. | ||
| 270 | |||
| 271 | type(port) | 267 | type(port) |
| 272 | Return a pointer to a string constant describing the specified | 268 | Return a pointer to a string constant describing the specified |
| 273 | port, or return NULL, in which case the string 'unknown' is | 269 | port, or return NULL, in which case the string 'unknown' is |
| @@ -616,7 +616,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 615 unmodified lines | |||
| 616 | 616 | ||
| 617 | As default, snd-dummy drivers doesn't allocate the real buffers | 617 | As default, snd-dummy drivers doesn't allocate the real buffers |
| 618 | but either ignores read/write or mmap a single dummy page to all | 618 | but either ignores read/write or mmap a single dummy page to all |
| 619 | buffer pages, in order to save the resouces. If your apps need | 619 | buffer pages, in order to save the resources. If your apps need |
| 620 | the read/ written buffer data to be consistent, pass fake_buffer=0 | 620 | the read/ written buffer data to be consistent, pass fake_buffer=0 |
| 621 | option. | 621 | option. |
| 622 | 622 | ||
| @@ -232,7 +232,7 @@ The parameter can be given: · 231 unmodified lines | |||
| 232 | # modprobe snd-usb-audio index=1 device_setup=0x09 | 232 | # modprobe snd-usb-audio index=1 device_setup=0x09 |
| 233 | 233 | ||
| 234 | * Or while configuring the modules options in your modules configuration file | 234 | * Or while configuring the modules options in your modules configuration file |
| 235 | (tipically a .conf file in /etc/modprobe.d/ directory: | 235 | (typically a .conf file in /etc/modprobe.d/ directory: |
| 236 | alias snd-card-1 snd-usb-audio | 236 | alias snd-card-1 snd-usb-audio |
| 237 | options snd-usb-audio index=1 device_setup=0x09 | 237 | options snd-usb-audio index=1 device_setup=0x09 |
| 238 | 238 | ||
| @@ -87,7 +87,7 @@ with 4 channels, · 86 unmodified lines | |||
| 87 | 87 | ||
| 88 | and use the interleaved 4 channel data. | 88 | and use the interleaved 4 channel data. |
| 89 | 89 | ||
| 90 | There are some control switchs affecting to the speaker connections: | 90 | There are some control switches affecting to the speaker connections: |
| 91 | 91 | ||
| 92 | "Line-In Mode" - an enum control to change the behavior of line-in | 92 | "Line-In Mode" - an enum control to change the behavior of line-in |
| 93 | jack. Either "Line-In", "Rear Output" or "Bass Output" can | 93 | jack. Either "Line-In", "Rear Output" or "Bass Output" can |
| @@ -28,6 +28,7 @@ ALC269/270/275/276/28x/29x · 27 unmodified lines | |||
| 28 | alc269-dmic Enable ALC269(VA) digital mic workaround | 28 | alc269-dmic Enable ALC269(VA) digital mic workaround |
| 29 | alc271-dmic Enable ALC271X digital mic workaround | 29 | alc271-dmic Enable ALC271X digital mic workaround |
| 30 | inv-dmic Inverted internal mic workaround | 30 | inv-dmic Inverted internal mic workaround |
| 31 | headset-mic Indicates a combined headset (headphone+mic) jack | ||
| 31 | lenovo-dock Enables docking station I/O for some Lenovos | 32 | lenovo-dock Enables docking station I/O for some Lenovos |
| 32 | dell-headset-multi Headset jack, which can also be used as mic-in | 33 | dell-headset-multi Headset jack, which can also be used as mic-in |
| 33 | dell-headset-dock Headset jack (without mic-in), and also dock I/O | 34 | dell-headset-dock Headset jack (without mic-in), and also dock I/O |
| @@ -296,6 +297,12 @@ Cirrus Logic CS4206/4207 · 262 unmodified lines | |||
| 296 | imac27 IMac 27 Inch | 297 | imac27 IMac 27 Inch |
| 297 | auto BIOS setup (default) | 298 | auto BIOS setup (default) |
| 298 | 299 | ||
| 300 | Cirrus Logic CS4208 | ||
| 301 | =================== | ||
| 302 | mba6 MacBook Air 6,1 and 6,2 | ||
| 303 | gpio0 Enable GPIO 0 amp | ||
| 304 | auto BIOS setup (default) | ||
| 305 | |||
| 299 | VIA VT17xx/VT18xx/VT20xx | 306 | VIA VT17xx/VT18xx/VT20xx |
| 300 | ======================== | 307 | ======================== |
| 301 | auto BIOS setup (default) | 308 | auto BIOS setup (default) |
| @@ -217,12 +217,12 @@ Not supported: · 216 unmodified lines | |||
| 217 | would be enabled with ALSA kcontrols. | 217 | would be enabled with ALSA kcontrols. |
| 218 | 218 | ||
| 219 | - Audio policy/resource management. This API does not provide any | 219 | - Audio policy/resource management. This API does not provide any |
| 220 | hooks to query the utilization of the audio DSP, nor any premption | 220 | hooks to query the utilization of the audio DSP, nor any preemption |
| 221 | mechanisms. | 221 | mechanisms. |
| 222 | 222 | ||
| 223 | - No notion of underun/overrun. Since the bytes written are compressed | 223 | - No notion of underrun/overrun. Since the bytes written are compressed |
| 224 | in nature and data written/read doesn't translate directly to | 224 | in nature and data written/read doesn't translate directly to |
| 225 | rendered output in time, this does not deal with underrun/overun and | 225 | rendered output in time, this does not deal with underrun/overrun and |
| 226 | maybe dealt in user-library | 226 | maybe dealt in user-library |
| 227 | 227 | ||
| 228 | Credits: | 228 | Credits: |
| @@ -0,0 +1,380 @@ | |||
| 1 | Dynamic PCM | ||
| 2 | =========== | ||
| 3 | |||
| 4 | 1. Description | ||
| 5 | ============== | ||
| 6 | |||
| 7 | Dynamic PCM allows an ALSA PCM device to digitally route its PCM audio to | ||
| 8 | various digital endpoints during the PCM stream runtime. e.g. PCM0 can route | ||
| 9 | digital audio to I2S DAI0, I2S DAI1 or PDM DAI2. This is useful for on SoC DSP | ||
| 10 | drivers that expose several ALSA PCMs and can route to multiple DAIs. | ||
| 11 | |||
| 12 | The DPCM runtime routing is determined by the ALSA mixer settings in the same | ||
| 13 | way as the analog signal is routed in an ASoC codec driver. DPCM uses a DAPM | ||
| 14 | graph representing the DSP internal audio paths and uses the mixer settings to | ||
| 15 | determine the patch used by each ALSA PCM. | ||
| 16 | |||
| 17 | DPCM re-uses all the existing component codec, platform and DAI drivers without | ||
| 18 | any modifications. | ||
| 19 | |||
| 20 | |||
| 21 | Phone Audio System with SoC based DSP | ||
| 22 | ------------------------------------- | ||
| 23 | |||
| 24 | Consider the following phone audio subsystem. This will be used in this | ||
| 25 | document for all examples :- | ||
| 26 | |||
| 27 | | Front End PCMs | SoC DSP | Back End DAIs | Audio devices | | ||
| 28 | |||
| 29 | ************* | ||
| 30 | PCM0 <------------> * * <----DAI0-----> Codec Headset | ||
| 31 | * * | ||
| 32 | PCM1 <------------> * * <----DAI1-----> Codec Speakers | ||
| 33 | * DSP * | ||
| 34 | PCM2 <------------> * * <----DAI2-----> MODEM | ||
| 35 | * * | ||
| 36 | PCM3 <------------> * * <----DAI3-----> BT | ||
| 37 | * * | ||
| 38 | * * <----DAI4-----> DMIC | ||
| 39 | * * | ||
| 40 | * * <----DAI5-----> FM | ||
| 41 | ************* | ||
| 42 | |||
| 43 | This diagram shows a simple smart phone audio subsystem. It supports Bluetooth, | ||
| 44 | FM digital radio, Speakers, Headset Jack, digital microphones and cellular | ||
| 45 | modem. This sound card exposes 4 DSP front end (FE) ALSA PCM devices and | ||
| 46 | supports 6 back end (BE) DAIs. Each FE PCM can digitally route audio data to any | ||
| 47 | of the BE DAIs. The FE PCM devices can also route audio to more than 1 BE DAI. | ||
| 48 | |||
| 49 | |||
| 50 | |||
| 51 | Example - DPCM Switching playback from DAI0 to DAI1 | ||
| 52 | --------------------------------------------------- | ||
| 53 | |||
| 54 | Audio is being played to the Headset. After a while the user removes the headset | ||
| 55 | and audio continues playing on the speakers. | ||
| 56 | |||
| 57 | Playback on PCM0 to Headset would look like :- | ||
| 58 | |||
| 59 | ************* | ||
| 60 | PCM0 <============> * * <====DAI0=====> Codec Headset | ||
| 61 | * * | ||
| 62 | PCM1 <------------> * * <----DAI1-----> Codec Speakers | ||
| 63 | * DSP * | ||
| 64 | PCM2 <------------> * * <----DAI2-----> MODEM | ||
| 65 | * * | ||
| 66 | PCM3 <------------> * * <----DAI3-----> BT | ||
| 67 | * * | ||
| 68 | * * <----DAI4-----> DMIC | ||
| 69 | * * | ||
| 70 | * * <----DAI5-----> FM | ||
| 71 | ************* | ||
| 72 | |||
| 73 | The headset is removed from the jack by user so the speakers must now be used :- | ||
| 74 | |||
| 75 | ************* | ||
| 76 | PCM0 <============> * * <----DAI0-----> Codec Headset | ||
| 77 | * * | ||
| 78 | PCM1 <------------> * * <====DAI1=====> Codec Speakers | ||
| 79 | * DSP * | ||
| 80 | PCM2 <------------> * * <----DAI2-----> MODEM | ||
| 81 | * * | ||
| 82 | PCM3 <------------> * * <----DAI3-----> BT | ||
| 83 | * * | ||
| 84 | * * <----DAI4-----> DMIC | ||
| 85 | * * | ||
| 86 | * * <----DAI5-----> FM | ||
| 87 | ************* | ||
| 88 | |||
| 89 | The audio driver processes this as follows :- | ||
| 90 | |||
| 91 | 1) Machine driver receives Jack removal event. | ||
| 92 | |||
| 93 | 2) Machine driver OR audio HAL disables the Headset path. | ||
| 94 | |||
| 95 | 3) DPCM runs the PCM trigger(stop), hw_free(), shutdown() operations on DAI0 | ||
| 96 | for headset since the path is now disabled. | ||
| 97 | |||
| 98 | 4) Machine driver or audio HAL enables the speaker path. | ||
| 99 | |||
| 100 | 5) DPCM runs the PCM ops for startup(), hw_params(), prepapre() and | ||
| 101 | trigger(start) for DAI1 Speakers since the path is enabled. | ||
| 102 | |||
| 103 | In this example, the machine driver or userspace audio HAL can alter the routing | ||
| 104 | and then DPCM will take care of managing the DAI PCM operations to either bring | ||
| 105 | the link up or down. Audio playback does not stop during this transition. | ||
| 106 | |||
| 107 | |||
| 108 | |||
| 109 | DPCM machine driver | ||
| 110 | =================== | ||
| 111 | |||
| 112 | The DPCM enabled ASoC machine driver is similar to normal machine drivers | ||
| 113 | except that we also have to :- | ||
| 114 | |||
| 115 | 1) Define the FE and BE DAI links. | ||
| 116 | |||
| 117 | 2) Define any FE/BE PCM operations. | ||
| 118 | |||
| 119 | 3) Define widget graph connections. | ||
| 120 | |||
| 121 | |||
| 122 | 1 FE and BE DAI links | ||
| 123 | --------------------- | ||
| 124 | |||
| 125 | | Front End PCMs | SoC DSP | Back End DAIs | Audio devices | | ||
| 126 | |||
| 127 | ************* | ||
| 128 | PCM0 <------------> * * <----DAI0-----> Codec Headset | ||
| 129 | * * | ||
| 130 | PCM1 <------------> * * <----DAI1-----> Codec Speakers | ||
| 131 | * DSP * | ||
| 132 | PCM2 <------------> * * <----DAI2-----> MODEM | ||
| 133 | * * | ||
| 134 | PCM3 <------------> * * <----DAI3-----> BT | ||
| 135 | * * | ||
| 136 | * * <----DAI4-----> DMIC | ||
| 137 | * * | ||
| 138 | * * <----DAI5-----> FM | ||
| 139 | ************* | ||
| 140 | |||
| 141 | For the example above we have to define 4 FE DAI links and 6 BE DAI links. The | ||
| 142 | FE DAI links are defined as follows :- | ||
| 143 | |||
| 144 | static struct snd_soc_dai_link machine_dais[] = { | ||
| 145 | { | ||
| 146 | .name = "PCM0 System", | ||
| 147 | .stream_name = "System Playback", | ||
| 148 | .cpu_dai_name = "System Pin", | ||
| 149 | .platform_name = "dsp-audio", | ||
| 150 | .codec_name = "snd-soc-dummy", | ||
| 151 | .codec_dai_name = "snd-soc-dummy-dai", | ||
| 152 | .dynamic = 1, | ||
| 153 | .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
| 154 | .dpcm_playback = 1, | ||
| 155 | }, | ||
| 156 | .....< other FE and BE DAI links here > | ||
| 157 | }; | ||
| 158 | |||
| 159 | This FE DAI link is pretty similar to a regular DAI link except that we also | ||
| 160 | set the DAI link to a DPCM FE with the "dynamic = 1". The supported FE stream | ||
| 161 | directions should also be set with the "dpcm_playback" and "dpcm_capture" | ||
| 162 | flags. There is also an option to specify the ordering of the trigger call for | ||
| 163 | each FE. This allows the ASoC core to trigger the DSP before or after the other | ||
| 164 | components (as some DSPs have strong requirements for the ordering DAI/DSP | ||
| 165 | start and stop sequences). | ||
| 166 | |||
| 167 | The FE DAI above sets the codec and code DAIs to dummy devices since the BE is | ||
| 168 | dynamic and will change depending on runtime config. | ||
| 169 | |||
| 170 | The BE DAIs are configured as follows :- | ||
| 171 | |||
| 172 | static struct snd_soc_dai_link machine_dais[] = { | ||
| 173 | .....< FE DAI links here > | ||
| 174 | { | ||
| 175 | .name = "Codec Headset", | ||
| 176 | .cpu_dai_name = "ssp-dai.0", | ||
| 177 | .platform_name = "snd-soc-dummy", | ||
| 178 | .no_pcm = 1, | ||
| 179 | .codec_name = "rt5640.0-001c", | ||
| 180 | .codec_dai_name = "rt5640-aif1", | ||
| 181 | .ignore_suspend = 1, | ||
| 182 | .ignore_pmdown_time = 1, | ||
| 183 | .be_hw_params_fixup = hswult_ssp0_fixup, | ||
| 184 | .ops = &haswell_ops, | ||
| 185 | .dpcm_playback = 1, | ||
| 186 | .dpcm_capture = 1, | ||
| 187 | }, | ||
| 188 | .....< other BE DAI links here > | ||
| 189 | }; | ||
| 190 | |||
| 191 | This BE DAI link connects DAI0 to the codec (in this case RT5460 AIF1). It sets | ||
| 192 | the "no_pcm" flag to mark it has a BE and sets flags for supported stream | ||
| 193 | directions using "dpcm_playback" and "dpcm_capture" above. | ||
| 194 | |||
| 195 | The BE has also flags set for ignoring suspend and PM down time. This allows | ||
| 196 | the BE to work in a hostless mode where the host CPU is not transferring data | ||
| 197 | like a BT phone call :- | ||
| 198 | |||
| 199 | ************* | ||
| 200 | PCM0 <------------> * * <----DAI0-----> Codec Headset | ||
| 201 | * * | ||
| 202 | PCM1 <------------> * * <----DAI1-----> Codec Speakers | ||
| 203 | * DSP * | ||
| 204 | PCM2 <------------> * * <====DAI2=====> MODEM | ||
| 205 | * * | ||
| 206 | PCM3 <------------> * * <====DAI3=====> BT | ||
| 207 | * * | ||
| 208 | * * <----DAI4-----> DMIC | ||
| 209 | * * | ||
| 210 | * * <----DAI5-----> FM | ||
| 211 | ************* | ||
| 212 | |||
| 213 | This allows the host CPU to sleep whilst the DSP, MODEM DAI and the BT DAI are | ||
| 214 | still in operation. | ||
| 215 | |||
| 216 | A BE DAI link can also set the codec to a dummy device if the code is a device | ||
| 217 | that is managed externally. | ||
| 218 | |||
| 219 | Likewise a BE DAI can also set a dummy cpu DAI if the CPU DAI is managed by the | ||
| 220 | DSP firmware. | ||
| 221 | |||
| 222 | |||
| 223 | 2 FE/BE PCM operations | ||
| 224 | ---------------------- | ||
| 225 | |||
| 226 | The BE above also exports some PCM operations and a "fixup" callback. The fixup | ||
| 227 | callback is used by the machine driver to (re)configure the DAI based upon the | ||
| 228 | FE hw params. i.e. the DSP may perform SRC or ASRC from the FE to BE. | ||
| 229 | |||
| 230 | e.g. DSP converts all FE hw params to run at fixed rate of 48k, 16bit, stereo for | ||
| 231 | DAI0. This means all FE hw_params have to be fixed in the machine driver for | ||
| 232 | DAI0 so that the DAI is running at desired configuration regardless of the FE | ||
| 233 | configuration. | ||
| 234 | |||
| 235 | static int dai0_fixup(struct snd_soc_pcm_runtime *rtd, | ||
| 236 | struct snd_pcm_hw_params *params) | ||
| 237 | { | ||
| 238 | struct snd_interval *rate = hw_param_interval(params, | ||
| 239 | SNDRV_PCM_HW_PARAM_RATE); | ||
| 240 | struct snd_interval *channels = hw_param_interval(params, | ||
| 241 | SNDRV_PCM_HW_PARAM_CHANNELS); | ||
| 242 | |||
| 243 | /* The DSP will covert the FE rate to 48k, stereo */ | ||
| 244 | rate->min = rate->max = 48000; | ||
| 245 | channels->min = channels->max = 2; | ||
| 246 | |||
| 247 | /* set DAI0 to 16 bit */ | ||
| 248 | snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT - | ||
| 249 | SNDRV_PCM_HW_PARAM_FIRST_MASK], | ||
| 250 | SNDRV_PCM_FORMAT_S16_LE); | ||
| 251 | return 0; | ||
| 252 | } | ||
| 253 | |||
| 254 | The other PCM operation are the same as for regular DAI links. Use as necessary. | ||
| 255 | |||
| 256 | |||
| 257 | 3 Widget graph connections | ||
| 258 | -------------------------- | ||
| 259 | |||
| 260 | The BE DAI links will normally be connected to the graph at initialisation time | ||
| 261 | by the ASoC DAPM core. However, if the BE codec or BE DAI is a dummy then this | ||
| 262 | has to be set explicitly in the driver :- | ||
| 263 | |||
| 264 | /* BE for codec Headset - DAI0 is dummy and managed by DSP FW */ | ||
| 265 | {"DAI0 CODEC IN", NULL, "AIF1 Capture"}, | ||
| 266 | {"AIF1 Playback", NULL, "DAI0 CODEC OUT"}, | ||
| 267 | |||
| 268 | |||
| 269 | Writing a DPCM DSP driver | ||
| 270 | ========================= | ||
| 271 | |||
| 272 | The DPCM DSP driver looks much like a standard platform class ASoC driver | ||
| 273 | combined with elements from a codec class driver. A DSP platform driver must | ||
| 274 | implement :- | ||
| 275 | |||
| 276 | 1) Front End PCM DAIs - i.e. struct snd_soc_dai_driver. | ||
| 277 | |||
| 278 | 2) DAPM graph showing DSP audio routing from FE DAIs to BEs. | ||
| 279 | |||
| 280 | 3) DAPM widgets from DSP graph. | ||
| 281 | |||
| 282 | 4) Mixers for gains, routing, etc. | ||
| 283 | |||
| 284 | 5) DMA configuration. | ||
| 285 | |||
| 286 | 6) BE AIF widgets. | ||
| 287 | |||
| 288 | Items 6 is important for routing the audio outside of the DSP. AIF need to be | ||
| 289 | defined for each BE and each stream direction. e.g for BE DAI0 above we would | ||
| 290 | have :- | ||
| 291 | |||
| 292 | SND_SOC_DAPM_AIF_IN("DAI0 RX", NULL, 0, SND_SOC_NOPM, 0, 0), | ||
| 293 | SND_SOC_DAPM_AIF_OUT("DAI0 TX", NULL, 0, SND_SOC_NOPM, 0, 0), | ||
| 294 | |||
| 295 | The BE AIF are used to connect the DSP graph to the graphs for the other | ||
| 296 | component drivers (e.g. codec graph). | ||
| 297 | |||
| 298 | |||
| 299 | Hostless PCM streams | ||
| 300 | ==================== | ||
| 301 | |||
| 302 | A hostless PCM stream is a stream that is not routed through the host CPU. An | ||
| 303 | example of this would be a phone call from handset to modem. | ||
| 304 | |||
| 305 | |||
| 306 | ************* | ||
| 307 | PCM0 <------------> * * <----DAI0-----> Codec Headset | ||
| 308 | * * | ||
| 309 | PCM1 <------------> * * <====DAI1=====> Codec Speakers/Mic | ||
| 310 | * DSP * | ||
| 311 | PCM2 <------------> * * <====DAI2=====> MODEM | ||
| 312 | * * | ||
| 313 | PCM3 <------------> * * <----DAI3-----> BT | ||
| 314 | * * | ||
| 315 | * * <----DAI4-----> DMIC | ||
| 316 | * * | ||
| 317 | * * <----DAI5-----> FM | ||
| 318 | ************* | ||
| 319 | |||
| 320 | In this case the PCM data is routed via the DSP. The host CPU in this use case | ||
| 321 | is only used for control and can sleep during the runtime of the stream. | ||
| 322 | |||
| 323 | The host can control the hostless link either by :- | ||
| 324 | |||
| 325 | 1) Configuring the link as a CODEC <-> CODEC style link. In this case the link | ||
| 326 | is enabled or disabled by the state of the DAPM graph. This usually means | ||
| 327 | there is a mixer control that can be used to connect or disconnect the path | ||
| 328 | between both DAIs. | ||
| 329 | |||
| 330 | 2) Hostless FE. This FE has a virtual connection to the BE DAI links on the DAPM | ||
| 331 | graph. Control is then carried out by the FE as regular PCM operations. | ||
| 332 | This method gives more control over the DAI links, but requires much more | ||
| 333 | userspace code to control the link. Its recommended to use CODEC<->CODEC | ||
| 334 | unless your HW needs more fine grained sequencing of the PCM ops. | ||
| 335 | |||
| 336 | |||
| 337 | CODEC <-> CODEC link | ||
| 338 | -------------------- | ||
| 339 | |||
| 340 | This DAI link is enabled when DAPM detects a valid path within the DAPM graph. | ||
| 341 | The machine driver sets some additional parameters to the DAI link i.e. | ||
| 342 | |||
| 343 | static const struct snd_soc_pcm_stream dai_params = { | ||
| 344 | .formats = SNDRV_PCM_FMTBIT_S32_LE, | ||
| 345 | .rate_min = 8000, | ||
| 346 | .rate_max = 8000, | ||
| 347 | .channels_min = 2, | ||
| 348 | .channels_max = 2, | ||
| 349 | }; | ||
| 350 | |||
| 351 | static struct snd_soc_dai_link dais[] = { | ||
| 352 | < ... more DAI links above ... > | ||
| 353 | { | ||
| 354 | .name = "MODEM", | ||
| 355 | .stream_name = "MODEM", | ||
| 356 | .cpu_dai_name = "dai2", | ||
| 357 | .codec_dai_name = "modem-aif1", | ||
| 358 | .codec_name = "modem", | ||
| 359 | .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ||
| 360 | | SND_SOC_DAIFMT_CBM_CFM, | ||
| 361 | .params = &dai_params, | ||
| 362 | } | ||
| 363 | < ... more DAI links here ... > | ||
| 364 | |||
| 365 | These parameters are used to configure the DAI hw_params() when DAPM detects a | ||
| 366 | valid path and then calls the PCM operations to start the link. DAPM will also | ||
| 367 | call the appropriate PCM operations to disable the DAI when the path is no | ||
| 368 | longer valid. | ||
| 369 | |||
| 370 | |||
| 371 | Hostless FE | ||
| 372 | ----------- | ||
| 373 | |||
| 374 | The DAI link(s) are enabled by a FE that does not read or write any PCM data. | ||
| 375 | This means creating a new FE that is connected with a virtual path to both | ||
| 376 | DAI links. The DAI links will be started when the FE PCM is started and stopped | ||
| 377 | when the FE PCM is stopped. Note that the FE PCM cannot read or write data in | ||
| 378 | this configuration. | ||
| 379 | |||
| 380 | |||
| @@ -1,22 +1,23 @@ | |||
| 1 | ASoC Codec Driver | 1 | ASoC Codec Class Driver |
| 2 | ================= | 2 | ======================= |
| 3 | 3 | ||
| 4 | The codec driver is generic and hardware independent code that configures the | 4 | The codec class driver is generic and hardware independent code that configures |
| 5 | codec to provide audio capture and playback. It should contain no code that is | 5 | the codec, FM, MODEM, BT or external DSP to provide audio capture and playback. |
| 6 | specific to the target platform or machine. All platform and machine specific | 6 | It should contain no code that is specific to the target platform or machine. |
| 7 | code should be added to the platform and machine drivers respectively. | 7 | All platform and machine specific code should be added to the platform and |
| 8 | machine drivers respectively. | ||
| 8 | 9 | ||
| 9 | Each codec driver *must* provide the following features:- | 10 | Each codec class driver *must* provide the following features:- |
| 10 | 11 | ||
| 11 | 1) Codec DAI and PCM configuration | 12 | 1) Codec DAI and PCM configuration |
| 12 | 2) Codec control IO - using I2C, 3 Wire(SPI) or both APIs | 13 | 2) Codec control IO - using RegMap API |
| 13 | 3) Mixers and audio controls | 14 | 3) Mixers and audio controls |
| 14 | 4) Codec audio operations | 15 | 4) Codec audio operations |
| 16 | 5) DAPM description. | ||
| 17 | 6) DAPM event handler. | ||
| 15 | 18 | ||
| 16 | Optionally, codec drivers can also provide:- | 19 | Optionally, codec drivers can also provide:- |
| 17 | 20 | ||
| 18 | 5) DAPM description. | ||
| 19 | 6) DAPM event handler. | ||
| 20 | 7) DAC Digital mute control. | 21 | 7) DAC Digital mute control. |
| 21 | 22 | ||
| 22 | Its probably best to use this guide in conjunction with the existing codec | 23 | Its probably best to use this guide in conjunction with the existing codec |
| @@ -64,26 +65,9 @@ struct snd_soc_dai_driver wm8731_dai = { · 41 unmodified lines | |||
| 64 | 2 - Codec control IO | 65 | 2 - Codec control IO |
| 65 | -------------------- | 66 | -------------------- |
| 66 | The codec can usually be controlled via an I2C or SPI style interface | 67 | The codec can usually be controlled via an I2C or SPI style interface |
| 67 | (AC97 combines control with data in the DAI). The codec drivers provide | 68 | (AC97 combines control with data in the DAI). The codec driver should use the |
| 68 | functions to read and write the codec registers along with supplying a | 69 | Regmap API for all codec IO. Please see include/linux/regmap.h and existing |
| 69 | register cache:- | 70 | codec drivers for example regmap usage. |
| 70 | |||
| 71 | /* IO control data and register cache */ | ||
| 72 | void *control_data; /* codec control (i2c/3wire) data */ | ||
| 73 | void *reg_cache; | ||
| 74 | |||
| 75 | Codec read/write should do any data formatting and call the hardware | ||
| 76 | read write below to perform the IO. These functions are called by the | ||
| 77 | core and ALSA when performing DAPM or changing the mixer:- | ||
| 78 | |||
| 79 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); | ||
| 80 | int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); | ||
| 81 | |||
| 82 | Codec hardware IO functions - usually points to either the I2C, SPI or AC97 | ||
| 83 | read/write:- | ||
| 84 | |||
| 85 | hw_write_t hw_write; | ||
| 86 | hw_read_t hw_read; | ||
| 87 | 71 | ||
| 88 | 72 | ||
| 89 | 3 - Mixers and audio controls | 73 | 3 - Mixers and audio controls |
| @@ -127,7 +111,7 @@ Defines a stereo enumerated control · 37 unmodified lines | |||
| 127 | 111 | ||
| 128 | 4 - Codec Audio Operations | 112 | 4 - Codec Audio Operations |
| 129 | -------------------------- | 113 | -------------------------- |
| 130 | The codec driver also supports the following ALSA operations:- | 114 | The codec driver also supports the following ALSA PCM operations:- |
| 131 | 115 | ||
| 132 | /* SoC audio ops */ | 116 | /* SoC audio ops */ |
| 133 | struct snd_soc_ops { | 117 | struct snd_soc_ops { |
| @@ -21,7 +21,7 @@ level power systems. · 20 unmodified lines | |||
| 21 | 21 | ||
| 22 | There are 4 power domains within DAPM | 22 | There are 4 power domains within DAPM |
| 23 | 23 | ||
| 24 | 1. Codec domain - VREF, VMID (core codec and audio power) | 24 | 1. Codec bias domain - VREF, VMID (core codec and audio power) |
| 25 | Usually controlled at codec probe/remove and suspend/resume, although | 25 | Usually controlled at codec probe/remove and suspend/resume, although |
| 26 | can be set at stream time if power is not needed for sidetone, etc. | 26 | can be set at stream time if power is not needed for sidetone, etc. |
| 27 | 27 | ||
| @@ -30,7 +30,7 @@ There are 4 power domains within DAPM · 2 unmodified lines | |||
| 30 | machine driver and responds to asynchronous events e.g when HP | 30 | machine driver and responds to asynchronous events e.g when HP |
| 31 | are inserted | 31 | are inserted |
| 32 | 32 | ||
| 33 | 3. Path domain - audio susbsystem signal paths | 33 | 3. Path domain - audio subsystem signal paths |
| 34 | Automatically set when mixer and mux settings are changed by the user. | 34 | Automatically set when mixer and mux settings are changed by the user. |
| 35 | e.g. alsamixer, amixer. | 35 | e.g. alsamixer, amixer. |
| 36 | 36 | ||
| @@ -63,14 +63,22 @@ Audio DAPM widgets fall into a number of types:- · 26 unmodified lines | |||
| 63 | o Line - Line Input/Output (and optional Jack) | 63 | o Line - Line Input/Output (and optional Jack) |
| 64 | o Speaker - Speaker | 64 | o Speaker - Speaker |
| 65 | o Supply - Power or clock supply widget used by other widgets. | 65 | o Supply - Power or clock supply widget used by other widgets. |
| 66 | o Regulator - External regulator that supplies power to audio components. | ||
| 67 | o Clock - External clock that supplies clock to audio components. | ||
| 68 | o AIF IN - Audio Interface Input (with TDM slot mask). | ||
| 69 | o AIF OUT - Audio Interface Output (with TDM slot mask). | ||
| 70 | o Siggen - Signal Generator. | ||
| 71 | o DAI IN - Digital Audio Interface Input. | ||
| 72 | o DAI OUT - Digital Audio Interface Output. | ||
| 73 | o DAI Link - DAI Link between two DAI structures */ | ||
| 66 | o Pre - Special PRE widget (exec before all others) | 74 | o Pre - Special PRE widget (exec before all others) |
| 67 | o Post - Special POST widget (exec after all others) | 75 | o Post - Special POST widget (exec after all others) |
| 68 | 76 | ||
| 69 | (Widgets are defined in include/sound/soc-dapm.h) | 77 | (Widgets are defined in include/sound/soc-dapm.h) |
| 70 | 78 | ||
| 71 | Widgets are usually added in the codec driver and the machine driver. There are | 79 | Widgets can be added to the sound card by any of the component driver types. |
| 72 | convenience macros defined in soc-dapm.h that can be used to quickly build a | 80 | There are convenience macros defined in soc-dapm.h that can be used to quickly |
| 73 | list of widgets of the codecs and machines DAPM widgets. | 81 | build a list of widgets of the codecs and machines DAPM widgets. |
| 74 | 82 | ||
| 75 | Most widgets have a name, register, shift and invert. Some widgets have extra | 83 | Most widgets have a name, register, shift and invert. Some widgets have extra |
| 76 | parameters for stream name and kcontrols. | 84 | parameters for stream name and kcontrols. |
| @@ -80,11 +88,13 @@ parameters for stream name and kcontrols. · 3 unmodified lines | |||
| 80 | ------------------------- | 88 | ------------------------- |
| 81 | 89 | ||
| 82 | Stream Widgets relate to the stream power domain and only consist of ADCs | 90 | Stream Widgets relate to the stream power domain and only consist of ADCs |
| 83 | (analog to digital converters) and DACs (digital to analog converters). | 91 | (analog to digital converters), DACs (digital to analog converters), |
| 92 | AIF IN and AIF OUT. | ||
| 84 | 93 | ||
| 85 | Stream widgets have the following format:- | 94 | Stream widgets have the following format:- |
| 86 | 95 | ||
| 87 | SND_SOC_DAPM_DAC(name, stream name, reg, shift, invert), | 96 | SND_SOC_DAPM_DAC(name, stream name, reg, shift, invert), |
| 97 | SND_SOC_DAPM_AIF_IN(name, stream, slot, reg, shift, invert) | ||
| 88 | 98 | ||
| 89 | NOTE: the stream name must match the corresponding stream name in your codec | 99 | NOTE: the stream name must match the corresponding stream name in your codec |
| 90 | snd_soc_codec_dai. | 100 | snd_soc_codec_dai. |
| @@ -94,6 +104,11 @@ e.g. stream widgets for HiFi playback and capture · 3 unmodified lines | |||
| 94 | SND_SOC_DAPM_DAC("HiFi DAC", "HiFi Playback", REG, 3, 1), | 104 | SND_SOC_DAPM_DAC("HiFi DAC", "HiFi Playback", REG, 3, 1), |
| 95 | SND_SOC_DAPM_ADC("HiFi ADC", "HiFi Capture", REG, 2, 1), | 105 | SND_SOC_DAPM_ADC("HiFi ADC", "HiFi Capture", REG, 2, 1), |
| 96 | 106 | ||
| 107 | e.g. stream widgets for AIF | ||
| 108 | |||
| 109 | SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), | ||
| 110 | SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), | ||
| 111 | |||
| 97 | 112 | ||
| 98 | 2.2 Path Domain Widgets | 113 | 2.2 Path Domain Widgets |
| 99 | ----------------------- | 114 | ----------------------- |
| @@ -121,12 +136,14 @@ If you dont want the mixer elements prefixed with the name of the mixer widget, · 21 unmodified lines | |||
| 121 | you can use SND_SOC_DAPM_MIXER_NAMED_CTL instead. the parameters are the same | 136 | you can use SND_SOC_DAPM_MIXER_NAMED_CTL instead. the parameters are the same |
| 122 | as for SND_SOC_DAPM_MIXER. | 137 | as for SND_SOC_DAPM_MIXER. |
| 123 | 138 | ||
| 124 | 2.3 Platform/Machine domain Widgets | 139 | |
| 125 | ----------------------------------- | 140 | 2.3 Machine domain Widgets |
| 141 | -------------------------- | ||
| 126 | 142 | ||
| 127 | Machine widgets are different from codec widgets in that they don't have a | 143 | Machine widgets are different from codec widgets in that they don't have a |
| 128 | codec register bit associated with them. A machine widget is assigned to each | 144 | codec register bit associated with them. A machine widget is assigned to each |
| 129 | machine audio component (non codec) that can be independently powered. e.g. | 145 | machine audio component (non codec or DSP) that can be independently |
| 146 | powered. e.g. | ||
| 130 | 147 | ||
| 131 | o Speaker Amp | 148 | o Speaker Amp |
| 132 | o Microphone Bias | 149 | o Microphone Bias |
| @@ -146,12 +163,12 @@ static int spitz_mic_bias(struct snd_soc_dapm_widget* w, int event) · 13 unmodified lines | |||
| 146 | SND_SOC_DAPM_MIC("Mic Jack", spitz_mic_bias), | 163 | SND_SOC_DAPM_MIC("Mic Jack", spitz_mic_bias), |
| 147 | 164 | ||
| 148 | 165 | ||
| 149 | 2.4 Codec Domain | 166 | 2.4 Codec (BIAS) Domain |
| 150 | ---------------- | 167 | ----------------------- |
| 151 | 168 | ||
| 152 | The codec power domain has no widgets and is handled by the codecs DAPM event | 169 | The codec bias power domain has no widgets and is handled by the codecs DAPM |
| 153 | handler. This handler is called when the codec powerstate is changed wrt to any | 170 | event handler. This handler is called when the codec powerstate is changed wrt |
| 154 | stream event or by kernel PM events. | 171 | to any stream event or by kernel PM events. |
| 155 | 172 | ||
| 156 | 173 | ||
| 157 | 2.5 Virtual Widgets | 174 | 2.5 Virtual Widgets |
| @@ -169,15 +186,16 @@ After all the widgets have been defined, they can then be added to the DAPM · 11 unmodified lines | |||
| 169 | subsystem individually with a call to snd_soc_dapm_new_control(). | 186 | subsystem individually with a call to snd_soc_dapm_new_control(). |
| 170 | 187 | ||
| 171 | 188 | ||
| 172 | 3. Codec Widget Interconnections | 189 | 3. Codec/DSP Widget Interconnections |
| 173 | ================================ | 190 | ==================================== |
| 174 | 191 | ||
| 175 | Widgets are connected to each other within the codec and machine by audio paths | 192 | Widgets are connected to each other within the codec, platform and machine by |
| 176 | (called interconnections). Each interconnection must be defined in order to | 193 | audio paths (called interconnections). Each interconnection must be defined in |
| 177 | create a map of all audio paths between widgets. | 194 | order to create a map of all audio paths between widgets. |
| 178 | 195 | ||
| 179 | This is easiest with a diagram of the codec (and schematic of the machine audio | 196 | This is easiest with a diagram of the codec or DSP (and schematic of the machine |
| 180 | system), as it requires joining widgets together via their audio signal paths. | 197 | audio system), as it requires joining widgets together via their audio signal |
| 198 | paths. | ||
| 181 | 199 | ||
| 182 | e.g., from the WM8731 output mixer (wm8731.c) | 200 | e.g., from the WM8731 output mixer (wm8731.c) |
| 183 | 201 | ||
| @@ -247,16 +265,9 @@ machine and includes the codec. e.g. · 63 unmodified lines | |||
| 247 | o Mic Jack | 265 | o Mic Jack |
| 248 | o Codec Pins | 266 | o Codec Pins |
| 249 | 267 | ||
| 250 | When a codec pin is NC it can be marked as not used with a call to | 268 | Endpoints are added to the DAPM graph so that their usage can be determined in |
| 251 | 269 | order to save power. e.g. NC codecs pins will be switched OFF, unconnected | |
| 252 | snd_soc_dapm_set_endpoint(codec, "Widget Name", 0); | 270 | jacks can also be switched OFF. |
| 253 | |||
| 254 | The last argument is 0 for inactive and 1 for active. This way the pin and its | ||
| 255 | input widget will never be powered up and consume power. | ||
| 256 | |||
| 257 | This also applies to machine widgets. e.g. if a headphone is connected to a | ||
| 258 | jack then the jack can be marked active. If the headphone is removed, then | ||
| 259 | the headphone jack can be marked inactive. | ||
| 260 | 271 | ||
| 261 | 272 | ||
| 262 | 5 DAPM Widget Events | 273 | 5 DAPM Widget Events |
| @@ -1,8 +1,10 @@ | |||
| 1 | ASoC Machine Driver | 1 | ASoC Machine Driver |
| 2 | =================== | 2 | =================== |
| 3 | 3 | ||
| 4 | The ASoC machine (or board) driver is the code that glues together the platform | 4 | The ASoC machine (or board) driver is the code that glues together all the |
| 5 | and codec drivers. | 5 | component drivers (e.g. codecs, platforms and DAIs). It also describes the |
| 6 | relationships between each componnent which include audio paths, GPIOs, | ||
| 7 | interrupts, clocking, jacks and voltage regulators. | ||
| 6 | 8 | ||
| 7 | The machine driver can contain codec and platform specific code. It registers | 9 | The machine driver can contain codec and platform specific code. It registers |
| 8 | the audio subsystem with the kernel as a platform device and is represented by | 10 | the audio subsystem with the kernel as a platform device and is represented by |
| @@ -1,9 +1,9 @@ | |||
| 1 | ASoC Platform Driver | 1 | ASoC Platform Driver |
| 2 | ==================== | 2 | ==================== |
| 3 | 3 | ||
| 4 | An ASoC platform driver can be divided into audio DMA and SoC DAI configuration | 4 | An ASoC platform driver class can be divided into audio DMA drivers, SoC DAI |
| 5 | and control. The platform drivers only target the SoC CPU and must have no board | 5 | drivers and DSP drivers. The platform drivers only target the SoC CPU and must |
| 6 | specific code. | 6 | have no board specific code. |
| 7 | 7 | ||
| 8 | Audio DMA | 8 | Audio DMA |
| 9 | ========= | 9 | ========= |
| @@ -64,3 +64,16 @@ Each SoC DAI driver must provide the following features:- · 54 unmodified lines | |||
| 64 | 5) Suspend and resume (optional) | 64 | 5) Suspend and resume (optional) |
| 65 | 65 | ||
| 66 | Please see codec.txt for a description of items 1 - 4. | 66 | Please see codec.txt for a description of items 1 - 4. |
| 67 | |||
| 68 | |||
| 69 | SoC DSP Drivers | ||
| 70 | =============== | ||
| 71 | |||
| 72 | Each SoC DSP driver usually supplies the following features :- | ||
| 73 | |||
| 74 | 1) DAPM graph | ||
| 75 | 2) Mixer controls | ||
| 76 | 3) DMA IO to/from DSP buffers (if applicable) | ||
| 77 | 4) Definition of DSP front end (FE) PCM devices. | ||
| 78 | |||
| 79 | Please see DPCM.txt for a description of item 4. | ||
| @@ -290,13 +290,24 @@ Default value is "/sbin/hotplug". · 289 unmodified lines | |||
| 290 | kptr_restrict: | 290 | kptr_restrict: |
| 291 | 291 | ||
| 292 | This toggle indicates whether restrictions are placed on | 292 | This toggle indicates whether restrictions are placed on |
| 293 | exposing kernel addresses via /proc and other interfaces. When | 293 | exposing kernel addresses via /proc and other interfaces. |
| 294 | kptr_restrict is set to (0), there are no restrictions. When | 294 | |
| 295 | kptr_restrict is set to (1), the default, kernel pointers | 295 | When kptr_restrict is set to (0), the default, there are no restrictions. |
| 296 | printed using the %pK format specifier will be replaced with 0's | 296 | |
| 297 | unless the user has CAP_SYSLOG. When kptr_restrict is set to | 297 | When kptr_restrict is set to (1), kernel pointers printed using the %pK |
| 298 | (2), kernel pointers printed using %pK will be replaced with 0's | 298 | format specifier will be replaced with 0's unless the user has CAP_SYSLOG |
| 299 | regardless of privileges. | 299 | and effective user and group ids are equal to the real ids. This is |
| 300 | because %pK checks are done at read() time rather than open() time, so | ||
| 301 | if permissions are elevated between the open() and the read() (e.g via | ||
| 302 | a setuid binary) then %pK will not leak kernel pointers to unprivileged | ||
| 303 | users. Note, this is a temporary solution only. The correct long-term | ||
| 304 | solution is to do the permission checks at open() time. Consider removing | ||
| 305 | world read permissions from files that use %pK, and using dmesg_restrict | ||
| 306 | to protect against uses of %pK in dmesg(8) if leaking kernel pointer | ||
| 307 | values to unprivileged users is a concern. | ||
| 308 | |||
| 309 | When kptr_restrict is set to (2), kernel pointers printed using | ||
| 310 | %pK will be replaced with 0's regardless of privileges. | ||
| 300 | 311 | ||
| 301 | ============================================================== | 312 | ============================================================== |
| 302 | 313 | ||
| @@ -355,6 +366,82 @@ utilize. · 52 unmodified lines | |||
| 355 | 366 | ||
| 356 | ============================================================== | 367 | ============================================================== |
| 357 | 368 | ||
| 369 | numa_balancing | ||
| 370 | |||
| 371 | Enables/disables automatic page fault based NUMA memory | ||
| 372 | balancing. Memory is moved automatically to nodes | ||
| 373 | that access it often. | ||
| 374 | |||
| 375 | Enables/disables automatic NUMA memory balancing. On NUMA machines, there | ||
| 376 | is a performance penalty if remote memory is accessed by a CPU. When this | ||
| 377 | feature is enabled the kernel samples what task thread is accessing memory | ||
| 378 | by periodically unmapping pages and later trapping a page fault. At the | ||
| 379 | time of the page fault, it is determined if the data being accessed should | ||
| 380 | be migrated to a local memory node. | ||
| 381 | |||
| 382 | The unmapping of pages and trapping faults incur additional overhead that | ||
| 383 | ideally is offset by improved memory locality but there is no universal | ||
| 384 | guarantee. If the target workload is already bound to NUMA nodes then this | ||
| 385 | feature should be disabled. Otherwise, if the system overhead from the | ||
| 386 | feature is too high then the rate the kernel samples for NUMA hinting | ||
| 387 | faults may be controlled by the numa_balancing_scan_period_min_ms, | ||
| 388 | numa_balancing_scan_delay_ms, numa_balancing_scan_period_max_ms, | ||
| 389 | numa_balancing_scan_size_mb, numa_balancing_settle_count sysctls and | ||
| 390 | numa_balancing_migrate_deferred. | ||
| 391 | |||
| 392 | ============================================================== | ||
| 393 | |||
| 394 | numa_balancing_scan_period_min_ms, numa_balancing_scan_delay_ms, | ||
| 395 | numa_balancing_scan_period_max_ms, numa_balancing_scan_size_mb | ||
| 396 | |||
| 397 | Automatic NUMA balancing scans tasks address space and unmaps pages to | ||
| 398 | detect if pages are properly placed or if the data should be migrated to a | ||
| 399 | memory node local to where the task is running. Every "scan delay" the task | ||
| 400 | scans the next "scan size" number of pages in its address space. When the | ||
| 401 | end of the address space is reached the scanner restarts from the beginning. | ||
| 402 | |||
| 403 | In combination, the "scan delay" and "scan size" determine the scan rate. | ||
| 404 | When "scan delay" decreases, the scan rate increases. The scan delay and | ||
| 405 | hence the scan rate of every task is adaptive and depends on historical | ||
| 406 | behaviour. If pages are properly placed then the scan delay increases, | ||
| 407 | otherwise the scan delay decreases. The "scan size" is not adaptive but | ||
| 408 | the higher the "scan size", the higher the scan rate. | ||
| 409 | |||
| 410 | Higher scan rates incur higher system overhead as page faults must be | ||
| 411 | trapped and potentially data must be migrated. However, the higher the scan | ||
| 412 | rate, the more quickly a tasks memory is migrated to a local node if the | ||
| 413 | workload pattern changes and minimises performance impact due to remote | ||
| 414 | memory accesses. These sysctls control the thresholds for scan delays and | ||
| 415 | the number of pages scanned. | ||
| 416 | |||
| 417 | numa_balancing_scan_period_min_ms is the minimum time in milliseconds to | ||
| 418 | scan a tasks virtual memory. It effectively controls the maximum scanning | ||
| 419 | rate for each task. | ||
| 420 | |||
| 421 | numa_balancing_scan_delay_ms is the starting "scan delay" used for a task | ||
| 422 | when it initially forks. | ||
| 423 | |||
| 424 | numa_balancing_scan_period_max_ms is the maximum time in milliseconds to | ||
| 425 | scan a tasks virtual memory. It effectively controls the minimum scanning | ||
| 426 | rate for each task. | ||
| 427 | |||
| 428 | numa_balancing_scan_size_mb is how many megabytes worth of pages are | ||
| 429 | scanned for a given scan. | ||
| 430 | |||
| 431 | numa_balancing_settle_count is how many scan periods must complete before | ||
| 432 | the schedule balancer stops pushing the task towards a preferred node. This | ||
| 433 | gives the scheduler a chance to place the task on an alternative node if the | ||
| 434 | preferred node is overloaded. | ||
| 435 | |||
| 436 | numa_balancing_migrate_deferred is how many page migrations get skipped | ||
| 437 | unconditionally, after a page migration is skipped because a page is shared | ||
| 438 | with other tasks. This reduces page migration overhead, and determines | ||
| 439 | how much stronger the "move task near its memory" policy scheduler becomes, | ||
| 440 | versus the "move memory near its task" memory management policy, for workloads | ||
| 441 | with shared memory. | ||
| 442 | |||
| 443 | ============================================================== | ||
| 444 | |||
| 358 | osrelease, ostype & version: | 445 | osrelease, ostype & version: |
| 359 | 446 | ||
| 360 | # cat osrelease | 447 | # cat osrelease |
| @@ -119,8 +119,11 @@ other appears as 0 when read. · 118 unmodified lines | |||
| 119 | 119 | ||
| 120 | dirty_background_ratio | 120 | dirty_background_ratio |
| 121 | 121 | ||
| 122 | Contains, as a percentage of total system memory, the number of pages at which | 122 | Contains, as a percentage of total available memory that contains free pages |
| 123 | the background kernel flusher threads will start writing out dirty data. | 123 | and reclaimable pages, the number of pages at which the background kernel |
| 124 | flusher threads will start writing out dirty data. | ||
| 125 | |||
| 126 | The total avaiable memory is not equal to total system memory. | ||
| 124 | 127 | ||
| 125 | ============================================================== | 128 | ============================================================== |
| 126 | 129 | ||
| @@ -151,9 +154,11 @@ interval will be written out next time a flusher thread wakes up. · 24 unmodified lines | |||
| 151 | 154 | ||
| 152 | dirty_ratio | 155 | dirty_ratio |
| 153 | 156 | ||
| 154 | Contains, as a percentage of total system memory, the number of pages at which | 157 | Contains, as a percentage of total available memory that contains free pages |
| 155 | a process which is generating disk writes will itself start writing out dirty | 158 | and reclaimable pages, the number of pages at which a process which is |
| 156 | data. | 159 | generating disk writes will itself start writing out dirty data. |
| 160 | |||
| 161 | The total avaiable memory is not equal to total system memory. | ||
| 157 | 162 | ||
| 158 | ============================================================== | 163 | ============================================================== |
| 159 | 164 | ||
| @@ -11,27 +11,29 @@ regardless of whatever else it is doing, unless it is completely locked up. · 10 unmodified lines | |||
| 11 | You need to say "yes" to 'Magic SysRq key (CONFIG_MAGIC_SYSRQ)' when | 11 | You need to say "yes" to 'Magic SysRq key (CONFIG_MAGIC_SYSRQ)' when |
| 12 | configuring the kernel. When running a kernel with SysRq compiled in, | 12 | configuring the kernel. When running a kernel with SysRq compiled in, |
| 13 | /proc/sys/kernel/sysrq controls the functions allowed to be invoked via | 13 | /proc/sys/kernel/sysrq controls the functions allowed to be invoked via |
| 14 | the SysRq key. By default the file contains 1 which means that every | 14 | the SysRq key. The default value in this file is set by the |
| 15 | possible SysRq request is allowed (in older versions SysRq was disabled | 15 | CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE config symbol, which itself defaults |
| 16 | by default, and you were required to specifically enable it at run-time | 16 | to 1. Here is the list of possible values in /proc/sys/kernel/sysrq: |
| 17 | but this is not the case any more). Here is the list of possible values | ||
| 18 | in /proc/sys/kernel/sysrq: | ||
| 19 | 0 - disable sysrq completely | 17 | 0 - disable sysrq completely |
| 20 | 1 - enable all functions of sysrq | 18 | 1 - enable all functions of sysrq |
| 21 | >1 - bitmask of allowed sysrq functions (see below for detailed function | 19 | >1 - bitmask of allowed sysrq functions (see below for detailed function |
| 22 | description): | 20 | description): |
| 23 | 2 - enable control of console logging level | 21 | 2 = 0x2 - enable control of console logging level |
| 24 | 4 - enable control of keyboard (SAK, unraw) | 22 | 4 = 0x4 - enable control of keyboard (SAK, unraw) |
| 25 | 8 - enable debugging dumps of processes etc. | 23 | 8 = 0x8 - enable debugging dumps of processes etc. |
| 26 | 16 - enable sync command | 24 | 16 = 0x10 - enable sync command |
| 27 | 32 - enable remount read-only | 25 | 32 = 0x20 - enable remount read-only |
| 28 | 64 - enable signalling of processes (term, kill, oom-kill) | 26 | 64 = 0x40 - enable signalling of processes (term, kill, oom-kill) |
| 29 | 128 - allow reboot/poweroff | 27 | 128 = 0x80 - allow reboot/poweroff |
| 30 | 256 - allow nicing of all RT tasks | 28 | 256 = 0x100 - allow nicing of all RT tasks |
| 31 | 29 | ||
| 32 | You can set the value in the file by the following command: | 30 | You can set the value in the file by the following command: |
| 33 | echo "number" >/proc/sys/kernel/sysrq | 31 | echo "number" >/proc/sys/kernel/sysrq |
| 34 | 32 | ||
| 33 | The number may be written here either as decimal or as hexadecimal | ||
| 34 | with the 0x prefix. CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE must always be | ||
| 35 | written in hexadecimal. | ||
| 36 | |||
| 35 | Note that the value of /proc/sys/kernel/sysrq influences only the invocation | 37 | Note that the value of /proc/sys/kernel/sysrq influences only the invocation |
| 36 | via a keyboard. Invocation of any operation via /proc/sysrq-trigger is always | 38 | via a keyboard. Invocation of any operation via /proc/sysrq-trigger is always |
| 37 | allowed (by a user with admin privileges). | 39 | allowed (by a user with admin privileges). |
| @@ -440,15 +440,15 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 439 unmodified lines | |||
| 440 | buf += " /*\n" | 440 | buf += " /*\n" |
| 441 | buf += " * Setup default attribute lists for various fabric->tf_cit_tmpl\n" | 441 | buf += " * Setup default attribute lists for various fabric->tf_cit_tmpl\n" |
| 442 | buf += " */\n" | 442 | buf += " */\n" |
| 443 | buf += " TF_CIT_TMPL(fabric)->tfc_wwn_cit.ct_attrs = " + fabric_mod_name + "_wwn_attrs;\n" | 443 | buf += " fabric->tf_cit_tmpl.tfc_wwn_cit.ct_attrs = " + fabric_mod_name + "_wwn_attrs;\n" |
| 444 | buf += " TF_CIT_TMPL(fabric)->tfc_tpg_base_cit.ct_attrs = NULL;\n" | 444 | buf += " fabric->tf_cit_tmpl.tfc_tpg_base_cit.ct_attrs = NULL;\n" |
| 445 | buf += " TF_CIT_TMPL(fabric)->tfc_tpg_attrib_cit.ct_attrs = NULL;\n" | 445 | buf += " fabric->tf_cit_tmpl.tfc_tpg_attrib_cit.ct_attrs = NULL;\n" |
| 446 | buf += " TF_CIT_TMPL(fabric)->tfc_tpg_param_cit.ct_attrs = NULL;\n" | 446 | buf += " fabric->tf_cit_tmpl.tfc_tpg_param_cit.ct_attrs = NULL;\n" |
| 447 | buf += " TF_CIT_TMPL(fabric)->tfc_tpg_np_base_cit.ct_attrs = NULL;\n" | 447 | buf += " fabric->tf_cit_tmpl.tfc_tpg_np_base_cit.ct_attrs = NULL;\n" |
| 448 | buf += " TF_CIT_TMPL(fabric)->tfc_tpg_nacl_base_cit.ct_attrs = NULL;\n" | 448 | buf += " fabric->tf_cit_tmpl.tfc_tpg_nacl_base_cit.ct_attrs = NULL;\n" |
| 449 | buf += " TF_CIT_TMPL(fabric)->tfc_tpg_nacl_attrib_cit.ct_attrs = NULL;\n" | 449 | buf += " fabric->tf_cit_tmpl.tfc_tpg_nacl_attrib_cit.ct_attrs = NULL;\n" |
| 450 | buf += " TF_CIT_TMPL(fabric)->tfc_tpg_nacl_auth_cit.ct_attrs = NULL;\n" | 450 | buf += " fabric->tf_cit_tmpl.tfc_tpg_nacl_auth_cit.ct_attrs = NULL;\n" |
| 451 | buf += " TF_CIT_TMPL(fabric)->tfc_tpg_nacl_param_cit.ct_attrs = NULL;\n" | 451 | buf += " fabric->tf_cit_tmpl.tfc_tpg_nacl_param_cit.ct_attrs = NULL;\n" |
| 452 | buf += " /*\n" | 452 | buf += " /*\n" |
| 453 | buf += " * Register the fabric for use within TCM\n" | 453 | buf += " * Register the fabric for use within TCM\n" |
| 454 | buf += " */\n" | 454 | buf += " */\n" |
| @@ -8,5 +8,9 @@ hpet_example.c · 7 unmodified lines | |||
| 8 | - sample hpet timer test program | 8 | - sample hpet timer test program |
| 9 | hrtimers.txt | 9 | hrtimers.txt |
| 10 | - subsystem for high-resolution kernel timers | 10 | - subsystem for high-resolution kernel timers |
| 11 | NO_HZ.txt | ||
| 12 | - Summary of the different methods for the scheduler clock-interrupts management. | ||
| 13 | timers-howto.txt | ||
| 14 | - how to insert delays in the kernel the right (tm) way. | ||
| 11 | timer_stats.txt | 15 | timer_stats.txt |
| 12 | - timer usage statistics | 16 | - timer usage statistics |
| @@ -655,7 +655,11 @@ explains which is which. · 654 unmodified lines | |||
| 655 | read the irq flags variable, an 'X' will always | 655 | read the irq flags variable, an 'X' will always |
| 656 | be printed here. | 656 | be printed here. |
| 657 | 657 | ||
| 658 | need-resched: 'N' task need_resched is set, '.' otherwise. | 658 | need-resched: |
| 659 | 'N' both TIF_NEED_RESCHED and PREEMPT_NEED_RESCHED is set, | ||
| 660 | 'n' only TIF_NEED_RESCHED is set, | ||
| 661 | 'p' only PREEMPT_NEED_RESCHED is set, | ||
| 662 | '.' otherwise. | ||
| 659 | 663 | ||
| 660 | hardirq/softirq: | 664 | hardirq/softirq: |
| 661 | 'H' - hard irq occurred inside a softirq. | 665 | 'H' - hard irq occurred inside a softirq. |
| @@ -114,3 +114,8 @@ core kernel image or in modules. · 113 unmodified lines | |||
| 114 | If the tracepoint has to be used in kernel modules, an | 114 | If the tracepoint has to be used in kernel modules, an |
| 115 | EXPORT_TRACEPOINT_SYMBOL_GPL() or EXPORT_TRACEPOINT_SYMBOL() can be | 115 | EXPORT_TRACEPOINT_SYMBOL_GPL() or EXPORT_TRACEPOINT_SYMBOL() can be |
| 116 | used to export the defined tracepoints. | 116 | used to export the defined tracepoints. |
| 117 | |||
| 118 | Note: The convenience macro TRACE_EVENT provides an alternative way to | ||
| 119 | define tracepoints. Check http://lwn.net/Articles/379903, | ||
| 120 | http://lwn.net/Articles/381064 and http://lwn.net/Articles/383362 | ||
| 121 | for a series of articles with more details. | ||
| @@ -26,7 +26,7 @@ Linux provides a number of functions for gadgets to use. · 25 unmodified lines | |||
| 26 | Creating a gadget means deciding what configurations there will be | 26 | Creating a gadget means deciding what configurations there will be |
| 27 | and which functions each configuration will provide. | 27 | and which functions each configuration will provide. |
| 28 | 28 | ||
| 29 | Configfs (please see Documentation/filesystems/configfs/*) lends itslef nicely | 29 | Configfs (please see Documentation/filesystems/configfs/*) lends itself nicely |
| 30 | for the purpose of telling the kernel about the above mentioned decision. | 30 | for the purpose of telling the kernel about the above mentioned decision. |
| 31 | This document is about how to do it. | 31 | This document is about how to do it. |
| 32 | 32 | ||
| @@ -99,7 +99,7 @@ directories must be created: · 66 unmodified lines | |||
| 99 | $ mkdir configs/<name>.<number> | 99 | $ mkdir configs/<name>.<number> |
| 100 | 100 | ||
| 101 | where <name> can be any string which is legal in a filesystem and the | 101 | where <name> can be any string which is legal in a filesystem and the |
| 102 | <numebr> is the configuration's number, e.g.: | 102 | <number> is the configuration's number, e.g.: |
| 103 | 103 | ||
| 104 | $ mkdir configs/c.1 | 104 | $ mkdir configs/c.1 |
| 105 | 105 | ||
| @@ -327,7 +327,7 @@ from the buffer to the cs), but it is up to the implementer of the · 221 unmodified lines | |||
| 327 | two functions to decide what they actually do. | 327 | two functions to decide what they actually do. |
| 328 | 328 | ||
| 329 | typedef struct configured_structure cs; | 329 | typedef struct configured_structure cs; |
| 330 | typedef struc specific_attribute sa; | 330 | typedef struct specific_attribute sa; |
| 331 | 331 | ||
| 332 | sa | 332 | sa |
| 333 | +----------------------------------+ | 333 | +----------------------------------+ |
| @@ -0,0 +1,24 @@ | |||
| 1 | 00-INDEX | ||
| 2 | - this file. | ||
| 3 | api.txt | ||
| 4 | - KVM userspace API. | ||
| 5 | cpuid.txt | ||
| 6 | - KVM-specific cpuid leaves (x86). | ||
| 7 | devices/ | ||
| 8 | - KVM_CAP_DEVICE_CTRL userspace API. | ||
| 9 | hypercalls.txt | ||
| 10 | - KVM hypercalls. | ||
| 11 | locking.txt | ||
| 12 | - notes on KVM locks. | ||
| 13 | mmu.txt | ||
| 14 | - the x86 kvm shadow mmu. | ||
| 15 | msr.txt | ||
| 16 | - KVM-specific MSRs (x86). | ||
| 17 | nested-vmx.txt | ||
| 18 | - notes on nested virtualization for Intel x86 processors. | ||
| 19 | ppc-pv.txt | ||
| 20 | - the paravirtualization interface on PowerPC. | ||
| 21 | review-checklist.txt | ||
| 22 | - review checklist for KVM patches. | ||
| 23 | timekeeping.txt | ||
| 24 | - timekeeping virtualization for x86-based architectures. | ||
| @@ -1122,9 +1122,9 @@ struct kvm_cpuid2 { · 1121 unmodified lines | |||
| 1122 | struct kvm_cpuid_entry2 entries[0]; | 1122 | struct kvm_cpuid_entry2 entries[0]; |
| 1123 | }; | 1123 | }; |
| 1124 | 1124 | ||
| 1125 | #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1 | 1125 | #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) |
| 1126 | #define KVM_CPUID_FLAG_STATEFUL_FUNC 2 | 1126 | #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) |
| 1127 | #define KVM_CPUID_FLAG_STATE_READ_NEXT 4 | 1127 | #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) |
| 1128 | 1128 | ||
| 1129 | struct kvm_cpuid_entry2 { | 1129 | struct kvm_cpuid_entry2 { |
| 1130 | __u32 function; | 1130 | __u32 function; |
| @@ -1810,6 +1810,50 @@ registers, find a list below: · 679 unmodified lines | |||
| 1810 | PPC | KVM_REG_PPC_TLB3PS | 32 | 1810 | PPC | KVM_REG_PPC_TLB3PS | 32 |
| 1811 | PPC | KVM_REG_PPC_EPTCFG | 32 | 1811 | PPC | KVM_REG_PPC_EPTCFG | 32 |
| 1812 | PPC | KVM_REG_PPC_ICP_STATE | 64 | 1812 | PPC | KVM_REG_PPC_ICP_STATE | 64 |
| 1813 | PPC | KVM_REG_PPC_TB_OFFSET | 64 | ||
| 1814 | PPC | KVM_REG_PPC_SPMC1 | 32 | ||
| 1815 | PPC | KVM_REG_PPC_SPMC2 | 32 | ||
| 1816 | PPC | KVM_REG_PPC_IAMR | 64 | ||
| 1817 | PPC | KVM_REG_PPC_TFHAR | 64 | ||
| 1818 | PPC | KVM_REG_PPC_TFIAR | 64 | ||
| 1819 | PPC | KVM_REG_PPC_TEXASR | 64 | ||
| 1820 | PPC | KVM_REG_PPC_FSCR | 64 | ||
| 1821 | PPC | KVM_REG_PPC_PSPB | 32 | ||
| 1822 | PPC | KVM_REG_PPC_EBBHR | 64 | ||
| 1823 | PPC | KVM_REG_PPC_EBBRR | 64 | ||
| 1824 | PPC | KVM_REG_PPC_BESCR | 64 | ||
| 1825 | PPC | KVM_REG_PPC_TAR | 64 | ||
| 1826 | PPC | KVM_REG_PPC_DPDES | 64 | ||
| 1827 | PPC | KVM_REG_PPC_DAWR | 64 | ||
| 1828 | PPC | KVM_REG_PPC_DAWRX | 64 | ||
| 1829 | PPC | KVM_REG_PPC_CIABR | 64 | ||
| 1830 | PPC | KVM_REG_PPC_IC | 64 | ||
| 1831 | PPC | KVM_REG_PPC_VTB | 64 | ||
| 1832 | PPC | KVM_REG_PPC_CSIGR | 64 | ||
| 1833 | PPC | KVM_REG_PPC_TACR | 64 | ||
| 1834 | PPC | KVM_REG_PPC_TCSCR | 64 | ||
| 1835 | PPC | KVM_REG_PPC_PID | 64 | ||
| 1836 | PPC | KVM_REG_PPC_ACOP | 64 | ||
| 1837 | PPC | KVM_REG_PPC_VRSAVE | 32 | ||
| 1838 | PPC | KVM_REG_PPC_LPCR | 64 | ||
| 1839 | PPC | KVM_REG_PPC_PPR | 64 | ||
| 1840 | PPC | KVM_REG_PPC_ARCH_COMPAT 32 | ||
| 1841 | PPC | KVM_REG_PPC_TM_GPR0 | 64 | ||
| 1842 | ... | ||
| 1843 | PPC | KVM_REG_PPC_TM_GPR31 | 64 | ||
| 1844 | PPC | KVM_REG_PPC_TM_VSR0 | 128 | ||
| 1845 | ... | ||
| 1846 | PPC | KVM_REG_PPC_TM_VSR63 | 128 | ||
| 1847 | PPC | KVM_REG_PPC_TM_CR | 64 | ||
| 1848 | PPC | KVM_REG_PPC_TM_LR | 64 | ||
| 1849 | PPC | KVM_REG_PPC_TM_CTR | 64 | ||
| 1850 | PPC | KVM_REG_PPC_TM_FPSCR | 64 | ||
| 1851 | PPC | KVM_REG_PPC_TM_AMR | 64 | ||
| 1852 | PPC | KVM_REG_PPC_TM_PPR | 64 | ||
| 1853 | PPC | KVM_REG_PPC_TM_VRSAVE | 64 | ||
| 1854 | PPC | KVM_REG_PPC_TM_VSCR | 32 | ||
| 1855 | PPC | KVM_REG_PPC_TM_DSCR | 64 | ||
| 1856 | PPC | KVM_REG_PPC_TM_TAR | 64 | ||
| 1813 | 1857 | ||
| 1814 | ARM registers are mapped using the lower 32 bits. The upper 16 of that | 1858 | ARM registers are mapped using the lower 32 bits. The upper 16 of that |
| 1815 | is the register group type, or coprocessor number: | 1859 | is the register group type, or coprocessor number: |
| @@ -2304,7 +2348,31 @@ Possible features: · 488 unmodified lines | |||
| 2304 | Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only). | 2348 | Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only). |
| 2305 | 2349 | ||
| 2306 | 2350 | ||
| 2307 | 4.83 KVM_GET_REG_LIST | 2351 | 4.83 KVM_ARM_PREFERRED_TARGET |
| 2352 | |||
| 2353 | Capability: basic | ||
| 2354 | Architectures: arm, arm64 | ||
| 2355 | Type: vm ioctl | ||
| 2356 | Parameters: struct struct kvm_vcpu_init (out) | ||
| 2357 | Returns: 0 on success; -1 on error | ||
| 2358 | Errors: | ||
| 2359 | ENODEV: no preferred target available for the host | ||
| 2360 | |||
| 2361 | This queries KVM for preferred CPU target type which can be emulated | ||
| 2362 | by KVM on underlying host. | ||
| 2363 | |||
| 2364 | The ioctl returns struct kvm_vcpu_init instance containing information | ||
| 2365 | about preferred CPU target type and recommended features for it. The | ||
| 2366 | kvm_vcpu_init->features bitmap returned will have feature bits set if | ||
| 2367 | the preferred target recommends setting these features, but this is | ||
| 2368 | not mandatory. | ||
| 2369 | |||
| 2370 | The information returned by this ioctl can be used to prepare an instance | ||
| 2371 | of struct kvm_vcpu_init for KVM_ARM_VCPU_INIT ioctl which will result in | ||
| 2372 | in VCPU matching underlying host. | ||
| 2373 | |||
| 2374 | |||
| 2375 | 4.84 KVM_GET_REG_LIST | ||
| 2308 | 2376 | ||
| 2309 | Capability: basic | 2377 | Capability: basic |
| 2310 | Architectures: arm, arm64 | 2378 | Architectures: arm, arm64 |
| @@ -2323,8 +2391,7 @@ struct kvm_reg_list { · 12 unmodified lines | |||
| 2323 | This ioctl returns the guest registers that are supported for the | 2391 | This ioctl returns the guest registers that are supported for the |
| 2324 | KVM_GET_ONE_REG/KVM_SET_ONE_REG calls. | 2392 | KVM_GET_ONE_REG/KVM_SET_ONE_REG calls. |
| 2325 | 2393 | ||
| 2326 | 2394 | 4.85 KVM_ARM_SET_DEVICE_ADDR | |
| 2327 | 4.84 KVM_ARM_SET_DEVICE_ADDR | ||
| 2328 | 2395 | ||
| 2329 | Capability: KVM_CAP_ARM_SET_DEVICE_ADDR | 2396 | Capability: KVM_CAP_ARM_SET_DEVICE_ADDR |
| 2330 | Architectures: arm, arm64 | 2397 | Architectures: arm, arm64 |
| @@ -2362,7 +2429,7 @@ must be called after calling KVM_CREATE_IRQCHIP, but before calling · 31 unmodified lines | |||
| 2362 | KVM_RUN on any of the VCPUs. Calling this ioctl twice for any of the | 2429 | KVM_RUN on any of the VCPUs. Calling this ioctl twice for any of the |
| 2363 | base addresses will return -EEXIST. | 2430 | base addresses will return -EEXIST. |
| 2364 | 2431 | ||
| 2365 | 4.85 KVM_PPC_RTAS_DEFINE_TOKEN | 2432 | 4.86 KVM_PPC_RTAS_DEFINE_TOKEN |
| 2366 | 2433 | ||
| 2367 | Capability: KVM_CAP_PPC_RTAS | 2434 | Capability: KVM_CAP_PPC_RTAS |
| 2368 | Architectures: ppc | 2435 | Architectures: ppc |
| @@ -2661,6 +2728,77 @@ and usually define the validity of a groups of registers. (e.g. one bit · 292 unmodified lines | |||
| 2661 | }; | 2728 | }; |
| 2662 | 2729 | ||
| 2663 | 2730 | ||
| 2731 | 4.81 KVM_GET_EMULATED_CPUID | ||
| 2732 | |||
| 2733 | Capability: KVM_CAP_EXT_EMUL_CPUID | ||
| 2734 | Architectures: x86 | ||
| 2735 | Type: system ioctl | ||
| 2736 | Parameters: struct kvm_cpuid2 (in/out) | ||
| 2737 | Returns: 0 on success, -1 on error | ||
| 2738 | |||
| 2739 | struct kvm_cpuid2 { | ||
| 2740 | __u32 nent; | ||
| 2741 | __u32 flags; | ||
| 2742 | struct kvm_cpuid_entry2 entries[0]; | ||
| 2743 | }; | ||
| 2744 | |||
| 2745 | The member 'flags' is used for passing flags from userspace. | ||
| 2746 | |||
| 2747 | #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0) | ||
| 2748 | #define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1) | ||
| 2749 | #define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2) | ||
| 2750 | |||
| 2751 | struct kvm_cpuid_entry2 { | ||
| 2752 | __u32 function; | ||
| 2753 | __u32 index; | ||
| 2754 | __u32 flags; | ||
| 2755 | __u32 eax; | ||
| 2756 | __u32 ebx; | ||
| 2757 | __u32 ecx; | ||
| 2758 | __u32 edx; | ||
| 2759 | __u32 padding[3]; | ||
| 2760 | }; | ||
| 2761 | |||
| 2762 | This ioctl returns x86 cpuid features which are emulated by | ||
| 2763 | kvm.Userspace can use the information returned by this ioctl to query | ||
| 2764 | which features are emulated by kvm instead of being present natively. | ||
| 2765 | |||
| 2766 | Userspace invokes KVM_GET_EMULATED_CPUID by passing a kvm_cpuid2 | ||
| 2767 | structure with the 'nent' field indicating the number of entries in | ||
| 2768 | the variable-size array 'entries'. If the number of entries is too low | ||
| 2769 | to describe the cpu capabilities, an error (E2BIG) is returned. If the | ||
| 2770 | number is too high, the 'nent' field is adjusted and an error (ENOMEM) | ||
| 2771 | is returned. If the number is just right, the 'nent' field is adjusted | ||
| 2772 | to the number of valid entries in the 'entries' array, which is then | ||
| 2773 | filled. | ||
| 2774 | |||
| 2775 | The entries returned are the set CPUID bits of the respective features | ||
| 2776 | which kvm emulates, as returned by the CPUID instruction, with unknown | ||
| 2777 | or unsupported feature bits cleared. | ||
| 2778 | |||
| 2779 | Features like x2apic, for example, may not be present in the host cpu | ||
| 2780 | but are exposed by kvm in KVM_GET_SUPPORTED_CPUID because they can be | ||
| 2781 | emulated efficiently and thus not included here. | ||
| 2782 | |||
| 2783 | The fields in each entry are defined as follows: | ||
| 2784 | |||
| 2785 | function: the eax value used to obtain the entry | ||
| 2786 | index: the ecx value used to obtain the entry (for entries that are | ||
| 2787 | affected by ecx) | ||
| 2788 | flags: an OR of zero or more of the following: | ||
| 2789 | KVM_CPUID_FLAG_SIGNIFCANT_INDEX: | ||
| 2790 | if the index field is valid | ||
| 2791 | KVM_CPUID_FLAG_STATEFUL_FUNC: | ||
| 2792 | if cpuid for this function returns different values for successive | ||
| 2793 | invocations; there will be several entries with the same function, | ||
| 2794 | all with this flag set | ||
| 2795 | KVM_CPUID_FLAG_STATE_READ_NEXT: | ||
| 2796 | for KVM_CPUID_FLAG_STATEFUL_FUNC entries, set if this entry is | ||
| 2797 | the first entry to be read by a cpu | ||
| 2798 | eax, ebx, ecx, edx: the values returned by the cpuid instruction for | ||
| 2799 | this function/index combination | ||
| 2800 | |||
| 2801 | |||
| 2664 | 6. Capabilities that can be enabled | 2802 | 6. Capabilities that can be enabled |
| 2665 | ----------------------------------- | 2803 | ----------------------------------- |
| 2666 | 2804 | ||
| @@ -43,6 +43,13 @@ KVM_FEATURE_CLOCKSOURCE2 || 3 || kvmclock available at msrs · 42 unmodified lines | |||
| 43 | KVM_FEATURE_ASYNC_PF || 4 || async pf can be enabled by | 43 | KVM_FEATURE_ASYNC_PF || 4 || async pf can be enabled by |
| 44 | || || writing to msr 0x4b564d02 | 44 | || || writing to msr 0x4b564d02 |
| 45 | ------------------------------------------------------------------------------ | 45 | ------------------------------------------------------------------------------ |
| 46 | KVM_FEATURE_STEAL_TIME || 5 || steal time can be enabled by | ||
| 47 | || || writing to msr 0x4b564d03. | ||
| 48 | ------------------------------------------------------------------------------ | ||
| 49 | KVM_FEATURE_PV_EOI || 6 || paravirtualized end of interrupt | ||
| 50 | || || handler can be enabled by writing | ||
| 51 | || || to msr 0x4b564d04. | ||
| 52 | ------------------------------------------------------------------------------ | ||
| 46 | KVM_FEATURE_PV_UNHALT || 7 || guest checks this feature bit | 53 | KVM_FEATURE_PV_UNHALT || 7 || guest checks this feature bit |
| 47 | || || before enabling paravirtualized | 54 | || || before enabling paravirtualized |
| 48 | || || spinlock support. | 55 | || || spinlock support. |
| @@ -0,0 +1,22 @@ | |||
| 1 | VFIO virtual device | ||
| 2 | =================== | ||
| 3 | |||
| 4 | Device types supported: | ||
| 5 | KVM_DEV_TYPE_VFIO | ||
| 6 | |||
| 7 | Only one VFIO instance may be created per VM. The created device | ||
| 8 | tracks VFIO groups in use by the VM and features of those groups | ||
| 9 | important to the correctness and acceleration of the VM. As groups | ||
| 10 | are enabled and disabled for use by the VM, KVM should be updated | ||
| 11 | about their presence. When registered with KVM, a reference to the | ||
| 12 | VFIO-group is held by KVM. | ||
| 13 | |||
| 14 | Groups: | ||
| 15 | KVM_DEV_VFIO_GROUP | ||
| 16 | |||
| 17 | KVM_DEV_VFIO_GROUP attributes: | ||
| 18 | KVM_DEV_VFIO_GROUP_ADD: Add a VFIO group to VFIO-KVM device tracking | ||
| 19 | KVM_DEV_VFIO_GROUP_DEL: Remove a VFIO group from VFIO-KVM device tracking | ||
| 20 | |||
| 21 | For each, kvm_device_attr.addr points to an int32_t file descriptor | ||
| 22 | for the VFIO group. | ||
| @@ -132,10 +132,14 @@ See the comments in spte_has_volatile_bits() and mmu_spte_update(). · 131 unmodified lines | |||
| 132 | ------------ | 132 | ------------ |
| 133 | 133 | ||
| 134 | Name: kvm_lock | 134 | Name: kvm_lock |
| 135 | Type: raw_spinlock | 135 | Type: spinlock_t |
| 136 | Arch: any | 136 | Arch: any |
| 137 | Protects: - vm_list | 137 | Protects: - vm_list |
| 138 | - hardware virtualization enable/disable | 138 | |
| 139 | Name: kvm_count_lock | ||
| 140 | Type: raw_spinlock_t | ||
| 141 | Arch: any | ||
| 142 | Protects: - hardware virtualization enable/disable | ||
| 139 | Comment: 'raw' because hardware enabling/disabling must be atomic /wrt | 143 | Comment: 'raw' because hardware enabling/disabling must be atomic /wrt |
| 140 | migration. | 144 | migration. |
| 141 | 145 | ||
| @@ -151,3 +155,14 @@ Type: spinlock_t · 9 unmodified lines | |||
| 151 | Arch: any | 155 | Arch: any |
| 152 | Protects: -shadow page/shadow tlb entry | 156 | Protects: -shadow page/shadow tlb entry |
| 153 | Comment: it is a spinlock since it is used in mmu notifier. | 157 | Comment: it is a spinlock since it is used in mmu notifier. |
| 158 | |||
| 159 | Name: kvm->srcu | ||
| 160 | Type: srcu lock | ||
| 161 | Arch: any | ||
| 162 | Protects: - kvm->memslots | ||
| 163 | - kvm->buses | ||
| 164 | Comment: The srcu read lock must be held while accessing memslots (e.g. | ||
| 165 | when using gfn_to_* functions) and while accessing in-kernel | ||
| 166 | MMIO/PIO address->device structure mapping (kvm->buses). | ||
| 167 | The srcu index can be stored in kvm_vcpu->srcu_idx per vcpu | ||
| 168 | if it is needed by multiple functions. | ||
| @@ -4,10 +4,12 @@ active_mm.txt · 3 unmodified lines | |||
| 4 | - An explanation from Linus about tsk->active_mm vs tsk->mm. | 4 | - An explanation from Linus about tsk->active_mm vs tsk->mm. |
| 5 | balance | 5 | balance |
| 6 | - various information on memory balancing. | 6 | - various information on memory balancing. |
| 7 | hugepage-mmap.c | 7 | cleancache.txt |
| 8 | - Example app using huge page memory with the mmap system call. | 8 | - Intro to cleancache and page-granularity victim cache. |
| 9 | hugepage-shm.c | 9 | frontswap.txt |
| 10 | - Example app using huge page memory with Sys V shared memory system calls. | 10 | - Outline frontswap, part of the transcendent memory frontend. |
| 11 | highmem.txt | ||
| 12 | - Outline of highmem and common issues. | ||
| 11 | hugetlbpage.txt | 13 | hugetlbpage.txt |
| 12 | - a brief summary of hugetlbpage support in the Linux kernel. | 14 | - a brief summary of hugetlbpage support in the Linux kernel. |
| 13 | hwpoison.txt | 15 | hwpoison.txt |
| @@ -16,21 +18,23 @@ ksm.txt · 2 unmodified lines | |||
| 16 | - how to use the Kernel Samepage Merging feature. | 18 | - how to use the Kernel Samepage Merging feature. |
| 17 | locking | 19 | locking |
| 18 | - info on how locking and synchronization is done in the Linux vm code. | 20 | - info on how locking and synchronization is done in the Linux vm code. |
| 19 | map_hugetlb.c | ||
| 20 | - an example program that uses the MAP_HUGETLB mmap flag. | ||
| 21 | numa | 21 | numa |
| 22 | - information about NUMA specific code in the Linux vm. | 22 | - information about NUMA specific code in the Linux vm. |
| 23 | numa_memory_policy.txt | 23 | numa_memory_policy.txt |
| 24 | - documentation of concepts and APIs of the 2.6 memory policy support. | 24 | - documentation of concepts and APIs of the 2.6 memory policy support. |
| 25 | overcommit-accounting | 25 | overcommit-accounting |
| 26 | - description of the Linux kernels overcommit handling modes. | 26 | - description of the Linux kernels overcommit handling modes. |
| 27 | page-types.c | ||
| 28 | - Tool for querying page flags | ||
| 29 | page_migration | 27 | page_migration |
| 30 | - description of page migration in NUMA systems. | 28 | - description of page migration in NUMA systems. |
| 31 | pagemap.txt | 29 | pagemap.txt |
| 32 | - pagemap, from the userspace perspective | 30 | - pagemap, from the userspace perspective |
| 33 | slub.txt | 31 | slub.txt |
| 34 | - a short users guide for SLUB. | 32 | - a short users guide for SLUB. |
| 33 | soft-dirty.txt | ||
| 34 | - short explanation for soft-dirty PTEs | ||
| 35 | transhuge.txt | ||
| 36 | - Transparent Hugepage Support, alternative way of using hugepages. | ||
| 35 | unevictable-lru.txt | 37 | unevictable-lru.txt |
| 36 | - Unevictable LRU infrastructure | 38 | - Unevictable LRU infrastructure |
| 39 | zswap.txt | ||
| 40 | - Intro to compressed cache for swap pages | ||
| @@ -0,0 +1,94 @@ | |||
| 1 | Split page table lock | ||
| 2 | ===================== | ||
| 3 | |||
| 4 | Originally, mm->page_table_lock spinlock protected all page tables of the | ||
| 5 | mm_struct. But this approach leads to poor page fault scalability of | ||
| 6 | multi-threaded applications due high contention on the lock. To improve | ||
| 7 | scalability, split page table lock was introduced. | ||
| 8 | |||
| 9 | With split page table lock we have separate per-table lock to serialize | ||
| 10 | access to the table. At the moment we use split lock for PTE and PMD | ||
| 11 | tables. Access to higher level tables protected by mm->page_table_lock. | ||
| 12 | |||
| 13 | There are helpers to lock/unlock a table and other accessor functions: | ||
| 14 | - pte_offset_map_lock() | ||
| 15 | maps pte and takes PTE table lock, returns pointer to the taken | ||
| 16 | lock; | ||
| 17 | - pte_unmap_unlock() | ||
| 18 | unlocks and unmaps PTE table; | ||
| 19 | - pte_alloc_map_lock() | ||
| 20 | allocates PTE table if needed and take the lock, returns pointer | ||
| 21 | to taken lock or NULL if allocation failed; | ||
| 22 | - pte_lockptr() | ||
| 23 | returns pointer to PTE table lock; | ||
| 24 | - pmd_lock() | ||
| 25 | takes PMD table lock, returns pointer to taken lock; | ||
| 26 | - pmd_lockptr() | ||
| 27 | returns pointer to PMD table lock; | ||
| 28 | |||
| 29 | Split page table lock for PTE tables is enabled compile-time if | ||
| 30 | CONFIG_SPLIT_PTLOCK_CPUS (usually 4) is less or equal to NR_CPUS. | ||
| 31 | If split lock is disabled, all tables guaded by mm->page_table_lock. | ||
| 32 | |||
| 33 | Split page table lock for PMD tables is enabled, if it's enabled for PTE | ||
| 34 | tables and the architecture supports it (see below). | ||
| 35 | |||
| 36 | Hugetlb and split page table lock | ||
| 37 | --------------------------------- | ||
| 38 | |||
| 39 | Hugetlb can support several page sizes. We use split lock only for PMD | ||
| 40 | level, but not for PUD. | ||
| 41 | |||
| 42 | Hugetlb-specific helpers: | ||
| 43 | - huge_pte_lock() | ||
| 44 | takes pmd split lock for PMD_SIZE page, mm->page_table_lock | ||
| 45 | otherwise; | ||
| 46 | - huge_pte_lockptr() | ||
| 47 | returns pointer to table lock; | ||
| 48 | |||
| 49 | Support of split page table lock by an architecture | ||
| 50 | --------------------------------------------------- | ||
| 51 | |||
| 52 | There's no need in special enabling of PTE split page table lock: | ||
| 53 | everything required is done by pgtable_page_ctor() and pgtable_page_dtor(), | ||
| 54 | which must be called on PTE table allocation / freeing. | ||
| 55 | |||
| 56 | Make sure the architecture doesn't use slab allocator for page table | ||
| 57 | allocation: slab uses page->slab_cache and page->first_page for its pages. | ||
| 58 | These fields share storage with page->ptl. | ||
| 59 | |||
| 60 | PMD split lock only makes sense if you have more than two page table | ||
| 61 | levels. | ||
| 62 | |||
| 63 | PMD split lock enabling requires pgtable_pmd_page_ctor() call on PMD table | ||
| 64 | allocation and pgtable_pmd_page_dtor() on freeing. | ||
| 65 | |||
| 66 | Allocation usually happens in pmd_alloc_one(), freeing in pmd_free() and | ||
| 67 | pmd_free_tlb(), but make sure you cover all PMD table allocation / freeing | ||
| 68 | paths: i.e X86_PAE preallocate few PMDs on pgd_alloc(). | ||
| 69 | |||
| 70 | With everything in place you can set CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK. | ||
| 71 | |||
| 72 | NOTE: pgtable_page_ctor() and pgtable_pmd_page_ctor() can fail -- it must | ||
| 73 | be handled properly. | ||
| 74 | |||
| 75 | page->ptl | ||
| 76 | --------- | ||
| 77 | |||
| 78 | page->ptl is used to access split page table lock, where 'page' is struct | ||
| 79 | page of page containing the table. It shares storage with page->private | ||
| 80 | (and few other fields in union). | ||
| 81 | |||
| 82 | To avoid increasing size of struct page and have best performance, we use a | ||
| 83 | trick: | ||
| 84 | - if spinlock_t fits into long, we use page->ptr as spinlock, so we | ||
| 85 | can avoid indirect access and save a cache line. | ||
| 86 | - if size of spinlock_t is bigger then size of long, we use page->ptl as | ||
| 87 | pointer to spinlock_t and allocate it dynamically. This allows to use | ||
| 88 | split lock with enabled DEBUG_SPINLOCK or DEBUG_LOCK_ALLOC, but costs | ||
| 89 | one more cache line for indirect access; | ||
| 90 | |||
| 91 | The spinlock_t allocated in pgtable_page_ctor() for PTE table and in | ||
| 92 | pgtable_pmd_page_ctor() for PMD table. | ||
| 93 | |||
| 94 | Please, never access page->ptl directly -- use appropriate helper. | ||
| @@ -8,7 +8,7 @@ significant performance improvement if reads from the compressed cache are · 7 unmodified lines | |||
| 8 | faster than reads from a swap device. | 8 | faster than reads from a swap device. |
| 9 | 9 | ||
| 10 | NOTE: Zswap is a new feature as of v3.11 and interacts heavily with memory | 10 | NOTE: Zswap is a new feature as of v3.11 and interacts heavily with memory |
| 11 | reclaim. This interaction has not be fully explored on the large set of | 11 | reclaim. This interaction has not been fully explored on the large set of |
| 12 | potential configurations and workloads that exist. For this reason, zswap | 12 | potential configurations and workloads that exist. For this reason, zswap |
| 13 | is a work in progress and should be considered experimental. | 13 | is a work in progress and should be considered experimental. |
| 14 | 14 | ||
| @@ -23,7 +23,7 @@ Some potential benefits: · 8 unmodified lines | |||
| 23 | drastically reducing life-shortening writes. | 23 | drastically reducing life-shortening writes. |
| 24 | 24 | ||
| 25 | Zswap evicts pages from compressed cache on an LRU basis to the backing swap | 25 | Zswap evicts pages from compressed cache on an LRU basis to the backing swap |
| 26 | device when the compressed pool reaches it size limit. This requirement had | 26 | device when the compressed pool reaches its size limit. This requirement had |
| 27 | been identified in prior community discussions. | 27 | been identified in prior community discussions. |
| 28 | 28 | ||
| 29 | To enabled zswap, the "enabled" attribute must be set to 1 at boot time. e.g. | 29 | To enabled zswap, the "enabled" attribute must be set to 1 at boot time. e.g. |
| @@ -37,7 +37,7 @@ the backing swap device in the case that the compressed pool is full. · 7 unmodified lines | |||
| 37 | 37 | ||
| 38 | Zswap makes use of zbud for the managing the compressed memory pool. Each | 38 | Zswap makes use of zbud for the managing the compressed memory pool. Each |
| 39 | allocation in zbud is not directly accessible by address. Rather, a handle is | 39 | allocation in zbud is not directly accessible by address. Rather, a handle is |
| 40 | return by the allocation routine and that handle must be mapped before being | 40 | returned by the allocation routine and that handle must be mapped before being |
| 41 | accessed. The compressed memory pool grows on demand and shrinks as compressed | 41 | accessed. The compressed memory pool grows on demand and shrinks as compressed |
| 42 | pages are freed. The pool is not preallocated. | 42 | pages are freed. The pool is not preallocated. |
| 43 | 43 | ||
| @@ -56,7 +56,7 @@ in the swap_map goes to 0) the swap code calls the zswap invalidate function, · 12 unmodified lines | |||
| 56 | via frontswap, to free the compressed entry. | 56 | via frontswap, to free the compressed entry. |
| 57 | 57 | ||
| 58 | Zswap seeks to be simple in its policies. Sysfs attributes allow for one user | 58 | Zswap seeks to be simple in its policies. Sysfs attributes allow for one user |
| 59 | controlled policies: | 59 | controlled policy: |
| 60 | * max_pool_percent - The maximum percentage of memory that the compressed | 60 | * max_pool_percent - The maximum percentage of memory that the compressed |
| 61 | pool can occupy. | 61 | pool can occupy. |
| 62 | 62 | ||
| @@ -237,11 +237,11 @@ F: drivers/platform/x86/acer-wmi.c · 236 unmodified lines | |||
| 237 | 237 | ||
| 238 | ACPI | 238 | ACPI |
| 239 | M: Len Brown <lenb@kernel.org> | 239 | M: Len Brown <lenb@kernel.org> |
| 240 | M: Rafael J. Wysocki <rjw@sisk.pl> | 240 | M: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 241 | L: linux-acpi@vger.kernel.org | 241 | L: linux-acpi@vger.kernel.org |
| 242 | W: http://www.lesswatts.org/projects/acpi/ | 242 | W: https://01.org/linux-acpi |
| 243 | Q: http://patchwork.kernel.org/project/linux-acpi/list/ | 243 | Q: https://patchwork.kernel.org/project/linux-acpi/list/ |
| 244 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux | 244 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm |
| 245 | S: Supported | 245 | S: Supported |
| 246 | F: drivers/acpi/ | 246 | F: drivers/acpi/ |
| 247 | F: drivers/pnp/pnpacpi/ | 247 | F: drivers/pnp/pnpacpi/ |
| @@ -253,24 +253,38 @@ F: drivers/pci/*acpi* · 5 unmodified lines | |||
| 253 | F: drivers/pci/*/*acpi* | 253 | F: drivers/pci/*/*acpi* |
| 254 | F: drivers/pci/*/*/*acpi* | 254 | F: drivers/pci/*/*/*acpi* |
| 255 | 255 | ||
| 256 | ACPI COMPONENT ARCHITECTURE (ACPICA) | ||
| 257 | M: Robert Moore <robert.moore@intel.com> | ||
| 258 | M: Lv Zheng <lv.zheng@intel.com> | ||
| 259 | M: Rafael J. Wysocki <rafael.j.wysocki@intel.com> | ||
| 260 | L: linux-acpi@vger.kernel.org | ||
| 261 | L: devel@acpica.org | ||
| 262 | W: https://acpica.org/ | ||
| 263 | W: https://github.com/acpica/acpica/ | ||
| 264 | Q: https://patchwork.kernel.org/project/linux-acpi/list/ | ||
| 265 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm | ||
| 266 | S: Supported | ||
| 267 | F: drivers/acpi/acpica/ | ||
| 268 | F: include/acpi/ | ||
| 269 | |||
| 256 | ACPI FAN DRIVER | 270 | ACPI FAN DRIVER |
| 257 | M: Zhang Rui <rui.zhang@intel.com> | 271 | M: Zhang Rui <rui.zhang@intel.com> |
| 258 | L: linux-acpi@vger.kernel.org | 272 | L: linux-acpi@vger.kernel.org |
| 259 | W: http://www.lesswatts.org/projects/acpi/ | 273 | W: https://01.org/linux-acpi |
| 260 | S: Supported | 274 | S: Supported |
| 261 | F: drivers/acpi/fan.c | 275 | F: drivers/acpi/fan.c |
| 262 | 276 | ||
| 263 | ACPI THERMAL DRIVER | 277 | ACPI THERMAL DRIVER |
| 264 | M: Zhang Rui <rui.zhang@intel.com> | 278 | M: Zhang Rui <rui.zhang@intel.com> |
| 265 | L: linux-acpi@vger.kernel.org | 279 | L: linux-acpi@vger.kernel.org |
| 266 | W: http://www.lesswatts.org/projects/acpi/ | 280 | W: https://01.org/linux-acpi |
| 267 | S: Supported | 281 | S: Supported |
| 268 | F: drivers/acpi/*thermal* | 282 | F: drivers/acpi/*thermal* |
| 269 | 283 | ||
| 270 | ACPI VIDEO DRIVER | 284 | ACPI VIDEO DRIVER |
| 271 | M: Zhang Rui <rui.zhang@intel.com> | 285 | M: Zhang Rui <rui.zhang@intel.com> |
| 272 | L: linux-acpi@vger.kernel.org | 286 | L: linux-acpi@vger.kernel.org |
| 273 | W: http://www.lesswatts.org/projects/acpi/ | 287 | W: https://01.org/linux-acpi |
| 274 | S: Supported | 288 | S: Supported |
| 275 | F: drivers/acpi/video.c | 289 | F: drivers/acpi/video.c |
| 276 | 290 | ||
| @@ -763,6 +777,10 @@ W: http://maxim.org.za/at91_26.html · 486 unmodified lines | |||
| 763 | W: http://www.linux4sam.org | 777 | W: http://www.linux4sam.org |
| 764 | S: Supported | 778 | S: Supported |
| 765 | F: arch/arm/mach-at91/ | 779 | F: arch/arm/mach-at91/ |
| 780 | F: arch/arm/boot/dts/at91*.dts | ||
| 781 | F: arch/arm/boot/dts/at91*.dtsi | ||
| 782 | F: arch/arm/boot/dts/sama*.dts | ||
| 783 | F: arch/arm/boot/dts/sama*.dtsi | ||
| 766 | 784 | ||
| 767 | ARM/CALXEDA HIGHBANK ARCHITECTURE | 785 | ARM/CALXEDA HIGHBANK ARCHITECTURE |
| 768 | M: Rob Herring <rob.herring@calxeda.com> | 786 | M: Rob Herring <rob.herring@calxeda.com> |
| @@ -824,15 +842,21 @@ S: Maintained · 55 unmodified lines | |||
| 824 | F: arch/arm/mach-gemini/ | 842 | F: arch/arm/mach-gemini/ |
| 825 | 843 | ||
| 826 | ARM/CSR SIRFPRIMA2 MACHINE SUPPORT | 844 | ARM/CSR SIRFPRIMA2 MACHINE SUPPORT |
| 827 | M: Barry Song <baohua.song@csr.com> | 845 | M: Barry Song <baohua@kernel.org> |
| 828 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 846 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 829 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git | 847 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux.git |
| 830 | S: Maintained | 848 | S: Maintained |
| 831 | F: arch/arm/mach-prima2/ | 849 | F: arch/arm/mach-prima2/ |
| 850 | F: drivers/clk/clk-prima2.c | ||
| 851 | F: drivers/clocksource/timer-prima2.c | ||
| 852 | F: drivers/clocksource/timer-marco.c | ||
| 832 | F: drivers/dma/sirf-dma.c | 853 | F: drivers/dma/sirf-dma.c |
| 833 | F: drivers/i2c/busses/i2c-sirf.c | 854 | F: drivers/i2c/busses/i2c-sirf.c |
| 855 | F: drivers/input/misc/sirfsoc-onkey.c | ||
| 856 | F: drivers/irqchip/irq-sirfsoc.c | ||
| 834 | F: drivers/mmc/host/sdhci-sirf.c | 857 | F: drivers/mmc/host/sdhci-sirf.c |
| 835 | F: drivers/pinctrl/sirf/ | 858 | F: drivers/pinctrl/sirf/ |
| 859 | F: drivers/rtc/rtc-sirfsoc.c | ||
| 836 | F: drivers/spi/spi-sirf.c | 860 | F: drivers/spi/spi-sirf.c |
| 837 | 861 | ||
| 838 | ARM/EBSA110 MACHINE SUPPORT | 862 | ARM/EBSA110 MACHINE SUPPORT |
| @@ -923,7 +947,7 @@ M: Javier Martinez Canillas <javier@dowhile0.org> · 84 unmodified lines | |||
| 923 | L: linux-omap@vger.kernel.org | 947 | L: linux-omap@vger.kernel.org |
| 924 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 948 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 925 | S: Maintained | 949 | S: Maintained |
| 926 | F: arch/arm/mach-omap2/board-igep0020.c | 950 | F: arch/arm/boot/dts/omap3-igep* |
| 927 | 951 | ||
| 928 | ARM/INCOME PXA270 SUPPORT | 952 | ARM/INCOME PXA270 SUPPORT |
| 929 | M: Marek Vasut <marek.vasut@gmail.com> | 953 | M: Marek Vasut <marek.vasut@gmail.com> |
| @@ -1003,6 +1027,7 @@ ARM/Marvell Armada 370 and Armada XP SOC support · 73 unmodified lines | |||
| 1003 | M: Jason Cooper <jason@lakedaemon.net> | 1027 | M: Jason Cooper <jason@lakedaemon.net> |
| 1004 | M: Andrew Lunn <andrew@lunn.ch> | 1028 | M: Andrew Lunn <andrew@lunn.ch> |
| 1005 | M: Gregory Clement <gregory.clement@free-electrons.com> | 1029 | M: Gregory Clement <gregory.clement@free-electrons.com> |
| 1030 | M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | ||
| 1006 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 1031 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1007 | S: Maintained | 1032 | S: Maintained |
| 1008 | F: arch/arm/mach-mvebu/ | 1033 | F: arch/arm/mach-mvebu/ |
| @@ -1010,6 +1035,7 @@ F: arch/arm/mach-mvebu/ · 1 unmodified line | |||
| 1010 | ARM/Marvell Dove/Kirkwood/MV78xx0/Orion SOC support | 1035 | ARM/Marvell Dove/Kirkwood/MV78xx0/Orion SOC support |
| 1011 | M: Jason Cooper <jason@lakedaemon.net> | 1036 | M: Jason Cooper <jason@lakedaemon.net> |
| 1012 | M: Andrew Lunn <andrew@lunn.ch> | 1037 | M: Andrew Lunn <andrew@lunn.ch> |
| 1038 | M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | ||
| 1013 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 1039 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1014 | S: Maintained | 1040 | S: Maintained |
| 1015 | F: arch/arm/mach-dove/ | 1041 | F: arch/arm/mach-dove/ |
| @@ -1044,7 +1070,6 @@ S: Maintained · 28 unmodified lines | |||
| 1044 | ARM/NOMADIK ARCHITECTURE | 1070 | ARM/NOMADIK ARCHITECTURE |
| 1045 | M: Alessandro Rubini <rubini@unipv.it> | 1071 | M: Alessandro Rubini <rubini@unipv.it> |
| 1046 | M: Linus Walleij <linus.walleij@linaro.org> | 1072 | M: Linus Walleij <linus.walleij@linaro.org> |
| 1047 | M: STEricsson <STEricsson_nomadik_linux@list.st.com> | ||
| 1048 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) | 1073 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1049 | S: Maintained | 1074 | S: Maintained |
| 1050 | F: arch/arm/mach-nomadik/ | 1075 | F: arch/arm/mach-nomadik/ |
| @@ -1142,10 +1167,12 @@ F: drivers/net/ethernet/i825xx/ether1* · 91 unmodified lines | |||
| 1142 | F: drivers/net/ethernet/seeq/ether3* | 1167 | F: drivers/net/ethernet/seeq/ether3* |
| 1143 | F: drivers/scsi/arm/ | 1168 | F: drivers/scsi/arm/ |
| 1144 | 1169 | ||
| 1145 | ARM/SHARK MACHINE SUPPORT | 1170 | ARM/Rockchip SoC support |
| 1146 | M: Alexander Schulz <alex@shark-linux.de> | 1171 | M: Heiko Stuebner <heiko@sntech.de> |
| 1147 | W: http://www.shark-linux.de/shark.html | 1172 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1148 | S: Maintained | 1173 | S: Maintained |
| 1174 | F: arch/arm/mach-rockchip/ | ||
| 1175 | F: drivers/*/*rockchip* | ||
| 1149 | 1176 | ||
| 1150 | ARM/SAMSUNG ARM ARCHITECTURES | 1177 | ARM/SAMSUNG ARM ARCHITECTURES |
| 1151 | M: Ben Dooks <ben-linux@fluff.org> | 1178 | M: Ben Dooks <ben-linux@fluff.org> |
| @@ -1154,6 +1181,8 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 2 unmodified lines | |||
| 1154 | L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) | 1181 | L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) |
| 1155 | W: http://www.fluff.org/ben/linux/ | 1182 | W: http://www.fluff.org/ben/linux/ |
| 1156 | S: Maintained | 1183 | S: Maintained |
| 1184 | F: arch/arm/boot/dts/s3c* | ||
| 1185 | F: arch/arm/boot/dts/exynos* | ||
| 1157 | F: arch/arm/plat-samsung/ | 1186 | F: arch/arm/plat-samsung/ |
| 1158 | F: arch/arm/mach-s3c24*/ | 1187 | F: arch/arm/mach-s3c24*/ |
| 1159 | F: arch/arm/mach-s3c64xx/ | 1188 | F: arch/arm/mach-s3c64xx/ |
| @@ -1396,7 +1425,7 @@ M: Wolfram Sang <wsa@the-dreams.de> · 236 unmodified lines | |||
| 1396 | L: linux-i2c@vger.kernel.org | 1425 | L: linux-i2c@vger.kernel.org |
| 1397 | S: Maintained | 1426 | S: Maintained |
| 1398 | F: drivers/misc/eeprom/at24.c | 1427 | F: drivers/misc/eeprom/at24.c |
| 1399 | F: include/linux/i2c/at24.h | 1428 | F: include/linux/platform_data/at24.h |
| 1400 | 1429 | ||
| 1401 | ATA OVER ETHERNET (AOE) DRIVER | 1430 | ATA OVER ETHERNET (AOE) DRIVER |
| 1402 | M: "Ed L. Cashin" <ecashin@coraid.com> | 1431 | M: "Ed L. Cashin" <ecashin@coraid.com> |
| @@ -1645,16 +1674,15 @@ S: Maintained · 242 unmodified lines | |||
| 1645 | F: drivers/net/wireless/b43legacy/ | 1674 | F: drivers/net/wireless/b43legacy/ |
| 1646 | 1675 | ||
| 1647 | BACKLIGHT CLASS/SUBSYSTEM | 1676 | BACKLIGHT CLASS/SUBSYSTEM |
| 1648 | M: Richard Purdie <rpurdie@rpsys.net> | ||
| 1649 | M: Jingoo Han <jg1.han@samsung.com> | 1677 | M: Jingoo Han <jg1.han@samsung.com> |
| 1650 | S: Maintained | 1678 | S: Maintained |
| 1651 | F: drivers/video/backlight/ | 1679 | F: drivers/video/backlight/ |
| 1652 | F: include/linux/backlight.h | 1680 | F: include/linux/backlight.h |
| 1653 | 1681 | ||
| 1654 | BATMAN ADVANCED | 1682 | BATMAN ADVANCED |
| 1655 | M: Marek Lindner <lindner_marek@yahoo.de> | 1683 | M: Marek Lindner <mareklindner@neomailbox.ch> |
| 1656 | M: Simon Wunderlich <siwu@hrz.tu-chemnitz.de> | 1684 | M: Simon Wunderlich <sw@simonwunderlich.de> |
| 1657 | M: Antonio Quartulli <ordex@autistici.org> | 1685 | M: Antonio Quartulli <antonio@meshcoding.com> |
| 1658 | L: b.a.t.m.a.n@lists.open-mesh.org | 1686 | L: b.a.t.m.a.n@lists.open-mesh.org |
| 1659 | W: http://www.open-mesh.org/ | 1687 | W: http://www.open-mesh.org/ |
| 1660 | S: Maintained | 1688 | S: Maintained |
| @@ -1785,6 +1813,7 @@ F: include/net/bluetooth/ · 124 unmodified lines | |||
| 1785 | 1813 | ||
| 1786 | BONDING DRIVER | 1814 | BONDING DRIVER |
| 1787 | M: Jay Vosburgh <fubar@us.ibm.com> | 1815 | M: Jay Vosburgh <fubar@us.ibm.com> |
| 1816 | M: Veaceslav Falico <vfalico@redhat.com> | ||
| 1788 | M: Andy Gospodarek <andy@greyhouse.net> | 1817 | M: Andy Gospodarek <andy@greyhouse.net> |
| 1789 | L: netdev@vger.kernel.org | 1818 | L: netdev@vger.kernel.org |
| 1790 | W: http://sourceforge.net/projects/bonding/ | 1819 | W: http://sourceforge.net/projects/bonding/ |
| @@ -1806,13 +1835,14 @@ F: drivers/net/ethernet/broadcom/bnx2.* · 15 unmodified lines | |||
| 1806 | F: drivers/net/ethernet/broadcom/bnx2_* | 1835 | F: drivers/net/ethernet/broadcom/bnx2_* |
| 1807 | 1836 | ||
| 1808 | BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER | 1837 | BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER |
| 1809 | M: Eilon Greenstein <eilong@broadcom.com> | 1838 | M: Ariel Elior <ariele@broadcom.com> |
| 1810 | L: netdev@vger.kernel.org | 1839 | L: netdev@vger.kernel.org |
| 1811 | S: Supported | 1840 | S: Supported |
| 1812 | F: drivers/net/ethernet/broadcom/bnx2x/ | 1841 | F: drivers/net/ethernet/broadcom/bnx2x/ |
| 1813 | 1842 | ||
| 1814 | BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE | 1843 | BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE |
| 1815 | M: Christian Daudt <csd@broadcom.com> | 1844 | M: Christian Daudt <bcm@fixthebug.org> |
| 1845 | L: bcm-kernel-feedback-list@broadcom.com | ||
| 1816 | T: git git://git.github.com/broadcom/bcm11351 | 1846 | T: git git://git.github.com/broadcom/bcm11351 |
| 1817 | S: Maintained | 1847 | S: Maintained |
| 1818 | F: arch/arm/mach-bcm/ | 1848 | F: arch/arm/mach-bcm/ |
| @@ -1850,7 +1880,7 @@ S: Supported · 31 unmodified lines | |||
| 1850 | F: drivers/net/wireless/brcm80211/ | 1880 | F: drivers/net/wireless/brcm80211/ |
| 1851 | 1881 | ||
| 1852 | BROADCOM BNX2FC 10 GIGABIT FCOE DRIVER | 1882 | BROADCOM BNX2FC 10 GIGABIT FCOE DRIVER |
| 1853 | M: Bhanu Prakash Gollapudi <bprakash@broadcom.com> | 1883 | M: Eddie Wai <eddie.wai@broadcom.com> |
| 1854 | L: linux-scsi@vger.kernel.org | 1884 | L: linux-scsi@vger.kernel.org |
| 1855 | S: Supported | 1885 | S: Supported |
| 1856 | F: drivers/scsi/bnx2fc/ | 1886 | F: drivers/scsi/bnx2fc/ |
| @@ -2293,7 +2323,7 @@ S: Maintained · 436 unmodified lines | |||
| 2293 | F: drivers/net/ethernet/ti/cpmac.c | 2323 | F: drivers/net/ethernet/ti/cpmac.c |
| 2294 | 2324 | ||
| 2295 | CPU FREQUENCY DRIVERS | 2325 | CPU FREQUENCY DRIVERS |
| 2296 | M: Rafael J. Wysocki <rjw@sisk.pl> | 2326 | M: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 2297 | M: Viresh Kumar <viresh.kumar@linaro.org> | 2327 | M: Viresh Kumar <viresh.kumar@linaro.org> |
| 2298 | L: cpufreq@vger.kernel.org | 2328 | L: cpufreq@vger.kernel.org |
| 2299 | L: linux-pm@vger.kernel.org | 2329 | L: linux-pm@vger.kernel.org |
| @@ -2324,7 +2354,7 @@ S: Maintained · 24 unmodified lines | |||
| 2324 | F: drivers/cpuidle/cpuidle-big_little.c | 2354 | F: drivers/cpuidle/cpuidle-big_little.c |
| 2325 | 2355 | ||
| 2326 | CPUIDLE DRIVERS | 2356 | CPUIDLE DRIVERS |
| 2327 | M: Rafael J. Wysocki <rjw@sisk.pl> | 2357 | M: Rafael J. Wysocki <rjw@rjwysocki.net> |
| 2328 | M: Daniel Lezcano <daniel.lezcano@linaro.org> | 2358 | M: Daniel Lezcano <daniel.lezcano@linaro.org> |
| 2329 | L: linux-pm@vger.kernel.org | 2359 | L: linux-pm@vger.kernel.org |
| 2330 | S: Maintained | 2360 | S: Maintained |
| @@ -2355,7 +2385,7 @@ F: kernel/cpuset.c · 24 unmodified lines | |||
| 2355 | 2385 | ||
| 2356 | CRAMFS FILESYSTEM | 2386 | CRAMFS FILESYSTEM |
| 2357 | W: http://sourceforge.net/projects/cramfs/ | 2387 | W: http://sourceforge.net/projects/cramfs/ |
| 2358 | S: Orphan | 2388 | S: Orphan / Obsolete |
| 2359 | F: Documentation/filesystems/cramfs.txt | 2389 | F: Documentation/filesystems/cramfs.txt |
| 2360 | F: fs/cramfs/ | 2390 | F: fs/cramfs/ |
| 2361 | 2391 | ||
| @@ -2438,7 +2468,7 @@ S: Maintained · 76 unmodified lines | |||
| 2438 | F: drivers/media/dvb-frontends/cxd2820r* | 2468 | F: drivers/media/dvb-frontends/cxd2820r* |
| 2439 | 2469 | ||
| 2440 | CXGB3 ETHERNET DRIVER (CXGB3) | 2470 | CXGB3 ETHERNET DRIVER (CXGB3) |
| 2441 | M: Divy Le Ray <divy@chelsio.com> | 2471 | M: Santosh Raspatur <santosh@chelsio.com> |
| 2442 | L: netdev@vger.kernel.org | 2472 | L: netdev@vger.kernel.org |
| 2443 | W: http://www.chelsio.com | 2473 | W: http://www.chelsio.com |
| 2444 | S: Supported | 2474 | S: Supported |
| @@ -2630,6 +2660,7 @@ M: dm-devel@redhat.com · 185 unmodified lines | |||
| 2630 | L: dm-devel@redhat.com | 2660 | L: dm-devel@redhat.com |
| 2631 | W: http://sources.redhat.com/dm | 2661 | W: http://sources.redhat.com/dm |
| 2632 | Q: http://patchwork.kernel.org/project/dm-devel/list/ | 2662 | Q: http://patchwork.kernel.org/project/dm-devel/list/ |
| 2663 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm.git | ||
| 2633 | T: quilt http://people.redhat.com/agk/patches/linux/editing/ | 2664 | T: quilt http://people.redhat.com/agk/patches/linux/editing/ |
| 2634 | S: Maintained | 2665 | S: Maintained |
| 2635 | F: Documentation/device-mapper/ | 2666 | F: Documentation/device-mapper/ |
| @@ -2639,6 +2670,18 @@ F: include/linux/device-mapper.h · 3 unmodified lines | |||
| 2639 | F: include/linux/dm-*.h | 2670 | F: include/linux/dm-*.h |
| 2640 | F: include/uapi/linux/dm-*.h | 2671 | F: include/uapi/linux/dm-*.h |
| 2641 | 2672 | ||
| 2673 | DIGI NEO AND CLASSIC PCI PRODUCTS | ||
| 2674 | M: Lidza Louina <lidza.louina@gmail.com> | ||
| 2675 | L: driverdev-devel@linuxdriverproject.org | ||
| 2676 | S: Maintained | ||
| 2677 | F: drivers/staging/dgnc/ | ||
| 2678 | |||
| 2679 | DIGI EPCA PCI PRODUCTS | ||
| 2680 | M: Lidza Louina <lidza.louina@gmail.com> | ||
| 2681 | L: driverdev-devel@linuxdriverproject.org | ||
| 2682 | S: Maintained | ||
| 2683 | F: drivers/staging/dgap/ | ||
| 2684 | |||
| 2642 | DIOLAN U2C-12 I2C DRIVER | 2685 | DIOLAN U2C-12 I2C DRIVER |
| 2643 | M: Guenter Roeck <linux@roeck-us.net> | 2686 | M: Guenter Roeck <linux@roeck-us.net> |
| 2644 | L: linux-i2c@vger.kernel.org | 2687 | L: linux-i2c@vger.kernel.org |
| @@ -2699,6 +2742,8 @@ T: git git://git.linaro.org/people/sumitsemwal/linux-dma-buf.git · 54 unmodified lines | |||
| 2699 | DMA GENERIC OFFLOAD ENGINE SUBSYSTEM | 2742 | DMA GENERIC OFFLOAD ENGINE SUBSYSTEM |
| 2700 | M: Vinod Koul <vinod.koul@intel.com> | 2743 | M: Vinod Koul <vinod.koul@intel.com> |
| 2701 | M: Dan Williams <dan.j.williams@intel.com> | 2744 | M: Dan Williams <dan.j.williams@intel.com> |
| 2745 | L: dmaengine@vger.kernel.org | ||
| 2746 | Q: https://patchwork.kernel.org/project/linux-dmaengine/list/ | ||
| 2702 | S: Supported | 2747 | S: Supported |
| 2703 | F: drivers/dma/ | 2748 | F: drivers/dma/ |
| 2704 | F: include/linux/dma* | 2749 | F: include/linux/dma* |
| @@ -2802,8 +2847,10 @@ M: Terje Bergström <tbergstrom@nvidia.com> · 97 unmodified lines | |||
| 2802 | L: dri-devel@lists.freedesktop.org | 2847 | L: dri-devel@lists.freedesktop.org |
| 2803 | L: linux-tegra@vger.kernel.org | 2848 | L: linux-tegra@vger.kernel.org |
| 2804 | T: git git://anongit.freedesktop.org/tegra/linux.git | 2849 | T: git git://anongit.freedesktop.org/tegra/linux.git |
| 2805 | S: Maintained | 2850 | S: Supported |
| 2851 | F: drivers/gpu/drm/tegra/ | ||
| 2806 | F: drivers/gpu/host1x/ | 2852 | F: drivers/gpu/host1x/ |
| 2853 | F: include/linux/host1x.h | ||
| 2807 | F: include/uapi/drm/tegra_drm.h | 2854 | F: include/uapi/drm/tegra_drm.h |
| 2808 | F: Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt | 2855 | F: Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt |
| 2809 | 2856 | ||
| @@ -3016,6 +3063,14 @@ W: bluesmoke.sourceforge.net · 206 unmodified lines | |||
| 3016 | S: Maintained | 3063 | S: Maintained |
| 3017 | F: drivers/edac/amd64_edac* | 3064 | F: drivers/edac/amd64_edac* |
| 3018 | 3065 | ||
| 3066 | EDAC-CALXEDA | ||
| 3067 | M: Doug Thompson <dougthompson@xmission.com> | ||
| 3068 | M: Robert Richter <rric@kernel.org> | ||
| 3069 | L: linux-edac@vger.kernel.org | ||
| 3070 | W: bluesmoke.sourceforge.net | ||
| 3071 | S: Maintained | ||
| 3072 | F: drivers/edac/highbank* | ||
| 3073 | |||
| 3019 | EDAC-CAVIUM | 3074 | EDAC-CAVIUM |
| 3020 | M: Ralf Baechle <ralf@linux-mips.org> | 3075 | M: Ralf Baechle <ralf@linux-mips.org> |
| 3021 | M: David Daney <david.daney@cavium.com> | 3076 | M: David Daney <david.daney@cavium.com> |
| @@ -3097,6 +3152,13 @@ W: bluesmoke.sourceforge.net · 75 unmodified lines | |||
| 3097 | S: Maintained | 3152 | S: Maintained |
| 3098 | F: drivers/edac/i82975x_edac.c | 3153 | F: drivers/edac/i82975x_edac.c |
| 3099 | 3154 | ||
| 3155 | EDAC-MPC85XX | ||
| 3156 | M: Johannes Thumshirn <johannes.thumshirn@men.de> | ||
| 3157 | L: linux-edac@vger.kernel.org | ||
| 3158 | W: bluesmoke.sourceforge.net | ||
| 3159 | S: Maintained | ||
| 3160 | F: drivers/edac/mpc85xx_edac.[ch] | ||
| 3161 | |||
| 3100 | EDAC-PASEMI | 3162 | EDAC-PASEMI |
| 3101 | M: Egor Martovetsky <egor@pasemi.com> | 3163 | M: Egor Martovetsky <egor@pasemi.com> |
| 3102 | L: linux-edac@vger.kernel.org | 3164 | L: linux-edac@vger.kernel.org |
| @@ -3534,7 +3596,7 @@ F: fs/freevxfs/ · 431 unmodified lines | |||
| 3534 | 3596 | ||
| 3535 | FREEZER | 3597 | FREEZER |
| 3536 | M: Pavel Machek <pavel@ucw.cz> | 3598 | M: Pavel Machek <pavel@ucw.cz> |
| 3537 | M: "Rafael J. Wysocki" <rjw@sisk.pl> | 3599 | M: "Rafael J. Wysocki" <rjw@rjwysocki.net> |
| 3538 | L: linux-pm@vger.kernel.org | 3600 | L: linux-pm@vger.kernel.org |
| 3539 | S: Supported | 3601 | S: Supported |
| 3540 | F: Documentation/power/freezing-of-tasks.txt | 3602 | F: Documentation/power/freezing-of-tasks.txt |
| @@ -3605,6 +3667,12 @@ L: linux-scsi@vger.kernel.org · 64 unmodified lines | |||
| 3605 | S: Odd Fixes (e.g., new signatures) | 3667 | S: Odd Fixes (e.g., new signatures) |
| 3606 | F: drivers/scsi/fdomain.* | 3668 | F: drivers/scsi/fdomain.* |
| 3607 | 3669 | ||
| 3670 | GCOV BASED KERNEL PROFILING | ||
| 3671 | M: Peter Oberparleiter <oberpar@linux.vnet.ibm.com> | ||
| 3672 | S: Maintained | ||
| 3673 | F: kernel/gcov/ | ||
| 3674 | F: Documentation/gcov.txt | ||
| 3675 | |||
| 3608 | GDT SCSI DISK ARRAY CONTROLLER DRIVER | 3676 | GDT SCSI DISK ARRAY CONTROLLER DRIVER |
| 3609 | M: Achim Leubner <achim_leubner@adaptec.com> | 3677 | M: Achim Leubner <achim_leubner@adaptec.com> |
| 3610 | L: linux-scsi@vger.kernel.org | 3678 | L: linux-scsi@vger.kernel.org |
| @@ -3654,6 +3722,14 @@ S: Maintained · 43 unmodified lines | |||
| 3654 | F: include/asm-generic/ | 3722 | F: include/asm-generic/ |
| 3655 | F: include/uapi/asm-generic/ | 3723 | F: include/uapi/asm-generic/ |
| 3656 | 3724 | ||
| 3725 | GENERIC PHY FRAMEWORK | ||
| 3726 | M: Kishon Vijay Abraham I <kishon@ti.com> | ||
| 3727 | L: linux-kernel@vger.kernel.org | ||
| 3728 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git | ||
| 3729 | S: Supported | ||
| 3730 | F: drivers/phy/ | ||
| 3731 | F: include/linux/phy/ | ||
| 3732 | |||
| 3657 | GENERIC UIO DRIVER FOR PCI DEVICES | 3733 | GENERIC UIO DRIVER FOR PCI DEVICES |
| 3658 | M: "Michael S. Tsirkin" <mst@redhat.com> | 3734 | M: "Michael S. Tsirkin" <mst@redhat.com> |
| 3659 | L: kvm@vger.kernel.org | 3735 | L: kvm@vger.kernel.org |
| @@ -3870,7 +3946,7 @@ F: drivers/video/hgafb.c · 210 unmodified lines | |||
| 3870 | 3946 | ||
| 3871 | HIBERNATION (aka Software Suspend, aka swsusp) | 3947 | HIBERNATION (aka Software Suspend, aka swsusp) |
| 3872 | M: Pavel Machek <pavel@ucw.cz> | 3948 | M: Pavel Machek <pavel@ucw.cz> |
| 3873 | M: "Rafael J. Wysocki" <rjw@sisk.pl> | 3949 | M: "Rafael J. Wysocki" <rjw@rjwysocki.net> |
| 3874 | L: linux-pm@vger.kernel.org | 3950 | L: linux-pm@vger.kernel.org |
| 3875 | S: Supported | 3951 | S: Supported |
| 3876 | F: arch/x86/power/ | 3952 | F: arch/x86/power/ |
| @@ -3989,6 +4065,7 @@ F: arch/x86/include/uapi/asm/hyperv.h · 112 unmodified lines | |||
| 3989 | F: arch/x86/kernel/cpu/mshyperv.c | 4065 | F: arch/x86/kernel/cpu/mshyperv.c |
| 3990 | F: drivers/hid/hid-hyperv.c | 4066 | F: drivers/hid/hid-hyperv.c |
| 3991 | F: drivers/hv/ | 4067 | F: drivers/hv/ |
| 4068 | F: drivers/input/serio/hyperv-keyboard.c | ||
| 3992 | F: drivers/net/hyperv/ | 4069 | F: drivers/net/hyperv/ |
| 3993 | F: drivers/scsi/storvsc_drv.c | 4070 | F: drivers/scsi/storvsc_drv.c |
| 3994 | F: drivers/video/hyperv_fb.c | 4071 | F: drivers/video/hyperv_fb.c |
| @@ -4195,7 +4272,7 @@ S: Maintained · 200 unmodified lines | |||
| 4195 | F: drivers/media/rc/iguanair.c | 4272 | F: drivers/media/rc/iguanair.c |
| 4196 | 4273 | ||
| 4197 | IIO SUBSYSTEM AND DRIVERS | 4274 | IIO SUBSYSTEM AND DRIVERS |
| 4198 | M: Jonathan Cameron <jic23@cam.ac.uk> | 4275 | M: Jonathan Cameron <jic23@kernel.org> |
| 4199 | L: linux-iio@vger.kernel.org | 4276 | L: linux-iio@vger.kernel.org |
| 4200 | S: Maintained | 4277 | S: Maintained |
| 4201 | F: drivers/iio/ | 4278 | F: drivers/iio/ |
| @@ -4320,7 +4397,7 @@ F: drivers/video/i810/ · 118 unmodified lines | |||
| 4320 | INTEL MENLOW THERMAL DRIVER | 4397 | INTEL MENLOW THERMAL DRIVER |
| 4321 | M: Sujith Thomas <sujith.thomas@intel.com> | 4398 | M: Sujith Thomas <sujith.thomas@intel.com> |
| 4322 | L: platform-driver-x86@vger.kernel.org | 4399 | L: platform-driver-x86@vger.kernel.org |
| 4323 | W: http://www.lesswatts.org/projects/acpi/ | 4400 | W: https://01.org/linux-acpi |
| 4324 | S: Supported | 4401 | S: Supported |
| 4325 | F: drivers/platform/x86/intel_menlow.c | 4402 | F: drivers/platform/x86/intel_menlow.c |
| 4326 | 4403 | ||
| @@ -4332,7 +4409,10 @@ F: arch/x86/kernel/microcode_intel.c · 5 unmodified lines | |||
| 4332 | 4409 | ||
| 4333 | INTEL I/OAT DMA DRIVER | 4410 | INTEL I/OAT DMA DRIVER |
| 4334 | M: Dan Williams <dan.j.williams@intel.com> | 4411 | M: Dan Williams <dan.j.williams@intel.com> |
| 4335 | S: Maintained | 4412 | M: Dave Jiang <dave.jiang@intel.com> |
| 4413 | L: dmaengine@vger.kernel.org | ||
| 4414 | Q: https://patchwork.kernel.org/project/linux-dmaengine/list/ | ||
| 4415 | S: Supported | ||
| 4336 | F: drivers/dma/ioat* | 4416 | F: drivers/dma/ioat* |
| 4337 | 4417 | ||
| 4338 | INTEL IOMMU (VT-d) | 4418 | INTEL IOMMU (VT-d) |
| @@ -4391,6 +4471,12 @@ F: Documentation/networking/ixgbevf.txt · 52 unmodified lines | |||
| 4391 | F: Documentation/networking/i40e.txt | 4471 | F: Documentation/networking/i40e.txt |
| 4392 | F: drivers/net/ethernet/intel/ | 4472 | F: drivers/net/ethernet/intel/ |
| 4393 | 4473 | ||
| 4474 | INTEL-MID GPIO DRIVER | ||
| 4475 | M: David Cohen <david.a.cohen@linux.intel.com> | ||
| 4476 | L: linux-gpio@vger.kernel.org | ||
| 4477 | S: Maintained | ||
| 4478 | F: drivers/gpio/gpio-intel-mid.c | ||
| 4479 | |||
| 4394 | INTEL PRO/WIRELESS 2100, 2200BG, 2915ABG NETWORK CONNECTION SUPPORT | 4480 | INTEL PRO/WIRELESS 2100, 2200BG, 2915ABG NETWORK CONNECTION SUPPORT |
| 4395 | M: Stanislav Yakovlev <stas.yakovlev@gmail.com> | 4481 | M: Stanislav Yakovlev <stas.yakovlev@gmail.com> |
| 4396 | L: linux-wireless@vger.kernel.org | 4482 | L: linux-wireless@vger.kernel.org |
| @@ -4457,6 +4543,13 @@ L: linux-serial@vger.kernel.org · 60 unmodified lines | |||
| 4457 | S: Maintained | 4543 | S: Maintained |
| 4458 | F: drivers/tty/serial/ioc3_serial.c | 4544 | F: drivers/tty/serial/ioc3_serial.c |
| 4459 | 4545 | ||
| 4546 | IOMMU DRIVERS | ||
| 4547 | M: Joerg Roedel <joro@8bytes.org> | ||
| 4548 | L: iommu@lists.linux-foundation.org | ||
| 4549 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git | ||
| 4550 | S: Maintained | ||
| 4551 | F: drivers/iommu/ | ||
| 4552 | |||
| 4460 | IP MASQUERADING | 4553 | IP MASQUERADING |
| 4461 | M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar> | 4554 | M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar> |
| 4462 | S: Maintained | 4555 | S: Maintained |
| @@ -4722,10 +4815,18 @@ S: Maintained · 259 unmodified lines | |||
| 4722 | F: Documentation/hwmon/k8temp | 4815 | F: Documentation/hwmon/k8temp |
| 4723 | F: drivers/hwmon/k8temp.c | 4816 | F: drivers/hwmon/k8temp.c |
| 4724 | 4817 | ||
| 4818 | KTAP | ||
| 4819 | M: Jovi Zhangwei <jovi.zhangwei@gmail.com> | ||
| 4820 | W: http://www.ktap.org | ||
| 4821 | L: ktap@freelists.org | ||
| 4822 | S: Maintained | ||
| 4823 | F: drivers/staging/ktap/ | ||
| 4824 | |||
| 4725 | KCONFIG | 4825 | KCONFIG |
| 4726 | M: Michal Marek <mmarek@suse.cz> | 4826 | M: "Yann E. MORIN" <yann.morin.1998@free.fr> |
| 4727 | L: linux-kbuild@vger.kernel.org | 4827 | L: linux-kbuild@vger.kernel.org |
| 4728 | S: Odd Fixes | 4828 | T: git://gitorious.org/linux-kconfig/linux-kconfig |
| 4829 | S: Maintained | ||
| 4729 | F: Documentation/kbuild/kconfig-language.txt | 4830 | F: Documentation/kbuild/kconfig-language.txt |
| 4730 | F: scripts/kconfig/ | 4831 | F: scripts/kconfig/ |
| 4731 | 4832 | ||
| @@ -4788,7 +4889,8 @@ KERNEL VIRTUAL MACHINE (KVM) · 56 unmodified lines | |||
| 4788 | M: Gleb Natapov <gleb@redhat.com> | 4889 | M: Gleb Natapov <gleb@redhat.com> |
| 4789 | M: Paolo Bonzini <pbonzini@redhat.com> | 4890 | M: Paolo Bonzini <pbonzini@redhat.com> |
| 4790 | L: kvm@vger.kernel.org | 4891 | L: kvm@vger.kernel.org |
| 4791 | W: http://linux-kvm.org | 4892 | W: http://www.linux-kvm.org |
| 4893 | T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git | ||
| 4792 | S: Supported | 4894 | S: Supported |
| 4793 | F: Documentation/*/kvm*.txt | 4895 | F: Documentation/*/kvm*.txt |
| 4794 | F: Documentation/virtual/kvm/ | 4896 | F: Documentation/virtual/kvm/ |
| @@ -5128,6 +5230,7 @@ M: Jean Delvare <khali@linux-fr.org> · 333 unmodified lines | |||
| 5128 | L: lm-sensors@lm-sensors.org | 5230 | L: lm-sensors@lm-sensors.org |
| 5129 | S: Maintained | 5231 | S: Maintained |
| 5130 | F: Documentation/hwmon/lm90 | 5232 | F: Documentation/hwmon/lm90 |
| 5233 | F: Documentation/devicetree/bindings/hwmon/lm90.txt | ||
| 5131 | F: drivers/hwmon/lm90.c | 5234 | F: drivers/hwmon/lm90.c |
| 5132 | 5235 | ||
| 5133 | LM95234 HARDWARE MONITOR DRIVER | 5236 | LM95234 HARDWARE MONITOR DRIVER |
| @@ -5306,7 +5409,7 @@ S: Orphan · 172 unmodified lines | |||
| 5306 | F: drivers/net/wireless/libertas/ | 5409 | F: drivers/net/wireless/libertas/ |
| 5307 | 5410 | ||
| 5308 | MARVELL MV643XX ETHERNET DRIVER | 5411 | MARVELL MV643XX ETHERNET DRIVER |
| 5309 | M: Lennert Buytenhek <buytenh@wantstofly.org> | 5412 | M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> |
| 5310 | L: netdev@vger.kernel.org | 5413 | L: netdev@vger.kernel.org |
| 5311 | S: Maintained | 5414 | S: Maintained |
| 5312 | F: drivers/net/ethernet/marvell/mv643xx_eth.* | 5415 | F: drivers/net/ethernet/marvell/mv643xx_eth.* |
| @@ -6062,6 +6165,12 @@ L: linux-omap@vger.kernel.org · 749 unmodified lines | |||
| 6062 | S: Maintained | 6165 | S: Maintained |
| 6063 | F: drivers/gpio/gpio-omap.c | 6166 | F: drivers/gpio/gpio-omap.c |
| 6064 | 6167 | ||
| 6168 | OMAP/NEWFLOW NANOBONE MACHINE SUPPORT | ||
| 6169 | M: Mark Jackson <mpfj@newflow.co.uk> | ||
| 6170 | L: linux-omap@vger.kernel.org | ||
| 6171 | S: Maintained | ||
| 6172 | F: arch/arm/boot/dts/am335x-nano.dts | ||
| 6173 | |||
| 6065 | OMFS FILESYSTEM | 6174 | OMFS FILESYSTEM |
| 6066 | M: Bob Copeland <me@bobcopeland.com> | 6175 | M: Bob Copeland <me@bobcopeland.com> |
| 6067 | L: linux-karma-devel@lists.sourceforge.net | 6176 | L: linux-karma-devel@lists.sourceforge.net |
| @@ -6338,6 +6447,7 @@ S: Supported · 270 unmodified lines | |||
| 6338 | F: Documentation/PCI/ | 6447 | F: Documentation/PCI/ |
| 6339 | F: drivers/pci/ | 6448 | F: drivers/pci/ |
| 6340 | F: include/linux/pci* | 6449 | F: include/linux/pci* |
| 6450 | F: arch/x86/pci/ | ||
| 6341 | 6451 | ||
| 6342 | PCI DRIVER FOR NVIDIA TEGRA | 6452 | PCI DRIVER FOR NVIDIA TEGRA |
| 6343 | M: Thierry Reding <thierry.reding@gmail.com> | 6453 | M: Thierry Reding <thierry.reding@gmail.com> |
| @@ -6346,6 +6456,12 @@ S: Supported · 2 unmodified lines | |||
| 6346 | F: Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 6456 | F: Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt |
| 6347 | F: drivers/pci/host/pci-tegra.c | 6457 | F: drivers/pci/host/pci-tegra.c |
| 6348 | 6458 | ||
| 6459 | PCI DRIVER FOR SAMSUNG EXYNOS | ||
| 6460 | M: Jingoo Han <jg1.han@samsung.com> | ||
| 6461 | L: linux-pci@vger.kernel.org | ||
| 6462 | S: Maintained | ||
| 6463 | F: drivers/pci/host/pci-exynos.c | ||
| 6464 | |||
| 6349 | PCMCIA SUBSYSTEM | 6465 | PCMCIA SUBSYSTEM |
| 6350 | P: Linux PCMCIA Team | 6466 | P: Linux PCMCIA Team |
| 6351 | L: linux-pcmcia@lists.infradead.org | 6467 | L: linux-pcmcia@lists.infradead.org |
| @@ -6595,7 +6711,7 @@ S: Obsolete · 243 unmodified lines | |||
| 6595 | F: drivers/net/wireless/prism54/ | 6711 | F: drivers/net/wireless/prism54/ |
| 6596 | 6712 | ||
| 6597 | PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER | 6713 | PROMISE SATA TX2/TX4 CONTROLLER LIBATA DRIVER |
| 6598 | M: Mikael Pettersson <mikpe@it.uu.se> | 6714 | M: Mikael Pettersson <mikpelinux@gmail.com> |
| 6599 | L: linux-ide@vger.kernel.org | 6715 | L: linux-ide@vger.kernel.org |
| 6600 | S: Maintained | 6716 | S: Maintained |
| 6601 | F: drivers/ata/sata_promise.* | 6717 | F: drivers/ata/sata_promise.* |
| @@ -6684,8 +6800,7 @@ PWM SUBSYSTEM · 82 unmodified lines | |||
| 6684 | M: Thierry Reding <thierry.reding@gmail.com> | 6800 | M: Thierry Reding <thierry.reding@gmail.com> |
| 6685 | L: linux-pwm@vger.kernel.org | 6801 | L: linux-pwm@vger.kernel.org |
| 6686 | S: Maintained | 6802 | S: Maintained |
| 6687 | W: http://gitorious.org/linux-pwm | 6803 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git |
| 6688 | T: git git://gitorious.org/linux-pwm/linux-pwm.git | ||
| 6689 | F: Documentation/pwm.txt | 6804 | F: Documentation/pwm.txt |
| 6690 | F: Documentation/devicetree/bindings/pwm/ | 6805 | F: Documentation/devicetree/bindings/pwm/ |
| 6691 | F: include/linux/pwm.h | 6806 | F: include/linux/pwm.h |
| @@ -6816,6 +6931,14 @@ L: linux-hexagon@vger.kernel.org · 124 unmodified lines | |||
| 6816 | S: Supported | 6931 | S: Supported |
| 6817 | F: arch/hexagon/ | 6932 | F: arch/hexagon/ |
| 6818 | 6933 | ||
| 6934 | QUALCOMM WCN36XX WIRELESS DRIVER | ||
| 6935 | M: Eugene Krasnikov <k.eugene.e@gmail.com> | ||
| 6936 | L: wcn36xx@lists.infradead.org | ||
| 6937 | W: http://wireless.kernel.org/en/users/Drivers/wcn36xx | ||
| 6938 | T: git git://github.com/KrasnikovEugene/wcn36xx.git | ||
| 6939 | S: Supported | ||
| 6940 | F: drivers/net/wireless/ath/wcn36xx/ | ||
| 6941 | |||
| 6819 | QUICKCAM PARALLEL PORT WEBCAMS | 6942 | QUICKCAM PARALLEL PORT WEBCAMS |
| 6820 | M: Hans Verkuil <hverkuil@xs4all.nl> | 6943 | M: Hans Verkuil <hverkuil@xs4all.nl> |
| 6821 | L: linux-media@vger.kernel.org | 6944 | L: linux-media@vger.kernel.org |
| @@ -6903,7 +7026,7 @@ M: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> · 81 unmodified lines | |||
| 6903 | S: Supported | 7026 | S: Supported |
| 6904 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git | 7027 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git |
| 6905 | F: Documentation/RCU/torture.txt | 7028 | F: Documentation/RCU/torture.txt |
| 6906 | F: kernel/rcutorture.c | 7029 | F: kernel/rcu/torture.c |
| 6907 | 7030 | ||
| 6908 | RDC R-321X SoC | 7031 | RDC R-321X SoC |
| 6909 | M: Florian Fainelli <florian@openwrt.org> | 7032 | M: Florian Fainelli <florian@openwrt.org> |
| @@ -6930,8 +7053,9 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git · 20 unmodified lines | |||
| 6930 | F: Documentation/RCU/ | 7053 | F: Documentation/RCU/ |
| 6931 | X: Documentation/RCU/torture.txt | 7054 | X: Documentation/RCU/torture.txt |
| 6932 | F: include/linux/rcu* | 7055 | F: include/linux/rcu* |
| 6933 | F: kernel/rcu* | 7056 | X: include/linux/srcu.h |
| 6934 | X: kernel/rcutorture.c | 7057 | F: kernel/rcu/ |
| 7058 | X: kernel/rcu/torture.c | ||
| 6935 | 7059 | ||
| 6936 | REAL TIME CLOCK (RTC) SUBSYSTEM | 7060 | REAL TIME CLOCK (RTC) SUBSYSTEM |
| 6937 | M: Alessandro Zummo <a.zummo@towertech.it> | 7061 | M: Alessandro Zummo <a.zummo@towertech.it> |
| @@ -7244,7 +7368,7 @@ S: Odd Fixes · 306 unmodified lines | |||
| 7244 | F: drivers/media/usb/tlg2300/ | 7368 | F: drivers/media/usb/tlg2300/ |
| 7245 | 7369 | ||
| 7246 | SC1200 WDT DRIVER | 7370 | SC1200 WDT DRIVER |
| 7247 | M: Zwane Mwaikambo <zwane@arm.linux.org.uk> | 7371 | M: Zwane Mwaikambo <zwanem@gmail.com> |
| 7248 | S: Maintained | 7372 | S: Maintained |
| 7249 | F: drivers/watchdog/sc1200wdt.c | 7373 | F: drivers/watchdog/sc1200wdt.c |
| 7250 | 7374 | ||
| @@ -7256,11 +7380,13 @@ S: Maintained · 5 unmodified lines | |||
| 7256 | F: kernel/sched/ | 7380 | F: kernel/sched/ |
| 7257 | F: include/linux/sched.h | 7381 | F: include/linux/sched.h |
| 7258 | F: include/uapi/linux/sched.h | 7382 | F: include/uapi/linux/sched.h |
| 7383 | F: kernel/wait.c | ||
| 7384 | F: include/linux/wait.h | ||
| 7259 | 7385 | ||
| 7260 | SCORE ARCHITECTURE | 7386 | SCORE ARCHITECTURE |
| 7261 | M: Chen Liqin <liqin.chen@sunplusct.com> | 7387 | M: Chen Liqin <liqin.linux@gmail.com> |
| 7262 | M: Lennox Wu <lennox.wu@gmail.com> | 7388 | M: Lennox Wu <lennox.wu@gmail.com> |
| 7263 | W: http://www.sunplusct.com | 7389 | W: http://www.sunplus.com |
| 7264 | S: Supported | 7390 | S: Supported |
| 7265 | F: arch/score/ | 7391 | F: arch/score/ |
| 7266 | 7392 | ||
| @@ -7390,9 +7516,10 @@ SELINUX SECURITY MODULE · 123 unmodified lines | |||
| 7390 | M: Stephen Smalley <sds@tycho.nsa.gov> | 7516 | M: Stephen Smalley <sds@tycho.nsa.gov> |
| 7391 | M: James Morris <james.l.morris@oracle.com> | 7517 | M: James Morris <james.l.morris@oracle.com> |
| 7392 | M: Eric Paris <eparis@parisplace.org> | 7518 | M: Eric Paris <eparis@parisplace.org> |
| 7519 | M: Paul Moore <paul@paul-moore.com> | ||
| 7393 | L: selinux@tycho.nsa.gov (subscribers-only, general discussion) | 7520 | L: selinux@tycho.nsa.gov (subscribers-only, general discussion) |
| 7394 | W: http://selinuxproject.org | 7521 | W: http://selinuxproject.org |
| 7395 | T: git git://git.infradead.org/users/eparis/selinux.git | 7522 | T: git git://git.infradead.org/users/pcmoore/selinux |
| 7396 | S: Supported | 7523 | S: Supported |
| 7397 | F: include/linux/selinux* | 7524 | F: include/linux/selinux* |
| 7398 | F: security/selinux/ | 7525 | F: security/selinux/ |
| @@ -7618,8 +7745,8 @@ M: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> · 219 unmodified lines | |||
| 7618 | W: http://www.rdrop.com/users/paulmck/RCU/ | 7745 | W: http://www.rdrop.com/users/paulmck/RCU/ |
| 7619 | S: Supported | 7746 | S: Supported |
| 7620 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git | 7747 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git |
| 7621 | F: include/linux/srcu* | 7748 | F: include/linux/srcu.h |
| 7622 | F: kernel/srcu* | 7749 | F: kernel/rcu/srcu.c |
| 7623 | 7750 | ||
| 7624 | SMACK SECURITY MODULE | 7751 | SMACK SECURITY MODULE |
| 7625 | M: Casey Schaufler <casey@schaufler-ca.com> | 7752 | M: Casey Schaufler <casey@schaufler-ca.com> |
| @@ -7790,6 +7917,13 @@ F: Documentation/sound/alsa/soc/ · 164 unmodified lines | |||
| 7790 | F: sound/soc/ | 7917 | F: sound/soc/ |
| 7791 | F: include/sound/soc* | 7918 | F: include/sound/soc* |
| 7792 | 7919 | ||
| 7920 | SOUND - DMAENGINE HELPERS | ||
| 7921 | M: Lars-Peter Clausen <lars@metafoo.de> | ||
| 7922 | S: Supported | ||
| 7923 | F: include/sound/dmaengine_pcm.h | ||
| 7924 | F: sound/core/pcm_dmaengine.c | ||
| 7925 | F: sound/soc/soc-generic-dmaengine-pcm.c | ||
| 7926 | |||
| 7793 | SPARC + UltraSPARC (sparc/sparc64) | 7927 | SPARC + UltraSPARC (sparc/sparc64) |
| 7794 | M: "David S. Miller" <davem@davemloft.net> | 7928 | M: "David S. Miller" <davem@davemloft.net> |
| 7795 | L: sparclinux@vger.kernel.org | 7929 | L: sparclinux@vger.kernel.org |
| @@ -7947,7 +8081,7 @@ S: Maintained · 151 unmodified lines | |||
| 7947 | F: drivers/staging/media/go7007/ | 8081 | F: drivers/staging/media/go7007/ |
| 7948 | 8082 | ||
| 7949 | STAGING - INDUSTRIAL IO | 8083 | STAGING - INDUSTRIAL IO |
| 7950 | M: Jonathan Cameron <jic23@cam.ac.uk> | 8084 | M: Jonathan Cameron <jic23@kernel.org> |
| 7951 | L: linux-iio@vger.kernel.org | 8085 | L: linux-iio@vger.kernel.org |
| 7952 | S: Odd Fixes | 8086 | S: Odd Fixes |
| 7953 | F: drivers/staging/iio/ | 8087 | F: drivers/staging/iio/ |
| @@ -8069,7 +8203,7 @@ F: drivers/sh/ · 115 unmodified lines | |||
| 8069 | SUSPEND TO RAM | 8203 | SUSPEND TO RAM |
| 8070 | M: Len Brown <len.brown@intel.com> | 8204 | M: Len Brown <len.brown@intel.com> |
| 8071 | M: Pavel Machek <pavel@ucw.cz> | 8205 | M: Pavel Machek <pavel@ucw.cz> |
| 8072 | M: "Rafael J. Wysocki" <rjw@sisk.pl> | 8206 | M: "Rafael J. Wysocki" <rjw@rjwysocki.net> |
| 8073 | L: linux-pm@vger.kernel.org | 8207 | L: linux-pm@vger.kernel.org |
| 8074 | S: Supported | 8208 | S: Supported |
| 8075 | F: Documentation/power/ | 8209 | F: Documentation/power/ |
| @@ -8262,14 +8396,72 @@ L: linux-media@vger.kernel.org · 186 unmodified lines | |||
| 8262 | S: Maintained | 8396 | S: Maintained |
| 8263 | F: drivers/media/rc/ttusbir.c | 8397 | F: drivers/media/rc/ttusbir.c |
| 8264 | 8398 | ||
| 8265 | TEGRA SUPPORT | 8399 | TEGRA ARCHITECTURE SUPPORT |
| 8266 | M: Stephen Warren <swarren@wwwdotorg.org> | 8400 | M: Stephen Warren <swarren@wwwdotorg.org> |
| 8401 | M: Thierry Reding <thierry.reding@gmail.com> | ||
| 8267 | L: linux-tegra@vger.kernel.org | 8402 | L: linux-tegra@vger.kernel.org |
| 8268 | Q: http://patchwork.ozlabs.org/project/linux-tegra/list/ | 8403 | Q: http://patchwork.ozlabs.org/project/linux-tegra/list/ |
| 8269 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra.git | 8404 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra.git |
| 8270 | S: Supported | 8405 | S: Supported |
| 8271 | N: [^a-z]tegra | 8406 | N: [^a-z]tegra |
| 8272 | 8407 | ||
| 8408 | TEGRA ASOC DRIVER | ||
| 8409 | M: Stephen Warren <swarren@wwwdotorg.org> | ||
| 8410 | S: Supported | ||
| 8411 | F: sound/soc/tegra/ | ||
| 8412 | |||
| 8413 | TEGRA CLOCK DRIVER | ||
| 8414 | M: Peter De Schrijver <pdeschrijver@nvidia.com> | ||
| 8415 | M: Prashant Gaikwad <pgaikwad@nvidia.com> | ||
| 8416 | S: Supported | ||
| 8417 | F: drivers/clk/tegra/ | ||
| 8418 | |||
| 8419 | TEGRA DMA DRIVER | ||
| 8420 | M: Laxman Dewangan <ldewangan@nvidia.com> | ||
| 8421 | S: Supported | ||
| 8422 | F: drivers/dma/tegra20-apb-dma.c | ||
| 8423 | |||
| 8424 | TEGRA GPIO DRIVER | ||
| 8425 | M: Stephen Warren <swarren@wwwdotorg.org> | ||
| 8426 | S: Supported | ||
| 8427 | F: drivers/gpio/gpio-tegra.c | ||
| 8428 | |||
| 8429 | TEGRA I2C DRIVER | ||
| 8430 | M: Laxman Dewangan <ldewangan@nvidia.com> | ||
| 8431 | S: Supported | ||
| 8432 | F: drivers/i2c/busses/i2c-tegra.c | ||
| 8433 | |||
| 8434 | TEGRA IOMMU DRIVERS | ||
| 8435 | M: Hiroshi Doyu <hdoyu@nvidia.com> | ||
| 8436 | S: Supported | ||
| 8437 | F: drivers/iommu/tegra* | ||
| 8438 | |||
| 8439 | TEGRA KBC DRIVER | ||
| 8440 | M: Rakesh Iyer <riyer@nvidia.com> | ||
| 8441 | M: Laxman Dewangan <ldewangan@nvidia.com> | ||
| 8442 | S: Supported | ||
| 8443 | F: drivers/input/keyboard/tegra-kbc.c | ||
| 8444 | |||
| 8445 | TEGRA PINCTRL DRIVER | ||
| 8446 | M: Stephen Warren <swarren@wwwdotorg.org> | ||
| 8447 | S: Supported | ||
| 8448 | F: drivers/pinctrl/pinctrl-tegra* | ||
| 8449 | |||
| 8450 | TEGRA PWM DRIVER | ||
| 8451 | M: Thierry Reding <thierry.reding@gmail.com> | ||
| 8452 | S: Supported | ||
| 8453 | F: drivers/pwm/pwm-tegra.c | ||
| 8454 | |||
| 8455 | TEGRA SERIAL DRIVER | ||
| 8456 | M: Laxman Dewangan <ldewangan@nvidia.com> | ||
| 8457 | S: Supported | ||
| 8458 | F: drivers/tty/serial/serial-tegra.c | ||
| 8459 | |||
| 8460 | TEGRA SPI DRIVER | ||
| 8461 | M: Laxman Dewangan <ldewangan@nvidia.com> | ||
| 8462 | S: Supported | ||
| 8463 | F: drivers/spi/spi-tegra* | ||
| 8464 | |||
| 8273 | TEHUTI ETHERNET DRIVER | 8465 | TEHUTI ETHERNET DRIVER |
| 8274 | M: Andy Gospodarek <andy@greyhouse.net> | 8466 | M: Andy Gospodarek <andy@greyhouse.net> |
| 8275 | L: netdev@vger.kernel.org | 8467 | L: netdev@vger.kernel.org |
| @@ -8474,6 +8666,7 @@ F: drivers/media/usb/tm6000/ · 198 unmodified lines | |||
| 8474 | TPM DEVICE DRIVER | 8666 | TPM DEVICE DRIVER |
| 8475 | M: Leonidas Da Silva Barbosa <leosilva@linux.vnet.ibm.com> | 8667 | M: Leonidas Da Silva Barbosa <leosilva@linux.vnet.ibm.com> |
| 8476 | M: Ashley Lai <ashley@ashleylai.com> | 8668 | M: Ashley Lai <ashley@ashleylai.com> |
| 8669 | M: Peter Huewe <peterhuewe@gmx.de> | ||
| 8477 | M: Rajiv Andrade <mail@srajiv.net> | 8670 | M: Rajiv Andrade <mail@srajiv.net> |
| 8478 | W: http://tpmdd.sourceforge.net | 8671 | W: http://tpmdd.sourceforge.net |
| 8479 | M: Marcel Selhorst <tpmdd@selhorst.net> | 8672 | M: Marcel Selhorst <tpmdd@selhorst.net> |
| @@ -8570,14 +8763,6 @@ S: Maintained · 90 unmodified lines | |||
| 8570 | F: arch/m68k/*/*_no.* | 8763 | F: arch/m68k/*/*_no.* |
| 8571 | F: arch/m68k/include/asm/*_no.* | 8764 | F: arch/m68k/include/asm/*_no.* |
| 8572 | 8765 | ||
| 8573 | UCLINUX FOR RENESAS H8/300 (H8300) | ||
| 8574 | M: Yoshinori Sato <ysato@users.sourceforge.jp> | ||
| 8575 | W: http://uclinux-h8.sourceforge.jp/ | ||
| 8576 | S: Supported | ||
| 8577 | F: arch/h8300/ | ||
| 8578 | F: drivers/ide/ide-h8300.c | ||
| 8579 | F: drivers/net/ethernet/8390/ne-h8300.c | ||
| 8580 | |||
| 8581 | UDF FILESYSTEM | 8766 | UDF FILESYSTEM |
| 8582 | M: Jan Kara <jack@suse.cz> | 8767 | M: Jan Kara <jack@suse.cz> |
| 8583 | S: Maintained | 8768 | S: Maintained |
| @@ -8724,9 +8909,8 @@ F: Documentation/hid/hiddev.txt · 140 unmodified lines | |||
| 8724 | F: drivers/hid/usbhid/ | 8909 | F: drivers/hid/usbhid/ |
| 8725 | 8910 | ||
| 8726 | USB/IP DRIVERS | 8911 | USB/IP DRIVERS |
| 8727 | M: Matt Mooney <mfm@muteddisk.com> | ||
| 8728 | L: linux-usb@vger.kernel.org | 8912 | L: linux-usb@vger.kernel.org |
| 8729 | S: Maintained | 8913 | S: Orphan |
| 8730 | F: drivers/staging/usbip/ | 8914 | F: drivers/staging/usbip/ |
| 8731 | 8915 | ||
| 8732 | USB ISP116X DRIVER | 8916 | USB ISP116X DRIVER |
| @@ -8779,8 +8963,8 @@ USB PEGASUS DRIVER · 46 unmodified lines | |||
| 8779 | M: Petko Manolov <petkan@nucleusys.com> | 8963 | M: Petko Manolov <petkan@nucleusys.com> |
| 8780 | L: linux-usb@vger.kernel.org | 8964 | L: linux-usb@vger.kernel.org |
| 8781 | L: netdev@vger.kernel.org | 8965 | L: netdev@vger.kernel.org |
| 8782 | T: git git://git.code.sf.net/p/pegasus2/git | 8966 | T: git git://github.com/petkan/pegasus.git |
| 8783 | W: http://pegasus2.sourceforge.net/ | 8967 | W: https://github.com/petkan/pegasus |
| 8784 | S: Maintained | 8968 | S: Maintained |
| 8785 | F: drivers/net/usb/pegasus.* | 8969 | F: drivers/net/usb/pegasus.* |
| 8786 | 8970 | ||
| @@ -8801,66 +8985,19 @@ USB RTL8150 DRIVER · 14 unmodified lines | |||
| 8801 | M: Petko Manolov <petkan@nucleusys.com> | 8985 | M: Petko Manolov <petkan@nucleusys.com> |
| 8802 | L: linux-usb@vger.kernel.org | 8986 | L: linux-usb@vger.kernel.org |
| 8803 | L: netdev@vger.kernel.org | 8987 | L: netdev@vger.kernel.org |
| 8804 | T: git git://git.code.sf.net/p/pegasus2/git | 8988 | T: git git://github.com/petkan/rtl8150.git |
| 8805 | W: http://pegasus2.sourceforge.net/ | 8989 | W: https://github.com/petkan/rtl8150 |
| 8806 | S: Maintained | 8990 | S: Maintained |
| 8807 | F: drivers/net/usb/rtl8150.c | 8991 | F: drivers/net/usb/rtl8150.c |
| 8808 | 8992 | ||
| 8809 | USB SERIAL BELKIN F5U103 DRIVER | 8993 | USB SERIAL SUBSYSTEM |
| 8810 | M: William Greathouse <wgreathouse@smva.com> | 8994 | M: Johan Hovold <jhovold@gmail.com> |
| 8811 | L: linux-usb@vger.kernel.org | ||
| 8812 | S: Maintained | ||
| 8813 | F: drivers/usb/serial/belkin_sa.* | ||
| 8814 | |||
| 8815 | USB SERIAL CYPRESS M8 DRIVER | ||
| 8816 | M: Lonnie Mendez <dignome@gmail.com> | ||
| 8817 | L: linux-usb@vger.kernel.org | ||
| 8818 | S: Maintained | ||
| 8819 | W: http://geocities.com/i0xox0i | ||
| 8820 | W: http://firstlight.net/cvs | ||
| 8821 | F: drivers/usb/serial/cypress_m8.* | ||
| 8822 | |||
| 8823 | USB SERIAL CYBERJACK DRIVER | ||
| 8824 | M: Matthias Bruestle and Harald Welte <support@reiner-sct.com> | ||
| 8825 | W: http://www.reiner-sct.de/support/treiber_cyberjack.php | ||
| 8826 | S: Maintained | ||
| 8827 | F: drivers/usb/serial/cyberjack.c | ||
| 8828 | |||
| 8829 | USB SERIAL DIGI ACCELEPORT DRIVER | ||
| 8830 | M: Peter Berger <pberger@brimson.com> | ||
| 8831 | M: Al Borchers <alborchers@steinerpoint.com> | ||
| 8832 | L: linux-usb@vger.kernel.org | 8995 | L: linux-usb@vger.kernel.org |
| 8833 | S: Maintained | 8996 | S: Maintained |
| 8834 | F: drivers/usb/serial/digi_acceleport.c | ||
| 8835 | |||
| 8836 | USB SERIAL DRIVER | ||
| 8837 | M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | ||
| 8838 | L: linux-usb@vger.kernel.org | ||
| 8839 | S: Supported | ||
| 8840 | F: Documentation/usb/usb-serial.txt | 8997 | F: Documentation/usb/usb-serial.txt |
| 8841 | F: drivers/usb/serial/generic.c | 8998 | F: drivers/usb/serial/ |
| 8842 | F: drivers/usb/serial/usb-serial.c | ||
| 8843 | F: include/linux/usb/serial.h | 8999 | F: include/linux/usb/serial.h |
| 8844 | 9000 | ||
| 8845 | USB SERIAL EMPEG EMPEG-CAR MARK I/II DRIVER | ||
| 8846 | M: Gary Brubaker <xavyer@ix.netcom.com> | ||
| 8847 | L: linux-usb@vger.kernel.org | ||
| 8848 | S: Maintained | ||
| 8849 | F: drivers/usb/serial/empeg.c | ||
| 8850 | |||
| 8851 | USB SERIAL KEYSPAN DRIVER | ||
| 8852 | M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | ||
| 8853 | L: linux-usb@vger.kernel.org | ||
| 8854 | S: Maintained | ||
| 8855 | F: drivers/usb/serial/*keyspan* | ||
| 8856 | |||
| 8857 | USB SERIAL WHITEHEAT DRIVER | ||
| 8858 | M: Support Department <support@connecttech.com> | ||
| 8859 | L: linux-usb@vger.kernel.org | ||
| 8860 | W: http://www.connecttech.com | ||
| 8861 | S: Supported | ||
| 8862 | F: drivers/usb/serial/whiteheat* | ||
| 8863 | |||
| 8864 | USB SMSC75XX ETHERNET DRIVER | 9001 | USB SMSC75XX ETHERNET DRIVER |
| 8865 | M: Steve Glendinning <steve.glendinning@shawell.net> | 9002 | M: Steve Glendinning <steve.glendinning@shawell.net> |
| 8866 | L: netdev@vger.kernel.org | 9003 | L: netdev@vger.kernel.org |
| @@ -9366,6 +9503,7 @@ F: arch/arm64/include/asm/xen/ · 499 unmodified lines | |||
| 9366 | 9503 | ||
| 9367 | XEN NETWORK BACKEND DRIVER | 9504 | XEN NETWORK BACKEND DRIVER |
| 9368 | M: Ian Campbell <ian.campbell@citrix.com> | 9505 | M: Ian Campbell <ian.campbell@citrix.com> |
| 9506 | M: Wei Liu <wei.liu2@citrix.com> | ||
| 9369 | L: xen-devel@lists.xenproject.org (moderated for non-subscribers) | 9507 | L: xen-devel@lists.xenproject.org (moderated for non-subscribers) |
| 9370 | L: netdev@vger.kernel.org | 9508 | L: netdev@vger.kernel.org |
| 9371 | S: Supported | 9509 | S: Supported |
| @@ -9387,8 +9525,8 @@ F: drivers/xen/*swiotlb* · 15 unmodified lines | |||
| 9387 | 9525 | ||
| 9388 | XFS FILESYSTEM | 9526 | XFS FILESYSTEM |
| 9389 | P: Silicon Graphics Inc | 9527 | P: Silicon Graphics Inc |
| 9528 | M: Dave Chinner <dchinner@fromorbit.com> | ||
| 9390 | M: Ben Myers <bpm@sgi.com> | 9529 | M: Ben Myers <bpm@sgi.com> |
| 9391 | M: Alex Elder <elder@kernel.org> | ||
| 9392 | M: xfs@oss.sgi.com | 9530 | M: xfs@oss.sgi.com |
| 9393 | L: xfs@oss.sgi.com | 9531 | L: xfs@oss.sgi.com |
| 9394 | W: http://oss.sgi.com/projects/xfs | 9532 | W: http://oss.sgi.com/projects/xfs |
| @@ -1,5 +1,5 @@ | |||
| 1 | VERSION = 3 | 1 | VERSION = 3 |
| 2 | PATCHLEVEL = 12 | 2 | PATCHLEVEL = 13 |
| 3 | SUBLEVEL = 0 | 3 | SUBLEVEL = 0 |
| 4 | EXTRAVERSION = -rc1 | 4 | EXTRAVERSION = -rc1 |
| 5 | NAME = One Giant Leap for Frogkind | 5 | NAME = One Giant Leap for Frogkind |
| @@ -22,6 +22,9 @@ LC_COLLATE=C · 16 unmodified lines | |||
| 22 | LC_NUMERIC=C | 22 | LC_NUMERIC=C |
| 23 | export LC_COLLATE LC_NUMERIC | 23 | export LC_COLLATE LC_NUMERIC |
| 24 | 24 | ||
| 25 | # Avoid interference with shell env settings | ||
| 26 | unexport GREP_OPTIONS | ||
| 27 | |||
| 25 | # We are using a recursive build, so we need to do a little thinking | 28 | # We are using a recursive build, so we need to do a little thinking |
| 26 | # to get the ordering right. | 29 | # to get the ordering right. |
| 27 | # | 30 | # |
| @@ -659,6 +662,12 @@ KBUILD_CFLAGS += $(call cc-option,-fno-strict-overflow) · 631 unmodified lines | |||
| 659 | # conserve stack if available | 662 | # conserve stack if available |
| 660 | KBUILD_CFLAGS += $(call cc-option,-fconserve-stack) | 663 | KBUILD_CFLAGS += $(call cc-option,-fconserve-stack) |
| 661 | 664 | ||
| 665 | # disallow errors like 'EXPORT_GPL(foo);' with missing header | ||
| 666 | KBUILD_CFLAGS += $(call cc-option,-Werror=implicit-int) | ||
| 667 | |||
| 668 | # require functions to have arguments in prototypes, not empty 'int foo()' | ||
| 669 | KBUILD_CFLAGS += $(call cc-option,-Werror=strict-prototypes) | ||
| 670 | |||
| 662 | # use the deterministic mode of AR if available | 671 | # use the deterministic mode of AR if available |
| 663 | KBUILD_ARFLAGS := $(call ar-option,D) | 672 | KBUILD_ARFLAGS := $(call ar-option,D) |
| 664 | 673 | ||
| @@ -720,6 +729,22 @@ mod_strip_cmd = true · 55 unmodified lines | |||
| 720 | endif # INSTALL_MOD_STRIP | 729 | endif # INSTALL_MOD_STRIP |
| 721 | export mod_strip_cmd | 730 | export mod_strip_cmd |
| 722 | 731 | ||
| 732 | # Select initial ramdisk compression format, default is gzip(1). | ||
| 733 | # This shall be used by the dracut(8) tool while creating an initramfs image. | ||
| 734 | # | ||
| 735 | INITRD_COMPRESS=gzip | ||
| 736 | ifeq ($(CONFIG_RD_BZIP2), y) | ||
| 737 | INITRD_COMPRESS=bzip2 | ||
| 738 | else ifeq ($(CONFIG_RD_LZMA), y) | ||
| 739 | INITRD_COMPRESS=lzma | ||
| 740 | else ifeq ($(CONFIG_RD_XZ), y) | ||
| 741 | INITRD_COMPRESS=xz | ||
| 742 | else ifeq ($(CONFIG_RD_LZO), y) | ||
| 743 | INITRD_COMPRESS=lzo | ||
| 744 | else ifeq ($(CONFIG_RD_LZ4), y) | ||
| 745 | INITRD_COMPRESS=lz4 | ||
| 746 | endif | ||
| 747 | export INITRD_COMPRESS | ||
| 723 | 748 | ||
| 724 | ifdef CONFIG_MODULE_SIG_ALL | 749 | ifdef CONFIG_MODULE_SIG_ALL |
| 725 | MODSECKEY = ./signing_key.priv | 750 | MODSECKEY = ./signing_key.priv |
| @@ -207,9 +207,6 @@ config HAVE_DMA_ATTRS · 206 unmodified lines | |||
| 207 | config HAVE_DMA_CONTIGUOUS | 207 | config HAVE_DMA_CONTIGUOUS |
| 208 | bool | 208 | bool |
| 209 | 209 | ||
| 210 | config USE_GENERIC_SMP_HELPERS | ||
| 211 | bool | ||
| 212 | |||
| 213 | config GENERIC_SMP_IDLE_THREAD | 210 | config GENERIC_SMP_IDLE_THREAD |
| 214 | bool | 211 | bool |
| 215 | 212 | ||
| @@ -286,9 +283,6 @@ config HAVE_PERF_USER_STACK_DUMP · 70 unmodified lines | |||
| 286 | config HAVE_ARCH_JUMP_LABEL | 283 | config HAVE_ARCH_JUMP_LABEL |
| 287 | bool | 284 | bool |
| 288 | 285 | ||
| 289 | config HAVE_ARCH_MUTEX_CPU_RELAX | ||
| 290 | bool | ||
| 291 | |||
| 292 | config HAVE_RCU_TABLE_FREE | 286 | config HAVE_RCU_TABLE_FREE |
| 293 | bool | 287 | bool |
| 294 | 288 | ||
| @@ -356,6 +350,18 @@ config HAVE_CONTEXT_TRACKING · 61 unmodified lines | |||
| 356 | config HAVE_VIRT_CPU_ACCOUNTING | 350 | config HAVE_VIRT_CPU_ACCOUNTING |
| 357 | bool | 351 | bool |
| 358 | 352 | ||
| 353 | config HAVE_VIRT_CPU_ACCOUNTING_GEN | ||
| 354 | bool | ||
| 355 | default y if 64BIT | ||
| 356 | help | ||
| 357 | With VIRT_CPU_ACCOUNTING_GEN, cputime_t becomes 64-bit. | ||
| 358 | Before enabling this option, arch code must be audited | ||
| 359 | to ensure there are no races in concurrent read/write of | ||
| 360 | cputime_t. For example, reading/writing 64-bit cputime_t on | ||
| 361 | some 32-bit arches may require multiple accesses, so proper | ||
| 362 | locking is needed to protect against concurrent accesses. | ||
| 363 | |||
| 364 | |||
| 359 | config HAVE_IRQ_TIME_ACCOUNTING | 365 | config HAVE_IRQ_TIME_ACCOUNTING |
| 360 | bool | 366 | bool |
| 361 | help | 367 | help |
| @@ -393,6 +399,16 @@ config HAVE_UNDERSCORE_SYMBOL_PREFIX · 31 unmodified lines | |||
| 393 | Some architectures generate an _ in front of C symbols; things like | 399 | Some architectures generate an _ in front of C symbols; things like |
| 394 | module loading and assembly files need to know about this. | 400 | module loading and assembly files need to know about this. |
| 395 | 401 | ||
| 402 | config HAVE_IRQ_EXIT_ON_IRQ_STACK | ||
| 403 | bool | ||
| 404 | help | ||
| 405 | Architecture doesn't only execute the irq handler on the irq stack | ||
| 406 | but also irq_exit(). This way we can process softirqs on this irq | ||
| 407 | stack instead of switching to a new one when we call __do_softirq() | ||
| 408 | in the end of an hardirq. | ||
| 409 | This spares a stack switch and improves cache usage on softirq | ||
| 410 | processing. | ||
| 411 | |||
| 396 | # | 412 | # |
| 397 | # ABI hall of shame | 413 | # ABI hall of shame |
| 398 | # | 414 | # |
| @@ -1,6 +1,7 @@ | |||
| 1 | config ALPHA | 1 | config ALPHA |
| 2 | bool | 2 | bool |
| 3 | default y | 3 | default y |
| 4 | select ARCH_MIGHT_HAVE_PC_PARPORT | ||
| 4 | select HAVE_AOUT | 5 | select HAVE_AOUT |
| 5 | select HAVE_IDE | 6 | select HAVE_IDE |
| 6 | select HAVE_OPROFILE | 7 | select HAVE_OPROFILE |
| @@ -15,8 +16,8 @@ config ALPHA · 8 unmodified lines | |||
| 15 | select ARCH_WANT_IPC_PARSE_VERSION | 16 | select ARCH_WANT_IPC_PARSE_VERSION |
| 16 | select ARCH_HAVE_NMI_SAFE_CMPXCHG | 17 | select ARCH_HAVE_NMI_SAFE_CMPXCHG |
| 17 | select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE | 18 | select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE |
| 19 | select GENERIC_CLOCKEVENTS | ||
| 18 | select GENERIC_SMP_IDLE_THREAD | 20 | select GENERIC_SMP_IDLE_THREAD |
| 19 | select GENERIC_CMOS_UPDATE | ||
| 20 | select GENERIC_STRNCPY_FROM_USER | 21 | select GENERIC_STRNCPY_FROM_USER |
| 21 | select GENERIC_STRNLEN_USER | 22 | select GENERIC_STRNLEN_USER |
| 22 | select HAVE_MOD_ARCH_SPECIFIC | 23 | select HAVE_MOD_ARCH_SPECIFIC |
| @@ -487,6 +488,20 @@ config VGA_HOSE · 464 unmodified lines | |||
| 487 | which always have multiple hoses, and whose consoles support it. | 488 | which always have multiple hoses, and whose consoles support it. |
| 488 | 489 | ||
| 489 | 490 | ||
| 491 | config ALPHA_QEMU | ||
| 492 | bool "Run under QEMU emulation" | ||
| 493 | depends on !ALPHA_GENERIC | ||
| 494 | ---help--- | ||
| 495 | Assume the presence of special features supported by QEMU PALcode | ||
| 496 | that reduce the overhead of system emulation. | ||
| 497 | |||
| 498 | Generic kernels will auto-detect QEMU. But when building a | ||
| 499 | system-specific kernel, the assumption is that we want to | ||
| 500 | elimiate as many runtime tests as possible. | ||
| 501 | |||
| 502 | If unsure, say N. | ||
| 503 | |||
| 504 | |||
| 490 | config ALPHA_SRM | 505 | config ALPHA_SRM |
| 491 | bool "Use SRM as bootloader" if ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS || ALPHA_NONAME | 506 | bool "Use SRM as bootloader" if ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS || ALPHA_NONAME |
| 492 | depends on TTY | 507 | depends on TTY |
| @@ -522,7 +537,6 @@ config ARCH_MAY_HAVE_PC_FDC · 29 unmodified lines | |||
| 522 | config SMP | 537 | config SMP |
| 523 | bool "Symmetric multi-processing support" | 538 | bool "Symmetric multi-processing support" |
| 524 | depends on ALPHA_SABLE || ALPHA_LYNX || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL | 539 | depends on ALPHA_SABLE || ALPHA_LYNX || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL |
| 525 | select USE_GENERIC_SMP_HELPERS | ||
| 526 | ---help--- | 540 | ---help--- |
| 527 | This enables support for systems with more than one CPU. If you have | 541 | This enables support for systems with more than one CPU. If you have |
| 528 | a system with only one CPU, like most personal computers, say N. If | 542 | a system with only one CPU, like most personal computers, say N. If |
| @@ -572,6 +586,30 @@ config NUMA · 43 unmodified lines | |||
| 572 | Access). This option is for configuring high-end multiprocessor | 586 | Access). This option is for configuring high-end multiprocessor |
| 573 | server machines. If in doubt, say N. | 587 | server machines. If in doubt, say N. |
| 574 | 588 | ||
| 589 | config ALPHA_WTINT | ||
| 590 | bool "Use WTINT" if ALPHA_SRM || ALPHA_GENERIC | ||
| 591 | default y if ALPHA_QEMU | ||
| 592 | default n if ALPHA_EV5 || ALPHA_EV56 || (ALPHA_EV4 && !ALPHA_LCA) | ||
| 593 | default n if !ALPHA_SRM && !ALPHA_GENERIC | ||
| 594 | default y if SMP | ||
| 595 | ---help--- | ||
| 596 | The Wait for Interrupt (WTINT) PALcall attempts to place the CPU | ||
| 597 | to sleep until the next interrupt. This may reduce the power | ||
| 598 | consumed, and the heat produced by the computer. However, it has | ||
| 599 | the side effect of making the cycle counter unreliable as a timing | ||
| 600 | device across the sleep. | ||
| 601 | |||
| 602 | For emulation under QEMU, definitely say Y here, as we have other | ||
| 603 | mechanisms for measuring time than the cycle counter. | ||
| 604 | |||
| 605 | For EV4 (but not LCA), EV5 and EV56 systems, or for systems running | ||
| 606 | MILO, sleep mode is not supported so you might as well say N here. | ||
| 607 | |||
| 608 | For SMP systems we cannot use the cycle counter for timing anyway, | ||
| 609 | so you might as well say Y here. | ||
| 610 | |||
| 611 | If unsure, say N. | ||
| 612 | |||
| 575 | config NODES_SHIFT | 613 | config NODES_SHIFT |
| 576 | int | 614 | int |
| 577 | default "7" | 615 | default "7" |
| @@ -613,9 +651,41 @@ config VERBOSE_MCHECK_ON · 35 unmodified lines | |||
| 613 | 651 | ||
| 614 | Take the default (1) unless you want more control or more info. | 652 | Take the default (1) unless you want more control or more info. |
| 615 | 653 | ||
| 654 | choice | ||
| 655 | prompt "Timer interrupt frequency (HZ)?" | ||
| 656 | default HZ_128 if ALPHA_QEMU | ||
| 657 | default HZ_1200 if ALPHA_RAWHIDE | ||
| 658 | default HZ_1024 | ||
| 659 | ---help--- | ||
| 660 | The frequency at which timer interrupts occur. A high frequency | ||
| 661 | minimizes latency, whereas a low frequency minimizes overhead of | ||
| 662 | process accounting. The later effect is especially significant | ||
| 663 | when being run under QEMU. | ||
| 664 | |||
| 665 | Note that some Alpha hardware cannot change the interrupt frequency | ||
| 666 | of the timer. If unsure, say 1024 (or 1200 for Rawhide). | ||
| 667 | |||
| 668 | config HZ_32 | ||
| 669 | bool "32 Hz" | ||
| 670 | config HZ_64 | ||
| 671 | bool "64 Hz" | ||
| 672 | config HZ_128 | ||
| 673 | bool "128 Hz" | ||
| 674 | config HZ_256 | ||
| 675 | bool "256 Hz" | ||
| 676 | config HZ_1024 | ||
| 677 | bool "1024 Hz" | ||
| 678 | config HZ_1200 | ||
| 679 | bool "1200 Hz" | ||
| 680 | endchoice | ||
| 681 | |||
| 616 | config HZ | 682 | config HZ |
| 617 | int | 683 | int |
| 618 | default 1200 if ALPHA_RAWHIDE | 684 | default 32 if HZ_32 |
| 685 | default 64 if HZ_64 | ||
| 686 | default 128 if HZ_128 | ||
| 687 | default 256 if HZ_256 | ||
| 688 | default 1200 if HZ_1200 | ||
| 619 | default 1024 | 689 | default 1024 |
| 620 | 690 | ||
| 621 | source "drivers/pci/Kconfig" | 691 | source "drivers/pci/Kconfig" |
| @@ -3,3 +3,4 @@ generic-y += clkdev.h · 2 unmodified lines | |||
| 3 | 3 | ||
| 4 | generic-y += exec.h | 4 | generic-y += exec.h |
| 5 | generic-y += trace_clock.h | 5 | generic-y += trace_clock.h |
| 6 | generic-y += preempt.h | ||
| @@ -33,6 +33,7 @@ struct alpha_machine_vector · 32 unmodified lines | |||
| 33 | 33 | ||
| 34 | int nr_irqs; | 34 | int nr_irqs; |
| 35 | int rtc_port; | 35 | int rtc_port; |
| 36 | int rtc_boot_cpu_only; | ||
| 36 | unsigned int max_asn; | 37 | unsigned int max_asn; |
| 37 | unsigned long max_isa_dma_address; | 38 | unsigned long max_isa_dma_address; |
| 38 | unsigned long irq_probe_mask; | 39 | unsigned long irq_probe_mask; |
| @@ -95,9 +96,6 @@ struct alpha_machine_vector · 56 unmodified lines | |||
| 95 | 96 | ||
| 96 | struct _alpha_agp_info *(*agp_info)(void); | 97 | struct _alpha_agp_info *(*agp_info)(void); |
| 97 | 98 | ||
| 98 | unsigned int (*rtc_get_time)(struct rtc_time *); | ||
| 99 | int (*rtc_set_time)(struct rtc_time *); | ||
| 100 | |||
| 101 | const char *vector_name; | 99 | const char *vector_name; |
| 102 | 100 | ||
| 103 | /* NUMA information */ | 101 | /* NUMA information */ |
| @@ -126,13 +124,19 @@ extern struct alpha_machine_vector alpha_mv; · 22 unmodified lines | |||
| 126 | 124 | ||
| 127 | #ifdef CONFIG_ALPHA_GENERIC | 125 | #ifdef CONFIG_ALPHA_GENERIC |
| 128 | extern int alpha_using_srm; | 126 | extern int alpha_using_srm; |
| 127 | extern int alpha_using_qemu; | ||
| 129 | #else | 128 | #else |
| 130 | #ifdef CONFIG_ALPHA_SRM | 129 | # ifdef CONFIG_ALPHA_SRM |
| 131 | #define alpha_using_srm 1 | 130 | # define alpha_using_srm 1 |
| 132 | #else | 131 | # else |
| 133 | #define alpha_using_srm 0 | 132 | # define alpha_using_srm 0 |
| 134 | #endif | 133 | # endif |
| 134 | # ifdef CONFIG_ALPHA_QEMU | ||
| 135 | # define alpha_using_qemu 1 | ||
| 136 | # else | ||
| 137 | # define alpha_using_qemu 0 | ||
| 138 | # endif | ||
| 135 | #endif /* GENERIC */ | 139 | #endif /* GENERIC */ |
| 136 | 140 | ||
| 137 | #endif | 141 | #endif /* __KERNEL__ */ |
| 138 | #endif /* __ALPHA_MACHVEC_H */ | 142 | #endif /* __ALPHA_MACHVEC_H */ |
| @@ -89,6 +89,7 @@ __CALL_PAL_W1(wrmces, unsigned long); · 88 unmodified lines | |||
| 89 | __CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long); | 89 | __CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long); |
| 90 | __CALL_PAL_W1(wrusp, unsigned long); | 90 | __CALL_PAL_W1(wrusp, unsigned long); |
| 91 | __CALL_PAL_W1(wrvptptr, unsigned long); | 91 | __CALL_PAL_W1(wrvptptr, unsigned long); |
| 92 | __CALL_PAL_RW1(wtint, unsigned long, unsigned long); | ||
| 92 | 93 | ||
| 93 | /* | 94 | /* |
| 94 | * TB routines.. | 95 | * TB routines.. |
| @@ -111,5 +112,75 @@ __CALL_PAL_W1(wrvptptr, unsigned long); · 16 unmodified lines | |||
| 111 | #define tbiap() __tbi(-1, /* no second argument */) | 112 | #define tbiap() __tbi(-1, /* no second argument */) |
| 112 | #define tbia() __tbi(-2, /* no second argument */) | 113 | #define tbia() __tbi(-2, /* no second argument */) |
| 113 | 114 | ||
| 115 | /* | ||
| 116 | * QEMU Cserv routines.. | ||
| 117 | */ | ||
| 118 | |||
| 119 | static inline unsigned long | ||
| 120 | qemu_get_walltime(void) | ||
| 121 | { | ||
| 122 | register unsigned long v0 __asm__("$0"); | ||
| 123 | register unsigned long a0 __asm__("$16") = 3; | ||
| 124 | |||
| 125 | asm("call_pal %2 # cserve get_time" | ||
| 126 | : "=r"(v0), "+r"(a0) | ||
| 127 | : "i"(PAL_cserve) | ||
| 128 | : "$17", "$18", "$19", "$20", "$21"); | ||
| 129 | |||
| 130 | return v0; | ||
| 131 | } | ||
| 132 | |||
| 133 | static inline unsigned long | ||
| 134 | qemu_get_alarm(void) | ||
| 135 | { | ||
| 136 | register unsigned long v0 __asm__("$0"); | ||
| 137 | register unsigned long a0 __asm__("$16") = 4; | ||
| 138 | |||
| 139 | asm("call_pal %2 # cserve get_alarm" | ||
| 140 | : "=r"(v0), "+r"(a0) | ||
| 141 | : "i"(PAL_cserve) | ||
| 142 | : "$17", "$18", "$19", "$20", "$21"); | ||
| 143 | |||
| 144 | return v0; | ||
| 145 | } | ||
| 146 | |||
| 147 | static inline void | ||
| 148 | qemu_set_alarm_rel(unsigned long expire) | ||
| 149 | { | ||
| 150 | register unsigned long a0 __asm__("$16") = 5; | ||
| 151 | register unsigned long a1 __asm__("$17") = expire; | ||
| 152 | |||
| 153 | asm volatile("call_pal %2 # cserve set_alarm_rel" | ||
| 154 | : "+r"(a0), "+r"(a1) | ||
| 155 | : "i"(PAL_cserve) | ||
| 156 | : "$0", "$18", "$19", "$20", "$21"); | ||
| 157 | } | ||
| 158 | |||
| 159 | static inline void | ||
| 160 | qemu_set_alarm_abs(unsigned long expire) | ||
| 161 | { | ||
| 162 | register unsigned long a0 __asm__("$16") = 6; | ||
| 163 | register unsigned long a1 __asm__("$17") = expire; | ||
| 164 | |||
| 165 | asm volatile("call_pal %2 # cserve set_alarm_abs" | ||
| 166 | : "+r"(a0), "+r"(a1) | ||
| 167 | : "i"(PAL_cserve) | ||
| 168 | : "$0", "$18", "$19", "$20", "$21"); | ||
| 169 | } | ||
| 170 | |||
| 171 | static inline unsigned long | ||
| 172 | qemu_get_vmtime(void) | ||
| 173 | { | ||
| 174 | register unsigned long v0 __asm__("$0"); | ||
| 175 | register unsigned long a0 __asm__("$16") = 7; | ||
| 176 | |||
| 177 | asm("call_pal %2 # cserve get_time" | ||
| 178 | : "=r"(v0), "+r"(a0) | ||
| 179 | : "i"(PAL_cserve) | ||
| 180 | : "$17", "$18", "$19", "$20", "$21"); | ||
| 181 | |||
| 182 | return v0; | ||
| 183 | } | ||
| 184 | |||
| 114 | #endif /* !__ASSEMBLY__ */ | 185 | #endif /* !__ASSEMBLY__ */ |
| 115 | #endif /* __ALPHA_PAL_H */ | 186 | #endif /* __ALPHA_PAL_H */ |
| @@ -72,7 +72,10 @@ pte_alloc_one(struct mm_struct *mm, unsigned long address) · 71 unmodified lines | |||
| 72 | if (!pte) | 72 | if (!pte) |
| 73 | return NULL; | 73 | return NULL; |
| 74 | page = virt_to_page(pte); | 74 | page = virt_to_page(pte); |
| 75 | pgtable_page_ctor(page); | 75 | if (!pgtable_page_ctor(page)) { |
| 76 | __free_page(page); | ||
| 77 | return NULL; | ||
| 78 | } | ||
| 76 | return page; | 79 | return page; |
| 77 | } | 80 | } |
| 78 | 81 | ||
| @@ -1,12 +1 @@ | |||
| 1 | #ifndef _ALPHA_RTC_H | ||
| 2 | #define _ALPHA_RTC_H | ||
| 3 | |||
| 4 | #if defined(CONFIG_ALPHA_MARVEL) && defined(CONFIG_SMP) \ | ||
| 5 | || defined(CONFIG_ALPHA_GENERIC) | ||
| 6 | # define get_rtc_time alpha_mv.rtc_get_time | ||
| 7 | # define set_rtc_time alpha_mv.rtc_set_time | ||
| 8 | #endif | ||
| 9 | |||
| 10 | #include <asm-generic/rtc.h> | 1 | #include <asm-generic/rtc.h> |
| 11 | |||
| 12 | #endif | ||
| @@ -22,15 +22,27 @@ extern void * __memcpy(void *, const void *, size_t); · 21 unmodified lines | |||
| 22 | 22 | ||
| 23 | #define __HAVE_ARCH_MEMSET | 23 | #define __HAVE_ARCH_MEMSET |
| 24 | extern void * __constant_c_memset(void *, unsigned long, size_t); | 24 | extern void * __constant_c_memset(void *, unsigned long, size_t); |
| 25 | extern void * ___memset(void *, int, size_t); | ||
| 25 | extern void * __memset(void *, int, size_t); | 26 | extern void * __memset(void *, int, size_t); |
| 26 | extern void * memset(void *, int, size_t); | 27 | extern void * memset(void *, int, size_t); |
| 27 | 28 | ||
| 28 | #define memset(s, c, n) \ | 29 | /* For gcc 3.x, we cannot have the inline function named "memset" because |
| 29 | (__builtin_constant_p(c) \ | 30 | the __builtin_memset will attempt to resolve to the inline as well, |
| 30 | ? (__builtin_constant_p(n) && (c) == 0 \ | 31 | leading to a "sorry" about unimplemented recursive inlining. */ |
| 31 | ? __builtin_memset((s),0,(n)) \ | 32 | extern inline void *__memset(void *s, int c, size_t n) |
| 32 | : __constant_c_memset((s),0x0101010101010101UL*(unsigned char)(c),(n))) \ | 33 | { |
| 33 | : __memset((s),(c),(n))) | 34 | if (__builtin_constant_p(c)) { |
| 35 | if (__builtin_constant_p(n)) { | ||
| 36 | return __builtin_memset(s, c, n); | ||
| 37 | } else { | ||
| 38 | unsigned long c8 = (c & 0xff) * 0x0101010101010101UL; | ||
| 39 | return __constant_c_memset(s, c8, n); | ||
| 40 | } | ||
| 41 | } | ||
| 42 | return ___memset(s, c, n); | ||
| 43 | } | ||
| 44 | |||
| 45 | #define memset __memset | ||
| 34 | 46 | ||
| 35 | #define __HAVE_ARCH_STRCPY | 47 | #define __HAVE_ARCH_STRCPY |
| 36 | extern char * strcpy(char *,const char *); | 48 | extern char * strcpy(char *,const char *); |
| @@ -58,8 +58,6 @@ register struct thread_info *__current_thread_info __asm__("$8"); · 57 unmodified lines | |||
| 58 | #define THREAD_SIZE_ORDER 1 | 58 | #define THREAD_SIZE_ORDER 1 |
| 59 | #define THREAD_SIZE (2*PAGE_SIZE) | 59 | #define THREAD_SIZE (2*PAGE_SIZE) |
| 60 | 60 | ||
| 61 | #define PREEMPT_ACTIVE 0x40000000 | ||
| 62 | |||
| 63 | /* | 61 | /* |
| 64 | * Thread information flags: | 62 | * Thread information flags: |
| 65 | * - these are process state flags and used from assembly | 63 | * - these are process state flags and used from assembly |
| @@ -43,7 +43,7 @@ · 42 unmodified lines | |||
| 43 | 43 | ||
| 44 | #define EUSERS 68 /* Too many users */ | 44 | #define EUSERS 68 /* Too many users */ |
| 45 | #define EDQUOT 69 /* Quota exceeded */ | 45 | #define EDQUOT 69 /* Quota exceeded */ |
| 46 | #define ESTALE 70 /* Stale NFS file handle */ | 46 | #define ESTALE 70 /* Stale file handle */ |
| 47 | #define EREMOTE 71 /* Object is remote */ | 47 | #define EREMOTE 71 /* Object is remote */ |
| 48 | 48 | ||
| 49 | #define ENOLCK 77 /* No record locks available */ | 49 | #define ENOLCK 77 /* No record locks available */ |
| @@ -46,6 +46,7 @@ · 45 unmodified lines | |||
| 46 | #define PAL_rdusp 58 | 46 | #define PAL_rdusp 58 |
| 47 | #define PAL_whami 60 | 47 | #define PAL_whami 60 |
| 48 | #define PAL_retsys 61 | 48 | #define PAL_retsys 61 |
| 49 | #define PAL_wtint 62 | ||
| 49 | #define PAL_rti 63 | 50 | #define PAL_rti 63 |
| 50 | 51 | ||
| 51 | 52 | ||
| @@ -81,6 +81,8 @@ · 80 unmodified lines | |||
| 81 | 81 | ||
| 82 | #define SO_SELECT_ERR_QUEUE 45 | 82 | #define SO_SELECT_ERR_QUEUE 45 |
| 83 | 83 | ||
| 84 | #define SO_BUSY_POLL 46 | 84 | #define SO_BUSY_POLL 46 |
| 85 | |||
| 86 | #define SO_MAX_PACING_RATE 47 | ||
| 85 | 87 | ||
| 86 | #endif /* _UAPI_ASM_SOCKET_H */ | 88 | #endif /* _UAPI_ASM_SOCKET_H */ |
| @@ -16,6 +16,7 @@ obj-$(CONFIG_PCI) += pci.o pci_iommu.o pci-sysfs.o · 15 unmodified lines | |||
| 16 | obj-$(CONFIG_SRM_ENV) += srm_env.o | 16 | obj-$(CONFIG_SRM_ENV) += srm_env.o |
| 17 | obj-$(CONFIG_MODULES) += module.o | 17 | obj-$(CONFIG_MODULES) += module.o |
| 18 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o | 18 | obj-$(CONFIG_PERF_EVENTS) += perf_event.o |
| 19 | obj-$(CONFIG_RTC_DRV_ALPHA) += rtc.o | ||
| 19 | 20 | ||
| 20 | ifdef CONFIG_ALPHA_GENERIC | 21 | ifdef CONFIG_ALPHA_GENERIC |
| 21 | 22 | ||
| @@ -40,6 +40,7 @@ EXPORT_SYMBOL(strrchr); · 39 unmodified lines | |||
| 40 | EXPORT_SYMBOL(memmove); | 40 | EXPORT_SYMBOL(memmove); |
| 41 | EXPORT_SYMBOL(__memcpy); | 41 | EXPORT_SYMBOL(__memcpy); |
| 42 | EXPORT_SYMBOL(__memset); | 42 | EXPORT_SYMBOL(__memset); |
| 43 | EXPORT_SYMBOL(___memset); | ||
| 43 | EXPORT_SYMBOL(__memsetw); | 44 | EXPORT_SYMBOL(__memsetw); |
| 44 | EXPORT_SYMBOL(__constant_c_memset); | 45 | EXPORT_SYMBOL(__constant_c_memset); |
| 45 | EXPORT_SYMBOL(copy_page); | 46 | EXPORT_SYMBOL(copy_page); |
| @@ -66,21 +66,7 @@ do_entInt(unsigned long type, unsigned long vector, · 65 unmodified lines | |||
| 66 | break; | 66 | break; |
| 67 | case 1: | 67 | case 1: |
| 68 | old_regs = set_irq_regs(regs); | 68 | old_regs = set_irq_regs(regs); |
| 69 | #ifdef CONFIG_SMP | ||
| 70 | { | ||
| 71 | long cpu; | ||
| 72 | |||
| 73 | smp_percpu_timer_interrupt(regs); | ||
| 74 | cpu = smp_processor_id(); | ||
| 75 | if (cpu != boot_cpuid) { | ||
| 76 | kstat_incr_irqs_this_cpu(RTC_IRQ, irq_to_desc(RTC_IRQ)); | ||
| 77 | } else { | ||
| 78 | handle_irq(RTC_IRQ); | ||
| 79 | } | ||
| 80 | } | ||
| 81 | #else | ||
| 82 | handle_irq(RTC_IRQ); | 69 | handle_irq(RTC_IRQ); |
| 83 | #endif | ||
| 84 | set_irq_regs(old_regs); | 70 | set_irq_regs(old_regs); |
| 85 | return; | 71 | return; |
| 86 | case 2: | 72 | case 2: |
| @@ -228,7 +214,7 @@ process_mcheck_info(unsigned long vector, unsigned long la_ptr, · 141 unmodified lines | |||
| 228 | */ | 214 | */ |
| 229 | 215 | ||
| 230 | struct irqaction timer_irqaction = { | 216 | struct irqaction timer_irqaction = { |
| 231 | .handler = timer_interrupt, | 217 | .handler = rtc_timer_interrupt, |
| 232 | .name = "timer", | 218 | .name = "timer", |
| 233 | }; | 219 | }; |
| 234 | 220 | ||
| @@ -43,10 +43,7 @@ · 42 unmodified lines | |||
| 43 | #define CAT1(x,y) x##y | 43 | #define CAT1(x,y) x##y |
| 44 | #define CAT(x,y) CAT1(x,y) | 44 | #define CAT(x,y) CAT1(x,y) |
| 45 | 45 | ||
| 46 | #define DO_DEFAULT_RTC \ | 46 | #define DO_DEFAULT_RTC .rtc_port = 0x70 |
| 47 | .rtc_port = 0x70, \ | ||
| 48 | .rtc_get_time = common_get_rtc_time, \ | ||
| 49 | .rtc_set_time = common_set_rtc_time | ||
| 50 | 47 | ||
| 51 | #define DO_EV4_MMU \ | 48 | #define DO_EV4_MMU \ |
| 52 | .max_asn = EV4_MAX_ASN, \ | 49 | .max_asn = EV4_MAX_ASN, \ |
| @@ -83,6 +83,8 @@ struct alpha_pmu_t { · 82 unmodified lines | |||
| 83 | long pmc_left[3]; | 83 | long pmc_left[3]; |
| 84 | /* Subroutine for allocation of PMCs. Enforces constraints. */ | 84 | /* Subroutine for allocation of PMCs. Enforces constraints. */ |
| 85 | int (*check_constraints)(struct perf_event **, unsigned long *, int); | 85 | int (*check_constraints)(struct perf_event **, unsigned long *, int); |
| 86 | /* Subroutine for checking validity of a raw event for this PMU. */ | ||
| 87 | int (*raw_event_valid)(u64 config); | ||
| 86 | }; | 88 | }; |
| 87 | 89 | ||
| 88 | /* | 90 | /* |
| @@ -203,6 +205,12 @@ success: · 114 unmodified lines | |||
| 203 | } | 205 | } |
| 204 | 206 | ||
| 205 | 207 | ||
| 208 | static int ev67_raw_event_valid(u64 config) | ||
| 209 | { | ||
| 210 | return config >= EV67_CYCLES && config < EV67_LAST_ET; | ||
| 211 | }; | ||
| 212 | |||
| 213 | |||
| 206 | static const struct alpha_pmu_t ev67_pmu = { | 214 | static const struct alpha_pmu_t ev67_pmu = { |
| 207 | .event_map = ev67_perfmon_event_map, | 215 | .event_map = ev67_perfmon_event_map, |
| 208 | .max_events = ARRAY_SIZE(ev67_perfmon_event_map), | 216 | .max_events = ARRAY_SIZE(ev67_perfmon_event_map), |
| @@ -211,7 +219,8 @@ static const struct alpha_pmu_t ev67_pmu = { · 2 unmodified lines | |||
| 211 | .pmc_count_mask = {EV67_PCTR_0_COUNT_MASK, EV67_PCTR_1_COUNT_MASK, 0}, | 219 | .pmc_count_mask = {EV67_PCTR_0_COUNT_MASK, EV67_PCTR_1_COUNT_MASK, 0}, |
| 212 | .pmc_max_period = {(1UL<<20) - 1, (1UL<<20) - 1, 0}, | 220 | .pmc_max_period = {(1UL<<20) - 1, (1UL<<20) - 1, 0}, |
| 213 | .pmc_left = {16, 4, 0}, | 221 | .pmc_left = {16, 4, 0}, |
| 214 | .check_constraints = ev67_check_constraints | 222 | .check_constraints = ev67_check_constraints, |
| 223 | .raw_event_valid = ev67_raw_event_valid, | ||
| 215 | }; | 224 | }; |
| 216 | 225 | ||
| 217 | 226 | ||
| @@ -609,7 +618,9 @@ static int __hw_perf_event_init(struct perf_event *event) · 391 unmodified lines | |||
| 609 | } else if (attr->type == PERF_TYPE_HW_CACHE) { | 618 | } else if (attr->type == PERF_TYPE_HW_CACHE) { |
| 610 | return -EOPNOTSUPP; | 619 | return -EOPNOTSUPP; |
| 611 | } else if (attr->type == PERF_TYPE_RAW) { | 620 | } else if (attr->type == PERF_TYPE_RAW) { |
| 612 | ev = attr->config & 0xff; | 621 | if (!alpha_pmu->raw_event_valid(attr->config)) |
| 622 | return -EINVAL; | ||
| 623 | ev = attr->config; | ||
| 613 | } else { | 624 | } else { |
| 614 | return -EOPNOTSUPP; | 625 | return -EOPNOTSUPP; |
| 615 | } | 626 | } |
| @@ -46,6 +46,23 @@ · 45 unmodified lines | |||
| 46 | void (*pm_power_off)(void) = machine_power_off; | 46 | void (*pm_power_off)(void) = machine_power_off; |
| 47 | EXPORT_SYMBOL(pm_power_off); | 47 | EXPORT_SYMBOL(pm_power_off); |
| 48 | 48 | ||
| 49 | #ifdef CONFIG_ALPHA_WTINT | ||
| 50 | /* | ||
| 51 | * Sleep the CPU. | ||
| 52 | * EV6, LCA45 and QEMU know how to power down, skipping N timer interrupts. | ||
| 53 | */ | ||
| 54 | void arch_cpu_idle(void) | ||
| 55 | { | ||
| 56 | wtint(0); | ||
| 57 | local_irq_enable(); | ||
| 58 | } | ||
| 59 | |||
| 60 | void arch_cpu_idle_dead(void) | ||
| 61 | { | ||
| 62 | wtint(INT_MAX); | ||
| 63 | } | ||
| 64 | #endif /* ALPHA_WTINT */ | ||
| 65 | |||
| 49 | struct halt_info { | 66 | struct halt_info { |
| 50 | int mode; | 67 | int mode; |
| 51 | char *restart_cmd; | 68 | char *restart_cmd; |
| @@ -135,17 +135,15 @@ extern void unregister_srm_console(void); · 134 unmodified lines | |||
| 135 | /* smp.c */ | 135 | /* smp.c */ |
| 136 | extern void setup_smp(void); | 136 | extern void setup_smp(void); |
| 137 | extern void handle_ipi(struct pt_regs *); | 137 | extern void handle_ipi(struct pt_regs *); |
| 138 | extern void smp_percpu_timer_interrupt(struct pt_regs *); | ||
| 139 | 138 | ||
| 140 | /* bios32.c */ | 139 | /* bios32.c */ |
| 141 | /* extern void reset_for_srm(void); */ | 140 | /* extern void reset_for_srm(void); */ |
| 142 | 141 | ||
| 143 | /* time.c */ | 142 | /* time.c */ |
| 144 | extern irqreturn_t timer_interrupt(int irq, void *dev); | 143 | extern irqreturn_t rtc_timer_interrupt(int irq, void *dev); |
| 144 | extern void init_clockevent(void); | ||
| 145 | extern void common_init_rtc(void); | 145 | extern void common_init_rtc(void); |
| 146 | extern unsigned long est_cycle_freq; | 146 | extern unsigned long est_cycle_freq; |
| 147 | extern unsigned int common_get_rtc_time(struct rtc_time *time); | ||
| 148 | extern int common_set_rtc_time(struct rtc_time *time); | ||
| 149 | 147 | ||
| 150 | /* smc37c93x.c */ | 148 | /* smc37c93x.c */ |
| 151 | extern void SMC93x_Init(void); | 149 | extern void SMC93x_Init(void); |
| @@ -0,0 +1,323 @@ | |||
| 1 | /* | ||
| 2 | * linux/arch/alpha/kernel/rtc.c | ||
| 3 | * | ||
| 4 | * Copyright (C) 1991, 1992, 1995, 1999, 2000 Linus Torvalds | ||
| 5 | * | ||
| 6 | * This file contains date handling. | ||
| 7 | */ | ||
| 8 | #include <linux/errno.h> | ||
| 9 | #include <linux/init.h> | ||
| 10 | #include <linux/kernel.h> | ||
| 11 | #include <linux/param.h> | ||
| 12 | #include <linux/string.h> | ||
| 13 | #include <linux/mc146818rtc.h> | ||
| 14 | #include <linux/bcd.h> | ||
| 15 | #include <linux/rtc.h> | ||
| 16 | #include <linux/platform_device.h> | ||
| 17 | |||
| 18 | #include <asm/rtc.h> | ||
| 19 | |||
| 20 | #include "proto.h" | ||
| 21 | |||
| 22 | |||
| 23 | /* | ||
| 24 | * Support for the RTC device. | ||
| 25 | * | ||
| 26 | * We don't want to use the rtc-cmos driver, because we don't want to support | ||
| 27 | * alarms, as that would be indistinguishable from timer interrupts. | ||
| 28 | * | ||
| 29 | * Further, generic code is really, really tied to a 1900 epoch. This is | ||
| 30 | * true in __get_rtc_time as well as the users of struct rtc_time e.g. | ||
| 31 | * rtc_tm_to_time. Thankfully all of the other epochs in use are later | ||
| 32 | * than 1900, and so it's easy to adjust. | ||
| 33 | */ | ||
| 34 | |||
| 35 | static unsigned long rtc_epoch; | ||
| 36 | |||
| 37 | static int __init | ||
| 38 | specifiy_epoch(char *str) | ||
| 39 | { | ||
| 40 | unsigned long epoch = simple_strtoul(str, NULL, 0); | ||
| 41 | if (epoch < 1900) | ||
| 42 | printk("Ignoring invalid user specified epoch %lu\n", epoch); | ||
| 43 | else | ||
| 44 | rtc_epoch = epoch; | ||
| 45 | return 1; | ||
| 46 | } | ||
| 47 | __setup("epoch=", specifiy_epoch); | ||
| 48 | |||
| 49 | static void __init | ||
| 50 | init_rtc_epoch(void) | ||
| 51 | { | ||
| 52 | int epoch, year, ctrl; | ||
| 53 | |||
| 54 | if (rtc_epoch != 0) { | ||
| 55 | /* The epoch was specified on the command-line. */ | ||
| 56 | return; | ||
| 57 | } | ||
| 58 | |||
| 59 | /* Detect the epoch in use on this computer. */ | ||
| 60 | ctrl = CMOS_READ(RTC_CONTROL); | ||
| 61 | year = CMOS_READ(RTC_YEAR); | ||
| 62 | if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) | ||
| 63 | year = bcd2bin(year); | ||
| 64 | |||
| 65 | /* PC-like is standard; used for year >= 70 */ | ||
| 66 | epoch = 1900; | ||
| 67 | if (year < 20) { | ||
| 68 | epoch = 2000; | ||
| 69 | } else if (year >= 20 && year < 48) { | ||
| 70 | /* NT epoch */ | ||
| 71 | epoch = 1980; | ||
| 72 | } else if (year >= 48 && year < 70) { | ||
| 73 | /* Digital UNIX epoch */ | ||
| 74 | epoch = 1952; | ||
| 75 | } | ||
| 76 | rtc_epoch = epoch; | ||
| 77 | |||
| 78 | printk(KERN_INFO "Using epoch %d for rtc year %d\n", epoch, year); | ||
| 79 | } | ||
| 80 | |||
| 81 | static int | ||
| 82 | alpha_rtc_read_time(struct device *dev, struct rtc_time *tm) | ||
| 83 | { | ||
| 84 | __get_rtc_time(tm); | ||
| 85 | |||
| 86 | /* Adjust for non-default epochs. It's easier to depend on the | ||
| 87 | generic __get_rtc_time and adjust the epoch here than create | ||
| 88 | a copy of __get_rtc_time with the edits we need. */ | ||
| 89 | if (rtc_epoch != 1900) { | ||
| 90 | int year = tm->tm_year; | ||
| 91 | /* Undo the century adjustment made in __get_rtc_time. */ | ||
| 92 | if (year >= 100) | ||
| 93 | year -= 100; | ||
| 94 | year += rtc_epoch - 1900; | ||
| 95 | /* Redo the century adjustment with the epoch in place. */ | ||
| 96 | if (year <= 69) | ||
| 97 | year += 100; | ||
| 98 | tm->tm_year = year; | ||
| 99 | } | ||
| 100 | |||
| 101 | return rtc_valid_tm(tm); | ||
| 102 | } | ||
| 103 | |||
| 104 | static int | ||
| 105 | alpha_rtc_set_time(struct device *dev, struct rtc_time *tm) | ||
| 106 | { | ||
| 107 | struct rtc_time xtm; | ||
| 108 | |||
| 109 | if (rtc_epoch != 1900) { | ||
| 110 | xtm = *tm; | ||
| 111 | xtm.tm_year -= rtc_epoch - 1900; | ||
| 112 | tm = &xtm; | ||
| 113 | } | ||
| 114 | |||
| 115 | return __set_rtc_time(tm); | ||
| 116 | } | ||
| 117 | |||
| 118 | static int | ||
| 119 | alpha_rtc_set_mmss(struct device *dev, unsigned long nowtime) | ||
| 120 | { | ||
| 121 | int retval = 0; | ||
| 122 | int real_seconds, real_minutes, cmos_minutes; | ||
| 123 | unsigned char save_control, save_freq_select; | ||
| 124 | |||
| 125 | /* Note: This code only updates minutes and seconds. Comments | ||
| 126 | indicate this was to avoid messing with unknown time zones, | ||
| 127 | and with the epoch nonsense described above. In order for | ||
| 128 | this to work, the existing clock cannot be off by more than | ||
| 129 | 15 minutes. | ||
| 130 | |||
| 131 | ??? This choice is may be out of date. The x86 port does | ||
| 132 | not have problems with timezones, and the epoch processing has | ||
| 133 | now been fixed in alpha_set_rtc_time. | ||
| 134 | |||
| 135 | In either case, one can always force a full rtc update with | ||
| 136 | the userland hwclock program, so surely 15 minute accuracy | ||
| 137 | is no real burden. */ | ||
| 138 | |||
| 139 | /* In order to set the CMOS clock precisely, we have to be called | ||
| 140 | 500 ms after the second nowtime has started, because when | ||
| 141 | nowtime is written into the registers of the CMOS clock, it will | ||
| 142 | jump to the next second precisely 500 ms later. Check the Motorola | ||
| 143 | MC146818A or Dallas DS12887 data sheet for details. */ | ||
| 144 | |||
| 145 | /* irq are locally disabled here */ | ||
| 146 | spin_lock(&rtc_lock); | ||
| 147 | /* Tell the clock it's being set */ | ||
| 148 | save_control = CMOS_READ(RTC_CONTROL); | ||
| 149 | CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); | ||
| 150 | |||
| 151 | /* Stop and reset prescaler */ | ||
| 152 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); | ||
| 153 | CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); | ||
| 154 | |||
| 155 | cmos_minutes = CMOS_READ(RTC_MINUTES); | ||
| 156 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) | ||
| 157 | cmos_minutes = bcd2bin(cmos_minutes); | ||
| 158 | |||
| 159 | real_seconds = nowtime % 60; | ||
| 160 | real_minutes = nowtime / 60; | ||
| 161 | if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) { | ||
| 162 | /* correct for half hour time zone */ | ||
| 163 | real_minutes += 30; | ||
| 164 | } | ||
| 165 | real_minutes %= 60; | ||
| 166 | |||
| 167 | if (abs(real_minutes - cmos_minutes) < 30) { | ||
| 168 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | ||
| 169 | real_seconds = bin2bcd(real_seconds); | ||
| 170 | real_minutes = bin2bcd(real_minutes); | ||
| 171 | } | ||
| 172 | CMOS_WRITE(real_seconds,RTC_SECONDS); | ||
| 173 | CMOS_WRITE(real_minutes,RTC_MINUTES); | ||
| 174 | } else { | ||
| 175 | printk_once(KERN_NOTICE | ||
| 176 | "set_rtc_mmss: can't update from %d to %d\n", | ||
| 177 | cmos_minutes, real_minutes); | ||
| 178 | retval = -1; | ||
| 179 | } | ||
| 180 | |||
| 181 | /* The following flags have to be released exactly in this order, | ||
| 182 | * otherwise the DS12887 (popular MC146818A clone with integrated | ||
| 183 | * battery and quartz) will not reset the oscillator and will not | ||
| 184 | * update precisely 500 ms later. You won't find this mentioned in | ||
| 185 | * the Dallas Semiconductor data sheets, but who believes data | ||
| 186 | * sheets anyway ... -- Markus Kuhn | ||
| 187 | */ | ||
| 188 | CMOS_WRITE(save_control, RTC_CONTROL); | ||
| 189 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); | ||
| 190 | spin_unlock(&rtc_lock); | ||
| 191 | |||
| 192 | return retval; | ||
| 193 | } | ||
| 194 | |||
| 195 | static int | ||
| 196 | alpha_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | ||
| 197 | { | ||
| 198 | switch (cmd) { | ||
| 199 | case RTC_EPOCH_READ: | ||
| 200 | return put_user(rtc_epoch, (unsigned long __user *)arg); | ||
| 201 | case RTC_EPOCH_SET: | ||
| 202 | if (arg < 1900) | ||
| 203 | return -EINVAL; | ||
| 204 | rtc_epoch = arg; | ||
| 205 | return 0; | ||
| 206 | default: | ||
| 207 | return -ENOIOCTLCMD; | ||
| 208 | } | ||
| 209 | } | ||
| 210 | |||
| 211 | static const struct rtc_class_ops alpha_rtc_ops = { | ||
| 212 | .read_time = alpha_rtc_read_time, | ||
| 213 | .set_time = alpha_rtc_set_time, | ||
| 214 | .set_mmss = alpha_rtc_set_mmss, | ||
| 215 | .ioctl = alpha_rtc_ioctl, | ||
| 216 | }; | ||
| 217 | |||
| 218 | /* | ||
| 219 | * Similarly, except do the actual CMOS access on the boot cpu only. | ||
| 220 | * This requires marshalling the data across an interprocessor call. | ||
| 221 | */ | ||
| 222 | |||
| 223 | #if defined(CONFIG_SMP) && \ | ||
| 224 | (defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_MARVEL)) | ||
| 225 | # define HAVE_REMOTE_RTC 1 | ||
| 226 | |||
| 227 | union remote_data { | ||
| 228 | struct rtc_time *tm; | ||
| 229 | unsigned long now; | ||
| 230 | long retval; | ||
| 231 | }; | ||
| 232 | |||
| 233 | static void | ||
| 234 | do_remote_read(void *data) | ||
| 235 | { | ||
| 236 | union remote_data *x = data; | ||
| 237 | x->retval = alpha_rtc_read_time(NULL, x->tm); | ||
| 238 | } | ||
| 239 | |||
| 240 | static int | ||
| 241 | remote_read_time(struct device *dev, struct rtc_time *tm) | ||
| 242 | { | ||
| 243 | union remote_data x; | ||
| 244 | if (smp_processor_id() != boot_cpuid) { | ||
| 245 | x.tm = tm; | ||
| 246 | smp_call_function_single(boot_cpuid, do_remote_read, &x, 1); | ||
| 247 | return x.retval; | ||
| 248 | } | ||
| 249 | return alpha_rtc_read_time(NULL, tm); | ||
| 250 | } | ||
| 251 | |||
| 252 | static void | ||
| 253 | do_remote_set(void *data) | ||
| 254 | { | ||
| 255 | union remote_data *x = data; | ||
| 256 | x->retval = alpha_rtc_set_time(NULL, x->tm); | ||
| 257 | } | ||
| 258 | |||
| 259 | static int | ||
| 260 | remote_set_time(struct device *dev, struct rtc_time *tm) | ||
| 261 | { | ||
| 262 | union remote_data x; | ||
| 263 | if (smp_processor_id() != boot_cpuid) { | ||
| 264 | x.tm = tm; | ||
| 265 | smp_call_function_single(boot_cpuid, do_remote_set, &x, 1); | ||
| 266 | return x.retval; | ||
| 267 | } | ||
| 268 | return alpha_rtc_set_time(NULL, tm); | ||
| 269 | } | ||
| 270 | |||
| 271 | static void | ||
| 272 | do_remote_mmss(void *data) | ||
| 273 | { | ||
| 274 | union remote_data *x = data; | ||
| 275 | x->retval = alpha_rtc_set_mmss(NULL, x->now); | ||
| 276 | } | ||
| 277 | |||
| 278 | static int | ||
| 279 | remote_set_mmss(struct device *dev, unsigned long now) | ||
| 280 | { | ||
| 281 | union remote_data x; | ||
| 282 | if (smp_processor_id() != boot_cpuid) { | ||
| 283 | x.now = now; | ||
| 284 | smp_call_function_single(boot_cpuid, do_remote_mmss, &x, 1); | ||
| 285 | return x.retval; | ||
| 286 | } | ||
| 287 | return alpha_rtc_set_mmss(NULL, now); | ||
| 288 | } | ||
| 289 | |||
| 290 | static const struct rtc_class_ops remote_rtc_ops = { | ||
| 291 | .read_time = remote_read_time, | ||
| 292 | .set_time = remote_set_time, | ||
| 293 | .set_mmss = remote_set_mmss, | ||
| 294 | .ioctl = alpha_rtc_ioctl, | ||
| 295 | }; | ||
| 296 | #endif | ||
| 297 | |||
| 298 | static int __init | ||
| 299 | alpha_rtc_init(void) | ||
| 300 | { | ||
| 301 | const struct rtc_class_ops *ops; | ||
| 302 | struct platform_device *pdev; | ||
| 303 | struct rtc_device *rtc; | ||
| 304 | const char *name; | ||
| 305 | |||
| 306 | init_rtc_epoch(); | ||
| 307 | name = "rtc-alpha"; | ||
| 308 | ops = &alpha_rtc_ops; | ||
| 309 | |||
| 310 | #ifdef HAVE_REMOTE_RTC | ||
| 311 | if (alpha_mv.rtc_boot_cpu_only) | ||
| 312 | ops = &remote_rtc_ops; | ||
| 313 | #endif | ||
| 314 | |||
| 315 | pdev = platform_device_register_simple(name, -1, NULL, 0); | ||
| 316 | rtc = devm_rtc_device_register(&pdev->dev, name, ops, THIS_MODULE); | ||
| 317 | if (IS_ERR(rtc)) | ||
| 318 | return PTR_ERR(rtc); | ||
| 319 | |||
| 320 | platform_set_drvdata(pdev, rtc); | ||
| 321 | return 0; | ||
| 322 | } | ||
| 323 | device_initcall(alpha_rtc_init); | ||
| @@ -115,10 +115,17 @@ unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE; · 114 unmodified lines | |||
| 115 | 115 | ||
| 116 | #ifdef CONFIG_ALPHA_GENERIC | 116 | #ifdef CONFIG_ALPHA_GENERIC |
| 117 | struct alpha_machine_vector alpha_mv; | 117 | struct alpha_machine_vector alpha_mv; |
| 118 | #endif | ||
| 119 | |||
| 120 | #ifndef alpha_using_srm | ||
| 118 | int alpha_using_srm; | 121 | int alpha_using_srm; |
| 119 | EXPORT_SYMBOL(alpha_using_srm); | 122 | EXPORT_SYMBOL(alpha_using_srm); |
| 120 | #endif | 123 | #endif |
| 121 | 124 | ||
| 125 | #ifndef alpha_using_qemu | ||
| 126 | int alpha_using_qemu; | ||
| 127 | #endif | ||
| 128 | |||
| 122 | static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long, | 129 | static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long, |
| 123 | unsigned long); | 130 | unsigned long); |
| 124 | static struct alpha_machine_vector *get_sysvec_byname(const char *); | 131 | static struct alpha_machine_vector *get_sysvec_byname(const char *); |
| @@ -529,11 +536,15 @@ setup_arch(char **cmdline_p) · 404 unmodified lines | |||
| 529 | atomic_notifier_chain_register(&panic_notifier_list, | 536 | atomic_notifier_chain_register(&panic_notifier_list, |
| 530 | &alpha_panic_block); | 537 | &alpha_panic_block); |
| 531 | 538 | ||
| 532 | #ifdef CONFIG_ALPHA_GENERIC | 539 | #ifndef alpha_using_srm |
| 533 | /* Assume that we've booted from SRM if we haven't booted from MILO. | 540 | /* Assume that we've booted from SRM if we haven't booted from MILO. |
| 534 | Detect the later by looking for "MILO" in the system serial nr. */ | 541 | Detect the later by looking for "MILO" in the system serial nr. */ |
| 535 | alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0; | 542 | alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0; |
| 536 | #endif | 543 | #endif |
| 544 | #ifndef alpha_using_qemu | ||
| 545 | /* Similarly, look for QEMU. */ | ||
| 546 | alpha_using_qemu = strstr((const char *)hwrpb->ssn, "QEMU") != 0; | ||
| 547 | #endif | ||
| 537 | 548 | ||
| 538 | /* If we are using SRM, we want to allow callbacks | 549 | /* If we are using SRM, we want to allow callbacks |
| 539 | as early as possible, so do this NOW, and then | 550 | as early as possible, so do this NOW, and then |
| @@ -1207,6 +1218,7 @@ show_cpuinfo(struct seq_file *f, void *slot) · 667 unmodified lines | |||
| 1207 | char *systype_name; | 1218 | char *systype_name; |
| 1208 | char *sysvariation_name; | 1219 | char *sysvariation_name; |
| 1209 | int nr_processors; | 1220 | int nr_processors; |
| 1221 | unsigned long timer_freq; | ||
| 1210 | 1222 | ||
| 1211 | cpu_index = (unsigned) (cpu->type - 1); | 1223 | cpu_index = (unsigned) (cpu->type - 1); |
| 1212 | cpu_name = "Unknown"; | 1224 | cpu_name = "Unknown"; |
| @@ -1218,6 +1230,12 @@ show_cpuinfo(struct seq_file *f, void *slot) · 5 unmodified lines | |||
| 1218 | 1230 | ||
| 1219 | nr_processors = get_nr_processors(cpu, hwrpb->nr_processors); | 1231 | nr_processors = get_nr_processors(cpu, hwrpb->nr_processors); |
| 1220 | 1232 | ||
| 1233 | #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 | ||
| 1234 | timer_freq = (100UL * hwrpb->intr_freq) / 4096; | ||
| 1235 | #else | ||
| 1236 | timer_freq = 100UL * CONFIG_HZ; | ||
| 1237 | #endif | ||
| 1238 | |||
| 1221 | seq_printf(f, "cpu\t\t\t: Alpha\n" | 1239 | seq_printf(f, "cpu\t\t\t: Alpha\n" |
| 1222 | "cpu model\t\t: %s\n" | 1240 | "cpu model\t\t: %s\n" |
| 1223 | "cpu variation\t\t: %ld\n" | 1241 | "cpu variation\t\t: %ld\n" |
| @@ -1243,8 +1261,7 @@ show_cpuinfo(struct seq_file *f, void *slot) · 19 unmodified lines | |||
| 1243 | (char*)hwrpb->ssn, | 1261 | (char*)hwrpb->ssn, |
| 1244 | est_cycle_freq ? : hwrpb->cycle_freq, | 1262 | est_cycle_freq ? : hwrpb->cycle_freq, |
| 1245 | est_cycle_freq ? "est." : "", | 1263 | est_cycle_freq ? "est." : "", |
| 1246 | hwrpb->intr_freq / 4096, | 1264 | timer_freq / 100, timer_freq % 100, |
| 1247 | (100 * hwrpb->intr_freq / 4096) % 100, | ||
| 1248 | hwrpb->pagesize, | 1265 | hwrpb->pagesize, |
| 1249 | hwrpb->pa_bits, | 1266 | hwrpb->pa_bits, |
| 1250 | hwrpb->max_asn, | 1267 | hwrpb->max_asn, |
| @@ -138,9 +138,11 @@ smp_callin(void) · 137 unmodified lines | |||
| 138 | 138 | ||
| 139 | /* Get our local ticker going. */ | 139 | /* Get our local ticker going. */ |
| 140 | smp_setup_percpu_timer(cpuid); | 140 | smp_setup_percpu_timer(cpuid); |
| 141 | init_clockevent(); | ||
| 141 | 142 | ||
| 142 | /* Call platform-specific callin, if specified */ | 143 | /* Call platform-specific callin, if specified */ |
| 143 | if (alpha_mv.smp_callin) alpha_mv.smp_callin(); | 144 | if (alpha_mv.smp_callin) |
| 145 | alpha_mv.smp_callin(); | ||
| 144 | 146 | ||
| 145 | /* All kernel threads share the same mm context. */ | 147 | /* All kernel threads share the same mm context. */ |
| 146 | atomic_inc(&init_mm.mm_count); | 148 | atomic_inc(&init_mm.mm_count); |
| @@ -498,35 +500,6 @@ smp_cpus_done(unsigned int max_cpus) · 351 unmodified lines | |||
| 498 | ((bogosum + 2500) / (5000/HZ)) % 100); | 500 | ((bogosum + 2500) / (5000/HZ)) % 100); |
| 499 | } | 501 | } |
| 500 | 502 | ||
| 501 | |||
| 502 | void | ||
| 503 | smp_percpu_timer_interrupt(struct pt_regs *regs) | ||
| 504 | { | ||
| 505 | struct pt_regs *old_regs; | ||
| 506 | int cpu = smp_processor_id(); | ||
| 507 | unsigned long user = user_mode(regs); | ||
| 508 | struct cpuinfo_alpha *data = &cpu_data[cpu]; | ||
| 509 | |||
| 510 | old_regs = set_irq_regs(regs); | ||
| 511 | |||
| 512 | /* Record kernel PC. */ | ||
| 513 | profile_tick(CPU_PROFILING); | ||
| 514 | |||
| 515 | if (!--data->prof_counter) { | ||
| 516 | /* We need to make like a normal interrupt -- otherwise | ||
| 517 | timer interrupts ignore the global interrupt lock, | ||
| 518 | which would be a Bad Thing. */ | ||
| 519 | irq_enter(); | ||
| 520 | |||
| 521 | update_process_times(user); | ||
| 522 | |||
| 523 | data->prof_counter = data->prof_multiplier; | ||
| 524 | |||
| 525 | irq_exit(); | ||
| 526 | } | ||
| 527 | set_irq_regs(old_regs); | ||
| 528 | } | ||
| 529 | |||
| 530 | int | 503 | int |
| 531 | setup_profiling_timer(unsigned int multiplier) | 504 | setup_profiling_timer(unsigned int multiplier) |
| 532 | { | 505 | { |
| @@ -224,8 +224,6 @@ struct alpha_machine_vector jensen_mv __initmv = { · 223 unmodified lines | |||
| 224 | .machine_check = jensen_machine_check, | 224 | .machine_check = jensen_machine_check, |
| 225 | .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, | 225 | .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, |
| 226 | .rtc_port = 0x170, | 226 | .rtc_port = 0x170, |
| 227 | .rtc_get_time = common_get_rtc_time, | ||
| 228 | .rtc_set_time = common_set_rtc_time, | ||
| 229 | 227 | ||
| 230 | .nr_irqs = 16, | 228 | .nr_irqs = 16, |
| 231 | .device_interrupt = jensen_device_interrupt, | 229 | .device_interrupt = jensen_device_interrupt, |
| @@ -22,7 +22,6 @@ · 21 unmodified lines | |||
| 22 | #include <asm/hwrpb.h> | 22 | #include <asm/hwrpb.h> |
| 23 | #include <asm/tlbflush.h> | 23 | #include <asm/tlbflush.h> |
| 24 | #include <asm/vga.h> | 24 | #include <asm/vga.h> |
| 25 | #include <asm/rtc.h> | ||
| 26 | 25 | ||
| 27 | #include "proto.h" | 26 | #include "proto.h" |
| 28 | #include "err_impl.h" | 27 | #include "err_impl.h" |
| @@ -400,57 +399,6 @@ marvel_init_rtc(void) · 371 unmodified lines | |||
| 400 | init_rtc_irq(); | 399 | init_rtc_irq(); |
| 401 | } | 400 | } |
| 402 | 401 | ||
| 403 | struct marvel_rtc_time { | ||
| 404 | struct rtc_time *time; | ||
| 405 | int retval; | ||
| 406 | }; | ||
| 407 | |||
| 408 | #ifdef CONFIG_SMP | ||
| 409 | static void | ||
| 410 | smp_get_rtc_time(void *data) | ||
| 411 | { | ||
| 412 | struct marvel_rtc_time *mrt = data; | ||
| 413 | mrt->retval = __get_rtc_time(mrt->time); | ||
| 414 | } | ||
| 415 | |||
| 416 | static void | ||
| 417 | smp_set_rtc_time(void *data) | ||
| 418 | { | ||
| 419 | struct marvel_rtc_time *mrt = data; | ||
| 420 | mrt->retval = __set_rtc_time(mrt->time); | ||
| 421 | } | ||
| 422 | #endif | ||
| 423 | |||
| 424 | static unsigned int | ||
| 425 | marvel_get_rtc_time(struct rtc_time *time) | ||
| 426 | { | ||
| 427 | #ifdef CONFIG_SMP | ||
| 428 | struct marvel_rtc_time mrt; | ||
| 429 | |||
| 430 | if (smp_processor_id() != boot_cpuid) { | ||
| 431 | mrt.time = time; | ||
| 432 | smp_call_function_single(boot_cpuid, smp_get_rtc_time, &mrt, 1); | ||
| 433 | return mrt.retval; | ||
| 434 | } | ||
| 435 | #endif | ||
| 436 | return __get_rtc_time(time); | ||
| 437 | } | ||
| 438 | |||
| 439 | static int | ||
| 440 | marvel_set_rtc_time(struct rtc_time *time) | ||
| 441 | { | ||
| 442 | #ifdef CONFIG_SMP | ||
| 443 | struct marvel_rtc_time mrt; | ||
| 444 | |||
| 445 | if (smp_processor_id() != boot_cpuid) { | ||
| 446 | mrt.time = time; | ||
| 447 | smp_call_function_single(boot_cpuid, smp_set_rtc_time, &mrt, 1); | ||
| 448 | return mrt.retval; | ||
| 449 | } | ||
| 450 | #endif | ||
| 451 | return __set_rtc_time(time); | ||
| 452 | } | ||
| 453 | |||
| 454 | static void | 402 | static void |
| 455 | marvel_smp_callin(void) | 403 | marvel_smp_callin(void) |
| 456 | { | 404 | { |
| @@ -492,8 +440,7 @@ struct alpha_machine_vector marvel_ev7_mv __initmv = { · 35 unmodified lines | |||
| 492 | .vector_name = "MARVEL/EV7", | 440 | .vector_name = "MARVEL/EV7", |
| 493 | DO_EV7_MMU, | 441 | DO_EV7_MMU, |
| 494 | .rtc_port = 0x70, | 442 | .rtc_port = 0x70, |
| 495 | .rtc_get_time = marvel_get_rtc_time, | 443 | .rtc_boot_cpu_only = 1, |
| 496 | .rtc_set_time = marvel_set_rtc_time, | ||
| 497 | DO_MARVEL_IO, | 444 | DO_MARVEL_IO, |
| 498 | .machine_check = marvel_machine_check, | 445 | .machine_check = marvel_machine_check, |
| 499 | .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, | 446 | .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, |
| @@ -3,13 +3,7 @@ · 2 unmodified lines | |||
| 3 | * | 3 | * |
| 4 | * Copyright (C) 1991, 1992, 1995, 1999, 2000 Linus Torvalds | 4 | * Copyright (C) 1991, 1992, 1995, 1999, 2000 Linus Torvalds |
| 5 | * | 5 | * |
| 6 | * This file contains the PC-specific time handling details: | 6 | * This file contains the clocksource time handling. |
| 7 | * reading the RTC at bootup, etc.. | ||
| 8 | * 1994-07-02 Alan Modra | ||
| 9 | * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime | ||
| 10 | * 1995-03-26 Markus Kuhn | ||
| 11 | * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887 | ||
| 12 | * precision CMOS clock update | ||
| 13 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | 7 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 |
| 14 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | 8 | * "A Kernel Model for Precision Timekeeping" by Dave Mills |
| 15 | * 1997-01-09 Adrian Sun | 9 | * 1997-01-09 Adrian Sun |
| @@ -21,9 +15,6 @@ · 5 unmodified lines | |||
| 21 | * 1999-04-16 Thorsten Kranzkowski (dl8bcu@gmx.net) | 15 | * 1999-04-16 Thorsten Kranzkowski (dl8bcu@gmx.net) |
| 22 | * fixed algorithm in do_gettimeofday() for calculating the precise time | 16 | * fixed algorithm in do_gettimeofday() for calculating the precise time |
| 23 | * from processor cycle counter (now taking lost_ticks into account) | 17 | * from processor cycle counter (now taking lost_ticks into account) |
| 24 | * 2000-08-13 Jan-Benedict Glaw <jbglaw@lug-owl.de> | ||
| 25 | * Fixed time_init to be aware of epoches != 1900. This prevents | ||
| 26 | * booting up in 2048 for me;) Code is stolen from rtc.c. | ||
| 27 | * 2003-06-03 R. Scott Bailey <scott.bailey@eds.com> | 18 | * 2003-06-03 R. Scott Bailey <scott.bailey@eds.com> |
| 28 | * Tighten sanity in time_init from 1% (10,000 PPM) to 250 PPM | 19 | * Tighten sanity in time_init from 1% (10,000 PPM) to 250 PPM |
| 29 | */ | 20 | */ |
| @@ -46,40 +37,19 @@ · 16 unmodified lines | |||
| 46 | #include <asm/uaccess.h> | 37 | #include <asm/uaccess.h> |
| 47 | #include <asm/io.h> | 38 | #include <asm/io.h> |
| 48 | #include <asm/hwrpb.h> | 39 | #include <asm/hwrpb.h> |
| 49 | #include <asm/rtc.h> | ||
| 50 | 40 | ||
| 51 | #include <linux/mc146818rtc.h> | 41 | #include <linux/mc146818rtc.h> |
| 52 | #include <linux/time.h> | 42 | #include <linux/time.h> |
| 53 | #include <linux/timex.h> | 43 | #include <linux/timex.h> |
| 54 | #include <linux/clocksource.h> | 44 | #include <linux/clocksource.h> |
| 45 | #include <linux/clockchips.h> | ||
| 55 | 46 | ||
| 56 | #include "proto.h" | 47 | #include "proto.h" |
| 57 | #include "irq_impl.h" | 48 | #include "irq_impl.h" |
| 58 | 49 | ||
| 59 | static int set_rtc_mmss(unsigned long); | ||
| 60 | |||
| 61 | DEFINE_SPINLOCK(rtc_lock); | 50 | DEFINE_SPINLOCK(rtc_lock); |
| 62 | EXPORT_SYMBOL(rtc_lock); | 51 | EXPORT_SYMBOL(rtc_lock); |
| 63 | 52 | ||
| 64 | #define TICK_SIZE (tick_nsec / 1000) | ||
| 65 | |||
| 66 | /* | ||
| 67 | * Shift amount by which scaled_ticks_per_cycle is scaled. Shifting | ||
| 68 | * by 48 gives us 16 bits for HZ while keeping the accuracy good even | ||
| 69 | * for large CPU clock rates. | ||
| 70 | */ | ||
| 71 | #define FIX_SHIFT 48 | ||
| 72 | |||
| 73 | /* lump static variables together for more efficient access: */ | ||
| 74 | static struct { | ||
| 75 | /* cycle counter last time it got invoked */ | ||
| 76 | __u32 last_time; | ||
| 77 | /* ticks/cycle * 2^48 */ | ||
| 78 | unsigned long scaled_ticks_per_cycle; | ||
| 79 | /* partial unused tick */ | ||
| 80 | unsigned long partial_tick; | ||
| 81 | } state; | ||
| 82 | |||
| 83 | unsigned long est_cycle_freq; | 53 | unsigned long est_cycle_freq; |
| 84 | 54 | ||
| 85 | #ifdef CONFIG_IRQ_WORK | 55 | #ifdef CONFIG_IRQ_WORK |
| @@ -108,109 +78,156 @@ static inline __u32 rpcc(void) · 22 unmodified lines | |||
| 108 | return __builtin_alpha_rpcc(); | 78 | return __builtin_alpha_rpcc(); |
| 109 | } | 79 | } |
| 110 | 80 | ||
| 111 | int update_persistent_clock(struct timespec now) | ||
| 112 | { | ||
| 113 | return set_rtc_mmss(now.tv_sec); | ||
| 114 | } | ||
| 115 | 81 | ||
| 116 | void read_persistent_clock(struct timespec *ts) | 82 | |
| 83 | /* | ||
| 84 | * The RTC as a clock_event_device primitive. | ||
| 85 | */ | ||
| 86 | |||
| 87 | static DEFINE_PER_CPU(struct clock_event_device, cpu_ce); | ||
| 88 | |||
| 89 | irqreturn_t | ||
| 90 | rtc_timer_interrupt(int irq, void *dev) | ||
| 117 | { | 91 | { |
| 118 | unsigned int year, mon, day, hour, min, sec, epoch; | 92 | int cpu = smp_processor_id(); |
| 119 | 93 | struct clock_event_device *ce = &per_cpu(cpu_ce, cpu); | |
| 120 | sec = CMOS_READ(RTC_SECONDS); | ||
| 121 | min = CMOS_READ(RTC_MINUTES); | ||
| 122 | hour = CMOS_READ(RTC_HOURS); | ||
| 123 | day = CMOS_READ(RTC_DAY_OF_MONTH); | ||
| 124 | mon = CMOS_READ(RTC_MONTH); | ||
| 125 | year = CMOS_READ(RTC_YEAR); | ||
| 126 | |||
| 127 | if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | ||
| 128 | sec = bcd2bin(sec); | ||
| 129 | min = bcd2bin(min); | ||
| 130 | hour = bcd2bin(hour); | ||
| 131 | day = bcd2bin(day); | ||
| 132 | mon = bcd2bin(mon); | ||
| 133 | year = bcd2bin(year); | ||
| 134 | } | ||
| 135 | 94 | ||
| 136 | /* PC-like is standard; used for year >= 70 */ | 95 | /* Don't run the hook for UNUSED or SHUTDOWN. */ |
| 137 | epoch = 1900; | 96 | if (likely(ce->mode == CLOCK_EVT_MODE_PERIODIC)) |
| 138 | if (year < 20) | 97 | ce->event_handler(ce); |
| 139 | epoch = 2000; | ||
| 140 | else if (year >= 20 && year < 48) | ||
| 141 | /* NT epoch */ | ||
| 142 | epoch = 1980; | ||
| 143 | else if (year >= 48 && year < 70) | ||
| 144 | /* Digital UNIX epoch */ | ||
| 145 | epoch = 1952; | ||
| 146 | 98 | ||
| 147 | printk(KERN_INFO "Using epoch = %d\n", epoch); | 99 | if (test_irq_work_pending()) { |
| 100 | clear_irq_work_pending(); | ||
| 101 | irq_work_run(); | ||
| 102 | } | ||
| 148 | 103 | ||
| 149 | if ((year += epoch) < 1970) | 104 | return IRQ_HANDLED; |
| 150 | year += 100; | 105 | } |
| 151 | 106 | ||
| 152 | ts->tv_sec = mktime(year, mon, day, hour, min, sec); | 107 | static void |
| 153 | ts->tv_nsec = 0; | 108 | rtc_ce_set_mode(enum clock_event_mode mode, struct clock_event_device *ce) |
| 109 | { | ||
| 110 | /* The mode member of CE is updated in generic code. | ||
| 111 | Since we only support periodic events, nothing to do. */ | ||
| 112 | } | ||
| 113 | |||
| 114 | static int | ||
| 115 | rtc_ce_set_next_event(unsigned long evt, struct clock_event_device *ce) | ||
| 116 | { | ||
| 117 | /* This hook is for oneshot mode, which we don't support. */ | ||
| 118 | return -EINVAL; | ||
| 154 | } | 119 | } |
| 155 | 120 | ||
| 121 | static void __init | ||
| 122 | init_rtc_clockevent(void) | ||
| 123 | { | ||
| 124 | int cpu = smp_processor_id(); | ||
| 125 | struct clock_event_device *ce = &per_cpu(cpu_ce, cpu); | ||
| 126 | |||
| 127 | *ce = (struct clock_event_device){ | ||
| 128 | .name = "rtc", | ||
| 129 | .features = CLOCK_EVT_FEAT_PERIODIC, | ||
| 130 | .rating = 100, | ||
| 131 | .cpumask = cpumask_of(cpu), | ||
| 132 | .set_mode = rtc_ce_set_mode, | ||
| 133 | .set_next_event = rtc_ce_set_next_event, | ||
| 134 | }; | ||
| 156 | 135 | ||
| 136 | clockevents_config_and_register(ce, CONFIG_HZ, 0, 0); | ||
| 137 | } | ||
| 157 | 138 | ||
| 139 | |||
| 158 | /* | 140 | /* |
| 159 | * timer_interrupt() needs to keep up the real-time clock, | 141 | * The QEMU clock as a clocksource primitive. |
| 160 | * as well as call the "xtime_update()" routine every clocktick | ||
| 161 | */ | 142 | */ |
| 162 | irqreturn_t timer_interrupt(int irq, void *dev) | 143 | |
| 144 | static cycle_t | ||
| 145 | qemu_cs_read(struct clocksource *cs) | ||
| 163 | { | 146 | { |
| 164 | unsigned long delta; | 147 | return qemu_get_vmtime(); |
| 165 | __u32 now; | 148 | } |
| 166 | long nticks; | ||
| 167 | 149 | ||
| 168 | #ifndef CONFIG_SMP | 150 | static struct clocksource qemu_cs = { |
| 169 | /* Not SMP, do kernel PC profiling here. */ | 151 | .name = "qemu", |
| 170 | profile_tick(CPU_PROFILING); | 152 | .rating = 400, |
| 171 | #endif | 153 | .read = qemu_cs_read, |
| 154 | .mask = CLOCKSOURCE_MASK(64), | ||
| 155 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 156 | .max_idle_ns = LONG_MAX | ||
| 157 | }; | ||
| 172 | 158 | ||
| 173 | /* | ||
| 174 | * Calculate how many ticks have passed since the last update, | ||
| 175 | * including any previous partial leftover. Save any resulting | ||
| 176 | * fraction for the next pass. | ||
| 177 | */ | ||
| 178 | now = rpcc(); | ||
| 179 | delta = now - state.last_time; | ||
| 180 | state.last_time = now; | ||
| 181 | delta = delta * state.scaled_ticks_per_cycle + state.partial_tick; | ||
| 182 | state.partial_tick = delta & ((1UL << FIX_SHIFT) - 1); | ||
| 183 | nticks = delta >> FIX_SHIFT; | ||
| 184 | 159 | ||
| 185 | if (nticks) | 160 | /* |
| 186 | xtime_update(nticks); | 161 | * The QEMU alarm as a clock_event_device primitive. |
| 162 | */ | ||
| 187 | 163 | ||
| 188 | if (test_irq_work_pending()) { | 164 | static void |
| 189 | clear_irq_work_pending(); | 165 | qemu_ce_set_mode(enum clock_event_mode mode, struct clock_event_device *ce) |
| 190 | irq_work_run(); | 166 | { |
| 191 | } | 167 | /* The mode member of CE is updated for us in generic code. |
| 168 | Just make sure that the event is disabled. */ | ||
| 169 | qemu_set_alarm_abs(0); | ||
| 170 | } | ||
| 192 | 171 | ||
| 193 | #ifndef CONFIG_SMP | 172 | static int |
| 194 | while (nticks--) | 173 | qemu_ce_set_next_event(unsigned long evt, struct clock_event_device *ce) |
| 195 | update_process_times(user_mode(get_irq_regs())); | 174 | { |
| 196 | #endif | 175 | qemu_set_alarm_rel(evt); |
| 176 | return 0; | ||
| 177 | } | ||
| 197 | 178 | ||
| 179 | static irqreturn_t | ||
| 180 | qemu_timer_interrupt(int irq, void *dev) | ||
| 181 | { | ||
| 182 | int cpu = smp_processor_id(); | ||
| 183 | struct clock_event_device *ce = &per_cpu(cpu_ce, cpu); | ||
| 184 | |||
| 185 | ce->event_handler(ce); | ||
| 198 | return IRQ_HANDLED; | 186 | return IRQ_HANDLED; |
| 199 | } | 187 | } |
| 200 | 188 | ||
| 189 | static void __init | ||
| 190 | init_qemu_clockevent(void) | ||
| 191 | { | ||
| 192 | int cpu = smp_processor_id(); | ||
| 193 | struct clock_event_device *ce = &per_cpu(cpu_ce, cpu); | ||
| 194 | |||
| 195 | *ce = (struct clock_event_device){ | ||
| 196 | .name = "qemu", | ||
| 197 | .features = CLOCK_EVT_FEAT_ONESHOT, | ||
| 198 | .rating = 400, | ||
| 199 | .cpumask = cpumask_of(cpu), | ||
| 200 | .set_mode = qemu_ce_set_mode, | ||
| 201 | .set_next_event = qemu_ce_set_next_event, | ||
| 202 | }; | ||
| 203 | |||
| 204 | clockevents_config_and_register(ce, NSEC_PER_SEC, 1000, LONG_MAX); | ||
| 205 | } | ||
| 206 | |||
| 207 | |||
| 201 | void __init | 208 | void __init |
| 202 | common_init_rtc(void) | 209 | common_init_rtc(void) |
| 203 | { | 210 | { |
| 204 | unsigned char x; | 211 | unsigned char x, sel = 0; |
| 205 | 212 | ||
| 206 | /* Reset periodic interrupt frequency. */ | 213 | /* Reset periodic interrupt frequency. */ |
| 207 | x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f; | 214 | #if CONFIG_HZ == 1024 || CONFIG_HZ == 1200 |
| 208 | /* Test includes known working values on various platforms | 215 | x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f; |
| 209 | where 0x26 is wrong; we refuse to change those. */ | 216 | /* Test includes known working values on various platforms |
| 210 | if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) { | 217 | where 0x26 is wrong; we refuse to change those. */ |
| 211 | printk("Setting RTC_FREQ to 1024 Hz (%x)\n", x); | 218 | if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) { |
| 212 | CMOS_WRITE(0x26, RTC_FREQ_SELECT); | 219 | sel = RTC_REF_CLCK_32KHZ + 6; |
| 213 | } | 220 | } |
| 221 | #elif CONFIG_HZ == 256 || CONFIG_HZ == 128 || CONFIG_HZ == 64 || CONFIG_HZ == 32 | ||
| 222 | sel = RTC_REF_CLCK_32KHZ + __builtin_ffs(32768 / CONFIG_HZ); | ||
| 223 | #else | ||
| 224 | # error "Unknown HZ from arch/alpha/Kconfig" | ||
| 225 | #endif | ||
| 226 | if (sel) { | ||
| 227 | printk(KERN_INFO "Setting RTC_FREQ to %d Hz (%x)\n", | ||
| 228 | CONFIG_HZ, sel); | ||
| 229 | CMOS_WRITE(sel, RTC_FREQ_SELECT); | ||
| 230 | } | ||
| 214 | 231 | ||
| 215 | /* Turn on periodic interrupts. */ | 232 | /* Turn on periodic interrupts. */ |
| 216 | x = CMOS_READ(RTC_CONTROL); | 233 | x = CMOS_READ(RTC_CONTROL); |
| @@ -233,16 +250,37 @@ common_init_rtc(void) · 16 unmodified lines | |||
| 233 | init_rtc_irq(); | 250 | init_rtc_irq(); |
| 234 | } | 251 | } |
| 235 | 252 | ||
| 236 | unsigned int common_get_rtc_time(struct rtc_time *time) | 253 | |
| 237 | { | 254 | #ifndef CONFIG_ALPHA_WTINT |
| 238 | return __get_rtc_time(time); | 255 | /* |
| 239 | } | 256 | * The RPCC as a clocksource primitive. |
| 257 | * | ||
| 258 | * While we have free-running timecounters running on all CPUs, and we make | ||
| 259 | * a half-hearted attempt in init_rtc_rpcc_info to sync the timecounter | ||
| 260 | * with the wall clock, that initialization isn't kept up-to-date across | ||
| 261 | * different time counters in SMP mode. Therefore we can only use this | ||
| 262 | * method when there's only one CPU enabled. | ||
| 263 | * | ||
| 264 | * When using the WTINT PALcall, the RPCC may shift to a lower frequency, | ||
| 265 | * or stop altogether, while waiting for the interrupt. Therefore we cannot | ||
| 266 | * use this method when WTINT is in use. | ||
| 267 | */ | ||
| 240 | 268 | ||
| 241 | int common_set_rtc_time(struct rtc_time *time) | 269 | static cycle_t read_rpcc(struct clocksource *cs) |
| 242 | { | 270 | { |
| 243 | return __set_rtc_time(time); | 271 | return rpcc(); |
| 244 | } | 272 | } |
| 245 | 273 | ||
| 274 | static struct clocksource clocksource_rpcc = { | ||
| 275 | .name = "rpcc", | ||
| 276 | .rating = 300, | ||
| 277 | .read = read_rpcc, | ||
| 278 | .mask = CLOCKSOURCE_MASK(32), | ||
| 279 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | ||
| 280 | }; | ||
| 281 | #endif /* ALPHA_WTINT */ | ||
| 282 | |||
| 283 | |||
| 246 | /* Validate a computed cycle counter result against the known bounds for | 284 | /* Validate a computed cycle counter result against the known bounds for |
| 247 | the given processor core. There's too much brokenness in the way of | 285 | the given processor core. There's too much brokenness in the way of |
| 248 | timing hardware for any one method to work everywhere. :-( | 286 | timing hardware for any one method to work everywhere. :-( |
| @@ -353,33 +391,6 @@ rpcc_after_update_in_progress(void) · 104 unmodified lines | |||
| 353 | return rpcc(); | 391 | return rpcc(); |
| 354 | } | 392 | } |
| 355 | 393 | ||
| 356 | #ifndef CONFIG_SMP | ||
| 357 | /* Until and unless we figure out how to get cpu cycle counters | ||
| 358 | in sync and keep them there, we can't use the rpcc. */ | ||
| 359 | static cycle_t read_rpcc(struct clocksource *cs) | ||
| 360 | { | ||
| 361 | cycle_t ret = (cycle_t)rpcc(); | ||
| 362 | return ret; | ||
| 363 | } | ||
| 364 | |||
| 365 | static struct clocksource clocksource_rpcc = { | ||
| 366 | .name = "rpcc", | ||
| 367 | .rating = 300, | ||
| 368 | .read = read_rpcc, | ||
| 369 | .mask = CLOCKSOURCE_MASK(32), | ||
| 370 | .flags = CLOCK_SOURCE_IS_CONTINUOUS | ||
| 371 | }; | ||
| 372 | |||
| 373 | static inline void register_rpcc_clocksource(long cycle_freq) | ||
| 374 | { | ||
| 375 | clocksource_register_hz(&clocksource_rpcc, cycle_freq); | ||
| 376 | } | ||
| 377 | #else /* !CONFIG_SMP */ | ||
| 378 | static inline void register_rpcc_clocksource(long cycle_freq) | ||
| 379 | { | ||
| 380 | } | ||
| 381 | #endif /* !CONFIG_SMP */ | ||
| 382 | |||
| 383 | void __init | 394 | void __init |
| 384 | time_init(void) | 395 | time_init(void) |
| 385 | { | 396 | { |
| @@ -387,6 +398,15 @@ time_init(void) · 1 unmodified line | |||
| 387 | unsigned long cycle_freq, tolerance; | 398 | unsigned long cycle_freq, tolerance; |
| 388 | long diff; | 399 | long diff; |
| 389 | 400 | ||
| 401 | if (alpha_using_qemu) { | ||
| 402 | clocksource_register_hz(&qemu_cs, NSEC_PER_SEC); | ||
| 403 | init_qemu_clockevent(); | ||
| 404 | |||
| 405 | timer_irqaction.handler = qemu_timer_interrupt; | ||
| 406 | init_rtc_irq(); | ||
| 407 | return; | ||
| 408 | } | ||
| 409 | |||
| 390 | /* Calibrate CPU clock -- attempt #1. */ | 410 | /* Calibrate CPU clock -- attempt #1. */ |
| 391 | if (!est_cycle_freq) | 411 | if (!est_cycle_freq) |
| 392 | est_cycle_freq = validate_cc_value(calibrate_cc_with_pit()); | 412 | est_cycle_freq = validate_cc_value(calibrate_cc_with_pit()); |
| @@ -421,100 +441,25 @@ time_init(void) · 28 unmodified lines | |||
| 421 | "and unable to estimate a proper value!\n"); | 441 | "and unable to estimate a proper value!\n"); |
| 422 | } | 442 | } |
| 423 | 443 | ||
| 424 | /* From John Bowman <bowman@math.ualberta.ca>: allow the values | 444 | /* See above for restrictions on using clocksource_rpcc. */ |
| 425 | to settle, as the Update-In-Progress bit going low isn't good | 445 | #ifndef CONFIG_ALPHA_WTINT |
| 426 | enough on some hardware. 2ms is our guess; we haven't found | 446 | if (hwrpb->nr_processors == 1) |
| 427 | bogomips yet, but this is close on a 500Mhz box. */ | 447 | clocksource_register_hz(&clocksource_rpcc, cycle_freq); |
| 428 | __delay(1000000); | 448 | #endif |
| 429 | |||
| 430 | |||
| 431 | if (HZ > (1<<16)) { | ||
| 432 | extern void __you_loose (void); | ||
| 433 | __you_loose(); | ||
| 434 | } | ||
| 435 | |||
| 436 | register_rpcc_clocksource(cycle_freq); | ||
| 437 | |||
| 438 | state.last_time = cc1; | ||
| 439 | state.scaled_ticks_per_cycle | ||
| 440 | = ((unsigned long) HZ << FIX_SHIFT) / cycle_freq; | ||
| 441 | state.partial_tick = 0L; | ||
| 442 | 449 | ||
| 443 | /* Startup the timer source. */ | 450 | /* Startup the timer source. */ |
| 444 | alpha_mv.init_rtc(); | 451 | alpha_mv.init_rtc(); |
| 452 | init_rtc_clockevent(); | ||
| 445 | } | 453 | } |
| 446 | 454 | ||
| 447 | /* | 455 | /* Initialize the clock_event_device for secondary cpus. */ |
| 448 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be | 456 | #ifdef CONFIG_SMP |
| 449 | * called 500 ms after the second nowtime has started, because when | 457 | void __init |
| 450 | * nowtime is written into the registers of the CMOS clock, it will | 458 | init_clockevent(void) |
| 451 | * jump to the next second precisely 500 ms later. Check the Motorola | ||
| 452 | * MC146818A or Dallas DS12887 data sheet for details. | ||
| 453 | * | ||
| 454 | * BUG: This routine does not handle hour overflow properly; it just | ||
| 455 | * sets the minutes. Usually you won't notice until after reboot! | ||
| 456 | */ | ||
| 457 | |||
| 458 | |||
| 459 | static int | ||
| 460 | set_rtc_mmss(unsigned long nowtime) | ||
| 461 | { | 459 | { |
| 462 | int retval = 0; | 460 | if (alpha_using_qemu) |
| 463 | int real_seconds, real_minutes, cmos_minutes; | 461 | init_qemu_clockevent(); |
| 464 | unsigned char save_control, save_freq_select; | 462 | else |
| 465 | 463 | init_rtc_clockevent(); | |
| 466 | /* irq are locally disabled here */ | ||
| 467 | spin_lock(&rtc_lock); | ||
| 468 | /* Tell the clock it's being set */ | ||
| 469 | save_control = CMOS_READ(RTC_CONTROL); | ||
| 470 | CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); | ||
| 471 | |||
| 472 | /* Stop and reset prescaler */ | ||
| 473 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); | ||
| 474 | CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); | ||
| 475 | |||
| 476 | cmos_minutes = CMOS_READ(RTC_MINUTES); | ||
| 477 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) | ||
| 478 | cmos_minutes = bcd2bin(cmos_minutes); | ||
| 479 | |||
| 480 | /* | ||
| 481 | * since we're only adjusting minutes and seconds, | ||
| 482 | * don't interfere with hour overflow. This avoids | ||
| 483 | * messing with unknown time zones but requires your | ||
| 484 | * RTC not to be off by more than 15 minutes | ||
| 485 | */ | ||
| 486 | real_seconds = nowtime % 60; | ||
| 487 | real_minutes = nowtime / 60; | ||
| 488 | if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) { | ||
| 489 | /* correct for half hour time zone */ | ||
| 490 | real_minutes += 30; | ||
| 491 | } | ||
| 492 | real_minutes %= 60; | ||
| 493 | |||
| 494 | if (abs(real_minutes - cmos_minutes) < 30) { | ||
| 495 | if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { | ||
| 496 | real_seconds = bin2bcd(real_seconds); | ||
| 497 | real_minutes = bin2bcd(real_minutes); | ||
| 498 | } | ||
| 499 | CMOS_WRITE(real_seconds,RTC_SECONDS); | ||
| 500 | CMOS_WRITE(real_minutes,RTC_MINUTES); | ||
| 501 | } else { | ||
| 502 | printk_once(KERN_NOTICE | ||
| 503 | "set_rtc_mmss: can't update from %d to %d\n", | ||
| 504 | cmos_minutes, real_minutes); | ||
| 505 | retval = -1; | ||
| 506 | } | ||
| 507 | |||
| 508 | /* The following flags have to be released exactly in this order, | ||
| 509 | * otherwise the DS12887 (popular MC146818A clone with integrated | ||
| 510 | * battery and quartz) will not reset the oscillator and will not | ||
| 511 | * update precisely 500 ms later. You won't find this mentioned in | ||
| 512 | * the Dallas Semiconductor data sheets, but who believes data | ||
| 513 | * sheets anyway ... -- Markus Kuhn | ||
| 514 | */ | ||
| 515 | CMOS_WRITE(save_control, RTC_CONTROL); | ||
| 516 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); | ||
| 517 | spin_unlock(&rtc_lock); | ||
| 518 | |||
| 519 | return retval; | ||
| 520 | } | 464 | } |
| 465 | #endif | ||
| @@ -241,6 +241,21 @@ do_entIF(unsigned long type, struct pt_regs *regs) · 240 unmodified lines | |||
| 241 | (const char *)(data[1] | (long)data[2] << 32), | 241 | (const char *)(data[1] | (long)data[2] << 32), |
| 242 | data[0]); | 242 | data[0]); |
| 243 | } | 243 | } |
| 244 | #ifdef CONFIG_ALPHA_WTINT | ||
| 245 | if (type == 4) { | ||
| 246 | /* If CALL_PAL WTINT is totally unsupported by the | ||
| 247 | PALcode, e.g. MILO, "emulate" it by overwriting | ||
| 248 | the insn. */ | ||
| 249 | unsigned int *pinsn | ||
| 250 | = (unsigned int *) regs->pc - 1; | ||
| 251 | if (*pinsn == PAL_wtint) { | ||
| 252 | *pinsn = 0x47e01400; /* mov 0,$0 */ | ||
| 253 | imb(); | ||
| 254 | regs->r0 = 0; | ||
| 255 | return; | ||
| 256 | } | ||
| 257 | } | ||
| 258 | #endif /* ALPHA_WTINT */ | ||
| 244 | die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"), | 259 | die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"), |
| 245 | regs, type, NULL); | 260 | regs, type, NULL); |
| 246 | } | 261 | } |
| @@ -130,7 +130,7 @@ csum_partial_cfu_aligned(const unsigned long __user *src, unsigned long *dst, · 129 unmodified lines | |||
| 130 | *dst = word | tmp; | 130 | *dst = word | tmp; |
| 131 | checksum += carry; | 131 | checksum += carry; |
| 132 | } | 132 | } |
| 133 | if (err) *errp = err; | 133 | if (err && errp) *errp = err; |
| 134 | return checksum; | 134 | return checksum; |
| 135 | } | 135 | } |
| 136 | 136 | ||
| @@ -185,7 +185,7 @@ csum_partial_cfu_dest_aligned(const unsigned long __user *src, · 48 unmodified lines | |||
| 185 | *dst = word | tmp; | 185 | *dst = word | tmp; |
| 186 | checksum += carry; | 186 | checksum += carry; |
| 187 | } | 187 | } |
| 188 | if (err) *errp = err; | 188 | if (err && errp) *errp = err; |
| 189 | return checksum; | 189 | return checksum; |
| 190 | } | 190 | } |
| 191 | 191 | ||
| @@ -242,7 +242,7 @@ csum_partial_cfu_src_aligned(const unsigned long __user *src, · 50 unmodified lines | |||
| 242 | stq_u(partial_dest | second_dest, dst); | 242 | stq_u(partial_dest | second_dest, dst); |
| 243 | out: | 243 | out: |
| 244 | checksum += carry; | 244 | checksum += carry; |
| 245 | if (err) *errp = err; | 245 | if (err && errp) *errp = err; |
| 246 | return checksum; | 246 | return checksum; |
| 247 | } | 247 | } |
| 248 | 248 | ||
| @@ -325,7 +325,7 @@ csum_partial_cfu_unaligned(const unsigned long __user * src, · 76 unmodified lines | |||
| 325 | stq_u(partial_dest | word | second_dest, dst); | 325 | stq_u(partial_dest | word | second_dest, dst); |
| 326 | checksum += carry; | 326 | checksum += carry; |
| 327 | } | 327 | } |
| 328 | if (err) *errp = err; | 328 | if (err && errp) *errp = err; |
| 329 | return checksum; | 329 | return checksum; |
| 330 | } | 330 | } |
| 331 | 331 | ||
| @@ -339,7 +339,7 @@ csum_partial_copy_from_user(const void __user *src, void *dst, int len, · 7 unmodified lines | |||
| 339 | 339 | ||
| 340 | if (len) { | 340 | if (len) { |
| 341 | if (!access_ok(VERIFY_READ, src, len)) { | 341 | if (!access_ok(VERIFY_READ, src, len)) { |
| 342 | *errp = -EFAULT; | 342 | if (errp) *errp = -EFAULT; |
| 343 | memset(dst, 0, len); | 343 | memset(dst, 0, len); |
| 344 | return sum; | 344 | return sum; |
| 345 | } | 345 | } |
| @@ -30,14 +30,15 @@ · 29 unmodified lines | |||
| 30 | .set noat | 30 | .set noat |
| 31 | .set noreorder | 31 | .set noreorder |
| 32 | .text | 32 | .text |
| 33 | .globl memset | ||
| 33 | .globl __memset | 34 | .globl __memset |
| 35 | .globl ___memset | ||
| 34 | .globl __memsetw | 36 | .globl __memsetw |
| 35 | .globl __constant_c_memset | 37 | .globl __constant_c_memset |
| 36 | .globl memset | ||
| 37 | 38 | ||
| 38 | .ent __memset | 39 | .ent ___memset |
| 39 | .align 5 | 40 | .align 5 |
| 40 | __memset: | 41 | ___memset: |
| 41 | .frame $30,0,$26,0 | 42 | .frame $30,0,$26,0 |
| 42 | .prologue 0 | 43 | .prologue 0 |
| 43 | 44 | ||
| @@ -227,7 +228,7 @@ end_b: · 183 unmodified lines | |||
| 227 | nop | 228 | nop |
| 228 | nop | 229 | nop |
| 229 | ret $31,($26),1 # L0 : | 230 | ret $31,($26),1 # L0 : |
| 230 | .end __memset | 231 | .end ___memset |
| 231 | 232 | ||
| 232 | /* | 233 | /* |
| 233 | * This is the original body of code, prior to replication and | 234 | * This is the original body of code, prior to replication and |
| @@ -594,4 +595,5 @@ end_w: · 360 unmodified lines | |||
| 594 | 595 | ||
| 595 | .end __memsetw | 596 | .end __memsetw |
| 596 | 597 | ||
| 597 | memset = __memset | 598 | memset = ___memset |
| 599 | __memset = ___memset | ||
| @@ -19,11 +19,13 @@ · 18 unmodified lines | |||
| 19 | .text | 19 | .text |
| 20 | .globl memset | 20 | .globl memset |
| 21 | .globl __memset | 21 | .globl __memset |
| 22 | .globl ___memset | ||
| 22 | .globl __memsetw | 23 | .globl __memsetw |
| 23 | .globl __constant_c_memset | 24 | .globl __constant_c_memset |
| 24 | .ent __memset | 25 | |
| 26 | .ent ___memset | ||
| 25 | .align 5 | 27 | .align 5 |
| 26 | __memset: | 28 | ___memset: |
| 27 | .frame $30,0,$26,0 | 29 | .frame $30,0,$26,0 |
| 28 | .prologue 0 | 30 | .prologue 0 |
| 29 | 31 | ||
| @@ -103,7 +105,7 @@ within_one_quad: · 73 unmodified lines | |||
| 103 | 105 | ||
| 104 | end: | 106 | end: |
| 105 | ret $31,($26),1 /* E1 */ | 107 | ret $31,($26),1 /* E1 */ |
| 106 | .end __memset | 108 | .end ___memset |
| 107 | 109 | ||
| 108 | .align 5 | 110 | .align 5 |
| 109 | .ent __memsetw | 111 | .ent __memsetw |
| @@ -121,4 +123,5 @@ __memsetw: · 11 unmodified lines | |||
| 121 | 123 | ||
| 122 | .end __memsetw | 124 | .end __memsetw |
| 123 | 125 | ||
| 124 | memset = __memset | 126 | memset = ___memset |
| 127 | __memset = ___memset | ||
| @@ -35,6 +35,12 @@ config ARC · 34 unmodified lines | |||
| 35 | select PERF_USE_VMALLOC | 35 | select PERF_USE_VMALLOC |
| 36 | select HAVE_DEBUG_STACKOVERFLOW | 36 | select HAVE_DEBUG_STACKOVERFLOW |
| 37 | 37 | ||
| 38 | config TRACE_IRQFLAGS_SUPPORT | ||
| 39 | def_bool y | ||
| 40 | |||
| 41 | config LOCKDEP_SUPPORT | ||
| 42 | def_bool y | ||
| 43 | |||
| 38 | config SCHED_OMIT_FRAME_POINTER | 44 | config SCHED_OMIT_FRAME_POINTER |
| 39 | def_bool y | 45 | def_bool y |
| 40 | 46 | ||
| @@ -119,7 +125,6 @@ config ARC_PLAT_NEEDS_CPU_TO_DMA · 78 unmodified lines | |||
| 119 | config SMP | 125 | config SMP |
| 120 | bool "Symmetric Multi-Processing (Incomplete)" | 126 | bool "Symmetric Multi-Processing (Incomplete)" |
| 121 | default n | 127 | default n |
| 122 | select USE_GENERIC_SMP_HELPERS | ||
| 123 | help | 128 | help |
| 124 | This enables support for systems with more than one CPU. If you have | 129 | This enables support for systems with more than one CPU. If you have |
| 125 | a system with only one CPU, like most personal computers, say N. If | 130 | a system with only one CPU, like most personal computers, say N. If |
| @@ -130,17 +135,14 @@ if SMP · 4 unmodified lines | |||
| 130 | config ARC_HAS_COH_CACHES | 135 | config ARC_HAS_COH_CACHES |
| 131 | def_bool n | 136 | def_bool n |
| 132 | 137 | ||
| 133 | config ARC_HAS_COH_RTSC | ||
| 134 | def_bool n | ||
| 135 | |||
| 136 | config ARC_HAS_REENTRANT_IRQ_LV2 | 138 | config ARC_HAS_REENTRANT_IRQ_LV2 |
| 137 | def_bool n | 139 | def_bool n |
| 138 | 140 | ||
| 139 | endif | 141 | endif |
| 140 | 142 | ||
| 141 | config NR_CPUS | 143 | config NR_CPUS |
| 142 | int "Maximum number of CPUs (2-32)" | 144 | int "Maximum number of CPUs (2-4096)" |
| 143 | range 2 32 | 145 | range 2 4096 |
| 144 | depends on SMP | 146 | depends on SMP |
| 145 | default "2" | 147 | default "2" |
| 146 | 148 | ||
| @@ -326,8 +328,7 @@ config ARC_HAS_RTSC · 179 unmodified lines | |||
| 326 | bool "Insn: RTSC (64-bit r/o cycle counter)" | 328 | bool "Insn: RTSC (64-bit r/o cycle counter)" |
| 327 | default y | 329 | default y |
| 328 | depends on ARC_CPU_REL_4_10 | 330 | depends on ARC_CPU_REL_4_10 |
| 329 | # if SMP, enable RTSC only if counter is coherent across cores | 331 | depends on !SMP |
| 330 | depends on !SMP || ARC_HAS_COH_RTSC | ||
| 331 | 332 | ||
| 332 | endmenu # "ARC CPU Configuration" | 333 | endmenu # "ARC CPU Configuration" |
| 333 | 334 | ||
| @@ -43,124 +43,124 @@ · 42 unmodified lines | |||
| 43 | iomux: iomux@FF10601c { | 43 | iomux: iomux@FF10601c { |
| 44 | /* Port 1 */ | 44 | /* Port 1 */ |
| 45 | pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ | 45 | pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ |
| 46 | pingrp = "mis0_pins"; | 46 | abilis,function = "mis0"; |
| 47 | }; | 47 | }; |
| 48 | pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ | 48 | pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ |
| 49 | pingrp = "mis1_pins"; | 49 | abilis,function = "mis1"; |
| 50 | }; | 50 | }; |
| 51 | pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ | 51 | pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ |
| 52 | pingrp = "gpioa_pins"; | 52 | abilis,function = "gpioa"; |
| 53 | }; | 53 | }; |
| 54 | pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */ | 54 | pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */ |
| 55 | pingrp = "mip1_pins"; | 55 | abilis,function = "mip1"; |
| 56 | }; | 56 | }; |
| 57 | /* Port 2 */ | 57 | /* Port 2 */ |
| 58 | pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */ | 58 | pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */ |
| 59 | pingrp = "mis2_pins"; | 59 | abilis,function = "mis2"; |
| 60 | }; | 60 | }; |
| 61 | pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */ | 61 | pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */ |
| 62 | pingrp = "mis3_pins"; | 62 | abilis,function = "mis3"; |
| 63 | }; | 63 | }; |
| 64 | pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */ | 64 | pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */ |
| 65 | pingrp = "gpioc_pins"; | 65 | abilis,function = "gpioc"; |
| 66 | }; | 66 | }; |
| 67 | pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */ | 67 | pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */ |
| 68 | pingrp = "mip3_pins"; | 68 | abilis,function = "mip3"; |
| 69 | }; | 69 | }; |
| 70 | /* Port 3 */ | 70 | /* Port 3 */ |
| 71 | pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */ | 71 | pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */ |
| 72 | pingrp = "mis4_pins"; | 72 | abilis,function = "mis4"; |
| 73 | }; | 73 | }; |
| 74 | pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */ | 74 | pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */ |
| 75 | pingrp = "mis5_pins"; | 75 | abilis,function = "mis5"; |
| 76 | }; | 76 | }; |
| 77 | pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */ | 77 | pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */ |
| 78 | pingrp = "gpioe_pins"; | 78 | abilis,function = "gpioe"; |
| 79 | }; | 79 | }; |
| 80 | pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */ | 80 | pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */ |
| 81 | pingrp = "mip5_pins"; | 81 | abilis,function = "mip5"; |
| 82 | }; | 82 | }; |
| 83 | /* Port 4 */ | 83 | /* Port 4 */ |
| 84 | pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */ | 84 | pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */ |
| 85 | pingrp = "mis6_pins"; | 85 | abilis,function = "mis6"; |
| 86 | }; | 86 | }; |
| 87 | pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */ | 87 | pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */ |
| 88 | pingrp = "mis7_pins"; | 88 | abilis,function = "mis7"; |
| 89 | }; | 89 | }; |
| 90 | pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */ | 90 | pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */ |
| 91 | pingrp = "gpiog_pins"; | 91 | abilis,function = "gpiog"; |
| 92 | }; | 92 | }; |
| 93 | pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */ | 93 | pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */ |
| 94 | pingrp = "mip7_pins"; | 94 | abilis,function = "mip7"; |
| 95 | }; | 95 | }; |
| 96 | /* Port 5 */ | 96 | /* Port 5 */ |
| 97 | pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */ | 97 | pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */ |
| 98 | pingrp = "gpioj_pins"; | 98 | abilis,function = "gpioj"; |
| 99 | }; | 99 | }; |
| 100 | pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */ | 100 | pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */ |
| 101 | pingrp = "gpiok_pins"; | 101 | abilis,function = "gpiok"; |
| 102 | }; | 102 | }; |
| 103 | pctl_ciplus: pctl-ciplus { /* CI+ interface */ | 103 | pctl_ciplus: pctl-ciplus { /* CI+ interface */ |
| 104 | pingrp = "ciplus_pins"; | 104 | abilis,function = "ciplus"; |
| 105 | }; | 105 | }; |
| 106 | pctl_mcard: pctl-mcard { /* M-Card interface */ | 106 | pctl_mcard: pctl-mcard { /* M-Card interface */ |
| 107 | pingrp = "mcard_pins"; | 107 | abilis,function = "mcard"; |
| 108 | }; | 108 | }; |
| 109 | /* Port 6 */ | 109 | /* Port 6 */ |
| 110 | pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */ | 110 | pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */ |
| 111 | pingrp = "mop_pins"; | 111 | abilis,function = "mop"; |
| 112 | }; | 112 | }; |
| 113 | pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */ | 113 | pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */ |
| 114 | pingrp = "mos0_pins"; | 114 | abilis,function = "mos0"; |
| 115 | }; | 115 | }; |
| 116 | pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */ | 116 | pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */ |
| 117 | pingrp = "mos1_pins"; | 117 | abilis,function = "mos1"; |
| 118 | }; | 118 | }; |
| 119 | pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */ | 119 | pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */ |
| 120 | pingrp = "mos2_pins"; | 120 | abilis,function = "mos2"; |
| 121 | }; | 121 | }; |
| 122 | pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */ | 122 | pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */ |
| 123 | pingrp = "mos3_pins"; | 123 | abilis,function = "mos3"; |
| 124 | }; | 124 | }; |
| 125 | /* Port 7 */ | 125 | /* Port 7 */ |
| 126 | pctl_uart0: pctl-uart0 { /* UART 0 */ | 126 | pctl_uart0: pctl-uart0 { /* UART 0 */ |
| 127 | pingrp = "uart0_pins"; | 127 | abilis,function = "uart0"; |
| 128 | }; | 128 | }; |
| 129 | pctl_uart1: pctl-uart1 { /* UART 1 */ | 129 | pctl_uart1: pctl-uart1 { /* UART 1 */ |
| 130 | pingrp = "uart1_pins"; | 130 | abilis,function = "uart1"; |
| 131 | }; | 131 | }; |
| 132 | pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */ | 132 | pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */ |
| 133 | pingrp = "gpiol_pins"; | 133 | abilis,function = "gpiol"; |
| 134 | }; | 134 | }; |
| 135 | pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */ | 135 | pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */ |
| 136 | pingrp = "gpiom_pins"; | 136 | abilis,function = "gpiom"; |
| 137 | }; | 137 | }; |
| 138 | /* Port 8 */ | 138 | /* Port 8 */ |
| 139 | pctl_spi3: pctl-spi3 { | 139 | pctl_spi3: pctl-spi3 { |
| 140 | pingrp = "spi3_pins"; | 140 | abilis,function = "spi3"; |
| 141 | }; | 141 | }; |
| 142 | /* Port 9 */ | 142 | /* Port 9 */ |
| 143 | pctl_spi1: pctl-spi1 { | 143 | pctl_spi1: pctl-spi1 { |
| 144 | pingrp = "spi1_pins"; | 144 | abilis,function = "spi1"; |
| 145 | }; | 145 | }; |
| 146 | pctl_gpio_n: pctl-gpio-n { | 146 | pctl_gpio_n: pctl-gpio-n { |
| 147 | pingrp = "gpion_pins"; | 147 | abilis,function = "gpion"; |
| 148 | }; | 148 | }; |
| 149 | /* Unmuxed GPIOs */ | 149 | /* Unmuxed GPIOs */ |
| 150 | pctl_gpio_b: pctl-gpio-b { | 150 | pctl_gpio_b: pctl-gpio-b { |
| 151 | pingrp = "gpiob_pins"; | 151 | abilis,function = "gpiob"; |
| 152 | }; | 152 | }; |
| 153 | pctl_gpio_d: pctl-gpio-d { | 153 | pctl_gpio_d: pctl-gpio-d { |
| 154 | pingrp = "gpiod_pins"; | 154 | abilis,function = "gpiod"; |
| 155 | }; | 155 | }; |
| 156 | pctl_gpio_f: pctl-gpio-f { | 156 | pctl_gpio_f: pctl-gpio-f { |
| 157 | pingrp = "gpiof_pins"; | 157 | abilis,function = "gpiof"; |
| 158 | }; | 158 | }; |
| 159 | pctl_gpio_h: pctl-gpio-h { | 159 | pctl_gpio_h: pctl-gpio-h { |
| 160 | pingrp = "gpioh_pins"; | 160 | abilis,function = "gpioh"; |
| 161 | }; | 161 | }; |
| 162 | pctl_gpio_i: pctl-gpio-i { | 162 | pctl_gpio_i: pctl-gpio-i { |
| 163 | pingrp = "gpioi_pins"; | 163 | abilis,function = "gpioi"; |
| 164 | }; | 164 | }; |
| 165 | }; | 165 | }; |
| 166 | 166 | ||
| @@ -172,9 +172,10 @@ · 5 unmodified lines | |||
| 172 | interrupts = <27 2>; | 172 | interrupts = <27 2>; |
| 173 | reg = <0xFF140000 0x1000>; | 173 | reg = <0xFF140000 0x1000>; |
| 174 | gpio-controller; | 174 | gpio-controller; |
| 175 | #gpio-cells = <1>; | 175 | #gpio-cells = <2>; |
| 176 | gpio-base = <0>; | 176 | abilis,ngpio = <3>; |
| 177 | gpio-pins = <&pctl_gpio_a>; | 177 | gpio-ranges = <&iomux 0 0 0>; |
| 178 | gpio-ranges-group-names = "gpioa"; | ||
| 178 | }; | 179 | }; |
| 179 | gpiob: gpio@FF141000 { | 180 | gpiob: gpio@FF141000 { |
| 180 | compatible = "abilis,tb10x-gpio"; | 181 | compatible = "abilis,tb10x-gpio"; |
| @@ -184,9 +185,10 @@ · 3 unmodified lines | |||
| 184 | interrupts = <27 2>; | 185 | interrupts = <27 2>; |
| 185 | reg = <0xFF141000 0x1000>; | 186 | reg = <0xFF141000 0x1000>; |
| 186 | gpio-controller; | 187 | gpio-controller; |
| 187 | #gpio-cells = <1>; | 188 | #gpio-cells = <2>; |
| 188 | gpio-base = <3>; | 189 | abilis,ngpio = <2>; |
| 189 | gpio-pins = <&pctl_gpio_b>; | 190 | gpio-ranges = <&iomux 0 0 0>; |
| 191 | gpio-ranges-group-names = "gpiob"; | ||
| 190 | }; | 192 | }; |
| 191 | gpioc: gpio@FF142000 { | 193 | gpioc: gpio@FF142000 { |
| 192 | compatible = "abilis,tb10x-gpio"; | 194 | compatible = "abilis,tb10x-gpio"; |
| @@ -196,9 +198,10 @@ · 3 unmodified lines | |||
| 196 | interrupts = <27 2>; | 198 | interrupts = <27 2>; |
| 197 | reg = <0xFF142000 0x1000>; | 199 | reg = <0xFF142000 0x1000>; |
| 198 | gpio-controller; | 200 | gpio-controller; |
| 199 | #gpio-cells = <1>; | 201 | #gpio-cells = <2>; |
| 200 | gpio-base = <5>; | 202 | abilis,ngpio = <3>; |
| 201 | gpio-pins = <&pctl_gpio_c>; | 203 | gpio-ranges = <&iomux 0 0 0>; |
| 204 | gpio-ranges-group-names = "gpioc"; | ||
| 202 | }; | 205 | }; |
| 203 | gpiod: gpio@FF143000 { | 206 | gpiod: gpio@FF143000 { |
| 204 | compatible = "abilis,tb10x-gpio"; | 207 | compatible = "abilis,tb10x-gpio"; |
| @@ -208,9 +211,10 @@ · 3 unmodified lines | |||
| 208 | interrupts = <27 2>; | 211 | interrupts = <27 2>; |
| 209 | reg = <0xFF143000 0x1000>; | 212 | reg = <0xFF143000 0x1000>; |
| 210 | gpio-controller; | 213 | gpio-controller; |
| 211 | #gpio-cells = <1>; | 214 | #gpio-cells = <2>; |
| 212 | gpio-base = <8>; | 215 | abilis,ngpio = <2>; |
| 213 | gpio-pins = <&pctl_gpio_d>; | 216 | gpio-ranges = <&iomux 0 0 0>; |
| 217 | gpio-ranges-group-names = "gpiod"; | ||
| 214 | }; | 218 | }; |
| 215 | gpioe: gpio@FF144000 { | 219 | gpioe: gpio@FF144000 { |
| 216 | compatible = "abilis,tb10x-gpio"; | 220 | compatible = "abilis,tb10x-gpio"; |
| @@ -220,9 +224,10 @@ · 3 unmodified lines | |||
| 220 | interrupts = <27 2>; | 224 | interrupts = <27 2>; |
| 221 | reg = <0xFF144000 0x1000>; | 225 | reg = <0xFF144000 0x1000>; |
| 222 | gpio-controller; | 226 | gpio-controller; |
| 223 | #gpio-cells = <1>; | 227 | #gpio-cells = <2>; |
| 224 | gpio-base = <10>; | 228 | abilis,ngpio = <3>; |
| 225 | gpio-pins = <&pctl_gpio_e>; | 229 | gpio-ranges = <&iomux 0 0 0>; |
| 230 | gpio-ranges-group-names = "gpioe"; | ||
| 226 | }; | 231 | }; |
| 227 | gpiof: gpio@FF145000 { | 232 | gpiof: gpio@FF145000 { |
| 228 | compatible = "abilis,tb10x-gpio"; | 233 | compatible = "abilis,tb10x-gpio"; |
| @@ -232,9 +237,10 @@ · 3 unmodified lines | |||
| 232 | interrupts = <27 2>; | 237 | interrupts = <27 2>; |
| 233 | reg = <0xFF145000 0x1000>; | 238 | reg = <0xFF145000 0x1000>; |
| 234 | gpio-controller; | 239 | gpio-controller; |
| 235 | #gpio-cells = <1>; | 240 | #gpio-cells = <2>; |
| 236 | gpio-base = <13>; | 241 | abilis,ngpio = <2>; |
| 237 | gpio-pins = <&pctl_gpio_f>; | 242 | gpio-ranges = <&iomux 0 0 0>; |
| 243 | gpio-ranges-group-names = "gpiof"; | ||
| 238 | }; | 244 | }; |
| 239 | gpiog: gpio@FF146000 { | 245 | gpiog: gpio@FF146000 { |
| 240 | compatible = "abilis,tb10x-gpio"; | 246 | compatible = "abilis,tb10x-gpio"; |
| @@ -244,9 +250,10 @@ · 3 unmodified lines | |||
| 244 | interrupts = <27 2>; | 250 | interrupts = <27 2>; |
| 245 | reg = <0xFF146000 0x1000>; | 251 | reg = <0xFF146000 0x1000>; |
| 246 | gpio-controller; | 252 | gpio-controller; |
| 247 | #gpio-cells = <1>; | 253 | #gpio-cells = <2>; |
| 248 | gpio-base = <15>; | 254 | abilis,ngpio = <3>; |
| 249 | gpio-pins = <&pctl_gpio_g>; | 255 | gpio-ranges = <&iomux 0 0 0>; |
| 256 | gpio-ranges-group-names = "gpiog"; | ||
| 250 | }; | 257 | }; |
| 251 | gpioh: gpio@FF147000 { | 258 | gpioh: gpio@FF147000 { |
| 252 | compatible = "abilis,tb10x-gpio"; | 259 | compatible = "abilis,tb10x-gpio"; |
| @@ -256,9 +263,10 @@ · 3 unmodified lines | |||
| 256 | interrupts = <27 2>; | 263 | interrupts = <27 2>; |
| 257 | reg = <0xFF147000 0x1000>; | 264 | reg = <0xFF147000 0x1000>; |
| 258 | gpio-controller; | 265 | gpio-controller; |
| 259 | #gpio-cells = <1>; | 266 | #gpio-cells = <2>; |
| 260 | gpio-base = <18>; | 267 | abilis,ngpio = <2>; |
| 261 | gpio-pins = <&pctl_gpio_h>; | 268 | gpio-ranges = <&iomux 0 0 0>; |
| 269 | gpio-ranges-group-names = "gpioh"; | ||
| 262 | }; | 270 | }; |
| 263 | gpioi: gpio@FF148000 { | 271 | gpioi: gpio@FF148000 { |
| 264 | compatible = "abilis,tb10x-gpio"; | 272 | compatible = "abilis,tb10x-gpio"; |
| @@ -268,9 +276,10 @@ · 3 unmodified lines | |||
| 268 | interrupts = <27 2>; | 276 | interrupts = <27 2>; |
| 269 | reg = <0xFF148000 0x1000>; | 277 | reg = <0xFF148000 0x1000>; |
| 270 | gpio-controller; | 278 | gpio-controller; |
| 271 | #gpio-cells = <1>; | 279 | #gpio-cells = <2>; |
| 272 | gpio-base = <20>; | 280 | abilis,ngpio = <12>; |
| 273 | gpio-pins = <&pctl_gpio_i>; | 281 | gpio-ranges = <&iomux 0 0 0>; |
| 282 | gpio-ranges-group-names = "gpioi"; | ||
| 274 | }; | 283 | }; |
| 275 | gpioj: gpio@FF149000 { | 284 | gpioj: gpio@FF149000 { |
| 276 | compatible = "abilis,tb10x-gpio"; | 285 | compatible = "abilis,tb10x-gpio"; |
| @@ -280,9 +289,10 @@ · 3 unmodified lines | |||
| 280 | interrupts = <27 2>; | 289 | interrupts = <27 2>; |
| 281 | reg = <0xFF149000 0x1000>; | 290 | reg = <0xFF149000 0x1000>; |
| 282 | gpio-controller; | 291 | gpio-controller; |
| 283 | #gpio-cells = <1>; | 292 | #gpio-cells = <2>; |
| 284 | gpio-base = <32>; | 293 | abilis,ngpio = <32>; |
| 285 | gpio-pins = <&pctl_gpio_j>; | 294 | gpio-ranges = <&iomux 0 0 0>; |
| 295 | gpio-ranges-group-names = "gpioj"; | ||
| 286 | }; | 296 | }; |
| 287 | gpiok: gpio@FF14a000 { | 297 | gpiok: gpio@FF14a000 { |
| 288 | compatible = "abilis,tb10x-gpio"; | 298 | compatible = "abilis,tb10x-gpio"; |
| @@ -292,9 +302,10 @@ · 3 unmodified lines | |||
| 292 | interrupts = <27 2>; | 302 | interrupts = <27 2>; |
| 293 | reg = <0xFF14A000 0x1000>; | 303 | reg = <0xFF14A000 0x1000>; |
| 294 | gpio-controller; | 304 | gpio-controller; |
| 295 | #gpio-cells = <1>; | 305 | #gpio-cells = <2>; |
| 296 | gpio-base = <64>; | 306 | abilis,ngpio = <22>; |
| 297 | gpio-pins = <&pctl_gpio_k>; | 307 | gpio-ranges = <&iomux 0 0 0>; |
| 308 | gpio-ranges-group-names = "gpiok"; | ||
| 298 | }; | 309 | }; |
| 299 | gpiol: gpio@FF14b000 { | 310 | gpiol: gpio@FF14b000 { |
| 300 | compatible = "abilis,tb10x-gpio"; | 311 | compatible = "abilis,tb10x-gpio"; |
| @@ -304,9 +315,10 @@ · 3 unmodified lines | |||
| 304 | interrupts = <27 2>; | 315 | interrupts = <27 2>; |
| 305 | reg = <0xFF14B000 0x1000>; | 316 | reg = <0xFF14B000 0x1000>; |
| 306 | gpio-controller; | 317 | gpio-controller; |
| 307 | #gpio-cells = <1>; | 318 | #gpio-cells = <2>; |
| 308 | gpio-base = <86>; | 319 | abilis,ngpio = <4>; |
| 309 | gpio-pins = <&pctl_gpio_l>; | 320 | gpio-ranges = <&iomux 0 0 0>; |
| 321 | gpio-ranges-group-names = "gpiol"; | ||
| 310 | }; | 322 | }; |
| 311 | gpiom: gpio@FF14c000 { | 323 | gpiom: gpio@FF14c000 { |
| 312 | compatible = "abilis,tb10x-gpio"; | 324 | compatible = "abilis,tb10x-gpio"; |
| @@ -316,9 +328,10 @@ · 3 unmodified lines | |||
| 316 | interrupts = <27 2>; | 328 | interrupts = <27 2>; |
| 317 | reg = <0xFF14C000 0x1000>; | 329 | reg = <0xFF14C000 0x1000>; |
| 318 | gpio-controller; | 330 | gpio-controller; |
| 319 | #gpio-cells = <1>; | 331 | #gpio-cells = <2>; |
| 320 | gpio-base = <90>; | 332 | abilis,ngpio = <4>; |
| 321 | gpio-pins = <&pctl_gpio_m>; | 333 | gpio-ranges = <&iomux 0 0 0>; |
| 334 | gpio-ranges-group-names = "gpiom"; | ||
| 322 | }; | 335 | }; |
| 323 | gpion: gpio@FF14d000 { | 336 | gpion: gpio@FF14d000 { |
| 324 | compatible = "abilis,tb10x-gpio"; | 337 | compatible = "abilis,tb10x-gpio"; |
| @@ -328,9 +341,10 @@ · 3 unmodified lines | |||
| 328 | interrupts = <27 2>; | 341 | interrupts = <27 2>; |
| 329 | reg = <0xFF14D000 0x1000>; | 342 | reg = <0xFF14D000 0x1000>; |
| 330 | gpio-controller; | 343 | gpio-controller; |
| 331 | #gpio-cells = <1>; | 344 | #gpio-cells = <2>; |
| 332 | gpio-base = <94>; | 345 | abilis,ngpio = <5>; |
| 333 | gpio-pins = <&pctl_gpio_n>; | 346 | gpio-ranges = <&iomux 0 0 0>; |
| 347 | gpio-ranges-group-names = "gpion"; | ||
| 334 | }; | 348 | }; |
| 335 | }; | 349 | }; |
| 336 | }; | 350 | }; |
| @@ -64,62 +64,62 @@ · 63 unmodified lines | |||
| 64 | compatible = "gpio-leds"; | 64 | compatible = "gpio-leds"; |
| 65 | power { | 65 | power { |
| 66 | label = "Power"; | 66 | label = "Power"; |
| 67 | gpios = <&gpioi 0>; | 67 | gpios = <&gpioi 0 0>; |
| 68 | linux,default-trigger = "default-on"; | 68 | linux,default-trigger = "default-on"; |
| 69 | }; | 69 | }; |
| 70 | heartbeat { | 70 | heartbeat { |
| 71 | label = "Heartbeat"; | 71 | label = "Heartbeat"; |
| 72 | gpios = <&gpioi 1>; | 72 | gpios = <&gpioi 1 0>; |
| 73 | linux,default-trigger = "heartbeat"; | 73 | linux,default-trigger = "heartbeat"; |
| 74 | }; | 74 | }; |
| 75 | led2 { | 75 | led2 { |
| 76 | label = "LED2"; | 76 | label = "LED2"; |
| 77 | gpios = <&gpioi 2>; | 77 | gpios = <&gpioi 2 0>; |
| 78 | default-state = "off"; | 78 | default-state = "off"; |
| 79 | }; | 79 | }; |
| 80 | led3 { | 80 | led3 { |
| 81 | label = "LED3"; | 81 | label = "LED3"; |
| 82 | gpios = <&gpioi 3>; | 82 | gpios = <&gpioi 3 0>; |
| 83 | default-state = "off"; | 83 | default-state = "off"; |
| 84 | }; | 84 | }; |
| 85 | led4 { | 85 | led4 { |
| 86 | label = "LED4"; | 86 | label = "LED4"; |
| 87 | gpios = <&gpioi 4>; | 87 | gpios = <&gpioi 4 0>; |
| 88 | default-state = "off"; | 88 | default-state = "off"; |
| 89 | }; | 89 | }; |
| 90 | led5 { | 90 | led5 { |
| 91 | label = "LED5"; | 91 | label = "LED5"; |
| 92 | gpios = <&gpioi 5>; | 92 | gpios = <&gpioi 5 0>; |
| 93 | default-state = "off"; | 93 | default-state = "off"; |
| 94 | }; | 94 | }; |
| 95 | led6 { | 95 | led6 { |
| 96 | label = "LED6"; | 96 | label = "LED6"; |
| 97 | gpios = <&gpioi 6>; | 97 | gpios = <&gpioi 6 0>; |
| 98 | default-state = "off"; | 98 | default-state = "off"; |
| 99 | }; | 99 | }; |
| 100 | led7 { | 100 | led7 { |
| 101 | label = "LED7"; | 101 | label = "LED7"; |
| 102 | gpios = <&gpioi 7>; | 102 | gpios = <&gpioi 7 0>; |
| 103 | default-state = "off"; | 103 | default-state = "off"; |
| 104 | }; | 104 | }; |
| 105 | led8 { | 105 | led8 { |
| 106 | label = "LED8"; | 106 | label = "LED8"; |
| 107 | gpios = <&gpioi 8>; | 107 | gpios = <&gpioi 8 0>; |
| 108 | default-state = "off"; | 108 | default-state = "off"; |
| 109 | }; | 109 | }; |
| 110 | led9 { | 110 | led9 { |
| 111 | label = "LED9"; | 111 | label = "LED9"; |
| 112 | gpios = <&gpioi 9>; | 112 | gpios = <&gpioi 9 0>; |
| 113 | default-state = "off"; | 113 | default-state = "off"; |
| 114 | }; | 114 | }; |
| 115 | led10 { | 115 | led10 { |
| 116 | label = "LED10"; | 116 | label = "LED10"; |
| 117 | gpios = <&gpioi 10>; | 117 | gpios = <&gpioi 10 0>; |
| 118 | default-state = "off"; | 118 | default-state = "off"; |
| 119 | }; | 119 | }; |
| 120 | led11 { | 120 | led11 { |
| 121 | label = "LED11"; | 121 | label = "LED11"; |
| 122 | gpios = <&gpioi 11>; | 122 | gpios = <&gpioi 11 0>; |
| 123 | default-state = "off"; | 123 | default-state = "off"; |
| 124 | }; | 124 | }; |
| 125 | }; | 125 | }; |
| @@ -43,133 +43,133 @@ · 42 unmodified lines | |||
| 43 | iomux: iomux@FF10601c { | 43 | iomux: iomux@FF10601c { |
| 44 | /* Port 1 */ | 44 | /* Port 1 */ |
| 45 | pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ | 45 | pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ |
| 46 | pingrp = "mis0_pins"; | 46 | abilis,function = "mis0"; |
| 47 | }; | 47 | }; |
| 48 | pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ | 48 | pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ |
| 49 | pingrp = "mis1_pins"; | 49 | abilis,function = "mis1"; |
| 50 | }; | 50 | }; |
| 51 | pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ | 51 | pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ |
| 52 | pingrp = "gpioa_pins"; | 52 | abilis,function = "gpioa"; |
| 53 | }; | 53 | }; |
| 54 | pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */ | 54 | pctl_tsin_p1: pctl-tsin-p1 { /* Parallel TS-in 1 */ |
| 55 | pingrp = "mip1_pins"; | 55 | abilis,function = "mip1"; |
| 56 | }; | 56 | }; |
| 57 | /* Port 2 */ | 57 | /* Port 2 */ |
| 58 | pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */ | 58 | pctl_tsin_s2: pctl-tsin-s2 { /* Serial TS-in 2 */ |
| 59 | pingrp = "mis2_pins"; | 59 | abilis,function = "mis2"; |
| 60 | }; | 60 | }; |
| 61 | pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */ | 61 | pctl_tsin_s3: pctl-tsin-s3 { /* Serial TS-in 3 */ |
| 62 | pingrp = "mis3_pins"; | 62 | abilis,function = "mis3"; |
| 63 | }; | 63 | }; |
| 64 | pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */ | 64 | pctl_gpio_c: pctl-gpio-c { /* GPIO bank C */ |
| 65 | pingrp = "gpioc_pins"; | 65 | abilis,function = "gpioc"; |
| 66 | }; | 66 | }; |
| 67 | pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */ | 67 | pctl_tsin_p3: pctl-tsin-p3 { /* Parallel TS-in 3 */ |
| 68 | pingrp = "mip3_pins"; | 68 | abilis,function = "mip3"; |
| 69 | }; | 69 | }; |
| 70 | /* Port 3 */ | 70 | /* Port 3 */ |
| 71 | pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */ | 71 | pctl_tsin_s4: pctl-tsin-s4 { /* Serial TS-in 4 */ |
| 72 | pingrp = "mis4_pins"; | 72 | abilis,function = "mis4"; |
| 73 | }; | 73 | }; |
| 74 | pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */ | 74 | pctl_tsin_s5: pctl-tsin-s5 { /* Serial TS-in 5 */ |
| 75 | pingrp = "mis5_pins"; | 75 | abilis,function = "mis5"; |
| 76 | }; | 76 | }; |
| 77 | pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */ | 77 | pctl_gpio_e: pctl-gpio-e { /* GPIO bank E */ |
| 78 | pingrp = "gpioe_pins"; | 78 | abilis,function = "gpioe"; |
| 79 | }; | 79 | }; |
| 80 | pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */ | 80 | pctl_tsin_p5: pctl-tsin-p5 { /* Parallel TS-in 5 */ |
| 81 | pingrp = "mip5_pins"; | 81 | abilis,function = "mip5"; |
| 82 | }; | 82 | }; |
| 83 | /* Port 4 */ | 83 | /* Port 4 */ |
| 84 | pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */ | 84 | pctl_tsin_s6: pctl-tsin-s6 { /* Serial TS-in 6 */ |
| 85 | pingrp = "mis6_pins"; | 85 | abilis,function = "mis6"; |
| 86 | }; | 86 | }; |
| 87 | pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */ | 87 | pctl_tsin_s7: pctl-tsin-s7 { /* Serial TS-in 7 */ |
| 88 | pingrp = "mis7_pins"; | 88 | abilis,function = "mis7"; |
| 89 | }; | 89 | }; |
| 90 | pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */ | 90 | pctl_gpio_g: pctl-gpio-g { /* GPIO bank G */ |
| 91 | pingrp = "gpiog_pins"; | 91 | abilis,function = "gpiog"; |
| 92 | }; | 92 | }; |
| 93 | pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */ | 93 | pctl_tsin_p7: pctl-tsin-p7 { /* Parallel TS-in 7 */ |
| 94 | pingrp = "mip7_pins"; | 94 | abilis,function = "mip7"; |
| 95 | }; | 95 | }; |
| 96 | /* Port 5 */ | 96 | /* Port 5 */ |
| 97 | pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */ | 97 | pctl_gpio_j: pctl-gpio-j { /* GPIO bank J */ |
| 98 | pingrp = "gpioj_pins"; | 98 | abilis,function = "gpioj"; |
| 99 | }; | 99 | }; |
| 100 | pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */ | 100 | pctl_gpio_k: pctl-gpio-k { /* GPIO bank K */ |
| 101 | pingrp = "gpiok_pins"; | 101 | abilis,function = "gpiok"; |
| 102 | }; | 102 | }; |
| 103 | pctl_ciplus: pctl-ciplus { /* CI+ interface */ | 103 | pctl_ciplus: pctl-ciplus { /* CI+ interface */ |
| 104 | pingrp = "ciplus_pins"; | 104 | abilis,function = "ciplus"; |
| 105 | }; | 105 | }; |
| 106 | pctl_mcard: pctl-mcard { /* M-Card interface */ | 106 | pctl_mcard: pctl-mcard { /* M-Card interface */ |
| 107 | pingrp = "mcard_pins"; | 107 | abilis,function = "mcard"; |
| 108 | }; | 108 | }; |
| 109 | pctl_stc0: pctl-stc0 { /* Smart card I/F 0 */ | 109 | pctl_stc0: pctl-stc0 { /* Smart card I/F 0 */ |
| 110 | pingrp = "stc0_pins"; | 110 | abilis,function = "stc0"; |
| 111 | }; | 111 | }; |
| 112 | pctl_stc1: pctl-stc1 { /* Smart card I/F 1 */ | 112 | pctl_stc1: pctl-stc1 { /* Smart card I/F 1 */ |
| 113 | pingrp = "stc1_pins"; | 113 | abilis,function = "stc1"; |
| 114 | }; | 114 | }; |
| 115 | /* Port 6 */ | 115 | /* Port 6 */ |
| 116 | pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */ | 116 | pctl_tsout_p: pctl-tsout-p { /* Parallel TS-out */ |
| 117 | pingrp = "mop_pins"; | 117 | abilis,function = "mop"; |
| 118 | }; | 118 | }; |
| 119 | pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */ | 119 | pctl_tsout_s0: pctl-tsout-s0 { /* Serial TS-out 0 */ |
| 120 | pingrp = "mos0_pins"; | 120 | abilis,function = "mos0"; |
| 121 | }; | 121 | }; |
| 122 | pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */ | 122 | pctl_tsout_s1: pctl-tsout-s1 { /* Serial TS-out 1 */ |
| 123 | pingrp = "mos1_pins"; | 123 | abilis,function = "mos1"; |
| 124 | }; | 124 | }; |
| 125 | pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */ | 125 | pctl_tsout_s2: pctl-tsout-s2 { /* Serial TS-out 2 */ |
| 126 | pingrp = "mos2_pins"; | 126 | abilis,function = "mos2"; |
| 127 | }; | 127 | }; |
| 128 | pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */ | 128 | pctl_tsout_s3: pctl-tsout-s3 { /* Serial TS-out 3 */ |
| 129 | pingrp = "mos3_pins"; | 129 | abilis,function = "mos3"; |
| 130 | }; | 130 | }; |
| 131 | /* Port 7 */ | 131 | /* Port 7 */ |
| 132 | pctl_uart0: pctl-uart0 { /* UART 0 */ | 132 | pctl_uart0: pctl-uart0 { /* UART 0 */ |
| 133 | pingrp = "uart0_pins"; | 133 | abilis,function = "uart0"; |
| 134 | }; | 134 | }; |
| 135 | pctl_uart1: pctl-uart1 { /* UART 1 */ | 135 | pctl_uart1: pctl-uart1 { /* UART 1 */ |
| 136 | pingrp = "uart1_pins"; | 136 | abilis,function = "uart1"; |
| 137 | }; | 137 | }; |
| 138 | pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */ | 138 | pctl_gpio_l: pctl-gpio-l { /* GPIO bank L */ |
| 139 | pingrp = "gpiol_pins"; | 139 | abilis,function = "gpiol"; |
| 140 | }; | 140 | }; |
| 141 | pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */ | 141 | pctl_gpio_m: pctl-gpio-m { /* GPIO bank M */ |
| 142 | pingrp = "gpiom_pins"; | 142 | abilis,function = "gpiom"; |
| 143 | }; | 143 | }; |
| 144 | /* Port 8 */ | 144 | /* Port 8 */ |
| 145 | pctl_spi3: pctl-spi3 { | 145 | pctl_spi3: pctl-spi3 { |
| 146 | pingrp = "spi3_pins"; | 146 | abilis,function = "spi3"; |
| 147 | }; | 147 | }; |
| 148 | pctl_jtag: pctl-jtag { | 148 | pctl_jtag: pctl-jtag { |
| 149 | pingrp = "jtag_pins"; | 149 | abilis,function = "jtag"; |
| 150 | }; | 150 | }; |
| 151 | /* Port 9 */ | 151 | /* Port 9 */ |
| 152 | pctl_spi1: pctl-spi1 { | 152 | pctl_spi1: pctl-spi1 { |
| 153 | pingrp = "spi1_pins"; | 153 | abilis,function = "spi1"; |
| 154 | }; | 154 | }; |
| 155 | pctl_gpio_n: pctl-gpio-n { | 155 | pctl_gpio_n: pctl-gpio-n { |
| 156 | pingrp = "gpion_pins"; | 156 | abilis,function = "gpion"; |
| 157 | }; | 157 | }; |
| 158 | /* Unmuxed GPIOs */ | 158 | /* Unmuxed GPIOs */ |
| 159 | pctl_gpio_b: pctl-gpio-b { | 159 | pctl_gpio_b: pctl-gpio-b { |
| 160 | pingrp = "gpiob_pins"; | 160 | abilis,function = "gpiob"; |
| 161 | }; | 161 | }; |
| 162 | pctl_gpio_d: pctl-gpio-d { | 162 | pctl_gpio_d: pctl-gpio-d { |
| 163 | pingrp = "gpiod_pins"; | 163 | abilis,function = "gpiod"; |
| 164 | }; | 164 | }; |
| 165 | pctl_gpio_f: pctl-gpio-f { | 165 | pctl_gpio_f: pctl-gpio-f { |
| 166 | pingrp = "gpiof_pins"; | 166 | abilis,function = "gpiof"; |
| 167 | }; | 167 | }; |
| 168 | pctl_gpio_h: pctl-gpio-h { | 168 | pctl_gpio_h: pctl-gpio-h { |
| 169 | pingrp = "gpioh_pins"; | 169 | abilis,function = "gpioh"; |
| 170 | }; | 170 | }; |
| 171 | pctl_gpio_i: pctl-gpio-i { | 171 | pctl_gpio_i: pctl-gpio-i { |
| 172 | pingrp = "gpioi_pins"; | 172 | abilis,function = "gpioi"; |
| 173 | }; | 173 | }; |
| 174 | }; | 174 | }; |
| 175 | 175 | ||
| @@ -181,9 +181,10 @@ · 5 unmodified lines | |||
| 181 | interrupts = <27 2>; | 181 | interrupts = <27 2>; |
| 182 | reg = <0xFF140000 0x1000>; | 182 | reg = <0xFF140000 0x1000>; |
| 183 | gpio-controller; | 183 | gpio-controller; |
| 184 | #gpio-cells = <1>; | 184 | #gpio-cells = <2>; |
| 185 | gpio-base = <0>; | 185 | abilis,ngpio = <3>; |
| 186 | gpio-pins = <&pctl_gpio_a>; | 186 | gpio-ranges = <&iomux 0 0 0>; |
| 187 | gpio-ranges-group-names = "gpioa"; | ||
| 187 | }; | 188 | }; |
| 188 | gpiob: gpio@FF141000 { | 189 | gpiob: gpio@FF141000 { |
| 189 | compatible = "abilis,tb10x-gpio"; | 190 | compatible = "abilis,tb10x-gpio"; |
| @@ -193,9 +194,10 @@ · 3 unmodified lines | |||
| 193 | interrupts = <27 2>; | 194 | interrupts = <27 2>; |
| 194 | reg = <0xFF141000 0x1000>; | 195 | reg = <0xFF141000 0x1000>; |
| 195 | gpio-controller; | 196 | gpio-controller; |
| 196 | #gpio-cells = <1>; | 197 | #gpio-cells = <2>; |
| 197 | gpio-base = <3>; | 198 | abilis,ngpio = <2>; |
| 198 | gpio-pins = <&pctl_gpio_b>; | 199 | gpio-ranges = <&iomux 0 0 0>; |
| 200 | gpio-ranges-group-names = "gpiob"; | ||
| 199 | }; | 201 | }; |
| 200 | gpioc: gpio@FF142000 { | 202 | gpioc: gpio@FF142000 { |
| 201 | compatible = "abilis,tb10x-gpio"; | 203 | compatible = "abilis,tb10x-gpio"; |
| @@ -205,9 +207,10 @@ · 3 unmodified lines | |||
| 205 | interrupts = <27 2>; | 207 | interrupts = <27 2>; |
| 206 | reg = <0xFF142000 0x1000>; | 208 | reg = <0xFF142000 0x1000>; |
| 207 | gpio-controller; | 209 | gpio-controller; |
| 208 | #gpio-cells = <1>; | 210 | #gpio-cells = <2>; |
| 209 | gpio-base = <5>; | 211 | abilis,ngpio = <3>; |
| 210 | gpio-pins = <&pctl_gpio_c>; | 212 | gpio-ranges = <&iomux 0 0 0>; |
| 213 | gpio-ranges-group-names = "gpioc"; | ||
| 211 | }; | 214 | }; |
| 212 | gpiod: gpio@FF143000 { | 215 | gpiod: gpio@FF143000 { |
| 213 | compatible = "abilis,tb10x-gpio"; | 216 | compatible = "abilis,tb10x-gpio"; |
| @@ -217,9 +220,10 @@ · 3 unmodified lines | |||
| 217 | interrupts = <27 2>; | 220 | interrupts = <27 2>; |
| 218 | reg = <0xFF143000 0x1000>; | 221 | reg = <0xFF143000 0x1000>; |
| 219 | gpio-controller; | 222 | gpio-controller; |
| 220 | #gpio-cells = <1>; | 223 | #gpio-cells = <2>; |
| 221 | gpio-base = <8>; | 224 | abilis,ngpio = <2>; |
| 222 | gpio-pins = <&pctl_gpio_d>; | 225 | gpio-ranges = <&iomux 0 0 0>; |
| 226 | gpio-ranges-group-names = "gpiod"; | ||
| 223 | }; | 227 | }; |
| 224 | gpioe: gpio@FF144000 { | 228 | gpioe: gpio@FF144000 { |
| 225 | compatible = "abilis,tb10x-gpio"; | 229 | compatible = "abilis,tb10x-gpio"; |
| @@ -229,9 +233,10 @@ · 3 unmodified lines | |||
| 229 | interrupts = <27 2>; | 233 | interrupts = <27 2>; |
| 230 | reg = <0xFF144000 0x1000>; | 234 | reg = <0xFF144000 0x1000>; |
| 231 | gpio-controller; | 235 | gpio-controller; |
| 232 | #gpio-cells = <1>; | 236 | #gpio-cells = <2>; |
| 233 | gpio-base = <10>; | 237 | abilis,ngpio = <3>; |
| 234 | gpio-pins = <&pctl_gpio_e>; | 238 | gpio-ranges = <&iomux 0 0 0>; |
| 239 | gpio-ranges-group-names = "gpioe"; | ||
| 235 | }; | 240 | }; |
| 236 | gpiof: gpio@FF145000 { | 241 | gpiof: gpio@FF145000 { |
| 237 | compatible = "abilis,tb10x-gpio"; | 242 | compatible = "abilis,tb10x-gpio"; |
| @@ -241,9 +246,10 @@ · 3 unmodified lines | |||
| 241 | interrupts = <27 2>; | 246 | interrupts = <27 2>; |
| 242 | reg = <0xFF145000 0x1000>; | 247 | reg = <0xFF145000 0x1000>; |
| 243 | gpio-controller; | 248 | gpio-controller; |
| 244 | #gpio-cells = <1>; | 249 | #gpio-cells = <2>; |
| 245 | gpio-base = <13>; | 250 | abilis,ngpio = <2>; |
| 246 | gpio-pins = <&pctl_gpio_f>; | 251 | gpio-ranges = <&iomux 0 0 0>; |
| 252 | gpio-ranges-group-names = "gpiof"; | ||
| 247 | }; | 253 | }; |
| 248 | gpiog: gpio@FF146000 { | 254 | gpiog: gpio@FF146000 { |
| 249 | compatible = "abilis,tb10x-gpio"; | 255 | compatible = "abilis,tb10x-gpio"; |
| @@ -253,9 +259,10 @@ · 3 unmodified lines | |||
| 253 | interrupts = <27 2>; | 259 | interrupts = <27 2>; |
| 254 | reg = <0xFF146000 0x1000>; | 260 | reg = <0xFF146000 0x1000>; |
| 255 | gpio-controller; | 261 | gpio-controller; |
| 256 | #gpio-cells = <1>; | 262 | #gpio-cells = <2>; |
| 257 | gpio-base = <15>; | 263 | abilis,ngpio = <3>; |
| 258 | gpio-pins = <&pctl_gpio_g>; | 264 | gpio-ranges = <&iomux 0 0 0>; |
| 265 | gpio-ranges-group-names = "gpiog"; | ||
| 259 | }; | 266 | }; |
| 260 | gpioh: gpio@FF147000 { | 267 | gpioh: gpio@FF147000 { |
| 261 | compatible = "abilis,tb10x-gpio"; | 268 | compatible = "abilis,tb10x-gpio"; |
| @@ -265,9 +272,10 @@ · 3 unmodified lines | |||
| 265 | interrupts = <27 2>; | 272 | interrupts = <27 2>; |
| 266 | reg = <0xFF147000 0x1000>; | 273 | reg = <0xFF147000 0x1000>; |
| 267 | gpio-controller; | 274 | gpio-controller; |
| 268 | #gpio-cells = <1>; | 275 | #gpio-cells = <2>; |
| 269 | gpio-base = <18>; | 276 | abilis,ngpio = <2>; |
| 270 | gpio-pins = <&pctl_gpio_h>; | 277 | gpio-ranges = <&iomux 0 0 0>; |
| 278 | gpio-ranges-group-names = "gpioh"; | ||
| 271 | }; | 279 | }; |
| 272 | gpioi: gpio@FF148000 { | 280 | gpioi: gpio@FF148000 { |
| 273 | compatible = "abilis,tb10x-gpio"; | 281 | compatible = "abilis,tb10x-gpio"; |
| @@ -277,9 +285,10 @@ · 3 unmodified lines | |||
| 277 | interrupts = <27 2>; | 285 | interrupts = <27 2>; |
| 278 | reg = <0xFF148000 0x1000>; | 286 | reg = <0xFF148000 0x1000>; |
| 279 | gpio-controller; | 287 | gpio-controller; |
| 280 | #gpio-cells = <1>; | 288 | #gpio-cells = <2>; |
| 281 | gpio-base = <20>; | 289 | abilis,ngpio = <12>; |
| 282 | gpio-pins = <&pctl_gpio_i>; | 290 | gpio-ranges = <&iomux 0 0 0>; |
| 291 | gpio-ranges-group-names = "gpioi"; | ||
| 283 | }; | 292 | }; |
| 284 | gpioj: gpio@FF149000 { | 293 | gpioj: gpio@FF149000 { |
| 285 | compatible = "abilis,tb10x-gpio"; | 294 | compatible = "abilis,tb10x-gpio"; |
| @@ -289,9 +298,10 @@ · 3 unmodified lines | |||
| 289 | interrupts = <27 2>; | 298 | interrupts = <27 2>; |
| 290 | reg = <0xFF149000 0x1000>; | 299 | reg = <0xFF149000 0x1000>; |
| 291 | gpio-controller; | 300 | gpio-controller; |
| 292 | #gpio-cells = <1>; | 301 | #gpio-cells = <2>; |
| 293 | gpio-base = <32>; | 302 | abilis,ngpio = <32>; |
| 294 | gpio-pins = <&pctl_gpio_j>; | 303 | gpio-ranges = <&iomux 0 0 0>; |
| 304 | gpio-ranges-group-names = "gpioj"; | ||
| 295 | }; | 305 | }; |
| 296 | gpiok: gpio@FF14a000 { | 306 | gpiok: gpio@FF14a000 { |
| 297 | compatible = "abilis,tb10x-gpio"; | 307 | compatible = "abilis,tb10x-gpio"; |
| @@ -301,9 +311,10 @@ · 3 unmodified lines | |||
| 301 | interrupts = <27 2>; | 311 | interrupts = <27 2>; |
| 302 | reg = <0xFF14A000 0x1000>; | 312 | reg = <0xFF14A000 0x1000>; |
| 303 | gpio-controller; | 313 | gpio-controller; |
| 304 | #gpio-cells = <1>; | 314 | #gpio-cells = <2>; |
| 305 | gpio-base = <64>; | 315 | abilis,ngpio = <22>; |
| 306 | gpio-pins = <&pctl_gpio_k>; | 316 | gpio-ranges = <&iomux 0 0 0>; |
| 317 | gpio-ranges-group-names = "gpiok"; | ||
| 307 | }; | 318 | }; |
| 308 | gpiol: gpio@FF14b000 { | 319 | gpiol: gpio@FF14b000 { |
| 309 | compatible = "abilis,tb10x-gpio"; | 320 | compatible = "abilis,tb10x-gpio"; |
| @@ -313,9 +324,10 @@ · 3 unmodified lines | |||
| 313 | interrupts = <27 2>; | 324 | interrupts = <27 2>; |
| 314 | reg = <0xFF14B000 0x1000>; | 325 | reg = <0xFF14B000 0x1000>; |
| 315 | gpio-controller; | 326 | gpio-controller; |
| 316 | #gpio-cells = <1>; | 327 | #gpio-cells = <2>; |
| 317 | gpio-base = <86>; | 328 | abilis,ngpio = <4>; |
| 318 | gpio-pins = <&pctl_gpio_l>; | 329 | gpio-ranges = <&iomux 0 0 0>; |
| 330 | gpio-ranges-group-names = "gpiol"; | ||
| 319 | }; | 331 | }; |
| 320 | gpiom: gpio@FF14c000 { | 332 | gpiom: gpio@FF14c000 { |
| 321 | compatible = "abilis,tb10x-gpio"; | 333 | compatible = "abilis,tb10x-gpio"; |
| @@ -325,9 +337,10 @@ · 3 unmodified lines | |||
| 325 | interrupts = <27 2>; | 337 | interrupts = <27 2>; |
| 326 | reg = <0xFF14C000 0x1000>; | 338 | reg = <0xFF14C000 0x1000>; |
| 327 | gpio-controller; | 339 | gpio-controller; |
| 328 | #gpio-cells = <1>; | 340 | #gpio-cells = <2>; |
| 329 | gpio-base = <90>; | 341 | abilis,ngpio = <4>; |
| 330 | gpio-pins = <&pctl_gpio_m>; | 342 | gpio-ranges = <&iomux 0 0 0>; |
| 343 | gpio-ranges-group-names = "gpiom"; | ||
| 331 | }; | 344 | }; |
| 332 | gpion: gpio@FF14d000 { | 345 | gpion: gpio@FF14d000 { |
| 333 | compatible = "abilis,tb10x-gpio"; | 346 | compatible = "abilis,tb10x-gpio"; |
| @@ -337,9 +350,10 @@ · 3 unmodified lines | |||
| 337 | interrupts = <27 2>; | 350 | interrupts = <27 2>; |
| 338 | reg = <0xFF14D000 0x1000>; | 351 | reg = <0xFF14D000 0x1000>; |
| 339 | gpio-controller; | 352 | gpio-controller; |
| 340 | #gpio-cells = <1>; | 353 | #gpio-cells = <2>; |
| 341 | gpio-base = <94>; | 354 | abilis,ngpio = <5>; |
| 342 | gpio-pins = <&pctl_gpio_n>; | 355 | gpio-ranges = <&iomux 0 0 0>; |
| 356 | gpio-ranges-group-names = "gpion"; | ||
| 343 | }; | 357 | }; |
| 344 | }; | 358 | }; |
| 345 | }; | 359 | }; |
| @@ -64,62 +64,62 @@ · 63 unmodified lines | |||
| 64 | compatible = "gpio-leds"; | 64 | compatible = "gpio-leds"; |
| 65 | power { | 65 | power { |
| 66 | label = "Power"; | 66 | label = "Power"; |
| 67 | gpios = <&gpioi 0>; | 67 | gpios = <&gpioi 0 0>; |
| 68 | linux,default-trigger = "default-on"; | 68 | linux,default-trigger = "default-on"; |
| 69 | }; | 69 | }; |
| 70 | heartbeat { | 70 | heartbeat { |
| 71 | label = "Heartbeat"; | 71 | label = "Heartbeat"; |
| 72 | gpios = <&gpioi 1>; | 72 | gpios = <&gpioi 1 0>; |
| 73 | linux,default-trigger = "heartbeat"; | 73 | linux,default-trigger = "heartbeat"; |
| 74 | }; | 74 | }; |
| 75 | led2 { | 75 | led2 { |
| 76 | label = "LED2"; | 76 | label = "LED2"; |
| 77 | gpios = <&gpioi 2>; | 77 | gpios = <&gpioi 2 0>; |
| 78 | default-state = "off"; | 78 | default-state = "off"; |
| 79 | }; | 79 | }; |
| 80 | led3 { | 80 | led3 { |
| 81 | label = "LED3"; | 81 | label = "LED3"; |
| 82 | gpios = <&gpioi 3>; | 82 | gpios = <&gpioi 3 0>; |
| 83 | default-state = "off"; | 83 | default-state = "off"; |
| 84 | }; | 84 | }; |
| 85 | led4 { | 85 | led4 { |
| 86 | label = "LED4"; | 86 | label = "LED4"; |
| 87 | gpios = <&gpioi 4>; | 87 | gpios = <&gpioi 4 0>; |
| 88 | default-state = "off"; | 88 | default-state = "off"; |
| 89 | }; | 89 | }; |
| 90 | led5 { | 90 | led5 { |
| 91 | label = "LED5"; | 91 | label = "LED5"; |
| 92 | gpios = <&gpioi 5>; | 92 | gpios = <&gpioi 5 0>; |
| 93 | default-state = "off"; | 93 | default-state = "off"; |
| 94 | }; | 94 | }; |
| 95 | led6 { | 95 | led6 { |
| 96 | label = "LED6"; | 96 | label = "LED6"; |
| 97 | gpios = <&gpioi 6>; | 97 | gpios = <&gpioi 6 0>; |
| 98 | default-state = "off"; | 98 | default-state = "off"; |
| 99 | }; | 99 | }; |
| 100 | led7 { | 100 | led7 { |
| 101 | label = "LED7"; | 101 | label = "LED7"; |
| 102 | gpios = <&gpioi 7>; | 102 | gpios = <&gpioi 7 0>; |
| 103 | default-state = "off"; | 103 | default-state = "off"; |
| 104 | }; | 104 | }; |
| 105 | led8 { | 105 | led8 { |
| 106 | label = "LED8"; | 106 | label = "LED8"; |
| 107 | gpios = <&gpioi 8>; | 107 | gpios = <&gpioi 8 0>; |
| 108 | default-state = "off"; | 108 | default-state = "off"; |
| 109 | }; | 109 | }; |
| 110 | led9 { | 110 | led9 { |
| 111 | label = "LED9"; | 111 | label = "LED9"; |
| 112 | gpios = <&gpioi 9>; | 112 | gpios = <&gpioi 9 0>; |
| 113 | default-state = "off"; | 113 | default-state = "off"; |
| 114 | }; | 114 | }; |
| 115 | led10 { | 115 | led10 { |
| 116 | label = "LED10"; | 116 | label = "LED10"; |
| 117 | gpios = <&gpioi 10>; | 117 | gpios = <&gpioi 10 0>; |
| 118 | default-state = "off"; | 118 | default-state = "off"; |
| 119 | }; | 119 | }; |
| 120 | led11 { | 120 | led11 { |
| 121 | label = "LED11"; | 121 | label = "LED11"; |
| 122 | gpios = <&gpioi 11>; | 122 | gpios = <&gpioi 11 0>; |
| 123 | default-state = "off"; | 123 | default-state = "off"; |
| 124 | }; | 124 | }; |
| 125 | }; | 125 | }; |
| @@ -62,9 +62,8 @@ · 61 unmodified lines | |||
| 62 | }; | 62 | }; |
| 63 | 63 | ||
| 64 | iomux: iomux@FF10601c { | 64 | iomux: iomux@FF10601c { |
| 65 | #address-cells = <1>; | ||
| 66 | #size-cells = <1>; | ||
| 67 | compatible = "abilis,tb10x-iomux"; | 65 | compatible = "abilis,tb10x-iomux"; |
| 66 | #gpio-range-cells = <3>; | ||
| 68 | reg = <0xFF10601c 0x4>; | 67 | reg = <0xFF10601c 0x4>; |
| 69 | }; | 68 | }; |
| 70 | 69 | ||
| @@ -67,5 +67,9 @@ · 66 unmodified lines | |||
| 67 | reg = <1>; | 67 | reg = <1>; |
| 68 | }; | 68 | }; |
| 69 | }; | 69 | }; |
| 70 | |||
| 71 | arcpmu0: pmu { | ||
| 72 | compatible = "snps,arc700-pmu"; | ||
| 73 | }; | ||
| 70 | }; | 74 | }; |
| 71 | }; | 75 | }; |
| @@ -2,6 +2,8 @@ CONFIG_CROSS_COMPILE="arc-linux-uclibc-" · 1 unmodified line | |||
| 2 | # CONFIG_LOCALVERSION_AUTO is not set | 2 | # CONFIG_LOCALVERSION_AUTO is not set |
| 3 | CONFIG_DEFAULT_HOSTNAME="ARCLinux" | 3 | CONFIG_DEFAULT_HOSTNAME="ARCLinux" |
| 4 | # CONFIG_SWAP is not set | 4 | # CONFIG_SWAP is not set |
| 5 | CONFIG_SYSVIPC=y | ||
| 6 | CONFIG_POSIX_MQUEUE=y | ||
| 5 | CONFIG_HIGH_RES_TIMERS=y | 7 | CONFIG_HIGH_RES_TIMERS=y |
| 6 | CONFIG_IKCONFIG=y | 8 | CONFIG_IKCONFIG=y |
| 7 | CONFIG_IKCONFIG_PROC=y | 9 | CONFIG_IKCONFIG_PROC=y |
| @@ -62,4 +64,5 @@ CONFIG_TMPFS=y · 54 unmodified lines | |||
| 62 | CONFIG_NFS_FS=y | 64 | CONFIG_NFS_FS=y |
| 63 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | 65 | # CONFIG_ENABLE_WARN_DEPRECATED is not set |
| 64 | # CONFIG_ENABLE_MUST_CHECK is not set | 66 | # CONFIG_ENABLE_MUST_CHECK is not set |
| 67 | # CONFIG_DEBUG_PREEMPT is not set | ||
| 65 | CONFIG_XZ_DEC=y | 68 | CONFIG_XZ_DEC=y |
| @@ -0,0 +1,64 @@ | |||
| 1 | CONFIG_CROSS_COMPILE="arc-linux-uclibc-" | ||
| 2 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 3 | CONFIG_DEFAULT_HOSTNAME="ARCLinux" | ||
| 4 | # CONFIG_SWAP is not set | ||
| 5 | CONFIG_HIGH_RES_TIMERS=y | ||
| 6 | CONFIG_IKCONFIG=y | ||
| 7 | CONFIG_IKCONFIG_PROC=y | ||
| 8 | CONFIG_NAMESPACES=y | ||
| 9 | # CONFIG_UTS_NS is not set | ||
| 10 | # CONFIG_PID_NS is not set | ||
| 11 | CONFIG_BLK_DEV_INITRD=y | ||
| 12 | CONFIG_KALLSYMS_ALL=y | ||
| 13 | CONFIG_EMBEDDED=y | ||
| 14 | # CONFIG_SLUB_DEBUG is not set | ||
| 15 | # CONFIG_COMPAT_BRK is not set | ||
| 16 | CONFIG_KPROBES=y | ||
| 17 | CONFIG_MODULES=y | ||
| 18 | # CONFIG_LBDAF is not set | ||
| 19 | # CONFIG_BLK_DEV_BSG is not set | ||
| 20 | # CONFIG_IOSCHED_DEADLINE is not set | ||
| 21 | # CONFIG_IOSCHED_CFQ is not set | ||
| 22 | CONFIG_ARC_PLAT_FPGA_LEGACY=y | ||
| 23 | CONFIG_ARC_BOARD_ML509=y | ||
| 24 | # CONFIG_ARC_HAS_RTSC is not set | ||
| 25 | CONFIG_ARC_BUILTIN_DTB_NAME="angel4" | ||
| 26 | CONFIG_PREEMPT=y | ||
| 27 | # CONFIG_COMPACTION is not set | ||
| 28 | # CONFIG_CROSS_MEMORY_ATTACH is not set | ||
| 29 | CONFIG_NET=y | ||
| 30 | CONFIG_PACKET=y | ||
| 31 | CONFIG_UNIX=y | ||
| 32 | CONFIG_UNIX_DIAG=y | ||
| 33 | CONFIG_NET_KEY=y | ||
| 34 | CONFIG_INET=y | ||
| 35 | # CONFIG_IPV6 is not set | ||
| 36 | # CONFIG_STANDALONE is not set | ||
| 37 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
| 38 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
| 39 | # CONFIG_BLK_DEV is not set | ||
| 40 | CONFIG_NETDEVICES=y | ||
| 41 | CONFIG_ARC_EMAC=y | ||
| 42 | CONFIG_LXT_PHY=y | ||
| 43 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
| 44 | # CONFIG_INPUT_KEYBOARD is not set | ||
| 45 | # CONFIG_INPUT_MOUSE is not set | ||
| 46 | # CONFIG_SERIO is not set | ||
| 47 | # CONFIG_LEGACY_PTYS is not set | ||
| 48 | # CONFIG_DEVKMEM is not set | ||
| 49 | CONFIG_SERIAL_ARC=y | ||
| 50 | CONFIG_SERIAL_ARC_CONSOLE=y | ||
| 51 | # CONFIG_HW_RANDOM is not set | ||
| 52 | # CONFIG_HWMON is not set | ||
| 53 | # CONFIG_VGA_CONSOLE is not set | ||
| 54 | # CONFIG_HID is not set | ||
| 55 | # CONFIG_USB_SUPPORT is not set | ||
| 56 | # CONFIG_IOMMU_SUPPORT is not set | ||
| 57 | CONFIG_EXT2_FS=y | ||
| 58 | CONFIG_EXT2_FS_XATTR=y | ||
| 59 | CONFIG_TMPFS=y | ||
| 60 | # CONFIG_MISC_FILESYSTEMS is not set | ||
| 61 | CONFIG_NFS_FS=y | ||
| 62 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | ||
| 63 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
| 64 | CONFIG_XZ_DEC=y | ||
| @@ -46,3 +46,4 @@ generic-y += ucontext.h · 45 unmodified lines | |||
| 46 | generic-y += user.h | 46 | generic-y += user.h |
| 47 | generic-y += vga.h | 47 | generic-y += vga.h |
| 48 | generic-y += xor.h | 48 | generic-y += xor.h |
| 49 | generic-y += preempt.h | ||
| @@ -17,13 +17,7 @@ · 16 unmodified lines | |||
| 17 | #endif | 17 | #endif |
| 18 | 18 | ||
| 19 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | 19 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| 20 | 20 | #define CACHE_LINE_MASK (~(L1_CACHE_BYTES - 1)) | |
| 21 | /* For a rare case where customers have differently config I/D */ | ||
| 22 | #define ARC_ICACHE_LINE_LEN L1_CACHE_BYTES | ||
| 23 | #define ARC_DCACHE_LINE_LEN L1_CACHE_BYTES | ||
| 24 | |||
| 25 | #define ICACHE_LINE_MASK (~(ARC_ICACHE_LINE_LEN - 1)) | ||
| 26 | #define DCACHE_LINE_MASK (~(ARC_DCACHE_LINE_LEN - 1)) | ||
| 27 | 21 | ||
| 28 | /* | 22 | /* |
| 29 | * ARC700 doesn't cache any access in top 256M. | 23 | * ARC700 doesn't cache any access in top 256M. |
| @@ -18,8 +18,8 @@ · 17 unmodified lines | |||
| 18 | 18 | ||
| 19 | #include <asm-generic/irq.h> | 19 | #include <asm-generic/irq.h> |
| 20 | 20 | ||
| 21 | extern void __init arc_init_IRQ(void); | 21 | extern void arc_init_IRQ(void); |
| 22 | extern int __init get_hw_config_num_irq(void); | 22 | extern int get_hw_config_num_irq(void); |
| 23 | 23 | ||
| 24 | void arc_local_timer_setup(unsigned int cpu); | 24 | void arc_local_timer_setup(unsigned int cpu); |
| 25 | 25 | ||
| @@ -151,16 +151,38 @@ static inline void arch_unmask_irq(unsigned int irq) · 150 unmodified lines | |||
| 151 | 151 | ||
| 152 | #else | 152 | #else |
| 153 | 153 | ||
| 154 | #ifdef CONFIG_TRACE_IRQFLAGS | ||
| 155 | |||
| 156 | .macro TRACE_ASM_IRQ_DISABLE | ||
| 157 | bl trace_hardirqs_off | ||
| 158 | .endm | ||
| 159 | |||
| 160 | .macro TRACE_ASM_IRQ_ENABLE | ||
| 161 | bl trace_hardirqs_on | ||
| 162 | .endm | ||
| 163 | |||
| 164 | #else | ||
| 165 | |||
| 166 | .macro TRACE_ASM_IRQ_DISABLE | ||
| 167 | .endm | ||
| 168 | |||
| 169 | .macro TRACE_ASM_IRQ_ENABLE | ||
| 170 | .endm | ||
| 171 | |||
| 172 | #endif | ||
| 173 | |||
| 154 | .macro IRQ_DISABLE scratch | 174 | .macro IRQ_DISABLE scratch |
| 155 | lr \scratch, [status32] | 175 | lr \scratch, [status32] |
| 156 | bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) | 176 | bic \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) |
| 157 | flag \scratch | 177 | flag \scratch |
| 178 | TRACE_ASM_IRQ_DISABLE | ||
| 158 | .endm | 179 | .endm |
| 159 | 180 | ||
| 160 | .macro IRQ_ENABLE scratch | 181 | .macro IRQ_ENABLE scratch |
| 161 | lr \scratch, [status32] | 182 | lr \scratch, [status32] |
| 162 | or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) | 183 | or \scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK) |
| 163 | flag \scratch | 184 | flag \scratch |
| 185 | TRACE_ASM_IRQ_ENABLE | ||
| 164 | .endm | 186 | .endm |
| 165 | 187 | ||
| 166 | #endif /* __ASSEMBLY__ */ | 188 | #endif /* __ASSEMBLY__ */ |
| @@ -51,22 +51,12 @@ struct machine_desc { · 50 unmodified lines | |||
| 51 | /* | 51 | /* |
| 52 | * Current machine - only accessible during boot. | 52 | * Current machine - only accessible during boot. |
| 53 | */ | 53 | */ |
| 54 | extern struct machine_desc *machine_desc; | 54 | extern const struct machine_desc *machine_desc; |
| 55 | 55 | ||
| 56 | /* | 56 | /* |
| 57 | * Machine type table - also only accessible during boot | 57 | * Machine type table - also only accessible during boot |
| 58 | */ | 58 | */ |
| 59 | extern struct machine_desc __arch_info_begin[], __arch_info_end[]; | 59 | extern const struct machine_desc __arch_info_begin[], __arch_info_end[]; |
| 60 | #define for_each_machine_desc(p) \ | ||
| 61 | for (p = __arch_info_begin; p < __arch_info_end; p++) | ||
| 62 | |||
| 63 | static inline struct machine_desc *default_machine_desc(void) | ||
| 64 | { | ||
| 65 | /* the default machine is the last one linked in */ | ||
| 66 | if (__arch_info_end - 1 < __arch_info_begin) | ||
| 67 | return NULL; | ||
| 68 | return __arch_info_end - 1; | ||
| 69 | } | ||
| 70 | 60 | ||
| 71 | /* | 61 | /* |
| 72 | * Set of macros to define architecture features. | 62 | * Set of macros to define architecture features. |
| @@ -81,7 +71,6 @@ __attribute__((__section__(".arch.info.init"))) = { \ · 8 unmodified lines | |||
| 81 | #define MACHINE_END \ | 71 | #define MACHINE_END \ |
| 82 | }; | 72 | }; |
| 83 | 73 | ||
| 84 | extern struct machine_desc *setup_machine_fdt(void *dt); | 74 | extern const struct machine_desc *setup_machine_fdt(void *dt); |
| 85 | extern void __init copy_devtree(void); | ||
| 86 | 75 | ||
| 87 | #endif | 76 | #endif |
| @@ -48,7 +48,7 @@ · 47 unmodified lines | |||
| 48 | #ifndef __ASSEMBLY__ | 48 | #ifndef __ASSEMBLY__ |
| 49 | 49 | ||
| 50 | typedef struct { | 50 | typedef struct { |
| 51 | unsigned long asid; /* 8 bit MMU PID + Generation cycle */ | 51 | unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */ |
| 52 | } mm_context_t; | 52 | } mm_context_t; |
| 53 | 53 | ||
| 54 | #ifdef CONFIG_ARC_DBG_TLB_PARANOIA | 54 | #ifdef CONFIG_ARC_DBG_TLB_PARANOIA |
| @@ -30,13 +30,13 @@ · 29 unmodified lines | |||
| 30 | * "Fast Context Switch" i.e. no TLB flush on ctxt-switch | 30 | * "Fast Context Switch" i.e. no TLB flush on ctxt-switch |
| 31 | * | 31 | * |
| 32 | * Linux assigns each task a unique ASID. A simple round-robin allocation | 32 | * Linux assigns each task a unique ASID. A simple round-robin allocation |
| 33 | * of H/w ASID is done using software tracker @asid_cache. | 33 | * of H/w ASID is done using software tracker @asid_cpu. |
| 34 | * When it reaches max 255, the allocation cycle starts afresh by flushing | 34 | * When it reaches max 255, the allocation cycle starts afresh by flushing |
| 35 | * the entire TLB and wrapping ASID back to zero. | 35 | * the entire TLB and wrapping ASID back to zero. |
| 36 | * | 36 | * |
| 37 | * A new allocation cycle, post rollover, could potentially reassign an ASID | 37 | * A new allocation cycle, post rollover, could potentially reassign an ASID |
| 38 | * to a different task. Thus the rule is to refresh the ASID in a new cycle. | 38 | * to a different task. Thus the rule is to refresh the ASID in a new cycle. |
| 39 | * The 32 bit @asid_cache (and mm->asid) have 8 bits MMU PID and rest 24 bits | 39 | * The 32 bit @asid_cpu (and mm->asid) have 8 bits MMU PID and rest 24 bits |
| 40 | * serve as cycle/generation indicator and natural 32 bit unsigned math | 40 | * serve as cycle/generation indicator and natural 32 bit unsigned math |
| 41 | * automagically increments the generation when lower 8 bits rollover. | 41 | * automagically increments the generation when lower 8 bits rollover. |
| 42 | */ | 42 | */ |
| @@ -47,9 +47,11 @@ · 4 unmodified lines | |||
| 47 | #define MM_CTXT_FIRST_CYCLE (MM_CTXT_ASID_MASK + 1) | 47 | #define MM_CTXT_FIRST_CYCLE (MM_CTXT_ASID_MASK + 1) |
| 48 | #define MM_CTXT_NO_ASID 0UL | 48 | #define MM_CTXT_NO_ASID 0UL |
| 49 | 49 | ||
| 50 | #define hw_pid(mm) (mm->context.asid & MM_CTXT_ASID_MASK) | 50 | #define asid_mm(mm, cpu) mm->context.asid[cpu] |
| 51 | #define hw_pid(mm, cpu) (asid_mm(mm, cpu) & MM_CTXT_ASID_MASK) | ||
| 51 | 52 | ||
| 52 | extern unsigned int asid_cache; | 53 | DECLARE_PER_CPU(unsigned int, asid_cache); |
| 54 | #define asid_cpu(cpu) per_cpu(asid_cache, cpu) | ||
| 53 | 55 | ||
| 54 | /* | 56 | /* |
| 55 | * Get a new ASID if task doesn't have a valid one (unalloc or from prev cycle) | 57 | * Get a new ASID if task doesn't have a valid one (unalloc or from prev cycle) |
| @@ -57,6 +59,7 @@ extern unsigned int asid_cache; · 1 unmodified line | |||
| 57 | */ | 59 | */ |
| 58 | static inline void get_new_mmu_context(struct mm_struct *mm) | 60 | static inline void get_new_mmu_context(struct mm_struct *mm) |
| 59 | { | 61 | { |
| 62 | const unsigned int cpu = smp_processor_id(); | ||
| 60 | unsigned long flags; | 63 | unsigned long flags; |
| 61 | 64 | ||
| 62 | local_irq_save(flags); | 65 | local_irq_save(flags); |
| @@ -71,28 +74,28 @@ static inline void get_new_mmu_context(struct mm_struct *mm) · 8 unmodified lines | |||
| 71 | * first need to destroy the context, setting it to invalid | 74 | * first need to destroy the context, setting it to invalid |
| 72 | * value. | 75 | * value. |
| 73 | */ | 76 | */ |
| 74 | if (!((mm->context.asid ^ asid_cache) & MM_CTXT_CYCLE_MASK)) | 77 | if (!((asid_mm(mm, cpu) ^ asid_cpu(cpu)) & MM_CTXT_CYCLE_MASK)) |
| 75 | goto set_hw; | 78 | goto set_hw; |
| 76 | 79 | ||
| 77 | /* move to new ASID and handle rollover */ | 80 | /* move to new ASID and handle rollover */ |
| 78 | if (unlikely(!(++asid_cache & MM_CTXT_ASID_MASK))) { | 81 | if (unlikely(!(++asid_cpu(cpu) & MM_CTXT_ASID_MASK))) { |
| 79 | 82 | ||
| 80 | flush_tlb_all(); | 83 | local_flush_tlb_all(); |
| 81 | 84 | ||
| 82 | /* | 85 | /* |
| 83 | * Above checke for rollover of 8 bit ASID in 32 bit container. | 86 | * Above checke for rollover of 8 bit ASID in 32 bit container. |
| 84 | * If the container itself wrapped around, set it to a non zero | 87 | * If the container itself wrapped around, set it to a non zero |
| 85 | * "generation" to distinguish from no context | 88 | * "generation" to distinguish from no context |
| 86 | */ | 89 | */ |
| 87 | if (!asid_cache) | 90 | if (!asid_cpu(cpu)) |
| 88 | asid_cache = MM_CTXT_FIRST_CYCLE; | 91 | asid_cpu(cpu) = MM_CTXT_FIRST_CYCLE; |
| 89 | } | 92 | } |
| 90 | 93 | ||
| 91 | /* Assign new ASID to tsk */ | 94 | /* Assign new ASID to tsk */ |
| 92 | mm->context.asid = asid_cache; | 95 | asid_mm(mm, cpu) = asid_cpu(cpu); |
| 93 | 96 | ||
| 94 | set_hw: | 97 | set_hw: |
| 95 | write_aux_reg(ARC_REG_PID, hw_pid(mm) | MMU_ENABLE); | 98 | write_aux_reg(ARC_REG_PID, hw_pid(mm, cpu) | MMU_ENABLE); |
| 96 | 99 | ||
| 97 | local_irq_restore(flags); | 100 | local_irq_restore(flags); |
| 98 | } | 101 | } |
| @@ -104,16 +107,45 @@ set_hw: · 5 unmodified lines | |||
| 104 | static inline int | 107 | static inline int |
| 105 | init_new_context(struct task_struct *tsk, struct mm_struct *mm) | 108 | init_new_context(struct task_struct *tsk, struct mm_struct *mm) |
| 106 | { | 109 | { |
| 107 | mm->context.asid = MM_CTXT_NO_ASID; | 110 | int i; |
| 111 | |||
| 112 | for_each_possible_cpu(i) | ||
| 113 | asid_mm(mm, i) = MM_CTXT_NO_ASID; | ||
| 114 | |||
| 108 | return 0; | 115 | return 0; |
| 109 | } | 116 | } |
| 110 | 117 | ||
| 118 | static inline void destroy_context(struct mm_struct *mm) | ||
| 119 | { | ||
| 120 | unsigned long flags; | ||
| 121 | |||
| 122 | /* Needed to elide CONFIG_DEBUG_PREEMPT warning */ | ||
| 123 | local_irq_save(flags); | ||
| 124 | asid_mm(mm, smp_processor_id()) = MM_CTXT_NO_ASID; | ||
| 125 | local_irq_restore(flags); | ||
| 126 | } | ||
| 127 | |||
| 111 | /* Prepare the MMU for task: setup PID reg with allocated ASID | 128 | /* Prepare the MMU for task: setup PID reg with allocated ASID |
| 112 | If task doesn't have an ASID (never alloc or stolen, get a new ASID) | 129 | If task doesn't have an ASID (never alloc or stolen, get a new ASID) |
| 113 | */ | 130 | */ |
| 114 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | 131 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
| 115 | struct task_struct *tsk) | 132 | struct task_struct *tsk) |
| 116 | { | 133 | { |
| 134 | const int cpu = smp_processor_id(); | ||
| 135 | |||
| 136 | /* | ||
| 137 | * Note that the mm_cpumask is "aggregating" only, we don't clear it | ||
| 138 | * for the switched-out task, unlike some other arches. | ||
| 139 | * It is used to enlist cpus for sending TLB flush IPIs and not sending | ||
| 140 | * it to CPUs where a task once ran-on, could cause stale TLB entry | ||
| 141 | * re-use, specially for a multi-threaded task. | ||
| 142 | * e.g. T1 runs on C1, migrates to C3. T2 running on C2 munmaps. | ||
| 143 | * For a non-aggregating mm_cpumask, IPI not sent C1, and if T1 | ||
| 144 | * were to re-migrate to C1, it could access the unmapped region | ||
| 145 | * via any existing stale TLB entries. | ||
| 146 | */ | ||
| 147 | cpumask_set_cpu(cpu, mm_cpumask(next)); | ||
| 148 | |||
| 117 | #ifndef CONFIG_SMP | 149 | #ifndef CONFIG_SMP |
| 118 | /* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */ | 150 | /* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */ |
| 119 | write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd); | 151 | write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd); |
| @@ -131,11 +163,6 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, · 11 unmodified lines | |||
| 131 | */ | 163 | */ |
| 132 | #define activate_mm(prev, next) switch_mm(prev, next, NULL) | 164 | #define activate_mm(prev, next) switch_mm(prev, next, NULL) |
| 133 | 165 | ||
| 134 | static inline void destroy_context(struct mm_struct *mm) | ||
| 135 | { | ||
| 136 | mm->context.asid = MM_CTXT_NO_ASID; | ||
| 137 | } | ||
| 138 | |||
| 139 | /* it seemed that deactivate_mm( ) is a reasonable place to do book-keeping | 166 | /* it seemed that deactivate_mm( ) is a reasonable place to do book-keeping |
| 140 | * for retiring-mm. However destroy_context( ) still needs to do that because | 167 | * for retiring-mm. However destroy_context( ) still needs to do that because |
| 141 | * between mm_release( ) = >deactive_mm( ) and | 168 | * between mm_release( ) = >deactive_mm( ) and |
| @@ -1,5 +1,7 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2011-2012 Synopsys, Inc. (www.synopsys.com) | 2 | * Linux performance counter support for ARC |
| 3 | * | ||
| 4 | * Copyright (C) 2011-2013 Synopsys, Inc. (www.synopsys.com) | ||
| 3 | * | 5 | * |
| 4 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
| @@ -10,4 +12,204 @@ · 4 unmodified lines | |||
| 10 | #ifndef __ASM_PERF_EVENT_H | 12 | #ifndef __ASM_PERF_EVENT_H |
| 11 | #define __ASM_PERF_EVENT_H | 13 | #define __ASM_PERF_EVENT_H |
| 12 | 14 | ||
| 15 | /* real maximum varies per CPU, this is the maximum supported by the driver */ | ||
| 16 | #define ARC_PMU_MAX_HWEVENTS 64 | ||
| 17 | |||
| 18 | #define ARC_REG_CC_BUILD 0xF6 | ||
| 19 | #define ARC_REG_CC_INDEX 0x240 | ||
| 20 | #define ARC_REG_CC_NAME0 0x241 | ||
| 21 | #define ARC_REG_CC_NAME1 0x242 | ||
| 22 | |||
| 23 | #define ARC_REG_PCT_BUILD 0xF5 | ||
| 24 | #define ARC_REG_PCT_COUNTL 0x250 | ||
| 25 | #define ARC_REG_PCT_COUNTH 0x251 | ||
| 26 | #define ARC_REG_PCT_SNAPL 0x252 | ||
| 27 | #define ARC_REG_PCT_SNAPH 0x253 | ||
| 28 | #define ARC_REG_PCT_CONFIG 0x254 | ||
| 29 | #define ARC_REG_PCT_CONTROL 0x255 | ||
| 30 | #define ARC_REG_PCT_INDEX 0x256 | ||
| 31 | |||
| 32 | #define ARC_REG_PCT_CONTROL_CC (1 << 16) /* clear counts */ | ||
| 33 | #define ARC_REG_PCT_CONTROL_SN (1 << 17) /* snapshot */ | ||
| 34 | |||
| 35 | struct arc_reg_pct_build { | ||
| 36 | #ifdef CONFIG_CPU_BIG_ENDIAN | ||
| 37 | unsigned int m:8, c:8, r:6, s:2, v:8; | ||
| 38 | #else | ||
| 39 | unsigned int v:8, s:2, r:6, c:8, m:8; | ||
| 40 | #endif | ||
| 41 | }; | ||
| 42 | |||
| 43 | struct arc_reg_cc_build { | ||
| 44 | #ifdef CONFIG_CPU_BIG_ENDIAN | ||
| 45 | unsigned int c:16, r:8, v:8; | ||
| 46 | #else | ||
| 47 | unsigned int v:8, r:8, c:16; | ||
| 48 | #endif | ||
| 49 | }; | ||
| 50 | |||
| 51 | #define PERF_COUNT_ARC_DCLM (PERF_COUNT_HW_MAX + 0) | ||
| 52 | #define PERF_COUNT_ARC_DCSM (PERF_COUNT_HW_MAX + 1) | ||
| 53 | #define PERF_COUNT_ARC_ICM (PERF_COUNT_HW_MAX + 2) | ||
| 54 | #define PERF_COUNT_ARC_BPOK (PERF_COUNT_HW_MAX + 3) | ||
| 55 | #define PERF_COUNT_ARC_EDTLB (PERF_COUNT_HW_MAX + 4) | ||
| 56 | #define PERF_COUNT_ARC_EITLB (PERF_COUNT_HW_MAX + 5) | ||
| 57 | #define PERF_COUNT_ARC_HW_MAX (PERF_COUNT_HW_MAX + 6) | ||
| 58 | |||
| 59 | /* | ||
| 60 | * The "generalized" performance events seem to really be a copy | ||
| 61 | * of the available events on x86 processors; the mapping to ARC | ||
| 62 | * events is not always possible 1-to-1. Fortunately, there doesn't | ||
| 63 | * seem to be an exact definition for these events, so we can cheat | ||
| 64 | * a bit where necessary. | ||
| 65 | * | ||
| 66 | * In particular, the following PERF events may behave a bit differently | ||
| 67 | * compared to other architectures: | ||
| 68 | * | ||
| 69 | * PERF_COUNT_HW_CPU_CYCLES | ||
| 70 | * Cycles not in halted state | ||
| 71 | * | ||
| 72 | * PERF_COUNT_HW_REF_CPU_CYCLES | ||
| 73 | * Reference cycles not in halted state, same as PERF_COUNT_HW_CPU_CYCLES | ||
| 74 | * for now as we don't do Dynamic Voltage/Frequency Scaling (yet) | ||
| 75 | * | ||
| 76 | * PERF_COUNT_HW_BUS_CYCLES | ||
| 77 | * Unclear what this means, Intel uses 0x013c, which according to | ||
| 78 | * their datasheet means "unhalted reference cycles". It sounds similar | ||
| 79 | * to PERF_COUNT_HW_REF_CPU_CYCLES, and we use the same counter for it. | ||
| 80 | * | ||
| 81 | * PERF_COUNT_HW_STALLED_CYCLES_BACKEND | ||
| 82 | * PERF_COUNT_HW_STALLED_CYCLES_FRONTEND | ||
| 83 | * The ARC 700 can either measure stalls per pipeline stage, or all stalls | ||
| 84 | * combined; for now we assign all stalls to STALLED_CYCLES_BACKEND | ||
| 85 | * and all pipeline flushes (e.g. caused by mispredicts, etc.) to | ||
| 86 | * STALLED_CYCLES_FRONTEND. | ||
| 87 | * | ||
| 88 | * We could start multiple performance counters and combine everything | ||
| 89 | * afterwards, but that makes it complicated. | ||
| 90 | * | ||
| 91 | * Note that I$ cache misses aren't counted by either of the two! | ||
| 92 | */ | ||
| 93 | |||
| 94 | static const char * const arc_pmu_ev_hw_map[] = { | ||
| 95 | [PERF_COUNT_HW_CPU_CYCLES] = "crun", | ||
| 96 | [PERF_COUNT_HW_REF_CPU_CYCLES] = "crun", | ||
| 97 | [PERF_COUNT_HW_BUS_CYCLES] = "crun", | ||
| 98 | [PERF_COUNT_HW_INSTRUCTIONS] = "iall", | ||
| 99 | [PERF_COUNT_HW_BRANCH_MISSES] = "bpfail", | ||
| 100 | [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = "ijmp", | ||
| 101 | [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = "bflush", | ||
| 102 | [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = "bstall", | ||
| 103 | [PERF_COUNT_ARC_DCLM] = "dclm", | ||
| 104 | [PERF_COUNT_ARC_DCSM] = "dcsm", | ||
| 105 | [PERF_COUNT_ARC_ICM] = "icm", | ||
| 106 | [PERF_COUNT_ARC_BPOK] = "bpok", | ||
| 107 | [PERF_COUNT_ARC_EDTLB] = "edtlb", | ||
| 108 | [PERF_COUNT_ARC_EITLB] = "eitlb", | ||
| 109 | }; | ||
| 110 | |||
| 111 | #define C(_x) PERF_COUNT_HW_CACHE_##_x | ||
| 112 | #define CACHE_OP_UNSUPPORTED 0xffff | ||
| 113 | |||
| 114 | static const unsigned arc_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | ||
| 115 | [C(L1D)] = { | ||
| 116 | [C(OP_READ)] = { | ||
| 117 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 118 | [C(RESULT_MISS)] = PERF_COUNT_ARC_DCLM, | ||
| 119 | }, | ||
| 120 | [C(OP_WRITE)] = { | ||
| 121 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 122 | [C(RESULT_MISS)] = PERF_COUNT_ARC_DCSM, | ||
| 123 | }, | ||
| 124 | [C(OP_PREFETCH)] = { | ||
| 125 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 126 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 127 | }, | ||
| 128 | }, | ||
| 129 | [C(L1I)] = { | ||
| 130 | [C(OP_READ)] = { | ||
| 131 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 132 | [C(RESULT_MISS)] = PERF_COUNT_ARC_ICM, | ||
| 133 | }, | ||
| 134 | [C(OP_WRITE)] = { | ||
| 135 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 136 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 137 | }, | ||
| 138 | [C(OP_PREFETCH)] = { | ||
| 139 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 140 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 141 | }, | ||
| 142 | }, | ||
| 143 | [C(LL)] = { | ||
| 144 | [C(OP_READ)] = { | ||
| 145 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 146 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 147 | }, | ||
| 148 | [C(OP_WRITE)] = { | ||
| 149 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 150 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 151 | }, | ||
| 152 | [C(OP_PREFETCH)] = { | ||
| 153 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 154 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 155 | }, | ||
| 156 | }, | ||
| 157 | [C(DTLB)] = { | ||
| 158 | [C(OP_READ)] = { | ||
| 159 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 160 | [C(RESULT_MISS)] = PERF_COUNT_ARC_EDTLB, | ||
| 161 | }, | ||
| 162 | [C(OP_WRITE)] = { | ||
| 163 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 164 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 165 | }, | ||
| 166 | [C(OP_PREFETCH)] = { | ||
| 167 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 168 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 169 | }, | ||
| 170 | }, | ||
| 171 | [C(ITLB)] = { | ||
| 172 | [C(OP_READ)] = { | ||
| 173 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 174 | [C(RESULT_MISS)] = PERF_COUNT_ARC_EITLB, | ||
| 175 | }, | ||
| 176 | [C(OP_WRITE)] = { | ||
| 177 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 178 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 179 | }, | ||
| 180 | [C(OP_PREFETCH)] = { | ||
| 181 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 182 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 183 | }, | ||
| 184 | }, | ||
| 185 | [C(BPU)] = { | ||
| 186 | [C(OP_READ)] = { | ||
| 187 | [C(RESULT_ACCESS)] = PERF_COUNT_HW_BRANCH_INSTRUCTIONS, | ||
| 188 | [C(RESULT_MISS)] = PERF_COUNT_HW_BRANCH_MISSES, | ||
| 189 | }, | ||
| 190 | [C(OP_WRITE)] = { | ||
| 191 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 192 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 193 | }, | ||
| 194 | [C(OP_PREFETCH)] = { | ||
| 195 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 196 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 197 | }, | ||
| 198 | }, | ||
| 199 | [C(NODE)] = { | ||
| 200 | [C(OP_READ)] = { | ||
| 201 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 202 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 203 | }, | ||
| 204 | [C(OP_WRITE)] = { | ||
| 205 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 206 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 207 | }, | ||
| 208 | [C(OP_PREFETCH)] = { | ||
| 209 | [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | ||
| 210 | [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | ||
| 211 | }, | ||
| 212 | }, | ||
| 213 | }; | ||
| 214 | |||
| 13 | #endif /* __ASM_PERF_EVENT_H */ | 215 | #endif /* __ASM_PERF_EVENT_H */ |
| @@ -105,11 +105,16 @@ static inline pgtable_t · 104 unmodified lines | |||
| 105 | pte_alloc_one(struct mm_struct *mm, unsigned long address) | 105 | pte_alloc_one(struct mm_struct *mm, unsigned long address) |
| 106 | { | 106 | { |
| 107 | pgtable_t pte_pg; | 107 | pgtable_t pte_pg; |
| 108 | struct page *page; | ||
| 108 | 109 | ||
| 109 | pte_pg = __get_free_pages(GFP_KERNEL | __GFP_REPEAT, __get_order_pte()); | 110 | pte_pg = __get_free_pages(GFP_KERNEL | __GFP_REPEAT, __get_order_pte()); |
| 110 | if (pte_pg) { | 111 | if (!pte_pg) |
| 111 | memzero((void *)pte_pg, PTRS_PER_PTE * 4); | 112 | return 0; |
| 112 | pgtable_page_ctor(virt_to_page(pte_pg)); | 113 | memzero((void *)pte_pg, PTRS_PER_PTE * 4); |
| 114 | page = virt_to_page(pte_pg); | ||
| 115 | if (!pgtable_page_ctor(page)) { | ||
| 116 | __free_page(page); | ||
| 117 | return 0; | ||
| 113 | } | 118 | } |
| 114 | 119 | ||
| 115 | return pte_pg; | 120 | return pte_pg; |
| @@ -1,14 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef _ASM_ARC_PROM_H_ | ||
| 10 | #define _ASM_ARC_PROM_H_ | ||
| 11 | |||
| 12 | #define HAVE_ARCH_DEVTREE_FIXUPS | ||
| 13 | |||
| 14 | #endif | ||
| @@ -31,7 +31,7 @@ struct cpuinfo_data { · 30 unmodified lines | |||
| 31 | extern int root_mountflags, end_mem; | 31 | extern int root_mountflags, end_mem; |
| 32 | extern int running_on_hw; | 32 | extern int running_on_hw; |
| 33 | 33 | ||
| 34 | void __init setup_processor(void); | 34 | void setup_processor(void); |
| 35 | void __init setup_arch_memory(void); | 35 | void __init setup_arch_memory(void); |
| 36 | 36 | ||
| 37 | #endif /* __ASMARC_SETUP_H */ | 37 | #endif /* __ASMARC_SETUP_H */ |
| @@ -30,7 +30,7 @@ extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); · 29 unmodified lines | |||
| 30 | * APIs provided by arch SMP code to rest of arch code | 30 | * APIs provided by arch SMP code to rest of arch code |
| 31 | */ | 31 | */ |
| 32 | extern void __init smp_init_cpus(void); | 32 | extern void __init smp_init_cpus(void); |
| 33 | extern void __init first_lines_of_secondary(void); | 33 | extern void first_lines_of_secondary(void); |
| 34 | extern const char *arc_platform_smp_cpuinfo(void); | 34 | extern const char *arc_platform_smp_cpuinfo(void); |
| 35 | 35 | ||
| 36 | /* | 36 | /* |
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