The adis library only allows to define a `startup_delay` which for some devices is enough. However, other devices define different timeouts with significantly different timings which could lead to devices to not wait enough time or to wait a lot more than necessary (which is not efficient). This patch introduces a new timeout struct that must be passed into `adis_init()`. There are mainly, for now, three timeouts used. This is also an introductory patch with the goal of refactoring `adis_initial_startup()`. New driver's (eg: adis16480, adis16460) are replicating code for the device initial setup. With some changes (being this the first one) we can pass this to `adis_initial_startup()`.
Unified · Split
| @@ -233,6 +233,12 @@ static const char * const adis16201_status_error_msgs[] = { · 232 unmodified lines | |||
| 233 | [ADIS16201_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V", | 233 | [ADIS16201_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V", |
| 234 | }; | 234 | }; |
| 235 | 235 | ||
| 236 | static const struct adis_timeout adis16201_timeouts = { | ||
| 237 | .reset_ms = ADIS16201_STARTUP_DELAY_MS, | ||
| 238 | .sw_reset_ms = ADIS16201_STARTUP_DELAY_MS, | ||
| 239 | .self_test_ms = ADIS16201_STARTUP_DELAY_MS, | ||
| 240 | }; | ||
| 241 | |||
| 236 | static const struct adis_data adis16201_data = { | 242 | static const struct adis_data adis16201_data = { |
| 237 | .read_delay = 20, | 243 | .read_delay = 20, |
| 238 | .msc_ctrl_reg = ADIS16201_MSC_CTRL_REG, | 244 | .msc_ctrl_reg = ADIS16201_MSC_CTRL_REG, |
| @@ -242,6 +248,7 @@ static const struct adis_data adis16201_data = { · 3 unmodified lines | |||
| 242 | .self_test_mask = ADIS16201_MSC_CTRL_SELF_TEST_EN, | 248 | .self_test_mask = ADIS16201_MSC_CTRL_SELF_TEST_EN, |
| 243 | .self_test_no_autoclear = true, | 249 | .self_test_no_autoclear = true, |
| 244 | .startup_delay = ADIS16201_STARTUP_DELAY_MS, | 250 | .startup_delay = ADIS16201_STARTUP_DELAY_MS, |
| 251 | .timeouts = &adis16201_timeouts, | ||
| 245 | 252 | ||
| 246 | .status_error_msgs = adis16201_status_error_msgs, | 253 | .status_error_msgs = adis16201_status_error_msgs, |
| 247 | .status_error_mask = BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) | | 254 | .status_error_mask = BIT(ADIS16201_DIAG_STAT_SPI_FAIL_BIT) | |
| @@ -243,6 +243,12 @@ static const char * const adis16209_status_error_msgs[] = { · 242 unmodified lines | |||
| 243 | [ADIS16209_STAT_POWER_LOW_BIT] = "Power supply below 2.975V", | 243 | [ADIS16209_STAT_POWER_LOW_BIT] = "Power supply below 2.975V", |
| 244 | }; | 244 | }; |
| 245 | 245 | ||
| 246 | static const struct adis_timeout adis16209_timeouts = { | ||
| 247 | .reset_ms = ADIS16209_STARTUP_DELAY_MS, | ||
| 248 | .self_test_ms = ADIS16209_STARTUP_DELAY_MS, | ||
| 249 | .sw_reset_ms = ADIS16209_STARTUP_DELAY_MS, | ||
| 250 | }; | ||
| 251 | |||
| 246 | static const struct adis_data adis16209_data = { | 252 | static const struct adis_data adis16209_data = { |
| 247 | .read_delay = 30, | 253 | .read_delay = 30, |
| 248 | .msc_ctrl_reg = ADIS16209_MSC_CTRL_REG, | 254 | .msc_ctrl_reg = ADIS16209_MSC_CTRL_REG, |
| @@ -252,6 +258,7 @@ static const struct adis_data adis16209_data = { · 3 unmodified lines | |||
| 252 | .self_test_mask = ADIS16209_MSC_CTRL_SELF_TEST_EN, | 258 | .self_test_mask = ADIS16209_MSC_CTRL_SELF_TEST_EN, |
| 253 | .self_test_no_autoclear = true, | 259 | .self_test_no_autoclear = true, |
| 254 | .startup_delay = ADIS16209_STARTUP_DELAY_MS, | 260 | .startup_delay = ADIS16209_STARTUP_DELAY_MS, |
| 261 | .timeouts = &adis16209_timeouts, | ||
| 255 | 262 | ||
| 256 | .status_error_msgs = adis16209_status_error_msgs, | 263 | .status_error_msgs = adis16209_status_error_msgs, |
| 257 | .status_error_mask = BIT(ADIS16209_STAT_SELFTEST_FAIL_BIT) | | 264 | .status_error_mask = BIT(ADIS16209_STAT_SELFTEST_FAIL_BIT) | |
| @@ -59,6 +59,7 @@ · 58 unmodified lines | |||
| 59 | struct adis16136_chip_info { | 59 | struct adis16136_chip_info { |
| 60 | unsigned int precision; | 60 | unsigned int precision; |
| 61 | unsigned int fullscale; | 61 | unsigned int fullscale; |
| 62 | const struct adis_timeout *timeouts; | ||
| 62 | }; | 63 | }; |
| 63 | 64 | ||
| 64 | struct adis16136 { | 65 | struct adis16136 { |
| @@ -490,30 +491,63 @@ enum adis16136_id { · 425 unmodified lines | |||
| 490 | ID_ADIS16137, | 491 | ID_ADIS16137, |
| 491 | }; | 492 | }; |
| 492 | 493 | ||
| 494 | static const struct adis_timeout adis16133_timeouts = { | ||
| 495 | .reset_ms = 75, | ||
| 496 | .sw_reset_ms = 75, | ||
| 497 | .self_test_ms = 50, | ||
| 498 | }; | ||
| 499 | |||
| 500 | static const struct adis_timeout adis16136_timeouts = { | ||
| 501 | .reset_ms = 128, | ||
| 502 | .sw_reset_ms = 75, | ||
| 503 | .self_test_ms = 245, | ||
| 504 | }; | ||
| 505 | |||
| 493 | static const struct adis16136_chip_info adis16136_chip_info[] = { | 506 | static const struct adis16136_chip_info adis16136_chip_info[] = { |
| 494 | [ID_ADIS16133] = { | 507 | [ID_ADIS16133] = { |
| 495 | .precision = IIO_DEGREE_TO_RAD(1200), | 508 | .precision = IIO_DEGREE_TO_RAD(1200), |
| 496 | .fullscale = 24000, | 509 | .fullscale = 24000, |
| 510 | .timeouts = &adis16133_timeouts, | ||
| 497 | }, | 511 | }, |
| 498 | [ID_ADIS16135] = { | 512 | [ID_ADIS16135] = { |
| 499 | .precision = IIO_DEGREE_TO_RAD(300), | 513 | .precision = IIO_DEGREE_TO_RAD(300), |
| 500 | .fullscale = 24000, | 514 | .fullscale = 24000, |
| 515 | .timeouts = &adis16133_timeouts, | ||
| 501 | }, | 516 | }, |
| 502 | [ID_ADIS16136] = { | 517 | [ID_ADIS16136] = { |
| 503 | .precision = IIO_DEGREE_TO_RAD(450), | 518 | .precision = IIO_DEGREE_TO_RAD(450), |
| 504 | .fullscale = 24623, | 519 | .fullscale = 24623, |
| 520 | .timeouts = &adis16136_timeouts, | ||
| 505 | }, | 521 | }, |
| 506 | [ID_ADIS16137] = { | 522 | [ID_ADIS16137] = { |
| 507 | .precision = IIO_DEGREE_TO_RAD(1000), | 523 | .precision = IIO_DEGREE_TO_RAD(1000), |
| 508 | .fullscale = 24609, | 524 | .fullscale = 24609, |
| 525 | .timeouts = &adis16136_timeouts, | ||
| 509 | }, | 526 | }, |
| 510 | }; | 527 | }; |
| 511 | 528 | ||
| 529 | static struct adis_data *adis16136_adis_data_alloc(struct adis16136 *st, | ||
| 530 | struct device *dev) | ||
| 531 | { | ||
| 532 | struct adis_data *data; | ||
| 533 | |||
| 534 | data = devm_kmalloc(dev, sizeof(struct adis_data), GFP_KERNEL); | ||
| 535 | if (!data) | ||
| 536 | return ERR_PTR(-ENOMEM); | ||
| 537 | |||
| 538 | memcpy(data, &adis16136_data, sizeof(*data)); | ||
| 539 | |||
| 540 | data->timeouts = st->chip_info->timeouts; | ||
| 541 | |||
| 542 | return data; | ||
| 543 | } | ||
| 544 | |||
| 512 | static int adis16136_probe(struct spi_device *spi) | 545 | static int adis16136_probe(struct spi_device *spi) |
| 513 | { | 546 | { |
| 514 | const struct spi_device_id *id = spi_get_device_id(spi); | 547 | const struct spi_device_id *id = spi_get_device_id(spi); |
| 515 | struct adis16136 *adis16136; | 548 | struct adis16136 *adis16136; |
| 516 | struct iio_dev *indio_dev; | 549 | struct iio_dev *indio_dev; |
| 550 | const struct adis_data *adis16136_data; | ||
| 517 | int ret; | 551 | int ret; |
| 518 | 552 | ||
| 519 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adis16136)); | 553 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adis16136)); |
| @@ -532,7 +566,11 @@ static int adis16136_probe(struct spi_device *spi) · 12 unmodified lines | |||
| 532 | indio_dev->info = &adis16136_info; | 566 | indio_dev->info = &adis16136_info; |
| 533 | indio_dev->modes = INDIO_DIRECT_MODE; | 567 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 534 | 568 | ||
| 535 | ret = adis_init(&adis16136->adis, indio_dev, spi, &adis16136_data); | 569 | adis16136_data = adis16136_adis_data_alloc(adis16136, &spi->dev); |
| 570 | if (IS_ERR(adis16136_data)) | ||
| 571 | return PTR_ERR(adis16136_data); | ||
| 572 | |||
| 573 | ret = adis_init(&adis16136->adis, indio_dev, spi, adis16136_data); | ||
| 536 | if (ret) | 574 | if (ret) |
| 537 | return ret; | 575 | return ret; |
| 538 | 576 | ||
| @@ -332,6 +332,12 @@ static const char * const adis1620_status_error_msgs[] = { · 331 unmodified lines | |||
| 332 | [ADIS16260_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 4.75", | 332 | [ADIS16260_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 4.75", |
| 333 | }; | 333 | }; |
| 334 | 334 | ||
| 335 | static const struct adis_timeout adis16260_timeouts = { | ||
| 336 | .reset_ms = ADIS16260_STARTUP_DELAY, | ||
| 337 | .sw_reset_ms = ADIS16260_STARTUP_DELAY, | ||
| 338 | .self_test_ms = ADIS16260_STARTUP_DELAY, | ||
| 339 | }; | ||
| 340 | |||
| 335 | static const struct adis_data adis16260_data = { | 341 | static const struct adis_data adis16260_data = { |
| 336 | .write_delay = 30, | 342 | .write_delay = 30, |
| 337 | .read_delay = 30, | 343 | .read_delay = 30, |
| @@ -341,6 +347,7 @@ static const struct adis_data adis16260_data = { · 3 unmodified lines | |||
| 341 | 347 | ||
| 342 | .self_test_mask = ADIS16260_MSC_CTRL_MEM_TEST, | 348 | .self_test_mask = ADIS16260_MSC_CTRL_MEM_TEST, |
| 343 | .startup_delay = ADIS16260_STARTUP_DELAY, | 349 | .startup_delay = ADIS16260_STARTUP_DELAY, |
| 350 | .timeouts = &adis16260_timeouts, | ||
| 344 | 351 | ||
| 345 | .status_error_msgs = adis1620_status_error_msgs, | 352 | .status_error_msgs = adis1620_status_error_msgs, |
| 346 | .status_error_mask = BIT(ADIS16260_DIAG_STAT_FLASH_CHK_BIT) | | 353 | .status_error_mask = BIT(ADIS16260_DIAG_STAT_FLASH_CHK_BIT) | |
| @@ -317,19 +317,25 @@ EXPORT_SYMBOL_GPL(__adis_check_status); · 316 unmodified lines | |||
| 317 | int __adis_reset(struct adis *adis) | 317 | int __adis_reset(struct adis *adis) |
| 318 | { | 318 | { |
| 319 | int ret; | 319 | int ret; |
| 320 | const struct adis_timeout *timeouts = adis->data->timeouts; | ||
| 320 | 321 | ||
| 321 | ret = __adis_write_reg_8(adis, adis->data->glob_cmd_reg, | 322 | ret = __adis_write_reg_8(adis, adis->data->glob_cmd_reg, |
| 322 | ADIS_GLOB_CMD_SW_RESET); | 323 | ADIS_GLOB_CMD_SW_RESET); |
| 323 | if (ret) | 324 | if (ret) { |
| 324 | dev_err(&adis->spi->dev, "Failed to reset device: %d\n", ret); | 325 | dev_err(&adis->spi->dev, "Failed to reset device: %d\n", ret); |
| 326 | return ret; | ||
| 327 | } | ||
| 325 | 328 | ||
| 326 | return ret; | 329 | msleep(timeouts->sw_reset_ms); |
| 330 | |||
| 331 | return 0; | ||
| 327 | } | 332 | } |
| 328 | EXPORT_SYMBOL_GPL(__adis_reset); | 333 | EXPORT_SYMBOL_GPL(__adis_reset); |
| 329 | 334 | ||
| 330 | static int adis_self_test(struct adis *adis) | 335 | static int adis_self_test(struct adis *adis) |
| 331 | { | 336 | { |
| 332 | int ret; | 337 | int ret; |
| 338 | const struct adis_timeout *timeouts = adis->data->timeouts; | ||
| 333 | 339 | ||
| 334 | ret = __adis_write_reg_16(adis, adis->data->msc_ctrl_reg, | 340 | ret = __adis_write_reg_16(adis, adis->data->msc_ctrl_reg, |
| 335 | adis->data->self_test_mask); | 341 | adis->data->self_test_mask); |
| @@ -339,7 +345,7 @@ static int adis_self_test(struct adis *adis) · 3 unmodified lines | |||
| 339 | return ret; | 345 | return ret; |
| 340 | } | 346 | } |
| 341 | 347 | ||
| 342 | msleep(adis->data->startup_delay); | 348 | msleep(timeouts->self_test_ms); |
| 343 | 349 | ||
| 344 | ret = __adis_check_status(adis); | 350 | ret = __adis_check_status(adis); |
| 345 | 351 | ||
| @@ -368,7 +374,6 @@ int adis_initial_startup(struct adis *adis) · 22 unmodified lines | |||
| 368 | if (ret) { | 374 | if (ret) { |
| 369 | dev_err(&adis->spi->dev, "Self-test failed, trying reset.\n"); | 375 | dev_err(&adis->spi->dev, "Self-test failed, trying reset.\n"); |
| 370 | __adis_reset(adis); | 376 | __adis_reset(adis); |
| 371 | msleep(adis->data->startup_delay); | ||
| 372 | ret = adis_self_test(adis); | 377 | ret = adis_self_test(adis); |
| 373 | if (ret) { | 378 | if (ret) { |
| 374 | dev_err(&adis->spi->dev, "Second self-test failed, giving up.\n"); | 379 | dev_err(&adis->spi->dev, "Second self-test failed, giving up.\n"); |
| @@ -444,6 +449,11 @@ EXPORT_SYMBOL_GPL(adis_single_conversion); · 69 unmodified lines | |||
| 444 | int adis_init(struct adis *adis, struct iio_dev *indio_dev, | 449 | int adis_init(struct adis *adis, struct iio_dev *indio_dev, |
| 445 | struct spi_device *spi, const struct adis_data *data) | 450 | struct spi_device *spi, const struct adis_data *data) |
| 446 | { | 451 | { |
| 452 | if (!data || !data->timeouts) { | ||
| 453 | dev_err(&spi->dev, "No config data or timeouts not defined!\n"); | ||
| 454 | return -EINVAL; | ||
| 455 | } | ||
| 456 | |||
| 447 | mutex_init(&adis->state_lock); | 457 | mutex_init(&adis->state_lock); |
| 448 | adis->spi = spi; | 458 | adis->spi = spi; |
| 449 | adis->data = data; | 459 | adis->data = data; |
| @@ -156,6 +156,7 @@ struct adis16400_state; · 155 unmodified lines | |||
| 156 | 156 | ||
| 157 | struct adis16400_chip_info { | 157 | struct adis16400_chip_info { |
| 158 | const struct iio_chan_spec *channels; | 158 | const struct iio_chan_spec *channels; |
| 159 | const struct adis_timeout *timeouts; | ||
| 159 | const int num_channels; | 160 | const int num_channels; |
| 160 | const long flags; | 161 | const long flags; |
| 161 | unsigned int gyro_scale_micro; | 162 | unsigned int gyro_scale_micro; |
| @@ -929,6 +930,36 @@ static const struct iio_chan_spec adis16334_channels[] = { · 767 unmodified lines | |||
| 929 | IIO_CHAN_SOFT_TIMESTAMP(ADIS16400_SCAN_TIMESTAMP), | 930 | IIO_CHAN_SOFT_TIMESTAMP(ADIS16400_SCAN_TIMESTAMP), |
| 930 | }; | 931 | }; |
| 931 | 932 | ||
| 933 | static const struct adis_timeout adis16300_timeouts = { | ||
| 934 | .reset_ms = ADIS16400_STARTUP_DELAY, | ||
| 935 | .sw_reset_ms = ADIS16400_STARTUP_DELAY, | ||
| 936 | .self_test_ms = ADIS16400_STARTUP_DELAY, | ||
| 937 | }; | ||
| 938 | |||
| 939 | static const struct adis_timeout adis16362_timeouts = { | ||
| 940 | .reset_ms = 130, | ||
| 941 | .sw_reset_ms = 130, | ||
| 942 | .self_test_ms = 12, | ||
| 943 | }; | ||
| 944 | |||
| 945 | static const struct adis_timeout adis16400_timeouts = { | ||
| 946 | .reset_ms = 170, | ||
| 947 | .sw_reset_ms = 170, | ||
| 948 | .self_test_ms = 12, | ||
| 949 | }; | ||
| 950 | |||
| 951 | static const struct adis_timeout adis16445_timeouts = { | ||
| 952 | .reset_ms = 55, | ||
| 953 | .sw_reset_ms = 55, | ||
| 954 | .self_test_ms = 16, | ||
| 955 | }; | ||
| 956 | |||
| 957 | static const struct adis_timeout adis16448_timeouts = { | ||
| 958 | .reset_ms = 90, | ||
| 959 | .sw_reset_ms = 90, | ||
| 960 | .self_test_ms = 45, | ||
| 961 | }; | ||
| 962 | |||
| 932 | static struct adis16400_chip_info adis16400_chips[] = { | 963 | static struct adis16400_chip_info adis16400_chips[] = { |
| 933 | [ADIS16300] = { | 964 | [ADIS16300] = { |
| 934 | .channels = adis16300_channels, | 965 | .channels = adis16300_channels, |
| @@ -941,6 +972,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 6 unmodified lines | |||
| 941 | .temp_offset = 25000000 / 140000, /* 25 C = 0x00 */ | 972 | .temp_offset = 25000000 / 140000, /* 25 C = 0x00 */ |
| 942 | .set_freq = adis16400_set_freq, | 973 | .set_freq = adis16400_set_freq, |
| 943 | .get_freq = adis16400_get_freq, | 974 | .get_freq = adis16400_get_freq, |
| 975 | .timeouts = &adis16300_timeouts, | ||
| 944 | }, | 976 | }, |
| 945 | [ADIS16334] = { | 977 | [ADIS16334] = { |
| 946 | .channels = adis16334_channels, | 978 | .channels = adis16334_channels, |
| @@ -964,6 +996,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 17 unmodified lines | |||
| 964 | .flags = ADIS16400_NO_BURST | ADIS16400_HAS_SLOW_MODE, | 996 | .flags = ADIS16400_NO_BURST | ADIS16400_HAS_SLOW_MODE, |
| 965 | .set_freq = adis16400_set_freq, | 997 | .set_freq = adis16400_set_freq, |
| 966 | .get_freq = adis16400_get_freq, | 998 | .get_freq = adis16400_get_freq, |
| 999 | .timeouts = &adis16300_timeouts, | ||
| 967 | }, | 1000 | }, |
| 968 | [ADIS16360] = { | 1001 | [ADIS16360] = { |
| 969 | .channels = adis16350_channels, | 1002 | .channels = adis16350_channels, |
| @@ -976,6 +1009,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 6 unmodified lines | |||
| 976 | .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ | 1009 | .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ |
| 977 | .set_freq = adis16400_set_freq, | 1010 | .set_freq = adis16400_set_freq, |
| 978 | .get_freq = adis16400_get_freq, | 1011 | .get_freq = adis16400_get_freq, |
| 1012 | .timeouts = &adis16300_timeouts, | ||
| 979 | }, | 1013 | }, |
| 980 | [ADIS16362] = { | 1014 | [ADIS16362] = { |
| 981 | .channels = adis16350_channels, | 1015 | .channels = adis16350_channels, |
| @@ -988,6 +1022,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 6 unmodified lines | |||
| 988 | .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ | 1022 | .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ |
| 989 | .set_freq = adis16400_set_freq, | 1023 | .set_freq = adis16400_set_freq, |
| 990 | .get_freq = adis16400_get_freq, | 1024 | .get_freq = adis16400_get_freq, |
| 1025 | .timeouts = &adis16362_timeouts, | ||
| 991 | }, | 1026 | }, |
| 992 | [ADIS16364] = { | 1027 | [ADIS16364] = { |
| 993 | .channels = adis16350_channels, | 1028 | .channels = adis16350_channels, |
| @@ -1000,6 +1035,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 6 unmodified lines | |||
| 1000 | .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ | 1035 | .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ |
| 1001 | .set_freq = adis16400_set_freq, | 1036 | .set_freq = adis16400_set_freq, |
| 1002 | .get_freq = adis16400_get_freq, | 1037 | .get_freq = adis16400_get_freq, |
| 1038 | .timeouts = &adis16362_timeouts, | ||
| 1003 | }, | 1039 | }, |
| 1004 | [ADIS16367] = { | 1040 | [ADIS16367] = { |
| 1005 | .channels = adis16350_channels, | 1041 | .channels = adis16350_channels, |
| @@ -1012,6 +1048,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 6 unmodified lines | |||
| 1012 | .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ | 1048 | .temp_offset = 25000000 / 136000, /* 25 C = 0x00 */ |
| 1013 | .set_freq = adis16400_set_freq, | 1049 | .set_freq = adis16400_set_freq, |
| 1014 | .get_freq = adis16400_get_freq, | 1050 | .get_freq = adis16400_get_freq, |
| 1051 | .timeouts = &adis16300_timeouts, | ||
| 1015 | }, | 1052 | }, |
| 1016 | [ADIS16400] = { | 1053 | [ADIS16400] = { |
| 1017 | .channels = adis16400_channels, | 1054 | .channels = adis16400_channels, |
| @@ -1023,6 +1060,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 5 unmodified lines | |||
| 1023 | .temp_offset = 25000000 / 140000, /* 25 C = 0x00 */ | 1060 | .temp_offset = 25000000 / 140000, /* 25 C = 0x00 */ |
| 1024 | .set_freq = adis16400_set_freq, | 1061 | .set_freq = adis16400_set_freq, |
| 1025 | .get_freq = adis16400_get_freq, | 1062 | .get_freq = adis16400_get_freq, |
| 1063 | .timeouts = &adis16400_timeouts, | ||
| 1026 | }, | 1064 | }, |
| 1027 | [ADIS16445] = { | 1065 | [ADIS16445] = { |
| 1028 | .channels = adis16445_channels, | 1066 | .channels = adis16445_channels, |
| @@ -1036,6 +1074,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 7 unmodified lines | |||
| 1036 | .temp_offset = 31000000 / 73860, /* 31 C = 0x00 */ | 1074 | .temp_offset = 31000000 / 73860, /* 31 C = 0x00 */ |
| 1037 | .set_freq = adis16334_set_freq, | 1075 | .set_freq = adis16334_set_freq, |
| 1038 | .get_freq = adis16334_get_freq, | 1076 | .get_freq = adis16334_get_freq, |
| 1077 | .timeouts = &adis16445_timeouts, | ||
| 1039 | }, | 1078 | }, |
| 1040 | [ADIS16448] = { | 1079 | [ADIS16448] = { |
| 1041 | .channels = adis16448_channels, | 1080 | .channels = adis16448_channels, |
| @@ -1049,6 +1088,7 @@ static struct adis16400_chip_info adis16400_chips[] = { · 7 unmodified lines | |||
| 1049 | .temp_offset = 31000000 / 73860, /* 31 C = 0x00 */ | 1088 | .temp_offset = 31000000 / 73860, /* 31 C = 0x00 */ |
| 1050 | .set_freq = adis16334_set_freq, | 1089 | .set_freq = adis16334_set_freq, |
| 1051 | .get_freq = adis16334_get_freq, | 1090 | .get_freq = adis16334_get_freq, |
| 1091 | .timeouts = &adis16448_timeouts, | ||
| 1052 | } | 1092 | } |
| 1053 | }; | 1093 | }; |
| 1054 | 1094 | ||
| @@ -1120,11 +1160,28 @@ static void adis16400_setup_chan_mask(struct adis16400_state *st) · 65 unmodified lines | |||
| 1120 | } | 1160 | } |
| 1121 | } | 1161 | } |
| 1122 | 1162 | ||
| 1163 | static struct adis_data *adis16400_adis_data_alloc(struct adis16400_state *st, | ||
| 1164 | struct device *dev) | ||
| 1165 | { | ||
| 1166 | struct adis_data *data; | ||
| 1167 | |||
| 1168 | data = devm_kmalloc(dev, sizeof(struct adis_data), GFP_KERNEL); | ||
| 1169 | if (!data) | ||
| 1170 | return ERR_PTR(-ENOMEM); | ||
| 1171 | |||
| 1172 | memcpy(data, &adis16400_data, sizeof(*data)); | ||
| 1173 | |||
| 1174 | data->timeouts = st->variant->timeouts; | ||
| 1175 | |||
| 1176 | return data; | ||
| 1177 | } | ||
| 1178 | |||
| 1123 | static int adis16400_probe(struct spi_device *spi) | 1179 | static int adis16400_probe(struct spi_device *spi) |
| 1124 | { | 1180 | { |
| 1125 | struct adis16400_state *st; | 1181 | struct adis16400_state *st; |
| 1126 | struct iio_dev *indio_dev; | 1182 | struct iio_dev *indio_dev; |
| 1127 | int ret; | 1183 | int ret; |
| 1184 | const struct adis_data *adis16400_data; | ||
| 1128 | 1185 | ||
| 1129 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); | 1186 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); |
| 1130 | if (indio_dev == NULL) | 1187 | if (indio_dev == NULL) |
| @@ -1151,7 +1208,11 @@ static int adis16400_probe(struct spi_device *spi) · 20 unmodified lines | |||
| 1151 | st->adis.burst->extra_len = sizeof(u16); | 1208 | st->adis.burst->extra_len = sizeof(u16); |
| 1152 | } | 1209 | } |
| 1153 | 1210 | ||
| 1154 | ret = adis_init(&st->adis, indio_dev, spi, &adis16400_data); | 1211 | adis16400_data = adis16400_adis_data_alloc(st, &spi->dev); |
| 1212 | if (IS_ERR(adis16400_data)) | ||
| 1213 | return PTR_ERR(adis16400_data); | ||
| 1214 | |||
| 1215 | ret = adis_init(&st->adis, indio_dev, spi, adis16400_data); | ||
| 1155 | if (ret) | 1216 | if (ret) |
| 1156 | return ret; | 1217 | return ret; |
| 1157 | 1218 | ||
| @@ -383,6 +383,12 @@ static const char * const adis16460_status_error_msgs[] = { · 382 unmodified lines | |||
| 383 | [ADIS16460_DIAG_STAT_FLASH_UPT] = "Flash update failure", | 383 | [ADIS16460_DIAG_STAT_FLASH_UPT] = "Flash update failure", |
| 384 | }; | 384 | }; |
| 385 | 385 | ||
| 386 | static const struct adis_timeout adis16460_timeouts = { | ||
| 387 | .reset_ms = 225, | ||
| 388 | .sw_reset_ms = 225, | ||
| 389 | .self_test_ms = 10, | ||
| 390 | }; | ||
| 391 | |||
| 386 | static const struct adis_data adis16460_data = { | 392 | static const struct adis_data adis16460_data = { |
| 387 | .diag_stat_reg = ADIS16460_REG_DIAG_STAT, | 393 | .diag_stat_reg = ADIS16460_REG_DIAG_STAT, |
| 388 | .glob_cmd_reg = ADIS16460_REG_GLOB_CMD, | 394 | .glob_cmd_reg = ADIS16460_REG_GLOB_CMD, |
| @@ -398,6 +404,7 @@ static const struct adis_data adis16460_data = { · 9 unmodified lines | |||
| 398 | BIT(ADIS16460_DIAG_STAT_SPI_COMM) | | 404 | BIT(ADIS16460_DIAG_STAT_SPI_COMM) | |
| 399 | BIT(ADIS16460_DIAG_STAT_FLASH_UPT), | 405 | BIT(ADIS16460_DIAG_STAT_FLASH_UPT), |
| 400 | .enable_irq = adis16460_enable_irq, | 406 | .enable_irq = adis16460_enable_irq, |
| 407 | .timeouts = &adis16460_timeouts, | ||
| 401 | }; | 408 | }; |
| 402 | 409 | ||
| 403 | static int adis16460_probe(struct spi_device *spi) | 410 | static int adis16460_probe(struct spi_device *spi) |
| @@ -138,6 +138,7 @@ struct adis16480_chip_info { · 137 unmodified lines | |||
| 138 | unsigned int max_dec_rate; | 138 | unsigned int max_dec_rate; |
| 139 | const unsigned int *filter_freqs; | 139 | const unsigned int *filter_freqs; |
| 140 | bool has_pps_clk_mode; | 140 | bool has_pps_clk_mode; |
| 141 | const struct adis_timeout *timeouts; | ||
| 141 | }; | 142 | }; |
| 142 | 143 | ||
| 143 | enum adis16480_int_pin { | 144 | enum adis16480_int_pin { |
| @@ -794,6 +795,30 @@ enum adis16480_variant { · 650 unmodified lines | |||
| 794 | ADIS16497_3, | 795 | ADIS16497_3, |
| 795 | }; | 796 | }; |
| 796 | 797 | ||
| 798 | static const struct adis_timeout adis16485_timeouts = { | ||
| 799 | .reset_ms = 560, | ||
| 800 | .sw_reset_ms = 120, | ||
| 801 | .self_test_ms = 12, | ||
| 802 | }; | ||
| 803 | |||
| 804 | static const struct adis_timeout adis16480_timeouts = { | ||
| 805 | .reset_ms = 560, | ||
| 806 | .sw_reset_ms = 560, | ||
| 807 | .self_test_ms = 12, | ||
| 808 | }; | ||
| 809 | |||
| 810 | static const struct adis_timeout adis16495_timeouts = { | ||
| 811 | .reset_ms = 170, | ||
| 812 | .sw_reset_ms = 130, | ||
| 813 | .self_test_ms = 40, | ||
| 814 | }; | ||
| 815 | |||
| 816 | static const struct adis_timeout adis16495_1_timeouts = { | ||
| 817 | .reset_ms = 250, | ||
| 818 | .sw_reset_ms = 210, | ||
| 819 | .self_test_ms = 20, | ||
| 820 | }; | ||
| 821 | |||
| 797 | static const struct adis16480_chip_info adis16480_chip_info[] = { | 822 | static const struct adis16480_chip_info adis16480_chip_info[] = { |
| 798 | [ADIS16375] = { | 823 | [ADIS16375] = { |
| 799 | .channels = adis16485_channels, | 824 | .channels = adis16485_channels, |
| @@ -812,6 +837,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 12 unmodified lines | |||
| 812 | .int_clk = 2460000, | 837 | .int_clk = 2460000, |
| 813 | .max_dec_rate = 2048, | 838 | .max_dec_rate = 2048, |
| 814 | .filter_freqs = adis16480_def_filter_freqs, | 839 | .filter_freqs = adis16480_def_filter_freqs, |
| 840 | .timeouts = &adis16485_timeouts, | ||
| 815 | }, | 841 | }, |
| 816 | [ADIS16480] = { | 842 | [ADIS16480] = { |
| 817 | .channels = adis16480_channels, | 843 | .channels = adis16480_channels, |
| @@ -824,6 +850,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 6 unmodified lines | |||
| 824 | .int_clk = 2460000, | 850 | .int_clk = 2460000, |
| 825 | .max_dec_rate = 2048, | 851 | .max_dec_rate = 2048, |
| 826 | .filter_freqs = adis16480_def_filter_freqs, | 852 | .filter_freqs = adis16480_def_filter_freqs, |
| 853 | .timeouts = &adis16480_timeouts, | ||
| 827 | }, | 854 | }, |
| 828 | [ADIS16485] = { | 855 | [ADIS16485] = { |
| 829 | .channels = adis16485_channels, | 856 | .channels = adis16485_channels, |
| @@ -836,6 +863,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 6 unmodified lines | |||
| 836 | .int_clk = 2460000, | 863 | .int_clk = 2460000, |
| 837 | .max_dec_rate = 2048, | 864 | .max_dec_rate = 2048, |
| 838 | .filter_freqs = adis16480_def_filter_freqs, | 865 | .filter_freqs = adis16480_def_filter_freqs, |
| 866 | .timeouts = &adis16485_timeouts, | ||
| 839 | }, | 867 | }, |
| 840 | [ADIS16488] = { | 868 | [ADIS16488] = { |
| 841 | .channels = adis16480_channels, | 869 | .channels = adis16480_channels, |
| @@ -848,6 +876,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 6 unmodified lines | |||
| 848 | .int_clk = 2460000, | 876 | .int_clk = 2460000, |
| 849 | .max_dec_rate = 2048, | 877 | .max_dec_rate = 2048, |
| 850 | .filter_freqs = adis16480_def_filter_freqs, | 878 | .filter_freqs = adis16480_def_filter_freqs, |
| 879 | .timeouts = &adis16485_timeouts, | ||
| 851 | }, | 880 | }, |
| 852 | [ADIS16495_1] = { | 881 | [ADIS16495_1] = { |
| 853 | .channels = adis16485_channels, | 882 | .channels = adis16485_channels, |
| @@ -861,6 +890,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 7 unmodified lines | |||
| 861 | .max_dec_rate = 4250, | 890 | .max_dec_rate = 4250, |
| 862 | .filter_freqs = adis16495_def_filter_freqs, | 891 | .filter_freqs = adis16495_def_filter_freqs, |
| 863 | .has_pps_clk_mode = true, | 892 | .has_pps_clk_mode = true, |
| 893 | .timeouts = &adis16495_1_timeouts, | ||
| 864 | }, | 894 | }, |
| 865 | [ADIS16495_2] = { | 895 | [ADIS16495_2] = { |
| 866 | .channels = adis16485_channels, | 896 | .channels = adis16485_channels, |
| @@ -874,6 +904,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 7 unmodified lines | |||
| 874 | .max_dec_rate = 4250, | 904 | .max_dec_rate = 4250, |
| 875 | .filter_freqs = adis16495_def_filter_freqs, | 905 | .filter_freqs = adis16495_def_filter_freqs, |
| 876 | .has_pps_clk_mode = true, | 906 | .has_pps_clk_mode = true, |
| 907 | .timeouts = &adis16495_1_timeouts, | ||
| 877 | }, | 908 | }, |
| 878 | [ADIS16495_3] = { | 909 | [ADIS16495_3] = { |
| 879 | .channels = adis16485_channels, | 910 | .channels = adis16485_channels, |
| @@ -887,6 +918,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 7 unmodified lines | |||
| 887 | .max_dec_rate = 4250, | 918 | .max_dec_rate = 4250, |
| 888 | .filter_freqs = adis16495_def_filter_freqs, | 919 | .filter_freqs = adis16495_def_filter_freqs, |
| 889 | .has_pps_clk_mode = true, | 920 | .has_pps_clk_mode = true, |
| 921 | .timeouts = &adis16495_1_timeouts, | ||
| 890 | }, | 922 | }, |
| 891 | [ADIS16497_1] = { | 923 | [ADIS16497_1] = { |
| 892 | .channels = adis16485_channels, | 924 | .channels = adis16485_channels, |
| @@ -900,6 +932,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 7 unmodified lines | |||
| 900 | .max_dec_rate = 4250, | 932 | .max_dec_rate = 4250, |
| 901 | .filter_freqs = adis16495_def_filter_freqs, | 933 | .filter_freqs = adis16495_def_filter_freqs, |
| 902 | .has_pps_clk_mode = true, | 934 | .has_pps_clk_mode = true, |
| 935 | .timeouts = &adis16495_1_timeouts, | ||
| 903 | }, | 936 | }, |
| 904 | [ADIS16497_2] = { | 937 | [ADIS16497_2] = { |
| 905 | .channels = adis16485_channels, | 938 | .channels = adis16485_channels, |
| @@ -913,6 +946,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 7 unmodified lines | |||
| 913 | .max_dec_rate = 4250, | 946 | .max_dec_rate = 4250, |
| 914 | .filter_freqs = adis16495_def_filter_freqs, | 947 | .filter_freqs = adis16495_def_filter_freqs, |
| 915 | .has_pps_clk_mode = true, | 948 | .has_pps_clk_mode = true, |
| 949 | .timeouts = &adis16495_1_timeouts, | ||
| 916 | }, | 950 | }, |
| 917 | [ADIS16497_3] = { | 951 | [ADIS16497_3] = { |
| 918 | .channels = adis16485_channels, | 952 | .channels = adis16485_channels, |
| @@ -926,6 +960,7 @@ static const struct adis16480_chip_info adis16480_chip_info[] = { · 7 unmodified lines | |||
| 926 | .max_dec_rate = 4250, | 960 | .max_dec_rate = 4250, |
| 927 | .filter_freqs = adis16495_def_filter_freqs, | 961 | .filter_freqs = adis16495_def_filter_freqs, |
| 928 | .has_pps_clk_mode = true, | 962 | .has_pps_clk_mode = true, |
| 963 | .timeouts = &adis16495_1_timeouts, | ||
| 929 | }, | 964 | }, |
| 930 | }; | 965 | }; |
| 931 | 966 | ||
| @@ -1195,9 +1230,26 @@ static int adis16480_get_ext_clocks(struct adis16480 *st) · 263 unmodified lines | |||
| 1195 | return 0; | 1230 | return 0; |
| 1196 | } | 1231 | } |
| 1197 | 1232 | ||
| 1233 | static struct adis_data *adis16480_adis_data_alloc(struct adis16480 *st, | ||
| 1234 | struct device *dev) | ||
| 1235 | { | ||
| 1236 | struct adis_data *data; | ||
| 1237 | |||
| 1238 | data = devm_kmalloc(dev, sizeof(struct adis_data), GFP_KERNEL); | ||
| 1239 | if (!data) | ||
| 1240 | return ERR_PTR(-ENOMEM); | ||
| 1241 | |||
| 1242 | memcpy(data, &adis16480_data, sizeof(*data)); | ||
| 1243 | |||
| 1244 | data->timeouts = st->chip_info->timeouts; | ||
| 1245 | |||
| 1246 | return data; | ||
| 1247 | } | ||
| 1248 | |||
| 1198 | static int adis16480_probe(struct spi_device *spi) | 1249 | static int adis16480_probe(struct spi_device *spi) |
| 1199 | { | 1250 | { |
| 1200 | const struct spi_device_id *id = spi_get_device_id(spi); | 1251 | const struct spi_device_id *id = spi_get_device_id(spi); |
| 1252 | const struct adis_data *adis16480_data; | ||
| 1201 | struct iio_dev *indio_dev; | 1253 | struct iio_dev *indio_dev; |
| 1202 | struct adis16480 *st; | 1254 | struct adis16480 *st; |
| 1203 | int ret; | 1255 | int ret; |
| @@ -1218,7 +1270,11 @@ static int adis16480_probe(struct spi_device *spi) · 14 unmodified lines | |||
| 1218 | indio_dev->info = &adis16480_info; | 1270 | indio_dev->info = &adis16480_info; |
| 1219 | indio_dev->modes = INDIO_DIRECT_MODE; | 1271 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 1220 | 1272 | ||
| 1221 | ret = adis_init(&st->adis, indio_dev, spi, &adis16480_data); | 1273 | adis16480_data = adis16480_adis_data_alloc(st, &spi->dev); |
| 1274 | if (IS_ERR(adis16480_data)) | ||
| 1275 | return PTR_ERR(adis16480_data); | ||
| 1276 | |||
| 1277 | ret = adis_init(&st->adis, indio_dev, spi, adis16480_data); | ||
| 1222 | if (ret) | 1278 | if (ret) |
| 1223 | return ret; | 1279 | return ret; |
| 1224 | 1280 | ||
| @@ -237,6 +237,12 @@ static const char * const adis16203_status_error_msgs[] = { · 236 unmodified lines | |||
| 237 | [ADIS16203_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V", | 237 | [ADIS16203_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.975V", |
| 238 | }; | 238 | }; |
| 239 | 239 | ||
| 240 | static const struct adis_timeout adis16203_timeouts = { | ||
| 241 | .reset_ms = ADIS16203_STARTUP_DELAY, | ||
| 242 | .sw_reset_ms = ADIS16203_STARTUP_DELAY, | ||
| 243 | .self_test_ms = ADIS16203_STARTUP_DELAY | ||
| 244 | }; | ||
| 245 | |||
| 240 | static const struct adis_data adis16203_data = { | 246 | static const struct adis_data adis16203_data = { |
| 241 | .read_delay = 20, | 247 | .read_delay = 20, |
| 242 | .msc_ctrl_reg = ADIS16203_MSC_CTRL, | 248 | .msc_ctrl_reg = ADIS16203_MSC_CTRL, |
| @@ -246,6 +252,7 @@ static const struct adis_data adis16203_data = { · 3 unmodified lines | |||
| 246 | .self_test_mask = ADIS16203_MSC_CTRL_SELF_TEST_EN, | 252 | .self_test_mask = ADIS16203_MSC_CTRL_SELF_TEST_EN, |
| 247 | .self_test_no_autoclear = true, | 253 | .self_test_no_autoclear = true, |
| 248 | .startup_delay = ADIS16203_STARTUP_DELAY, | 254 | .startup_delay = ADIS16203_STARTUP_DELAY, |
| 255 | .timeouts = &adis16203_timeouts, | ||
| 249 | 256 | ||
| 250 | .status_error_msgs = adis16203_status_error_msgs, | 257 | .status_error_msgs = adis16203_status_error_msgs, |
| 251 | .status_error_mask = BIT(ADIS16203_DIAG_STAT_SELFTEST_FAIL_BIT) | | 258 | .status_error_mask = BIT(ADIS16203_DIAG_STAT_SELFTEST_FAIL_BIT) | |
| @@ -359,6 +359,12 @@ static const char * const adis16240_status_error_msgs[] = { · 358 unmodified lines | |||
| 359 | [ADIS16240_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.225V", | 359 | [ADIS16240_DIAG_STAT_POWER_LOW_BIT] = "Power supply below 2.225V", |
| 360 | }; | 360 | }; |
| 361 | 361 | ||
| 362 | static const struct adis_timeout adis16240_timeouts = { | ||
| 363 | .reset_ms = ADIS16240_STARTUP_DELAY, | ||
| 364 | .sw_reset_ms = ADIS16240_STARTUP_DELAY, | ||
| 365 | .self_test_ms = ADIS16240_STARTUP_DELAY, | ||
| 366 | }; | ||
| 367 | |||
| 362 | static const struct adis_data adis16240_data = { | 368 | static const struct adis_data adis16240_data = { |
| 363 | .write_delay = 35, | 369 | .write_delay = 35, |
| 364 | .read_delay = 35, | 370 | .read_delay = 35, |
| @@ -369,6 +375,7 @@ static const struct adis_data adis16240_data = { · 4 unmodified lines | |||
| 369 | .self_test_mask = ADIS16240_MSC_CTRL_SELF_TEST_EN, | 375 | .self_test_mask = ADIS16240_MSC_CTRL_SELF_TEST_EN, |
| 370 | .self_test_no_autoclear = true, | 376 | .self_test_no_autoclear = true, |
| 371 | .startup_delay = ADIS16240_STARTUP_DELAY, | 377 | .startup_delay = ADIS16240_STARTUP_DELAY, |
| 378 | .timeouts = &adis16240_timeouts, | ||
| 372 | 379 | ||
| 373 | .status_error_msgs = adis16240_status_error_msgs, | 380 | .status_error_msgs = adis16240_status_error_msgs, |
| 374 | .status_error_mask = BIT(ADIS16240_DIAG_STAT_PWRON_FAIL_BIT) | | 381 | .status_error_mask = BIT(ADIS16240_DIAG_STAT_PWRON_FAIL_BIT) | |
| @@ -22,6 +22,17 @@ · 21 unmodified lines | |||
| 22 | struct adis; | 22 | struct adis; |
| 23 | struct adis_burst; | 23 | struct adis_burst; |
| 24 | 24 | ||
| 25 | /** | ||
| 26 | * struct adis_timeouts - ADIS chip variant timeouts | ||
| 27 | * @reset_ms - Wait time after rst pin goes inactive | ||
| 28 | * @sw_reset_ms - Wait time after sw reset command | ||
| 29 | * @self_test_ms - Wait time after self test command | ||
| 30 | */ | ||
| 31 | struct adis_timeout { | ||
| 32 | u16 reset_ms; | ||
| 33 | u16 sw_reset_ms; | ||
| 34 | u16 self_test_ms; | ||
| 35 | }; | ||
| 25 | /** | 36 | /** |
| 26 | * struct adis_data - ADIS chip variant specific data | 37 | * struct adis_data - ADIS chip variant specific data |
| 27 | * @read_delay: SPI delay for read operations in us | 38 | * @read_delay: SPI delay for read operations in us |
| @@ -32,6 +43,7 @@ struct adis_burst; · 4 unmodified lines | |||
| 32 | * @diag_stat_reg: Register address of the DIAG_STAT register | 43 | * @diag_stat_reg: Register address of the DIAG_STAT register |
| 33 | * @status_error_msgs: Array of error messgaes | 44 | * @status_error_msgs: Array of error messgaes |
| 34 | * @status_error_mask: | 45 | * @status_error_mask: |
| 46 | * @timeouts: Chip specific delays | ||
| 35 | */ | 47 | */ |
| 36 | struct adis_data { | 48 | struct adis_data { |
| 37 | unsigned int read_delay; | 49 | unsigned int read_delay; |
| @@ -45,6 +57,7 @@ struct adis_data { · 7 unmodified lines | |||
| 45 | unsigned int self_test_mask; | 57 | unsigned int self_test_mask; |
| 46 | bool self_test_no_autoclear; | 58 | bool self_test_no_autoclear; |
| 47 | unsigned int startup_delay; | 59 | unsigned int startup_delay; |
| 60 | const struct adis_timeout *timeouts; | ||
| 48 | 61 | ||
| 49 | const char * const *status_error_msgs; | 62 | const char * const *status_error_msgs; |
| 50 | unsigned int status_error_mask; | 63 | unsigned int status_error_mask; |