Pull KVM updates from Paolo Bonzini: "ARM: - support for chained PMU counters in guests - improved SError handling - handle Neoverse N1 erratum #1349291 - allow side-channel mitigation status to be migrated - standardise most AArch64 system register accesses to msr_s/mrs_s - fix host MPIDR corruption on 32bit - selftests ckleanups x86: - PMU event {white,black}listing - ability for the guest to disable host-side interrupt polling - fixes for enlightened VMCS (Hyper-V pv nested virtualization), - new hypercall to yield to IPI target - support for passing cstate MSRs through to the guest - lots of cleanups and optimizations Generic: - Some txt->rST conversions for the documentation" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (128 commits) Documentation: virtual: Add toctree hooks Documentation: kvm: Convert cpuid.txt to .rst Documentation: virtual: Convert paravirt_ops.txt to .rst KVM: x86: Unconditionally enable irqs in guest context KVM: x86: PMU Event Filter kvm: x86: Fix -Wmissing-prototypes warnings KVM: Properly check if "page" is valid in kvm_vcpu_unmap KVM: arm/arm64: Initialise host's MPIDRs by reading the actual register KVM: LAPIC: Retry tune per-vCPU timer_advance_ns if adaptive tuning goes insane kvm: LAPIC: write down valid APIC registers KVM: arm64: Migrate _elx sysreg accessors to msr_s/mrs_s KVM: doc: Add API documentation on the KVM_REG_ARM_WORKAROUNDS register KVM: arm/arm64: Add save/restore support for firmware workaround state arm64: KVM: Propagate full Spectre v2 workaround state to KVM guests KVM: arm/arm64: Support chained PMU counters KVM: arm/arm64: Remove pmc->bitmask KVM: arm/arm64: Re-create event when setting counter value KVM: arm/arm64: Extract duplicated code to own function KVM: arm/arm64: Rename kvm_pmu_{enable/disable}_counter functions KVM: LAPIC: ARBPRI is a reserved register for x2APIC ...
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| @@ -696,9 +696,11 @@ struct kvm_ioeventfd { · 695 unmodified lines | ||
| 696 | 696 | #define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0) |
| 697 | 697 | #define KVM_X86_DISABLE_EXITS_HLT (1 << 1) |
| 698 | 698 | #define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2) |
| 699 | +#define KVM_X86_DISABLE_EXITS_CSTATE (1 << 3) | |
| 699 | 700 | #define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT | \ |
| 700 | 701 | KVM_X86_DISABLE_EXITS_HLT | \ |
| 701 | − KVM_X86_DISABLE_EXITS_PAUSE) | |
| 702 | + KVM_X86_DISABLE_EXITS_PAUSE | \ | |
| 703 | + KVM_X86_DISABLE_EXITS_CSTATE) | |
| 702 | 704 | |
| 703 | 705 | /* for KVM_ENABLE_CAP */ |
| 704 | 706 | struct kvm_enable_cap { |
| @@ -993,6 +995,7 @@ struct kvm_ppc_resize_hpt { · 288 unmodified lines | ||
| 993 | 995 | #define KVM_CAP_ARM_SVE 170 |
| 994 | 996 | #define KVM_CAP_ARM_PTRAUTH_ADDRESS 171 |
| 995 | 997 | #define KVM_CAP_ARM_PTRAUTH_GENERIC 172 |
| 998 | +#define KVM_CAP_PMU_EVENT_FILTER 173 | |
| 996 | 999 | |
| 997 | 1000 | #ifdef KVM_CAP_IRQ_ROUTING |
| 998 | 1001 | |
| @@ -1327,6 +1330,8 @@ struct kvm_s390_ucas_mapping { · 328 unmodified lines | ||
| 1327 | 1330 | #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_info) |
| 1328 | 1331 | /* Available with KVM_CAP_PPC_GET_CPU_CHAR */ |
| 1329 | 1332 | #define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char) |
| 1333 | +/* Available with KVM_CAP_PMU_EVENT_FILTER */ | |
| 1334 | +#define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_filter) | |
| 1330 | 1335 | |
| 1331 | 1336 | /* ioctl for vm fd */ |
| 1332 | 1337 | #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) |
| @@ -28,6 +28,7 @@ · 27 unmodified lines | ||
| 28 | 28 | #define KVM_HC_MIPS_CONSOLE_OUTPUT 8 |
| 29 | 29 | #define KVM_HC_CLOCK_PAIRING 9 |
| 30 | 30 | #define KVM_HC_SEND_IPI 10 |
| 31 | +#define KVM_HC_SCHED_YIELD 11 | |
| 31 | 32 | |
| 32 | 33 | /* |
| 33 | 34 | * hypercalls use architecture specific |