Kickstart 6.14 cycle.
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| @@ -82,13 +82,13 @@ · 81 unmodified lines | ||
| 82 | 82 | * NOTE: _IOW means userland is writing and kernel is reading. _IOR |
| 83 | 83 | * means userland is reading and kernel is writing. |
| 84 | 84 | */ |
| 85 | −#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) | |
| 86 | −#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size))) | |
| 87 | −#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) | |
| 88 | −#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) | |
| 89 | −#define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) | |
| 90 | −#define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) | |
| 91 | −#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) | |
| 85 | +#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) | |
| 86 | +#define _IOR(type,nr,argtype) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(argtype))) | |
| 87 | +#define _IOW(type,nr,argtype) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(argtype))) | |
| 88 | +#define _IOWR(type,nr,argtype) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(argtype))) | |
| 89 | +#define _IOR_BAD(type,nr,argtype) _IOC(_IOC_READ,(type),(nr),sizeof(argtype)) | |
| 90 | +#define _IOW_BAD(type,nr,argtype) _IOC(_IOC_WRITE,(type),(nr),sizeof(argtype)) | |
| 91 | +#define _IOWR_BAD(type,nr,argtype) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(argtype)) | |
| 92 | 92 | |
| 93 | 93 | /* used to decode ioctl numbers.. */ |
| 94 | 94 | #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) |
| @@ -79,6 +79,9 @@ · 78 unmodified lines | ||
| 79 | 79 | |
| 80 | 80 | #define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */ |
| 81 | 81 | |
| 82 | +#define MADV_GUARD_INSTALL 102 /* fatal signal on access to range */ | |
| 83 | +#define MADV_GUARD_REMOVE 103 /* unguard range */ | |
| 84 | + | |
| 82 | 85 | /* compatibility flags */ |
| 83 | 86 | #define MAP_FILE 0 |
| 84 | 87 | |
| @@ -19,4 +19,8 @@ · 18 unmodified lines | ||
| 19 | 19 | #define MCL_FUTURE 2 /* lock all future mappings */ |
| 20 | 20 | #define MCL_ONFAULT 4 /* lock all pages that are faulted in */ |
| 21 | 21 | |
| 22 | +#define SHADOW_STACK_SET_TOKEN (1ULL << 0) /* Set up a restore token in the shadow stack */ | |
| 23 | +#define SHADOW_STACK_SET_MARKER (1ULL << 1) /* Set up a top of stack marker in the shadow stack */ | |
| 24 | + | |
| 25 | + | |
| 22 | 26 | #endif /* __ASM_GENERIC_MMAN_H */ |
| @@ -46,7 +46,7 @@ union __sifields { · 45 unmodified lines | ||
| 46 | 46 | __kernel_timer_t _tid; /* timer id */ |
| 47 | 47 | int _overrun; /* overrun count */ |
| 48 | 48 | sigval_t _sigval; /* same as below */ |
| 49 | − int _sys_private; /* not to be passed to user */ | |
| 49 | + int _sys_private; /* Not used by the kernel. Historic leftover. Always 0. */ | |
| 50 | 50 | } _timer; |
| 51 | 51 | |
| 52 | 52 | /* POSIX.1b signals */ |
| @@ -141,6 +141,8 @@ · 140 unmodified lines | ||
| 141 | 141 | #define SCM_DEVMEM_DMABUF SO_DEVMEM_DMABUF |
| 142 | 142 | #define SO_DEVMEM_DONTNEED 80 |
| 143 | 143 | |
| 144 | +#define SCM_TS_OPT_ID 81 | |
| 145 | + | |
| 144 | 146 | #if !defined(__KERNEL__) |
| 145 | 147 | |
| 146 | 148 | #if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__)) |
| @@ -841,8 +841,17 @@ __SYSCALL(__NR_lsm_list_modules, sys_lsm_list_modules) · 840 unmodified lines | ||
| 841 | 841 | #define __NR_mseal 462 |
| 842 | 842 | __SYSCALL(__NR_mseal, sys_mseal) |
| 843 | 843 | |
| 844 | +#define __NR_setxattrat 463 | |
| 845 | +__SYSCALL(__NR_setxattrat, sys_setxattrat) | |
| 846 | +#define __NR_getxattrat 464 | |
| 847 | +__SYSCALL(__NR_getxattrat, sys_getxattrat) | |
| 848 | +#define __NR_listxattrat 465 | |
| 849 | +__SYSCALL(__NR_listxattrat, sys_listxattrat) | |
| 850 | +#define __NR_removexattrat 466 | |
| 851 | +__SYSCALL(__NR_removexattrat, sys_removexattrat) | |
| 852 | + | |
| 844 | 853 | #undef __NR_syscalls |
| 845 | −#define __NR_syscalls 463 | |
| 854 | +#define __NR_syscalls 467 | |
| 846 | 855 | |
| 847 | 856 | /* |
| 848 | 857 | * 32 bit systems traditionally used different |
| @@ -1516,6 +1516,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) · 1515 unmodified lines | ||
| 1516 | 1516 | * 64K_D_2D on GFX12 is identical to 64K_D on GFX11. |
| 1517 | 1517 | */ |
| 1518 | 1518 | #define AMD_FMT_MOD_TILE_GFX9_64K_D 10 |
| 1519 | +#define AMD_FMT_MOD_TILE_GFX9_4K_D_X 22 | |
| 1519 | 1520 | #define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25 |
| 1520 | 1521 | #define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26 |
| 1521 | 1522 | #define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27 |
| @@ -347,7 +347,10 @@ struct drm_msm_gem_madvise { · 346 unmodified lines | ||
| 347 | 347 | * backwards compatibility as a "default" submitqueue |
| 348 | 348 | */ |
| 349 | 349 | |
| 350 | −#define MSM_SUBMITQUEUE_FLAGS (0) | |
| 350 | +#define MSM_SUBMITQUEUE_ALLOW_PREEMPT 0x00000001 | |
| 351 | +#define MSM_SUBMITQUEUE_FLAGS ( \ | |
| 352 | + MSM_SUBMITQUEUE_ALLOW_PREEMPT | \ | |
| 353 | + 0) | |
| 351 | 354 | |
| 352 | 355 | /* |
| 353 | 356 | * The submitqueue priority should be between 0 and MSM_PARAM_PRIORITIES-1, |
| @@ -1485,6 +1485,7 @@ struct drm_xe_oa_unit { · 1484 unmodified lines | ||
| 1485 | 1485 | /** @capabilities: OA capabilities bit-mask */ |
| 1486 | 1486 | __u64 capabilities; |
| 1487 | 1487 | #define DRM_XE_OA_CAPS_BASE (1 << 0) |
| 1488 | +#define DRM_XE_OA_CAPS_SYNCS (1 << 1) | |
| 1488 | 1489 | |
| 1489 | 1490 | /** @oa_timestamp_freq: OA timestamp freq */ |
| 1490 | 1491 | __u64 oa_timestamp_freq; |
| @@ -1634,6 +1635,22 @@ enum drm_xe_oa_property_id { · 143 unmodified lines | ||
| 1634 | 1635 | * to be disabled for the stream exec queue. |
| 1635 | 1636 | */ |
| 1636 | 1637 | DRM_XE_OA_PROPERTY_NO_PREEMPT, |
| 1638 | + | |
| 1639 | + /** | |
| 1640 | + * @DRM_XE_OA_PROPERTY_NUM_SYNCS: Number of syncs in the sync array | |
| 1641 | + * specified in @DRM_XE_OA_PROPERTY_SYNCS | |
| 1642 | + */ | |
| 1643 | + DRM_XE_OA_PROPERTY_NUM_SYNCS, | |
| 1644 | + | |
| 1645 | + /** | |
| 1646 | + * @DRM_XE_OA_PROPERTY_SYNCS: Pointer to struct @drm_xe_sync array | |
| 1647 | + * with array size specified via @DRM_XE_OA_PROPERTY_NUM_SYNCS. OA | |
| 1648 | + * configuration will wait till input fences signal. Output fences | |
| 1649 | + * will signal after the new OA configuration takes effect. For | |
| 1650 | + * @DRM_XE_SYNC_TYPE_USER_FENCE, @addr is a user pointer, similar | |
| 1651 | + * to the VM bind case. | |
| 1652 | + */ | |
| 1653 | + DRM_XE_OA_PROPERTY_SYNCS, | |
| 1637 | 1654 | }; |
| 1638 | 1655 | |
| 1639 | 1656 | /** |
| @@ -9,6 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | #include <asm/byteorder.h> |
| 11 | 11 | #include <linux/if_ether.h> |
| 12 | +#include <linux/stddef.h> | |
| 12 | 13 | #include <linux/types.h> |
| 13 | 14 | |
| 14 | 15 | /** |
| @@ -592,19 +593,6 @@ struct batadv_tvlv_gateway_data { · 577 unmodified lines | ||
| 592 | 593 | __be32 bandwidth_up; |
| 593 | 594 | }; |
| 594 | 595 | |
| 595 | −/** | |
| 596 | − * struct batadv_tvlv_tt_data - tt data propagated through the tt tvlv container | |
| 597 | − * @flags: translation table flags (see batadv_tt_data_flags) | |
| 598 | − * @ttvn: translation table version number | |
| 599 | − * @num_vlan: number of announced VLANs. In the TVLV this struct is followed by | |
| 600 | − * one batadv_tvlv_tt_vlan_data object per announced vlan | |
| 601 | − */ | |
| 602 | −struct batadv_tvlv_tt_data { | |
| 603 | − __u8 flags; | |
| 604 | − __u8 ttvn; | |
| 605 | − __be16 num_vlan; | |
| 606 | −}; | |
| 607 | − | |
| 608 | 596 | /** |
| 609 | 597 | * struct batadv_tvlv_tt_vlan_data - vlan specific tt data propagated through |
| 610 | 598 | * the tt tvlv container |
| @@ -618,6 +606,21 @@ struct batadv_tvlv_tt_vlan_data { · 7 unmodified lines | ||
| 618 | 606 | __u16 reserved; |
| 619 | 607 | }; |
| 620 | 608 | |
| 609 | +/** | |
| 610 | + * struct batadv_tvlv_tt_data - tt data propagated through the tt tvlv container | |
| 611 | + * @flags: translation table flags (see batadv_tt_data_flags) | |
| 612 | + * @ttvn: translation table version number | |
| 613 | + * @num_vlan: number of announced VLANs. In the TVLV this struct is followed by | |
| 614 | + * one batadv_tvlv_tt_vlan_data object per announced vlan | |
| 615 | + * @vlan_data: array of batadv_tvlv_tt_vlan_data objects | |
| 616 | + */ | |
| 617 | +struct batadv_tvlv_tt_data { | |
| 618 | + __u8 flags; | |
| 619 | + __u8 ttvn; | |
| 620 | + __be16 num_vlan; | |
| 621 | + struct batadv_tvlv_tt_vlan_data vlan_data[] __counted_by_be(num_vlan); | |
| 622 | +}; | |
| 623 | + | |
| 621 | 624 | /** |
| 622 | 625 | * struct batadv_tvlv_tt_change - translation table diff data |
| 623 | 626 | * @flags: status indicators concerning the non-mesh client (see |
| @@ -1116,6 +1116,7 @@ enum bpf_attach_type { · 1115 unmodified lines | ||
| 1116 | 1116 | BPF_NETKIT_PRIMARY, |
| 1117 | 1117 | BPF_NETKIT_PEER, |
| 1118 | 1118 | BPF_TRACE_KPROBE_SESSION, |
| 1119 | + BPF_TRACE_UPROBE_SESSION, | |
| 1119 | 1120 | __MAX_BPF_ATTACH_TYPE |
| 1120 | 1121 | }; |
| 1121 | 1122 | |
| @@ -1973,6 +1974,8 @@ union bpf_attr { · 851 unmodified lines | ||
| 1973 | 1974 | * program. |
| 1974 | 1975 | * Return |
| 1975 | 1976 | * The SMP id of the processor running the program. |
| 1977 | + * Attributes | |
| 1978 | + * __bpf_fastcall | |
| 1976 | 1979 | * |
| 1977 | 1980 | * long bpf_skb_store_bytes(struct sk_buff *skb, u32 offset, const void *from, u32 len, u64 flags) |
| 1978 | 1981 | * Description |
| @@ -3104,10 +3107,6 @@ union bpf_attr { · 1125 unmodified lines | ||
| 3104 | 3107 | * with the **CONFIG_BPF_KPROBE_OVERRIDE** configuration |
| 3105 | 3108 | * option, and in this case it only works on functions tagged with |
| 3106 | 3109 | * **ALLOW_ERROR_INJECTION** in the kernel code. |
| 3107 | − * | |
| 3108 | − * Also, the helper is only available for the architectures having | |
| 3109 | − * the CONFIG_FUNCTION_ERROR_INJECTION option. As of this writing, | |
| 3110 | − * x86 architecture is the only one to support this feature. | |
| 3111 | 3110 | * Return |
| 3112 | 3111 | * 0 |
| 3113 | 3112 | * |
| @@ -5372,7 +5371,7 @@ union bpf_attr { · 2258 unmodified lines | ||
| 5372 | 5371 | * Currently, the **flags** must be 0. Currently, nr_loops is |
| 5373 | 5372 | * limited to 1 << 23 (~8 million) loops. |
| 5374 | 5373 | * |
| 5375 | − * long (\*callback_fn)(u32 index, void \*ctx); | |
| 5374 | + * long (\*callback_fn)(u64 index, void \*ctx); | |
| 5376 | 5375 | * |
| 5377 | 5376 | * where **index** is the current index in the loop. The index |
| 5378 | 5377 | * is zero-indexed. |
| @@ -1049,6 +1049,29 @@ struct btrfs_ioctl_encoded_io_args { · 1048 unmodified lines | ||
| 1049 | 1049 | #define BTRFS_ENCODED_IO_ENCRYPTION_NONE 0 |
| 1050 | 1050 | #define BTRFS_ENCODED_IO_ENCRYPTION_TYPES 1 |
| 1051 | 1051 | |
| 1052 | +/* | |
| 1053 | + * Wait for subvolume cleaning process. This queries the kernel queue and it | |
| 1054 | + * can change between the calls. | |
| 1055 | + * | |
| 1056 | + * - FOR_ONE - specify the subvolid | |
| 1057 | + * - FOR_QUEUED - wait for all currently queued | |
| 1058 | + * - COUNT - count number of queued | |
| 1059 | + * - PEEK_FIRST - read which is the first in the queue (to be cleaned or being | |
| 1060 | + * cleaned already), or 0 if the queue is empty | |
| 1061 | + * - PEEK_LAST - read the last subvolid in the queue, or 0 if the queue is empty | |
| 1062 | + */ | |
| 1063 | +struct btrfs_ioctl_subvol_wait { | |
| 1064 | + __u64 subvolid; | |
| 1065 | + __u32 mode; | |
| 1066 | + __u32 count; | |
| 1067 | +}; | |
| 1068 | + | |
| 1069 | +#define BTRFS_SUBVOL_SYNC_WAIT_FOR_ONE (0) | |
| 1070 | +#define BTRFS_SUBVOL_SYNC_WAIT_FOR_QUEUED (1) | |
| 1071 | +#define BTRFS_SUBVOL_SYNC_COUNT (2) | |
| 1072 | +#define BTRFS_SUBVOL_SYNC_PEEK_FIRST (3) | |
| 1073 | +#define BTRFS_SUBVOL_SYNC_PEEK_LAST (4) | |
| 1074 | + | |
| 1052 | 1075 | /* Error codes as returned by the kernel */ |
| 1053 | 1076 | enum btrfs_err_code { |
| 1054 | 1077 | BTRFS_ERROR_DEV_RAID1_MIN_NOT_MET = 1, |
| @@ -1181,6 +1204,8 @@ enum btrfs_err_code { · 126 unmodified lines | ||
| 1181 | 1204 | struct btrfs_ioctl_encoded_io_args) |
| 1182 | 1205 | #define BTRFS_IOC_ENCODED_WRITE _IOW(BTRFS_IOCTL_MAGIC, 64, \ |
| 1183 | 1206 | struct btrfs_ioctl_encoded_io_args) |
| 1207 | +#define BTRFS_IOC_SUBVOL_SYNC_WAIT _IOW(BTRFS_IOCTL_MAGIC, 65, \ | |
| 1208 | + struct btrfs_ioctl_subvol_wait) | |
| 1184 | 1209 | |
| 1185 | 1210 | #ifdef __cplusplus |
| 1186 | 1211 | } |
| @@ -64,6 +64,7 @@ enum crypto_attr_type_t { · 63 unmodified lines | ||
| 64 | 64 | CRYPTOCFGA_STAT_AKCIPHER, /* No longer supported, do not use. */ |
| 65 | 65 | CRYPTOCFGA_STAT_KPP, /* No longer supported, do not use. */ |
| 66 | 66 | CRYPTOCFGA_STAT_ACOMP, /* No longer supported, do not use. */ |
| 67 | + CRYPTOCFGA_REPORT_SIG, /* struct crypto_report_sig */ | |
| 67 | 68 | __CRYPTOCFGA_MAX |
| 68 | 69 | |
| 69 | 70 | #define CRYPTOCFGA_MAX (__CRYPTOCFGA_MAX - 1) |
| @@ -207,6 +208,10 @@ struct crypto_report_acomp { · 137 unmodified lines | ||
| 207 | 208 | char type[CRYPTO_MAX_NAME]; |
| 208 | 209 | }; |
| 209 | 210 | |
| 211 | +struct crypto_report_sig { | |
| 212 | + char type[CRYPTO_MAX_NAME]; | |
| 213 | +}; | |
| 214 | + | |
| 210 | 215 | #define CRYPTO_REPORT_MAXSIZE (sizeof(struct crypto_user_alg) + \ |
| 211 | 216 | sizeof(struct crypto_report_blkcipher)) |
| 212 | 217 | |
| @@ -79,6 +79,29 @@ enum dpll_lock_status_error { · 78 unmodified lines | ||
| 79 | 79 | DPLL_LOCK_STATUS_ERROR_MAX = (__DPLL_LOCK_STATUS_ERROR_MAX - 1) |
| 80 | 80 | }; |
| 81 | 81 | |
| 82 | +/* | |
| 83 | + * level of quality of a clock device. This mainly applies when the dpll | |
| 84 | + * lock-status is DPLL_LOCK_STATUS_HOLDOVER. The current list is defined | |
| 85 | + * according to the table 11-7 contained in ITU-T G.8264/Y.1364 document. One | |
| 86 | + * may extend this list freely by other ITU-T defined clock qualities, or | |
| 87 | + * different ones defined by another standardization body (for those, please | |
| 88 | + * use different prefix). | |
| 89 | + */ | |
| 90 | +enum dpll_clock_quality_level { | |
| 91 | + DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRC = 1, | |
| 92 | + DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_A, | |
| 93 | + DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_SSU_B, | |
| 94 | + DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEC1, | |
| 95 | + DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_PRTC, | |
| 96 | + DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRTC, | |
| 97 | + DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EEEC, | |
| 98 | + DPLL_CLOCK_QUALITY_LEVEL_ITU_OPT1_EPRC, | |
| 99 | + | |
| 100 | + /* private: */ | |
| 101 | + __DPLL_CLOCK_QUALITY_LEVEL_MAX, | |
| 102 | + DPLL_CLOCK_QUALITY_LEVEL_MAX = (__DPLL_CLOCK_QUALITY_LEVEL_MAX - 1) | |
| 103 | +}; | |
| 104 | + | |
| 82 | 105 | #define DPLL_TEMP_DIVIDER 1000 |
| 83 | 106 | |
| 84 | 107 | /** |
| @@ -180,6 +203,7 @@ enum dpll_a { · 95 unmodified lines | ||
| 180 | 203 | DPLL_A_TEMP, |
| 181 | 204 | DPLL_A_TYPE, |
| 182 | 205 | DPLL_A_LOCK_STATUS_ERROR, |
| 206 | + DPLL_A_CLOCK_QUALITY_LEVEL, | |
| 183 | 207 | |
| 184 | 208 | __DPLL_A_MAX, |
| 185 | 209 | DPLL_A_MAX = (__DPLL_A_MAX - 1) |
| @@ -443,6 +443,7 @@ typedef struct elf64_shdr { · 442 unmodified lines | ||
| 443 | 443 | #define NT_ARM_ZT 0x40d /* ARM SME ZT registers */ |
| 444 | 444 | #define NT_ARM_FPMR 0x40e /* ARM floating point mode register */ |
| 445 | 445 | #define NT_ARM_POE 0x40f /* ARM POE registers */ |
| 446 | +#define NT_ARM_GCS 0x410 /* ARM GCS state */ | |
| 446 | 447 | #define NT_ARC_V2 0x600 /* ARCv2 accumulator/extra registers */ |
| 447 | 448 | #define NT_VMCOREDD 0x700 /* Vmcore Device Dump Note */ |
| 448 | 449 | #define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */ |
| @@ -450,6 +451,7 @@ typedef struct elf64_shdr { · 1 unmodified line | ||
| 450 | 451 | #define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */ |
| 451 | 452 | #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ |
| 452 | 453 | #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ |
| 454 | +#define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ | |
| 453 | 455 | #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ |
| 454 | 456 | #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ |
| 455 | 457 | #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */ |
| @@ -2526,12 +2526,19 @@ struct ethtool_link_settings { · 2525 unmodified lines | ||
| 2526 | 2526 | __u8 master_slave_state; |
| 2527 | 2527 | __u8 rate_matching; |
| 2528 | 2528 | __u32 reserved[7]; |
| 2529 | +#ifndef __KERNEL__ | |
| 2530 | + /* Linux builds with -Wflex-array-member-not-at-end but does | |
| 2531 | + * not use the "link_mode_masks" member. Leave it defined for | |
| 2532 | + * userspace for now, and when userspace wants to start using | |
| 2533 | + * -Wfamnae, we'll need a new solution. | |
| 2534 | + */ | |
| 2529 | 2535 | __u32 link_mode_masks[]; |
| 2530 | 2536 | /* layout of link_mode_masks fields: |
| 2531 | 2537 | * __u32 map_supported[link_mode_masks_nwords]; |
| 2532 | 2538 | * __u32 map_advertising[link_mode_masks_nwords]; |
| 2533 | 2539 | * __u32 map_lp_advertising[link_mode_masks_nwords]; |
| 2534 | 2540 | */ |
| 2541 | +#endif | |
| 2535 | 2542 | }; |
| 2536 | 2543 | |
| 2537 | 2544 | /** |
| @@ -43,6 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | #define F2FS_IOC_DECOMPRESS_FILE _IO(F2FS_IOCTL_MAGIC, 23) |
| 44 | 44 | #define F2FS_IOC_COMPRESS_FILE _IO(F2FS_IOCTL_MAGIC, 24) |
| 45 | 45 | #define F2FS_IOC_START_ATOMIC_REPLACE _IO(F2FS_IOCTL_MAGIC, 25) |
| 46 | +#define F2FS_IOC_GET_DEV_ALIAS_FILE _IOR(F2FS_IOCTL_MAGIC, 26, __u32) | |
| 46 | 47 | |
| 47 | 48 | /* |
| 48 | 49 | * should be same as XFS_IOC_GOINGDOWN. |
| @@ -60,6 +60,7 @@ · 59 unmodified lines | ||
| 60 | 60 | #define FAN_REPORT_DIR_FID 0x00000400 /* Report unique directory id */ |
| 61 | 61 | #define FAN_REPORT_NAME 0x00000800 /* Report events with name */ |
| 62 | 62 | #define FAN_REPORT_TARGET_FID 0x00001000 /* Report dirent target id */ |
| 63 | +#define FAN_REPORT_FD_ERROR 0x00002000 /* event->fd can report error */ | |
| 63 | 64 | |
| 64 | 65 | /* Convenience macro - FAN_REPORT_NAME requires FAN_REPORT_DIR_FID */ |
| 65 | 66 | #define FAN_REPORT_DFID_NAME (FAN_REPORT_DIR_FID | FAN_REPORT_NAME) |
| @@ -153,9 +153,6 @@ · 152 unmodified lines | ||
| 153 | 153 | object identity and may not be |
| 154 | 154 | usable with open_by_handle_at(2). */ |
| 155 | 155 | #define AT_HANDLE_MNT_ID_UNIQUE 0x001 /* Return the u64 unique mount ID. */ |
| 156 | − | |
| 157 | −#if defined(__KERNEL__) | |
| 158 | −#define AT_GETATTR_NOSEC 0x80000000 | |
| 159 | −#endif | |
| 156 | +#define AT_HANDLE_CONNECTABLE 0x002 /* Request a connectable file handle */ | |
| 160 | 157 | |
| 161 | 158 | #endif /* _UAPI_LINUX_FCNTL_H */ |
| @@ -377,6 +377,7 @@ enum { · 376 unmodified lines | ||
| 377 | 377 | IFLA_GSO_IPV4_MAX_SIZE, |
| 378 | 378 | IFLA_GRO_IPV4_MAX_SIZE, |
| 379 | 379 | IFLA_DPLL_PIN, |
| 380 | + IFLA_MAX_PACING_OFFLOAD_HORIZON, | |
| 380 | 381 | __IFLA_MAX |
| 381 | 382 | }; |
| 382 | 383 | |
| @@ -1292,6 +1293,19 @@ enum netkit_mode { · 909 unmodified lines | ||
| 1292 | 1293 | NETKIT_L3, |
| 1293 | 1294 | }; |
| 1294 | 1295 | |
| 1296 | +/* NETKIT_SCRUB_NONE leaves clearing skb->{mark,priority} up to | |
| 1297 | + * the BPF program if attached. This also means the latter can | |
| 1298 | + * consume the two fields if they were populated earlier. | |
| 1299 | + * | |
| 1300 | + * NETKIT_SCRUB_DEFAULT zeroes skb->{mark,priority} fields before | |
| 1301 | + * invoking the attached BPF program when the peer device resides | |
| 1302 | + * in a different network namespace. This is the default behavior. | |
| 1303 | + */ | |
| 1304 | +enum netkit_scrub { | |
| 1305 | + NETKIT_SCRUB_NONE, | |
| 1306 | + NETKIT_SCRUB_DEFAULT, | |
| 1307 | +}; | |
| 1308 | + | |
| 1295 | 1309 | enum { |
| 1296 | 1310 | IFLA_NETKIT_UNSPEC, |
| 1297 | 1311 | IFLA_NETKIT_PEER_INFO, |
| @@ -1299,6 +1313,8 @@ enum { · 1 unmodified line | ||
| 1299 | 1313 | IFLA_NETKIT_POLICY, |
| 1300 | 1314 | IFLA_NETKIT_PEER_POLICY, |
| 1301 | 1315 | IFLA_NETKIT_MODE, |
| 1316 | + IFLA_NETKIT_SCRUB, | |
| 1317 | + IFLA_NETKIT_PEER_SCRUB, | |
| 1302 | 1318 | __IFLA_NETKIT_MAX, |
| 1303 | 1319 | }; |
| 1304 | 1320 | #define IFLA_NETKIT_MAX (__IFLA_NETKIT_MAX - 1) |
| @@ -1942,6 +1958,7 @@ struct ifla_rmnet_flags { · 637 unmodified lines | ||
| 1942 | 1958 | enum { |
| 1943 | 1959 | IFLA_MCTP_UNSPEC, |
| 1944 | 1960 | IFLA_MCTP_NET, |
| 1961 | + IFLA_MCTP_PHYS_BINDING, | |
| 1945 | 1962 | __IFLA_MCTP_MAX, |
| 1946 | 1963 | }; |
| 1947 | 1964 | |
| @@ -51,6 +51,7 @@ enum iio_chan_type { · 50 unmodified lines | ||
| 51 | 51 | IIO_DELTA_VELOCITY, |
| 52 | 52 | IIO_COLORTEMP, |
| 53 | 53 | IIO_CHROMATICITY, |
| 54 | + IIO_ATTENTION, | |
| 54 | 55 | }; |
| 55 | 56 | |
| 56 | 57 | enum iio_modifier { |
| @@ -200,6 +200,9 @@ enum io_uring_sqe_flags_bit { · 199 unmodified lines | ||
| 200 | 200 | */ |
| 201 | 201 | #define IORING_SETUP_NO_SQARRAY (1U << 16) |
| 202 | 202 | |
| 203 | +/* Use hybrid poll in iopoll process */ | |
| 204 | +#define IORING_SETUP_HYBRID_IOPOLL (1U << 17) | |
| 205 | + | |
| 203 | 206 | enum io_uring_op { |
| 204 | 207 | IORING_OP_NOP, |
| 205 | 208 | IORING_OP_READV, |
| @@ -416,6 +419,9 @@ enum io_uring_msg_ring_flags { · 210 unmodified lines | ||
| 416 | 419 | * IORING_NOP_INJECT_RESULT Inject result from sqe->result |
| 417 | 420 | */ |
| 418 | 421 | #define IORING_NOP_INJECT_RESULT (1U << 0) |
| 422 | +#define IORING_NOP_FILE (1U << 1) | |
| 423 | +#define IORING_NOP_FIXED_FILE (1U << 2) | |
| 424 | +#define IORING_NOP_FIXED_BUFFER (1U << 3) | |
| 419 | 425 | |
| 420 | 426 | /* |
| 421 | 427 | * IO completion data structure (Completion Queue Entry) |
| @@ -518,6 +524,7 @@ struct io_cqring_offsets { · 96 unmodified lines | ||
| 518 | 524 | #define IORING_ENTER_EXT_ARG (1U << 3) |
| 519 | 525 | #define IORING_ENTER_REGISTERED_RING (1U << 4) |
| 520 | 526 | #define IORING_ENTER_ABS_TIMER (1U << 5) |
| 527 | +#define IORING_ENTER_EXT_ARG_REG (1U << 6) | |
| 521 | 528 | |
| 522 | 529 | /* |
| 523 | 530 | * Passed in for io_uring_setup(2). Copied back with updated info on success |
| @@ -612,6 +619,16 @@ enum io_uring_register_op { · 88 unmodified lines | ||
| 612 | 619 | /* clone registered buffers from source ring to current ring */ |
| 613 | 620 | IORING_REGISTER_CLONE_BUFFERS = 30, |
| 614 | 621 | |
| 622 | + /* send MSG_RING without having a ring */ | |
| 623 | + IORING_REGISTER_SEND_MSG_RING = 31, | |
| 624 | + | |
| 625 | + /* 32 reserved for zc rx */ | |
| 626 | + | |
| 627 | + /* resize CQ ring */ | |
| 628 | + IORING_REGISTER_RESIZE_RINGS = 33, | |
| 629 | + | |
| 630 | + IORING_REGISTER_MEM_REGION = 34, | |
| 631 | + | |
| 615 | 632 | /* this goes last */ |
| 616 | 633 | IORING_REGISTER_LAST, |
| 617 | 634 | |
| @@ -632,6 +649,31 @@ struct io_uring_files_update { · 14 unmodified lines | ||
| 632 | 649 | __aligned_u64 /* __s32 * */ fds; |
| 633 | 650 | }; |
| 634 | 651 | |
| 652 | +enum { | |
| 653 | + /* initialise with user provided memory pointed by user_addr */ | |
| 654 | + IORING_MEM_REGION_TYPE_USER = 1, | |
| 655 | +}; | |
| 656 | + | |
| 657 | +struct io_uring_region_desc { | |
| 658 | + __u64 user_addr; | |
| 659 | + __u64 size; | |
| 660 | + __u32 flags; | |
| 661 | + __u32 id; | |
| 662 | + __u64 mmap_offset; | |
| 663 | + __u64 __resv[4]; | |
| 664 | +}; | |
| 665 | + | |
| 666 | +enum { | |
| 667 | + /* expose the region as registered wait arguments */ | |
| 668 | + IORING_MEM_REGION_REG_WAIT_ARG = 1, | |
| 669 | +}; | |
| 670 | + | |
| 671 | +struct io_uring_mem_region_reg { | |
| 672 | + __u64 region_uptr; /* struct io_uring_region_desc * */ | |
| 673 | + __u64 flags; | |
| 674 | + __u64 __resv[2]; | |
| 675 | +}; | |
| 676 | + | |
| 635 | 677 | /* |
| 636 | 678 | * Register a fully sparse file space, rather than pass in an array of all |
| 637 | 679 | * -1 file descriptors. |
| @@ -698,13 +740,17 @@ struct io_uring_clock_register { · 60 unmodified lines | ||
| 698 | 740 | }; |
| 699 | 741 | |
| 700 | 742 | enum { |
| 701 | − IORING_REGISTER_SRC_REGISTERED = 1, | |
| 743 | + IORING_REGISTER_SRC_REGISTERED = (1U << 0), | |
| 744 | + IORING_REGISTER_DST_REPLACE = (1U << 1), | |
| 702 | 745 | }; |
| 703 | 746 | |
| 704 | 747 | struct io_uring_clone_buffers { |
| 705 | 748 | __u32 src_fd; |
| 706 | 749 | __u32 flags; |
| 707 | − __u32 pad[6]; | |
| 750 | + __u32 src_off; | |
| 751 | + __u32 dst_off; | |
| 752 | + __u32 nr; | |
| 753 | + __u32 pad[3]; | |
| 708 | 754 | }; |
| 709 | 755 | |
| 710 | 756 | struct io_uring_buf { |
| @@ -768,12 +814,40 @@ struct io_uring_buf_status { · 57 unmodified lines | ||
| 768 | 814 | __u32 resv[8]; |
| 769 | 815 | }; |
| 770 | 816 | |
| 817 | +enum io_uring_napi_op { | |
| 818 | + /* register/ungister backward compatible opcode */ | |
| 819 | + IO_URING_NAPI_REGISTER_OP = 0, | |
| 820 | + | |
| 821 | + /* opcodes to update napi_list when static tracking is used */ | |
| 822 | + IO_URING_NAPI_STATIC_ADD_ID = 1, | |
| 823 | + IO_URING_NAPI_STATIC_DEL_ID = 2 | |
| 824 | +}; | |
| 825 | + | |
| 826 | +enum io_uring_napi_tracking_strategy { | |
| 827 | + /* value must be 0 for backward compatibility */ | |
| 828 | + IO_URING_NAPI_TRACKING_DYNAMIC = 0, | |
| 829 | + IO_URING_NAPI_TRACKING_STATIC = 1, | |
| 830 | + IO_URING_NAPI_TRACKING_INACTIVE = 255 | |
| 831 | +}; | |
| 832 | + | |
| 771 | 833 | /* argument for IORING_(UN)REGISTER_NAPI */ |
| 772 | 834 | struct io_uring_napi { |
| 773 | 835 | __u32 busy_poll_to; |
| 774 | 836 | __u8 prefer_busy_poll; |
| 775 | − __u8 pad[3]; | |
| 776 | − __u64 resv; | |
| 837 | + | |
| 838 | + /* a io_uring_napi_op value */ | |
| 839 | + __u8 opcode; | |
| 840 | + __u8 pad[2]; | |
| 841 | + | |
| 842 | + /* | |
| 843 | + * for IO_URING_NAPI_REGISTER_OP, it is a | |
| 844 | + * io_uring_napi_tracking_strategy value. | |
| 845 | + * | |
| 846 | + * for IO_URING_NAPI_STATIC_ADD_ID/IO_URING_NAPI_STATIC_DEL_ID | |
| 847 | + * it is the napi id to add/del from napi_list. | |
| 848 | + */ | |
| 849 | + __u32 op_param; | |
| 850 | + __u32 resv; | |
| 777 | 851 | }; |
| 778 | 852 | |
| 779 | 853 | /* |
| @@ -795,6 +869,29 @@ enum io_uring_register_restriction_op { · 15 unmodified lines | ||
| 795 | 869 | IORING_RESTRICTION_LAST |
| 796 | 870 | }; |
| 797 | 871 | |
| 872 | +enum { | |
| 873 | + IORING_REG_WAIT_TS = (1U << 0), | |
| 874 | +}; | |
| 875 | + | |
| 876 | +/* | |
| 877 | + * Argument for io_uring_enter(2) with | |
| 878 | + * IORING_GETEVENTS | IORING_ENTER_EXT_ARG_REG set, where the actual argument | |
| 879 | + * is an index into a previously registered fixed wait region described by | |
| 880 | + * the below structure. | |
| 881 | + */ | |
| 882 | +struct io_uring_reg_wait { | |
| 883 | + struct __kernel_timespec ts; | |
| 884 | + __u32 min_wait_usec; | |
| 885 | + __u32 flags; | |
| 886 | + __u64 sigmask; | |
| 887 | + __u32 sigmask_sz; | |
| 888 | + __u32 pad[3]; | |
| 889 | + __u64 pad2[2]; | |
| 890 | +}; | |
| 891 | + | |
| 892 | +/* | |
| 893 | + * Argument for io_uring_enter(2) with IORING_GETEVENTS | IORING_ENTER_EXT_ARG | |
| 894 | + */ | |
| 798 | 895 | struct io_uring_getevents_arg { |
| 799 | 896 | __u64 sigmask; |
| 800 | 897 | __u32 sigmask_sz; |
| @@ -51,6 +51,10 @@ enum { · 50 unmodified lines | ||
| 51 | 51 | IOMMUFD_CMD_HWPT_GET_DIRTY_BITMAP = 0x8c, |
| 52 | 52 | IOMMUFD_CMD_HWPT_INVALIDATE = 0x8d, |
| 53 | 53 | IOMMUFD_CMD_FAULT_QUEUE_ALLOC = 0x8e, |
| 54 | + IOMMUFD_CMD_IOAS_MAP_FILE = 0x8f, | |
| 55 | + IOMMUFD_CMD_VIOMMU_ALLOC = 0x90, | |
| 56 | + IOMMUFD_CMD_VDEVICE_ALLOC = 0x91, | |
| 57 | + IOMMUFD_CMD_IOAS_CHANGE_PROCESS = 0x92, | |
| 54 | 58 | }; |
| 55 | 59 | |
| 56 | 60 | /** |
| @@ -213,6 +217,30 @@ struct iommu_ioas_map { · 156 unmodified lines | ||
| 213 | 217 | }; |
| 214 | 218 | #define IOMMU_IOAS_MAP _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP) |
| 215 | 219 | |
| 220 | +/** | |
| 221 | + * struct iommu_ioas_map_file - ioctl(IOMMU_IOAS_MAP_FILE) | |
| 222 | + * @size: sizeof(struct iommu_ioas_map_file) | |
| 223 | + * @flags: same as for iommu_ioas_map | |
| 224 | + * @ioas_id: same as for iommu_ioas_map | |
| 225 | + * @fd: the memfd to map | |
| 226 | + * @start: byte offset from start of file to map from | |
| 227 | + * @length: same as for iommu_ioas_map | |
| 228 | + * @iova: same as for iommu_ioas_map | |
| 229 | + * | |
| 230 | + * Set an IOVA mapping from a memfd file. All other arguments and semantics | |
| 231 | + * match those of IOMMU_IOAS_MAP. | |
| 232 | + */ | |
| 233 | +struct iommu_ioas_map_file { | |
| 234 | + __u32 size; | |
| 235 | + __u32 flags; | |
| 236 | + __u32 ioas_id; | |
| 237 | + __s32 fd; | |
| 238 | + __aligned_u64 start; | |
| 239 | + __aligned_u64 length; | |
| 240 | + __aligned_u64 iova; | |
| 241 | +}; | |
| 242 | +#define IOMMU_IOAS_MAP_FILE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_MAP_FILE) | |
| 243 | + | |
| 216 | 244 | /** |
| 217 | 245 | * struct iommu_ioas_copy - ioctl(IOMMU_IOAS_COPY) |
| 218 | 246 | * @size: sizeof(struct iommu_ioas_copy) |
| @@ -359,11 +387,19 @@ struct iommu_vfio_ioas { · 140 unmodified lines | ||
| 359 | 387 | * enforced on device attachment |
| 360 | 388 | * @IOMMU_HWPT_FAULT_ID_VALID: The fault_id field of hwpt allocation data is |
| 361 | 389 | * valid. |
| 390 | + * @IOMMU_HWPT_ALLOC_PASID: Requests a domain that can be used with PASID. The | |
| 391 | + * domain can be attached to any PASID on the device. | |
| 392 | + * Any domain attached to the non-PASID part of the | |
| 393 | + * device must also be flaged, otherwise attaching a | |
| 394 | + * PASID will blocked. | |
| 395 | + * If IOMMU does not support PASID it will return | |
| 396 | + * error (-EOPNOTSUPP). | |
| 362 | 397 | */ |
| 363 | 398 | enum iommufd_hwpt_alloc_flags { |
| 364 | 399 | IOMMU_HWPT_ALLOC_NEST_PARENT = 1 << 0, |
| 365 | 400 | IOMMU_HWPT_ALLOC_DIRTY_TRACKING = 1 << 1, |
| 366 | 401 | IOMMU_HWPT_FAULT_ID_VALID = 1 << 2, |
| 402 | + IOMMU_HWPT_ALLOC_PASID = 1 << 3, | |
| 367 | 403 | }; |
| 368 | 404 | |
| 369 | 405 | /** |
| @@ -394,14 +430,36 @@ struct iommu_hwpt_vtd_s1 { · 24 unmodified lines | ||
| 394 | 430 | __u32 __reserved; |
| 395 | 431 | }; |
| 396 | 432 | |
| 433 | +/** | |
| 434 | + * struct iommu_hwpt_arm_smmuv3 - ARM SMMUv3 nested STE | |
| 435 | + * (IOMMU_HWPT_DATA_ARM_SMMUV3) | |
| 436 | + * | |
| 437 | + * @ste: The first two double words of the user space Stream Table Entry for | |
| 438 | + * the translation. Must be little-endian. | |
| 439 | + * Allowed fields: (Refer to "5.2 Stream Table Entry" in SMMUv3 HW Spec) | |
| 440 | + * - word-0: V, Cfg, S1Fmt, S1ContextPtr, S1CDMax | |
| 441 | + * - word-1: EATS, S1DSS, S1CIR, S1COR, S1CSH, S1STALLD | |
| 442 | + * | |
| 443 | + * -EIO will be returned if @ste is not legal or contains any non-allowed field. | |
| 444 | + * Cfg can be used to select a S1, Bypass or Abort configuration. A Bypass | |
| 445 | + * nested domain will translate the same as the nesting parent. The S1 will | |
| 446 | + * install a Context Descriptor Table pointing at userspace memory translated | |
| 447 | + * by the nesting parent. | |
| 448 | + */ | |
| 449 | +struct iommu_hwpt_arm_smmuv3 { | |
| 450 | + __aligned_le64 ste[2]; | |
| 451 | +}; | |
| 452 | + | |
| 397 | 453 | /** |
| 398 | 454 | * enum iommu_hwpt_data_type - IOMMU HWPT Data Type |
| 399 | 455 | * @IOMMU_HWPT_DATA_NONE: no data |
| 400 | 456 | * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table |
| 457 | + * @IOMMU_HWPT_DATA_ARM_SMMUV3: ARM SMMUv3 Context Descriptor Table | |
| 401 | 458 | */ |
| 402 | 459 | enum iommu_hwpt_data_type { |
| 403 | 460 | IOMMU_HWPT_DATA_NONE = 0, |
| 404 | 461 | IOMMU_HWPT_DATA_VTD_S1 = 1, |
| 462 | + IOMMU_HWPT_DATA_ARM_SMMUV3 = 2, | |
| 405 | 463 | }; |
| 406 | 464 | |
| 407 | 465 | /** |
| @@ -409,7 +467,7 @@ enum iommu_hwpt_data_type { · 1 unmodified line | ||
| 409 | 467 | * @size: sizeof(struct iommu_hwpt_alloc) |
| 410 | 468 | * @flags: Combination of enum iommufd_hwpt_alloc_flags |
| 411 | 469 | * @dev_id: The device to allocate this HWPT for |
| 412 | − * @pt_id: The IOAS or HWPT to connect this HWPT to | |
| 470 | + * @pt_id: The IOAS or HWPT or vIOMMU to connect this HWPT to | |
| 413 | 471 | * @out_hwpt_id: The ID of the new HWPT |
| 414 | 472 | * @__reserved: Must be 0 |
| 415 | 473 | * @data_type: One of enum iommu_hwpt_data_type |
| @@ -428,11 +486,13 @@ enum iommu_hwpt_data_type { · 12 unmodified lines | ||
| 428 | 486 | * IOMMU_HWPT_DATA_NONE. The HWPT can be allocated as a parent HWPT for a |
| 429 | 487 | * nesting configuration by passing IOMMU_HWPT_ALLOC_NEST_PARENT via @flags. |
| 430 | 488 | * |
| 431 | − * A user-managed nested HWPT will be created from a given parent HWPT via | |
| 432 | − * @pt_id, in which the parent HWPT must be allocated previously via the | |
| 433 | − * same ioctl from a given IOAS (@pt_id). In this case, the @data_type | |
| 434 | − * must be set to a pre-defined type corresponding to an I/O page table | |
| 435 | − * type supported by the underlying IOMMU hardware. | |
| 489 | + * A user-managed nested HWPT will be created from a given vIOMMU (wrapping a | |
| 490 | + * parent HWPT) or a parent HWPT via @pt_id, in which the parent HWPT must be | |
| 491 | + * allocated previously via the same ioctl from a given IOAS (@pt_id). In this | |
| 492 | + * case, the @data_type must be set to a pre-defined type corresponding to an | |
| 493 | + * I/O page table type supported by the underlying IOMMU hardware. The device | |
| 494 | + * via @dev_id and the vIOMMU via @pt_id must be associated to the same IOMMU | |
| 495 | + * instance. | |
| 436 | 496 | * |
| 437 | 497 | * If the @data_type is set to IOMMU_HWPT_DATA_NONE, @data_len and |
| 438 | 498 | * @data_uptr should be zero. Otherwise, both @data_len and @data_uptr |
| @@ -484,15 +544,50 @@ struct iommu_hw_info_vtd { · 45 unmodified lines | ||
| 484 | 544 | __aligned_u64 ecap_reg; |
| 485 | 545 | }; |
| 486 | 546 | |
| 547 | +/** | |
| 548 | + * struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information | |
| 549 | + * (IOMMU_HW_INFO_TYPE_ARM_SMMUV3) | |
| 550 | + * | |
| 551 | + * @flags: Must be set to 0 | |
| 552 | + * @__reserved: Must be 0 | |
| 553 | + * @idr: Implemented features for ARM SMMU Non-secure programming interface | |
| 554 | + * @iidr: Information about the implementation and implementer of ARM SMMU, | |
| 555 | + * and architecture version supported | |
| 556 | + * @aidr: ARM SMMU architecture version | |
| 557 | + * | |
| 558 | + * For the details of @idr, @iidr and @aidr, please refer to the chapters | |
| 559 | + * from 6.3.1 to 6.3.6 in the SMMUv3 Spec. | |
| 560 | + * | |
| 561 | + * User space should read the underlying ARM SMMUv3 hardware information for | |
| 562 | + * the list of supported features. | |
| 563 | + * | |
| 564 | + * Note that these values reflect the raw HW capability, without any insight if | |
| 565 | + * any required kernel driver support is present. Bits may be set indicating the | |
| 566 | + * HW has functionality that is lacking kernel software support, such as BTM. If | |
| 567 | + * a VMM is using this information to construct emulated copies of these | |
| 568 | + * registers it should only forward bits that it knows it can support. | |
| 569 | + * | |
| 570 | + * In future, presence of required kernel support will be indicated in flags. | |
| 571 | + */ | |
| 572 | +struct iommu_hw_info_arm_smmuv3 { | |
| 573 | + __u32 flags; | |
| 574 | + __u32 __reserved; | |
| 575 | + __u32 idr[6]; | |
| 576 | + __u32 iidr; | |
| 577 | + __u32 aidr; | |
| 578 | +}; | |
| 579 | + | |
| 487 | 580 | /** |
| 488 | 581 | * enum iommu_hw_info_type - IOMMU Hardware Info Types |
| 489 | 582 | * @IOMMU_HW_INFO_TYPE_NONE: Used by the drivers that do not report hardware |
| 490 | 583 | * info |
| 491 | 584 | * @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type |
| 585 | + * @IOMMU_HW_INFO_TYPE_ARM_SMMUV3: ARM SMMUv3 iommu info type | |
| 492 | 586 | */ |
| 493 | 587 | enum iommu_hw_info_type { |
| 494 | 588 | IOMMU_HW_INFO_TYPE_NONE = 0, |
| 495 | 589 | IOMMU_HW_INFO_TYPE_INTEL_VTD = 1, |
| 590 | + IOMMU_HW_INFO_TYPE_ARM_SMMUV3 = 2, | |
| 496 | 591 | }; |
| 497 | 592 | |
| 498 | 593 | /** |
| @@ -627,9 +722,11 @@ struct iommu_hwpt_get_dirty_bitmap { · 128 unmodified lines | ||
| 627 | 722 | * enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation |
| 628 | 723 | * Data Type |
| 629 | 724 | * @IOMMU_HWPT_INVALIDATE_DATA_VTD_S1: Invalidation data for VTD_S1 |
| 725 | + * @IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3: Invalidation data for ARM SMMUv3 | |
| 630 | 726 | */ |
| 631 | 727 | enum iommu_hwpt_invalidate_data_type { |
| 632 | 728 | IOMMU_HWPT_INVALIDATE_DATA_VTD_S1 = 0, |
| 729 | + IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3 = 1, | |
| 633 | 730 | }; |
| 634 | 731 | |
| 635 | 732 | /** |
| @@ -668,10 +765,32 @@ struct iommu_hwpt_vtd_s1_invalidate { · 32 unmodified lines | ||
| 668 | 765 | __u32 __reserved; |
| 669 | 766 | }; |
| 670 | 767 | |
| 768 | +/** | |
| 769 | + * struct iommu_viommu_arm_smmuv3_invalidate - ARM SMMUv3 cahce invalidation | |
| 770 | + * (IOMMU_VIOMMU_INVALIDATE_DATA_ARM_SMMUV3) | |
| 771 | + * @cmd: 128-bit cache invalidation command that runs in SMMU CMDQ. | |
| 772 | + * Must be little-endian. | |
| 773 | + * | |
| 774 | + * Supported command list only when passing in a vIOMMU via @hwpt_id: | |
| 775 | + * CMDQ_OP_TLBI_NSNH_ALL | |
| 776 | + * CMDQ_OP_TLBI_NH_VA | |
| 777 | + * CMDQ_OP_TLBI_NH_VAA | |
| 778 | + * CMDQ_OP_TLBI_NH_ALL | |
| 779 | + * CMDQ_OP_TLBI_NH_ASID | |
| 780 | + * CMDQ_OP_ATC_INV | |
| 781 | + * CMDQ_OP_CFGI_CD | |
| 782 | + * CMDQ_OP_CFGI_CD_ALL | |
| 783 | + * | |
| 784 | + * -EIO will be returned if the command is not supported. | |
| 785 | + */ | |
| 786 | +struct iommu_viommu_arm_smmuv3_invalidate { | |
| 787 | + __aligned_le64 cmd[2]; | |
| 788 | +}; | |
| 789 | + | |
| 671 | 790 | /** |
| 672 | 791 | * struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE) |
| 673 | 792 | * @size: sizeof(struct iommu_hwpt_invalidate) |
| 674 | − * @hwpt_id: ID of a nested HWPT for cache invalidation | |
| 793 | + * @hwpt_id: ID of a nested HWPT or a vIOMMU, for cache invalidation | |
| 675 | 794 | * @data_uptr: User pointer to an array of driver-specific cache invalidation |
| 676 | 795 | * data. |
| 677 | 796 | * @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the data |
| @@ -682,8 +801,11 @@ struct iommu_hwpt_vtd_s1_invalidate { · 4 unmodified lines | ||
| 682 | 801 | * Output the number of requests successfully handled by kernel. |
| 683 | 802 | * @__reserved: Must be 0. |
| 684 | 803 | * |
| 685 | − * Invalidate the iommu cache for user-managed page table. Modifications on a | |
| 686 | − * user-managed page table should be followed by this operation to sync cache. | |
| 804 | + * Invalidate iommu cache for user-managed page table or vIOMMU. Modifications | |
| 805 | + * on a user-managed page table should be followed by this operation, if a HWPT | |
| 806 | + * is passed in via @hwpt_id. Other caches, such as device cache or descriptor | |
| 807 | + * cache can be flushed if a vIOMMU is passed in via the @hwpt_id field. | |
| 808 | + * | |
| 687 | 809 | * Each ioctl can support one or more cache invalidation requests in the array |
| 688 | 810 | * that has a total size of @entry_len * @entry_num. |
| 689 | 811 | * |
| @@ -797,4 +919,88 @@ struct iommu_fault_alloc { · 107 unmodified lines | ||
| 797 | 919 | __u32 out_fault_fd; |
| 798 | 920 | }; |
| 799 | 921 | #define IOMMU_FAULT_QUEUE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_FAULT_QUEUE_ALLOC) |
| 922 | + | |
| 923 | +/** | |
| 924 | + * enum iommu_viommu_type - Virtual IOMMU Type | |
| 925 | + * @IOMMU_VIOMMU_TYPE_DEFAULT: Reserved for future use | |
| 926 | + * @IOMMU_VIOMMU_TYPE_ARM_SMMUV3: ARM SMMUv3 driver specific type | |
| 927 | + */ | |
| 928 | +enum iommu_viommu_type { | |
| 929 | + IOMMU_VIOMMU_TYPE_DEFAULT = 0, | |
| 930 | + IOMMU_VIOMMU_TYPE_ARM_SMMUV3 = 1, | |
| 931 | +}; | |
| 932 | + | |
| 933 | +/** | |
| 934 | + * struct iommu_viommu_alloc - ioctl(IOMMU_VIOMMU_ALLOC) | |
| 935 | + * @size: sizeof(struct iommu_viommu_alloc) | |
| 936 | + * @flags: Must be 0 | |
| 937 | + * @type: Type of the virtual IOMMU. Must be defined in enum iommu_viommu_type | |
| 938 | + * @dev_id: The device's physical IOMMU will be used to back the virtual IOMMU | |
| 939 | + * @hwpt_id: ID of a nesting parent HWPT to associate to | |
| 940 | + * @out_viommu_id: Output virtual IOMMU ID for the allocated object | |
| 941 | + * | |
| 942 | + * Allocate a virtual IOMMU object, representing the underlying physical IOMMU's | |
| 943 | + * virtualization support that is a security-isolated slice of the real IOMMU HW | |
| 944 | + * that is unique to a specific VM. Operations global to the IOMMU are connected | |
| 945 | + * to the vIOMMU, such as: | |
| 946 | + * - Security namespace for guest owned ID, e.g. guest-controlled cache tags | |
| 947 | + * - Non-device-affiliated event reporting, e.g. invalidation queue errors | |
| 948 | + * - Access to a sharable nesting parent pagetable across physical IOMMUs | |
| 949 | + * - Virtualization of various platforms IDs, e.g. RIDs and others | |
| 950 | + * - Delivery of paravirtualized invalidation | |
| 951 | + * - Direct assigned invalidation queues | |
| 952 | + * - Direct assigned interrupts | |
| 953 | + */ | |
| 954 | +struct iommu_viommu_alloc { | |
| 955 | + __u32 size; | |
| 956 | + __u32 flags; | |
| 957 | + __u32 type; | |
| 958 | + __u32 dev_id; | |
| 959 | + __u32 hwpt_id; | |
| 960 | + __u32 out_viommu_id; | |
| 961 | +}; | |
| 962 | +#define IOMMU_VIOMMU_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VIOMMU_ALLOC) | |
| 963 | + | |
| 964 | +/** | |
| 965 | + * struct iommu_vdevice_alloc - ioctl(IOMMU_VDEVICE_ALLOC) | |
| 966 | + * @size: sizeof(struct iommu_vdevice_alloc) | |
| 967 | + * @viommu_id: vIOMMU ID to associate with the virtual device | |
| 968 | + * @dev_id: The physical device to allocate a virtual instance on the vIOMMU | |
| 969 | + * @out_vdevice_id: Object handle for the vDevice. Pass to IOMMU_DESTORY | |
| 970 | + * @virt_id: Virtual device ID per vIOMMU, e.g. vSID of ARM SMMUv3, vDeviceID | |
| 971 | + * of AMD IOMMU, and vRID of a nested Intel VT-d to a Context Table | |
| 972 | + * | |
| 973 | + * Allocate a virtual device instance (for a physical device) against a vIOMMU. | |
| 974 | + * This instance holds the device's information (related to its vIOMMU) in a VM. | |
| 975 | + */ | |
| 976 | +struct iommu_vdevice_alloc { | |
| 977 | + __u32 size; | |
| 978 | + __u32 viommu_id; | |
| 979 | + __u32 dev_id; | |
| 980 | + __u32 out_vdevice_id; | |
| 981 | + __aligned_u64 virt_id; | |
| 982 | +}; | |
| 983 | +#define IOMMU_VDEVICE_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VDEVICE_ALLOC) | |
| 984 | + | |
| 985 | +/** | |
| 986 | + * struct iommu_ioas_change_process - ioctl(VFIO_IOAS_CHANGE_PROCESS) | |
| 987 | + * @size: sizeof(struct iommu_ioas_change_process) | |
| 988 | + * @__reserved: Must be 0 | |
| 989 | + * | |
| 990 | + * This transfers pinned memory counts for every memory map in every IOAS | |
| 991 | + * in the context to the current process. This only supports maps created | |
| 992 | + * with IOMMU_IOAS_MAP_FILE, and returns EINVAL if other maps are present. | |
| 993 | + * If the ioctl returns a failure status, then nothing is changed. | |
| 994 | + * | |
| 995 | + * This API is useful for transferring operation of a device from one process | |
| 996 | + * to another, such as during userland live update. | |
| 997 | + */ | |
| 998 | +struct iommu_ioas_change_process { | |
| 999 | + __u32 size; | |
| 1000 | + __u32 __reserved; | |
| 1001 | +}; | |
| 1002 | + | |
| 1003 | +#define IOMMU_IOAS_CHANGE_PROCESS \ | |
| 1004 | + _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_CHANGE_PROCESS) | |
| 1005 | + | |
| 800 | 1006 | #endif |
| @@ -60,7 +60,8 @@ · 59 unmodified lines | ||
| 60 | 60 | #define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000 |
| 61 | 61 | #define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000 |
| 62 | 62 | #define HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED 0x40000000 |
| 63 | −#define HSA_CAP_RESERVED 0x800f8000 | |
| 63 | +#define HSA_CAP_PER_QUEUE_RESET_SUPPORTED 0x80000000 | |
| 64 | +#define HSA_CAP_RESERVED 0x000f8000 | |
| 64 | 65 | |
| 65 | 66 | /* debug_prop bits in node properties */ |
| 66 | 67 | #define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f |
| @@ -1158,7 +1158,15 @@ enum kvm_device_type { · 1157 unmodified lines | ||
| 1158 | 1158 | #define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME |
| 1159 | 1159 | KVM_DEV_TYPE_RISCV_AIA, |
| 1160 | 1160 | #define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA |
| 1161 | + KVM_DEV_TYPE_LOONGARCH_IPI, | |
| 1162 | +#define KVM_DEV_TYPE_LOONGARCH_IPI KVM_DEV_TYPE_LOONGARCH_IPI | |
| 1163 | + KVM_DEV_TYPE_LOONGARCH_EIOINTC, | |
| 1164 | +#define KVM_DEV_TYPE_LOONGARCH_EIOINTC KVM_DEV_TYPE_LOONGARCH_EIOINTC | |
| 1165 | + KVM_DEV_TYPE_LOONGARCH_PCHPIC, | |
| 1166 | +#define KVM_DEV_TYPE_LOONGARCH_PCHPIC KVM_DEV_TYPE_LOONGARCH_PCHPIC | |
| 1167 | + | |
| 1161 | 1168 | KVM_DEV_TYPE_MAX, |
| 1169 | + | |
| 1162 | 1170 | }; |
| 1163 | 1171 | |
| 1164 | 1172 | struct kvm_vfio_spapr_tce { |
| @@ -0,0 +1,273 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | +/* | |
| 3 | + * RP1 PiSP Front End Driver Configuration structures | |
| 4 | + * | |
| 5 | + * Copyright (C) 2021 - Raspberry Pi Ltd. | |
| 6 | + * | |
| 7 | + */ | |
| 8 | +#ifndef _UAPI_PISP_FE_CONFIG_ | |
| 9 | +#define _UAPI_PISP_FE_CONFIG_ | |
| 10 | + | |
| 11 | +#include <linux/types.h> | |
| 12 | + | |
| 13 | +#include "pisp_common.h" | |
| 14 | +#include "pisp_fe_statistics.h" | |
| 15 | + | |
| 16 | +#define PISP_FE_NUM_OUTPUTS 2 | |
| 17 | + | |
| 18 | +enum pisp_fe_enable { | |
| 19 | + PISP_FE_ENABLE_INPUT = 0x000001, | |
| 20 | + PISP_FE_ENABLE_DECOMPRESS = 0x000002, | |
| 21 | + PISP_FE_ENABLE_DECOMPAND = 0x000004, | |
| 22 | + PISP_FE_ENABLE_BLA = 0x000008, | |
| 23 | + PISP_FE_ENABLE_DPC = 0x000010, | |
| 24 | + PISP_FE_ENABLE_STATS_CROP = 0x000020, | |
| 25 | + PISP_FE_ENABLE_DECIMATE = 0x000040, | |
| 26 | + PISP_FE_ENABLE_BLC = 0x000080, | |
| 27 | + PISP_FE_ENABLE_CDAF_STATS = 0x000100, | |
| 28 | + PISP_FE_ENABLE_AWB_STATS = 0x000200, | |
| 29 | + PISP_FE_ENABLE_RGBY = 0x000400, | |
| 30 | + PISP_FE_ENABLE_LSC = 0x000800, | |
| 31 | + PISP_FE_ENABLE_AGC_STATS = 0x001000, | |
| 32 | + PISP_FE_ENABLE_CROP0 = 0x010000, | |
| 33 | + PISP_FE_ENABLE_DOWNSCALE0 = 0x020000, | |
| 34 | + PISP_FE_ENABLE_COMPRESS0 = 0x040000, | |
| 35 | + PISP_FE_ENABLE_OUTPUT0 = 0x080000, | |
| 36 | + PISP_FE_ENABLE_CROP1 = 0x100000, | |
| 37 | + PISP_FE_ENABLE_DOWNSCALE1 = 0x200000, | |
| 38 | + PISP_FE_ENABLE_COMPRESS1 = 0x400000, | |
| 39 | + PISP_FE_ENABLE_OUTPUT1 = 0x800000 | |
| 40 | +}; | |
| 41 | + | |
| 42 | +#define PISP_FE_ENABLE_CROP(i) (PISP_FE_ENABLE_CROP0 << (4 * (i))) | |
| 43 | +#define PISP_FE_ENABLE_DOWNSCALE(i) (PISP_FE_ENABLE_DOWNSCALE0 << (4 * (i))) | |
| 44 | +#define PISP_FE_ENABLE_COMPRESS(i) (PISP_FE_ENABLE_COMPRESS0 << (4 * (i))) | |
| 45 | +#define PISP_FE_ENABLE_OUTPUT(i) (PISP_FE_ENABLE_OUTPUT0 << (4 * (i))) | |
| 46 | + | |
| 47 | +/* | |
| 48 | + * We use the enable flags to show when blocks are "dirty", but we need some | |
| 49 | + * extra ones too. | |
| 50 | + */ | |
| 51 | +enum pisp_fe_dirty { | |
| 52 | + PISP_FE_DIRTY_GLOBAL = 0x0001, | |
| 53 | + PISP_FE_DIRTY_FLOATING = 0x0002, | |
| 54 | + PISP_FE_DIRTY_OUTPUT_AXI = 0x0004 | |
| 55 | +}; | |
| 56 | + | |
| 57 | +struct pisp_fe_global_config { | |
| 58 | + __u32 enables; | |
| 59 | + __u8 bayer_order; | |
| 60 | + __u8 pad[3]; | |
| 61 | +} __attribute__((packed)); | |
| 62 | + | |
| 63 | +struct pisp_fe_input_axi_config { | |
| 64 | + /* burst length minus one, in the range 0..15; OR'd with flags */ | |
| 65 | + __u8 maxlen_flags; | |
| 66 | + /* { prot[2:0], cache[3:0] } fields */ | |
| 67 | + __u8 cache_prot; | |
| 68 | + /* QoS (only 4 LS bits are used) */ | |
| 69 | + __u16 qos; | |
| 70 | +} __attribute__((packed)); | |
| 71 | + | |
| 72 | +struct pisp_fe_output_axi_config { | |
| 73 | + /* burst length minus one, in the range 0..15; OR'd with flags */ | |
| 74 | + __u8 maxlen_flags; | |
| 75 | + /* { prot[2:0], cache[3:0] } fields */ | |
| 76 | + __u8 cache_prot; | |
| 77 | + /* QoS (4 bitfields of 4 bits each for different panic levels) */ | |
| 78 | + __u16 qos; | |
| 79 | + /* For Panic mode: Output FIFO panic threshold */ | |
| 80 | + __u16 thresh; | |
| 81 | + /* For Panic mode: Output FIFO statistics throttle threshold */ | |
| 82 | + __u16 throttle; | |
| 83 | +} __attribute__((packed)); | |
| 84 | + | |
| 85 | +struct pisp_fe_input_config { | |
| 86 | + __u8 streaming; | |
| 87 | + __u8 pad[3]; | |
| 88 | + struct pisp_image_format_config format; | |
| 89 | + struct pisp_fe_input_axi_config axi; | |
| 90 | + /* Extra cycles delay before issuing each burst request */ | |
| 91 | + __u8 holdoff; | |
| 92 | + __u8 pad2[3]; | |
| 93 | +} __attribute__((packed)); | |
| 94 | + | |
| 95 | +struct pisp_fe_output_config { | |
| 96 | + struct pisp_image_format_config format; | |
| 97 | + __u16 ilines; | |
| 98 | + __u8 pad[2]; | |
| 99 | +} __attribute__((packed)); | |
| 100 | + | |
| 101 | +struct pisp_fe_input_buffer_config { | |
| 102 | + __u32 addr_lo; | |
| 103 | + __u32 addr_hi; | |
| 104 | + __u16 frame_id; | |
| 105 | + __u16 pad; | |
| 106 | +} __attribute__((packed)); | |
| 107 | + | |
| 108 | +#define PISP_FE_DECOMPAND_LUT_SIZE 65 | |
| 109 | + | |
| 110 | +struct pisp_fe_decompand_config { | |
| 111 | + __u16 lut[PISP_FE_DECOMPAND_LUT_SIZE]; | |
| 112 | + __u16 pad; | |
| 113 | +} __attribute__((packed)); | |
| 114 | + | |
| 115 | +struct pisp_fe_dpc_config { | |
| 116 | + __u8 coeff_level; | |
| 117 | + __u8 coeff_range; | |
| 118 | + __u8 coeff_range2; | |
| 119 | +#define PISP_FE_DPC_FLAG_FOLDBACK 1 | |
| 120 | +#define PISP_FE_DPC_FLAG_VFLAG 2 | |
| 121 | + __u8 flags; | |
| 122 | +} __attribute__((packed)); | |
| 123 | + | |
| 124 | +#define PISP_FE_LSC_LUT_SIZE 16 | |
| 125 | + | |
| 126 | +struct pisp_fe_lsc_config { | |
| 127 | + __u8 shift; | |
| 128 | + __u8 pad0; | |
| 129 | + __u16 scale; | |
| 130 | + __u16 centre_x; | |
| 131 | + __u16 centre_y; | |
| 132 | + __u16 lut[PISP_FE_LSC_LUT_SIZE]; | |
| 133 | +} __attribute__((packed)); | |
| 134 | + | |
| 135 | +struct pisp_fe_rgby_config { | |
| 136 | + __u16 gain_r; | |
| 137 | + __u16 gain_g; | |
| 138 | + __u16 gain_b; | |
| 139 | + __u8 maxflag; | |
| 140 | + __u8 pad; | |
| 141 | +} __attribute__((packed)); | |
| 142 | + | |
| 143 | +struct pisp_fe_agc_stats_config { | |
| 144 | + __u16 offset_x; | |
| 145 | + __u16 offset_y; | |
| 146 | + __u16 size_x; | |
| 147 | + __u16 size_y; | |
| 148 | + /* each weight only 4 bits */ | |
| 149 | + __u8 weights[PISP_AGC_STATS_NUM_ZONES / 2]; | |
| 150 | + __u16 row_offset_x; | |
| 151 | + __u16 row_offset_y; | |
| 152 | + __u16 row_size_x; | |
| 153 | + __u16 row_size_y; | |
| 154 | + __u8 row_shift; | |
| 155 | + __u8 float_shift; | |
| 156 | + __u8 pad1[2]; | |
| 157 | +} __attribute__((packed)); | |
| 158 | + | |
| 159 | +struct pisp_fe_awb_stats_config { | |
| 160 | + __u16 offset_x; | |
| 161 | + __u16 offset_y; | |
| 162 | + __u16 size_x; | |
| 163 | + __u16 size_y; | |
| 164 | + __u8 shift; | |
| 165 | + __u8 pad[3]; | |
| 166 | + __u16 r_lo; | |
| 167 | + __u16 r_hi; | |
| 168 | + __u16 g_lo; | |
| 169 | + __u16 g_hi; | |
| 170 | + __u16 b_lo; | |
| 171 | + __u16 b_hi; | |
| 172 | +} __attribute__((packed)); | |
| 173 | + | |
| 174 | +struct pisp_fe_floating_stats_region { | |
| 175 | + __u16 offset_x; | |
| 176 | + __u16 offset_y; | |
| 177 | + __u16 size_x; | |
| 178 | + __u16 size_y; | |
| 179 | +} __attribute__((packed)); | |
| 180 | + | |
| 181 | +struct pisp_fe_floating_stats_config { | |
| 182 | + struct pisp_fe_floating_stats_region | |
| 183 | + regions[PISP_FLOATING_STATS_NUM_ZONES]; | |
| 184 | +} __attribute__((packed)); | |
| 185 | + | |
| 186 | +#define PISP_FE_CDAF_NUM_WEIGHTS 8 | |
| 187 | + | |
| 188 | +struct pisp_fe_cdaf_stats_config { | |
| 189 | + __u16 noise_constant; | |
| 190 | + __u16 noise_slope; | |
| 191 | + __u16 offset_x; | |
| 192 | + __u16 offset_y; | |
| 193 | + __u16 size_x; | |
| 194 | + __u16 size_y; | |
| 195 | + __u16 skip_x; | |
| 196 | + __u16 skip_y; | |
| 197 | + __u32 mode; | |
| 198 | +} __attribute__((packed)); | |
| 199 | + | |
| 200 | +struct pisp_fe_stats_buffer_config { | |
| 201 | + __u32 addr_lo; | |
| 202 | + __u32 addr_hi; | |
| 203 | +} __attribute__((packed)); | |
| 204 | + | |
| 205 | +struct pisp_fe_crop_config { | |
| 206 | + __u16 offset_x; | |
| 207 | + __u16 offset_y; | |
| 208 | + __u16 width; | |
| 209 | + __u16 height; | |
| 210 | +} __attribute__((packed)); | |
| 211 | + | |
| 212 | +enum pisp_fe_downscale_flags { | |
| 213 | + /* downscale the four Bayer components independently... */ | |
| 214 | + DOWNSCALE_BAYER = 1, | |
| 215 | + /* ...without trying to preserve their spatial relationship */ | |
| 216 | + DOWNSCALE_BIN = 2, | |
| 217 | +}; | |
| 218 | + | |
| 219 | +struct pisp_fe_downscale_config { | |
| 220 | + __u8 xin; | |
| 221 | + __u8 xout; | |
| 222 | + __u8 yin; | |
| 223 | + __u8 yout; | |
| 224 | + __u8 flags; /* enum pisp_fe_downscale_flags */ | |
| 225 | + __u8 pad[3]; | |
| 226 | + __u16 output_width; | |
| 227 | + __u16 output_height; | |
| 228 | +} __attribute__((packed)); | |
| 229 | + | |
| 230 | +struct pisp_fe_output_buffer_config { | |
| 231 | + __u32 addr_lo; | |
| 232 | + __u32 addr_hi; | |
| 233 | +} __attribute__((packed)); | |
| 234 | + | |
| 235 | +/* Each of the two output channels/branches: */ | |
| 236 | +struct pisp_fe_output_branch_config { | |
| 237 | + struct pisp_fe_crop_config crop; | |
| 238 | + struct pisp_fe_downscale_config downscale; | |
| 239 | + struct pisp_compress_config compress; | |
| 240 | + struct pisp_fe_output_config output; | |
| 241 | + __u32 pad; | |
| 242 | +} __attribute__((packed)); | |
| 243 | + | |
| 244 | +/* And finally one to rule them all: */ | |
| 245 | +struct pisp_fe_config { | |
| 246 | + /* I/O configuration: */ | |
| 247 | + struct pisp_fe_stats_buffer_config stats_buffer; | |
| 248 | + struct pisp_fe_output_buffer_config output_buffer[PISP_FE_NUM_OUTPUTS]; | |
| 249 | + struct pisp_fe_input_buffer_config input_buffer; | |
| 250 | + /* processing configuration: */ | |
| 251 | + struct pisp_fe_global_config global; | |
| 252 | + struct pisp_fe_input_config input; | |
| 253 | + struct pisp_decompress_config decompress; | |
| 254 | + struct pisp_fe_decompand_config decompand; | |
| 255 | + struct pisp_bla_config bla; | |
| 256 | + struct pisp_fe_dpc_config dpc; | |
| 257 | + struct pisp_fe_crop_config stats_crop; | |
| 258 | + __u32 spare1; /* placeholder for future decimate configuration */ | |
| 259 | + struct pisp_bla_config blc; | |
| 260 | + struct pisp_fe_rgby_config rgby; | |
| 261 | + struct pisp_fe_lsc_config lsc; | |
| 262 | + struct pisp_fe_agc_stats_config agc_stats; | |
| 263 | + struct pisp_fe_awb_stats_config awb_stats; | |
| 264 | + struct pisp_fe_cdaf_stats_config cdaf_stats; | |
| 265 | + struct pisp_fe_floating_stats_config floating_stats; | |
| 266 | + struct pisp_fe_output_axi_config output_axi; | |
| 267 | + struct pisp_fe_output_branch_config ch[PISP_FE_NUM_OUTPUTS]; | |
| 268 | + /* non-register fields: */ | |
| 269 | + __u32 dirty_flags; /* these use pisp_fe_enable */ | |
| 270 | + __u32 dirty_flags_extra; /* these use pisp_fe_dirty */ | |
| 271 | +} __attribute__((packed)); | |
| 272 | + | |
| 273 | +#endif /* _UAPI_PISP_FE_CONFIG_ */ | |
| @@ -0,0 +1,64 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | +/* | |
| 3 | + * RP1 PiSP Front End statistics definitions | |
| 4 | + * | |
| 5 | + * Copyright (C) 2021 - Raspberry Pi Ltd. | |
| 6 | + * | |
| 7 | + */ | |
| 8 | +#ifndef _UAPI_PISP_FE_STATISTICS_H_ | |
| 9 | +#define _UAPI_PISP_FE_STATISTICS_H_ | |
| 10 | + | |
| 11 | +#include <linux/types.h> | |
| 12 | + | |
| 13 | +#define PISP_FLOATING_STATS_NUM_ZONES 4 | |
| 14 | +#define PISP_AGC_STATS_NUM_BINS 1024 | |
| 15 | +#define PISP_AGC_STATS_SIZE 16 | |
| 16 | +#define PISP_AGC_STATS_NUM_ZONES (PISP_AGC_STATS_SIZE * PISP_AGC_STATS_SIZE) | |
| 17 | +#define PISP_AGC_STATS_NUM_ROW_SUMS 512 | |
| 18 | + | |
| 19 | +struct pisp_agc_statistics_zone { | |
| 20 | + __u64 Y_sum; | |
| 21 | + __u32 counted; | |
| 22 | + __u32 pad; | |
| 23 | +} __attribute__((packed)); | |
| 24 | + | |
| 25 | +struct pisp_agc_statistics { | |
| 26 | + __u32 row_sums[PISP_AGC_STATS_NUM_ROW_SUMS]; | |
| 27 | + /* | |
| 28 | + * 32-bits per bin means an image (just less than) 16384x16384 pixels | |
| 29 | + * in size can weight every pixel from 0 to 15. | |
| 30 | + */ | |
| 31 | + __u32 histogram[PISP_AGC_STATS_NUM_BINS]; | |
| 32 | + struct pisp_agc_statistics_zone floating[PISP_FLOATING_STATS_NUM_ZONES]; | |
| 33 | +} __attribute__((packed)); | |
| 34 | + | |
| 35 | +#define PISP_AWB_STATS_SIZE 32 | |
| 36 | +#define PISP_AWB_STATS_NUM_ZONES (PISP_AWB_STATS_SIZE * PISP_AWB_STATS_SIZE) | |
| 37 | + | |
| 38 | +struct pisp_awb_statistics_zone { | |
| 39 | + __u32 R_sum; | |
| 40 | + __u32 G_sum; | |
| 41 | + __u32 B_sum; | |
| 42 | + __u32 counted; | |
| 43 | +} __attribute__((packed)); | |
| 44 | + | |
| 45 | +struct pisp_awb_statistics { | |
| 46 | + struct pisp_awb_statistics_zone zones[PISP_AWB_STATS_NUM_ZONES]; | |
| 47 | + struct pisp_awb_statistics_zone floating[PISP_FLOATING_STATS_NUM_ZONES]; | |
| 48 | +} __attribute__((packed)); | |
| 49 | + | |
| 50 | +#define PISP_CDAF_STATS_SIZE 8 | |
| 51 | +#define PISP_CDAF_STATS_NUM_FOMS (PISP_CDAF_STATS_SIZE * PISP_CDAF_STATS_SIZE) | |
| 52 | + | |
| 53 | +struct pisp_cdaf_statistics { | |
| 54 | + __u64 foms[PISP_CDAF_STATS_NUM_FOMS]; | |
| 55 | + __u64 floating[PISP_FLOATING_STATS_NUM_ZONES]; | |
| 56 | +} __attribute__((packed)); | |
| 57 | + | |
| 58 | +struct pisp_statistics { | |
| 59 | + struct pisp_awb_statistics awb; | |
| 60 | + struct pisp_agc_statistics agc; | |
| 61 | + struct pisp_cdaf_statistics cdaf; | |
| 62 | +} __attribute__((packed)); | |
| 63 | + | |
| 64 | +#endif /* _UAPI_PISP_FE_STATISTICS_H_ */ | |
| @@ -154,7 +154,7 @@ struct mount_attr { · 153 unmodified lines | ||
| 154 | 154 | */ |
| 155 | 155 | struct statmount { |
| 156 | 156 | __u32 size; /* Total size, including strings */ |
| 157 | − __u32 mnt_opts; /* [str] Mount options of the mount */ | |
| 157 | + __u32 mnt_opts; /* [str] Options (comma separated, escaped) */ | |
| 158 | 158 | __u64 mask; /* What results were written */ |
| 159 | 159 | __u32 sb_dev_major; /* Device ID */ |
| 160 | 160 | __u32 sb_dev_minor; |
| @@ -173,7 +173,13 @@ struct statmount { · 12 unmodified lines | ||
| 173 | 173 | __u32 mnt_root; /* [str] Root of mount relative to root of fs */ |
| 174 | 174 | __u32 mnt_point; /* [str] Mountpoint relative to current root */ |
| 175 | 175 | __u64 mnt_ns_id; /* ID of the mount namespace */ |
| 176 | − __u64 __spare2[49]; | |
| 176 | + __u32 fs_subtype; /* [str] Subtype of fs_type (if any) */ | |
| 177 | + __u32 sb_source; /* [str] Source string of the mount */ | |
| 178 | + __u32 opt_num; /* Number of fs options */ | |
| 179 | + __u32 opt_array; /* [str] Array of nul terminated fs options */ | |
| 180 | + __u32 opt_sec_num; /* Number of security options */ | |
| 181 | + __u32 opt_sec_array; /* [str] Array of nul terminated security options */ | |
| 182 | + __u64 __spare2[46]; | |
| 177 | 183 | char str[]; /* Variable size part containing strings */ |
| 178 | 184 | }; |
| 179 | 185 | |
| @@ -207,6 +213,10 @@ struct mnt_id_req { · 27 unmodified lines | ||
| 207 | 213 | #define STATMOUNT_FS_TYPE 0x00000020U /* Want/got fs_type */ |
| 208 | 214 | #define STATMOUNT_MNT_NS_ID 0x00000040U /* Want/got mnt_ns_id */ |
| 209 | 215 | #define STATMOUNT_MNT_OPTS 0x00000080U /* Want/got mnt_opts */ |
| 216 | +#define STATMOUNT_FS_SUBTYPE 0x00000100U /* Want/got fs_subtype */ | |
| 217 | +#define STATMOUNT_SB_SOURCE 0x00000200U /* Want/got sb_source */ | |
| 218 | +#define STATMOUNT_OPT_ARRAY 0x00000400U /* Want/got opt_... */ | |
| 219 | +#define STATMOUNT_OPT_SEC_ARRAY 0x00000800U /* Want/got opt_sec... */ | |
| 210 | 220 | |
| 211 | 221 | /* |
| 212 | 222 | * Special @mnt_id values that can be passed to listmount |
| @@ -0,0 +1,95 @@ | ||
| 1 | +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ | |
| 2 | +/* Do not edit directly, auto-generated from: */ | |
| 3 | +/* Documentation/netlink/specs/net_shaper.yaml */ | |
| 4 | +/* YNL-GEN uapi header */ | |
| 5 | + | |
| 6 | +#ifndef _UAPI_LINUX_NET_SHAPER_H | |
| 7 | +#define _UAPI_LINUX_NET_SHAPER_H | |
| 8 | + | |
| 9 | +#define NET_SHAPER_FAMILY_NAME "net-shaper" | |
| 10 | +#define NET_SHAPER_FAMILY_VERSION 1 | |
| 11 | + | |
| 12 | +/** | |
| 13 | + * enum net_shaper_scope - Defines the shaper @id interpretation. | |
| 14 | + * @NET_SHAPER_SCOPE_UNSPEC: The scope is not specified. | |
| 15 | + * @NET_SHAPER_SCOPE_NETDEV: The main shaper for the given network device. | |
| 16 | + * @NET_SHAPER_SCOPE_QUEUE: The shaper is attached to the given device queue, | |
| 17 | + * the @id represents the queue number. | |
| 18 | + * @NET_SHAPER_SCOPE_NODE: The shaper allows grouping of queues or other node | |
| 19 | + * shapers; can be nested in either @netdev shapers or other @node shapers, | |
| 20 | + * allowing placement in any location of the scheduling tree, except leaves | |
| 21 | + * and root. | |
| 22 | + */ | |
| 23 | +enum net_shaper_scope { | |
| 24 | + NET_SHAPER_SCOPE_UNSPEC, | |
| 25 | + NET_SHAPER_SCOPE_NETDEV, | |
| 26 | + NET_SHAPER_SCOPE_QUEUE, | |
| 27 | + NET_SHAPER_SCOPE_NODE, | |
| 28 | + | |
| 29 | + /* private: */ | |
| 30 | + __NET_SHAPER_SCOPE_MAX, | |
| 31 | + NET_SHAPER_SCOPE_MAX = (__NET_SHAPER_SCOPE_MAX - 1) | |
| 32 | +}; | |
| 33 | + | |
| 34 | +/** | |
| 35 | + * enum net_shaper_metric - Different metric supported by the shaper. | |
| 36 | + * @NET_SHAPER_METRIC_BPS: Shaper operates on a bits per second basis. | |
| 37 | + * @NET_SHAPER_METRIC_PPS: Shaper operates on a packets per second basis. | |
| 38 | + */ | |
| 39 | +enum net_shaper_metric { | |
| 40 | + NET_SHAPER_METRIC_BPS, | |
| 41 | + NET_SHAPER_METRIC_PPS, | |
| 42 | +}; | |
| 43 | + | |
| 44 | +enum { | |
| 45 | + NET_SHAPER_A_HANDLE = 1, | |
| 46 | + NET_SHAPER_A_METRIC, | |
| 47 | + NET_SHAPER_A_BW_MIN, | |
| 48 | + NET_SHAPER_A_BW_MAX, | |
| 49 | + NET_SHAPER_A_BURST, | |
| 50 | + NET_SHAPER_A_PRIORITY, | |
| 51 | + NET_SHAPER_A_WEIGHT, | |
| 52 | + NET_SHAPER_A_IFINDEX, | |
| 53 | + NET_SHAPER_A_PARENT, | |
| 54 | + NET_SHAPER_A_LEAVES, | |
| 55 | + | |
| 56 | + __NET_SHAPER_A_MAX, | |
| 57 | + NET_SHAPER_A_MAX = (__NET_SHAPER_A_MAX - 1) | |
| 58 | +}; | |
| 59 | + | |
| 60 | +enum { | |
| 61 | + NET_SHAPER_A_HANDLE_SCOPE = 1, | |
| 62 | + NET_SHAPER_A_HANDLE_ID, | |
| 63 | + | |
| 64 | + __NET_SHAPER_A_HANDLE_MAX, | |
| 65 | + NET_SHAPER_A_HANDLE_MAX = (__NET_SHAPER_A_HANDLE_MAX - 1) | |
| 66 | +}; | |
| 67 | + | |
| 68 | +enum { | |
| 69 | + NET_SHAPER_A_CAPS_IFINDEX = 1, | |
| 70 | + NET_SHAPER_A_CAPS_SCOPE, | |
| 71 | + NET_SHAPER_A_CAPS_SUPPORT_METRIC_BPS, | |
| 72 | + NET_SHAPER_A_CAPS_SUPPORT_METRIC_PPS, | |
| 73 | + NET_SHAPER_A_CAPS_SUPPORT_NESTING, | |
| 74 | + NET_SHAPER_A_CAPS_SUPPORT_BW_MIN, | |
| 75 | + NET_SHAPER_A_CAPS_SUPPORT_BW_MAX, | |
| 76 | + NET_SHAPER_A_CAPS_SUPPORT_BURST, | |
| 77 | + NET_SHAPER_A_CAPS_SUPPORT_PRIORITY, | |
| 78 | + NET_SHAPER_A_CAPS_SUPPORT_WEIGHT, | |
| 79 | + | |
| 80 | + __NET_SHAPER_A_CAPS_MAX, | |
| 81 | + NET_SHAPER_A_CAPS_MAX = (__NET_SHAPER_A_CAPS_MAX - 1) | |
| 82 | +}; | |
| 83 | + | |
| 84 | +enum { | |
| 85 | + NET_SHAPER_CMD_GET = 1, | |
| 86 | + NET_SHAPER_CMD_SET, | |
| 87 | + NET_SHAPER_CMD_DELETE, | |
| 88 | + NET_SHAPER_CMD_GROUP, | |
| 89 | + NET_SHAPER_CMD_CAP_GET, | |
| 90 | + | |
| 91 | + __NET_SHAPER_CMD_MAX, | |
| 92 | + NET_SHAPER_CMD_MAX = (__NET_SHAPER_CMD_MAX - 1) | |
| 93 | +}; | |
| 94 | + | |
| 95 | +#endif /* _UAPI_LINUX_NET_SHAPER_H */ | |
| @@ -122,6 +122,9 @@ enum { · 121 unmodified lines | ||
| 122 | 122 | NETDEV_A_NAPI_ID, |
| 123 | 123 | NETDEV_A_NAPI_IRQ, |
| 124 | 124 | NETDEV_A_NAPI_PID, |
| 125 | + NETDEV_A_NAPI_DEFER_HARD_IRQS, | |
| 126 | + NETDEV_A_NAPI_GRO_FLUSH_TIMEOUT, | |
| 127 | + NETDEV_A_NAPI_IRQ_SUSPEND_TIMEOUT, | |
| 125 | 128 | |
| 126 | 129 | __NETDEV_A_NAPI_MAX, |
| 127 | 130 | NETDEV_A_NAPI_MAX = (__NETDEV_A_NAPI_MAX - 1) |
| @@ -199,6 +202,7 @@ enum { · 71 unmodified lines | ||
| 199 | 202 | NETDEV_CMD_NAPI_GET, |
| 200 | 203 | NETDEV_CMD_QSTATS_GET, |
| 201 | 204 | NETDEV_CMD_BIND_RX, |
| 205 | + NETDEV_CMD_NAPI_SET, | |
| 202 | 206 | |
| 203 | 207 | __NETDEV_CMD_MAX, |
| 204 | 208 | NETDEV_CMD_MAX = (__NETDEV_CMD_MAX - 1) |
| @@ -564,16 +564,26 @@ enum nft_immediate_attributes { · 563 unmodified lines | ||
| 564 | 564 | /** |
| 565 | 565 | * enum nft_bitwise_ops - nf_tables bitwise operations |
| 566 | 566 | * |
| 567 | − * @NFT_BITWISE_BOOL: mask-and-xor operation used to implement NOT, AND, OR and | |
| 568 | − * XOR boolean operations | |
| 567 | + * @NFT_BITWISE_MASK_XOR: mask-and-xor operation used to implement NOT, AND, OR | |
| 568 | + * and XOR boolean operations | |
| 569 | 569 | * @NFT_BITWISE_LSHIFT: left-shift operation |
| 570 | 570 | * @NFT_BITWISE_RSHIFT: right-shift operation |
| 571 | + * @NFT_BITWISE_AND: and operation | |
| 572 | + * @NFT_BITWISE_OR: or operation | |
| 573 | + * @NFT_BITWISE_XOR: xor operation | |
| 571 | 574 | */ |
| 572 | 575 | enum nft_bitwise_ops { |
| 573 | − NFT_BITWISE_BOOL, | |
| 576 | + NFT_BITWISE_MASK_XOR, | |
| 574 | 577 | NFT_BITWISE_LSHIFT, |
| 575 | 578 | NFT_BITWISE_RSHIFT, |
| 579 | + NFT_BITWISE_AND, | |
| 580 | + NFT_BITWISE_OR, | |
| 581 | + NFT_BITWISE_XOR, | |
| 576 | 582 | }; |
| 583 | +/* | |
| 584 | + * Old name for NFT_BITWISE_MASK_XOR. Retained for backwards-compatibility. | |
| 585 | + */ | |
| 586 | +#define NFT_BITWISE_BOOL NFT_BITWISE_MASK_XOR | |
| 577 | 587 | |
| 578 | 588 | /** |
| 579 | 589 | * enum nft_bitwise_attributes - nf_tables bitwise expression netlink attributes |
| @@ -586,6 +596,7 @@ enum nft_bitwise_ops { · 6 unmodified lines | ||
| 586 | 596 | * @NFTA_BITWISE_OP: type of operation (NLA_U32: nft_bitwise_ops) |
| 587 | 597 | * @NFTA_BITWISE_DATA: argument for non-boolean operations |
| 588 | 598 | * (NLA_NESTED: nft_data_attributes) |
| 599 | + * @NFTA_BITWISE_SREG2: second source register (NLA_U32: nft_registers) | |
| 589 | 600 | * |
| 590 | 601 | * The bitwise expression supports boolean and shift operations. It implements |
| 591 | 602 | * the boolean operations by performing the following operation: |
| @@ -609,6 +620,7 @@ enum nft_bitwise_attributes { · 17 unmodified lines | ||
| 609 | 620 | NFTA_BITWISE_XOR, |
| 610 | 621 | NFTA_BITWISE_OP, |
| 611 | 622 | NFTA_BITWISE_DATA, |
| 623 | + NFTA_BITWISE_SREG2, | |
| 612 | 624 | __NFTA_BITWISE_MAX |
| 613 | 625 | }; |
| 614 | 626 | #define NFTA_BITWISE_MAX (__NFTA_BITWISE_MAX - 1) |
| @@ -164,6 +164,7 @@ enum nfc_commands { · 163 unmodified lines | ||
| 164 | 164 | * @NFC_ATTR_VENDOR_SUBCMD: Vendor specific sub command |
| 165 | 165 | * @NFC_ATTR_VENDOR_DATA: Vendor specific data, to be optionally passed |
| 166 | 166 | * to a vendor specific command implementation |
| 167 | + * @NFC_ATTR_TARGET_ATS: ISO 14443 type A target Answer To Select | |
| 167 | 168 | */ |
| 168 | 169 | enum nfc_attrs { |
| 169 | 170 | NFC_ATTR_UNSPEC, |
| @@ -198,6 +199,7 @@ enum nfc_attrs { · 28 unmodified lines | ||
| 198 | 199 | NFC_ATTR_VENDOR_ID, |
| 199 | 200 | NFC_ATTR_VENDOR_SUBCMD, |
| 200 | 201 | NFC_ATTR_VENDOR_DATA, |
| 202 | + NFC_ATTR_TARGET_ATS, | |
| 201 | 203 | /* private: internal use only */ |
| 202 | 204 | __NFC_ATTR_AFTER_LAST |
| 203 | 205 | }; |
| @@ -225,6 +227,7 @@ enum nfc_sdp_attr { · 21 unmodified lines | ||
| 225 | 227 | #define NFC_GB_MAXSIZE 48 |
| 226 | 228 | #define NFC_FIRMWARE_NAME_MAXSIZE 32 |
| 227 | 229 | #define NFC_ISO15693_UID_MAXSIZE 8 |
| 230 | +#define NFC_ATS_MAXSIZE 20 | |
| 228 | 231 | |
| 229 | 232 | /* NFC protocols */ |
| 230 | 233 | #define NFC_PROTO_JEWEL 1 |
| @@ -2868,6 +2868,9 @@ enum nl80211_commands { · 2867 unmodified lines | ||
| 2868 | 2868 | * nested item, it contains attributes defined in |
| 2869 | 2869 | * &enum nl80211_if_combination_attrs. |
| 2870 | 2870 | * |
| 2871 | + * @NL80211_ATTR_VIF_RADIO_MASK: Bitmask of allowed radios (u32). | |
| 2872 | + * A value of 0 means all radios. | |
| 2873 | + * | |
| 2871 | 2874 | * @NUM_NL80211_ATTR: total number of nl80211_attrs available |
| 2872 | 2875 | * @NL80211_ATTR_MAX: highest attribute number currently defined |
| 2873 | 2876 | * @__NL80211_ATTR_AFTER_LAST: internal use |
| @@ -3416,6 +3419,8 @@ enum nl80211_attrs { · 542 unmodified lines | ||
| 3416 | 3419 | NL80211_ATTR_WIPHY_RADIOS, |
| 3417 | 3420 | NL80211_ATTR_WIPHY_INTERFACE_COMBINATIONS, |
| 3418 | 3421 | |
| 3422 | + NL80211_ATTR_VIF_RADIO_MASK, | |
| 3423 | + | |
| 3419 | 3424 | /* add attributes here, update the policy in nl80211.c */ |
| 3420 | 3425 | |
| 3421 | 3426 | __NL80211_ATTR_AFTER_LAST, |
| @@ -4698,6 +4703,7 @@ enum nl80211_survey_info { · 1276 unmodified lines | ||
| 4698 | 4703 | * overrides all other flags. |
| 4699 | 4704 | * @NL80211_MNTR_FLAG_ACTIVE: use the configured MAC address |
| 4700 | 4705 | * and ACK incoming unicast packets. |
| 4706 | + * @NL80211_MNTR_FLAG_SKIP_TX: do not pass local tx packets | |
| 4701 | 4707 | * |
| 4702 | 4708 | * @__NL80211_MNTR_FLAG_AFTER_LAST: internal use |
| 4703 | 4709 | * @NL80211_MNTR_FLAG_MAX: highest possible monitor flag |
| @@ -4710,6 +4716,7 @@ enum nl80211_mntr_flags { · 6 unmodified lines | ||
| 4710 | 4716 | NL80211_MNTR_FLAG_OTHER_BSS, |
| 4711 | 4717 | NL80211_MNTR_FLAG_COOK_FRAMES, |
| 4712 | 4718 | NL80211_MNTR_FLAG_ACTIVE, |
| 4719 | + NL80211_MNTR_FLAG_SKIP_TX, | |
| 4713 | 4720 | |
| 4714 | 4721 | /* keep last */ |
| 4715 | 4722 | __NL80211_MNTR_FLAG_AFTER_LAST, |
| @@ -8031,6 +8038,8 @@ enum nl80211_ap_settings_flags { · 3315 unmodified lines | ||
| 8031 | 8038 | * @NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION: Supported interface |
| 8032 | 8039 | * combination for this radio. Attribute may be present multiple times |
| 8033 | 8040 | * and contains attributes defined in &enum nl80211_if_combination_attrs. |
| 8041 | + * @NL80211_WIPHY_RADIO_ATTR_ANTENNA_MASK: bitmask (u32) of antennas | |
| 8042 | + * connected to this radio. | |
| 8034 | 8043 | * |
| 8035 | 8044 | * @__NL80211_WIPHY_RADIO_ATTR_LAST: Internal |
| 8036 | 8045 | * @NL80211_WIPHY_RADIO_ATTR_MAX: Highest attribute |
| @@ -8041,6 +8050,7 @@ enum nl80211_wiphy_radio_attrs { · 4 unmodified lines | ||
| 8041 | 8050 | NL80211_WIPHY_RADIO_ATTR_INDEX, |
| 8042 | 8051 | NL80211_WIPHY_RADIO_ATTR_FREQ_RANGE, |
| 8043 | 8052 | NL80211_WIPHY_RADIO_ATTR_INTERFACE_COMBINATION, |
| 8053 | + NL80211_WIPHY_RADIO_ATTR_ANTENNA_MASK, | |
| 8044 | 8054 | |
| 8045 | 8055 | /* keep last */ |
| 8046 | 8056 | __NL80211_WIPHY_RADIO_ATTR_LAST, |
| @@ -340,7 +340,8 @@ · 339 unmodified lines | ||
| 340 | 340 | #define PCI_MSIX_ENTRY_UPPER_ADDR 0x4 /* Message Upper Address */ |
| 341 | 341 | #define PCI_MSIX_ENTRY_DATA 0x8 /* Message Data */ |
| 342 | 342 | #define PCI_MSIX_ENTRY_VECTOR_CTRL 0xc /* Vector Control */ |
| 343 | −#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 | |
| 343 | +#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001 /* Mask Bit */ | |
| 344 | +#define PCI_MSIX_ENTRY_CTRL_ST 0xffff0000 /* Steering Tag */ | |
| 344 | 345 | |
| 345 | 346 | /* CompactPCI Hotswap Register */ |
| 346 | 347 | |
| @@ -659,6 +660,7 @@ · 312 unmodified lines | ||
| 659 | 660 | #define PCI_EXP_DEVCAP2_ATOMIC_COMP64 0x00000100 /* 64b AtomicOp completion */ |
| 660 | 661 | #define PCI_EXP_DEVCAP2_ATOMIC_COMP128 0x00000200 /* 128b AtomicOp completion */ |
| 661 | 662 | #define PCI_EXP_DEVCAP2_LTR 0x00000800 /* Latency tolerance reporting */ |
| 663 | +#define PCI_EXP_DEVCAP2_TPH_COMP_MASK 0x00003000 /* TPH completer support */ | |
| 662 | 664 | #define PCI_EXP_DEVCAP2_OBFF_MASK 0x000c0000 /* OBFF support mechanism */ |
| 663 | 665 | #define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000 /* New message signaling */ |
| 664 | 666 | #define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000 /* Re-use WAKE# for OBFF */ |
| @@ -678,6 +680,7 @@ · 13 unmodified lines | ||
| 678 | 680 | #define PCI_EXP_DEVSTA2 0x2a /* Device Status 2 */ |
| 679 | 681 | #define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V2 0x2c /* end of v2 EPs w/o link */ |
| 680 | 682 | #define PCI_EXP_LNKCAP2 0x2c /* Link Capabilities 2 */ |
| 683 | +#define PCI_EXP_LNKCAP2_SLS 0x000000fe /* Supported Link Speeds Vector */ | |
| 681 | 684 | #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002 /* Supported Speed 2.5GT/s */ |
| 682 | 685 | #define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004 /* Supported Speed 5GT/s */ |
| 683 | 686 | #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008 /* Supported Speed 8GT/s */ |
| @@ -1023,15 +1026,34 @@ · 339 unmodified lines | ||
| 1023 | 1026 | #define PCI_DPA_CAP_SUBSTATE_MASK 0x1F /* # substates - 1 */ |
| 1024 | 1027 | #define PCI_DPA_BASE_SIZEOF 16 /* size with 0 substates */ |
| 1025 | 1028 | |
| 1029 | +/* TPH Completer Support */ | |
| 1030 | +#define PCI_EXP_DEVCAP2_TPH_COMP_NONE 0x0 /* None */ | |
| 1031 | +#define PCI_EXP_DEVCAP2_TPH_COMP_TPH_ONLY 0x1 /* TPH only */ | |
| 1032 | +#define PCI_EXP_DEVCAP2_TPH_COMP_EXT_TPH 0x3 /* TPH and Extended TPH */ | |
| 1033 | + | |
| 1026 | 1034 | /* TPH Requester */ |
| 1027 | 1035 | #define PCI_TPH_CAP 4 /* capability register */ |
| 1028 | −#define PCI_TPH_CAP_LOC_MASK 0x600 /* location mask */ | |
| 1029 | −#define PCI_TPH_LOC_NONE 0x000 /* no location */ | |
| 1030 | −#define PCI_TPH_LOC_CAP 0x200 /* in capability */ | |
| 1031 | −#define PCI_TPH_LOC_MSIX 0x400 /* in MSI-X */ | |
| 1032 | −#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST table mask */ | |
| 1033 | −#define PCI_TPH_CAP_ST_SHIFT 16 /* ST table shift */ | |
| 1034 | −#define PCI_TPH_BASE_SIZEOF 0xc /* size with no ST table */ | |
| 1036 | +#define PCI_TPH_CAP_ST_NS 0x00000001 /* No ST Mode Supported */ | |
| 1037 | +#define PCI_TPH_CAP_ST_IV 0x00000002 /* Interrupt Vector Mode Supported */ | |
| 1038 | +#define PCI_TPH_CAP_ST_DS 0x00000004 /* Device Specific Mode Supported */ | |
| 1039 | +#define PCI_TPH_CAP_EXT_TPH 0x00000100 /* Ext TPH Requester Supported */ | |
| 1040 | +#define PCI_TPH_CAP_LOC_MASK 0x00000600 /* ST Table Location */ | |
| 1041 | +#define PCI_TPH_LOC_NONE 0x00000000 /* Not present */ | |
| 1042 | +#define PCI_TPH_LOC_CAP 0x00000200 /* In capability */ | |
| 1043 | +#define PCI_TPH_LOC_MSIX 0x00000400 /* In MSI-X */ | |
| 1044 | +#define PCI_TPH_CAP_ST_MASK 0x07FF0000 /* ST Table Size */ | |
| 1045 | +#define PCI_TPH_CAP_ST_SHIFT 16 /* ST Table Size shift */ | |
| 1046 | +#define PCI_TPH_BASE_SIZEOF 0xc /* Size with no ST table */ | |
| 1047 | + | |
| 1048 | +#define PCI_TPH_CTRL 8 /* control register */ | |
| 1049 | +#define PCI_TPH_CTRL_MODE_SEL_MASK 0x00000007 /* ST Mode Select */ | |
| 1050 | +#define PCI_TPH_ST_NS_MODE 0x0 /* No ST Mode */ | |
| 1051 | +#define PCI_TPH_ST_IV_MODE 0x1 /* Interrupt Vector Mode */ | |
| 1052 | +#define PCI_TPH_ST_DS_MODE 0x2 /* Device Specific Mode */ | |
| 1053 | +#define PCI_TPH_CTRL_REQ_EN_MASK 0x00000300 /* TPH Requester Enable */ | |
| 1054 | +#define PCI_TPH_REQ_DISABLE 0x0 /* No TPH requests allowed */ | |
| 1055 | +#define PCI_TPH_REQ_TPH_ONLY 0x1 /* TPH only requests allowed */ | |
| 1056 | +#define PCI_TPH_REQ_EXT_TPH 0x3 /* Extended TPH requests allowed */ | |
| 1035 | 1057 | |
| 1036 | 1058 | /* Downstream Port Containment */ |
| 1037 | 1059 | #define PCI_EXP_DPC_CAP 0x04 /* DPC Capability */ |
| @@ -511,7 +511,16 @@ struct perf_event_attr { · 510 unmodified lines | ||
| 511 | 511 | __u16 sample_max_stack; |
| 512 | 512 | __u16 __reserved_2; |
| 513 | 513 | __u32 aux_sample_size; |
| 514 | − __u32 __reserved_3; | |
| 514 | + | |
| 515 | + union { | |
| 516 | + __u32 aux_action; | |
| 517 | + struct { | |
| 518 | + __u32 aux_start_paused : 1, /* start AUX area tracing paused */ | |
| 519 | + aux_pause : 1, /* on overflow, pause AUX area tracing */ | |
| 520 | + aux_resume : 1, /* on overflow, resume AUX area tracing */ | |
| 521 | + __reserved_3 : 29; | |
| 522 | + }; | |
| 523 | + }; | |
| 515 | 524 | |
| 516 | 525 | /* |
| 517 | 526 | * User provided data if sigtrap=1, passed back to user via |
| @@ -16,6 +16,55 @@ · 15 unmodified lines | ||
| 16 | 16 | #define PIDFD_SIGNAL_THREAD_GROUP (1UL << 1) |
| 17 | 17 | #define PIDFD_SIGNAL_PROCESS_GROUP (1UL << 2) |
| 18 | 18 | |
| 19 | +/* Flags for pidfd_info. */ | |
| 20 | +#define PIDFD_INFO_PID (1UL << 0) /* Always returned, even if not requested */ | |
| 21 | +#define PIDFD_INFO_CREDS (1UL << 1) /* Always returned, even if not requested */ | |
| 22 | +#define PIDFD_INFO_CGROUPID (1UL << 2) /* Always returned if available, even if not requested */ | |
| 23 | + | |
| 24 | +#define PIDFD_INFO_SIZE_VER0 64 /* sizeof first published struct */ | |
| 25 | + | |
| 26 | +struct pidfd_info { | |
| 27 | + /* | |
| 28 | + * This mask is similar to the request_mask in statx(2). | |
| 29 | + * | |
| 30 | + * Userspace indicates what extensions or expensive-to-calculate fields | |
| 31 | + * they want by setting the corresponding bits in mask. The kernel | |
| 32 | + * will ignore bits that it does not know about. | |
| 33 | + * | |
| 34 | + * When filling the structure, the kernel will only set bits | |
| 35 | + * corresponding to the fields that were actually filled by the kernel. | |
| 36 | + * This also includes any future extensions that might be automatically | |
| 37 | + * filled. If the structure size is too small to contain a field | |
| 38 | + * (requested or not), to avoid confusion the mask will not | |
| 39 | + * contain a bit for that field. | |
| 40 | + * | |
| 41 | + * As such, userspace MUST verify that mask contains the | |
| 42 | + * corresponding flags after the ioctl(2) returns to ensure that it is | |
| 43 | + * using valid data. | |
| 44 | + */ | |
| 45 | + __u64 mask; | |
| 46 | + /* | |
| 47 | + * The information contained in the following fields might be stale at the | |
| 48 | + * time it is received, as the target process might have exited as soon as | |
| 49 | + * the IOCTL was processed, and there is no way to avoid that. However, it | |
| 50 | + * is guaranteed that if the call was successful, then the information was | |
| 51 | + * correct and referred to the intended process at the time the work was | |
| 52 | + * performed. */ | |
| 53 | + __u64 cgroupid; | |
| 54 | + __u32 pid; | |
| 55 | + __u32 tgid; | |
| 56 | + __u32 ppid; | |
| 57 | + __u32 ruid; | |
| 58 | + __u32 rgid; | |
| 59 | + __u32 euid; | |
| 60 | + __u32 egid; | |
| 61 | + __u32 suid; | |
| 62 | + __u32 sgid; | |
| 63 | + __u32 fsuid; | |
| 64 | + __u32 fsgid; | |
| 65 | + __u32 spare0[1]; | |
| 66 | +}; | |
| 67 | + | |
| 19 | 68 | #define PIDFS_IOCTL_MAGIC 0xFF |
| 20 | 69 | |
| 21 | 70 | #define PIDFD_GET_CGROUP_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 1) |
| @@ -28,5 +77,6 @@ · 6 unmodified lines | ||
| 28 | 77 | #define PIDFD_GET_TIME_FOR_CHILDREN_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 8) |
| 29 | 78 | #define PIDFD_GET_USER_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 9) |
| 30 | 79 | #define PIDFD_GET_UTS_NAMESPACE _IO(PIDFS_IOCTL_MAGIC, 10) |
| 80 | +#define PIDFD_GET_INFO _IOWR(PIDFS_IOCTL_MAGIC, 11, struct pidfd_info) | |
| 31 | 81 | |
| 32 | 82 | #endif /* _UAPI_LINUX_PIDFD_H */ |
| @@ -836,6 +836,8 @@ enum { · 835 unmodified lines | ||
| 836 | 836 | |
| 837 | 837 | TCA_FQ_WEIGHTS, /* Weights for each band */ |
| 838 | 838 | |
| 839 | + TCA_FQ_OFFLOAD_HORIZON, /* dequeue paced packets within this horizon immediately (us units) */ | |
| 840 | + | |
| 839 | 841 | __TCA_FQ_MAX |
| 840 | 842 | }; |
| 841 | 843 | |
| @@ -230,7 +230,7 @@ struct prctl_mm_map { · 229 unmodified lines | ||
| 230 | 230 | # define PR_PAC_APDBKEY (1UL << 3) |
| 231 | 231 | # define PR_PAC_APGAKEY (1UL << 4) |
| 232 | 232 | |
| 233 | −/* Tagged user address controls for arm64 */ | |
| 233 | +/* Tagged user address controls for arm64 and RISC-V */ | |
| 234 | 234 | #define PR_SET_TAGGED_ADDR_CTRL 55 |
| 235 | 235 | #define PR_GET_TAGGED_ADDR_CTRL 56 |
| 236 | 236 | # define PR_TAGGED_ADDR_ENABLE (1UL << 0) |
| @@ -244,6 +244,9 @@ struct prctl_mm_map { · 7 unmodified lines | ||
| 244 | 244 | # define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT) |
| 245 | 245 | /* Unused; kept only for source compatibility */ |
| 246 | 246 | # define PR_MTE_TCF_SHIFT 1 |
| 247 | +/* RISC-V pointer masking tag length */ | |
| 248 | +# define PR_PMLEN_SHIFT 24 | |
| 249 | +# define PR_PMLEN_MASK (0x7fUL << PR_PMLEN_SHIFT) | |
| 247 | 250 | |
| 248 | 251 | /* Control reclaim behavior when allocating memory */ |
| 249 | 252 | #define PR_SET_IO_FLUSHER 57 |
| @@ -328,4 +331,26 @@ struct prctl_mm_map { · 78 unmodified lines | ||
| 328 | 331 | # define PR_PPC_DEXCR_CTRL_CLEAR_ONEXEC 0x10 /* Clear the aspect on exec */ |
| 329 | 332 | # define PR_PPC_DEXCR_CTRL_MASK 0x1f |
| 330 | 333 | |
| 334 | +/* | |
| 335 | + * Get the current shadow stack configuration for the current thread, | |
| 336 | + * this will be the value configured via PR_SET_SHADOW_STACK_STATUS. | |
| 337 | + */ | |
| 338 | +#define PR_GET_SHADOW_STACK_STATUS 74 | |
| 339 | + | |
| 340 | +/* | |
| 341 | + * Set the current shadow stack configuration. Enabling the shadow | |
| 342 | + * stack will cause a shadow stack to be allocated for the thread. | |
| 343 | + */ | |
| 344 | +#define PR_SET_SHADOW_STACK_STATUS 75 | |
| 345 | +# define PR_SHADOW_STACK_ENABLE (1UL << 0) | |
| 346 | +# define PR_SHADOW_STACK_WRITE (1UL << 1) | |
| 347 | +# define PR_SHADOW_STACK_PUSH (1UL << 2) | |
| 348 | + | |
| 349 | +/* | |
| 350 | + * Prevent further changes to the specified shadow stack | |
| 351 | + * configuration. All bits may be locked via this call, including | |
| 352 | + * undefined bits. | |
| 353 | + */ | |
| 354 | +#define PR_LOCK_SHADOW_STACK_STATUS 76 | |
| 355 | + | |
| 331 | 356 | #endif /* _LINUX_PRCTL_H */ |
| @@ -59,6 +59,7 @@ · 58 unmodified lines | ||
| 59 | 59 | #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) |
| 60 | 60 | #define PSCI_1_1_FN_MEM_PROTECT PSCI_0_2_FN(19) |
| 61 | 61 | #define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN(20) |
| 62 | +#define PSCI_1_3_FN_SYSTEM_OFF2 PSCI_0_2_FN(21) | |
| 62 | 63 | |
| 63 | 64 | #define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12) |
| 64 | 65 | #define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13) |
| @@ -68,6 +69,7 @@ · 3 unmodified lines | ||
| 68 | 69 | |
| 69 | 70 | #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) |
| 70 | 71 | #define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN64(20) |
| 72 | +#define PSCI_1_3_FN64_SYSTEM_OFF2 PSCI_0_2_FN64(21) | |
| 71 | 73 | |
| 72 | 74 | /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ |
| 73 | 75 | #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff |
| @@ -100,6 +102,9 @@ · 26 unmodified lines | ||
| 100 | 102 | #define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0 |
| 101 | 103 | #define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U |
| 102 | 104 | |
| 105 | +/* PSCI v1.3 hibernate type for SYSTEM_OFF2 */ | |
| 106 | +#define PSCI_1_3_OFF_TYPE_HIBERNATE_OFF BIT(0) | |
| 107 | + | |
| 103 | 108 | /* PSCI version decoding (independent of PSCI version) */ |
| 104 | 109 | #define PSCI_VERSION_MAJOR_SHIFT 16 |
| 105 | 110 | #define PSCI_VERSION_MINOR_MASK \ |
| @@ -1,27 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | −/* | |
| 3 | − * Copyright 1996, 1997, 1998 Hans Reiser, see reiserfs/README for licensing and copyright details | |
| 4 | − */ | |
| 5 | −#ifndef _LINUX_REISER_FS_H | |
| 6 | −#define _LINUX_REISER_FS_H | |
| 7 | − | |
| 8 | −#include <linux/types.h> | |
| 9 | −#include <linux/magic.h> | |
| 10 | − | |
| 11 | −/* | |
| 12 | − * include/linux/reiser_fs.h | |
| 13 | − * | |
| 14 | − * Reiser File System constants and structures | |
| 15 | − * | |
| 16 | − */ | |
| 17 | − | |
| 18 | −/* ioctl's command */ | |
| 19 | −#define REISERFS_IOC_UNPACK _IOW(0xCD,1,long) | |
| 20 | −/* define following flags to be the same as in ext2, so that chattr(1), | |
| 21 | − lsattr(1) will work with us. */ | |
| 22 | −#define REISERFS_IOC_GETFLAGS FS_IOC_GETFLAGS | |
| 23 | −#define REISERFS_IOC_SETFLAGS FS_IOC_SETFLAGS | |
| 24 | −#define REISERFS_IOC_GETVERSION FS_IOC_GETVERSION | |
| 25 | −#define REISERFS_IOC_SETVERSION FS_IOC_SETVERSION | |
| 26 | − | |
| 27 | −#endif /* _LINUX_REISER_FS_H */ | |
| @@ -1,25 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | −/* | |
| 3 | − File: linux/reiserfs_xattr.h | |
| 4 | −*/ | |
| 5 | − | |
| 6 | −#ifndef _LINUX_REISERFS_XATTR_H | |
| 7 | −#define _LINUX_REISERFS_XATTR_H | |
| 8 | − | |
| 9 | −#include <linux/types.h> | |
| 10 | − | |
| 11 | −/* Magic value in header */ | |
| 12 | −#define REISERFS_XATTR_MAGIC 0x52465841 /* "RFXA" */ | |
| 13 | − | |
| 14 | −struct reiserfs_xattr_header { | |
| 15 | − __le32 h_magic; /* magic number for identification */ | |
| 16 | − __le32 h_hash; /* hash of the value */ | |
| 17 | −}; | |
| 18 | − | |
| 19 | −struct reiserfs_security_handle { | |
| 20 | − const char *name; | |
| 21 | − void *value; | |
| 22 | − __kernel_size_t length; | |
| 23 | −}; | |
| 24 | − | |
| 25 | −#endif /* _LINUX_REISERFS_XATTR_H */ | |
| @@ -174,7 +174,7 @@ enum { · 173 unmodified lines | ||
| 174 | 174 | #define RTM_GETLINKPROP RTM_GETLINKPROP |
| 175 | 175 | |
| 176 | 176 | RTM_NEWVLAN = 112, |
| 177 | −#define RTM_NEWNVLAN RTM_NEWVLAN | |
| 177 | +#define RTM_NEWVLAN RTM_NEWVLAN | |
| 178 | 178 | RTM_DELVLAN, |
| 179 | 179 | #define RTM_DELVLAN RTM_DELVLAN |
| 180 | 180 | RTM_GETVLAN, |
| @@ -215,5 +215,6 @@ struct opal_revert_lsp { · 214 unmodified lines | ||
| 215 | 215 | #define IOC_OPAL_GET_GEOMETRY _IOR('p', 238, struct opal_geometry) |
| 216 | 216 | #define IOC_OPAL_DISCOVERY _IOW('p', 239, struct opal_discovery) |
| 217 | 217 | #define IOC_OPAL_REVERT_LSP _IOW('p', 240, struct opal_revert_lsp) |
| 218 | +#define IOC_OPAL_SET_SID_PW _IOW('p', 241, struct opal_new_pw) | |
| 218 | 219 | |
| 219 | 220 | #endif /* _UAPI_SED_OPAL_H */ |
| @@ -3,6 +3,8 @@ · 2 unmodified lines | ||
| 3 | 3 | #define _UAPI_LINUX_THERMAL_H |
| 4 | 4 | |
| 5 | 5 | #define THERMAL_NAME_LENGTH 20 |
| 6 | +#define THERMAL_THRESHOLD_WAY_UP BIT(0) | |
| 7 | +#define THERMAL_THRESHOLD_WAY_DOWN BIT(1) | |
| 6 | 8 | |
| 7 | 9 | enum thermal_device_mode { |
| 8 | 10 | THERMAL_DEVICE_DISABLED = 0, |
| @@ -18,7 +20,7 @@ enum thermal_trip_type { · 9 unmodified lines | ||
| 18 | 20 | |
| 19 | 21 | /* Adding event notification support elements */ |
| 20 | 22 | #define THERMAL_GENL_FAMILY_NAME "thermal" |
| 21 | −#define THERMAL_GENL_VERSION 0x01 | |
| 23 | +#define THERMAL_GENL_VERSION 0x02 | |
| 22 | 24 | #define THERMAL_GENL_SAMPLING_GROUP_NAME "sampling" |
| 23 | 25 | #define THERMAL_GENL_EVENT_GROUP_NAME "event" |
| 24 | 26 | |
| @@ -28,6 +30,7 @@ enum thermal_genl_attr { · 3 unmodified lines | ||
| 28 | 30 | THERMAL_GENL_ATTR_TZ, |
| 29 | 31 | THERMAL_GENL_ATTR_TZ_ID, |
| 30 | 32 | THERMAL_GENL_ATTR_TZ_TEMP, |
| 33 | + THERMAL_GENL_ATTR_TZ_PREV_TEMP, | |
| 31 | 34 | THERMAL_GENL_ATTR_TZ_TRIP, |
| 32 | 35 | THERMAL_GENL_ATTR_TZ_TRIP_ID, |
| 33 | 36 | THERMAL_GENL_ATTR_TZ_TRIP_TYPE, |
| @@ -48,6 +51,9 @@ enum thermal_genl_attr { · 14 unmodified lines | ||
| 48 | 51 | THERMAL_GENL_ATTR_CPU_CAPABILITY_ID, |
| 49 | 52 | THERMAL_GENL_ATTR_CPU_CAPABILITY_PERFORMANCE, |
| 50 | 53 | THERMAL_GENL_ATTR_CPU_CAPABILITY_EFFICIENCY, |
| 54 | + THERMAL_GENL_ATTR_THRESHOLD, | |
| 55 | + THERMAL_GENL_ATTR_THRESHOLD_TEMP, | |
| 56 | + THERMAL_GENL_ATTR_THRESHOLD_DIRECTION, | |
| 51 | 57 | __THERMAL_GENL_ATTR_MAX, |
| 52 | 58 | }; |
| 53 | 59 | #define THERMAL_GENL_ATTR_MAX (__THERMAL_GENL_ATTR_MAX - 1) |
| @@ -75,6 +81,11 @@ enum thermal_genl_event { · 21 unmodified lines | ||
| 75 | 81 | THERMAL_GENL_EVENT_CDEV_STATE_UPDATE, /* Cdev state updated */ |
| 76 | 82 | THERMAL_GENL_EVENT_TZ_GOV_CHANGE, /* Governor policy changed */ |
| 77 | 83 | THERMAL_GENL_EVENT_CPU_CAPABILITY_CHANGE, /* CPU capability changed */ |
| 84 | + THERMAL_GENL_EVENT_THRESHOLD_ADD, /* A thresold has been added */ | |
| 85 | + THERMAL_GENL_EVENT_THRESHOLD_DELETE, /* A thresold has been deleted */ | |
| 86 | + THERMAL_GENL_EVENT_THRESHOLD_FLUSH, /* All thresolds have been deleted */ | |
| 87 | + THERMAL_GENL_EVENT_THRESHOLD_UP, /* A thresold has been crossed the way up */ | |
| 88 | + THERMAL_GENL_EVENT_THRESHOLD_DOWN, /* A thresold has been crossed the way down */ | |
| 78 | 89 | __THERMAL_GENL_EVENT_MAX, |
| 79 | 90 | }; |
| 80 | 91 | #define THERMAL_GENL_EVENT_MAX (__THERMAL_GENL_EVENT_MAX - 1) |
| @@ -82,12 +93,16 @@ enum thermal_genl_event { · 1 unmodified line | ||
| 82 | 93 | /* Commands supported by the thermal_genl_family */ |
| 83 | 94 | enum thermal_genl_cmd { |
| 84 | 95 | THERMAL_GENL_CMD_UNSPEC, |
| 85 | − THERMAL_GENL_CMD_TZ_GET_ID, /* List of thermal zones id */ | |
| 86 | − THERMAL_GENL_CMD_TZ_GET_TRIP, /* List of thermal trips */ | |
| 87 | − THERMAL_GENL_CMD_TZ_GET_TEMP, /* Get the thermal zone temperature */ | |
| 88 | − THERMAL_GENL_CMD_TZ_GET_GOV, /* Get the thermal zone governor */ | |
| 89 | − THERMAL_GENL_CMD_TZ_GET_MODE, /* Get the thermal zone mode */ | |
| 90 | − THERMAL_GENL_CMD_CDEV_GET, /* List of cdev id */ | |
| 96 | + THERMAL_GENL_CMD_TZ_GET_ID, /* List of thermal zones id */ | |
| 97 | + THERMAL_GENL_CMD_TZ_GET_TRIP, /* List of thermal trips */ | |
| 98 | + THERMAL_GENL_CMD_TZ_GET_TEMP, /* Get the thermal zone temperature */ | |
| 99 | + THERMAL_GENL_CMD_TZ_GET_GOV, /* Get the thermal zone governor */ | |
| 100 | + THERMAL_GENL_CMD_TZ_GET_MODE, /* Get the thermal zone mode */ | |
| 101 | + THERMAL_GENL_CMD_CDEV_GET, /* List of cdev id */ | |
| 102 | + THERMAL_GENL_CMD_THRESHOLD_GET, /* List of thresholds */ | |
| 103 | + THERMAL_GENL_CMD_THRESHOLD_ADD, /* Add a threshold */ | |
| 104 | + THERMAL_GENL_CMD_THRESHOLD_DELETE, /* Delete a threshold */ | |
| 105 | + THERMAL_GENL_CMD_THRESHOLD_FLUSH, /* Flush all the thresholds */ | |
| 91 | 106 | __THERMAL_GENL_CMD_MAX, |
| 92 | 107 | }; |
| 93 | 108 | #define THERMAL_GENL_CMD_MAX (__THERMAL_GENL_CMD_MAX - 1) |
| @@ -53,6 +53,7 @@ typedef __u32 __bitwise __wsum; · 52 unmodified lines | ||
| 53 | 53 | * No conversions are necessary between 32-bit user-space and a 64-bit kernel. |
| 54 | 54 | */ |
| 55 | 55 | #define __aligned_u64 __u64 __attribute__((aligned(8))) |
| 56 | +#define __aligned_s64 __s64 __attribute__((aligned(8))) | |
| 56 | 57 | #define __aligned_be64 __be64 __attribute__((aligned(8))) |
| 57 | 58 | #define __aligned_le64 __le64 __attribute__((aligned(8))) |
| 58 | 59 | |
| @@ -147,8 +147,18 @@ · 146 unmodified lines | ||
| 147 | 147 | */ |
| 148 | 148 | #define UBLK_F_NEED_GET_DATA (1UL << 2) |
| 149 | 149 | |
| 150 | +/* | |
| 151 | + * - Block devices are recoverable if ublk server exits and restarts | |
| 152 | + * - Outstanding I/O when ublk server exits is met with errors | |
| 153 | + * - I/O issued while there is no ublk server queues | |
| 154 | + */ | |
| 150 | 155 | #define UBLK_F_USER_RECOVERY (1UL << 3) |
| 151 | 156 | |
| 157 | +/* | |
| 158 | + * - Block devices are recoverable if ublk server exits and restarts | |
| 159 | + * - Outstanding I/O when ublk server exits is reissued | |
| 160 | + * - I/O issued while there is no ublk server queues | |
| 161 | + */ | |
| 152 | 162 | #define UBLK_F_USER_RECOVERY_REISSUE (1UL << 4) |
| 153 | 163 | |
| 154 | 164 | /* |
| @@ -190,10 +200,18 @@ · 35 unmodified lines | ||
| 190 | 200 | */ |
| 191 | 201 | #define UBLK_F_ZONED (1ULL << 8) |
| 192 | 202 | |
| 203 | +/* | |
| 204 | + * - Block devices are recoverable if ublk server exits and restarts | |
| 205 | + * - Outstanding I/O when ublk server exits is met with errors | |
| 206 | + * - I/O issued while there is no ublk server is met with errors | |
| 207 | + */ | |
| 208 | +#define UBLK_F_USER_RECOVERY_FAIL_IO (1ULL << 9) | |
| 209 | + | |
| 193 | 210 | /* device state */ |
| 194 | 211 | #define UBLK_S_DEV_DEAD 0 |
| 195 | 212 | #define UBLK_S_DEV_LIVE 1 |
| 196 | 213 | #define UBLK_S_DEV_QUIESCED 2 |
| 214 | +#define UBLK_S_DEV_FAIL_IO 3 | |
| 197 | 215 | |
| 198 | 216 | /* shipped via sqe->cmd of io_uring command */ |
| 199 | 217 | struct ublksrv_ctrl_cmd { |
| @@ -31,7 +31,7 @@ struct udphdr { · 30 unmodified lines | ||
| 31 | 31 | #define UDP_CORK 1 /* Never send partially complete segments */ |
| 32 | 32 | #define UDP_ENCAP 100 /* Set the socket to accept encapsulated packets */ |
| 33 | 33 | #define UDP_NO_CHECK6_TX 101 /* Disable sending checksum for UDP6X */ |
| 34 | −#define UDP_NO_CHECK6_RX 102 /* Disable accpeting checksum for UDP6 */ | |
| 34 | +#define UDP_NO_CHECK6_RX 102 /* Disable accepting checksum for UDP6 */ | |
| 35 | 35 | #define UDP_SEGMENT 103 /* Set GSO segmentation size */ |
| 36 | 36 | #define UDP_GRO 104 /* This socket can receive UDP GRO packets */ |
| 37 | 37 | |
| @@ -597,5 +597,63 @@ struct UVC_FRAME_MJPEG(n) { \ · 596 unmodified lines | ||
| 597 | 597 | __le32 dwFrameInterval[n]; \ |
| 598 | 598 | } __attribute__ ((packed)) |
| 599 | 599 | |
| 600 | +/* Frame Based Payload - 3.1.1. Frame Based Video Format Descriptor */ | |
| 601 | +struct uvc_format_framebased { | |
| 602 | + __u8 bLength; | |
| 603 | + __u8 bDescriptorType; | |
| 604 | + __u8 bDescriptorSubType; | |
| 605 | + __u8 bFormatIndex; | |
| 606 | + __u8 bNumFrameDescriptors; | |
| 607 | + __u8 guidFormat[16]; | |
| 608 | + __u8 bBitsPerPixel; | |
| 609 | + __u8 bDefaultFrameIndex; | |
| 610 | + __u8 bAspectRatioX; | |
| 611 | + __u8 bAspectRatioY; | |
| 612 | + __u8 bmInterfaceFlags; | |
| 613 | + __u8 bCopyProtect; | |
| 614 | + __u8 bVariableSize; | |
| 615 | +} __attribute__((__packed__)); | |
| 616 | + | |
| 617 | +#define UVC_DT_FORMAT_FRAMEBASED_SIZE 28 | |
| 618 | + | |
| 619 | +/* Frame Based Payload - 3.1.2. Frame Based Video Frame Descriptor */ | |
| 620 | +struct uvc_frame_framebased { | |
| 621 | + __u8 bLength; | |
| 622 | + __u8 bDescriptorType; | |
| 623 | + __u8 bDescriptorSubType; | |
| 624 | + __u8 bFrameIndex; | |
| 625 | + __u8 bmCapabilities; | |
| 626 | + __u16 wWidth; | |
| 627 | + __u16 wHeight; | |
| 628 | + __u32 dwMinBitRate; | |
| 629 | + __u32 dwMaxBitRate; | |
| 630 | + __u32 dwDefaultFrameInterval; | |
| 631 | + __u8 bFrameIntervalType; | |
| 632 | + __u32 dwBytesPerLine; | |
| 633 | + __u32 dwFrameInterval[]; | |
| 634 | +} __attribute__((__packed__)); | |
| 635 | + | |
| 636 | +#define UVC_DT_FRAME_FRAMEBASED_SIZE(n) (26+4*(n)) | |
| 637 | + | |
| 638 | +#define UVC_FRAME_FRAMEBASED(n) \ | |
| 639 | + uvc_frame_framebased_##n | |
| 640 | + | |
| 641 | +#define DECLARE_UVC_FRAME_FRAMEBASED(n) \ | |
| 642 | +struct UVC_FRAME_FRAMEBASED(n) { \ | |
| 643 | + __u8 bLength; \ | |
| 644 | + __u8 bDescriptorType; \ | |
| 645 | + __u8 bDescriptorSubType; \ | |
| 646 | + __u8 bFrameIndex; \ | |
| 647 | + __u8 bmCapabilities; \ | |
| 648 | + __u16 wWidth; \ | |
| 649 | + __u16 wHeight; \ | |
| 650 | + __u32 dwMinBitRate; \ | |
| 651 | + __u32 dwMaxBitRate; \ | |
| 652 | + __u32 dwDefaultFrameInterval; \ | |
| 653 | + __u8 bFrameIntervalType; \ | |
| 654 | + __u32 dwBytesPerLine; \ | |
| 655 | + __u32 dwFrameInterval[n]; \ | |
| 656 | +} __attribute__ ((packed)) | |
| 657 | + | |
| 600 | 658 | #endif /* __LINUX_USB_VIDEO_H */ |
| 601 | 659 | |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | /* |
| 3 | 3 | * V4L2 DV timings header. |
| 4 | 4 | * |
| 5 | − * Copyright (C) 2012-2016 Hans Verkuil <hans.verkuil@cisco.com> | |
| 5 | + * Copyright (C) 2012-2016 Hans Verkuil <hansverk@cisco.com> | |
| 6 | 6 | */ |
| 7 | 7 | |
| 8 | 8 | #ifndef _V4L2_DV_TIMINGS_H |
| @@ -35,7 +35,7 @@ · 34 unmodified lines | ||
| 35 | 35 | #define VFIO_EEH 5 |
| 36 | 36 | |
| 37 | 37 | /* Two-stage IOMMU */ |
| 38 | −#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */ | |
| 38 | +#define __VFIO_RESERVED_TYPE1_NESTING_IOMMU 6 /* Implies v2 */ | |
| 39 | 39 | |
| 40 | 40 | #define VFIO_SPAPR_TCE_v2_IOMMU 7 |
| 41 | 41 | |
| @@ -798,6 +798,7 @@ struct v4l2_pix_format { · 797 unmodified lines | ||
| 798 | 798 | #define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I') /* S5C73M3 interleaved UYVY/JPEG */ |
| 799 | 799 | #define V4L2_PIX_FMT_Y8I v4l2_fourcc('Y', '8', 'I', ' ') /* Greyscale 8-bit L/R interleaved */ |
| 800 | 800 | #define V4L2_PIX_FMT_Y12I v4l2_fourcc('Y', '1', '2', 'I') /* Greyscale 12-bit L/R interleaved */ |
| 801 | +#define V4L2_PIX_FMT_Y16I v4l2_fourcc('Y', '1', '6', 'I') /* Greyscale 16-bit L/R interleaved */ | |
| 801 | 802 | #define V4L2_PIX_FMT_Z16 v4l2_fourcc('Z', '1', '6', ' ') /* Depth data 16-bit */ |
| 802 | 803 | #define V4L2_PIX_FMT_MT21C v4l2_fourcc('M', 'T', '2', '1') /* Mediatek compressed block mode */ |
| 803 | 804 | #define V4L2_PIX_FMT_MM21 v4l2_fourcc('M', 'M', '2', '1') /* Mediatek 8-bit block mode, two non-contiguous planes */ |
| @@ -859,6 +860,8 @@ struct v4l2_pix_format { · 55 unmodified lines | ||
| 859 | 860 | |
| 860 | 861 | /* Vendor specific - used for RaspberryPi PiSP */ |
| 861 | 862 | #define V4L2_META_FMT_RPI_BE_CFG v4l2_fourcc('R', 'P', 'B', 'C') /* PiSP BE configuration */ |
| 863 | +#define V4L2_META_FMT_RPI_FE_CFG v4l2_fourcc('R', 'P', 'F', 'C') /* PiSP FE configuration */ | |
| 864 | +#define V4L2_META_FMT_RPI_FE_STATS v4l2_fourcc('R', 'P', 'F', 'S') /* PiSP FE stats */ | |
| 862 | 865 | |
| 863 | 866 | #ifdef __KERNEL__ |
| 864 | 867 | /* |
| @@ -906,6 +909,9 @@ struct v4l2_fmtdesc { · 41 unmodified lines | ||
| 906 | 909 | #define V4L2_FMT_FLAG_CSC_QUANTIZATION 0x0100 |
| 907 | 910 | #define V4L2_FMT_FLAG_META_LINE_BASED 0x0200 |
| 908 | 911 | |
| 912 | +/* Format description flag, to be ORed with the index */ | |
| 913 | +#define V4L2_FMTDESC_FLAG_ENUM_ALL 0x80000000 | |
| 914 | + | |
| 909 | 915 | /* Frame Size and frame rate enumeration */ |
| 910 | 916 | /* |
| 911 | 917 | * F R A M E S I Z E E N U M E R A T I O N |
| @@ -329,6 +329,7 @@ struct virtio_crypto_op_header { · 328 unmodified lines | ||
| 329 | 329 | VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x00) |
| 330 | 330 | #define VIRTIO_CRYPTO_AKCIPHER_DECRYPT \ |
| 331 | 331 | VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x01) |
| 332 | + /* akcipher sign/verify opcodes are deprecated */ | |
| 332 | 333 | #define VIRTIO_CRYPTO_AKCIPHER_SIGN \ |
| 333 | 334 | VIRTIO_CRYPTO_OPCODE(VIRTIO_CRYPTO_SERVICE_AKCIPHER, 0x02) |
| 334 | 335 | #define VIRTIO_CRYPTO_AKCIPHER_VERIFY \ |
| @@ -40,6 +40,7 @@ · 39 unmodified lines | ||
| 40 | 40 | #define _LINUX_VIRTIO_PCI_H |
| 41 | 41 | |
| 42 | 42 | #include <linux/types.h> |
| 43 | +#include <linux/kernel.h> | |
| 43 | 44 | |
| 44 | 45 | #ifndef VIRTIO_PCI_NO_LEGACY |
| 45 | 46 | |
| @@ -240,6 +241,17 @@ struct virtio_pci_cfg_cap { · 194 unmodified lines | ||
| 240 | 241 | #define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5 |
| 241 | 242 | #define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6 |
| 242 | 243 | |
| 244 | +/* Device parts access commands. */ | |
| 245 | +#define VIRTIO_ADMIN_CMD_CAP_ID_LIST_QUERY 0x7 | |
| 246 | +#define VIRTIO_ADMIN_CMD_DEVICE_CAP_GET 0x8 | |
| 247 | +#define VIRTIO_ADMIN_CMD_DRIVER_CAP_SET 0x9 | |
| 248 | +#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_CREATE 0xa | |
| 249 | +#define VIRTIO_ADMIN_CMD_RESOURCE_OBJ_DESTROY 0xd | |
| 250 | +#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_GET 0xe | |
| 251 | +#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET 0xf | |
| 252 | +#define VIRTIO_ADMIN_CMD_DEV_PARTS_SET 0x10 | |
| 253 | +#define VIRTIO_ADMIN_CMD_DEV_MODE_SET 0x11 | |
| 254 | + | |
| 243 | 255 | struct virtio_admin_cmd_hdr { |
| 244 | 256 | __le16 opcode; |
| 245 | 257 | /* |
| @@ -286,4 +298,123 @@ struct virtio_admin_cmd_notify_info_result { · 40 unmodified lines | ||
| 286 | 298 | struct virtio_admin_cmd_notify_info_data entries[VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO]; |
| 287 | 299 | }; |
| 288 | 300 | |
| 301 | +#define VIRTIO_DEV_PARTS_CAP 0x0000 | |
| 302 | + | |
| 303 | +struct virtio_dev_parts_cap { | |
| 304 | + __u8 get_parts_resource_objects_limit; | |
| 305 | + __u8 set_parts_resource_objects_limit; | |
| 306 | +}; | |
| 307 | + | |
| 308 | +#define MAX_CAP_ID __KERNEL_DIV_ROUND_UP(VIRTIO_DEV_PARTS_CAP + 1, 64) | |
| 309 | + | |
| 310 | +struct virtio_admin_cmd_query_cap_id_result { | |
| 311 | + __le64 supported_caps[MAX_CAP_ID]; | |
| 312 | +}; | |
| 313 | + | |
| 314 | +struct virtio_admin_cmd_cap_get_data { | |
| 315 | + __le16 id; | |
| 316 | + __u8 reserved[6]; | |
| 317 | +}; | |
| 318 | + | |
| 319 | +struct virtio_admin_cmd_cap_set_data { | |
| 320 | + __le16 id; | |
| 321 | + __u8 reserved[6]; | |
| 322 | + __u8 cap_specific_data[]; | |
| 323 | +}; | |
| 324 | + | |
| 325 | +struct virtio_admin_cmd_resource_obj_cmd_hdr { | |
| 326 | + __le16 type; | |
| 327 | + __u8 reserved[2]; | |
| 328 | + __le32 id; /* Indicates unique resource object id per resource object type */ | |
| 329 | +}; | |
| 330 | + | |
| 331 | +struct virtio_admin_cmd_resource_obj_create_data { | |
| 332 | + struct virtio_admin_cmd_resource_obj_cmd_hdr hdr; | |
| 333 | + __le64 flags; | |
| 334 | + __u8 resource_obj_specific_data[]; | |
| 335 | +}; | |
| 336 | + | |
| 337 | +#define VIRTIO_RESOURCE_OBJ_DEV_PARTS 0 | |
| 338 | + | |
| 339 | +#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_GET 0 | |
| 340 | +#define VIRTIO_RESOURCE_OBJ_DEV_PARTS_TYPE_SET 1 | |
| 341 | + | |
| 342 | +struct virtio_resource_obj_dev_parts { | |
| 343 | + __u8 type; | |
| 344 | + __u8 reserved[7]; | |
| 345 | +}; | |
| 346 | + | |
| 347 | +#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_SIZE 0 | |
| 348 | +#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_COUNT 1 | |
| 349 | +#define VIRTIO_ADMIN_CMD_DEV_PARTS_METADATA_TYPE_LIST 2 | |
| 350 | + | |
| 351 | +struct virtio_admin_cmd_dev_parts_metadata_data { | |
| 352 | + struct virtio_admin_cmd_resource_obj_cmd_hdr hdr; | |
| 353 | + __u8 type; | |
| 354 | + __u8 reserved[7]; | |
| 355 | +}; | |
| 356 | + | |
| 357 | +#define VIRTIO_DEV_PART_F_OPTIONAL 0 | |
| 358 | + | |
| 359 | +struct virtio_dev_part_hdr { | |
| 360 | + __le16 part_type; | |
| 361 | + __u8 flags; | |
| 362 | + __u8 reserved; | |
| 363 | + union { | |
| 364 | + struct { | |
| 365 | + __le32 offset; | |
| 366 | + __le32 reserved; | |
| 367 | + } pci_common_cfg; | |
| 368 | + struct { | |
| 369 | + __le16 index; | |
| 370 | + __u8 reserved[6]; | |
| 371 | + } vq_index; | |
| 372 | + } selector; | |
| 373 | + __le32 length; | |
| 374 | +}; | |
| 375 | + | |
| 376 | +struct virtio_dev_part { | |
| 377 | + struct virtio_dev_part_hdr hdr; | |
| 378 | + __u8 value[]; | |
| 379 | +}; | |
| 380 | + | |
| 381 | +struct virtio_admin_cmd_dev_parts_metadata_result { | |
| 382 | + union { | |
| 383 | + struct { | |
| 384 | + __le32 size; | |
| 385 | + __le32 reserved; | |
| 386 | + } parts_size; | |
| 387 | + struct { | |
| 388 | + __le32 count; | |
| 389 | + __le32 reserved; | |
| 390 | + } hdr_list_count; | |
| 391 | + struct { | |
| 392 | + __le32 count; | |
| 393 | + __le32 reserved; | |
| 394 | + struct virtio_dev_part_hdr hdrs[]; | |
| 395 | + } hdr_list; | |
| 396 | + }; | |
| 397 | +}; | |
| 398 | + | |
| 399 | +#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_SELECTED 0 | |
| 400 | +#define VIRTIO_ADMIN_CMD_DEV_PARTS_GET_TYPE_ALL 1 | |
| 401 | + | |
| 402 | +struct virtio_admin_cmd_dev_parts_get_data { | |
| 403 | + struct virtio_admin_cmd_resource_obj_cmd_hdr hdr; | |
| 404 | + __u8 type; | |
| 405 | + __u8 reserved[7]; | |
| 406 | + struct virtio_dev_part_hdr hdr_list[]; | |
| 407 | +}; | |
| 408 | + | |
| 409 | +struct virtio_admin_cmd_dev_parts_set_data { | |
| 410 | + struct virtio_admin_cmd_resource_obj_cmd_hdr hdr; | |
| 411 | + struct virtio_dev_part parts[]; | |
| 412 | +}; | |
| 413 | + | |
| 414 | +#define VIRTIO_ADMIN_CMD_DEV_MODE_F_STOPPED 0 | |
| 415 | + | |
| 416 | +struct virtio_admin_cmd_dev_mode_set_data { | |
| 417 | + __u8 flags; | |
| 418 | +}; | |
| 419 | + | |
| 289 | 420 | #endif |
| @@ -0,0 +1,182 @@ | ||
| 1 | +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */ | |
| 2 | + | |
| 3 | +/* | |
| 4 | + * This structure provides a vDSO-style clock to VM guests, exposing the | |
| 5 | + * relationship (or lack thereof) between the CPU clock (TSC, timebase, arch | |
| 6 | + * counter, etc.) and real time. It is designed to address the problem of | |
| 7 | + * live migration, which other clock enlightenments do not. | |
| 8 | + * | |
| 9 | + * When a guest is live migrated, this affects the clock in two ways. | |
| 10 | + * | |
| 11 | + * First, even between identical hosts the actual frequency of the underlying | |
| 12 | + * counter will change within the tolerances of its specification (typically | |
| 13 | + * ±50PPM, or 4 seconds a day). This frequency also varies over time on the | |
| 14 | + * same host, but can be tracked by NTP as it generally varies slowly. With | |
| 15 | + * live migration there is a step change in the frequency, with no warning. | |
| 16 | + * | |
| 17 | + * Second, there may be a step change in the value of the counter itself, as | |
| 18 | + * its accuracy is limited by the precision of the NTP synchronization on the | |
| 19 | + * source and destination hosts. | |
| 20 | + * | |
| 21 | + * So any calibration (NTP, PTP, etc.) which the guest has done on the source | |
| 22 | + * host before migration is invalid, and needs to be redone on the new host. | |
| 23 | + * | |
| 24 | + * In its most basic mode, this structure provides only an indication to the | |
| 25 | + * guest that live migration has occurred. This allows the guest to know that | |
| 26 | + * its clock is invalid and take remedial action. For applications that need | |
| 27 | + * reliable accurate timestamps (e.g. distributed databases), the structure | |
| 28 | + * can be mapped all the way to userspace. This allows the application to see | |
| 29 | + * directly for itself that the clock is disrupted and take appropriate | |
| 30 | + * action, even when using a vDSO-style method to get the time instead of a | |
| 31 | + * system call. | |
| 32 | + * | |
| 33 | + * In its more advanced mode. this structure can also be used to expose the | |
| 34 | + * precise relationship of the CPU counter to real time, as calibrated by the | |
| 35 | + * host. This means that userspace applications can have accurate time | |
| 36 | + * immediately after live migration, rather than having to pause operations | |
| 37 | + * and wait for NTP to recover. This mode does, of course, rely on the | |
| 38 | + * counter being reliable and consistent across CPUs. | |
| 39 | + * | |
| 40 | + * Note that this must be true UTC, never with smeared leap seconds. If a | |
| 41 | + * guest wishes to construct a smeared clock, it can do so. Presenting a | |
| 42 | + * smeared clock through this interface would be problematic because it | |
| 43 | + * actually messes with the apparent counter *period*. A linear smearing | |
| 44 | + * of 1 ms per second would effectively tweak the counter period by 1000PPM | |
| 45 | + * at the start/end of the smearing period, while a sinusoidal smear would | |
| 46 | + * basically be impossible to represent. | |
| 47 | + * | |
| 48 | + * This structure is offered with the intent that it be adopted into the | |
| 49 | + * nascent virtio-rtc standard, as a virtio-rtc that does not address the live | |
| 50 | + * migration problem seems a little less than fit for purpose. For that | |
| 51 | + * reason, certain fields use precisely the same numeric definitions as in | |
| 52 | + * the virtio-rtc proposal. The structure can also be exposed through an ACPI | |
| 53 | + * device with the CID "VMCLOCK", modelled on the "VMGENID" device except for | |
| 54 | + * the fact that it uses a real _CRS to convey the address of the structure | |
| 55 | + * (which should be a full page, to allow for mapping directly to userspace). | |
| 56 | + */ | |
| 57 | + | |
| 58 | +#ifndef __VMCLOCK_ABI_H__ | |
| 59 | +#define __VMCLOCK_ABI_H__ | |
| 60 | + | |
| 61 | +#include <linux/types.h> | |
| 62 | + | |
| 63 | +struct vmclock_abi { | |
| 64 | + /* CONSTANT FIELDS */ | |
| 65 | + __le32 magic; | |
| 66 | +#define VMCLOCK_MAGIC 0x4b4c4356 /* "VCLK" */ | |
| 67 | + __le32 size; /* Size of region containing this structure */ | |
| 68 | + __le16 version; /* 1 */ | |
| 69 | + __u8 counter_id; /* Matches VIRTIO_RTC_COUNTER_xxx except INVALID */ | |
| 70 | +#define VMCLOCK_COUNTER_ARM_VCNT 0 | |
| 71 | +#define VMCLOCK_COUNTER_X86_TSC 1 | |
| 72 | +#define VMCLOCK_COUNTER_INVALID 0xff | |
| 73 | + __u8 time_type; /* Matches VIRTIO_RTC_TYPE_xxx */ | |
| 74 | +#define VMCLOCK_TIME_UTC 0 /* Since 1970-01-01 00:00:00z */ | |
| 75 | +#define VMCLOCK_TIME_TAI 1 /* Since 1970-01-01 00:00:00z */ | |
| 76 | +#define VMCLOCK_TIME_MONOTONIC 2 /* Since undefined epoch */ | |
| 77 | +#define VMCLOCK_TIME_INVALID_SMEARED 3 /* Not supported */ | |
| 78 | +#define VMCLOCK_TIME_INVALID_MAYBE_SMEARED 4 /* Not supported */ | |
| 79 | + | |
| 80 | + /* NON-CONSTANT FIELDS PROTECTED BY SEQCOUNT LOCK */ | |
| 81 | + __le32 seq_count; /* Low bit means an update is in progress */ | |
| 82 | + /* | |
| 83 | + * This field changes to another non-repeating value when the CPU | |
| 84 | + * counter is disrupted, for example on live migration. This lets | |
| 85 | + * the guest know that it should discard any calibration it has | |
| 86 | + * performed of the counter against external sources (NTP/PTP/etc.). | |
| 87 | + */ | |
| 88 | + __le64 disruption_marker; | |
| 89 | + __le64 flags; | |
| 90 | + /* Indicates that the tai_offset_sec field is valid */ | |
| 91 | +#define VMCLOCK_FLAG_TAI_OFFSET_VALID (1 << 0) | |
| 92 | + /* | |
| 93 | + * Optionally used to notify guests of pending maintenance events. | |
| 94 | + * A guest which provides latency-sensitive services may wish to | |
| 95 | + * remove itself from service if an event is coming up. Two flags | |
| 96 | + * indicate the approximate imminence of the event. | |
| 97 | + */ | |
| 98 | +#define VMCLOCK_FLAG_DISRUPTION_SOON (1 << 1) /* About a day */ | |
| 99 | +#define VMCLOCK_FLAG_DISRUPTION_IMMINENT (1 << 2) /* About an hour */ | |
| 100 | +#define VMCLOCK_FLAG_PERIOD_ESTERROR_VALID (1 << 3) | |
| 101 | +#define VMCLOCK_FLAG_PERIOD_MAXERROR_VALID (1 << 4) | |
| 102 | +#define VMCLOCK_FLAG_TIME_ESTERROR_VALID (1 << 5) | |
| 103 | +#define VMCLOCK_FLAG_TIME_MAXERROR_VALID (1 << 6) | |
| 104 | + /* | |
| 105 | + * If the MONOTONIC flag is set then (other than leap seconds) it is | |
| 106 | + * guaranteed that the time calculated according this structure at | |
| 107 | + * any given moment shall never appear to be later than the time | |
| 108 | + * calculated via the structure at any *later* moment. | |
| 109 | + * | |
| 110 | + * In particular, a timestamp based on a counter reading taken | |
| 111 | + * immediately after setting the low bit of seq_count (and the | |
| 112 | + * associated memory barrier), using the previously-valid time and | |
| 113 | + * period fields, shall never be later than a timestamp based on | |
| 114 | + * a counter reading taken immediately before *clearing* the low | |
| 115 | + * bit again after the update, using the about-to-be-valid fields. | |
| 116 | + */ | |
| 117 | +#define VMCLOCK_FLAG_TIME_MONOTONIC (1 << 7) | |
| 118 | + | |
| 119 | + __u8 pad[2]; | |
| 120 | + __u8 clock_status; | |
| 121 | +#define VMCLOCK_STATUS_UNKNOWN 0 | |
| 122 | +#define VMCLOCK_STATUS_INITIALIZING 1 | |
| 123 | +#define VMCLOCK_STATUS_SYNCHRONIZED 2 | |
| 124 | +#define VMCLOCK_STATUS_FREERUNNING 3 | |
| 125 | +#define VMCLOCK_STATUS_UNRELIABLE 4 | |
| 126 | + | |
| 127 | + /* | |
| 128 | + * The time exposed through this device is never smeared. This field | |
| 129 | + * corresponds to the 'subtype' field in virtio-rtc, which indicates | |
| 130 | + * the smearing method. However in this case it provides a *hint* to | |
| 131 | + * the guest operating system, such that *if* the guest OS wants to | |
| 132 | + * provide its users with an alternative clock which does not follow | |
| 133 | + * UTC, it may do so in a fashion consistent with the other systems | |
| 134 | + * in the nearby environment. | |
| 135 | + */ | |
| 136 | + __u8 leap_second_smearing_hint; /* Matches VIRTIO_RTC_SUBTYPE_xxx */ | |
| 137 | +#define VMCLOCK_SMEARING_STRICT 0 | |
| 138 | +#define VMCLOCK_SMEARING_NOON_LINEAR 1 | |
| 139 | +#define VMCLOCK_SMEARING_UTC_SLS 2 | |
| 140 | + __le16 tai_offset_sec; /* Actually two's complement signed */ | |
| 141 | + __u8 leap_indicator; | |
| 142 | + /* | |
| 143 | + * This field is based on the VIRTIO_RTC_LEAP_xxx values as defined | |
| 144 | + * in the current draft of virtio-rtc, but since smearing cannot be | |
| 145 | + * used with the shared memory device, some values are not used. | |
| 146 | + * | |
| 147 | + * The _POST_POS and _POST_NEG values allow the guest to perform | |
| 148 | + * its own smearing during the day or so after a leap second when | |
| 149 | + * such smearing may need to continue being applied for a leap | |
| 150 | + * second which is now theoretically "historical". | |
| 151 | + */ | |
| 152 | +#define VMCLOCK_LEAP_NONE 0x00 /* No known nearby leap second */ | |
| 153 | +#define VMCLOCK_LEAP_PRE_POS 0x01 /* Positive leap second at EOM */ | |
| 154 | +#define VMCLOCK_LEAP_PRE_NEG 0x02 /* Negative leap second at EOM */ | |
| 155 | +#define VMCLOCK_LEAP_POS 0x03 /* Set during 23:59:60 second */ | |
| 156 | +#define VMCLOCK_LEAP_POST_POS 0x04 | |
| 157 | +#define VMCLOCK_LEAP_POST_NEG 0x05 | |
| 158 | + | |
| 159 | + /* Bit shift for counter_period_frac_sec and its error rate */ | |
| 160 | + __u8 counter_period_shift; | |
| 161 | + /* | |
| 162 | + * Paired values of counter and UTC at a given point in time. | |
| 163 | + */ | |
| 164 | + __le64 counter_value; | |
| 165 | + /* | |
| 166 | + * Counter period, and error margin of same. The unit of these | |
| 167 | + * fields is 1/2^(64 + counter_period_shift) of a second. | |
| 168 | + */ | |
| 169 | + __le64 counter_period_frac_sec; | |
| 170 | + __le64 counter_period_esterror_rate_frac_sec; | |
| 171 | + __le64 counter_period_maxerror_rate_frac_sec; | |
| 172 | + | |
| 173 | + /* | |
| 174 | + * Time according to time_type field above. | |
| 175 | + */ | |
| 176 | + __le64 time_sec; /* Seconds since time_type epoch */ | |
| 177 | + __le64 time_frac_sec; /* Units of 1/2^64 of a second */ | |
| 178 | + __le64 time_esterror_nanosec; | |
| 179 | + __le64 time_maxerror_nanosec; | |
| 180 | +}; | |
| 181 | + | |
| 182 | +#endif /* __VMCLOCK_ABI_H__ */ | |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | */ |
| 12 | 12 | |
| 13 | 13 | #include <linux/libc-compat.h> |
| 14 | +#include <linux/types.h> | |
| 14 | 15 | |
| 15 | 16 | #ifndef _UAPI_LINUX_XATTR_H |
| 16 | 17 | #define _UAPI_LINUX_XATTR_H |
| @@ -20,6 +21,12 @@ · 3 unmodified lines | ||
| 20 | 21 | |
| 21 | 22 | #define XATTR_CREATE 0x1 /* set value, fail if attr already exists */ |
| 22 | 23 | #define XATTR_REPLACE 0x2 /* set value, fail if attr does not exist */ |
| 24 | + | |
| 25 | +struct xattr_args { | |
| 26 | + __aligned_u64 __user value; | |
| 27 | + __u32 size; | |
| 28 | + __u32 flags; | |
| 29 | +}; | |
| 23 | 30 | #endif |
| 24 | 31 | |
| 25 | 32 | /* Namespaces */ |
| @@ -322,6 +322,7 @@ enum xfrm_attr_type_t { · 321 unmodified lines | ||
| 322 | 322 | XFRMA_MTIMER_THRESH, /* __u32 in seconds for input SA */ |
| 323 | 323 | XFRMA_SA_DIR, /* __u8 */ |
| 324 | 324 | XFRMA_NAT_KEEPALIVE_INTERVAL, /* __u32 in seconds for NAT keepalive */ |
| 325 | + XFRMA_SA_PCPU, /* __u32 */ | |
| 325 | 326 | __XFRMA_MAX |
| 326 | 327 | |
| 327 | 328 | #define XFRMA_OUTPUT_MARK XFRMA_SET_MARK /* Compatibility */ |
| @@ -437,6 +438,7 @@ struct xfrm_userpolicy_info { · 109 unmodified lines | ||
| 437 | 438 | #define XFRM_POLICY_LOCALOK 1 /* Allow user to override global policy */ |
| 438 | 439 | /* Automatically expand selector to include matching ICMP payloads. */ |
| 439 | 440 | #define XFRM_POLICY_ICMP 2 |
| 441 | +#define XFRM_POLICY_CPU_ACQUIRE 4 | |
| 440 | 442 | __u8 share; |
| 441 | 443 | }; |
| 442 | 444 | |
| @@ -95,7 +95,8 @@ struct efa_ibv_create_qp { · 94 unmodified lines | ||
| 95 | 95 | __u32 sq_ring_size; /* bytes */ |
| 96 | 96 | __u32 driver_qp_type; |
| 97 | 97 | __u16 flags; |
| 98 | − __u8 reserved_90[6]; | |
| 98 | + __u8 sl; | |
| 99 | + __u8 reserved_98[5]; | |
| 99 | 100 | }; |
| 100 | 101 | |
| 101 | 102 | struct efa_ibv_create_qp_resp { |
| @@ -252,6 +252,7 @@ enum mlx5_ib_query_dev_resp_flags { · 251 unmodified lines | ||
| 252 | 252 | MLX5_IB_QUERY_DEV_RESP_FLAGS_CQE_128B_PAD = 1 << 1, |
| 253 | 253 | MLX5_IB_QUERY_DEV_RESP_PACKET_BASED_CREDIT_MODE = 1 << 2, |
| 254 | 254 | MLX5_IB_QUERY_DEV_RESP_FLAGS_SCAT2CQE_DCT = 1 << 3, |
| 255 | + MLX5_IB_QUERY_DEV_RESP_FLAGS_OOO_DP = 1 << 4, | |
| 255 | 256 | }; |
| 256 | 257 | |
| 257 | 258 | enum mlx5_ib_tunnel_offloads { |
| @@ -439,6 +440,10 @@ struct mlx5_ib_burst_info { · 181 unmodified lines | ||
| 439 | 440 | __u16 reserved; |
| 440 | 441 | }; |
| 441 | 442 | |
| 443 | +enum mlx5_ib_modify_qp_mask { | |
| 444 | + MLX5_IB_MODIFY_QP_OOO_DP = 1 << 0, | |
| 445 | +}; | |
| 446 | + | |
| 442 | 447 | struct mlx5_ib_modify_qp { |
| 443 | 448 | __u32 comp_mask; |
| 444 | 449 | struct mlx5_ib_burst_info burst_info; |
| @@ -638,6 +638,8 @@ enum rdma_nl_notify_event_type { · 637 unmodified lines | ||
| 638 | 638 | RDMA_UNREGISTER_EVENT, |
| 639 | 639 | RDMA_NETDEV_ATTACH_EVENT, |
| 640 | 640 | RDMA_NETDEV_DETACH_EVENT, |
| 641 | + RDMA_RENAME_EVENT, | |
| 642 | + RDMA_NETDEV_RENAME_EVENT, | |
| 641 | 643 | }; |
| 642 | 644 | |
| 643 | 645 | #endif /* _UAPI_RDMA_NETLINK_H */ |
| @@ -14,7 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <sound/compress_params.h> |
| 15 | 15 | |
| 16 | 16 | |
| 17 | −#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 2, 0) | |
| 17 | +#define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 3, 0) | |
| 18 | 18 | /** |
| 19 | 19 | * struct snd_compressed_buffer - compressed buffer |
| 20 | 20 | * @fragment_size: size of buffer fragment in bytes |
| @@ -68,7 +68,8 @@ struct snd_compr_avail { · 47 unmodified lines | ||
| 68 | 68 | |
| 69 | 69 | enum snd_compr_direction { |
| 70 | 70 | SND_COMPRESS_PLAYBACK = 0, |
| 71 | − SND_COMPRESS_CAPTURE | |
| 71 | + SND_COMPRESS_CAPTURE, | |
| 72 | + SND_COMPRESS_ACCEL | |
| 72 | 73 | }; |
| 73 | 74 | |
| 74 | 75 | /** |
| @@ -127,6 +128,59 @@ struct snd_compr_metadata { · 52 unmodified lines | ||
| 127 | 128 | __u32 value[8]; |
| 128 | 129 | } __attribute__((packed, aligned(4))); |
| 129 | 130 | |
| 131 | +/* flags for struct snd_compr_task */ | |
| 132 | +#define SND_COMPRESS_TFLG_NEW_STREAM (1<<0) /* mark for the new stream data */ | |
| 133 | + | |
| 134 | +/** | |
| 135 | + * struct snd_compr_task - task primitive for non-realtime operation | |
| 136 | + * @seqno: sequence number (task identifier) | |
| 137 | + * @origin_seqno: previous sequence number (task identifier) - for reuse | |
| 138 | + * @input_fd: data input file descriptor (dma-buf) | |
| 139 | + * @output_fd: data output file descriptor (dma-buf) | |
| 140 | + * @input_size: filled data in bytes (from caller, must not exceed fragment size) | |
| 141 | + * @flags: see SND_COMPRESS_TFLG_* defines | |
| 142 | + * @reserved: reserved for future extension | |
| 143 | + */ | |
| 144 | +struct snd_compr_task { | |
| 145 | + __u64 seqno; | |
| 146 | + __u64 origin_seqno; | |
| 147 | + int input_fd; | |
| 148 | + int output_fd; | |
| 149 | + __u64 input_size; | |
| 150 | + __u32 flags; | |
| 151 | + __u8 reserved[16]; | |
| 152 | +} __attribute__((packed, aligned(4))); | |
| 153 | + | |
| 154 | +/** | |
| 155 | + * enum snd_compr_state - task state | |
| 156 | + * @SND_COMPRESS_TASK_STATE_IDLE: task is not queued | |
| 157 | + * @SND_COMPRESS_TASK_STATE_ACTIVE: task is in the queue | |
| 158 | + * @SND_COMPRESS_TASK_STATE_FINISHED: task was processed, output is available | |
| 159 | + */ | |
| 160 | +enum snd_compr_state { | |
| 161 | + SND_COMPRESS_TASK_STATE_IDLE = 0, | |
| 162 | + SND_COMPRESS_TASK_STATE_ACTIVE, | |
| 163 | + SND_COMPRESS_TASK_STATE_FINISHED | |
| 164 | +}; | |
| 165 | + | |
| 166 | +/** | |
| 167 | + * struct snd_compr_task_status - task status | |
| 168 | + * @seqno: sequence number (task identifier) | |
| 169 | + * @input_size: filled data in bytes (from user space) | |
| 170 | + * @output_size: filled data in bytes (from driver) | |
| 171 | + * @output_flags: reserved for future (all zeros - from driver) | |
| 172 | + * @state: actual task state (SND_COMPRESS_TASK_STATE_*) | |
| 173 | + * @reserved: reserved for future extension | |
| 174 | + */ | |
| 175 | +struct snd_compr_task_status { | |
| 176 | + __u64 seqno; | |
| 177 | + __u64 input_size; | |
| 178 | + __u64 output_size; | |
| 179 | + __u32 output_flags; | |
| 180 | + __u8 state; | |
| 181 | + __u8 reserved[15]; | |
| 182 | +} __attribute__((packed, aligned(4))); | |
| 183 | + | |
| 130 | 184 | /* |
| 131 | 185 | * compress path ioctl definitions |
| 132 | 186 | * SNDRV_COMPRESS_GET_CAPS: Query capability of DSP |
| @@ -164,6 +218,14 @@ struct snd_compr_metadata { · 31 unmodified lines | ||
| 164 | 218 | #define SNDRV_COMPRESS_DRAIN _IO('C', 0x34) |
| 165 | 219 | #define SNDRV_COMPRESS_NEXT_TRACK _IO('C', 0x35) |
| 166 | 220 | #define SNDRV_COMPRESS_PARTIAL_DRAIN _IO('C', 0x36) |
| 221 | + | |
| 222 | + | |
| 223 | +#define SNDRV_COMPRESS_TASK_CREATE _IOWR('C', 0x60, struct snd_compr_task) | |
| 224 | +#define SNDRV_COMPRESS_TASK_FREE _IOW('C', 0x61, __u64) | |
| 225 | +#define SNDRV_COMPRESS_TASK_START _IOWR('C', 0x62, struct snd_compr_task) | |
| 226 | +#define SNDRV_COMPRESS_TASK_STOP _IOW('C', 0x63, __u64) | |
| 227 | +#define SNDRV_COMPRESS_TASK_STATUS _IOWR('C', 0x68, struct snd_compr_task_status) | |
| 228 | + | |
| 167 | 229 | /* |
| 168 | 230 | * TODO |
| 169 | 231 | * 1. add mmap support |