lael-labs/linux

Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon+7−7

@@ -1,4 +1,4 @@
1	What: /sys/devices/.../hwmon/hwmon<i>/in0_input	1	What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/in0_input
2	Date: February 2023	2	Date: February 2023
3	KernelVersion: 6.2	3	KernelVersion: 6.2
4	Contact: intel-gfx@lists.freedesktop.org	4	Contact: intel-gfx@lists.freedesktop.org
@@ -6,7 +6,7 @@ Description: RO. Current Voltage in millivolt. · 1 unmodified line
6		6
7	Only supported for particular Intel i915 graphics platforms.	7	Only supported for particular Intel i915 graphics platforms.
8		8
9	What: /sys/devices/.../hwmon/hwmon<i>/power1_max	9	What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max
10	Date: February 2023	10	Date: February 2023
11	KernelVersion: 6.2	11	KernelVersion: 6.2
12	Contact: intel-gfx@lists.freedesktop.org	12	Contact: intel-gfx@lists.freedesktop.org
@@ -20,7 +20,7 @@ Description: RW. Card reactive sustained (PL1/Tau) power limit in microwatts. · 7 unmodified lines
20		20
21	Only supported for particular Intel i915 graphics platforms.	21	Only supported for particular Intel i915 graphics platforms.
22		22
23	What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max	23	What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_rated_max
24	Date: February 2023	24	Date: February 2023
25	KernelVersion: 6.2	25	KernelVersion: 6.2
26	Contact: intel-gfx@lists.freedesktop.org	26	Contact: intel-gfx@lists.freedesktop.org
@@ -28,7 +28,7 @@ Description: RO. Card default power limit (default TDP setting). · 1 unmodified line
28		28
29	Only supported for particular Intel i915 graphics platforms.	29	Only supported for particular Intel i915 graphics platforms.
30		30
31	What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval	31	What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max_interval
32	Date: February 2023	32	Date: February 2023
33	KernelVersion: 6.2	33	KernelVersion: 6.2
34	Contact: intel-gfx@lists.freedesktop.org	34	Contact: intel-gfx@lists.freedesktop.org
@@ -37,7 +37,7 @@ Description: RW. Sustained power limit interval (Tau in PL1/Tau) in · 2 unmodified lines
37		37
38	Only supported for particular Intel i915 graphics platforms.	38	Only supported for particular Intel i915 graphics platforms.
39		39
40	What: /sys/devices/.../hwmon/hwmon<i>/power1_crit	40	What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_crit
41	Date: February 2023	41	Date: February 2023
42	KernelVersion: 6.2	42	KernelVersion: 6.2
43	Contact: intel-gfx@lists.freedesktop.org	43	Contact: intel-gfx@lists.freedesktop.org
@@ -50,7 +50,7 @@ Description: RW. Card reactive critical (I1) power limit in microwatts. · 6 unmodified lines
50		50
51	Only supported for particular Intel i915 graphics platforms.	51	Only supported for particular Intel i915 graphics platforms.
52		52
53	What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit	53	What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/curr1_crit
54	Date: February 2023	54	Date: February 2023
55	KernelVersion: 6.2	55	KernelVersion: 6.2
56	Contact: intel-gfx@lists.freedesktop.org	56	Contact: intel-gfx@lists.freedesktop.org
@@ -63,7 +63,7 @@ Description: RW. Card reactive critical (I1) power limit in milliamperes. · 6 unmodified lines
63		63
64	Only supported for particular Intel i915 graphics platforms.	64	Only supported for particular Intel i915 graphics platforms.
65		65
66	What: /sys/devices/.../hwmon/hwmon<i>/energy1_input	66	What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/energy1_input
67	Date: February 2023	67	Date: February 2023
68	KernelVersion: 6.2	68	KernelVersion: 6.2
69	Contact: intel-gfx@lists.freedesktop.org	69	Contact: intel-gfx@lists.freedesktop.org

Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon+7−7

@@ -1,4 +1,4 @@
1	What: /sys/devices/.../hwmon/hwmon<i>/power1_max	1	What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max
2	Date: September 2023	2	Date: September 2023
3	KernelVersion: 6.5	3	KernelVersion: 6.5
4	Contact: intel-xe@lists.freedesktop.org	4	Contact: intel-xe@lists.freedesktop.org
@@ -12,7 +12,7 @@ Description: RW. Card reactive sustained (PL1) power limit in microwatts. · 7 unmodified lines
12		12
13	Only supported for particular Intel xe graphics platforms.	13	Only supported for particular Intel xe graphics platforms.
14		14
15	What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max	15	What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_rated_max
16	Date: September 2023	16	Date: September 2023
17	KernelVersion: 6.5	17	KernelVersion: 6.5
18	Contact: intel-xe@lists.freedesktop.org	18	Contact: intel-xe@lists.freedesktop.org
@@ -20,7 +20,7 @@ Description: RO. Card default power limit (default TDP setting). · 1 unmodified line
20		20
21	Only supported for particular Intel xe graphics platforms.	21	Only supported for particular Intel xe graphics platforms.
22		22
23	What: /sys/devices/.../hwmon/hwmon<i>/power1_crit	23	What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit
24	Date: September 2023	24	Date: September 2023
25	KernelVersion: 6.5	25	KernelVersion: 6.5
26	Contact: intel-xe@lists.freedesktop.org	26	Contact: intel-xe@lists.freedesktop.org
@@ -33,7 +33,7 @@ Description: RW. Card reactive critical (I1) power limit in microwatts. · 6 unmodified lines
33		33
34	Only supported for particular Intel xe graphics platforms.	34	Only supported for particular Intel xe graphics platforms.
35		35
36	What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit	36	What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr1_crit
37	Date: September 2023	37	Date: September 2023
38	KernelVersion: 6.5	38	KernelVersion: 6.5
39	Contact: intel-xe@lists.freedesktop.org	39	Contact: intel-xe@lists.freedesktop.org
@@ -44,7 +44,7 @@ Description: RW. Card reactive critical (I1) power limit in milliamperes. · 4 unmodified lines
44	the operating frequency if the power averaged over a window	44	the operating frequency if the power averaged over a window
45	exceeds this limit.	45	exceeds this limit.
46		46
47	What: /sys/devices/.../hwmon/hwmon<i>/in0_input	47	What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/in0_input
48	Date: September 2023	48	Date: September 2023
49	KernelVersion: 6.5	49	KernelVersion: 6.5
50	Contact: intel-xe@lists.freedesktop.org	50	Contact: intel-xe@lists.freedesktop.org
@@ -52,7 +52,7 @@ Description: RO. Current Voltage in millivolt. · 1 unmodified line
52		52
53	Only supported for particular Intel xe graphics platforms.	53	Only supported for particular Intel xe graphics platforms.
54		54
55	What: /sys/devices/.../hwmon/hwmon<i>/energy1_input	55	What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy1_input
56	Date: September 2023	56	Date: September 2023
57	KernelVersion: 6.5	57	KernelVersion: 6.5
58	Contact: intel-xe@lists.freedesktop.org	58	Contact: intel-xe@lists.freedesktop.org
@@ -60,7 +60,7 @@ Description: RO. Energy input of device in microjoules. · 1 unmodified line
60		60
61	Only supported for particular Intel xe graphics platforms.	61	Only supported for particular Intel xe graphics platforms.
62		62
63	What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval	63	What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max_interval
64	Date: October 2023	64	Date: October 2023
65	KernelVersion: 6.6	65	KernelVersion: 6.6
66	Contact: intel-xe@lists.freedesktop.org	66	Contact: intel-xe@lists.freedesktop.org

Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml+4−1

       - const: allwinner,sun6i-a31-spdif
       - const: allwinner,sun8i-h3-spdif
       - const: allwinner,sun50i-h6-spdif
+      - const: allwinner,sun50i-h616-spdif
       - items:
           - const: allwinner,sun8i-a83t-spdif
           - const: allwinner,sun8i-h3-spdif
             enum:
               - allwinner,sun6i-a31-spdif
               - allwinner,sun8i-h3-spdif
+              - allwinner,sun50i-h6-spdif
+              - allwinner,sun50i-h616-spdif
     then:
       required:
           contains:
             enum:
               - allwinner,sun8i-h3-spdif
-              - allwinner,sun50i-h6-spdif
+              - allwinner,sun50i-h616-spdif
     then:
       properties:

Documentation/usb/gadget-testing.rst+11−11

MAINTAINERS+7−9

 F:	drivers/net/ethernet/broadcom/bnxt/
 F:	include/linux/firmware/broadcom/tee_bnxt_fw.h
-BROADCOM BRCM80211 IEEE802.11n WIRELESS DRIVER
+BROADCOM BRCM80211 IEEE802.11 WIRELESS DRIVERS
-M:	Arend van Spriel <aspriel@gmail.com>
+M:	Arend van Spriel <arend.vanspriel@broadcom.com>
-M:	Franky Lin <franky.lin@broadcom.com>
-M:	Hante Meuleman <hante.meuleman@broadcom.com>
 L:	linux-wireless@vger.kernel.org
+L:	brcm80211@lists.linux.dev
 L:	brcm80211-dev-list.pdl@broadcom.com
 S:	Supported
 F:	drivers/net/wireless/broadcom/brcm80211/
+F:	include/linux/platform_data/brcmfmac.h
 BROADCOM BRCMSTB GPIO DRIVER
 M:	Doug Berger <opendmb@gmail.com>
 S:	Maintained
 W:	https://i2c.wiki.kernel.org/
 Q:	https://patchwork.ozlabs.org/project/linux-i2c/list/
-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux.git
 F:	Documentation/devicetree/bindings/i2c/
 F:	drivers/i2c/algos/
 F:	drivers/i2c/busses/
 F:	drivers/net/wireless/intel/iwlegacy/
 INTEL WIRELESS WIFI LINK (iwlwifi)
-M:	Gregory Greenman <gregory.greenman@intel.com>
 M:	Miri Korenblit <miriam.rachel.korenblit@intel.com>
 L:	linux-wireless@vger.kernel.org
 S:	Supported
 F:	drivers/pci/controller/pcie-xilinx-cpm.c
 PCI ENDPOINT SUBSYSTEM
-M:	Lorenzo Pieralisi <lpieralisi@kernel.org>
+M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 M:	Krzysztof Wilczyński <kw@linux.com>
-R:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 R:	Kishon Vijay Abraham I <kishon@kernel.org>
 L:	linux-pci@vger.kernel.org
 S:	Supported
 F:	drivers/infiniband/sw/rdmavt
 RDS - RELIABLE DATAGRAM SOCKETS
-M:	Santosh Shilimkar <santosh.shilimkar@oracle.com>
+M:	Allison Henderson <allison.henderson@oracle.com>
 L:	netdev@vger.kernel.org
 L:	linux-rdma@vger.kernel.org
 L:	rds-devel@oss.oracle.com (moderated for non-subscribers)

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 6	2	VERSION = 6
3	PATCHLEVEL = 8	3	PATCHLEVEL = 8
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc2	5	EXTRAVERSION = -rc3
6	NAME = Hurr durr I'ma ninja sloth	6	NAME = Hurr durr I'ma ninja sloth
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION

arch/arm64/Makefile+1−1

@@ -195,7 +195,7 @@ vdso_prepare: prepare0 · 194 unmodified lines
195	include/generated/vdso-offsets.h arch/arm64/kernel/vdso/vdso.so	195	include/generated/vdso-offsets.h arch/arm64/kernel/vdso/vdso.so
196	ifdef CONFIG_COMPAT_VDSO	196	ifdef CONFIG_COMPAT_VDSO
197	$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 \	197	$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 \
198	include/generated/vdso32-offsets.h arch/arm64/kernel/vdso32/vdso.so	198	arch/arm64/kernel/vdso32/vdso.so
199	endif	199	endif
200	endif	200	endif
201		201

arch/arm64/include/asm/vdso.h+0−3

@@ -17,9 +17,6 @@ · 16 unmodified lines
17	#ifndef __ASSEMBLY__	17	#ifndef __ASSEMBLY__
18		18
19	#include <generated/vdso-offsets.h>	19	#include <generated/vdso-offsets.h>
20	#ifdef CONFIG_COMPAT_VDSO
21	#include <generated/vdso32-offsets.h>
22	#endif
23		20
24	#define VDSO_SYMBOL(base, name) \	21	#define VDSO_SYMBOL(base, name) \
25	({ \	22	({ \

arch/arm64/kernel/Makefile+3−3

@@ -77,9 +77,9 @@ obj-$(CONFIG_UNWIND_PATCH_PAC_INTO_SCS) += patch-scs.o · 76 unmodified lines
77	# We need to prevent the SCS patching code from patching itself. Using	77	# We need to prevent the SCS patching code from patching itself. Using
78	# -mbranch-protection=none here to avoid the patchable PAC opcodes from being	78	# -mbranch-protection=none here to avoid the patchable PAC opcodes from being
79	# generated triggers an issue with full LTO on Clang, which stops emitting PAC	79	# generated triggers an issue with full LTO on Clang, which stops emitting PAC
80	# instructions altogether. So instead, omit the unwind tables used by the	80	# instructions altogether. So disable LTO as well for the compilation unit.
81	# patching code, so it will not be able to locate its own PAC instructions.	81	CFLAGS_patch-scs.o += -mbranch-protection=none
82	CFLAGS_patch-scs.o += -fno-asynchronous-unwind-tables -fno-unwind-tables	82	CFLAGS_REMOVE_patch-scs.o += $(CC_FLAGS_LTO)
83		83
84	# Force dependency (vdso*-wrap.S includes vdso.so through incbin)	84	# Force dependency (vdso*-wrap.S includes vdso.so through incbin)
85	$(obj)/vdso-wrap.o: $(obj)/vdso/vdso.so	85	$(obj)/vdso-wrap.o: $(obj)/vdso/vdso.so

arch/arm64/kernel/vdso32/Makefile+0−9

 targets += vdso.lds
 CPPFLAGS_vdso.lds += -P -C -U$(ARCH)
-include/generated/vdso32-offsets.h: $(obj)/vdso32.so.dbg FORCE
-	$(call if_changed,vdsosym)
 # Strip rule for vdso.so
 $(obj)/vdso.so: OBJCOPYFLAGS := -S
 $(obj)/vdso.so: $(obj)/vdso32.so.dbg FORCE
 quiet_cmd_vdsomunge = MUNGE   $@
       cmd_vdsomunge = $(obj)/$(munge) $< $@
-# Generate vDSO offsets using helper script (borrowed from the 64-bit vDSO)
-gen-vdsosym := $(srctree)/$(src)/../vdso/gen_vdso_offsets.sh
-quiet_cmd_vdsosym = VDSOSYM $@
-# The AArch64 nm should be able to read an AArch32 binary
-      cmd_vdsosym = $(NM) $< | $(gen-vdsosym) | LC_ALL=C sort > $@

arch/loongarch/Kconfig+2−21

 	select ARCH_DISABLE_KASAN_INLINE
 	select ARCH_ENABLE_MEMORY_HOTPLUG
 	select ARCH_ENABLE_MEMORY_HOTREMOVE
+	select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
 	select ARCH_HAS_ACPI_TABLE_UPGRADE	if ACPI
 	select ARCH_HAS_CPU_FINALIZE_INIT
 	select ARCH_HAS_FORTIFY_SOURCE
 	select HAVE_ARCH_KFENCE
 	select HAVE_ARCH_KGDB if PERF_EVENTS
 	select HAVE_ARCH_MMAP_RND_BITS if MMU
+	select HAVE_ARCH_SECCOMP
 	select HAVE_ARCH_SECCOMP_FILTER
 	select HAVE_ARCH_TRACEHOOK
 	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
 	  This is limited by the size of the lower address memory, 256MB.
-config SECCOMP
-	bool "Enable seccomp to safely compute untrusted bytecode"
-	depends on PROC_FS
-	default y
-	help
-	  This kernel feature is useful for number crunching applications
-	  that may need to compute untrusted bytecode during their
-	  execution. By using pipes or other transports made available to
-	  the process as file descriptors supporting the read/write
-	  syscalls, it's possible to isolate those applications in
-	  their own address space using seccomp. Once seccomp is
-	  enabled via /proc/<pid>/seccomp, it cannot be disabled
-	  and the task is only allowed to execute a few safe syscalls
-	  defined by each seccomp mode.
-	  If unsure, say Y. Only embedded should say N here.
 endmenu
 config ARCH_SELECT_MEMORY_MODEL
 	  or have huge holes in the physical address space for other reasons.
 	  See <file:Documentation/mm/numa.rst> for more.
-config ARCH_ENABLE_THP_MIGRATION
-	def_bool y
-	depends on TRANSPARENT_HUGEPAGE
 config ARCH_MEMORY_PROBE
 	def_bool y
 	depends on MEMORY_HOTPLUG

arch/loongarch/include/asm/acpi.h+3−1

@@ -32,8 +32,10 @@ static inline bool acpi_has_cpu_in_madt(void) · 31 unmodified lines
32	return true;	32	return true;
33	}	33	}
34		34
		35	#define MAX_CORE_PIC 256
		36
35	extern struct list_head acpi_wakeup_device_list;	37	extern struct list_head acpi_wakeup_device_list;
36	extern struct acpi_madt_core_pic acpi_core_pic[NR_CPUS];	38	extern struct acpi_madt_core_pic acpi_core_pic[MAX_CORE_PIC];
37		39
38	extern int __init parse_acpi_topology(void);	40	extern int __init parse_acpi_topology(void);
39		41

arch/loongarch/kernel/acpi.c+1−3

@@ -29,11 +29,9 @@ int disabled_cpus; · 28 unmodified lines
29		29
30	u64 acpi_saved_sp;	30	u64 acpi_saved_sp;
31		31
32	#define MAX_CORE_PIC 256
33
34	#define PREFIX "ACPI: "	32	#define PREFIX "ACPI: "
35		33
36	struct acpi_madt_core_pic acpi_core_pic[NR_CPUS];	34	struct acpi_madt_core_pic acpi_core_pic[MAX_CORE_PIC];
37		35
38	void __init __iomem * __acpi_map_table(unsigned long phys, unsigned long size)	36	void __init __iomem * __acpi_map_table(unsigned long phys, unsigned long size)
39	{	37	{

arch/loongarch/mm/kasan_init.c+3−0

@@ -44,6 +44,9 @@ void kasan_mem_to_shadow(const void addr) · 43 unmodified lines
44	unsigned long xrange = (maddr >> XRANGE_SHIFT) & 0xffff;	44	unsigned long xrange = (maddr >> XRANGE_SHIFT) & 0xffff;
45	unsigned long offset = 0;	45	unsigned long offset = 0;
46		46
		47	if (maddr >= FIXADDR_START)
		48	return (void *)(kasan_early_shadow_page);
		49
47	maddr &= XRANGE_SHADOW_MASK;	50	maddr &= XRANGE_SHADOW_MASK;
48	switch (xrange) {	51	switch (xrange) {
49	case XKPRANGE_CC_SEG:	52	case XKPRANGE_CC_SEG:

arch/loongarch/vdso/Makefile+1−0

@@ -2,6 +2,7 @@ · 1 unmodified line
2	# Objects to go into the VDSO.	2	# Objects to go into the VDSO.
3		3
4	KASAN_SANITIZE := n	4	KASAN_SANITIZE := n
		5	UBSAN_SANITIZE := n
5	KCOV_INSTRUMENT := n	6	KCOV_INSTRUMENT := n
6		7
7	# Include the generic Makefile to check the built vdso.	8	# Include the generic Makefile to check the built vdso.

arch/powerpc/kernel/iommu.c+28−9

 	struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
 	struct iommu_group *grp = iommu_group_get(dev);
 	struct iommu_table_group *table_group;
-	int ret = -EINVAL;
 	/* At first attach the ownership is already set */
 	if (!domain)
 		return 0;
-	if (!grp)
-		return -ENODEV;
 	table_group = iommu_group_get_iommudata(grp);
-	ret = table_group->ops->take_ownership(table_group);
+	/*
+	 * The domain being set to PLATFORM from earlier
+	 * BLOCKED. The table_group ownership has to be released.
+	 */
+	table_group->ops->release_ownership(table_group);
 	iommu_group_put(grp);
-	return ret;
+	return 0;
 }
 static const struct iommu_domain_ops spapr_tce_platform_domain_ops = {
 	.ops = &spapr_tce_platform_domain_ops,
 };
-static struct iommu_domain spapr_tce_blocked_domain = {
+static int
-	.type = IOMMU_DOMAIN_BLOCKED,
+spapr_tce_blocked_iommu_attach_dev(struct iommu_domain *platform_domain,
+				     struct device *dev)
+{
+	struct iommu_group *grp = iommu_group_get(dev);
+	struct iommu_table_group *table_group;
+	int ret = -EINVAL;
 	/*
 	 * FIXME: SPAPR mixes blocked and platform behaviors, the blocked domain
 	 * also sets the dma_api ops
 	 */
-	.ops = &spapr_tce_platform_domain_ops,
+	table_group = iommu_group_get_iommudata(grp);
+	ret = table_group->ops->take_ownership(table_group);
+	iommu_group_put(grp);
+	return ret;
+}
+static const struct iommu_domain_ops spapr_tce_blocked_domain_ops = {
+	.attach_dev = spapr_tce_blocked_iommu_attach_dev,
+};
+static struct iommu_domain spapr_tce_blocked_domain = {
+	.type = IOMMU_DOMAIN_BLOCKED,
+	.ops = &spapr_tce_blocked_domain_ops,
 };
 static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap)

arch/riscv/include/uapi/asm/kvm.h+27−0

@@ -139,6 +139,33 @@ enum KVM_RISCV_ISA_EXT_ID { · 138 unmodified lines
139	KVM_RISCV_ISA_EXT_ZIHPM,	139	KVM_RISCV_ISA_EXT_ZIHPM,
140	KVM_RISCV_ISA_EXT_SMSTATEEN,	140	KVM_RISCV_ISA_EXT_SMSTATEEN,
141	KVM_RISCV_ISA_EXT_ZICOND,	141	KVM_RISCV_ISA_EXT_ZICOND,
		142	KVM_RISCV_ISA_EXT_ZBC,
		143	KVM_RISCV_ISA_EXT_ZBKB,
		144	KVM_RISCV_ISA_EXT_ZBKC,
		145	KVM_RISCV_ISA_EXT_ZBKX,
		146	KVM_RISCV_ISA_EXT_ZKND,
		147	KVM_RISCV_ISA_EXT_ZKNE,
		148	KVM_RISCV_ISA_EXT_ZKNH,
		149	KVM_RISCV_ISA_EXT_ZKR,
		150	KVM_RISCV_ISA_EXT_ZKSED,
		151	KVM_RISCV_ISA_EXT_ZKSH,
		152	KVM_RISCV_ISA_EXT_ZKT,
		153	KVM_RISCV_ISA_EXT_ZVBB,
		154	KVM_RISCV_ISA_EXT_ZVBC,
		155	KVM_RISCV_ISA_EXT_ZVKB,
		156	KVM_RISCV_ISA_EXT_ZVKG,
		157	KVM_RISCV_ISA_EXT_ZVKNED,
		158	KVM_RISCV_ISA_EXT_ZVKNHA,
		159	KVM_RISCV_ISA_EXT_ZVKNHB,
		160	KVM_RISCV_ISA_EXT_ZVKSED,
		161	KVM_RISCV_ISA_EXT_ZVKSH,
		162	KVM_RISCV_ISA_EXT_ZVKT,
		163	KVM_RISCV_ISA_EXT_ZFH,
		164	KVM_RISCV_ISA_EXT_ZFHMIN,
		165	KVM_RISCV_ISA_EXT_ZIHINTNTL,
		166	KVM_RISCV_ISA_EXT_ZVFH,
		167	KVM_RISCV_ISA_EXT_ZVFHMIN,
		168	KVM_RISCV_ISA_EXT_ZFA,
142	KVM_RISCV_ISA_EXT_MAX,	169	KVM_RISCV_ISA_EXT_MAX,
143	};	170	};
144		171

arch/riscv/kvm/vcpu_onereg.c+54−0

@@ -42,15 +42,42 @@ static const unsigned long kvm_isa_ext_arr[] = { · 41 unmodified lines
42	KVM_ISA_EXT_ARR(SVPBMT),	42	KVM_ISA_EXT_ARR(SVPBMT),
43	KVM_ISA_EXT_ARR(ZBA),	43	KVM_ISA_EXT_ARR(ZBA),
44	KVM_ISA_EXT_ARR(ZBB),	44	KVM_ISA_EXT_ARR(ZBB),
		45	KVM_ISA_EXT_ARR(ZBC),
		46	KVM_ISA_EXT_ARR(ZBKB),
		47	KVM_ISA_EXT_ARR(ZBKC),
		48	KVM_ISA_EXT_ARR(ZBKX),
45	KVM_ISA_EXT_ARR(ZBS),	49	KVM_ISA_EXT_ARR(ZBS),
		50	KVM_ISA_EXT_ARR(ZFA),
		51	KVM_ISA_EXT_ARR(ZFH),
		52	KVM_ISA_EXT_ARR(ZFHMIN),
46	KVM_ISA_EXT_ARR(ZICBOM),	53	KVM_ISA_EXT_ARR(ZICBOM),
47	KVM_ISA_EXT_ARR(ZICBOZ),	54	KVM_ISA_EXT_ARR(ZICBOZ),
48	KVM_ISA_EXT_ARR(ZICNTR),	55	KVM_ISA_EXT_ARR(ZICNTR),
49	KVM_ISA_EXT_ARR(ZICOND),	56	KVM_ISA_EXT_ARR(ZICOND),
50	KVM_ISA_EXT_ARR(ZICSR),	57	KVM_ISA_EXT_ARR(ZICSR),
51	KVM_ISA_EXT_ARR(ZIFENCEI),	58	KVM_ISA_EXT_ARR(ZIFENCEI),
		59	KVM_ISA_EXT_ARR(ZIHINTNTL),
52	KVM_ISA_EXT_ARR(ZIHINTPAUSE),	60	KVM_ISA_EXT_ARR(ZIHINTPAUSE),
53	KVM_ISA_EXT_ARR(ZIHPM),	61	KVM_ISA_EXT_ARR(ZIHPM),
		62	KVM_ISA_EXT_ARR(ZKND),
		63	KVM_ISA_EXT_ARR(ZKNE),
		64	KVM_ISA_EXT_ARR(ZKNH),
		65	KVM_ISA_EXT_ARR(ZKR),
		66	KVM_ISA_EXT_ARR(ZKSED),
		67	KVM_ISA_EXT_ARR(ZKSH),
		68	KVM_ISA_EXT_ARR(ZKT),
		69	KVM_ISA_EXT_ARR(ZVBB),
		70	KVM_ISA_EXT_ARR(ZVBC),
		71	KVM_ISA_EXT_ARR(ZVFH),
		72	KVM_ISA_EXT_ARR(ZVFHMIN),
		73	KVM_ISA_EXT_ARR(ZVKB),
		74	KVM_ISA_EXT_ARR(ZVKG),
		75	KVM_ISA_EXT_ARR(ZVKNED),
		76	KVM_ISA_EXT_ARR(ZVKNHA),
		77	KVM_ISA_EXT_ARR(ZVKNHB),
		78	KVM_ISA_EXT_ARR(ZVKSED),
		79	KVM_ISA_EXT_ARR(ZVKSH),
		80	KVM_ISA_EXT_ARR(ZVKT),
54	};	81	};
55		82
56	static unsigned long kvm_riscv_vcpu_base2isa_ext(unsigned long base_ext)	83	static unsigned long kvm_riscv_vcpu_base2isa_ext(unsigned long base_ext)
@@ -92,13 +119,40 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) · 35 unmodified lines
92	case KVM_RISCV_ISA_EXT_SVNAPOT:	119	case KVM_RISCV_ISA_EXT_SVNAPOT:
93	case KVM_RISCV_ISA_EXT_ZBA:	120	case KVM_RISCV_ISA_EXT_ZBA:
94	case KVM_RISCV_ISA_EXT_ZBB:	121	case KVM_RISCV_ISA_EXT_ZBB:
		122	case KVM_RISCV_ISA_EXT_ZBC:
		123	case KVM_RISCV_ISA_EXT_ZBKB:
		124	case KVM_RISCV_ISA_EXT_ZBKC:
		125	case KVM_RISCV_ISA_EXT_ZBKX:
95	case KVM_RISCV_ISA_EXT_ZBS:	126	case KVM_RISCV_ISA_EXT_ZBS:
		127	case KVM_RISCV_ISA_EXT_ZFA:
		128	case KVM_RISCV_ISA_EXT_ZFH:
		129	case KVM_RISCV_ISA_EXT_ZFHMIN:
96	case KVM_RISCV_ISA_EXT_ZICNTR:	130	case KVM_RISCV_ISA_EXT_ZICNTR:
97	case KVM_RISCV_ISA_EXT_ZICOND:	131	case KVM_RISCV_ISA_EXT_ZICOND:
98	case KVM_RISCV_ISA_EXT_ZICSR:	132	case KVM_RISCV_ISA_EXT_ZICSR:
99	case KVM_RISCV_ISA_EXT_ZIFENCEI:	133	case KVM_RISCV_ISA_EXT_ZIFENCEI:
		134	case KVM_RISCV_ISA_EXT_ZIHINTNTL:
100	case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:	135	case KVM_RISCV_ISA_EXT_ZIHINTPAUSE:
101	case KVM_RISCV_ISA_EXT_ZIHPM:	136	case KVM_RISCV_ISA_EXT_ZIHPM:
		137	case KVM_RISCV_ISA_EXT_ZKND:
		138	case KVM_RISCV_ISA_EXT_ZKNE:
		139	case KVM_RISCV_ISA_EXT_ZKNH:
		140	case KVM_RISCV_ISA_EXT_ZKR:
		141	case KVM_RISCV_ISA_EXT_ZKSED:
		142	case KVM_RISCV_ISA_EXT_ZKSH:
		143	case KVM_RISCV_ISA_EXT_ZKT:
		144	case KVM_RISCV_ISA_EXT_ZVBB:
		145	case KVM_RISCV_ISA_EXT_ZVBC:
		146	case KVM_RISCV_ISA_EXT_ZVFH:
		147	case KVM_RISCV_ISA_EXT_ZVFHMIN:
		148	case KVM_RISCV_ISA_EXT_ZVKB:
		149	case KVM_RISCV_ISA_EXT_ZVKG:
		150	case KVM_RISCV_ISA_EXT_ZVKNED:
		151	case KVM_RISCV_ISA_EXT_ZVKNHA:
		152	case KVM_RISCV_ISA_EXT_ZVKNHB:
		153	case KVM_RISCV_ISA_EXT_ZVKSED:
		154	case KVM_RISCV_ISA_EXT_ZVKSH:
		155	case KVM_RISCV_ISA_EXT_ZVKT:
102	return false;	156	return false;
103	/* Extensions which can be disabled using Smstateen */	157	/* Extensions which can be disabled using Smstateen */
104	case KVM_RISCV_ISA_EXT_SSAIA:	158	case KVM_RISCV_ISA_EXT_SSAIA:

arch/riscv/mm/tlbflush.c+1−1

@@ -68,7 +68,7 @@ static inline void local_flush_tlb_range_asid(unsigned long start, · 67 unmodified lines
68		68
69	void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)	69	void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
70	{	70	{
71	local_flush_tlb_range_asid(start, end, PAGE_SIZE, FLUSH_TLB_NO_ASID);	71	local_flush_tlb_range_asid(start, end - start, PAGE_SIZE, FLUSH_TLB_NO_ASID);
72	}	72	}
73		73
74	static void __ipi_flush_tlb_all(void *info)	74	static void __ipi_flush_tlb_all(void *info)

arch/s390/kvm/priv.c+6−2

 	if (vcpu->kvm->arch.crypto.pqap_hook) {
 		pqap_hook = *vcpu->kvm->arch.crypto.pqap_hook;
 		ret = pqap_hook(vcpu);
-		if (!ret && vcpu->run->s.regs.gprs[1] & 0x00ff0000)
+		if (!ret) {
-			kvm_s390_set_psw_cc(vcpu, 3);
+			if (vcpu->run->s.regs.gprs[1] & 0x00ff0000)
+				kvm_s390_set_psw_cc(vcpu, 3);
+			else
+				kvm_s390_set_psw_cc(vcpu, 0);
+		}
 		up_read(&vcpu->kvm->arch.crypto.pqap_hook_rwsem);
 		return ret;
 	}

arch/s390/kvm/vsie.c+0−1

@@ -1235,7 +1235,6 @@ static int acquire_gmap_shadow(struct kvm_vcpu *vcpu, · 1234 unmodified lines
1235	gmap = gmap_shadow(vcpu->arch.gmap, asce, edat);	1235	gmap = gmap_shadow(vcpu->arch.gmap, asce, edat);
1236	if (IS_ERR(gmap))	1236	if (IS_ERR(gmap))
1237	return PTR_ERR(gmap);	1237	return PTR_ERR(gmap);
1238	gmap->private = vcpu->kvm;
1239	vcpu->kvm->stat.gmap_shadow_create++;	1238	vcpu->kvm->stat.gmap_shadow_create++;
1240	WRITE_ONCE(vsie_page->gmap, gmap);	1239	WRITE_ONCE(vsie_page->gmap, gmap);
1241	return 0;	1240	return 0;

arch/s390/mm/gmap.c+1−0

@@ -1691,6 +1691,7 @@ struct gmap gmap_shadow(struct gmap parent, unsigned long asce, · 1690 unmodified lines
1691	return ERR_PTR(-ENOMEM);	1691	return ERR_PTR(-ENOMEM);
1692	new->mm = parent->mm;	1692	new->mm = parent->mm;
1693	new->parent = gmap_get(parent);	1693	new->parent = gmap_get(parent);
		1694	new->private = parent->private;
1694	new->orig_asce = asce;	1695	new->orig_asce = asce;
1695	new->edat_level = edat_level;	1696	new->edat_level = edat_level;
1696	new->initialized = false;	1697	new->initialized = false;

arch/x86/include/asm/coco.h+3−2

 	CC_VENDOR_INTEL,
 };
-extern enum cc_vendor cc_vendor;
 #ifdef CONFIG_ARCH_HAS_CC_PLATFORM
+extern enum cc_vendor cc_vendor;
 void cc_set_mask(u64 mask);
 u64 cc_mkenc(u64 val);
 u64 cc_mkdec(u64 val);
 #else
+#define cc_vendor (CC_VENDOR_NONE)
 static inline u64 cc_mkenc(u64 val)
 {
 	return val;

arch/x86/include/asm/kvm_host.h+2−0

@@ -1145,6 +1145,8 @@ struct kvm_hv { · 1144 unmodified lines
1145	unsigned int synic_auto_eoi_used;	1145	unsigned int synic_auto_eoi_used;
1146		1146
1147	struct kvm_hv_syndbg hv_syndbg;	1147	struct kvm_hv_syndbg hv_syndbg;
		1148
		1149	bool xsaves_xsavec_checked;
1148	};	1150	};
1149	#endif	1151	#endif
1150		1152

arch/x86/kernel/kvm.c+2−1

@@ -434,7 +434,8 @@ static void __init sev_map_percpu_data(void) · 433 unmodified lines
434	{	434	{
435	int cpu;	435	int cpu;
436		436
437	if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))	437	if (cc_vendor != CC_VENDOR_AMD \|\|
		438	!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
438	return;	439	return;
439		440
440	for_each_possible_cpu(cpu) {	441	for_each_possible_cpu(cpu) {

arch/x86/kvm/hyperv.c+50−0

@@ -1322,6 +1322,56 @@ static bool hv_check_msr_access(struct kvm_vcpu_hv *hv_vcpu, u32 msr) · 1321 unmodified lines
1322	return false;	1322	return false;
1323	}	1323	}
1324		1324
		1325	#define KVM_HV_WIN2016_GUEST_ID 0x1040a00003839
		1326	#define KVM_HV_WIN2016_GUEST_ID_MASK (~GENMASK_ULL(23, 16)) /* mask out the service version */
		1327
		1328	/*
		1329	* Hyper-V enabled Windows Server 2016 SMP VMs fail to boot in !XSAVES && XSAVEC
		1330	* configuration.
		1331	* Such configuration can result from, for example, AMD Erratum 1386 workaround.
		1332	*
		1333	* Print a notice so users aren't left wondering what's suddenly gone wrong.
		1334	*/
		1335	static void __kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu)
		1336	{
		1337	struct kvm *kvm = vcpu->kvm;
		1338	struct kvm_hv *hv = to_kvm_hv(kvm);
		1339
		1340	/* Check again under the hv_lock. */
		1341	if (hv->xsaves_xsavec_checked)
		1342	return;
		1343
		1344	if ((hv->hv_guest_os_id & KVM_HV_WIN2016_GUEST_ID_MASK) !=
		1345	KVM_HV_WIN2016_GUEST_ID)
		1346	return;
		1347
		1348	hv->xsaves_xsavec_checked = true;
		1349
		1350	/* UP configurations aren't affected */
		1351	if (atomic_read(&kvm->online_vcpus) < 2)
		1352	return;
		1353
		1354	if (guest_cpuid_has(vcpu, X86_FEATURE_XSAVES) \|\|
		1355	!guest_cpuid_has(vcpu, X86_FEATURE_XSAVEC))
		1356	return;
		1357
		1358	pr_notice_ratelimited("Booting SMP Windows KVM VM with !XSAVES && XSAVEC. "
		1359	"If it fails to boot try disabling XSAVEC in the VM config.\n");
		1360	}
		1361
		1362	void kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu)
		1363	{
		1364	struct kvm_hv *hv = to_kvm_hv(vcpu->kvm);
		1365
		1366	if (!vcpu->arch.hyperv_enabled \|\|
		1367	hv->xsaves_xsavec_checked)
		1368	return;
		1369
		1370	mutex_lock(&hv->hv_lock);
		1371	__kvm_hv_xsaves_xsavec_maybe_warn(vcpu);
		1372	mutex_unlock(&hv->hv_lock);
		1373	}
		1374
1325	static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,	1375	static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
1326	bool host)	1376	bool host)
1327	{	1377	{

arch/x86/kvm/hyperv.h+3−0

 			   struct pvclock_vcpu_time_info *hv_clock);
 void kvm_hv_request_tsc_page_update(struct kvm *kvm);
+void kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu);
 void kvm_hv_init_vm(struct kvm *kvm);
 void kvm_hv_destroy_vm(struct kvm *kvm);
 int kvm_hv_vcpu_init(struct kvm_vcpu *vcpu);
 static inline void kvm_hv_setup_tsc_page(struct kvm *kvm,
 					 struct pvclock_vcpu_time_info *hv_clock) {}
 static inline void kvm_hv_request_tsc_page_update(struct kvm *kvm) {}
+static inline void kvm_hv_xsaves_xsavec_maybe_warn(struct kvm_vcpu *vcpu) {}
 static inline void kvm_hv_init_vm(struct kvm *kvm) {}
 static inline void kvm_hv_destroy_vm(struct kvm *kvm) {}
 static inline int kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)

arch/x86/kvm/x86.c+7−0

 	if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
 		kvm_mmu_reset_context(vcpu);
+	if (!static_cpu_has(X86_FEATURE_XSAVES) &&
+	    (efer & EFER_SVME))
+		kvm_hv_xsaves_xsavec_maybe_warn(vcpu);
 	return 0;
 }
 		r = -EEXIST;
 		if (kvm->arch.vpit)
 			goto create_pit_unlock;
+		r = -ENOENT;
+		if (!pic_in_kernel(kvm))
+			goto create_pit_unlock;
 		r = -ENOMEM;
 		kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
 		if (kvm->arch.vpit)

block/blk-core.c+10−0

 #include "blk-pm.h"
 #include "blk-cgroup.h"
 #include "blk-throttle.h"
+#include "blk-ioprio.h"
 struct dentry *blk_debugfs_root;
 }
 EXPORT_SYMBOL(submit_bio_noacct);
+static void bio_set_ioprio(struct bio *bio)
+{
+	/* Nobody set ioprio so far? Initialize it based on task's nice value */
+	if (IOPRIO_PRIO_CLASS(bio->bi_ioprio) == IOPRIO_CLASS_NONE)
+		bio->bi_ioprio = get_current_ioprio();
+	blkcg_set_ioprio(bio);
+}
 /**
  * submit_bio - submit a bio to the block device layer for I/O
  * @bio: The &struct bio which describes the I/O
 		count_vm_events(PGPGOUT, bio_sectors(bio));
 	}
+	bio_set_ioprio(bio);
 	submit_bio_noacct(bio);
 }
 EXPORT_SYMBOL(submit_bio);

block/blk-mq.c+0−10

 #include "blk-stat.h"
 #include "blk-mq-sched.h"
 #include "blk-rq-qos.h"
-#include "blk-ioprio.h"
 static DEFINE_PER_CPU(struct llist_head, blk_cpu_done);
 static DEFINE_PER_CPU(call_single_data_t, blk_cpu_csd);
 	return true;
 }
-static void bio_set_ioprio(struct bio *bio)
-{
-	/* Nobody set ioprio so far? Initialize it based on task's nice value */
-	if (IOPRIO_PRIO_CLASS(bio->bi_ioprio) == IOPRIO_CLASS_NONE)
-		bio->bi_ioprio = get_current_ioprio();
-	blkcg_set_ioprio(bio);
-}
 /**
  * blk_mq_submit_bio - Create and send a request to block device.
  * @bio: Bio pointer.
 	blk_status_t ret;
 	bio = blk_queue_bounce(bio, q);
-	bio_set_ioprio(bio);
 	if (plug) {
 		rq = rq_list_peek(&plug->cached_rq);

crypto/algif_hash.c+3−2

 		if (!(msg->msg_flags & MSG_MORE)) {
 			err = hash_alloc_result(sk, ctx);
 			if (err)
-				goto unlock_free;
+				goto unlock_free_result;
 			ahash_request_set_crypt(&ctx->req, NULL,
 						ctx->result, 0);
 			err = crypto_wait_req(crypto_ahash_final(&ctx->req),
 					      &ctx->wait);
 			if (err)
-				goto unlock_free;
+				goto unlock_free_result;
 		}
 		goto done_more;
 	}
 unlock_free:
 	af_alg_free_sg(&ctx->sgl);
+unlock_free_result:
 	hash_free_result(sk, ctx);
 	ctx->more = false;
 	goto unlock;

crypto/cbc.c+3−0

@@ -148,6 +148,9 @@ static int crypto_cbc_create(struct crypto_template tmpl, struct rtattr *tb) · 147 unmodified lines
148	if (!is_power_of_2(inst->alg.co.base.cra_blocksize))	148	if (!is_power_of_2(inst->alg.co.base.cra_blocksize))
149	goto out_free_inst;	149	goto out_free_inst;
150		150
		151	if (inst->alg.co.statesize)
		152	goto out_free_inst;
		153
151	inst->alg.encrypt = crypto_cbc_encrypt;	154	inst->alg.encrypt = crypto_cbc_encrypt;
152	inst->alg.decrypt = crypto_cbc_decrypt;	155	inst->alg.decrypt = crypto_cbc_decrypt;
153		156

drivers/android/binder.c+10−0

@@ -478,6 +478,16 @@ binder_enqueue_thread_work_ilocked(struct binder_thread *thread, · 477 unmodified lines
478	{	478	{
479	WARN_ON(!list_empty(&thread->waiting_thread_node));	479	WARN_ON(!list_empty(&thread->waiting_thread_node));
480	binder_enqueue_work_ilocked(work, &thread->todo);	480	binder_enqueue_work_ilocked(work, &thread->todo);
		481
		482	/* (e)poll-based threads require an explicit wakeup signal when
		483	* queuing their own work; they rely on these events to consume
		484	* messages without I/O block. Without it, threads risk waiting
		485	* indefinitely without handling the work.
		486	*/
		487	if (thread->looper & BINDER_LOOPER_STATE_POLL &&
		488	thread->pid == current->pid && !thread->process_todo)
		489	wake_up_interruptible_sync(&thread->wait);
		490
481	thread->process_todo = true;	491	thread->process_todo = true;
482	}	492	}
483		493

drivers/ata/ahci.c+5−5

@@ -606,13 +606,13 @@ static const struct pci_device_id ahci_pci_tbl[] = { · 605 unmodified lines
606	{ PCI_VDEVICE(PROMISE, 0x3781), board_ahci }, /* FastTrak TX8660 ahci-mode */	606	{ PCI_VDEVICE(PROMISE, 0x3781), board_ahci }, /* FastTrak TX8660 ahci-mode */
607		607
608	/* ASMedia */	608	/* ASMedia */
609	{ PCI_VDEVICE(ASMEDIA, 0x0601), board_ahci }, /* ASM1060 */	609	{ PCI_VDEVICE(ASMEDIA, 0x0601), board_ahci_43bit_dma }, /* ASM1060 */
610	{ PCI_VDEVICE(ASMEDIA, 0x0602), board_ahci }, /* ASM1060 */	610	{ PCI_VDEVICE(ASMEDIA, 0x0602), board_ahci_43bit_dma }, /* ASM1060 */
611	{ PCI_VDEVICE(ASMEDIA, 0x0611), board_ahci_43bit_dma }, /* ASM1061 */	611	{ PCI_VDEVICE(ASMEDIA, 0x0611), board_ahci_43bit_dma }, /* ASM1061 */
612	{ PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci_43bit_dma }, /* ASM1061/1062 */	612	{ PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci_43bit_dma }, /* ASM1061/1062 */
613	{ PCI_VDEVICE(ASMEDIA, 0x0621), board_ahci }, /* ASM1061R */	613	{ PCI_VDEVICE(ASMEDIA, 0x0621), board_ahci_43bit_dma }, /* ASM1061R */
614	{ PCI_VDEVICE(ASMEDIA, 0x0622), board_ahci }, /* ASM1062R */	614	{ PCI_VDEVICE(ASMEDIA, 0x0622), board_ahci_43bit_dma }, /* ASM1062R */
615	{ PCI_VDEVICE(ASMEDIA, 0x0624), board_ahci }, /* ASM1062+JMB575 */	615	{ PCI_VDEVICE(ASMEDIA, 0x0624), board_ahci_43bit_dma }, /* ASM1062+JMB575 */
616	{ PCI_VDEVICE(ASMEDIA, 0x1062), board_ahci }, /* ASM1062A */	616	{ PCI_VDEVICE(ASMEDIA, 0x1062), board_ahci }, /* ASM1062A */
617	{ PCI_VDEVICE(ASMEDIA, 0x1064), board_ahci }, /* ASM1064 */	617	{ PCI_VDEVICE(ASMEDIA, 0x1064), board_ahci }, /* ASM1064 */
618	{ PCI_VDEVICE(ASMEDIA, 0x1164), board_ahci }, /* ASM1164 */	618	{ PCI_VDEVICE(ASMEDIA, 0x1164), board_ahci }, /* ASM1164 */

drivers/atm/idt77252.c+2−0

@@ -2930,6 +2930,8 @@ open_card_ubr0(struct idt77252_dev *card) · 2929 unmodified lines
2930	vc->scq = alloc_scq(card, vc->class);	2930	vc->scq = alloc_scq(card, vc->class);
2931	if (!vc->scq) {	2931	if (!vc->scq) {
2932	printk("%s: can't get SCQ.\n", card->name);	2932	printk("%s: can't get SCQ.\n", card->name);
		2933	kfree(card->vcs[0]);
		2934	card->vcs[0] = NULL;
2933	return -ENOMEM;	2935	return -ENOMEM;
2934	}	2936	}
2935		2937

drivers/crypto/ccp/sev-dev.c+8−2

 static int __sev_platform_shutdown_locked(int *error)
 {
-	struct sev_device *sev = psp_master->sev_data;
+	struct psp_device *psp = psp_master;
+	struct sev_device *sev;
 	int ret;
-	if (!sev || sev->state == SEV_STATE_UNINIT)
+	if (!psp || !psp->sev_data)
+		return 0;
+	sev = psp->sev_data;
+	if (sev->state == SEV_STATE_UNINIT)
 		return 0;
 	ret = __sev_do_cmd_locked(SEV_CMD_SHUTDOWN, NULL, error);

drivers/dma-buf/heaps/cma_heap.c+3−4

 	if (vmf->pgoff > buffer->pagecount)
 		return VM_FAULT_SIGBUS;
-	vmf->page = buffer->pages[vmf->pgoff];
+	return vmf_insert_pfn(vma, vmf->address, page_to_pfn(buffer->pages[vmf->pgoff]));
-	get_page(vmf->page);
-	return 0;
 }
 static const struct vm_operations_struct dma_heap_vm_ops = {
 	if ((vma->vm_flags & (VM_SHARED | VM_MAYSHARE)) == 0)
 		return -EINVAL;
+	vm_flags_set(vma, VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP);
 	vma->vm_ops = &dma_heap_vm_ops;
 	vma->vm_private_data = buffer;

drivers/dma/at_hdmac.c+21−11

  * @vd: pointer to the virtual dma descriptor.
  * @atchan: pointer to the atmel dma channel.
  * @total_len: total transaction byte count
- * @sg_len: number of sg entries.
+ * @sglen: number of sg entries.
  * @sg: array of sgs.
+ * @boundary: number of transfers to perform before the automatic address increment operation
+ * @dst_hole: value to add to the destination address when the boundary has been reached
+ * @src_hole: value to add to the source address when the boundary has been reached
+ * @memset_buffer: buffer used for the memset operation
+ * @memset_paddr: physical address of the buffer used for the memset operation
+ * @memset_vaddr: virtual address of the buffer used for the memset operation
  */
 struct at_desc {
 	struct				virt_dma_desc vd;
 /*--  Channels  --------------------------------------------------------*/
 /**
- * atc_status - information bits stored in channel status flag
+ * enum atc_status - information bits stored in channel status flag
+ *
+ * @ATC_IS_PAUSED: If channel is pauses
+ * @ATC_IS_CYCLIC: If channel is cyclic
  *
  * Manipulated with atomic operations.
  */
 	u32			save_cfg;
 	u32			save_dscr;
 	struct dma_slave_config	dma_sconfig;
-	bool			cyclic;
 	struct at_desc		*desc;
 };
 /**
  * struct at_dma - internal representation of an Atmel HDMA Controller
  * @dma_device: dmaengine dma_device object members
- * @atdma_devtype: identifier of DMA controller compatibility
+ * @regs: memory mapped register base
- * @ch_regs: memory mapped register base
  * @clk: dma controller clock
  * @save_imr: interrupt mask register that is saved on suspend/resume cycle
  * @all_chan_mask: all channels availlable in a mask
  * @lli_pool: hw lli table
+ * @memset_pool: hw memset pool
  * @chan: channels table to store at_dma_chan structures
  */
 struct at_dma {
 /**
  * atc_get_llis_residue - Get residue for a hardware linked list transfer
+ * @atchan: pointer to an atmel hdmac channel.
+ * @desc: pointer to the descriptor for which the residue is calculated.
+ * @residue: residue to be set to dma_tx_state.
  *
  * Calculate the residue by removing the length of the Linked List Item (LLI)
  * already transferred from the total length. To get the current LLI we can use
  * two DSCR values are different, we read again the CTRLA then the DSCR till two
  * consecutive read values from DSCR are equal or till the maximum trials is
  * reach. This algorithm is very unlikely not to find a stable value for DSCR.
- * @atchan: pointer to an atmel hdmac channel.
+ *
- * @desc: pointer to the descriptor for which the residue is calculated.
+ * Returns: %0 on success, -errno otherwise.
- * @residue: residue to be set to dma_tx_state.
- * Returns 0 on success, -errno otherwise.
  */
 static int atc_get_llis_residue(struct at_dma_chan *atchan,
 				struct at_desc *desc, u32 *residue)
  * @chan: DMA channel
  * @cookie: transaction identifier to check status of
  * @residue: residue to be updated.
- * Return 0 on success, -errono otherwise.
+ *
+ * Return: %0 on success, -errno otherwise.
  */
 static int atc_get_residue(struct dma_chan *chan, dma_cookie_t cookie,
 			   u32 *residue)
  * atc_alloc_chan_resources - allocate resources for DMA channel
  * @chan: allocate descriptor resources for this channel
  *
- * return - the number of allocated descriptors
+ * Return: the number of allocated descriptors
  */
 static int atc_alloc_chan_resources(struct dma_chan *chan)
 {

drivers/dma/fsl-dpaa2-qdma/dpaa2-qdma.c+6−4

 	if (!dpaa2_chan->fd_pool)
 		goto err;
-	dpaa2_chan->fl_pool = dma_pool_create("fl_pool", dev,
+	dpaa2_chan->fl_pool =
-					      sizeof(struct dpaa2_fl_entry),
+		dma_pool_create("fl_pool", dev,
-					      sizeof(struct dpaa2_fl_entry), 0);
+				 sizeof(struct dpaa2_fl_entry) * 3,
+				 sizeof(struct dpaa2_fl_entry), 0);
 	if (!dpaa2_chan->fl_pool)
 		goto err_fd;
 	dpaa2_chan->sdd_pool =
 		dma_pool_create("sdd_pool", dev,
-				sizeof(struct dpaa2_qdma_sd_d),
+				sizeof(struct dpaa2_qdma_sd_d) * 2,
 				sizeof(struct dpaa2_qdma_sd_d), 0);
 	if (!dpaa2_chan->sdd_pool)
 		goto err_fl;

drivers/dma/fsl-qdma.c+12−21

@@ -514,11 +514,11 @@ static struct fsl_qdma_queue · 513 unmodified lines
514	queue_temp = queue_head + i + (j * queue_num);	514	queue_temp = queue_head + i + (j * queue_num);
515		515
516	queue_temp->cq =	516	queue_temp->cq =
517	dma_alloc_coherent(&pdev->dev,	517	dmam_alloc_coherent(&pdev->dev,
518	sizeof(struct fsl_qdma_format) *	518	sizeof(struct fsl_qdma_format) *
519	queue_size[i],	519	queue_size[i],
520	&queue_temp->bus_addr,	520	&queue_temp->bus_addr,
521	GFP_KERNEL);	521	GFP_KERNEL);
522	if (!queue_temp->cq)	522	if (!queue_temp->cq)
523	return NULL;	523	return NULL;
524	queue_temp->block_base = fsl_qdma->block_base +	524	queue_temp->block_base = fsl_qdma->block_base +
@@ -563,15 +563,14 @@ static struct fsl_qdma_queue · 38 unmodified lines
563	/*	563	/*
564	* Buffer for queue command	564	* Buffer for queue command
565	*/	565	*/
566	status_head->cq = dma_alloc_coherent(&pdev->dev,	566	status_head->cq = dmam_alloc_coherent(&pdev->dev,
567	sizeof(struct fsl_qdma_format) *	567	sizeof(struct fsl_qdma_format) *
568	status_size,	568	status_size,
569	&status_head->bus_addr,	569	&status_head->bus_addr,
570	GFP_KERNEL);	570	GFP_KERNEL);
571	if (!status_head->cq) {	571	if (!status_head->cq)
572	devm_kfree(&pdev->dev, status_head);
573	return NULL;	572	return NULL;
574	}	573
575	status_head->n_cq = status_size;	574	status_head->n_cq = status_size;
576	status_head->virt_head = status_head->cq;	575	status_head->virt_head = status_head->cq;
577	status_head->virt_tail = status_head->cq;	576	status_head->virt_tail = status_head->cq;
@@ -1268,8 +1267,6 @@ static void fsl_qdma_cleanup_vchan(struct dma_device *dmadev) · 690 unmodified lines
1268		1267
1269	static void fsl_qdma_remove(struct platform_device *pdev)	1268	static void fsl_qdma_remove(struct platform_device *pdev)
1270	{	1269	{
1271	int i;
1272	struct fsl_qdma_queue *status;
1273	struct device_node *np = pdev->dev.of_node;	1270	struct device_node *np = pdev->dev.of_node;
1274	struct fsl_qdma_engine *fsl_qdma = platform_get_drvdata(pdev);	1271	struct fsl_qdma_engine *fsl_qdma = platform_get_drvdata(pdev);
1275		1272
@@ -1277,12 +1274,6 @@ static void fsl_qdma_remove(struct platform_device *pdev) · 1 unmodified line
1277	fsl_qdma_cleanup_vchan(&fsl_qdma->dma_dev);	1274	fsl_qdma_cleanup_vchan(&fsl_qdma->dma_dev);
1278	of_dma_controller_free(np);	1275	of_dma_controller_free(np);
1279	dma_async_device_unregister(&fsl_qdma->dma_dev);	1276	dma_async_device_unregister(&fsl_qdma->dma_dev);
1280
1281	for (i = 0; i < fsl_qdma->block_number; i++) {
1282	status = fsl_qdma->status[i];
1283	dma_free_coherent(&pdev->dev, sizeof(struct fsl_qdma_format) *
1284	status->n_cq, status->cq, status->bus_addr);
1285	}
1286	}	1277	}
1287		1278
1288	static const struct of_device_id fsl_qdma_dt_ids[] = {	1279	static const struct of_device_id fsl_qdma_dt_ids[] = {

drivers/dma/ti/edma.c+10−0

 	if (irq > 0) {
 		irq_name = devm_kasprintf(dev, GFP_KERNEL, "%s_ccint",
 					  dev_name(dev));
+		if (!irq_name) {
+			ret = -ENOMEM;
+			goto err_disable_pm;
+		}
 		ret = devm_request_irq(dev, irq, dma_irq_handler, 0, irq_name,
 				       ecc);
 		if (ret) {
 	if (irq > 0) {
 		irq_name = devm_kasprintf(dev, GFP_KERNEL, "%s_ccerrint",
 					  dev_name(dev));
+		if (!irq_name) {
+			ret = -ENOMEM;
+			goto err_disable_pm;
+		}
 		ret = devm_request_irq(dev, irq, dma_ccerr_handler, 0, irq_name,
 				       ecc);
 		if (ret) {

drivers/dma/ti/k3-udma.c+8−2

 {
 	struct udma_chan *uc = to_udma_chan(&vc->chan);
 	struct udma_desc *d;
+	u8 status;
 	if (!vd)
 		return;
 	if (d->metadata_size)
 		udma_fetch_epib(uc, d);
-	/* Provide residue information for the client */
 	if (result) {
 		void *desc_vaddr = udma_curr_cppi5_desc_vaddr(d, d->desc_idx);
 		if (cppi5_desc_get_type(desc_vaddr) ==
 		    CPPI5_INFO0_DESC_TYPE_VAL_HOST) {
+			/* Provide residue information for the client */
 			result->residue = d->residue -
 					  cppi5_hdesc_get_pktlen(desc_vaddr);
 			if (result->residue)
 				result->result = DMA_TRANS_NOERROR;
 		} else {
 			result->residue = 0;
-			result->result = DMA_TRANS_NOERROR;
+			/* Propagate TR Response errors to the client */
+			status = d->hwdesc[0].tr_resp_base->status;
+			if (status)
+				result->result = DMA_TRANS_ABORTED;
+			else
+				result->result = DMA_TRANS_NOERROR;
 		}
 	}
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c+21−11

 static const struct drm_client_funcs kfd_client_funcs = {
 	.unregister	= drm_client_release,
 };
+int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev)
+{
+	int ret;
+	if (!adev->kfd.init_complete)
+		return 0;
+	ret = drm_client_init(&adev->ddev, &adev->kfd.client, "kfd",
+			      &kfd_client_funcs);
+	if (ret) {
+		dev_err(adev->dev, "Failed to init DRM client: %d\n",
+			ret);
+		return ret;
+	}
+	drm_client_register(&adev->kfd.client);
+	return 0;
+}
 void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
 {
 	int i;
 	int last_valid_bit;
-	int ret;
 	amdgpu_amdkfd_gpuvm_init_mem_limits();
 			.enable_mes = adev->enable_mes,
 		};
-		ret = drm_client_init(&adev->ddev, &adev->kfd.client, "kfd", &kfd_client_funcs);
-		if (ret) {
-			dev_err(adev->dev, "Failed to init DRM client: %d\n", ret);
-			return;
-		}
 		/* this is going to have a few of the MSBs set that we need to
 		 * clear
 		 */
 		adev->kfd.init_complete = kgd2kfd_device_init(adev->kfd.dev,
 							&gpu_resources);
-		if (adev->kfd.init_complete)
-			drm_client_register(&adev->kfd.client);
-		else
-			drm_client_release(&adev->kfd.client);
 		amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h+3−1

 struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context,
 				struct mm_struct *mm,
 				struct svm_range_bo *svm_bo);
+int amdgpu_amdkfd_drm_client_create(struct amdgpu_device *adev);
 #if defined(CONFIG_DEBUG_FS)
 int kfd_debugfs_kfd_mem_limits(struct seq_file *m, void *data);
 #endif
 					  struct kgd_mem *mem, void *drm_priv);
 int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
 		struct amdgpu_device *adev, struct kgd_mem *mem, void *drm_priv);
-void amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv);
+int amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv);
 int amdgpu_amdkfd_gpuvm_sync_memory(
 		struct amdgpu_device *adev, struct kgd_mem *mem, bool intr);
 int amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(struct kgd_mem *mem,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c+1−1

@@ -290,7 +290,7 @@ static int suspend_resume_compute_scheduler(struct amdgpu_device *adev, bool sus · 289 unmodified lines
290	for (i = 0; i < adev->gfx.num_compute_rings; i++) {	290	for (i = 0; i < adev->gfx.num_compute_rings; i++) {
291	struct amdgpu_ring *ring = &adev->gfx.compute_ring[i];	291	struct amdgpu_ring *ring = &adev->gfx.compute_ring[i];
292		292
293	if (!(ring && drm_sched_wqueue_ready(&ring->sched)))	293	if (!amdgpu_ring_sched_ready(ring))
294	continue;	294	continue;
295		295
296	/* stop secheduler and drain ring. */	296	/* stop secheduler and drain ring. */

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c+17−3

 	return ret;
 }
-void amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv)
+int amdgpu_amdkfd_gpuvm_dmaunmap_mem(struct kgd_mem *mem, void *drm_priv)
 {
 	struct kfd_mem_attachment *entry;
 	struct amdgpu_vm *vm;
+	int ret;
 	vm = drm_priv_to_vm(drm_priv);
 	mutex_lock(&mem->lock);
+	ret = amdgpu_bo_reserve(mem->bo, true);
+	if (ret)
+		goto out;
 	list_for_each_entry(entry, &mem->attachments, list) {
-		if (entry->bo_va->base.vm == vm)
+		if (entry->bo_va->base.vm != vm)
-			kfd_mem_dmaunmap_attachment(mem, entry);
+			continue;
+		if (entry->bo_va->base.bo->tbo.ttm &&
+		    !entry->bo_va->base.bo->tbo.ttm->sg)
+			continue;
+		kfd_mem_dmaunmap_attachment(mem, entry);
 	}
+	amdgpu_bo_unreserve(mem->bo);
+out:
 	mutex_unlock(&mem->lock);
+	return ret;
 }
 int amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c+4−4

@@ -1678,7 +1678,7 @@ static int amdgpu_debugfs_test_ib_show(struct seq_file m, void unused) · 1677 unmodified lines
1678	for (i = 0; i < AMDGPU_MAX_RINGS; i++) {	1678	for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
1679	struct amdgpu_ring *ring = adev->rings[i];	1679	struct amdgpu_ring *ring = adev->rings[i];
1680		1680
1681	if (!ring \|\| !drm_sched_wqueue_ready(&ring->sched))	1681	if (!amdgpu_ring_sched_ready(ring))
1682	continue;	1682	continue;
1683	drm_sched_wqueue_stop(&ring->sched);	1683	drm_sched_wqueue_stop(&ring->sched);
1684	}	1684	}
@@ -1694,7 +1694,7 @@ static int amdgpu_debugfs_test_ib_show(struct seq_file m, void unused) · 9 unmodified lines
1694	for (i = 0; i < AMDGPU_MAX_RINGS; i++) {	1694	for (i = 0; i < AMDGPU_MAX_RINGS; i++) {
1695	struct amdgpu_ring *ring = adev->rings[i];	1695	struct amdgpu_ring *ring = adev->rings[i];
1696		1696
1697	if (!ring \|\| !drm_sched_wqueue_ready(&ring->sched))	1697	if (!amdgpu_ring_sched_ready(ring))
1698	continue;	1698	continue;
1699	drm_sched_wqueue_start(&ring->sched);	1699	drm_sched_wqueue_start(&ring->sched);
1700	}	1700	}
@@ -1916,8 +1916,8 @@ static int amdgpu_debugfs_ib_preempt(void *data, u64 val) · 215 unmodified lines
1916		1916
1917	ring = adev->rings[val];	1917	ring = adev->rings[val];
1918		1918
1919	if (!ring \|\| !ring->funcs->preempt_ib \|\|	1919	if (!amdgpu_ring_sched_ready(ring) \|\|
1920	!drm_sched_wqueue_ready(&ring->sched))	1920	!ring->funcs->preempt_ib)
1921	return -EINVAL;	1921	return -EINVAL;
1922		1922
1923	/* the last preemption failed */	1923	/* the last preemption failed */

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+13−23

 				}
 			}
 		} else {
-			switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
+			tmp = amdgpu_reset_method;
-			case IP_VERSION(13, 0, 0):
+			/* It should do a default reset when loading or reloading the driver,
-			case IP_VERSION(13, 0, 7):
+			 * regardless of the module parameter reset_method.
-			case IP_VERSION(13, 0, 10):
+			 */
-				r = psp_gpu_reset(adev);
+			amdgpu_reset_method = AMD_RESET_METHOD_NONE;
-				break;
+			r = amdgpu_asic_reset(adev);
-			default:
+			amdgpu_reset_method = tmp;
-				tmp = amdgpu_reset_method;
-				/* It should do a default reset when loading or reloading the driver,
-				 * regardless of the module parameter reset_method.
-				 */
-				amdgpu_reset_method = AMD_RESET_METHOD_NONE;
-				r = amdgpu_asic_reset(adev);
-				amdgpu_reset_method = tmp;
-				break;
-			}
 			if (r) {
 				dev_err(adev->dev, "asic reset on init failed\n");
 				goto failed;
 	for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
 		struct amdgpu_ring *ring = adev->rings[i];
-		if (!ring || !drm_sched_wqueue_ready(&ring->sched))
+		if (!amdgpu_ring_sched_ready(ring))
 			continue;
 		spin_lock(&ring->sched.job_list_lock);
 	for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
 		struct amdgpu_ring *ring = adev->rings[i];
-		if (!ring || !drm_sched_wqueue_ready(&ring->sched))
+		if (!amdgpu_ring_sched_ready(ring))
 			continue;
 		/* Clear job fence from fence drv to avoid force_completion
 		for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
 			struct amdgpu_ring *ring = tmp_adev->rings[i];
-			if (!ring || !drm_sched_wqueue_ready(&ring->sched))
+			if (!amdgpu_ring_sched_ready(ring))
 				continue;
 			drm_sched_stop(&ring->sched, job ? &job->base : NULL);
 		for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
 			struct amdgpu_ring *ring = tmp_adev->rings[i];
-			if (!ring || !drm_sched_wqueue_ready(&ring->sched))
+			if (!amdgpu_ring_sched_ready(ring))
 				continue;
 			drm_sched_start(&ring->sched, true);
 		for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
 			struct amdgpu_ring *ring = adev->rings[i];
-			if (!ring || !drm_sched_wqueue_ready(&ring->sched))
+			if (!amdgpu_ring_sched_ready(ring))
 				continue;
 			drm_sched_stop(&ring->sched, NULL);
 	for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
 		struct amdgpu_ring *ring = adev->rings[i];
-		if (!ring || !drm_sched_wqueue_ready(&ring->sched))
+		if (!amdgpu_ring_sched_ready(ring))
 			continue;
 		drm_sched_start(&ring->sched, true);

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+4−0

 	if (ret)
 		goto err_pci;
+	ret = amdgpu_amdkfd_drm_client_create(adev);
+	if (ret)
+		goto err_pci;
 	/*
 	 * 1. don't init fbdev on hw without DCE
 	 * 2. don't init fbdev if there are no connectors

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c+12−0

@@ -635,6 +635,7 @@ int amdgpu_ring_test_helper(struct amdgpu_ring *ring) · 634 unmodified lines
635	ring->name);	635	ring->name);
636		636
637	ring->sched.ready = !r;	637	ring->sched.ready = !r;
		638
638	return r;	639	return r;
639	}	640	}
640		641
@@ -717,3 +718,14 @@ void amdgpu_ring_ib_on_emit_de(struct amdgpu_ring *ring) · 76 unmodified lines
717	if (ring->is_sw_ring)	718	if (ring->is_sw_ring)
718	amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_DE);	719	amdgpu_sw_ring_ib_mark_offset(ring, AMDGPU_MUX_OFFSET_TYPE_DE);
719	}	720	}
		721
		722	bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring)
		723	{
		724	if (!ring)
		725	return false;
		726
		727	if (ring->no_scheduler \|\| !drm_sched_wqueue_ready(&ring->sched))
		728	return false;
		729
		730	return true;
		731	}

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h+1−1

@@ -450,5 +450,5 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, · 449 unmodified lines
450	int amdgpu_ib_pool_init(struct amdgpu_device *adev);	450	int amdgpu_ib_pool_init(struct amdgpu_device *adev);
451	void amdgpu_ib_pool_fini(struct amdgpu_device *adev);	451	void amdgpu_ib_pool_fini(struct amdgpu_device *adev);
452	int amdgpu_ib_ring_tests(struct amdgpu_device *adev);	452	int amdgpu_ib_ring_tests(struct amdgpu_device *adev);
453		453	bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring);
454	#endif	454	#endif

drivers/gpu/drm/amd/amdgpu/cik_ih.c+6−0

 		tmp = RREG32(mmIH_RB_CNTL);
 		tmp |= IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK;
 		WREG32(mmIH_RB_CNTL, tmp);
+		/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+		 * can be detected.
+		 */
+		tmp &= ~IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK;
+		WREG32(mmIH_RB_CNTL, tmp);
 	}
 	return (wptr & ih->ptr_mask);
 }

drivers/gpu/drm/amd/amdgpu/cz_ih.c+5−0

 	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
 	WREG32(mmIH_RB_CNTL, tmp);
+	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+	 * can be detected.
+	 */
+	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
+	WREG32(mmIH_RB_CNTL, tmp);
 out:
 	return (wptr & ih->ptr_mask);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+0−2

@@ -4027,8 +4027,6 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev) · 4026 unmodified lines
4027	err = 0;	4027	err = 0;
4028	adev->gfx.mec2_fw = NULL;	4028	adev->gfx.mec2_fw = NULL;
4029	}	4029	}
4030	amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2);
4031	amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_MEC2_JT);
4032		4030
4033	gfx_v10_0_check_fw_write_wait(adev);	4031	gfx_v10_0_check_fw_write_wait(adev);
4034	out:	4032	out:

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c+0−22

@@ -107,23 +107,6 @@ static const struct soc15_reg_golden golden_settings_gc_11_0_1[] = · 106 unmodified lines
107	SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL2, 0xfcffffff, 0x0000000a)	107	SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL2, 0xfcffffff, 0x0000000a)
108	};	108	};
109		109
110	static const struct soc15_reg_golden golden_settings_gc_11_5_0[] = {
111	SOC15_REG_GOLDEN_VALUE(GC, 0, regDB_DEBUG5, 0xffffffff, 0x00000800),
112	SOC15_REG_GOLDEN_VALUE(GC, 0, regGB_ADDR_CONFIG, 0x0c1807ff, 0x00000242),
113	SOC15_REG_GOLDEN_VALUE(GC, 0, regGCR_GENERAL_CNTL, 0x1ff1ffff, 0x00000500),
114	SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2A_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),
115	SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_ADDR_MATCH_MASK, 0xffffffff, 0xfffffff3),
116	SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL, 0xffffffff, 0xf37fff3f),
117	SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL3, 0xfffffffb, 0x00f40188),
118	SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL4, 0xf0ffffff, 0x80009007),
119	SOC15_REG_GOLDEN_VALUE(GC, 0, regPA_CL_ENHANCE, 0xf1ffffff, 0x00880007),
120	SOC15_REG_GOLDEN_VALUE(GC, 0, regPC_CONFIG_CNTL_1, 0xffffffff, 0x00010000),
121	SOC15_REG_GOLDEN_VALUE(GC, 0, regTA_CNTL_AUX, 0xf7f7ffff, 0x01030000),
122	SOC15_REG_GOLDEN_VALUE(GC, 0, regTA_CNTL2, 0x007f0000, 0x00000000),
123	SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL2, 0xffcfffff, 0x0000200a),
124	SOC15_REG_GOLDEN_VALUE(GC, 0, regUTCL1_CTRL_2, 0xffffffff, 0x0000048f)
125	};
126
127	#define DEFAULT_SH_MEM_CONFIG \	110	#define DEFAULT_SH_MEM_CONFIG \
128	((SH_MEM_ADDRESS_MODE_64 << SH_MEM_CONFIG__ADDRESS_MODE__SHIFT) \| \	111	((SH_MEM_ADDRESS_MODE_64 << SH_MEM_CONFIG__ADDRESS_MODE__SHIFT) \| \
129	(SH_MEM_ALIGNMENT_MODE_UNALIGNED << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) \| \	112	(SH_MEM_ALIGNMENT_MODE_UNALIGNED << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) \| \
@@ -304,11 +287,6 @@ static void gfx_v11_0_init_golden_registers(struct amdgpu_device *adev) · 174 unmodified lines
304	golden_settings_gc_11_0_1,	287	golden_settings_gc_11_0_1,
305	(const u32)ARRAY_SIZE(golden_settings_gc_11_0_1));	288	(const u32)ARRAY_SIZE(golden_settings_gc_11_0_1));
306	break;	289	break;
307	case IP_VERSION(11, 5, 0):
308	soc15_program_register_sequence(adev,
309	golden_settings_gc_11_5_0,
310	(const u32)ARRAY_SIZE(golden_settings_gc_11_5_0));
311	break;
312	default:	290	default:
313	break;	291	break;
314	}	292	}

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c+2−2

@@ -915,8 +915,8 @@ static int gmc_v6_0_hw_init(void *handle) · 914 unmodified lines
915		915
916	if (amdgpu_emu_mode == 1)	916	if (amdgpu_emu_mode == 1)
917	return amdgpu_gmc_vram_checking(adev);	917	return amdgpu_gmc_vram_checking(adev);
918	else	918
919	return r;	919	return 0;
920	}	920	}
921		921
922	static int gmc_v6_0_hw_fini(void *handle)	922	static int gmc_v6_0_hw_fini(void *handle)

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c+2−2

@@ -1099,8 +1099,8 @@ static int gmc_v7_0_hw_init(void *handle) · 1098 unmodified lines
1099		1099
1100	if (amdgpu_emu_mode == 1)	1100	if (amdgpu_emu_mode == 1)
1101	return amdgpu_gmc_vram_checking(adev);	1101	return amdgpu_gmc_vram_checking(adev);
1102	else	1102
1103	return r;	1103	return 0;
1104	}	1104	}
1105		1105
1106	static int gmc_v7_0_hw_fini(void *handle)	1106	static int gmc_v7_0_hw_fini(void *handle)

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c+2−2

@@ -1219,8 +1219,8 @@ static int gmc_v8_0_hw_init(void *handle) · 1218 unmodified lines
1219		1219
1220	if (amdgpu_emu_mode == 1)	1220	if (amdgpu_emu_mode == 1)
1221	return amdgpu_gmc_vram_checking(adev);	1221	return amdgpu_gmc_vram_checking(adev);
1222	else	1222
1223	return r;	1223	return 0;
1224	}	1224	}
1225		1225
1226	static int gmc_v8_0_hw_fini(void *handle)	1226	static int gmc_v8_0_hw_fini(void *handle)

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c+2−2

@@ -2341,8 +2341,8 @@ static int gmc_v9_0_hw_init(void *handle) · 2340 unmodified lines
2341		2341
2342	if (amdgpu_emu_mode == 1)	2342	if (amdgpu_emu_mode == 1)
2343	return amdgpu_gmc_vram_checking(adev);	2343	return amdgpu_gmc_vram_checking(adev);
2344	else	2344
2345	return r;	2345	return 0;
2346	}	2346	}
2347		2347
2348	/**	2348	/**

drivers/gpu/drm/amd/amdgpu/iceland_ih.c+5−0

 	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
 	WREG32(mmIH_RB_CNTL, tmp);
+	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+	 * can be detected.
+	 */
+	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
+	WREG32(mmIH_RB_CNTL, tmp);
 out:
 	return (wptr & ih->ptr_mask);

drivers/gpu/drm/amd/amdgpu/ih_v6_0.c+6−0

 	tmp = RREG32_NO_KIQ(ih_regs->ih_rb_cntl);
 	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
 	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
+	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+	 * can be detected.
+	 */
+	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
+	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
 out:
 	return (wptr & ih->ptr_mask);
 }

drivers/gpu/drm/amd/amdgpu/ih_v6_1.c+7−0

@@ -418,6 +418,13 @@ static u32 ih_v6_1_get_wptr(struct amdgpu_device *adev, · 417 unmodified lines
418	tmp = RREG32_NO_KIQ(ih_regs->ih_rb_cntl);	418	tmp = RREG32_NO_KIQ(ih_regs->ih_rb_cntl);
419	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);	419	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
420	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);	420	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
		421
		422	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
		423	* can be detected.
		424	*/
		425	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
		426	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
		427
421	out:	428	out:
422	return (wptr & ih->ptr_mask);	429	return (wptr & ih->ptr_mask);
423	}	430	}

drivers/gpu/drm/amd/amdgpu/navi10_ih.c+6−0

 	tmp = RREG32_NO_KIQ(ih_regs->ih_rb_cntl);
 	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
 	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
+	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+	 * can be detected.
+	 */
+	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
+	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
 out:
 	return (wptr & ih->ptr_mask);
 }

drivers/gpu/drm/amd/amdgpu/si_ih.c+6−0

 		tmp = RREG32(IH_RB_CNTL);
 		tmp |= IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK;
 		WREG32(IH_RB_CNTL, tmp);
+		/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+		 * can be detected.
+		 */
+		tmp &= ~IH_RB_CNTL__WPTR_OVERFLOW_CLEAR_MASK;
+		WREG32(IH_RB_CNTL, tmp);
 	}
 	return (wptr & ih->ptr_mask);
 }

drivers/gpu/drm/amd/amdgpu/tonga_ih.c+6−0

 	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
 	WREG32(mmIH_RB_CNTL, tmp);
+	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+	 * can be detected.
+	 */
+	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
+	WREG32(mmIH_RB_CNTL, tmp);
 out:
 	return (wptr & ih->ptr_mask);
 }

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c+0−17

@@ -2017,22 +2017,6 @@ static int vcn_v4_0_set_powergating_state(void *handle, enum amd_powergating_sta · 2016 unmodified lines
2017	return ret;	2017	return ret;
2018	}	2018	}
2019		2019
2020	/**
2021	* vcn_v4_0_set_interrupt_state - set VCN block interrupt state
2022	*
2023	* @adev: amdgpu_device pointer
2024	* @source: interrupt sources
2025	* @type: interrupt types
2026	* @state: interrupt states
2027	*
2028	* Set VCN block interrupt state
2029	*/
2030	static int vcn_v4_0_set_interrupt_state(struct amdgpu_device adev, struct amdgpu_irq_src source,
2031	unsigned type, enum amdgpu_interrupt_state state)
2032	{
2033	return 0;
2034	}
2035
2036	/**	2020	/**
2037	* vcn_v4_0_set_ras_interrupt_state - set VCN block RAS interrupt state	2021	* vcn_v4_0_set_ras_interrupt_state - set VCN block RAS interrupt state
2038	*	2022	*
@@ -2097,7 +2081,6 @@ static int vcn_v4_0_process_interrupt(struct amdgpu_device *adev, struct amdgpu_ · 58 unmodified lines
2097	}	2081	}
2098		2082
2099	static const struct amdgpu_irq_src_funcs vcn_v4_0_irq_funcs = {	2083	static const struct amdgpu_irq_src_funcs vcn_v4_0_irq_funcs = {
2100	.set = vcn_v4_0_set_interrupt_state,
2101	.process = vcn_v4_0_process_interrupt,	2084	.process = vcn_v4_0_process_interrupt,
2102	};	2085	};
2103		2086

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c+0−19

@@ -269,8 +269,6 @@ static int vcn_v4_0_5_hw_fini(void *handle) · 268 unmodified lines
269	vcn_v4_0_5_set_powergating_state(adev, AMD_PG_STATE_GATE);	269	vcn_v4_0_5_set_powergating_state(adev, AMD_PG_STATE_GATE);
270	}	270	}
271	}	271	}
272
273	amdgpu_irq_put(adev, &adev->vcn.inst[i].irq, 0);
274	}	272	}
275		273
276	return 0;	274	return 0;
@@ -1668,22 +1666,6 @@ static int vcn_v4_0_5_set_powergating_state(void *handle, enum amd_powergating_s · 1391 unmodified lines
1668	return ret;	1666	return ret;
1669	}	1667	}
1670		1668
1671	/**
1672	* vcn_v4_0_5_set_interrupt_state - set VCN block interrupt state
1673	*
1674	* @adev: amdgpu_device pointer
1675	* @source: interrupt sources
1676	* @type: interrupt types
1677	* @state: interrupt states
1678	*
1679	* Set VCN block interrupt state
1680	*/
1681	static int vcn_v4_0_5_set_interrupt_state(struct amdgpu_device adev, struct amdgpu_irq_src source,
1682	unsigned type, enum amdgpu_interrupt_state state)
1683	{
1684	return 0;
1685	}
1686
1687	/**	1669	/**
1688	* vcn_v4_0_5_process_interrupt - process VCN block interrupt	1670	* vcn_v4_0_5_process_interrupt - process VCN block interrupt
1689	*	1671	*
@@ -1726,7 +1708,6 @@ static int vcn_v4_0_5_process_interrupt(struct amdgpu_device *adev, struct amdgp · 36 unmodified lines
1726	}	1708	}
1727		1709
1728	static const struct amdgpu_irq_src_funcs vcn_v4_0_5_irq_funcs = {	1710	static const struct amdgpu_irq_src_funcs vcn_v4_0_5_irq_funcs = {
1729	.set = vcn_v4_0_5_set_interrupt_state,
1730	.process = vcn_v4_0_5_process_interrupt,	1711	.process = vcn_v4_0_5_process_interrupt,
1731	};	1712	};
1732		1713

drivers/gpu/drm/amd/amdgpu/vega10_ih.c+6−0

 	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
 	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
+	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+	 * can be detected.
+	 */
+	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
+	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
 out:
 	return (wptr & ih->ptr_mask);
 }

drivers/gpu/drm/amd/amdgpu/vega20_ih.c+6−0

 	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1);
 	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
+	/* Unset the CLEAR_OVERFLOW bit immediately so new overflows
+	 * can be detected.
+	 */
+	tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 0);
+	WREG32_NO_KIQ(ih_regs->ih_rb_cntl, tmp);
 out:
 	return (wptr & ih->ptr_mask);
 }

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h+7−7

@@ -674,7 +674,7 @@ static const uint32_t cwsr_trap_gfx9_hex[] = { · 673 unmodified lines
674	0x86ea6a6a, 0x8f6e837a,	674	0x86ea6a6a, 0x8f6e837a,
675	0xb96ee0c2, 0xbf800002,	675	0xb96ee0c2, 0xbf800002,
676	0xb97a0002, 0xbf8a0000,	676	0xb97a0002, 0xbf8a0000,
677	0xbe801f6c, 0xbf810000,	677	0xbe801f6c, 0xbf9b0000,
678	};	678	};
679		679
680	static const uint32_t cwsr_trap_nv1x_hex[] = {	680	static const uint32_t cwsr_trap_nv1x_hex[] = {
@@ -1091,7 +1091,7 @@ static const uint32_t cwsr_trap_nv1x_hex[] = { · 410 unmodified lines
1091	0xb9eef807, 0x876dff6d,	1091	0xb9eef807, 0x876dff6d,
1092	0x0000ffff, 0x87fe7e7e,	1092	0x0000ffff, 0x87fe7e7e,
1093	0x87ea6a6a, 0xb9faf802,	1093	0x87ea6a6a, 0xb9faf802,
1094	0xbe80226c, 0xbf810000,	1094	0xbe80226c, 0xbf9b0000,
1095	0xbf9f0000, 0xbf9f0000,	1095	0xbf9f0000, 0xbf9f0000,
1096	0xbf9f0000, 0xbf9f0000,	1096	0xbf9f0000, 0xbf9f0000,
1097	0xbf9f0000, 0x00000000,	1097	0xbf9f0000, 0x00000000,
@@ -1574,7 +1574,7 @@ static const uint32_t cwsr_trap_arcturus_hex[] = { · 476 unmodified lines
1574	0x86ea6a6a, 0x8f6e837a,	1574	0x86ea6a6a, 0x8f6e837a,
1575	0xb96ee0c2, 0xbf800002,	1575	0xb96ee0c2, 0xbf800002,
1576	0xb97a0002, 0xbf8a0000,	1576	0xb97a0002, 0xbf8a0000,
1577	0xbe801f6c, 0xbf810000,	1577	0xbe801f6c, 0xbf9b0000,
1578	};	1578	};
1579		1579
1580	static const uint32_t cwsr_trap_aldebaran_hex[] = {	1580	static const uint32_t cwsr_trap_aldebaran_hex[] = {
@@ -2065,7 +2065,7 @@ static const uint32_t cwsr_trap_aldebaran_hex[] = { · 484 unmodified lines
2065	0x86ea6a6a, 0x8f6e837a,	2065	0x86ea6a6a, 0x8f6e837a,
2066	0xb96ee0c2, 0xbf800002,	2066	0xb96ee0c2, 0xbf800002,
2067	0xb97a0002, 0xbf8a0000,	2067	0xb97a0002, 0xbf8a0000,
2068	0xbe801f6c, 0xbf810000,	2068	0xbe801f6c, 0xbf9b0000,
2069	};	2069	};
2070		2070
2071	static const uint32_t cwsr_trap_gfx10_hex[] = {	2071	static const uint32_t cwsr_trap_gfx10_hex[] = {
@@ -2500,7 +2500,7 @@ static const uint32_t cwsr_trap_gfx10_hex[] = { · 428 unmodified lines
2500	0x876dff6d, 0x0000ffff,	2500	0x876dff6d, 0x0000ffff,
2501	0x87fe7e7e, 0x87ea6a6a,	2501	0x87fe7e7e, 0x87ea6a6a,
2502	0xb9faf802, 0xbe80226c,	2502	0xb9faf802, 0xbe80226c,
2503	0xbf810000, 0xbf9f0000,	2503	0xbf9b0000, 0xbf9f0000,
2504	0xbf9f0000, 0xbf9f0000,	2504	0xbf9f0000, 0xbf9f0000,
2505	0xbf9f0000, 0xbf9f0000,	2505	0xbf9f0000, 0xbf9f0000,
2506	};	2506	};
@@ -2944,7 +2944,7 @@ static const uint32_t cwsr_trap_gfx11_hex[] = { · 437 unmodified lines
2944	0xb8eef802, 0xbf0d866e,	2944	0xb8eef802, 0xbf0d866e,
2945	0xbfa20002, 0xb97af802,	2945	0xbfa20002, 0xb97af802,
2946	0xbe80486c, 0xb97af802,	2946	0xbe80486c, 0xb97af802,
2947	0xbe804a6c, 0xbfb00000,	2947	0xbe804a6c, 0xbfb10000,
2948	0xbf9f0000, 0xbf9f0000,	2948	0xbf9f0000, 0xbf9f0000,
2949	0xbf9f0000, 0xbf9f0000,	2949	0xbf9f0000, 0xbf9f0000,
2950	0xbf9f0000, 0x00000000,	2950	0xbf9f0000, 0x00000000,
@@ -3436,5 +3436,5 @@ static const uint32_t cwsr_trap_gfx9_4_3_hex[] = { · 485 unmodified lines
3436	0x86ea6a6a, 0x8f6e837a,	3436	0x86ea6a6a, 0x8f6e837a,
3437	0xb96ee0c2, 0xbf800002,	3437	0xb96ee0c2, 0xbf800002,
3438	0xb97a0002, 0xbf8a0000,	3438	0xb97a0002, 0xbf8a0000,
3439	0xbe801f6c, 0xbf810000,	3439	0xbe801f6c, 0xbf9b0000,
3440	};	3440	};

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm+1−1

@@ -1104,7 +1104,7 @@ L_RETURN_WITHOUT_PRIV: · 1103 unmodified lines
1104	s_rfe_b64 s_restore_pc_lo //Return to the main shader program and resume execution	1104	s_rfe_b64 s_restore_pc_lo //Return to the main shader program and resume execution
1105		1105
1106	L_END_PGM:	1106	L_END_PGM:
1107	s_endpgm	1107	s_endpgm_saved
1108	end	1108	end
1109		1109
1110	function write_hwreg_to_mem(s, s_rsrc, s_mem_offset)	1110	function write_hwreg_to_mem(s, s_rsrc, s_mem_offset)

drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx9.asm+1−1

@@ -921,7 +921,7 @@ L_RESTORE: · 920 unmodified lines
921	/* the END */	921	/* the END */
922	/**************************************************************************/	922	/**************************************************************************/
923	L_END_PGM:	923	L_END_PGM:
924	s_endpgm	924	s_endpgm_saved
925		925
926	end	926	end
927		927

drivers/gpu/drm/amd/amdkfd/kfd_chardev.c+3−1

@@ -1442,7 +1442,9 @@ static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep, · 1441 unmodified lines
1442	kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT);	1442	kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT);
1443		1443
1444	/* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */	1444	/* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */
1445	amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv);	1445	err = amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv);
		1446	if (err)
		1447	goto sync_memory_failed;
1446	}	1448	}
1447		1449
1448	mutex_unlock(&p->mutex);	1450	mutex_unlock(&p->mutex);

drivers/gpu/drm/amd/amdkfd/kfd_migrate.c+1−1

@@ -574,7 +574,7 @@ svm_migrate_copy_to_ram(struct amdgpu_device adev, struct svm_range prange, · 573 unmodified lines
574	pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, prange->start,	574	pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, prange->start,
575	prange->last);	575	prange->last);
576		576
577	addr = prange->start << PAGE_SHIFT;	577	addr = migrate->start;
578		578
579	src = (uint64_t *)(scratch + npages);	579	src = (uint64_t *)(scratch + npages);
580	dst = scratch;	580	dst = scratch;

drivers/gpu/drm/amd/amdkfd/kfd_priv.h+7−2

 /* Cgroup Support */
 /* Check with device cgroup if @kfd device is accessible */
-static inline int kfd_devcgroup_check_permission(struct kfd_node *kfd)
+static inline int kfd_devcgroup_check_permission(struct kfd_node *node)
 {
 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF)
-	struct drm_device *ddev = adev_to_drm(kfd->adev);
+	struct drm_device *ddev;
+	if (node->xcp)
+		ddev = node->xcp->ddev;
+	else
+		ddev = adev_to_drm(node->adev);
 	return devcgroup_check_permission(DEVCG_DEV_CHAR, DRM_MAJOR,
 					  ddev->render->index,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+4−0

 		 * To fix this, DC should permit updating only stream properties.
 		 */
 		dummy_updates = kzalloc(sizeof(struct dc_surface_update) * MAX_SURFACES, GFP_ATOMIC);
+		if (!dummy_updates) {
+			DRM_ERROR("Failed to allocate memory for dummy_updates.\n");
+			continue;
+		}
 		for (j = 0; j < status->plane_count; j++)
 			dummy_updates[j].surface = status->plane_states[0];

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c+16−16

@@ -437,32 +437,32 @@ static struct wm_table ddr5_wm_table = { · 436 unmodified lines
437	.wm_inst = WM_A,	437	.wm_inst = WM_A,
438	.wm_type = WM_TYPE_PSTATE_CHG,	438	.wm_type = WM_TYPE_PSTATE_CHG,
439	.pstate_latency_us = 11.72,	439	.pstate_latency_us = 11.72,
440	.sr_exit_time_us = 14.0,	440	.sr_exit_time_us = 28.0,
441	.sr_enter_plus_exit_time_us = 16.0,	441	.sr_enter_plus_exit_time_us = 30.0,
442	.valid = true,	442	.valid = true,
443	},	443	},
444	{	444	{
445	.wm_inst = WM_B,	445	.wm_inst = WM_B,
446	.wm_type = WM_TYPE_PSTATE_CHG,	446	.wm_type = WM_TYPE_PSTATE_CHG,
447	.pstate_latency_us = 11.72,	447	.pstate_latency_us = 11.72,
448	.sr_exit_time_us = 14.0,	448	.sr_exit_time_us = 28.0,
449	.sr_enter_plus_exit_time_us = 16.0,	449	.sr_enter_plus_exit_time_us = 30.0,
450	.valid = true,	450	.valid = true,
451	},	451	},
452	{	452	{
453	.wm_inst = WM_C,	453	.wm_inst = WM_C,
454	.wm_type = WM_TYPE_PSTATE_CHG,	454	.wm_type = WM_TYPE_PSTATE_CHG,
455	.pstate_latency_us = 11.72,	455	.pstate_latency_us = 11.72,
456	.sr_exit_time_us = 14.0,	456	.sr_exit_time_us = 28.0,
457	.sr_enter_plus_exit_time_us = 16.0,	457	.sr_enter_plus_exit_time_us = 30.0,
458	.valid = true,	458	.valid = true,
459	},	459	},
460	{	460	{
461	.wm_inst = WM_D,	461	.wm_inst = WM_D,
462	.wm_type = WM_TYPE_PSTATE_CHG,	462	.wm_type = WM_TYPE_PSTATE_CHG,
463	.pstate_latency_us = 11.72,	463	.pstate_latency_us = 11.72,
464	.sr_exit_time_us = 14.0,	464	.sr_exit_time_us = 28.0,
465	.sr_enter_plus_exit_time_us = 16.0,	465	.sr_enter_plus_exit_time_us = 30.0,
466	.valid = true,	466	.valid = true,
467	},	467	},
468	}	468	}
@@ -474,32 +474,32 @@ static struct wm_table lpddr5_wm_table = { · 5 unmodified lines
474	.wm_inst = WM_A,	474	.wm_inst = WM_A,
475	.wm_type = WM_TYPE_PSTATE_CHG,	475	.wm_type = WM_TYPE_PSTATE_CHG,
476	.pstate_latency_us = 11.65333,	476	.pstate_latency_us = 11.65333,
477	.sr_exit_time_us = 14.0,	477	.sr_exit_time_us = 28.0,
478	.sr_enter_plus_exit_time_us = 16.0,	478	.sr_enter_plus_exit_time_us = 30.0,
479	.valid = true,	479	.valid = true,
480	},	480	},
481	{	481	{
482	.wm_inst = WM_B,	482	.wm_inst = WM_B,
483	.wm_type = WM_TYPE_PSTATE_CHG,	483	.wm_type = WM_TYPE_PSTATE_CHG,
484	.pstate_latency_us = 11.65333,	484	.pstate_latency_us = 11.65333,
485	.sr_exit_time_us = 14.0,	485	.sr_exit_time_us = 28.0,
486	.sr_enter_plus_exit_time_us = 16.0,	486	.sr_enter_plus_exit_time_us = 30.0,
487	.valid = true,	487	.valid = true,
488	},	488	},
489	{	489	{
490	.wm_inst = WM_C,	490	.wm_inst = WM_C,
491	.wm_type = WM_TYPE_PSTATE_CHG,	491	.wm_type = WM_TYPE_PSTATE_CHG,
492	.pstate_latency_us = 11.65333,	492	.pstate_latency_us = 11.65333,
493	.sr_exit_time_us = 14.0,	493	.sr_exit_time_us = 28.0,
494	.sr_enter_plus_exit_time_us = 16.0,	494	.sr_enter_plus_exit_time_us = 30.0,
495	.valid = true,	495	.valid = true,
496	},	496	},
497	{	497	{
498	.wm_inst = WM_D,	498	.wm_inst = WM_D,
499	.wm_type = WM_TYPE_PSTATE_CHG,	499	.wm_type = WM_TYPE_PSTATE_CHG,
500	.pstate_latency_us = 11.65333,	500	.pstate_latency_us = 11.65333,
501	.sr_exit_time_us = 14.0,	501	.sr_exit_time_us = 28.0,
502	.sr_enter_plus_exit_time_us = 16.0,	502	.sr_enter_plus_exit_time_us = 30.0,
503	.valid = true,	503	.valid = true,
504	},	504	},
505	}	505	}

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_link_encoder.c+2−2

 	enc10->base.hpd_source = init_data->hpd_source;
 	enc10->base.connector = init_data->connector;
-	if (enc10->base.connector.id == CONNECTOR_ID_USBC)
-		enc10->base.features.flags.bits.DP_IS_USB_C = 1;
 	enc10->base.preferred_engine = ENGINE_ID_UNKNOWN;
 	enc10->base.features = *enc_features;
+	if (enc10->base.connector.id == CONNECTOR_ID_USBC)
+		enc10->base.features.flags.bits.DP_IS_USB_C = 1;
 	enc10->base.transmitter = init_data->transmitter;

drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_link_encoder.c+2−2

 	enc10->base.hpd_source = init_data->hpd_source;
 	enc10->base.connector = init_data->connector;
-	if (enc10->base.connector.id == CONNECTOR_ID_USBC)
-		enc10->base.features.flags.bits.DP_IS_USB_C = 1;
 	enc10->base.preferred_engine = ENGINE_ID_UNKNOWN;
 	}
 	enc10->base.features.flags.bits.HDMI_6GB_EN = 1;
+	if (enc10->base.connector.id == CONNECTOR_ID_USBC)
+		enc10->base.features.flags.bits.DP_IS_USB_C = 1;
 	if (bp_funcs->get_connector_speed_cap_info)
 		result = bp_funcs->get_connector_speed_cap_info(enc10->base.ctx->dc_bios,

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c+2−2

@@ -1112,7 +1112,7 @@ struct pipe_slice_table { · 1111 unmodified lines
1112	struct pipe_ctx *pri_pipe;	1112	struct pipe_ctx *pri_pipe;
1113	struct dc_plane_state *plane;	1113	struct dc_plane_state *plane;
1114	int slice_count;	1114	int slice_count;
1115	} mpc_combines[MAX_SURFACES];	1115	} mpc_combines[MAX_PLANES];
1116	int mpc_combine_count;	1116	int mpc_combine_count;
1117	};	1117	};
1118		1118
@@ -2753,7 +2753,7 @@ static int build_synthetic_soc_states(bool disable_dc_mode_overwrite, struct clk · 1634 unmodified lines
2753	struct _vcs_dpi_voltage_scaling_st entry = {0};	2753	struct _vcs_dpi_voltage_scaling_st entry = {0};
2754	struct clk_limit_table_entry max_clk_data = {0};	2754	struct clk_limit_table_entry max_clk_data = {0};
2755		2755
2756	unsigned int min_dcfclk_mhz = 199, min_fclk_mhz = 299;	2756	unsigned int min_dcfclk_mhz = 399, min_fclk_mhz = 599;
2757		2757
2758	static const unsigned int num_dcfclk_stas = 5;	2758	static const unsigned int num_dcfclk_stas = 5;
2759	unsigned int dcfclk_sta_targets[DC__VOLTAGE_STATES] = {199, 615, 906, 1324, 1564};	2759	unsigned int dcfclk_sta_targets[DC__VOLTAGE_STATES] = {199, 615, 906, 1324, 1564};

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c+2−2

@@ -164,8 +164,8 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = { · 163 unmodified lines
164	},	164	},
165	},	165	},
166	.num_states = 5,	166	.num_states = 5,
167	.sr_exit_time_us = 14.0,	167	.sr_exit_time_us = 28.0,
168	.sr_enter_plus_exit_time_us = 16.0,	168	.sr_enter_plus_exit_time_us = 30.0,
169	.sr_exit_z8_time_us = 210.0,	169	.sr_exit_z8_time_us = 210.0,
170	.sr_enter_plus_exit_z8_time_us = 320.0,	170	.sr_enter_plus_exit_z8_time_us = 320.0,
171	.fclk_change_latency_us = 24.0,	171	.fclk_change_latency_us = 24.0,

drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c+12−21

@@ -341,9 +341,6 @@ void dml2_init_soc_states(struct dml2_context dml2, const struct dc in_dc, · 340 unmodified lines
341	break;	341	break;
342	}	342	}
343		343
344	if (dml2->config.bbox_overrides.clks_table.num_states)
345	p->in_states->num_states = dml2->config.bbox_overrides.clks_table.num_states;
346
347	/* Override from passed values, if available */	344	/* Override from passed values, if available */
348	for (i = 0; i < p->in_states->num_states; i++) {	345	for (i = 0; i < p->in_states->num_states; i++) {
349	if (dml2->config.bbox_overrides.sr_exit_latency_us) {	346	if (dml2->config.bbox_overrides.sr_exit_latency_us) {
@@ -400,6 +397,7 @@ void dml2_init_soc_states(struct dml2_context dml2, const struct dc in_dc, · 50 unmodified lines
400	}	397	}
401	/* Copy clocks tables entries, if available */	398	/* Copy clocks tables entries, if available */
402	if (dml2->config.bbox_overrides.clks_table.num_states) {	399	if (dml2->config.bbox_overrides.clks_table.num_states) {
		400	p->in_states->num_states = dml2->config.bbox_overrides.clks_table.num_states;
403		401
404	for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels; i++) {	402	for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels; i++) {
405	p->in_states->state_array[i].dcfclk_mhz = dml2->config.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz;	403	p->in_states->state_array[i].dcfclk_mhz = dml2->config.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz;
@@ -793,35 +791,28 @@ static void populate_dml_surface_cfg_from_plane_state(enum dml_project_id dml2_p · 387 unmodified lines
793	}	791	}
794	}	792	}
795		793
796	/TODO no support for mpc combine, need rework - should calculate scaling params based on plane+stream/	794	static struct scaler_data get_scaler_data_for_plane(const struct dc_plane_state in, struct dc_state context)
797	static struct scaler_data get_scaler_data_for_plane(const struct dc_plane_state in, const struct dc_state context)
798	{	795	{
799	int i;	796	int i;
800	struct scaler_data data = { 0 };	797	struct pipe_ctx *temp_pipe = &context->res_ctx.temp_pipe;
		798
		799	memset(temp_pipe, 0, sizeof(struct pipe_ctx));
801		800
802	for (i = 0; i < MAX_PIPES; i++) {	801	for (i = 0; i < MAX_PIPES; i++) {
803	const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];	802	const struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
804		803
805	if (pipe->plane_state == in && !pipe->prev_odm_pipe) {	804	if (pipe->plane_state == in && !pipe->prev_odm_pipe) {
806	const struct pipe_ctx *next_pipe = pipe->next_odm_pipe;	805	temp_pipe->stream = pipe->stream;
807		806	temp_pipe->plane_state = pipe->plane_state;
808	data = context->res_ctx.pipe_ctx[i].plane_res.scl_data;	807	temp_pipe->plane_res.scl_data.taps = pipe->plane_res.scl_data.taps;
809	while (next_pipe) {	808
810	data.h_active += next_pipe->plane_res.scl_data.h_active;	809	resource_build_scaling_params(temp_pipe);
811	data.recout.width += next_pipe->plane_res.scl_data.recout.width;
812	if (in->rotation == ROTATION_ANGLE_0 \|\| in->rotation == ROTATION_ANGLE_180) {
813	data.viewport.width += next_pipe->plane_res.scl_data.viewport.width;
814	} else {
815	data.viewport.height += next_pipe->plane_res.scl_data.viewport.height;
816	}
817	next_pipe = next_pipe->next_odm_pipe;
818	}
819	break;	810	break;
820	}	811	}
821	}	812	}
822		813
823	ASSERT(i < MAX_PIPES);	814	ASSERT(i < MAX_PIPES);
824	return data;	815	return temp_pipe->plane_res.scl_data;
825	}	816	}
826		817
827	static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st out, unsigned int location, const struct dc_stream_state in)	818	static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st out, unsigned int location, const struct dc_stream_state in)
@@ -866,7 +857,7 @@ static void populate_dummy_dml_plane_cfg(struct dml_plane_cfg_st *out, unsigned · 38 unmodified lines
866	out->ScalerEnabled[location] = false;	857	out->ScalerEnabled[location] = false;
867	}	858	}
868		859
869	static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st out, unsigned int location, const struct dc_plane_state in, const struct dc_state *context)	860	static void populate_dml_plane_cfg_from_plane_state(struct dml_plane_cfg_st out, unsigned int location, const struct dc_plane_state in, struct dc_state *context)
870	{	861	{
871	const struct scaler_data scaler_data = get_scaler_data_for_plane(in, context);	862	const struct scaler_data scaler_data = get_scaler_data_for_plane(in, context);
872		863

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c+1−1

 		dto_params.timing = &pipe_ctx->stream->timing;
 		dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
 		if (dccg) {
-			dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
 			dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);
 			dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);
+			dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
 		}
 	} else if (dccg && dccg->funcs->disable_symclk_se) {
 		dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c+5−6

 	}
 	if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {
-		dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
-		dccg->funcs->set_dpstreamclk(dccg, DTBCLK0, tg->inst, dp_hpo_inst);
-		phyd32clk = get_phyd32clk_src(link);
-		dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk);
 		dto_params.otg_inst = tg->inst;
 		dto_params.pixclk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10;
 		dto_params.num_odm_segments = get_odm_segment_count(pipe_ctx);
 		dto_params.timing = &pipe_ctx->stream->timing;
 		dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);
 		dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
+		dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
+		dccg->funcs->set_dpstreamclk(dccg, DTBCLK0, tg->inst, dp_hpo_inst);
+		phyd32clk = get_phyd32clk_src(link);
+		dccg->funcs->enable_symclk32_se(dccg, dp_hpo_inst, phyd32clk);
 	} else {
 		if (dccg->funcs->enable_symclk_se)
 			dccg->funcs->enable_symclk_se(dccg, stream_enc->stream_enc_inst,

drivers/gpu/drm/amd/display/dc/inc/core_types.h+2−0

@@ -469,6 +469,8 @@ struct resource_context { · 468 unmodified lines
469	unsigned int hpo_dp_link_enc_to_link_idx[MAX_HPO_DP2_LINK_ENCODERS];	469	unsigned int hpo_dp_link_enc_to_link_idx[MAX_HPO_DP2_LINK_ENCODERS];
470	int hpo_dp_link_enc_ref_cnts[MAX_HPO_DP2_LINK_ENCODERS];	470	int hpo_dp_link_enc_ref_cnts[MAX_HPO_DP2_LINK_ENCODERS];
471	bool is_mpc_3dlut_acquired[MAX_PIPES];	471	bool is_mpc_3dlut_acquired[MAX_PIPES];
		472	/* solely used for build scalar data in dml2 */
		473	struct pipe_ctx temp_pipe;
472	};	474	};
473		475
474	struct dce_bw_output {	476	struct dce_bw_output {

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c+1−1

@@ -196,7 +196,7 @@ static int get_host_router_total_dp_tunnel_bw(const struct dc *dc, uint8_t hr_in · 195 unmodified lines
196	struct dc_link link_dpia_primary, link_dpia_secondary;	196	struct dc_link link_dpia_primary, link_dpia_secondary;
197	int total_bw = 0;	197	int total_bw = 0;
198		198
199	for (uint8_t i = 0; i < MAX_PIPES * 2; ++i) {	199	for (uint8_t i = 0; i < (MAX_PIPES * 2) - 1; ++i) {
200		200
201	if (!dc->links[i] \|\| dc->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA)	201	if (!dc->links[i] \|\| dc->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA)
202	continue;	202	continue;

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c+2−31

@@ -734,7 +734,7 @@ static int smu_early_init(void *handle) · 733 unmodified lines
734	smu->adev = adev;	734	smu->adev = adev;
735	smu->pm_enabled = !!amdgpu_dpm;	735	smu->pm_enabled = !!amdgpu_dpm;
736	smu->is_apu = false;	736	smu->is_apu = false;
737	smu->smu_baco.state = SMU_BACO_STATE_NONE;	737	smu->smu_baco.state = SMU_BACO_STATE_EXIT;
738	smu->smu_baco.platform_support = false;	738	smu->smu_baco.platform_support = false;
739	smu->user_dpm_profile.fan_mode = -1;	739	smu->user_dpm_profile.fan_mode = -1;
740		740
@@ -1954,31 +1954,10 @@ static int smu_smc_hw_cleanup(struct smu_context *smu) · 1213 unmodified lines
1954	return 0;	1954	return 0;
1955	}	1955	}
1956		1956
1957	static int smu_reset_mp1_state(struct smu_context *smu)
1958	{
1959	struct amdgpu_device *adev = smu->adev;
1960	int ret = 0;
1961
1962	if ((!adev->in_runpm) && (!adev->in_suspend) &&
1963	(!amdgpu_in_reset(adev)))
1964	switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
1965	case IP_VERSION(13, 0, 0):
1966	case IP_VERSION(13, 0, 7):
1967	case IP_VERSION(13, 0, 10):
1968	ret = smu_set_mp1_state(smu, PP_MP1_STATE_UNLOAD);
1969	break;
1970	default:
1971	break;
1972	}
1973
1974	return ret;
1975	}
1976
1977	static int smu_hw_fini(void *handle)	1957	static int smu_hw_fini(void *handle)
1978	{	1958	{
1979	struct amdgpu_device adev = (struct amdgpu_device )handle;	1959	struct amdgpu_device adev = (struct amdgpu_device )handle;
1980	struct smu_context *smu = adev->powerplay.pp_handle;	1960	struct smu_context *smu = adev->powerplay.pp_handle;
1981	int ret;
1982		1961
1983	if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))	1962	if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
1984	return 0;	1963	return 0;
@@ -1996,15 +1975,7 @@ static int smu_hw_fini(void *handle) · 11 unmodified lines
1996		1975
1997	adev->pm.dpm_enabled = false;	1976	adev->pm.dpm_enabled = false;
1998		1977
1999	ret = smu_smc_hw_cleanup(smu);	1978	return smu_smc_hw_cleanup(smu);
2000	if (ret)
2001	return ret;
2002
2003	ret = smu_reset_mp1_state(smu);
2004	if (ret)
2005	return ret;
2006
2007	return 0;
2008	}	1979	}
2009		1980
2010	static void smu_late_fini(void *handle)	1981	static void smu_late_fini(void *handle)

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h+0−1

@@ -424,7 +424,6 @@ enum smu_reset_mode { · 423 unmodified lines
424	enum smu_baco_state {	424	enum smu_baco_state {
425	SMU_BACO_STATE_ENTER = 0,	425	SMU_BACO_STATE_ENTER = 0,
426	SMU_BACO_STATE_EXIT,	426	SMU_BACO_STATE_EXIT,
427	SMU_BACO_STATE_NONE,
428	};	427	};
429		428
430	struct smu_baco_context {	429	struct smu_baco_context {

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c+2−8

 	switch (mp1_state) {
 	case PP_MP1_STATE_UNLOAD:
-		ret = smu_cmn_send_smc_msg_with_param(smu,
+		ret = smu_cmn_set_mp1_state(smu, mp1_state);
-											  SMU_MSG_PrepareMp1ForUnload,
-											  0x55, NULL);
-		if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT)
-			ret = smu_v13_0_disable_pmfw_state(smu);
 		break;
 	default:
 		/* Ignore others */
 {
 	struct amdgpu_device *adev = smu->adev;
-	switch (adev->ip_versions[MP1_HWIP][0]) {
+	switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
 	case IP_VERSION(13, 0, 0):
 		return smu->smc_fw_version >= 0x004e6300;
 	case IP_VERSION(13, 0, 10):

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c+1−7

 	switch (mp1_state) {
 	case PP_MP1_STATE_UNLOAD:
-		ret = smu_cmn_send_smc_msg_with_param(smu,
+		ret = smu_cmn_set_mp1_state(smu, mp1_state);
-											  SMU_MSG_PrepareMp1ForUnload,
-											  0x55, NULL);
-		if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT)
-			ret = smu_v13_0_disable_pmfw_state(smu);
 		break;
 	default:
 		/* Ignore others */

drivers/gpu/drm/nouveau/nouveau_fence.c+18−6

 void
 nouveau_fence_context_del(struct nouveau_fence_chan *fctx)
 {
+	cancel_work_sync(&fctx->uevent_work);
 	nouveau_fence_context_kill(fctx, 0);
 	nvif_event_dtor(&fctx->event);
 	fctx->dead = 1;
 	return drop;
 }
-static int
+static void
-nouveau_fence_wait_uevent_handler(struct nvif_event *event, void *repv, u32 repc)
+nouveau_fence_uevent_work(struct work_struct *work)
 {
-	struct nouveau_fence_chan *fctx = container_of(event, typeof(*fctx), event);
+	struct nouveau_fence_chan *fctx = container_of(work, struct nouveau_fence_chan,
+						       uevent_work);
 	unsigned long flags;
-	int ret = NVIF_EVENT_KEEP;
+	int drop = 0;
 	spin_lock_irqsave(&fctx->lock, flags);
 	if (!list_empty(&fctx->pending)) {
 		fence = list_entry(fctx->pending.next, typeof(*fence), head);
 		chan = rcu_dereference_protected(fence->channel, lockdep_is_held(&fctx->lock));
 		if (nouveau_fence_update(chan, fctx))
-			ret = NVIF_EVENT_DROP;
+			drop = 1;
 	}
+	if (drop)
+		nvif_event_block(&fctx->event);
 	spin_unlock_irqrestore(&fctx->lock, flags);
+}
-	return ret;
+static int
+nouveau_fence_wait_uevent_handler(struct nvif_event *event, void *repv, u32 repc)
+{
+	struct nouveau_fence_chan *fctx = container_of(event, typeof(*fctx), event);
+	schedule_work(&fctx->uevent_work);
+	return NVIF_EVENT_KEEP;
 }
 void
 	} args;
 	int ret;
+	INIT_WORK(&fctx->uevent_work, nouveau_fence_uevent_work);
 	INIT_LIST_HEAD(&fctx->flip);
 	INIT_LIST_HEAD(&fctx->pending);
 	spin_lock_init(&fctx->lock);

drivers/gpu/drm/nouveau/nouveau_fence.h+1−0

@@ -44,6 +44,7 @@ struct nouveau_fence_chan { · 43 unmodified lines
44	u32 context;	44	u32 context;
45	char name[32];	45	char name[32];
46		46
		47	struct work_struct uevent_work;
47	struct nvif_event event;	48	struct nvif_event event;
48	int notify_ref, dead, killed;	49	int notify_ref, dead, killed;
49	};	50	};

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c+1−1

 	if (IS_ERR(rpc))
 		return PTR_ERR(rpc);
-	rpc->size = sizeof(*rpc);
 	rpc->numEntries = NV_GSP_REG_NUM_ENTRIES;
 	str_offset = offsetof(typeof(*rpc), entries[NV_GSP_REG_NUM_ENTRIES]);
 		strings += name_len;
 		str_offset += name_len;
 	}
+	rpc->size = str_offset;
 	return nvkm_gsp_rpc_wr(gsp, rpc, false);
 }

drivers/gpu/drm/tegra/drm.c+2−1

@@ -960,7 +960,8 @@ int host1x_client_iommu_attach(struct host1x_client *client) · 959 unmodified lines
960	* not the shared IOMMU domain, don't try to attach it to a different	960	* not the shared IOMMU domain, don't try to attach it to a different
961	* domain. This allows using the IOMMU-backed DMA API.	961	* domain. This allows using the IOMMU-backed DMA API.
962	*/	962	*/
963	if (domain && domain != tegra->domain)	963	if (domain && domain->type != IOMMU_DOMAIN_IDENTITY &&
		964	domain != tegra->domain)
964	return 0;	965	return 0;
965		966
966	if (tegra->domain) {	967	if (tegra->domain) {

drivers/gpu/drm/virtio/virtgpu_drv.c+1−0

@@ -94,6 +94,7 @@ static int virtio_gpu_probe(struct virtio_device *vdev) · 93 unmodified lines
94	goto err_free;	94	goto err_free;
95	}	95	}
96		96
		97	dma_set_max_seg_size(dev->dev, dma_max_mapping_size(dev->dev) ?: UINT_MAX);
97	ret = virtio_gpu_init(vdev, dev);	98	ret = virtio_gpu_init(vdev, dev);
98	if (ret)	99	if (ret)
99	goto err_free;	100	goto err_free;

drivers/gpu/drm/xe/abi/guc_actions_abi.h+2−2

@@ -50,8 +50,8 @@ · 49 unmodified lines
50		50
51	#define HOST2GUC_SELF_CFG_REQUEST_MSG_LEN (GUC_HXG_REQUEST_MSG_MIN_LEN + 3u)	51	#define HOST2GUC_SELF_CFG_REQUEST_MSG_LEN (GUC_HXG_REQUEST_MSG_MIN_LEN + 3u)
52	#define HOST2GUC_SELF_CFG_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0	52	#define HOST2GUC_SELF_CFG_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
53	#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY (0xffff << 16)	53	#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY (0xffffu << 16)
54	#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN (0xffff << 0)	54	#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN (0xffffu << 0)
55	#define HOST2GUC_SELF_CFG_REQUEST_MSG_2_VALUE32 GUC_HXG_REQUEST_MSG_n_DATAn	55	#define HOST2GUC_SELF_CFG_REQUEST_MSG_2_VALUE32 GUC_HXG_REQUEST_MSG_n_DATAn
56	#define HOST2GUC_SELF_CFG_REQUEST_MSG_3_VALUE64 GUC_HXG_REQUEST_MSG_n_DATAn	56	#define HOST2GUC_SELF_CFG_REQUEST_MSG_3_VALUE64 GUC_HXG_REQUEST_MSG_n_DATAn
57		57

drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h+2−2

@@ -242,8 +242,8 @@ struct slpc_shared_data { · 241 unmodified lines
242	(HOST2GUC_PC_SLPC_REQUEST_REQUEST_MSG_MIN_LEN + \	242	(HOST2GUC_PC_SLPC_REQUEST_REQUEST_MSG_MIN_LEN + \
243	HOST2GUC_PC_SLPC_EVENT_MAX_INPUT_ARGS)	243	HOST2GUC_PC_SLPC_EVENT_MAX_INPUT_ARGS)
244	#define HOST2GUC_PC_SLPC_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0	244	#define HOST2GUC_PC_SLPC_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
245	#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID (0xff << 8)	245	#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID (0xffu << 8)
246	#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC (0xff << 0)	246	#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC (0xffu << 0)
247	#define HOST2GUC_PC_SLPC_REQUEST_MSG_N_EVENT_DATA_N GUC_HXG_REQUEST_MSG_n_DATAn	247	#define HOST2GUC_PC_SLPC_REQUEST_MSG_N_EVENT_DATA_N GUC_HXG_REQUEST_MSG_n_DATAn
248		248
249	#endif	249	#endif

drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h+4−4

@@ -82,11 +82,11 @@ static_assert(sizeof(struct guc_ct_buffer_desc) == 64); · 81 unmodified lines
82	#define GUC_CTB_HDR_LEN 1u	82	#define GUC_CTB_HDR_LEN 1u
83	#define GUC_CTB_MSG_MIN_LEN GUC_CTB_HDR_LEN	83	#define GUC_CTB_MSG_MIN_LEN GUC_CTB_HDR_LEN
84	#define GUC_CTB_MSG_MAX_LEN 256u	84	#define GUC_CTB_MSG_MAX_LEN 256u
85	#define GUC_CTB_MSG_0_FENCE (0xffff << 16)	85	#define GUC_CTB_MSG_0_FENCE (0xffffu << 16)
86	#define GUC_CTB_MSG_0_FORMAT (0xf << 12)	86	#define GUC_CTB_MSG_0_FORMAT (0xfu << 12)
87	#define GUC_CTB_FORMAT_HXG 0u	87	#define GUC_CTB_FORMAT_HXG 0u
88	#define GUC_CTB_MSG_0_RESERVED (0xf << 8)	88	#define GUC_CTB_MSG_0_RESERVED (0xfu << 8)
89	#define GUC_CTB_MSG_0_NUM_DWORDS (0xff << 0)	89	#define GUC_CTB_MSG_0_NUM_DWORDS (0xffu << 0)
90		90
91	/**	91	/**
92	* DOC: CTB HXG Message	92	* DOC: CTB HXG Message

drivers/gpu/drm/xe/abi/guc_klvs_abi.h+3−3

@@ -31,9 +31,9 @@ · 30 unmodified lines
31	*/	31	*/
32		32
33	#define GUC_KLV_LEN_MIN 1u	33	#define GUC_KLV_LEN_MIN 1u
34	#define GUC_KLV_0_KEY (0xffff << 16)	34	#define GUC_KLV_0_KEY (0xffffu << 16)
35	#define GUC_KLV_0_LEN (0xffff << 0)	35	#define GUC_KLV_0_LEN (0xffffu << 0)
36	#define GUC_KLV_n_VALUE (0xffffffff << 0)	36	#define GUC_KLV_n_VALUE (0xffffffffu << 0)
37		37
38	/**	38	/**
39	* DOC: GuC Self Config KLVs	39	* DOC: GuC Self Config KLVs

drivers/gpu/drm/xe/abi/guc_messages_abi.h+10−10

drivers/gpu/drm/xe/xe_exec.c+9−1

 	u64 addresses[XE_HW_ENGINE_MAX_INSTANCE];
 	struct drm_gpuvm_exec vm_exec = {.extra.fn = xe_exec_fn};
 	struct drm_exec *exec = &vm_exec.exec;
-	u32 i, num_syncs = 0;
+	u32 i, num_syncs = 0, num_ufence = 0;
 	struct xe_sched_job *job;
 	struct dma_fence *rebind_fence;
 	struct xe_vm *vm;
 					   SYNC_PARSE_FLAG_LR_MODE : 0));
 		if (err)
 			goto err_syncs;
+		if (xe_sync_is_ufence(&syncs[i]))
+			num_ufence++;
+	}
+	if (XE_IOCTL_DBG(xe, num_ufence > 1)) {
+		err = -EINVAL;
+		goto err_syncs;
 	}
 	if (xe_exec_queue_is_parallel(q)) {

drivers/gpu/drm/xe/xe_gt_mcr.c+2−2

@@ -480,7 +480,7 @@ static bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt, · 479 unmodified lines
480	* to synchronize with external clients (e.g., firmware), so a semaphore	480	* to synchronize with external clients (e.g., firmware), so a semaphore
481	* register will also need to be taken.	481	* register will also need to be taken.
482	*/	482	*/
483	static void mcr_lock(struct xe_gt *gt)	483	static void mcr_lock(struct xe_gt *gt) __acquires(&gt->mcr_lock)
484	{	484	{
485	struct xe_device *xe = gt_to_xe(gt);	485	struct xe_device *xe = gt_to_xe(gt);
486	int ret = 0;	486	int ret = 0;
@@ -500,7 +500,7 @@ static void mcr_lock(struct xe_gt *gt) · 13 unmodified lines
500	drm_WARN_ON_ONCE(&xe->drm, ret == -ETIMEDOUT);	500	drm_WARN_ON_ONCE(&xe->drm, ret == -ETIMEDOUT);
501	}	501	}
502		502
503	static void mcr_unlock(struct xe_gt *gt)	503	static void mcr_unlock(struct xe_gt *gt) __releases(&gt->mcr_lock)
504	{	504	{
505	/* Release hardware semaphore - this is done by writing 1 to the register */	505	/* Release hardware semaphore - this is done by writing 1 to the register */
506	if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270)	506	if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270)

drivers/gpu/drm/xe/xe_gt_pagefault.c+7−4

 		goto unlock_vm;
 	}
-	if (!xe_vma_is_userptr(vma) || !xe_vma_userptr_check_repin(vma)) {
+	if (!xe_vma_is_userptr(vma) ||
+	    !xe_vma_userptr_check_repin(to_userptr_vma(vma))) {
 		downgrade_write(&vm->lock);
 		write_locked = false;
 	}
 	/* TODO: Validate fault */
 	if (xe_vma_is_userptr(vma) && write_locked) {
+		struct xe_userptr_vma *uvma = to_userptr_vma(vma);
 		spin_lock(&vm->userptr.invalidated_lock);
-		list_del_init(&vma->userptr.invalidate_link);
+		list_del_init(&uvma->userptr.invalidate_link);
 		spin_unlock(&vm->userptr.invalidated_lock);
-		ret = xe_vma_userptr_pin_pages(vma);
+		ret = xe_vma_userptr_pin_pages(uvma);
 		if (ret)
 			goto unlock_vm;
 	dma_fence_put(fence);
 	if (xe_vma_is_userptr(vma))
-		ret = xe_vma_userptr_check_repin(vma);
+		ret = xe_vma_userptr_check_repin(to_userptr_vma(vma));
 	vma->usm.tile_invalidated &= ~BIT(tile->id);
 unlock_dma_resv:

drivers/gpu/drm/xe/xe_guc_pc.c+2−0

@@ -963,7 +963,9 @@ void xe_guc_pc_fini(struct xe_guc_pc *pc) · 962 unmodified lines
963	struct xe_device *xe = pc_to_xe(pc);	963	struct xe_device *xe = pc_to_xe(pc);
964		964
965	if (xe->info.skip_guc_pc) {	965	if (xe->info.skip_guc_pc) {
		966	xe_device_mem_access_get(xe);
966	xe_gt_idle_disable_c6(pc_to_gt(pc));	967	xe_gt_idle_disable_c6(pc_to_gt(pc));
		968	xe_device_mem_access_put(xe);
967	return;	969	return;
968	}	970	}
969		971

drivers/gpu/drm/xe/xe_hw_fence.c+3−3

 	if (!fence)
 		return ERR_PTR(-ENOMEM);
-	dma_fence_init(&fence->dma, &xe_hw_fence_ops, &ctx->irq->lock,
-		       ctx->dma_fence_ctx, ctx->next_seqno++);
 	fence->ctx = ctx;
 	fence->seqno_map = seqno_map;
 	INIT_LIST_HEAD(&fence->irq_link);
+	dma_fence_init(&fence->dma, &xe_hw_fence_ops, &ctx->irq->lock,
+		       ctx->dma_fence_ctx, ctx->next_seqno++);
 	trace_xe_hw_fence_create(fence);
 	return fence;

drivers/gpu/drm/xe/xe_lrc.c+7−7

@@ -21,10 +21,10 @@ · 20 unmodified lines
21	#include "xe_map.h"	21	#include "xe_map.h"
22	#include "xe_vm.h"	22	#include "xe_vm.h"
23		23
24	#define CTX_VALID (1 << 0)	24	#define LRC_VALID (1 << 0)
25	#define CTX_PRIVILEGE (1 << 8)	25	#define LRC_PRIVILEGE (1 << 8)
26	#define CTX_ADDRESSING_MODE_SHIFT 3	26	#define LRC_ADDRESSING_MODE_SHIFT 3
27	#define LEGACY_64B_CONTEXT 3	27	#define LRC_LEGACY_64B_CONTEXT 3
28		28
29	#define ENGINE_CLASS_SHIFT 61	29	#define ENGINE_CLASS_SHIFT 61
30	#define ENGINE_INSTANCE_SHIFT 48	30	#define ENGINE_INSTANCE_SHIFT 48
@@ -762,15 +762,15 @@ int xe_lrc_init(struct xe_lrc lrc, struct xe_hw_engine hwe, · 731 unmodified lines
762	(q->usm.acc_notify << ACC_NOTIFY_S) \|	762	(q->usm.acc_notify << ACC_NOTIFY_S) \|
763	q->usm.acc_trigger);	763	q->usm.acc_trigger);
764		764
765	lrc->desc = CTX_VALID;	765	lrc->desc = LRC_VALID;
766	lrc->desc \|= LEGACY_64B_CONTEXT << CTX_ADDRESSING_MODE_SHIFT;	766	lrc->desc \|= LRC_LEGACY_64B_CONTEXT << LRC_ADDRESSING_MODE_SHIFT;
767	/* TODO: Priority */	767	/* TODO: Priority */
768		768
769	/* While this appears to have something about privileged batches or	769	/* While this appears to have something about privileged batches or
770	* some such, it really just means PPGTT mode.	770	* some such, it really just means PPGTT mode.
771	*/	771	*/
772	if (vm)	772	if (vm)
773	lrc->desc \|= CTX_PRIVILEGE;	773	lrc->desc \|= LRC_PRIVILEGE;
774		774
775	if (GRAPHICS_VERx100(xe) < 1250) {	775	if (GRAPHICS_VERx100(xe) < 1250) {
776	lrc->desc \|= (u64)hwe->instance << ENGINE_INSTANCE_SHIFT;	776	lrc->desc \|= (u64)hwe->instance << ENGINE_INSTANCE_SHIFT;

drivers/gpu/drm/xe/xe_pt.c+16−16

@@ -618,8 +618,8 @@ xe_pt_stage_bind(struct xe_tile tile, struct xe_vma vma, · 617 unmodified lines
618		618
619	if (!xe_vma_is_null(vma)) {	619	if (!xe_vma_is_null(vma)) {
620	if (xe_vma_is_userptr(vma))	620	if (xe_vma_is_userptr(vma))
621	xe_res_first_sg(vma->userptr.sg, 0, xe_vma_size(vma),	621	xe_res_first_sg(to_userptr_vma(vma)->userptr.sg, 0,
622	&curs);	622	xe_vma_size(vma), &curs);
623	else if (xe_bo_is_vram(bo) \|\| xe_bo_is_stolen(bo))	623	else if (xe_bo_is_vram(bo) \|\| xe_bo_is_stolen(bo))
624	xe_res_first(bo->ttm.resource, xe_vma_bo_offset(vma),	624	xe_res_first(bo->ttm.resource, xe_vma_bo_offset(vma),
625	xe_vma_size(vma), &curs);	625	xe_vma_size(vma), &curs);
@@ -906,17 +906,17 @@ static void xe_vm_dbg_print_entries(struct xe_device *xe, · 280 unmodified lines
906		906
907	#ifdef CONFIG_DRM_XE_USERPTR_INVAL_INJECT	907	#ifdef CONFIG_DRM_XE_USERPTR_INVAL_INJECT
908		908
909	static int xe_pt_userptr_inject_eagain(struct xe_vma *vma)	909	static int xe_pt_userptr_inject_eagain(struct xe_userptr_vma *uvma)
910	{	910	{
911	u32 divisor = vma->userptr.divisor ? vma->userptr.divisor : 2;	911	u32 divisor = uvma->userptr.divisor ? uvma->userptr.divisor : 2;
912	static u32 count;	912	static u32 count;
913		913
914	if (count++ % divisor == divisor - 1) {	914	if (count++ % divisor == divisor - 1) {
915	struct xe_vm *vm = xe_vma_vm(vma);	915	struct xe_vm *vm = xe_vma_vm(&uvma->vma);
916		916
917	vma->userptr.divisor = divisor << 1;	917	uvma->userptr.divisor = divisor << 1;
918	spin_lock(&vm->userptr.invalidated_lock);	918	spin_lock(&vm->userptr.invalidated_lock);
919	list_move_tail(&vma->userptr.invalidate_link,	919	list_move_tail(&uvma->userptr.invalidate_link,
920	&vm->userptr.invalidated);	920	&vm->userptr.invalidated);
921	spin_unlock(&vm->userptr.invalidated_lock);	921	spin_unlock(&vm->userptr.invalidated_lock);
922	return true;	922	return true;
@@ -927,7 +927,7 @@ static int xe_pt_userptr_inject_eagain(struct xe_vma *vma) · 4 unmodified lines
927		927
928	#else	928	#else
929		929
930	static bool xe_pt_userptr_inject_eagain(struct xe_vma *vma)	930	static bool xe_pt_userptr_inject_eagain(struct xe_userptr_vma *uvma)
931	{	931	{
932	return false;	932	return false;
933	}	933	}
@@ -1000,9 +1000,9 @@ static int xe_pt_userptr_pre_commit(struct xe_migrate_pt_update *pt_update) · 66 unmodified lines
1000	{	1000	{
1001	struct xe_pt_migrate_pt_update *userptr_update =	1001	struct xe_pt_migrate_pt_update *userptr_update =
1002	container_of(pt_update, typeof(*userptr_update), base);	1002	container_of(pt_update, typeof(*userptr_update), base);
1003	struct xe_vma *vma = pt_update->vma;	1003	struct xe_userptr_vma *uvma = to_userptr_vma(pt_update->vma);
1004	unsigned long notifier_seq = vma->userptr.notifier_seq;	1004	unsigned long notifier_seq = uvma->userptr.notifier_seq;
1005	struct xe_vm *vm = xe_vma_vm(vma);	1005	struct xe_vm *vm = xe_vma_vm(&uvma->vma);
1006	int err = xe_pt_vm_dependencies(pt_update->job,	1006	int err = xe_pt_vm_dependencies(pt_update->job,
1007	&vm->rftree[pt_update->tile_id],	1007	&vm->rftree[pt_update->tile_id],
1008	pt_update->start,	1008	pt_update->start,
@@ -1023,7 +1023,7 @@ static int xe_pt_userptr_pre_commit(struct xe_migrate_pt_update *pt_update) · 14 unmodified lines
1023	*/	1023	*/
1024	do {	1024	do {
1025	down_read(&vm->userptr.notifier_lock);	1025	down_read(&vm->userptr.notifier_lock);
1026	if (!mmu_interval_read_retry(&vma->userptr.notifier,	1026	if (!mmu_interval_read_retry(&uvma->userptr.notifier,
1027	notifier_seq))	1027	notifier_seq))
1028	break;	1028	break;
1029		1029
@@ -1032,11 +1032,11 @@ static int xe_pt_userptr_pre_commit(struct xe_migrate_pt_update *pt_update) · 2 unmodified lines
1032	if (userptr_update->bind)	1032	if (userptr_update->bind)
1033	return -EAGAIN;	1033	return -EAGAIN;
1034		1034
1035	notifier_seq = mmu_interval_read_begin(&vma->userptr.notifier);	1035	notifier_seq = mmu_interval_read_begin(&uvma->userptr.notifier);
1036	} while (true);	1036	} while (true);
1037		1037
1038	/* Inject errors to test_whether they are handled correctly */	1038	/* Inject errors to test_whether they are handled correctly */
1039	if (userptr_update->bind && xe_pt_userptr_inject_eagain(vma)) {	1039	if (userptr_update->bind && xe_pt_userptr_inject_eagain(uvma)) {
1040	up_read(&vm->userptr.notifier_lock);	1040	up_read(&vm->userptr.notifier_lock);
1041	return -EAGAIN;	1041	return -EAGAIN;
1042	}	1042	}
@@ -1297,7 +1297,7 @@ __xe_pt_bind_vma(struct xe_tile tile, struct xe_vma vma, struct xe_exec_queue · 254 unmodified lines
1297	vma->tile_present \|= BIT(tile->id);	1297	vma->tile_present \|= BIT(tile->id);
1298		1298
1299	if (bind_pt_update.locked) {	1299	if (bind_pt_update.locked) {
1300	vma->userptr.initial_bind = true;	1300	to_userptr_vma(vma)->userptr.initial_bind = true;
1301	up_read(&vm->userptr.notifier_lock);	1301	up_read(&vm->userptr.notifier_lock);
1302	xe_bo_put_commit(&deferred);	1302	xe_bo_put_commit(&deferred);
1303	}	1303	}
@@ -1642,7 +1642,7 @@ __xe_pt_unbind_vma(struct xe_tile tile, struct xe_vma vma, struct xe_exec_queu · 338 unmodified lines
1642		1642
1643	if (!vma->tile_present) {	1643	if (!vma->tile_present) {
1644	spin_lock(&vm->userptr.invalidated_lock);	1644	spin_lock(&vm->userptr.invalidated_lock);
1645	list_del_init(&vma->userptr.invalidate_link);	1645	list_del_init(&to_userptr_vma(vma)->userptr.invalidate_link);
1646	spin_unlock(&vm->userptr.invalidated_lock);	1646	spin_unlock(&vm->userptr.invalidated_lock);
1647	}	1647	}
1648	up_read(&vm->userptr.notifier_lock);	1648	up_read(&vm->userptr.notifier_lock);

drivers/gpu/drm/xe/xe_query.c+25−25

@@ -459,21 +459,21 @@ static size_t calc_topo_query_size(struct xe_device *xe) · 458 unmodified lines
459	sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss));	459	sizeof_field(struct xe_gt, fuse_topo.eu_mask_per_dss));
460	}	460	}
461		461
462	static void __user copy_mask(void __user ptr,	462	static int copy_mask(void __user **ptr,
463	struct drm_xe_query_topology_mask *topo,	463	struct drm_xe_query_topology_mask *topo,
464	void *mask, size_t mask_size)	464	void *mask, size_t mask_size)
465	{	465	{
466	topo->num_bytes = mask_size;	466	topo->num_bytes = mask_size;
467		467
468	if (copy_to_user(ptr, topo, sizeof(*topo)))	468	if (copy_to_user(ptr, topo, sizeof(topo)))
469	return ERR_PTR(-EFAULT);	469	return -EFAULT;
470	ptr += sizeof(topo);	470	*ptr += sizeof(topo);
471		471
472	if (copy_to_user(ptr, mask, mask_size))	472	if (copy_to_user(*ptr, mask, mask_size))
473	return ERR_PTR(-EFAULT);	473	return -EFAULT;
474	ptr += mask_size;	474	*ptr += mask_size;
475		475
476	return ptr;	476	return 0;
477	}	477	}
478		478
479	static int query_gt_topology(struct xe_device *xe,	479	static int query_gt_topology(struct xe_device *xe,
@@ -493,28 +493,28 @@ static int query_gt_topology(struct xe_device *xe, · 13 unmodified lines
493	}	493	}
494		494
495	for_each_gt(gt, xe, id) {	495	for_each_gt(gt, xe, id) {
		496	int err;
		497
496	topo.gt_id = id;	498	topo.gt_id = id;
497		499
498	topo.type = DRM_XE_TOPO_DSS_GEOMETRY;	500	topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
499	query_ptr = copy_mask(query_ptr, &topo,	501	err = copy_mask(&query_ptr, &topo, gt->fuse_topo.g_dss_mask,
500	gt->fuse_topo.g_dss_mask,	502	sizeof(gt->fuse_topo.g_dss_mask));
501	sizeof(gt->fuse_topo.g_dss_mask));	503	if (err)
502	if (IS_ERR(query_ptr))	504	return err;
503	return PTR_ERR(query_ptr);
504		505
505	topo.type = DRM_XE_TOPO_DSS_COMPUTE;	506	topo.type = DRM_XE_TOPO_DSS_COMPUTE;
506	query_ptr = copy_mask(query_ptr, &topo,	507	err = copy_mask(&query_ptr, &topo, gt->fuse_topo.c_dss_mask,
507	gt->fuse_topo.c_dss_mask,	508	sizeof(gt->fuse_topo.c_dss_mask));
508	sizeof(gt->fuse_topo.c_dss_mask));	509	if (err)
509	if (IS_ERR(query_ptr))	510	return err;
510	return PTR_ERR(query_ptr);
511		511
512	topo.type = DRM_XE_TOPO_EU_PER_DSS;	512	topo.type = DRM_XE_TOPO_EU_PER_DSS;
513	query_ptr = copy_mask(query_ptr, &topo,	513	err = copy_mask(&query_ptr, &topo,
514	gt->fuse_topo.eu_mask_per_dss,	514	gt->fuse_topo.eu_mask_per_dss,
515	sizeof(gt->fuse_topo.eu_mask_per_dss));	515	sizeof(gt->fuse_topo.eu_mask_per_dss));
516	if (IS_ERR(query_ptr))	516	if (err)
517	return PTR_ERR(query_ptr);	517	return err;
518	}	518	}
519		519
520	return 0;	520	return 0;

drivers/gpu/drm/xe/xe_sync.h+5−0

@@ -33,4 +33,9 @@ struct dma_fence * · 32 unmodified lines
33	xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,	33	xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
34	struct xe_exec_queue q, struct xe_vm vm);	34	struct xe_exec_queue q, struct xe_vm vm);
35		35
		36	static inline bool xe_sync_is_ufence(struct xe_sync_entry *sync)
		37	{
		38	return !!sync->ufence;
		39	}
		40
36	#endif	41	#endif

drivers/gpu/drm/xe/xe_vm.c+99−66

@@ -46,7 +46,7 @@ static struct drm_gem_object xe_vm_obj(struct xe_vm vm) · 45 unmodified lines
46		46
47	/**	47	/**
48	* xe_vma_userptr_check_repin() - Advisory check for repin needed	48	* xe_vma_userptr_check_repin() - Advisory check for repin needed
49	* @vma: The userptr vma	49	* @uvma: The userptr vma
50	*	50	*
51	* Check if the userptr vma has been invalidated since last successful	51	* Check if the userptr vma has been invalidated since last successful
52	* repin. The check is advisory only and can the function can be called	52	* repin. The check is advisory only and can the function can be called
@@ -56,15 +56,17 @@ static struct drm_gem_object xe_vm_obj(struct xe_vm vm) · 3 unmodified lines
56	*	56	*
57	* Return: 0 if userptr vma is valid, -EAGAIN otherwise; repin recommended.	57	* Return: 0 if userptr vma is valid, -EAGAIN otherwise; repin recommended.
58	*/	58	*/
59	int xe_vma_userptr_check_repin(struct xe_vma *vma)	59	int xe_vma_userptr_check_repin(struct xe_userptr_vma *uvma)
60	{	60	{
61	return mmu_interval_check_retry(&vma->userptr.notifier,	61	return mmu_interval_check_retry(&uvma->userptr.notifier,
62	vma->userptr.notifier_seq) ?	62	uvma->userptr.notifier_seq) ?
63	-EAGAIN : 0;	63	-EAGAIN : 0;
64	}	64	}
65		65
66	int xe_vma_userptr_pin_pages(struct xe_vma *vma)	66	int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma)
67	{	67	{
		68	struct xe_userptr *userptr = &uvma->userptr;
		69	struct xe_vma *vma = &uvma->vma;
68	struct xe_vm *vm = xe_vma_vm(vma);	70	struct xe_vm *vm = xe_vma_vm(vma);
69	struct xe_device *xe = vm->xe;	71	struct xe_device *xe = vm->xe;
70	const unsigned long num_pages = xe_vma_size(vma) >> PAGE_SHIFT;	72	const unsigned long num_pages = xe_vma_size(vma) >> PAGE_SHIFT;
@@ -80,30 +82,30 @@ retry: · 9 unmodified lines
80	if (vma->gpuva.flags & XE_VMA_DESTROYED)	82	if (vma->gpuva.flags & XE_VMA_DESTROYED)
81	return 0;	83	return 0;
82		84
83	notifier_seq = mmu_interval_read_begin(&vma->userptr.notifier);	85	notifier_seq = mmu_interval_read_begin(&userptr->notifier);
84	if (notifier_seq == vma->userptr.notifier_seq)	86	if (notifier_seq == userptr->notifier_seq)
85	return 0;	87	return 0;
86		88
87	pages = kvmalloc_array(num_pages, sizeof(*pages), GFP_KERNEL);	89	pages = kvmalloc_array(num_pages, sizeof(*pages), GFP_KERNEL);
88	if (!pages)	90	if (!pages)
89	return -ENOMEM;	91	return -ENOMEM;
90		92
91	if (vma->userptr.sg) {	93	if (userptr->sg) {
92	dma_unmap_sgtable(xe->drm.dev,	94	dma_unmap_sgtable(xe->drm.dev,
93	vma->userptr.sg,	95	userptr->sg,
94	read_only ? DMA_TO_DEVICE :	96	read_only ? DMA_TO_DEVICE :
95	DMA_BIDIRECTIONAL, 0);	97	DMA_BIDIRECTIONAL, 0);
96	sg_free_table(vma->userptr.sg);	98	sg_free_table(userptr->sg);
97	vma->userptr.sg = NULL;	99	userptr->sg = NULL;
98	}	100	}
99		101
100	pinned = ret = 0;	102	pinned = ret = 0;
101	if (in_kthread) {	103	if (in_kthread) {
102	if (!mmget_not_zero(vma->userptr.notifier.mm)) {	104	if (!mmget_not_zero(userptr->notifier.mm)) {
103	ret = -EFAULT;	105	ret = -EFAULT;
104	goto mm_closed;	106	goto mm_closed;
105	}	107	}
106	kthread_use_mm(vma->userptr.notifier.mm);	108	kthread_use_mm(userptr->notifier.mm);
107	}	109	}
108		110
109	while (pinned < num_pages) {	111	while (pinned < num_pages) {
@@ -123,32 +125,32 @@ retry: · 13 unmodified lines
123	}	125	}
124		126
125	if (in_kthread) {	127	if (in_kthread) {
126	kthread_unuse_mm(vma->userptr.notifier.mm);	128	kthread_unuse_mm(userptr->notifier.mm);
127	mmput(vma->userptr.notifier.mm);	129	mmput(userptr->notifier.mm);
128	}	130	}
129	mm_closed:	131	mm_closed:
130	if (ret)	132	if (ret)
131	goto out;	133	goto out;
132		134
133	ret = sg_alloc_table_from_pages_segment(&vma->userptr.sgt, pages,	135	ret = sg_alloc_table_from_pages_segment(&userptr->sgt, pages,
134	pinned, 0,	136	pinned, 0,
135	(u64)pinned << PAGE_SHIFT,	137	(u64)pinned << PAGE_SHIFT,
136	xe_sg_segment_size(xe->drm.dev),	138	xe_sg_segment_size(xe->drm.dev),
137	GFP_KERNEL);	139	GFP_KERNEL);
138	if (ret) {	140	if (ret) {
139	vma->userptr.sg = NULL;	141	userptr->sg = NULL;
140	goto out;	142	goto out;
141	}	143	}
142	vma->userptr.sg = &vma->userptr.sgt;	144	userptr->sg = &userptr->sgt;
143		145
144	ret = dma_map_sgtable(xe->drm.dev, vma->userptr.sg,	146	ret = dma_map_sgtable(xe->drm.dev, userptr->sg,
145	read_only ? DMA_TO_DEVICE :	147	read_only ? DMA_TO_DEVICE :
146	DMA_BIDIRECTIONAL,	148	DMA_BIDIRECTIONAL,
147	DMA_ATTR_SKIP_CPU_SYNC \|	149	DMA_ATTR_SKIP_CPU_SYNC \|
148	DMA_ATTR_NO_KERNEL_MAPPING);	150	DMA_ATTR_NO_KERNEL_MAPPING);
149	if (ret) {	151	if (ret) {
150	sg_free_table(vma->userptr.sg);	152	sg_free_table(userptr->sg);
151	vma->userptr.sg = NULL;	153	userptr->sg = NULL;
152	goto out;	154	goto out;
153	}	155	}
154		156
@@ -167,8 +169,8 @@ out: · 12 unmodified lines
167	kvfree(pages);	169	kvfree(pages);
168		170
169	if (!(ret < 0)) {	171	if (!(ret < 0)) {
170	vma->userptr.notifier_seq = notifier_seq;	172	userptr->notifier_seq = notifier_seq;
171	if (xe_vma_userptr_check_repin(vma) == -EAGAIN)	173	if (xe_vma_userptr_check_repin(uvma) == -EAGAIN)
172	goto retry;	174	goto retry;
173	}	175	}
174		176
@@ -635,7 +637,9 @@ static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni, · 460 unmodified lines
635	const struct mmu_notifier_range *range,	637	const struct mmu_notifier_range *range,
636	unsigned long cur_seq)	638	unsigned long cur_seq)
637	{	639	{
638	struct xe_vma *vma = container_of(mni, struct xe_vma, userptr.notifier);	640	struct xe_userptr userptr = container_of(mni, typeof(userptr), notifier);
		641	struct xe_userptr_vma uvma = container_of(userptr, typeof(uvma), userptr);
		642	struct xe_vma *vma = &uvma->vma;
639	struct xe_vm *vm = xe_vma_vm(vma);	643	struct xe_vm *vm = xe_vma_vm(vma);
640	struct dma_resv_iter cursor;	644	struct dma_resv_iter cursor;
641	struct dma_fence *fence;	645	struct dma_fence *fence;
@@ -651,7 +655,7 @@ static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni, · 9 unmodified lines
651	mmu_interval_set_seq(mni, cur_seq);	655	mmu_interval_set_seq(mni, cur_seq);
652		656
653	/* No need to stop gpu access if the userptr is not yet bound. */	657	/* No need to stop gpu access if the userptr is not yet bound. */
654	if (!vma->userptr.initial_bind) {	658	if (!userptr->initial_bind) {
655	up_write(&vm->userptr.notifier_lock);	659	up_write(&vm->userptr.notifier_lock);
656	return true;	660	return true;
657	}	661	}
@@ -663,7 +667,7 @@ static bool vma_userptr_invalidate(struct mmu_interval_notifier *mni, · 5 unmodified lines
663	if (!xe_vm_in_fault_mode(vm) &&	667	if (!xe_vm_in_fault_mode(vm) &&
664	!(vma->gpuva.flags & XE_VMA_DESTROYED) && vma->tile_present) {	668	!(vma->gpuva.flags & XE_VMA_DESTROYED) && vma->tile_present) {
665	spin_lock(&vm->userptr.invalidated_lock);	669	spin_lock(&vm->userptr.invalidated_lock);
666	list_move_tail(&vma->userptr.invalidate_link,	670	list_move_tail(&userptr->invalidate_link,
667	&vm->userptr.invalidated);	671	&vm->userptr.invalidated);
668	spin_unlock(&vm->userptr.invalidated_lock);	672	spin_unlock(&vm->userptr.invalidated_lock);
669	}	673	}
@@ -703,7 +707,7 @@ static const struct mmu_interval_notifier_ops vma_userptr_notifier_ops = { · 33 unmodified lines
703		707
704	int xe_vm_userptr_pin(struct xe_vm *vm)	708	int xe_vm_userptr_pin(struct xe_vm *vm)
705	{	709	{
706	struct xe_vma vma, next;	710	struct xe_userptr_vma uvma, next;
707	int err = 0;	711	int err = 0;
708	LIST_HEAD(tmp_evict);	712	LIST_HEAD(tmp_evict);
709		713
@@ -711,22 +715,23 @@ int xe_vm_userptr_pin(struct xe_vm *vm) · 1 unmodified line
711		715
712	/* Collect invalidated userptrs */	716	/* Collect invalidated userptrs */
713	spin_lock(&vm->userptr.invalidated_lock);	717	spin_lock(&vm->userptr.invalidated_lock);
714	list_for_each_entry_safe(vma, next, &vm->userptr.invalidated,	718	list_for_each_entry_safe(uvma, next, &vm->userptr.invalidated,
715	userptr.invalidate_link) {	719	userptr.invalidate_link) {
716	list_del_init(&vma->userptr.invalidate_link);	720	list_del_init(&uvma->userptr.invalidate_link);
717	list_move_tail(&vma->combined_links.userptr,	721	list_move_tail(&uvma->userptr.repin_link,
718	&vm->userptr.repin_list);	722	&vm->userptr.repin_list);
719	}	723	}
720	spin_unlock(&vm->userptr.invalidated_lock);	724	spin_unlock(&vm->userptr.invalidated_lock);
721		725
722	/* Pin and move to temporary list */	726	/* Pin and move to temporary list */
723	list_for_each_entry_safe(vma, next, &vm->userptr.repin_list,	727	list_for_each_entry_safe(uvma, next, &vm->userptr.repin_list,
724	combined_links.userptr) {	728	userptr.repin_link) {
725	err = xe_vma_userptr_pin_pages(vma);	729	err = xe_vma_userptr_pin_pages(uvma);
726	if (err < 0)	730	if (err < 0)
727	return err;	731	return err;
728		732
729	list_move_tail(&vma->combined_links.userptr, &vm->rebind_list);	733	list_del_init(&uvma->userptr.repin_link);
		734	list_move_tail(&uvma->vma.combined_links.rebind, &vm->rebind_list);
730	}	735	}
731		736
732	return 0;	737	return 0;
@@ -782,6 +787,14 @@ struct dma_fence xe_vm_rebind(struct xe_vm vm, bool rebind_worker) · 49 unmodified lines
782	return fence;	787	return fence;
783	}	788	}
784		789
		790	static void xe_vma_free(struct xe_vma *vma)
		791	{
		792	if (xe_vma_is_userptr(vma))
		793	kfree(to_userptr_vma(vma));
		794	else
		795	kfree(vma);
		796	}
		797
785	#define VMA_CREATE_FLAG_READ_ONLY BIT(0)	798	#define VMA_CREATE_FLAG_READ_ONLY BIT(0)
786	#define VMA_CREATE_FLAG_IS_NULL BIT(1)	799	#define VMA_CREATE_FLAG_IS_NULL BIT(1)
787		800
@@ -800,14 +813,26 @@ static struct xe_vma xe_vma_create(struct xe_vm vm, · 12 unmodified lines
800	xe_assert(vm->xe, start < end);	813	xe_assert(vm->xe, start < end);
801	xe_assert(vm->xe, end < vm->size);	814	xe_assert(vm->xe, end < vm->size);
802		815
803	if (!bo && !is_null) /* userptr */	816	/*
		817	* Allocate and ensure that the xe_vma_is_userptr() return
		818	* matches what was allocated.
		819	*/
		820	if (!bo && !is_null) {
		821	struct xe_userptr_vma uvma = kzalloc(sizeof(uvma), GFP_KERNEL);
		822
		823	if (!uvma)
		824	return ERR_PTR(-ENOMEM);
		825
		826	vma = &uvma->vma;
		827	} else {
804	vma = kzalloc(sizeof(*vma), GFP_KERNEL);	828	vma = kzalloc(sizeof(*vma), GFP_KERNEL);
805	else	829	if (!vma)
806	vma = kzalloc(sizeof(*vma) - sizeof(struct xe_userptr),	830	return ERR_PTR(-ENOMEM);
807	GFP_KERNEL);	831
808	if (!vma) {	832	if (is_null)
809	vma = ERR_PTR(-ENOMEM);	833	vma->gpuva.flags \|= DRM_GPUVA_SPARSE;
810	return vma;	834	if (bo)
		835	vma->gpuva.gem.obj = &bo->ttm.base;
811	}	836	}
812		837
813	INIT_LIST_HEAD(&vma->combined_links.rebind);	838	INIT_LIST_HEAD(&vma->combined_links.rebind);
@@ -818,8 +843,6 @@ static struct xe_vma xe_vma_create(struct xe_vm vm, · 4 unmodified lines
818	vma->gpuva.va.range = end - start + 1;	843	vma->gpuva.va.range = end - start + 1;
819	if (read_only)	844	if (read_only)
820	vma->gpuva.flags \|= XE_VMA_READ_ONLY;	845	vma->gpuva.flags \|= XE_VMA_READ_ONLY;
821	if (is_null)
822	vma->gpuva.flags \|= DRM_GPUVA_SPARSE;
823		846
824	for_each_tile(tile, vm->xe, id)	847	for_each_tile(tile, vm->xe, id)
825	vma->tile_mask \|= 0x1 << id;	848	vma->tile_mask \|= 0x1 << id;
@@ -836,35 +859,35 @@ static struct xe_vma xe_vma_create(struct xe_vm vm, · 10 unmodified lines
836		859
837	vm_bo = drm_gpuvm_bo_obtain(vma->gpuva.vm, &bo->ttm.base);	860	vm_bo = drm_gpuvm_bo_obtain(vma->gpuva.vm, &bo->ttm.base);
838	if (IS_ERR(vm_bo)) {	861	if (IS_ERR(vm_bo)) {
839	kfree(vma);	862	xe_vma_free(vma);
840	return ERR_CAST(vm_bo);	863	return ERR_CAST(vm_bo);
841	}	864	}
842		865
843	drm_gpuvm_bo_extobj_add(vm_bo);	866	drm_gpuvm_bo_extobj_add(vm_bo);
844	drm_gem_object_get(&bo->ttm.base);	867	drm_gem_object_get(&bo->ttm.base);
845	vma->gpuva.gem.obj = &bo->ttm.base;
846	vma->gpuva.gem.offset = bo_offset_or_userptr;	868	vma->gpuva.gem.offset = bo_offset_or_userptr;
847	drm_gpuva_link(&vma->gpuva, vm_bo);	869	drm_gpuva_link(&vma->gpuva, vm_bo);
848	drm_gpuvm_bo_put(vm_bo);	870	drm_gpuvm_bo_put(vm_bo);
849	} else /* userptr or null */ {	871	} else /* userptr or null */ {
850	if (!is_null) {	872	if (!is_null) {
		873	struct xe_userptr *userptr = &to_userptr_vma(vma)->userptr;
851	u64 size = end - start + 1;	874	u64 size = end - start + 1;
852	int err;	875	int err;
853		876
854	INIT_LIST_HEAD(&vma->userptr.invalidate_link);	877	INIT_LIST_HEAD(&userptr->invalidate_link);
		878	INIT_LIST_HEAD(&userptr->repin_link);
855	vma->gpuva.gem.offset = bo_offset_or_userptr;	879	vma->gpuva.gem.offset = bo_offset_or_userptr;
856		880
857	err = mmu_interval_notifier_insert(&vma->userptr.notifier,	881	err = mmu_interval_notifier_insert(&userptr->notifier,
858	current->mm,	882	current->mm,
859	xe_vma_userptr(vma), size,	883	xe_vma_userptr(vma), size,
860	&vma_userptr_notifier_ops);	884	&vma_userptr_notifier_ops);
861	if (err) {	885	if (err) {
862	kfree(vma);	886	xe_vma_free(vma);
863	vma = ERR_PTR(err);	887	return ERR_PTR(err);
864	return vma;
865	}	888	}
866		889
867	vma->userptr.notifier_seq = LONG_MAX;	890	userptr->notifier_seq = LONG_MAX;
868	}	891	}
869		892
870	xe_vm_get(vm);	893	xe_vm_get(vm);
@@ -880,13 +903,15 @@ static void xe_vma_destroy_late(struct xe_vma *vma) · 9 unmodified lines
880	bool read_only = xe_vma_read_only(vma);	903	bool read_only = xe_vma_read_only(vma);
881		904
882	if (xe_vma_is_userptr(vma)) {	905	if (xe_vma_is_userptr(vma)) {
883	if (vma->userptr.sg) {	906	struct xe_userptr *userptr = &to_userptr_vma(vma)->userptr;
		907
		908	if (userptr->sg) {
884	dma_unmap_sgtable(xe->drm.dev,	909	dma_unmap_sgtable(xe->drm.dev,
885	vma->userptr.sg,	910	userptr->sg,
886	read_only ? DMA_TO_DEVICE :	911	read_only ? DMA_TO_DEVICE :
887	DMA_BIDIRECTIONAL, 0);	912	DMA_BIDIRECTIONAL, 0);
888	sg_free_table(vma->userptr.sg);	913	sg_free_table(userptr->sg);
889	vma->userptr.sg = NULL;	914	userptr->sg = NULL;
890	}	915	}
891		916
892	/*	917	/*
@@ -894,7 +919,7 @@ static void xe_vma_destroy_late(struct xe_vma *vma) · 1 unmodified line
894	* the notifer until we're sure the GPU is not accessing	919	* the notifer until we're sure the GPU is not accessing
895	* them anymore	920	* them anymore
896	*/	921	*/
897	mmu_interval_notifier_remove(&vma->userptr.notifier);	922	mmu_interval_notifier_remove(&userptr->notifier);
898	xe_vm_put(vm);	923	xe_vm_put(vm);
899	} else if (xe_vma_is_null(vma)) {	924	} else if (xe_vma_is_null(vma)) {
900	xe_vm_put(vm);	925	xe_vm_put(vm);
@@ -902,7 +927,7 @@ static void xe_vma_destroy_late(struct xe_vma *vma) · 1 unmodified line
902	xe_bo_put(xe_vma_bo(vma));	927	xe_bo_put(xe_vma_bo(vma));
903	}	928	}
904		929
905	kfree(vma);	930	xe_vma_free(vma);
906	}	931	}
907		932
908	static void vma_destroy_work_func(struct work_struct *w)	933	static void vma_destroy_work_func(struct work_struct *w)
@@ -933,7 +958,7 @@ static void xe_vma_destroy(struct xe_vma vma, struct dma_fence fence) · 24 unmodified lines
933	xe_assert(vm->xe, vma->gpuva.flags & XE_VMA_DESTROYED);	958	xe_assert(vm->xe, vma->gpuva.flags & XE_VMA_DESTROYED);
934		959
935	spin_lock(&vm->userptr.invalidated_lock);	960	spin_lock(&vm->userptr.invalidated_lock);
936	list_del(&vma->userptr.invalidate_link);	961	list_del(&to_userptr_vma(vma)->userptr.invalidate_link);
937	spin_unlock(&vm->userptr.invalidated_lock);	962	spin_unlock(&vm->userptr.invalidated_lock);
938	} else if (!xe_vma_is_null(vma)) {	963	} else if (!xe_vma_is_null(vma)) {
939	xe_bo_assert_held(xe_vma_bo(vma));	964	xe_bo_assert_held(xe_vma_bo(vma));
@@ -2150,7 +2175,7 @@ static struct xe_vma new_vma(struct xe_vm vm, struct drm_gpuva_op_map *op, · 1210 unmodified lines
2150	drm_exec_fini(&exec);	2175	drm_exec_fini(&exec);
2151		2176
2152	if (xe_vma_is_userptr(vma)) {	2177	if (xe_vma_is_userptr(vma)) {
2153	err = xe_vma_userptr_pin_pages(vma);	2178	err = xe_vma_userptr_pin_pages(to_userptr_vma(vma));
2154	if (err) {	2179	if (err) {
2155	prep_vma_destroy(vm, vma, false);	2180	prep_vma_destroy(vm, vma, false);
2156	xe_vma_destroy_unlocked(vma);	2181	xe_vma_destroy_unlocked(vma);
@@ -2507,7 +2532,7 @@ retry_userptr: · 350 unmodified lines
2507		2532
2508	if (err == -EAGAIN && xe_vma_is_userptr(vma)) {	2533	if (err == -EAGAIN && xe_vma_is_userptr(vma)) {
2509	lockdep_assert_held_write(&vm->lock);	2534	lockdep_assert_held_write(&vm->lock);
2510	err = xe_vma_userptr_pin_pages(vma);	2535	err = xe_vma_userptr_pin_pages(to_userptr_vma(vma));
2511	if (!err)	2536	if (!err)
2512	goto retry_userptr;	2537	goto retry_userptr;
2513		2538
@@ -2851,7 +2876,7 @@ int xe_vm_bind_ioctl(struct drm_device dev, void data, struct drm_file *file) · 337 unmodified lines
2851	struct drm_gpuva_ops **ops = NULL;	2876	struct drm_gpuva_ops **ops = NULL;
2852	struct xe_vm *vm;	2877	struct xe_vm *vm;
2853	struct xe_exec_queue *q = NULL;	2878	struct xe_exec_queue *q = NULL;
2854	u32 num_syncs;	2879	u32 num_syncs, num_ufence = 0;
2855	struct xe_sync_entry *syncs = NULL;	2880	struct xe_sync_entry *syncs = NULL;
2856	struct drm_xe_vm_bind_op *bind_ops;	2881	struct drm_xe_vm_bind_op *bind_ops;
2857	LIST_HEAD(ops_list);	2882	LIST_HEAD(ops_list);
@@ -2988,6 +3013,14 @@ int xe_vm_bind_ioctl(struct drm_device dev, void data, struct drm_file *file) · 130 unmodified lines
2988	SYNC_PARSE_FLAG_DISALLOW_USER_FENCE : 0));	3013	SYNC_PARSE_FLAG_DISALLOW_USER_FENCE : 0));
2989	if (err)	3014	if (err)
2990	goto free_syncs;	3015	goto free_syncs;
		3016
		3017	if (xe_sync_is_ufence(&syncs[num_syncs]))
		3018	num_ufence++;
		3019	}
		3020
		3021	if (XE_IOCTL_DBG(xe, num_ufence > 1)) {
		3022	err = -EINVAL;
		3023	goto free_syncs;
2991	}	3024	}
2992		3025
2993	if (!args->num_binds) {	3026	if (!args->num_binds) {
@@ -3130,8 +3163,8 @@ int xe_vm_invalidate_vma(struct xe_vma *vma) · 136 unmodified lines
3130	if (IS_ENABLED(CONFIG_PROVE_LOCKING)) {	3163	if (IS_ENABLED(CONFIG_PROVE_LOCKING)) {
3131	if (xe_vma_is_userptr(vma)) {	3164	if (xe_vma_is_userptr(vma)) {
3132	WARN_ON_ONCE(!mmu_interval_check_retry	3165	WARN_ON_ONCE(!mmu_interval_check_retry
3133	(&vma->userptr.notifier,	3166	(&to_userptr_vma(vma)->userptr.notifier,
3134	vma->userptr.notifier_seq));	3167	to_userptr_vma(vma)->userptr.notifier_seq));
3135	WARN_ON_ONCE(!dma_resv_test_signaled(xe_vm_resv(xe_vma_vm(vma)),	3168	WARN_ON_ONCE(!dma_resv_test_signaled(xe_vm_resv(xe_vma_vm(vma)),
3136	DMA_RESV_USAGE_BOOKKEEP));	3169	DMA_RESV_USAGE_BOOKKEEP));
3137		3170
@@ -3192,11 +3225,11 @@ int xe_analyze_vm(struct drm_printer p, struct xe_vm vm, int gt_id) · 54 unmodified lines
3192	if (is_null) {	3225	if (is_null) {
3193	addr = 0;	3226	addr = 0;
3194	} else if (is_userptr) {	3227	} else if (is_userptr) {
		3228	struct sg_table *sg = to_userptr_vma(vma)->userptr.sg;
3195	struct xe_res_cursor cur;	3229	struct xe_res_cursor cur;
3196		3230
3197	if (vma->userptr.sg) {	3231	if (sg) {
3198	xe_res_first_sg(vma->userptr.sg, 0, XE_PAGE_SIZE,	3232	xe_res_first_sg(sg, 0, XE_PAGE_SIZE, &cur);
3199	&cur);
3200	addr = xe_res_dma(&cur);	3233	addr = xe_res_dma(&cur);
3201	} else {	3234	} else {
3202	addr = 0;	3235	addr = 0;

drivers/gpu/drm/xe/xe_vm.h+14−2

 	return xe_vma_has_no_bo(vma) && !xe_vma_is_null(vma);
 }
+/**
+ * to_userptr_vma() - Return a pointer to an embedding userptr vma
+ * @vma: Pointer to the embedded struct xe_vma
+ *
+ * Return: Pointer to the embedding userptr vma
+ */
+static inline struct xe_userptr_vma *to_userptr_vma(struct xe_vma *vma)
+{
+	xe_assert(xe_vma_vm(vma)->xe, xe_vma_is_userptr(vma));
+	return container_of(vma, struct xe_userptr_vma, vma);
+}
 u64 xe_vm_pdp4_descriptor(struct xe_vm *vm, struct xe_tile *tile);
 int xe_vm_create_ioctl(struct drm_device *dev, void *data,
 	}
 }
-int xe_vma_userptr_pin_pages(struct xe_vma *vma);
+int xe_vma_userptr_pin_pages(struct xe_userptr_vma *uvma);
-int xe_vma_userptr_check_repin(struct xe_vma *vma);
+int xe_vma_userptr_check_repin(struct xe_userptr_vma *uvma);
 bool xe_vm_validate_should_retry(struct drm_exec *exec, int err, ktime_t *end);

drivers/gpu/drm/xe/xe_vm_types.h+10−6

 struct xe_userptr {
 	/** @invalidate_link: Link for the vm::userptr.invalidated list */
 	struct list_head invalidate_link;
+	/** @userptr: link into VM repin list if userptr. */
+	struct list_head repin_link;
 	/**
 	 * @notifier: MMU notifier for user pointer (invalidation call back)
 	 */
 	 * resv.
 	 */
 	union {
-		/** @userptr: link into VM repin list if userptr. */
-		struct list_head userptr;
 		/** @rebind: link into VM if this VMA needs rebinding. */
 		struct list_head rebind;
 		/** @destroy: link to contested list when VM is being closed. */
 	 * @pat_index: The pat index to use when encoding the PTEs for this vma.
 	 */
 	u16 pat_index;
+};
-	/**
+/**
-	 * @userptr: user pointer state, only allocated for VMAs that are
+ * struct xe_userptr_vma - A userptr vma subclass
-	 * user pointers
+ * @vma: The vma.
-	 */
+ * @userptr: Additional userptr information.
+ */
+struct xe_userptr_vma {
+	struct xe_vma vma;
 	struct xe_userptr userptr;
 };

drivers/hwmon/gigabyte_waterforce.c+1−1

@@ -146,7 +146,7 @@ static int waterforce_get_status(struct waterforce_data *priv) · 145 unmodified lines
146	/* Send command for getting status */	146	/* Send command for getting status */
147	ret = waterforce_write_expanded(priv, get_status_cmd, GET_STATUS_CMD_LENGTH);	147	ret = waterforce_write_expanded(priv, get_status_cmd, GET_STATUS_CMD_LENGTH);
148	if (ret < 0)	148	if (ret < 0)
149	return ret;	149	goto unlock_and_return;
150		150
151	ret = wait_for_completion_interruptible_timeout(&priv->status_report_received,	151	ret = wait_for_completion_interruptible_timeout(&priv->status_report_received,
152	msecs_to_jiffies(STATUS_VALIDITY));	152	msecs_to_jiffies(STATUS_VALIDITY));

drivers/hwmon/pmbus/mp2975.c+16−0

@@ -126,6 +126,21 @@ static const struct regulator_desc __maybe_unused mp2975_reg_desc[] = { · 125 unmodified lines
126		126
127	#define to_mp2975_data(x) container_of(x, struct mp2975_data, info)	127	#define to_mp2975_data(x) container_of(x, struct mp2975_data, info)
128		128
		129	static int mp2975_read_byte_data(struct i2c_client *client, int page, int reg)
		130	{
		131	switch (reg) {
		132	case PMBUS_VOUT_MODE:
		133	/*
		134	* Report direct format as configured by MFR_DC_LOOP_CTRL.
		135	* Unlike on MP2971/MP2973 the reported VOUT_MODE isn't automatically
		136	* internally updated, but always reads as PB_VOUT_MODE_VID.
		137	*/
		138	return PB_VOUT_MODE_DIRECT;
		139	default:
		140	return -ENODATA;
		141	}
		142	}
		143
129	static int	144	static int
130	mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg,	145	mp2975_read_word_helper(struct i2c_client *client, int page, int phase, u8 reg,
131	u16 mask)	146	u16 mask)
@@ -869,6 +884,7 @@ static struct pmbus_driver_info mp2975_info = { · 737 unmodified lines
869	PMBUS_HAVE_IIN \| PMBUS_HAVE_IOUT \| PMBUS_HAVE_STATUS_IOUT \|	884	PMBUS_HAVE_IIN \| PMBUS_HAVE_IOUT \| PMBUS_HAVE_STATUS_IOUT \|
870	PMBUS_HAVE_TEMP \| PMBUS_HAVE_STATUS_TEMP \| PMBUS_HAVE_POUT \|	885	PMBUS_HAVE_TEMP \| PMBUS_HAVE_STATUS_TEMP \| PMBUS_HAVE_POUT \|
871	PMBUS_HAVE_PIN \| PMBUS_HAVE_STATUS_INPUT \| PMBUS_PHASE_VIRTUAL,	886	PMBUS_HAVE_PIN \| PMBUS_HAVE_STATUS_INPUT \| PMBUS_PHASE_VIRTUAL,
		887	.read_byte_data = mp2975_read_byte_data,
872	.read_word_data = mp2975_read_word_data,	888	.read_word_data = mp2975_read_word_data,
873	#if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)	889	#if IS_ENABLED(CONFIG_SENSORS_MP2975_REGULATOR)
874	.num_regulators = 1,	890	.num_regulators = 1,

drivers/input/joystick/xpad.c+2−0

 	{ 0x1689, 0xfd00, "Razer Onza Tournament Edition", 0, XTYPE_XBOX360 },
 	{ 0x1689, 0xfd01, "Razer Onza Classic Edition", 0, XTYPE_XBOX360 },
 	{ 0x1689, 0xfe00, "Razer Sabertooth", 0, XTYPE_XBOX360 },
+	{ 0x17ef, 0x6182, "Lenovo Legion Controller for Windows", 0, XTYPE_XBOX360 },
 	{ 0x1949, 0x041a, "Amazon Game Controller", 0, XTYPE_XBOX360 },
 	{ 0x1bad, 0x0002, "Harmonix Rock Band Guitar", 0, XTYPE_XBOX360 },
 	{ 0x1bad, 0x0003, "Harmonix Rock Band Drumkit", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX360 },
 	XPAD_XBOX360_VENDOR(0x15e4),		/* Numark Xbox 360 controllers */
 	XPAD_XBOX360_VENDOR(0x162e),		/* Joytech Xbox 360 controllers */
 	XPAD_XBOX360_VENDOR(0x1689),		/* Razer Onza */
+	XPAD_XBOX360_VENDOR(0x17ef),		/* Lenovo */
 	XPAD_XBOX360_VENDOR(0x1949),		/* Amazon controllers */
 	XPAD_XBOX360_VENDOR(0x1bad),		/* Harmonix Rock Band guitar and drums */
 	XPAD_XBOX360_VENDOR(0x20d6),		/* PowerA controllers */

drivers/input/keyboard/atkbd.c+9−5

 {
 	struct ps2dev *ps2dev = &atkbd->ps2dev;
 	unsigned char param[2];
-	bool skip_getid;
 /*
  * Some systems, where the bit-twiddling when testing the io-lines of the
 				 "keyboard reset failed on %s\n",
 				 ps2dev->serio->phys);
+	if (atkbd_skip_getid(atkbd)) {
+		atkbd->id = 0xab83;
+		goto deactivate_kbd;
+	}
 /*
  * Then we check the keyboard ID. We should get 0xab83 under normal conditions.
  * Some keyboards report different values, but the first byte is always 0xab or
  */
 	param[0] = param[1] = 0xa5;	/* initialize with invalid values */
-	skip_getid = atkbd_skip_getid(atkbd);
+	if (ps2_command(ps2dev, param, ATKBD_CMD_GETID)) {
-	if (skip_getid || ps2_command(ps2dev, param, ATKBD_CMD_GETID)) {
 /*
- * If the get ID command was skipped or failed, we check if we can at least set
+ * If the get ID command failed, we check if we can at least set
  * the LEDs on the keyboard. This should work on every keyboard out there.
  * It also turns the LEDs off, which we want anyway.
  */
 		param[0] = 0;
 		if (ps2_command(ps2dev, param, ATKBD_CMD_SETLEDS))
 			return -1;
-		atkbd->id = skip_getid ? 0xab83 : 0xabba;
+		atkbd->id = 0xabba;
 		return 0;
 	}
 		return -1;
 	}
+deactivate_kbd:
 /*
  * Make sure nothing is coming from the keyboard and disturbs our
  * internal state.

drivers/input/mouse/bcm5974.c+20−0

  * Copyright (C) 2006	   Nicolas Boichat (nicolas@boichat.ch)
  */
+#include "linux/usb.h"
 #include <linux/kernel.h>
 #include <linux/errno.h>
 #include <linux/slab.h>
 /* list of device capability bits */
 #define HAS_INTEGRATED_BUTTON	1
+/* maximum number of supported endpoints (currently trackpad and button) */
+#define MAX_ENDPOINTS	2
 /* trackpad finger data block size */
 #define FSIZE_TYPE1		(14 * sizeof(__le16))
 	return error;
 }
+static bool bcm5974_check_endpoints(struct usb_interface *iface,
+				    const struct bcm5974_config *cfg)
+{
+	u8 ep_addr[MAX_ENDPOINTS + 1] = {0};
+	ep_addr[0] = cfg->tp_ep;
+	if (cfg->tp_type == TYPE1)
+		ep_addr[1] = cfg->bt_ep;
+	return usb_check_int_endpoints(iface, ep_addr);
+}
 static int bcm5974_probe(struct usb_interface *iface,
 			 const struct usb_device_id *id)
 {
 	/* find the product index */
 	cfg = bcm5974_get_config(udev);
+	if (!bcm5974_check_endpoints(iface, cfg)) {
+		dev_err(&iface->dev, "Unexpected non-int endpoint\n");
+		return -ENODEV;
+	}
 	/* allocate memory for our device state and initialize it */
 	dev = kzalloc(sizeof(struct bcm5974), GFP_KERNEL);
 	input_dev = input_allocate_device();

drivers/input/serio/i8042-acpipnpio.h+14−0

@@ -634,6 +634,14 @@ static const struct dmi_system_id i8042_dmi_quirk_table[] __initconst = { · 633 unmodified lines
634	},	634	},
635	.driver_data = (void *)(SERIO_QUIRK_NOAUX)	635	.driver_data = (void *)(SERIO_QUIRK_NOAUX)
636	},	636	},
		637	{
		638	/* Fujitsu Lifebook U728 */
		639	.matches = {
		640	DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
		641	DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK U728"),
		642	},
		643	.driver_data = (void *)(SERIO_QUIRK_NOAUX)
		644	},
637	{	645	{
638	/* Gigabyte M912 */	646	/* Gigabyte M912 */
639	.matches = {	647	.matches = {
@@ -1208,6 +1216,12 @@ static const struct dmi_system_id i8042_dmi_quirk_table[] __initconst = { · 568 unmodified lines
1208	SERIO_QUIRK_RESET_ALWAYS \| SERIO_QUIRK_NOLOOP \|	1216	SERIO_QUIRK_RESET_ALWAYS \| SERIO_QUIRK_NOLOOP \|
1209	SERIO_QUIRK_NOPNP)	1217	SERIO_QUIRK_NOPNP)
1210	},	1218	},
		1219	{
		1220	.matches = {
		1221	DMI_MATCH(DMI_BOARD_NAME, "NS5x_7xPU"),
		1222	},
		1223	.driver_data = (void *)(SERIO_QUIRK_NOAUX)
		1224	},
1211	{	1225	{
1212	.matches = {	1226	.matches = {
1213	DMI_MATCH(DMI_BOARD_NAME, "NJ50_70CU"),	1227	DMI_MATCH(DMI_BOARD_NAME, "NJ50_70CU"),

drivers/input/touchscreen/goodix.c+2−1

@@ -884,7 +884,8 @@ static int goodix_add_acpi_gpio_mappings(struct goodix_ts_data *ts) · 883 unmodified lines
884	}	884	}
885	}	885	}
886		886
887	if (ts->gpio_count == 2 && ts->gpio_int_idx == 0) {	887	/* Some devices with gpio_int_idx 0 list a third unused GPIO */
		888	if ((ts->gpio_count == 2 \|\| ts->gpio_count == 3) && ts->gpio_int_idx == 0) {
888	ts->irq_pin_access_method = IRQ_PIN_ACCESS_ACPI_GPIO;	889	ts->irq_pin_access_method = IRQ_PIN_ACCESS_ACPI_GPIO;
889	gpio_mapping = acpi_goodix_int_first_gpios;	890	gpio_mapping = acpi_goodix_int_first_gpios;
890	} else if (ts->gpio_count == 2 && ts->gpio_int_idx == 1) {	891	} else if (ts->gpio_count == 2 && ts->gpio_int_idx == 1) {

drivers/iommu/iommu.c+13−5

@@ -1799,7 +1799,7 @@ iommu_group_alloc_default_domain(struct iommu_group *group, int req_type) · 1798 unmodified lines
1799	* domain. Do not use in new drivers.	1799	* domain. Do not use in new drivers.
1800	*/	1800	*/
1801	if (ops->default_domain) {	1801	if (ops->default_domain) {
1802	if (req_type)	1802	if (req_type != ops->default_domain->type)
1803	return ERR_PTR(-EINVAL);	1803	return ERR_PTR(-EINVAL);
1804	return ops->default_domain;	1804	return ops->default_domain;
1805	}	1805	}
@@ -1871,10 +1871,18 @@ static int iommu_get_def_domain_type(struct iommu_group *group, · 65 unmodified lines
1871	const struct iommu_ops *ops = dev_iommu_ops(dev);	1871	const struct iommu_ops *ops = dev_iommu_ops(dev);
1872	int type;	1872	int type;
1873		1873
1874	if (!ops->def_domain_type)	1874	if (ops->default_domain) {
1875	return cur_type;	1875	/*
1876		1876	* Drivers that declare a global static default_domain will
1877	type = ops->def_domain_type(dev);	1877	* always choose that.
		1878	*/
		1879	type = ops->default_domain->type;
		1880	} else {
		1881	if (ops->def_domain_type)
		1882	type = ops->def_domain_type(dev);
		1883	else
		1884	return cur_type;
		1885	}
1878	if (!type \|\| cur_type == type)	1886	if (!type \|\| cur_type == type)
1879	return cur_type;	1887	return cur_type;
1880	if (!cur_type)	1888	if (!cur_type)

drivers/md/dm-core.h+2−0

@@ -22,6 +22,8 @@ · 21 unmodified lines
22	#include "dm-ima.h"	22	#include "dm-ima.h"
23		23
24	#define DM_RESERVED_MAX_IOS 1024	24	#define DM_RESERVED_MAX_IOS 1024
		25	#define DM_MAX_TARGETS 1048576
		26	#define DM_MAX_TARGET_PARAMS 1024
25		27
26	struct dm_io;	28	struct dm_io;
27		29

drivers/md/dm-crypt.c+2−36

 	struct bio *base_bio;
 	u8 *integrity_metadata;
 	bool integrity_metadata_from_pool:1;
-	bool in_tasklet:1;
 	struct work_struct work;
-	struct tasklet_struct tasklet;
 	struct convert_context ctx;
 	io->ctx.r.req = NULL;
 	io->integrity_metadata = NULL;
 	io->integrity_metadata_from_pool = false;
-	io->in_tasklet = false;
 	atomic_set(&io->io_pending, 0);
 }
 	atomic_inc(&io->io_pending);
 }
-static void kcryptd_io_bio_endio(struct work_struct *work)
-{
-	struct dm_crypt_io *io = container_of(work, struct dm_crypt_io, work);
-	bio_endio(io->base_bio);
-}
 /*
  * One of the bios was finished. Check for completion of
  * the whole request and correctly clean up the buffer.
 	base_bio->bi_status = error;
-	/*
-	 * If we are running this function from our tasklet,
-	 * we can't call bio_endio() here, because it will call
-	 * clone_endio() from dm.c, which in turn will
-	 * free the current struct dm_crypt_io structure with
-	 * our tasklet. In this case we need to delay bio_endio()
-	 * execution to after the tasklet is done and dequeued.
-	 */
-	if (io->in_tasklet) {
-		INIT_WORK(&io->work, kcryptd_io_bio_endio);
-		queue_work(cc->io_queue, &io->work);
-		return;
-	}
 	bio_endio(base_bio);
 }
 		kcryptd_crypt_write_convert(io);
 }
-static void kcryptd_crypt_tasklet(unsigned long work)
-{
-	kcryptd_crypt((struct work_struct *)work);
-}
 static void kcryptd_queue_crypt(struct dm_crypt_io *io)
 {
 	struct crypt_config *cc = io->cc;
 		 * irqs_disabled(): the kernel may run some IO completion from the idle thread, but
 		 * it is being executed with irqs disabled.
 		 */
-		if (in_hardirq() || irqs_disabled()) {
+		if (!(in_hardirq() || irqs_disabled())) {
-			io->in_tasklet = true;
+			kcryptd_crypt(&io->work);
-			tasklet_init(&io->tasklet, kcryptd_crypt_tasklet, (unsigned long)&io->work);
-			tasklet_schedule(&io->tasklet);
 			return;
 		}
-		kcryptd_crypt(&io->work);
-		return;
 	}
 	INIT_WORK(&io->work, kcryptd_crypt);

drivers/md/dm-ioctl.c+2−1

@@ -1941,7 +1941,8 @@ static int copy_params(struct dm_ioctl __user user, struct dm_ioctl param_kern · 1940 unmodified lines
1941	minimum_data_size - sizeof(param_kernel->version)))	1941	minimum_data_size - sizeof(param_kernel->version)))
1942	return -EFAULT;	1942	return -EFAULT;
1943		1943
1944	if (param_kernel->data_size < minimum_data_size) {	1944	if (unlikely(param_kernel->data_size < minimum_data_size) \|\|
		1945	unlikely(param_kernel->data_size > DM_MAX_TARGETS * DM_MAX_TARGET_PARAMS)) {
1945	DMERR("Invalid data size in the ioctl structure: %u",	1946	DMERR("Invalid data size in the ioctl structure: %u",
1946	param_kernel->data_size);	1947	param_kernel->data_size);
1947	return -EINVAL;	1948	return -EINVAL;

drivers/md/dm-stats.c+9−0

 	unsigned int last_rw;
 };
+#define DM_STAT_MAX_ENTRIES		8388608
+#define DM_STAT_MAX_HISTOGRAM_ENTRIES	134217728
 /*
  * A typo on the command line could possibly make the kernel run out of memory
  * and crash. To prevent the crash we account all used memory. We fail if we
 	if (n_entries != (size_t)n_entries || !(size_t)(n_entries + 1))
 		return -EOVERFLOW;
+	if (n_entries > DM_STAT_MAX_ENTRIES)
+		return -EOVERFLOW;
 	shared_alloc_size = struct_size(s, stat_shared, n_entries);
 	if ((shared_alloc_size - sizeof(struct dm_stat)) / sizeof(struct dm_stat_shared) != n_entries)
 		return -EOVERFLOW;
 	if (histogram_alloc_size / (n_histogram_entries + 1) != (size_t)n_entries * sizeof(unsigned long long))
 		return -EOVERFLOW;
+	if ((n_histogram_entries + 1) * (size_t)n_entries > DM_STAT_MAX_HISTOGRAM_ENTRIES)
+		return -EOVERFLOW;
 	if (!check_shared_memory(shared_alloc_size + histogram_alloc_size +
 				 num_possible_cpus() * (percpu_alloc_size + histogram_alloc_size)))
 		return -ENOMEM;

drivers/md/dm-table.c+7−2

 int dm_table_create(struct dm_table **result, blk_mode_t mode,
 		    unsigned int num_targets, struct mapped_device *md)
 {
-	struct dm_table *t = kzalloc(sizeof(*t), GFP_KERNEL);
+	struct dm_table *t;
+	if (num_targets > DM_MAX_TARGETS)
+		return -EOVERFLOW;
+	t = kzalloc(sizeof(*t), GFP_KERNEL);
 	if (!t)
 		return -ENOMEM;
 	if (!num_targets) {
 		kfree(t);
-		return -ENOMEM;
+		return -EOVERFLOW;
 	}
 	if (alloc_targets(t, num_targets)) {

drivers/md/dm-verity-target.c+2−24

@@ -645,23 +645,6 @@ static void verity_work(struct work_struct *w) · 644 unmodified lines
645	verity_finish_io(io, errno_to_blk_status(verity_verify_io(io)));	645	verity_finish_io(io, errno_to_blk_status(verity_verify_io(io)));
646	}	646	}
647		647
648	static void verity_tasklet(unsigned long data)
649	{
650	struct dm_verity_io io = (struct dm_verity_io )data;
651	int err;
652
653	io->in_tasklet = true;
654	err = verity_verify_io(io);
655	if (err == -EAGAIN \|\| err == -ENOMEM) {
656	/* fallback to retrying with work-queue */
657	INIT_WORK(&io->work, verity_work);
658	queue_work(io->v->verify_wq, &io->work);
659	return;
660	}
661
662	verity_finish_io(io, errno_to_blk_status(err));
663	}
664
665	static void verity_end_io(struct bio *bio)	648	static void verity_end_io(struct bio *bio)
666	{	649	{
667	struct dm_verity_io *io = bio->bi_private;	650	struct dm_verity_io *io = bio->bi_private;
@@ -674,13 +657,8 @@ static void verity_end_io(struct bio *bio) · 6 unmodified lines
674	return;	657	return;
675	}	658	}
676		659
677	if (static_branch_unlikely(&use_tasklet_enabled) && io->v->use_tasklet) {	660	INIT_WORK(&io->work, verity_work);
678	tasklet_init(&io->tasklet, verity_tasklet, (unsigned long)io);	661	queue_work(io->v->verify_wq, &io->work);
679	tasklet_schedule(&io->tasklet);
680	} else {
681	INIT_WORK(&io->work, verity_work);
682	queue_work(io->v->verify_wq, &io->work);
683	}
684	}	662	}
685		663
686	/*	664	/*

drivers/md/dm-verity.h+0−1

@@ -83,7 +83,6 @@ struct dm_verity_io { · 82 unmodified lines
83	struct bvec_iter iter;	83	struct bvec_iter iter;
84		84
85	struct work_struct work;	85	struct work_struct work;
86	struct tasklet_struct tasklet;
87		86
88	/*	87	/*
89	* Three variably-size fields follow this struct:	88	* Three variably-size fields follow this struct:

drivers/md/dm-writecache.c+4−4

@@ -299,7 +299,7 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 298 unmodified lines
299	long i;	299	long i;
300		300
301	wc->memory_map = NULL;	301	wc->memory_map = NULL;
302	pages = kvmalloc_array(p, sizeof(struct page *), GFP_KERNEL);	302	pages = vmalloc_array(p, sizeof(struct page *));
303	if (!pages) {	303	if (!pages) {
304	r = -ENOMEM;	304	r = -ENOMEM;
305	goto err2;	305	goto err2;
@@ -330,7 +330,7 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 24 unmodified lines
330	r = -ENOMEM;	330	r = -ENOMEM;
331	goto err3;	331	goto err3;
332	}	332	}
333	kvfree(pages);	333	vfree(pages);
334	wc->memory_vmapped = true;	334	wc->memory_vmapped = true;
335	}	335	}
336		336
@@ -341,7 +341,7 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 4 unmodified lines
341		341
342	return 0;	342	return 0;
343	err3:	343	err3:
344	kvfree(pages);	344	vfree(pages);
345	err2:	345	err2:
346	dax_read_unlock(id);	346	dax_read_unlock(id);
347	err1:	347	err1:
@@ -962,7 +962,7 @@ static int writecache_alloc_entries(struct dm_writecache *wc) · 614 unmodified lines
962		962
963	if (wc->entries)	963	if (wc->entries)
964	return 0;	964	return 0;
965	wc->entries = vmalloc(array_size(sizeof(struct wc_entry), wc->n_blocks));	965	wc->entries = vmalloc_array(wc->n_blocks, sizeof(struct wc_entry));
966	if (!wc->entries)	966	if (!wc->entries)
967	return -ENOMEM;	967	return -ENOMEM;
968	for (b = 0; b < wc->n_blocks; b++) {	968	for (b = 0; b < wc->n_blocks; b++) {

drivers/misc/fastrpc.c+1−1

@@ -2191,7 +2191,7 @@ static int fastrpc_cb_remove(struct platform_device *pdev) · 2190 unmodified lines
2191	int i;	2191	int i;
2192		2192
2193	spin_lock_irqsave(&cctx->lock, flags);	2193	spin_lock_irqsave(&cctx->lock, flags);
2194	for (i = 1; i < FASTRPC_MAX_SESSIONS; i++) {	2194	for (i = 0; i < FASTRPC_MAX_SESSIONS; i++) {
2195	if (cctx->session[i].sid == sess->sid) {	2195	if (cctx->session[i].sid == sess->sid) {
2196	cctx->session[i].valid = false;	2196	cctx->session[i].valid = false;
2197	cctx->sesscount--;	2197	cctx->sesscount--;

drivers/misc/open-dice.c+1−1

 		return -ENOMEM;
 	*drvdata = (struct open_dice_drvdata){
-		.lock = __MUTEX_INITIALIZER(drvdata->lock),
 		.rmem = rmem,
 		.misc = (struct miscdevice){
 			.parent	= dev,
 			.mode	= 0600,
 		},
 	};
+	mutex_init(&drvdata->lock);
 	/* Index overflow check not needed, misc_register() will fail. */
 	snprintf(drvdata->name, sizeof(drvdata->name), DRIVER_NAME"%u", dev_idx++);

drivers/net/ethernet/aquantia/atlantic/aq_ptp.c+2−2

@@ -993,7 +993,7 @@ int aq_ptp_ring_alloc(struct aq_nic_s *aq_nic) · 992 unmodified lines
993	return 0;	993	return 0;
994		994
995	err_exit_hwts_rx:	995	err_exit_hwts_rx:
996	aq_ring_free(&aq_ptp->hwts_rx);	996	aq_ring_hwts_rx_free(&aq_ptp->hwts_rx);
997	err_exit_ptp_rx:	997	err_exit_ptp_rx:
998	aq_ring_free(&aq_ptp->ptp_rx);	998	aq_ring_free(&aq_ptp->ptp_rx);
999	err_exit_ptp_tx:	999	err_exit_ptp_tx:
@@ -1011,7 +1011,7 @@ void aq_ptp_ring_free(struct aq_nic_s *aq_nic) · 11 unmodified lines
1011		1011
1012	aq_ring_free(&aq_ptp->ptp_tx);	1012	aq_ring_free(&aq_ptp->ptp_tx);
1013	aq_ring_free(&aq_ptp->ptp_rx);	1013	aq_ring_free(&aq_ptp->ptp_rx);
1014	aq_ring_free(&aq_ptp->hwts_rx);	1014	aq_ring_hwts_rx_free(&aq_ptp->hwts_rx);
1015		1015
1016	aq_ptp_skb_ring_release(&aq_ptp->skb_ring);	1016	aq_ptp_skb_ring_release(&aq_ptp->skb_ring);
1017	}	1017	}

drivers/net/ethernet/aquantia/atlantic/aq_ring.c+13−0

@@ -919,6 +919,19 @@ void aq_ring_free(struct aq_ring_s *self) · 918 unmodified lines
919	}	919	}
920	}	920	}
921		921
		922	void aq_ring_hwts_rx_free(struct aq_ring_s *self)
		923	{
		924	if (!self)
		925	return;
		926
		927	if (self->dx_ring) {
		928	dma_free_coherent(aq_nic_get_dev(self->aq_nic),
		929	self->size * self->dx_size + AQ_CFG_RXDS_DEF,
		930	self->dx_ring, self->dx_ring_pa);
		931	self->dx_ring = NULL;
		932	}
		933	}
		934
922	unsigned int aq_ring_fill_stats_data(struct aq_ring_s self, u64 data)	935	unsigned int aq_ring_fill_stats_data(struct aq_ring_s self, u64 data)
923	{	936	{
924	unsigned int count;	937	unsigned int count;

drivers/net/ethernet/aquantia/atlantic/aq_ring.h+1−0

@@ -210,6 +210,7 @@ int aq_ring_rx_fill(struct aq_ring_s *self); · 209 unmodified lines
210	int aq_ring_hwts_rx_alloc(struct aq_ring_s *self,	210	int aq_ring_hwts_rx_alloc(struct aq_ring_s *self,
211	struct aq_nic_s *aq_nic, unsigned int idx,	211	struct aq_nic_s *aq_nic, unsigned int idx,
212	unsigned int size, unsigned int dx_size);	212	unsigned int size, unsigned int dx_size);
		213	void aq_ring_hwts_rx_free(struct aq_ring_s *self);
213	void aq_ring_hwts_rx_clean(struct aq_ring_s self, struct aq_nic_s aq_nic);	214	void aq_ring_hwts_rx_clean(struct aq_ring_s self, struct aq_nic_s aq_nic);
214		215
215	unsigned int aq_ring_fill_stats_data(struct aq_ring_s self, u64 data);	216	unsigned int aq_ring_fill_stats_data(struct aq_ring_s self, u64 data);

drivers/net/ethernet/engleder/tsnep_main.c+12−4

 static bool tsnep_xdp_xmit_back(struct tsnep_adapter *adapter,
 				struct xdp_buff *xdp,
-				struct netdev_queue *tx_nq, struct tsnep_tx *tx)
+				struct netdev_queue *tx_nq, struct tsnep_tx *tx,
+				bool zc)
 {
 	struct xdp_frame *xdpf = xdp_convert_buff_to_frame(xdp);
 	bool xmit;
+	u32 type;
 	if (unlikely(!xdpf))
 		return false;
+	/* no page pool for zero copy */
+	if (zc)
+		type = TSNEP_TX_TYPE_XDP_NDO;
+	else
+		type = TSNEP_TX_TYPE_XDP_TX;
 	__netif_tx_lock(tx_nq, smp_processor_id());
-	xmit = tsnep_xdp_xmit_frame_ring(xdpf, tx, TSNEP_TX_TYPE_XDP_TX);
+	xmit = tsnep_xdp_xmit_frame_ring(xdpf, tx, type);
 	/* Avoid transmit queue timeout since we share it with the slow path */
 	if (xmit)
 	case XDP_PASS:
 		return false;
 	case XDP_TX:
-		if (!tsnep_xdp_xmit_back(rx->adapter, xdp, tx_nq, tx))
+		if (!tsnep_xdp_xmit_back(rx->adapter, xdp, tx_nq, tx, false))
 			goto out_failure;
 		*status |= TSNEP_XDP_TX;
 		return true;
 	case XDP_PASS:
 		return false;
 	case XDP_TX:
-		if (!tsnep_xdp_xmit_back(rx->adapter, xdp, tx_nq, tx))
+		if (!tsnep_xdp_xmit_back(rx->adapter, xdp, tx_nq, tx, true))
 			goto out_failure;
 		*status |= TSNEP_XDP_TX;
 		return true;

drivers/net/ethernet/intel/i40e/i40e_dcb.h+1−1

@@ -43,7 +43,7 @@ · 42 unmodified lines
43	#define I40E_LLDP_TLV_SUBTYPE_SHIFT 0	43	#define I40E_LLDP_TLV_SUBTYPE_SHIFT 0
44	#define I40E_LLDP_TLV_SUBTYPE_MASK (0xFF << I40E_LLDP_TLV_SUBTYPE_SHIFT)	44	#define I40E_LLDP_TLV_SUBTYPE_MASK (0xFF << I40E_LLDP_TLV_SUBTYPE_SHIFT)
45	#define I40E_LLDP_TLV_OUI_SHIFT 8	45	#define I40E_LLDP_TLV_OUI_SHIFT 8
46	#define I40E_LLDP_TLV_OUI_MASK (0xFFFFFF << I40E_LLDP_TLV_OUI_SHIFT)	46	#define I40E_LLDP_TLV_OUI_MASK (0xFFFFFFU << I40E_LLDP_TLV_OUI_SHIFT)
47		47
48	/* Defines for IEEE ETS TLV */	48	/* Defines for IEEE ETS TLV */
49	#define I40E_IEEE_ETS_MAXTC_SHIFT 0	49	#define I40E_IEEE_ETS_MAXTC_SHIFT 0

drivers/net/ethernet/intel/ice/ice_osdep.h+1−1

@@ -24,7 +24,7 @@ · 23 unmodified lines
24	#define rd64(a, reg) readq((a)->hw_addr + (reg))	24	#define rd64(a, reg) readq((a)->hw_addr + (reg))
25		25
26	#define ice_flush(a) rd32((a), GLGEN_STAT)	26	#define ice_flush(a) rd32((a), GLGEN_STAT)
27	#define ICE_M(m, s) ((m) << (s))	27	#define ICE_M(m, s) ((m ## U) << (s))
28		28
29	struct ice_dma_mem {	29	struct ice_dma_mem {
30	void *va;	30	void *va;

drivers/net/ethernet/intel/ice/ice_type.h+1−1

@@ -1072,7 +1072,7 @@ struct ice_aq_get_set_rss_lut_params { · 1071 unmodified lines
1072	#define ICE_OROM_VER_BUILD_SHIFT 8	1072	#define ICE_OROM_VER_BUILD_SHIFT 8
1073	#define ICE_OROM_VER_BUILD_MASK (0xffff << ICE_OROM_VER_BUILD_SHIFT)	1073	#define ICE_OROM_VER_BUILD_MASK (0xffff << ICE_OROM_VER_BUILD_SHIFT)
1074	#define ICE_OROM_VER_SHIFT 24	1074	#define ICE_OROM_VER_SHIFT 24
1075	#define ICE_OROM_VER_MASK (0xff << ICE_OROM_VER_SHIFT)	1075	#define ICE_OROM_VER_MASK (0xffU << ICE_OROM_VER_SHIFT)
1076	#define ICE_SR_PFA_PTR 0x40	1076	#define ICE_SR_PFA_PTR 0x40
1077	#define ICE_SR_1ST_NVM_BANK_PTR 0x42	1077	#define ICE_SR_1ST_NVM_BANK_PTR 0x42
1078	#define ICE_SR_NVM_BANK_SIZE 0x43	1078	#define ICE_SR_NVM_BANK_SIZE 0x43

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c+15−16

 {
 	struct npc_mcam *mcam = &rvu->hw->mcam;
-	kfree(mcam->bmap);
+	bitmap_free(mcam->bmap);
-	kfree(mcam->bmap_reverse);
+	bitmap_free(mcam->bmap_reverse);
 	kfree(mcam->entry2pfvf_map);
 	kfree(mcam->cntr2pfvf_map);
 	kfree(mcam->entry2cntr_map);
 	mcam->pf_offset = mcam->nixlf_offset + nixlf_count;
 	/* Allocate bitmaps for managing MCAM entries */
-	mcam->bmap = kmalloc_array(BITS_TO_LONGS(mcam->bmap_entries),
+	mcam->bmap = bitmap_zalloc(mcam->bmap_entries, GFP_KERNEL);
-				   sizeof(long), GFP_KERNEL);
 	if (!mcam->bmap)
 		return -ENOMEM;
-	mcam->bmap_reverse = kmalloc_array(BITS_TO_LONGS(mcam->bmap_entries),
+	mcam->bmap_reverse = bitmap_zalloc(mcam->bmap_entries, GFP_KERNEL);
-					   sizeof(long), GFP_KERNEL);
 	if (!mcam->bmap_reverse)
 		goto free_bmap;
 	mcam->bmap_fcnt = mcam->bmap_entries;
 	/* Alloc memory for saving entry to RVU PFFUNC allocation mapping */
-	mcam->entry2pfvf_map = kmalloc_array(mcam->bmap_entries,
+	mcam->entry2pfvf_map = kcalloc(mcam->bmap_entries, sizeof(u16),
-					     sizeof(u16), GFP_KERNEL);
+				       GFP_KERNEL);
 	if (!mcam->entry2pfvf_map)
 		goto free_bmap_reverse;
 	if (err)
 		goto free_entry_map;
-	mcam->cntr2pfvf_map = kmalloc_array(mcam->counters.max,
+	mcam->cntr2pfvf_map = kcalloc(mcam->counters.max, sizeof(u16),
-					    sizeof(u16), GFP_KERNEL);
+				      GFP_KERNEL);
 	if (!mcam->cntr2pfvf_map)
 		goto free_cntr_bmap;
 	/* Alloc memory for MCAM entry to counter mapping and for tracking
 	 * counter's reference count.
 	 */
-	mcam->entry2cntr_map = kmalloc_array(mcam->bmap_entries,
+	mcam->entry2cntr_map = kcalloc(mcam->bmap_entries, sizeof(u16),
-					     sizeof(u16), GFP_KERNEL);
+				       GFP_KERNEL);
 	if (!mcam->entry2cntr_map)
 		goto free_cntr_map;
-	mcam->cntr_refcnt = kmalloc_array(mcam->counters.max,
+	mcam->cntr_refcnt = kcalloc(mcam->counters.max, sizeof(u16),
-					  sizeof(u16), GFP_KERNEL);
+				    GFP_KERNEL);
 	if (!mcam->cntr_refcnt)
 		goto free_entry_cntr_map;
 free_entry_map:
 	kfree(mcam->entry2pfvf_map);
 free_bmap_reverse:
-	kfree(mcam->bmap_reverse);
+	bitmap_free(mcam->bmap_reverse);
 free_bmap:
-	kfree(mcam->bmap);
+	bitmap_free(mcam->bmap);
 	return -ENOMEM;
 }

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c+12−2

 	if (pfvf->ptp && qidx < pfvf->hw.tx_queues) {
 		err = qmem_alloc(pfvf->dev, &sq->timestamps, qset->sqe_cnt,
 				 sizeof(*sq->timestamps));
-		if (err)
+		if (err) {
+			kfree(sq->sg);
+			sq->sg = NULL;
 			return err;
+		}
 	}
 	sq->head = 0;
 	sq->stats.bytes = 0;
 	sq->stats.pkts = 0;
-	return pfvf->hw_ops->sq_aq_init(pfvf, qidx, sqb_aura);
+	err = pfvf->hw_ops->sq_aq_init(pfvf, qidx, sqb_aura);
+	if (err) {
+		kfree(sq->sg);
+		sq->sg = NULL;
+		return err;
+	}
+	return 0;
 }

drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c+1−1

@@ -1084,7 +1084,7 @@ nfp_tunnel_add_shared_mac(struct nfp_app app, struct net_device netdev, · 1083 unmodified lines
1084	u16 nfp_mac_idx = 0;	1084	u16 nfp_mac_idx = 0;
1085		1085
1086	entry = nfp_tunnel_lookup_offloaded_macs(app, netdev->dev_addr);	1086	entry = nfp_tunnel_lookup_offloaded_macs(app, netdev->dev_addr);
1087	if (entry && nfp_tunnel_is_mac_idx_global(entry->index)) {	1087	if (entry && (nfp_tunnel_is_mac_idx_global(entry->index) \|\| netif_is_lag_port(netdev))) {
1088	if (entry->bridge_count \|\|	1088	if (entry->bridge_count \|\|
1089	!nfp_flower_is_supported_bridge(netdev)) {	1089	!nfp_flower_is_supported_bridge(netdev)) {
1090	nfp_tunnel_offloaded_macs_inc_ref_and_link(entry,	1090	nfp_tunnel_offloaded_macs_inc_ref_and_link(entry,

drivers/net/ethernet/netronome/nfp/nfp_net_common.c+1−0

@@ -2776,6 +2776,7 @@ static void nfp_net_netdev_init(struct nfp_net *nn) · 2775 unmodified lines
2776	case NFP_NFD_VER_NFD3:	2776	case NFP_NFD_VER_NFD3:
2777	netdev->netdev_ops = &nfp_nfd3_netdev_ops;	2777	netdev->netdev_ops = &nfp_nfd3_netdev_ops;
2778	netdev->xdp_features \|= NETDEV_XDP_ACT_XSK_ZEROCOPY;	2778	netdev->xdp_features \|= NETDEV_XDP_ACT_XSK_ZEROCOPY;
		2779	netdev->xdp_features \|= NETDEV_XDP_ACT_REDIRECT;
2779	break;	2780	break;
2780	case NFP_NFD_VER_NFDK:	2781	case NFP_NFD_VER_NFDK:
2781	netdev->netdev_ops = &nfp_nfdk_netdev_ops;	2782	netdev->netdev_ops = &nfp_nfdk_netdev_ops;

drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c+4−2

 	const u32 barcfg_msix_general =
 		NFP_PCIE_BAR_PCIE2CPP_MapType(
 			NFP_PCIE_BAR_PCIE2CPP_MapType_GENERAL) |
-		NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT;
+		NFP_PCIE_BAR_PCIE2CPP_LengthSelect(
+			NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT);
 	const u32 barcfg_msix_xpb =
 		NFP_PCIE_BAR_PCIE2CPP_MapType(
 			NFP_PCIE_BAR_PCIE2CPP_MapType_BULK) |
-		NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT |
+		NFP_PCIE_BAR_PCIE2CPP_LengthSelect(
+			NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT) |
 		NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress(
 			NFP_CPP_TARGET_ISLAND_XPB);
 	const u32 barcfg_explicit[4] = {

drivers/net/ethernet/stmicro/stmmac/common.h+41−16

@@ -59,28 +59,51 @@ · 58 unmodified lines
59	#undef FRAME_FILTER_DEBUG	59	#undef FRAME_FILTER_DEBUG
60	/* #define FRAME_FILTER_DEBUG */	60	/* #define FRAME_FILTER_DEBUG */
61		61
		62	struct stmmac_q_tx_stats {
		63	u64_stats_t tx_bytes;
		64	u64_stats_t tx_set_ic_bit;
		65	u64_stats_t tx_tso_frames;
		66	u64_stats_t tx_tso_nfrags;
		67	};
		68
		69	struct stmmac_napi_tx_stats {
		70	u64_stats_t tx_packets;
		71	u64_stats_t tx_pkt_n;
		72	u64_stats_t poll;
		73	u64_stats_t tx_clean;
		74	u64_stats_t tx_set_ic_bit;
		75	};
		76
62	struct stmmac_txq_stats {	77	struct stmmac_txq_stats {
63	u64 tx_bytes;	78	/* Updates protected by tx queue lock. */
64	u64 tx_packets;	79	struct u64_stats_sync q_syncp;
65	u64 tx_pkt_n;	80	struct stmmac_q_tx_stats q;
66	u64 tx_normal_irq_n;	81
67	u64 napi_poll;	82	/* Updates protected by NAPI poll logic. */
68	u64 tx_clean;	83	struct u64_stats_sync napi_syncp;
69	u64 tx_set_ic_bit;	84	struct stmmac_napi_tx_stats napi;
70	u64 tx_tso_frames;
71	u64 tx_tso_nfrags;
72	struct u64_stats_sync syncp;
73	} ____cacheline_aligned_in_smp;	85	} ____cacheline_aligned_in_smp;
74		86
		87	struct stmmac_napi_rx_stats {
		88	u64_stats_t rx_bytes;
		89	u64_stats_t rx_packets;
		90	u64_stats_t rx_pkt_n;
		91	u64_stats_t poll;
		92	};
		93
75	struct stmmac_rxq_stats {	94	struct stmmac_rxq_stats {
76	u64 rx_bytes;	95	/* Updates protected by NAPI poll logic. */
77	u64 rx_packets;	96	struct u64_stats_sync napi_syncp;
78	u64 rx_pkt_n;	97	struct stmmac_napi_rx_stats napi;
79	u64 rx_normal_irq_n;
80	u64 napi_poll;
81	struct u64_stats_sync syncp;
82	} ____cacheline_aligned_in_smp;	98	} ____cacheline_aligned_in_smp;
83		99
		100	/* Updates on each CPU protected by not allowing nested irqs. */
		101	struct stmmac_pcpu_stats {
		102	struct u64_stats_sync syncp;
		103	u64_stats_t rx_normal_irq_n[MTL_MAX_TX_QUEUES];
		104	u64_stats_t tx_normal_irq_n[MTL_MAX_RX_QUEUES];
		105	};
		106
84	/* Extra statistic and debug information exposed by ethtool */	107	/* Extra statistic and debug information exposed by ethtool */
85	struct stmmac_extra_stats {	108	struct stmmac_extra_stats {
86	/* Transmit errors */	109	/* Transmit errors */
@@ -207,6 +230,7 @@ struct stmmac_extra_stats { · 120 unmodified lines
207	/* per queue statistics */	230	/* per queue statistics */
208	struct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];	231	struct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];
209	struct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];	232	struct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];
		233	struct stmmac_pcpu_stats __percpu *pcpu_stats;
210	unsigned long rx_dropped;	234	unsigned long rx_dropped;
211	unsigned long rx_errors;	235	unsigned long rx_errors;
212	unsigned long tx_dropped;	236	unsigned long tx_dropped;
@@ -218,6 +242,7 @@ struct stmmac_safety_stats { · 5 unmodified lines
218	unsigned long mac_errors[32];	242	unsigned long mac_errors[32];
219	unsigned long mtl_errors[32];	243	unsigned long mtl_errors[32];
220	unsigned long dma_errors[32];	244	unsigned long dma_errors[32];
		245	unsigned long dma_dpp_errors[32];
221	};	246	};
222		247
223	/* Number of fields in Safety Stats */	248	/* Number of fields in Safety Stats */

drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c+7−8

 				     struct stmmac_extra_stats *x, u32 chan,
 				     u32 dir)
 {
-	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
+	struct stmmac_pcpu_stats *stats = this_cpu_ptr(priv->xstats.pcpu_stats);
-	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
 	int ret = 0;
 	u32 v;
 	if (v & EMAC_TX_INT) {
 		ret |= handle_tx;
-		u64_stats_update_begin(&txq_stats->syncp);
+		u64_stats_update_begin(&stats->syncp);
-		txq_stats->tx_normal_irq_n++;
+		u64_stats_inc(&stats->tx_normal_irq_n[chan]);
-		u64_stats_update_end(&txq_stats->syncp);
+		u64_stats_update_end(&stats->syncp);
 	}
 	if (v & EMAC_TX_DMA_STOP_INT)
 	if (v & EMAC_RX_INT) {
 		ret |= handle_rx;
-		u64_stats_update_begin(&rxq_stats->syncp);
+		u64_stats_update_begin(&stats->syncp);
-		rxq_stats->rx_normal_irq_n++;
+		u64_stats_inc(&stats->rx_normal_irq_n[chan]);
-		u64_stats_update_end(&rxq_stats->syncp);
+		u64_stats_update_end(&stats->syncp);
 	}
 	if (v & EMAC_RX_BUF_UA_INT)

drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c+7−8

 	const struct dwmac4_addrs *dwmac4_addrs = priv->plat->dwmac4_addrs;
 	u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(dwmac4_addrs, chan));
 	u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));
-	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
+	struct stmmac_pcpu_stats *stats = this_cpu_ptr(priv->xstats.pcpu_stats);
-	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
 	int ret = 0;
 	if (dir == DMA_DIR_RX)
 	}
 	/* TX/RX NORMAL interrupts */
 	if (likely(intr_status & DMA_CHAN_STATUS_RI)) {
-		u64_stats_update_begin(&rxq_stats->syncp);
+		u64_stats_update_begin(&stats->syncp);
-		rxq_stats->rx_normal_irq_n++;
+		u64_stats_inc(&stats->rx_normal_irq_n[chan]);
-		u64_stats_update_end(&rxq_stats->syncp);
+		u64_stats_update_end(&stats->syncp);
 		ret |= handle_rx;
 	}
 	if (likely(intr_status & DMA_CHAN_STATUS_TI)) {
-		u64_stats_update_begin(&txq_stats->syncp);
+		u64_stats_update_begin(&stats->syncp);
-		txq_stats->tx_normal_irq_n++;
+		u64_stats_inc(&stats->tx_normal_irq_n[chan]);
-		u64_stats_update_end(&txq_stats->syncp);
+		u64_stats_update_end(&stats->syncp);
 		ret |= handle_tx;
 	}

drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c+7−8

 int dwmac_dma_interrupt(struct stmmac_priv *priv, void __iomem *ioaddr,
 			struct stmmac_extra_stats *x, u32 chan, u32 dir)
 {
-	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
+	struct stmmac_pcpu_stats *stats = this_cpu_ptr(priv->xstats.pcpu_stats);
-	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
 	int ret = 0;
 	/* read the status register (CSR5) */
 	u32 intr_status = readl(ioaddr + DMA_STATUS);
 			u32 value = readl(ioaddr + DMA_INTR_ENA);
 			/* to schedule NAPI on real RIE event. */
 			if (likely(value & DMA_INTR_ENA_RIE)) {
-				u64_stats_update_begin(&rxq_stats->syncp);
+				u64_stats_update_begin(&stats->syncp);
-				rxq_stats->rx_normal_irq_n++;
+				u64_stats_inc(&stats->rx_normal_irq_n[chan]);
-				u64_stats_update_end(&rxq_stats->syncp);
+				u64_stats_update_end(&stats->syncp);
 				ret |= handle_rx;
 			}
 		}
 		if (likely(intr_status & DMA_STATUS_TI)) {
-			u64_stats_update_begin(&txq_stats->syncp);
+			u64_stats_update_begin(&stats->syncp);
-			txq_stats->tx_normal_irq_n++;
+			u64_stats_inc(&stats->tx_normal_irq_n[chan]);
-			u64_stats_update_end(&txq_stats->syncp);
+			u64_stats_update_end(&stats->syncp);
 			ret |= handle_tx;
 		}
 		if (unlikely(intr_status & DMA_STATUS_ERI))

drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h+3−0

 #define XGMAC_RXCEIE			BIT(4)
 #define XGMAC_TXCEIE			BIT(0)
 #define XGMAC_MTL_ECC_INT_STATUS	0x000010cc
+#define XGMAC_MTL_DPP_CONTROL		0x000010e0
+#define XGMAC_DPP_DISABLE		BIT(0)
 #define XGMAC_MTL_TXQ_OPMODE(x)		(0x00001100 + (0x80 * (x)))
 #define XGMAC_TQS			GENMASK(25, 16)
 #define XGMAC_TQS_SHIFT			16
 #define XGMAC_DCEIE			BIT(1)
 #define XGMAC_TCEIE			BIT(0)
 #define XGMAC_DMA_ECC_INT_STATUS	0x0000306c
+#define XGMAC_DMA_DPP_INT_STATUS	0x00003074
 #define XGMAC_DMA_CH_CONTROL(x)		(0x00003100 + (0x80 * (x)))
 #define XGMAC_SPH			BIT(24)
 #define XGMAC_PBLx8			BIT(16)

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c+56−1

@@ -830,6 +830,43 @@ static const struct dwxgmac3_error_desc dwxgmac3_dma_errors[32]= { · 829 unmodified lines
830	{ false, "UNKNOWN", "Unknown Error" }, /* 31 */	830	{ false, "UNKNOWN", "Unknown Error" }, /* 31 */
831	};	831	};
832		832
		833	static const char * const dpp_rx_err = "Read Rx Descriptor Parity checker Error";
		834	static const char * const dpp_tx_err = "Read Tx Descriptor Parity checker Error";
		835	static const struct dwxgmac3_error_desc dwxgmac3_dma_dpp_errors[32] = {
		836	{ true, "TDPES0", dpp_tx_err },
		837	{ true, "TDPES1", dpp_tx_err },
		838	{ true, "TDPES2", dpp_tx_err },
		839	{ true, "TDPES3", dpp_tx_err },
		840	{ true, "TDPES4", dpp_tx_err },
		841	{ true, "TDPES5", dpp_tx_err },
		842	{ true, "TDPES6", dpp_tx_err },
		843	{ true, "TDPES7", dpp_tx_err },
		844	{ true, "TDPES8", dpp_tx_err },
		845	{ true, "TDPES9", dpp_tx_err },
		846	{ true, "TDPES10", dpp_tx_err },
		847	{ true, "TDPES11", dpp_tx_err },
		848	{ true, "TDPES12", dpp_tx_err },
		849	{ true, "TDPES13", dpp_tx_err },
		850	{ true, "TDPES14", dpp_tx_err },
		851	{ true, "TDPES15", dpp_tx_err },
		852	{ true, "RDPES0", dpp_rx_err },
		853	{ true, "RDPES1", dpp_rx_err },
		854	{ true, "RDPES2", dpp_rx_err },
		855	{ true, "RDPES3", dpp_rx_err },
		856	{ true, "RDPES4", dpp_rx_err },
		857	{ true, "RDPES5", dpp_rx_err },
		858	{ true, "RDPES6", dpp_rx_err },
		859	{ true, "RDPES7", dpp_rx_err },
		860	{ true, "RDPES8", dpp_rx_err },
		861	{ true, "RDPES9", dpp_rx_err },
		862	{ true, "RDPES10", dpp_rx_err },
		863	{ true, "RDPES11", dpp_rx_err },
		864	{ true, "RDPES12", dpp_rx_err },
		865	{ true, "RDPES13", dpp_rx_err },
		866	{ true, "RDPES14", dpp_rx_err },
		867	{ true, "RDPES15", dpp_rx_err },
		868	};
		869
833	static void dwxgmac3_handle_dma_err(struct net_device *ndev,	870	static void dwxgmac3_handle_dma_err(struct net_device *ndev,
834	void __iomem *ioaddr, bool correctable,	871	void __iomem *ioaddr, bool correctable,
835	struct stmmac_safety_stats *stats)	872	struct stmmac_safety_stats *stats)
@@ -841,6 +878,13 @@ static void dwxgmac3_handle_dma_err(struct net_device *ndev, · 5 unmodified lines
841		878
842	dwxgmac3_log_error(ndev, value, correctable, "DMA",	879	dwxgmac3_log_error(ndev, value, correctable, "DMA",
843	dwxgmac3_dma_errors, STAT_OFF(dma_errors), stats);	880	dwxgmac3_dma_errors, STAT_OFF(dma_errors), stats);
		881
		882	value = readl(ioaddr + XGMAC_DMA_DPP_INT_STATUS);
		883	writel(value, ioaddr + XGMAC_DMA_DPP_INT_STATUS);
		884
		885	dwxgmac3_log_error(ndev, value, false, "DMA_DPP",
		886	dwxgmac3_dma_dpp_errors,
		887	STAT_OFF(dma_dpp_errors), stats);
844	}	888	}
845		889
846	static int	890	static int
@@ -881,6 +925,12 @@ dwxgmac3_safety_feat_config(void __iomem *ioaddr, unsigned int asp, · 34 unmodified lines
881	value \|= XGMAC_TMOUTEN; /* FSM Timeout Feature */	925	value \|= XGMAC_TMOUTEN; /* FSM Timeout Feature */
882	writel(value, ioaddr + XGMAC_MAC_FSM_CONTROL);	926	writel(value, ioaddr + XGMAC_MAC_FSM_CONTROL);
883		927
		928	/* 5. Enable Data Path Parity Protection */
		929	value = readl(ioaddr + XGMAC_MTL_DPP_CONTROL);
		930	/* already enabled by default, explicit enable it again */
		931	value &= ~XGMAC_DPP_DISABLE;
		932	writel(value, ioaddr + XGMAC_MTL_DPP_CONTROL);
		933
884	return 0;	934	return 0;
885	}	935	}
886		936
@@ -914,7 +964,11 @@ static int dwxgmac3_safety_feat_irq_status(struct net_device *ndev, · 27 unmodified lines
914	ret \|= !corr;	964	ret \|= !corr;
915	}	965	}
916		966
917	err = dma & (XGMAC_DEUIS \| XGMAC_DECIS);	967	/* DMA_DPP_Interrupt_Status is indicated by MCSIS bit in
		968	* DMA_Safety_Interrupt_Status, so we handle DMA Data Path
		969	* Parity Errors here
		970	*/
		971	err = dma & (XGMAC_DEUIS \| XGMAC_DECIS \| XGMAC_MCSIS);
918	corr = dma & XGMAC_DECIS;	972	corr = dma & XGMAC_DECIS;
919	if (err) {	973	if (err) {
920	dwxgmac3_handle_dma_err(ndev, ioaddr, corr, stats);	974	dwxgmac3_handle_dma_err(ndev, ioaddr, corr, stats);
@@ -930,6 +984,7 @@ static const struct dwxgmac3_error { · 9 unmodified lines
930	{ dwxgmac3_mac_errors },	984	{ dwxgmac3_mac_errors },
931	{ dwxgmac3_mtl_errors },	985	{ dwxgmac3_mtl_errors },
932	{ dwxgmac3_dma_errors },	986	{ dwxgmac3_dma_errors },
		987	{ dwxgmac3_dma_dpp_errors },
933	};	988	};
934		989
935	static int dwxgmac3_safety_feat_dump(struct stmmac_safety_stats *stats,	990	static int dwxgmac3_safety_feat_dump(struct stmmac_safety_stats *stats,

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c+7−8

 				  struct stmmac_extra_stats *x, u32 chan,
 				  u32 dir)
 {
-	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
+	struct stmmac_pcpu_stats *stats = this_cpu_ptr(priv->xstats.pcpu_stats);
-	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
 	u32 intr_status = readl(ioaddr + XGMAC_DMA_CH_STATUS(chan));
 	u32 intr_en = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));
 	int ret = 0;
 	/* TX/RX NORMAL interrupts */
 	if (likely(intr_status & XGMAC_NIS)) {
 		if (likely(intr_status & XGMAC_RI)) {
-			u64_stats_update_begin(&rxq_stats->syncp);
+			u64_stats_update_begin(&stats->syncp);
-			rxq_stats->rx_normal_irq_n++;
+			u64_stats_inc(&stats->rx_normal_irq_n[chan]);
-			u64_stats_update_end(&rxq_stats->syncp);
+			u64_stats_update_end(&stats->syncp);
 			ret |= handle_rx;
 		}
 		if (likely(intr_status & (XGMAC_TI | XGMAC_TBU))) {
-			u64_stats_update_begin(&txq_stats->syncp);
+			u64_stats_update_begin(&stats->syncp);
-			txq_stats->tx_normal_irq_n++;
+			u64_stats_inc(&stats->tx_normal_irq_n[chan]);
-			u64_stats_update_end(&txq_stats->syncp);
+			u64_stats_update_end(&stats->syncp);
 			ret |= handle_tx;
 		}
 	}

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c+87−42

@@ -549,44 +549,79 @@ stmmac_set_pauseparam(struct net_device *netdev, · 548 unmodified lines
549	}	549	}
550	}	550	}
551		551
		552	static u64 stmmac_get_rx_normal_irq_n(struct stmmac_priv *priv, int q)
		553	{
		554	u64 total;
		555	int cpu;
		556
		557	total = 0;
		558	for_each_possible_cpu(cpu) {
		559	struct stmmac_pcpu_stats *pcpu;
		560	unsigned int start;
		561	u64 irq_n;
		562
		563	pcpu = per_cpu_ptr(priv->xstats.pcpu_stats, cpu);
		564	do {
		565	start = u64_stats_fetch_begin(&pcpu->syncp);
		566	irq_n = u64_stats_read(&pcpu->rx_normal_irq_n[q]);
		567	} while (u64_stats_fetch_retry(&pcpu->syncp, start));
		568	total += irq_n;
		569	}
		570	return total;
		571	}
		572
		573	static u64 stmmac_get_tx_normal_irq_n(struct stmmac_priv *priv, int q)
		574	{
		575	u64 total;
		576	int cpu;
		577
		578	total = 0;
		579	for_each_possible_cpu(cpu) {
		580	struct stmmac_pcpu_stats *pcpu;
		581	unsigned int start;
		582	u64 irq_n;
		583
		584	pcpu = per_cpu_ptr(priv->xstats.pcpu_stats, cpu);
		585	do {
		586	start = u64_stats_fetch_begin(&pcpu->syncp);
		587	irq_n = u64_stats_read(&pcpu->tx_normal_irq_n[q]);
		588	} while (u64_stats_fetch_retry(&pcpu->syncp, start));
		589	total += irq_n;
		590	}
		591	return total;
		592	}
		593
552	static void stmmac_get_per_qstats(struct stmmac_priv priv, u64 data)	594	static void stmmac_get_per_qstats(struct stmmac_priv priv, u64 data)
553	{	595	{
554	u32 tx_cnt = priv->plat->tx_queues_to_use;	596	u32 tx_cnt = priv->plat->tx_queues_to_use;
555	u32 rx_cnt = priv->plat->rx_queues_to_use;	597	u32 rx_cnt = priv->plat->rx_queues_to_use;
556	unsigned int start;	598	unsigned int start;
557	int q, stat;	599	int q;
558	char *p;
559		600
560	for (q = 0; q < tx_cnt; q++) {	601	for (q = 0; q < tx_cnt; q++) {
561	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[q];	602	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[q];
562	struct stmmac_txq_stats snapshot;	603	u64 pkt_n;
563		604
564	do {	605	do {
565	start = u64_stats_fetch_begin(&txq_stats->syncp);	606	start = u64_stats_fetch_begin(&txq_stats->napi_syncp);
566	snapshot = *txq_stats;	607	pkt_n = u64_stats_read(&txq_stats->napi.tx_pkt_n);
567	} while (u64_stats_fetch_retry(&txq_stats->syncp, start));	608	} while (u64_stats_fetch_retry(&txq_stats->napi_syncp, start));
568		609
569	p = (char *)&snapshot + offsetof(struct stmmac_txq_stats, tx_pkt_n);	610	*data++ = pkt_n;
570	for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {	611	*data++ = stmmac_get_tx_normal_irq_n(priv, q);
571	data++ = ((u64 *)p);
572	p += sizeof(u64);
573	}
574	}	612	}
575		613
576	for (q = 0; q < rx_cnt; q++) {	614	for (q = 0; q < rx_cnt; q++) {
577	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[q];	615	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[q];
578	struct stmmac_rxq_stats snapshot;	616	u64 pkt_n;
579		617
580	do {	618	do {
581	start = u64_stats_fetch_begin(&rxq_stats->syncp);	619	start = u64_stats_fetch_begin(&rxq_stats->napi_syncp);
582	snapshot = *rxq_stats;	620	pkt_n = u64_stats_read(&rxq_stats->napi.rx_pkt_n);
583	} while (u64_stats_fetch_retry(&rxq_stats->syncp, start));	621	} while (u64_stats_fetch_retry(&rxq_stats->napi_syncp, start));
584		622
585	p = (char *)&snapshot + offsetof(struct stmmac_rxq_stats, rx_pkt_n);	623	*data++ = pkt_n;
586	for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {	624	*data++ = stmmac_get_rx_normal_irq_n(priv, q);
587	data++ = ((u64 *)p);
588	p += sizeof(u64);
589	}
590	}	625	}
591	}	626	}
592		627
@@ -645,39 +680,49 @@ static void stmmac_get_ethtool_stats(struct net_device *dev, · 52 unmodified lines
645	pos = j;	680	pos = j;
646	for (i = 0; i < rx_queues_count; i++) {	681	for (i = 0; i < rx_queues_count; i++) {
647	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[i];	682	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[i];
648	struct stmmac_rxq_stats snapshot;	683	struct stmmac_napi_rx_stats snapshot;
		684	u64 n_irq;
649		685
650	j = pos;	686	j = pos;
651	do {	687	do {
652	start = u64_stats_fetch_begin(&rxq_stats->syncp);	688	start = u64_stats_fetch_begin(&rxq_stats->napi_syncp);
653	snapshot = *rxq_stats;	689	snapshot = rxq_stats->napi;
654	} while (u64_stats_fetch_retry(&rxq_stats->syncp, start));	690	} while (u64_stats_fetch_retry(&rxq_stats->napi_syncp, start));
655		691
656	data[j++] += snapshot.rx_pkt_n;	692	data[j++] += u64_stats_read(&snapshot.rx_pkt_n);
657	data[j++] += snapshot.rx_normal_irq_n;	693	n_irq = stmmac_get_rx_normal_irq_n(priv, i);
658	normal_irq_n += snapshot.rx_normal_irq_n;	694	data[j++] += n_irq;
659	napi_poll += snapshot.napi_poll;	695	normal_irq_n += n_irq;
		696	napi_poll += u64_stats_read(&snapshot.poll);
660	}	697	}
661		698
662	pos = j;	699	pos = j;
663	for (i = 0; i < tx_queues_count; i++) {	700	for (i = 0; i < tx_queues_count; i++) {
664	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[i];	701	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[i];
665	struct stmmac_txq_stats snapshot;	702	struct stmmac_napi_tx_stats napi_snapshot;
		703	struct stmmac_q_tx_stats q_snapshot;
		704	u64 n_irq;
666		705
667	j = pos;	706	j = pos;
668	do {	707	do {
669	start = u64_stats_fetch_begin(&txq_stats->syncp);	708	start = u64_stats_fetch_begin(&txq_stats->q_syncp);
670	snapshot = *txq_stats;	709	q_snapshot = txq_stats->q;
671	} while (u64_stats_fetch_retry(&txq_stats->syncp, start));	710	} while (u64_stats_fetch_retry(&txq_stats->q_syncp, start));
672		711	do {
673	data[j++] += snapshot.tx_pkt_n;	712	start = u64_stats_fetch_begin(&txq_stats->napi_syncp);
674	data[j++] += snapshot.tx_normal_irq_n;	713	napi_snapshot = txq_stats->napi;
675	normal_irq_n += snapshot.tx_normal_irq_n;	714	} while (u64_stats_fetch_retry(&txq_stats->napi_syncp, start));
676	data[j++] += snapshot.tx_clean;	715
677	data[j++] += snapshot.tx_set_ic_bit;	716	data[j++] += u64_stats_read(&napi_snapshot.tx_pkt_n);
678	data[j++] += snapshot.tx_tso_frames;	717	n_irq = stmmac_get_tx_normal_irq_n(priv, i);
679	data[j++] += snapshot.tx_tso_nfrags;	718	data[j++] += n_irq;
680	napi_poll += snapshot.napi_poll;	719	normal_irq_n += n_irq;
		720	data[j++] += u64_stats_read(&napi_snapshot.tx_clean);
		721	data[j++] += u64_stats_read(&q_snapshot.tx_set_ic_bit) +
		722	u64_stats_read(&napi_snapshot.tx_set_ic_bit);
		723	data[j++] += u64_stats_read(&q_snapshot.tx_tso_frames);
		724	data[j++] += u64_stats_read(&q_snapshot.tx_tso_nfrags);
		725	napi_poll += u64_stats_read(&napi_snapshot.poll);
681	}	726	}
682	normal_irq_n += priv->xstats.rx_early_irq;	727	normal_irq_n += priv->xstats.rx_early_irq;
683	data[j++] = normal_irq_n;	728	data[j++] = normal_irq_n;

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+66−67

 	struct xdp_desc xdp_desc;
 	bool work_done = true;
 	u32 tx_set_ic_bit = 0;
-	unsigned long flags;
 	/* Avoids TX time-out as we are sharing with slow path */
 	txq_trans_cond_update(nq);
 		tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size);
 		entry = tx_q->cur_tx;
 	}
-	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
+	u64_stats_update_begin(&txq_stats->napi_syncp);
-	txq_stats->tx_set_ic_bit += tx_set_ic_bit;
+	u64_stats_add(&txq_stats->napi.tx_set_ic_bit, tx_set_ic_bit);
-	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
+	u64_stats_update_end(&txq_stats->napi_syncp);
 	if (tx_desc) {
 		stmmac_flush_tx_descriptors(priv, queue);
 	unsigned int bytes_compl = 0, pkts_compl = 0;
 	unsigned int entry, xmits = 0, count = 0;
 	u32 tx_packets = 0, tx_errors = 0;
-	unsigned long flags;
 	__netif_tx_lock_bh(netdev_get_tx_queue(priv->dev, queue));
 	if (tx_q->dirty_tx != tx_q->cur_tx)
 		*pending_packets = true;
-	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
+	u64_stats_update_begin(&txq_stats->napi_syncp);
-	txq_stats->tx_packets += tx_packets;
+	u64_stats_add(&txq_stats->napi.tx_packets, tx_packets);
-	txq_stats->tx_pkt_n += tx_packets;
+	u64_stats_add(&txq_stats->napi.tx_pkt_n, tx_packets);
-	txq_stats->tx_clean++;
+	u64_stats_inc(&txq_stats->napi.tx_clean);
-	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
+	u64_stats_update_end(&txq_stats->napi_syncp);
 	priv->xstats.tx_errors += tx_errors;
 	struct stmmac_tx_queue *tx_q;
 	bool has_vlan, set_ic;
 	u8 proto_hdr_len, hdr;
-	unsigned long flags;
 	u32 pay_len, mss;
 	dma_addr_t des;
 	int i;
 		netif_tx_stop_queue(netdev_get_tx_queue(priv->dev, queue));
 	}
-	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
+	u64_stats_update_begin(&txq_stats->q_syncp);
-	txq_stats->tx_bytes += skb->len;
+	u64_stats_add(&txq_stats->q.tx_bytes, skb->len);
-	txq_stats->tx_tso_frames++;
+	u64_stats_inc(&txq_stats->q.tx_tso_frames);
-	txq_stats->tx_tso_nfrags += nfrags;
+	u64_stats_add(&txq_stats->q.tx_tso_nfrags, nfrags);
 	if (set_ic)
-		txq_stats->tx_set_ic_bit++;
+		u64_stats_inc(&txq_stats->q.tx_set_ic_bit);
-	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
+	u64_stats_update_end(&txq_stats->q_syncp);
 	if (priv->sarc_type)
 		stmmac_set_desc_sarc(priv, first, priv->sarc_type);
 	struct stmmac_tx_queue *tx_q;
 	bool has_vlan, set_ic;
 	int entry, first_tx;
-	unsigned long flags;
 	dma_addr_t des;
 	tx_q = &priv->dma_conf.tx_queue[queue];
 		netif_tx_stop_queue(netdev_get_tx_queue(priv->dev, queue));
 	}
-	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
+	u64_stats_update_begin(&txq_stats->q_syncp);
-	txq_stats->tx_bytes += skb->len;
+	u64_stats_add(&txq_stats->q.tx_bytes, skb->len);
 	if (set_ic)
-		txq_stats->tx_set_ic_bit++;
+		u64_stats_inc(&txq_stats->q.tx_set_ic_bit);
-	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
+	u64_stats_update_end(&txq_stats->q_syncp);
 	if (priv->sarc_type)
 		stmmac_set_desc_sarc(priv, first, priv->sarc_type);
 		set_ic = false;
 	if (set_ic) {
-		unsigned long flags;
 		tx_q->tx_count_frames = 0;
 		stmmac_set_tx_ic(priv, tx_desc);
-		flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
+		u64_stats_update_begin(&txq_stats->q_syncp);
-		txq_stats->tx_set_ic_bit++;
+		u64_stats_inc(&txq_stats->q.tx_set_ic_bit);
-		u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
+		u64_stats_update_end(&txq_stats->q_syncp);
 	}
 	stmmac_enable_dma_transmission(priv, priv->ioaddr);
 	unsigned int len = xdp->data_end - xdp->data;
 	enum pkt_hash_types hash_type;
 	int coe = priv->hw->rx_csum;
-	unsigned long flags;
 	struct sk_buff *skb;
 	u32 hash;
 	skb_record_rx_queue(skb, queue);
 	napi_gro_receive(&ch->rxtx_napi, skb);
-	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
+	u64_stats_update_begin(&rxq_stats->napi_syncp);
-	rxq_stats->rx_pkt_n++;
+	u64_stats_inc(&rxq_stats->napi.rx_pkt_n);
-	rxq_stats->rx_bytes += len;
+	u64_stats_add(&rxq_stats->napi.rx_bytes, len);
-	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
+	u64_stats_update_end(&rxq_stats->napi_syncp);
 }
 static bool stmmac_rx_refill_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
 	unsigned int desc_size;
 	struct bpf_prog *prog;
 	bool failure = false;
-	unsigned long flags;
 	int xdp_status = 0;
 	int status = 0;
 	stmmac_finalize_xdp_rx(priv, xdp_status);
-	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
+	u64_stats_update_begin(&rxq_stats->napi_syncp);
-	rxq_stats->rx_pkt_n += count;
+	u64_stats_add(&rxq_stats->napi.rx_pkt_n, count);
-	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
+	u64_stats_update_end(&rxq_stats->napi_syncp);
 	priv->xstats.rx_dropped += rx_dropped;
 	priv->xstats.rx_errors += rx_errors;
 	unsigned int desc_size;
 	struct sk_buff *skb = NULL;
 	struct stmmac_xdp_buff ctx;
-	unsigned long flags;
 	int xdp_status = 0;
 	int buf_sz;
 	stmmac_rx_refill(priv, queue);
-	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
+	u64_stats_update_begin(&rxq_stats->napi_syncp);
-	rxq_stats->rx_packets += rx_packets;
+	u64_stats_add(&rxq_stats->napi.rx_packets, rx_packets);
-	rxq_stats->rx_bytes += rx_bytes;
+	u64_stats_add(&rxq_stats->napi.rx_bytes, rx_bytes);
-	rxq_stats->rx_pkt_n += count;
+	u64_stats_add(&rxq_stats->napi.rx_pkt_n, count);
-	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
+	u64_stats_update_end(&rxq_stats->napi_syncp);
 	priv->xstats.rx_dropped += rx_dropped;
 	priv->xstats.rx_errors += rx_errors;
 	struct stmmac_priv *priv = ch->priv_data;
 	struct stmmac_rxq_stats *rxq_stats;
 	u32 chan = ch->index;
-	unsigned long flags;
 	int work_done;
 	rxq_stats = &priv->xstats.rxq_stats[chan];
-	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
+	u64_stats_update_begin(&rxq_stats->napi_syncp);
-	rxq_stats->napi_poll++;
+	u64_stats_inc(&rxq_stats->napi.poll);
-	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
+	u64_stats_update_end(&rxq_stats->napi_syncp);
 	work_done = stmmac_rx(priv, budget, chan);
 	if (work_done < budget && napi_complete_done(napi, work_done)) {
 	struct stmmac_txq_stats *txq_stats;
 	bool pending_packets = false;
 	u32 chan = ch->index;
-	unsigned long flags;
 	int work_done;
 	txq_stats = &priv->xstats.txq_stats[chan];
-	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
+	u64_stats_update_begin(&txq_stats->napi_syncp);
-	txq_stats->napi_poll++;
+	u64_stats_inc(&txq_stats->napi.poll);
-	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
+	u64_stats_update_end(&txq_stats->napi_syncp);
 	work_done = stmmac_tx_clean(priv, budget, chan, &pending_packets);
 	work_done = min(work_done, budget);
 	struct stmmac_rxq_stats *rxq_stats;
 	struct stmmac_txq_stats *txq_stats;
 	u32 chan = ch->index;
-	unsigned long flags;
 	rxq_stats = &priv->xstats.rxq_stats[chan];
-	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
+	u64_stats_update_begin(&rxq_stats->napi_syncp);
-	rxq_stats->napi_poll++;
+	u64_stats_inc(&rxq_stats->napi.poll);
-	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
+	u64_stats_update_end(&rxq_stats->napi_syncp);
 	txq_stats = &priv->xstats.txq_stats[chan];
-	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
+	u64_stats_update_begin(&txq_stats->napi_syncp);
-	txq_stats->napi_poll++;
+	u64_stats_inc(&txq_stats->napi.poll);
-	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
+	u64_stats_update_end(&txq_stats->napi_syncp);
 	tx_done = stmmac_tx_clean(priv, budget, chan, &tx_pending_packets);
 	tx_done = min(tx_done, budget);
 		u64 tx_bytes;
 		do {
-			start = u64_stats_fetch_begin(&txq_stats->syncp);
+			start = u64_stats_fetch_begin(&txq_stats->q_syncp);
-			tx_packets = txq_stats->tx_packets;
+			tx_bytes   = u64_stats_read(&txq_stats->q.tx_bytes);
-			tx_bytes   = txq_stats->tx_bytes;
+		} while (u64_stats_fetch_retry(&txq_stats->q_syncp, start));
-		} while (u64_stats_fetch_retry(&txq_stats->syncp, start));
+		do {
+			start = u64_stats_fetch_begin(&txq_stats->napi_syncp);
+			tx_packets = u64_stats_read(&txq_stats->napi.tx_packets);
+		} while (u64_stats_fetch_retry(&txq_stats->napi_syncp, start));
 		stats->tx_packets += tx_packets;
 		stats->tx_bytes += tx_bytes;
 		u64 rx_bytes;
 		do {
-			start = u64_stats_fetch_begin(&rxq_stats->syncp);
+			start = u64_stats_fetch_begin(&rxq_stats->napi_syncp);
-			rx_packets = rxq_stats->rx_packets;
+			rx_packets = u64_stats_read(&rxq_stats->napi.rx_packets);
-			rx_bytes   = rxq_stats->rx_bytes;
+			rx_bytes   = u64_stats_read(&rxq_stats->napi.rx_bytes);
-		} while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
+		} while (u64_stats_fetch_retry(&rxq_stats->napi_syncp, start));
 		stats->rx_packets += rx_packets;
 		stats->rx_bytes += rx_bytes;
 	priv->dev = ndev;
 	for (i = 0; i < MTL_MAX_RX_QUEUES; i++)
-		u64_stats_init(&priv->xstats.rxq_stats[i].syncp);
+		u64_stats_init(&priv->xstats.rxq_stats[i].napi_syncp);
-	for (i = 0; i < MTL_MAX_TX_QUEUES; i++)
+	for (i = 0; i < MTL_MAX_TX_QUEUES; i++) {
-		u64_stats_init(&priv->xstats.txq_stats[i].syncp);
+		u64_stats_init(&priv->xstats.txq_stats[i].q_syncp);
+		u64_stats_init(&priv->xstats.txq_stats[i].napi_syncp);
+	}
+	priv->xstats.pcpu_stats =
+		devm_netdev_alloc_pcpu_stats(device, struct stmmac_pcpu_stats);
+	if (!priv->xstats.pcpu_stats)
+		return -ENOMEM;
 	stmmac_set_ethtool_ops(ndev);
 	priv->pause = pause;

drivers/net/ethernet/ti/cpsw.c+2−0

@@ -631,6 +631,8 @@ static void cpsw_slave_open(struct cpsw_slave slave, struct cpsw_priv priv) · 630 unmodified lines
631	}	631	}
632	}	632	}
633		633
		634	phy->mac_managed_pm = true;
		635
634	slave->phy = phy;	636	slave->phy = phy;
635		637
636	phy_attached_info(slave->phy);	638	phy_attached_info(slave->phy);

drivers/net/ethernet/ti/cpsw_new.c+3−0

@@ -773,6 +773,9 @@ static void cpsw_slave_open(struct cpsw_slave slave, struct cpsw_priv priv) · 772 unmodified lines
773	slave->slave_num);	773	slave->slave_num);
774	return;	774	return;
775	}	775	}
		776
		777	phy->mac_managed_pm = true;
		778
776	slave->phy = phy;	779	slave->phy = phy;
777		780
778	phy_attached_info(slave->phy);	781	phy_attached_info(slave->phy);

drivers/net/hyperv/netvsc_drv.c+62−20

 #define LINKCHANGE_INT (2 * HZ)
 #define VF_TAKEOVER_INT (HZ / 10)
+/* Macros to define the context of vf registration */
+#define VF_REG_IN_PROBE		1
+#define VF_REG_IN_NOTIFIER	2
 static unsigned int ring_size __ro_after_init = 128;
 module_param(ring_size, uint, 0444);
 MODULE_PARM_DESC(ring_size, "Ring buffer size (# of 4K pages)");
 }
 static int netvsc_vf_join(struct net_device *vf_netdev,
-			  struct net_device *ndev)
+			  struct net_device *ndev, int context)
 {
 	struct net_device_context *ndev_ctx = netdev_priv(ndev);
 	int ret;
 		goto upper_link_failed;
 	}
-	schedule_delayed_work(&ndev_ctx->vf_takeover, VF_TAKEOVER_INT);
+	/* If this registration is called from probe context vf_takeover
+	 * is taken care of later in probe itself.
+	 */
+	if (context == VF_REG_IN_NOTIFIER)
+		schedule_delayed_work(&ndev_ctx->vf_takeover, VF_TAKEOVER_INT);
 	call_netdevice_notifiers(NETDEV_JOIN, vf_netdev);
 	return NOTIFY_DONE;
 }
-static int netvsc_register_vf(struct net_device *vf_netdev)
+static int netvsc_register_vf(struct net_device *vf_netdev, int context)
 {
 	struct net_device_context *net_device_ctx;
 	struct netvsc_device *netvsc_dev;
 	netdev_info(ndev, "VF registering: %s\n", vf_netdev->name);
-	if (netvsc_vf_join(vf_netdev, ndev) != 0)
+	if (netvsc_vf_join(vf_netdev, ndev, context) != 0)
 		return NOTIFY_DONE;
 	dev_hold(vf_netdev);
 	return NOTIFY_OK;
 }
+static int check_dev_is_matching_vf(struct net_device *event_ndev)
+{
+	/* Skip NetVSC interfaces */
+	if (event_ndev->netdev_ops == &device_ops)
+		return -ENODEV;
+	/* Avoid non-Ethernet type devices */
+	if (event_ndev->type != ARPHRD_ETHER)
+		return -ENODEV;
+	/* Avoid Vlan dev with same MAC registering as VF */
+	if (is_vlan_dev(event_ndev))
+		return -ENODEV;
+	/* Avoid Bonding master dev with same MAC registering as VF */
+	if (netif_is_bond_master(event_ndev))
+		return -ENODEV;
+	return 0;
+}
 static int netvsc_probe(struct hv_device *dev,
 			const struct hv_vmbus_device_id *dev_id)
 {
-	struct net_device *net = NULL;
+	struct net_device *net = NULL, *vf_netdev;
 	struct net_device_context *net_device_ctx;
 	struct netvsc_device_info *device_info = NULL;
 	struct netvsc_device *nvdev;
 	}
 	list_add(&net_device_ctx->list, &netvsc_dev_list);
+	/* When the hv_netvsc driver is unloaded and reloaded, the
+	 * NET_DEVICE_REGISTER for the vf device is replayed before probe
+	 * is complete. This is because register_netdevice_notifier() gets
+	 * registered before vmbus_driver_register() so that callback func
+	 * is set before probe and we don't miss events like NETDEV_POST_INIT
+	 * So, in this section we try to register the matching vf device that
+	 * is present as a netdevice, knowing that its register call is not
+	 * processed in the netvsc_netdev_notifier(as probing is progress and
+	 * get_netvsc_byslot fails).
+	 */
+	for_each_netdev(dev_net(net), vf_netdev) {
+		ret = check_dev_is_matching_vf(vf_netdev);
+		if (ret != 0)
+			continue;
+		if (net != get_netvsc_byslot(vf_netdev))
+			continue;
+		netvsc_prepare_bonding(vf_netdev);
+		netvsc_register_vf(vf_netdev, VF_REG_IN_PROBE);
+		__netvsc_vf_setup(net, vf_netdev);
+		break;
+	}
 	rtnl_unlock();
 	netvsc_devinfo_put(device_info);
 			       unsigned long event, void *ptr)
 {
 	struct net_device *event_dev = netdev_notifier_info_to_dev(ptr);
+	int ret = 0;
-	/* Skip our own events */
+	ret = check_dev_is_matching_vf(event_dev);
-	if (event_dev->netdev_ops == &device_ops)
+	if (ret != 0)
-		return NOTIFY_DONE;
-	/* Avoid non-Ethernet type devices */
-	if (event_dev->type != ARPHRD_ETHER)
-		return NOTIFY_DONE;
-	/* Avoid Vlan dev with same MAC registering as VF */
-	if (is_vlan_dev(event_dev))
-		return NOTIFY_DONE;
-	/* Avoid Bonding master dev with same MAC registering as VF */
-	if (netif_is_bond_master(event_dev))
 		return NOTIFY_DONE;
 	switch (event) {
 	case NETDEV_POST_INIT:
 		return netvsc_prepare_bonding(event_dev);
 	case NETDEV_REGISTER:
-		return netvsc_register_vf(event_dev);
+		return netvsc_register_vf(event_dev, VF_REG_IN_NOTIFIER);
 	case NETDEV_UNREGISTER:
 		return netvsc_unregister_vf(event_dev);
 	case NETDEV_UP:

drivers/net/netdevsim/dev.c+4−4

 				      trap_report_dw.work);
 	nsim_dev = nsim_trap_data->nsim_dev;
-	/* For each running port and enabled packet trap, generate a UDP
-	 * packet with a random 5-tuple and report it.
-	 */
 	if (!devl_trylock(priv_to_devlink(nsim_dev))) {
-		schedule_delayed_work(&nsim_dev->trap_data->trap_report_dw, 0);
+		schedule_delayed_work(&nsim_dev->trap_data->trap_report_dw, 1);
 		return;
 	}
+	/* For each running port and enabled packet trap, generate a UDP
+	 * packet with a random 5-tuple and report it.
+	 */
 	list_for_each_entry(nsim_dev_port, &nsim_dev->port_list, list) {
 		if (!netif_running(nsim_dev_port->ns->netdev))
 			continue;

drivers/net/ppp/ppp_async.c+4−0

 	case PPPIOCSMRU:
 		if (get_user(val, p))
 			break;
+		if (val > U16_MAX) {
+			err = -EINVAL;
+			break;
+		}
 		if (val < PPP_MRU)
 			val = PPP_MRU;
 		ap->mru = val;

drivers/net/wireless/ath/ar5523/ar5523.c+1−0

@@ -1803,5 +1803,6 @@ static struct usb_driver ar5523_driver = { · 1802 unmodified lines
1803		1803
1804	module_usb_driver(ar5523_driver);	1804	module_usb_driver(ar5523_driver);
1805		1805
		1806	MODULE_DESCRIPTION("Atheros AR5523 wireless driver");
1806	MODULE_LICENSE("Dual BSD/GPL");	1807	MODULE_LICENSE("Dual BSD/GPL");
1807	MODULE_FIRMWARE(AR5523_FIRMWARE_FILE);	1808	MODULE_FIRMWARE(AR5523_FIRMWARE_FILE);

drivers/net/wireless/ath/wcn36xx/main.c+1−0

@@ -1685,6 +1685,7 @@ static struct platform_driver wcn36xx_driver = { · 1684 unmodified lines
1685		1685
1686	module_platform_driver(wcn36xx_driver);	1686	module_platform_driver(wcn36xx_driver);
1687		1687
		1688	MODULE_DESCRIPTION("Qualcomm Atheros WCN3660/3680 wireless driver");
1688	MODULE_LICENSE("Dual BSD/GPL");	1689	MODULE_LICENSE("Dual BSD/GPL");
1689	MODULE_AUTHOR("Eugene Krasnikov k.eugene.e@gmail.com");	1690	MODULE_AUTHOR("Eugene Krasnikov k.eugene.e@gmail.com");
1690	MODULE_FIRMWARE(WLAN_NV_FILE);	1691	MODULE_FIRMWARE(WLAN_NV_FILE);

drivers/net/wireless/broadcom/brcm80211/brcmfmac/bca/module.c+1−0

@@ -20,6 +20,7 @@ static void __exit brcmf_bca_exit(void) · 19 unmodified lines
20	brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_BCA, THIS_MODULE);	20	brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_BCA, THIS_MODULE);
21	}	21	}
22		22
		23	MODULE_DESCRIPTION("Broadcom FullMAC WLAN driver plugin for Broadcom AP chipsets");
23	MODULE_LICENSE("Dual BSD/GPL");	24	MODULE_LICENSE("Dual BSD/GPL");
24	MODULE_IMPORT_NS(BRCMFMAC);	25	MODULE_IMPORT_NS(BRCMFMAC);
25		26

drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c+4−2

 		if (req->channels[i] == chan)
 			break;
 	}
-	if (i == req->n_channels)
+	if (i == req->n_channels) {
-		req->channels[req->n_channels++] = chan;
+		req->n_channels++;
+		req->channels[i] = chan;
+	}
 	for (i = 0; i < req->n_ssids; i++) {
 		if (req->ssids[i].ssid_len == ssid_len &&

drivers/net/wireless/broadcom/brcm80211/brcmfmac/cyw/module.c+1−0

@@ -20,6 +20,7 @@ static void __exit brcmf_cyw_exit(void) · 19 unmodified lines
20	brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_CYW, THIS_MODULE);	20	brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_CYW, THIS_MODULE);
21	}	21	}
22		22
		23	MODULE_DESCRIPTION("Broadcom FullMAC WLAN driver plugin for Cypress/Infineon chipsets");
23	MODULE_LICENSE("Dual BSD/GPL");	24	MODULE_LICENSE("Dual BSD/GPL");
24	MODULE_IMPORT_NS(BRCMFMAC);	25	MODULE_IMPORT_NS(BRCMFMAC);
25		26

drivers/net/wireless/broadcom/brcm80211/brcmfmac/wcc/module.c+1−0

@@ -20,6 +20,7 @@ static void __exit brcmf_wcc_exit(void) · 19 unmodified lines
20	brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_WCC, THIS_MODULE);	20	brcmf_fwvid_unregister_vendor(BRCMF_FWVENDOR_WCC, THIS_MODULE);
21	}	21	}
22		22
		23	MODULE_DESCRIPTION("Broadcom FullMAC WLAN driver plugin for Broadcom mobility chipsets");
23	MODULE_LICENSE("Dual BSD/GPL");	24	MODULE_LICENSE("Dual BSD/GPL");
24	MODULE_IMPORT_NS(BRCMFMAC);	25	MODULE_IMPORT_NS(BRCMFMAC);
25		26

drivers/net/wireless/intel/iwlwifi/fw/api/debug.h+1−1

@@ -537,7 +537,7 @@ enum iwl_fw_dbg_config_cmd_type { · 536 unmodified lines
537	}; /* LDBG_CFG_CMD_TYPE_API_E_VER_1 */	537	}; /* LDBG_CFG_CMD_TYPE_API_E_VER_1 */
538		538
539	/* this token disables debug asserts in the firmware */	539	/* this token disables debug asserts in the firmware */
540	#define IWL_FW_DBG_CONFIG_TOKEN 0x00011301	540	#define IWL_FW_DBG_CONFIG_TOKEN 0x00010001
541		541
542	/**	542	/**
543	* struct iwl_fw_dbg_config_cmd - configure FW debug	543	* struct iwl_fw_dbg_config_cmd - configure FW debug

drivers/net/wireless/intel/iwlwifi/fw/dbg.c+1−2

 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
 /*
- * Copyright (C) 2005-2014, 2018-2023 Intel Corporation
+ * Copyright (C) 2005-2014, 2018-2024 Intel Corporation
  * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
  * Copyright (C) 2015-2017 Intel Deutschland GmbH
  */
  * @fwrt_ptr: pointer to the buffer coming from fwrt
  * @trans_ptr: pointer to struct %iwl_trans_dump_data which contains the
  *	transport's data.
- * @trans_len: length of the valid data in trans_ptr
  * @fwrt_len: length of the valid data in fwrt_ptr
  */
 struct iwl_fw_dump_ptrs {

drivers/net/wireless/intel/iwlwifi/iwl-drv.c+1−0

@@ -128,6 +128,7 @@ static void iwl_dealloc_ucode(struct iwl_drv *drv) · 127 unmodified lines
128	kfree(drv->fw.ucode_capa.cmd_versions);	128	kfree(drv->fw.ucode_capa.cmd_versions);
129	kfree(drv->fw.phy_integration_ver);	129	kfree(drv->fw.phy_integration_ver);
130	kfree(drv->trans->dbg.pc_data);	130	kfree(drv->trans->dbg.pc_data);
		131	drv->trans->dbg.pc_data = NULL;
131		132
132	for (i = 0; i < IWL_UCODE_TYPE_MAX; i++)	133	for (i = 0; i < IWL_UCODE_TYPE_MAX; i++)
133	iwl_free_fw_img(drv, drv->fw.img + i);	134	iwl_free_fw_img(drv, drv->fw.img + i);

drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c+1−4

 			.has_eht = true,
 			.eht_cap_elem = {
 				.mac_cap_info[0] =
-					IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
 					IEEE80211_EHT_MAC_CAP0_OM_CONTROL |
 					IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
 					IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2 |
 			.has_eht = true,
 			.eht_cap_elem = {
 				.mac_cap_info[0] =
-					IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
 					IEEE80211_EHT_MAC_CAP0_OM_CONTROL |
 					IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
 					IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2,
 	if (CSR_HW_REV_TYPE(trans->hw_rev) == IWL_CFG_MAC_TYPE_GL &&
 	    iftype_data->eht_cap.has_eht) {
 		iftype_data->eht_cap.eht_cap_elem.mac_cap_info[0] &=
-			~(IEEE80211_EHT_MAC_CAP0_EPCS_PRIO_ACCESS |
+			~(IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
-			  IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1 |
 			  IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE2);
 		iftype_data->eht_cap.eht_cap_elem.phy_cap_info[3] &=
 			~(IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO |

drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c+4−2

 	 */
 	if (vif->type == NL80211_IFTYPE_AP ||
 	    vif->type == NL80211_IFTYPE_ADHOC) {
-		iwl_mvm_vif_dbgfs_add_link(mvm, vif);
+		if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
+			iwl_mvm_vif_dbgfs_add_link(mvm, vif);
 		ret = 0;
 		goto out;
 	}
 			iwl_mvm_chandef_get_primary_80(&vif->bss_conf.chandef);
 	}
-	iwl_mvm_vif_dbgfs_add_link(mvm, vif);
+	if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
+		iwl_mvm_vif_dbgfs_add_link(mvm, vif);
 	if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status) &&
 	    vif->type == NL80211_IFTYPE_STATION && !vif->p2p &&

drivers/net/wireless/intel/iwlwifi/mvm/mld-mac80211.c+5−4

 		ieee80211_hw_set(mvm->hw, RX_INCLUDES_FCS);
 	}
-	iwl_mvm_vif_dbgfs_add_link(mvm, vif);
+	if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
+		iwl_mvm_vif_dbgfs_add_link(mvm, vif);
 	if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status) &&
 	    vif->type == NL80211_IFTYPE_STATION && !vif->p2p &&
 		mvmvif->ap_ibss_active = false;
 	}
+	iwl_mvm_link_changed(mvm, vif, link_conf,
+			     LINK_CONTEXT_MODIFY_ACTIVE, false);
 	if (iwl_mvm_is_esr_supported(mvm->fwrt.trans) && n_active > 1) {
 		int ret = iwl_mvm_esr_mode_inactive(mvm, vif);
 	if (vif->type == NL80211_IFTYPE_MONITOR)
 		iwl_mvm_mld_rm_snif_sta(mvm, vif);
-	iwl_mvm_link_changed(mvm, vif, link_conf,
-			     LINK_CONTEXT_MODIFY_ACTIVE, false);
 	if (switching_chanctx)
 		return;
 	mvmvif->link[link_id]->phy_ctxt = NULL;

drivers/net/wireless/intersil/p54/p54spi.c+1−0

@@ -700,6 +700,7 @@ static struct spi_driver p54spi_driver = { · 699 unmodified lines
700		700
701	module_spi_driver(p54spi_driver);	701	module_spi_driver(p54spi_driver);
702		702
		703	MODULE_DESCRIPTION("Prism54 SPI wireless driver");
703	MODULE_LICENSE("GPL");	704	MODULE_LICENSE("GPL");
704	MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");	705	MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");
705	MODULE_ALIAS("spi:cx3110x");	706	MODULE_ALIAS("spi:cx3110x");

drivers/net/wireless/mediatek/mt76/mt7603/main.c+1−0

@@ -728,6 +728,7 @@ const struct ieee80211_ops mt7603_ops = { · 727 unmodified lines
728	.set_sar_specs = mt7603_set_sar_specs,	728	.set_sar_specs = mt7603_set_sar_specs,
729	};	729	};
730		730
		731	MODULE_DESCRIPTION("MediaTek MT7603E and MT76x8 wireless driver");
731	MODULE_LICENSE("Dual BSD/GPL");	732	MODULE_LICENSE("Dual BSD/GPL");
732		733
733	static int __init mt7603_init(void)	734	static int __init mt7603_init(void)

drivers/net/wireless/mediatek/mt76/mt7615/main.c+1−0

@@ -1375,4 +1375,5 @@ const struct ieee80211_ops mt7615_ops = { · 1374 unmodified lines
1375	};	1375	};
1376	EXPORT_SYMBOL_GPL(mt7615_ops);	1376	EXPORT_SYMBOL_GPL(mt7615_ops);
1377		1377
		1378	MODULE_DESCRIPTION("MediaTek MT7615E and MT7663E wireless driver");
1378	MODULE_LICENSE("Dual BSD/GPL");	1379	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7615/mmio.c+1−0

@@ -270,4 +270,5 @@ static void __exit mt7615_exit(void) · 269 unmodified lines
270		270
271	module_init(mt7615_init);	271	module_init(mt7615_init);
272	module_exit(mt7615_exit);	272	module_exit(mt7615_exit);
		273	MODULE_DESCRIPTION("MediaTek MT7615E MMIO helpers");
273	MODULE_LICENSE("Dual BSD/GPL");	274	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7615/sdio.c+1−0

@@ -253,4 +253,5 @@ module_sdio_driver(mt7663s_driver); · 252 unmodified lines
253		253
254	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");	254	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
255	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	255	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
		256	MODULE_DESCRIPTION("MediaTek MT7663S (SDIO) wireless driver");
256	MODULE_LICENSE("Dual BSD/GPL");	257	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7615/usb.c+1−0

@@ -281,4 +281,5 @@ module_usb_driver(mt7663u_driver); · 280 unmodified lines
281		281
282	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");	282	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
283	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	283	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
		284	MODULE_DESCRIPTION("MediaTek MT7663U (USB) wireless driver");
284	MODULE_LICENSE("Dual BSD/GPL");	285	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7615/usb_sdio.c+1−0

@@ -349,4 +349,5 @@ EXPORT_SYMBOL_GPL(mt7663_usb_sdio_register_device); · 348 unmodified lines
349		349
350	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	350	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
351	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");	351	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
		352	MODULE_DESCRIPTION("MediaTek MT7663 SDIO/USB helpers");
352	MODULE_LICENSE("Dual BSD/GPL");	353	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c+1−0

@@ -3160,4 +3160,5 @@ exit: · 3159 unmodified lines
3160	EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message);	3160	EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message);
3161		3161
3162	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	3162	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
		3163	MODULE_DESCRIPTION("MediaTek MT76x connac layer helpers");
3163	MODULE_LICENSE("Dual BSD/GPL");	3164	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c+1−0

@@ -342,4 +342,5 @@ int mt76x0_eeprom_init(struct mt76x02_dev *dev) · 341 unmodified lines
342	return 0;	342	return 0;
343	}	343	}
344		344
		345	MODULE_DESCRIPTION("MediaTek MT76x EEPROM helpers");
345	MODULE_LICENSE("Dual BSD/GPL");	346	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt76x0/pci.c+1−0

@@ -302,6 +302,7 @@ static const struct pci_device_id mt76x0e_device_table[] = { · 301 unmodified lines
302	MODULE_DEVICE_TABLE(pci, mt76x0e_device_table);	302	MODULE_DEVICE_TABLE(pci, mt76x0e_device_table);
303	MODULE_FIRMWARE(MT7610E_FIRMWARE);	303	MODULE_FIRMWARE(MT7610E_FIRMWARE);
304	MODULE_FIRMWARE(MT7650E_FIRMWARE);	304	MODULE_FIRMWARE(MT7650E_FIRMWARE);
		305	MODULE_DESCRIPTION("MediaTek MT76x0E (PCIe) wireless driver");
305	MODULE_LICENSE("Dual BSD/GPL");	306	MODULE_LICENSE("Dual BSD/GPL");
306		307
307	static struct pci_driver mt76x0e_driver = {	308	static struct pci_driver mt76x0e_driver = {

drivers/net/wireless/mediatek/mt76/mt76x0/usb.c+1−0

@@ -336,6 +336,7 @@ err: · 335 unmodified lines
336	MODULE_DEVICE_TABLE(usb, mt76x0_device_table);	336	MODULE_DEVICE_TABLE(usb, mt76x0_device_table);
337	MODULE_FIRMWARE(MT7610E_FIRMWARE);	337	MODULE_FIRMWARE(MT7610E_FIRMWARE);
338	MODULE_FIRMWARE(MT7610U_FIRMWARE);	338	MODULE_FIRMWARE(MT7610U_FIRMWARE);
		339	MODULE_DESCRIPTION("MediaTek MT76x0U (USB) wireless driver");
339	MODULE_LICENSE("GPL");	340	MODULE_LICENSE("GPL");
340		341
341	static struct usb_driver mt76x0_driver = {	342	static struct usb_driver mt76x0_driver = {

drivers/net/wireless/mediatek/mt76/mt76x02_usb_mcu.c+1−0

@@ -293,4 +293,5 @@ void mt76x02u_init_mcu(struct mt76_dev *dev) · 292 unmodified lines
293	EXPORT_SYMBOL_GPL(mt76x02u_init_mcu);	293	EXPORT_SYMBOL_GPL(mt76x02u_init_mcu);
294		294
295	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");	295	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
		296	MODULE_DESCRIPTION("MediaTek MT76x02 MCU helpers");
296	MODULE_LICENSE("Dual BSD/GPL");	297	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt76x02_util.c+1−0

@@ -696,4 +696,5 @@ void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev) · 695 unmodified lines
696	}	696	}
697	EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);	697	EXPORT_SYMBOL_GPL(mt76x02_config_mac_addr_list);
698		698
		699	MODULE_DESCRIPTION("MediaTek MT76x02 helpers");
699	MODULE_LICENSE("Dual BSD/GPL");	700	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt76x2/eeprom.c+1−0

@@ -506,4 +506,5 @@ int mt76x2_eeprom_init(struct mt76x02_dev *dev) · 505 unmodified lines
506	}	506	}
507	EXPORT_SYMBOL_GPL(mt76x2_eeprom_init);	507	EXPORT_SYMBOL_GPL(mt76x2_eeprom_init);
508		508
		509	MODULE_DESCRIPTION("MediaTek MT76x2 EEPROM helpers");
509	MODULE_LICENSE("Dual BSD/GPL");	510	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt76x2/pci.c+1−0

@@ -165,6 +165,7 @@ mt76x2e_resume(struct pci_dev *pdev) · 164 unmodified lines
165	MODULE_DEVICE_TABLE(pci, mt76x2e_device_table);	165	MODULE_DEVICE_TABLE(pci, mt76x2e_device_table);
166	MODULE_FIRMWARE(MT7662_FIRMWARE);	166	MODULE_FIRMWARE(MT7662_FIRMWARE);
167	MODULE_FIRMWARE(MT7662_ROM_PATCH);	167	MODULE_FIRMWARE(MT7662_ROM_PATCH);
		168	MODULE_DESCRIPTION("MediaTek MT76x2E (PCIe) wireless driver");
168	MODULE_LICENSE("Dual BSD/GPL");	169	MODULE_LICENSE("Dual BSD/GPL");
169		170
170	static struct pci_driver mt76pci_driver = {	171	static struct pci_driver mt76pci_driver = {

drivers/net/wireless/mediatek/mt76/mt76x2/usb.c+1−0

@@ -147,4 +147,5 @@ static struct usb_driver mt76x2u_driver = { · 146 unmodified lines
147	module_usb_driver(mt76x2u_driver);	147	module_usb_driver(mt76x2u_driver);
148		148
149	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");	149	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
		150	MODULE_DESCRIPTION("MediaTek MT76x2U (USB) wireless driver");
150	MODULE_LICENSE("Dual BSD/GPL");	151	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7915/mmio.c+1−0

@@ -958,4 +958,5 @@ static void __exit mt7915_exit(void) · 957 unmodified lines
958		958
959	module_init(mt7915_init);	959	module_init(mt7915_init);
960	module_exit(mt7915_exit);	960	module_exit(mt7915_exit);
		961	MODULE_DESCRIPTION("MediaTek MT7915E MMIO helpers");
961	MODULE_LICENSE("Dual BSD/GPL");	962	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7921/main.c+1−0

@@ -1418,5 +1418,6 @@ const struct ieee80211_ops mt7921_ops = { · 1417 unmodified lines
1418	};	1418	};
1419	EXPORT_SYMBOL_GPL(mt7921_ops);	1419	EXPORT_SYMBOL_GPL(mt7921_ops);
1420		1420
		1421	MODULE_DESCRIPTION("MediaTek MT7921 core driver");
1421	MODULE_LICENSE("Dual BSD/GPL");	1422	MODULE_LICENSE("Dual BSD/GPL");
1422	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");	1423	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");

drivers/net/wireless/mediatek/mt76/mt7921/pci.c+1−0

@@ -544,4 +544,5 @@ MODULE_FIRMWARE(MT7922_FIRMWARE_WM); · 543 unmodified lines
544	MODULE_FIRMWARE(MT7922_ROM_PATCH);	544	MODULE_FIRMWARE(MT7922_ROM_PATCH);
545	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");	545	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
546	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	546	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
		547	MODULE_DESCRIPTION("MediaTek MT7921E (PCIe) wireless driver");
547	MODULE_LICENSE("Dual BSD/GPL");	548	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7921/sdio.c+1−0

@@ -323,5 +323,6 @@ static struct sdio_driver mt7921s_driver = { · 322 unmodified lines
323	.drv.pm = pm_sleep_ptr(&mt7921s_pm_ops),	323	.drv.pm = pm_sleep_ptr(&mt7921s_pm_ops),
324	};	324	};
325	module_sdio_driver(mt7921s_driver);	325	module_sdio_driver(mt7921s_driver);
		326	MODULE_DESCRIPTION("MediaTek MT7921S (SDIO) wireless driver");
326	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");	327	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
327	MODULE_LICENSE("Dual BSD/GPL");	328	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7921/usb.c+1−0

@@ -336,5 +336,6 @@ static struct usb_driver mt7921u_driver = { · 335 unmodified lines
336	};	336	};
337	module_usb_driver(mt7921u_driver);	337	module_usb_driver(mt7921u_driver);
338		338
		339	MODULE_DESCRIPTION("MediaTek MT7921U (USB) wireless driver");
339	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	340	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
340	MODULE_LICENSE("Dual BSD/GPL");	341	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7925/main.c+1−0

@@ -1450,4 +1450,5 @@ const struct ieee80211_ops mt7925_ops = { · 1449 unmodified lines
1450	EXPORT_SYMBOL_GPL(mt7925_ops);	1450	EXPORT_SYMBOL_GPL(mt7925_ops);
1451		1451
1452	MODULE_AUTHOR("Deren Wu <deren.wu@mediatek.com>");	1452	MODULE_AUTHOR("Deren Wu <deren.wu@mediatek.com>");
		1453	MODULE_DESCRIPTION("MediaTek MT7925 core driver");
1453	MODULE_LICENSE("Dual BSD/GPL");	1454	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7925/pci.c+1−0

@@ -583,4 +583,5 @@ MODULE_FIRMWARE(MT7925_FIRMWARE_WM); · 582 unmodified lines
583	MODULE_FIRMWARE(MT7925_ROM_PATCH);	583	MODULE_FIRMWARE(MT7925_ROM_PATCH);
584	MODULE_AUTHOR("Deren Wu <deren.wu@mediatek.com>");	584	MODULE_AUTHOR("Deren Wu <deren.wu@mediatek.com>");
585	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	585	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
		586	MODULE_DESCRIPTION("MediaTek MT7925E (PCIe) wireless driver");
586	MODULE_LICENSE("Dual BSD/GPL");	587	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt7925/usb.c+1−0

@@ -329,4 +329,5 @@ static struct usb_driver mt7925u_driver = { · 328 unmodified lines
329	module_usb_driver(mt7925u_driver);	329	module_usb_driver(mt7925u_driver);
330		330
331	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	331	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
		332	MODULE_DESCRIPTION("MediaTek MT7925U (USB) wireless driver");
332	MODULE_LICENSE("Dual BSD/GPL");	333	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/mt792x_core.c+1−0

@@ -862,5 +862,6 @@ int mt792x_load_firmware(struct mt792x_dev *dev) · 861 unmodified lines
862	}	862	}
863	EXPORT_SYMBOL_GPL(mt792x_load_firmware);	863	EXPORT_SYMBOL_GPL(mt792x_load_firmware);
864		864
		865	MODULE_DESCRIPTION("MediaTek MT792x core driver");
865	MODULE_LICENSE("Dual BSD/GPL");	866	MODULE_LICENSE("Dual BSD/GPL");
866	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	867	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");

drivers/net/wireless/mediatek/mt76/mt792x_usb.c+1−0

@@ -314,5 +314,6 @@ void mt792xu_disconnect(struct usb_interface *usb_intf) · 313 unmodified lines
314	}	314	}
315	EXPORT_SYMBOL_GPL(mt792xu_disconnect);	315	EXPORT_SYMBOL_GPL(mt792xu_disconnect);
316		316
		317	MODULE_DESCRIPTION("MediaTek MT792x USB helpers");
317	MODULE_LICENSE("Dual BSD/GPL");	318	MODULE_LICENSE("Dual BSD/GPL");
318	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	319	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c+2−1

@@ -4477,7 +4477,8 @@ int mt7996_mcu_set_txpower_sku(struct mt7996_phy *phy) · 4476 unmodified lines
4477		4477
4478	skb_put_data(skb, &req, sizeof(req));	4478	skb_put_data(skb, &req, sizeof(req));
4479	/* cck and ofdm */	4479	/* cck and ofdm */
4480	skb_put_data(skb, &la.cck, sizeof(la.cck) + sizeof(la.ofdm));	4480	skb_put_data(skb, &la.cck, sizeof(la.cck));
		4481	skb_put_data(skb, &la.ofdm, sizeof(la.ofdm));
4481	/* ht20 */	4482	/* ht20 */
4482	skb_put_data(skb, &la.mcs[0], 8);	4483	skb_put_data(skb, &la.mcs[0], 8);
4483	/* ht40 */	4484	/* ht40 */

drivers/net/wireless/mediatek/mt76/mt7996/mmio.c+1−0

@@ -650,4 +650,5 @@ static void __exit mt7996_exit(void) · 649 unmodified lines
650		650
651	module_init(mt7996_init);	651	module_init(mt7996_init);
652	module_exit(mt7996_exit);	652	module_exit(mt7996_exit);
		653	MODULE_DESCRIPTION("MediaTek MT7996 MMIO helpers");
653	MODULE_LICENSE("Dual BSD/GPL");	654	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/sdio.c+1−0

@@ -672,4 +672,5 @@ EXPORT_SYMBOL_GPL(mt76s_init); · 671 unmodified lines
672		672
673	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");	673	MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
674	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");	674	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
		675	MODULE_DESCRIPTION("MediaTek MT76x SDIO helpers");
675	MODULE_LICENSE("Dual BSD/GPL");	676	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/usb.c+1−0

@@ -1128,4 +1128,5 @@ int mt76u_init(struct mt76_dev dev, struct usb_interface intf) · 1127 unmodified lines
1128	EXPORT_SYMBOL_GPL(mt76u_init);	1128	EXPORT_SYMBOL_GPL(mt76u_init);
1129		1129
1130	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");	1130	MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>");
		1131	MODULE_DESCRIPTION("MediaTek MT76x USB helpers");
1131	MODULE_LICENSE("Dual BSD/GPL");	1132	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/mediatek/mt76/util.c+1−0

@@ -138,4 +138,5 @@ int __mt76_worker_fn(void *ptr) · 137 unmodified lines
138	}	138	}
139	EXPORT_SYMBOL_GPL(__mt76_worker_fn);	139	EXPORT_SYMBOL_GPL(__mt76_worker_fn);
140		140
		141	MODULE_DESCRIPTION("MediaTek MT76x helpers");
141	MODULE_LICENSE("Dual BSD/GPL");	142	MODULE_LICENSE("Dual BSD/GPL");

drivers/net/wireless/microchip/wilc1000/netdev.c+1−0

@@ -1010,5 +1010,6 @@ error: · 1009 unmodified lines
1010	return ERR_PTR(ret);	1010	return ERR_PTR(ret);
1011	}	1011	}
1012		1012
		1013	MODULE_DESCRIPTION("Atmel WILC1000 core wireless driver");
1013	MODULE_LICENSE("GPL");	1014	MODULE_LICENSE("GPL");
1014	MODULE_FIRMWARE(WILC1000_FW(WILC1000_API_VER));	1015	MODULE_FIRMWARE(WILC1000_FW(WILC1000_API_VER));

drivers/net/wireless/microchip/wilc1000/sdio.c+1−0

@@ -984,4 +984,5 @@ static struct sdio_driver wilc_sdio_driver = { · 983 unmodified lines
984	module_driver(wilc_sdio_driver,	984	module_driver(wilc_sdio_driver,
985	sdio_register_driver,	985	sdio_register_driver,
986	sdio_unregister_driver);	986	sdio_unregister_driver);
		987	MODULE_DESCRIPTION("Atmel WILC1000 SDIO wireless driver");
987	MODULE_LICENSE("GPL");	988	MODULE_LICENSE("GPL");

drivers/net/wireless/microchip/wilc1000/spi.c+1−0

@@ -273,6 +273,7 @@ static struct spi_driver wilc_spi_driver = { · 272 unmodified lines
273	.remove = wilc_bus_remove,	273	.remove = wilc_bus_remove,
274	};	274	};
275	module_spi_driver(wilc_spi_driver);	275	module_spi_driver(wilc_spi_driver);
		276	MODULE_DESCRIPTION("Atmel WILC1000 SPI wireless driver");
276	MODULE_LICENSE("GPL");	277	MODULE_LICENSE("GPL");
277		278
278	static int wilc_spi_tx(struct wilc wilc, u8 b, u32 len)	279	static int wilc_spi_tx(struct wilc wilc, u8 b, u32 len)

drivers/net/wireless/ti/wl1251/sdio.c+1−0

@@ -343,5 +343,6 @@ static void __exit wl1251_sdio_exit(void) · 342 unmodified lines
343	module_init(wl1251_sdio_init);	343	module_init(wl1251_sdio_init);
344	module_exit(wl1251_sdio_exit);	344	module_exit(wl1251_sdio_exit);
345		345
		346	MODULE_DESCRIPTION("TI WL1251 SDIO helpers");
346	MODULE_LICENSE("GPL");	347	MODULE_LICENSE("GPL");
347	MODULE_AUTHOR("Kalle Valo <kvalo@adurom.com>");	348	MODULE_AUTHOR("Kalle Valo <kvalo@adurom.com>");

drivers/net/wireless/ti/wl1251/spi.c+1−0

@@ -342,6 +342,7 @@ static struct spi_driver wl1251_spi_driver = { · 341 unmodified lines
342		342
343	module_spi_driver(wl1251_spi_driver);	343	module_spi_driver(wl1251_spi_driver);
344		344
		345	MODULE_DESCRIPTION("TI WL1251 SPI helpers");
345	MODULE_LICENSE("GPL");	346	MODULE_LICENSE("GPL");
346	MODULE_AUTHOR("Kalle Valo <kvalo@adurom.com>");	347	MODULE_AUTHOR("Kalle Valo <kvalo@adurom.com>");
347	MODULE_ALIAS("spi:wl1251");	348	MODULE_ALIAS("spi:wl1251");

drivers/net/wireless/ti/wl12xx/main.c+1−0

@@ -1955,6 +1955,7 @@ module_param_named(tcxo, tcxo_param, charp, 0); · 1954 unmodified lines
1955	MODULE_PARM_DESC(tcxo,	1955	MODULE_PARM_DESC(tcxo,
1956	"TCXO clock: 19.2, 26, 38.4, 52, 16.368, 32.736, 16.8, 33.6");	1956	"TCXO clock: 19.2, 26, 38.4, 52, 16.368, 32.736, 16.8, 33.6");
1957		1957
		1958	MODULE_DESCRIPTION("TI WL12xx wireless driver");
1958	MODULE_LICENSE("GPL v2");	1959	MODULE_LICENSE("GPL v2");
1959	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");	1960	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
1960	MODULE_FIRMWARE(WL127X_FW_NAME_SINGLE);	1961	MODULE_FIRMWARE(WL127X_FW_NAME_SINGLE);

drivers/net/wireless/ti/wl18xx/main.c+1−0

@@ -2086,6 +2086,7 @@ module_param_named(num_rx_desc, num_rx_desc_param, int, 0400); · 2085 unmodified lines
2086	MODULE_PARM_DESC(num_rx_desc_param,	2086	MODULE_PARM_DESC(num_rx_desc_param,
2087	"Number of Rx descriptors: u8 (default is 32)");	2087	"Number of Rx descriptors: u8 (default is 32)");
2088		2088
		2089	MODULE_DESCRIPTION("TI WiLink 8 wireless driver");
2089	MODULE_LICENSE("GPL v2");	2090	MODULE_LICENSE("GPL v2");
2090	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");	2091	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
2091	MODULE_FIRMWARE(WL18XX_FW_NAME);	2092	MODULE_FIRMWARE(WL18XX_FW_NAME);

drivers/net/wireless/ti/wlcore/main.c+1−0

@@ -6793,6 +6793,7 @@ MODULE_PARM_DESC(bug_on_recovery, "BUG() on fw recovery"); · 6792 unmodified lines
6793	module_param(no_recovery, int, 0600);	6793	module_param(no_recovery, int, 0600);
6794	MODULE_PARM_DESC(no_recovery, "Prevent HW recovery. FW will remain stuck.");	6794	MODULE_PARM_DESC(no_recovery, "Prevent HW recovery. FW will remain stuck.");
6795		6795
		6796	MODULE_DESCRIPTION("TI WLAN core driver");
6796	MODULE_LICENSE("GPL");	6797	MODULE_LICENSE("GPL");
6797	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");	6798	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
6798	MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");	6799	MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");

drivers/net/wireless/ti/wlcore/sdio.c+1−0

@@ -447,6 +447,7 @@ module_sdio_driver(wl1271_sdio_driver); · 446 unmodified lines
447	module_param(dump, bool, 0600);	447	module_param(dump, bool, 0600);
448	MODULE_PARM_DESC(dump, "Enable sdio read/write dumps.");	448	MODULE_PARM_DESC(dump, "Enable sdio read/write dumps.");
449		449
		450	MODULE_DESCRIPTION("TI WLAN SDIO helpers");
450	MODULE_LICENSE("GPL");	451	MODULE_LICENSE("GPL");
451	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");	452	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
452	MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");	453	MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");

drivers/net/wireless/ti/wlcore/spi.c+1−0

@@ -562,6 +562,7 @@ static struct spi_driver wl1271_spi_driver = { · 561 unmodified lines
562	};	562	};
563		563
564	module_spi_driver(wl1271_spi_driver);	564	module_spi_driver(wl1271_spi_driver);
		565	MODULE_DESCRIPTION("TI WLAN SPI helpers");
565	MODULE_LICENSE("GPL");	566	MODULE_LICENSE("GPL");
566	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");	567	MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
567	MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");	568	MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");

drivers/nvme/common/auth.c+1−0

@@ -471,4 +471,5 @@ int nvme_auth_generate_key(u8 secret, struct nvme_dhchap_key *ret_key) · 470 unmodified lines
471	}	471	}
472	EXPORT_SYMBOL_GPL(nvme_auth_generate_key);	472	EXPORT_SYMBOL_GPL(nvme_auth_generate_key);
473		473
		474	MODULE_DESCRIPTION("NVMe Authentication framework");
474	MODULE_LICENSE("GPL v2");	475	MODULE_LICENSE("GPL v2");

drivers/nvme/common/keyring.c+1−0

@@ -181,5 +181,6 @@ static void __exit nvme_keyring_exit(void) · 180 unmodified lines
181		181
182	MODULE_LICENSE("GPL v2");	182	MODULE_LICENSE("GPL v2");
183	MODULE_AUTHOR("Hannes Reinecke <hare@suse.de>");	183	MODULE_AUTHOR("Hannes Reinecke <hare@suse.de>");
		184	MODULE_DESCRIPTION("NVMe Keyring implementation");
184	module_init(nvme_keyring_init);	185	module_init(nvme_keyring_init);
185	module_exit(nvme_keyring_exit);	186	module_exit(nvme_keyring_exit);

drivers/nvme/host/apple.c+7−6

 static void apple_nvme_disable(struct apple_nvme *anv, bool shutdown)
 {
+	enum nvme_ctrl_state state = nvme_ctrl_state(&anv->ctrl);
 	u32 csts = readl(anv->mmio_nvme + NVME_REG_CSTS);
 	bool dead = false, freeze = false;
 	unsigned long flags;
 	if (csts & NVME_CSTS_CFS)
 		dead = true;
-	if (anv->ctrl.state == NVME_CTRL_LIVE ||
+	if (state == NVME_CTRL_LIVE ||
-	    anv->ctrl.state == NVME_CTRL_RESETTING) {
+	    state == NVME_CTRL_RESETTING) {
 		freeze = true;
 		nvme_start_freeze(&anv->ctrl);
 	}
 	unsigned long flags;
 	u32 csts = readl(anv->mmio_nvme + NVME_REG_CSTS);
-	if (anv->ctrl.state != NVME_CTRL_LIVE) {
+	if (nvme_ctrl_state(&anv->ctrl) != NVME_CTRL_LIVE) {
 		/*
 		 * From rdma.c:
 		 * If we are resetting, connecting or deleting we should
 	u32 boot_status, aqa;
 	struct apple_nvme *anv =
 		container_of(work, struct apple_nvme, ctrl.reset_work);
+	enum nvme_ctrl_state state = nvme_ctrl_state(&anv->ctrl);
-	if (anv->ctrl.state != NVME_CTRL_RESETTING) {
+	if (state != NVME_CTRL_RESETTING) {
-		dev_warn(anv->dev, "ctrl state %d is not RESETTING\n",
+		dev_warn(anv->dev, "ctrl state %d is not RESETTING\n", state);
-			 anv->ctrl.state);
 		ret = -ENODEV;
 		goto out;
 	}

drivers/nvme/host/auth.c+9−10

 static struct workqueue_struct *nvme_auth_wq;
-#define nvme_auth_flags_from_qid(qid) \
-	(qid == 0) ? 0 : BLK_MQ_REQ_NOWAIT | BLK_MQ_REQ_RESERVED
-#define nvme_auth_queue_from_qid(ctrl, qid) \
-	(qid == 0) ? (ctrl)->fabrics_q : (ctrl)->connect_q
 static inline int ctrl_max_dhchaps(struct nvme_ctrl *ctrl)
 {
 	return ctrl->opts->nr_io_queues + ctrl->opts->nr_write_queues +
 			    void *data, size_t data_len, bool auth_send)
 {
 	struct nvme_command cmd = {};
-	blk_mq_req_flags_t flags = nvme_auth_flags_from_qid(qid);
+	nvme_submit_flags_t flags = NVME_SUBMIT_RETRY;
-	struct request_queue *q = nvme_auth_queue_from_qid(ctrl, qid);
+	struct request_queue *q = ctrl->fabrics_q;
 	int ret;
+	if (qid != 0) {
+		flags |= NVME_SUBMIT_NOWAIT | NVME_SUBMIT_RESERVED;
+		q = ctrl->connect_q;
+	}
 	cmd.auth_common.opcode = nvme_fabrics_command;
 	cmd.auth_common.secp = NVME_AUTH_DHCHAP_PROTOCOL_IDENTIFIER;
 	cmd.auth_common.spsp0 = 0x01;
 	}
 	ret = __nvme_submit_sync_cmd(q, &cmd, NULL, data, data_len,
-				     qid == 0 ? NVME_QID_ANY : qid,
+				     qid == 0 ? NVME_QID_ANY : qid, flags);
-				     0, flags);
 	if (ret > 0)
 		dev_warn(ctrl->device,
 			"qid %d auth_send failed with status %d\n", qid, ret);
 	 * If the ctrl is no connected, bail as reconnect will handle
 	 * authentication.
 	 */
-	if (ctrl->state != NVME_CTRL_LIVE)
+	if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
 		return;
 	/* Authenticate admin queue first */

drivers/nvme/host/constants.c+5−5

@@ -171,15 +171,15 @@ static const char * const nvme_statuses[] = { · 170 unmodified lines
171	[NVME_SC_HOST_ABORTED_CMD] = "Host Aborted Command",	171	[NVME_SC_HOST_ABORTED_CMD] = "Host Aborted Command",
172	};	172	};
173		173
174	const unsigned char *nvme_get_error_status_str(u16 status)	174	const char *nvme_get_error_status_str(u16 status)
175	{	175	{
176	status &= 0x7ff;	176	status &= 0x7ff;
177	if (status < ARRAY_SIZE(nvme_statuses) && nvme_statuses[status])	177	if (status < ARRAY_SIZE(nvme_statuses) && nvme_statuses[status])
178	return nvme_statuses[status & 0x7ff];	178	return nvme_statuses[status];
179	return "Unknown";	179	return "Unknown";
180	}	180	}
181		181
182	const unsigned char *nvme_get_opcode_str(u8 opcode)	182	const char *nvme_get_opcode_str(u8 opcode)
183	{	183	{
184	if (opcode < ARRAY_SIZE(nvme_ops) && nvme_ops[opcode])	184	if (opcode < ARRAY_SIZE(nvme_ops) && nvme_ops[opcode])
185	return nvme_ops[opcode];	185	return nvme_ops[opcode];
@@ -187,7 +187,7 @@ const unsigned char *nvme_get_opcode_str(u8 opcode) · 1 unmodified line
187	}	187	}
188	EXPORT_SYMBOL_GPL(nvme_get_opcode_str);	188	EXPORT_SYMBOL_GPL(nvme_get_opcode_str);
189		189
190	const unsigned char *nvme_get_admin_opcode_str(u8 opcode)	190	const char *nvme_get_admin_opcode_str(u8 opcode)
191	{	191	{
192	if (opcode < ARRAY_SIZE(nvme_admin_ops) && nvme_admin_ops[opcode])	192	if (opcode < ARRAY_SIZE(nvme_admin_ops) && nvme_admin_ops[opcode])
193	return nvme_admin_ops[opcode];	193	return nvme_admin_ops[opcode];
@@ -195,7 +195,7 @@ const unsigned char *nvme_get_admin_opcode_str(u8 opcode) · 1 unmodified line
195	}	195	}
196	EXPORT_SYMBOL_GPL(nvme_get_admin_opcode_str);	196	EXPORT_SYMBOL_GPL(nvme_get_admin_opcode_str);
197		197
198	const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode) {	198	const char *nvme_get_fabrics_opcode_str(u8 opcode) {
199	if (opcode < ARRAY_SIZE(nvme_fabrics_ops) && nvme_fabrics_ops[opcode])	199	if (opcode < ARRAY_SIZE(nvme_fabrics_ops) && nvme_fabrics_ops[opcode])
200	return nvme_fabrics_ops[opcode];	200	return nvme_fabrics_ops[opcode];
201	return "Unknown";	201	return "Unknown";

drivers/nvme/host/core.c+70−15

 			   nr->status & NVME_SC_DNR  ? "DNR "  : "");
 }
+static void nvme_log_err_passthru(struct request *req)
+{
+	struct nvme_ns *ns = req->q->queuedata;
+	struct nvme_request *nr = nvme_req(req);
+	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
+		"cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
+		ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
+		ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
+		     nvme_get_admin_opcode_str(nr->cmd->common.opcode),
+		nr->cmd->common.opcode,
+		nvme_get_error_status_str(nr->status),
+		nr->status >> 8 & 7,	/* Status Code Type */
+		nr->status & 0xff,	/* Status Code */
+		nr->status & NVME_SC_MORE ? "MORE " : "",
+		nr->status & NVME_SC_DNR  ? "DNR "  : "",
+		nr->cmd->common.cdw10,
+		nr->cmd->common.cdw11,
+		nr->cmd->common.cdw12,
+		nr->cmd->common.cdw13,
+		nr->cmd->common.cdw14,
+		nr->cmd->common.cdw14);
+}
 enum nvme_disposition {
 	COMPLETE,
 	RETRY,
 {
 	blk_status_t status = nvme_error_status(nvme_req(req)->status);
-	if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET)))
+	if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
-		nvme_log_error(req);
+		if (blk_rq_is_passthrough(req))
+			nvme_log_err_passthru(req);
+		else
+			nvme_log_error(req);
+	}
 	nvme_end_req_zoned(req);
 	nvme_trace_bio_complete(req);
 	if (req->cmd_flags & REQ_NVME_MPATH)
 /* initialize a passthrough request */
 void nvme_init_request(struct request *req, struct nvme_command *cmd)
 {
-	if (req->q->queuedata)
+	struct nvme_request *nr = nvme_req(req);
+	bool logging_enabled;
+	if (req->q->queuedata) {
+		struct nvme_ns *ns = req->q->disk->private_data;
+		logging_enabled = ns->passthru_err_log_enabled;
 		req->timeout = NVME_IO_TIMEOUT;
-	else /* no queuedata implies admin queue */
+	} else { /* no queuedata implies admin queue */
+		logging_enabled = nr->ctrl->passthru_err_log_enabled;
 		req->timeout = NVME_ADMIN_TIMEOUT;
+	}
+	if (!logging_enabled)
+		req->rq_flags |= RQF_QUIET;
 	/* passthru commands should let the driver set the SGL flags */
 	cmd->common.flags &= ~NVME_CMD_SGL_ALL;
 	if (req->mq_hctx->type == HCTX_TYPE_POLL)
 		req->cmd_flags |= REQ_POLLED;
 	nvme_clear_nvme_request(req);
-	req->rq_flags |= RQF_QUIET;
+	memcpy(nr->cmd, cmd, sizeof(*cmd));
-	memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd));
 }
 EXPORT_SYMBOL_GPL(nvme_init_request);
 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
-		bool queue_live)
+		bool queue_live, enum nvme_ctrl_state state)
 {
 	struct nvme_request *req = nvme_req(rq);
 		 * command, which is require to set the queue live in the
 		 * appropinquate states.
 		 */
-		switch (nvme_ctrl_state(ctrl)) {
+		switch (state) {
 		case NVME_CTRL_CONNECTING:
 			if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
 			    (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
  */
 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 		union nvme_result *result, void *buffer, unsigned bufflen,
-		int qid, int at_head, blk_mq_req_flags_t flags)
+		int qid, nvme_submit_flags_t flags)
 {
 	struct request *req;
 	int ret;
+	blk_mq_req_flags_t blk_flags = 0;
+	if (flags & NVME_SUBMIT_NOWAIT)
+		blk_flags |= BLK_MQ_REQ_NOWAIT;
+	if (flags & NVME_SUBMIT_RESERVED)
+		blk_flags |= BLK_MQ_REQ_RESERVED;
 	if (qid == NVME_QID_ANY)
-		req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags);
+		req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
 	else
-		req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags,
+		req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
 						qid - 1);
 	if (IS_ERR(req))
 		return PTR_ERR(req);
 	nvme_init_request(req, cmd);
+	if (flags & NVME_SUBMIT_RETRY)
+		req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
 	if (buffer && bufflen) {
 		ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
 			goto out;
 	}
-	ret = nvme_execute_rq(req, at_head);
+	ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
 	if (result && ret >= 0)
 		*result = nvme_req(req)->result;
  out:
 		void *buffer, unsigned bufflen)
 {
 	return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
-			NVME_QID_ANY, 0, 0);
+			NVME_QID_ANY, 0);
 }
 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
 	c.features.dword11 = cpu_to_le32(dword11);
 	ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
-			buffer, buflen, NVME_QID_ANY, 0, 0);
+			buffer, buflen, NVME_QID_ANY, 0);
 	if (ret >= 0 && result)
 		*result = le32_to_cpu(res.u32);
 	return ret;
 	cmd.common.cdw11 = cpu_to_le32(len);
 	return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
-			NVME_QID_ANY, 1, 0);
+			NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
 }
 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
 	ns->disk = disk;
 	ns->queue = disk->queue;
+	ns->passthru_err_log_enabled = false;
 	if (ctrl->opts && ctrl->opts->data_digest)
 		blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
 	nvme_mpath_add_disk(ns, info->anagrpid);
 	nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
+	/*
+	 * Set ns->disk->device->driver_data to ns so we can access
+	 * ns->logging_enabled in nvme_passthru_err_log_enabled_store() and
+	 * nvme_passthru_err_log_enabled_show().
+	 */
+	dev_set_drvdata(disk_to_dev(ns->disk), ns);
 	return;
  out_cleanup_ns_from_list:
 	int ret;
 	WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
+	ctrl->passthru_err_log_enabled = false;
 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
 	spin_lock_init(&ctrl->lock);
 	mutex_init(&ctrl->scan_lock);
 MODULE_LICENSE("GPL");
 MODULE_VERSION("1.0");
+MODULE_DESCRIPTION("NVMe host core framework");
 module_init(nvme_core_init);
 module_exit(nvme_core_exit);

drivers/nvme/host/fabrics.c+12−7

 	cmd.prop_get.offset = cpu_to_le32(off);
 	ret = __nvme_submit_sync_cmd(ctrl->fabrics_q, &cmd, &res, NULL, 0,
-			NVME_QID_ANY, 0, 0);
+			NVME_QID_ANY, 0);
 	if (ret >= 0)
 		*val = le64_to_cpu(res.u64);
 	cmd.prop_get.offset = cpu_to_le32(off);
 	ret = __nvme_submit_sync_cmd(ctrl->fabrics_q, &cmd, &res, NULL, 0,
-			NVME_QID_ANY, 0, 0);
+			NVME_QID_ANY, 0);
 	if (ret >= 0)
 		*val = le64_to_cpu(res.u64);
 	cmd.prop_set.value = cpu_to_le64(val);
 	ret = __nvme_submit_sync_cmd(ctrl->fabrics_q, &cmd, NULL, NULL, 0,
-			NVME_QID_ANY, 0, 0);
+			NVME_QID_ANY, 0);
 	if (unlikely(ret))
 		dev_err(ctrl->device,
 			"Property Set error: %d, offset %#x\n",
 		return -ENOMEM;
 	ret = __nvme_submit_sync_cmd(ctrl->fabrics_q, &cmd, &res,
-			data, sizeof(*data), NVME_QID_ANY, 1,
+			data, sizeof(*data), NVME_QID_ANY,
-			BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
+			NVME_SUBMIT_AT_HEAD |
+			NVME_SUBMIT_NOWAIT |
+			NVME_SUBMIT_RESERVED);
 	if (ret) {
 		nvmf_log_connect_error(ctrl, ret, le32_to_cpu(res.u32),
 				       &cmd, data);
 		return -ENOMEM;
 	ret = __nvme_submit_sync_cmd(ctrl->connect_q, &cmd, &res,
-			data, sizeof(*data), qid, 1,
+			data, sizeof(*data), qid,
-			BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
+			NVME_SUBMIT_AT_HEAD |
+			NVME_SUBMIT_RESERVED |
+			NVME_SUBMIT_NOWAIT);
 	if (ret) {
 		nvmf_log_connect_error(ctrl, ret, le32_to_cpu(res.u32),
 				       &cmd, data);
 }
 MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("NVMe host fabrics library");
 module_init(nvmf_init);
 module_exit(nvmf_exit);

drivers/nvme/host/fabrics.h+5−3

@@ -185,9 +185,11 @@ static inline bool · 184 unmodified lines
185	nvmf_ctlr_matches_baseopts(struct nvme_ctrl *ctrl,	185	nvmf_ctlr_matches_baseopts(struct nvme_ctrl *ctrl,
186	struct nvmf_ctrl_options *opts)	186	struct nvmf_ctrl_options *opts)
187	{	187	{
188	if (ctrl->state == NVME_CTRL_DELETING \|\|	188	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
189	ctrl->state == NVME_CTRL_DELETING_NOIO \|\|	189
190	ctrl->state == NVME_CTRL_DEAD \|\|	190	if (state == NVME_CTRL_DELETING \|\|
		191	state == NVME_CTRL_DELETING_NOIO \|\|
		192	state == NVME_CTRL_DEAD \|\|
191	strcmp(opts->subsysnqn, ctrl->opts->subsysnqn) \|\|	193	strcmp(opts->subsysnqn, ctrl->opts->subsysnqn) \|\|
192	strcmp(opts->host->nqn, ctrl->opts->host->nqn) \|\|	194	strcmp(opts->host->nqn, ctrl->opts->host->nqn) \|\|
193	!uuid_equal(&opts->host->id, &ctrl->opts->host->id))	195	!uuid_equal(&opts->host->id, &ctrl->opts->host->id))

drivers/nvme/host/fc.c+14−46

 static DEFINE_IDA(nvme_fc_local_port_cnt);
 static DEFINE_IDA(nvme_fc_ctrl_cnt);
-static struct workqueue_struct *nvme_fc_wq;
-static bool nvme_fc_waiting_to_unload;
-static DECLARE_COMPLETION(nvme_fc_unload_proceed);
 /*
  * These items are short-term. They will eventually be moved into
  * a generic FC class. See comments in module init.
 	/* remove from transport list */
 	spin_lock_irqsave(&nvme_fc_lock, flags);
 	list_del(&lport->port_list);
-	if (nvme_fc_waiting_to_unload && list_empty(&nvme_fc_lport_list))
-		complete(&nvme_fc_unload_proceed);
 	spin_unlock_irqrestore(&nvme_fc_lock, flags);
 	ida_free(&nvme_fc_local_port_cnt, lport->localport.port_num);
 {
 	struct nvme_fc_fcp_op *op = blk_mq_rq_to_pdu(rq);
 	struct nvme_fc_ctrl *ctrl = op->ctrl;
+	u16 qnum = op->queue->qnum;
 	struct nvme_fc_cmd_iu *cmdiu = &op->cmd_iu;
 	struct nvme_command *sqe = &cmdiu->sqe;
 	 * will detect the aborted io and will fail the connection.
 	 */
 	dev_info(ctrl->ctrl.device,
-		"NVME-FC{%d.%d}: io timeout: opcode %d fctype %d w10/11: "
+		"NVME-FC{%d.%d}: io timeout: opcode %d fctype %d (%s) w10/11: "
 		"x%08x/x%08x\n",
-		ctrl->cnum, op->queue->qnum, sqe->common.opcode,
+		ctrl->cnum, qnum, sqe->common.opcode, sqe->fabrics.fctype,
-		sqe->connect.fctype, sqe->common.cdw10, sqe->common.cdw11);
+		nvme_fabrics_opcode_str(qnum, sqe),
+		sqe->common.cdw10, sqe->common.cdw11);
 	if (__nvme_fc_abort_op(ctrl, op))
 		nvme_fc_error_recovery(ctrl, "io timeout abort failed");
 	flush_delayed_work(&ctrl->connect_work);
 	dev_info(ctrl->ctrl.device,
-		"NVME-FC{%d}: new ctrl: NQN \"%s\"\n",
+		"NVME-FC{%d}: new ctrl: NQN \"%s\", hostnqn: %s\n",
-		ctrl->cnum, nvmf_ctrl_subsysnqn(&ctrl->ctrl));
+		ctrl->cnum, nvmf_ctrl_subsysnqn(&ctrl->ctrl), opts->host->nqn);
 	return &ctrl->ctrl;
 {
 	int ret;
-	nvme_fc_wq = alloc_workqueue("nvme_fc_wq", WQ_MEM_RECLAIM, 0);
-	if (!nvme_fc_wq)
-		return -ENOMEM;
 	/*
 	 * NOTE:
 	 * It is expected that in the future the kernel will combine
 	ret = class_register(&fc_class);
 	if (ret) {
 		pr_err("couldn't register class fc\n");
-		goto out_destroy_wq;
+		return ret;
 	}
 	/*
 	device_destroy(&fc_class, MKDEV(0, 0));
 out_destroy_class:
 	class_unregister(&fc_class);
-out_destroy_wq:
-	destroy_workqueue(nvme_fc_wq);
 	return ret;
 }
 	spin_unlock(&rport->lock);
 }
-static void
+static void __exit nvme_fc_exit_module(void)
-nvme_fc_cleanup_for_unload(void)
 {
 	struct nvme_fc_lport *lport;
 	struct nvme_fc_rport *rport;
-	list_for_each_entry(lport, &nvme_fc_lport_list, port_list) {
-		list_for_each_entry(rport, &lport->endp_list, endp_list) {
-			nvme_fc_delete_controllers(rport);
-		}
-	}
-}
-static void __exit nvme_fc_exit_module(void)
-{
 	unsigned long flags;
-	bool need_cleanup = false;
 	spin_lock_irqsave(&nvme_fc_lock, flags);
-	nvme_fc_waiting_to_unload = true;
+	list_for_each_entry(lport, &nvme_fc_lport_list, port_list)
-	if (!list_empty(&nvme_fc_lport_list)) {
+		list_for_each_entry(rport, &lport->endp_list, endp_list)
-		need_cleanup = true;
+			nvme_fc_delete_controllers(rport);
-		nvme_fc_cleanup_for_unload();
-	}
 	spin_unlock_irqrestore(&nvme_fc_lock, flags);
-	if (need_cleanup) {
+	flush_workqueue(nvme_delete_wq);
-		pr_info("%s: waiting for ctlr deletes\n", __func__);
-		wait_for_completion(&nvme_fc_unload_proceed);
-		pr_info("%s: ctrl deletes complete\n", __func__);
-	}
 	nvmf_unregister_transport(&nvme_fc_transport);
-	ida_destroy(&nvme_fc_local_port_cnt);
-	ida_destroy(&nvme_fc_ctrl_cnt);
 	device_destroy(&fc_class, MKDEV(0, 0));
 	class_unregister(&fc_class);
-	destroy_workqueue(nvme_fc_wq);
 }
 module_init(nvme_fc_init_module);
 module_exit(nvme_fc_exit_module);
+MODULE_DESCRIPTION("NVMe host FC transport driver");
 MODULE_LICENSE("GPL v2");

drivers/nvme/host/multipath.c+8−7

 		if (!ns->head->disk)
 			continue;
 		kblockd_schedule_work(&ns->head->requeue_work);
-		if (ctrl->state == NVME_CTRL_LIVE)
+		if (nvme_ctrl_state(ns->ctrl) == NVME_CTRL_LIVE)
 			disk_uevent(ns->head->disk, KOBJ_CHANGE);
 	}
 	up_read(&ctrl->namespaces_rwsem);
 static bool nvme_path_is_disabled(struct nvme_ns *ns)
 {
+	enum nvme_ctrl_state state = nvme_ctrl_state(ns->ctrl);
 	/*
 	 * We don't treat NVME_CTRL_DELETING as a disabled path as I/O should
 	 * still be able to complete assuming that the controller is connected.
 	 * Otherwise it will fail immediately and return to the requeue list.
 	 */
-	if (ns->ctrl->state != NVME_CTRL_LIVE &&
+	if (state != NVME_CTRL_LIVE && state != NVME_CTRL_DELETING)
-	    ns->ctrl->state != NVME_CTRL_DELETING)
 		return true;
 	if (test_bit(NVME_NS_ANA_PENDING, &ns->flags) ||
 	    !test_bit(NVME_NS_READY, &ns->flags))
 static inline bool nvme_path_is_optimized(struct nvme_ns *ns)
 {
-	return ns->ctrl->state == NVME_CTRL_LIVE &&
+	return nvme_ctrl_state(ns->ctrl) == NVME_CTRL_LIVE &&
 		ns->ana_state == NVME_ANA_OPTIMIZED;
 }
 	list_for_each_entry_rcu(ns, &head->list, siblings) {
 		if (test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ns->ctrl->flags))
 			continue;
-		switch (ns->ctrl->state) {
+		switch (nvme_ctrl_state(ns->ctrl)) {
 		case NVME_CTRL_LIVE:
 		case NVME_CTRL_RESETTING:
 		case NVME_CTRL_CONNECTING:
 	 * controller is ready.
 	 */
 	if (nvme_state_is_live(ns->ana_state) &&
-	    ns->ctrl->state == NVME_CTRL_LIVE)
+	    nvme_ctrl_state(ns->ctrl) == NVME_CTRL_LIVE)
 		nvme_mpath_set_live(ns);
 }
 {
 	struct nvme_ctrl *ctrl = container_of(work, struct nvme_ctrl, ana_work);
-	if (ctrl->state != NVME_CTRL_LIVE)
+	if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
 		return;
 	nvme_read_ana_log(ctrl);

drivers/nvme/host/nvme.h+43−19

@@ -263,6 +263,7 @@ enum nvme_ctrl_flags { · 262 unmodified lines
263	struct nvme_ctrl {	263	struct nvme_ctrl {
264	bool comp_seen;	264	bool comp_seen;
265	bool identified;	265	bool identified;
		266	bool passthru_err_log_enabled;
266	enum nvme_ctrl_state state;	267	enum nvme_ctrl_state state;
267	spinlock_t lock;	268	spinlock_t lock;
268	struct mutex scan_lock;	269	struct mutex scan_lock;
@@ -522,7 +523,7 @@ struct nvme_ns { · 253 unmodified lines
522	struct device cdev_device;	523	struct device cdev_device;
523		524
524	struct nvme_fault_inject fault_inject;	525	struct nvme_fault_inject fault_inject;
525		526	bool passthru_err_log_enabled;
526	};	527	};
527		528
528	/* NVMe ns supports metadata actions by the controller (generate/strip) */	529	/* NVMe ns supports metadata actions by the controller (generate/strip) */
@@ -805,17 +806,18 @@ blk_status_t nvme_setup_cmd(struct nvme_ns ns, struct request req); · 276 unmodified lines
805	blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,	806	blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
806	struct request *req);	807	struct request *req);
807	bool __nvme_check_ready(struct nvme_ctrl ctrl, struct request rq,	808	bool __nvme_check_ready(struct nvme_ctrl ctrl, struct request rq,
808	bool queue_live);	809	bool queue_live, enum nvme_ctrl_state state);
809		810
810	static inline bool nvme_check_ready(struct nvme_ctrl ctrl, struct request rq,	811	static inline bool nvme_check_ready(struct nvme_ctrl ctrl, struct request rq,
811	bool queue_live)	812	bool queue_live)
812	{	813	{
813	if (likely(ctrl->state == NVME_CTRL_LIVE))	814	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
		815
		816	if (likely(state == NVME_CTRL_LIVE))
814	return true;	817	return true;
815	if (ctrl->ops->flags & NVME_F_FABRICS &&	818	if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING)
816	ctrl->state == NVME_CTRL_DELETING)
817	return queue_live;	819	return queue_live;
818	return __nvme_check_ready(ctrl, rq, queue_live);	820	return __nvme_check_ready(ctrl, rq, queue_live, state);
819	}	821	}
820		822
821	/*	823	/*
@@ -836,12 +838,27 @@ static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, · 14 unmodified lines
836	(ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);	838	(ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
837	}	839	}
838		840
		841	/*
		842	* Flags for __nvme_submit_sync_cmd()
		843	*/
		844	typedef __u32 __bitwise nvme_submit_flags_t;
		845
		846	enum {
		847	/* Insert request at the head of the queue */
		848	NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0),
		849	/* Set BLK_MQ_REQ_NOWAIT when allocating request */
		850	NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1),
		851	/* Set BLK_MQ_REQ_RESERVED when allocating request */
		852	NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2),
		853	/* Retry command when NVME_SC_DNR is not set in the result */
		854	NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3),
		855	};
		856
839	int nvme_submit_sync_cmd(struct request_queue q, struct nvme_command cmd,	857	int nvme_submit_sync_cmd(struct request_queue q, struct nvme_command cmd,
840	void *buf, unsigned bufflen);	858	void *buf, unsigned bufflen);
841	int __nvme_submit_sync_cmd(struct request_queue q, struct nvme_command cmd,	859	int __nvme_submit_sync_cmd(struct request_queue q, struct nvme_command cmd,
842	union nvme_result result, void buffer, unsigned bufflen,	860	union nvme_result result, void buffer, unsigned bufflen,
843	int qid, int at_head,	861	int qid, nvme_submit_flags_t flags);
844	blk_mq_req_flags_t flags);
845	int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,	862	int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
846	unsigned int dword11, void *buffer, size_t buflen,	863	unsigned int dword11, void *buffer, size_t buflen,
847	u32 *result);	864	u32 *result);
@@ -1124,35 +1141,42 @@ static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) · 276 unmodified lines
1124	}	1141	}
1125		1142
1126	#ifdef CONFIG_NVME_VERBOSE_ERRORS	1143	#ifdef CONFIG_NVME_VERBOSE_ERRORS
1127	const unsigned char *nvme_get_error_status_str(u16 status);	1144	const char *nvme_get_error_status_str(u16 status);
1128	const unsigned char *nvme_get_opcode_str(u8 opcode);	1145	const char *nvme_get_opcode_str(u8 opcode);
1129	const unsigned char *nvme_get_admin_opcode_str(u8 opcode);	1146	const char *nvme_get_admin_opcode_str(u8 opcode);
1130	const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode);	1147	const char *nvme_get_fabrics_opcode_str(u8 opcode);
1131	#else /* CONFIG_NVME_VERBOSE_ERRORS */	1148	#else /* CONFIG_NVME_VERBOSE_ERRORS */
1132	static inline const unsigned char *nvme_get_error_status_str(u16 status)	1149	static inline const char *nvme_get_error_status_str(u16 status)
1133	{	1150	{
1134	return "I/O Error";	1151	return "I/O Error";
1135	}	1152	}
1136	static inline const unsigned char *nvme_get_opcode_str(u8 opcode)	1153	static inline const char *nvme_get_opcode_str(u8 opcode)
1137	{	1154	{
1138	return "I/O Cmd";	1155	return "I/O Cmd";
1139	}	1156	}
1140	static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)	1157	static inline const char *nvme_get_admin_opcode_str(u8 opcode)
1141	{	1158	{
1142	return "Admin Cmd";	1159	return "Admin Cmd";
1143	}	1160	}
1144		1161
1145	static inline const unsigned char *nvme_get_fabrics_opcode_str(u8 opcode)	1162	static inline const char *nvme_get_fabrics_opcode_str(u8 opcode)
1146	{	1163	{
1147	return "Fabrics Cmd";	1164	return "Fabrics Cmd";
1148	}	1165	}
1149	#endif /* CONFIG_NVME_VERBOSE_ERRORS */	1166	#endif /* CONFIG_NVME_VERBOSE_ERRORS */
1150		1167
1151	static inline const unsigned char *nvme_opcode_str(int qid, u8 opcode, u8 fctype)	1168	static inline const char *nvme_opcode_str(int qid, u8 opcode)
1152	{	1169	{
1153	if (opcode == nvme_fabrics_command)
1154	return nvme_get_fabrics_opcode_str(fctype);
1155	return qid ? nvme_get_opcode_str(opcode) :	1170	return qid ? nvme_get_opcode_str(opcode) :
1156	nvme_get_admin_opcode_str(opcode);	1171	nvme_get_admin_opcode_str(opcode);
1157	}	1172	}
		1173
		1174	static inline const char *nvme_fabrics_opcode_str(
		1175	int qid, const struct nvme_command *cmd)
		1176	{
		1177	if (nvme_is_fabrics(cmd))
		1178	return nvme_get_fabrics_opcode_str(cmd->fabrics.fctype);
		1179
		1180	return nvme_opcode_str(qid, cmd->common.opcode);
		1181	}
1158	#endif /* _NVME_H */	1182	#endif /* _NVME_H */

drivers/nvme/host/pci.c+2−1

 		dev_warn(dev->ctrl.device,
 			 "I/O tag %d (%04x) opcode %#x (%s) QID %d timeout, reset controller\n",
 			 req->tag, nvme_cid(req), opcode,
-			 nvme_opcode_str(nvmeq->qid, opcode, 0), nvmeq->qid);
+			 nvme_opcode_str(nvmeq->qid, opcode), nvmeq->qid);
 		nvme_req(req)->flags |= NVME_REQ_CANCELLED;
 		goto disable;
 	}
 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
 MODULE_LICENSE("GPL");
 MODULE_VERSION("1.0");
+MODULE_DESCRIPTION("NVMe host PCIe transport driver");
 module_init(nvme_init);
 module_exit(nvme_exit);

drivers/nvme/host/rdma.c+14−9

 	struct nvme_ns *ns = rq->q->queuedata;
 	struct bio *bio = rq->bio;
 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
+	struct blk_integrity *bi = blk_get_integrity(bio->bi_bdev->bd_disk);
+	u32 xfer_len;
 	int nr;
 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
 	if (unlikely(nr))
 		goto mr_put;
-	nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c,
+	nvme_rdma_set_sig_attrs(bi, c, req->mr->sig_attrs, ns->head->pi_type);
-				req->mr->sig_attrs, ns->head->pi_type);
 	nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
 		     IB_ACCESS_REMOTE_WRITE;
 	sg->addr = cpu_to_le64(req->mr->iova);
-	put_unaligned_le24(req->mr->length, sg->length);
+	xfer_len = req->mr->length;
+	/* Check if PI is added by the HW */
+	if (!pi_count)
+		xfer_len += (xfer_len >> bi->interval_exp) * ns->head->pi_size;
+	put_unaligned_le24(xfer_len, sg->length);
 	put_unaligned_le32(req->mr->rkey, sg->key);
 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
 	struct nvme_rdma_queue *queue = req->queue;
 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
-	u8 opcode = req->req.cmd->common.opcode;
+	struct nvme_command *cmd = req->req.cmd;
-	u8 fctype = req->req.cmd->fabrics.fctype;
 	int qid = nvme_rdma_queue_idx(queue);
 	dev_warn(ctrl->ctrl.device,
 		 "I/O tag %d (%04x) opcode %#x (%s) QID %d timeout\n",
-		 rq->tag, nvme_cid(rq), opcode,
+		 rq->tag, nvme_cid(rq), cmd->common.opcode,
-		 nvme_opcode_str(qid, opcode, fctype), qid);
+		 nvme_fabrics_opcode_str(qid, cmd), qid);
 	if (nvme_ctrl_state(&ctrl->ctrl) != NVME_CTRL_LIVE) {
 		/*
 	if (ret)
 		goto out_uninit_ctrl;
-	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
+	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs, hostnqn: %s\n",
-		nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr);
+		nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr, opts->host->nqn);
 	mutex_lock(&nvme_rdma_ctrl_mutex);
 	list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
 module_init(nvme_rdma_init_module);
 module_exit(nvme_rdma_cleanup_module);
+MODULE_DESCRIPTION("NVMe host RDMA transport driver");
 MODULE_LICENSE("GPL v2");

drivers/nvme/host/sysfs.c+61−3

@@ -35,6 +35,62 @@ static ssize_t nvme_sysfs_rescan(struct device *dev, · 34 unmodified lines
35	}	35	}
36	static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);	36	static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
37		37
		38	static ssize_t nvme_adm_passthru_err_log_enabled_show(struct device *dev,
		39	struct device_attribute attr, char buf)
		40	{
		41	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
		42
		43	return sysfs_emit(buf,
		44	ctrl->passthru_err_log_enabled ? "on\n" : "off\n");
		45	}
		46
		47	static ssize_t nvme_adm_passthru_err_log_enabled_store(struct device *dev,
		48	struct device_attribute attr, const char buf, size_t count)
		49	{
		50	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
		51	int err;
		52	bool passthru_err_log_enabled;
		53
		54	err = kstrtobool(buf, &passthru_err_log_enabled);
		55	if (err)
		56	return -EINVAL;
		57
		58	ctrl->passthru_err_log_enabled = passthru_err_log_enabled;
		59
		60	return count;
		61	}
		62
		63	static ssize_t nvme_io_passthru_err_log_enabled_show(struct device *dev,
		64	struct device_attribute attr, char buf)
		65	{
		66	struct nvme_ns *n = dev_get_drvdata(dev);
		67
		68	return sysfs_emit(buf, n->passthru_err_log_enabled ? "on\n" : "off\n");
		69	}
		70
		71	static ssize_t nvme_io_passthru_err_log_enabled_store(struct device *dev,
		72	struct device_attribute attr, const char buf, size_t count)
		73	{
		74	struct nvme_ns *ns = dev_get_drvdata(dev);
		75	int err;
		76	bool passthru_err_log_enabled;
		77
		78	err = kstrtobool(buf, &passthru_err_log_enabled);
		79	if (err)
		80	return -EINVAL;
		81	ns->passthru_err_log_enabled = passthru_err_log_enabled;
		82
		83	return count;
		84	}
		85
		86	static struct device_attribute dev_attr_adm_passthru_err_log_enabled = \
		87	__ATTR(passthru_err_log_enabled, S_IRUGO \| S_IWUSR, \
		88	nvme_adm_passthru_err_log_enabled_show, nvme_adm_passthru_err_log_enabled_store);
		89
		90	static struct device_attribute dev_attr_io_passthru_err_log_enabled = \
		91	__ATTR(passthru_err_log_enabled, S_IRUGO \| S_IWUSR, \
		92	nvme_io_passthru_err_log_enabled_show, nvme_io_passthru_err_log_enabled_store);
		93
38	static inline struct nvme_ns_head dev_to_ns_head(struct device dev)	94	static inline struct nvme_ns_head dev_to_ns_head(struct device dev)
39	{	95	{
40	struct gendisk *disk = dev_to_disk(dev);	96	struct gendisk *disk = dev_to_disk(dev);
@@ -208,6 +264,7 @@ static struct attribute *nvme_ns_attrs[] = { · 167 unmodified lines
208	&dev_attr_ana_grpid.attr,	264	&dev_attr_ana_grpid.attr,
209	&dev_attr_ana_state.attr,	265	&dev_attr_ana_state.attr,
210	#endif	266	#endif
		267	&dev_attr_io_passthru_err_log_enabled.attr,
211	NULL,	268	NULL,
212	};	269	};
213		270
@@ -311,6 +368,7 @@ static ssize_t nvme_sysfs_show_state(struct device *dev, · 97 unmodified lines
311	char *buf)	368	char *buf)
312	{	369	{
313	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);	370	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
		371	unsigned state = (unsigned)nvme_ctrl_state(ctrl);
314	static const char *const state_name[] = {	372	static const char *const state_name[] = {
315	[NVME_CTRL_NEW] = "new",	373	[NVME_CTRL_NEW] = "new",
316	[NVME_CTRL_LIVE] = "live",	374	[NVME_CTRL_LIVE] = "live",
@@ -321,9 +379,8 @@ static ssize_t nvme_sysfs_show_state(struct device *dev, · 4 unmodified lines
321	[NVME_CTRL_DEAD] = "dead",	379	[NVME_CTRL_DEAD] = "dead",
322	};	380	};
323		381
324	if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&	382	if (state < ARRAY_SIZE(state_name) && state_name[state])
325	state_name[ctrl->state])	383	return sysfs_emit(buf, "%s\n", state_name[state]);
326	return sysfs_emit(buf, "%s\n", state_name[ctrl->state]);
327		384
328	return sysfs_emit(buf, "unknown state\n");	385	return sysfs_emit(buf, "unknown state\n");
329	}	386	}
@@ -655,6 +712,7 @@ static struct attribute *nvme_dev_attrs[] = { · 325 unmodified lines
655	#ifdef CONFIG_NVME_TCP_TLS	712	#ifdef CONFIG_NVME_TCP_TLS
656	&dev_attr_tls_key.attr,	713	&dev_attr_tls_key.attr,
657	#endif	714	#endif
		715	&dev_attr_adm_passthru_err_log_enabled.attr,
658	NULL	716	NULL
659	};	717	};
660		718

drivers/nvme/host/tcp.c+6−5

 	struct nvme_tcp_request *req = blk_mq_rq_to_pdu(rq);
 	struct nvme_ctrl *ctrl = &req->queue->ctrl->ctrl;
 	struct nvme_tcp_cmd_pdu *pdu = nvme_tcp_req_cmd_pdu(req);
-	u8 opc = pdu->cmd.common.opcode, fctype = pdu->cmd.fabrics.fctype;
+	struct nvme_command *cmd = &pdu->cmd;
 	int qid = nvme_tcp_queue_id(req->queue);
 	dev_warn(ctrl->device,
 		 "I/O tag %d (%04x) type %d opcode %#x (%s) QID %d timeout\n",
-		 rq->tag, nvme_cid(rq), pdu->hdr.type, opc,
+		 rq->tag, nvme_cid(rq), pdu->hdr.type, cmd->common.opcode,
-		 nvme_opcode_str(qid, opc, fctype), qid);
+		 nvme_fabrics_opcode_str(qid, cmd), qid);
 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) {
 		/*
 	if (ret)
 		goto out_uninit_ctrl;
-	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISp\n",
+	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISp, hostnqn: %s\n",
-		nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr);
+		nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr, opts->host->nqn);
 	mutex_lock(&nvme_tcp_ctrl_mutex);
 	list_add_tail(&ctrl->list, &nvme_tcp_ctrl_list);
 module_init(nvme_tcp_init_module);
 module_exit(nvme_tcp_cleanup_module);
+MODULE_DESCRIPTION("NVMe host TCP transport driver");
 MODULE_LICENSE("GPL v2");

drivers/nvme/target/core.c+3−2

 		nvmet_add_to_changed_ns_log(ctrl, cpu_to_le32(nsid));
 		if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_NS_ATTR))
 			continue;
-		nvmet_add_async_event(ctrl, NVME_AER_TYPE_NOTICE,
+		nvmet_add_async_event(ctrl, NVME_AER_NOTICE,
 				NVME_AER_NOTICE_NS_CHANGED,
 				NVME_LOG_CHANGED_NS);
 	}
 			continue;
 		if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_ANA_CHANGE))
 			continue;
-		nvmet_add_async_event(ctrl, NVME_AER_TYPE_NOTICE,
+		nvmet_add_async_event(ctrl, NVME_AER_NOTICE,
 				NVME_AER_NOTICE_ANA, NVME_LOG_ANA);
 	}
 	mutex_unlock(&subsys->lock);
 module_init(nvmet_init);
 module_exit(nvmet_exit);
+MODULE_DESCRIPTION("NVMe target core framework");
 MODULE_LICENSE("GPL v2");

drivers/nvme/target/discovery.c+1−1

@@ -21,7 +21,7 @@ static void __nvmet_disc_changed(struct nvmet_port *port, · 20 unmodified lines
21	if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_DISC_CHANGE))	21	if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_DISC_CHANGE))
22	return;	22	return;
23		23
24	nvmet_add_async_event(ctrl, NVME_AER_TYPE_NOTICE,	24	nvmet_add_async_event(ctrl, NVME_AER_NOTICE,
25	NVME_AER_NOTICE_DISC_CHANGED, NVME_LOG_DISC);	25	NVME_AER_NOTICE_DISC_CHANGED, NVME_LOG_DISC);
26	}	26	}
27		27

drivers/nvme/target/fc.c+103−83

@@ -111,6 +111,8 @@ struct nvmet_fc_tgtport { · 110 unmodified lines
111	struct nvmet_fc_port_entry *pe;	111	struct nvmet_fc_port_entry *pe;
112	struct kref ref;	112	struct kref ref;
113	u32 max_sg_cnt;	113	u32 max_sg_cnt;
		114
		115	struct work_struct put_work;
114	};	116	};
115		117
116	struct nvmet_fc_port_entry {	118	struct nvmet_fc_port_entry {
@@ -145,7 +147,6 @@ struct nvmet_fc_tgt_queue { · 28 unmodified lines
145	struct list_head avail_defer_list;	147	struct list_head avail_defer_list;
146	struct workqueue_struct *work_q;	148	struct workqueue_struct *work_q;
147	struct kref ref;	149	struct kref ref;
148	struct rcu_head rcu;
149	/* array of fcp_iods */	150	/* array of fcp_iods */
150	struct nvmet_fc_fcp_iod fod[] __counted_by(sqsize);	151	struct nvmet_fc_fcp_iod fod[] __counted_by(sqsize);
151	} __aligned(sizeof(unsigned long long));	152	} __aligned(sizeof(unsigned long long));
@@ -166,10 +167,9 @@ struct nvmet_fc_tgt_assoc { · 14 unmodified lines
166	struct nvmet_fc_hostport *hostport;	167	struct nvmet_fc_hostport *hostport;
167	struct nvmet_fc_ls_iod *rcv_disconn;	168	struct nvmet_fc_ls_iod *rcv_disconn;
168	struct list_head a_list;	169	struct list_head a_list;
169	struct nvmet_fc_tgt_queue __rcu *queues[NVMET_NR_QUEUES + 1];	170	struct nvmet_fc_tgt_queue *queues[NVMET_NR_QUEUES + 1];
170	struct kref ref;	171	struct kref ref;
171	struct work_struct del_work;	172	struct work_struct del_work;
172	struct rcu_head rcu;
173	};	173	};
174		174
175		175
@@ -249,6 +249,13 @@ static int nvmet_fc_tgt_a_get(struct nvmet_fc_tgt_assoc *assoc); · 73 unmodified lines
249	static void nvmet_fc_tgt_q_put(struct nvmet_fc_tgt_queue *queue);	249	static void nvmet_fc_tgt_q_put(struct nvmet_fc_tgt_queue *queue);
250	static int nvmet_fc_tgt_q_get(struct nvmet_fc_tgt_queue *queue);	250	static int nvmet_fc_tgt_q_get(struct nvmet_fc_tgt_queue *queue);
251	static void nvmet_fc_tgtport_put(struct nvmet_fc_tgtport *tgtport);	251	static void nvmet_fc_tgtport_put(struct nvmet_fc_tgtport *tgtport);
		252	static void nvmet_fc_put_tgtport_work(struct work_struct *work)
		253	{
		254	struct nvmet_fc_tgtport *tgtport =
		255	container_of(work, struct nvmet_fc_tgtport, put_work);
		256
		257	nvmet_fc_tgtport_put(tgtport);
		258	}
252	static int nvmet_fc_tgtport_get(struct nvmet_fc_tgtport *tgtport);	259	static int nvmet_fc_tgtport_get(struct nvmet_fc_tgtport *tgtport);
253	static void nvmet_fc_handle_fcp_rqst(struct nvmet_fc_tgtport *tgtport,	260	static void nvmet_fc_handle_fcp_rqst(struct nvmet_fc_tgtport *tgtport,
254	struct nvmet_fc_fcp_iod *fod);	261	struct nvmet_fc_fcp_iod *fod);
@@ -360,7 +367,7 @@ __nvmet_fc_finish_ls_req(struct nvmet_fc_ls_req_op *lsop) · 105 unmodified lines
360		367
361	if (!lsop->req_queued) {	368	if (!lsop->req_queued) {
362	spin_unlock_irqrestore(&tgtport->lock, flags);	369	spin_unlock_irqrestore(&tgtport->lock, flags);
363	return;	370	goto out_putwork;
364	}	371	}
365		372
366	list_del(&lsop->lsreq_list);	373	list_del(&lsop->lsreq_list);
@@ -373,7 +380,8 @@ __nvmet_fc_finish_ls_req(struct nvmet_fc_ls_req_op *lsop) · 6 unmodified lines
373	(lsreq->rqstlen + lsreq->rsplen),	380	(lsreq->rqstlen + lsreq->rsplen),
374	DMA_BIDIRECTIONAL);	381	DMA_BIDIRECTIONAL);
375		382
376	nvmet_fc_tgtport_put(tgtport);	383	out_putwork:
		384	queue_work(nvmet_wq, &tgtport->put_work);
377	}	385	}
378		386
379	static int	387	static int
@@ -489,8 +497,7 @@ nvmet_fc_xmt_disconnect_assoc(struct nvmet_fc_tgt_assoc *assoc) · 109 unmodified lines
489	* message is normal. Otherwise, send unless the hostport has	497	* message is normal. Otherwise, send unless the hostport has
490	* already been invalidated by the lldd.	498	* already been invalidated by the lldd.
491	*/	499	*/
492	if (!tgtport->ops->ls_req \|\| !assoc->hostport \|\|	500	if (!tgtport->ops->ls_req \|\| assoc->hostport->invalid)
493	assoc->hostport->invalid)
494	return;	501	return;
495		502
496	lsop = kzalloc((sizeof(*lsop) +	503	lsop = kzalloc((sizeof(*lsop) +
@@ -802,14 +809,11 @@ nvmet_fc_alloc_target_queue(struct nvmet_fc_tgt_assoc *assoc, · 305 unmodified lines
802	if (!queue)	809	if (!queue)
803	return NULL;	810	return NULL;
804		811
805	if (!nvmet_fc_tgt_a_get(assoc))
806	goto out_free_queue;
807
808	queue->work_q = alloc_workqueue("ntfc%d.%d.%d", 0, 0,	812	queue->work_q = alloc_workqueue("ntfc%d.%d.%d", 0, 0,
809	assoc->tgtport->fc_target_port.port_num,	813	assoc->tgtport->fc_target_port.port_num,
810	assoc->a_id, qid);	814	assoc->a_id, qid);
811	if (!queue->work_q)	815	if (!queue->work_q)
812	goto out_a_put;	816	goto out_free_queue;
813		817
814	queue->qid = qid;	818	queue->qid = qid;
815	queue->sqsize = sqsize;	819	queue->sqsize = sqsize;
@@ -831,15 +835,13 @@ nvmet_fc_alloc_target_queue(struct nvmet_fc_tgt_assoc *assoc, · 15 unmodified lines
831	goto out_fail_iodlist;	835	goto out_fail_iodlist;
832		836
833	WARN_ON(assoc->queues[qid]);	837	WARN_ON(assoc->queues[qid]);
834	rcu_assign_pointer(assoc->queues[qid], queue);	838	assoc->queues[qid] = queue;
835		839
836	return queue;	840	return queue;
837		841
838	out_fail_iodlist:	842	out_fail_iodlist:
839	nvmet_fc_destroy_fcp_iodlist(assoc->tgtport, queue);	843	nvmet_fc_destroy_fcp_iodlist(assoc->tgtport, queue);
840	destroy_workqueue(queue->work_q);	844	destroy_workqueue(queue->work_q);
841	out_a_put:
842	nvmet_fc_tgt_a_put(assoc);
843	out_free_queue:	845	out_free_queue:
844	kfree(queue);	846	kfree(queue);
845	return NULL;	847	return NULL;
@@ -852,15 +854,11 @@ nvmet_fc_tgt_queue_free(struct kref *ref) · 6 unmodified lines
852	struct nvmet_fc_tgt_queue *queue =	854	struct nvmet_fc_tgt_queue *queue =
853	container_of(ref, struct nvmet_fc_tgt_queue, ref);	855	container_of(ref, struct nvmet_fc_tgt_queue, ref);
854		856
855	rcu_assign_pointer(queue->assoc->queues[queue->qid], NULL);
856
857	nvmet_fc_destroy_fcp_iodlist(queue->assoc->tgtport, queue);	857	nvmet_fc_destroy_fcp_iodlist(queue->assoc->tgtport, queue);
858		858
859	nvmet_fc_tgt_a_put(queue->assoc);
860
861	destroy_workqueue(queue->work_q);	859	destroy_workqueue(queue->work_q);
862		860
863	kfree_rcu(queue, rcu);	861	kfree(queue);
864	}	862	}
865		863
866	static void	864	static void
@@ -969,7 +967,7 @@ nvmet_fc_find_target_queue(struct nvmet_fc_tgtport *tgtport, · 102 unmodified lines
969	rcu_read_lock();	967	rcu_read_lock();
970	list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {	968	list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {
971	if (association_id == assoc->association_id) {	969	if (association_id == assoc->association_id) {
972	queue = rcu_dereference(assoc->queues[qid]);	970	queue = assoc->queues[qid];
973	if (queue &&	971	if (queue &&
974	(!atomic_read(&queue->connected) \|\|	972	(!atomic_read(&queue->connected) \|\|
975	!nvmet_fc_tgt_q_get(queue)))	973	!nvmet_fc_tgt_q_get(queue)))
@@ -1078,8 +1076,6 @@ nvmet_fc_alloc_hostport(struct nvmet_fc_tgtport tgtport, void hosthandle) · 102 unmodified lines
1078	/* new allocation not needed */	1076	/* new allocation not needed */
1079	kfree(newhost);	1077	kfree(newhost);
1080	newhost = match;	1078	newhost = match;
1081	/* no new allocation - release reference */
1082	nvmet_fc_tgtport_put(tgtport);
1083	} else {	1079	} else {
1084	newhost->tgtport = tgtport;	1080	newhost->tgtport = tgtport;
1085	newhost->hosthandle = hosthandle;	1081	newhost->hosthandle = hosthandle;
@@ -1094,23 +1090,54 @@ nvmet_fc_alloc_hostport(struct nvmet_fc_tgtport tgtport, void hosthandle) · 8 unmodified lines
1094	}	1090	}
1095		1091
1096	static void	1092	static void
1097	nvmet_fc_delete_assoc(struct work_struct *work)	1093	nvmet_fc_delete_assoc(struct nvmet_fc_tgt_assoc *assoc)
		1094	{
		1095	nvmet_fc_delete_target_assoc(assoc);
		1096	nvmet_fc_tgt_a_put(assoc);
		1097	}
		1098
		1099	static void
		1100	nvmet_fc_delete_assoc_work(struct work_struct *work)
1098	{	1101	{
1099	struct nvmet_fc_tgt_assoc *assoc =	1102	struct nvmet_fc_tgt_assoc *assoc =
1100	container_of(work, struct nvmet_fc_tgt_assoc, del_work);	1103	container_of(work, struct nvmet_fc_tgt_assoc, del_work);
		1104	struct nvmet_fc_tgtport *tgtport = assoc->tgtport;
1101		1105
1102	nvmet_fc_delete_target_assoc(assoc);	1106	nvmet_fc_delete_assoc(assoc);
1103	nvmet_fc_tgt_a_put(assoc);	1107	nvmet_fc_tgtport_put(tgtport);
		1108	}
		1109
		1110	static void
		1111	nvmet_fc_schedule_delete_assoc(struct nvmet_fc_tgt_assoc *assoc)
		1112	{
		1113	nvmet_fc_tgtport_get(assoc->tgtport);
		1114	queue_work(nvmet_wq, &assoc->del_work);
		1115	}
		1116
		1117	static bool
		1118	nvmet_fc_assoc_exits(struct nvmet_fc_tgtport *tgtport, u64 association_id)
		1119	{
		1120	struct nvmet_fc_tgt_assoc *a;
		1121
		1122	list_for_each_entry_rcu(a, &tgtport->assoc_list, a_list) {
		1123	if (association_id == a->association_id)
		1124	return true;
		1125	}
		1126
		1127	return false;
1104	}	1128	}
1105		1129
1106	static struct nvmet_fc_tgt_assoc *	1130	static struct nvmet_fc_tgt_assoc *
1107	nvmet_fc_alloc_target_assoc(struct nvmet_fc_tgtport tgtport, void hosthandle)	1131	nvmet_fc_alloc_target_assoc(struct nvmet_fc_tgtport tgtport, void hosthandle)
1108	{	1132	{
1109	struct nvmet_fc_tgt_assoc assoc, tmpassoc;	1133	struct nvmet_fc_tgt_assoc *assoc;
1110	unsigned long flags;	1134	unsigned long flags;
		1135	bool done;
1111	u64 ran;	1136	u64 ran;
1112	int idx;	1137	int idx;
1113	bool needrandom = true;	1138
		1139	if (!tgtport->pe)
		1140	return NULL;
1114		1141
1115	assoc = kzalloc(sizeof(*assoc), GFP_KERNEL);	1142	assoc = kzalloc(sizeof(*assoc), GFP_KERNEL);
1116	if (!assoc)	1143	if (!assoc)
@@ -1120,43 +1147,35 @@ nvmet_fc_alloc_target_assoc(struct nvmet_fc_tgtport tgtport, void hosthandle) · 3 unmodified lines
1120	if (idx < 0)	1147	if (idx < 0)
1121	goto out_free_assoc;	1148	goto out_free_assoc;
1122		1149
1123	if (!nvmet_fc_tgtport_get(tgtport))
1124	goto out_ida;
1125
1126	assoc->hostport = nvmet_fc_alloc_hostport(tgtport, hosthandle);	1150	assoc->hostport = nvmet_fc_alloc_hostport(tgtport, hosthandle);
1127	if (IS_ERR(assoc->hostport))	1151	if (IS_ERR(assoc->hostport))
1128	goto out_put;	1152	goto out_ida;
1129		1153
1130	assoc->tgtport = tgtport;	1154	assoc->tgtport = tgtport;
1131	assoc->a_id = idx;	1155	assoc->a_id = idx;
1132	INIT_LIST_HEAD(&assoc->a_list);	1156	INIT_LIST_HEAD(&assoc->a_list);
1133	kref_init(&assoc->ref);	1157	kref_init(&assoc->ref);
1134	INIT_WORK(&assoc->del_work, nvmet_fc_delete_assoc);	1158	INIT_WORK(&assoc->del_work, nvmet_fc_delete_assoc_work);
1135	atomic_set(&assoc->terminating, 0);	1159	atomic_set(&assoc->terminating, 0);
1136		1160
1137	while (needrandom) {	1161	done = false;
		1162	do {
1138	get_random_bytes(&ran, sizeof(ran) - BYTES_FOR_QID);	1163	get_random_bytes(&ran, sizeof(ran) - BYTES_FOR_QID);
1139	ran = ran << BYTES_FOR_QID_SHIFT;	1164	ran = ran << BYTES_FOR_QID_SHIFT;
1140		1165
1141	spin_lock_irqsave(&tgtport->lock, flags);	1166	spin_lock_irqsave(&tgtport->lock, flags);
1142	needrandom = false;	1167	rcu_read_lock();
1143	list_for_each_entry(tmpassoc, &tgtport->assoc_list, a_list) {	1168	if (!nvmet_fc_assoc_exits(tgtport, ran)) {
1144	if (ran == tmpassoc->association_id) {
1145	needrandom = true;
1146	break;
1147	}
1148	}
1149	if (!needrandom) {
1150	assoc->association_id = ran;	1169	assoc->association_id = ran;
1151	list_add_tail_rcu(&assoc->a_list, &tgtport->assoc_list);	1170	list_add_tail_rcu(&assoc->a_list, &tgtport->assoc_list);
		1171	done = true;
1152	}	1172	}
		1173	rcu_read_unlock();
1153	spin_unlock_irqrestore(&tgtport->lock, flags);	1174	spin_unlock_irqrestore(&tgtport->lock, flags);
1154	}	1175	} while (!done);
1155		1176
1156	return assoc;	1177	return assoc;
1157		1178
1158	out_put:
1159	nvmet_fc_tgtport_put(tgtport);
1160	out_ida:	1179	out_ida:
1161	ida_free(&tgtport->assoc_cnt, idx);	1180	ida_free(&tgtport->assoc_cnt, idx);
1162	out_free_assoc:	1181	out_free_assoc:
@@ -1172,13 +1191,18 @@ nvmet_fc_target_assoc_free(struct kref *ref) · 9 unmodified lines
1172	struct nvmet_fc_tgtport *tgtport = assoc->tgtport;	1191	struct nvmet_fc_tgtport *tgtport = assoc->tgtport;
1173	struct nvmet_fc_ls_iod *oldls;	1192	struct nvmet_fc_ls_iod *oldls;
1174	unsigned long flags;	1193	unsigned long flags;
		1194	int i;
		1195
		1196	for (i = NVMET_NR_QUEUES; i >= 0; i--) {
		1197	if (assoc->queues[i])
		1198	nvmet_fc_delete_target_queue(assoc->queues[i]);
		1199	}
1175		1200
1176	/* Send Disconnect now that all i/o has completed */	1201	/* Send Disconnect now that all i/o has completed */
1177	nvmet_fc_xmt_disconnect_assoc(assoc);	1202	nvmet_fc_xmt_disconnect_assoc(assoc);
1178		1203
1179	nvmet_fc_free_hostport(assoc->hostport);	1204	nvmet_fc_free_hostport(assoc->hostport);
1180	spin_lock_irqsave(&tgtport->lock, flags);	1205	spin_lock_irqsave(&tgtport->lock, flags);
1181	list_del_rcu(&assoc->a_list);
1182	oldls = assoc->rcv_disconn;	1206	oldls = assoc->rcv_disconn;
1183	spin_unlock_irqrestore(&tgtport->lock, flags);	1207	spin_unlock_irqrestore(&tgtport->lock, flags);
1184	/* if pending Rcv Disconnect Association LS, send rsp now */	1208	/* if pending Rcv Disconnect Association LS, send rsp now */
@@ -1188,8 +1212,7 @@ nvmet_fc_target_assoc_free(struct kref *ref) · 3 unmodified lines
1188	dev_info(tgtport->dev,	1212	dev_info(tgtport->dev,
1189	"{%d:%d} Association freed\n",	1213	"{%d:%d} Association freed\n",
1190	tgtport->fc_target_port.port_num, assoc->a_id);	1214	tgtport->fc_target_port.port_num, assoc->a_id);
1191	kfree_rcu(assoc, rcu);	1215	kfree(assoc);
1192	nvmet_fc_tgtport_put(tgtport);
1193	}	1216	}
1194		1217
1195	static void	1218	static void
@@ -1208,7 +1231,7 @@ static void · 12 unmodified lines
1208	nvmet_fc_delete_target_assoc(struct nvmet_fc_tgt_assoc *assoc)	1231	nvmet_fc_delete_target_assoc(struct nvmet_fc_tgt_assoc *assoc)
1209	{	1232	{
1210	struct nvmet_fc_tgtport *tgtport = assoc->tgtport;	1233	struct nvmet_fc_tgtport *tgtport = assoc->tgtport;
1211	struct nvmet_fc_tgt_queue *queue;	1234	unsigned long flags;
1212	int i, terminating;	1235	int i, terminating;
1213		1236
1214	terminating = atomic_xchg(&assoc->terminating, 1);	1237	terminating = atomic_xchg(&assoc->terminating, 1);
@@ -1217,29 +1240,21 @@ nvmet_fc_delete_target_assoc(struct nvmet_fc_tgt_assoc *assoc) · 2 unmodified lines
1217	if (terminating)	1240	if (terminating)
1218	return;	1241	return;
1219		1242
		1243	spin_lock_irqsave(&tgtport->lock, flags);
		1244	list_del_rcu(&assoc->a_list);
		1245	spin_unlock_irqrestore(&tgtport->lock, flags);
1220		1246
1221	for (i = NVMET_NR_QUEUES; i >= 0; i--) {	1247	synchronize_rcu();
1222	rcu_read_lock();
1223	queue = rcu_dereference(assoc->queues[i]);
1224	if (!queue) {
1225	rcu_read_unlock();
1226	continue;
1227	}
1228		1248
1229	if (!nvmet_fc_tgt_q_get(queue)) {	1249	/* ensure all in-flight I/Os have been processed */
1230	rcu_read_unlock();	1250	for (i = NVMET_NR_QUEUES; i >= 0; i--) {
1231	continue;	1251	if (assoc->queues[i])
1232	}	1252	flush_workqueue(assoc->queues[i]->work_q);
1233	rcu_read_unlock();
1234	nvmet_fc_delete_target_queue(queue);
1235	nvmet_fc_tgt_q_put(queue);
1236	}	1253	}
1237		1254
1238	dev_info(tgtport->dev,	1255	dev_info(tgtport->dev,
1239	"{%d:%d} Association deleted\n",	1256	"{%d:%d} Association deleted\n",
1240	tgtport->fc_target_port.port_num, assoc->a_id);	1257	tgtport->fc_target_port.port_num, assoc->a_id);
1241
1242	nvmet_fc_tgt_a_put(assoc);
1243	}	1258	}
1244		1259
1245	static struct nvmet_fc_tgt_assoc *	1260	static struct nvmet_fc_tgt_assoc *
@@ -1415,6 +1430,7 @@ nvmet_fc_register_targetport(struct nvmet_fc_port_info *pinfo, · 169 unmodified lines
1415	kref_init(&newrec->ref);	1430	kref_init(&newrec->ref);
1416	ida_init(&newrec->assoc_cnt);	1431	ida_init(&newrec->assoc_cnt);
1417	newrec->max_sg_cnt = template->max_sgl_segments;	1432	newrec->max_sg_cnt = template->max_sgl_segments;
		1433	INIT_WORK(&newrec->put_work, nvmet_fc_put_tgtport_work);
1418		1434
1419	ret = nvmet_fc_alloc_ls_iodlist(newrec);	1435	ret = nvmet_fc_alloc_ls_iodlist(newrec);
1420	if (ret) {	1436	if (ret) {
@@ -1492,9 +1508,8 @@ __nvmet_fc_free_assocs(struct nvmet_fc_tgtport *tgtport) · 71 unmodified lines
1492	list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {	1508	list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {
1493	if (!nvmet_fc_tgt_a_get(assoc))	1509	if (!nvmet_fc_tgt_a_get(assoc))
1494	continue;	1510	continue;
1495	if (!queue_work(nvmet_wq, &assoc->del_work))	1511	nvmet_fc_schedule_delete_assoc(assoc);
1496	/* already deleting - release local reference */	1512	nvmet_fc_tgt_a_put(assoc);
1497	nvmet_fc_tgt_a_put(assoc);
1498	}	1513	}
1499	rcu_read_unlock();	1514	rcu_read_unlock();
1500	}	1515	}
@@ -1540,16 +1555,14 @@ nvmet_fc_invalidate_host(struct nvmet_fc_target_port *target_port, · 39 unmodified lines
1540	spin_lock_irqsave(&tgtport->lock, flags);	1555	spin_lock_irqsave(&tgtport->lock, flags);
1541	list_for_each_entry_safe(assoc, next,	1556	list_for_each_entry_safe(assoc, next,
1542	&tgtport->assoc_list, a_list) {	1557	&tgtport->assoc_list, a_list) {
1543	if (!assoc->hostport \|\|	1558	if (assoc->hostport->hosthandle != hosthandle)
1544	assoc->hostport->hosthandle != hosthandle)
1545	continue;	1559	continue;
1546	if (!nvmet_fc_tgt_a_get(assoc))	1560	if (!nvmet_fc_tgt_a_get(assoc))
1547	continue;	1561	continue;
1548	assoc->hostport->invalid = 1;	1562	assoc->hostport->invalid = 1;
1549	noassoc = false;	1563	noassoc = false;
1550	if (!queue_work(nvmet_wq, &assoc->del_work))	1564	nvmet_fc_schedule_delete_assoc(assoc);
1551	/* already deleting - release local reference */	1565	nvmet_fc_tgt_a_put(assoc);
1552	nvmet_fc_tgt_a_put(assoc);
1553	}	1566	}
1554	spin_unlock_irqrestore(&tgtport->lock, flags);	1567	spin_unlock_irqrestore(&tgtport->lock, flags);
1555		1568
@@ -1581,7 +1594,7 @@ nvmet_fc_delete_ctrl(struct nvmet_ctrl *ctrl) · 25 unmodified lines
1581		1594
1582	rcu_read_lock();	1595	rcu_read_lock();
1583	list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {	1596	list_for_each_entry_rcu(assoc, &tgtport->assoc_list, a_list) {
1584	queue = rcu_dereference(assoc->queues[0]);	1597	queue = assoc->queues[0];
1585	if (queue && queue->nvme_sq.ctrl == ctrl) {	1598	if (queue && queue->nvme_sq.ctrl == ctrl) {
1586	if (nvmet_fc_tgt_a_get(assoc))	1599	if (nvmet_fc_tgt_a_get(assoc))
1587	found_ctrl = true;	1600	found_ctrl = true;
@@ -1593,9 +1606,8 @@ nvmet_fc_delete_ctrl(struct nvmet_ctrl *ctrl) · 5 unmodified lines
1593	nvmet_fc_tgtport_put(tgtport);	1606	nvmet_fc_tgtport_put(tgtport);
1594		1607
1595	if (found_ctrl) {	1608	if (found_ctrl) {
1596	if (!queue_work(nvmet_wq, &assoc->del_work))	1609	nvmet_fc_schedule_delete_assoc(assoc);
1597	/* already deleting - release local reference */	1610	nvmet_fc_tgt_a_put(assoc);
1598	nvmet_fc_tgt_a_put(assoc);
1599	return;	1611	return;
1600	}	1612	}
1601		1613
@@ -1625,6 +1637,8 @@ nvmet_fc_unregister_targetport(struct nvmet_fc_target_port *target_port) · 23 unmodified lines
1625	/* terminate any outstanding associations */	1637	/* terminate any outstanding associations */
1626	__nvmet_fc_free_assocs(tgtport);	1638	__nvmet_fc_free_assocs(tgtport);
1627		1639
		1640	flush_workqueue(nvmet_wq);
		1641
1628	/*	1642	/*
1629	* should terminate LS's as well. However, LS's will be generated	1643	* should terminate LS's as well. However, LS's will be generated
1630	* at the tail end of association termination, so they likely don't	1644	* at the tail end of association termination, so they likely don't
@@ -1870,9 +1884,6 @@ nvmet_fc_ls_disconnect(struct nvmet_fc_tgtport *tgtport, · 239 unmodified lines
1870	sizeof(struct fcnvme_ls_disconnect_assoc_acc)),	1884	sizeof(struct fcnvme_ls_disconnect_assoc_acc)),
1871	FCNVME_LS_DISCONNECT_ASSOC);	1885	FCNVME_LS_DISCONNECT_ASSOC);
1872		1886
1873	/* release get taken in nvmet_fc_find_target_assoc */
1874	nvmet_fc_tgt_a_put(assoc);
1875
1876	/*	1887	/*
1877	* The rules for LS response says the response cannot	1888	* The rules for LS response says the response cannot
1878	* go back until ABTS's have been sent for all outstanding	1889	* go back until ABTS's have been sent for all outstanding
@@ -1887,8 +1898,6 @@ nvmet_fc_ls_disconnect(struct nvmet_fc_tgtport *tgtport, · 8 unmodified lines
1887	assoc->rcv_disconn = iod;	1898	assoc->rcv_disconn = iod;
1888	spin_unlock_irqrestore(&tgtport->lock, flags);	1899	spin_unlock_irqrestore(&tgtport->lock, flags);
1889		1900
1890	nvmet_fc_delete_target_assoc(assoc);
1891
1892	if (oldls) {	1901	if (oldls) {
1893	dev_info(tgtport->dev,	1902	dev_info(tgtport->dev,
1894	"{%d:%d} Multiple Disconnect Association LS's "	1903	"{%d:%d} Multiple Disconnect Association LS's "
@@ -1904,6 +1913,9 @@ nvmet_fc_ls_disconnect(struct nvmet_fc_tgtport *tgtport, · 9 unmodified lines
1904	nvmet_fc_xmt_ls_rsp(tgtport, oldls);	1913	nvmet_fc_xmt_ls_rsp(tgtport, oldls);
1905	}	1914	}
1906		1915
		1916	nvmet_fc_schedule_delete_assoc(assoc);
		1917	nvmet_fc_tgt_a_put(assoc);
		1918
1907	return false;	1919	return false;
1908	}	1920	}
1909		1921
@@ -2540,8 +2552,9 @@ nvmet_fc_handle_fcp_rqst(struct nvmet_fc_tgtport *tgtport, · 630 unmodified lines
2540		2552
2541	fod->req.cmd = &fod->cmdiubuf.sqe;	2553	fod->req.cmd = &fod->cmdiubuf.sqe;
2542	fod->req.cqe = &fod->rspiubuf.cqe;	2554	fod->req.cqe = &fod->rspiubuf.cqe;
2543	if (tgtport->pe)	2555	if (!tgtport->pe)
2544	fod->req.port = tgtport->pe->port;	2556	goto transport_error;
		2557	fod->req.port = tgtport->pe->port;
2545		2558
2546	/* clear any response payload */	2559	/* clear any response payload */
2547	memset(&fod->rspiubuf, 0, sizeof(fod->rspiubuf));	2560	memset(&fod->rspiubuf, 0, sizeof(fod->rspiubuf));
@@ -2902,6 +2915,9 @@ nvmet_fc_remove_port(struct nvmet_port *port) · 354 unmodified lines
2902		2915
2903	nvmet_fc_portentry_unbind(pe);	2916	nvmet_fc_portentry_unbind(pe);
2904		2917
		2918	/* terminate any outstanding associations */
		2919	__nvmet_fc_free_assocs(pe->tgtport);
		2920
2905	kfree(pe);	2921	kfree(pe);
2906	}	2922	}
2907		2923
@@ -2933,6 +2949,9 @@ static int __init nvmet_fc_init_module(void) · 25 unmodified lines
2933		2949
2934	static void __exit nvmet_fc_exit_module(void)	2950	static void __exit nvmet_fc_exit_module(void)
2935	{	2951	{
		2952	/* ensure any shutdown operation, e.g. delete ctrls have finished */
		2953	flush_workqueue(nvmet_wq);
		2954
2936	/* sanity check - all lports should be removed */	2955	/* sanity check - all lports should be removed */
2937	if (!list_empty(&nvmet_fc_target_list))	2956	if (!list_empty(&nvmet_fc_target_list))
2938	pr_warn("%s: targetport list not empty\n", __func__);	2957	pr_warn("%s: targetport list not empty\n", __func__);
@@ -2945,4 +2964,5 @@ static void __exit nvmet_fc_exit_module(void) · 6 unmodified lines
2945	module_init(nvmet_fc_init_module);	2964	module_init(nvmet_fc_init_module);
2946	module_exit(nvmet_fc_exit_module);	2965	module_exit(nvmet_fc_exit_module);
2947		2966
		2967	MODULE_DESCRIPTION("NVMe target FC transport driver");
2948	MODULE_LICENSE("GPL v2");	2968	MODULE_LICENSE("GPL v2");

drivers/nvme/target/fcloop.c+4−3

 	if (!rport->targetport) {
 		tls_req->status = -ECONNREFUSED;
 		spin_lock(&rport->lock);
-		list_add_tail(&rport->ls_list, &tls_req->ls_list);
+		list_add_tail(&tls_req->ls_list, &rport->ls_list);
 		spin_unlock(&rport->lock);
 		queue_work(nvmet_wq, &rport->ls_work);
 		return ret;
 	if (remoteport) {
 		rport = remoteport->private;
 		spin_lock(&rport->lock);
-		list_add_tail(&rport->ls_list, &tls_req->ls_list);
+		list_add_tail(&tls_req->ls_list, &rport->ls_list);
 		spin_unlock(&rport->lock);
 		queue_work(nvmet_wq, &rport->ls_work);
 	}
 	if (!tport->remoteport) {
 		tls_req->status = -ECONNREFUSED;
 		spin_lock(&tport->lock);
-		list_add_tail(&tport->ls_list, &tls_req->ls_list);
+		list_add_tail(&tls_req->ls_list, &tport->ls_list);
 		spin_unlock(&tport->lock);
 		queue_work(nvmet_wq, &tport->ls_work);
 		return ret;
 module_init(fcloop_init);
 module_exit(fcloop_exit);
+MODULE_DESCRIPTION("NVMe target FC loop transport driver");
 MODULE_LICENSE("GPL v2");

drivers/nvme/target/loop.c+6−3

@@ -400,7 +400,7 @@ static void nvme_loop_shutdown_ctrl(struct nvme_loop_ctrl *ctrl) · 399 unmodified lines
400	}	400	}
401		401
402	nvme_quiesce_admin_queue(&ctrl->ctrl);	402	nvme_quiesce_admin_queue(&ctrl->ctrl);
403	if (ctrl->ctrl.state == NVME_CTRL_LIVE)	403	if (nvme_ctrl_state(&ctrl->ctrl) == NVME_CTRL_LIVE)
404	nvme_disable_ctrl(&ctrl->ctrl, true);	404	nvme_disable_ctrl(&ctrl->ctrl, true);
405		405
406	nvme_cancel_admin_tagset(&ctrl->ctrl);	406	nvme_cancel_admin_tagset(&ctrl->ctrl);
@@ -434,8 +434,10 @@ static void nvme_loop_reset_ctrl_work(struct work_struct *work) · 27 unmodified lines
434	nvme_loop_shutdown_ctrl(ctrl);	434	nvme_loop_shutdown_ctrl(ctrl);
435		435
436	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {	436	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
437	if (ctrl->ctrl.state != NVME_CTRL_DELETING &&	437	enum nvme_ctrl_state state = nvme_ctrl_state(&ctrl->ctrl);
438	ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO)	438
		439	if (state != NVME_CTRL_DELETING &&
		440	state != NVME_CTRL_DELETING_NOIO)
439	/* state change failure for non-deleted ctrl? */	441	/* state change failure for non-deleted ctrl? */
440	WARN_ON_ONCE(1);	442	WARN_ON_ONCE(1);
441	return;	443	return;
@@ -688,5 +690,6 @@ static void __exit nvme_loop_cleanup_module(void) · 246 unmodified lines
688	module_init(nvme_loop_init_module);	690	module_init(nvme_loop_init_module);
689	module_exit(nvme_loop_cleanup_module);	691	module_exit(nvme_loop_cleanup_module);
690		692
		693	MODULE_DESCRIPTION("NVMe target loop transport driver");
691	MODULE_LICENSE("GPL v2");	694	MODULE_LICENSE("GPL v2");
692	MODULE_ALIAS("nvmet-transport-254"); /* 254 == NVMF_TRTYPE_LOOP */	695	MODULE_ALIAS("nvmet-transport-254"); /* 254 == NVMF_TRTYPE_LOOP */

drivers/nvme/target/rdma.c+1−0

@@ -2104,5 +2104,6 @@ static void __exit nvmet_rdma_exit(void) · 2103 unmodified lines
2104	module_init(nvmet_rdma_init);	2104	module_init(nvmet_rdma_init);
2105	module_exit(nvmet_rdma_exit);	2105	module_exit(nvmet_rdma_exit);
2106		2106
		2107	MODULE_DESCRIPTION("NVMe target RDMA transport driver");
2107	MODULE_LICENSE("GPL v2");	2108	MODULE_LICENSE("GPL v2");
2108	MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */	2109	MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */

drivers/nvme/target/tcp.c+2−0

 	flush_workqueue(nvmet_wq);
 	destroy_workqueue(nvmet_tcp_wq);
+	ida_destroy(&nvmet_tcp_queue_ida);
 }
 module_init(nvmet_tcp_init);
 module_exit(nvmet_tcp_exit);
+MODULE_DESCRIPTION("NVMe target TCP transport driver");
 MODULE_LICENSE("GPL v2");
 MODULE_ALIAS("nvmet-transport-3"); /* 3 == NVMF_TRTYPE_TCP */

drivers/pci/bus.c+32−17

 }
 EXPORT_SYMBOL(pci_bus_add_devices);
-/** pci_walk_bus - walk devices on/under bus, calling callback.
+static void __pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
- *  @top      bus whose devices should be walked
+			   void *userdata, bool locked)
- *  @cb       callback to be called for each device found
- *  @userdata arbitrary pointer to be passed to callback.
- *
- *  Walk the given bus, including any bridged devices
- *  on buses under this bus.  Call the provided callback
- *  on each device found.
- *
- *  We check the return of @cb each time. If it returns anything
- *  other than 0, we break out.
- *
- */
-void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
-		  void *userdata)
 {
 	struct pci_dev *dev;
 	struct pci_bus *bus;
 	int retval;
 	bus = top;
-	down_read(&pci_bus_sem);
+	if (!locked)
+		down_read(&pci_bus_sem);
 	next = top->devices.next;
 	for (;;) {
 		if (next == &bus->devices) {
 		if (retval)
 			break;
 	}
-	up_read(&pci_bus_sem);
+	if (!locked)
+		up_read(&pci_bus_sem);
+}
+/**
+ *  pci_walk_bus - walk devices on/under bus, calling callback.
+ *  @top: bus whose devices should be walked
+ *  @cb: callback to be called for each device found
+ *  @userdata: arbitrary pointer to be passed to callback
+ *
+ *  Walk the given bus, including any bridged devices
+ *  on buses under this bus.  Call the provided callback
+ *  on each device found.
+ *
+ *  We check the return of @cb each time. If it returns anything
+ *  other than 0, we break out.
+ */
+void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata)
+{
+	__pci_walk_bus(top, cb, userdata, false);
 }
 EXPORT_SYMBOL_GPL(pci_walk_bus);
+void pci_walk_bus_locked(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata)
+{
+	lockdep_assert_held(&pci_bus_sem);
+	__pci_walk_bus(top, cb, userdata, true);
+}
+EXPORT_SYMBOL_GPL(pci_walk_bus_locked);
 struct pci_bus *pci_bus_get(struct pci_bus *bus)
 {
 	if (bus)

drivers/pci/controller/dwc/pcie-qcom.c+1−1

@@ -972,7 +972,7 @@ static int qcom_pcie_enable_aspm(struct pci_dev pdev, void userdata) · 971 unmodified lines
972	* Downstream devices need to be in D0 state before enabling PCI PM	972	* Downstream devices need to be in D0 state before enabling PCI PM
973	* substates.	973	* substates.
974	*/	974	*/
975	pci_set_power_state(pdev, PCI_D0);	975	pci_set_power_state_locked(pdev, PCI_D0);
976	pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL);	976	pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL);
977		977
978	return 0;	978	return 0;

drivers/pci/pci.c+52−26

 /**
  * pci_set_full_power_state - Put a PCI device into D0 and update its state
  * @dev: PCI device to power up
+ * @locked: whether pci_bus_sem is held
  *
  * Call pci_power_up() to put @dev into D0, read from its PCI_PM_CTRL register
  * to confirm the state change, restore its BARs if they might be lost and
  * to D0, it is more efficient to use pci_power_up() directly instead of this
  * function.
  */
-static int pci_set_full_power_state(struct pci_dev *dev)
+static int pci_set_full_power_state(struct pci_dev *dev, bool locked)
 {
 	u16 pmcsr;
 	int ret;
 	}
 	if (dev->bus->self)
-		pcie_aspm_pm_state_change(dev->bus->self);
+		pcie_aspm_pm_state_change(dev->bus->self, locked);
 	return 0;
 }
 		pci_walk_bus(bus, __pci_dev_set_current_state, &state);
 }
+static void __pci_bus_set_current_state(struct pci_bus *bus, pci_power_t state, bool locked)
+{
+	if (!bus)
+		return;
+	if (locked)
+		pci_walk_bus_locked(bus, __pci_dev_set_current_state, &state);
+	else
+		pci_walk_bus(bus, __pci_dev_set_current_state, &state);
+}
 /**
  * pci_set_low_power_state - Put a PCI device into a low-power state.
  * @dev: PCI device to handle.
  * @state: PCI power state (D1, D2, D3hot) to put the device into.
+ * @locked: whether pci_bus_sem is held
  *
  * Use the device's PCI_PM_CTRL register to put it into a low-power state.
  *
  * 0 if device already is in the requested state.
  * 0 if device's power state has been successfully changed.
  */
-static int pci_set_low_power_state(struct pci_dev *dev, pci_power_t state)
+static int pci_set_low_power_state(struct pci_dev *dev, pci_power_t state, bool locked)
 {
 	u16 pmcsr;
 				     pci_power_name(state));
 	if (dev->bus->self)
-		pcie_aspm_pm_state_change(dev->bus->self);
+		pcie_aspm_pm_state_change(dev->bus->self, locked);
 	return 0;
 }
-/**
+static int __pci_set_power_state(struct pci_dev *dev, pci_power_t state, bool locked)
- * pci_set_power_state - Set the power state of a PCI device
- * @dev: PCI device to handle.
- * @state: PCI power state (D0, D1, D2, D3hot) to put the device into.
- *
- * Transition a device to a new power state, using the platform firmware and/or
- * the device's PCI PM registers.
- *
- * RETURN VALUE:
- * -EINVAL if the requested state is invalid.
- * -EIO if device does not support PCI PM or its PM capabilities register has a
- * wrong version, or device doesn't support the requested state.
- * 0 if the transition is to D1 or D2 but D1 and D2 are not supported.
- * 0 if device already is in the requested state.
- * 0 if the transition is to D3 but D3 is not supported.
- * 0 if device's power state has been successfully changed.
- */
-int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
 {
 	int error;
 		return 0;
 	if (state == PCI_D0)
-		return pci_set_full_power_state(dev);
+		return pci_set_full_power_state(dev, locked);
 	/*
 	 * This device is quirked not to be put into D3, so don't put it in
 		 * To put the device in D3cold, put it into D3hot in the native
 		 * way, then put it into D3cold using platform ops.
 		 */
-		error = pci_set_low_power_state(dev, PCI_D3hot);
+		error = pci_set_low_power_state(dev, PCI_D3hot, locked);
 		if (pci_platform_power_transition(dev, PCI_D3cold))
 			return error;
 		/* Powering off a bridge may power off the whole hierarchy */
 		if (dev->current_state == PCI_D3cold)
-			pci_bus_set_current_state(dev->subordinate, PCI_D3cold);
+			__pci_bus_set_current_state(dev->subordinate, PCI_D3cold, locked);
 	} else {
-		error = pci_set_low_power_state(dev, state);
+		error = pci_set_low_power_state(dev, state, locked);
 		if (pci_platform_power_transition(dev, state))
 			return error;
 	return 0;
 }
+/**
+ * pci_set_power_state - Set the power state of a PCI device
+ * @dev: PCI device to handle.
+ * @state: PCI power state (D0, D1, D2, D3hot) to put the device into.
+ *
+ * Transition a device to a new power state, using the platform firmware and/or
+ * the device's PCI PM registers.
+ *
+ * RETURN VALUE:
+ * -EINVAL if the requested state is invalid.
+ * -EIO if device does not support PCI PM or its PM capabilities register has a
+ * wrong version, or device doesn't support the requested state.
+ * 0 if the transition is to D1 or D2 but D1 and D2 are not supported.
+ * 0 if device already is in the requested state.
+ * 0 if the transition is to D3 but D3 is not supported.
+ * 0 if device's power state has been successfully changed.
+ */
+int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
+{
+	return __pci_set_power_state(dev, state, false);
+}
 EXPORT_SYMBOL(pci_set_power_state);
+int pci_set_power_state_locked(struct pci_dev *dev, pci_power_t state)
+{
+	lockdep_assert_held(&pci_bus_sem);
+	return __pci_set_power_state(dev, state, true);
+}
+EXPORT_SYMBOL(pci_set_power_state_locked);
 #define PCI_EXP_SAVE_REGS	7
 static struct pci_cap_saved_state *_pci_find_saved_cap(struct pci_dev *pci_dev,

drivers/pci/pci.h+2−2

@@ -571,12 +571,12 @@ int pcie_retrain_link(struct pci_dev *pdev, bool use_lt); · 570 unmodified lines
571	#ifdef CONFIG_PCIEASPM	571	#ifdef CONFIG_PCIEASPM
572	void pcie_aspm_init_link_state(struct pci_dev *pdev);	572	void pcie_aspm_init_link_state(struct pci_dev *pdev);
573	void pcie_aspm_exit_link_state(struct pci_dev *pdev);	573	void pcie_aspm_exit_link_state(struct pci_dev *pdev);
574	void pcie_aspm_pm_state_change(struct pci_dev *pdev);	574	void pcie_aspm_pm_state_change(struct pci_dev *pdev, bool locked);
575	void pcie_aspm_powersave_config_link(struct pci_dev *pdev);	575	void pcie_aspm_powersave_config_link(struct pci_dev *pdev);
576	#else	576	#else
577	static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { }	577	static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { }
578	static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev) { }	578	static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev) { }
579	static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev) { }	579	static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev, bool locked) { }
580	static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { }	580	static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { }
581	#endif	581	#endif
582		582

drivers/pci/pcie/aspm.c+9−4

 	up_read(&pci_bus_sem);
 }
-/* @pdev: the root port or switch downstream port */
+/*
-void pcie_aspm_pm_state_change(struct pci_dev *pdev)
+ * @pdev: the root port or switch downstream port
+ * @locked: whether pci_bus_sem is held
+ */
+void pcie_aspm_pm_state_change(struct pci_dev *pdev, bool locked)
 {
 	struct pcie_link_state *link = pdev->link_state;
 	 * Devices changed PM state, we should recheck if latency
 	 * meets all functions' requirement
 	 */
-	down_read(&pci_bus_sem);
+	if (!locked)
+		down_read(&pci_bus_sem);
 	mutex_lock(&aspm_lock);
 	pcie_update_aspm_capable(link->root);
 	pcie_config_aspm_path(link);
 	mutex_unlock(&aspm_lock);
-	up_read(&pci_bus_sem);
+	if (!locked)
+		up_read(&pci_bus_sem);
 }
 void pcie_aspm_powersave_config_link(struct pci_dev *pdev)

drivers/phy/microchip/lan966x_serdes.c+2−0

@@ -96,6 +96,8 @@ static const struct serdes_mux lan966x_serdes_muxes[] = { · 95 unmodified lines
96	SERDES_MUX_SGMII(SERDES6G(1), 3, HSIO_HW_CFG_SD6G_1_CFG,	96	SERDES_MUX_SGMII(SERDES6G(1), 3, HSIO_HW_CFG_SD6G_1_CFG,
97	HSIO_HW_CFG_SD6G_1_CFG_SET(1)),	97	HSIO_HW_CFG_SD6G_1_CFG_SET(1)),
98		98
		99	SERDES_MUX_SGMII(SERDES6G(2), 4, 0, 0),
		100
99	SERDES_MUX_RGMII(RGMII(0), 2, HSIO_HW_CFG_RGMII_0_CFG \|	101	SERDES_MUX_RGMII(RGMII(0), 2, HSIO_HW_CFG_RGMII_0_CFG \|
100	HSIO_HW_CFG_RGMII_ENA \|	102	HSIO_HW_CFG_RGMII_ENA \|
101	HSIO_HW_CFG_GMII_ENA,	103	HSIO_HW_CFG_GMII_ENA,

drivers/phy/qualcomm/phy-qcom-qmp-usb.c+28−2

@@ -1556,6 +1556,14 @@ static const char * const qmp_phy_vreg_l[] = { · 1555 unmodified lines
1556	"vdda-phy", "vdda-pll",	1556	"vdda-phy", "vdda-pll",
1557	};	1557	};
1558		1558
		1559	static const struct qmp_usb_offsets qmp_usb_offsets_ipq8074 = {
		1560	.serdes = 0,
		1561	.pcs = 0x800,
		1562	.pcs_misc = 0x600,
		1563	.tx = 0x200,
		1564	.rx = 0x400,
		1565	};
		1566
1559	static const struct qmp_usb_offsets qmp_usb_offsets_ipq9574 = {	1567	static const struct qmp_usb_offsets qmp_usb_offsets_ipq9574 = {
1560	.serdes = 0,	1568	.serdes = 0,
1561	.pcs = 0x800,	1569	.pcs = 0x800,
@@ -1613,10 +1621,28 @@ static const struct qmp_usb_offsets qmp_usb_offsets_v7 = { · 51 unmodified lines
1613	.rx = 0x1000,	1621	.rx = 0x1000,
1614	};	1622	};
1615		1623
		1624	static const struct qmp_phy_cfg ipq6018_usb3phy_cfg = {
		1625	.lanes = 1,
		1626
		1627	.offsets = &qmp_usb_offsets_ipq8074,
		1628
		1629	.serdes_tbl = ipq9574_usb3_serdes_tbl,
		1630	.serdes_tbl_num = ARRAY_SIZE(ipq9574_usb3_serdes_tbl),
		1631	.tx_tbl = msm8996_usb3_tx_tbl,
		1632	.tx_tbl_num = ARRAY_SIZE(msm8996_usb3_tx_tbl),
		1633	.rx_tbl = ipq8074_usb3_rx_tbl,
		1634	.rx_tbl_num = ARRAY_SIZE(ipq8074_usb3_rx_tbl),
		1635	.pcs_tbl = ipq8074_usb3_pcs_tbl,
		1636	.pcs_tbl_num = ARRAY_SIZE(ipq8074_usb3_pcs_tbl),
		1637	.vreg_list = qmp_phy_vreg_l,
		1638	.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
		1639	.regs = qmp_v3_usb3phy_regs_layout,
		1640	};
		1641
1616	static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {	1642	static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {
1617	.lanes = 1,	1643	.lanes = 1,
1618		1644
1619	.offsets = &qmp_usb_offsets_v3,	1645	.offsets = &qmp_usb_offsets_ipq8074,
1620		1646
1621	.serdes_tbl = ipq8074_usb3_serdes_tbl,	1647	.serdes_tbl = ipq8074_usb3_serdes_tbl,
1622	.serdes_tbl_num = ARRAY_SIZE(ipq8074_usb3_serdes_tbl),	1648	.serdes_tbl_num = ARRAY_SIZE(ipq8074_usb3_serdes_tbl),
@@ -2563,7 +2589,7 @@ err_node_put: · 940 unmodified lines
2563	static const struct of_device_id qmp_usb_of_match_table[] = {	2589	static const struct of_device_id qmp_usb_of_match_table[] = {
2564	{	2590	{
2565	.compatible = "qcom,ipq6018-qmp-usb3-phy",	2591	.compatible = "qcom,ipq6018-qmp-usb3-phy",
2566	.data = &ipq8074_usb3phy_cfg,	2592	.data = &ipq6018_usb3phy_cfg,
2567	}, {	2593	}, {
2568	.compatible = "qcom,ipq8074-qmp-usb3-phy",	2594	.compatible = "qcom,ipq8074-qmp-usb3-phy",
2569	.data = &ipq8074_usb3phy_cfg,	2595	.data = &ipq8074_usb3phy_cfg,

drivers/phy/renesas/phy-rcar-gen3-usb2.c+0−4

 	channel->irq = platform_get_irq_optional(pdev, 0);
 	channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
 	if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
-		int ret;
 		channel->is_otg_channel = true;
 		channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
 							"renesas,no-otg-pins");
 		ret = PTR_ERR(provider);
 		goto error;
 	} else if (channel->is_otg_channel) {
-		int ret;
 		ret = device_create_file(dev, &dev_attr_role);
 		if (ret < 0)
 			goto error;

drivers/phy/ti/phy-omap-usb2.c+2−2

@@ -117,7 +117,7 @@ static int omap_usb_set_vbus(struct usb_otg *otg, bool enabled) · 116 unmodified lines
117	{	117	{
118	struct omap_usb *phy = phy_to_omapusb(otg->usb_phy);	118	struct omap_usb *phy = phy_to_omapusb(otg->usb_phy);
119		119
120	if (!phy->comparator)	120	if (!phy->comparator \|\| !phy->comparator->set_vbus)
121	return -ENODEV;	121	return -ENODEV;
122		122
123	return phy->comparator->set_vbus(phy->comparator, enabled);	123	return phy->comparator->set_vbus(phy->comparator, enabled);
@@ -127,7 +127,7 @@ static int omap_usb_start_srp(struct usb_otg *otg) · 3 unmodified lines
127	{	127	{
128	struct omap_usb *phy = phy_to_omapusb(otg->usb_phy);	128	struct omap_usb *phy = phy_to_omapusb(otg->usb_phy);
129		129
130	if (!phy->comparator)	130	if (!phy->comparator \|\| !phy->comparator->start_srp)
131	return -ENODEV;	131	return -ENODEV;
132		132
133	return phy->comparator->start_srp(phy->comparator);	133	return phy->comparator->start_srp(phy->comparator);

drivers/pinctrl/pinctrl-amd.c+1−1

@@ -1159,7 +1159,7 @@ static int amd_gpio_probe(struct platform_device *pdev) · 1158 unmodified lines
1159	}	1159	}
1160		1160
1161	ret = devm_request_irq(&pdev->dev, gpio_dev->irq, amd_gpio_irq_handler,	1161	ret = devm_request_irq(&pdev->dev, gpio_dev->irq, amd_gpio_irq_handler,
1162	IRQF_SHARED, KBUILD_MODNAME, gpio_dev);	1162	IRQF_SHARED \| IRQF_ONESHOT, KBUILD_MODNAME, gpio_dev);
1163	if (ret)	1163	if (ret)
1164	goto out2;	1164	goto out2;
1165		1165

drivers/power/supply/qcom_battmgr.c+49−60

@@ -282,7 +282,6 @@ struct qcom_battmgr_wireless { · 281 unmodified lines
282		282
283	struct qcom_battmgr {	283	struct qcom_battmgr {
284	struct device *dev;	284	struct device *dev;
285	struct auxiliary_device *adev;
286	struct pmic_glink_client *client;	285	struct pmic_glink_client *client;
287		286
288	enum qcom_battmgr_variant variant;	287	enum qcom_battmgr_variant variant;
@@ -1294,69 +1293,11 @@ static void qcom_battmgr_enable_worker(struct work_struct *work) · 1005 unmodified lines
1294	dev_err(battmgr->dev, "failed to request power notifications\n");	1293	dev_err(battmgr->dev, "failed to request power notifications\n");
1295	}	1294	}
1296		1295
1297	static char *qcom_battmgr_battery[] = { "battery" };
1298
1299	static void qcom_battmgr_register_psy(struct qcom_battmgr *battmgr)
1300	{
1301	struct power_supply_config psy_cfg_supply = {};
1302	struct auxiliary_device *adev = battmgr->adev;
1303	struct power_supply_config psy_cfg = {};
1304	struct device *dev = &adev->dev;
1305
1306	psy_cfg.drv_data = battmgr;
1307	psy_cfg.of_node = adev->dev.of_node;
1308
1309	psy_cfg_supply.drv_data = battmgr;
1310	psy_cfg_supply.of_node = adev->dev.of_node;
1311	psy_cfg_supply.supplied_to = qcom_battmgr_battery;
1312	psy_cfg_supply.num_supplicants = 1;
1313
1314	if (battmgr->variant == QCOM_BATTMGR_SC8280XP) {
1315	battmgr->bat_psy = devm_power_supply_register(dev, &sc8280xp_bat_psy_desc, &psy_cfg);
1316	if (IS_ERR(battmgr->bat_psy))
1317	dev_err(dev, "failed to register battery power supply (%ld)\n",
1318	PTR_ERR(battmgr->bat_psy));
1319
1320	battmgr->ac_psy = devm_power_supply_register(dev, &sc8280xp_ac_psy_desc, &psy_cfg_supply);
1321	if (IS_ERR(battmgr->ac_psy))
1322	dev_err(dev, "failed to register AC power supply (%ld)\n",
1323	PTR_ERR(battmgr->ac_psy));
1324
1325	battmgr->usb_psy = devm_power_supply_register(dev, &sc8280xp_usb_psy_desc, &psy_cfg_supply);
1326	if (IS_ERR(battmgr->usb_psy))
1327	dev_err(dev, "failed to register USB power supply (%ld)\n",
1328	PTR_ERR(battmgr->usb_psy));
1329
1330	battmgr->wls_psy = devm_power_supply_register(dev, &sc8280xp_wls_psy_desc, &psy_cfg_supply);
1331	if (IS_ERR(battmgr->wls_psy))
1332	dev_err(dev, "failed to register wireless charing power supply (%ld)\n",
1333	PTR_ERR(battmgr->wls_psy));
1334	} else {
1335	battmgr->bat_psy = devm_power_supply_register(dev, &sm8350_bat_psy_desc, &psy_cfg);
1336	if (IS_ERR(battmgr->bat_psy))
1337	dev_err(dev, "failed to register battery power supply (%ld)\n",
1338	PTR_ERR(battmgr->bat_psy));
1339
1340	battmgr->usb_psy = devm_power_supply_register(dev, &sm8350_usb_psy_desc, &psy_cfg_supply);
1341	if (IS_ERR(battmgr->usb_psy))
1342	dev_err(dev, "failed to register USB power supply (%ld)\n",
1343	PTR_ERR(battmgr->usb_psy));
1344
1345	battmgr->wls_psy = devm_power_supply_register(dev, &sm8350_wls_psy_desc, &psy_cfg_supply);
1346	if (IS_ERR(battmgr->wls_psy))
1347	dev_err(dev, "failed to register wireless charing power supply (%ld)\n",
1348	PTR_ERR(battmgr->wls_psy));
1349	}
1350	}
1351
1352	static void qcom_battmgr_pdr_notify(void *priv, int state)	1296	static void qcom_battmgr_pdr_notify(void *priv, int state)
1353	{	1297	{
1354	struct qcom_battmgr *battmgr = priv;	1298	struct qcom_battmgr *battmgr = priv;
1355		1299
1356	if (state == SERVREG_SERVICE_STATE_UP) {	1300	if (state == SERVREG_SERVICE_STATE_UP) {
1357	if (!battmgr->bat_psy)
1358	qcom_battmgr_register_psy(battmgr);
1359
1360	battmgr->service_up = true;	1301	battmgr->service_up = true;
1361	schedule_work(&battmgr->enable_work);	1302	schedule_work(&battmgr->enable_work);
1362	} else {	1303	} else {
@@ -1371,9 +1312,13 @@ static const struct of_device_id qcom_battmgr_of_variants[] = { · 8 unmodified lines
1371	{}	1312	{}
1372	};	1313	};
1373		1314
		1315	static char *qcom_battmgr_battery[] = { "battery" };
		1316
1374	static int qcom_battmgr_probe(struct auxiliary_device *adev,	1317	static int qcom_battmgr_probe(struct auxiliary_device *adev,
1375	const struct auxiliary_device_id *id)	1318	const struct auxiliary_device_id *id)
1376	{	1319	{
		1320	struct power_supply_config psy_cfg_supply = {};
		1321	struct power_supply_config psy_cfg = {};
1377	const struct of_device_id *match;	1322	const struct of_device_id *match;
1378	struct qcom_battmgr *battmgr;	1323	struct qcom_battmgr *battmgr;
1379	struct device *dev = &adev->dev;	1324	struct device *dev = &adev->dev;
@@ -1383,7 +1328,14 @@ static int qcom_battmgr_probe(struct auxiliary_device *adev, · 3 unmodified lines
1383	return -ENOMEM;	1328	return -ENOMEM;
1384		1329
1385	battmgr->dev = dev;	1330	battmgr->dev = dev;
1386	battmgr->adev = adev;	1331
		1332	psy_cfg.drv_data = battmgr;
		1333	psy_cfg.of_node = adev->dev.of_node;
		1334
		1335	psy_cfg_supply.drv_data = battmgr;
		1336	psy_cfg_supply.of_node = adev->dev.of_node;
		1337	psy_cfg_supply.supplied_to = qcom_battmgr_battery;
		1338	psy_cfg_supply.num_supplicants = 1;
1387		1339
1388	INIT_WORK(&battmgr->enable_work, qcom_battmgr_enable_worker);	1340	INIT_WORK(&battmgr->enable_work, qcom_battmgr_enable_worker);
1389	mutex_init(&battmgr->lock);	1341	mutex_init(&battmgr->lock);
@@ -1395,6 +1347,43 @@ static int qcom_battmgr_probe(struct auxiliary_device *adev, · 5 unmodified lines
1395	else	1347	else
1396	battmgr->variant = QCOM_BATTMGR_SM8350;	1348	battmgr->variant = QCOM_BATTMGR_SM8350;
1397		1349
		1350	if (battmgr->variant == QCOM_BATTMGR_SC8280XP) {
		1351	battmgr->bat_psy = devm_power_supply_register(dev, &sc8280xp_bat_psy_desc, &psy_cfg);
		1352	if (IS_ERR(battmgr->bat_psy))
		1353	return dev_err_probe(dev, PTR_ERR(battmgr->bat_psy),
		1354	"failed to register battery power supply\n");
		1355
		1356	battmgr->ac_psy = devm_power_supply_register(dev, &sc8280xp_ac_psy_desc, &psy_cfg_supply);
		1357	if (IS_ERR(battmgr->ac_psy))
		1358	return dev_err_probe(dev, PTR_ERR(battmgr->ac_psy),
		1359	"failed to register AC power supply\n");
		1360
		1361	battmgr->usb_psy = devm_power_supply_register(dev, &sc8280xp_usb_psy_desc, &psy_cfg_supply);
		1362	if (IS_ERR(battmgr->usb_psy))
		1363	return dev_err_probe(dev, PTR_ERR(battmgr->usb_psy),
		1364	"failed to register USB power supply\n");
		1365
		1366	battmgr->wls_psy = devm_power_supply_register(dev, &sc8280xp_wls_psy_desc, &psy_cfg_supply);
		1367	if (IS_ERR(battmgr->wls_psy))
		1368	return dev_err_probe(dev, PTR_ERR(battmgr->wls_psy),
		1369	"failed to register wireless charing power supply\n");
		1370	} else {
		1371	battmgr->bat_psy = devm_power_supply_register(dev, &sm8350_bat_psy_desc, &psy_cfg);
		1372	if (IS_ERR(battmgr->bat_psy))
		1373	return dev_err_probe(dev, PTR_ERR(battmgr->bat_psy),
		1374	"failed to register battery power supply\n");
		1375
		1376	battmgr->usb_psy = devm_power_supply_register(dev, &sm8350_usb_psy_desc, &psy_cfg_supply);
		1377	if (IS_ERR(battmgr->usb_psy))
		1378	return dev_err_probe(dev, PTR_ERR(battmgr->usb_psy),
		1379	"failed to register USB power supply\n");
		1380
		1381	battmgr->wls_psy = devm_power_supply_register(dev, &sm8350_wls_psy_desc, &psy_cfg_supply);
		1382	if (IS_ERR(battmgr->wls_psy))
		1383	return dev_err_probe(dev, PTR_ERR(battmgr->wls_psy),
		1384	"failed to register wireless charing power supply\n");
		1385	}
		1386
1398	battmgr->client = devm_pmic_glink_register_client(dev,	1387	battmgr->client = devm_pmic_glink_register_client(dev,
1399	PMIC_GLINK_OWNER_BATTMGR,	1388	PMIC_GLINK_OWNER_BATTMGR,
1400	qcom_battmgr_callback,	1389	qcom_battmgr_callback,

drivers/s390/net/qeth_l3_main.c+6−3

 		if (!recover) {
 			hash_del(&addr->hnode);
 			kfree(addr);
-			continue;
+		} else {
+			/* prepare for recovery */
+			addr->disp_flag = QETH_DISP_ADDR_ADD;
 		}
-		addr->disp_flag = QETH_DISP_ADDR_ADD;
 	}
 	mutex_unlock(&card->ip_lock);
 		if (addr->disp_flag == QETH_DISP_ADDR_ADD) {
 			rc = qeth_l3_register_addr_entry(card, addr);
-			if (!rc) {
+			if (!rc || rc == -EADDRINUSE || rc == -ENETDOWN) {
+				/* keep it in the records */
 				addr->disp_flag = QETH_DISP_ADDR_DO_NOTHING;
 			} else {
+				/* bad address */
 				hash_del(&addr->hnode);
 				kfree(addr);
 			}

drivers/tty/serial/8250/8250_pci1xxxx.c+2−2

@@ -302,7 +302,7 @@ static void pci1xxxx_process_read_data(struct uart_port *port, · 301 unmodified lines
302	* to read, the data is received one byte at a time.	302	* to read, the data is received one byte at a time.
303	*/	303	*/
304	while (valid_burst_count--) {	304	while (valid_burst_count--) {
305	if (*buff_index > (RX_BUF_SIZE - UART_BURST_SIZE))	305	if (*buff_index >= (RX_BUF_SIZE - UART_BURST_SIZE))
306	break;	306	break;
307	burst_buf = (u32 )&rx_buff[buff_index];	307	burst_buf = (u32 )&rx_buff[buff_index];
308	*burst_buf = readl(port->membase + UART_RX_BURST_FIFO);	308	*burst_buf = readl(port->membase + UART_RX_BURST_FIFO);
@@ -311,7 +311,7 @@ static void pci1xxxx_process_read_data(struct uart_port *port, · 2 unmodified lines
311	}	311	}
312		312
313	while (*valid_byte_count) {	313	while (*valid_byte_count) {
314	if (*buff_index > RX_BUF_SIZE)	314	if (*buff_index >= RX_BUF_SIZE)
315	break;	315	break;
316	rx_buff[*buff_index] = readb(port->membase +	316	rx_buff[*buff_index] = readb(port->membase +
317	UART_RX_BYTE_FIFO);	317	UART_RX_BYTE_FIFO);

drivers/tty/serial/max310x.c+43−10

@@ -237,6 +237,14 @@ · 236 unmodified lines
237	#define MAX310x_REV_MASK (0xf8)	237	#define MAX310x_REV_MASK (0xf8)
238	#define MAX310X_WRITE_BIT 0x80	238	#define MAX310X_WRITE_BIT 0x80
239		239
		240	/* Port startup definitions */
		241	#define MAX310X_PORT_STARTUP_WAIT_RETRIES 20 /* Number of retries */
		242	#define MAX310X_PORT_STARTUP_WAIT_DELAY_MS 10 /* Delay between retries */
		243
		244	/* Crystal-related definitions */
		245	#define MAX310X_XTAL_WAIT_RETRIES 20 /* Number of retries */
		246	#define MAX310X_XTAL_WAIT_DELAY_MS 10 /* Delay between retries */
		247
240	/* MAX3107 specific */	248	/* MAX3107 specific */
241	#define MAX3107_REV_ID (0xa0)	249	#define MAX3107_REV_ID (0xa0)
242		250
@@ -583,7 +591,7 @@ static int max310x_update_best_err(unsigned long f, long *besterr) · 340 unmodified lines
583	return 1;	591	return 1;
584	}	592	}
585		593
586	static u32 max310x_set_ref_clk(struct device dev, struct max310x_port s,	594	static s32 max310x_set_ref_clk(struct device dev, struct max310x_port s,
587	unsigned long freq, bool xtal)	595	unsigned long freq, bool xtal)
588	{	596	{
589	unsigned int div, clksrc, pllcfg = 0;	597	unsigned int div, clksrc, pllcfg = 0;
@@ -641,12 +649,20 @@ static u32 max310x_set_ref_clk(struct device dev, struct max310x_port s, · 51 unmodified lines
641		649
642	/* Wait for crystal */	650	/* Wait for crystal */
643	if (xtal) {	651	if (xtal) {
644	unsigned int val;	652	bool stable = false;
645	msleep(10);	653	unsigned int try = 0, val = 0;
646	regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val);	654
647	if (!(val & MAX310X_STS_CLKREADY_BIT)) {	655	do {
648	dev_warn(dev, "clock is not stable yet\n");	656	msleep(MAX310X_XTAL_WAIT_DELAY_MS);
649	}	657	regmap_read(s->regmap, MAX310X_STS_IRQSTS_REG, &val);
		658
		659	if (val & MAX310X_STS_CLKREADY_BIT)
		660	stable = true;
		661	} while (!stable && (++try < MAX310X_XTAL_WAIT_RETRIES));
		662
		663	if (!stable)
		664	return dev_err_probe(dev, -EAGAIN,
		665	"clock is not stable\n");
650	}	666	}
651		667
652	return bestfreq;	668	return bestfreq;
@@ -1271,7 +1287,7 @@ static int max310x_probe(struct device dev, const struct max310x_devtype devty · 618 unmodified lines
1271	{	1287	{
1272	int i, ret, fmin, fmax, freq;	1288	int i, ret, fmin, fmax, freq;
1273	struct max310x_port *s;	1289	struct max310x_port *s;
1274	u32 uartclk = 0;	1290	s32 uartclk = 0;
1275	bool xtal;	1291	bool xtal;
1276		1292
1277	for (i = 0; i < devtype->nr; i++)	1293	for (i = 0; i < devtype->nr; i++)
@@ -1334,6 +1350,9 @@ static int max310x_probe(struct device dev, const struct max310x_devtype devty · 56 unmodified lines
1334	goto out_clk;	1350	goto out_clk;
1335		1351
1336	for (i = 0; i < devtype->nr; i++) {	1352	for (i = 0; i < devtype->nr; i++) {
		1353	bool started = false;
		1354	unsigned int try = 0, val = 0;
		1355
1337	/* Reset port */	1356	/* Reset port */
1338	regmap_write(regmaps[i], MAX310X_MODE2_REG,	1357	regmap_write(regmaps[i], MAX310X_MODE2_REG,
1339	MAX310X_MODE2_RST_BIT);	1358	MAX310X_MODE2_RST_BIT);
@@ -1342,13 +1361,27 @@ static int max310x_probe(struct device dev, const struct max310x_devtype devty · 2 unmodified lines
1342		1361
1343	/* Wait for port startup */	1362	/* Wait for port startup */
1344	do {	1363	do {
1345	regmap_read(regmaps[i], MAX310X_BRGDIVLSB_REG, &ret);	1364	msleep(MAX310X_PORT_STARTUP_WAIT_DELAY_MS);
1346	} while (ret != 0x01);	1365	regmap_read(regmaps[i], MAX310X_BRGDIVLSB_REG, &val);
		1366
		1367	if (val == 0x01)
		1368	started = true;
		1369	} while (!started && (++try < MAX310X_PORT_STARTUP_WAIT_RETRIES));
		1370
		1371	if (!started) {
		1372	ret = dev_err_probe(dev, -EAGAIN, "port reset failed\n");
		1373	goto out_uart;
		1374	}
1347		1375
1348	regmap_write(regmaps[i], MAX310X_MODE1_REG, devtype->mode1);	1376	regmap_write(regmaps[i], MAX310X_MODE1_REG, devtype->mode1);
1349	}	1377	}
1350		1378
1351	uartclk = max310x_set_ref_clk(dev, s, freq, xtal);	1379	uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
		1380	if (uartclk < 0) {
		1381	ret = uartclk;
		1382	goto out_uart;
		1383	}
		1384
1352	dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);	1385	dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);
1353		1386
1354	for (i = 0; i < devtype->nr; i++) {	1387	for (i = 0; i < devtype->nr; i++) {

drivers/tty/serial/serial_core.c+1−1

 		goto out;
 	if (!tty_io_error(tty)) {
-		result = uport->mctrl;
 		uart_port_lock_irq(uport);
+		result = uport->mctrl;
 		result |= uport->ops->get_mctrl(uport);
 		uart_port_unlock_irq(uport);
 	}

drivers/usb/chipidea/ci.h+2−0

  * @enabled_otg_timer_bits: bits of enabled otg timers
  * @next_otg_timer: next nearest enabled timer to be expired
  * @work: work for role changing
+ * @power_lost_work: work for power lost handling
  * @wq: workqueue thread
  * @qh_pool: allocation pool for queue heads
  * @td_pool: allocation pool for transfer descriptors
 	enum otg_fsm_timer		next_otg_timer;
 	struct usb_role_switch		*role_switch;
 	struct work_struct		work;
+	struct work_struct		power_lost_work;
 	struct workqueue_struct		*wq;
 	struct dma_pool			*qh_pool;

drivers/usb/chipidea/core.c+24−20

 	return 0;
 }
+static void ci_power_lost_work(struct work_struct *work)
+{
+	struct ci_hdrc *ci = container_of(work, struct ci_hdrc, power_lost_work);
+	enum ci_role role;
+	disable_irq_nosync(ci->irq);
+	pm_runtime_get_sync(ci->dev);
+	if (!ci_otg_is_fsm_mode(ci)) {
+		role = ci_get_role(ci);
+		if (ci->role != role) {
+			ci_handle_id_switch(ci);
+		} else if (role == CI_ROLE_GADGET) {
+			if (ci->is_otg && hw_read_otgsc(ci, OTGSC_BSV))
+				usb_gadget_vbus_connect(&ci->gadget);
+		}
+	}
+	pm_runtime_put_sync(ci->dev);
+	enable_irq(ci->irq);
+}
 static DEFINE_IDA(ci_ida);
 struct platform_device *ci_hdrc_add_device(struct device *dev,
 	spin_lock_init(&ci->lock);
 	mutex_init(&ci->mutex);
+	INIT_WORK(&ci->power_lost_work, ci_power_lost_work);
 	ci->dev = dev;
 	ci->platdata = dev_get_platdata(dev);
 	ci->imx28_write_fix = !!(ci->platdata->flags &
 	return 0;
 }
-static void ci_handle_power_lost(struct ci_hdrc *ci)
-{
-	enum ci_role role;
-	disable_irq_nosync(ci->irq);
-	if (!ci_otg_is_fsm_mode(ci)) {
-		role = ci_get_role(ci);
-		if (ci->role != role) {
-			ci_handle_id_switch(ci);
-		} else if (role == CI_ROLE_GADGET) {
-			if (ci->is_otg && hw_read_otgsc(ci, OTGSC_BSV))
-				usb_gadget_vbus_connect(&ci->gadget);
-		}
-	}
-	enable_irq(ci->irq);
-}
 static int ci_resume(struct device *dev)
 {
 	struct ci_hdrc *ci = dev_get_drvdata(dev);
 		ci_role(ci)->resume(ci, power_lost);
 	if (power_lost)
-		ci_handle_power_lost(ci);
+		queue_work(system_freezable_wq, &ci->power_lost_work);
 	if (ci->supports_runtime_pm) {
 		pm_runtime_disable(dev);

drivers/usb/common/ulpi.c+1−1

@@ -301,7 +301,7 @@ static int ulpi_register(struct device dev, struct ulpi ulpi) · 300 unmodified lines
301	return ret;	301	return ret;
302	}	302	}
303		303
304	root = debugfs_create_dir(dev_name(dev), ulpi_root);	304	root = debugfs_create_dir(dev_name(&ulpi->dev), ulpi_root);
305	debugfs_create_file("regs", 0444, root, ulpi, &ulpi_regs_fops);	305	debugfs_create_file("regs", 0444, root, ulpi, &ulpi_regs_fops);
306		306
307	dev_dbg(&ulpi->dev, "registered ULPI PHY: vendor %04x, product %04x\n",	307	dev_dbg(&ulpi->dev, "registered ULPI PHY: vendor %04x, product %04x\n",

drivers/usb/core/hub.c+32−14

@@ -2053,9 +2053,19 @@ static void update_port_device_state(struct usb_device *udev) · 2052 unmodified lines
2053		2053
2054	if (udev->parent) {	2054	if (udev->parent) {
2055	hub = usb_hub_to_struct_hub(udev->parent);	2055	hub = usb_hub_to_struct_hub(udev->parent);
2056	port_dev = hub->ports[udev->portnum - 1];	2056
2057	WRITE_ONCE(port_dev->state, udev->state);	2057	/*
2058	sysfs_notify_dirent(port_dev->state_kn);	2058	* The Link Layer Validation System Driver (lvstest)
		2059	* has a test step to unbind the hub before running the
		2060	* rest of the procedure. This triggers hub_disconnect
		2061	* which will set the hub's maxchild to 0, further
		2062	* resulting in usb_hub_to_struct_hub returning NULL.
		2063	*/
		2064	if (hub) {
		2065	port_dev = hub->ports[udev->portnum - 1];
		2066	WRITE_ONCE(port_dev->state, udev->state);
		2067	sysfs_notify_dirent(port_dev->state_kn);
		2068	}
2059	}	2069	}
2060	}	2070	}
2061		2071
@@ -2388,17 +2398,25 @@ static int usb_enumerate_device_otg(struct usb_device *udev) · 326 unmodified lines
2388	}	2398	}
2389	} else if (desc->bLength == sizeof	2399	} else if (desc->bLength == sizeof
2390	(struct usb_otg_descriptor)) {	2400	(struct usb_otg_descriptor)) {
2391	/* Set a_alt_hnp_support for legacy otg device */	2401	/*
2392	err = usb_control_msg(udev,	2402	* We are operating on a legacy OTP device
2393	usb_sndctrlpipe(udev, 0),	2403	* These should be told that they are operating
2394	USB_REQ_SET_FEATURE, 0,	2404	* on the wrong port if we have another port that does
2395	USB_DEVICE_A_ALT_HNP_SUPPORT,	2405	* support HNP
2396	0, NULL, 0,	2406	*/
2397	USB_CTRL_SET_TIMEOUT);	2407	if (bus->otg_port != 0) {
2398	if (err < 0)	2408	/* Set a_alt_hnp_support for legacy otg device */
2399	dev_err(&udev->dev,	2409	err = usb_control_msg(udev,
2400	"set a_alt_hnp_support failed: %d\n",	2410	usb_sndctrlpipe(udev, 0),
2401	err);	2411	USB_REQ_SET_FEATURE, 0,
		2412	USB_DEVICE_A_ALT_HNP_SUPPORT,
		2413	0, NULL, 0,
		2414	USB_CTRL_SET_TIMEOUT);
		2415	if (err < 0)
		2416	dev_err(&udev->dev,
		2417	"set a_alt_hnp_support failed: %d\n",
		2418	err);
		2419	}
2402	}	2420	}
2403	}	2421	}
2404	#endif	2422	#endif

drivers/usb/dwc3/dwc3-pci.c+4−0

 #define PCI_DEVICE_ID_INTEL_MTLP		0x7ec1
 #define PCI_DEVICE_ID_INTEL_MTLS		0x7f6f
 #define PCI_DEVICE_ID_INTEL_MTL			0x7e7e
+#define PCI_DEVICE_ID_INTEL_ARLH		0x7ec1
+#define PCI_DEVICE_ID_INTEL_ARLH_PCH		0x777e
 #define PCI_DEVICE_ID_INTEL_TGL			0x9a15
 #define PCI_DEVICE_ID_AMD_MR			0x163a
 	{ PCI_DEVICE_DATA(INTEL, MTLP, &dwc3_pci_intel_swnode) },
 	{ PCI_DEVICE_DATA(INTEL, MTL, &dwc3_pci_intel_swnode) },
 	{ PCI_DEVICE_DATA(INTEL, MTLS, &dwc3_pci_intel_swnode) },
+	{ PCI_DEVICE_DATA(INTEL, ARLH, &dwc3_pci_intel_swnode) },
+	{ PCI_DEVICE_DATA(INTEL, ARLH_PCH, &dwc3_pci_intel_swnode) },
 	{ PCI_DEVICE_DATA(INTEL, TGL, &dwc3_pci_intel_swnode) },
 	{ PCI_DEVICE_DATA(AMD, NL_USB, &dwc3_pci_amd_swnode) },

drivers/usb/dwc3/gadget.c+2−4

 	unsigned long flags;
 	int ret;
-	if (!dwc->gadget_driver)
-		return 0;
 	ret = dwc3_gadget_soft_disconnect(dwc);
 	if (ret)
 		goto err;
 	spin_lock_irqsave(&dwc->lock, flags);
-	dwc3_disconnect_gadget(dwc);
+	if (dwc->gadget_driver)
+		dwc3_disconnect_gadget(dwc);
 	spin_unlock_irqrestore(&dwc->lock, flags);
 	return 0;

drivers/usb/dwc3/host.c+3−1

 int dwc3_host_init(struct dwc3 *dwc)
 {
-	struct property_entry	props[4];
+	struct property_entry	props[5];
 	struct platform_device	*xhci;
 	int			ret, irq;
 	int			prop_idx = 0;
 	memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props));
+	props[prop_idx++] = PROPERTY_ENTRY_BOOL("xhci-sg-trb-cache-size-quirk");
 	if (dwc->usb3_lpm_capable)
 		props[prop_idx++] = PROPERTY_ENTRY_BOOL("usb3-lpm-capable");

drivers/usb/gadget/function/f_mass_storage.c+18−2

 static bool start_in_transfer(struct fsg_common *common, struct fsg_buffhd *bh)
 {
+	int rc;
 	if (!fsg_is_set(common))
 		return false;
 	bh->state = BUF_STATE_SENDING;
-	if (start_transfer(common->fsg, common->fsg->bulk_in, bh->inreq))
+	rc = start_transfer(common->fsg, common->fsg->bulk_in, bh->inreq);
+	if (rc) {
 		bh->state = BUF_STATE_EMPTY;
+		if (rc == -ESHUTDOWN) {
+			common->running = 0;
+			return false;
+		}
+	}
 	return true;
 }
 static bool start_out_transfer(struct fsg_common *common, struct fsg_buffhd *bh)
 {
+	int rc;
 	if (!fsg_is_set(common))
 		return false;
 	bh->state = BUF_STATE_RECEIVING;
-	if (start_transfer(common->fsg, common->fsg->bulk_out, bh->outreq))
+	rc = start_transfer(common->fsg, common->fsg->bulk_out, bh->outreq);
+	if (rc) {
 		bh->state = BUF_STATE_FULL;
+		if (rc == -ESHUTDOWN) {
+			common->running = 0;
+			return false;
+		}
+	}
 	return true;
 }

drivers/usb/gadget/function/f_ncm.c+4−4

@@ -105,8 +105,8 @@ static inline struct f_ncm func_to_ncm(struct usb_function f) · 104 unmodified lines
105		105
106	/*	106	/*
107	* Although max mtu as dictated by u_ether is 15412 bytes, setting	107	* Although max mtu as dictated by u_ether is 15412 bytes, setting
108	* max_segment_sizeto 15426 would not be efficient. If user chooses segment	108	* max_segment_size to 15426 would not be efficient. If user chooses segment
109	* size to be (>= 8192), then we can't aggregate more than one buffer in each	109	* size to be (>= 8192), then we can't aggregate more than one buffer in each
110	* NTB (assuming each packet coming from network layer is >= 8192 bytes) as ep	110	* NTB (assuming each packet coming from network layer is >= 8192 bytes) as ep
111	* maxpacket limit is 16384. So let max_segment_size be limited to 8000 to allow	111	* maxpacket limit is 16384. So let max_segment_size be limited to 8000 to allow
112	* at least 2 packets to be aggregated reducing wastage of NTB buffer space	112	* at least 2 packets to be aggregated reducing wastage of NTB buffer space
@@ -1489,7 +1489,7 @@ static int ncm_bind(struct usb_configuration c, struct usb_function f) · 1376 unmodified lines
1489	ncm_data_intf.bInterfaceNumber = status;	1489	ncm_data_intf.bInterfaceNumber = status;
1490	ncm_union_desc.bSlaveInterface0 = status;	1490	ncm_union_desc.bSlaveInterface0 = status;
1491		1491
1492	ecm_desc.wMaxSegmentSize = ncm_opts->max_segment_size;	1492	ecm_desc.wMaxSegmentSize = cpu_to_le16(ncm_opts->max_segment_size);
1493		1493
1494	status = -ENODEV;	1494	status = -ENODEV;
1495		1495
@@ -1685,7 +1685,7 @@ static struct usb_function_instance *ncm_alloc_inst(void) · 189 unmodified lines
1685	kfree(opts);	1685	kfree(opts);
1686	return ERR_CAST(net);	1686	return ERR_CAST(net);
1687	}	1687	}
1688	opts->max_segment_size = cpu_to_le16(ETH_FRAME_LEN);	1688	opts->max_segment_size = ETH_FRAME_LEN;
1689	INIT_LIST_HEAD(&opts->ncm_os_desc.ext_prop);	1689	INIT_LIST_HEAD(&opts->ncm_os_desc.ext_prop);
1690		1690
1691	descs[0] = &opts->ncm_os_desc;	1691	descs[0] = &opts->ncm_os_desc;

drivers/usb/gadget/udc/pch_udc.c+0−1

@@ -274,7 +274,6 @@ struct pch_udc_cfg_data { · 273 unmodified lines
274	* @td_data: for data request	274	* @td_data: for data request
275	* @dev: reference to device struct	275	* @dev: reference to device struct
276	* @offset_addr: offset address of ep register	276	* @offset_addr: offset address of ep register
277	* @desc: for this ep
278	* @queue: queue for requests	277	* @queue: queue for requests
279	* @num: endpoint number	278	* @num: endpoint number
280	* @in: endpoint is IN	279	* @in: endpoint is IN

drivers/usb/host/xhci-mem.c+7−7

@@ -1861,14 +1861,14 @@ void xhci_remove_secondary_interrupter(struct usb_hcd *hcd, struct xhci_interrup · 1860 unmodified lines
1861	struct xhci_hcd *xhci = hcd_to_xhci(hcd);	1861	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1862	unsigned int intr_num;	1862	unsigned int intr_num;
1863		1863
		1864	spin_lock_irq(&xhci->lock);
		1865
1864	/* interrupter 0 is primary interrupter, don't touch it */	1866	/* interrupter 0 is primary interrupter, don't touch it */
1865	if (!ir \|\| !ir->intr_num \|\| ir->intr_num >= xhci->max_interrupters)	1867	if (!ir \|\| !ir->intr_num \|\| ir->intr_num >= xhci->max_interrupters) {
1866	xhci_dbg(xhci, "Invalid secondary interrupter, can't remove\n");	1868	xhci_dbg(xhci, "Invalid secondary interrupter, can't remove\n");
1867		1869	spin_unlock_irq(&xhci->lock);
1868	/* fixme, should we check xhci->interrupter[intr_num] == ir */	1870	return;
1869	/* fixme locking */	1871	}
1870
1871	spin_lock_irq(&xhci->lock);
1872		1872
1873	intr_num = ir->intr_num;	1873	intr_num = ir->intr_num;
1874		1874
@@ -2322,7 +2322,7 @@ xhci_add_interrupter(struct xhci_hcd xhci, struct xhci_interrupter ir, · 447 unmodified lines
2322	u64 erst_base;	2322	u64 erst_base;
2323	u32 erst_size;	2323	u32 erst_size;
2324		2324
2325	if (intr_num > xhci->max_interrupters) {	2325	if (intr_num >= xhci->max_interrupters) {
2326	xhci_warn(xhci, "Can't add interrupter %d, max interrupters %d\n",	2326	xhci_warn(xhci, "Can't add interrupter %d, max interrupters %d\n",
2327	intr_num, xhci->max_interrupters);	2327	intr_num, xhci->max_interrupters);
2328	return -EINVAL;	2328	return -EINVAL;

drivers/usb/host/xhci-plat.c+3−0

@@ -253,6 +253,9 @@ int xhci_plat_probe(struct platform_device pdev, struct device sysdev, const s · 252 unmodified lines
253	if (device_property_read_bool(tmpdev, "quirk-broken-port-ped"))	253	if (device_property_read_bool(tmpdev, "quirk-broken-port-ped"))
254	xhci->quirks \|= XHCI_BROKEN_PORT_PED;	254	xhci->quirks \|= XHCI_BROKEN_PORT_PED;
255		255
		256	if (device_property_read_bool(tmpdev, "xhci-sg-trb-cache-size-quirk"))
		257	xhci->quirks \|= XHCI_SG_TRB_CACHE_SIZE_QUIRK;
		258
256	device_property_read_u32(tmpdev, "imod-interval-ns",	259	device_property_read_u32(tmpdev, "imod-interval-ns",
257	&xhci->imod_interval);	260	&xhci->imod_interval);
258	}	261	}

drivers/usb/host/xhci-ring.c+65−15

@@ -2376,6 +2376,9 @@ static int process_isoc_td(struct xhci_hcd xhci, struct xhci_virt_ep ep, · 2375 unmodified lines
2376	/* handle completion code */	2376	/* handle completion code */
2377	switch (trb_comp_code) {	2377	switch (trb_comp_code) {
2378	case COMP_SUCCESS:	2378	case COMP_SUCCESS:
		2379	/* Don't overwrite status if TD had an error, see xHCI 4.9.1 */
		2380	if (td->error_mid_td)
		2381	break;
2379	if (remaining) {	2382	if (remaining) {
2380	frame->status = short_framestatus;	2383	frame->status = short_framestatus;
2381	if (xhci->quirks & XHCI_TRUST_TX_LENGTH)	2384	if (xhci->quirks & XHCI_TRUST_TX_LENGTH)
@@ -2391,9 +2394,13 @@ static int process_isoc_td(struct xhci_hcd xhci, struct xhci_virt_ep ep, · 9 unmodified lines
2391	case COMP_BANDWIDTH_OVERRUN_ERROR:	2394	case COMP_BANDWIDTH_OVERRUN_ERROR:
2392	frame->status = -ECOMM;	2395	frame->status = -ECOMM;
2393	break;	2396	break;
2394	case COMP_ISOCH_BUFFER_OVERRUN:
2395	case COMP_BABBLE_DETECTED_ERROR:	2397	case COMP_BABBLE_DETECTED_ERROR:
		2398	sum_trbs_for_length = true;
		2399	fallthrough;
		2400	case COMP_ISOCH_BUFFER_OVERRUN:
2396	frame->status = -EOVERFLOW;	2401	frame->status = -EOVERFLOW;
		2402	if (ep_trb != td->last_trb)
		2403	td->error_mid_td = true;
2397	break;	2404	break;
2398	case COMP_INCOMPATIBLE_DEVICE_ERROR:	2405	case COMP_INCOMPATIBLE_DEVICE_ERROR:
2399	case COMP_STALL_ERROR:	2406	case COMP_STALL_ERROR:
@@ -2401,8 +2408,9 @@ static int process_isoc_td(struct xhci_hcd xhci, struct xhci_virt_ep ep, · 1 unmodified line
2401	break;	2408	break;
2402	case COMP_USB_TRANSACTION_ERROR:	2409	case COMP_USB_TRANSACTION_ERROR:
2403	frame->status = -EPROTO;	2410	frame->status = -EPROTO;
		2411	sum_trbs_for_length = true;
2404	if (ep_trb != td->last_trb)	2412	if (ep_trb != td->last_trb)
2405	return 0;	2413	td->error_mid_td = true;
2406	break;	2414	break;
2407	case COMP_STOPPED:	2415	case COMP_STOPPED:
2408	sum_trbs_for_length = true;	2416	sum_trbs_for_length = true;
@@ -2422,6 +2430,9 @@ static int process_isoc_td(struct xhci_hcd xhci, struct xhci_virt_ep ep, · 13 unmodified lines
2422	break;	2430	break;
2423	}	2431	}
2424		2432
		2433	if (td->urb_length_set)
		2434	goto finish_td;
		2435
2425	if (sum_trbs_for_length)	2436	if (sum_trbs_for_length)
2426	frame->actual_length = sum_trb_lengths(xhci, ep->ring, ep_trb) +	2437	frame->actual_length = sum_trb_lengths(xhci, ep->ring, ep_trb) +
2427	ep_trb_len - remaining;	2438	ep_trb_len - remaining;
@@ -2430,6 +2441,14 @@ static int process_isoc_td(struct xhci_hcd xhci, struct xhci_virt_ep ep, · 2 unmodified lines
2430		2441
2431	td->urb->actual_length += frame->actual_length;	2442	td->urb->actual_length += frame->actual_length;
2432		2443
		2444	finish_td:
		2445	/* Don't give back TD yet if we encountered an error mid TD */
		2446	if (td->error_mid_td && ep_trb != td->last_trb) {
		2447	xhci_dbg(xhci, "Error mid isoc TD, wait for final completion event\n");
		2448	td->urb_length_set = true;
		2449	return 0;
		2450	}
		2451
2433	return finish_td(xhci, ep, ep_ring, td, trb_comp_code);	2452	return finish_td(xhci, ep, ep_ring, td, trb_comp_code);
2434	}	2453	}
2435		2454
@@ -2808,17 +2827,51 @@ static int handle_tx_event(struct xhci_hcd *xhci, · 372 unmodified lines
2808	}	2827	}
2809		2828
2810	if (!ep_seg) {	2829	if (!ep_seg) {
2811	if (!ep->skip \|\|	2830
2812	!usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {	2831	if (ep->skip && usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2813	/* Some host controllers give a spurious	2832	skip_isoc_td(xhci, td, ep, status);
2814	* successful event after a short transfer.	2833	goto cleanup;
2815	* Ignore it.	2834	}
2816	*/	2835
2817	if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&	2836	/*
2818	ep_ring->last_td_was_short) {	2837	* Some hosts give a spurious success event after a short
2819	ep_ring->last_td_was_short = false;	2838	* transfer. Ignore it.
2820	goto cleanup;	2839	*/
		2840	if ((xhci->quirks & XHCI_SPURIOUS_SUCCESS) &&
		2841	ep_ring->last_td_was_short) {
		2842	ep_ring->last_td_was_short = false;
		2843	goto cleanup;
		2844	}
		2845
		2846	/*
		2847	* xhci 4.10.2 states isoc endpoints should continue
		2848	* processing the next TD if there was an error mid TD.
		2849	* So host like NEC don't generate an event for the last
		2850	* isoc TRB even if the IOC flag is set.
		2851	* xhci 4.9.1 states that if there are errors in mult-TRB
		2852	* TDs xHC should generate an error for that TRB, and if xHC
		2853	* proceeds to the next TD it should genete an event for
		2854	* any TRB with IOC flag on the way. Other host follow this.
		2855	* So this event might be for the next TD.
		2856	*/
		2857	if (td->error_mid_td &&
		2858	!list_is_last(&td->td_list, &ep_ring->td_list)) {
		2859	struct xhci_td *td_next = list_next_entry(td, td_list);
		2860
		2861	ep_seg = trb_in_td(xhci, td_next->start_seg, td_next->first_trb,
		2862	td_next->last_trb, ep_trb_dma, false);
		2863	if (ep_seg) {
		2864	/* give back previous TD, start handling new */
		2865	xhci_dbg(xhci, "Missing TD completion event after mid TD error\n");
		2866	ep_ring->dequeue = td->last_trb;
		2867	ep_ring->deq_seg = td->last_trb_seg;
		2868	inc_deq(xhci, ep_ring);
		2869	xhci_td_cleanup(xhci, td, ep_ring, td->status);
		2870	td = td_next;
2821	}	2871	}
		2872	}
		2873
		2874	if (!ep_seg) {
2822	/* HC is busted, give up! */	2875	/* HC is busted, give up! */
2823	xhci_err(xhci,	2876	xhci_err(xhci,
2824	"ERROR Transfer event TRB DMA ptr not "	2877	"ERROR Transfer event TRB DMA ptr not "
@@ -2830,9 +2883,6 @@ static int handle_tx_event(struct xhci_hcd *xhci, · 5 unmodified lines
2830	ep_trb_dma, true);	2883	ep_trb_dma, true);
2831	return -ESHUTDOWN;	2884	return -ESHUTDOWN;
2832	}	2885	}
2833
2834	skip_isoc_td(xhci, td, ep, status);
2835	goto cleanup;
2836	}	2886	}
2837	if (trb_comp_code == COMP_SHORT_PACKET)	2887	if (trb_comp_code == COMP_SHORT_PACKET)
2838	ep_ring->last_td_was_short = true;	2888	ep_ring->last_td_was_short = true;

drivers/usb/host/xhci.h+1−0

@@ -1549,6 +1549,7 @@ struct xhci_td { · 1548 unmodified lines
1549	struct xhci_segment *bounce_seg;	1549	struct xhci_segment *bounce_seg;
1550	/* actual_length of the URB has already been set */	1550	/* actual_length of the URB has already been set */
1551	bool urb_length_set;	1551	bool urb_length_set;
		1552	bool error_mid_td;
1552	unsigned int num_trbs;	1553	unsigned int num_trbs;
1553	};	1554	};
1554		1555

drivers/usb/serial/cp210x.c+1−0

@@ -146,6 +146,7 @@ static const struct usb_device_id id_table[] = { · 145 unmodified lines
146	{ USB_DEVICE(0x10C4, 0x85F8) }, /* Virtenio Preon32 */	146	{ USB_DEVICE(0x10C4, 0x85F8) }, /* Virtenio Preon32 */
147	{ USB_DEVICE(0x10C4, 0x8664) }, /* AC-Services CAN-IF */	147	{ USB_DEVICE(0x10C4, 0x8664) }, /* AC-Services CAN-IF */
148	{ USB_DEVICE(0x10C4, 0x8665) }, /* AC-Services OBD-IF */	148	{ USB_DEVICE(0x10C4, 0x8665) }, /* AC-Services OBD-IF */
		149	{ USB_DEVICE(0x10C4, 0x87ED) }, /* IMST USB-Stick for Smart Meter */
149	{ USB_DEVICE(0x10C4, 0x8856) }, /* CEL EM357 ZigBee USB Stick - LR */	150	{ USB_DEVICE(0x10C4, 0x8856) }, /* CEL EM357 ZigBee USB Stick - LR */
150	{ USB_DEVICE(0x10C4, 0x8857) }, /* CEL EM357 ZigBee USB Stick */	151	{ USB_DEVICE(0x10C4, 0x8857) }, /* CEL EM357 ZigBee USB Stick */
151	{ USB_DEVICE(0x10C4, 0x88A4) }, /* MMB Networks ZigBee USB Device */	152	{ USB_DEVICE(0x10C4, 0x88A4) }, /* MMB Networks ZigBee USB Device */

drivers/usb/serial/option.c+1−0

@@ -2269,6 +2269,7 @@ static const struct usb_device_id option_ids[] = { · 2268 unmodified lines
2269	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0111, 0xff) }, /* Fibocom FM160 (MBIM mode) */	2269	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0111, 0xff) }, /* Fibocom FM160 (MBIM mode) */
2270	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a0, 0xff) }, /* Fibocom NL668-AM/NL652-EU (laptop MBIM) */	2270	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a0, 0xff) }, /* Fibocom NL668-AM/NL652-EU (laptop MBIM) */
2271	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a2, 0xff) }, /* Fibocom FM101-GL (laptop MBIM) */	2271	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a2, 0xff) }, /* Fibocom FM101-GL (laptop MBIM) */
		2272	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a3, 0xff) }, /* Fibocom FM101-GL (laptop MBIM) */
2272	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a4, 0xff), /* Fibocom FM101-GL (laptop MBIM) */	2273	{ USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a4, 0xff), /* Fibocom FM101-GL (laptop MBIM) */
2273	.driver_info = RSVD(4) },	2274	.driver_info = RSVD(4) },
2274	{ USB_DEVICE_INTERFACE_CLASS(0x2df3, 0x9d03, 0xff) }, /* LongSung M5710 */	2275	{ USB_DEVICE_INTERFACE_CLASS(0x2df3, 0x9d03, 0xff) }, /* LongSung M5710 */

drivers/usb/serial/qcserial.c+2−0

@@ -184,6 +184,8 @@ static const struct usb_device_id id_table[] = { · 183 unmodified lines
184	{DEVICE_SWI(0x413c, 0x81d0)}, /* Dell Wireless 5819 */	184	{DEVICE_SWI(0x413c, 0x81d0)}, /* Dell Wireless 5819 */
185	{DEVICE_SWI(0x413c, 0x81d1)}, /* Dell Wireless 5818 */	185	{DEVICE_SWI(0x413c, 0x81d1)}, /* Dell Wireless 5818 */
186	{DEVICE_SWI(0x413c, 0x81d2)}, /* Dell Wireless 5818 */	186	{DEVICE_SWI(0x413c, 0x81d2)}, /* Dell Wireless 5818 */
		187	{DEVICE_SWI(0x413c, 0x8217)}, /* Dell Wireless DW5826e */
		188	{DEVICE_SWI(0x413c, 0x8218)}, /* Dell Wireless DW5826e QDL */
187		189
188	/* Huawei devices */	190	/* Huawei devices */
189	{DEVICE_HWI(0x03f0, 0x581d)}, /* HP lt4112 LTE/HSPA+ Gobi 4G Modem (Huawei me906e) */	191	{DEVICE_HWI(0x03f0, 0x581d)}, /* HP lt4112 LTE/HSPA+ Gobi 4G Modem (Huawei me906e) */

drivers/usb/typec/tcpm/tcpm.c+3−3

 		break;
 	case PORT_RESET:
 		tcpm_reset_port(port);
-		tcpm_set_cc(port, tcpm_default_state(port) == SNK_UNATTACHED ?
+		tcpm_set_cc(port, TYPEC_CC_OPEN);
-			    TYPEC_CC_RD : tcpm_rp_cc(port));
 		tcpm_set_state(port, PORT_RESET_WAIT_OFF,
 			       PD_T_ERROR_RECOVERY);
 		break;
 	if (err)
 		goto out_role_sw_put;
-	port->typec_caps.pd = port->pds[0];
+	if (port->pds)
+		port->typec_caps.pd = port->pds[0];
 	port->typec_port = typec_register_port(port->dev, &port->typec_caps);
 	if (IS_ERR(port->typec_port)) {

drivers/usb/typec/ucsi/ucsi.c+2−0

@@ -938,7 +938,9 @@ static void ucsi_handle_connector_change(struct work_struct *work) · 937 unmodified lines
938		938
939	clear_bit(EVENT_PENDING, &con->ucsi->flags);	939	clear_bit(EVENT_PENDING, &con->ucsi->flags);
940		940
		941	mutex_lock(&ucsi->ppm_lock);
941	ret = ucsi_acknowledge_connector_change(ucsi);	942	ret = ucsi_acknowledge_connector_change(ucsi);
		943	mutex_unlock(&ucsi->ppm_lock);
942	if (ret)	944	if (ret)
943	dev_err(ucsi->dev, "%s: ACK failed (%d)", __func__, ret);	945	dev_err(ucsi->dev, "%s: ACK failed (%d)", __func__, ret);
944		946

drivers/usb/typec/ucsi/ucsi_acpi.c+81−7

@@ -25,6 +25,8 @@ struct ucsi_acpi { · 24 unmodified lines
25	unsigned long flags;	25	unsigned long flags;
26	guid_t guid;	26	guid_t guid;
27	u64 cmd;	27	u64 cmd;
		28	bool dell_quirk_probed;
		29	bool dell_quirk_active;
28	};	30	};
29		31
30	static int ucsi_acpi_dsm(struct ucsi_acpi *ua, int func)	32	static int ucsi_acpi_dsm(struct ucsi_acpi *ua, int func)
@@ -73,9 +75,13 @@ static int ucsi_acpi_sync_write(struct ucsi *ucsi, unsigned int offset, · 42 unmodified lines
73	const void *val, size_t val_len)	75	const void *val, size_t val_len)
74	{	76	{
75	struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi);	77	struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi);
		78	bool ack = UCSI_COMMAND((u64 )val) == UCSI_ACK_CC_CI;
76	int ret;	79	int ret;
77		80
78	set_bit(COMMAND_PENDING, &ua->flags);	81	if (ack)
		82	set_bit(ACK_PENDING, &ua->flags);
		83	else
		84	set_bit(COMMAND_PENDING, &ua->flags);
79		85
80	ret = ucsi_acpi_async_write(ucsi, offset, val, val_len);	86	ret = ucsi_acpi_async_write(ucsi, offset, val, val_len);
81	if (ret)	87	if (ret)
@@ -85,7 +91,10 @@ static int ucsi_acpi_sync_write(struct ucsi *ucsi, unsigned int offset, · 3 unmodified lines
85	ret = -ETIMEDOUT;	91	ret = -ETIMEDOUT;
86		92
87	out_clear_bit:	93	out_clear_bit:
88	clear_bit(COMMAND_PENDING, &ua->flags);	94	if (ack)
		95	clear_bit(ACK_PENDING, &ua->flags);
		96	else
		97	clear_bit(COMMAND_PENDING, &ua->flags);
89		98
90	return ret;	99	return ret;
91	}	100	}
@@ -119,12 +128,73 @@ static const struct ucsi_operations ucsi_zenbook_ops = { · 27 unmodified lines
119	.async_write = ucsi_acpi_async_write	128	.async_write = ucsi_acpi_async_write
120	};	129	};
121		130
122	static const struct dmi_system_id zenbook_dmi_id[] = {	131	/*
		132	* Some Dell laptops expect that an ACK command with the
		133	* UCSI_ACK_CONNECTOR_CHANGE bit set is followed by a (separate)
		134	* ACK command that only has the UCSI_ACK_COMMAND_COMPLETE bit set.
		135	* If this is not done events are not delivered to OSPM and
		136	* subsequent commands will timeout.
		137	*/
		138	static int
		139	ucsi_dell_sync_write(struct ucsi *ucsi, unsigned int offset,
		140	const void *val, size_t val_len)
		141	{
		142	struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi);
		143	u64 cmd = (u64 )val, ack = 0;
		144	int ret;
		145
		146	if (UCSI_COMMAND(cmd) == UCSI_ACK_CC_CI &&
		147	cmd & UCSI_ACK_CONNECTOR_CHANGE)
		148	ack = UCSI_ACK_CC_CI \| UCSI_ACK_COMMAND_COMPLETE;
		149
		150	ret = ucsi_acpi_sync_write(ucsi, offset, val, val_len);
		151	if (ret != 0)
		152	return ret;
		153	if (ack == 0)
		154	return ret;
		155
		156	if (!ua->dell_quirk_probed) {
		157	ua->dell_quirk_probed = true;
		158
		159	cmd = UCSI_GET_CAPABILITY;
		160	ret = ucsi_acpi_sync_write(ucsi, UCSI_CONTROL, &cmd,
		161	sizeof(cmd));
		162	if (ret == 0)
		163	return ucsi_acpi_sync_write(ucsi, UCSI_CONTROL,
		164	&ack, sizeof(ack));
		165	if (ret != -ETIMEDOUT)
		166	return ret;
		167
		168	ua->dell_quirk_active = true;
		169	dev_err(ua->dev, "Firmware bug: Additional ACK required after ACKing a connector change.\n");
		170	dev_err(ua->dev, "Firmware bug: Enabling workaround\n");
		171	}
		172
		173	if (!ua->dell_quirk_active)
		174	return ret;
		175
		176	return ucsi_acpi_sync_write(ucsi, UCSI_CONTROL, &ack, sizeof(ack));
		177	}
		178
		179	static const struct ucsi_operations ucsi_dell_ops = {
		180	.read = ucsi_acpi_read,
		181	.sync_write = ucsi_dell_sync_write,
		182	.async_write = ucsi_acpi_async_write
		183	};
		184
		185	static const struct dmi_system_id ucsi_acpi_quirks[] = {
123	{	186	{
124	.matches = {	187	.matches = {
125	DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),	188	DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
126	DMI_MATCH(DMI_PRODUCT_NAME, "ZenBook UX325UA_UM325UA"),	189	DMI_MATCH(DMI_PRODUCT_NAME, "ZenBook UX325UA_UM325UA"),
127	},	190	},
		191	.driver_data = (void *)&ucsi_zenbook_ops,
		192	},
		193	{
		194	.matches = {
		195	DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
		196	},
		197	.driver_data = (void *)&ucsi_dell_ops,
128	},	198	},
129	{ }	199	{ }
130	};	200	};
@@ -142,8 +212,10 @@ static void ucsi_acpi_notify(acpi_handle handle, u32 event, void *data) · 11 unmodified lines
142	if (UCSI_CCI_CONNECTOR(cci))	212	if (UCSI_CCI_CONNECTOR(cci))
143	ucsi_connector_change(ua->ucsi, UCSI_CCI_CONNECTOR(cci));	213	ucsi_connector_change(ua->ucsi, UCSI_CCI_CONNECTOR(cci));
144		214
145	if (test_bit(COMMAND_PENDING, &ua->flags) &&	215	if (cci & UCSI_CCI_ACK_COMPLETE && test_bit(ACK_PENDING, &ua->flags))
146	cci & (UCSI_CCI_ACK_COMPLETE \| UCSI_CCI_COMMAND_COMPLETE))	216	complete(&ua->complete);
		217	if (cci & UCSI_CCI_COMMAND_COMPLETE &&
		218	test_bit(COMMAND_PENDING, &ua->flags))
147	complete(&ua->complete);	219	complete(&ua->complete);
148	}	220	}
149		221
@@ -151,6 +223,7 @@ static int ucsi_acpi_probe(struct platform_device *pdev) · 1 unmodified line
151	{	223	{
152	struct acpi_device *adev = ACPI_COMPANION(&pdev->dev);	224	struct acpi_device *adev = ACPI_COMPANION(&pdev->dev);
153	const struct ucsi_operations *ops = &ucsi_acpi_ops;	225	const struct ucsi_operations *ops = &ucsi_acpi_ops;
		226	const struct dmi_system_id *id;
154	struct ucsi_acpi *ua;	227	struct ucsi_acpi *ua;
155	struct resource *res;	228	struct resource *res;
156	acpi_status status;	229	acpi_status status;
@@ -180,8 +253,9 @@ static int ucsi_acpi_probe(struct platform_device *pdev) · 23 unmodified lines
180	init_completion(&ua->complete);	253	init_completion(&ua->complete);
181	ua->dev = &pdev->dev;	254	ua->dev = &pdev->dev;
182		255
183	if (dmi_check_system(zenbook_dmi_id))	256	id = dmi_first_match(ucsi_acpi_quirks);
184	ops = &ucsi_zenbook_ops;	257	if (id)
		258	ops = id->driver_data;
185		259
186	ua->ucsi = ucsi_create(&pdev->dev, ops);	260	ua->ucsi = ucsi_create(&pdev->dev, ops);
187	if (IS_ERR(ua->ucsi))	261	if (IS_ERR(ua->ucsi))

fs/bcachefs/fs-ioctl.c+2−2

 	if (IS_ERR(victim))
 		return PTR_ERR(victim);
+	dir = d_inode(path.dentry);
 	if (victim->d_sb->s_fs_info != c) {
 		ret = -EXDEV;
 		goto err;
 		ret = -ENOENT;
 		goto err;
 	}
-	dir = d_inode(path.dentry);
 	ret = __bch2_unlink(dir, victim, true);
 	if (!ret) {
 		fsnotify_rmdir(dir, victim);
 		d_delete(victim);
 	}
-	inode_unlock(dir);
 err:
+	inode_unlock(dir);
 	dput(victim);
 	path_put(&path);
 	return ret;

fs/bcachefs/mean_and_variance.h+1−1

@@ -17,7 +17,7 @@ · 16 unmodified lines
17	* Rust and rustc has issues with u128.	17	* Rust and rustc has issues with u128.
18	*/	18	*/
19		19
20	#if defined(__SIZEOF_INT128__) && defined(__KERNEL__)	20	#if defined(__SIZEOF_INT128__) && defined(__KERNEL__) && !defined(CONFIG_PARISC)
21		21
22	typedef struct {	22	typedef struct {
23	unsigned __int128 v;	23	unsigned __int128 v;

fs/bcachefs/thread_with_file.c+1−1

 	if (ret)
 		goto err;
-	fd_install(fd, file);
 	get_task_struct(thr->task);
 	wake_up_process(thr->task);
+	fd_install(fd, file);
 	return fd;
 err:
 	if (fd >= 0)

fs/bcachefs/util.c+3−2

 		bch2_quantiles_update(&stats->quantiles, duration);
 	}
-	if (time_after64(end, stats->last_event)) {
+	if (stats->last_event && time_after64(end, stats->last_event)) {
 		freq = end - stats->last_event;
 		mean_and_variance_update(&stats->freq_stats, freq);
 		mean_and_variance_weighted_update(&stats->freq_stats_weighted, freq);
 		stats->max_freq = max(stats->max_freq, freq);
 		stats->min_freq = min(stats->min_freq, freq);
-		stats->last_event = end;
 	}
+	stats->last_event = end;
 }
 static void __bch2_time_stats_clear_buffer(struct bch2_time_stats *stats,

fs/btrfs/disk-io.c+11−2

@@ -1336,8 +1336,17 @@ static struct btrfs_root btrfs_get_root_ref(struct btrfs_fs_info fs_info, · 1335 unmodified lines
1336	again:	1336	again:
1337	root = btrfs_lookup_fs_root(fs_info, objectid);	1337	root = btrfs_lookup_fs_root(fs_info, objectid);
1338	if (root) {	1338	if (root) {
1339	/* Shouldn't get preallocated anon_dev for cached roots */	1339	/*
1340	ASSERT(!anon_dev);	1340	* Some other caller may have read out the newly inserted
		1341	* subvolume already (for things like backref walk etc). Not
		1342	* that common but still possible. In that case, we just need
		1343	* to free the anon_dev.
		1344	*/
		1345	if (unlikely(anon_dev)) {
		1346	free_anon_bdev(anon_dev);
		1347	anon_dev = 0;
		1348	}
		1349
1341	if (check_ref && btrfs_root_refs(&root->root_item) == 0) {	1350	if (check_ref && btrfs_root_refs(&root->root_item) == 0) {
1342	btrfs_put_root(root);	1351	btrfs_put_root(root);
1343	return ERR_PTR(-ENOENT);	1352	return ERR_PTR(-ENOENT);

fs/btrfs/ioctl.c+5−0

 		goto out;
 	}
+	if (sa->create && is_fstree(sa->qgroupid)) {
+		ret = -EINVAL;
+		goto out;
+	}
 	trans = btrfs_join_transaction(root);
 	if (IS_ERR(trans)) {
 		ret = PTR_ERR(trans);

fs/btrfs/qgroup.c+14−0

@@ -1736,6 +1736,15 @@ out: · 1735 unmodified lines
1736	return ret;	1736	return ret;
1737	}	1737	}
1738		1738
		1739	static bool qgroup_has_usage(struct btrfs_qgroup *qgroup)
		1740	{
		1741	return (qgroup->rfer > 0 \|\| qgroup->rfer_cmpr > 0 \|\|
		1742	qgroup->excl > 0 \|\| qgroup->excl_cmpr > 0 \|\|
		1743	qgroup->rsv.values[BTRFS_QGROUP_RSV_DATA] > 0 \|\|
		1744	qgroup->rsv.values[BTRFS_QGROUP_RSV_META_PREALLOC] > 0 \|\|
		1745	qgroup->rsv.values[BTRFS_QGROUP_RSV_META_PERTRANS] > 0);
		1746	}
		1747
1739	int btrfs_remove_qgroup(struct btrfs_trans_handle *trans, u64 qgroupid)	1748	int btrfs_remove_qgroup(struct btrfs_trans_handle *trans, u64 qgroupid)
1740	{	1749	{
1741	struct btrfs_fs_info *fs_info = trans->fs_info;	1750	struct btrfs_fs_info *fs_info = trans->fs_info;
@@ -1755,6 +1764,11 @@ int btrfs_remove_qgroup(struct btrfs_trans_handle *trans, u64 qgroupid) · 13 unmodified lines
1755	goto out;	1764	goto out;
1756	}	1765	}
1757		1766
		1767	if (is_fstree(qgroupid) && qgroup_has_usage(qgroup)) {
		1768	ret = -EBUSY;
		1769	goto out;
		1770	}
		1771
1758	/* Check if there are no children of this qgroup */	1772	/* Check if there are no children of this qgroup */
1759	if (!list_empty(&qgroup->members)) {	1773	if (!list_empty(&qgroup->members)) {
1760	ret = -EBUSY;	1774	ret = -EBUSY;

fs/btrfs/send.c+1−1

@@ -8111,7 +8111,7 @@ long btrfs_ioctl_send(struct inode inode, struct btrfs_ioctl_send_args arg) · 8110 unmodified lines
8111	}	8111	}
8112		8112
8113	if (arg->flags & ~BTRFS_SEND_FLAG_MASK) {	8113	if (arg->flags & ~BTRFS_SEND_FLAG_MASK) {
8114	ret = -EINVAL;	8114	ret = -EOPNOTSUPP;
8115	goto out;	8115	goto out;
8116	}	8116	}
8117		8117

fs/ext4/ext4.h+5−3

 #define EXT4_MAP_MAPPED		BIT(BH_Mapped)
 #define EXT4_MAP_UNWRITTEN	BIT(BH_Unwritten)
 #define EXT4_MAP_BOUNDARY	BIT(BH_Boundary)
+#define EXT4_MAP_DELAYED	BIT(BH_Delay)
 #define EXT4_MAP_FLAGS		(EXT4_MAP_NEW | EXT4_MAP_MAPPED |\
-				 EXT4_MAP_UNWRITTEN | EXT4_MAP_BOUNDARY)
+				 EXT4_MAP_UNWRITTEN | EXT4_MAP_BOUNDARY |\
+				 EXT4_MAP_DELAYED)
 struct ext4_map_blocks {
 	ext4_fsblk_t m_pblk;
 extern const struct seq_operations ext4_mb_seq_structs_summary_ops;
 extern int ext4_seq_mb_stats_show(struct seq_file *seq, void *offset);
 extern int ext4_mb_init(struct super_block *);
-extern int ext4_mb_release(struct super_block *);
+extern void ext4_mb_release(struct super_block *);
 extern ext4_fsblk_t ext4_mb_new_blocks(handle_t *,
 				struct ext4_allocation_request *, int *);
-extern void ext4_discard_preallocations(struct inode *, unsigned int);
+extern void ext4_discard_preallocations(struct inode *);
 extern int __init ext4_init_mballoc(void);
 extern void ext4_exit_mballoc(void);
 extern ext4_group_t ext4_mb_prefetch(struct super_block *sb,

fs/ext4/extents.c+78−46

 	 * i_rwsem. So we can safely drop the i_data_sem here.
 	 */
 	BUG_ON(EXT4_JOURNAL(inode) == NULL);
-	ext4_discard_preallocations(inode, 0);
+	ext4_discard_preallocations(inode);
 	up_write(&EXT4_I(inode)->i_data_sem);
 	*dropped = 1;
 	return 0;
 /*
- * ext4_ext_determine_hole - determine hole around given block
+ * ext4_ext_find_hole - find hole around given block according to the given path
  * @inode:	inode we lookup in
  * @path:	path in extent tree to @lblk
  * @lblk:	pointer to logical block around which we want to determine hole
  * The function returns the length of a hole starting at @lblk. We update @lblk
  * to the beginning of the hole if we managed to find it.
  */
-static ext4_lblk_t ext4_ext_determine_hole(struct inode *inode,
+static ext4_lblk_t ext4_ext_find_hole(struct inode *inode,
-					   struct ext4_ext_path *path,
+				      struct ext4_ext_path *path,
-					   ext4_lblk_t *lblk)
+				      ext4_lblk_t *lblk)
 {
 	int depth = ext_depth(inode);
 	struct ext4_extent *ex;
 	return len;
 }
-/*
- * ext4_ext_put_gap_in_cache:
- * calculate boundaries of the gap that the requested block fits into
- * and cache this gap
- */
-static void
-ext4_ext_put_gap_in_cache(struct inode *inode, ext4_lblk_t hole_start,
-			  ext4_lblk_t hole_len)
-{
-	struct extent_status es;
-	ext4_es_find_extent_range(inode, &ext4_es_is_delayed, hole_start,
-				  hole_start + hole_len - 1, &es);
-	if (es.es_len) {
-		/* There's delayed extent containing lblock? */
-		if (es.es_lblk <= hole_start)
-			return;
-		hole_len = min(es.es_lblk - hole_start, hole_len);
-	}
-	ext_debug(inode, " -> %u:%u\n", hole_start, hole_len);
-	ext4_es_insert_extent(inode, hole_start, hole_len, ~0,
-			      EXTENT_STATUS_HOLE);
-}
 /*
  * ext4_ext_rm_idx:
  * removes index from the index block.
 	return 0;
 }
+/*
+ * Determine hole length around the given logical block, first try to
+ * locate and expand the hole from the given @path, and then adjust it
+ * if it's partially or completely converted to delayed extents, insert
+ * it into the extent cache tree if it's indeed a hole, finally return
+ * the length of the determined extent.
+ */
+static ext4_lblk_t ext4_ext_determine_insert_hole(struct inode *inode,
+						  struct ext4_ext_path *path,
+						  ext4_lblk_t lblk)
+{
+	ext4_lblk_t hole_start, len;
+	struct extent_status es;
+	hole_start = lblk;
+	len = ext4_ext_find_hole(inode, path, &hole_start);
+again:
+	ext4_es_find_extent_range(inode, &ext4_es_is_delayed, hole_start,
+				  hole_start + len - 1, &es);
+	if (!es.es_len)
+		goto insert_hole;
+	/*
+	 * There's a delalloc extent in the hole, handle it if the delalloc
+	 * extent is in front of, behind and straddle the queried range.
+	 */
+	if (lblk >= es.es_lblk + es.es_len) {
+		/*
+		 * The delalloc extent is in front of the queried range,
+		 * find again from the queried start block.
+		 */
+		len -= lblk - hole_start;
+		hole_start = lblk;
+		goto again;
+	} else if (in_range(lblk, es.es_lblk, es.es_len)) {
+		/*
+		 * The delalloc extent containing lblk, it must have been
+		 * added after ext4_map_blocks() checked the extent status
+		 * tree so we are not holding i_rwsem and delalloc info is
+		 * only stabilized by i_data_sem we are going to release
+		 * soon. Don't modify the extent status tree and report
+		 * extent as a hole, just adjust the length to the delalloc
+		 * extent's after lblk.
+		 */
+		len = es.es_lblk + es.es_len - lblk;
+		return len;
+	} else {
+		/*
+		 * The delalloc extent is partially or completely behind
+		 * the queried range, update hole length until the
+		 * beginning of the delalloc extent.
+		 */
+		len = min(es.es_lblk - hole_start, len);
+	}
+insert_hole:
+	/* Put just found gap into cache to speed up subsequent requests */
+	ext_debug(inode, " -> %u:%u\n", hole_start, len);
+	ext4_es_insert_extent(inode, hole_start, len, ~0, EXTENT_STATUS_HOLE);
+	/* Update hole_len to reflect hole size after lblk */
+	if (hole_start != lblk)
+		len -= lblk - hole_start;
+	return len;
+}
 /*
  * Block allocation/map/preallocation routine for extents based files
 	 * we couldn't try to create block if create flag is zero
 	 */
 	if ((flags & EXT4_GET_BLOCKS_CREATE) == 0) {
-		ext4_lblk_t hole_start, hole_len;
+		ext4_lblk_t len;
-		hole_start = map->m_lblk;
+		len = ext4_ext_determine_insert_hole(inode, path, map->m_lblk);
-		hole_len = ext4_ext_determine_hole(inode, path, &hole_start);
-		/*
-		 * put just found gap into cache to speed up
-		 * subsequent requests
-		 */
-		ext4_ext_put_gap_in_cache(inode, hole_start, hole_len);
-		/* Update hole_len to reflect hole size after map->m_lblk */
-		if (hole_start != map->m_lblk)
-			hole_len -= map->m_lblk - hole_start;
 		map->m_pblk = 0;
-		map->m_len = min_t(unsigned int, map->m_len, hole_len);
+		map->m_len = min_t(unsigned int, map->m_len, len);
 		goto out;
 	}
 			 * not a good idea to call discard here directly,
 			 * but otherwise we'd need to call it every free().
 			 */
-			ext4_discard_preallocations(inode, 0);
+			ext4_discard_preallocations(inode);
 			if (flags & EXT4_GET_BLOCKS_DELALLOC_RESERVE)
 				fb_flags = EXT4_FREE_BLOCKS_NO_QUOT_UPDATE;
 			ext4_free_blocks(handle, inode, NULL, newblock,
 	ext4_fc_mark_ineligible(sb, EXT4_FC_REASON_FALLOC_RANGE, handle);
 	down_write(&EXT4_I(inode)->i_data_sem);
-	ext4_discard_preallocations(inode, 0);
+	ext4_discard_preallocations(inode);
 	ext4_es_remove_extent(inode, punch_start, EXT_MAX_BLOCKS - punch_start);
 	ret = ext4_ext_remove_space(inode, punch_start, punch_stop - 1);
 		up_write(&EXT4_I(inode)->i_data_sem);
 		goto out_stop;
 	}
-	ext4_discard_preallocations(inode, 0);
+	ext4_discard_preallocations(inode);
 	ret = ext4_ext_shift_extents(inode, handle, punch_stop,
 				     punch_stop - punch_start, SHIFT_LEFT);
 		goto out_stop;
 	down_write(&EXT4_I(inode)->i_data_sem);
-	ext4_discard_preallocations(inode, 0);
+	ext4_discard_preallocations(inode);
 	path = ext4_find_extent(inode, offset_lblk, NULL, 0);
 	if (IS_ERR(path)) {

fs/ext4/file.c+1−1

@@ -174,7 +174,7 @@ static int ext4_release_file(struct inode inode, struct file filp) · 173 unmodified lines
174	(atomic_read(&inode->i_writecount) == 1) &&	174	(atomic_read(&inode->i_writecount) == 1) &&
175	!EXT4_I(inode)->i_reserved_data_blocks) {	175	!EXT4_I(inode)->i_reserved_data_blocks) {
176	down_write(&EXT4_I(inode)->i_data_sem);	176	down_write(&EXT4_I(inode)->i_data_sem);
177	ext4_discard_preallocations(inode, 0);	177	ext4_discard_preallocations(inode);
178	up_write(&EXT4_I(inode)->i_data_sem);	178	up_write(&EXT4_I(inode)->i_data_sem);
179	}	179	}
180	if (is_dx(inode) && filp->private_data)	180	if (is_dx(inode) && filp->private_data)

fs/ext4/indirect.c+1−1

@@ -714,7 +714,7 @@ static int ext4_ind_trunc_restart_fn(handle_t handle, struct inode inode, · 713 unmodified lines
714	* i_rwsem. So we can safely drop the i_data_sem here.	714	* i_rwsem. So we can safely drop the i_data_sem here.
715	*/	715	*/
716	BUG_ON(EXT4_JOURNAL(inode) == NULL);	716	BUG_ON(EXT4_JOURNAL(inode) == NULL);
717	ext4_discard_preallocations(inode, 0);	717	ext4_discard_preallocations(inode);
718	up_write(&EXT4_I(inode)->i_data_sem);	718	up_write(&EXT4_I(inode)->i_data_sem);
719	*dropped = 1;	719	*dropped = 1;
720	return 0;	720	return 0;

fs/ext4/inode.c+30−60

@@ -371,7 +371,7 @@ void ext4_da_update_reserve_space(struct inode *inode, · 370 unmodified lines
371	*/	371	*/
372	if ((ei->i_reserved_data_blocks == 0) &&	372	if ((ei->i_reserved_data_blocks == 0) &&
373	!inode_is_open_for_write(inode))	373	!inode_is_open_for_write(inode))
374	ext4_discard_preallocations(inode, 0);	374	ext4_discard_preallocations(inode);
375	}	375	}
376		376
377	static int __check_block_validity(struct inode inode, const char func,	377	static int __check_block_validity(struct inode inode, const char func,
@@ -515,6 +515,8 @@ int ext4_map_blocks(handle_t handle, struct inode inode, · 137 unmodified lines
515	map->m_len = retval;	515	map->m_len = retval;
516	} else if (ext4_es_is_delayed(&es) \|\| ext4_es_is_hole(&es)) {	516	} else if (ext4_es_is_delayed(&es) \|\| ext4_es_is_hole(&es)) {
517	map->m_pblk = 0;	517	map->m_pblk = 0;
		518	map->m_flags \|= ext4_es_is_delayed(&es) ?
		519	EXT4_MAP_DELAYED : 0;
518	retval = es.es_len - (map->m_lblk - es.es_lblk);	520	retval = es.es_len - (map->m_lblk - es.es_lblk);
519	if (retval > map->m_len)	521	if (retval > map->m_len)
520	retval = map->m_len;	522	retval = map->m_len;
@@ -1703,11 +1705,8 @@ static int ext4_da_map_blocks(struct inode *inode, sector_t iblock, · 1182 unmodified lines
1703		1705
1704	/* Lookup extent status tree firstly */	1706	/* Lookup extent status tree firstly */
1705	if (ext4_es_lookup_extent(inode, iblock, NULL, &es)) {	1707	if (ext4_es_lookup_extent(inode, iblock, NULL, &es)) {
1706	if (ext4_es_is_hole(&es)) {	1708	if (ext4_es_is_hole(&es))
1707	retval = 0;
1708	down_read(&EXT4_I(inode)->i_data_sem);
1709	goto add_delayed;	1709	goto add_delayed;
1710	}
1711		1710
1712	/*	1711	/*
1713	* Delayed extent could be allocated by fallocate.	1712	* Delayed extent could be allocated by fallocate.
@@ -1749,26 +1748,11 @@ static int ext4_da_map_blocks(struct inode *inode, sector_t iblock, · 35 unmodified lines
1749	retval = ext4_ext_map_blocks(NULL, inode, map, 0);	1748	retval = ext4_ext_map_blocks(NULL, inode, map, 0);
1750	else	1749	else
1751	retval = ext4_ind_map_blocks(NULL, inode, map, 0);	1750	retval = ext4_ind_map_blocks(NULL, inode, map, 0);
1752		1751	if (retval < 0) {
1753	add_delayed:	1752	up_read(&EXT4_I(inode)->i_data_sem);
1754	if (retval == 0) {	1753	return retval;
1755	int ret;	1754	}
1756		1755	if (retval > 0) {
1757	/*
1758	* XXX: __block_prepare_write() unmaps passed block,
1759	* is it OK?
1760	*/
1761
1762	ret = ext4_insert_delayed_block(inode, map->m_lblk);
1763	if (ret != 0) {
1764	retval = ret;
1765	goto out_unlock;
1766	}
1767
1768	map_bh(bh, inode->i_sb, invalid_block);
1769	set_buffer_new(bh);
1770	set_buffer_delay(bh);
1771	} else if (retval > 0) {
1772	unsigned int status;	1756	unsigned int status;
1773		1757
1774	if (unlikely(retval != map->m_len)) {	1758	if (unlikely(retval != map->m_len)) {
@@ -1783,11 +1767,21 @@ add_delayed: · 8 unmodified lines
1783	EXTENT_STATUS_UNWRITTEN : EXTENT_STATUS_WRITTEN;	1767	EXTENT_STATUS_UNWRITTEN : EXTENT_STATUS_WRITTEN;
1784	ext4_es_insert_extent(inode, map->m_lblk, map->m_len,	1768	ext4_es_insert_extent(inode, map->m_lblk, map->m_len,
1785	map->m_pblk, status);	1769	map->m_pblk, status);
		1770	up_read(&EXT4_I(inode)->i_data_sem);
		1771	return retval;
1786	}	1772	}
		1773	up_read(&EXT4_I(inode)->i_data_sem);
1787		1774
1788	out_unlock:	1775	add_delayed:
1789	up_read((&EXT4_I(inode)->i_data_sem));	1776	down_write(&EXT4_I(inode)->i_data_sem);
		1777	retval = ext4_insert_delayed_block(inode, map->m_lblk);
		1778	up_write(&EXT4_I(inode)->i_data_sem);
		1779	if (retval)
		1780	return retval;
1790		1781
		1782	map_bh(bh, inode->i_sb, invalid_block);
		1783	set_buffer_new(bh);
		1784	set_buffer_delay(bh);
1791	return retval;	1785	return retval;
1792	}	1786	}
1793		1787
@@ -3268,6 +3262,9 @@ static void ext4_set_iomap(struct inode inode, struct iomap iomap, · 1474 unmodified lines
3268	iomap->addr = (u64) map->m_pblk << blkbits;	3262	iomap->addr = (u64) map->m_pblk << blkbits;
3269	if (flags & IOMAP_DAX)	3263	if (flags & IOMAP_DAX)
3270	iomap->addr += EXT4_SB(inode->i_sb)->s_dax_part_off;	3264	iomap->addr += EXT4_SB(inode->i_sb)->s_dax_part_off;
		3265	} else if (map->m_flags & EXT4_MAP_DELAYED) {
		3266	iomap->type = IOMAP_DELALLOC;
		3267	iomap->addr = IOMAP_NULL_ADDR;
3271	} else {	3268	} else {
3272	iomap->type = IOMAP_HOLE;	3269	iomap->type = IOMAP_HOLE;
3273	iomap->addr = IOMAP_NULL_ADDR;	3270	iomap->addr = IOMAP_NULL_ADDR;
@@ -3430,35 +3427,11 @@ const struct iomap_ops ext4_iomap_overwrite_ops = { · 156 unmodified lines
3430	.iomap_end = ext4_iomap_end,	3427	.iomap_end = ext4_iomap_end,
3431	};	3428	};
3432		3429
3433	static bool ext4_iomap_is_delalloc(struct inode *inode,
3434	struct ext4_map_blocks *map)
3435	{
3436	struct extent_status es;
3437	ext4_lblk_t offset = 0, end = map->m_lblk + map->m_len - 1;
3438
3439	ext4_es_find_extent_range(inode, &ext4_es_is_delayed,
3440	map->m_lblk, end, &es);
3441
3442	if (!es.es_len \|\| es.es_lblk > end)
3443	return false;
3444
3445	if (es.es_lblk > map->m_lblk) {
3446	map->m_len = es.es_lblk - map->m_lblk;
3447	return false;
3448	}
3449
3450	offset = map->m_lblk - es.es_lblk;
3451	map->m_len = es.es_len - offset;
3452
3453	return true;
3454	}
3455
3456	static int ext4_iomap_begin_report(struct inode *inode, loff_t offset,	3430	static int ext4_iomap_begin_report(struct inode *inode, loff_t offset,
3457	loff_t length, unsigned int flags,	3431	loff_t length, unsigned int flags,
3458	struct iomap iomap, struct iomap srcmap)	3432	struct iomap iomap, struct iomap srcmap)
3459	{	3433	{
3460	int ret;	3434	int ret;
3461	bool delalloc = false;
3462	struct ext4_map_blocks map;	3435	struct ext4_map_blocks map;
3463	u8 blkbits = inode->i_blkbits;	3436	u8 blkbits = inode->i_blkbits;
3464		3437
@@ -3499,13 +3472,8 @@ static int ext4_iomap_begin_report(struct inode *inode, loff_t offset, · 34 unmodified lines
3499	ret = ext4_map_blocks(NULL, inode, &map, 0);	3472	ret = ext4_map_blocks(NULL, inode, &map, 0);
3500	if (ret < 0)	3473	if (ret < 0)
3501	return ret;	3474	return ret;
3502	if (ret == 0)
3503	delalloc = ext4_iomap_is_delalloc(inode, &map);
3504
3505	set_iomap:	3475	set_iomap:
3506	ext4_set_iomap(inode, iomap, &map, offset, length, flags);	3476	ext4_set_iomap(inode, iomap, &map, offset, length, flags);
3507	if (delalloc && iomap->type == IOMAP_HOLE)
3508	iomap->type = IOMAP_DELALLOC;
3509		3477
3510	return 0;	3478	return 0;
3511	}	3479	}
@@ -4015,12 +3983,12 @@ int ext4_punch_hole(struct file *file, loff_t offset, loff_t length) · 503 unmodified lines
4015		3983
4016	/* If there are blocks to remove, do it */	3984	/* If there are blocks to remove, do it */
4017	if (stop_block > first_block) {	3985	if (stop_block > first_block) {
		3986	ext4_lblk_t hole_len = stop_block - first_block;
4018		3987
4019	down_write(&EXT4_I(inode)->i_data_sem);	3988	down_write(&EXT4_I(inode)->i_data_sem);
4020	ext4_discard_preallocations(inode, 0);	3989	ext4_discard_preallocations(inode);
4021		3990
4022	ext4_es_remove_extent(inode, first_block,	3991	ext4_es_remove_extent(inode, first_block, hole_len);
4023	stop_block - first_block);
4024		3992
4025	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))	3993	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))
4026	ret = ext4_ext_remove_space(inode, first_block,	3994	ret = ext4_ext_remove_space(inode, first_block,
@@ -4029,6 +3997,8 @@ int ext4_punch_hole(struct file *file, loff_t offset, loff_t length) · 2 unmodified lines
4029	ret = ext4_ind_remove_space(handle, inode, first_block,	3997	ret = ext4_ind_remove_space(handle, inode, first_block,
4030	stop_block);	3998	stop_block);
4031		3999
		4000	ext4_es_insert_extent(inode, first_block, hole_len, ~0,
		4001	EXTENT_STATUS_HOLE);
4032	up_write(&EXT4_I(inode)->i_data_sem);	4002	up_write(&EXT4_I(inode)->i_data_sem);
4033	}	4003	}
4034	ext4_fc_track_range(handle, inode, first_block, stop_block);	4004	ext4_fc_track_range(handle, inode, first_block, stop_block);
@@ -4170,7 +4140,7 @@ int ext4_truncate(struct inode *inode) · 135 unmodified lines
4170		4140
4171	down_write(&EXT4_I(inode)->i_data_sem);	4141	down_write(&EXT4_I(inode)->i_data_sem);
4172		4142
4173	ext4_discard_preallocations(inode, 0);	4143	ext4_discard_preallocations(inode);
4174		4144
4175	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))	4145	if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))
4176	err = ext4_ext_truncate(handle, inode);	4146	err = ext4_ext_truncate(handle, inode);

fs/ext4/ioctl.c+1−1

@@ -467,7 +467,7 @@ static long swap_inode_boot_loader(struct super_block *sb, · 466 unmodified lines
467	ext4_reset_inode_seed(inode);	467	ext4_reset_inode_seed(inode);
468	ext4_reset_inode_seed(inode_bl);	468	ext4_reset_inode_seed(inode_bl);
469		469
470	ext4_discard_preallocations(inode, 0);	470	ext4_discard_preallocations(inode);
471		471
472	err = ext4_mark_inode_dirty(handle, inode);	472	err = ext4_mark_inode_dirty(handle, inode);
473	if (err < 0) {	473	if (err < 0) {

fs/ext4/mballoc.c+78−62

 			blocknr = ext4_group_first_block_no(sb, e4b->bd_group);
 			blocknr += EXT4_C2B(EXT4_SB(sb), first + i);
+			ext4_mark_group_bitmap_corrupted(sb, e4b->bd_group,
+					EXT4_GROUP_INFO_BBITMAP_CORRUPT);
 			ext4_grp_locked_error(sb, e4b->bd_group,
 					      inode ? inode->i_ino : 0,
 					      blocknr,
 					      "freeing block already freed "
 					      "(bit %u)",
 					      first + i);
-			ext4_mark_group_bitmap_corrupted(sb, e4b->bd_group,
-					EXT4_GROUP_INFO_BBITMAP_CORRUPT);
 		}
 		mb_clear_bit(first + i, e4b->bd_info->bb_bitmap);
 	}
 	}								\
 } while (0)
-static int __mb_check_buddy(struct ext4_buddy *e4b, char *file,
+static void __mb_check_buddy(struct ext4_buddy *e4b, char *file,
 				const char *function, int line)
 {
 	struct super_block *sb = e4b->bd_sb;
 	void *buddy2;
 	if (e4b->bd_info->bb_check_counter++ % 10)
-		return 0;
+		return;
 	while (order > 1) {
 		buddy = mb_find_buddy(e4b, order, &max);
 	grp = ext4_get_group_info(sb, e4b->bd_group);
 	if (!grp)
-		return NULL;
+		return;
 	list_for_each(cur, &grp->bb_prealloc_list) {
 		ext4_group_t groupnr;
 		struct ext4_prealloc_space *pa;
 		for (i = 0; i < pa->pa_len; i++)
 			MB_CHECK_ASSERT(mb_test_bit(k + i, buddy));
 	}
-	return 0;
 }
 #undef MB_CHECK_ASSERT
 #define mb_check_buddy(e4b) __mb_check_buddy(e4b,	\
 	struct ext4_sb_info *sbi = EXT4_SB(sb);
 	int new_order;
-	if (!test_opt2(sb, MB_OPTIMIZE_SCAN) || grp->bb_free == 0)
+	if (!test_opt2(sb, MB_OPTIMIZE_SCAN) || grp->bb_fragments == 0)
 		return;
 	new_order = mb_avg_fragment_size_order(sb,
  * cr level needs an update.
  */
 static void ext4_mb_choose_next_group_p2_aligned(struct ext4_allocation_context *ac,
-			enum criteria *new_cr, ext4_group_t *group, ext4_group_t ngroups)
+			enum criteria *new_cr, ext4_group_t *group)
 {
 	struct ext4_sb_info *sbi = EXT4_SB(ac->ac_sb);
 	struct ext4_group_info *iter;
  * order. Updates *new_cr if cr level needs an update.
  */
 static void ext4_mb_choose_next_group_goal_fast(struct ext4_allocation_context *ac,
-		enum criteria *new_cr, ext4_group_t *group, ext4_group_t ngroups)
+		enum criteria *new_cr, ext4_group_t *group)
 {
 	struct ext4_sb_info *sbi = EXT4_SB(ac->ac_sb);
 	struct ext4_group_info *grp = NULL;
  * much and fall to CR_GOAL_LEN_SLOW in that case.
  */
 static void ext4_mb_choose_next_group_best_avail(struct ext4_allocation_context *ac,
-		enum criteria *new_cr, ext4_group_t *group, ext4_group_t ngroups)
+		enum criteria *new_cr, ext4_group_t *group)
 {
 	struct ext4_sb_info *sbi = EXT4_SB(ac->ac_sb);
 	struct ext4_group_info *grp = NULL;
 	}
 	if (*new_cr == CR_POWER2_ALIGNED) {
-		ext4_mb_choose_next_group_p2_aligned(ac, new_cr, group, ngroups);
+		ext4_mb_choose_next_group_p2_aligned(ac, new_cr, group);
 	} else if (*new_cr == CR_GOAL_LEN_FAST) {
-		ext4_mb_choose_next_group_goal_fast(ac, new_cr, group, ngroups);
+		ext4_mb_choose_next_group_goal_fast(ac, new_cr, group);
 	} else if (*new_cr == CR_BEST_AVAIL_LEN) {
-		ext4_mb_choose_next_group_best_avail(ac, new_cr, group, ngroups);
+		ext4_mb_choose_next_group_best_avail(ac, new_cr, group);
 	} else {
 		/*
 		 * TODO: For CR=2, we can arrange groups in an rb tree sorted by
 	atomic64_add(period, &sbi->s_mb_generation_time);
 }
+static void mb_regenerate_buddy(struct ext4_buddy *e4b)
+{
+	int count;
+	int order = 1;
+	void *buddy;
+	while ((buddy = mb_find_buddy(e4b, order++, &count)))
+		mb_set_bits(buddy, 0, count);
+	e4b->bd_info->bb_fragments = 0;
+	memset(e4b->bd_info->bb_counters, 0,
+		sizeof(*e4b->bd_info->bb_counters) *
+		(e4b->bd_sb->s_blocksize_bits + 2));
+	ext4_mb_generate_buddy(e4b->bd_sb, e4b->bd_buddy,
+		e4b->bd_bitmap, e4b->bd_group, e4b->bd_info);
+}
 /* The buddy information is attached the buddy cache inode
  * for convenience. The information regarding each group
  * is loaded via ext4_mb_load_buddy. The information involve
 	mb_check_buddy(e4b);
 	mb_free_blocks_double(inode, e4b, first, count);
-	this_cpu_inc(discard_pa_seq);
-	e4b->bd_info->bb_free += count;
-	if (first < e4b->bd_info->bb_first_free)
-		e4b->bd_info->bb_first_free = first;
 	/* access memory sequentially: check left neighbour,
 	 * clear range and then check right neighbour
 	 */
 		struct ext4_sb_info *sbi = EXT4_SB(sb);
 		ext4_fsblk_t blocknr;
+		/*
+		 * Fastcommit replay can free already freed blocks which
+		 * corrupts allocation info. Regenerate it.
+		 */
+		if (sbi->s_mount_state & EXT4_FC_REPLAY) {
+			mb_regenerate_buddy(e4b);
+			goto check;
+		}
 		blocknr = ext4_group_first_block_no(sb, e4b->bd_group);
 		blocknr += EXT4_C2B(sbi, block);
-		if (!(sbi->s_mount_state & EXT4_FC_REPLAY)) {
+		ext4_mark_group_bitmap_corrupted(sb, e4b->bd_group,
-			ext4_grp_locked_error(sb, e4b->bd_group,
-					      inode ? inode->i_ino : 0,
-					      blocknr,
-					      "freeing already freed block (bit %u); block bitmap corrupt.",
-					      block);
-			ext4_mark_group_bitmap_corrupted(
-				sb, e4b->bd_group,
 				EXT4_GROUP_INFO_BBITMAP_CORRUPT);
-		}
+		ext4_grp_locked_error(sb, e4b->bd_group,
-		goto done;
+				      inode ? inode->i_ino : 0, blocknr,
+				      "freeing already freed block (bit %u); block bitmap corrupt.",
+				      block);
+		return;
 	}
+	this_cpu_inc(discard_pa_seq);
+	e4b->bd_info->bb_free += count;
+	if (first < e4b->bd_info->bb_first_free)
+		e4b->bd_info->bb_first_free = first;
 	/* let's maintain fragments counter */
 	if (left_is_free && right_is_free)
 		e4b->bd_info->bb_fragments--;
 	if (first <= last)
 		mb_buddy_mark_free(e4b, first >> 1, last >> 1);
-done:
 	mb_set_largest_free_order(sb, e4b->bd_info);
 	mb_update_avg_fragment_size(sb, e4b->bd_info);
+check:
 	mb_check_buddy(e4b);
 }
 		return;
 	ext4_lock_group(ac->ac_sb, group);
+	if (unlikely(EXT4_MB_GRP_BBITMAP_CORRUPT(e4b->bd_info)))
+		goto out;
 	max = mb_find_extent(e4b, ex.fe_start, ex.fe_len, &ex);
 	if (max > 0) {
 		ext4_mb_use_best_found(ac, e4b);
 	}
+out:
 	ext4_unlock_group(ac->ac_sb, group);
 	ext4_mb_unload_buddy(e4b);
 }
 	if (err)
 		return err;
-	if (unlikely(EXT4_MB_GRP_BBITMAP_CORRUPT(e4b->bd_info))) {
-		ext4_mb_unload_buddy(e4b);
-		return 0;
-	}
 	ext4_lock_group(ac->ac_sb, group);
+	if (unlikely(EXT4_MB_GRP_BBITMAP_CORRUPT(e4b->bd_info)))
+		goto out;
 	max = mb_find_extent(e4b, ac->ac_g_ex.fe_start,
 			     ac->ac_g_ex.fe_len, &ex);
 	ex.fe_logical = 0xDEADFA11; /* debug value */
 		ac->ac_b_ex = ex;
 		ext4_mb_use_best_found(ac, e4b);
 	}
+out:
 	ext4_unlock_group(ac->ac_sb, group);
 	ext4_mb_unload_buddy(e4b);
 		k = mb_find_next_zero_bit(buddy, max, 0);
 		if (k >= max) {
+			ext4_mark_group_bitmap_corrupted(ac->ac_sb,
+					e4b->bd_group,
+					EXT4_GROUP_INFO_BBITMAP_CORRUPT);
 			ext4_grp_locked_error(ac->ac_sb, e4b->bd_group, 0, 0,
 				"%d free clusters of order %d. But found 0",
 				grp->bb_counters[i], i);
-			ext4_mark_group_bitmap_corrupted(ac->ac_sb,
-					 e4b->bd_group,
-					EXT4_GROUP_INFO_BBITMAP_CORRUPT);
 			break;
 		}
 		ac->ac_found++;
 			 * free blocks even though group info says we
 			 * have free blocks
 			 */
+			ext4_mark_group_bitmap_corrupted(sb, e4b->bd_group,
+					EXT4_GROUP_INFO_BBITMAP_CORRUPT);
 			ext4_grp_locked_error(sb, e4b->bd_group, 0, 0,
 					"%d free clusters as per "
 					"group info. But bitmap says 0",
 					free);
-			ext4_mark_group_bitmap_corrupted(sb, e4b->bd_group,
-					EXT4_GROUP_INFO_BBITMAP_CORRUPT);
 			break;
 		}
 		if (WARN_ON(ex.fe_len <= 0))
 			break;
 		if (free < ex.fe_len) {
+			ext4_mark_group_bitmap_corrupted(sb, e4b->bd_group,
+					EXT4_GROUP_INFO_BBITMAP_CORRUPT);
 			ext4_grp_locked_error(sb, e4b->bd_group, 0, 0,
 					"%d free clusters as per "
 					"group info. But got %d blocks",
 					free, ex.fe_len);
-			ext4_mark_group_bitmap_corrupted(sb, e4b->bd_group,
-					EXT4_GROUP_INFO_BBITMAP_CORRUPT);
 			/*
 			 * The number of free blocks differs. This mostly
 			 * indicate that the bitmap is corrupt. So exit
 	return count;
 }
-int ext4_mb_release(struct super_block *sb)
+void ext4_mb_release(struct super_block *sb)
 {
 	ext4_group_t ngroups = ext4_get_groups_count(sb);
 	ext4_group_t i;
 	}
 	free_percpu(sbi->s_locality_groups);
-	return 0;
 }
 static inline int ext4_issue_discard(struct super_block *sb,
  * the caller MUST hold group/inode locks.
  * TODO: optimize the case when there are no in-core structures yet
  */
-static noinline_for_stack int
+static noinline_for_stack void
 ext4_mb_release_inode_pa(struct ext4_buddy *e4b, struct buffer_head *bitmap_bh,
 			struct ext4_prealloc_space *pa)
 {
 		 */
 	}
 	atomic_add(free, &sbi->s_mb_discarded);
-	return 0;
 }
-static noinline_for_stack int
+static noinline_for_stack void
 ext4_mb_release_group_pa(struct ext4_buddy *e4b,
 				struct ext4_prealloc_space *pa)
 {
 	if (unlikely(group != e4b->bd_group && pa->pa_len != 0)) {
 		ext4_warning(sb, "bad group: expected %u, group %u, pa_start %llu",
 			     e4b->bd_group, group, pa->pa_pstart);
-		return 0;
+		return;
 	}
 	mb_free_blocks(pa->pa_inode, e4b, bit, pa->pa_len);
 	atomic_add(pa->pa_len, &EXT4_SB(sb)->s_mb_discarded);
 	trace_ext4_mballoc_discard(sb, NULL, group, bit, pa->pa_len);
-	return 0;
 }
 /*
  *
  * FIXME!! Make sure it is valid at all the call sites
  */
-void ext4_discard_preallocations(struct inode *inode, unsigned int needed)
+void ext4_discard_preallocations(struct inode *inode)
 {
 	struct ext4_inode_info *ei = EXT4_I(inode);
 	struct super_block *sb = inode->i_sb;
 	struct rb_node *iter;
 	int err;
-	if (!S_ISREG(inode->i_mode)) {
+	if (!S_ISREG(inode->i_mode))
 		return;
-	}
 	if (EXT4_SB(sb)->s_mount_state & EXT4_FC_REPLAY)
 		return;
 	mb_debug(sb, "discard preallocation for inode %lu\n",
 		 inode->i_ino);
 	trace_ext4_discard_preallocations(inode,
-			atomic_read(&ei->i_prealloc_active), needed);
+			atomic_read(&ei->i_prealloc_active));
-	if (needed == 0)
-		needed = UINT_MAX;
 repeat:
 	/* first, collect all pa's in the inode */
 	write_lock(&ei->i_prealloc_lock);
-	for (iter = rb_first(&ei->i_prealloc_node); iter && needed;
+	for (iter = rb_first(&ei->i_prealloc_node); iter;
 	     iter = rb_next(iter)) {
 		pa = rb_entry(iter, struct ext4_prealloc_space,
 			      pa_node.inode_node);
 			spin_unlock(&pa->pa_lock);
 			rb_erase(&pa->pa_node.inode_node, &ei->i_prealloc_node);
 			list_add(&pa->u.pa_tmp_list, &list);
-			needed--;
 			continue;
 		}
 /*
  * release all resource we used in allocation
  */
-static int ext4_mb_release_context(struct ext4_allocation_context *ac)
+static void ext4_mb_release_context(struct ext4_allocation_context *ac)
 {
 	struct ext4_sb_info *sbi = EXT4_SB(ac->ac_sb);
 	struct ext4_prealloc_space *pa = ac->ac_pa;
 	if (ac->ac_flags & EXT4_MB_HINT_GROUP_ALLOC)
 		mutex_unlock(&ac->ac_lg->lg_mutex);
 	ext4_mb_collect_stats(ac);
-	return 0;
 }
 static int ext4_mb_discard_preallocations(struct super_block *sb, int needed)
 	bool set_trimmed = false;
 	void *bitmap;
+	if (unlikely(EXT4_MB_GRP_BBITMAP_CORRUPT(e4b->bd_info)))
+		return 0;
 	last = ext4_last_grp_cluster(sb, e4b->bd_group);
 	bitmap = e4b->bd_bitmap;
 	if (start == 0 && max >= last)

fs/ext4/mballoc.h+0−1

@@ -192,7 +192,6 @@ struct ext4_allocation_context { · 191 unmodified lines
192	*/	192	*/
193	ext4_grpblk_t ac_orig_goal_len;	193	ext4_grpblk_t ac_orig_goal_len;
194		194
195	__u32 ac_groups_considered;
196	__u32 ac_flags; /* allocation hints */	195	__u32 ac_flags; /* allocation hints */
197	__u16 ac_groups_scanned;	196	__u16 ac_groups_scanned;
198	__u16 ac_groups_linear_remaining;	197	__u16 ac_groups_linear_remaining;

fs/ext4/move_extent.c+4−6

 		goto out;
 	o_end = o_start + len;
+	*moved_len = 0;
 	while (o_start < o_end) {
 		struct ext4_extent *ex;
 		ext4_lblk_t cur_blk, next_blk;
 		 */
 		ext4_double_up_write_data_sem(orig_inode, donor_inode);
 		/* Swap original branches with new branches */
-		move_extent_per_page(o_filp, donor_inode,
+		*moved_len += move_extent_per_page(o_filp, donor_inode,
 				     orig_page_index, donor_page_index,
 				     offset_in_page, cur_len,
 				     unwritten, &ret);
 		o_start += cur_len;
 		d_start += cur_len;
 	}
-	*moved_len = o_start - orig_blk;
-	if (*moved_len > len)
-		*moved_len = len;
 out:
 	if (*moved_len) {
-		ext4_discard_preallocations(orig_inode, 0);
+		ext4_discard_preallocations(orig_inode);
-		ext4_discard_preallocations(donor_inode, 0);
+		ext4_discard_preallocations(donor_inode);
 	}
 	ext4_free_ext_path(path);

fs/ext4/super.c+1−1

@@ -1525,7 +1525,7 @@ void ext4_clear_inode(struct inode *inode) · 1524 unmodified lines
1525	ext4_fc_del(inode);	1525	ext4_fc_del(inode);
1526	invalidate_inode_buffers(inode);	1526	invalidate_inode_buffers(inode);
1527	clear_inode(inode);	1527	clear_inode(inode);
1528	ext4_discard_preallocations(inode, 0);	1528	ext4_discard_preallocations(inode);
1529	ext4_es_remove_extent(inode, 0, EXT_MAX_BLOCKS);	1529	ext4_es_remove_extent(inode, 0, EXT_MAX_BLOCKS);
1530	dquot_drop(inode);	1530	dquot_drop(inode);
1531	if (EXT4_I(inode)->jinode) {	1531	if (EXT4_I(inode)->jinode) {

fs/gfs2/dentry.c+9−14

@@ -32,25 +32,21 @@ · 31 unmodified lines
32		32
33	static int gfs2_drevalidate(struct dentry *dentry, unsigned int flags)	33	static int gfs2_drevalidate(struct dentry *dentry, unsigned int flags)
34	{	34	{
35	struct dentry *parent = NULL;	35	struct dentry *parent;
36	struct gfs2_sbd *sdp;	36	struct gfs2_sbd *sdp;
37	struct gfs2_inode *dip;	37	struct gfs2_inode *dip;
38	struct inode dinode, inode;	38	struct inode *inode;
39	struct gfs2_holder d_gh;	39	struct gfs2_holder d_gh;
40	struct gfs2_inode *ip = NULL;	40	struct gfs2_inode *ip = NULL;
41	int error, valid = 0;	41	int error, valid = 0;
42	int had_lock = 0;	42	int had_lock = 0;
43		43
44	if (flags & LOOKUP_RCU) {	44	if (flags & LOOKUP_RCU)
45	dinode = d_inode_rcu(READ_ONCE(dentry->d_parent));	45	return -ECHILD;
46	if (!dinode)	46
47	return -ECHILD;	47	parent = dget_parent(dentry);
48	} else {	48	sdp = GFS2_SB(d_inode(parent));
49	parent = dget_parent(dentry);	49	dip = GFS2_I(d_inode(parent));
50	dinode = d_inode(parent);
51	}
52	sdp = GFS2_SB(dinode);
53	dip = GFS2_I(dinode);
54	inode = d_inode(dentry);	50	inode = d_inode(dentry);
55		51
56	if (inode) {	52	if (inode) {
@@ -66,8 +62,7 @@ static int gfs2_drevalidate(struct dentry *dentry, unsigned int flags) · 9 unmodified lines
66		62
67	had_lock = (gfs2_glock_is_locked_by_me(dip->i_gl) != NULL);	63	had_lock = (gfs2_glock_is_locked_by_me(dip->i_gl) != NULL);
68	if (!had_lock) {	64	if (!had_lock) {
69	error = gfs2_glock_nq_init(dip->i_gl, LM_ST_SHARED,	65	error = gfs2_glock_nq_init(dip->i_gl, LM_ST_SHARED, 0, &d_gh);
70	flags & LOOKUP_RCU ? GL_NOBLOCK : 0, &d_gh);
71	if (error)	66	if (error)
72	goto out;	67	goto out;
73	}	68	}

fs/gfs2/inode.c+4−4

@@ -1882,10 +1882,10 @@ int gfs2_permission(struct mnt_idmap idmap, struct inode inode, · 1881 unmodified lines
1882	WARN_ON_ONCE(!may_not_block);	1882	WARN_ON_ONCE(!may_not_block);
1883	return -ECHILD;	1883	return -ECHILD;
1884	}	1884	}
1885	if (gfs2_glock_is_locked_by_me(ip->i_gl) == NULL) {	1885	if (gfs2_glock_is_locked_by_me(gl) == NULL) {
1886	int noblock = may_not_block ? GL_NOBLOCK : 0;	1886	if (may_not_block)
1887	error = gfs2_glock_nq_init(ip->i_gl, LM_ST_SHARED,	1887	return -ECHILD;
1888	LM_FLAG_ANY \| noblock, &i_gh);	1888	error = gfs2_glock_nq_init(gl, LM_ST_SHARED, LM_FLAG_ANY, &i_gh);
1889	if (error)	1889	if (error)
1890	return error;	1890	return error;
1891	}	1891	}

fs/nfsd/nfs4state.c+5−6

 	 */
 	fl->fl_break_time = 0;
-	spin_lock(&fp->fi_lock);
 	fp->fi_had_conflict = true;
 	nfsd_break_one_deleg(dp);
-	spin_unlock(&fp->fi_lock);
 	return false;
 }
 	if (status)
 		goto out_unlock;
+	status = -EAGAIN;
+	if (fp->fi_had_conflict)
+		goto out_unlock;
 	spin_lock(&state_lock);
 	spin_lock(&fp->fi_lock);
-	if (fp->fi_had_conflict)
+	status = hash_delegation_locked(dp, fp);
-		status = -EAGAIN;
-	else
-		status = hash_delegation_locked(dp, fp);
 	spin_unlock(&fp->fi_lock);
 	spin_unlock(&state_lock);

fs/smb/client/cifsglob.h+4−1

 #define SMB_INTERFACE_POLL_INTERVAL	600
 /* maximum number of PDUs in one compound */
-#define MAX_COMPOUND 5
+#define MAX_COMPOUND 7
 /*
  * Default number of credits to keep available for SMB3.
 	__u8 signkey[SMB3_SIGN_KEY_SIZE];
 };
+#define CIFS_SES_FLAG_SCALE_CHANNELS (0x1)
 /*
  * Session structure.  One of these for each uid session with a particular host
  */
 	enum securityEnum sectype; /* what security flavor was specified? */
 	bool sign;		/* is signing required? */
 	bool domainAuto:1;
+	unsigned int flags;
 	__u16 session_flags;
 	__u8 smb3signingkey[SMB3_SIGN_KEY_SIZE];
 	__u8 smb3encryptionkey[SMB3_ENC_DEC_KEY_SIZE];

fs/smb/client/sess.c+6−0

 {
 	unsigned int i;
+	/* if the channel is waiting for termination */
+	if (server->terminate)
+		return CIFS_INVAL_CHAN_INDEX;
 	for (i = 0; i < ses->chan_count; i++) {
 		if (ses->chans[i].server == server)
 			return i;
 					 &iface->sockaddr,
 					 rc);
 				kref_put(&iface->refcount, release_iface);
+				/* failure to add chan should increase weight */
+				iface->weight_fulfilled++;
 				continue;
 			}

fs/smb/client/smb2pdu.c+19−5

 		}
 		ses->chans[chan_index].server = NULL;
+		server->terminate = true;
 		spin_unlock(&ses->chan_lock);
 		/*
 		 */
 		cifs_put_tcp_session(server, from_reconnect);
-		server->terminate = true;
 		cifs_signal_cifsd_for_reconnect(server, false);
 		/* mark primary server as needing reconnect */
 		goto out;
 	}
+	spin_lock(&ses->ses_lock);
+	if (ses->flags & CIFS_SES_FLAG_SCALE_CHANNELS) {
+		spin_unlock(&ses->ses_lock);
+		mutex_unlock(&ses->session_mutex);
+		goto skip_add_channels;
+	}
+	ses->flags |= CIFS_SES_FLAG_SCALE_CHANNELS;
+	spin_unlock(&ses->ses_lock);
 	if (!rc &&
 	    (server->capabilities & SMB2_GLOBAL_CAP_MULTI_CHANNEL)) {
 		mutex_unlock(&ses->session_mutex);
 		rc = SMB3_request_interfaces(xid, tcon, false);
 		free_xid(xid);
-		if (rc == -EOPNOTSUPP) {
+		if (rc == -EOPNOTSUPP && ses->chan_count > 1) {
 			/*
 			 * some servers like Azure SMB server do not advertise
 			 * that multichannel has been disabled with server
 		if (ses->chan_max > ses->chan_count &&
 		    ses->iface_count &&
 		    !SERVER_IS_CHAN(server)) {
-			if (ses->chan_count == 1)
+			if (ses->chan_count == 1) {
 				cifs_server_dbg(VFS, "supports multichannel now\n");
+				queue_delayed_work(cifsiod_wq, &tcon->query_interfaces,
+						 (SMB_INTERFACE_POLL_INTERVAL * HZ));
+			}
 			cifs_try_adding_channels(ses);
-			queue_delayed_work(cifsiod_wq, &tcon->query_interfaces,
-					   (SMB_INTERFACE_POLL_INTERVAL * HZ));
 		}
 	} else {
 		mutex_unlock(&ses->session_mutex);
 	}
 skip_add_channels:
+	spin_lock(&ses->ses_lock);
+	ses->flags &= ~CIFS_SES_FLAG_SCALE_CHANNELS;
+	spin_unlock(&ses->ses_lock);
 	if (smb2_command != SMB2_INTERNAL_CMD)
 		mod_delayed_work(cifsiod_wq, &server->reconnect, 0);

fs/smb/client/transport.c+2−2

@@ -435,8 +435,8 @@ smb_send_rqst(struct TCP_Server_Info *server, int num_rqst, · 434 unmodified lines
435	if (!(flags & CIFS_TRANSFORM_REQ))	435	if (!(flags & CIFS_TRANSFORM_REQ))
436	return __smb_send_rqst(server, num_rqst, rqst);	436	return __smb_send_rqst(server, num_rqst, rqst);
437		437
438	if (num_rqst > MAX_COMPOUND - 1)	438	if (WARN_ON_ONCE(num_rqst > MAX_COMPOUND - 1))
439	return -ENOMEM;	439	return -EIO;
440		440
441	if (!server->ops->init_transform_rq) {	441	if (!server->ops->init_transform_rq) {
442	cifs_server_dbg(VFS, "Encryption requested but transform callback is missing\n");	442	cifs_server_dbg(VFS, "Encryption requested but transform callback is missing\n");

fs/tracefs/event_inode.c+151−417

@@ -62,6 +62,46 @@ enum { · 61 unmodified lines
62		62
63	#define EVENTFS_MODE_MASK (EVENTFS_SAVE_MODE - 1)	63	#define EVENTFS_MODE_MASK (EVENTFS_SAVE_MODE - 1)
64		64
		65	/*
		66	* eventfs_inode reference count management.
		67	*
		68	* NOTE! We count only references from dentries, in the
		69	* form 'dentry->d_fsdata'. There are also references from
		70	* directory inodes ('ti->private'), but the dentry reference
		71	* count is always a superset of the inode reference count.
		72	*/
		73	static void release_ei(struct kref *ref)
		74	{
		75	struct eventfs_inode *ei = container_of(ref, struct eventfs_inode, kref);
		76
		77	WARN_ON_ONCE(!ei->is_freed);
		78
		79	kfree(ei->entry_attrs);
		80	kfree_const(ei->name);
		81	kfree_rcu(ei, rcu);
		82	}
		83
		84	static inline void put_ei(struct eventfs_inode *ei)
		85	{
		86	if (ei)
		87	kref_put(&ei->kref, release_ei);
		88	}
		89
		90	static inline void free_ei(struct eventfs_inode *ei)
		91	{
		92	if (ei) {
		93	ei->is_freed = 1;
		94	put_ei(ei);
		95	}
		96	}
		97
		98	static inline struct eventfs_inode get_ei(struct eventfs_inode ei)
		99	{
		100	if (ei)
		101	kref_get(&ei->kref);
		102	return ei;
		103	}
		104
65	static struct dentry eventfs_root_lookup(struct inode dir,	105	static struct dentry eventfs_root_lookup(struct inode dir,
66	struct dentry *dentry,	106	struct dentry *dentry,
67	unsigned int flags);	107	unsigned int flags);
@@ -156,33 +196,30 @@ static int eventfs_set_attr(struct mnt_idmap idmap, struct dentry dentry, · 88 unmodified lines
156	return ret;	196	return ret;
157	}	197	}
158		198
159	static void update_top_events_attr(struct eventfs_inode ei, struct dentry dentry)	199	static void update_top_events_attr(struct eventfs_inode ei, struct super_block sb)
160	{	200	{
161	struct inode *inode;	201	struct inode *root;
162		202
163	/* Only update if the "events" was on the top level */	203	/* Only update if the "events" was on the top level */
164	if (!ei \|\| !(ei->attr.mode & EVENTFS_TOPLEVEL))	204	if (!ei \|\| !(ei->attr.mode & EVENTFS_TOPLEVEL))
165	return;	205	return;
166		206
167	/* Get the tracefs root inode. */	207	/* Get the tracefs root inode. */
168	inode = d_inode(dentry->d_sb->s_root);	208	root = d_inode(sb->s_root);
169	ei->attr.uid = inode->i_uid;	209	ei->attr.uid = root->i_uid;
170	ei->attr.gid = inode->i_gid;	210	ei->attr.gid = root->i_gid;
171	}	211	}
172		212
173	static void set_top_events_ownership(struct inode *inode)	213	static void set_top_events_ownership(struct inode *inode)
174	{	214	{
175	struct tracefs_inode *ti = get_tracefs(inode);	215	struct tracefs_inode *ti = get_tracefs(inode);
176	struct eventfs_inode *ei = ti->private;	216	struct eventfs_inode *ei = ti->private;
177	struct dentry *dentry;
178		217
179	/* The top events directory doesn't get automatically updated */	218	/* The top events directory doesn't get automatically updated */
180	if (!ei \|\| !ei->is_events \|\| !(ei->attr.mode & EVENTFS_TOPLEVEL))	219	if (!ei \|\| !ei->is_events \|\| !(ei->attr.mode & EVENTFS_TOPLEVEL))
181	return;	220	return;
182		221
183	dentry = ei->dentry;	222	update_top_events_attr(ei, inode->i_sb);
184
185	update_top_events_attr(ei, dentry);
186		223
187	if (!(ei->attr.mode & EVENTFS_SAVE_UID))	224	if (!(ei->attr.mode & EVENTFS_SAVE_UID))
188	inode->i_uid = ei->attr.uid;	225	inode->i_uid = ei->attr.uid;
@@ -233,10 +270,11 @@ static struct eventfs_inode eventfs_find_events(struct dentry dentry) · 44 unmodified lines
233	{	270	{
234	struct eventfs_inode *ei;	271	struct eventfs_inode *ei;
235		272
236	mutex_lock(&eventfs_mutex);
237	do {	273	do {
238	/* The parent always has an ei, except for events itself */	274	// The parent is stable because we do not do renames
239	ei = dentry->d_parent->d_fsdata;	275	dentry = dentry->d_parent;
		276	// ... and directories always have d_fsdata
		277	ei = dentry->d_fsdata;
240		278
241	/*	279	/*
242	* If the ei is being freed, the ownership of the children	280	* If the ei is being freed, the ownership of the children
@@ -246,12 +284,10 @@ static struct eventfs_inode eventfs_find_events(struct dentry dentry) · 3 unmodified lines
246	ei = NULL;	284	ei = NULL;
247	break;	285	break;
248	}	286	}
249		287	// Walk upwards until you find the events inode
250	dentry = ei->dentry;
251	} while (!ei->is_events);	288	} while (!ei->is_events);
252	mutex_unlock(&eventfs_mutex);
253		289
254	update_top_events_attr(ei, dentry);	290	update_top_events_attr(ei, dentry->d_sb);
255		291
256	return ei;	292	return ei;
257	}	293	}
@@ -282,11 +318,10 @@ static void update_inode_attr(struct dentry dentry, struct inode inode, · 24 unmodified lines
282	}	318	}
283		319
284	/**	320	/**
285	* create_file - create a file in the tracefs filesystem	321	* lookup_file - look up a file in the tracefs filesystem
286	* @name: the name of the file to create.	322	* @dentry: the dentry to look up
287	* @mode: the permission that the file should have.	323	* @mode: the permission that the file should have.
288	* @attr: saved attributes changed by user	324	* @attr: saved attributes changed by user
289	* @parent: parent dentry for this file.
290	* @data: something that the caller will want to get to later on.	325	* @data: something that the caller will want to get to later on.
291	* @fop: struct file_operations that should be used for this file.	326	* @fop: struct file_operations that should be used for this file.
292	*	327	*
@@ -294,30 +329,25 @@ static void update_inode_attr(struct dentry dentry, struct inode inode, · 1 unmodified line
294	* directory. The inode.i_private pointer will point to @data in the open()	329	* directory. The inode.i_private pointer will point to @data in the open()
295	* call.	330	* call.
296	*/	331	*/
297	static struct dentry create_file(const char name, umode_t mode,	332	static struct dentry lookup_file(struct eventfs_inode parent_ei,
		333	struct dentry *dentry,
		334	umode_t mode,
298	struct eventfs_attr *attr,	335	struct eventfs_attr *attr,
299	struct dentry parent, void data,	336	void *data,
300	const struct file_operations *fop)	337	const struct file_operations *fop)
301	{	338	{
302	struct tracefs_inode *ti;	339	struct tracefs_inode *ti;
303	struct dentry *dentry;
304	struct inode *inode;	340	struct inode *inode;
305		341
306	if (!(mode & S_IFMT))	342	if (!(mode & S_IFMT))
307	mode \|= S_IFREG;	343	mode \|= S_IFREG;
308		344
309	if (WARN_ON_ONCE(!S_ISREG(mode)))	345	if (WARN_ON_ONCE(!S_ISREG(mode)))
310	return NULL;	346	return ERR_PTR(-EIO);
311
312	WARN_ON_ONCE(!parent);
313	dentry = eventfs_start_creating(name, parent);
314
315	if (IS_ERR(dentry))
316	return dentry;
317		347
318	inode = tracefs_get_inode(dentry->d_sb);	348	inode = tracefs_get_inode(dentry->d_sb);
319	if (unlikely(!inode))	349	if (unlikely(!inode))
320	return eventfs_failed_creating(dentry);	350	return ERR_PTR(-ENOMEM);
321		351
322	/* If the user updated the directory's attributes, use them */	352	/* If the user updated the directory's attributes, use them */
323	update_inode_attr(dentry, inode, attr, mode);	353	update_inode_attr(dentry, inode, attr, mode);
@@ -331,32 +361,31 @@ static struct dentry create_file(const char name, umode_t mode, · 7 unmodified lines
331		361
332	ti = get_tracefs(inode);	362	ti = get_tracefs(inode);
333	ti->flags \|= TRACEFS_EVENT_INODE;	363	ti->flags \|= TRACEFS_EVENT_INODE;
334	d_instantiate(dentry, inode);	364
335	fsnotify_create(dentry->d_parent->d_inode, dentry);	365	// Files have their parent's ei as their fsdata
336	return eventfs_end_creating(dentry);	366	dentry->d_fsdata = get_ei(parent_ei);
		367
		368	d_add(dentry, inode);
		369	return NULL;
337	};	370	};
338		371
339	/**	372	/**
340	* create_dir - create a dir in the tracefs filesystem	373	* lookup_dir_entry - look up a dir in the tracefs filesystem
		374	* @dentry: the directory to look up
341	* @ei: the eventfs_inode that represents the directory to create	375	* @ei: the eventfs_inode that represents the directory to create
342	* @parent: parent dentry for this file.
343	*	376	*
344	* This function will create a dentry for a directory represented by	377	* This function will look up a dentry for a directory represented by
345	* a eventfs_inode.	378	* a eventfs_inode.
346	*/	379	*/
347	static struct dentry create_dir(struct eventfs_inode ei, struct dentry *parent)	380	static struct dentry lookup_dir_entry(struct dentry dentry,
		381	struct eventfs_inode pei, struct eventfs_inode ei)
348	{	382	{
349	struct tracefs_inode *ti;	383	struct tracefs_inode *ti;
350	struct dentry *dentry;
351	struct inode *inode;	384	struct inode *inode;
352		385
353	dentry = eventfs_start_creating(ei->name, parent);
354	if (IS_ERR(dentry))
355	return dentry;
356
357	inode = tracefs_get_inode(dentry->d_sb);	386	inode = tracefs_get_inode(dentry->d_sb);
358	if (unlikely(!inode))	387	if (unlikely(!inode))
359	return eventfs_failed_creating(dentry);	388	return ERR_PTR(-ENOMEM);
360		389
361	/* If the user updated the directory's attributes, use them */	390	/* If the user updated the directory's attributes, use them */
362	update_inode_attr(dentry, inode, &ei->attr,	391	update_inode_attr(dentry, inode, &ei->attr,
@@ -370,64 +399,46 @@ static struct dentry create_dir(struct eventfs_inode ei, struct dentry *parent · 7 unmodified lines
370		399
371	ti = get_tracefs(inode);	400	ti = get_tracefs(inode);
372	ti->flags \|= TRACEFS_EVENT_INODE;	401	ti->flags \|= TRACEFS_EVENT_INODE;
		402	/* Only directories have ti->private set to an ei, not files */
		403	ti->private = ei;
373		404
374	inc_nlink(inode);	405	dentry->d_fsdata = get_ei(ei);
375	d_instantiate(dentry, inode);	406
376	inc_nlink(dentry->d_parent->d_inode);	407	d_add(dentry, inode);
377	fsnotify_mkdir(dentry->d_parent->d_inode, dentry);	408	return NULL;
378	return eventfs_end_creating(dentry);
379	}	409	}
380		410
381	static void free_ei(struct eventfs_inode *ei)	411	static inline struct eventfs_inode alloc_ei(const char name)
382	{	412	{
383	kfree_const(ei->name);	413	struct eventfs_inode ei = kzalloc(sizeof(ei), GFP_KERNEL);
384	kfree(ei->d_children);	414
385	kfree(ei->entry_attrs);	415	if (!ei)
386	kfree(ei);	416	return NULL;
		417
		418	ei->name = kstrdup_const(name, GFP_KERNEL);
		419	if (!ei->name) {
		420	kfree(ei);
		421	return NULL;
		422	}
		423	kref_init(&ei->kref);
		424	return ei;
387	}	425	}
388		426
389	/**	427	/**
390	* eventfs_set_ei_status_free - remove the dentry reference from an eventfs_inode	428	* eventfs_d_release - dentry is going away
391	* @ti: the tracefs_inode of the dentry
392	* @dentry: dentry which has the reference to remove.	429	* @dentry: dentry which has the reference to remove.
393	*	430	*
394	* Remove the association between a dentry from an eventfs_inode.	431	* Remove the association between a dentry from an eventfs_inode.
395	*/	432	*/
396	void eventfs_set_ei_status_free(struct tracefs_inode ti, struct dentry dentry)	433	void eventfs_d_release(struct dentry *dentry)
397	{	434	{
398	struct eventfs_inode *ei;	435	put_ei(dentry->d_fsdata);
399	int i;
400
401	mutex_lock(&eventfs_mutex);
402
403	ei = dentry->d_fsdata;
404	if (!ei)
405	goto out;
406
407	/* This could belong to one of the files of the ei */
408	if (ei->dentry != dentry) {
409	for (i = 0; i < ei->nr_entries; i++) {
410	if (ei->d_children[i] == dentry)
411	break;
412	}
413	if (WARN_ON_ONCE(i == ei->nr_entries))
414	goto out;
415	ei->d_children[i] = NULL;
416	} else if (ei->is_freed) {
417	free_ei(ei);
418	} else {
419	ei->dentry = NULL;
420	}
421
422	dentry->d_fsdata = NULL;
423	out:
424	mutex_unlock(&eventfs_mutex);
425	}	436	}
426		437
427	/**	438	/**
428	* create_file_dentry - create a dentry for a file of an eventfs_inode	439	* lookup_file_dentry - create a dentry for a file of an eventfs_inode
429	* @ei: the eventfs_inode that the file will be created under	440	* @ei: the eventfs_inode that the file will be created under
430	* @idx: the index into the d_children[] of the @ei	441	* @idx: the index into the entry_attrs[] of the @ei
431	* @parent: The parent dentry of the created file.	442	* @parent: The parent dentry of the created file.
432	* @name: The name of the file to create	443	* @name: The name of the file to create
433	* @mode: The mode of the file.	444	* @mode: The mode of the file.
@@ -438,163 +449,17 @@ void eventfs_set_ei_status_free(struct tracefs_inode ti, struct dentry dentry) · 4 unmodified lines
438	* address located at @e_dentry.	449	* address located at @e_dentry.
439	*/	450	*/
440	static struct dentry *	451	static struct dentry *
441	create_file_dentry(struct eventfs_inode *ei, int idx,	452	lookup_file_dentry(struct dentry *dentry,
442	struct dentry parent, const char name, umode_t mode, void *data,	453	struct eventfs_inode *ei, int idx,
		454	umode_t mode, void *data,
443	const struct file_operations *fops)	455	const struct file_operations *fops)
444	{	456	{
445	struct eventfs_attr *attr = NULL;	457	struct eventfs_attr *attr = NULL;
446	struct dentry **e_dentry = &ei->d_children[idx];
447	struct dentry *dentry;
448
449	WARN_ON_ONCE(!inode_is_locked(parent->d_inode));
450		458
451	mutex_lock(&eventfs_mutex);
452	if (ei->is_freed) {
453	mutex_unlock(&eventfs_mutex);
454	return NULL;
455	}
456	/* If the e_dentry already has a dentry, use it */
457	if (*e_dentry) {
458	dget(*e_dentry);
459	mutex_unlock(&eventfs_mutex);
460	return *e_dentry;
461	}
462
463	/* ei->entry_attrs are protected by SRCU */
464	if (ei->entry_attrs)	459	if (ei->entry_attrs)
465	attr = &ei->entry_attrs[idx];	460	attr = &ei->entry_attrs[idx];
466		461
467	mutex_unlock(&eventfs_mutex);	462	return lookup_file(ei, dentry, mode, attr, data, fops);
468
469	dentry = create_file(name, mode, attr, parent, data, fops);
470
471	mutex_lock(&eventfs_mutex);
472
473	if (IS_ERR_OR_NULL(dentry)) {
474	/*
475	* When the mutex was released, something else could have
476	* created the dentry for this e_dentry. In which case
477	* use that one.
478	*
479	* If ei->is_freed is set, the e_dentry is currently on its
480	* way to being freed, don't return it. If e_dentry is NULL
481	* it means it was already freed.
482	*/
483	if (ei->is_freed) {
484	dentry = NULL;
485	} else {
486	dentry = *e_dentry;
487	dget(dentry);
488	}
489	mutex_unlock(&eventfs_mutex);
490	return dentry;
491	}
492
493	if (!*e_dentry && !ei->is_freed) {
494	*e_dentry = dentry;
495	dentry->d_fsdata = ei;
496	} else {
497	/*
498	* Should never happen unless we get here due to being freed.
499	* Otherwise it means two dentries exist with the same name.
500	*/
501	WARN_ON_ONCE(!ei->is_freed);
502	dentry = NULL;
503	}
504	mutex_unlock(&eventfs_mutex);
505
506	return dentry;
507	}
508
509	/**
510	* eventfs_post_create_dir - post create dir routine
511	* @ei: eventfs_inode of recently created dir
512	*
513	* Map the meta-data of files within an eventfs dir to their parent dentry
514	*/
515	static void eventfs_post_create_dir(struct eventfs_inode *ei)
516	{
517	struct eventfs_inode *ei_child;
518	struct tracefs_inode *ti;
519
520	lockdep_assert_held(&eventfs_mutex);
521
522	/* srcu lock already held */
523	/* fill parent-child relation */
524	list_for_each_entry_srcu(ei_child, &ei->children, list,
525	srcu_read_lock_held(&eventfs_srcu)) {
526	ei_child->d_parent = ei->dentry;
527	}
528
529	ti = get_tracefs(ei->dentry->d_inode);
530	ti->private = ei;
531	}
532
533	/**
534	* create_dir_dentry - Create a directory dentry for the eventfs_inode
535	* @pei: The eventfs_inode parent of ei.
536	* @ei: The eventfs_inode to create the directory for
537	* @parent: The dentry of the parent of this directory
538	*
539	* This creates and attaches a directory dentry to the eventfs_inode @ei.
540	*/
541	static struct dentry *
542	create_dir_dentry(struct eventfs_inode pei, struct eventfs_inode ei,
543	struct dentry *parent)
544	{
545	struct dentry *dentry = NULL;
546
547	WARN_ON_ONCE(!inode_is_locked(parent->d_inode));
548
549	mutex_lock(&eventfs_mutex);
550	if (pei->is_freed \|\| ei->is_freed) {
551	mutex_unlock(&eventfs_mutex);
552	return NULL;
553	}
554	if (ei->dentry) {
555	/* If the eventfs_inode already has a dentry, use it */
556	dentry = ei->dentry;
557	dget(dentry);
558	mutex_unlock(&eventfs_mutex);
559	return dentry;
560	}
561	mutex_unlock(&eventfs_mutex);
562
563	dentry = create_dir(ei, parent);
564
565	mutex_lock(&eventfs_mutex);
566
567	if (IS_ERR_OR_NULL(dentry) && !ei->is_freed) {
568	/*
569	* When the mutex was released, something else could have
570	* created the dentry for this e_dentry. In which case
571	* use that one.
572	*
573	* If ei->is_freed is set, the e_dentry is currently on its
574	* way to being freed.
575	*/
576	dentry = ei->dentry;
577	if (dentry)
578	dget(dentry);
579	mutex_unlock(&eventfs_mutex);
580	return dentry;
581	}
582
583	if (!ei->dentry && !ei->is_freed) {
584	ei->dentry = dentry;
585	eventfs_post_create_dir(ei);
586	dentry->d_fsdata = ei;
587	} else {
588	/*
589	* Should never happen unless we get here due to being freed.
590	* Otherwise it means two dentries exist with the same name.
591	*/
592	WARN_ON_ONCE(!ei->is_freed);
593	dentry = NULL;
594	}
595	mutex_unlock(&eventfs_mutex);
596
597	return dentry;
598	}	463	}
599		464
600	/**	465	/**
@@ -611,79 +476,50 @@ static struct dentry eventfs_root_lookup(struct inode dir, · 10 unmodified lines
611	struct dentry *dentry,	476	struct dentry *dentry,
612	unsigned int flags)	477	unsigned int flags)
613	{	478	{
614	const struct file_operations *fops;
615	const struct eventfs_entry *entry;
616	struct eventfs_inode *ei_child;	479	struct eventfs_inode *ei_child;
617	struct tracefs_inode *ti;	480	struct tracefs_inode *ti;
618	struct eventfs_inode *ei;	481	struct eventfs_inode *ei;
619	struct dentry *ei_dentry = NULL;
620	struct dentry *ret = NULL;
621	struct dentry *d;
622	const char *name = dentry->d_name.name;	482	const char *name = dentry->d_name.name;
623	umode_t mode;	483	struct dentry *result = NULL;
624	void *data;
625	int idx;
626	int i;
627	int r;
628		484
629	ti = get_tracefs(dir);	485	ti = get_tracefs(dir);
630	if (!(ti->flags & TRACEFS_EVENT_INODE))	486	if (!(ti->flags & TRACEFS_EVENT_INODE))
631	return NULL;	487	return ERR_PTR(-EIO);
632		488
633	/* Grab srcu to prevent the ei from going away */
634	idx = srcu_read_lock(&eventfs_srcu);
635
636	/*
637	* Grab the eventfs_mutex to consistent value from ti->private.
638	* This s
639	*/
640	mutex_lock(&eventfs_mutex);	489	mutex_lock(&eventfs_mutex);
641	ei = READ_ONCE(ti->private);
642	if (ei && !ei->is_freed)
643	ei_dentry = READ_ONCE(ei->dentry);
644	mutex_unlock(&eventfs_mutex);
645		490
646	if (!ei \|\| !ei_dentry)	491	ei = ti->private;
		492	if (!ei \|\| ei->is_freed)
647	goto out;	493	goto out;
648		494
649	data = ei->data;	495	list_for_each_entry(ei_child, &ei->children, list) {
650
651	list_for_each_entry_srcu(ei_child, &ei->children, list,
652	srcu_read_lock_held(&eventfs_srcu)) {
653	if (strcmp(ei_child->name, name) != 0)	496	if (strcmp(ei_child->name, name) != 0)
654	continue;	497	continue;
655	ret = simple_lookup(dir, dentry, flags);	498	if (ei_child->is_freed)
656	if (IS_ERR(ret))
657	goto out;	499	goto out;
658	d = create_dir_dentry(ei, ei_child, ei_dentry);	500	result = lookup_dir_entry(dentry, ei, ei_child);
659	dput(d);
660	goto out;	501	goto out;
661	}	502	}
662		503
663	for (i = 0; i < ei->nr_entries; i++) {	504	for (int i = 0; i < ei->nr_entries; i++) {
664	entry = &ei->entries[i];	505	void *data;
665	if (strcmp(name, entry->name) == 0) {	506	umode_t mode;
666	void *cdata = data;	507	const struct file_operations *fops;
667	mutex_lock(&eventfs_mutex);	508	const struct eventfs_entry *entry = &ei->entries[i];
668	/* If ei->is_freed, then the event itself may be too */	509
669	if (!ei->is_freed)	510	if (strcmp(name, entry->name) != 0)
670	r = entry->callback(name, &mode, &cdata, &fops);	511	continue;
671	else	512
672	r = -1;	513	data = ei->data;
673	mutex_unlock(&eventfs_mutex);	514	if (entry->callback(name, &mode, &data, &fops) <= 0)
674	if (r <= 0)	515	goto out;
675	continue;	516
676	ret = simple_lookup(dir, dentry, flags);	517	result = lookup_file_dentry(dentry, ei, i, mode, data, fops);
677	if (IS_ERR(ret))	518	goto out;
678	goto out;
679	d = create_file_dentry(ei, i, ei_dentry, name, mode, cdata, fops);
680	dput(d);
681	break;
682	}
683	}	519	}
684	out:	520	out:
685	srcu_read_unlock(&eventfs_srcu, idx);	521	mutex_unlock(&eventfs_mutex);
686	return ret;	522	return result;
687	}	523	}
688		524
689	/*	525	/*
@@ -833,25 +669,10 @@ struct eventfs_inode eventfs_create_dir(const char name, struct eventfs_inode · 143 unmodified lines
833	if (!parent)	669	if (!parent)
834	return ERR_PTR(-EINVAL);	670	return ERR_PTR(-EINVAL);
835		671
836	ei = kzalloc(sizeof(*ei), GFP_KERNEL);	672	ei = alloc_ei(name);
837	if (!ei)	673	if (!ei)
838	return ERR_PTR(-ENOMEM);	674	return ERR_PTR(-ENOMEM);
839		675
840	ei->name = kstrdup_const(name, GFP_KERNEL);
841	if (!ei->name) {
842	kfree(ei);
843	return ERR_PTR(-ENOMEM);
844	}
845
846	if (size) {
847	ei->d_children = kcalloc(size, sizeof(*ei->d_children), GFP_KERNEL);
848	if (!ei->d_children) {
849	kfree_const(ei->name);
850	kfree(ei);
851	return ERR_PTR(-ENOMEM);
852	}
853	}
854
855	ei->entries = entries;	676	ei->entries = entries;
856	ei->nr_entries = size;	677	ei->nr_entries = size;
857	ei->data = data;	678	ei->data = data;
@@ -859,10 +680,8 @@ struct eventfs_inode eventfs_create_dir(const char name, struct eventfs_inode · 1 unmodified line
859	INIT_LIST_HEAD(&ei->list);	680	INIT_LIST_HEAD(&ei->list);
860		681
861	mutex_lock(&eventfs_mutex);	682	mutex_lock(&eventfs_mutex);
862	if (!parent->is_freed) {	683	if (!parent->is_freed)
863	list_add_tail(&ei->list, &parent->children);	684	list_add_tail(&ei->list, &parent->children);
864	ei->d_parent = parent->dentry;
865	}
866	mutex_unlock(&eventfs_mutex);	685	mutex_unlock(&eventfs_mutex);
867		686
868	/* Was the parent freed? */	687	/* Was the parent freed? */
@@ -902,28 +721,20 @@ struct eventfs_inode eventfs_create_events_dir(const char name, struct dentry · 33 unmodified lines
902	if (IS_ERR(dentry))	721	if (IS_ERR(dentry))
903	return ERR_CAST(dentry);	722	return ERR_CAST(dentry);
904		723
905	ei = kzalloc(sizeof(*ei), GFP_KERNEL);	724	ei = alloc_ei(name);
906	if (!ei)	725	if (!ei)
907	goto fail_ei;	726	goto fail;
908		727
909	inode = tracefs_get_inode(dentry->d_sb);	728	inode = tracefs_get_inode(dentry->d_sb);
910	if (unlikely(!inode))	729	if (unlikely(!inode))
911	goto fail;	730	goto fail;
912		731
913	if (size) {	732	// Note: we have a ref to the dentry from tracefs_start_creating()
914	ei->d_children = kcalloc(size, sizeof(*ei->d_children), GFP_KERNEL);	733	ei->events_dir = dentry;
915	if (!ei->d_children)
916	goto fail;
917	}
918
919	ei->dentry = dentry;
920	ei->entries = entries;	734	ei->entries = entries;
921	ei->nr_entries = size;	735	ei->nr_entries = size;
922	ei->is_events = 1;	736	ei->is_events = 1;
923	ei->data = data;	737	ei->data = data;
924	ei->name = kstrdup_const(name, GFP_KERNEL);
925	if (!ei->name)
926	goto fail;
927		738
928	/* Save the ownership of this directory */	739	/* Save the ownership of this directory */
929	uid = d_inode(dentry->d_parent)->i_uid;	740	uid = d_inode(dentry->d_parent)->i_uid;
@@ -954,11 +765,19 @@ struct eventfs_inode eventfs_create_events_dir(const char name, struct dentry · 24 unmodified lines
954	inode->i_op = &eventfs_root_dir_inode_operations;	765	inode->i_op = &eventfs_root_dir_inode_operations;
955	inode->i_fop = &eventfs_file_operations;	766	inode->i_fop = &eventfs_file_operations;
956		767
957	dentry->d_fsdata = ei;	768	dentry->d_fsdata = get_ei(ei);
958		769
959	/* directory inodes start off with i_nlink == 2 (for "." entry) */	770	/*
960	inc_nlink(inode);	771	* Keep all eventfs directories with i_nlink == 1.
		772	* Due to the dynamic nature of the dentry creations and not
		773	* wanting to add a pointer to the parent eventfs_inode in the
		774	* eventfs_inode structure, keeping the i_nlink in sync with the
		775	* number of directories would cause too much complexity for
		776	* something not worth much. Keeping directory links at 1
		777	* tells userspace not to trust the link number.
		778	*/
961	d_instantiate(dentry, inode);	779	d_instantiate(dentry, inode);
		780	/* The dentry of the "events" parent does keep track though */
962	inc_nlink(dentry->d_parent->d_inode);	781	inc_nlink(dentry->d_parent->d_inode);
963	fsnotify_mkdir(dentry->d_parent->d_inode, dentry);	782	fsnotify_mkdir(dentry->d_parent->d_inode, dentry);
964	tracefs_end_creating(dentry);	783	tracefs_end_creating(dentry);
@@ -966,72 +785,11 @@ struct eventfs_inode eventfs_create_events_dir(const char name, struct dentry · 1 unmodified line
966	return ei;	785	return ei;
967		786
968	fail:	787	fail:
969	kfree(ei->d_children);	788	free_ei(ei);
970	kfree(ei);
971	fail_ei:
972	tracefs_failed_creating(dentry);	789	tracefs_failed_creating(dentry);
973	return ERR_PTR(-ENOMEM);	790	return ERR_PTR(-ENOMEM);
974	}	791	}
975		792
976	static LLIST_HEAD(free_list);
977
978	static void eventfs_workfn(struct work_struct *work)
979	{
980	struct eventfs_inode ei, tmp;
981	struct llist_node *llnode;
982
983	llnode = llist_del_all(&free_list);
984	llist_for_each_entry_safe(ei, tmp, llnode, llist) {
985	/* This dput() matches the dget() from unhook_dentry() */
986	for (int i = 0; i < ei->nr_entries; i++) {
987	if (ei->d_children[i])
988	dput(ei->d_children[i]);
989	}
990	/* This should only get here if it had a dentry */
991	if (!WARN_ON_ONCE(!ei->dentry))
992	dput(ei->dentry);
993	}
994	}
995
996	static DECLARE_WORK(eventfs_work, eventfs_workfn);
997
998	static void free_rcu_ei(struct rcu_head *head)
999	{
1000	struct eventfs_inode *ei = container_of(head, struct eventfs_inode, rcu);
1001
1002	if (ei->dentry) {
1003	/* Do not free the ei until all references of dentry are gone */
1004	if (llist_add(&ei->llist, &free_list))
1005	queue_work(system_unbound_wq, &eventfs_work);
1006	return;
1007	}
1008
1009	/* If the ei doesn't have a dentry, neither should its children */
1010	for (int i = 0; i < ei->nr_entries; i++) {
1011	WARN_ON_ONCE(ei->d_children[i]);
1012	}
1013
1014	free_ei(ei);
1015	}
1016
1017	static void unhook_dentry(struct dentry *dentry)
1018	{
1019	if (!dentry)
1020	return;
1021	/*
1022	* Need to add a reference to the dentry that is expected by
1023	* simple_recursive_removal(), which will include a dput().
1024	*/
1025	dget(dentry);
1026
1027	/*
1028	* Also add a reference for the dput() in eventfs_workfn().
1029	* That is required as that dput() will free the ei after
1030	* the SRCU grace period is over.
1031	*/
1032	dget(dentry);
1033	}
1034
1035	/**	793	/**
1036	* eventfs_remove_rec - remove eventfs dir or file from list	794	* eventfs_remove_rec - remove eventfs dir or file from list
1037	* @ei: eventfs_inode to be removed.	795	* @ei: eventfs_inode to be removed.
@@ -1044,8 +802,6 @@ static void eventfs_remove_rec(struct eventfs_inode *ei, int level) · 6 unmodified lines
1044	{	802	{
1045	struct eventfs_inode *ei_child;	803	struct eventfs_inode *ei_child;
1046		804
1047	if (!ei)
1048	return;
1049	/*	805	/*
1050	* Check recursion depth. It should never be greater than 3:	806	* Check recursion depth. It should never be greater than 3:
1051	* 0 - events/	807	* 0 - events/
@@ -1057,28 +813,11 @@ static void eventfs_remove_rec(struct eventfs_inode *ei, int level) · 5 unmodified lines
1057	return;	813	return;
1058		814
1059	/* search for nested folders or files */	815	/* search for nested folders or files */
1060	list_for_each_entry_srcu(ei_child, &ei->children, list,	816	list_for_each_entry(ei_child, &ei->children, list)
1061	lockdep_is_held(&eventfs_mutex)) {
1062	/* Children only have dentry if parent does */
1063	WARN_ON_ONCE(ei_child->dentry && !ei->dentry);
1064	eventfs_remove_rec(ei_child, level + 1);	817	eventfs_remove_rec(ei_child, level + 1);
1065	}
1066
1067		818
1068	ei->is_freed = 1;	819	list_del(&ei->list);
1069		820	free_ei(ei);
1070	for (int i = 0; i < ei->nr_entries; i++) {
1071	if (ei->d_children[i]) {
1072	/* Children only have dentry if parent does */
1073	WARN_ON_ONCE(!ei->dentry);
1074	unhook_dentry(ei->d_children[i]);
1075	}
1076	}
1077
1078	unhook_dentry(ei->dentry);
1079
1080	list_del_rcu(&ei->list);
1081	call_srcu(&eventfs_srcu, &ei->rcu, free_rcu_ei);
1082	}	821	}
1083		822
1084	/**	823	/**
@@ -1089,22 +828,12 @@ static void eventfs_remove_rec(struct eventfs_inode *ei, int level) · 4 unmodified lines
1089	*/	828	*/
1090	void eventfs_remove_dir(struct eventfs_inode *ei)	829	void eventfs_remove_dir(struct eventfs_inode *ei)
1091	{	830	{
1092	struct dentry *dentry;
1093
1094	if (!ei)	831	if (!ei)
1095	return;	832	return;
1096		833
1097	mutex_lock(&eventfs_mutex);	834	mutex_lock(&eventfs_mutex);
1098	dentry = ei->dentry;
1099	eventfs_remove_rec(ei, 0);	835	eventfs_remove_rec(ei, 0);
1100	mutex_unlock(&eventfs_mutex);	836	mutex_unlock(&eventfs_mutex);
1101
1102	/*
1103	* If any of the ei children has a dentry, then the ei itself
1104	* must have a dentry.
1105	*/
1106	if (dentry)
1107	simple_recursive_removal(dentry, NULL);
1108	}	837	}
1109		838
1110	/**	839	/**
@@ -1117,7 +846,11 @@ void eventfs_remove_events_dir(struct eventfs_inode *ei) · 6 unmodified lines
1117	{	846	{
1118	struct dentry *dentry;	847	struct dentry *dentry;
1119		848
1120	dentry = ei->dentry;	849	dentry = ei->events_dir;
		850	if (!dentry)
		851	return;
		852
		853	ei->events_dir = NULL;
1121	eventfs_remove_dir(ei);	854	eventfs_remove_dir(ei);
1122		855
1123	/*	856	/*
@@ -1127,5 +860,6 @@ void eventfs_remove_events_dir(struct eventfs_inode *ei) · 3 unmodified lines
1127	* sticks around while the other ei->dentry are created	860	* sticks around while the other ei->dentry are created
1128	* and destroyed dynamically.	861	* and destroyed dynamically.
1129	*/	862	*/
		863	d_invalidate(dentry);
1130	dput(dentry);	864	dput(dentry);
1131	}	865	}

fs/tracefs/inode.c+22−80

@@ -38,8 +38,6 @@ static struct inode tracefs_alloc_inode(struct super_block sb) · 37 unmodified lines
38	if (!ti)	38	if (!ti)
39	return NULL;	39	return NULL;
40		40
41	ti->flags = 0;
42
43	return &ti->vfs_inode;	41	return &ti->vfs_inode;
44	}	42	}
45		43
@@ -379,21 +377,30 @@ static const struct super_operations tracefs_super_operations = { · 333 unmodified lines
379	.show_options = tracefs_show_options,	377	.show_options = tracefs_show_options,
380	};	378	};
381		379
382	static void tracefs_dentry_iput(struct dentry dentry, struct inode inode)	380	/*
		381	* It would be cleaner if eventfs had its own dentry ops.
		382	*
		383	* Note that d_revalidate is called potentially under RCU,
		384	* so it can't take the eventfs mutex etc. It's fine - if
		385	* we open a file just as it's marked dead, things will
		386	* still work just fine, and just see the old stale case.
		387	*/
		388	static void tracefs_d_release(struct dentry *dentry)
383	{	389	{
384	struct tracefs_inode *ti;	390	if (dentry->d_fsdata)
		391	eventfs_d_release(dentry);
		392	}
385		393
386	if (!dentry \|\| !inode)	394	static int tracefs_d_revalidate(struct dentry *dentry, unsigned int flags)
387	return;	395	{
		396	struct eventfs_inode *ei = dentry->d_fsdata;
388		397
389	ti = get_tracefs(inode);	398	return !(ei && ei->is_freed);
390	if (ti && ti->flags & TRACEFS_EVENT_INODE)
391	eventfs_set_ei_status_free(ti, dentry);
392	iput(inode);
393	}	399	}
394		400
395	static const struct dentry_operations tracefs_dentry_operations = {	401	static const struct dentry_operations tracefs_dentry_operations = {
396	.d_iput = tracefs_dentry_iput,	402	.d_revalidate = tracefs_d_revalidate,
		403	.d_release = tracefs_d_release,
397	};	404	};
398		405
399	static int trace_fill_super(struct super_block sb, void data, int silent)	406	static int trace_fill_super(struct super_block sb, void data, int silent)
@@ -497,75 +504,6 @@ struct dentry tracefs_end_creating(struct dentry dentry) · 97 unmodified lines
497	return dentry;	504	return dentry;
498	}	505	}
499		506
500	/**
501	* eventfs_start_creating - start the process of creating a dentry
502	* @name: Name of the file created for the dentry
503	* @parent: The parent dentry where this dentry will be created
504	*
505	* This is a simple helper function for the dynamically created eventfs
506	* files. When the directory of the eventfs files are accessed, their
507	* dentries are created on the fly. This function is used to start that
508	* process.
509	*/
510	struct dentry eventfs_start_creating(const char name, struct dentry *parent)
511	{
512	struct dentry *dentry;
513	int error;
514
515	/* Must always have a parent. */
516	if (WARN_ON_ONCE(!parent))
517	return ERR_PTR(-EINVAL);
518
519	error = simple_pin_fs(&trace_fs_type, &tracefs_mount,
520	&tracefs_mount_count);
521	if (error)
522	return ERR_PTR(error);
523
524	if (unlikely(IS_DEADDIR(parent->d_inode)))
525	dentry = ERR_PTR(-ENOENT);
526	else
527	dentry = lookup_one_len(name, parent, strlen(name));
528
529	if (!IS_ERR(dentry) && dentry->d_inode) {
530	dput(dentry);
531	dentry = ERR_PTR(-EEXIST);
532	}
533
534	if (IS_ERR(dentry))
535	simple_release_fs(&tracefs_mount, &tracefs_mount_count);
536
537	return dentry;
538	}
539
540	/**
541	* eventfs_failed_creating - clean up a failed eventfs dentry creation
542	* @dentry: The dentry to clean up
543	*
544	* If after calling eventfs_start_creating(), a failure is detected, the
545	* resources created by eventfs_start_creating() needs to be cleaned up. In
546	* that case, this function should be called to perform that clean up.
547	*/
548	struct dentry eventfs_failed_creating(struct dentry dentry)
549	{
550	dput(dentry);
551	simple_release_fs(&tracefs_mount, &tracefs_mount_count);
552	return NULL;
553	}
554
555	/**
556	* eventfs_end_creating - Finish the process of creating a eventfs dentry
557	* @dentry: The dentry that has successfully been created.
558	*
559	* This function is currently just a place holder to match
560	* eventfs_start_creating(). In case any synchronization needs to be added,
561	* this function will be used to implement that without having to modify
562	* the callers of eventfs_start_creating().
563	*/
564	struct dentry eventfs_end_creating(struct dentry dentry)
565	{
566	return dentry;
567	}
568
569	/* Find the inode that this will use for default */	507	/* Find the inode that this will use for default */
570	static struct inode instance_inode(struct dentry parent, struct inode *inode)	508	static struct inode instance_inode(struct dentry parent, struct inode *inode)
571	{	509	{
@@ -779,7 +717,11 @@ static void init_once(void *foo) · 207 unmodified lines
779	{	717	{
780	struct tracefs_inode ti = (struct tracefs_inode ) foo;	718	struct tracefs_inode ti = (struct tracefs_inode ) foo;
781		719
		720	/* inode_init_once() calls memset() on the vfs_inode portion */
782	inode_init_once(&ti->vfs_inode);	721	inode_init_once(&ti->vfs_inode);
		722
		723	/* Zero out the rest */
		724	memset_after(ti, 0, vfs_inode);
783	}	725	}
784		726
785	static int __init tracefs_init(void)	727	static int __init tracefs_init(void)

fs/tracefs/internal.h+18−25

@@ -11,9 +11,10 @@ enum { · 10 unmodified lines
11	};	11	};
12		12
13	struct tracefs_inode {	13	struct tracefs_inode {
		14	struct inode vfs_inode;
		15	/* The below gets initialized with memset_after(ti, 0, vfs_inode) */
14	unsigned long flags;	16	unsigned long flags;
15	void *private;	17	void *private;
16	struct inode vfs_inode;
17	};	18	};
18		19
19	/*	20	/*
@@ -31,43 +32,37 @@ struct eventfs_attr { · 11 unmodified lines
31	/*	32	/*
32	* struct eventfs_inode - hold the properties of the eventfs directories.	33	* struct eventfs_inode - hold the properties of the eventfs directories.
33	* @list: link list into the parent directory	34	* @list: link list into the parent directory
		35	* @rcu: Union with @list for freeing
		36	* @children: link list into the child eventfs_inode
34	* @entries: the array of entries representing the files in the directory	37	* @entries: the array of entries representing the files in the directory
35	* @name: the name of the directory to create	38	* @name: the name of the directory to create
36	* @children: link list into the child eventfs_inode	39	* @events_dir: the dentry of the events directory
37	* @dentry: the dentry of the directory
38	* @d_parent: pointer to the parent's dentry
39	* @d_children: The array of dentries to represent the files when created
40	* @entry_attrs: Saved mode and ownership of the @d_children	40	* @entry_attrs: Saved mode and ownership of the @d_children
41	* @attr: Saved mode and ownership of eventfs_inode itself
42	* @data: The private data to pass to the callbacks	41	* @data: The private data to pass to the callbacks
		42	* @attr: Saved mode and ownership of eventfs_inode itself
43	* @is_freed: Flag set if the eventfs is on its way to be freed	43	* @is_freed: Flag set if the eventfs is on its way to be freed
44	* Note if is_freed is set, then dentry is corrupted.	44	* Note if is_freed is set, then dentry is corrupted.
		45	* @is_events: Flag set for only the top level "events" directory
45	* @nr_entries: The number of items in @entries	46	* @nr_entries: The number of items in @entries
		47	* @ino: The saved inode number
46	*/	48	*/
47	struct eventfs_inode {	49	struct eventfs_inode {
48	struct list_head list;	50	union {
		51	struct list_head list;
		52	struct rcu_head rcu;
		53	};
		54	struct list_head children;
49	const struct eventfs_entry *entries;	55	const struct eventfs_entry *entries;
50	const char *name;	56	const char *name;
51	struct list_head children;	57	struct dentry *events_dir;
52	struct dentry dentry; / Check is_freed to access */
53	struct dentry *d_parent;
54	struct dentry **d_children;
55	struct eventfs_attr *entry_attrs;	58	struct eventfs_attr *entry_attrs;
56	struct eventfs_attr attr;
57	void *data;	59	void *data;
		60	struct eventfs_attr attr;
		61	struct kref kref;
58	unsigned int is_freed:1;	62	unsigned int is_freed:1;
59	unsigned int is_events:1;	63	unsigned int is_events:1;
60	unsigned int nr_entries:30;	64	unsigned int nr_entries:30;
61	unsigned int ino;	65	unsigned int ino;
62	/*
63	* Union - used for deletion
64	* @llist: for calling dput() if needed after RCU
65	* @rcu: eventfs_inode to delete in RCU
66	*/
67	union {
68	struct llist_node llist;
69	struct rcu_head rcu;
70	};
71	};	66	};
72		67
73	static inline struct tracefs_inode get_tracefs(const struct inode inode)	68	static inline struct tracefs_inode get_tracefs(const struct inode inode)
@@ -79,9 +74,7 @@ struct dentry tracefs_start_creating(const char name, struct dentry *parent); · 5 unmodified lines
79	struct dentry tracefs_end_creating(struct dentry dentry);	74	struct dentry tracefs_end_creating(struct dentry dentry);
80	struct dentry tracefs_failed_creating(struct dentry dentry);	75	struct dentry tracefs_failed_creating(struct dentry dentry);
81	struct inode tracefs_get_inode(struct super_block sb);	76	struct inode tracefs_get_inode(struct super_block sb);
82	struct dentry eventfs_start_creating(const char name, struct dentry *parent);	77
83	struct dentry eventfs_failed_creating(struct dentry dentry);	78	void eventfs_d_release(struct dentry *dentry);
84	struct dentry eventfs_end_creating(struct dentry dentry);
85	void eventfs_set_ei_status_free(struct tracefs_inode ti, struct dentry dentry);
86		79
87	#endif /* _TRACEFS_INTERNAL_H */	80	#endif /* _TRACEFS_INTERNAL_H */

fs/xfs/libxfs/xfs_attr.c+3−3

@@ -421,10 +421,10 @@ xfs_attr_complete_op( · 420 unmodified lines
421	bool do_replace = args->op_flags & XFS_DA_OP_REPLACE;	421	bool do_replace = args->op_flags & XFS_DA_OP_REPLACE;
422		422
423	args->op_flags &= ~XFS_DA_OP_REPLACE;	423	args->op_flags &= ~XFS_DA_OP_REPLACE;
424	if (do_replace) {	424	args->attr_filter &= ~XFS_ATTR_INCOMPLETE;
425	args->attr_filter &= ~XFS_ATTR_INCOMPLETE;	425	if (do_replace)
426	return replace_state;	426	return replace_state;
427	}	427
428	return XFS_DAS_DONE;	428	return XFS_DAS_DONE;
429	}	429	}
430		430

fs/xfs/libxfs/xfs_rtbitmap.c+0−14

@@ -1118,20 +1118,6 @@ xfs_rtbitmap_blockcount( · 1117 unmodified lines
1118	return howmany_64(rtextents, NBBY * mp->m_sb.sb_blocksize);	1118	return howmany_64(rtextents, NBBY * mp->m_sb.sb_blocksize);
1119	}	1119	}
1120		1120
1121	/*
1122	* Compute the maximum level number of the realtime summary file, as defined by
1123	* mkfs. The historic use of highbit32 on a 64-bit quantity prohibited correct
1124	* use of rt volumes with more than 2^32 extents.
1125	*/
1126	uint8_t
1127	xfs_compute_rextslog(
1128	xfs_rtbxlen_t rtextents)
1129	{
1130	if (!rtextents)
1131	return 0;
1132	return xfs_highbit64(rtextents);
1133	}
1134
1135	/*	1121	/*
1136	* Compute the number of rtbitmap words needed to populate every block of a	1122	* Compute the number of rtbitmap words needed to populate every block of a
1137	* bitmap that is large enough to track the given number of rt extents.	1123	* bitmap that is large enough to track the given number of rt extents.

fs/xfs/libxfs/xfs_rtbitmap.h+0−16

@@ -351,20 +351,6 @@ xfs_rtfree_extent( · 350 unmodified lines
351	int xfs_rtfree_blocks(struct xfs_trans *tp, xfs_fsblock_t rtbno,	351	int xfs_rtfree_blocks(struct xfs_trans *tp, xfs_fsblock_t rtbno,
352	xfs_filblks_t rtlen);	352	xfs_filblks_t rtlen);
353		353
354	uint8_t xfs_compute_rextslog(xfs_rtbxlen_t rtextents);
355
356	/* Do we support an rt volume having this number of rtextents? */
357	static inline bool
358	xfs_validate_rtextents(
359	xfs_rtbxlen_t rtextents)
360	{
361	/* No runt rt volumes */
362	if (rtextents == 0)
363	return false;
364
365	return true;
366	}
367
368	xfs_filblks_t xfs_rtbitmap_blockcount(struct xfs_mount *mp, xfs_rtbxlen_t	354	xfs_filblks_t xfs_rtbitmap_blockcount(struct xfs_mount *mp, xfs_rtbxlen_t
369	rtextents);	355	rtextents);
370	unsigned long long xfs_rtbitmap_wordcount(struct xfs_mount *mp,	356	unsigned long long xfs_rtbitmap_wordcount(struct xfs_mount *mp,
@@ -383,8 +369,6 @@ unsigned long long xfs_rtsummary_wordcount(struct xfs_mount *mp, · 12 unmodified lines
383	# define xfs_rtsummary_read_buf(a,b) (-ENOSYS)	369	# define xfs_rtsummary_read_buf(a,b) (-ENOSYS)
384	# define xfs_rtbuf_cache_relse(a) (0)	370	# define xfs_rtbuf_cache_relse(a) (0)
385	# define xfs_rtalloc_extent_is_free(m,t,s,l,i) (-ENOSYS)	371	# define xfs_rtalloc_extent_is_free(m,t,s,l,i) (-ENOSYS)
386	# define xfs_compute_rextslog(rtx) (0)
387	# define xfs_validate_rtextents(rtx) (false)
388	static inline xfs_filblks_t	372	static inline xfs_filblks_t
389	xfs_rtbitmap_blockcount(struct xfs_mount *mp, xfs_rtbxlen_t rtextents)	373	xfs_rtbitmap_blockcount(struct xfs_mount *mp, xfs_rtbxlen_t rtextents)
390	{	374	{

fs/xfs/libxfs/xfs_sb.c+14−0

@@ -1377,3 +1377,17 @@ xfs_validate_stripe_geometry( · 1376 unmodified lines
1377	}	1377	}
1378	return true;	1378	return true;
1379	}	1379	}
		1380
		1381	/*
		1382	* Compute the maximum level number of the realtime summary file, as defined by
		1383	* mkfs. The historic use of highbit32 on a 64-bit quantity prohibited correct
		1384	* use of rt volumes with more than 2^32 extents.
		1385	*/
		1386	uint8_t
		1387	xfs_compute_rextslog(
		1388	xfs_rtbxlen_t rtextents)
		1389	{
		1390	if (!rtextents)
		1391	return 0;
		1392	return xfs_highbit64(rtextents);
		1393	}

fs/xfs/libxfs/xfs_sb.h+2−0

@@ -38,4 +38,6 @@ extern int xfs_sb_get_secondary(struct xfs_mount *mp, · 37 unmodified lines
38	extern bool xfs_validate_stripe_geometry(struct xfs_mount *mp,	38	extern bool xfs_validate_stripe_geometry(struct xfs_mount *mp,
39	__s64 sunit, __s64 swidth, int sectorsize, bool silent);	39	__s64 sunit, __s64 swidth, int sectorsize, bool silent);
40		40
		41	uint8_t xfs_compute_rextslog(xfs_rtbxlen_t rtextents);
		42
41	#endif /* __XFS_SB_H__ */	43	#endif /* __XFS_SB_H__ */

fs/xfs/libxfs/xfs_types.h+12−0

@@ -251,4 +251,16 @@ bool xfs_verify_fileoff(struct xfs_mount *mp, xfs_fileoff_t off); · 250 unmodified lines
251	bool xfs_verify_fileext(struct xfs_mount *mp, xfs_fileoff_t off,	251	bool xfs_verify_fileext(struct xfs_mount *mp, xfs_fileoff_t off,
252	xfs_fileoff_t len);	252	xfs_fileoff_t len);
253		253
		254	/* Do we support an rt volume having this number of rtextents? */
		255	static inline bool
		256	xfs_validate_rtextents(
		257	xfs_rtbxlen_t rtextents)
		258	{
		259	/* No runt rt volumes */
		260	if (rtextents == 0)
		261	return false;
		262
		263	return true;
		264	}
		265
254	#endif /* __XFS_TYPES_H__ */	266	#endif /* __XFS_TYPES_H__ */

fs/xfs/scrub/rtbitmap.c+1−0

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include "xfs_inode.h"	15	#include "xfs_inode.h"
16	#include "xfs_bmap.h"	16	#include "xfs_bmap.h"
17	#include "xfs_bit.h"	17	#include "xfs_bit.h"
		18	#include "xfs_sb.h"
18	#include "scrub/scrub.h"	19	#include "scrub/scrub.h"
19	#include "scrub/common.h"	20	#include "scrub/common.h"
20	#include "scrub/repair.h"	21	#include "scrub/repair.h"

fs/xfs/scrub/rtsummary.c+1−0

@@ -16,6 +16,7 @@ · 15 unmodified lines
16	#include "xfs_rtbitmap.h"	16	#include "xfs_rtbitmap.h"
17	#include "xfs_bit.h"	17	#include "xfs_bit.h"
18	#include "xfs_bmap.h"	18	#include "xfs_bmap.h"
		19	#include "xfs_sb.h"
19	#include "scrub/scrub.h"	20	#include "scrub/scrub.h"
20	#include "scrub/common.h"	21	#include "scrub/common.h"
21	#include "scrub/trace.h"	22	#include "scrub/trace.h"

include/linux/dmaengine.h+2−1

@@ -953,7 +953,8 @@ static inline int dmaengine_slave_config(struct dma_chan *chan, · 952 unmodified lines
953		953
954	static inline bool is_slave_direction(enum dma_transfer_direction direction)	954	static inline bool is_slave_direction(enum dma_transfer_direction direction)
955	{	955	{
956	return (direction == DMA_MEM_TO_DEV) \|\| (direction == DMA_DEV_TO_MEM);	956	return (direction == DMA_MEM_TO_DEV) \|\| (direction == DMA_DEV_TO_MEM) \|\|
		957	(direction == DMA_DEV_TO_DEV);
957	}	958	}
958		959
959	static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(	960	static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single(

include/linux/nvme.h+2−8

 	struct nvme_registered_ctrl_ext regctl_eds[];
 };
-enum nvme_async_event_type {
-	NVME_AER_TYPE_ERROR	= 0,
-	NVME_AER_TYPE_SMART	= 1,
-	NVME_AER_TYPE_NOTICE	= 2,
-};
 /* I/O commands */
 enum nvme_opcode {
 	};
 };
-static inline bool nvme_is_fabrics(struct nvme_command *cmd)
+static inline bool nvme_is_fabrics(const struct nvme_command *cmd)
 {
 	return cmd->common.opcode == nvme_fabrics_command;
 }
 	__u8		resv2[24];
 };
-static inline bool nvme_is_write(struct nvme_command *cmd)
+static inline bool nvme_is_write(const struct nvme_command *cmd)
 {
 	/*
 	 * What a mess...

include/linux/pci.h+5−0

 				  struct pci_saved_state **state);
 int pci_platform_power_transition(struct pci_dev *dev, pci_power_t state);
 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
+int pci_set_power_state_locked(struct pci_dev *dev, pci_power_t state);
 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
 void pci_pme_active(struct pci_dev *dev, bool enable);
 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
 		  void *userdata);
+void pci_walk_bus_locked(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
+			 void *userdata);
 int pci_cfg_space_size(struct pci_dev *dev);
 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
 void pci_setup_bridge(struct pci_bus *bus);
 static inline void pci_restore_state(struct pci_dev *dev) { }
 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
 { return 0; }
+static inline int pci_set_power_state_locked(struct pci_dev *dev, pci_power_t state)
+{ return 0; }
 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
 { return 0; }
 static inline pci_power_t pci_choose_state(struct pci_dev *dev,

include/net/cfg80211.h+4−0

  *	own the beacon_ies, but they're just pointers to the ones from the
  *	@hidden_beacon_bss struct)
  * @proberesp_ies: the information elements from the last Probe Response frame
+ * @proberesp_ecsa_stuck: ECSA element is stuck in the Probe Response frame,
+ *	cannot rely on it having valid data
  * @hidden_beacon_bss: in case this BSS struct represents a probe response from
  *	a BSS that hides the SSID in its beacon, this points to the BSS struct
  *	that holds the beacon data. @beacon_ies is still valid, of course, and
 	u8 chains;
 	s8 chain_signal[IEEE80211_MAX_CHAINS];
+	u8 proberesp_ecsa_stuck:1;
 	u8 bssid_index;
 	u8 max_bssid_indicator;

include/net/netfilter/nf_tables.h+14−2

 	return nft_set_ext(ext, NFT_SET_EXT_EXPRESSIONS);
 }
-static inline bool nft_set_elem_expired(const struct nft_set_ext *ext)
+static inline bool __nft_set_elem_expired(const struct nft_set_ext *ext,
+					  u64 tstamp)
 {
 	return nft_set_ext_exists(ext, NFT_SET_EXT_EXPIRATION) &&
-	       time_is_before_eq_jiffies64(*nft_set_ext_expiration(ext));
+	       time_after_eq64(tstamp, *nft_set_ext_expiration(ext));
+}
+static inline bool nft_set_elem_expired(const struct nft_set_ext *ext)
+{
+	return __nft_set_elem_expired(ext, get_jiffies_64());
 }
 static inline struct nft_set_ext *nft_set_elem_ext(const struct nft_set *set,
 	struct list_head	notify_list;
 	struct mutex		commit_mutex;
 	u64			table_handle;
+	u64			tstamp;
 	unsigned int		base_seq;
 	unsigned int		gc_seq;
 	u8			validate_state;
 	return net_generic(net, nf_tables_net_id);
 }
+static inline u64 nft_net_tstamp(const struct net *net)
+{
+	return nft_pernet(net)->tstamp;
+}
 #define __NFT_REDUCE_READONLY	1UL
 #define NFT_REDUCE_READONLY	(void *)__NFT_REDUCE_READONLY

include/sound/cs35l56.h+6−1

 #define CS35L56_DSP1_AHBM_WINDOW_DEBUG_0		0x25E2040
 #define CS35L56_DSP1_AHBM_WINDOW_DEBUG_1		0x25E2044
 #define CS35L56_DSP1_XMEM_UNPACKED24_0			0x2800000
+#define CS35L56_DSP1_FW_VER				0x2800010
 #define CS35L56_DSP1_HALO_STATE_A1			0x2801E58
 #define CS35L56_DSP1_HALO_STATE				0x28021E0
 #define CS35L56_DSP1_PM_CUR_STATE_A1			0x2804000
 #define CS35L56_CONTROL_PORT_READY_US			2200
 #define CS35L56_HALO_STATE_POLL_US			1000
-#define CS35L56_HALO_STATE_TIMEOUT_US			50000
+#define CS35L56_HALO_STATE_TIMEOUT_US			250000
 #define CS35L56_RESET_PULSE_MIN_US			1100
 #define CS35L56_WAKE_HOLD_TIME_US			1000
 extern const unsigned int cs35l56_tx_input_values[CS35L56_NUM_INPUT_SRC];
 int cs35l56_set_patch(struct cs35l56_base *cs35l56_base);
+int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base);
 int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command);
 int cs35l56_firmware_shutdown(struct cs35l56_base *cs35l56_base);
 int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base);
 int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base);
 int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire);
 void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp);
+int cs35l56_read_prot_status(struct cs35l56_base *cs35l56_base,
+			     bool *fw_missing, unsigned int *fw_version);
 int cs35l56_hw_init(struct cs35l56_base *cs35l56_base);
+int cs35l56_get_speaker_id(struct cs35l56_base *cs35l56_base);
 int cs35l56_get_bclk_freq_id(unsigned int freq);
 void cs35l56_fill_supply_names(struct regulator_bulk_data *data);

include/trace/events/ext4.h+4−7

 );
 TRACE_EVENT(ext4_discard_preallocations,
-	TP_PROTO(struct inode *inode, unsigned int len, unsigned int needed),
+	TP_PROTO(struct inode *inode, unsigned int len),
-	TP_ARGS(inode, len, needed),
+	TP_ARGS(inode, len),
 	TP_STRUCT__entry(
 		__field(	dev_t,		dev		)
 		__field(	ino_t,		ino		)
 		__field(	unsigned int,	len		)
-		__field(	unsigned int,	needed		)
 	),
 		__entry->dev	= inode->i_sb->s_dev;
 		__entry->ino	= inode->i_ino;
 		__entry->len	= len;
-		__entry->needed	= needed;
 	),
-	TP_printk("dev %d,%d ino %lu len: %u needed %u",
+	TP_printk("dev %d,%d ino %lu len: %u",
 		  MAJOR(__entry->dev), MINOR(__entry->dev),
-		  (unsigned long) __entry->ino, __entry->len,
+		  (unsigned long) __entry->ino, __entry->len)
-		  __entry->needed)
 );
 TRACE_EVENT(ext4_mb_discard_preallocations,

include/trace/events/rxrpc.h+5−3

 	EM(rxrpc_skb_eaten_by_unshare_nomem,	"ETN unshar-nm") \
 	EM(rxrpc_skb_get_conn_secured,		"GET conn-secd") \
 	EM(rxrpc_skb_get_conn_work,		"GET conn-work") \
+	EM(rxrpc_skb_get_last_nack,		"GET last-nack") \
 	EM(rxrpc_skb_get_local_work,		"GET locl-work") \
 	EM(rxrpc_skb_get_reject_work,		"GET rej-work ") \
 	EM(rxrpc_skb_get_to_recvmsg,		"GET to-recv  ") \
 	EM(rxrpc_skb_put_error_report,		"PUT error-rep") \
 	EM(rxrpc_skb_put_input,			"PUT input    ") \
 	EM(rxrpc_skb_put_jumbo_subpacket,	"PUT jumbo-sub") \
+	EM(rxrpc_skb_put_last_nack,		"PUT last-nack") \
 	EM(rxrpc_skb_put_purge,			"PUT purge    ") \
 	EM(rxrpc_skb_put_rotate,		"PUT rotate   ") \
 	EM(rxrpc_skb_put_unknown,		"PUT unknown  ") \
 		    memcpy(&__entry->sum, summary, sizeof(__entry->sum));
 			   ),
-	    TP_printk("c=%08x r=%08x %s q=%08x %s cw=%u ss=%u nA=%u,%u+%u r=%u b=%u u=%u d=%u l=%x%s%s%s",
+	    TP_printk("c=%08x r=%08x %s q=%08x %s cw=%u ss=%u nA=%u,%u+%u,%u b=%u u=%u d=%u l=%x%s%s%s",
 		      __entry->call,
 		      __entry->ack_serial,
 		      __print_symbolic(__entry->sum.ack_reason, rxrpc_ack_names),
 		      __print_symbolic(__entry->sum.mode, rxrpc_congest_modes),
 		      __entry->sum.cwnd,
 		      __entry->sum.ssthresh,
-		      __entry->sum.nr_acks, __entry->sum.saw_nacks,
+		      __entry->sum.nr_acks, __entry->sum.nr_retained_nacks,
 		      __entry->sum.nr_new_acks,
-		      __entry->sum.nr_rot_new_acks,
+		      __entry->sum.nr_new_nacks,
 		      __entry->top - __entry->hard_ack,
 		      __entry->sum.cumulative_acks,
 		      __entry->sum.dup_acks,

include/uapi/linux/netfilter/nf_tables.h+2−0

 /**
  * enum nft_rule_compat_flags - nf_tables rule compat flags
  *
+ * @NFT_RULE_COMPAT_F_UNUSED: unused
  * @NFT_RULE_COMPAT_F_INV: invert the check result
  */
 enum nft_rule_compat_flags {
+	NFT_RULE_COMPAT_F_UNUSED = (1 << 0),
 	NFT_RULE_COMPAT_F_INV	= (1 << 1),
 	NFT_RULE_COMPAT_F_MASK	= NFT_RULE_COMPAT_F_INV,
 };

include/uapi/linux/serial.h+7−6

@@ -145,12 +145,13 @@ struct serial_rs485 { · 144 unmodified lines
145	#define SER_RS485_ENABLED _BITUL(0)	145	#define SER_RS485_ENABLED _BITUL(0)
146	#define SER_RS485_RTS_ON_SEND _BITUL(1)	146	#define SER_RS485_RTS_ON_SEND _BITUL(1)
147	#define SER_RS485_RTS_AFTER_SEND _BITUL(2)	147	#define SER_RS485_RTS_AFTER_SEND _BITUL(2)
148	#define SER_RS485_RX_DURING_TX _BITUL(3)	148	/* Placeholder for bit 3: SER_RS485_RTS_BEFORE_SEND, which isn't used anymore */
149	#define SER_RS485_TERMINATE_BUS _BITUL(4)	149	#define SER_RS485_RX_DURING_TX _BITUL(4)
150	#define SER_RS485_ADDRB _BITUL(5)	150	#define SER_RS485_TERMINATE_BUS _BITUL(5)
151	#define SER_RS485_ADDR_RECV _BITUL(6)	151	#define SER_RS485_ADDRB _BITUL(6)
152	#define SER_RS485_ADDR_DEST _BITUL(7)	152	#define SER_RS485_ADDR_RECV _BITUL(7)
153	#define SER_RS485_MODE_RS422 _BITUL(8)	153	#define SER_RS485_ADDR_DEST _BITUL(8)
		154	#define SER_RS485_MODE_RS422 _BITUL(9)
154		155
155	__u32 delay_rts_before_send;	156	__u32 delay_rts_before_send;
156	__u32 delay_rts_after_send;	157	__u32 delay_rts_after_send;

init/Kconfig+3−3

@@ -876,13 +876,13 @@ config CC_NO_ARRAY_BOUNDS · 875 unmodified lines
876	bool	876	bool
877	default y if CC_IS_GCC && GCC_VERSION >= 110000 && GCC11_NO_ARRAY_BOUNDS	877	default y if CC_IS_GCC && GCC_VERSION >= 110000 && GCC11_NO_ARRAY_BOUNDS
878		878
879	# Currently, disable -Wstringop-overflow for GCC 11, globally.	879	# Currently, disable -Wstringop-overflow for GCC globally.
880	config GCC11_NO_STRINGOP_OVERFLOW	880	config GCC_NO_STRINGOP_OVERFLOW
881	def_bool y	881	def_bool y
882		882
883	config CC_NO_STRINGOP_OVERFLOW	883	config CC_NO_STRINGOP_OVERFLOW
884	bool	884	bool
885	default y if CC_IS_GCC && GCC_VERSION >= 110000 && GCC_VERSION < 120000 && GCC11_NO_STRINGOP_OVERFLOW	885	default y if CC_IS_GCC && GCC_NO_STRINGOP_OVERFLOW
886		886
887	config CC_STRINGOP_OVERFLOW	887	config CC_STRINGOP_OVERFLOW
888	bool	888	bool

io_uring/io_uring.h+7−1

 #include <trace/events/io_uring.h>
 #endif
 enum {
 	IOU_OK			= 0,
 	IOU_ISSUE_SKIP_COMPLETE	= -EIOCBQUEUED,
+	/*
+	 * Requeue the task_work to restart operations on this request. The
+	 * actual value isn't important, should just be not an otherwise
+	 * valid error code, yet less than -MAX_ERRNO and valid internally.
+	 */
+	IOU_REQUEUE		= -3072,
 	/*
 	 * Intended only when both IO_URING_F_MULTISHOT is passed
 	 * to indicate to the poll runner that multishot should be

io_uring/net.c+36−14

@@ -60,6 +60,7 @@ struct io_sr_msg { · 59 unmodified lines
60	unsigned len;	60	unsigned len;
61	unsigned done_io;	61	unsigned done_io;
62	unsigned msg_flags;	62	unsigned msg_flags;
		63	unsigned nr_multishot_loops;
63	u16 flags;	64	u16 flags;
64	/* initialised and used only by !msg send variants */	65	/* initialised and used only by !msg send variants */
65	u16 addr_len;	66	u16 addr_len;
@@ -70,6 +71,13 @@ struct io_sr_msg { · 4 unmodified lines
70	struct io_kiocb *notif;	71	struct io_kiocb *notif;
71	};	72	};
72		73
		74	/*
		75	* Number of times we'll try and do receives if there's more data. If we
		76	* exceed this limit, then add us to the back of the queue and retry from
		77	* there. This helps fairness between flooding clients.
		78	*/
		79	#define MULTISHOT_MAX_RETRY 32
		80
73	static inline bool io_check_multishot(struct io_kiocb *req,	81	static inline bool io_check_multishot(struct io_kiocb *req,
74	unsigned int issue_flags)	82	unsigned int issue_flags)
75	{	83	{
@@ -611,6 +619,7 @@ int io_recvmsg_prep(struct io_kiocb req, const struct io_uring_sqe sqe) · 535 unmodified lines
611	sr->msg_flags \|= MSG_CMSG_COMPAT;	619	sr->msg_flags \|= MSG_CMSG_COMPAT;
612	#endif	620	#endif
613	sr->done_io = 0;	621	sr->done_io = 0;
		622	sr->nr_multishot_loops = 0;
614	return 0;	623	return 0;
615	}	624	}
616		625
@@ -645,23 +654,35 @@ static inline bool io_recv_finish(struct io_kiocb req, int ret, · 28 unmodified lines
645	return true;	654	return true;
646	}	655	}
647		656
648	if (!mshot_finished) {	657	if (mshot_finished)
649	if (io_fill_cqe_req_aux(req, issue_flags & IO_URING_F_COMPLETE_DEFER,	658	goto finish;
650	*ret, cflags \| IORING_CQE_F_MORE)) {	659
651	io_recv_prep_retry(req);	660	/*
652	/* Known not-empty or unknown state, retry */	661	* Fill CQE for this receive and see if we should keep trying to
653	if (cflags & IORING_CQE_F_SOCK_NONEMPTY \|\|	662	* receive from this socket.
654	msg->msg_inq == -1)	663	*/
		664	if (io_fill_cqe_req_aux(req, issue_flags & IO_URING_F_COMPLETE_DEFER,
		665	*ret, cflags \| IORING_CQE_F_MORE)) {
		666	struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg);
		667	int mshot_retry_ret = IOU_ISSUE_SKIP_COMPLETE;
		668
		669	io_recv_prep_retry(req);
		670	/* Known not-empty or unknown state, retry */
		671	if (cflags & IORING_CQE_F_SOCK_NONEMPTY \|\| msg->msg_inq == -1) {
		672	if (sr->nr_multishot_loops++ < MULTISHOT_MAX_RETRY)
655	return false;	673	return false;
656	if (issue_flags & IO_URING_F_MULTISHOT)	674	/* mshot retries exceeded, force a requeue */
657	*ret = IOU_ISSUE_SKIP_COMPLETE;	675	sr->nr_multishot_loops = 0;
658	else	676	mshot_retry_ret = IOU_REQUEUE;
659	*ret = -EAGAIN;
660	return true;
661	}	677	}
662	/* Otherwise stop multishot but use the current result. */	678	if (issue_flags & IO_URING_F_MULTISHOT)
		679	*ret = mshot_retry_ret;
		680	else
		681	*ret = -EAGAIN;
		682	return true;
663	}	683	}
664		684	/* Otherwise stop multishot but use the current result. */
		685	finish:
665	io_req_set_res(req, *ret, cflags);	686	io_req_set_res(req, *ret, cflags);
666		687
667	if (issue_flags & IO_URING_F_MULTISHOT)	688	if (issue_flags & IO_URING_F_MULTISHOT)
@@ -902,6 +923,7 @@ retry_multishot: · 234 unmodified lines
902	if (!buf)	923	if (!buf)
903	return -ENOBUFS;	924	return -ENOBUFS;
904	sr->buf = buf;	925	sr->buf = buf;
		926	sr->len = len;
905	}	927	}
906		928
907	ret = import_ubuf(ITER_DEST, sr->buf, len, &msg.msg_iter);	929	ret = import_ubuf(ITER_DEST, sr->buf, len, &msg.msg_iter);

io_uring/poll.c+28−21

 	IOU_POLL_NO_ACTION = 1,
 	IOU_POLL_REMOVE_POLL_USE_RES = 2,
 	IOU_POLL_REISSUE = 3,
+	IOU_POLL_REQUEUE = 4,
 };
+static void __io_poll_execute(struct io_kiocb *req, int mask)
+{
+	unsigned flags = 0;
+	io_req_set_res(req, mask, 0);
+	req->io_task_work.func = io_poll_task_func;
+	trace_io_uring_task_add(req, mask);
+	if (!(req->flags & REQ_F_POLL_NO_LAZY))
+		flags = IOU_F_TWQ_LAZY_WAKE;
+	__io_req_task_work_add(req, flags);
+}
+static inline void io_poll_execute(struct io_kiocb *req, int res)
+{
+	if (io_poll_get_ownership(req))
+		__io_poll_execute(req, res);
+}
 /*
  * All poll tw should go through this. Checks for poll events, manages
  * references, does rewait, etc.
 			int ret = io_poll_issue(req, ts);
 			if (ret == IOU_STOP_MULTISHOT)
 				return IOU_POLL_REMOVE_POLL_USE_RES;
+			else if (ret == IOU_REQUEUE)
+				return IOU_POLL_REQUEUE;
 			if (ret < 0)
 				return ret;
 		}
 	int ret;
 	ret = io_poll_check_events(req, ts);
-	if (ret == IOU_POLL_NO_ACTION)
+	if (ret == IOU_POLL_NO_ACTION) {
+		return;
+	} else if (ret == IOU_POLL_REQUEUE) {
+		__io_poll_execute(req, 0);
 		return;
+	}
 	io_poll_remove_entries(req);
 	io_poll_tw_hash_eject(req, ts);
 	}
 }
-static void __io_poll_execute(struct io_kiocb *req, int mask)
-{
-	unsigned flags = 0;
-	io_req_set_res(req, mask, 0);
-	req->io_task_work.func = io_poll_task_func;
-	trace_io_uring_task_add(req, mask);
-	if (!(req->flags & REQ_F_POLL_NO_LAZY))
-		flags = IOU_F_TWQ_LAZY_WAKE;
-	__io_req_task_work_add(req, flags);
-}
-static inline void io_poll_execute(struct io_kiocb *req, int res)
-{
-	if (io_poll_get_ownership(req))
-		__io_poll_execute(req, res);
-}
 static void io_poll_cancel_req(struct io_kiocb *req)
 {
 	io_poll_mark_cancelled(req);

io_uring/poll.h+9−0

@@ -24,6 +24,15 @@ struct async_poll { · 23 unmodified lines
24	struct io_poll *double_poll;	24	struct io_poll *double_poll;
25	};	25	};
26		26
		27	/*
		28	* Must only be called inside issue_flags & IO_URING_F_MULTISHOT, or
		29	* potentially other cases where we already "own" this poll request.
		30	*/
		31	static inline void io_poll_multishot_retry(struct io_kiocb *req)
		32	{
		33	atomic_inc(&req->poll_refs);
		34	}
		35
27	int io_poll_add_prep(struct io_kiocb req, const struct io_uring_sqe sqe);	36	int io_poll_add_prep(struct io_kiocb req, const struct io_uring_sqe sqe);
28	int io_poll_add(struct io_kiocb *req, unsigned int issue_flags);	37	int io_poll_add(struct io_kiocb *req, unsigned int issue_flags);
29		38

io_uring/rw.c+9−1

 #include "opdef.h"
 #include "kbuf.h"
 #include "rsrc.h"
+#include "poll.h"
 #include "rw.h"
 struct io_rw {
 		if (io_fill_cqe_req_aux(req,
 					issue_flags & IO_URING_F_COMPLETE_DEFER,
 					ret, cflags | IORING_CQE_F_MORE)) {
-			if (issue_flags & IO_URING_F_MULTISHOT)
+			if (issue_flags & IO_URING_F_MULTISHOT) {
+				/*
+				 * Force retry, as we might have more data to
+				 * be read and otherwise it won't get retried
+				 * until (if ever) another poll is triggered.
+				 */
+				io_poll_multishot_retry(req);
 				return IOU_ISSUE_SKIP_COMPLETE;
+			}
 			return -EAGAIN;
 		}
 	}

kernel/trace/ring_buffer.c+1−1

@@ -944,7 +944,7 @@ __poll_t ring_buffer_poll_wait(struct trace_buffer *buffer, int cpu, · 943 unmodified lines
944	full = 0;	944	full = 0;
945	} else {	945	} else {
946	if (!cpumask_test_cpu(cpu, buffer->cpumask))	946	if (!cpumask_test_cpu(cpu, buffer->cpumask))
947	return -EINVAL;	947	return EPOLLERR;
948		948
949	cpu_buffer = buffer->buffers[cpu];	949	cpu_buffer = buffer->buffers[cpu];
950	work = &cpu_buffer->irq_work;	950	work = &cpu_buffer->irq_work;

kernel/trace/trace_osnoise.c+3−3

 	tlat = this_cpu_tmr_var();
 	tlat->count = 0;
+	hrtimer_init(&tlat->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_PINNED_HARD);
+	tlat->timer.function = timerlat_irq;
 	migrate_enable();
 	return 0;
 };
 		tlat->tracing_thread = false;
 		tlat->kthread = current;
-		hrtimer_init(&tlat->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_PINNED_HARD);
-		tlat->timer.function = timerlat_irq;
 		/* Annotate now to drift new period */
 		tlat->abs_period = hrtimer_cb_get_time(&tlat->timer);

net/core/datagram.c+1−1

@@ -751,7 +751,7 @@ size_t memcpy_to_iter_csum(void *iter_to, size_t progress, · 750 unmodified lines
751	size_t len, void from, void priv2)	751	size_t len, void from, void priv2)
752	{	752	{
753	__wsum *csum = priv2;	753	__wsum *csum = priv2;
754	__wsum next = csum_partial_copy_nocheck(from, iter_to, len);	754	__wsum next = csum_partial_copy_nocheck(from + progress, iter_to, len);
755		755
756	csum = csum_block_add(csum, next, progress);	756	csum = csum_block_add(csum, next, progress);
757	return 0;	757	return 0;

net/devlink/core.c+6−6

@@ -46,7 +46,7 @@ struct devlink_rel { · 45 unmodified lines
46	u32 obj_index;	46	u32 obj_index;
47	devlink_rel_notify_cb_t *notify_cb;	47	devlink_rel_notify_cb_t *notify_cb;
48	devlink_rel_cleanup_cb_t *cleanup_cb;	48	devlink_rel_cleanup_cb_t *cleanup_cb;
49	struct work_struct notify_work;	49	struct delayed_work notify_work;
50	} nested_in;	50	} nested_in;
51	};	51	};
52		52
@@ -70,7 +70,7 @@ static void __devlink_rel_put(struct devlink_rel *rel) · 17 unmodified lines
70	static void devlink_rel_nested_in_notify_work(struct work_struct *work)	70	static void devlink_rel_nested_in_notify_work(struct work_struct *work)
71	{	71	{
72	struct devlink_rel *rel = container_of(work, struct devlink_rel,	72	struct devlink_rel *rel = container_of(work, struct devlink_rel,
73	nested_in.notify_work);	73	nested_in.notify_work.work);
74	struct devlink *devlink;	74	struct devlink *devlink;
75		75
76	devlink = devlinks_xa_get(rel->nested_in.devlink_index);	76	devlink = devlinks_xa_get(rel->nested_in.devlink_index);
@@ -96,13 +96,13 @@ rel_put: · 19 unmodified lines
96	return;	96	return;
97		97
98	reschedule_work:	98	reschedule_work:
99	schedule_work(&rel->nested_in.notify_work);	99	schedule_delayed_work(&rel->nested_in.notify_work, 1);
100	}	100	}
101		101
102	static void devlink_rel_nested_in_notify_work_schedule(struct devlink_rel *rel)	102	static void devlink_rel_nested_in_notify_work_schedule(struct devlink_rel *rel)
103	{	103	{
104	__devlink_rel_get(rel);	104	__devlink_rel_get(rel);
105	schedule_work(&rel->nested_in.notify_work);	105	schedule_delayed_work(&rel->nested_in.notify_work, 0);
106	}	106	}
107		107
108	static struct devlink_rel *devlink_rel_alloc(void)	108	static struct devlink_rel *devlink_rel_alloc(void)
@@ -123,8 +123,8 @@ static struct devlink_rel *devlink_rel_alloc(void) · 14 unmodified lines
123	}	123	}
124		124
125	refcount_set(&rel->refcount, 1);	125	refcount_set(&rel->refcount, 1);
126	INIT_WORK(&rel->nested_in.notify_work,	126	INIT_DELAYED_WORK(&rel->nested_in.notify_work,
127	&devlink_rel_nested_in_notify_work);	127	&devlink_rel_nested_in_notify_work);
128	return rel;	128	return rel;
129	}	129	}
130		130

net/ipv4/af_inet.c+4−2

 int inet_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
 {
-	if (sk->sk_family == AF_INET)
+	unsigned int family = READ_ONCE(sk->sk_family);
+	if (family == AF_INET)
 		return ip_recv_error(sk, msg, len, addr_len);
 #if IS_ENABLED(CONFIG_IPV6)
-	if (sk->sk_family == AF_INET6)
+	if (family == AF_INET6)
 		return pingv6_ops.ipv6_recv_error(sk, msg, len, addr_len);
 #endif
 	return -EINVAL;

net/ipv4/ip_tunnel_core.c+1−1

@@ -332,7 +332,7 @@ static int iptunnel_pmtud_build_icmpv6(struct sk_buff *skb, int mtu) · 331 unmodified lines
332	};	332	};
333	skb_reset_network_header(skb);	333	skb_reset_network_header(skb);
334		334
335	csum = csum_partial(icmp6h, len, 0);	335	csum = skb_checksum(skb, skb_transport_offset(skb), len, 0);
336	icmp6h->icmp6_cksum = csum_ipv6_magic(&nip6h->saddr, &nip6h->daddr, len,	336	icmp6h->icmp6_cksum = csum_ipv6_magic(&nip6h->saddr, &nip6h->daddr, len,
337	IPPROTO_ICMPV6, csum);	337	IPPROTO_ICMPV6, csum);
338		338

net/mac80211/cfg.c+9−7

  * Copyright 2006-2010	Johannes Berg <johannes@sipsolutions.net>
  * Copyright 2013-2015  Intel Mobile Communications GmbH
  * Copyright (C) 2015-2017 Intel Deutschland GmbH
- * Copyright (C) 2018-2022 Intel Corporation
+ * Copyright (C) 2018-2024 Intel Corporation
  */
 #include <linux/ieee80211.h>
 ieee80211_set_unsol_bcast_probe_resp(struct ieee80211_sub_if_data *sdata,
 				     struct cfg80211_unsol_bcast_probe_resp *params,
 				     struct ieee80211_link_data *link,
-				     struct ieee80211_bss_conf *link_conf)
+				     struct ieee80211_bss_conf *link_conf,
+				     u64 *changed)
 {
 	struct unsol_bcast_probe_resp_data *new, *old = NULL;
 		RCU_INIT_POINTER(link->u.ap.unsol_bcast_probe_resp, NULL);
 	}
-	return BSS_CHANGED_UNSOL_BCAST_PROBE_RESP;
+	*changed |= BSS_CHANGED_UNSOL_BCAST_PROBE_RESP;
+	return 0;
 }
 static int ieee80211_set_ftm_responder_params(
 	err = ieee80211_set_unsol_bcast_probe_resp(sdata,
 						   &params->unsol_bcast_probe_resp,
-						   link, link_conf);
+						   link, link_conf, &changed);
 	if (err < 0)
 		goto error;
-	changed |= err;
 	err = drv_start_ap(sdata->local, sdata, link_conf);
 	if (err) {
 	err = ieee80211_set_unsol_bcast_probe_resp(sdata,
 						   &params->unsol_bcast_probe_resp,
-						   link, link_conf);
+						   link, link_conf, &changed);
 	if (err < 0)
 		return err;
-	changed |= err;
 	if (beacon->he_bss_color_valid &&
 	    beacon->he_bss_color.enabled != link_conf->he_bss_color.enabled) {
 					      sband->band);
 	}
+	ieee80211_sta_set_rx_nss(link_sta);
 	return ret;
 }

net/mac80211/debugfs_netdev.c+2−2

@@ -997,8 +997,8 @@ static void add_link_files(struct ieee80211_link_data *link, · 996 unmodified lines
997	}	997	}
998	}	998	}
999		999
1000	void ieee80211_debugfs_add_netdev(struct ieee80211_sub_if_data *sdata,	1000	static void ieee80211_debugfs_add_netdev(struct ieee80211_sub_if_data *sdata,
1001	bool mld_vif)	1001	bool mld_vif)
1002	{	1002	{
1003	char buf[10+IFNAMSIZ];	1003	char buf[10+IFNAMSIZ];
1004		1004

net/mac80211/debugfs_netdev.h+0−5

 #include "ieee80211_i.h"
 #ifdef CONFIG_MAC80211_DEBUGFS
-void ieee80211_debugfs_add_netdev(struct ieee80211_sub_if_data *sdata,
-				  bool mld_vif);
 void ieee80211_debugfs_remove_netdev(struct ieee80211_sub_if_data *sdata);
 void ieee80211_debugfs_rename_netdev(struct ieee80211_sub_if_data *sdata);
 void ieee80211_debugfs_recreate_netdev(struct ieee80211_sub_if_data *sdata,
 void ieee80211_link_debugfs_drv_add(struct ieee80211_link_data *link);
 void ieee80211_link_debugfs_drv_remove(struct ieee80211_link_data *link);
 #else
-static inline void ieee80211_debugfs_add_netdev(
-	struct ieee80211_sub_if_data *sdata, bool mld_vif)
-{}
 static inline void ieee80211_debugfs_remove_netdev(
 	struct ieee80211_sub_if_data *sdata)
 {}

net/mac80211/iface.c+1−1

@@ -1783,7 +1783,7 @@ static void ieee80211_setup_sdata(struct ieee80211_sub_if_data *sdata, · 1782 unmodified lines
1783	/* need to do this after the switch so vif.type is correct */	1783	/* need to do this after the switch so vif.type is correct */
1784	ieee80211_link_setup(&sdata->deflink);	1784	ieee80211_link_setup(&sdata->deflink);
1785		1785
1786	ieee80211_debugfs_add_netdev(sdata, false);	1786	ieee80211_debugfs_recreate_netdev(sdata, false);
1787	}	1787	}
1788		1788
1789	static int ieee80211_runtime_change_iftype(struct ieee80211_sub_if_data *sdata,	1789	static int ieee80211_runtime_change_iftype(struct ieee80211_sub_if_data *sdata,

net/mac80211/mlme.c+81−33

@@ -8,7 +8,7 @@ · 7 unmodified lines
8	* Copyright 2007, Michael Wu <flamingice@sourmilk.net>	8	* Copyright 2007, Michael Wu <flamingice@sourmilk.net>
9	* Copyright 2013-2014 Intel Mobile Communications GmbH	9	* Copyright 2013-2014 Intel Mobile Communications GmbH
10	* Copyright (C) 2015 - 2017 Intel Deutschland GmbH	10	* Copyright (C) 2015 - 2017 Intel Deutschland GmbH
11	* Copyright (C) 2018 - 2023 Intel Corporation	11	* Copyright (C) 2018 - 2024 Intel Corporation
12	*/	12	*/
13		13
14	#include <linux/delay.h>	14	#include <linux/delay.h>
@@ -2918,6 +2918,7 @@ static void ieee80211_set_disassoc(struct ieee80211_sub_if_data *sdata, · 2903 unmodified lines
2918		2918
2919	/* other links will be destroyed */	2919	/* other links will be destroyed */
2920	sdata->deflink.u.mgd.bss = NULL;	2920	sdata->deflink.u.mgd.bss = NULL;
		2921	sdata->deflink.smps_mode = IEEE80211_SMPS_OFF;
2921		2922
2922	netif_carrier_off(sdata->dev);	2923	netif_carrier_off(sdata->dev);
2923		2924
@@ -5045,9 +5046,6 @@ static int ieee80211_prep_channel(struct ieee80211_sub_if_data *sdata, · 2121 unmodified lines
5045	if (!link)	5046	if (!link)
5046	return 0;	5047	return 0;
5047		5048
5048	/* will change later if needed */
5049	link->smps_mode = IEEE80211_SMPS_OFF;
5050
5051	/*	5049	/*
5052	* If this fails (possibly due to channel context sharing	5050	* If this fails (possibly due to channel context sharing
5053	* on incompatible channels, e.g. 80+80 and 160 sharing the	5051	* on incompatible channels, e.g. 80+80 and 160 sharing the
@@ -7096,6 +7094,7 @@ void ieee80211_mgd_setup_link(struct ieee80211_link_data *link) · 2042 unmodified lines
7096	link->u.mgd.p2p_noa_index = -1;	7094	link->u.mgd.p2p_noa_index = -1;
7097	link->u.mgd.conn_flags = 0;	7095	link->u.mgd.conn_flags = 0;
7098	link->conf->bssid = link->u.mgd.bssid;	7096	link->conf->bssid = link->u.mgd.bssid;
		7097	link->smps_mode = IEEE80211_SMPS_OFF;
7099		7098
7100	wiphy_work_init(&link->u.mgd.request_smps_work,	7099	wiphy_work_init(&link->u.mgd.request_smps_work,
7101	ieee80211_request_smps_mgd_work);	7100	ieee80211_request_smps_mgd_work);
@@ -7309,6 +7308,75 @@ out_err: · 207 unmodified lines
7309	return err;	7308	return err;
7310	}	7309	}
7311		7310
		7311	static bool ieee80211_mgd_csa_present(struct ieee80211_sub_if_data *sdata,
		7312	const struct cfg80211_bss_ies *ies,
		7313	u8 cur_channel, bool ignore_ecsa)
		7314	{
		7315	const struct element csa_elem, ecsa_elem;
		7316	struct ieee80211_channel_sw_ie *csa = NULL;
		7317	struct ieee80211_ext_chansw_ie *ecsa = NULL;
		7318
		7319	if (!ies)
		7320	return false;
		7321
		7322	csa_elem = cfg80211_find_elem(WLAN_EID_CHANNEL_SWITCH,
		7323	ies->data, ies->len);
		7324	if (csa_elem && csa_elem->datalen == sizeof(*csa))
		7325	csa = (void *)csa_elem->data;
		7326
		7327	ecsa_elem = cfg80211_find_elem(WLAN_EID_EXT_CHANSWITCH_ANN,
		7328	ies->data, ies->len);
		7329	if (ecsa_elem && ecsa_elem->datalen == sizeof(*ecsa))
		7330	ecsa = (void *)ecsa_elem->data;
		7331
		7332	if (csa && csa->count == 0)
		7333	csa = NULL;
		7334	if (csa && !csa->mode && csa->new_ch_num == cur_channel)
		7335	csa = NULL;
		7336
		7337	if (ecsa && ecsa->count == 0)
		7338	ecsa = NULL;
		7339	if (ecsa && !ecsa->mode && ecsa->new_ch_num == cur_channel)
		7340	ecsa = NULL;
		7341
		7342	if (ignore_ecsa && ecsa) {
		7343	sdata_info(sdata,
		7344	"Ignoring ECSA in probe response - was considered stuck!\n");
		7345	return csa;
		7346	}
		7347
		7348	return csa \|\| ecsa;
		7349	}
		7350
		7351	static bool ieee80211_mgd_csa_in_process(struct ieee80211_sub_if_data *sdata,
		7352	struct cfg80211_bss *bss)
		7353	{
		7354	u8 cur_channel;
		7355	bool ret;
		7356
		7357	cur_channel = ieee80211_frequency_to_channel(bss->channel->center_freq);
		7358
		7359	rcu_read_lock();
		7360	if (ieee80211_mgd_csa_present(sdata,
		7361	rcu_dereference(bss->beacon_ies),
		7362	cur_channel, false)) {
		7363	ret = true;
		7364	goto out;
		7365	}
		7366
		7367	if (ieee80211_mgd_csa_present(sdata,
		7368	rcu_dereference(bss->proberesp_ies),
		7369	cur_channel, bss->proberesp_ecsa_stuck)) {
		7370	ret = true;
		7371	goto out;
		7372	}
		7373
		7374	ret = false;
		7375	out:
		7376	rcu_read_unlock();
		7377	return ret;
		7378	}
		7379
7312	/* config hooks */	7380	/* config hooks */
7313	int ieee80211_mgd_auth(struct ieee80211_sub_if_data *sdata,	7381	int ieee80211_mgd_auth(struct ieee80211_sub_if_data *sdata,
7314	struct cfg80211_auth_request *req)	7382	struct cfg80211_auth_request *req)
@@ -7317,7 +7385,6 @@ int ieee80211_mgd_auth(struct ieee80211_sub_if_data *sdata, · 2 unmodified lines
7317	struct ieee80211_if_managed *ifmgd = &sdata->u.mgd;	7385	struct ieee80211_if_managed *ifmgd = &sdata->u.mgd;
7318	struct ieee80211_mgd_auth_data *auth_data;	7386	struct ieee80211_mgd_auth_data *auth_data;
7319	struct ieee80211_link_data *link;	7387	struct ieee80211_link_data *link;
7320	const struct element csa_elem, ecsa_elem;
7321	u16 auth_alg;	7388	u16 auth_alg;
7322	int err;	7389	int err;
7323	bool cont_auth;	7390	bool cont_auth;
@@ -7360,21 +7427,10 @@ int ieee80211_mgd_auth(struct ieee80211_sub_if_data *sdata, · 36 unmodified lines
7360	if (ifmgd->assoc_data)	7427	if (ifmgd->assoc_data)
7361	return -EBUSY;	7428	return -EBUSY;
7362		7429
7363	rcu_read_lock();	7430	if (ieee80211_mgd_csa_in_process(sdata, req->bss)) {
7364	csa_elem = ieee80211_bss_get_elem(req->bss, WLAN_EID_CHANNEL_SWITCH);
7365	ecsa_elem = ieee80211_bss_get_elem(req->bss,
7366	WLAN_EID_EXT_CHANSWITCH_ANN);
7367	if ((csa_elem &&
7368	csa_elem->datalen == sizeof(struct ieee80211_channel_sw_ie) &&
7369	((struct ieee80211_channel_sw_ie *)csa_elem->data)->count != 0) \|\|
7370	(ecsa_elem &&
7371	ecsa_elem->datalen == sizeof(struct ieee80211_ext_chansw_ie) &&
7372	((struct ieee80211_ext_chansw_ie *)ecsa_elem->data)->count != 0)) {
7373	rcu_read_unlock();
7374	sdata_info(sdata, "AP is in CSA process, reject auth\n");	7431	sdata_info(sdata, "AP is in CSA process, reject auth\n");
7375	return -EINVAL;	7432	return -EINVAL;
7376	}	7433	}
7377	rcu_read_unlock();
7378		7434
7379	auth_data = kzalloc(sizeof(*auth_data) + req->auth_data_len +	7435	auth_data = kzalloc(sizeof(*auth_data) + req->auth_data_len +
7380	req->ie_len, GFP_KERNEL);	7436	req->ie_len, GFP_KERNEL);
@@ -7684,7 +7740,7 @@ int ieee80211_mgd_assoc(struct ieee80211_sub_if_data *sdata, · 303 unmodified lines
7684	struct ieee80211_local *local = sdata->local;	7740	struct ieee80211_local *local = sdata->local;
7685	struct ieee80211_if_managed *ifmgd = &sdata->u.mgd;	7741	struct ieee80211_if_managed *ifmgd = &sdata->u.mgd;
7686	struct ieee80211_mgd_assoc_data *assoc_data;	7742	struct ieee80211_mgd_assoc_data *assoc_data;
7687	const struct element ssid_elem, csa_elem, *ecsa_elem;	7743	const struct element *ssid_elem;
7688	struct ieee80211_vif_cfg *vif_cfg = &sdata->vif.cfg;	7744	struct ieee80211_vif_cfg *vif_cfg = &sdata->vif.cfg;
7689	ieee80211_conn_flags_t conn_flags = 0;	7745	ieee80211_conn_flags_t conn_flags = 0;
7690	struct ieee80211_link_data *link;	7746	struct ieee80211_link_data *link;
@@ -7707,23 +7763,15 @@ int ieee80211_mgd_assoc(struct ieee80211_sub_if_data *sdata, · 16 unmodified lines
7707		7763
7708	cbss = req->link_id < 0 ? req->bss : req->links[req->link_id].bss;	7764	cbss = req->link_id < 0 ? req->bss : req->links[req->link_id].bss;
7709		7765
7710	rcu_read_lock();	7766	if (ieee80211_mgd_csa_in_process(sdata, cbss)) {
7711	ssid_elem = ieee80211_bss_get_elem(cbss, WLAN_EID_SSID);	7767	sdata_info(sdata, "AP is in CSA process, reject assoc\n");
7712	if (!ssid_elem \|\| ssid_elem->datalen > sizeof(assoc_data->ssid)) {
7713	rcu_read_unlock();
7714	kfree(assoc_data);	7768	kfree(assoc_data);
7715	return -EINVAL;	7769	return -EINVAL;
7716	}	7770	}
7717		7771
7718	csa_elem = ieee80211_bss_get_elem(cbss, WLAN_EID_CHANNEL_SWITCH);	7772	rcu_read_lock();
7719	ecsa_elem = ieee80211_bss_get_elem(cbss, WLAN_EID_EXT_CHANSWITCH_ANN);	7773	ssid_elem = ieee80211_bss_get_elem(cbss, WLAN_EID_SSID);
7720	if ((csa_elem &&	7774	if (!ssid_elem \|\| ssid_elem->datalen > sizeof(assoc_data->ssid)) {
7721	csa_elem->datalen == sizeof(struct ieee80211_channel_sw_ie) &&
7722	((struct ieee80211_channel_sw_ie *)csa_elem->data)->count != 0) \|\|
7723	(ecsa_elem &&
7724	ecsa_elem->datalen == sizeof(struct ieee80211_ext_chansw_ie) &&
7725	((struct ieee80211_ext_chansw_ie *)ecsa_elem->data)->count != 0)) {
7726	sdata_info(sdata, "AP is in CSA process, reject assoc\n");
7727	rcu_read_unlock();	7775	rcu_read_unlock();
7728	kfree(assoc_data);	7776	kfree(assoc_data);
7729	return -EINVAL;	7777	return -EINVAL;
@@ -7998,8 +8046,7 @@ int ieee80211_mgd_assoc(struct ieee80211_sub_if_data *sdata, · 268 unmodified lines
7998		8046
7999	rcu_read_lock();	8047	rcu_read_lock();
8000	beacon_ies = rcu_dereference(req->bss->beacon_ies);	8048	beacon_ies = rcu_dereference(req->bss->beacon_ies);
8001		8049	if (!beacon_ies) {
8002	if (beacon_ies) {
8003	/*	8050	/*
8004	* Wait up to one beacon interval ...	8051	* Wait up to one beacon interval ...
8005	* should this be more if we miss one?	8052	* should this be more if we miss one?
@@ -8080,6 +8127,7 @@ int ieee80211_mgd_deauth(struct ieee80211_sub_if_data *sdata, · 74 unmodified lines
8080	ieee80211_report_disconnect(sdata, frame_buf,	8127	ieee80211_report_disconnect(sdata, frame_buf,
8081	sizeof(frame_buf), true,	8128	sizeof(frame_buf), true,
8082	req->reason_code, false);	8129	req->reason_code, false);
		8130	drv_mgd_complete_tx(sdata->local, sdata, &info);
8083	return 0;	8131	return 0;
8084	}	8132	}
8085		8133

net/mac80211/scan.c+18−12

@@ -9,7 +9,7 @@ · 8 unmodified lines
9	* Copyright 2007, Michael Wu <flamingice@sourmilk.net>	9	* Copyright 2007, Michael Wu <flamingice@sourmilk.net>
10	* Copyright 2013-2015 Intel Mobile Communications GmbH	10	* Copyright 2013-2015 Intel Mobile Communications GmbH
11	* Copyright 2016-2017 Intel Deutschland GmbH	11	* Copyright 2016-2017 Intel Deutschland GmbH
12	* Copyright (C) 2018-2023 Intel Corporation	12	* Copyright (C) 2018-2024 Intel Corporation
13	*/	13	*/
14		14
15	#include <linux/if_arp.h>	15	#include <linux/if_arp.h>
@@ -237,14 +237,18 @@ ieee80211_bss_info_update(struct ieee80211_local *local, · 221 unmodified lines
237	}	237	}
238		238
239	static bool ieee80211_scan_accept_presp(struct ieee80211_sub_if_data *sdata,	239	static bool ieee80211_scan_accept_presp(struct ieee80211_sub_if_data *sdata,
		240	struct ieee80211_channel *channel,
240	u32 scan_flags, const u8 *da)	241	u32 scan_flags, const u8 *da)
241	{	242	{
242	if (!sdata)	243	if (!sdata)
243	return false;	244	return false;
244	/* accept broadcast for OCE */	245
245	if (scan_flags & NL80211_SCAN_FLAG_ACCEPT_BCAST_PROBE_RESP &&	246	/* accept broadcast on 6 GHz and for OCE */
246	is_broadcast_ether_addr(da))	247	if (is_broadcast_ether_addr(da) &&
		248	(channel->band == NL80211_BAND_6GHZ \|\|
		249	scan_flags & NL80211_SCAN_FLAG_ACCEPT_BCAST_PROBE_RESP))
247	return true;	250	return true;
		251
248	if (scan_flags & NL80211_SCAN_FLAG_RANDOM_ADDR)	252	if (scan_flags & NL80211_SCAN_FLAG_RANDOM_ADDR)
249	return true;	253	return true;
250	return ether_addr_equal(da, sdata->vif.addr);	254	return ether_addr_equal(da, sdata->vif.addr);
@@ -293,6 +297,12 @@ void ieee80211_scan_rx(struct ieee80211_local local, struct sk_buff skb) · 42 unmodified lines
293	wiphy_delayed_work_queue(local->hw.wiphy, &local->scan_work, 0);	297	wiphy_delayed_work_queue(local->hw.wiphy, &local->scan_work, 0);
294	}	298	}
295		299
		300	channel = ieee80211_get_channel_khz(local->hw.wiphy,
		301	ieee80211_rx_status_to_khz(rx_status));
		302
		303	if (!channel \|\| channel->flags & IEEE80211_CHAN_DISABLED)
		304	return;
		305
296	if (ieee80211_is_probe_resp(mgmt->frame_control)) {	306	if (ieee80211_is_probe_resp(mgmt->frame_control)) {
297	struct cfg80211_scan_request *scan_req;	307	struct cfg80211_scan_request *scan_req;
298	struct cfg80211_sched_scan_request *sched_scan_req;	308	struct cfg80211_sched_scan_request *sched_scan_req;
@@ -310,19 +320,15 @@ void ieee80211_scan_rx(struct ieee80211_local local, struct sk_buff skb) · 11 unmodified lines
310	/* ignore ProbeResp to foreign address or non-bcast (OCE)	320	/* ignore ProbeResp to foreign address or non-bcast (OCE)
311	* unless scanning with randomised address	321	* unless scanning with randomised address
312	*/	322	*/
313	if (!ieee80211_scan_accept_presp(sdata1, scan_req_flags,	323	if (!ieee80211_scan_accept_presp(sdata1, channel,
		324	scan_req_flags,
314	mgmt->da) &&	325	mgmt->da) &&
315	!ieee80211_scan_accept_presp(sdata2, sched_scan_req_flags,	326	!ieee80211_scan_accept_presp(sdata2, channel,
		327	sched_scan_req_flags,
316	mgmt->da))	328	mgmt->da))
317	return;	329	return;
318	}	330	}
319		331
320	channel = ieee80211_get_channel_khz(local->hw.wiphy,
321	ieee80211_rx_status_to_khz(rx_status));
322
323	if (!channel \|\| channel->flags & IEEE80211_CHAN_DISABLED)
324	return;
325
326	bss = ieee80211_bss_info_update(local, rx_status,	332	bss = ieee80211_bss_info_update(local, rx_status,
327	mgmt, skb->len,	333	mgmt, skb->len,
328	channel);	334	channel);

net/mac80211/tx.c+4−3

 			/* DA SA BSSID */
 			build.da_offs = offsetof(struct ieee80211_hdr, addr1);
 			build.sa_offs = offsetof(struct ieee80211_hdr, addr2);
+			rcu_read_lock();
 			link = rcu_dereference(sdata->link[tdls_link_id]);
-			if (WARN_ON_ONCE(!link))
+			if (!WARN_ON_ONCE(!link))
-				break;
+				memcpy(hdr->addr3, link->u.mgd.bssid, ETH_ALEN);
-			memcpy(hdr->addr3, link->u.mgd.bssid, ETH_ALEN);
+			rcu_read_unlock();
 			build.hdr_len = 24;
 			break;
 		}

net/mac80211/wbrf.c+0−2

@@ -23,8 +23,6 @@ void ieee80211_check_wbrf_support(struct ieee80211_local *local) · 22 unmodified lines
23	return;	23	return;
24		24
25	local->wbrf_supported = acpi_amd_wbrf_supported_producer(dev);	25	local->wbrf_supported = acpi_amd_wbrf_supported_producer(dev);
26	dev_dbg(dev, "WBRF is %s supported\n",
27	local->wbrf_supported ? "" : "not");
28	}	26	}
29		27
30	static void get_chan_freq_boundary(u32 center_freq, u32 bandwidth, u64 start, u64 end)	28	static void get_chan_freq_boundary(u32 center_freq, u32 bandwidth, u64 start, u64 end)

net/netfilter/ipset/ip_set_core.c+2−0

 	return ret;
 cleanup:
+	set->variant->cancel_gc(set);
 	set->variant->destroy(set);
 put_out:
 	module_put(set->type->me);
 		set = ip_set(inst, i);
 		if (set) {
 			ip_set(inst, i) = NULL;
+			set->variant->cancel_gc(set);
 			ip_set_destroy_set(set);
 		}
 	}

net/netfilter/ipset/ip_set_hash_gen.h+2−2

@@ -432,7 +432,7 @@ mtype_ahash_destroy(struct ip_set set, struct htable t, bool ext_destroy) · 431 unmodified lines
432	u32 i;	432	u32 i;
433		433
434	for (i = 0; i < jhash_size(t->htable_bits); i++) {	434	for (i = 0; i < jhash_size(t->htable_bits); i++) {
435	n = __ipset_dereference(hbucket(t, i));	435	n = (__force struct hbucket *)hbucket(t, i);
436	if (!n)	436	if (!n)
437	continue;	437	continue;
438	if (set->extensions & IPSET_EXT_DESTROY && ext_destroy)	438	if (set->extensions & IPSET_EXT_DESTROY && ext_destroy)
@@ -452,7 +452,7 @@ mtype_destroy(struct ip_set *set) · 13 unmodified lines
452	struct htype *h = set->data;	452	struct htype *h = set->data;
453	struct list_head l, lt;	453	struct list_head l, lt;
454		454
455	mtype_ahash_destroy(set, ipset_dereference_nfnl(h->table), true);	455	mtype_ahash_destroy(set, (__force struct htable *)h->table, true);
456	list_for_each_safe(l, lt, &h->ad) {	456	list_for_each_safe(l, lt, &h->ad) {
457	list_del(l);	457	list_del(l);
458	kfree(l);	458	kfree(l);

net/netfilter/nf_conntrack_netlink.c+8−4

 struct ctnetlink_filter {
 	u8 family;
+	bool zone_filter;
 	u_int32_t orig_flags;
 	u_int32_t reply_flags;
 	if (err)
 		goto err_filter;
-	err = ctnetlink_parse_zone(cda[CTA_ZONE], &filter->zone);
+	if (cda[CTA_ZONE]) {
-	if (err < 0)
+		err = ctnetlink_parse_zone(cda[CTA_ZONE], &filter->zone);
-		goto err_filter;
+		if (err < 0)
+			goto err_filter;
+		filter->zone_filter = true;
+	}
 	if (!cda[CTA_FILTER])
 		return filter;
 	if (filter->family && nf_ct_l3num(ct) != filter->family)
 		goto ignore_entry;
-	if (filter->zone.id != NF_CT_DEFAULT_ZONE_ID &&
+	if (filter->zone_filter &&
 	    !nf_ct_zone_equal_any(ct, &filter->zone))
 		goto ignore_entry;

net/netfilter/nf_tables_api.c+3−1

 struct nft_trans_gc *nft_trans_gc_catchall_sync(struct nft_trans_gc *gc)
 {
 	struct nft_set_elem_catchall *catchall, *next;
+	u64 tstamp = nft_net_tstamp(gc->net);
 	const struct nft_set *set = gc->set;
 	struct nft_elem_priv *elem_priv;
 	struct nft_set_ext *ext;
 	list_for_each_entry_safe(catchall, next, &set->catchall_list, list) {
 		ext = nft_set_elem_ext(set, catchall->elem);
-		if (!nft_set_elem_expired(ext))
+		if (!__nft_set_elem_expired(ext, tstamp))
 			continue;
 		gc = nft_trans_gc_queue_sync(gc, GFP_KERNEL);
 	bool genid_ok;
 	mutex_lock(&nft_net->commit_mutex);
+	nft_net->tstamp = get_jiffies_64();
 	genid_ok = genid == 0 || nft_net->base_seq == genid;
 	if (!genid_ok)

net/netfilter/nfnetlink_queue.c+10−3

 	if (verdict == NF_ACCEPT ||
 	    verdict == NF_REPEAT ||
 	    verdict == NF_STOP) {
+		unsigned int ct_verdict = verdict;
 		rcu_read_lock();
 		ct_hook = rcu_dereference(nf_ct_hook);
 		if (ct_hook)
-			verdict = ct_hook->update(entry->state.net, entry->skb);
+			ct_verdict = ct_hook->update(entry->state.net, entry->skb);
 		rcu_read_unlock();
-		switch (verdict & NF_VERDICT_MASK) {
+		switch (ct_verdict & NF_VERDICT_MASK) {
+		case NF_ACCEPT:
+			/* follow userspace verdict, could be REPEAT */
+			break;
 		case NF_STOLEN:
 			nf_queue_entry_free(entry);
 			return;
+		default:
+			verdict = ct_verdict & NF_VERDICT_MASK;
+			break;
 		}
 	}
 	nf_reinject(entry, verdict);
 }

net/netfilter/nft_compat.c+12−5

 static const struct nla_policy nft_target_policy[NFTA_TARGET_MAX + 1] = {
 	[NFTA_TARGET_NAME]	= { .type = NLA_NUL_STRING },
-	[NFTA_TARGET_REV]	= { .type = NLA_U32 },
+	[NFTA_TARGET_REV]	= NLA_POLICY_MAX(NLA_BE32, 255),
 	[NFTA_TARGET_INFO]	= { .type = NLA_BINARY },
 };
 static int nft_parse_compat(const struct nlattr *attr, u16 *proto, bool *inv)
 {
 	struct nlattr *tb[NFTA_RULE_COMPAT_MAX+1];
+	u32 l4proto;
 	u32 flags;
 	int err;
 		return -EINVAL;
 	flags = ntohl(nla_get_be32(tb[NFTA_RULE_COMPAT_FLAGS]));
-	if (flags & ~NFT_RULE_COMPAT_F_MASK)
+	if (flags & NFT_RULE_COMPAT_F_UNUSED ||
+	    flags & ~NFT_RULE_COMPAT_F_MASK)
 		return -EINVAL;
 	if (flags & NFT_RULE_COMPAT_F_INV)
 		*inv = true;
-	*proto = ntohl(nla_get_be32(tb[NFTA_RULE_COMPAT_PROTO]));
+	l4proto = ntohl(nla_get_be32(tb[NFTA_RULE_COMPAT_PROTO]));
+	if (l4proto > U16_MAX)
+		return -EINVAL;
+	*proto = l4proto;
 	return 0;
 }
 static const struct nla_policy nft_match_policy[NFTA_MATCH_MAX + 1] = {
 	[NFTA_MATCH_NAME]	= { .type = NLA_NUL_STRING },
-	[NFTA_MATCH_REV]	= { .type = NLA_U32 },
+	[NFTA_MATCH_REV]	= NLA_POLICY_MAX(NLA_BE32, 255),
 	[NFTA_MATCH_INFO]	= { .type = NLA_BINARY },
 };
 static const struct nla_policy nfnl_compat_policy_get[NFTA_COMPAT_MAX+1] = {
 	[NFTA_COMPAT_NAME]	= { .type = NLA_NUL_STRING,
 				    .len = NFT_COMPAT_NAME_MAX-1 },
-	[NFTA_COMPAT_REV]	= { .type = NLA_U32 },
+	[NFTA_COMPAT_REV]	= NLA_POLICY_MAX(NLA_BE32, 255),
 	[NFTA_COMPAT_TYPE]	= { .type = NLA_U32 },
 };

net/netfilter/nft_ct.c+3−0

 		break;
 #endif
 	case NFT_CT_ID:
+		if (tb[NFTA_CT_DIRECTION])
+			return -EINVAL;
 		len = sizeof(u32);
 		break;
 	default:

net/netfilter/nft_set_hash.c+7−1

 	const struct nft_set		*set;
 	const u32			*key;
 	u8				genmask;
+	u64				tstamp;
 };
 static inline u32 nft_rhash_key(const void *data, u32 len, u32 seed)
 		return 1;
 	if (nft_set_elem_is_dead(&he->ext))
 		return 1;
-	if (nft_set_elem_expired(&he->ext))
+	if (__nft_set_elem_expired(&he->ext, x->tstamp))
 		return 1;
 	if (!nft_set_elem_active(&he->ext, x->genmask))
 		return 1;
 		.genmask = nft_genmask_cur(net),
 		.set	 = set,
 		.key	 = key,
+		.tstamp  = get_jiffies_64(),
 	};
 	he = rhashtable_lookup(&priv->ht, &arg, nft_rhash_params);
 		.genmask = nft_genmask_cur(net),
 		.set	 = set,
 		.key	 = elem->key.val.data,
+		.tstamp  = get_jiffies_64(),
 	};
 	he = rhashtable_lookup(&priv->ht, &arg, nft_rhash_params);
 		.genmask = NFT_GENMASK_ANY,
 		.set	 = set,
 		.key	 = key,
+		.tstamp  = get_jiffies_64(),
 	};
 	he = rhashtable_lookup(&priv->ht, &arg, nft_rhash_params);
 		.genmask = nft_genmask_next(net),
 		.set	 = set,
 		.key	 = elem->key.val.data,
+		.tstamp	 = nft_net_tstamp(net),
 	};
 	struct nft_rhash_elem *prev;
 		.genmask = nft_genmask_next(net),
 		.set	 = set,
 		.key	 = elem->key.val.data,
+		.tstamp	 = nft_net_tstamp(net),
 	};
 	rcu_read_lock();

net/netfilter/nft_set_pipapo.c+66−62

@@ -342,9 +342,6 @@ · 341 unmodified lines
342	#include "nft_set_pipapo_avx2.h"	342	#include "nft_set_pipapo_avx2.h"
343	#include "nft_set_pipapo.h"	343	#include "nft_set_pipapo.h"
344		344
345	/* Current working bitmap index, toggled between field matches */
346	static DEFINE_PER_CPU(bool, nft_pipapo_scratch_index);
347
348	/**	345	/**
349	* pipapo_refill() - For each set bit, set bits from selected mapping table item	346	* pipapo_refill() - For each set bit, set bits from selected mapping table item
350	* @map: Bitmap to be scanned for set bits	347	* @map: Bitmap to be scanned for set bits
@@ -412,6 +409,7 @@ bool nft_pipapo_lookup(const struct net net, const struct nft_set set, · 61 unmodified lines
412	const u32 key, const struct nft_set_ext *ext)	409	const u32 key, const struct nft_set_ext *ext)
413	{	410	{
414	struct nft_pipapo *priv = nft_set_priv(set);	411	struct nft_pipapo *priv = nft_set_priv(set);
		412	struct nft_pipapo_scratch *scratch;
415	unsigned long res_map, fill_map;	413	unsigned long res_map, fill_map;
416	u8 genmask = nft_genmask_cur(net);	414	u8 genmask = nft_genmask_cur(net);
417	const u8 rp = (const u8 )key;	415	const u8 rp = (const u8 )key;
@@ -422,15 +420,17 @@ bool nft_pipapo_lookup(const struct net net, const struct nft_set set, · 4 unmodified lines
422		420
423	local_bh_disable();	421	local_bh_disable();
424		422
425	map_index = raw_cpu_read(nft_pipapo_scratch_index);
426
427	m = rcu_dereference(priv->match);	423	m = rcu_dereference(priv->match);
428		424
429	if (unlikely(!m \|\| !*raw_cpu_ptr(m->scratch)))	425	if (unlikely(!m \|\| !*raw_cpu_ptr(m->scratch)))
430	goto out;	426	goto out;
431		427
432	res_map = *raw_cpu_ptr(m->scratch) + (map_index ? m->bsize_max : 0);	428	scratch = *raw_cpu_ptr(m->scratch);
433	fill_map = *raw_cpu_ptr(m->scratch) + (map_index ? 0 : m->bsize_max);	429
		430	map_index = scratch->map_index;
		431
		432	res_map = scratch->map + (map_index ? m->bsize_max : 0);
		433	fill_map = scratch->map + (map_index ? 0 : m->bsize_max);
434		434
435	memset(res_map, 0xff, m->bsize_max * sizeof(*res_map));	435	memset(res_map, 0xff, m->bsize_max * sizeof(*res_map));
436		436
@@ -460,7 +460,7 @@ next_match: · 23 unmodified lines
460	b = pipapo_refill(res_map, f->bsize, f->rules, fill_map, f->mt,	460	b = pipapo_refill(res_map, f->bsize, f->rules, fill_map, f->mt,
461	last);	461	last);
462	if (b < 0) {	462	if (b < 0) {
463	raw_cpu_write(nft_pipapo_scratch_index, map_index);	463	scratch->map_index = map_index;
464	local_bh_enable();	464	local_bh_enable();
465		465
466	return false;	466	return false;
@@ -477,7 +477,7 @@ next_match: · 10 unmodified lines
477	* current inactive bitmap is clean and can be reused as	477	* current inactive bitmap is clean and can be reused as
478	* next bitmap (not initial) for the next packet.	478	* next bitmap (not initial) for the next packet.
479	*/	479	*/
480	raw_cpu_write(nft_pipapo_scratch_index, map_index);	480	scratch->map_index = map_index;
481	local_bh_enable();	481	local_bh_enable();
482		482
483	return true;	483	return true;
@@ -504,6 +504,7 @@ out: · 20 unmodified lines
504	* @set: nftables API set representation	504	* @set: nftables API set representation
505	* @data: Key data to be matched against existing elements	505	* @data: Key data to be matched against existing elements
506	* @genmask: If set, check that element is active in given genmask	506	* @genmask: If set, check that element is active in given genmask
		507	* @tstamp: timestamp to check for expired elements
507	*	508	*
508	* This is essentially the same as the lookup function, except that it matches	509	* This is essentially the same as the lookup function, except that it matches
509	* key data against the uncommitted copy and doesn't use preallocated maps for	510	* key data against the uncommitted copy and doesn't use preallocated maps for
@@ -513,7 +514,8 @@ out: · 3 unmodified lines
513	*/	514	*/
514	static struct nft_pipapo_elem pipapo_get(const struct net net,	515	static struct nft_pipapo_elem pipapo_get(const struct net net,
515	const struct nft_set *set,	516	const struct nft_set *set,
516	const u8 *data, u8 genmask)	517	const u8 *data, u8 genmask,
		518	u64 tstamp)
517	{	519	{
518	struct nft_pipapo_elem *ret = ERR_PTR(-ENOENT);	520	struct nft_pipapo_elem *ret = ERR_PTR(-ENOENT);
519	struct nft_pipapo *priv = nft_set_priv(set);	521	struct nft_pipapo *priv = nft_set_priv(set);
@@ -566,7 +568,7 @@ next_match: · 46 unmodified lines
566	goto out;	568	goto out;
567		569
568	if (last) {	570	if (last) {
569	if (nft_set_elem_expired(&f->mt[b].e->ext))	571	if (__nft_set_elem_expired(&f->mt[b].e->ext, tstamp))
570	goto next_match;	572	goto next_match;
571	if ((genmask &&	573	if ((genmask &&
572	!nft_set_elem_active(&f->mt[b].e->ext, genmask)))	574	!nft_set_elem_active(&f->mt[b].e->ext, genmask)))
@@ -603,10 +605,10 @@ static struct nft_elem_priv * · 30 unmodified lines
603	nft_pipapo_get(const struct net net, const struct nft_set set,	605	nft_pipapo_get(const struct net net, const struct nft_set set,
604	const struct nft_set_elem *elem, unsigned int flags)	606	const struct nft_set_elem *elem, unsigned int flags)
605	{	607	{
606	static struct nft_pipapo_elem *e;	608	struct nft_pipapo_elem *e;
607		609
608	e = pipapo_get(net, set, (const u8 *)elem->key.val.data,	610	e = pipapo_get(net, set, (const u8 *)elem->key.val.data,
609	nft_genmask_cur(net));	611	nft_genmask_cur(net), get_jiffies_64());
610	if (IS_ERR(e))	612	if (IS_ERR(e))
611	return ERR_CAST(e);	613	return ERR_CAST(e);
612		614
@@ -1108,6 +1110,25 @@ static void pipapo_map(struct nft_pipapo_match *m, · 495 unmodified lines
1108	f->mt[map[i].to + j].e = e;	1110	f->mt[map[i].to + j].e = e;
1109	}	1111	}
1110		1112
		1113	/**
		1114	* pipapo_free_scratch() - Free per-CPU map at original (not aligned) address
		1115	* @m: Matching data
		1116	* @cpu: CPU number
		1117	*/
		1118	static void pipapo_free_scratch(const struct nft_pipapo_match *m, unsigned int cpu)
		1119	{
		1120	struct nft_pipapo_scratch *s;
		1121	void *mem;
		1122
		1123	s = *per_cpu_ptr(m->scratch, cpu);
		1124	if (!s)
		1125	return;
		1126
		1127	mem = s;
		1128	mem -= s->align_off;
		1129	kfree(mem);
		1130	}
		1131
1111	/**	1132	/**
1112	* pipapo_realloc_scratch() - Reallocate scratch maps for partial match results	1133	* pipapo_realloc_scratch() - Reallocate scratch maps for partial match results
1113	* @clone: Copy of matching data with pending insertions and deletions	1134	* @clone: Copy of matching data with pending insertions and deletions
@@ -1121,12 +1142,13 @@ static int pipapo_realloc_scratch(struct nft_pipapo_match *clone, · 7 unmodified lines
1121	int i;	1142	int i;
1122		1143
1123	for_each_possible_cpu(i) {	1144	for_each_possible_cpu(i) {
1124	unsigned long *scratch;	1145	struct nft_pipapo_scratch *scratch;
1125	#ifdef NFT_PIPAPO_ALIGN	1146	#ifdef NFT_PIPAPO_ALIGN
1126	unsigned long *scratch_aligned;	1147	void *scratch_aligned;
		1148	u32 align_off;
1127	#endif	1149	#endif
1128		1150	scratch = kzalloc_node(struct_size(scratch, map,
1129	scratch = kzalloc_node(bsize_max * sizeof(scratch) 2 +	1151	bsize_max * 2) +
1130	NFT_PIPAPO_ALIGN_HEADROOM,	1152	NFT_PIPAPO_ALIGN_HEADROOM,
1131	GFP_KERNEL, cpu_to_node(i));	1153	GFP_KERNEL, cpu_to_node(i));
1132	if (!scratch) {	1154	if (!scratch) {
@@ -1140,14 +1162,25 @@ static int pipapo_realloc_scratch(struct nft_pipapo_match *clone, · 7 unmodified lines
1140	return -ENOMEM;	1162	return -ENOMEM;
1141	}	1163	}
1142		1164
1143	kfree(*per_cpu_ptr(clone->scratch, i));	1165	pipapo_free_scratch(clone, i);
1144
1145	*per_cpu_ptr(clone->scratch, i) = scratch;
1146		1166
1147	#ifdef NFT_PIPAPO_ALIGN	1167	#ifdef NFT_PIPAPO_ALIGN
1148	scratch_aligned = NFT_PIPAPO_LT_ALIGN(scratch);	1168	/* Align &scratch->map (not the struct itself): the extra
1149	*per_cpu_ptr(clone->scratch_aligned, i) = scratch_aligned;	1169	* %NFT_PIPAPO_ALIGN_HEADROOM bytes passed to kzalloc_node()
		1170	* above guarantee we can waste up to those bytes in order
		1171	* to align the map field regardless of its offset within
		1172	* the struct.
		1173	*/
		1174	BUILD_BUG_ON(offsetof(struct nft_pipapo_scratch, map) > NFT_PIPAPO_ALIGN_HEADROOM);
		1175
		1176	scratch_aligned = NFT_PIPAPO_LT_ALIGN(&scratch->map);
		1177	scratch_aligned -= offsetof(struct nft_pipapo_scratch, map);
		1178	align_off = scratch_aligned - (void *)scratch;
		1179
		1180	scratch = scratch_aligned;
		1181	scratch->align_off = align_off;
1150	#endif	1182	#endif
		1183	*per_cpu_ptr(clone->scratch, i) = scratch;
1151	}	1184	}
1152		1185
1153	return 0;	1186	return 0;
@@ -1173,6 +1206,7 @@ static int nft_pipapo_insert(const struct net net, const struct nft_set set, · 19 unmodified lines
1173	struct nft_pipapo_match *m = priv->clone;	1206	struct nft_pipapo_match *m = priv->clone;
1174	u8 genmask = nft_genmask_next(net);	1207	u8 genmask = nft_genmask_next(net);
1175	struct nft_pipapo_elem e, dup;	1208	struct nft_pipapo_elem e, dup;
		1209	u64 tstamp = nft_net_tstamp(net);
1176	struct nft_pipapo_field *f;	1210	struct nft_pipapo_field *f;
1177	const u8 start_p, end_p;	1211	const u8 start_p, end_p;
1178	int i, bsize_max, err = 0;	1212	int i, bsize_max, err = 0;
@@ -1182,7 +1216,7 @@ static int nft_pipapo_insert(const struct net net, const struct nft_set set, · 3 unmodified lines
1182	else	1216	else
1183	end = start;	1217	end = start;
1184		1218
1185	dup = pipapo_get(net, set, start, genmask);	1219	dup = pipapo_get(net, set, start, genmask, tstamp);
1186	if (!IS_ERR(dup)) {	1220	if (!IS_ERR(dup)) {
1187	/* Check if we already have the same exact entry */	1221	/* Check if we already have the same exact entry */
1188	const struct nft_data dup_key, dup_end;	1222	const struct nft_data dup_key, dup_end;
@@ -1204,7 +1238,7 @@ static int nft_pipapo_insert(const struct net net, const struct nft_set set, · 15 unmodified lines
1204		1238
1205	if (PTR_ERR(dup) == -ENOENT) {	1239	if (PTR_ERR(dup) == -ENOENT) {
1206	/* Look for partially overlapping entries */	1240	/* Look for partially overlapping entries */
1207	dup = pipapo_get(net, set, end, nft_genmask_next(net));	1241	dup = pipapo_get(net, set, end, nft_genmask_next(net), tstamp);
1208	}	1242	}
1209		1243
1210	if (PTR_ERR(dup) != -ENOENT) {	1244	if (PTR_ERR(dup) != -ENOENT) {
@@ -1301,11 +1335,6 @@ static struct nft_pipapo_match pipapo_clone(struct nft_pipapo_match old) · 90 unmodified lines
1301	if (!new->scratch)	1335	if (!new->scratch)
1302	goto out_scratch;	1336	goto out_scratch;
1303		1337
1304	#ifdef NFT_PIPAPO_ALIGN
1305	new->scratch_aligned = alloc_percpu(*new->scratch_aligned);
1306	if (!new->scratch_aligned)
1307	goto out_scratch;
1308	#endif
1309	for_each_possible_cpu(i)	1338	for_each_possible_cpu(i)
1310	*per_cpu_ptr(new->scratch, i) = NULL;	1339	*per_cpu_ptr(new->scratch, i) = NULL;
1311		1340
@@ -1357,10 +1386,7 @@ out_lt: · 45 unmodified lines
1357	}	1386	}
1358	out_scratch_realloc:	1387	out_scratch_realloc:
1359	for_each_possible_cpu(i)	1388	for_each_possible_cpu(i)
1360	kfree(*per_cpu_ptr(new->scratch, i));	1389	pipapo_free_scratch(new, i);
1361	#ifdef NFT_PIPAPO_ALIGN
1362	free_percpu(new->scratch_aligned);
1363	#endif
1364	out_scratch:	1390	out_scratch:
1365	free_percpu(new->scratch);	1391	free_percpu(new->scratch);
1366	kfree(new);	1392	kfree(new);
@@ -1560,6 +1586,7 @@ static void pipapo_gc(struct nft_set set, struct nft_pipapo_match m) · 193 unmodified lines
1560	{	1586	{
1561	struct nft_pipapo *priv = nft_set_priv(set);	1587	struct nft_pipapo *priv = nft_set_priv(set);
1562	struct net *net = read_pnet(&set->net);	1588	struct net *net = read_pnet(&set->net);
		1589	u64 tstamp = nft_net_tstamp(net);
1563	int rules_f0, first_rule = 0;	1590	int rules_f0, first_rule = 0;
1564	struct nft_pipapo_elem *e;	1591	struct nft_pipapo_elem *e;
1565	struct nft_trans_gc *gc;	1592	struct nft_trans_gc *gc;
@@ -1594,7 +1621,7 @@ static void pipapo_gc(struct nft_set set, struct nft_pipapo_match m) · 28 unmodified lines
1594	/* synchronous gc never fails, there is no need to set on	1621	/* synchronous gc never fails, there is no need to set on
1595	* NFT_SET_ELEM_DEAD_BIT.	1622	* NFT_SET_ELEM_DEAD_BIT.
1596	*/	1623	*/
1597	if (nft_set_elem_expired(&e->ext)) {	1624	if (__nft_set_elem_expired(&e->ext, tstamp)) {
1598	priv->dirty = true;	1625	priv->dirty = true;
1599		1626
1600	gc = nft_trans_gc_queue_sync(gc, GFP_KERNEL);	1627	gc = nft_trans_gc_queue_sync(gc, GFP_KERNEL);
@@ -1640,13 +1667,9 @@ static void pipapo_free_match(struct nft_pipapo_match *m) · 39 unmodified lines
1640	int i;	1667	int i;
1641		1668
1642	for_each_possible_cpu(i)	1669	for_each_possible_cpu(i)
1643	kfree(*per_cpu_ptr(m->scratch, i));	1670	pipapo_free_scratch(m, i);
1644		1671
1645	#ifdef NFT_PIPAPO_ALIGN
1646	free_percpu(m->scratch_aligned);
1647	#endif
1648	free_percpu(m->scratch);	1672	free_percpu(m->scratch);
1649
1650	pipapo_free_fields(m);	1673	pipapo_free_fields(m);
1651		1674
1652	kfree(m);	1675	kfree(m);
@@ -1769,7 +1792,7 @@ static void pipapo_deactivate(const struct net net, const struct nft_set *set, · 116 unmodified lines
1769	{	1792	{
1770	struct nft_pipapo_elem *e;	1793	struct nft_pipapo_elem *e;
1771		1794
1772	e = pipapo_get(net, set, data, nft_genmask_next(net));	1795	e = pipapo_get(net, set, data, nft_genmask_next(net), nft_net_tstamp(net));
1773	if (IS_ERR(e))	1796	if (IS_ERR(e))
1774	return NULL;	1797	return NULL;
1775		1798
@@ -2132,7 +2155,7 @@ static int nft_pipapo_init(const struct nft_set *set, · 356 unmodified lines
2132	m->field_count = field_count;	2155	m->field_count = field_count;
2133	m->bsize_max = 0;	2156	m->bsize_max = 0;
2134		2157
2135	m->scratch = alloc_percpu(unsigned long *);	2158	m->scratch = alloc_percpu(struct nft_pipapo_scratch *);
2136	if (!m->scratch) {	2159	if (!m->scratch) {
2137	err = -ENOMEM;	2160	err = -ENOMEM;
2138	goto out_scratch;	2161	goto out_scratch;
@@ -2140,16 +2163,6 @@ static int nft_pipapo_init(const struct nft_set *set, · 1 unmodified line
2140	for_each_possible_cpu(i)	2163	for_each_possible_cpu(i)
2141	*per_cpu_ptr(m->scratch, i) = NULL;	2164	*per_cpu_ptr(m->scratch, i) = NULL;
2142		2165
2143	#ifdef NFT_PIPAPO_ALIGN
2144	m->scratch_aligned = alloc_percpu(unsigned long *);
2145	if (!m->scratch_aligned) {
2146	err = -ENOMEM;
2147	goto out_free;
2148	}
2149	for_each_possible_cpu(i)
2150	*per_cpu_ptr(m->scratch_aligned, i) = NULL;
2151	#endif
2152
2153	rcu_head_init(&m->rcu);	2166	rcu_head_init(&m->rcu);
2154		2167
2155	nft_pipapo_for_each_field(f, i, m) {	2168	nft_pipapo_for_each_field(f, i, m) {
@@ -2180,9 +2193,6 @@ static int nft_pipapo_init(const struct nft_set *set, · 24 unmodified lines
2180	return 0;	2193	return 0;
2181		2194
2182	out_free:	2195	out_free:
2183	#ifdef NFT_PIPAPO_ALIGN
2184	free_percpu(m->scratch_aligned);
2185	#endif
2186	free_percpu(m->scratch);	2196	free_percpu(m->scratch);
2187	out_scratch:	2197	out_scratch:
2188	kfree(m);	2198	kfree(m);
@@ -2236,11 +2246,8 @@ static void nft_pipapo_destroy(const struct nft_ctx *ctx, · 47 unmodified lines
2236		2246
2237	nft_set_pipapo_match_destroy(ctx, set, m);	2247	nft_set_pipapo_match_destroy(ctx, set, m);
2238		2248
2239	#ifdef NFT_PIPAPO_ALIGN
2240	free_percpu(m->scratch_aligned);
2241	#endif
2242	for_each_possible_cpu(cpu)	2249	for_each_possible_cpu(cpu)
2243	kfree(*per_cpu_ptr(m->scratch, cpu));	2250	pipapo_free_scratch(m, cpu);
2244	free_percpu(m->scratch);	2251	free_percpu(m->scratch);
2245	pipapo_free_fields(m);	2252	pipapo_free_fields(m);
2246	kfree(m);	2253	kfree(m);
@@ -2253,11 +2260,8 @@ static void nft_pipapo_destroy(const struct nft_ctx *ctx, · 6 unmodified lines
2253	if (priv->dirty)	2260	if (priv->dirty)
2254	nft_set_pipapo_match_destroy(ctx, set, m);	2261	nft_set_pipapo_match_destroy(ctx, set, m);
2255		2262
2256	#ifdef NFT_PIPAPO_ALIGN
2257	free_percpu(priv->clone->scratch_aligned);
2258	#endif
2259	for_each_possible_cpu(cpu)	2263	for_each_possible_cpu(cpu)
2260	kfree(*per_cpu_ptr(priv->clone->scratch, cpu));	2264	pipapo_free_scratch(priv->clone, cpu);
2261	free_percpu(priv->clone->scratch);	2265	free_percpu(priv->clone->scratch);
2262		2266
2263	pipapo_free_fields(priv->clone);	2267	pipapo_free_fields(priv->clone);

net/netfilter/nft_set_pipapo.h+13−5

 	union nft_pipapo_map_bucket *mt;
 };
+/**
+ * struct nft_pipapo_scratch - percpu data used for lookup and matching
+ * @map_index:	Current working bitmap index, toggled between field matches
+ * @align_off:	Offset to get the originally allocated address
+ * @map:	store partial matching results during lookup
+ */
+struct nft_pipapo_scratch {
+	u8 map_index;
+	u32 align_off;
+	unsigned long map[];
+};
 /**
  * struct nft_pipapo_match - Data used for lookup and matching
  * @field_count		Amount of fields in set
  * @scratch:		Preallocated per-CPU maps for partial matching results
- * @scratch_aligned:	Version of @scratch aligned to NFT_PIPAPO_ALIGN bytes
  * @bsize_max:		Maximum lookup table bucket size of all fields, in longs
  * @rcu			Matching data is swapped on commits
  * @f:			Fields, with lookup and mapping tables
  */
 struct nft_pipapo_match {
 	int field_count;
-#ifdef NFT_PIPAPO_ALIGN
+	struct nft_pipapo_scratch * __percpu *scratch;
-	unsigned long * __percpu *scratch_aligned;
-#endif
-	unsigned long * __percpu *scratch;
 	size_t bsize_max;
 	struct rcu_head rcu;
 	struct nft_pipapo_field f[] __counted_by(field_count);

net/netfilter/nft_set_pipapo_avx2.c+8−9

@@ -71,9 +71,6 @@ · 70 unmodified lines
71	#define NFT_PIPAPO_AVX2_ZERO(reg) \	71	#define NFT_PIPAPO_AVX2_ZERO(reg) \
72	asm volatile("vpxor %ymm" #reg ", %ymm" #reg ", %ymm" #reg)	72	asm volatile("vpxor %ymm" #reg ", %ymm" #reg ", %ymm" #reg)
73		73
74	/* Current working bitmap index, toggled between field matches */
75	static DEFINE_PER_CPU(bool, nft_pipapo_avx2_scratch_index);
76
77	/**	74	/**
78	* nft_pipapo_avx2_prepare() - Prepare before main algorithm body	75	* nft_pipapo_avx2_prepare() - Prepare before main algorithm body
79	*	76	*
@@ -1120,11 +1117,12 @@ bool nft_pipapo_avx2_lookup(const struct net net, const struct nft_set set, · 1040 unmodified lines
1120	const u32 key, const struct nft_set_ext *ext)	1117	const u32 key, const struct nft_set_ext *ext)
1121	{	1118	{
1122	struct nft_pipapo *priv = nft_set_priv(set);	1119	struct nft_pipapo *priv = nft_set_priv(set);
1123	unsigned long res, fill, *scratch;	1120	struct nft_pipapo_scratch *scratch;
1124	u8 genmask = nft_genmask_cur(net);	1121	u8 genmask = nft_genmask_cur(net);
1125	const u8 rp = (const u8 )key;	1122	const u8 rp = (const u8 )key;
1126	struct nft_pipapo_match *m;	1123	struct nft_pipapo_match *m;
1127	struct nft_pipapo_field *f;	1124	struct nft_pipapo_field *f;
		1125	unsigned long res, fill;
1128	bool map_index;	1126	bool map_index;
1129	int i, ret = 0;	1127	int i, ret = 0;
1130		1128
@@ -1141,15 +1139,16 @@ bool nft_pipapo_avx2_lookup(const struct net net, const struct nft_set set, · 10 unmodified lines
1141	*/	1139	*/
1142	kernel_fpu_begin_mask(0);	1140	kernel_fpu_begin_mask(0);
1143		1141
1144	scratch = *raw_cpu_ptr(m->scratch_aligned);	1142	scratch = *raw_cpu_ptr(m->scratch);
1145	if (unlikely(!scratch)) {	1143	if (unlikely(!scratch)) {
1146	kernel_fpu_end();	1144	kernel_fpu_end();
1147	return false;	1145	return false;
1148	}	1146	}
1149	map_index = raw_cpu_read(nft_pipapo_avx2_scratch_index);
1150		1147
1151	res = scratch + (map_index ? m->bsize_max : 0);	1148	map_index = scratch->map_index;
1152	fill = scratch + (map_index ? 0 : m->bsize_max);	1149
		1150	res = scratch->map + (map_index ? m->bsize_max : 0);
		1151	fill = scratch->map + (map_index ? 0 : m->bsize_max);
1153		1152
1154	/* Starting map doesn't need to be set for this implementation */	1153	/* Starting map doesn't need to be set for this implementation */
1155		1154
@@ -1221,7 +1220,7 @@ next_match: · 65 unmodified lines
1221		1220
1222	out:	1221	out:
1223	if (i % 2)	1222	if (i % 2)
1224	raw_cpu_write(nft_pipapo_avx2_scratch_index, !map_index);	1223	scratch->map_index = !map_index;
1225	kernel_fpu_end();	1224	kernel_fpu_end();
1226		1225
1227	return ret >= 0;	1226	return ret >= 0;

net/netfilter/nft_set_rbtree.c+10−7

 static const struct nft_rbtree_elem *
 nft_rbtree_gc_elem(const struct nft_set *__set, struct nft_rbtree *priv,
-		   struct nft_rbtree_elem *rbe, u8 genmask)
+		   struct nft_rbtree_elem *rbe)
 {
 	struct nft_set *set = (struct nft_set *)__set;
 	struct rb_node *prev = rb_prev(&rbe->node);
 	while (prev) {
 		rbe_prev = rb_entry(prev, struct nft_rbtree_elem, node);
 		if (nft_rbtree_interval_end(rbe_prev) &&
-		    nft_set_elem_active(&rbe_prev->ext, genmask))
+		    nft_set_elem_active(&rbe_prev->ext, NFT_GENMASK_ANY))
 			break;
 		prev = rb_prev(prev);
 	struct nft_rbtree *priv = nft_set_priv(set);
 	u8 cur_genmask = nft_genmask_cur(net);
 	u8 genmask = nft_genmask_next(net);
+	u64 tstamp = nft_net_tstamp(net);
 	int d;
 	/* Descend the tree to search for an existing element greater than the
 		/* perform garbage collection to avoid bogus overlap reports
 		 * but skip new elements in this transaction.
 		 */
-		if (nft_set_elem_expired(&rbe->ext) &&
+		if (__nft_set_elem_expired(&rbe->ext, tstamp) &&
 		    nft_set_elem_active(&rbe->ext, cur_genmask)) {
 			const struct nft_rbtree_elem *removed_end;
-			removed_end = nft_rbtree_gc_elem(set, priv, rbe, genmask);
+			removed_end = nft_rbtree_gc_elem(set, priv, rbe);
 			if (IS_ERR(removed_end))
 				return PTR_ERR(removed_end);
 	const struct nft_rbtree *priv = nft_set_priv(set);
 	const struct rb_node *parent = priv->root.rb_node;
 	u8 genmask = nft_genmask_next(net);
+	u64 tstamp = nft_net_tstamp(net);
 	int d;
 	while (parent != NULL) {
 				   nft_rbtree_interval_end(this)) {
 				parent = parent->rb_right;
 				continue;
-			} else if (nft_set_elem_expired(&rbe->ext)) {
+			} else if (__nft_set_elem_expired(&rbe->ext, tstamp)) {
 				break;
 			} else if (!nft_set_elem_active(&rbe->ext, genmask)) {
 				parent = parent->rb_left;
 {
 	struct nft_rbtree *priv = nft_set_priv(set);
 	struct nft_rbtree_elem *rbe, *rbe_end = NULL;
+	struct net *net = read_pnet(&set->net);
+	u64 tstamp = nft_net_tstamp(net);
 	struct rb_node *node, *next;
 	struct nft_trans_gc *gc;
-	struct net *net;
 	set  = nft_set_container_of(priv);
 	net  = read_pnet(&set->net);
 			rbe_end = rbe;
 			continue;
 		}
-		if (!nft_set_elem_expired(&rbe->ext))
+		if (!__nft_set_elem_expired(&rbe->ext, tstamp))
 			continue;
 		gc = nft_trans_gc_queue_sync(gc, GFP_KERNEL);

net/rxrpc/ar-internal.h+30−7

@@ -199,11 +199,19 @@ struct rxrpc_host_header { · 198 unmodified lines
199	*/	199	*/
200	struct rxrpc_skb_priv {	200	struct rxrpc_skb_priv {
201	struct rxrpc_connection conn; / Connection referred to (poke packet) */	201	struct rxrpc_connection conn; / Connection referred to (poke packet) */
202	u16 offset; /* Offset of data */	202	union {
203	u16 len; /* Length of data */	203	struct {
204	u8 flags;	204	u16 offset; /* Offset of data */
		205	u16 len; /* Length of data */
		206	u8 flags;
205	#define RXRPC_RX_VERIFIED 0x01	207	#define RXRPC_RX_VERIFIED 0x01
206		208	};
		209	struct {
		210	rxrpc_seq_t first_ack; /* First packet in acks table */
		211	u8 nr_acks; /* Number of acks+nacks */
		212	u8 nr_nacks; /* Number of nacks */
		213	};
		214	};
207	struct rxrpc_host_header hdr; /* RxRPC packet header from this packet */	215	struct rxrpc_host_header hdr; /* RxRPC packet header from this packet */
208	};	216	};
209		217
@@ -510,7 +518,7 @@ struct rxrpc_connection { · 300 unmodified lines
510	enum rxrpc_call_completion completion; /* Completion condition */	518	enum rxrpc_call_completion completion; /* Completion condition */
511	s32 abort_code; /* Abort code of connection abort */	519	s32 abort_code; /* Abort code of connection abort */
512	int debug_id; /* debug ID for printks */	520	int debug_id; /* debug ID for printks */
513	atomic_t serial; /* packet serial number counter */	521	rxrpc_serial_t tx_serial; /* Outgoing packet serial number counter */
514	unsigned int hi_serial; /* highest serial number received */	522	unsigned int hi_serial; /* highest serial number received */
515	u32 service_id; /* Service ID, possibly upgraded */	523	u32 service_id; /* Service ID, possibly upgraded */
516	u32 security_level; /* Security level selected */	524	u32 security_level; /* Security level selected */
@@ -692,11 +700,11 @@ struct rxrpc_call { · 175 unmodified lines
692	u8 cong_dup_acks; /* Count of ACKs showing missing packets */	700	u8 cong_dup_acks; /* Count of ACKs showing missing packets */
693	u8 cong_cumul_acks; /* Cumulative ACK count */	701	u8 cong_cumul_acks; /* Cumulative ACK count */
694	ktime_t cong_tstamp; /* Last time cwnd was changed */	702	ktime_t cong_tstamp; /* Last time cwnd was changed */
		703	struct sk_buff cong_last_nack; / Last ACK with nacks received */
695		704
696	/* Receive-phase ACK management (ACKs we send). */	705	/* Receive-phase ACK management (ACKs we send). */
697	u8 ackr_reason; /* reason to ACK */	706	u8 ackr_reason; /* reason to ACK */
698	u16 ackr_sack_base; /* Starting slot in SACK table ring */	707	u16 ackr_sack_base; /* Starting slot in SACK table ring */
699	rxrpc_serial_t ackr_serial; /* serial of packet being ACK'd */
700	rxrpc_seq_t ackr_window; /* Base of SACK window */	708	rxrpc_seq_t ackr_window; /* Base of SACK window */
701	rxrpc_seq_t ackr_wtop; /* Base of SACK window */	709	rxrpc_seq_t ackr_wtop; /* Base of SACK window */
702	unsigned int ackr_nr_unacked; /* Number of unacked packets */	710	unsigned int ackr_nr_unacked; /* Number of unacked packets */
@@ -730,7 +738,8 @@ struct rxrpc_call { · 27 unmodified lines
730	struct rxrpc_ack_summary {	738	struct rxrpc_ack_summary {
731	u16 nr_acks; /* Number of ACKs in packet */	739	u16 nr_acks; /* Number of ACKs in packet */
732	u16 nr_new_acks; /* Number of new ACKs in packet */	740	u16 nr_new_acks; /* Number of new ACKs in packet */
733	u16 nr_rot_new_acks; /* Number of rotated new ACKs */	741	u16 nr_new_nacks; /* Number of new nacks in packet */
		742	u16 nr_retained_nacks; /* Number of nacks retained between ACKs */
734	u8 ack_reason;	743	u8 ack_reason;
735	bool saw_nacks; /* Saw NACKs in packet */	744	bool saw_nacks; /* Saw NACKs in packet */
736	bool new_low_nack; /* T if new low NACK found */	745	bool new_low_nack; /* T if new low NACK found */
@@ -822,6 +831,20 @@ static inline bool rxrpc_sending_to_client(const struct rxrpc_txbuf *txb) · 85 unmodified lines
822		831
823	#include <trace/events/rxrpc.h>	832	#include <trace/events/rxrpc.h>
824		833
		834	/*
		835	* Allocate the next serial number on a connection. 0 must be skipped.
		836	*/
		837	static inline rxrpc_serial_t rxrpc_get_next_serial(struct rxrpc_connection *conn)
		838	{
		839	rxrpc_serial_t serial;
		840
		841	serial = conn->tx_serial;
		842	if (serial == 0)
		843	serial = 1;
		844	conn->tx_serial = serial + 1;
		845	return serial;
		846	}
		847
825	/*	848	/*
826	* af_rxrpc.c	849	* af_rxrpc.c
827	*/	850	*/

net/rxrpc/call_event.c+5−7

 	unsigned long expiry = rxrpc_soft_ack_delay;
 	unsigned long now = jiffies, ack_at;
-	call->ackr_serial = serial;
 	if (rxrpc_soft_ack_delay < expiry)
 		expiry = rxrpc_soft_ack_delay;
 	if (call->peer->srtt_us != 0)
 void rxrpc_resend(struct rxrpc_call *call, struct sk_buff *ack_skb)
 {
 	struct rxrpc_ackpacket *ack = NULL;
+	struct rxrpc_skb_priv *sp;
 	struct rxrpc_txbuf *txb;
 	unsigned long resend_at;
 	rxrpc_seq_t transmitted = READ_ONCE(call->tx_transmitted);
 	 * explicitly NAK'd packets.
 	 */
 	if (ack_skb) {
+		sp = rxrpc_skb(ack_skb);
 		ack = (void *)ack_skb->data + sizeof(struct rxrpc_wire_header);
-		for (i = 0; i < ack->nAcks; i++) {
+		for (i = 0; i < sp->nr_acks; i++) {
 			rxrpc_seq_t seq;
 			if (ack->acks[i] & 1)
 				continue;
-			seq = ntohl(ack->firstPacket) + i;
+			seq = sp->first_ack + i;
 			if (after(txb->seq, transmitted))
 				break;
 			if (after(txb->seq, seq))
 bool rxrpc_input_call_event(struct rxrpc_call *call, struct sk_buff *skb)
 {
 	unsigned long now, next, t;
-	rxrpc_serial_t ackr_serial;
 	bool resend = false, expired = false;
 	s32 abort_code;
 	if (time_after_eq(now, t)) {
 		trace_rxrpc_timer(call, rxrpc_timer_exp_ack, now);
 		cmpxchg(&call->delay_ack_at, t, now + MAX_JIFFY_OFFSET);
-		ackr_serial = xchg(&call->ackr_serial, 0);
+		rxrpc_send_ACK(call, RXRPC_ACK_DELAY, 0,
-		rxrpc_send_ACK(call, RXRPC_ACK_DELAY, ackr_serial,
 			       rxrpc_propose_ack_ping_for_lost_ack);
 	}

net/rxrpc/call_object.c+1−0

@@ -686,6 +686,7 @@ static void rxrpc_destroy_call(struct work_struct *work) · 685 unmodified lines
686		686
687	del_timer_sync(&call->timer);	687	del_timer_sync(&call->timer);
688		688
		689	rxrpc_free_skb(call->cong_last_nack, rxrpc_skb_put_last_nack);
689	rxrpc_cleanup_ring(call);	690	rxrpc_cleanup_ring(call);
690	while ((txb = list_first_entry_or_null(&call->tx_sendmsg,	691	while ((txb = list_first_entry_or_null(&call->tx_sendmsg,
691	struct rxrpc_txbuf, call_link))) {	692	struct rxrpc_txbuf, call_link))) {

net/rxrpc/conn_event.c+9−1

 	_enter("%d", conn->debug_id);
+	if (sp && sp->hdr.type == RXRPC_PACKET_TYPE_ACK) {
+		if (skb_copy_bits(skb, sizeof(struct rxrpc_wire_header),
+				  &pkt.ack, sizeof(pkt.ack)) < 0)
+			return;
+		if (pkt.ack.reason == RXRPC_ACK_PING_RESPONSE)
+			return;
+	}
 	chan = &conn->channels[channel];
 	/* If the last call got moved on whilst we were waiting to run, just
 	iov[2].iov_base	= &ack_info;
 	iov[2].iov_len	= sizeof(ack_info);
-	serial = atomic_inc_return(&conn->serial);
+	serial = rxrpc_get_next_serial(conn);
 	pkt.whdr.epoch		= htonl(conn->proto.epoch);
 	pkt.whdr.cid		= htonl(conn->proto.cid | channel);

net/rxrpc/input.c+97−18

 	}
 	cumulative_acks += summary->nr_new_acks;
-	cumulative_acks += summary->nr_rot_new_acks;
 	if (cumulative_acks > 255)
 		cumulative_acks = 255;
-	summary->mode = call->cong_mode;
 	summary->cwnd = call->cong_cwnd;
 	summary->ssthresh = call->cong_ssthresh;
 	summary->cumulative_acks = cumulative_acks;
 		cwnd = RXRPC_TX_MAX_WINDOW;
 	call->cong_cwnd = cwnd;
 	call->cong_cumul_acks = cumulative_acks;
+	summary->mode = call->cong_mode;
 	trace_rxrpc_congest(call, summary, acked_serial, change);
 	if (resend)
 		rxrpc_resend(call, skb);
 	list_for_each_entry_rcu(txb, &call->tx_buffer, call_link, false) {
 		if (before_eq(txb->seq, call->acks_hard_ack))
 			continue;
-		summary->nr_rot_new_acks++;
 		if (test_bit(RXRPC_TXBUF_LAST, &txb->flags)) {
 			set_bit(RXRPC_CALL_TX_LAST, &call->flags);
 			rot_last = true;
 {
 	ASSERT(test_bit(RXRPC_CALL_TX_LAST, &call->flags));
+	if (unlikely(call->cong_last_nack)) {
+		rxrpc_free_skb(call->cong_last_nack, rxrpc_skb_put_last_nack);
+		call->cong_last_nack = NULL;
+	}
 	switch (__rxrpc_call_state(call)) {
 	case RXRPC_CALL_CLIENT_SEND_REQUEST:
 	case RXRPC_CALL_CLIENT_AWAIT_REPLY:
 		wake_up(&call->waitq);
 }
+/*
+ * Determine how many nacks from the previous ACK have now been satisfied.
+ */
+static rxrpc_seq_t rxrpc_input_check_prev_ack(struct rxrpc_call *call,
+					      struct rxrpc_ack_summary *summary,
+					      rxrpc_seq_t seq)
+{
+	struct sk_buff *skb = call->cong_last_nack;
+	struct rxrpc_ackpacket ack;
+	struct rxrpc_skb_priv *sp = rxrpc_skb(skb);
+	unsigned int i, new_acks = 0, retained_nacks = 0;
+	rxrpc_seq_t old_seq = sp->first_ack;
+	u8 *acks = skb->data + sizeof(struct rxrpc_wire_header) + sizeof(ack);
+	if (after_eq(seq, old_seq + sp->nr_acks)) {
+		summary->nr_new_acks += sp->nr_nacks;
+		summary->nr_new_acks += seq - (old_seq + sp->nr_acks);
+		summary->nr_retained_nacks = 0;
+	} else if (seq == old_seq) {
+		summary->nr_retained_nacks = sp->nr_nacks;
+	} else {
+		for (i = 0; i < sp->nr_acks; i++) {
+			if (acks[i] == RXRPC_ACK_TYPE_NACK) {
+				if (before(old_seq + i, seq))
+					new_acks++;
+				else
+					retained_nacks++;
+			}
+		}
+		summary->nr_new_acks += new_acks;
+		summary->nr_retained_nacks = retained_nacks;
+	}
+	return old_seq + sp->nr_acks;
+}
 /*
  * Process individual soft ACKs.
  *
  * the timer on the basis that the peer might just not have processed them at
  * the time the ACK was sent.
  */
-static void rxrpc_input_soft_acks(struct rxrpc_call *call, u8 *acks,
+static void rxrpc_input_soft_acks(struct rxrpc_call *call,
-				  rxrpc_seq_t seq, int nr_acks,
+				  struct rxrpc_ack_summary *summary,
-				  struct rxrpc_ack_summary *summary)
+				  struct sk_buff *skb,
+				  rxrpc_seq_t seq,
+				  rxrpc_seq_t since)
 {
-	unsigned int i;
+	struct rxrpc_skb_priv *sp = rxrpc_skb(skb);
+	unsigned int i, old_nacks = 0;
+	rxrpc_seq_t lowest_nak = seq + sp->nr_acks;
+	u8 *acks = skb->data + sizeof(struct rxrpc_wire_header) + sizeof(struct rxrpc_ackpacket);
-	for (i = 0; i < nr_acks; i++) {
+	for (i = 0; i < sp->nr_acks; i++) {
 		if (acks[i] == RXRPC_ACK_TYPE_ACK) {
 			summary->nr_acks++;
-			summary->nr_new_acks++;
+			if (after_eq(seq, since))
+				summary->nr_new_acks++;
 		} else {
-			if (!summary->saw_nacks &&
-			    call->acks_lowest_nak != seq + i) {
-				call->acks_lowest_nak = seq + i;
-				summary->new_low_nack = true;
-			}
 			summary->saw_nacks = true;
+			if (before(seq, since)) {
+				/* Overlap with previous ACK */
+				old_nacks++;
+			} else {
+				summary->nr_new_nacks++;
+				sp->nr_nacks++;
+			}
+			if (before(seq, lowest_nak))
+				lowest_nak = seq;
 		}
+		seq++;
+	}
+	if (lowest_nak != call->acks_lowest_nak) {
+		call->acks_lowest_nak = lowest_nak;
+		summary->new_low_nack = true;
 	}
+	/* We *can* have more nacks than we did - the peer is permitted to drop
+	 * packets it has soft-acked and re-request them.  Further, it is
+	 * possible for the nack distribution to change whilst the number of
+	 * nacks stays the same or goes down.
+	 */
+	if (old_nacks < summary->nr_retained_nacks)
+		summary->nr_new_acks += summary->nr_retained_nacks - old_nacks;
+	summary->nr_retained_nacks = old_nacks;
 }
 /*
 	struct rxrpc_skb_priv *sp = rxrpc_skb(skb);
 	struct rxrpc_ackinfo info;
 	rxrpc_serial_t ack_serial, acked_serial;
-	rxrpc_seq_t first_soft_ack, hard_ack, prev_pkt;
+	rxrpc_seq_t first_soft_ack, hard_ack, prev_pkt, since;
 	int nr_acks, offset, ioffset;
 	_enter("");
 	prev_pkt = ntohl(ack.previousPacket);
 	hard_ack = first_soft_ack - 1;
 	nr_acks = ack.nAcks;
+	sp->first_ack = first_soft_ack;
+	sp->nr_acks = nr_acks;
 	summary.ack_reason = (ack.reason < RXRPC_ACK__INVALID ?
 			      ack.reason : RXRPC_ACK__INVALID);
 	if (nr_acks > 0)
 		skb_condense(skb);
+	if (call->cong_last_nack) {
+		since = rxrpc_input_check_prev_ack(call, &summary, first_soft_ack);
+		rxrpc_free_skb(call->cong_last_nack, rxrpc_skb_put_last_nack);
+		call->cong_last_nack = NULL;
+	} else {
+		summary.nr_new_acks = first_soft_ack - call->acks_first_seq;
+		call->acks_lowest_nak = first_soft_ack + nr_acks;
+		since = first_soft_ack;
+	}
 	call->acks_latest_ts = skb->tstamp;
 	call->acks_first_seq = first_soft_ack;
 	call->acks_prev_seq = prev_pkt;
 	case RXRPC_ACK_PING:
 		break;
 	default:
-		if (after(acked_serial, call->acks_highest_serial))
+		if (acked_serial && after(acked_serial, call->acks_highest_serial))
 			call->acks_highest_serial = acked_serial;
 		break;
 	}
 	if (nr_acks > 0) {
 		if (offset > (int)skb->len - nr_acks)
 			return rxrpc_proto_abort(call, 0, rxrpc_eproto_ackr_short_sack);
-		rxrpc_input_soft_acks(call, skb->data + offset, first_soft_ack,
+		rxrpc_input_soft_acks(call, &summary, skb, first_soft_ack, since);
-				      nr_acks, &summary);
+		rxrpc_get_skb(skb, rxrpc_skb_get_last_nack);
+		call->cong_last_nack = skb;
 	}
 	if (test_bit(RXRPC_CALL_TX_LAST, &call->flags) &&

net/rxrpc/output.c+4−4

@@ -216,7 +216,7 @@ int rxrpc_send_ack_packet(struct rxrpc_call call, struct rxrpc_txbuf txb) · 215 unmodified lines
216	iov[0].iov_len = sizeof(txb->wire) + sizeof(txb->ack) + n;	216	iov[0].iov_len = sizeof(txb->wire) + sizeof(txb->ack) + n;
217	len = iov[0].iov_len;	217	len = iov[0].iov_len;
218		218
219	serial = atomic_inc_return(&conn->serial);	219	serial = rxrpc_get_next_serial(conn);
220	txb->wire.serial = htonl(serial);	220	txb->wire.serial = htonl(serial);
221	trace_rxrpc_tx_ack(call->debug_id, serial,	221	trace_rxrpc_tx_ack(call->debug_id, serial,
222	ntohl(txb->ack.firstPacket),	222	ntohl(txb->ack.firstPacket),
@@ -302,7 +302,7 @@ int rxrpc_send_abort_packet(struct rxrpc_call *call) · 79 unmodified lines
302	iov[0].iov_base = &pkt;	302	iov[0].iov_base = &pkt;
303	iov[0].iov_len = sizeof(pkt);	303	iov[0].iov_len = sizeof(pkt);
304		304
305	serial = atomic_inc_return(&conn->serial);	305	serial = rxrpc_get_next_serial(conn);
306	pkt.whdr.serial = htonl(serial);	306	pkt.whdr.serial = htonl(serial);
307		307
308	iov_iter_kvec(&msg.msg_iter, WRITE, iov, 1, sizeof(pkt));	308	iov_iter_kvec(&msg.msg_iter, WRITE, iov, 1, sizeof(pkt));
@@ -334,7 +334,7 @@ int rxrpc_send_data_packet(struct rxrpc_call call, struct rxrpc_txbuf txb) · 25 unmodified lines
334	_enter("%x,{%d}", txb->seq, txb->len);	334	_enter("%x,{%d}", txb->seq, txb->len);
335		335
336	/* Each transmission of a Tx packet needs a new serial number */	336	/* Each transmission of a Tx packet needs a new serial number */
337	serial = atomic_inc_return(&conn->serial);	337	serial = rxrpc_get_next_serial(conn);
338	txb->wire.serial = htonl(serial);	338	txb->wire.serial = htonl(serial);
339		339
340	if (test_bit(RXRPC_CONN_PROBING_FOR_UPGRADE, &conn->flags) &&	340	if (test_bit(RXRPC_CONN_PROBING_FOR_UPGRADE, &conn->flags) &&
@@ -558,7 +558,7 @@ void rxrpc_send_conn_abort(struct rxrpc_connection *conn) · 217 unmodified lines
558		558
559	len = iov[0].iov_len + iov[1].iov_len;	559	len = iov[0].iov_len + iov[1].iov_len;
560		560
561	serial = atomic_inc_return(&conn->serial);	561	serial = rxrpc_get_next_serial(conn);
562	whdr.serial = htonl(serial);	562	whdr.serial = htonl(serial);
563		563
564	iov_iter_kvec(&msg.msg_iter, WRITE, iov, 2, len);	564	iov_iter_kvec(&msg.msg_iter, WRITE, iov, 2, len);

net/rxrpc/proc.c+1−1

@@ -181,7 +181,7 @@ print: · 180 unmodified lines
181	atomic_read(&conn->active),	181	atomic_read(&conn->active),
182	state,	182	state,
183	key_serial(conn->key),	183	key_serial(conn->key),
184	atomic_read(&conn->serial),	184	conn->tx_serial,
185	conn->hi_serial,	185	conn->hi_serial,
186	conn->channels[0].call_id,	186	conn->channels[0].call_id,
187	conn->channels[1].call_id,	187	conn->channels[1].call_id,

net/rxrpc/rxkad.c+2−2

@@ -664,7 +664,7 @@ static int rxkad_issue_challenge(struct rxrpc_connection *conn) · 663 unmodified lines
664		664
665	len = iov[0].iov_len + iov[1].iov_len;	665	len = iov[0].iov_len + iov[1].iov_len;
666		666
667	serial = atomic_inc_return(&conn->serial);	667	serial = rxrpc_get_next_serial(conn);
668	whdr.serial = htonl(serial);	668	whdr.serial = htonl(serial);
669		669
670	ret = kernel_sendmsg(conn->local->socket, &msg, iov, 2, len);	670	ret = kernel_sendmsg(conn->local->socket, &msg, iov, 2, len);
@@ -721,7 +721,7 @@ static int rxkad_send_response(struct rxrpc_connection *conn, · 50 unmodified lines
721		721
722	len = iov[0].iov_len + iov[1].iov_len + iov[2].iov_len;	722	len = iov[0].iov_len + iov[1].iov_len + iov[2].iov_len;
723		723
724	serial = atomic_inc_return(&conn->serial);	724	serial = rxrpc_get_next_serial(conn);
725	whdr.serial = htonl(serial);	725	whdr.serial = htonl(serial);
726		726
727	rxrpc_local_dont_fragment(conn->local, false);	727	rxrpc_local_dont_fragment(conn->local, false);

net/tipc/bearer.c+6−0

 #ifdef CONFIG_TIPC_MEDIA_UDP
 	if (attrs[TIPC_NLA_BEARER_UDP_OPTS]) {
+		if (b->media->type_id != TIPC_MEDIA_TYPE_UDP) {
+			rtnl_unlock();
+			NL_SET_ERR_MSG(info->extack, "UDP option is unsupported");
+			return -EINVAL;
+		}
 		err = tipc_udp_nl_bearer_add(b,
 					     attrs[TIPC_NLA_BEARER_UDP_OPTS]);
 		if (err) {

net/unix/garbage.c+11−0

@@ -339,6 +339,17 @@ static void __unix_gc(struct work_struct *work) · 338 unmodified lines
339	/* Here we are. Hitlist is filled. Die. */	339	/* Here we are. Hitlist is filled. Die. */
340	__skb_queue_purge(&hitlist);	340	__skb_queue_purge(&hitlist);
341		341
		342	#if IS_ENABLED(CONFIG_AF_UNIX_OOB)
		343	list_for_each_entry_safe(u, next, &gc_candidates, link) {
		344	struct sk_buff *skb = u->oob_skb;
		345
		346	if (skb) {
		347	u->oob_skb = NULL;
		348	kfree_skb(skb);
		349	}
		350	}
		351	#endif
		352
342	spin_lock(&unix_gc_lock);	353	spin_lock(&unix_gc_lock);
343		354
344	/* All candidates should have been detached by now. */	355	/* All candidates should have been detached by now. */

net/wireless/core.c+2−1

  * Copyright 2006-2010		Johannes Berg <johannes@sipsolutions.net>
  * Copyright 2013-2014  Intel Mobile Communications GmbH
  * Copyright 2015-2017	Intel Deutschland GmbH
- * Copyright (C) 2018-2023 Intel Corporation
+ * Copyright (C) 2018-2024 Intel Corporation
  */
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 			      unsigned long delay)
 {
 	if (!delay) {
+		del_timer(&dwork->timer);
 		wiphy_work_queue(wiphy, &dwork->work);
 		return;
 	}

net/wireless/scan.c+58−1

@@ -1731,6 +1731,61 @@ static void cfg80211_update_hidden_bsses(struct cfg80211_internal_bss *known, · 1730 unmodified lines
1731	}	1731	}
1732	}	1732	}
1733		1733
		1734	static void cfg80211_check_stuck_ecsa(struct cfg80211_registered_device *rdev,
		1735	struct cfg80211_internal_bss *known,
		1736	const struct cfg80211_bss_ies *old)
		1737	{
		1738	const struct ieee80211_ext_chansw_ie *ecsa;
		1739	const struct element elem_new, elem_old;
		1740	const struct cfg80211_bss_ies new, bcn;
		1741
		1742	if (known->pub.proberesp_ecsa_stuck)
		1743	return;
		1744
		1745	new = rcu_dereference_protected(known->pub.proberesp_ies,
		1746	lockdep_is_held(&rdev->bss_lock));
		1747	if (WARN_ON(!new))
		1748	return;
		1749
		1750	if (new->tsf - old->tsf < USEC_PER_SEC)
		1751	return;
		1752
		1753	elem_old = cfg80211_find_elem(WLAN_EID_EXT_CHANSWITCH_ANN,
		1754	old->data, old->len);
		1755	if (!elem_old)
		1756	return;
		1757
		1758	elem_new = cfg80211_find_elem(WLAN_EID_EXT_CHANSWITCH_ANN,
		1759	new->data, new->len);
		1760	if (!elem_new)
		1761	return;
		1762
		1763	bcn = rcu_dereference_protected(known->pub.beacon_ies,
		1764	lockdep_is_held(&rdev->bss_lock));
		1765	if (bcn &&
		1766	cfg80211_find_elem(WLAN_EID_EXT_CHANSWITCH_ANN,
		1767	bcn->data, bcn->len))
		1768	return;
		1769
		1770	if (elem_new->datalen != elem_old->datalen)
		1771	return;
		1772	if (elem_new->datalen < sizeof(struct ieee80211_ext_chansw_ie))
		1773	return;
		1774	if (memcmp(elem_new->data, elem_old->data, elem_new->datalen))
		1775	return;
		1776
		1777	ecsa = (void *)elem_new->data;
		1778
		1779	if (!ecsa->mode)
		1780	return;
		1781
		1782	if (ecsa->new_ch_num !=
		1783	ieee80211_frequency_to_channel(known->pub.channel->center_freq))
		1784	return;
		1785
		1786	known->pub.proberesp_ecsa_stuck = 1;
		1787	}
		1788
1734	static bool	1789	static bool
1735	cfg80211_update_known_bss(struct cfg80211_registered_device *rdev,	1790	cfg80211_update_known_bss(struct cfg80211_registered_device *rdev,
1736	struct cfg80211_internal_bss *known,	1791	struct cfg80211_internal_bss *known,
@@ -1750,8 +1805,10 @@ cfg80211_update_known_bss(struct cfg80211_registered_device *rdev, · 13 unmodified lines
1750	/* Override possible earlier Beacon frame IEs */	1805	/* Override possible earlier Beacon frame IEs */
1751	rcu_assign_pointer(known->pub.ies,	1806	rcu_assign_pointer(known->pub.ies,
1752	new->pub.proberesp_ies);	1807	new->pub.proberesp_ies);
1753	if (old)	1808	if (old) {
		1809	cfg80211_check_stuck_ecsa(rdev, known, old);
1754	kfree_rcu((struct cfg80211_bss_ies *)old, rcu_head);	1810	kfree_rcu((struct cfg80211_bss_ies *)old, rcu_head);
		1811	}
1755	}	1812	}
1756		1813
1757	if (rcu_access_pointer(new->pub.beacon_ies)) {	1814	if (rcu_access_pointer(new->pub.beacon_ies)) {

sound/core/pcm.c+4−0

 	FORMAT(DSD_U32_LE),
 	FORMAT(DSD_U16_BE),
 	FORMAT(DSD_U32_BE),
+	FORMAT(S20_LE),
+	FORMAT(S20_BE),
+	FORMAT(U20_LE),
+	FORMAT(U20_BE),
 };
 /**

sound/pci/hda/cs35l41_hda_property.c+4−0

 	{ "10431533", 2, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 1000, 4500, 24 },
 	{ "10431573", 2, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, 2, 0, 1000, 4500, 24 },
 	{ "10431663", 2, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, -1, 0, 1000, 4500, 24 },
+	{ "10431683", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 0, 0, 0 },
+	{ "104316A3", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, 2, 0, 0, 0, 0 },
 	{ "104316D3", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, 2, 0, 0, 0, 0 },
 	{ "104316F3", 2, EXTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 1, 2, 0, 0, 0, 0 },
 	{ "104317F3", 2, INTERNAL, { CS35L41_LEFT, CS35L41_RIGHT, 0, 0 }, 0, 1, -1, 1000, 4500, 24 },
 	{ "CSC3551", "10431533", generic_dsd_config },
 	{ "CSC3551", "10431573", generic_dsd_config },
 	{ "CSC3551", "10431663", generic_dsd_config },
+	{ "CSC3551", "10431683", generic_dsd_config },
+	{ "CSC3551", "104316A3", generic_dsd_config },
 	{ "CSC3551", "104316D3", generic_dsd_config },
 	{ "CSC3551", "104316F3", generic_dsd_config },
 	{ "CSC3551", "104317F3", generic_dsd_config },

sound/pci/hda/cs35l56_hda.c+77−59

   *  ASP1_RX_WL = 24 bits per sample
   *  ASP1_TX_WL = 24 bits per sample
   *  ASP1_RXn_EN 1..3 and ASP1_TXn_EN 1..4 disabled
+  *
+  * Override any Windows-specific mixer settings applied by the firmware.
   */
 static const struct reg_sequence cs35l56_hda_dai_config[] = {
 	{ CS35L56_ASP1_CONTROL1,	0x00000021 },
 	{ CS35L56_ASP1_CONTROL2,	0x20200200 },
 	{ CS35L56_ASP1_CONTROL3,	0x00000003 },
+	{ CS35L56_ASP1_FRAME_CONTROL1,	0x03020100 },
+	{ CS35L56_ASP1_FRAME_CONTROL5,	0x00020100 },
 	{ CS35L56_ASP1_DATA_CONTROL5,	0x00000018 },
 	{ CS35L56_ASP1_DATA_CONTROL1,	0x00000018 },
 	{ CS35L56_ASP1_ENABLES1,	0x00000000 },
+	{ CS35L56_ASP1TX1_INPUT,	0x00000018 },
+	{ CS35L56_ASP1TX2_INPUT,	0x00000019 },
+	{ CS35L56_ASP1TX3_INPUT,	0x00000020 },
+	{ CS35L56_ASP1TX4_INPUT,	0x00000028 },
 };
 static void cs35l56_hda_play(struct cs35l56_hda *cs35l56)
 		}
 	}
+	ret = cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base);
+	if (ret)
+		goto err;
 	return 0;
 err:
 static int cs35l56_hda_request_firmware_file(struct cs35l56_hda *cs35l56,
 					     const struct firmware **firmware, char **filename,
-					     const char *dir, const char *system_name,
+					     const char *base_name, const char *system_name,
 					     const char *amp_name,
 					     const char *filetype)
 {
 	int ret = 0;
 	if (system_name && amp_name)
-		*filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc-%s-%s.%s", dir,
+		*filename = kasprintf(GFP_KERNEL, "%s-%s-%s.%s", base_name,
-				      cs35l56->base.secured ? "s" : "", cs35l56->base.rev,
 				      system_name, amp_name, filetype);
 	else if (system_name)
-		*filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc-%s.%s", dir,
+		*filename = kasprintf(GFP_KERNEL, "%s-%s.%s", base_name,
-				      cs35l56->base.secured ? "s" : "", cs35l56->base.rev,
 				      system_name, filetype);
 	else
-		*filename = kasprintf(GFP_KERNEL, "%scs35l56%s-%02x-dsp1-misc.%s", dir,
+		*filename = kasprintf(GFP_KERNEL, "%s.%s", base_name, filetype);
-				      cs35l56->base.secured ? "s" : "", cs35l56->base.rev,
-				      filetype);
 	if (!*filename)
 		return -ENOMEM;
 	return 0;
 }
-static const char cirrus_dir[] = "cirrus/";
 static void cs35l56_hda_request_firmware_files(struct cs35l56_hda *cs35l56,
+					       unsigned int preloaded_fw_ver,
 					       const struct firmware **wmfw_firmware,
 					       char **wmfw_filename,
 					       const struct firmware **coeff_firmware,
 {
 	const char *system_name = cs35l56->system_name;
 	const char *amp_name = cs35l56->amp_name;
+	char base_name[37];
 	int ret;
+	if (preloaded_fw_ver) {
+		snprintf(base_name, sizeof(base_name),
+			 "cirrus/cs35l56-%02x%s-%06x-dsp1-misc",
+			 cs35l56->base.rev,
+			 cs35l56->base.secured ? "-s" : "",
+			 preloaded_fw_ver & 0xffffff);
+	} else {
+		snprintf(base_name, sizeof(base_name),
+			 "cirrus/cs35l56-%02x%s-dsp1-misc",
+			 cs35l56->base.rev,
+			 cs35l56->base.secured ? "-s" : "");
+	}
 	if (system_name && amp_name) {
 		if (!cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename,
-						       cirrus_dir, system_name, amp_name, "wmfw")) {
+						       base_name, system_name, amp_name, "wmfw")) {
 			cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
-							  cirrus_dir, system_name, amp_name, "bin");
+							  base_name, system_name, amp_name, "bin");
 			return;
 		}
 	}
 	if (system_name) {
 		if (!cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename,
-						       cirrus_dir, system_name, NULL, "wmfw")) {
+						       base_name, system_name, NULL, "wmfw")) {
 			if (amp_name)
 				cs35l56_hda_request_firmware_file(cs35l56,
 								  coeff_firmware, coeff_filename,
-								  cirrus_dir, system_name,
+								  base_name, system_name,
 								  amp_name, "bin");
 			if (!*coeff_firmware)
 				cs35l56_hda_request_firmware_file(cs35l56,
 								  coeff_firmware, coeff_filename,
-								  cirrus_dir, system_name,
+								  base_name, system_name,
 								  NULL, "bin");
 			return;
 		}
+		/*
+		 * Check for system-specific bin files without wmfw before
+		 * falling back to generic firmware
+		 */
+		if (amp_name)
+			cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
+							  base_name, system_name, amp_name, "bin");
+		if (!*coeff_firmware)
+			cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
+							  base_name, system_name, NULL, "bin");
+		if (*coeff_firmware)
+			return;
 	}
 	ret = cs35l56_hda_request_firmware_file(cs35l56, wmfw_firmware, wmfw_filename,
-						cirrus_dir, NULL, NULL, "wmfw");
+						base_name, NULL, NULL, "wmfw");
 	if (!ret) {
 		cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
-						  cirrus_dir, NULL, NULL, "bin");
+						  base_name, NULL, NULL, "bin");
 		return;
 	}
-	/* When a firmware file is not found must still search for the coeff files */
-	if (system_name) {
-		if (amp_name)
-			cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
-							  cirrus_dir, system_name, amp_name, "bin");
-		if (!*coeff_firmware)
-			cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
-							  cirrus_dir, system_name, NULL, "bin");
-	}
 	if (!*coeff_firmware)
 		cs35l56_hda_request_firmware_file(cs35l56, coeff_firmware, coeff_filename,
-						  cirrus_dir, NULL, NULL, "bin");
+						  base_name, NULL, NULL, "bin");
 }
 static void cs35l56_hda_release_firmware_files(const struct firmware *wmfw_firmware,
 	const struct firmware *wmfw_firmware = NULL;
 	char *coeff_filename = NULL;
 	char *wmfw_filename = NULL;
-	unsigned int firmware_missing;
+	unsigned int preloaded_fw_ver;
+	bool firmware_missing;
 	int ret = 0;
 	/* Prepare for a new DSP power-up */
 	pm_runtime_get_sync(cs35l56->base.dev);
-	ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing);
+	/*
-	if (ret) {
+	 * The firmware can only be upgraded if it is currently running
-		dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret);
+	 * from the built-in ROM. If not, the wmfw/bin must be for the
+	 * version of firmware that is running on the chip.
+	 */
+	ret = cs35l56_read_prot_status(&cs35l56->base, &firmware_missing, &preloaded_fw_ver);
+	if (ret)
 		goto err_pm_put;
-	}
-	firmware_missing &= CS35L56_FIRMWARE_MISSING;
+	if (firmware_missing)
+		preloaded_fw_ver = 0;
-	/*
+	cs35l56_hda_request_firmware_files(cs35l56, preloaded_fw_ver,
-	 * Firmware can only be downloaded if the CS35L56 is secured or is
+					   &wmfw_firmware, &wmfw_filename,
-	 * running from the built-in ROM. If it is secured the BIOS will have
+					   &coeff_firmware, &coeff_filename);
-	 * downloaded firmware, and the wmfw/bin files will only contain
-	 * tunings that are safe to download with the firmware running.
-	 */
-	if (cs35l56->base.secured || firmware_missing) {
-		cs35l56_hda_request_firmware_files(cs35l56, &wmfw_firmware, &wmfw_filename,
-						   &coeff_firmware, &coeff_filename);
-	}
 	/*
 	 * If the BIOS didn't patch the firmware a bin file is mandatory to
 	mutex_lock(&cs35l56->base.irq_lock);
 	/*
-	 * When the device is running in secure mode the firmware files can
+	 * If the firmware hasn't been patched it must be shutdown before
-	 * only contain insecure tunings and therefore we do not need to
+	 * doing a full patch and reset afterwards. If it is already
-	 * shutdown the firmware to apply them and can use the lower cost
+	 * running a patched version the firmware files only contain
-	 * reinit sequence instead.
+	 * tunings and we can use the lower cost reinit sequence instead.
 	 */
-	if (!cs35l56->base.secured && (wmfw_firmware || coeff_firmware)) {
+	if (firmware_missing && (wmfw_firmware || coeff_firmware)) {
 		ret = cs35l56_firmware_shutdown(&cs35l56->base);
 		if (ret)
 			goto err;
 	if (coeff_filename)
 		dev_dbg(cs35l56->base.dev, "Loaded Coefficients: %s\n", coeff_filename);
-	if (cs35l56->base.secured) {
+	if (!firmware_missing) {
 		ret = cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);
 		if (ret)
 			goto err_powered_up;
 	regmap_multi_reg_write(cs35l56->base.regmap, cs35l56_hda_dai_config,
 			       ARRAY_SIZE(cs35l56_hda_dai_config));
+	ret = cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base);
+	if (ret)
+		goto err;
 	/*
 	 * By default only enable one ASP1TXn, where n=amplifier index,
 };
 EXPORT_SYMBOL_NS_GPL(cs35l56_hda_pm_ops, SND_HDA_SCODEC_CS35L56);
-#if IS_ENABLED(CONFIG_SND_HDA_SCODEC_CS35L56_KUNIT_TEST)
-/* Hooks to export static function to KUnit test */
-int cs35l56_hda_test_hook_get_speaker_id(struct device *dev, int amp_index, int num_amps)
-{
-	return cs35l56_hda_get_speaker_id(dev, amp_index, num_amps);
-}
-EXPORT_SYMBOL_NS_GPL(cs35l56_hda_test_hook_get_speaker_id, SND_HDA_SCODEC_CS35L56);
-#endif
 MODULE_DESCRIPTION("CS35L56 HDA Driver");
 MODULE_IMPORT_NS(SND_HDA_CIRRUS_SCODEC);
 MODULE_IMPORT_NS(SND_HDA_CS_DSP_CONTROLS);

sound/pci/hda/hda_intel.c+4−2

 	/* some exceptions: Atoms seem problematic with value 1 */
 	if (chip->pci->vendor == PCI_VENDOR_ID_INTEL) {
 		switch (chip->pci->device) {
-		case 0x0f04: /* Baytrail */
+		case PCI_DEVICE_ID_INTEL_HDA_BYT:
-		case 0x2284: /* Braswell */
+		case PCI_DEVICE_ID_INTEL_HDA_BSW:
 			return 32;
+		case PCI_DEVICE_ID_INTEL_HDA_APL:
+			return 64;
 		}
 	}

sound/pci/hda/patch_cs8409.c+1−0

@@ -1371,6 +1371,7 @@ void dolphin_fixups(struct hda_codec codec, const struct hda_fixup fix, int ac · 1370 unmodified lines
1371	spec->scodecs[CS8409_CODEC1] = &dolphin_cs42l42_1;	1371	spec->scodecs[CS8409_CODEC1] = &dolphin_cs42l42_1;
1372	spec->scodecs[CS8409_CODEC1]->codec = codec;	1372	spec->scodecs[CS8409_CODEC1]->codec = codec;
1373	spec->num_scodecs = 2;	1373	spec->num_scodecs = 2;
		1374	spec->gen.suppress_vmaster = 1;
1374		1375
1375	codec->patch_ops = cs8409_dolphin_patch_ops;	1376	codec->patch_ops = cs8409_dolphin_patch_ops;
1376		1377

sound/pci/hda/patch_realtek.c+13−3

 		alc_update_coef_idx(codec, 0x67, 0xf000, 0x3000);
 		fallthrough;
 	case 0x10ec0215:
+	case 0x10ec0285:
+	case 0x10ec0289:
+		alc_update_coef_idx(codec, 0x36, 1<<13, 0);
+		fallthrough;
 	case 0x10ec0230:
 	case 0x10ec0233:
 	case 0x10ec0235:
 	case 0x10ec0283:
 	case 0x10ec0286:
 	case 0x10ec0288:
-	case 0x10ec0285:
 	case 0x10ec0298:
-	case 0x10ec0289:
 	case 0x10ec0300:
 		alc_update_coef_idx(codec, 0x10, 1<<9, 0);
 		break;
 		.type = HDA_FIXUP_FUNC,
 		.v.func = cs35l41_fixup_i2c_two,
 		.chained = true,
-		.chain_id = ALC269_FIXUP_THINKPAD_ACPI,
+		.chain_id = ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK,
 	},
 	[ALC287_FIXUP_TAS2781_I2C] = {
 		.type = HDA_FIXUP_FUNC,
 	[ALC287_FIXUP_THINKPAD_I2S_SPK] = {
 		.type = HDA_FIXUP_FUNC,
 		.v.func = alc287_fixup_bind_dacs,
+		.chained = true,
+		.chain_id = ALC285_FIXUP_THINKPAD_NO_BASS_SPK_HEADSET_JACK,
 	},
 	[ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD] = {
 		.type = HDA_FIXUP_FUNC,
 	SND_PCI_QUIRK(0x1025, 0x1247, "Acer vCopperbox", ALC269VC_FIXUP_ACER_VCOPPERBOX_PINS),
 	SND_PCI_QUIRK(0x1025, 0x1248, "Acer Veriton N4660G", ALC269VC_FIXUP_ACER_MIC_NO_PRESENCE),
 	SND_PCI_QUIRK(0x1025, 0x1269, "Acer SWIFT SF314-54", ALC256_FIXUP_ACER_HEADSET_MIC),
+	SND_PCI_QUIRK(0x1025, 0x126a, "Acer Swift SF114-32", ALC256_FIXUP_ACER_MIC_NO_PRESENCE),
 	SND_PCI_QUIRK(0x1025, 0x128f, "Acer Veriton Z6860G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
 	SND_PCI_QUIRK(0x1025, 0x1290, "Acer Veriton Z4860G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
 	SND_PCI_QUIRK(0x1025, 0x1291, "Acer Veriton Z4660G", ALC286_FIXUP_ACER_AIO_HEADSET_MIC),
 	SND_PCI_QUIRK(0x1028, 0x0b71, "Dell Inspiron 16 Plus 7620", ALC295_FIXUP_DELL_INSPIRON_TOP_SPEAKERS),
 	SND_PCI_QUIRK(0x1028, 0x0beb, "Dell XPS 15 9530 (2023)", ALC289_FIXUP_DELL_CS35L41_SPI_2),
 	SND_PCI_QUIRK(0x1028, 0x0c03, "Dell Precision 5340", ALC269_FIXUP_DELL4_MIC_NO_PRESENCE),
+	SND_PCI_QUIRK(0x1028, 0x0c0d, "Dell Oasis", ALC289_FIXUP_RTK_AMP_DUAL_SPK),
 	SND_PCI_QUIRK(0x1028, 0x0c19, "Dell Precision 3340", ALC236_FIXUP_DELL_DUAL_CODECS),
 	SND_PCI_QUIRK(0x1028, 0x0c1a, "Dell Precision 3340", ALC236_FIXUP_DELL_DUAL_CODECS),
 	SND_PCI_QUIRK(0x1028, 0x0c1b, "Dell Precision 3440", ALC236_FIXUP_DELL_DUAL_CODECS),
 	SND_PCI_QUIRK(0x103c, 0x8786, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED),
 	SND_PCI_QUIRK(0x103c, 0x8787, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED),
 	SND_PCI_QUIRK(0x103c, 0x8788, "HP OMEN 15", ALC285_FIXUP_HP_MUTE_LED),
+	SND_PCI_QUIRK(0x103c, 0x87b7, "HP Laptop 14-fq0xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2),
 	SND_PCI_QUIRK(0x103c, 0x87c8, "HP", ALC287_FIXUP_HP_GPIO_LED),
 	SND_PCI_QUIRK(0x103c, 0x87e5, "HP ProBook 440 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
 	SND_PCI_QUIRK(0x103c, 0x87e7, "HP ProBook 450 G8 Notebook PC", ALC236_FIXUP_HP_GPIO_LED),
 	SND_PCI_QUIRK(0x103c, 0x8c72, "HP EliteBook 865 G11", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
 	SND_PCI_QUIRK(0x103c, 0x8c96, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
 	SND_PCI_QUIRK(0x103c, 0x8c97, "HP ZBook", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF),
+	SND_PCI_QUIRK(0x103c, 0x8ca1, "HP ZBook Power", ALC236_FIXUP_HP_GPIO_LED),
+	SND_PCI_QUIRK(0x103c, 0x8ca2, "HP ZBook Power", ALC236_FIXUP_HP_GPIO_LED),
 	SND_PCI_QUIRK(0x103c, 0x8ca4, "HP ZBook Fury", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
 	SND_PCI_QUIRK(0x103c, 0x8ca7, "HP ZBook Fury", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED),
 	SND_PCI_QUIRK(0x103c, 0x8cf5, "HP ZBook Studio 16", ALC245_FIXUP_CS35L41_SPI_4_HP_GPIO_LED),
 	SND_PCI_QUIRK(0x1d72, 0x1945, "Redmi G", ALC256_FIXUP_ASUS_HEADSET_MIC),
 	SND_PCI_QUIRK(0x1d72, 0x1947, "RedmiBook Air", ALC255_FIXUP_XIAOMI_HEADSET_MIC),
 	SND_PCI_QUIRK(0x2782, 0x0232, "CHUWI CoreBook XPro", ALC269VB_FIXUP_CHUWI_COREBOOK_XPRO),
+	SND_PCI_QUIRK(0x2782, 0x1707, "Vaio VJFE-ADL", ALC298_FIXUP_SPK_VOLUME),
 	SND_PCI_QUIRK(0x8086, 0x2074, "Intel NUC 8", ALC233_FIXUP_INTEL_NUC8_DMIC),
 	SND_PCI_QUIRK(0x8086, 0x2080, "Intel NUC 8 Rugged", ALC256_FIXUP_INTEL_NUC8_RUGGED),
 	SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", ALC256_FIXUP_INTEL_NUC10),

sound/soc/amd/acp/acp-mach-common.c+14−2

 	clk_set_rate(drvdata->wclk, srate);
 	clk_set_rate(drvdata->bclk, srate * ch * format);
+	if (!drvdata->soc_mclk) {
+		ret = acp_clk_enable(drvdata, srate, ch * format);
+		if (ret < 0) {
+			dev_err(rtd->card->dev, "Failed to enable HS clk: %d\n", ret);
+			return ret;
+		}
+	}
 	return 0;
 }
 	if (drv_data->amp_cpu_id == I2S_SP) {
 		links[i].name = "acp-amp-codec";
 		links[i].id = AMP_BE_ID;
-		links[i].cpus = sof_sp_virtual;
+		if (drv_data->platform == RENOIR) {
-		links[i].num_cpus = ARRAY_SIZE(sof_sp_virtual);
+			links[i].cpus = sof_sp;
+			links[i].num_cpus = ARRAY_SIZE(sof_sp);
+		} else {
+			links[i].cpus = sof_sp_virtual;
+			links[i].num_cpus = ARRAY_SIZE(sof_sp_virtual);
+		}
 		links[i].platforms = sof_component;
 		links[i].num_platforms = ARRAY_SIZE(sof_component);
 		links[i].dpcm_playback = 1;

sound/soc/amd/acp/acp-sof-mach.c+4−0

 	.hs_codec_id = RT5682S,
 	.amp_codec_id = RT1019,
 	.dmic_codec_id = DMIC,
+	.platform = RENOIR,
 	.tdm_mode = false,
 };
 	.hs_codec_id = RT5682S,
 	.amp_codec_id = MAX98360A,
 	.dmic_codec_id = DMIC,
+	.platform = RENOIR,
 	.tdm_mode = false,
 };
 	.hs_codec_id = NAU8825,
 	.amp_codec_id = MAX98360A,
 	.dmic_codec_id = DMIC,
+	.platform = REMBRANDT,
 	.soc_mclk = true,
 	.tdm_mode = false,
 };
 	.hs_codec_id = RT5682S,
 	.amp_codec_id = RT1019,
 	.dmic_codec_id = DMIC,
+	.platform = REMBRANDT,
 	.soc_mclk = true,
 	.tdm_mode = false,
 };

sound/soc/amd/acp/acp3x-es83xx/acp3x-es83xx.c+8−0

@@ -354,6 +354,14 @@ static const struct dmi_system_id acp3x_es83xx_dmi_table[] = { · 353 unmodified lines
354	},	354	},
355	.driver_data = (void *)(ES83XX_ENABLE_DMIC\|ES83XX_48_MHZ_MCLK),	355	.driver_data = (void *)(ES83XX_ENABLE_DMIC\|ES83XX_48_MHZ_MCLK),
356	},	356	},
		357	{
		358	.matches = {
		359	DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "HUAWEI"),
		360	DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HVY-WXX9"),
		361	DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "M1010"),
		362	},
		363	.driver_data = (void *)(ES83XX_ENABLE_DMIC),
		364	},
357	{	365	{
358	.matches = {	366	.matches = {
359	DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "HUAWEI"),	367	DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "HUAWEI"),

sound/soc/amd/yc/acp6x-mach.c+7−0

@@ -297,6 +297,13 @@ static const struct dmi_system_id yc_acp_quirk_table[] = { · 296 unmodified lines
297	DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 15 B7ED"),	297	DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 15 B7ED"),
298	}	298	}
299	},	299	},
		300	{
		301	.driver_data = &acp6x_card,
		302	.matches = {
		303	DMI_MATCH(DMI_BOARD_VENDOR, "Micro-Star International Co., Ltd."),
		304	DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 15 C7VF"),
		305	}
		306	},
300	{	307	{
301	.driver_data = &acp6x_card,	308	.driver_data = &acp6x_card,
302	.matches = {	309	.matches = {

sound/soc/codecs/cs35l56-shared.c+122−18

@@ -5,6 +5,7 @@ · 4 unmodified lines
5	// Copyright (C) 2023 Cirrus Logic, Inc. and	5	// Copyright (C) 2023 Cirrus Logic, Inc. and
6	// Cirrus Logic International Semiconductor Ltd.	6	// Cirrus Logic International Semiconductor Ltd.
7		7
		8	#include <linux/gpio/consumer.h>
8	#include <linux/regmap.h>	9	#include <linux/regmap.h>
9	#include <linux/regulator/consumer.h>	10	#include <linux/regulator/consumer.h>
10	#include <linux/types.h>	11	#include <linux/types.h>
@@ -12,6 +13,15 @@ · 1 unmodified line
12	#include "cs35l56.h"	13	#include "cs35l56.h"
13		14
14	static const struct reg_sequence cs35l56_patch[] = {	15	static const struct reg_sequence cs35l56_patch[] = {
		16	/*
		17	* Firmware can change these to non-defaults to satisfy SDCA.
		18	* Ensure that they are at known defaults.
		19	*/
		20	{ CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 },
		21	{ CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 },
		22	{ CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 },
		23	{ CS35L56_SWIRE_DP3_CH4_INPUT, 0x00000028 },
		24
15	/* These are not reset by a soft-reset, so patch to defaults. */	25	/* These are not reset by a soft-reset, so patch to defaults. */
16	{ CS35L56_MAIN_RENDER_USER_MUTE, 0x00000000 },	26	{ CS35L56_MAIN_RENDER_USER_MUTE, 0x00000000 },
17	{ CS35L56_MAIN_RENDER_USER_VOLUME, 0x00000000 },	27	{ CS35L56_MAIN_RENDER_USER_VOLUME, 0x00000000 },
@@ -34,10 +44,9 @@ static const struct reg_default cs35l56_reg_defaults[] = { · 16 unmodified lines
34	{ CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 },	44	{ CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 },
35	{ CS35L56_ASP1_DATA_CONTROL1, 0x00000018 },	45	{ CS35L56_ASP1_DATA_CONTROL1, 0x00000018 },
36	{ CS35L56_ASP1_DATA_CONTROL5, 0x00000018 },	46	{ CS35L56_ASP1_DATA_CONTROL5, 0x00000018 },
37	{ CS35L56_ASP1TX1_INPUT, 0x00000018 },	47
38	{ CS35L56_ASP1TX2_INPUT, 0x00000019 },	48	/* no defaults for ASP1TX mixer */
39	{ CS35L56_ASP1TX3_INPUT, 0x00000020 },	49
40	{ CS35L56_ASP1TX4_INPUT, 0x00000028 },
41	{ CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 },	50	{ CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 },
42	{ CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 },	51	{ CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 },
43	{ CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 },	52	{ CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 },
@@ -195,6 +204,47 @@ static bool cs35l56_volatile_reg(struct device *dev, unsigned int reg) · 151 unmodified lines
195	}	204	}
196	}	205	}
197		206
		207	/*
		208	* The firmware boot sequence can overwrite the ASP1 config registers so that
		209	* they don't match regmap's view of their values. Rewrite the values from the
		210	* regmap cache into the hardware registers.
		211	*/
		212	int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base)
		213	{
		214	struct reg_sequence asp1_regs[] = {
		215	{ .reg = CS35L56_ASP1_ENABLES1 },
		216	{ .reg = CS35L56_ASP1_CONTROL1 },
		217	{ .reg = CS35L56_ASP1_CONTROL2 },
		218	{ .reg = CS35L56_ASP1_CONTROL3 },
		219	{ .reg = CS35L56_ASP1_FRAME_CONTROL1 },
		220	{ .reg = CS35L56_ASP1_FRAME_CONTROL5 },
		221	{ .reg = CS35L56_ASP1_DATA_CONTROL1 },
		222	{ .reg = CS35L56_ASP1_DATA_CONTROL5 },
		223	};
		224	int i, ret;
		225
		226	/* Read values from regmap cache into a write sequence */
		227	for (i = 0; i < ARRAY_SIZE(asp1_regs); ++i) {
		228	ret = regmap_read(cs35l56_base->regmap, asp1_regs[i].reg, &asp1_regs[i].def);
		229	if (ret)
		230	goto err;
		231	}
		232
		233	/* Write the values cache-bypassed so that they will be written to silicon */
		234	ret = regmap_multi_reg_write_bypassed(cs35l56_base->regmap, asp1_regs,
		235	ARRAY_SIZE(asp1_regs));
		236	if (ret)
		237	goto err;
		238
		239	return 0;
		240
		241	err:
		242	dev_err(cs35l56_base->dev, "Failed to sync ASP1 registers: %d\n", ret);
		243
		244	return ret;
		245	}
		246	EXPORT_SYMBOL_NS_GPL(cs35l56_force_sync_asp1_registers_from_cache, SND_SOC_CS35L56_SHARED);
		247
198	int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command)	248	int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command)
199	{	249	{
200	unsigned int val;	250	unsigned int val;
@@ -400,17 +450,6 @@ int cs35l56_is_fw_reload_needed(struct cs35l56_base *cs35l56_base) · 199 unmodified lines
400	unsigned int val;	450	unsigned int val;
401	int ret;	451	int ret;
402		452
403	/* Nothing to re-patch if we haven't done any patching yet. */
404	if (!cs35l56_base->fw_patched)
405	return false;
406
407	/*
408	* If we have control of RESET we will have asserted it so the firmware
409	* will need re-patching.
410	*/
411	if (cs35l56_base->reset_gpio)
412	return true;
413
414	/*	453	/*
415	* In secure mode FIRMWARE_MISSING is cleared by the BIOS loader so	454	* In secure mode FIRMWARE_MISSING is cleared by the BIOS loader so
416	* can't be used here to test for memory retention.	455	* can't be used here to test for memory retention.
@@ -590,10 +629,35 @@ void cs35l56_init_cs_dsp(struct cs35l56_base cs35l56_base, struct cs_dsp cs_ds · 173 unmodified lines
590	}	629	}
591	EXPORT_SYMBOL_NS_GPL(cs35l56_init_cs_dsp, SND_SOC_CS35L56_SHARED);	630	EXPORT_SYMBOL_NS_GPL(cs35l56_init_cs_dsp, SND_SOC_CS35L56_SHARED);
592		631
		632	int cs35l56_read_prot_status(struct cs35l56_base *cs35l56_base,
		633	bool fw_missing, unsigned int fw_version)
		634	{
		635	unsigned int prot_status;
		636	int ret;
		637
		638	ret = regmap_read(cs35l56_base->regmap, CS35L56_PROTECTION_STATUS, &prot_status);
		639	if (ret) {
		640	dev_err(cs35l56_base->dev, "Get PROTECTION_STATUS failed: %d\n", ret);
		641	return ret;
		642	}
		643
		644	*fw_missing = !!(prot_status & CS35L56_FIRMWARE_MISSING);
		645
		646	ret = regmap_read(cs35l56_base->regmap, CS35L56_DSP1_FW_VER, fw_version);
		647	if (ret) {
		648	dev_err(cs35l56_base->dev, "Get FW VER failed: %d\n", ret);
		649	return ret;
		650	}
		651
		652	return 0;
		653	}
		654	EXPORT_SYMBOL_NS_GPL(cs35l56_read_prot_status, SND_SOC_CS35L56_SHARED);
		655
593	int cs35l56_hw_init(struct cs35l56_base *cs35l56_base)	656	int cs35l56_hw_init(struct cs35l56_base *cs35l56_base)
594	{	657	{
595	int ret;	658	int ret;
596	unsigned int devid, revid, otpid, secured;	659	unsigned int devid, revid, otpid, secured, fw_ver;
		660	bool fw_missing;
597		661
598	/*	662	/*
599	* When the system is not using a reset_gpio ensure the device is	663	* When the system is not using a reset_gpio ensure the device is
@@ -652,8 +716,13 @@ int cs35l56_hw_init(struct cs35l56_base *cs35l56_base) · 52 unmodified lines
652	return ret;	716	return ret;
653	}	717	}
654		718
655	dev_info(cs35l56_base->dev, "Cirrus Logic CS35L56%s Rev %02X OTP%d\n",	719	ret = cs35l56_read_prot_status(cs35l56_base, &fw_missing, &fw_ver);
656	cs35l56_base->secured ? "s" : "", cs35l56_base->rev, otpid);	720	if (ret)
		721	return ret;
		722
		723	dev_info(cs35l56_base->dev, "Cirrus Logic CS35L56%s Rev %02X OTP%d fw:%d.%d.%d (patched=%u)\n",
		724	cs35l56_base->secured ? "s" : "", cs35l56_base->rev, otpid,
		725	fw_ver >> 16, (fw_ver >> 8) & 0xff, fw_ver & 0xff, !fw_missing);
657		726
658	/* Wake source and _BLOCKED interrupts default to unmasked, so mask them /	727	/* Wake source and _BLOCKED interrupts default to unmasked, so mask them /
659	regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff);	728	regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff);
@@ -668,6 +737,41 @@ int cs35l56_hw_init(struct cs35l56_base *cs35l56_base) · 8 unmodified lines
668	}	737	}
669	EXPORT_SYMBOL_NS_GPL(cs35l56_hw_init, SND_SOC_CS35L56_SHARED);	738	EXPORT_SYMBOL_NS_GPL(cs35l56_hw_init, SND_SOC_CS35L56_SHARED);
670		739
		740	int cs35l56_get_speaker_id(struct cs35l56_base *cs35l56_base)
		741	{
		742	struct gpio_descs *descs;
		743	int speaker_id;
		744	int i, ret;
		745
		746	/* Read the speaker type qualifier from the motherboard GPIOs */
		747	descs = gpiod_get_array_optional(cs35l56_base->dev, "spk-id", GPIOD_IN);
		748	if (!descs) {
		749	return -ENOENT;
		750	} else if (IS_ERR(descs)) {
		751	ret = PTR_ERR(descs);
		752	return dev_err_probe(cs35l56_base->dev, ret, "Failed to get spk-id-gpios\n");
		753	}
		754
		755	speaker_id = 0;
		756	for (i = 0; i < descs->ndescs; i++) {
		757	ret = gpiod_get_value_cansleep(descs->desc[i]);
		758	if (ret < 0) {
		759	dev_err_probe(cs35l56_base->dev, ret, "Failed to read spk-id[%d]\n", i);
		760	goto err;
		761	}
		762
		763	speaker_id \|= (ret << i);
		764	}
		765
		766	dev_dbg(cs35l56_base->dev, "Speaker ID = %d\n", speaker_id);
		767	ret = speaker_id;
		768	err:
		769	gpiod_put_array(descs);
		770
		771	return ret;
		772	}
		773	EXPORT_SYMBOL_NS_GPL(cs35l56_get_speaker_id, SND_SOC_CS35L56_SHARED);
		774
671	static const u32 cs35l56_bclk_valid_for_pll_freq_table[] = {	775	static const u32 cs35l56_bclk_valid_for_pll_freq_table[] = {
672	[0x0C] = 128000,	776	[0x0C] = 128000,
673	[0x0F] = 256000,	777	[0x0F] = 256000,

sound/soc/codecs/cs35l56.c+256−45

@@ -59,6 +59,135 @@ static int cs35l56_dspwait_put_volsw(struct snd_kcontrol *kcontrol, · 58 unmodified lines
59	return snd_soc_put_volsw(kcontrol, ucontrol);	59	return snd_soc_put_volsw(kcontrol, ucontrol);
60	}	60	}
61		61
		62	static const unsigned short cs35l56_asp1_mixer_regs[] = {
		63	CS35L56_ASP1TX1_INPUT, CS35L56_ASP1TX2_INPUT,
		64	CS35L56_ASP1TX3_INPUT, CS35L56_ASP1TX4_INPUT,
		65	};
		66
		67	static const char * const cs35l56_asp1_mux_control_names[] = {
		68	"ASP1 TX1 Source", "ASP1 TX2 Source", "ASP1 TX3 Source", "ASP1 TX4 Source"
		69	};
		70
		71	static int cs35l56_dspwait_asp1tx_get(struct snd_kcontrol *kcontrol,
		72	struct snd_ctl_elem_value *ucontrol)
		73	{
		74	struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
		75	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
		76	struct soc_enum e = (struct soc_enum )kcontrol->private_value;
		77	int index = e->shift_l;
		78	unsigned int addr, val;
		79	int ret;
		80
		81	/* Wait for mux to be initialized */
		82	cs35l56_wait_dsp_ready(cs35l56);
		83	flush_work(&cs35l56->mux_init_work);
		84
		85	addr = cs35l56_asp1_mixer_regs[index];
		86	ret = regmap_read(cs35l56->base.regmap, addr, &val);
		87	if (ret)
		88	return ret;
		89
		90	val &= CS35L56_ASP_TXn_SRC_MASK;
		91	ucontrol->value.enumerated.item[0] = snd_soc_enum_val_to_item(e, val);
		92
		93	return 0;
		94	}
		95
		96	static int cs35l56_dspwait_asp1tx_put(struct snd_kcontrol *kcontrol,
		97	struct snd_ctl_elem_value *ucontrol)
		98	{
		99	struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
		100	struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
		101	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
		102	struct soc_enum e = (struct soc_enum )kcontrol->private_value;
		103	int item = ucontrol->value.enumerated.item[0];
		104	int index = e->shift_l;
		105	unsigned int addr, val;
		106	bool changed;
		107	int ret;
		108
		109	/* Wait for mux to be initialized */
		110	cs35l56_wait_dsp_ready(cs35l56);
		111	flush_work(&cs35l56->mux_init_work);
		112
		113	addr = cs35l56_asp1_mixer_regs[index];
		114	val = snd_soc_enum_item_to_val(e, item);
		115
		116	ret = regmap_update_bits_check(cs35l56->base.regmap, addr,
		117	CS35L56_ASP_TXn_SRC_MASK, val, &changed);
		118	if (!ret)
		119	return ret;
		120
		121	if (changed)
		122	snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL);
		123
		124	return changed;
		125	}
		126
		127	static void cs35l56_mark_asp1_mixer_widgets_dirty(struct cs35l56_private *cs35l56)
		128	{
		129	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(cs35l56->component);
		130	const char *prefix = cs35l56->component->name_prefix;
		131	char full_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
		132	const char *name;
		133	struct snd_kcontrol *kcontrol;
		134	struct soc_enum *e;
		135	unsigned int val[4];
		136	int i, item, ret;
		137
		138	/*
		139	* Resume so we can read the registers from silicon if the regmap
		140	* cache has not yet been populated.
		141	*/
		142	ret = pm_runtime_resume_and_get(cs35l56->base.dev);
		143	if (ret < 0)
		144	return;
		145
		146	ret = regmap_bulk_read(cs35l56->base.regmap, CS35L56_ASP1TX1_INPUT,
		147	val, ARRAY_SIZE(val));
		148
		149	pm_runtime_mark_last_busy(cs35l56->base.dev);
		150	pm_runtime_put_autosuspend(cs35l56->base.dev);
		151
		152	if (ret) {
		153	dev_err(cs35l56->base.dev, "Failed to read ASP1 mixer regs: %d\n", ret);
		154	return;
		155	}
		156
		157	snd_soc_card_mutex_lock(dapm->card);
		158	WARN_ON(!dapm->card->instantiated);
		159
		160	for (i = 0; i < ARRAY_SIZE(cs35l56_asp1_mux_control_names); ++i) {
		161	name = cs35l56_asp1_mux_control_names[i];
		162
		163	if (prefix) {
		164	snprintf(full_name, sizeof(full_name), "%s %s", prefix, name);
		165	name = full_name;
		166	}
		167
		168	kcontrol = snd_soc_card_get_kcontrol(dapm->card, name);
		169	if (!kcontrol) {
		170	dev_warn(cs35l56->base.dev, "Could not find control %s\n", name);
		171	continue;
		172	}
		173
		174	e = (struct soc_enum *)kcontrol->private_value;
		175	item = snd_soc_enum_val_to_item(e, val[i] & CS35L56_ASP_TXn_SRC_MASK);
		176	snd_soc_dapm_mux_update_power(dapm, kcontrol, item, e, NULL);
		177	}
		178
		179	snd_soc_card_mutex_unlock(dapm->card);
		180	}
		181
		182	static void cs35l56_mux_init_work(struct work_struct *work)
		183	{
		184	struct cs35l56_private *cs35l56 = container_of(work,
		185	struct cs35l56_private,
		186	mux_init_work);
		187
		188	cs35l56_mark_asp1_mixer_widgets_dirty(cs35l56);
		189	}
		190
62	static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0);	191	static DECLARE_TLV_DB_SCALE(vol_tlv, -10000, 25, 0);
63		192
64	static const struct snd_kcontrol_new cs35l56_controls[] = {	193	static const struct snd_kcontrol_new cs35l56_controls[] = {
@@ -77,40 +206,44 @@ static const struct snd_kcontrol_new cs35l56_controls[] = { · 12 unmodified lines
77	};	206	};
78		207
79	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum,	208	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx1_enum,
80	CS35L56_ASP1TX1_INPUT,	209	SND_SOC_NOPM,
81	0, CS35L56_ASP_TXn_SRC_MASK,	210	0, 0,
82	cs35l56_tx_input_texts,	211	cs35l56_tx_input_texts,
83	cs35l56_tx_input_values);	212	cs35l56_tx_input_values);
84		213
85	static const struct snd_kcontrol_new asp1_tx1_mux =	214	static const struct snd_kcontrol_new asp1_tx1_mux =
86	SOC_DAPM_ENUM("ASP1TX1 SRC", cs35l56_asp1tx1_enum);	215	SOC_DAPM_ENUM_EXT("ASP1TX1 SRC", cs35l56_asp1tx1_enum,
		216	cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
87		217
88	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum,	218	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx2_enum,
89	CS35L56_ASP1TX2_INPUT,	219	SND_SOC_NOPM,
90	0, CS35L56_ASP_TXn_SRC_MASK,	220	1, 0,
91	cs35l56_tx_input_texts,	221	cs35l56_tx_input_texts,
92	cs35l56_tx_input_values);	222	cs35l56_tx_input_values);
93		223
94	static const struct snd_kcontrol_new asp1_tx2_mux =	224	static const struct snd_kcontrol_new asp1_tx2_mux =
95	SOC_DAPM_ENUM("ASP1TX2 SRC", cs35l56_asp1tx2_enum);	225	SOC_DAPM_ENUM_EXT("ASP1TX2 SRC", cs35l56_asp1tx2_enum,
		226	cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
96		227
97	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum,	228	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx3_enum,
98	CS35L56_ASP1TX3_INPUT,	229	SND_SOC_NOPM,
99	0, CS35L56_ASP_TXn_SRC_MASK,	230	2, 0,
100	cs35l56_tx_input_texts,	231	cs35l56_tx_input_texts,
101	cs35l56_tx_input_values);	232	cs35l56_tx_input_values);
102		233
103	static const struct snd_kcontrol_new asp1_tx3_mux =	234	static const struct snd_kcontrol_new asp1_tx3_mux =
104	SOC_DAPM_ENUM("ASP1TX3 SRC", cs35l56_asp1tx3_enum);	235	SOC_DAPM_ENUM_EXT("ASP1TX3 SRC", cs35l56_asp1tx3_enum,
		236	cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
105		237
106	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum,	238	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_asp1tx4_enum,
107	CS35L56_ASP1TX4_INPUT,	239	SND_SOC_NOPM,
108	0, CS35L56_ASP_TXn_SRC_MASK,	240	3, 0,
109	cs35l56_tx_input_texts,	241	cs35l56_tx_input_texts,
110	cs35l56_tx_input_values);	242	cs35l56_tx_input_values);
111		243
112	static const struct snd_kcontrol_new asp1_tx4_mux =	244	static const struct snd_kcontrol_new asp1_tx4_mux =
113	SOC_DAPM_ENUM("ASP1TX4 SRC", cs35l56_asp1tx4_enum);	245	SOC_DAPM_ENUM_EXT("ASP1TX4 SRC", cs35l56_asp1tx4_enum,
		246	cs35l56_dspwait_asp1tx_get, cs35l56_dspwait_asp1tx_put);
114		247
115	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum,	248	static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx1_enum,
116	CS35L56_SWIRE_DP3_CH1_INPUT,	249	CS35L56_SWIRE_DP3_CH1_INPUT,
@@ -148,6 +281,21 @@ static SOC_VALUE_ENUM_SINGLE_DECL(cs35l56_sdw1tx4_enum, · 31 unmodified lines
148	static const struct snd_kcontrol_new sdw1_tx4_mux =	281	static const struct snd_kcontrol_new sdw1_tx4_mux =
149	SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum);	282	SOC_DAPM_ENUM("SDW1TX4 SRC", cs35l56_sdw1tx4_enum);
150		283
		284	static int cs35l56_asp1_cfg_event(struct snd_soc_dapm_widget *w,
		285	struct snd_kcontrol *kcontrol, int event)
		286	{
		287	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
		288	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
		289
		290	switch (event) {
		291	case SND_SOC_DAPM_PRE_PMU:
		292	/* Override register values set by firmware boot */
		293	return cs35l56_force_sync_asp1_registers_from_cache(&cs35l56->base);
		294	default:
		295	return 0;
		296	}
		297	}
		298
151	static int cs35l56_play_event(struct snd_soc_dapm_widget *w,	299	static int cs35l56_play_event(struct snd_soc_dapm_widget *w,
152	struct snd_kcontrol *kcontrol, int event)	300	struct snd_kcontrol *kcontrol, int event)
153	{	301	{
@@ -184,6 +332,9 @@ static const struct snd_soc_dapm_widget cs35l56_dapm_widgets[] = { · 30 unmodified lines
184	SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0),	332	SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_B", 0, 0),
185	SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0),	333	SND_SOC_DAPM_REGULATOR_SUPPLY("VDD_AMP", 0, 0),
186		334
		335	SND_SOC_DAPM_SUPPLY("ASP1 CFG", SND_SOC_NOPM, 0, 0, cs35l56_asp1_cfg_event,
		336	SND_SOC_DAPM_PRE_PMU),
		337
187	SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event,	338	SND_SOC_DAPM_SUPPLY("PLAY", SND_SOC_NOPM, 0, 0, cs35l56_play_event,
188	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),	339	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMU \| SND_SOC_DAPM_POST_PMD),
189		340
@@ -251,6 +402,9 @@ static const struct snd_soc_dapm_route cs35l56_audio_map[] = { · 61 unmodified lines
251	{ "AMP", NULL, "VDD_B" },	402	{ "AMP", NULL, "VDD_B" },
252	{ "AMP", NULL, "VDD_AMP" },	403	{ "AMP", NULL, "VDD_AMP" },
253		404
		405	{ "ASP1 Playback", NULL, "ASP1 CFG" },
		406	{ "ASP1 Capture", NULL, "ASP1 CFG" },
		407
254	{ "ASP1 Playback", NULL, "PLAY" },	408	{ "ASP1 Playback", NULL, "PLAY" },
255	{ "SDW1 Playback", NULL, "PLAY" },	409	{ "SDW1 Playback", NULL, "PLAY" },
256		410
@@ -650,7 +804,7 @@ static struct snd_soc_dai_driver cs35l56_dai[] = { · 393 unmodified lines
650	}	804	}
651	};	805	};
652		806
653	static void cs35l56_secure_patch(struct cs35l56_private *cs35l56)	807	static void cs35l56_reinit_patch(struct cs35l56_private *cs35l56)
654	{	808	{
655	int ret;	809	int ret;
656		810
@@ -662,19 +816,10 @@ static void cs35l56_secure_patch(struct cs35l56_private *cs35l56) · 5 unmodified lines
662	cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);	816	cs35l56_mbox_send(&cs35l56->base, CS35L56_MBOX_CMD_AUDIO_REINIT);
663	}	817	}
664		818
665	static void cs35l56_patch(struct cs35l56_private *cs35l56)	819	static void cs35l56_patch(struct cs35l56_private *cs35l56, bool firmware_missing)
666	{	820	{
667	unsigned int firmware_missing;
668	int ret;	821	int ret;
669		822
670	ret = regmap_read(cs35l56->base.regmap, CS35L56_PROTECTION_STATUS, &firmware_missing);
671	if (ret) {
672	dev_err(cs35l56->base.dev, "Failed to read PROTECTION_STATUS: %d\n", ret);
673	return;
674	}
675
676	firmware_missing &= CS35L56_FIRMWARE_MISSING;
677
678	/*	823	/*
679	* Disable SoundWire interrupts to prevent race with IRQ work.	824	* Disable SoundWire interrupts to prevent race with IRQ work.
680	* Setting sdw_irq_no_unmask prevents the handler re-enabling	825	* Setting sdw_irq_no_unmask prevents the handler re-enabling
@@ -747,23 +892,59 @@ static void cs35l56_dsp_work(struct work_struct *work) · 66 unmodified lines
747	struct cs35l56_private *cs35l56 = container_of(work,	892	struct cs35l56_private *cs35l56 = container_of(work,
748	struct cs35l56_private,	893	struct cs35l56_private,
749	dsp_work);	894	dsp_work);
		895	unsigned int firmware_version;
		896	bool firmware_missing;
		897	int ret;
750		898
751	if (!cs35l56->base.init_done)	899	if (!cs35l56->base.init_done)
752	return;	900	return;
753		901
754	pm_runtime_get_sync(cs35l56->base.dev);	902	pm_runtime_get_sync(cs35l56->base.dev);
755		903
		904	ret = cs35l56_read_prot_status(&cs35l56->base, &firmware_missing, &firmware_version);
		905	if (ret)
		906	goto err;
		907
		908	/* Populate fw file qualifier with the revision and security state */
		909	kfree(cs35l56->dsp.fwf_name);
		910	if (firmware_missing) {
		911	cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL, "%02x-dsp1", cs35l56->base.rev);
		912	} else {
		913	/* Firmware files must match the running firmware version */
		914	cs35l56->dsp.fwf_name = kasprintf(GFP_KERNEL,
		915	"%02x%s-%06x-dsp1",
		916	cs35l56->base.rev,
		917	cs35l56->base.secured ? "-s" : "",
		918	firmware_version);
		919	}
		920
		921	if (!cs35l56->dsp.fwf_name)
		922	goto err;
		923
		924	dev_dbg(cs35l56->base.dev, "DSP fwf name: '%s' system name: '%s'\n",
		925	cs35l56->dsp.fwf_name, cs35l56->dsp.system_name);
		926
756	/*	927	/*
757	* When the device is running in secure mode the firmware files can	928	* The firmware cannot be patched if it is already running from
758	* only contain insecure tunings and therefore we do not need to	929	* patch RAM. In this case the firmware files are versioned to
759	* shutdown the firmware to apply them and can use the lower cost	930	* match the running firmware version and will only contain
760	* reinit sequence instead.	931	* tunings. We do not need to shutdown the firmware to apply
		932	* tunings so can use the lower cost reinit sequence instead.
761	*/	933	*/
762	if (cs35l56->base.secured)	934	if (!firmware_missing)
763	cs35l56_secure_patch(cs35l56);	935	cs35l56_reinit_patch(cs35l56);
764	else	936	else
765	cs35l56_patch(cs35l56);	937	cs35l56_patch(cs35l56, firmware_missing);
766		938
		939
		940	/*
		941	* Set starting value of ASP1 mux widgets. Updating a mux takes
		942	* the DAPM mutex. Post this to a separate job so that DAPM
		943	* power-up can wait for dsp_work to complete without deadlocking
		944	* on the DAPM mutex.
		945	*/
		946	queue_work(cs35l56->dsp_wq, &cs35l56->mux_init_work);
		947	err:
767	pm_runtime_mark_last_busy(cs35l56->base.dev);	948	pm_runtime_mark_last_busy(cs35l56->base.dev);
768	pm_runtime_put_autosuspend(cs35l56->base.dev);	949	pm_runtime_put_autosuspend(cs35l56->base.dev);
769	}	950	}
@@ -778,10 +959,19 @@ static int cs35l56_component_probe(struct snd_soc_component *component) · 8 unmodified lines
778		959
779	if (!cs35l56->dsp.system_name &&	960	if (!cs35l56->dsp.system_name &&
780	(snd_soc_card_get_pci_ssid(component->card, &vendor, &device) == 0)) {	961	(snd_soc_card_get_pci_ssid(component->card, &vendor, &device) == 0)) {
781	cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev,	962	/* Append a speaker qualifier if there is a speaker ID */
782	GFP_KERNEL,	963	if (cs35l56->speaker_id >= 0) {
783	"%04x%04x",	964	cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev,
784	vendor, device);	965	GFP_KERNEL,
		966	"%04x%04x-spkid%d",
		967	vendor, device,
		968	cs35l56->speaker_id);
		969	} else {
		970	cs35l56->dsp.system_name = devm_kasprintf(cs35l56->base.dev,
		971	GFP_KERNEL,
		972	"%04x%04x",
		973	vendor, device);
		974	}
785	if (!cs35l56->dsp.system_name)	975	if (!cs35l56->dsp.system_name)
786	return -ENOMEM;	976	return -ENOMEM;
787	}	977	}
@@ -809,6 +999,17 @@ static void cs35l56_component_remove(struct snd_soc_component *component) · 21 unmodified lines
809	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);	999	struct cs35l56_private *cs35l56 = snd_soc_component_get_drvdata(component);
810		1000
811	cancel_work_sync(&cs35l56->dsp_work);	1001	cancel_work_sync(&cs35l56->dsp_work);
		1002	cancel_work_sync(&cs35l56->mux_init_work);
		1003
		1004	if (cs35l56->dsp.cs_dsp.booted)
		1005	wm_adsp_power_down(&cs35l56->dsp);
		1006
		1007	wm_adsp2_component_remove(&cs35l56->dsp, component);
		1008
		1009	kfree(cs35l56->dsp.fwf_name);
		1010	cs35l56->dsp.fwf_name = NULL;
		1011
		1012	cs35l56->component = NULL;
812	}	1013	}
813		1014
814	static int cs35l56_set_bias_level(struct snd_soc_component *component,	1015	static int cs35l56_set_bias_level(struct snd_soc_component *component,
@@ -869,8 +1070,10 @@ int cs35l56_system_suspend(struct device *dev) · 54 unmodified lines
869		1070
870	dev_dbg(dev, "system_suspend\n");	1071	dev_dbg(dev, "system_suspend\n");
871		1072
872	if (cs35l56->component)	1073	if (cs35l56->component) {
873	flush_work(&cs35l56->dsp_work);	1074	flush_work(&cs35l56->dsp_work);
		1075	cancel_work_sync(&cs35l56->mux_init_work);
		1076	}
874		1077
875	/*	1078	/*
876	* The interrupt line is normally shared, but after we start suspending	1079	* The interrupt line is normally shared, but after we start suspending
@@ -1021,6 +1224,7 @@ static int cs35l56_dsp_init(struct cs35l56_private *cs35l56) · 144 unmodified lines
1021	return -ENOMEM;	1224	return -ENOMEM;
1022		1225
1023	INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work);	1226	INIT_WORK(&cs35l56->dsp_work, cs35l56_dsp_work);
		1227	INIT_WORK(&cs35l56->mux_init_work, cs35l56_mux_init_work);
1024		1228
1025	dsp = &cs35l56->dsp;	1229	dsp = &cs35l56->dsp;
1026	cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp);	1230	cs35l56_init_cs_dsp(&cs35l56->base, &dsp->cs_dsp);
@@ -1050,7 +1254,13 @@ static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56) · 23 unmodified lines
1050	if (ret < 0)	1254	if (ret < 0)
1051	return 0;	1255	return 0;
1052		1256
1053	cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL);	1257	/* Append a speaker qualifier if there is a speaker ID */
		1258	if (cs35l56->speaker_id >= 0)
		1259	cs35l56->dsp.system_name = devm_kasprintf(dev, GFP_KERNEL, "%s-spkid%d",
		1260	prop, cs35l56->speaker_id);
		1261	else
		1262	cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL);
		1263
1054	if (cs35l56->dsp.system_name == NULL)	1264	if (cs35l56->dsp.system_name == NULL)
1055	return -ENOMEM;	1265	return -ENOMEM;
1056		1266
@@ -1065,6 +1275,7 @@ int cs35l56_common_probe(struct cs35l56_private *cs35l56) · 8 unmodified lines
1065		1275
1066	init_completion(&cs35l56->init_completion);	1276	init_completion(&cs35l56->init_completion);
1067	mutex_init(&cs35l56->base.irq_lock);	1277	mutex_init(&cs35l56->base.irq_lock);
		1278	cs35l56->speaker_id = -ENOENT;
1068		1279
1069	dev_set_drvdata(cs35l56->base.dev, cs35l56);	1280	dev_set_drvdata(cs35l56->base.dev, cs35l56);
1070		1281
@@ -1101,6 +1312,12 @@ int cs35l56_common_probe(struct cs35l56_private *cs35l56) · 30 unmodified lines
1101	gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);	1312	gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);
1102	}	1313	}
1103		1314
		1315	ret = cs35l56_get_speaker_id(&cs35l56->base);
		1316	if ((ret < 0) && (ret != -ENOENT))
		1317	goto err;
		1318
		1319	cs35l56->speaker_id = ret;
		1320
1104	ret = cs35l56_get_firmware_uid(cs35l56);	1321	ret = cs35l56_get_firmware_uid(cs35l56);
1105	if (ret != 0)	1322	if (ret != 0)
1106	goto err;	1323	goto err;
@@ -1152,11 +1369,9 @@ int cs35l56_init(struct cs35l56_private *cs35l56) · 45 unmodified lines
1152	if (ret < 0)	1369	if (ret < 0)
1153	return ret;	1370	return ret;
1154		1371
1155	/* Populate the DSP information with the revision and security state */	1372	ret = cs35l56_set_patch(&cs35l56->base);
1156	cs35l56->dsp.part = devm_kasprintf(cs35l56->base.dev, GFP_KERNEL, "cs35l56%s-%02x",	1373	if (ret)
1157	cs35l56->base.secured ? "s" : "", cs35l56->base.rev);	1374	return ret;
1158	if (!cs35l56->dsp.part)
1159	return -ENOMEM;
1160		1375
1161	if (!cs35l56->base.reset_gpio) {	1376	if (!cs35l56->base.reset_gpio) {
1162	dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n");	1377	dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n");
@@ -1190,10 +1405,6 @@ post_soft_reset: · 27 unmodified lines
1190	if (ret)	1405	if (ret)
1191	return ret;	1406	return ret;
1192		1407
1193	ret = cs35l56_set_patch(&cs35l56->base);
1194	if (ret)
1195	return ret;
1196
1197	/* Registers could be dirty after soft reset or SoundWire enumeration */	1408	/* Registers could be dirty after soft reset or SoundWire enumeration */
1198	regcache_sync(cs35l56->base.regmap);	1409	regcache_sync(cs35l56->base.regmap);
1199		1410

sound/soc/codecs/cs35l56.h+2−0

 	struct wm_adsp dsp; /* must be first member */
 	struct cs35l56_base base;
 	struct work_struct dsp_work;
+	struct work_struct mux_init_work;
 	struct workqueue_struct *dsp_wq;
 	struct snd_soc_component *component;
 	struct regulator_bulk_data supplies[CS35L56_NUM_BULK_SUPPLIES];
 	bool sdw_attached;
 	struct completion init_completion;
+	int speaker_id;
 	u32 rx_mask;
 	u32 tx_mask;
 	u8 asp_slot_width;

sound/soc/codecs/es8326.c+139−47

@@ -45,6 +45,82 @@ struct es8326_priv { · 44 unmodified lines
45	int jack_remove_retry;	45	int jack_remove_retry;
46	};	46	};
47		47
		48	static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol,
		49	struct snd_ctl_elem_value *ucontrol)
		50	{
		51	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
		52	struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
		53	unsigned int crosstalk_h, crosstalk_l;
		54	unsigned int crosstalk;
		55
		56	regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
		57	regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
		58	crosstalk_h &= 0x20;
		59	crosstalk_l &= 0xf0;
		60	crosstalk = crosstalk_h >> 1 \| crosstalk_l >> 4;
		61	ucontrol->value.integer.value[0] = crosstalk;
		62
		63	return 0;
		64	}
		65
		66	static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol,
		67	struct snd_ctl_elem_value *ucontrol)
		68	{
		69	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
		70	struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
		71	unsigned int crosstalk_h, crosstalk_l;
		72	unsigned int crosstalk;
		73
		74	crosstalk = ucontrol->value.integer.value[0];
		75	regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
		76	crosstalk_h = (crosstalk & 0x10) << 1;
		77	crosstalk_l &= 0x0f;
		78	crosstalk_l \|= (crosstalk & 0x0f) << 4;
		79	regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
		80	0x20, crosstalk_h);
		81	regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
		82
		83	return 0;
		84	}
		85
		86	static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol,
		87	struct snd_ctl_elem_value *ucontrol)
		88	{
		89	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
		90	struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
		91	unsigned int crosstalk_h, crosstalk_l;
		92	unsigned int crosstalk;
		93
		94	regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
		95	regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
		96	crosstalk_h &= 0x10;
		97	crosstalk_l &= 0x0f;
		98	crosstalk = crosstalk_h \| crosstalk_l;
		99	ucontrol->value.integer.value[0] = crosstalk;
		100
		101	return 0;
		102	}
		103
		104	static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol,
		105	struct snd_ctl_elem_value *ucontrol)
		106	{
		107	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
		108	struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
		109	unsigned int crosstalk_h, crosstalk_l;
		110	unsigned int crosstalk;
		111
		112	crosstalk = ucontrol->value.integer.value[0];
		113	regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
		114	crosstalk_h = crosstalk & 0x10;
		115	crosstalk_l &= 0xf0;
		116	crosstalk_l \|= crosstalk & 0x0f;
		117	regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
		118	0x10, crosstalk_h);
		119	regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
		120
		121	return 0;
		122	}
		123
48	static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);	124	static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
49	static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);	125	static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
50	static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);	126	static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);
@@ -102,6 +178,10 @@ static const struct snd_kcontrol_new es8326_snd_controls[] = { · 51 unmodified lines
102	SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,	178	SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,
103	0, 0x0f, 0, drc_target_tlv),	179	0, 0x0f, 0, drc_target_tlv),
104		180
		181	SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0,
		182	es8326_crosstalk1_get, es8326_crosstalk1_set),
		183	SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0,
		184	es8326_crosstalk2_get, es8326_crosstalk2_set),
105	};	185	};
106		186
107	static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {	187	static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
@@ -117,12 +197,6 @@ static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { · 9 unmodified lines
117	SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),	197	SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),
118	SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),	198	SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),
119		199
120	/* ADC Digital Mute */
121	SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0),
122	SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0),
123	SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0),
124	SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0),
125
126	/* Analog Power Supply*/	200	/* Analog Power Supply*/
127	SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),	201	SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),
128	SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),	202	SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),
@@ -142,15 +216,10 @@ static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = { · 13 unmodified lines
142	};	216	};
143		217
144	static const struct snd_soc_dapm_route es8326_dapm_routes[] = {	218	static const struct snd_soc_dapm_route es8326_dapm_routes[] = {
145	{"ADC L1", NULL, "MIC1"},	219	{"ADC L", NULL, "MIC1"},
146	{"ADC R1", NULL, "MIC2"},	220	{"ADC R", NULL, "MIC2"},
147	{"ADC L2", NULL, "MIC3"},	221	{"ADC L", NULL, "MIC3"},
148	{"ADC R2", NULL, "MIC4"},	222	{"ADC R", NULL, "MIC4"},
149
150	{"ADC L", NULL, "ADC L1"},
151	{"ADC R", NULL, "ADC R1"},
152	{"ADC L", NULL, "ADC L2"},
153	{"ADC R", NULL, "ADC R2"},
154		223
155	{"I2S OUT", NULL, "ADC L"},	224	{"I2S OUT", NULL, "ADC L"},
156	{"I2S OUT", NULL, "ADC R"},	225	{"I2S OUT", NULL, "ADC R"},
@@ -440,10 +509,16 @@ static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction) · 283 unmodified lines
440	unsigned int offset_l, offset_r;	509	unsigned int offset_l, offset_r;
441		510
442	if (mute) {	511	if (mute) {
443	regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);	512	if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
444	regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,	513	regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
445	ES8326_MUTE_MASK, ES8326_MUTE);	514	regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
446	regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0);	515	ES8326_MUTE_MASK, ES8326_MUTE);
		516	regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF,
		517	0x30, 0x00);
		518	} else {
		519	regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
		520	0x0F, 0x0F);
		521	}
447	} else {	522	} else {
448	if (!es8326->calibrated) {	523	if (!es8326->calibrated) {
449	regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);	524	regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);
@@ -456,11 +531,22 @@ static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction) · 6 unmodified lines
456	regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);	531	regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
457	es8326->calibrated = true;	532	es8326->calibrated = true;
458	}	533	}
459	regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);	534	if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
460	regmap_write(es8326->regmap, ES8326_HP_VOL, 0x91);	535	regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01);
461	regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);	536	usleep_range(1000, 5000);
462	regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,	537	regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
463	ES8326_MUTE_MASK, ~(ES8326_MUTE));	538	usleep_range(1000, 5000);
		539	regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20);
		540	regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30);
		541	regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
		542	regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
		543	regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
		544	ES8326_MUTE_MASK, ~(ES8326_MUTE));
		545	} else {
		546	msleep(300);
		547	regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
		548	0x0F, 0x00);
		549	}
464	}	550	}
465	return 0;	551	return 0;
466	}	552	}
@@ -477,23 +563,20 @@ static int es8326_set_bias_level(struct snd_soc_component *codec, · 10 unmodified lines
477	if (ret)	563	if (ret)
478	return ret;	564	return ret;
479		565
480	regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);	566	regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02);
		567	usleep_range(5000, 10000);
481	regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);	568	regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);
482	regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,	569	regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
483	(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));	570	(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
484	regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
485	regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);	571	regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);
486	regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);	572	regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
487	regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20);	573	regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20);
488		574	regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00);
489	regmap_update_bits(es8326->regmap, ES8326_RESET,
490	ES8326_CSM_ON, ES8326_CSM_ON);
491	break;	575	break;
492	case SND_SOC_BIAS_PREPARE:	576	case SND_SOC_BIAS_PREPARE:
493	break;	577	break;
494	case SND_SOC_BIAS_STANDBY:	578	case SND_SOC_BIAS_STANDBY:
495	regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);	579	regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
496	regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00);
497	regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);	580	regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);
498	regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);	581	regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);
499	break;	582	break;
@@ -513,7 +596,7 @@ static const struct snd_soc_dai_ops es8326_ops = { · 13 unmodified lines
513	.set_fmt = es8326_set_dai_fmt,	596	.set_fmt = es8326_set_dai_fmt,
514	.set_sysclk = es8326_set_dai_sysclk,	597	.set_sysclk = es8326_set_dai_sysclk,
515	.mute_stream = es8326_mute,	598	.mute_stream = es8326_mute,
516	.no_capture_mute = 1,	599	.no_capture_mute = 0,
517	};	600	};
518		601
519	static struct snd_soc_dai_driver es8326_dai = {	602	static struct snd_soc_dai_driver es8326_dai = {
@@ -672,6 +755,8 @@ static void es8326_jack_detect_handler(struct work_struct *work) · 152 unmodified lines
672	es8326->hp = 0;	755	es8326->hp = 0;
673	}	756	}
674	regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);	757	regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
		758	regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a);
		759	regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03);
675	/*	760	/*
676	* Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event	761	* Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
677	*/	762	*/
@@ -695,8 +780,11 @@ static void es8326_jack_detect_handler(struct work_struct *work) · 17 unmodified lines
695	* Don't report jack status.	780	* Don't report jack status.
696	*/	781	*/
697	regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);	782	regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
		783	es8326_enable_micbias(es8326->component);
698	usleep_range(50000, 70000);	784	usleep_range(50000, 70000);
699	regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);	785	regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
		786	regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f);
		787	regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08);
700	queue_delayed_work(system_wq, &es8326->jack_detect_work,	788	queue_delayed_work(system_wq, &es8326->jack_detect_work,
701	msecs_to_jiffies(400));	789	msecs_to_jiffies(400));
702	es8326->hp = 1;	790	es8326->hp = 1;
@@ -736,13 +824,10 @@ exit: · 33 unmodified lines
736	static irqreturn_t es8326_irq(int irq, void *dev_id)	824	static irqreturn_t es8326_irq(int irq, void *dev_id)
737	{	825	{
738	struct es8326_priv *es8326 = dev_id;	826	struct es8326_priv *es8326 = dev_id;
739	struct snd_soc_component *comp = es8326->component;
740		827
741	if (!es8326->jack)	828	if (!es8326->jack)
742	goto out;	829	goto out;
743		830
744	es8326_enable_micbias(comp);
745
746	if (es8326->jack->status & SND_JACK_HEADSET)	831	if (es8326->jack->status & SND_JACK_HEADSET)
747	queue_delayed_work(system_wq, &es8326->jack_detect_work,	832	queue_delayed_work(system_wq, &es8326->jack_detect_work,
748	msecs_to_jiffies(10));	833	msecs_to_jiffies(10));
@@ -766,14 +851,14 @@ static int es8326_calibrate(struct snd_soc_component *component) · 17 unmodified lines
766	if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) {	851	if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) {
767	dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");	852	dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");
768	regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);	853	regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);
769	regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x01);	854	regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03);
770	regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);	855	regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);
771	regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);	856	regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);
772	regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);	857	regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);
773	regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);	858	regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);
774	regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);	859	regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);
775	regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);	860	regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);
776	regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03);	861	regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);
777	regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);	862	regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);
778	usleep_range(15000, 20000);	863	usleep_range(15000, 20000);
779	regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);	864	regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
@@ -814,13 +899,13 @@ static int es8326_resume(struct snd_soc_component *component) · 34 unmodified lines
814	/* reset internal clock state */	899	/* reset internal clock state */
815	regmap_write(es8326->regmap, ES8326_RESET, 0x1f);	900	regmap_write(es8326->regmap, ES8326_RESET, 0x1f);
816	regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);	901	regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
		902	regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
817	usleep_range(10000, 15000);	903	usleep_range(10000, 15000);
818	regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xe9);	904	regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xe9);
819	regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0x4b);	905	regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xcb);
820	/* set headphone default type and detect pin */	906	/* set headphone default type and detect pin */
821	regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);	907	regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);
822	regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);	908	regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);
823	regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30);
824		909
825	/* set internal oscillator as clock source of headpone cp */	910	/* set internal oscillator as clock source of headpone cp */
826	regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);	911	regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);
@@ -828,14 +913,15 @@ static int es8326_resume(struct snd_soc_component *component) · 1 unmodified line
828	/* clock manager reset release */	913	/* clock manager reset release */
829	regmap_write(es8326->regmap, ES8326_RESET, 0x17);	914	regmap_write(es8326->regmap, ES8326_RESET, 0x17);
830	/* set headphone detection as half scan mode */	915	/* set headphone detection as half scan mode */
831	regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30);	916	regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d);
832	regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);	917	regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);
833		918
834	/* enable headphone driver */	919	/* enable headphone driver */
		920	regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4);
835	regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);	921	regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);
836	usleep_range(2000, 5000);	922	usleep_range(2000, 5000);
837	regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xa3);	923	regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23);
838	regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xb3);	924	regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33);
839	regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);	925	regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
840		926
841	regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);	927	regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
@@ -844,6 +930,8 @@ static int es8326_resume(struct snd_soc_component *component) · 2 unmodified lines
844	regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);	930	regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);
845	/* calibrate for B version */	931	/* calibrate for B version */
846	es8326_calibrate(component);	932	es8326_calibrate(component);
		933	regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa);
		934	regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00);
847	/* turn off headphone out */	935	/* turn off headphone out */
848	regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);	936	regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);
849	/* set ADC and DAC in low power mode */	937	/* set ADC and DAC in low power mode */
@@ -856,6 +944,14 @@ static int es8326_resume(struct snd_soc_component *component) · 6 unmodified lines
856	regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);	944	regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);
857	regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);	945	regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);
858		946
		947	regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 \|
		948	((es8326->version == ES8326_VERSION_B) ?
		949	(ES8326_HP_DET_SRC_PIN9 \| es8326->jack_pol) :
		950	(ES8326_HP_DET_SRC_PIN9 \| es8326->jack_pol \| 0x04)));
		951	usleep_range(5000, 10000);
		952	es8326_enable_micbias(es8326->component);
		953	usleep_range(50000, 70000);
		954	regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
859	regmap_write(es8326->regmap, ES8326_INT_SOURCE,	955	regmap_write(es8326->regmap, ES8326_INT_SOURCE,
860	(ES8326_INT_SRC_PIN9 \| ES8326_INT_SRC_BUTTON));	956	(ES8326_INT_SRC_PIN9 \| ES8326_INT_SRC_BUTTON));
861	regmap_write(es8326->regmap, ES8326_INTOUT_IO,	957	regmap_write(es8326->regmap, ES8326_INTOUT_IO,
@@ -864,7 +960,7 @@ static int es8326_resume(struct snd_soc_component *component) · 2 unmodified lines
864	(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));	960	(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
865	regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);	961	regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);
866		962
867	regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);	963	regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
868	regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);	964	regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);
869	regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,	965	regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,
870	ES8326_MIC1_SEL);	966	ES8326_MIC1_SEL);
@@ -872,11 +968,7 @@ static int es8326_resume(struct snd_soc_component *component) · 1 unmodified line
872	regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,	968	regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,
873	ES8326_MUTE);	969	ES8326_MUTE);
874		970
875	regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 \|	971	regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f);
876	((es8326->version == ES8326_VERSION_B) ?
877	(ES8326_HP_DET_SRC_PIN9 \| es8326->jack_pol) :
878	(ES8326_HP_DET_SRC_PIN9 \| es8326->jack_pol \| 0x04)));
879	regmap_write(es8326->regmap, ES8326_HP_VOL, 0x11);
880		972
881	es8326->jack_remove_retry = 0;	973	es8326->jack_remove_retry = 0;
882	es8326->hp = 0;	974	es8326->hp = 0;

sound/soc/codecs/es8326.h+2−1

 #define ES8326_DAC_VOL		0x50
 #define ES8326_DRC_RECOVERY	0x53
 #define ES8326_DRC_WINSIZE	0x54
+#define ES8326_DAC_CROSSTALK	0x55
 #define ES8326_HPJACK_TIMER	0x56
 #define ES8326_HPDET_TYPE	0x57
 #define ES8326_INT_SOURCE	0x58
 #define ES8326_MUTE (3 << 0)
 /* ES8326_CLK_CTL */
-#define ES8326_CLK_ON (0x7f << 0)
+#define ES8326_CLK_ON (0x7e << 0)
 #define ES8326_CLK_OFF (0 << 0)
 /* ES8326_CLK_INV */

sound/soc/codecs/lpass-wsa-macro.c+0−7

 	u16 gain_reg;
 	u16 reg;
 	int val;
-	int offset_val = 0;
 	struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
 	if (w->shift == WSA_MACRO_COMP1) {
 					CDC_WSA_RX1_RX_PATH_MIX_SEC0,
 					CDC_WSA_RX_PGA_HALF_DB_MASK,
 					CDC_WSA_RX_PGA_HALF_DB_ENABLE);
-			offset_val = -2;
 		}
 		val = snd_soc_component_read(component, gain_reg);
-		val += offset_val;
 		snd_soc_component_write(component, gain_reg, val);
 		wsa_macro_config_ear_spkr_gain(component, wsa,
 						event, gain_reg);
 					CDC_WSA_RX1_RX_PATH_MIX_SEC0,
 					CDC_WSA_RX_PGA_HALF_DB_MASK,
 					CDC_WSA_RX_PGA_HALF_DB_DISABLE);
-			offset_val = 2;
-			val = snd_soc_component_read(component, gain_reg);
-			val += offset_val;
-			snd_soc_component_write(component, gain_reg, val);
 		}
 		wsa_macro_config_ear_spkr_gain(component, wsa,
 						event, gain_reg);

sound/soc/codecs/wcd9335.c+0−4

 {
 	struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
 	u16 gain_reg;
-	int offset_val = 0;
 	int val = 0;
 	switch (w->reg) {
 	switch (event) {
 	case SND_SOC_DAPM_POST_PMU:
 		val = snd_soc_component_read(comp, gain_reg);
-		val += offset_val;
 		snd_soc_component_write(comp, gain_reg, val);
 		break;
 	case SND_SOC_DAPM_POST_PMD:
 	u16 gain_reg;
 	u16 reg;
 	int val;
-	int offset_val = 0;
 	if (!(snd_soc_dapm_widget_name_cmp(w, "RX INT0 INTERP"))) {
 		reg = WCD9335_CDC_RX0_RX_PATH_CTL;
 	case SND_SOC_DAPM_POST_PMU:
 		wcd9335_config_compander(comp, w->shift, event);
 		val = snd_soc_component_read(comp, gain_reg);
-		val += offset_val;
 		snd_soc_component_write(comp, gain_reg, val);
 		break;
 	case SND_SOC_DAPM_POST_PMD:

sound/soc/codecs/wcd934x.c+0−1

@@ -13,7 +13,6 @@ · 12 unmodified lines
13	#include <linux/of.h>	13	#include <linux/of.h>
14	#include <linux/platform_device.h>	14	#include <linux/platform_device.h>
15	#include <linux/regmap.h>	15	#include <linux/regmap.h>
16	#include <linux/regulator/consumer.h>
17	#include <linux/slab.h>	16	#include <linux/slab.h>
18	#include <linux/slimbus.h>	17	#include <linux/slimbus.h>
19	#include <sound/pcm_params.h>	18	#include <sound/pcm_params.h>

sound/soc/codecs/wcd938x.c+3−5

 };
 static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(ear_pa_gain, 600, -1800);
-static const DECLARE_TLV_DB_SCALE(line_gain, -3000, 150, -3000);
+static const DECLARE_TLV_DB_SCALE(line_gain, -3000, 150, 0);
 static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(analog_gain, 0, 3000);
 struct wcd938x_mbhc_zdet_param {
 	mutex_init(&wcd938x->micb_lock);
 	ret = wcd938x_populate_dt_data(wcd938x, dev);
-	if (ret) {
+	if (ret)
-		dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
+		return ret;
-		return -EINVAL;
-	}
 	ret = wcd938x_add_slave_components(wcd938x, dev, &match);
 	if (ret)

sound/soc/codecs/wm_adsp.c+31−42

 					 const char *filetype)
 {
 	struct cs_dsp *cs_dsp = &dsp->cs_dsp;
+	const char *fwf;
 	char *s, c;
 	int ret = 0;
+	if (dsp->fwf_name)
+		fwf = dsp->fwf_name;
+	else
+		fwf = dsp->cs_dsp.name;
 	if (system_name && asoc_component_prefix)
 		*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, dsp->part,
-				      dsp->fwf_name, wm_adsp_fw[dsp->fw].file, system_name,
+				      fwf, wm_adsp_fw[dsp->fw].file, system_name,
 				      asoc_component_prefix, filetype);
 	else if (system_name)
 		*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, dsp->part,
-				      dsp->fwf_name, wm_adsp_fw[dsp->fw].file, system_name,
+				      fwf, wm_adsp_fw[dsp->fw].file, system_name,
 				      filetype);
 	else
-		*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, dsp->part, dsp->fwf_name,
+		*filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, dsp->part, fwf,
 				      wm_adsp_fw[dsp->fw].file, filetype);
 	if (*filename == NULL)
 		}
 	}
+	/* Check system-specific bin without wmfw before falling back to generic */
+	if (dsp->wmfw_optional && system_name) {
+		if (asoc_component_prefix)
+			wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
+						      cirrus_dir, system_name,
+						      asoc_component_prefix, "bin");
+		if (!*coeff_firmware)
+			wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
+						      cirrus_dir, system_name,
+						      NULL, "bin");
+		if (*coeff_firmware)
+			return 0;
+	}
+	/* Check legacy location */
 	if (!wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
 					   "", NULL, NULL, "wmfw")) {
 		wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
 		return 0;
 	}
+	/* Fall back to generic wmfw and optional matching bin */
 	ret = wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
 					    cirrus_dir, NULL, NULL, "wmfw");
-	if (!ret) {
+	if (!ret || dsp->wmfw_optional) {
 		wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
 					      cirrus_dir, NULL, NULL, "bin");
 		return 0;
 	}
-	if (dsp->wmfw_optional) {
-		if (system_name) {
-			if (asoc_component_prefix)
-				wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
-							      cirrus_dir, system_name,
-							      asoc_component_prefix, "bin");
-			if (!*coeff_firmware)
-				wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
-							      cirrus_dir, system_name,
-							      NULL, "bin");
-		}
-		if (!*coeff_firmware)
-			wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
-						      "", NULL, NULL, "bin");
-		if (!*coeff_firmware)
-			wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
-						      cirrus_dir, NULL, NULL, "bin");
-		return 0;
-	}
 	adsp_err(dsp, "Failed to request firmware <%s>%s-%s-%s<-%s<%s>>.wmfw\n",
-		 cirrus_dir, dsp->part, dsp->fwf_name, wm_adsp_fw[dsp->fw].file,
+		 cirrus_dir, dsp->part,
-		 system_name, asoc_component_prefix);
+		 dsp->fwf_name ? dsp->fwf_name : dsp->cs_dsp.name,
+		 wm_adsp_fw[dsp->fw].file, system_name, asoc_component_prefix);
 	return -ENOENT;
 }
 static int wm_adsp_common_init(struct wm_adsp *dsp)
 {
-	char *p;
 	INIT_LIST_HEAD(&dsp->compr_list);
 	INIT_LIST_HEAD(&dsp->buffer_list);
-	if (!dsp->fwf_name) {
-		p = devm_kstrdup(dsp->cs_dsp.dev, dsp->cs_dsp.name, GFP_KERNEL);
-		if (!p)
-			return -ENOMEM;
-		dsp->fwf_name = p;
-		for (; *p != 0; ++p)
-			*p = tolower(*p);
-	}
 	return 0;
 }

sound/soc/codecs/wsa883x.c+5−1

 	return 1;
 }
-static const DECLARE_TLV_DB_SCALE(pa_gain, -300, 150, -300);
+static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(pa_gain,
+	0, 14, TLV_DB_SCALE_ITEM(-300, 0, 0),
+	15, 29, TLV_DB_SCALE_ITEM(-300, 150, 0),
+	30, 31, TLV_DB_SCALE_ITEM(1800, 0, 0),
+);
 static int wsa883x_get_swr_port(struct snd_kcontrol *kcontrol,
 				struct snd_ctl_elem_value *ucontrol)

sound/soc/qcom/sc8280xp.c+7−5

 	case WSA_CODEC_DMA_RX_0:
 	case WSA_CODEC_DMA_RX_1:
 		/*
-		 * set limit of 0dB on Digital Volume for Speakers,
+		 * Set limit of -3 dB on Digital Volume and 0 dB on PA Volume
-		 * this can prevent damage of speakers to some extent without
+		 * to reduce the risk of speaker damage until we have active
-		 * active speaker protection
+		 * speaker protection in place.
 		 */
-		snd_soc_limit_volume(card, "WSA_RX0 Digital Volume", 84);
+		snd_soc_limit_volume(card, "WSA_RX0 Digital Volume", 81);
-		snd_soc_limit_volume(card, "WSA_RX1 Digital Volume", 84);
+		snd_soc_limit_volume(card, "WSA_RX1 Digital Volume", 81);
+		snd_soc_limit_volume(card, "SpkrLeft PA Volume", 17);
+		snd_soc_limit_volume(card, "SpkrRight PA Volume", 17);
 		break;
 	default:
 		break;

sound/soc/soc-core.c+4−1

 	return -EINVAL;
 }
-#define MAX_DEFAULT_CH_MAP_SIZE 7
+#define MAX_DEFAULT_CH_MAP_SIZE 8
 static struct snd_soc_dai_link_ch_map default_ch_map_sync[MAX_DEFAULT_CH_MAP_SIZE] = {
 	{ .cpu = 0, .codec = 0 },
 	{ .cpu = 1, .codec = 1 },
 	{ .cpu = 4, .codec = 4 },
 	{ .cpu = 5, .codec = 5 },
 	{ .cpu = 6, .codec = 6 },
+	{ .cpu = 7, .codec = 7 },
 };
 static struct snd_soc_dai_link_ch_map default_ch_map_1cpu[MAX_DEFAULT_CH_MAP_SIZE] = {
 	{ .cpu = 0, .codec = 0 },
 	{ .cpu = 0, .codec = 4 },
 	{ .cpu = 0, .codec = 5 },
 	{ .cpu = 0, .codec = 6 },
+	{ .cpu = 0, .codec = 7 },
 };
 static struct snd_soc_dai_link_ch_map default_ch_map_1codec[MAX_DEFAULT_CH_MAP_SIZE] = {
 	{ .cpu = 0, .codec = 0 },
 	{ .cpu = 4, .codec = 0 },
 	{ .cpu = 5, .codec = 0 },
 	{ .cpu = 6, .codec = 0 },
+	{ .cpu = 7, .codec = 0 },
 };
 static int snd_soc_compensate_channel_connection_map(struct snd_soc_card *card,
 						     struct snd_soc_dai_link *dai_link)

sound/soc/sunxi/sun4i-spdif.c+5−0

 		.compatible = "allwinner,sun50i-h6-spdif",
 		.data = &sun50i_h6_spdif_quirks,
 	},
+	{
+		.compatible = "allwinner,sun50i-h616-spdif",
+		/* Essentially the same as the H6, but without RX */
+		.data = &sun50i_h6_spdif_quirks,
+	},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match);

sound/usb/clock.c+32−2

 	int ret, i, cur, err, pins, clock_id;
 	const u8 *sources;
 	int proto = fmt->protocol;
+	bool readable, writeable;
+	u32 bmControls;
 	entity_id &= 0xff;
 		sources = GET_VAL(selector, proto, baCSourceID);
 		cur = 0;
+		if (proto == UAC_VERSION_3)
+			bmControls = le32_to_cpu(*(__le32 *)(&selector->v3.baCSourceID[0] + pins));
+		else
+			bmControls = *(__u8 *)(&selector->v2.baCSourceID[0] + pins);
+		readable = uac_v2v3_control_is_readable(bmControls,
+							UAC2_CX_CLOCK_SELECTOR);
+		writeable = uac_v2v3_control_is_writeable(bmControls,
+							  UAC2_CX_CLOCK_SELECTOR);
 		if (pins == 1) {
 			ret = 1;
 			goto find_source;
 		}
+		/* for now just warn about buggy device */
+		if (!readable)
+			usb_audio_warn(chip,
+				"%s(): clock selector control is not readable, id %d\n",
+				__func__, clock_id);
 		/* the entity ID we are looking at is a selector.
 		 * find out what it currently selects */
 		ret = uac_clock_selector_get_val(chip, clock_id);
 					      visited, validate);
 		if (ret > 0) {
 			/* Skip setting clock selector again for some devices */
-			if (chip->quirk_flags & QUIRK_FLAG_SKIP_CLOCK_SELECTOR)
+			if (chip->quirk_flags & QUIRK_FLAG_SKIP_CLOCK_SELECTOR ||
+			    !writeable)
 				return ret;
 			err = uac_clock_selector_set_val(chip, entity_id, cur);
-			if (err < 0)
+			if (err < 0) {
+				if (pins == 1) {
+					usb_audio_dbg(chip,
+						      "%s(): selector returned an error, "
+						      "assuming a firmware bug, id %d, ret %d\n",
+						      __func__, clock_id, err);
+					return ret;
+				}
 				return err;
+			}
 		}
 		if (!validate || ret > 0 || !chip->autoclock)
 			return ret;
 	find_others:
+		if (!writeable)
+			return -ENXIO;
 		/* The current clock source is invalid, try others. */
 		for (i = 1; i <= pins; i++) {
 			if (i == cur)

sound/usb/format.c+20−0

@@ -470,9 +470,11 @@ static int validate_sample_rate_table_v2v3(struct snd_usb_audio *chip, · 469 unmodified lines
470	int clock)	470	int clock)
471	{	471	{
472	struct usb_device *dev = chip->dev;	472	struct usb_device *dev = chip->dev;
		473	struct usb_host_interface *alts;
473	unsigned int *table;	474	unsigned int *table;
474	unsigned int nr_rates;	475	unsigned int nr_rates;
475	int i, err;	476	int i, err;
		477	u32 bmControls;
476		478
477	/* performing the rate verification may lead to unexpected USB bus	479	/* performing the rate verification may lead to unexpected USB bus
478	* behavior afterwards by some unknown reason. Do this only for the	480	* behavior afterwards by some unknown reason. Do this only for the
@@ -481,6 +483,24 @@ static int validate_sample_rate_table_v2v3(struct snd_usb_audio *chip, · 2 unmodified lines
481	if (!(chip->quirk_flags & QUIRK_FLAG_VALIDATE_RATES))	483	if (!(chip->quirk_flags & QUIRK_FLAG_VALIDATE_RATES))
482	return 0; /* don't perform the validation as default */	484	return 0; /* don't perform the validation as default */
483		485
		486	alts = snd_usb_get_host_interface(chip, fp->iface, fp->altsetting);
		487	if (!alts)
		488	return 0;
		489
		490	if (fp->protocol == UAC_VERSION_3) {
		491	struct uac3_as_header_descriptor *as = snd_usb_find_csint_desc(
		492	alts->extra, alts->extralen, NULL, UAC_AS_GENERAL);
		493	bmControls = le32_to_cpu(as->bmControls);
		494	} else {
		495	struct uac2_as_header_descriptor *as = snd_usb_find_csint_desc(
		496	alts->extra, alts->extralen, NULL, UAC_AS_GENERAL);
		497	bmControls = as->bmControls;
		498	}
		499
		500	if (!uac_v2v3_control_is_readable(bmControls,
		501	UAC2_AS_VAL_ALT_SETTINGS))
		502	return 0;
		503
484	table = kcalloc(fp->nr_rates, sizeof(*table), GFP_KERNEL);	504	table = kcalloc(fp->nr_rates, sizeof(*table), GFP_KERNEL);
485	if (!table)	505	if (!table)
486	return -ENOMEM;	506	return -ENOMEM;

sound/usb/midi2.c+1−1

@@ -1085,7 +1085,7 @@ int snd_usb_midi_v2_create(struct snd_usb_audio *chip, · 1084 unmodified lines
1085	}	1085	}
1086	if ((quirk && quirk->type != QUIRK_MIDI_STANDARD_INTERFACE) \|\|	1086	if ((quirk && quirk->type != QUIRK_MIDI_STANDARD_INTERFACE) \|\|
1087	iface->num_altsetting < 2) {	1087	iface->num_altsetting < 2) {
1088	usb_audio_info(chip, "Quirk or no altest; falling back to MIDI 1.0\n");	1088	usb_audio_info(chip, "Quirk or no altset; falling back to MIDI 1.0\n");
1089	goto fallback_to_midi1;	1089	goto fallback_to_midi1;
1090	}	1090	}
1091	hostif = &iface->altsetting[1];	1091	hostif = &iface->altsetting[1];

sound/usb/quirks.c+22−16

 		   QUIRK_FLAG_CTL_MSG_DELAY_1M | QUIRK_FLAG_IGNORE_CTL_ERROR),
 	DEVICE_FLG(0x0499, 0x1509, /* Steinberg UR22 */
 		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
+	DEVICE_FLG(0x0499, 0x3108, /* Yamaha YIT-W12TX */
+		   QUIRK_FLAG_GET_SAMPLE_RATE),
 	DEVICE_FLG(0x04d8, 0xfeea, /* Benchmark DAC1 Pre */
 		   QUIRK_FLAG_GET_SAMPLE_RATE),
 	DEVICE_FLG(0x04e8, 0xa051, /* Samsung USBC Headset (AKG) */
 		   QUIRK_FLAG_SKIP_CLOCK_SELECTOR | QUIRK_FLAG_CTL_MSG_DELAY_5M),
+	DEVICE_FLG(0x0525, 0xa4ad, /* Hamedal C20 usb camero */
+		   QUIRK_FLAG_IFACE_SKIP_CLOSE),
 	DEVICE_FLG(0x054c, 0x0b8c, /* Sony WALKMAN NW-A45 DAC */
 		   QUIRK_FLAG_SET_IFACE_FIRST),
 	DEVICE_FLG(0x0556, 0x0014, /* Phoenix Audio TMX320VC */
 		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
 	DEVICE_FLG(0x0763, 0x2031, /* M-Audio Fast Track C600 */
 		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
+	DEVICE_FLG(0x07fd, 0x000b, /* MOTU M Series 2nd hardware revision */
+		   QUIRK_FLAG_CTL_MSG_DELAY_1M),
 	DEVICE_FLG(0x08bb, 0x2702, /* LineX FM Transmitter */
 		   QUIRK_FLAG_IGNORE_CTL_ERROR),
 	DEVICE_FLG(0x0951, 0x16ad, /* Kingston HyperX */
 		   QUIRK_FLAG_CTL_MSG_DELAY_1M),
 	DEVICE_FLG(0x0b0e, 0x0349, /* Jabra 550a */
 		   QUIRK_FLAG_CTL_MSG_DELAY_1M),
+	DEVICE_FLG(0x0ecb, 0x205c, /* JBL Quantum610 Wireless */
+		   QUIRK_FLAG_FIXED_RATE),
+	DEVICE_FLG(0x0ecb, 0x2069, /* JBL Quantum810 Wireless */
+		   QUIRK_FLAG_FIXED_RATE),
 	DEVICE_FLG(0x0fd9, 0x0008, /* Hauppauge HVR-950Q */
 		   QUIRK_FLAG_SHARE_MEDIA_DEVICE | QUIRK_FLAG_ALIGN_TRANSFER),
+	DEVICE_FLG(0x1224, 0x2a25, /* Jieli Technology USB PHY 2.0 */
+		   QUIRK_FLAG_GET_SAMPLE_RATE),
 	DEVICE_FLG(0x1395, 0x740a, /* Sennheiser DECT */
 		   QUIRK_FLAG_GET_SAMPLE_RATE),
 	DEVICE_FLG(0x1397, 0x0507, /* Behringer UMC202HD */
 		   QUIRK_FLAG_ITF_USB_DSD_DAC | QUIRK_FLAG_CTL_MSG_DELAY),
 	DEVICE_FLG(0x1901, 0x0191, /* GE B850V3 CP2114 audio interface */
 		   QUIRK_FLAG_GET_SAMPLE_RATE),
+	DEVICE_FLG(0x19f7, 0x0035, /* RODE NT-USB+ */
+		   QUIRK_FLAG_GET_SAMPLE_RATE),
+	DEVICE_FLG(0x1bcf, 0x2283, /* NexiGo N930AF FHD Webcam */
+		   QUIRK_FLAG_GET_SAMPLE_RATE),
 	DEVICE_FLG(0x2040, 0x7200, /* Hauppauge HVR-950Q */
 		   QUIRK_FLAG_SHARE_MEDIA_DEVICE | QUIRK_FLAG_ALIGN_TRANSFER),
 	DEVICE_FLG(0x2040, 0x7201, /* Hauppauge HVR-950Q-MXL */
 		   QUIRK_FLAG_IGNORE_CTL_ERROR),
 	DEVICE_FLG(0x2912, 0x30c8, /* Audioengine D1 */
 		   QUIRK_FLAG_GET_SAMPLE_RATE),
+	DEVICE_FLG(0x2b53, 0x0023, /* Fiero SC-01 (firmware v1.0.0 @ 48 kHz) */
+		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
+	DEVICE_FLG(0x2b53, 0x0024, /* Fiero SC-01 (firmware v1.0.0 @ 96 kHz) */
+		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
+	DEVICE_FLG(0x2b53, 0x0031, /* Fiero SC-01 (firmware v1.1.0) */
+		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
 	DEVICE_FLG(0x30be, 0x0101, /* Schiit Hel */
 		   QUIRK_FLAG_IGNORE_CTL_ERROR),
 	DEVICE_FLG(0x413c, 0xa506, /* Dell AE515 sound bar */
 		   QUIRK_FLAG_ALIGN_TRANSFER),
 	DEVICE_FLG(0x534d, 0x2109, /* MacroSilicon MS2109 */
 		   QUIRK_FLAG_ALIGN_TRANSFER),
-	DEVICE_FLG(0x1224, 0x2a25, /* Jieli Technology USB PHY 2.0 */
-		   QUIRK_FLAG_GET_SAMPLE_RATE),
-	DEVICE_FLG(0x2b53, 0x0023, /* Fiero SC-01 (firmware v1.0.0 @ 48 kHz) */
-		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
-	DEVICE_FLG(0x2b53, 0x0024, /* Fiero SC-01 (firmware v1.0.0 @ 96 kHz) */
-		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
-	DEVICE_FLG(0x2b53, 0x0031, /* Fiero SC-01 (firmware v1.1.0) */
-		   QUIRK_FLAG_GENERIC_IMPLICIT_FB),
-	DEVICE_FLG(0x0525, 0xa4ad, /* Hamedal C20 usb camero */
-		   QUIRK_FLAG_IFACE_SKIP_CLOSE),
-	DEVICE_FLG(0x0ecb, 0x205c, /* JBL Quantum610 Wireless */
-		   QUIRK_FLAG_FIXED_RATE),
-	DEVICE_FLG(0x0ecb, 0x2069, /* JBL Quantum810 Wireless */
-		   QUIRK_FLAG_FIXED_RATE),
-	DEVICE_FLG(0x1bcf, 0x2283, /* NexiGo N930AF FHD Webcam */
-		   QUIRK_FLAG_GET_SAMPLE_RATE),
 	/* Vendor matches */
 	VENDOR_FLG(0x045e, /* MS Lifecam */

sound/virtio/virtio_card.c+0−2

 			virtsnd_event_dispatch(snd, event);
 			virtsnd_event_send(vqueue, event, true, GFP_ATOMIC);
 		}
-		if (unlikely(virtqueue_is_broken(vqueue)))
-			break;
 	} while (!virtqueue_enable_cb(vqueue));
 	spin_unlock_irqrestore(&queue->lock, flags);
 }

sound/virtio/virtio_ctl_msg.c+0−2

 		virtqueue_disable_cb(vqueue);
 		while ((msg = virtqueue_get_buf(vqueue, &length)))
 			virtsnd_ctl_msg_complete(msg);
-		if (unlikely(virtqueue_is_broken(vqueue)))
-			break;
 	} while (!virtqueue_enable_cb(vqueue));
 	spin_unlock_irqrestore(&queue->lock, flags);
 }

sound/virtio/virtio_pcm_msg.c+0−2

 		virtqueue_disable_cb(queue->vqueue);
 		while ((msg = virtqueue_get_buf(queue->vqueue, &written_bytes)))
 			virtsnd_pcm_msg_complete(msg, written_bytes);
-		if (unlikely(virtqueue_is_broken(queue->vqueue)))
-			break;
 	} while (!virtqueue_enable_cb(queue->vqueue));
 	spin_unlock_irqrestore(&queue->lock, flags);
 }

tools/arch/x86/include/asm/cpufeatures.h+7−1

 #define X86_FEATURE_CAT_L3		( 7*32+ 4) /* Cache Allocation Technology L3 */
 #define X86_FEATURE_CAT_L2		( 7*32+ 5) /* Cache Allocation Technology L2 */
 #define X86_FEATURE_CDP_L3		( 7*32+ 6) /* Code and Data Prioritization L3 */
+#define X86_FEATURE_TDX_HOST_PLATFORM	( 7*32+ 7) /* Platform supports being a TDX host */
 #define X86_FEATURE_HW_PSTATE		( 7*32+ 8) /* AMD HW-PState */
 #define X86_FEATURE_PROC_FEEDBACK	( 7*32+ 9) /* AMD ProcFeedbackInterface */
 #define X86_FEATURE_XCOMPACTED		( 7*32+10) /* "" Use compacted XSTATE (XSAVES or XSAVEC) */
 #define X86_FEATURE_SMBA		(11*32+21) /* "" Slow Memory Bandwidth Allocation */
 #define X86_FEATURE_BMEC		(11*32+22) /* "" Bandwidth Monitoring Event Configuration */
 #define X86_FEATURE_USER_SHSTK		(11*32+23) /* Shadow stack support for user mode applications */
 #define X86_FEATURE_SRSO		(11*32+24) /* "" AMD BTB untrain RETs */
 #define X86_FEATURE_SRSO_ALIAS		(11*32+25) /* "" AMD BTB untrain RETs through aliasing */
 #define X86_FEATURE_IBPB_ON_VMEXIT	(11*32+26) /* "" Issue an IBPB only on VMEXIT */
+#define X86_FEATURE_APIC_MSRS_FENCE	(11*32+27) /* "" IA32_TSC_DEADLINE and X2APIC MSRs need fencing */
+#define X86_FEATURE_ZEN2		(11*32+28) /* "" CPU based on Zen2 microarchitecture */
+#define X86_FEATURE_ZEN3		(11*32+29) /* "" CPU based on Zen3 microarchitecture */
+#define X86_FEATURE_ZEN4		(11*32+30) /* "" CPU based on Zen4 microarchitecture */
+#define X86_FEATURE_ZEN1		(11*32+31) /* "" CPU based on Zen1 microarchitecture */
 /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
 #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
 #define X86_BUG_EIBRS_PBRSB		X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */
 #define X86_BUG_SMT_RSB			X86_BUG(29) /* CPU is vulnerable to Cross-Thread Return Address Predictions */
 #define X86_BUG_GDS			X86_BUG(30) /* CPU is affected by Gather Data Sampling */
+#define X86_BUG_TDX_PW_MCE		X86_BUG(31) /* CPU may incur #MC if non-TD software does partial write to TDX private memory */
 /* BUG word 2 */
 #define X86_BUG_SRSO			X86_BUG(1*32 + 0) /* AMD SRSO bug */

tools/arch/x86/include/asm/msr-index.h+8−0

 #define LBR_INFO_CYCLES			0xffff
 #define LBR_INFO_BR_TYPE_OFFSET		56
 #define LBR_INFO_BR_TYPE		(0xfull << LBR_INFO_BR_TYPE_OFFSET)
+#define LBR_INFO_BR_CNTR_OFFSET		32
+#define LBR_INFO_BR_CNTR_NUM		4
+#define LBR_INFO_BR_CNTR_BITS		2
+#define LBR_INFO_BR_CNTR_MASK		GENMASK_ULL(LBR_INFO_BR_CNTR_BITS - 1, 0)
+#define LBR_INFO_BR_CNTR_FULL_MASK	GENMASK_ULL(LBR_INFO_BR_CNTR_NUM * LBR_INFO_BR_CNTR_BITS - 1, 0)
 #define MSR_ARCH_LBR_CTL		0x000014ce
 #define ARCH_LBR_CTL_LBREN		BIT(0)
 #define MSR_RELOAD_PMC0			0x000014c1
 #define MSR_RELOAD_FIXED_CTR0		0x00001309
+/* KeyID partitioning between MKTME and TDX */
+#define MSR_IA32_MKTME_KEYID_PARTITIONING	0x00000087
 /*
  * AMD64 MSRs. Not complete. See the architecture manual for a more
  * complete list.

tools/arch/x86/include/uapi/asm/kvm.h+3−0

@@ -562,4 +562,7 @@ struct kvm_pmu_event_filter { · 561 unmodified lines
562	/* x86-specific KVM_EXIT_HYPERCALL flags. */	562	/* x86-specific KVM_EXIT_HYPERCALL flags. */
563	#define KVM_EXIT_HYPERCALL_LONG_MODE BIT(0)	563	#define KVM_EXIT_HYPERCALL_LONG_MODE BIT(0)
564		564
		565	#define KVM_X86_DEFAULT_VM 0
		566	#define KVM_X86_SW_PROTECTED_VM 1
		567
565	#endif /* _ASM_X86_KVM_H */	568	#endif /* _ASM_X86_KVM_H */

tools/arch/x86/lib/memcpy_64.S+2−2

 /* SPDX-License-Identifier: GPL-2.0-only */
 /* Copyright 2002 Andi Kleen */
+#include <linux/export.h>
 #include <linux/linkage.h>
 #include <asm/errno.h>
 #include <asm/cpufeatures.h>
 #include <asm/alternative.h>
-#include <asm/export.h>
 .section .noinstr.text, "ax"
 SYM_FUNC_END(__memcpy)
 EXPORT_SYMBOL(__memcpy)
-SYM_FUNC_ALIAS(memcpy, __memcpy)
+SYM_FUNC_ALIAS_MEMFUNC(memcpy, __memcpy)
 EXPORT_SYMBOL(memcpy)
 SYM_FUNC_START_LOCAL(memcpy_orig)

tools/arch/x86/lib/memset_64.S+2−2

 /* SPDX-License-Identifier: GPL-2.0 */
 /* Copyright 2002 Andi Kleen, SuSE Labs */
+#include <linux/export.h>
 #include <linux/linkage.h>
 #include <asm/cpufeatures.h>
 #include <asm/alternative.h>
-#include <asm/export.h>
 .section .noinstr.text, "ax"
 SYM_FUNC_END(__memset)
 EXPORT_SYMBOL(__memset)
-SYM_FUNC_ALIAS(memset, __memset)
+SYM_FUNC_ALIAS_MEMFUNC(memset, __memset)
 EXPORT_SYMBOL(memset)
 SYM_FUNC_START_LOCAL(memset_orig)

tools/include/asm-generic/unaligned.h+12−12

@@ -105,9 +105,9 @@ static inline u32 get_unaligned_le24(const void *p) · 104 unmodified lines
105		105
106	static inline void __put_unaligned_be24(const u32 val, u8 *p)	106	static inline void __put_unaligned_be24(const u32 val, u8 *p)
107	{	107	{
108	*p++ = val >> 16;	108	*p++ = (val >> 16) & 0xff;
109	*p++ = val >> 8;	109	*p++ = (val >> 8) & 0xff;
110	*p++ = val;	110	*p++ = val & 0xff;
111	}	111	}
112		112
113	static inline void put_unaligned_be24(const u32 val, void *p)	113	static inline void put_unaligned_be24(const u32 val, void *p)
@@ -117,9 +117,9 @@ static inline void put_unaligned_be24(const u32 val, void *p) · 3 unmodified lines
117		117
118	static inline void __put_unaligned_le24(const u32 val, u8 *p)	118	static inline void __put_unaligned_le24(const u32 val, u8 *p)
119	{	119	{
120	*p++ = val;	120	*p++ = val & 0xff;
121	*p++ = val >> 8;	121	*p++ = (val >> 8) & 0xff;
122	*p++ = val >> 16;	122	*p++ = (val >> 16) & 0xff;
123	}	123	}
124		124
125	static inline void put_unaligned_le24(const u32 val, void *p)	125	static inline void put_unaligned_le24(const u32 val, void *p)
@@ -129,12 +129,12 @@ static inline void put_unaligned_le24(const u32 val, void *p) · 3 unmodified lines
129		129
130	static inline void __put_unaligned_be48(const u64 val, u8 *p)	130	static inline void __put_unaligned_be48(const u64 val, u8 *p)
131	{	131	{
132	*p++ = val >> 40;	132	*p++ = (val >> 40) & 0xff;
133	*p++ = val >> 32;	133	*p++ = (val >> 32) & 0xff;
134	*p++ = val >> 24;	134	*p++ = (val >> 24) & 0xff;
135	*p++ = val >> 16;	135	*p++ = (val >> 16) & 0xff;
136	*p++ = val >> 8;	136	*p++ = (val >> 8) & 0xff;
137	*p++ = val;	137	*p++ = val & 0xff;
138	}	138	}
139		139
140	static inline void put_unaligned_be48(const u64 val, void *p)	140	static inline void put_unaligned_be48(const u64 val, void *p)

tools/include/uapi/asm-generic/unistd.h+14−1

@@ -829,8 +829,21 @@ __SYSCALL(__NR_futex_wait, sys_futex_wait) · 828 unmodified lines
829	#define __NR_futex_requeue 456	829	#define __NR_futex_requeue 456
830	__SYSCALL(__NR_futex_requeue, sys_futex_requeue)	830	__SYSCALL(__NR_futex_requeue, sys_futex_requeue)
831		831
		832	#define __NR_statmount 457
		833	__SYSCALL(__NR_statmount, sys_statmount)
		834
		835	#define __NR_listmount 458
		836	__SYSCALL(__NR_listmount, sys_listmount)
		837
		838	#define __NR_lsm_get_self_attr 459
		839	__SYSCALL(__NR_lsm_get_self_attr, sys_lsm_get_self_attr)
		840	#define __NR_lsm_set_self_attr 460
		841	__SYSCALL(__NR_lsm_set_self_attr, sys_lsm_set_self_attr)
		842	#define __NR_lsm_list_modules 461
		843	__SYSCALL(__NR_lsm_list_modules, sys_lsm_list_modules)
		844
832	#undef __NR_syscalls	845	#undef __NR_syscalls
833	#define __NR_syscalls 457	846	#define __NR_syscalls 462
834		847
835	/*	848	/*
836	* 32 bit systems traditionally used different	849	* 32 bit systems traditionally used different

tools/include/uapi/drm/drm.h+71−1

@@ -713,7 +713,8 @@ struct drm_gem_open { · 712 unmodified lines
713	/**	713	/**
714	* DRM_CAP_ASYNC_PAGE_FLIP	714	* DRM_CAP_ASYNC_PAGE_FLIP
715	*	715	*
716	* If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC.	716	* If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for legacy
		717	* page-flips.
717	*/	718	*/
718	#define DRM_CAP_ASYNC_PAGE_FLIP 0x7	719	#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
719	/**	720	/**
@@ -773,6 +774,13 @@ struct drm_gem_open { · 53 unmodified lines
773	* :ref:`drm_sync_objects`.	774	* :ref:`drm_sync_objects`.
774	*/	775	*/
775	#define DRM_CAP_SYNCOBJ_TIMELINE 0x14	776	#define DRM_CAP_SYNCOBJ_TIMELINE 0x14
		777	/**
		778	* DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP
		779	*
		780	* If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for atomic
		781	* commits.
		782	*/
		783	#define DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP 0x15
776		784
777	/* DRM_IOCTL_GET_CAP ioctl argument type */	785	/* DRM_IOCTL_GET_CAP ioctl argument type */
778	struct drm_get_cap {	786	struct drm_get_cap {
@@ -842,6 +850,31 @@ struct drm_get_cap { · 63 unmodified lines
842	*/	850	*/
843	#define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 5	851	#define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 5
844		852
		853	/**
		854	* DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT
		855	*
		856	* Drivers for para-virtualized hardware (e.g. vmwgfx, qxl, virtio and
		857	* virtualbox) have additional restrictions for cursor planes (thus
		858	* making cursor planes on those drivers not truly universal,) e.g.
		859	* they need cursor planes to act like one would expect from a mouse
		860	* cursor and have correctly set hotspot properties.
		861	* If this client cap is not set the DRM core will hide cursor plane on
		862	* those virtualized drivers because not setting it implies that the
		863	* client is not capable of dealing with those extra restictions.
		864	* Clients which do set cursor hotspot and treat the cursor plane
		865	* like a mouse cursor should set this property.
		866	* The client must enable &DRM_CLIENT_CAP_ATOMIC first.
		867	*
		868	* Setting this property on drivers which do not special case
		869	* cursor planes (i.e. non-virtualized drivers) will return
		870	* EOPNOTSUPP, which can be used by userspace to gauge
		871	* requirements of the hardware/drivers they're running on.
		872	*
		873	* This capability is always supported for atomic-capable virtualized
		874	* drivers starting from kernel version 6.6.
		875	*/
		876	#define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6
		877
845	/* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */	878	/* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
846	struct drm_set_client_cap {	879	struct drm_set_client_cap {
847	__u64 capability;	880	__u64 capability;
@@ -893,6 +926,7 @@ struct drm_syncobj_transfer { · 45 unmodified lines
893	#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)	926	#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
894	#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)	927	#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
895	#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */	928	#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */
		929	#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE (1 << 3) /* set fence deadline to deadline_nsec */
896	struct drm_syncobj_wait {	930	struct drm_syncobj_wait {
897	__u64 handles;	931	__u64 handles;
898	/* absolute timeout */	932	/* absolute timeout */
@@ -901,6 +935,14 @@ struct drm_syncobj_wait { · 2 unmodified lines
901	__u32 flags;	935	__u32 flags;
902	__u32 first_signaled; /* only valid when not waiting all */	936	__u32 first_signaled; /* only valid when not waiting all */
903	__u32 pad;	937	__u32 pad;
		938	/**
		939	* @deadline_nsec - fence deadline hint
		940	*
		941	* Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing
		942	* fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is
		943	* set.
		944	*/
		945	__u64 deadline_nsec;
904	};	946	};
905		947
906	struct drm_syncobj_timeline_wait {	948	struct drm_syncobj_timeline_wait {
@@ -913,6 +955,14 @@ struct drm_syncobj_timeline_wait { · 6 unmodified lines
913	__u32 flags;	955	__u32 flags;
914	__u32 first_signaled; /* only valid when not waiting all */	956	__u32 first_signaled; /* only valid when not waiting all */
915	__u32 pad;	957	__u32 pad;
		958	/**
		959	* @deadline_nsec - fence deadline hint
		960	*
		961	* Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing
		962	* fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is
		963	* set.
		964	*/
		965	__u64 deadline_nsec;
916	};	966	};
917		967
918	/**	968	/**
@@ -1218,6 +1268,26 @@ extern "C" { · 299 unmodified lines
1218		1268
1219	#define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd)	1269	#define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd)
1220		1270
		1271	/**
		1272	* DRM_IOCTL_MODE_CLOSEFB - Close a framebuffer.
		1273	*
		1274	* This closes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL
		1275	* argument is a framebuffer object ID.
		1276	*
		1277	* This IOCTL is similar to &DRM_IOCTL_MODE_RMFB, except it doesn't disable
		1278	* planes and CRTCs. As long as the framebuffer is used by a plane, it's kept
		1279	* alive. When the plane no longer uses the framebuffer (because the
		1280	* framebuffer is replaced with another one, or the plane is disabled), the
		1281	* framebuffer is cleaned up.
		1282	*
		1283	* This is useful to implement flicker-free transitions between two processes.
		1284	*
		1285	* Depending on the threat model, user-space may want to ensure that the
		1286	* framebuffer doesn't expose any sensitive user information: closed
		1287	* framebuffers attached to a plane can be read back by the next DRM master.
		1288	*/
		1289	#define DRM_IOCTL_MODE_CLOSEFB DRM_IOWR(0xD0, struct drm_mode_closefb)
		1290
1221	/*	1291	/*
1222	* Device specific ioctls should only be in their respective headers	1292	* Device specific ioctls should only be in their respective headers
1223	* The device specific ioctl range is from 0x40 to 0x9f.	1293	* The device specific ioctl range is from 0x40 to 0x9f.

tools/include/uapi/drm/i915_drm.h+6−6

@@ -693,7 +693,7 @@ typedef struct drm_i915_irq_wait { · 692 unmodified lines
693	#define I915_PARAM_HAS_EXEC_FENCE 44	693	#define I915_PARAM_HAS_EXEC_FENCE 44
694		694
695	/* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to capture	695	/* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to capture
696	* user specified bufffers for post-mortem debugging of GPU hangs. See	696	* user-specified buffers for post-mortem debugging of GPU hangs. See
697	* EXEC_OBJECT_CAPTURE.	697	* EXEC_OBJECT_CAPTURE.
698	*/	698	*/
699	#define I915_PARAM_HAS_EXEC_CAPTURE 45	699	#define I915_PARAM_HAS_EXEC_CAPTURE 45
@@ -1606,7 +1606,7 @@ struct drm_i915_gem_busy { · 906 unmodified lines
1606	* is accurate.	1606	* is accurate.
1607	*	1607	*
1608	* The returned dword is split into two fields to indicate both	1608	* The returned dword is split into two fields to indicate both
1609	* the engine classess on which the object is being read, and the	1609	* the engine classes on which the object is being read, and the
1610	* engine class on which it is currently being written (if any).	1610	* engine class on which it is currently being written (if any).
1611	*	1611	*
1612	* The low word (bits 0:15) indicate if the object is being written	1612	* The low word (bits 0:15) indicate if the object is being written
@@ -1815,7 +1815,7 @@ struct drm_i915_gem_madvise { · 202 unmodified lines
1815	__u32 handle;	1815	__u32 handle;
1816		1816
1817	/* Advice: either the buffer will be needed again in the near future,	1817	/* Advice: either the buffer will be needed again in the near future,
1818	* or wont be and could be discarded under memory pressure.	1818	* or won't be and could be discarded under memory pressure.
1819	*/	1819	*/
1820	__u32 madv;	1820	__u32 madv;
1821		1821
@@ -3246,7 +3246,7 @@ struct drm_i915_query_topology_info { · 1424 unmodified lines
3246	* // enough to hold our array of engines. The kernel will fill out the	3246	* // enough to hold our array of engines. The kernel will fill out the
3247	* // item.length for us, which is the number of bytes we need.	3247	* // item.length for us, which is the number of bytes we need.
3248	* //	3248	* //
3249	* // Alternatively a large buffer can be allocated straight away enabling	3249	* // Alternatively a large buffer can be allocated straightaway enabling
3250	* // querying in one pass, in which case item.length should contain the	3250	* // querying in one pass, in which case item.length should contain the
3251	* // length of the provided buffer.	3251	* // length of the provided buffer.
3252	* err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);	3252	* err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
@@ -3256,7 +3256,7 @@ struct drm_i915_query_topology_info { · 3 unmodified lines
3256	* // Now that we allocated the required number of bytes, we call the ioctl	3256	* // Now that we allocated the required number of bytes, we call the ioctl
3257	* // again, this time with the data_ptr pointing to our newly allocated	3257	* // again, this time with the data_ptr pointing to our newly allocated
3258	* // blob, which the kernel can then populate with info on all engines.	3258	* // blob, which the kernel can then populate with info on all engines.
3259	* item.data_ptr = (uintptr_t)&info,	3259	* item.data_ptr = (uintptr_t)&info;
3260	*	3260	*
3261	* err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);	3261	* err = ioctl(fd, DRM_IOCTL_I915_QUERY, &query);
3262	* if (err) ...	3262	* if (err) ...
@@ -3286,7 +3286,7 @@ struct drm_i915_query_topology_info { · 23 unmodified lines
3286	/**	3286	/**
3287	* struct drm_i915_engine_info	3287	* struct drm_i915_engine_info
3288	*	3288	*
3289	* Describes one engine and it's capabilities as known to the driver.	3289	* Describes one engine and its capabilities as known to the driver.
3290	*/	3290	*/
3291	struct drm_i915_engine_info {	3291	struct drm_i915_engine_info {
3292	/** @engine: Engine class and instance. */	3292	/** @engine: Engine class and instance. */

tools/include/uapi/linux/fcntl.h+3−0

@@ -116,5 +116,8 @@ · 115 unmodified lines
116	#define AT_HANDLE_FID AT_REMOVEDIR /* file handle is needed to	116	#define AT_HANDLE_FID AT_REMOVEDIR /* file handle is needed to
117	compare object identity and may not	117	compare object identity and may not
118	be usable to open_by_handle_at(2) */	118	be usable to open_by_handle_at(2) */
		119	#if defined(__KERNEL__)
		120	#define AT_GETATTR_NOSEC 0x80000000
		121	#endif
119		122
120	#endif /* _UAPI_LINUX_FCNTL_H */	123	#endif /* _UAPI_LINUX_FCNTL_H */

tools/include/uapi/linux/kvm.h+50−90

 #define KVM_API_VERSION 12
-/* *** Deprecated interfaces *** */
-#define KVM_TRC_SHIFT           16
-#define KVM_TRC_ENTRYEXIT       (1 << KVM_TRC_SHIFT)
-#define KVM_TRC_HANDLER         (1 << (KVM_TRC_SHIFT + 1))
-#define KVM_TRC_VMENTRY         (KVM_TRC_ENTRYEXIT + 0x01)
-#define KVM_TRC_VMEXIT          (KVM_TRC_ENTRYEXIT + 0x02)
-#define KVM_TRC_PAGE_FAULT      (KVM_TRC_HANDLER + 0x01)
-#define KVM_TRC_HEAD_SIZE       12
-#define KVM_TRC_CYCLE_SIZE      8
-#define KVM_TRC_EXTRA_MAX       7
-#define KVM_TRC_INJ_VIRQ         (KVM_TRC_HANDLER + 0x02)
-#define KVM_TRC_REDELIVER_EVT    (KVM_TRC_HANDLER + 0x03)
-#define KVM_TRC_PEND_INTR        (KVM_TRC_HANDLER + 0x04)
-#define KVM_TRC_IO_READ          (KVM_TRC_HANDLER + 0x05)
-#define KVM_TRC_IO_WRITE         (KVM_TRC_HANDLER + 0x06)
-#define KVM_TRC_CR_READ          (KVM_TRC_HANDLER + 0x07)
-#define KVM_TRC_CR_WRITE         (KVM_TRC_HANDLER + 0x08)
-#define KVM_TRC_DR_READ          (KVM_TRC_HANDLER + 0x09)
-#define KVM_TRC_DR_WRITE         (KVM_TRC_HANDLER + 0x0A)
-#define KVM_TRC_MSR_READ         (KVM_TRC_HANDLER + 0x0B)
-#define KVM_TRC_MSR_WRITE        (KVM_TRC_HANDLER + 0x0C)
-#define KVM_TRC_CPUID            (KVM_TRC_HANDLER + 0x0D)
-#define KVM_TRC_INTR             (KVM_TRC_HANDLER + 0x0E)
-#define KVM_TRC_NMI              (KVM_TRC_HANDLER + 0x0F)
-#define KVM_TRC_VMMCALL          (KVM_TRC_HANDLER + 0x10)
-#define KVM_TRC_HLT              (KVM_TRC_HANDLER + 0x11)
-#define KVM_TRC_CLTS             (KVM_TRC_HANDLER + 0x12)
-#define KVM_TRC_LMSW             (KVM_TRC_HANDLER + 0x13)
-#define KVM_TRC_APIC_ACCESS      (KVM_TRC_HANDLER + 0x14)
-#define KVM_TRC_TDP_FAULT        (KVM_TRC_HANDLER + 0x15)
-#define KVM_TRC_GTLB_WRITE       (KVM_TRC_HANDLER + 0x16)
-#define KVM_TRC_STLB_WRITE       (KVM_TRC_HANDLER + 0x17)
-#define KVM_TRC_STLB_INVAL       (KVM_TRC_HANDLER + 0x18)
-#define KVM_TRC_PPC_INSTR        (KVM_TRC_HANDLER + 0x19)
-struct kvm_user_trace_setup {
-	__u32 buf_size;
-	__u32 buf_nr;
-};
-#define __KVM_DEPRECATED_MAIN_W_0x06 \
-	_IOW(KVMIO, 0x06, struct kvm_user_trace_setup)
-#define __KVM_DEPRECATED_MAIN_0x07 _IO(KVMIO, 0x07)
-#define __KVM_DEPRECATED_MAIN_0x08 _IO(KVMIO, 0x08)
-#define __KVM_DEPRECATED_VM_R_0x70 _IOR(KVMIO, 0x70, struct kvm_assigned_irq)
-struct kvm_breakpoint {
-	__u32 enabled;
-	__u32 padding;
-	__u64 address;
-};
-struct kvm_debug_guest {
-	__u32 enabled;
-	__u32 pad;
-	struct kvm_breakpoint breakpoints[4];
-	__u32 singlestep;
-};
-#define __KVM_DEPRECATED_VCPU_W_0x87 _IOW(KVMIO, 0x87, struct kvm_debug_guest)
-/* *** End of deprecated interfaces *** */
 /* for KVM_SET_USER_MEMORY_REGION */
 struct kvm_userspace_memory_region {
 	__u32 slot;
 	__u64 userspace_addr; /* start of the userspace allocated memory */
 };
+/* for KVM_SET_USER_MEMORY_REGION2 */
+struct kvm_userspace_memory_region2 {
+	__u32 slot;
+	__u32 flags;
+	__u64 guest_phys_addr;
+	__u64 memory_size;
+	__u64 userspace_addr;
+	__u64 guest_memfd_offset;
+	__u32 guest_memfd;
+	__u32 pad1;
+	__u64 pad2[14];
+};
 /*
  * The bit 0 ~ bit 15 of kvm_userspace_memory_region::flags are visible for
  * userspace, other bits are reserved for kvm internal use which are defined
  */
 #define KVM_MEM_LOG_DIRTY_PAGES	(1UL << 0)
 #define KVM_MEM_READONLY	(1UL << 1)
+#define KVM_MEM_GUEST_MEMFD	(1UL << 2)
 /* for KVM_IRQ_LINE */
 struct kvm_irq_level {
 #define KVM_EXIT_RISCV_CSR        36
 #define KVM_EXIT_NOTIFY           37
 #define KVM_EXIT_LOONGARCH_IOCSR  38
+#define KVM_EXIT_MEMORY_FAULT     39
 /* For KVM_EXIT_INTERNAL_ERROR */
 /* Emulate instruction failed. */
 #define KVM_NOTIFY_CONTEXT_INVALID	(1 << 0)
 			__u32 flags;
 		} notify;
+		/* KVM_EXIT_MEMORY_FAULT */
+		struct {
+#define KVM_MEMORY_EXIT_FLAG_PRIVATE	(1ULL << 3)
+			__u64 flags;
+			__u64 gpa;
+			__u64 size;
+		} memory_fault;
 		/* Fix the size of the union. */
 		char padding[256];
 	};
  */
 #define KVM_GET_VCPU_MMAP_SIZE    _IO(KVMIO,   0x04) /* in bytes */
 #define KVM_GET_SUPPORTED_CPUID   _IOWR(KVMIO, 0x05, struct kvm_cpuid2)
-#define KVM_TRACE_ENABLE          __KVM_DEPRECATED_MAIN_W_0x06
-#define KVM_TRACE_PAUSE           __KVM_DEPRECATED_MAIN_0x07
-#define KVM_TRACE_DISABLE         __KVM_DEPRECATED_MAIN_0x08
 #define KVM_GET_EMULATED_CPUID	  _IOWR(KVMIO, 0x09, struct kvm_cpuid2)
 #define KVM_GET_MSR_FEATURE_INDEX_LIST    _IOWR(KVMIO, 0x0a, struct kvm_msr_list)
 #define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228
 #define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229
 #define KVM_CAP_ARM_SUPPORTED_REG_MASK_RANGES 230
+#define KVM_CAP_USER_MEMORY2 231
+#define KVM_CAP_MEMORY_FAULT_INFO 232
+#define KVM_CAP_MEMORY_ATTRIBUTES 233
+#define KVM_CAP_GUEST_MEMFD 234
+#define KVM_CAP_VM_TYPES 235
 #ifdef KVM_CAP_IRQ_ROUTING
 #define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL	(1 << 4)
 #define KVM_XEN_HVM_CONFIG_EVTCHN_SEND		(1 << 5)
 #define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG	(1 << 6)
+#define KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE	(1 << 7)
 struct kvm_xen_hvm_config {
 	__u32 flags;
 					struct kvm_userspace_memory_region)
 #define KVM_SET_TSS_ADDR          _IO(KVMIO,   0x47)
 #define KVM_SET_IDENTITY_MAP_ADDR _IOW(KVMIO,  0x48, __u64)
+#define KVM_SET_USER_MEMORY_REGION2 _IOW(KVMIO, 0x49, \
+					 struct kvm_userspace_memory_region2)
 /* enable ucontrol for s390 */
 struct kvm_s390_ucas_mapping {
 			_IOW(KVMIO,  0x67, struct kvm_coalesced_mmio_zone)
 #define KVM_UNREGISTER_COALESCED_MMIO \
 			_IOW(KVMIO,  0x68, struct kvm_coalesced_mmio_zone)
-#define KVM_ASSIGN_PCI_DEVICE     _IOR(KVMIO,  0x69, \
-				       struct kvm_assigned_pci_dev)
 #define KVM_SET_GSI_ROUTING       _IOW(KVMIO,  0x6a, struct kvm_irq_routing)
-/* deprecated, replaced by KVM_ASSIGN_DEV_IRQ */
-#define KVM_ASSIGN_IRQ            __KVM_DEPRECATED_VM_R_0x70
-#define KVM_ASSIGN_DEV_IRQ        _IOW(KVMIO,  0x70, struct kvm_assigned_irq)
 #define KVM_REINJECT_CONTROL      _IO(KVMIO,   0x71)
-#define KVM_DEASSIGN_PCI_DEVICE   _IOW(KVMIO,  0x72, \
-				       struct kvm_assigned_pci_dev)
-#define KVM_ASSIGN_SET_MSIX_NR    _IOW(KVMIO,  0x73, \
-				       struct kvm_assigned_msix_nr)
-#define KVM_ASSIGN_SET_MSIX_ENTRY _IOW(KVMIO,  0x74, \
-				       struct kvm_assigned_msix_entry)
-#define KVM_DEASSIGN_DEV_IRQ      _IOW(KVMIO,  0x75, struct kvm_assigned_irq)
 #define KVM_IRQFD                 _IOW(KVMIO,  0x76, struct kvm_irqfd)
 #define KVM_CREATE_PIT2		  _IOW(KVMIO,  0x77, struct kvm_pit_config)
 #define KVM_SET_BOOT_CPU_ID       _IO(KVMIO,   0x78)
 *  KVM_CAP_VM_TSC_CONTROL to set defaults for a VM */
 #define KVM_SET_TSC_KHZ           _IO(KVMIO,  0xa2)
 #define KVM_GET_TSC_KHZ           _IO(KVMIO,  0xa3)
-/* Available with KVM_CAP_PCI_2_3 */
-#define KVM_ASSIGN_SET_INTX_MASK  _IOW(KVMIO,  0xa4, \
-				       struct kvm_assigned_pci_dev)
 /* Available with KVM_CAP_SIGNAL_MSI */
 #define KVM_SIGNAL_MSI            _IOW(KVMIO,  0xa5, struct kvm_msi)
 /* Available with KVM_CAP_PPC_GET_SMMU_INFO */
 #define KVM_SET_SREGS             _IOW(KVMIO,  0x84, struct kvm_sregs)
 #define KVM_TRANSLATE             _IOWR(KVMIO, 0x85, struct kvm_translation)
 #define KVM_INTERRUPT             _IOW(KVMIO,  0x86, struct kvm_interrupt)
-/* KVM_DEBUG_GUEST is no longer supported, use KVM_SET_GUEST_DEBUG instead */
-#define KVM_DEBUG_GUEST           __KVM_DEPRECATED_VCPU_W_0x87
 #define KVM_GET_MSRS              _IOWR(KVMIO, 0x88, struct kvm_msrs)
 #define KVM_SET_MSRS              _IOW(KVMIO,  0x89, struct kvm_msrs)
 #define KVM_SET_CPUID             _IOW(KVMIO,  0x8a, struct kvm_cpuid)
 /* flags for kvm_s390_zpci_op->u.reg_aen.flags */
 #define KVM_S390_ZPCIOP_REGAEN_HOST    (1 << 0)
+/* Available with KVM_CAP_MEMORY_ATTRIBUTES */
+#define KVM_SET_MEMORY_ATTRIBUTES              _IOW(KVMIO,  0xd2, struct kvm_memory_attributes)
+struct kvm_memory_attributes {
+	__u64 address;
+	__u64 size;
+	__u64 attributes;
+	__u64 flags;
+};
+#define KVM_MEMORY_ATTRIBUTE_PRIVATE           (1ULL << 3)
+#define KVM_CREATE_GUEST_MEMFD	_IOWR(KVMIO,  0xd4, struct kvm_create_guest_memfd)
+struct kvm_create_guest_memfd {
+	__u64 size;
+	__u64 flags;
+	__u64 reserved[6];
+};
 #endif /* __LINUX_KVM_H */

tools/include/uapi/linux/mount.h+70−0

@@ -138,4 +138,74 @@ struct mount_attr { · 137 unmodified lines
138	/* List of all mount_attr versions. */	138	/* List of all mount_attr versions. */
139	#define MOUNT_ATTR_SIZE_VER0 32 /* sizeof first published struct */	139	#define MOUNT_ATTR_SIZE_VER0 32 /* sizeof first published struct */
140		140
		141
		142	/*
		143	* Structure for getting mount/superblock/filesystem info with statmount(2).
		144	*
		145	* The interface is similar to statx(2): individual fields or groups can be
		146	* selected with the @mask argument of statmount(). Kernel will set the @mask
		147	* field according to the supported fields.
		148	*
		149	* If string fields are selected, then the caller needs to pass a buffer that
		150	* has space after the fixed part of the structure. Nul terminated strings are
		151	* copied there and offsets relative to @str are stored in the relevant fields.
		152	* If the buffer is too small, then EOVERFLOW is returned. The actually used
		153	* size is returned in @size.
		154	*/
		155	struct statmount {
		156	__u32 size; /* Total size, including strings */
		157	__u32 __spare1;
		158	__u64 mask; /* What results were written */
		159	__u32 sb_dev_major; /* Device ID */
		160	__u32 sb_dev_minor;
		161	__u64 sb_magic; /* ..._SUPER_MAGIC */
		162	__u32 sb_flags; /* SB_{RDONLY,SYNCHRONOUS,DIRSYNC,LAZYTIME} */
		163	__u32 fs_type; /* [str] Filesystem type */
		164	__u64 mnt_id; /* Unique ID of mount */
		165	__u64 mnt_parent_id; /* Unique ID of parent (for root == mnt_id) */
		166	__u32 mnt_id_old; /* Reused IDs used in proc/.../mountinfo */
		167	__u32 mnt_parent_id_old;
		168	__u64 mnt_attr; /* MOUNT_ATTR_... */
		169	__u64 mnt_propagation; /* MS_{SHARED,SLAVE,PRIVATE,UNBINDABLE} */
		170	__u64 mnt_peer_group; /* ID of shared peer group */
		171	__u64 mnt_master; /* Mount receives propagation from this ID */
		172	__u64 propagate_from; /* Propagation from in current namespace */
		173	__u32 mnt_root; /* [str] Root of mount relative to root of fs */
		174	__u32 mnt_point; /* [str] Mountpoint relative to current root */
		175	__u64 __spare2[50];
		176	char str[]; /* Variable size part containing strings */
		177	};
		178
		179	/*
		180	* Structure for passing mount ID and miscellaneous parameters to statmount(2)
		181	* and listmount(2).
		182	*
		183	* For statmount(2) @param represents the request mask.
		184	* For listmount(2) @param represents the last listed mount id (or zero).
		185	*/
		186	struct mnt_id_req {
		187	__u32 size;
		188	__u32 spare;
		189	__u64 mnt_id;
		190	__u64 param;
		191	};
		192
		193	/* List of all mnt_id_req versions. */
		194	#define MNT_ID_REQ_SIZE_VER0 24 /* sizeof first published struct */
		195
		196	/*
		197	* @mask bits for statmount(2)
		198	*/
		199	#define STATMOUNT_SB_BASIC 0x00000001U /* Want/got sb_... */
		200	#define STATMOUNT_MNT_BASIC 0x00000002U /* Want/got mnt_... */
		201	#define STATMOUNT_PROPAGATE_FROM 0x00000004U /* Want/got propagate_from */
		202	#define STATMOUNT_MNT_ROOT 0x00000008U /* Want/got mnt_root */
		203	#define STATMOUNT_MNT_POINT 0x00000010U /* Want/got mnt_point */
		204	#define STATMOUNT_FS_TYPE 0x00000020U /* Want/got fs_type */
		205
		206	/*
		207	* Special @mnt_id values that can be passed to listmount
		208	*/
		209	#define LSMT_ROOT 0xffffffffffffffff /* root mount */
		210
141	#endif /* _UAPI_LINUX_MOUNT_H */	211	#endif /* _UAPI_LINUX_MOUNT_H */

tools/include/uapi/linux/stat.h+1−0

@@ -154,6 +154,7 @@ struct statx { · 153 unmodified lines
154	#define STATX_BTIME 0x00000800U /* Want/got stx_btime */	154	#define STATX_BTIME 0x00000800U /* Want/got stx_btime */
155	#define STATX_MNT_ID 0x00001000U /* Got stx_mnt_id */	155	#define STATX_MNT_ID 0x00001000U /* Got stx_mnt_id */
156	#define STATX_DIOALIGN 0x00002000U /* Want/got direct I/O alignment info */	156	#define STATX_DIOALIGN 0x00002000U /* Want/got direct I/O alignment info */
		157	#define STATX_MNT_ID_UNIQUE 0x00004000U /* Want/got extended stx_mount_id */
157		158
158	#define STATX__RESERVED 0x80000000U /* Reserved for future struct statx expansion */	159	#define STATX__RESERVED 0x80000000U /* Reserved for future struct statx expansion */
159		160

tools/perf/Documentation/perf-list.txt+4−0

 --json::
 Output in JSON format.
+-o::
+--output=::
+	Output file name. By default output is written to stdout.
 [[EVENT_MODIFIERS]]
 EVENT MODIFIERS
 ---------------

tools/perf/Makefile.perf+10−0

@@ -236,6 +236,16 @@ else · 235 unmodified lines
236	SHELLCHECK := $(shell which shellcheck 2> /dev/null)	236	SHELLCHECK := $(shell which shellcheck 2> /dev/null)
237	endif	237	endif
238		238
		239	# shellcheck is using in tools/perf/tests/Build with option -a/--check-sourced (
		240	# introduced in v0.4.7) and -S/--severity (introduced in v0.6.0). So make the
		241	# minimal shellcheck version as v0.6.0.
		242	ifneq ($(SHELLCHECK),)
		243	ifeq ($(shell expr $(shell $(SHELLCHECK) --version \| grep version: \| \
		244	sed -e 's/.\+ $[0-9]\+$.$[0-9]\+$.$[0-9]\+$/\1\2\3/g') \< 060), 1)
		245	SHELLCHECK :=
		246	endif
		247	endif
		248
239	export srctree OUTPUT RM CC CXX LD AR CFLAGS CXXFLAGS V BISON FLEX AWK	249	export srctree OUTPUT RM CC CXX LD AR CFLAGS CXXFLAGS V BISON FLEX AWK
240	export HOSTCC HOSTLD HOSTAR HOSTCFLAGS SHELLCHECK	250	export HOSTCC HOSTLD HOSTAR HOSTCFLAGS SHELLCHECK
241		251

tools/perf/builtin-list.c+129−82

  * functions.
  */
 struct print_state {
+	/** @fp: File to write output to. */
+	FILE *fp;
 	/**
 	 * @pmu_glob: Optionally restrict PMU and metric matching to PMU or
 	 * debugfs subsystem name.
 {
 	struct print_state *print_state = ps;
-	if (!print_state->name_only && pager_in_use())
+	if (!print_state->name_only && pager_in_use()) {
-		printf("\nList of pre-defined events (to be used in -e or -M):\n\n");
+		fprintf(print_state->fp,
+			"\nList of pre-defined events (to be used in -e or -M):\n\n");
+	}
 }
 static void default_print_end(void *print_state __maybe_unused) {}
-static void wordwrap(const char *s, int start, int max, int corr)
+static void wordwrap(FILE *fp, const char *s, int start, int max, int corr)
 {
 	int column = start;
 	int n;
 		int wlen = strcspn(s, " \t\n");
 		if ((column + wlen >= max && column > start) || saw_newline) {
-			printf("\n%*s", start, "");
+			fprintf(fp, "\n%*s", start, "");
 			column = start + corr;
 		}
-		n = printf("%s%.*s", column > start ? " " : "", wlen, s);
+		n = fprintf(fp, "%s%.*s", column > start ? " " : "", wlen, s);
 		if (n <= 0)
 			break;
 		saw_newline = s[wlen] == '\n';
 {
 	struct print_state *print_state = ps;
 	int pos;
+	FILE *fp = print_state->fp;
 	if (deprecated && !print_state->deprecated)
 		return;
 	if (print_state->name_only) {
 		if (event_alias && strlen(event_alias))
-			printf("%s ", event_alias);
+			fprintf(fp, "%s ", event_alias);
 		else
-			printf("%s ", event_name);
+			fprintf(fp, "%s ", event_name);
 		return;
 	}
 	if (strcmp(print_state->last_topic, topic ?: "")) {
 		if (topic)
-			printf("\n%s:\n", topic);
+			fprintf(fp, "\n%s:\n", topic);
 		zfree(&print_state->last_topic);
 		print_state->last_topic = strdup(topic ?: "");
 	}
 	if (event_alias && strlen(event_alias))
-		pos = printf("  %s OR %s", event_name, event_alias);
+		pos = fprintf(fp, "  %s OR %s", event_name, event_alias);
 	else
-		pos = printf("  %s", event_name);
+		pos = fprintf(fp, "  %s", event_name);
 	if (!topic && event_type_desc) {
 		for (; pos < 53; pos++)
-			putchar(' ');
+			fputc(' ', fp);
-		printf("[%s]\n", event_type_desc);
+		fprintf(fp, "[%s]\n", event_type_desc);
 	} else
-		putchar('\n');
+		fputc('\n', fp);
 	if (desc && print_state->desc) {
 		char *desc_with_unit = NULL;
 					      ? "%s. Unit: %s" : "%s Unit: %s",
 					    desc, pmu_name);
 		}
-		printf("%*s", 8, "[");
+		fprintf(fp, "%*s", 8, "[");
-		wordwrap(desc_len > 0 ? desc_with_unit : desc, 8, pager_get_columns(), 0);
+		wordwrap(fp, desc_len > 0 ? desc_with_unit : desc, 8, pager_get_columns(), 0);
-		printf("]\n");
+		fprintf(fp, "]\n");
 		free(desc_with_unit);
 	}
 	long_desc = long_desc ?: desc;
 	if (long_desc && print_state->long_desc) {
-		printf("%*s", 8, "[");
+		fprintf(fp, "%*s", 8, "[");
-		wordwrap(long_desc, 8, pager_get_columns(), 0);
+		wordwrap(fp, long_desc, 8, pager_get_columns(), 0);
-		printf("]\n");
+		fprintf(fp, "]\n");
 	}
 	if (print_state->detailed && encoding_desc) {
-		printf("%*s", 8, "");
+		fprintf(fp, "%*s", 8, "");
-		wordwrap(encoding_desc, 8, pager_get_columns(), 0);
+		wordwrap(fp, encoding_desc, 8, pager_get_columns(), 0);
-		putchar('\n');
+		fputc('\n', fp);
 	}
 }
 				const char *unit __maybe_unused)
 {
 	struct print_state *print_state = ps;
+	FILE *fp = print_state->fp;
 	if (print_state->event_glob &&
 	    (!print_state->metrics || !name || !strglobmatch(name, print_state->event_glob)) &&
 	if (!print_state->name_only && !print_state->last_metricgroups) {
 		if (print_state->metricgroups) {
-			printf("\nMetric Groups:\n");
+			fprintf(fp, "\nMetric Groups:\n");
 			if (!print_state->metrics)
-				putchar('\n');
+				fputc('\n', fp);
 		} else {
-			printf("\nMetrics:\n\n");
+			fprintf(fp, "\nMetrics:\n\n");
 		}
 	}
 	if (!print_state->last_metricgroups ||
 	    strcmp(print_state->last_metricgroups, group ?: "")) {
 		if (group && print_state->metricgroups) {
 			if (print_state->name_only)
-				printf("%s ", group);
+				fprintf(fp, "%s ", group);
 			else if (print_state->metrics) {
 				const char *gdesc = describe_metricgroup(group);
 				if (gdesc)
-					printf("\n%s: [%s]\n", group, gdesc);
+					fprintf(fp, "\n%s: [%s]\n", group, gdesc);
 				else
-					printf("\n%s:\n", group);
+					fprintf(fp, "\n%s:\n", group);
 			} else
-				printf("%s\n", group);
+				fprintf(fp, "%s\n", group);
 		}
 		zfree(&print_state->last_metricgroups);
 		print_state->last_metricgroups = strdup(group ?: "");
 	if (print_state->name_only) {
 		if (print_state->metrics &&
 		    !strlist__has_entry(print_state->visited_metrics, name)) {
-			printf("%s ", name);
+			fprintf(fp, "%s ", name);
 			strlist__add(print_state->visited_metrics, name);
 		}
 		return;
 	}
-	printf("  %s\n", name);
+	fprintf(fp, "  %s\n", name);
 	if (desc && print_state->desc) {
-		printf("%*s", 8, "[");
+		fprintf(fp, "%*s", 8, "[");
-		wordwrap(desc, 8, pager_get_columns(), 0);
+		wordwrap(fp, desc, 8, pager_get_columns(), 0);
-		printf("]\n");
+		fprintf(fp, "]\n");
 	}
 	if (long_desc && print_state->long_desc) {
-		printf("%*s", 8, "[");
+		fprintf(fp, "%*s", 8, "[");
-		wordwrap(long_desc, 8, pager_get_columns(), 0);
+		wordwrap(fp, long_desc, 8, pager_get_columns(), 0);
-		printf("]\n");
+		fprintf(fp, "]\n");
 	}
 	if (expr && print_state->detailed) {
-		printf("%*s", 8, "[");
+		fprintf(fp, "%*s", 8, "[");
-		wordwrap(expr, 8, pager_get_columns(), 0);
+		wordwrap(fp, expr, 8, pager_get_columns(), 0);
-		printf("]\n");
+		fprintf(fp, "]\n");
 	}
 	if (threshold && print_state->detailed) {
-		printf("%*s", 8, "[");
+		fprintf(fp, "%*s", 8, "[");
-		wordwrap(threshold, 8, pager_get_columns(), 0);
+		wordwrap(fp, threshold, 8, pager_get_columns(), 0);
-		printf("]\n");
+		fprintf(fp, "]\n");
 	}
 }
 struct json_print_state {
+	/** @fp: File to write output to. */
+	FILE *fp;
 	/** Should a separator be printed prior to the next item? */
 	bool need_sep;
 };
-static void json_print_start(void *print_state __maybe_unused)
+static void json_print_start(void *ps)
 {
-	printf("[\n");
+	struct json_print_state *print_state = ps;
+	FILE *fp = print_state->fp;
+	fprintf(fp, "[\n");
 }
 static void json_print_end(void *ps)
 {
 	struct json_print_state *print_state = ps;
+	FILE *fp = print_state->fp;
-	printf("%s]\n", print_state->need_sep ? "\n" : "");
+	fprintf(fp, "%s]\n", print_state->need_sep ? "\n" : "");
 }
-static void fix_escape_printf(struct strbuf *buf, const char *fmt, ...)
+static void fix_escape_fprintf(FILE *fp, struct strbuf *buf, const char *fmt, ...)
 {
 	va_list args;
 		}
 	}
 	va_end(args);
-	fputs(buf->buf, stdout);
+	fputs(buf->buf, fp);
 }
 static void json_print_event(void *ps, const char *pmu_name, const char *topic,
 {
 	struct json_print_state *print_state = ps;
 	bool need_sep = false;
+	FILE *fp = print_state->fp;
 	struct strbuf buf;
 	strbuf_init(&buf, 0);
-	printf("%s{\n", print_state->need_sep ? ",\n" : "");
+	fprintf(fp, "%s{\n", print_state->need_sep ? ",\n" : "");
 	print_state->need_sep = true;
 	if (pmu_name) {
-		fix_escape_printf(&buf, "\t\"Unit\": \"%S\"", pmu_name);
+		fix_escape_fprintf(fp, &buf, "\t\"Unit\": \"%S\"", pmu_name);
 		need_sep = true;
 	}
 	if (topic) {
-		fix_escape_printf(&buf, "%s\t\"Topic\": \"%S\"", need_sep ? ",\n" : "", topic);
+		fix_escape_fprintf(fp, &buf, "%s\t\"Topic\": \"%S\"",
+				   need_sep ? ",\n" : "",
+				   topic);
 		need_sep = true;
 	}
 	if (event_name) {
-		fix_escape_printf(&buf, "%s\t\"EventName\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"EventName\": \"%S\"",
-				  event_name);
+				   need_sep ? ",\n" : "",
+				   event_name);
 		need_sep = true;
 	}
 	if (event_alias && strlen(event_alias)) {
-		fix_escape_printf(&buf, "%s\t\"EventAlias\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"EventAlias\": \"%S\"",
-				  event_alias);
+				   need_sep ? ",\n" : "",
+				   event_alias);
 		need_sep = true;
 	}
 	if (scale_unit && strlen(scale_unit)) {
-		fix_escape_printf(&buf, "%s\t\"ScaleUnit\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"ScaleUnit\": \"%S\"",
-				  scale_unit);
+				   need_sep ? ",\n" : "",
+				   scale_unit);
 		need_sep = true;
 	}
 	if (event_type_desc) {
-		fix_escape_printf(&buf, "%s\t\"EventType\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"EventType\": \"%S\"",
-				  event_type_desc);
+				   need_sep ? ",\n" : "",
+				   event_type_desc);
 		need_sep = true;
 	}
 	if (deprecated) {
-		fix_escape_printf(&buf, "%s\t\"Deprecated\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"Deprecated\": \"%S\"",
-				  deprecated ? "1" : "0");
+				   need_sep ? ",\n" : "",
+				   deprecated ? "1" : "0");
 		need_sep = true;
 	}
 	if (desc) {
-		fix_escape_printf(&buf, "%s\t\"BriefDescription\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"BriefDescription\": \"%S\"",
-				  desc);
+				   need_sep ? ",\n" : "",
+				   desc);
 		need_sep = true;
 	}
 	if (long_desc) {
-		fix_escape_printf(&buf, "%s\t\"PublicDescription\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"PublicDescription\": \"%S\"",
-				  long_desc);
+				   need_sep ? ",\n" : "",
+				   long_desc);
 		need_sep = true;
 	}
 	if (encoding_desc) {
-		fix_escape_printf(&buf, "%s\t\"Encoding\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"Encoding\": \"%S\"",
-				  encoding_desc);
+				   need_sep ? ",\n" : "",
+				   encoding_desc);
 		need_sep = true;
 	}
-	printf("%s}", need_sep ? "\n" : "");
+	fprintf(fp, "%s}", need_sep ? "\n" : "");
 	strbuf_release(&buf);
 }
 {
 	struct json_print_state *print_state = ps;
 	bool need_sep = false;
+	FILE *fp = print_state->fp;
 	struct strbuf buf;
 	strbuf_init(&buf, 0);
-	printf("%s{\n", print_state->need_sep ? ",\n" : "");
+	fprintf(fp, "%s{\n", print_state->need_sep ? ",\n" : "");
 	print_state->need_sep = true;
 	if (group) {
-		fix_escape_printf(&buf, "\t\"MetricGroup\": \"%S\"", group);
+		fix_escape_fprintf(fp, &buf, "\t\"MetricGroup\": \"%S\"", group);
 		need_sep = true;
 	}
 	if (name) {
-		fix_escape_printf(&buf, "%s\t\"MetricName\": \"%S\"", need_sep ? ",\n" : "", name);
+		fix_escape_fprintf(fp, &buf, "%s\t\"MetricName\": \"%S\"",
+				   need_sep ? ",\n" : "",
+				   name);
 		need_sep = true;
 	}
 	if (expr) {
-		fix_escape_printf(&buf, "%s\t\"MetricExpr\": \"%S\"", need_sep ? ",\n" : "", expr);
+		fix_escape_fprintf(fp, &buf, "%s\t\"MetricExpr\": \"%S\"",
+				   need_sep ? ",\n" : "",
+				   expr);
 		need_sep = true;
 	}
 	if (threshold) {
-		fix_escape_printf(&buf, "%s\t\"MetricThreshold\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"MetricThreshold\": \"%S\"",
-				  threshold);
+				   need_sep ? ",\n" : "",
+				   threshold);
 		need_sep = true;
 	}
 	if (unit) {
-		fix_escape_printf(&buf, "%s\t\"ScaleUnit\": \"%S\"", need_sep ? ",\n" : "", unit);
+		fix_escape_fprintf(fp, &buf, "%s\t\"ScaleUnit\": \"%S\"",
+				   need_sep ? ",\n" : "",
+				   unit);
 		need_sep = true;
 	}
 	if (desc) {
-		fix_escape_printf(&buf, "%s\t\"BriefDescription\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"BriefDescription\": \"%S\"",
-				  desc);
+				   need_sep ? ",\n" : "",
+				   desc);
 		need_sep = true;
 	}
 	if (long_desc) {
-		fix_escape_printf(&buf, "%s\t\"PublicDescription\": \"%S\"", need_sep ? ",\n" : "",
+		fix_escape_fprintf(fp, &buf, "%s\t\"PublicDescription\": \"%S\"",
-				  long_desc);
+				   need_sep ? ",\n" : "",
+				   long_desc);
 		need_sep = true;
 	}
-	printf("%s}", need_sep ? "\n" : "");
+	fprintf(fp, "%s}", need_sep ? "\n" : "");
 	strbuf_release(&buf);
 }
 int cmd_list(int argc, const char **argv)
 {
 	int i, ret = 0;
-	struct print_state default_ps = {};
+	struct print_state default_ps = {
-	struct print_state json_ps = {};
+		.fp = stdout,
+	};
+	struct print_state json_ps = {
+		.fp = stdout,
+	};
 	void *ps = &default_ps;
 	struct print_callbacks print_cb = {
 		.print_start = default_print_start,
 	};
 	const char *cputype = NULL;
 	const char *unit_name = NULL;
+	const char *output_path = NULL;
 	bool json = false;
 	struct option list_options[] = {
 		OPT_BOOLEAN(0, "raw-dump", &default_ps.name_only, "Dump raw events"),
 			    "Print longer event descriptions."),
 		OPT_BOOLEAN(0, "details", &default_ps.detailed,
 			    "Print information on the perf event names and expressions used internally by events."),
+		OPT_STRING('o', "output", &output_path, "file", "output file name"),
 		OPT_BOOLEAN(0, "deprecated", &default_ps.deprecated,
 			    "Print deprecated events."),
 		OPT_STRING(0, "cputype", &cputype, "cpu type",
 	argc = parse_options(argc, argv, list_options, list_usage,
 			     PARSE_OPT_STOP_AT_NON_OPTION);
+	if (output_path) {
+		default_ps.fp = fopen(output_path, "w");
+		json_ps.fp = default_ps.fp;
+	}
 	setup_pager();
 	if (!default_ps.name_only)
 	free(default_ps.last_topic);
 	free(default_ps.last_metricgroups);
 	strlist__delete(default_ps.visited_metrics);
+	if (output_path)
+		fclose(default_ps.fp);
 	return ret;
 }

tools/perf/builtin-record.c+2−2

@@ -4080,8 +4080,8 @@ int cmd_record(int argc, const char **argv) · 4079 unmodified lines
4080	}	4080	}
4081		4081
4082	if (rec->switch_output.num_files) {	4082	if (rec->switch_output.num_files) {
4083	rec->switch_output.filenames = calloc(sizeof(char *),	4083	rec->switch_output.filenames = calloc(rec->switch_output.num_files,
4084	rec->switch_output.num_files);	4084	sizeof(char *));
4085	if (!rec->switch_output.filenames) {	4085	if (!rec->switch_output.filenames) {
4086	err = -EINVAL;	4086	err = -EINVAL;
4087	goto out_opts;	4087	goto out_opts;

tools/perf/builtin-top.c+1−1

@@ -357,7 +357,7 @@ static void perf_top__print_sym_table(struct perf_top *top) · 356 unmodified lines
357		357
358	static void prompt_integer(int target, const char msg)	358	static void prompt_integer(int target, const char msg)
359	{	359	{
360	char buf = malloc(0), p;	360	char buf = NULL, p;
361	size_t dummy = 0;	361	size_t dummy = 0;
362	int tmp;	362	int tmp;
363		363

tools/perf/pmu-events/arch/x86/alderlake/adl-metrics.json+118−136

     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to certain allocation restrictions.",
-        "MetricExpr": "TOPDOWN_BE_BOUND.ALLOC_RESTRICTIONS / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BE_BOUND.ALLOC_RESTRICTIONS@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_resource_bound_group",
         "MetricName": "tma_alloc_restriction",
         "MetricThreshold": "tma_alloc_restriction > 0.1",
     {
         "BriefDescription": "Counts the total number of issue slots  that were not consumed by the backend due to backend stalls",
         "DefaultMetricgroupName": "TopdownL1",
-        "MetricExpr": "TOPDOWN_BE_BOUND.ALL / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BE_BOUND.ALL@ / tma_info_core_slots",
         "MetricGroup": "Default;TopdownL1;tma_L1_group",
         "MetricName": "tma_backend_bound",
         "MetricThreshold": "tma_backend_bound > 0.1",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to BACLEARS, which occurs when the Branch Target Buffer (BTB) prediction or lack thereof, was corrected by a later branch predictor in the frontend",
-        "MetricExpr": "TOPDOWN_FE_BOUND.BRANCH_DETECT / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.BRANCH_DETECT@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_fetch_latency_group",
         "MetricName": "tma_branch_detect",
         "MetricThreshold": "tma_branch_detect > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to branch mispredicts.",
-        "MetricExpr": "TOPDOWN_BAD_SPECULATION.MISPREDICT / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BAD_SPECULATION.MISPREDICT@ / tma_info_core_slots",
         "MetricGroup": "TopdownL2;tma_L2_group;tma_bad_speculation_group",
         "MetricName": "tma_branch_mispredicts",
         "MetricThreshold": "tma_branch_mispredicts > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to BTCLEARS, which occurs when the Branch Target Buffer (BTB) predicts a taken branch.",
-        "MetricExpr": "TOPDOWN_FE_BOUND.BRANCH_RESTEER / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.BRANCH_RESTEER@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_fetch_latency_group",
         "MetricName": "tma_branch_resteer",
         "MetricThreshold": "tma_branch_resteer > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to the microcode sequencer (MS).",
-        "MetricExpr": "TOPDOWN_FE_BOUND.CISC / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.CISC@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",
         "MetricName": "tma_cisc",
         "MetricThreshold": "tma_cisc > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to decode stalls.",
-        "MetricExpr": "TOPDOWN_FE_BOUND.DECODE / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.DECODE@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",
         "MetricName": "tma_decode",
         "MetricThreshold": "tma_decode > 0.05",
     },
     {
         "BriefDescription": "Counts the number of cycles the core is stalled due to a demand load miss which hit in DRAM or MMIO (Non-DRAM).",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "cpu_atom@MEM_BOUND_STALLS.LOAD_DRAM_HIT@ / tma_info_core_clks - max((cpu_atom@MEM_BOUND_STALLS.LOAD@ - cpu_atom@LD_HEAD.L1_MISS_AT_RET@) / tma_info_core_clks, 0) * cpu_atom@MEM_BOUND_STALLS.LOAD_DRAM_HIT@ / cpu_atom@MEM_BOUND_STALLS.LOAD@",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_dram_bound",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to a machine clear classified as a fast nuke due to memory ordering, memory disambiguation and memory renaming.",
-        "MetricExpr": "TOPDOWN_BAD_SPECULATION.FASTNUKE / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BAD_SPECULATION.FASTNUKE@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_machine_clears_group",
         "MetricName": "tma_fast_nuke",
         "MetricThreshold": "tma_fast_nuke > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to frontend bandwidth restrictions due to decode, predecode, cisc, and other limitations.",
-        "MetricExpr": "TOPDOWN_FE_BOUND.FRONTEND_BANDWIDTH / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.FRONTEND_BANDWIDTH@ / tma_info_core_slots",
         "MetricGroup": "TopdownL2;tma_L2_group;tma_frontend_bound_group",
         "MetricName": "tma_fetch_bandwidth",
         "MetricThreshold": "tma_fetch_bandwidth > 0.1",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to frontend bandwidth restrictions due to decode, predecode, cisc, and other limitations.",
-        "MetricExpr": "TOPDOWN_FE_BOUND.FRONTEND_LATENCY / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.FRONTEND_LATENCY@ / tma_info_core_slots",
         "MetricGroup": "TopdownL2;tma_L2_group;tma_frontend_bound_group",
         "MetricName": "tma_fetch_latency",
         "MetricThreshold": "tma_fetch_latency > 0.15",
     },
     {
         "BriefDescription": "Counts the number of floating point divide operations per uop.",
-        "MetricExpr": "UOPS_RETIRED.FPDIV / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@UOPS_RETIRED.FPDIV@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_base_group",
         "MetricName": "tma_fpdiv_uops",
         "MetricThreshold": "tma_fpdiv_uops > 0.2",
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to frontend stalls.",
         "DefaultMetricgroupName": "TopdownL1",
-        "MetricExpr": "TOPDOWN_FE_BOUND.ALL / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.ALL@ / tma_info_core_slots",
         "MetricGroup": "Default;TopdownL1;tma_L1_group",
         "MetricName": "tma_frontend_bound",
         "MetricThreshold": "tma_frontend_bound > 0.2",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to instruction cache misses.",
-        "MetricExpr": "TOPDOWN_FE_BOUND.ICACHE / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.ICACHE@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_fetch_latency_group",
         "MetricName": "tma_icache_misses",
         "MetricThreshold": "tma_icache_misses > 0.05",
     },
     {
         "BriefDescription": "Instructions Per Cycle",
-        "MetricExpr": "INST_RETIRED.ANY / tma_info_core_clks",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / tma_info_core_clks",
         "MetricName": "tma_info_core_ipc",
         "Unit": "cpu_atom"
     },
     },
     {
         "BriefDescription": "Uops Per Instruction",
-        "MetricExpr": "UOPS_RETIRED.ALL / INST_RETIRED.ANY",
+        "MetricExpr": "cpu_atom@UOPS_RETIRED.ALL@ / INST_RETIRED.ANY",
         "MetricName": "tma_info_core_upi",
         "Unit": "cpu_atom"
     },
     },
     {
         "BriefDescription": "Ratio of all branches which mispredict",
-        "MetricExpr": "BR_MISP_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.ALL_BRANCHES",
+        "MetricExpr": "cpu_atom@BR_MISP_RETIRED.ALL_BRANCHES@ / BR_INST_RETIRED.ALL_BRANCHES",
         "MetricName": "tma_info_inst_mix_branch_mispredict_ratio",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Ratio between Mispredicted branches and unknown branches",
-        "MetricExpr": "BR_MISP_RETIRED.ALL_BRANCHES / BACLEARS.ANY",
+        "MetricExpr": "cpu_atom@BR_MISP_RETIRED.ALL_BRANCHES@ / BACLEARS.ANY",
         "MetricName": "tma_info_inst_mix_branch_mispredict_to_unknown_branch_ratio",
         "Unit": "cpu_atom"
     },
     },
     {
         "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / BR_INST_RETIRED.ALL_BRANCHES",
         "MetricName": "tma_info_inst_mix_ipbranch",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instruction per (near) call (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.CALL",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / BR_INST_RETIRED.CALL",
         "MetricName": "tma_info_inst_mix_ipcall",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instructions per Far Branch",
-        "MetricExpr": "INST_RETIRED.ANY / (cpu_atom@BR_INST_RETIRED.FAR_BRANCH@ / 2)",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / (cpu_atom@BR_INST_RETIRED.FAR_BRANCH@ / 2)",
         "MetricName": "tma_info_inst_mix_ipfarbranch",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instructions per Load",
-        "MetricExpr": "INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / MEM_UOPS_RETIRED.ALL_LOADS",
         "MetricName": "tma_info_inst_mix_ipload",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instructions per retired conditional Branch Misprediction where the branch was not taken",
-        "MetricExpr": "INST_RETIRED.ANY / (cpu_atom@BR_MISP_RETIRED.COND@ - cpu_atom@BR_MISP_RETIRED.COND_TAKEN@)",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / (cpu_atom@BR_MISP_RETIRED.COND@ - cpu_atom@BR_MISP_RETIRED.COND_TAKEN@)",
         "MetricName": "tma_info_inst_mix_ipmisp_cond_ntaken",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instructions per retired conditional Branch Misprediction where the branch was taken",
-        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.COND_TAKEN",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / BR_MISP_RETIRED.COND_TAKEN",
         "MetricName": "tma_info_inst_mix_ipmisp_cond_taken",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instructions per retired indirect call or jump Branch Misprediction",
-        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.INDIRECT",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / BR_MISP_RETIRED.INDIRECT",
         "MetricName": "tma_info_inst_mix_ipmisp_indirect",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instructions per retired return Branch Misprediction",
-        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.RETURN",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / BR_MISP_RETIRED.RETURN",
         "MetricName": "tma_info_inst_mix_ipmisp_ret",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instructions per retired Branch Misprediction",
-        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / BR_MISP_RETIRED.ALL_BRANCHES",
         "MetricName": "tma_info_inst_mix_ipmispredict",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Instructions per Store",
-        "MetricExpr": "INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES",
+        "MetricExpr": "cpu_atom@INST_RETIRED.ANY@ / MEM_UOPS_RETIRED.ALL_STORES",
         "MetricName": "tma_info_inst_mix_ipstore",
         "Unit": "cpu_atom"
     },
     },
     {
         "BriefDescription": "Cycle cost per DRAM hit",
-        "MetricExpr": "MEM_BOUND_STALLS.LOAD_DRAM_HIT / MEM_LOAD_UOPS_RETIRED.DRAM_HIT",
+        "MetricExpr": "cpu_atom@MEM_BOUND_STALLS.LOAD_DRAM_HIT@ / MEM_LOAD_UOPS_RETIRED.DRAM_HIT",
         "MetricName": "tma_info_memory_cycles_per_demand_load_dram_hit",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Cycle cost per L2 hit",
-        "MetricExpr": "MEM_BOUND_STALLS.LOAD_L2_HIT / MEM_LOAD_UOPS_RETIRED.L2_HIT",
+        "MetricExpr": "cpu_atom@MEM_BOUND_STALLS.LOAD_L2_HIT@ / MEM_LOAD_UOPS_RETIRED.L2_HIT",
         "MetricName": "tma_info_memory_cycles_per_demand_load_l2_hit",
         "Unit": "cpu_atom"
     },
     {
         "BriefDescription": "Cycle cost per LLC hit",
-        "MetricExpr": "MEM_BOUND_STALLS.LOAD_LLC_HIT / MEM_LOAD_UOPS_RETIRED.L3_HIT",
+        "MetricExpr": "cpu_atom@MEM_BOUND_STALLS.LOAD_LLC_HIT@ / MEM_LOAD_UOPS_RETIRED.L3_HIT",
         "MetricName": "tma_info_memory_cycles_per_demand_load_l3_hit",
         "Unit": "cpu_atom"
     },
     },
     {
         "BriefDescription": "Average CPU Utilization",
-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",
+        "MetricExpr": "cpu_atom@CPU_CLK_UNHALTED.REF_TSC@ / TSC",
         "MetricName": "tma_info_system_cpu_utilization",
         "Unit": "cpu_atom"
     },
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to Instruction Table Lookaside Buffer (ITLB) misses.",
-        "MetricExpr": "TOPDOWN_FE_BOUND.ITLB / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.ITLB@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_fetch_latency_group",
         "MetricName": "tma_itlb_misses",
         "MetricThreshold": "tma_itlb_misses > 0.05",
     },
     {
         "BriefDescription": "Counts the number of cycles that the oldest load of the load buffer is stalled at retirement due to a load block.",
-        "MetricExpr": "LD_HEAD.L1_BOUND_AT_RET / tma_info_core_clks",
+        "MetricExpr": "cpu_atom@LD_HEAD.L1_BOUND_AT_RET@ / tma_info_core_clks",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l1_bound",
         "MetricThreshold": "tma_l1_bound > 0.1",
     },
     {
         "BriefDescription": "Counts the number of cycles a core is stalled due to a demand load which hit in the L2 Cache.",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "cpu_atom@MEM_BOUND_STALLS.LOAD_L2_HIT@ / tma_info_core_clks - max((cpu_atom@MEM_BOUND_STALLS.LOAD@ - cpu_atom@LD_HEAD.L1_MISS_AT_RET@) / tma_info_core_clks, 0) * cpu_atom@MEM_BOUND_STALLS.LOAD_L2_HIT@ / cpu_atom@MEM_BOUND_STALLS.LOAD@",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l2_bound",
     },
     {
         "BriefDescription": "Counts the number of cycles a core is stalled due to a demand load which hit in the Last Level Cache (LLC) or other core with HITE/F/M.",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "cpu_atom@MEM_BOUND_STALLS.LOAD_LLC_HIT@ / tma_info_core_clks - max((cpu_atom@MEM_BOUND_STALLS.LOAD@ - cpu_atom@LD_HEAD.L1_MISS_AT_RET@) / tma_info_core_clks, 0) * cpu_atom@MEM_BOUND_STALLS.LOAD_LLC_HIT@ / cpu_atom@MEM_BOUND_STALLS.LOAD@",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l3_bound",
     },
     {
         "BriefDescription": "Counts the total number of issue slots that were not consumed by the backend because allocation is stalled due to a machine clear (nuke) of any kind including memory ordering and memory disambiguation.",
-        "MetricExpr": "TOPDOWN_BAD_SPECULATION.MACHINE_CLEARS / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BAD_SPECULATION.MACHINE_CLEARS@ / tma_info_core_slots",
         "MetricGroup": "TopdownL2;tma_L2_group;tma_bad_speculation_group",
         "MetricName": "tma_machine_clears",
         "MetricThreshold": "tma_machine_clears > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to memory reservation stalls in which a scheduler is not able to accept uops.",
-        "MetricExpr": "TOPDOWN_BE_BOUND.MEM_SCHEDULER / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BE_BOUND.MEM_SCHEDULER@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_resource_bound_group",
         "MetricName": "tma_mem_scheduler",
         "MetricThreshold": "tma_mem_scheduler > 0.1",
     },
     {
         "BriefDescription": "Counts the number of cycles the core is stalled due to stores or loads.",
-        "MetricExpr": "min(cpu_atom@TOPDOWN_BE_BOUND.ALL@ / tma_info_core_slots, cpu_atom@LD_HEAD.ANY_AT_RET@ / tma_info_core_clks + tma_store_bound)",
+        "MetricExpr": "min(tma_backend_bound, cpu_atom@LD_HEAD.ANY_AT_RET@ / tma_info_core_clks + tma_store_bound)",
         "MetricGroup": "TopdownL2;tma_L2_group;tma_backend_bound_group",
         "MetricName": "tma_memory_bound",
         "MetricThreshold": "tma_memory_bound > 0.2",
     },
     {
         "BriefDescription": "Counts the number of uops that are from the complex flows issued by the micro-sequencer (MS)",
-        "MetricExpr": "UOPS_RETIRED.MS / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@UOPS_RETIRED.MS@ / tma_info_core_slots",
         "MetricGroup": "TopdownL2;tma_L2_group;tma_retiring_group",
         "MetricName": "tma_ms_uops",
         "MetricThreshold": "tma_ms_uops > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to IEC or FPC RAT stalls, which can be due to FIQ or IEC reservation stalls in which the integer, floating point or SIMD scheduler is not able to accept uops.",
-        "MetricExpr": "TOPDOWN_BE_BOUND.NON_MEM_SCHEDULER / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BE_BOUND.NON_MEM_SCHEDULER@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_resource_bound_group",
         "MetricName": "tma_non_mem_scheduler",
         "MetricThreshold": "tma_non_mem_scheduler > 0.1",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to a machine clear (slow nuke).",
-        "MetricExpr": "TOPDOWN_BAD_SPECULATION.NUKE / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BAD_SPECULATION.NUKE@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_machine_clears_group",
         "MetricName": "tma_nuke",
         "MetricThreshold": "tma_nuke > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to other common frontend stalls not categorized.",
-        "MetricExpr": "TOPDOWN_FE_BOUND.OTHER / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.OTHER@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",
         "MetricName": "tma_other_fb",
         "MetricThreshold": "tma_other_fb > 0.05",
     },
     {
         "BriefDescription": "Counts the number of cycles that the oldest load of the load buffer is stalled at retirement due to a number of other load blocks.",
-        "MetricExpr": "LD_HEAD.OTHER_AT_RET / tma_info_core_clks",
+        "MetricExpr": "cpu_atom@LD_HEAD.OTHER_AT_RET@ / tma_info_core_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",
         "MetricName": "tma_other_l1",
         "MetricThreshold": "tma_other_l1 > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not delivered by the frontend due to wrong predecodes.",
-        "MetricExpr": "TOPDOWN_FE_BOUND.PREDECODE / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_FE_BOUND.PREDECODE@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_fetch_bandwidth_group",
         "MetricName": "tma_predecode",
         "MetricThreshold": "tma_predecode > 0.05",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to the physical register file unable to accept an entry (marble stalls).",
-        "MetricExpr": "TOPDOWN_BE_BOUND.REGISTER / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BE_BOUND.REGISTER@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_resource_bound_group",
         "MetricName": "tma_register",
         "MetricThreshold": "tma_register > 0.1",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to the reorder buffer being full (ROB stalls).",
-        "MetricExpr": "TOPDOWN_BE_BOUND.REORDER_BUFFER / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BE_BOUND.REORDER_BUFFER@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_resource_bound_group",
         "MetricName": "tma_reorder_buffer",
         "MetricThreshold": "tma_reorder_buffer > 0.1",
     {
         "BriefDescription": "Counts the number of issue slots  that result in retirement slots.",
         "DefaultMetricgroupName": "TopdownL1",
-        "MetricExpr": "TOPDOWN_RETIRING.ALL / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_RETIRING.ALL@ / tma_info_core_slots",
         "MetricGroup": "Default;TopdownL1;tma_L1_group",
         "MetricName": "tma_retiring",
         "MetricThreshold": "tma_retiring > 0.75",
     },
     {
         "BriefDescription": "Counts the number of issue slots  that were not consumed by the backend due to scoreboards from the instruction queue (IQ), jump execution unit (JEU), or microcode sequencer (MS).",
-        "MetricExpr": "TOPDOWN_BE_BOUND.SERIALIZATION / tma_info_core_slots",
+        "MetricExpr": "cpu_atom@TOPDOWN_BE_BOUND.SERIALIZATION@ / tma_info_core_slots",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_resource_bound_group",
         "MetricName": "tma_serialization",
         "MetricThreshold": "tma_serialization > 0.1",
     },
     {
         "BriefDescription": "Counts the number of cycles that the oldest load of the load buffer is stalled at retirement due to a first level TLB miss.",
-        "MetricExpr": "LD_HEAD.DTLB_MISS_AT_RET / tma_info_core_clks",
+        "MetricExpr": "cpu_atom@LD_HEAD.DTLB_MISS_AT_RET@ / tma_info_core_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",
         "MetricName": "tma_stlb_hit",
         "MetricThreshold": "tma_stlb_hit > 0.05",
     },
     {
         "BriefDescription": "Counts the number of cycles that the oldest load of the load buffer is stalled at retirement due to a second level TLB miss requiring a page walk.",
-        "MetricExpr": "LD_HEAD.PGWALK_AT_RET / tma_info_core_clks",
+        "MetricExpr": "cpu_atom@LD_HEAD.PGWALK_AT_RET@ / tma_info_core_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",
         "MetricName": "tma_stlb_miss",
         "MetricThreshold": "tma_stlb_miss > 0.05",
     },
     {
         "BriefDescription": "Counts the number of cycles that the oldest load of the load buffer is stalled at retirement due to a store forward block.",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
+        "MetricExpr": "cpu_atom@LD_HEAD.ST_ADDR_AT_RET@ / tma_info_core_clks",
-        "MetricExpr": "LD_HEAD.ST_ADDR_AT_RET / tma_info_core_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",
         "MetricName": "tma_store_fwd_blk",
         "MetricThreshold": "tma_store_fwd_blk > 0.05",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Branch Resteers",
-        "MetricExpr": "INT_MISC.CLEAR_RESTEER_CYCLES / tma_info_thread_clks + tma_unknown_branches",
+        "MetricExpr": "cpu_core@INT_MISC.CLEAR_RESTEER_CYCLES@ / tma_info_thread_clks + tma_unknown_branches",
         "MetricGroup": "FetchLat;TopdownL3;tma_L3_group;tma_fetch_latency_group",
         "MetricName": "tma_branch_resteers",
         "MetricThreshold": "tma_branch_resteers > 0.05 & (tma_fetch_latency > 0.1 & tma_frontend_bound > 0.15)",
     },
     {
         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(25 * tma_info_system_average_frequency * (cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD@ * (cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM@ / (cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM@ + cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD@))) + 24 * tma_info_system_average_frequency * cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS@) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",
         "MetricGroup": "DataSharing;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",
         "MetricName": "tma_contested_accesses",
     },
     {
         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to data-sharing accesses",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "24 * tma_info_system_average_frequency * (cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD@ + cpu_core@MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD@ * (1 - cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM@ / (cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM@ + cpu_core@OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD@))) * (1 + cpu_core@MEM_LOAD_RETIRED.FB_HIT@ / cpu_core@MEM_LOAD_RETIRED.L1_MISS@ / 2) / tma_info_thread_clks",
         "MetricGroup": "Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",
         "MetricName": "tma_data_sharing",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles where the Divider unit was active",
-        "MetricExpr": "ARITH.DIV_ACTIVE / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@ARITH.DIV_ACTIVE@ / tma_info_thread_clks",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_core_bound_group",
         "MetricName": "tma_divider",
         "MetricThreshold": "tma_divider > 0.2 & (tma_core_bound > 0.1 & tma_backend_bound > 0.2)",
     },
     {
         "BriefDescription": "This metric estimates how often the CPU was stalled on accesses to external memory (DRAM) by loads",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "cpu_core@MEMORY_ACTIVITY.STALLS_L3_MISS@ / tma_info_thread_clks",
         "MetricGroup": "MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_dram_bound",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to switches from DSB to MITE pipelines",
-        "MetricExpr": "DSB2MITE_SWITCHES.PENALTY_CYCLES / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@DSB2MITE_SWITCHES.PENALTY_CYCLES@ / tma_info_thread_clks",
         "MetricGroup": "DSBmiss;FetchLat;TopdownL3;tma_L3_group;tma_fetch_latency_group;tma_issueFB",
         "MetricName": "tma_dsb_switches",
         "MetricThreshold": "tma_dsb_switches > 0.05 & (tma_fetch_latency > 0.1 & tma_frontend_bound > 0.15)",
     },
     {
         "BriefDescription": "This metric does a *rough estimation* of how often L1D Fill Buffer unavailability limited additional L1D miss memory access requests to proceed",
-        "MetricExpr": "L1D_PEND_MISS.FB_FULL / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@L1D_PEND_MISS.FB_FULL@ / tma_info_thread_clks",
         "MetricGroup": "MemoryBW;TopdownL4;tma_L4_group;tma_issueBW;tma_issueSL;tma_issueSmSt;tma_l1_bound_group",
         "MetricName": "tma_fb_full",
         "MetricThreshold": "tma_fb_full > 0.3",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to instruction cache misses",
-        "MetricExpr": "ICACHE_DATA.STALLS / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@ICACHE_DATA.STALLS@ / tma_info_thread_clks",
         "MetricGroup": "BigFoot;FetchLat;IcMiss;TopdownL3;tma_L3_group;tma_fetch_latency_group",
         "MetricName": "tma_icache_misses",
         "MetricThreshold": "tma_icache_misses > 0.05 & (tma_fetch_latency > 0.1 & tma_frontend_bound > 0.15)",
     },
     {
         "BriefDescription": "Branch Misprediction Cost: Fraction of TMA slots wasted per non-speculative branch misprediction (retired JEClear)",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) * tma_info_thread_slots / BR_MISP_RETIRED.ALL_BRANCHES",
         "MetricGroup": "Bad;BrMispredicts;tma_issueBM",
         "MetricName": "tma_info_bad_spec_branch_misprediction_cost",
     },
     {
         "BriefDescription": "Instructions per retired mispredicts for conditional non-taken branches (lower number means higher occurrence rate).",
-        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.COND_NTAKEN",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / BR_MISP_RETIRED.COND_NTAKEN",
         "MetricGroup": "Bad;BrMispredicts",
         "MetricName": "tma_info_bad_spec_ipmisp_cond_ntaken",
         "MetricThreshold": "tma_info_bad_spec_ipmisp_cond_ntaken < 200",
     },
     {
         "BriefDescription": "Instructions per retired mispredicts for conditional taken branches (lower number means higher occurrence rate).",
-        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.COND_TAKEN",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / BR_MISP_RETIRED.COND_TAKEN",
         "MetricGroup": "Bad;BrMispredicts",
         "MetricName": "tma_info_bad_spec_ipmisp_cond_taken",
         "MetricThreshold": "tma_info_bad_spec_ipmisp_cond_taken < 200",
     },
     {
         "BriefDescription": "Instructions per retired mispredicts for return branches (lower number means higher occurrence rate).",
-        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.RET",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / BR_MISP_RETIRED.RET",
         "MetricGroup": "Bad;BrMispredicts",
         "MetricName": "tma_info_bad_spec_ipmisp_ret",
         "MetricThreshold": "tma_info_bad_spec_ipmisp_ret < 500",
     },
     {
         "BriefDescription": "Number of Instructions per non-speculative Branch Misprediction (JEClear) (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / BR_MISP_RETIRED.ALL_BRANCHES",
         "MetricGroup": "Bad;BadSpec;BrMispredicts",
         "MetricName": "tma_info_bad_spec_ipmispredict",
         "MetricThreshold": "tma_info_bad_spec_ipmispredict < 200",
     },
     {
         "BriefDescription": "Probability of Core Bound bottleneck hidden by SMT-profiling artifacts",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(100 * (1 - tma_core_bound / tma_ports_utilization if tma_core_bound < tma_ports_utilization else 1) if tma_info_system_smt_2t_utilization > 0.5 else 0)",
         "MetricGroup": "Cor;SMT",
         "MetricName": "tma_info_botlnk_l0_core_bound_likely",
     },
     {
         "BriefDescription": "Total pipeline cost of DSB (uop cache) misses - subset of the Instruction_Fetch_BW Bottleneck",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * (tma_fetch_latency * tma_dsb_switches / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_mite / (tma_dsb + tma_lsd + tma_mite))",
         "MetricGroup": "DSBmiss;Fed;tma_issueFB",
         "MetricName": "tma_info_botlnk_l2_dsb_misses",
     },
     {
         "BriefDescription": "Total pipeline cost of Instruction Cache misses - subset of the Big_Code Bottleneck",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * (tma_fetch_latency * tma_icache_misses / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",
         "MetricGroup": "Fed;FetchLat;IcMiss;tma_issueFL",
         "MetricName": "tma_info_botlnk_l2_ic_misses",
     },
     {
         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",
         "MetricGroup": "BigFoot;Fed;Frontend;IcMiss;MemoryTLB;tma_issueBC",
         "MetricName": "tma_info_bottleneck_big_code",
     },
     {
         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * (tma_frontend_bound - tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) - tma_info_bottleneck_big_code",
         "MetricGroup": "Fed;FetchBW;Frontend",
         "MetricName": "tma_info_bottleneck_instruction_fetch_bw",
     },
     {
         "BriefDescription": "Total pipeline cost of (external) Memory Bandwidth related bottlenecks",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full))) + tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_lock_latency + tma_split_loads + tma_store_fwd_blk))",
         "MetricGroup": "Mem;MemoryBW;Offcore;tma_issueBW",
         "MetricName": "tma_info_bottleneck_memory_bandwidth",
     },
     {
         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_dtlb_load / max(tma_l1_bound, tma_dtlb_load + tma_fb_full + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",
         "MetricGroup": "Mem;MemoryTLB;Offcore;tma_issueTLB",
         "MetricName": "tma_info_bottleneck_memory_data_tlbs",
     },
     {
         "BriefDescription": "Total pipeline cost of Memory Latency related bottlenecks (external memory and off-core caches)",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound))",
         "MetricGroup": "Mem;MemoryLat;Offcore;tma_issueLat",
         "MetricName": "tma_info_bottleneck_memory_latency",
     },
     {
         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",
         "MetricGroup": "Bad;BadSpec;BrMispredicts;tma_issueBM",
         "MetricName": "tma_info_bottleneck_mispredictions",
     },
     {
         "BriefDescription": "Fraction of branches that are non-taken conditionals",
-        "MetricExpr": "BR_INST_RETIRED.COND_NTAKEN / BR_INST_RETIRED.ALL_BRANCHES",
+        "MetricExpr": "cpu_core@BR_INST_RETIRED.COND_NTAKEN@ / BR_INST_RETIRED.ALL_BRANCHES",
         "MetricGroup": "Bad;Branches;CodeGen;PGO",
         "MetricName": "tma_info_branches_cond_nt",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Fraction of branches that are taken conditionals",
-        "MetricExpr": "BR_INST_RETIRED.COND_TAKEN / BR_INST_RETIRED.ALL_BRANCHES",
+        "MetricExpr": "cpu_core@BR_INST_RETIRED.COND_TAKEN@ / BR_INST_RETIRED.ALL_BRANCHES",
         "MetricGroup": "Bad;Branches;CodeGen;PGO",
         "MetricName": "tma_info_branches_cond_tk",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
-        "MetricExpr": "INST_RETIRED.ANY / tma_info_core_core_clks",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / tma_info_core_core_clks",
         "MetricGroup": "Ret;SMT;TmaL1;tma_L1_group",
         "MetricName": "tma_info_core_coreipc",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is execution) per-core",
-        "MetricExpr": "UOPS_EXECUTED.THREAD / (cpu_core@UOPS_EXECUTED.CORE_CYCLES_GE_1@ / 2 if #SMT_on else cpu_core@UOPS_EXECUTED.CORE_CYCLES_GE_1@)",
+        "MetricExpr": "cpu_core@UOPS_EXECUTED.THREAD@ / (cpu_core@UOPS_EXECUTED.CORE_CYCLES_GE_1@ / 2 if #SMT_on else cpu_core@UOPS_EXECUTED.CORE_CYCLES_GE_1@)",
         "MetricGroup": "Backend;Cor;Pipeline;PortsUtil",
         "MetricName": "tma_info_core_ilp",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Fraction of Uops delivered by the DSB (aka Decoded ICache; or Uop Cache)",
-        "MetricExpr": "IDQ.DSB_UOPS / cpu_core@UOPS_ISSUED.ANY@",
+        "MetricExpr": "cpu_core@IDQ.DSB_UOPS@ / cpu_core@UOPS_ISSUED.ANY@",
         "MetricGroup": "DSB;Fed;FetchBW;tma_issueFB",
         "MetricName": "tma_info_frontend_dsb_coverage",
         "MetricThreshold": "tma_info_frontend_dsb_coverage < 0.7 & tma_info_thread_ipc / 6 > 0.35",
     },
     {
         "BriefDescription": "Average number of cycles of a switch from the DSB fetch-unit to MITE fetch unit - see DSB_Switches tree node for details.",
-        "MetricExpr": "DSB2MITE_SWITCHES.PENALTY_CYCLES / cpu_core@DSB2MITE_SWITCHES.PENALTY_CYCLES\\,cmask\\=1\\,edge@",
+        "MetricExpr": "cpu_core@DSB2MITE_SWITCHES.PENALTY_CYCLES@ / cpu_core@DSB2MITE_SWITCHES.PENALTY_CYCLES\\,cmask\\=1\\,edge@",
         "MetricGroup": "DSBmiss",
         "MetricName": "tma_info_frontend_dsb_switch_cost",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Average number of Uops issued by front-end when it issued something",
-        "MetricExpr": "UOPS_ISSUED.ANY / cpu_core@UOPS_ISSUED.ANY\\,cmask\\=1@",
+        "MetricExpr": "cpu_core@UOPS_ISSUED.ANY@ / cpu_core@UOPS_ISSUED.ANY\\,cmask\\=1@",
         "MetricGroup": "Fed;FetchBW",
         "MetricName": "tma_info_frontend_fetch_upc",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Average Latency for L1 instruction cache misses",
-        "MetricExpr": "ICACHE_DATA.STALLS / cpu_core@ICACHE_DATA.STALLS\\,cmask\\=1\\,edge@",
+        "MetricExpr": "cpu_core@ICACHE_DATA.STALLS@ / cpu_core@ICACHE_DATA.STALLS\\,cmask\\=1\\,edge@",
         "MetricGroup": "Fed;FetchLat;IcMiss",
         "MetricName": "tma_info_frontend_icache_miss_latency",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Instructions per non-speculative DSB miss (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / FRONTEND_RETIRED.ANY_DSB_MISS",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / FRONTEND_RETIRED.ANY_DSB_MISS",
         "MetricGroup": "DSBmiss;Fed",
         "MetricName": "tma_info_frontend_ipdsb_miss_ret",
         "MetricThreshold": "tma_info_frontend_ipdsb_miss_ret < 50",
     },
     {
         "BriefDescription": "Fraction of Uops delivered by the LSD (Loop Stream Detector; aka Loop Cache)",
-        "MetricExpr": "LSD.UOPS / cpu_core@UOPS_ISSUED.ANY@",
+        "MetricExpr": "cpu_core@LSD.UOPS@ / cpu_core@UOPS_ISSUED.ANY@",
         "MetricGroup": "Fed;LSD",
         "MetricName": "tma_info_frontend_lsd_coverage",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Branch instructions per taken branch.",
-        "MetricExpr": "BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN",
+        "MetricExpr": "cpu_core@BR_INST_RETIRED.ALL_BRANCHES@ / BR_INST_RETIRED.NEAR_TAKEN",
         "MetricGroup": "Branches;Fed;PGO",
         "MetricName": "tma_info_inst_mix_bptkbranch",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Instructions per FP Arithmetic instruction (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / (cpu_core@FP_ARITH_INST_RETIRED.SCALAR_SINGLE\\,umask\\=0x03@ + cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE\\,umask\\=0x3c@)",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.SCALAR_SINGLE\\,umask\\=0x03@ + cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE\\,umask\\=0x3c@)",
         "MetricGroup": "Flops;InsType",
         "MetricName": "tma_info_inst_mix_iparith",
         "MetricThreshold": "tma_info_inst_mix_iparith < 10",
     },
     {
         "BriefDescription": "Instructions per FP Arithmetic AVX/SSE 128-bit instruction (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / (cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE@)",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE@)",
         "MetricGroup": "Flops;FpVector;InsType",
         "MetricName": "tma_info_inst_mix_iparith_avx128",
         "MetricThreshold": "tma_info_inst_mix_iparith_avx128 < 10",
     },
     {
         "BriefDescription": "Instructions per FP Arithmetic AVX* 256-bit instruction (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / (cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@)",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE@ + cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@)",
         "MetricGroup": "Flops;FpVector;InsType",
         "MetricName": "tma_info_inst_mix_iparith_avx256",
         "MetricThreshold": "tma_info_inst_mix_iparith_avx256 < 10",
     },
     {
         "BriefDescription": "Instructions per FP Arithmetic Scalar Double-Precision instruction (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
         "MetricGroup": "Flops;FpScalar;InsType",
         "MetricName": "tma_info_inst_mix_iparith_scalar_dp",
         "MetricThreshold": "tma_info_inst_mix_iparith_scalar_dp < 10",
     },
     {
         "BriefDescription": "Instructions per FP Arithmetic Scalar Single-Precision instruction (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
         "MetricGroup": "Flops;FpScalar;InsType",
         "MetricName": "tma_info_inst_mix_iparith_scalar_sp",
         "MetricThreshold": "tma_info_inst_mix_iparith_scalar_sp < 10",
     },
     {
         "BriefDescription": "Instructions per Branch (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / BR_INST_RETIRED.ALL_BRANCHES",
         "MetricGroup": "Branches;Fed;InsType",
         "MetricName": "tma_info_inst_mix_ipbranch",
         "MetricThreshold": "tma_info_inst_mix_ipbranch < 8",
     },
     {
         "BriefDescription": "Instructions per (near) call (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / BR_INST_RETIRED.NEAR_CALL",
         "MetricGroup": "Branches;Fed;PGO",
         "MetricName": "tma_info_inst_mix_ipcall",
         "MetricThreshold": "tma_info_inst_mix_ipcall < 200",
     },
     {
         "BriefDescription": "Instructions per Floating Point (FP) Operation (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / (cpu_core@FP_ARITH_INST_RETIRED.SCALAR_SINGLE@ + cpu_core@FP_ARITH_INST_RETIRED.SCALAR_DOUBLE@ + 2 * cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + 4 * (cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE@ + cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE@) + 8 * cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@)",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / (cpu_core@FP_ARITH_INST_RETIRED.SCALAR_SINGLE@ + cpu_core@FP_ARITH_INST_RETIRED.SCALAR_DOUBLE@ + 2 * cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE@ + 4 * (cpu_core@FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE@ + cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE@) + 8 * cpu_core@FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE@)",
         "MetricGroup": "Flops;InsType",
         "MetricName": "tma_info_inst_mix_ipflop",
         "MetricThreshold": "tma_info_inst_mix_ipflop < 10",
     },
     {
         "BriefDescription": "Instructions per Load (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / MEM_INST_RETIRED.ALL_LOADS",
         "MetricGroup": "InsType",
         "MetricName": "tma_info_inst_mix_ipload",
         "MetricThreshold": "tma_info_inst_mix_ipload < 3",
     },
     {
         "BriefDescription": "Instructions per Store (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / MEM_INST_RETIRED.ALL_STORES",
         "MetricGroup": "InsType",
         "MetricName": "tma_info_inst_mix_ipstore",
         "MetricThreshold": "tma_info_inst_mix_ipstore < 8",
     },
     {
         "BriefDescription": "Instructions per Software prefetch instruction (of any type: NTA/T0/T1/T2/Prefetch) (lower number means higher occurrence rate)",
-        "MetricExpr": "INST_RETIRED.ANY / cpu_core@SW_PREFETCH_ACCESS.T0\\,umask\\=0xF@",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@SW_PREFETCH_ACCESS.T0\\,umask\\=0xF@",
         "MetricGroup": "Prefetches",
         "MetricName": "tma_info_inst_mix_ipswpf",
         "MetricThreshold": "tma_info_inst_mix_ipswpf < 100",
     },
     {
         "BriefDescription": "Instruction per taken branch",
-        "MetricExpr": "INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / BR_INST_RETIRED.NEAR_TAKEN",
         "MetricGroup": "Branches;Fed;FetchBW;Frontend;PGO;tma_issueFB",
         "MetricName": "tma_info_inst_mix_iptb",
         "MetricThreshold": "tma_info_inst_mix_iptb < 13",
     },
     {
         "BriefDescription": "Actual Average Latency for L1 data-cache miss demand load operations (in core cycles)",
-        "MetricExpr": "L1D_PEND_MISS.PENDING / MEM_LOAD_COMPLETED.L1_MISS_ANY",
+        "MetricExpr": "cpu_core@L1D_PEND_MISS.PENDING@ / MEM_LOAD_COMPLETED.L1_MISS_ANY",
         "MetricGroup": "Mem;MemoryBound;MemoryLat",
         "MetricName": "tma_info_memory_load_miss_real_latency",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss",
-        "MetricExpr": "L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES",
+        "MetricExpr": "cpu_core@L1D_PEND_MISS.PENDING@ / L1D_PEND_MISS.PENDING_CYCLES",
         "MetricGroup": "Mem;MemoryBW;MemoryBound",
         "MetricName": "tma_info_memory_mlp",
         "PublicDescription": "Memory-Level-Parallelism (average number of L1 miss demand load when there is at least one such miss. Per-Logical Processor)",
     },
     {
         "BriefDescription": "Average Parallel L2 cache miss data reads",
-        "MetricExpr": "OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD / OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
+        "MetricExpr": "cpu_core@OFFCORE_REQUESTS_OUTSTANDING.ALL_DATA_RD@ / OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DATA_RD",
         "MetricGroup": "Memory_BW;Offcore",
         "MetricName": "tma_info_memory_oro_data_l2_mlp",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Average Latency for L2 cache miss demand Loads",
-        "MetricExpr": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD / OFFCORE_REQUESTS.DEMAND_DATA_RD",
+        "MetricExpr": "cpu_core@OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD@ / OFFCORE_REQUESTS.DEMAND_DATA_RD",
         "MetricGroup": "Memory_Lat;Offcore",
         "MetricName": "tma_info_memory_oro_load_l2_miss_latency",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Average Parallel L2 cache miss demand Loads",
-        "MetricExpr": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD / cpu_core@OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD\\,cmask\\=1@",
+        "MetricExpr": "cpu_core@OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD@ / cpu_core@OFFCORE_REQUESTS_OUTSTANDING.DEMAND_DATA_RD\\,cmask\\=1@",
         "MetricGroup": "Memory_BW;Offcore",
         "MetricName": "tma_info_memory_oro_load_l2_mlp",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Average Latency for L3 cache miss demand Loads",
-        "MetricExpr": "OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD / OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",
+        "MetricExpr": "cpu_core@OFFCORE_REQUESTS_OUTSTANDING.L3_MISS_DEMAND_DATA_RD@ / OFFCORE_REQUESTS.L3_MISS_DEMAND_DATA_RD",
         "MetricGroup": "Memory_Lat;Offcore",
         "MetricName": "tma_info_memory_oro_load_l3_miss_latency",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Instruction-Level-Parallelism (average number of uops executed when there is execution) per-thread",
-        "MetricExpr": "UOPS_EXECUTED.THREAD / cpu_core@UOPS_EXECUTED.THREAD\\,cmask\\=1@",
+        "MetricExpr": "cpu_core@UOPS_EXECUTED.THREAD@ / cpu_core@UOPS_EXECUTED.THREAD\\,cmask\\=1@",
         "MetricGroup": "Cor;Pipeline;PortsUtil;SMT",
         "MetricName": "tma_info_pipeline_execute",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Instructions per a microcode Assist invocation",
-        "MetricExpr": "INST_RETIRED.ANY / cpu_core@ASSISTS.ANY\\,umask\\=0x1B@",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@ASSISTS.ANY\\,umask\\=0x1B@",
         "MetricGroup": "Pipeline;Ret;Retire",
         "MetricName": "tma_info_pipeline_ipassist",
         "MetricThreshold": "tma_info_pipeline_ipassist < 100e3",
     },
     {
         "BriefDescription": "Estimated fraction of retirement-cycles dealing with repeat instructions",
-        "MetricExpr": "INST_RETIRED.REP_ITERATION / cpu_core@UOPS_RETIRED.SLOTS\\,cmask\\=1@",
+        "MetricExpr": "cpu_core@INST_RETIRED.REP_ITERATION@ / cpu_core@UOPS_RETIRED.SLOTS\\,cmask\\=1@",
         "MetricGroup": "Pipeline;Ret",
         "MetricName": "tma_info_pipeline_strings_cycles",
         "MetricThreshold": "tma_info_pipeline_strings_cycles > 0.1",
     },
     {
         "BriefDescription": "Average CPU Utilization",
-        "MetricExpr": "CPU_CLK_UNHALTED.REF_TSC / TSC",
+        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.REF_TSC@ / TSC",
         "MetricGroup": "HPC;Summary",
         "MetricName": "tma_info_system_cpu_utilization",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "Instructions per Far Branch ( Far Branches apply upon transition from application to operating system, handling interrupts, exceptions) [lower number means higher occurrence rate]",
-        "MetricExpr": "INST_RETIRED.ANY / cpu_core@BR_INST_RETIRED.FAR_BRANCH@u",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / cpu_core@BR_INST_RETIRED.FAR_BRANCH@u",
         "MetricGroup": "Branches;OS",
         "MetricName": "tma_info_system_ipfarbranch",
         "MetricThreshold": "tma_info_system_ipfarbranch < 1e6",
     },
     {
         "BriefDescription": "Average latency of data read request to external memory (in nanoseconds)",
+        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(UNC_ARB_TRK_OCCUPANCY.RD + UNC_ARB_DAT_OCCUPANCY.RD) / UNC_ARB_TRK_REQUESTS.RD",
         "MetricGroup": "Mem;MemoryLat;SoC",
         "MetricName": "tma_info_system_mem_read_latency",
     },
     {
         "BriefDescription": "Average latency of all requests to external memory (in Uncore cycles)",
+        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(UNC_ARB_TRK_OCCUPANCY.ALL + UNC_ARB_DAT_OCCUPANCY.RD) / UNC_ARB_TRK_REQUESTS.ALL",
         "MetricGroup": "Mem;SoC",
         "MetricName": "tma_info_system_mem_request_latency",
     },
     {
         "BriefDescription": "The ratio of Executed- by Issued-Uops",
-        "MetricExpr": "UOPS_EXECUTED.THREAD / UOPS_ISSUED.ANY",
+        "MetricExpr": "cpu_core@UOPS_EXECUTED.THREAD@ / UOPS_ISSUED.ANY",
         "MetricGroup": "Cor;Pipeline",
         "MetricName": "tma_info_thread_execute_per_issue",
         "PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop micro-fusions. Ratio < 1 suggest high rate of \"execute\" at rename stage.",
     },
     {
         "BriefDescription": "Instructions Per Cycle (per Logical Processor)",
-        "MetricExpr": "INST_RETIRED.ANY / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@INST_RETIRED.ANY@ / tma_info_thread_clks",
         "MetricGroup": "Ret;Summary",
         "MetricName": "tma_info_thread_ipc",
         "Unit": "cpu_core"
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to Instruction TLB (ITLB) misses",
-        "MetricExpr": "ICACHE_TAG.STALLS / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@ICACHE_TAG.STALLS@ / tma_info_thread_clks",
         "MetricGroup": "BigFoot;FetchLat;MemoryTLB;TopdownL3;tma_L3_group;tma_fetch_latency_group",
         "MetricName": "tma_itlb_misses",
         "MetricThreshold": "tma_itlb_misses > 0.05 & (tma_fetch_latency > 0.1 & tma_frontend_bound > 0.15)",
     },
     {
         "BriefDescription": "This metric estimates how often the CPU was stalled due to L2 cache accesses by loads",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(cpu_core@MEMORY_ACTIVITY.STALLS_L1D_MISS@ - cpu_core@MEMORY_ACTIVITY.STALLS_L2_MISS@) / tma_info_thread_clks",
         "MetricGroup": "CacheMisses;MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l2_bound",
     },
     {
         "BriefDescription": "This metric estimates how often the CPU was stalled due to loads accesses to L3 cache or contended with a sibling Core",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "(cpu_core@MEMORY_ACTIVITY.STALLS_L2_MISS@ - cpu_core@MEMORY_ACTIVITY.STALLS_L3_MISS@) / tma_info_thread_clks",
         "MetricGroup": "CacheMisses;MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l3_bound",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles CPU was stalled due to Length Changing Prefixes (LCPs)",
-        "MetricExpr": "DECODE.LCP / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@DECODE.LCP@ / tma_info_thread_clks",
         "MetricGroup": "FetchLat;TopdownL3;tma_L3_group;tma_fetch_latency_group;tma_issueFB",
         "MetricName": "tma_lcp",
         "MetricThreshold": "tma_lcp > 0.05 & (tma_fetch_latency > 0.1 & tma_frontend_bound > 0.15)",
     },
     {
         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port for Load operations",
-        "MetricExpr": "UOPS_DISPATCHED.PORT_2_3_10 / (3 * tma_info_core_core_clks)",
+        "MetricExpr": "cpu_core@UOPS_DISPATCHED.PORT_2_3_10@ / (3 * tma_info_core_core_clks)",
         "MetricGroup": "TopdownL5;tma_L5_group;tma_ports_utilized_3m_group",
         "MetricName": "tma_load_op_utilization",
         "MetricThreshold": "tma_load_op_utilization > 0.6",
     },
     {
         "BriefDescription": "This metric estimates the fraction of cycles where the Second-level TLB (STLB) was missed by load accesses, performing a hardware page walk",
-        "MetricExpr": "DTLB_LOAD_MISSES.WALK_ACTIVE / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@DTLB_LOAD_MISSES.WALK_ACTIVE@ / tma_info_thread_clks",
         "MetricGroup": "MemoryTLB;TopdownL5;tma_L5_group;tma_dtlb_load_group",
         "MetricName": "tma_load_stlb_miss",
         "MetricThreshold": "tma_load_stlb_miss > 0.05 & (tma_dtlb_load > 0.1 & (tma_l1_bound > 0.1 & (tma_memory_bound > 0.2 & tma_backend_bound > 0.2)))",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(16 * max(0, cpu_core@MEM_INST_RETIRED.LOCK_LOADS@ - cpu_core@L2_RQSTS.ALL_RFO@) + cpu_core@MEM_INST_RETIRED.LOCK_LOADS@ / cpu_core@MEM_INST_RETIRED.ALL_STORES@ * (10 * cpu_core@L2_RQSTS.RFO_HIT@ + min(cpu_core@CPU_CLK_UNHALTED.THREAD@, cpu_core@OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO@))) / tma_info_thread_clks",
         "MetricGroup": "Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",
         "MetricName": "tma_lock_latency",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",
+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "13 * cpu_core@MISC2_RETIRED.LFENCE@ / tma_info_thread_clks",
         "MetricGroup": "TopdownL6;tma_L6_group;tma_serializing_operation_group",
         "MetricName": "tma_memory_fence",
     },
     {
         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring memory operations -- uops for memory load or store accesses.",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "tma_light_operations * cpu_core@MEM_UOP_RETIRED.ANY@ / (tma_retiring * tma_info_thread_slots)",
         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",
         "MetricName": "tma_memory_operations",
     },
     {
         "BriefDescription": "This metric represents fraction of slots the CPU was retiring uops fetched by the Microcode Sequencer (MS) unit",
-        "MetricExpr": "UOPS_RETIRED.MS / tma_info_thread_slots",
+        "MetricExpr": "cpu_core@UOPS_RETIRED.MS@ / tma_info_thread_slots",
         "MetricGroup": "MicroSeq;TopdownL3;tma_L3_group;tma_heavy_operations_group;tma_issueMC;tma_issueMS",
         "MetricName": "tma_microcode_sequencer",
         "MetricThreshold": "tma_microcode_sequencer > 0.05 & tma_heavy_operations > 0.1",
     },
     {
         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_int_operations + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches + tma_nop_instructions))",
         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",
         "MetricName": "tma_other_light_ops",
     },
     {
         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port 0 ([SNB+] ALU; [HSW+] ALU and 2nd branch)",
-        "MetricExpr": "UOPS_DISPATCHED.PORT_0 / tma_info_core_core_clks",
+        "MetricExpr": "cpu_core@UOPS_DISPATCHED.PORT_0@ / tma_info_core_core_clks",
         "MetricGroup": "Compute;TopdownL6;tma_L6_group;tma_alu_op_utilization_group;tma_issue2P",
         "MetricName": "tma_port_0",
         "MetricThreshold": "tma_port_0 > 0.6",
     },
     {
         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port 1 (ALU)",
-        "MetricExpr": "UOPS_DISPATCHED.PORT_1 / tma_info_core_core_clks",
+        "MetricExpr": "cpu_core@UOPS_DISPATCHED.PORT_1@ / tma_info_core_core_clks",
         "MetricGroup": "TopdownL6;tma_L6_group;tma_alu_op_utilization_group;tma_issue2P",
         "MetricName": "tma_port_1",
         "MetricThreshold": "tma_port_1 > 0.6",
     },
     {
         "BriefDescription": "This metric represents Core fraction of cycles CPU dispatched uops on execution port 6 ([HSW+]Primary Branch and simple ALU)",
-        "MetricExpr": "UOPS_DISPATCHED.PORT_6 / tma_info_core_core_clks",
+        "MetricExpr": "cpu_core@UOPS_DISPATCHED.PORT_6@ / tma_info_core_core_clks",
         "MetricGroup": "TopdownL6;tma_L6_group;tma_alu_op_utilization_group;tma_issue2P",
         "MetricName": "tma_port_6",
         "MetricThreshold": "tma_port_6 > 0.6",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles where the CPU executed total of 1 uop per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",
-        "MetricExpr": "EXE_ACTIVITY.1_PORTS_UTIL / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@EXE_ACTIVITY.1_PORTS_UTIL@ / tma_info_thread_clks",
         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issueL1;tma_ports_utilization_group",
         "MetricName": "tma_ports_utilized_1",
         "MetricThreshold": "tma_ports_utilized_1 > 0.2 & (tma_ports_utilization > 0.15 & (tma_core_bound > 0.1 & tma_backend_bound > 0.2))",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",
-        "MetricExpr": "EXE_ACTIVITY.2_PORTS_UTIL / tma_info_thread_clks",
+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
+        "MetricExpr": "cpu_core@EXE_ACTIVITY.2_PORTS_UTIL@ / tma_info_thread_clks",
         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",
         "MetricName": "tma_ports_utilized_2",
         "MetricThreshold": "tma_ports_utilized_2 > 0.15 & (tma_ports_utilization > 0.15 & (tma_core_bound > 0.1 & tma_backend_bound > 0.2))",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",
-        "MetricExpr": "UOPS_EXECUTED.CYCLES_GE_3 / tma_info_thread_clks",
+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
+        "MetricExpr": "cpu_core@UOPS_EXECUTED.CYCLES_GE_3@ / tma_info_thread_clks",
         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",
         "MetricName": "tma_ports_utilized_3m",
         "MetricThreshold": "tma_ports_utilized_3m > 0.7 & (tma_ports_utilization > 0.15 & (tma_core_bound > 0.1 & tma_backend_bound > 0.2))",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU issue-pipeline was stalled due to serializing operations",
-        "MetricExpr": "RESOURCE_STALLS.SCOREBOARD / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@RESOURCE_STALLS.SCOREBOARD@ / tma_info_thread_clks",
         "MetricGroup": "PortsUtil;TopdownL5;tma_L5_group;tma_issueSO;tma_ports_utilized_0_group",
         "MetricName": "tma_serializing_operation",
         "MetricThreshold": "tma_serializing_operation > 0.1 & (tma_ports_utilized_0 > 0.2 & (tma_ports_utilization > 0.15 & (tma_core_bound > 0.1 & tma_backend_bound > 0.2)))",
     },
     {
         "BriefDescription": "This metric represents Shuffle (cross \"vector lane\" data transfers) uops fraction the CPU has retired.",
-        "MetricExpr": "INT_VEC_RETIRED.SHUFFLES / (tma_retiring * tma_info_thread_slots)",
+        "MetricExpr": "cpu_core@INT_VEC_RETIRED.SHUFFLES@ / (tma_retiring * tma_info_thread_slots)",
         "MetricGroup": "HPC;Pipeline;TopdownL4;tma_L4_group;tma_int_operations_group",
         "MetricName": "tma_shuffles",
         "MetricThreshold": "tma_shuffles > 0.1 & (tma_int_operations > 0.1 & tma_light_operations > 0.6)",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",
-        "MetricExpr": "CPU_CLK_UNHALTED.PAUSE / tma_info_thread_clks",
+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
+        "MetricExpr": "cpu_core@CPU_CLK_UNHALTED.PAUSE@ / tma_info_thread_clks",
         "MetricGroup": "TopdownL6;tma_L6_group;tma_serializing_operation_group",
         "MetricName": "tma_slow_pause",
         "MetricThreshold": "tma_slow_pause > 0.05 & (tma_serializing_operation > 0.1 & (tma_ports_utilized_0 > 0.2 & (tma_ports_utilization > 0.15 & (tma_core_bound > 0.1 & tma_backend_bound > 0.2))))",
     },
     {
         "BriefDescription": "This metric represents rate of split store accesses",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
+        "MetricExpr": "cpu_core@MEM_INST_RETIRED.SPLIT_STORES@ / tma_info_core_core_clks",
-        "MetricExpr": "MEM_INST_RETIRED.SPLIT_STORES / tma_info_core_core_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_issueSpSt;tma_store_bound_group",
         "MetricName": "tma_split_stores",
         "MetricThreshold": "tma_split_stores > 0.2 & (tma_store_bound > 0.2 & (tma_memory_bound > 0.2 & tma_backend_bound > 0.2))",
     },
     {
         "BriefDescription": "This metric estimates how often CPU was stalled  due to RFO store memory accesses; RFO store issue a read-for-ownership request before the write",
-        "MetricExpr": "EXE_ACTIVITY.BOUND_ON_STORES / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@EXE_ACTIVITY.BOUND_ON_STORES@ / tma_info_thread_clks",
         "MetricGroup": "MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_store_bound",
         "MetricThreshold": "tma_store_bound > 0.2 & (tma_memory_bound > 0.2 & tma_backend_bound > 0.2)",
     },
     {
         "BriefDescription": "This metric roughly estimates fraction of cycles when the memory subsystem had loads blocked since they could not forward data from earlier (in program order) overlapping stores",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "13 * cpu_core@LD_BLOCKS.STORE_FORWARD@ / tma_info_thread_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",
         "MetricName": "tma_store_fwd_blk",
     },
     {
         "BriefDescription": "This metric estimates the fraction of cycles where the STLB was missed by store accesses, performing a hardware page walk",
-        "MetricExpr": "DTLB_STORE_MISSES.WALK_ACTIVE / tma_info_core_core_clks",
+        "MetricExpr": "cpu_core@DTLB_STORE_MISSES.WALK_ACTIVE@ / tma_info_core_core_clks",
         "MetricGroup": "MemoryTLB;TopdownL5;tma_L5_group;tma_dtlb_store_group",
         "MetricName": "tma_store_stlb_miss",
         "MetricThreshold": "tma_store_stlb_miss > 0.05 & (tma_dtlb_store > 0.05 & (tma_store_bound > 0.2 & (tma_memory_bound > 0.2 & tma_backend_bound > 0.2)))",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to new branch address clears",
-        "MetricExpr": "INT_MISC.UNKNOWN_BRANCH_CYCLES / tma_info_thread_clks",
+        "MetricExpr": "cpu_core@INT_MISC.UNKNOWN_BRANCH_CYCLES@ / tma_info_thread_clks",
         "MetricGroup": "BigFoot;FetchLat;TopdownL4;tma_L4_group;tma_branch_resteers_group",
         "MetricName": "tma_unknown_branches",
         "MetricThreshold": "tma_unknown_branches > 0.05 & (tma_branch_resteers > 0.05 & (tma_fetch_latency > 0.1 & tma_frontend_bound > 0.15))",

tools/perf/pmu-events/arch/x86/alderlaken/adln-metrics.json+0−4

     },
     {
         "BriefDescription": "Counts the number of cycles the core is stalled due to a demand load miss which hit in DRAM or MMIO (Non-DRAM).",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "MEM_BOUND_STALLS.LOAD_DRAM_HIT / tma_info_core_clks - max((MEM_BOUND_STALLS.LOAD - LD_HEAD.L1_MISS_AT_RET) / tma_info_core_clks, 0) * MEM_BOUND_STALLS.LOAD_DRAM_HIT / MEM_BOUND_STALLS.LOAD",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_dram_bound",
     },
     {
         "BriefDescription": "Counts the number of cycles a core is stalled due to a demand load which hit in the L2 Cache.",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "MEM_BOUND_STALLS.LOAD_L2_HIT / tma_info_core_clks - max((MEM_BOUND_STALLS.LOAD - LD_HEAD.L1_MISS_AT_RET) / tma_info_core_clks, 0) * MEM_BOUND_STALLS.LOAD_L2_HIT / MEM_BOUND_STALLS.LOAD",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l2_bound",
     },
     {
         "BriefDescription": "Counts the number of cycles a core is stalled due to a demand load which hit in the Last Level Cache (LLC) or other core with HITE/F/M.",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "MEM_BOUND_STALLS.LOAD_LLC_HIT / tma_info_core_clks - max((MEM_BOUND_STALLS.LOAD - LD_HEAD.L1_MISS_AT_RET) / tma_info_core_clks, 0) * MEM_BOUND_STALLS.LOAD_LLC_HIT / MEM_BOUND_STALLS.LOAD",
         "MetricGroup": "TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l3_bound",
     },
     {
         "BriefDescription": "Counts the number of cycles that the oldest load of the load buffer is stalled at retirement due to a store forward block.",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "LD_HEAD.ST_ADDR_AT_RET / tma_info_core_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",
         "MetricName": "tma_store_fwd_blk",

tools/perf/pmu-events/arch/x86/sapphirerapids/spr-metrics.json+5−20

     },
     {
         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to contested accesses",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(76 * tma_info_system_average_frequency * (MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD * (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM / (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM + OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD))) + 75.5 * tma_info_system_average_frequency * MEM_LOAD_L3_HIT_RETIRED.XSNP_MISS) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",
         "MetricGroup": "DataSharing;Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",
         "MetricName": "tma_contested_accesses",
     },
     {
         "BriefDescription": "This metric estimates fraction of cycles while the memory subsystem was handling synchronizations due to data-sharing accesses",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "75.5 * tma_info_system_average_frequency * (MEM_LOAD_L3_HIT_RETIRED.XSNP_NO_FWD + MEM_LOAD_L3_HIT_RETIRED.XSNP_FWD * (1 - OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM / (OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HITM + OCR.DEMAND_DATA_RD.L3_HIT.SNOOP_HIT_WITH_FWD))) * (1 + MEM_LOAD_RETIRED.FB_HIT / MEM_LOAD_RETIRED.L1_MISS / 2) / tma_info_thread_clks",
         "MetricGroup": "Offcore;Snoop;TopdownL4;tma_L4_group;tma_issueSyncxn;tma_l3_bound_group",
         "MetricName": "tma_data_sharing",
     },
     {
         "BriefDescription": "This metric estimates how often the CPU was stalled on accesses to external memory (DRAM) by loads",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks - tma_pmm_bound if #has_pmem > 0 else MEMORY_ACTIVITY.STALLS_L3_MISS / tma_info_thread_clks)",
         "MetricGroup": "MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_dram_bound",
     },
     {
         "BriefDescription": "Branch Misprediction Cost: Fraction of TMA slots wasted per non-speculative branch misprediction (retired JEClear)",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) * tma_info_thread_slots / BR_MISP_RETIRED.ALL_BRANCHES",
         "MetricGroup": "Bad;BrMispredicts;tma_issueBM",
         "MetricName": "tma_info_bad_spec_branch_misprediction_cost",
     },
     {
         "BriefDescription": "Probability of Core Bound bottleneck hidden by SMT-profiling artifacts",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(100 * (1 - tma_core_bound / tma_ports_utilization if tma_core_bound < tma_ports_utilization else 1) if tma_info_system_smt_2t_utilization > 0.5 else 0)",
         "MetricGroup": "Cor;SMT",
         "MetricName": "tma_info_botlnk_l0_core_bound_likely",
     },
     {
         "BriefDescription": "Total pipeline cost of DSB (uop cache) misses - subset of the Instruction_Fetch_BW Bottleneck",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * (tma_fetch_latency * tma_dsb_switches / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_mite / (tma_dsb + tma_mite))",
         "MetricGroup": "DSBmiss;Fed;tma_issueFB",
         "MetricName": "tma_info_botlnk_l2_dsb_misses",
     },
     {
         "BriefDescription": "Total pipeline cost of Instruction Cache misses - subset of the Big_Code Bottleneck",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * (tma_fetch_latency * tma_icache_misses / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",
         "MetricGroup": "Fed;FetchLat;IcMiss;tma_issueFL",
         "MetricName": "tma_info_botlnk_l2_ic_misses",
     },
     {
         "BriefDescription": "Total pipeline cost of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and BTB misses)",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * tma_fetch_latency * (tma_itlb_misses + tma_icache_misses + tma_unknown_branches) / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)",
         "MetricGroup": "BigFoot;Fed;Frontend;IcMiss;MemoryTLB;tma_issueBC",
         "MetricName": "tma_info_bottleneck_big_code",
     },
     {
         "BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * (tma_frontend_bound - tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) - tma_info_bottleneck_big_code",
         "MetricGroup": "Fed;FetchBW;Frontend",
         "MetricName": "tma_info_bottleneck_instruction_fetch_bw",
     },
     {
         "BriefDescription": "Total pipeline cost of (external) Memory Bandwidth related bottlenecks",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_pmm_bound + tma_store_bound) * (tma_mem_bandwidth / (tma_mem_bandwidth + tma_mem_latency)) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_pmm_bound + tma_store_bound) * (tma_sq_full / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full))) + tma_l1_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_pmm_bound + tma_store_bound) * (tma_fb_full / (tma_dtlb_load + tma_fb_full + tma_lock_latency + tma_split_loads + tma_store_fwd_blk))",
         "MetricGroup": "Mem;MemoryBW;Offcore;tma_issueBW",
         "MetricName": "tma_info_bottleneck_memory_bandwidth",
     },
     {
         "BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_pmm_bound + tma_store_bound) * (tma_dtlb_load / max(tma_l1_bound, tma_dtlb_load + tma_fb_full + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_pmm_bound + tma_store_bound) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",
         "MetricGroup": "Mem;MemoryTLB;Offcore;tma_issueTLB",
         "MetricName": "tma_info_bottleneck_memory_data_tlbs",
     },
     {
         "BriefDescription": "Total pipeline cost of Memory Latency related bottlenecks (external memory and off-core caches)",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_pmm_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_pmm_bound + tma_store_bound) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_pmm_bound + tma_store_bound))",
         "MetricGroup": "Mem;MemoryLat;Offcore;tma_issueLat",
         "MetricName": "tma_info_bottleneck_memory_latency",
     },
     {
         "BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "100 * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",
         "MetricGroup": "Bad;BadSpec;BrMispredicts;tma_issueBM",
         "MetricName": "tma_info_bottleneck_mispredictions",
     },
     {
         "BriefDescription": "Average latency of data read request to external memory (in nanoseconds)",
+        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "1e9 * (UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_INSERTS.IA_MISS_DRD) / (tma_info_system_socket_clks / duration_time)",
         "MetricGroup": "Mem;MemoryLat;SoC",
         "MetricName": "tma_info_system_mem_read_latency",
     },
     {
         "BriefDescription": "This metric estimates how often the CPU was stalled due to L2 cache accesses by loads",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(MEMORY_ACTIVITY.STALLS_L1D_MISS - MEMORY_ACTIVITY.STALLS_L2_MISS) / tma_info_thread_clks",
         "MetricGroup": "CacheMisses;MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l2_bound",
     },
     {
         "BriefDescription": "This metric estimates how often the CPU was stalled due to loads accesses to L3 cache or contended with a sibling Core",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "(MEMORY_ACTIVITY.STALLS_L2_MISS - MEMORY_ACTIVITY.STALLS_L3_MISS) / tma_info_thread_clks",
         "MetricGroup": "CacheMisses;MemoryBound;TmaL3mem;TopdownL3;tma_L3_group;tma_memory_bound_group",
         "MetricName": "tma_l3_bound",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU spent handling cache misses due to lock operations",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "(16 * max(0, MEM_INST_RETIRED.LOCK_LOADS - L2_RQSTS.ALL_RFO) + MEM_INST_RETIRED.LOCK_LOADS / MEM_INST_RETIRED.ALL_STORES * (10 * L2_RQSTS.RFO_HIT + min(CPU_CLK_UNHALTED.THREAD, OFFCORE_REQUESTS_OUTSTANDING.CYCLES_WITH_DEMAND_RFO))) / tma_info_thread_clks",
         "MetricGroup": "Offcore;TopdownL4;tma_L4_group;tma_issueRFO;tma_l1_bound_group",
         "MetricName": "tma_lock_latency",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to LFENCE Instructions.",
+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "13 * MISC2_RETIRED.LFENCE / tma_info_thread_clks",
         "MetricGroup": "TopdownL6;tma_L6_group;tma_serializing_operation_group",
         "MetricName": "tma_memory_fence",
     },
     {
         "BriefDescription": "This metric represents fraction of slots where the CPU was retiring memory operations -- uops for memory load or store accesses.",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "tma_light_operations * MEM_UOP_RETIRED.ANY / (tma_retiring * tma_info_thread_slots)",
         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",
         "MetricName": "tma_memory_operations",
     },
     {
         "BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",
-        "MetricConstraint": "NO_GROUP_EVENTS",
         "MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_int_operations + tma_memory_operations + tma_fused_instructions + tma_non_fused_branches + tma_nop_instructions))",
         "MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",
         "MetricName": "tma_other_light_ops",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 2 uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",
+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "EXE_ACTIVITY.2_PORTS_UTIL / tma_info_thread_clks",
         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_issue2P;tma_ports_utilization_group",
         "MetricName": "tma_ports_utilized_2",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles CPU executed total of 3 or more uops per cycle on all execution ports (Logical Processor cycles since ICL, Physical Core cycles otherwise)",
+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "UOPS_EXECUTED.CYCLES_GE_3 / tma_info_thread_clks",
         "MetricGroup": "PortsUtil;TopdownL4;tma_L4_group;tma_ports_utilization_group",
         "MetricName": "tma_ports_utilized_3m",
     },
     {
         "BriefDescription": "This metric represents fraction of cycles the CPU was stalled due to PAUSE Instructions",
+        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "CPU_CLK_UNHALTED.PAUSE / tma_info_thread_clks",
         "MetricGroup": "TopdownL6;tma_L6_group;tma_serializing_operation_group",
         "MetricName": "tma_slow_pause",
     },
     {
         "BriefDescription": "This metric represents rate of split store accesses",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "MEM_INST_RETIRED.SPLIT_STORES / tma_info_core_core_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_issueSpSt;tma_store_bound_group",
         "MetricName": "tma_split_stores",
     },
     {
         "BriefDescription": "This metric roughly estimates fraction of cycles when the memory subsystem had loads blocked since they could not forward data from earlier (in program order) overlapping stores",
-        "MetricConstraint": "NO_GROUP_EVENTS_NMI",
         "MetricExpr": "13 * LD_BLOCKS.STORE_FORWARD / tma_info_thread_clks",
         "MetricGroup": "TopdownL4;tma_L4_group;tma_l1_bound_group",
         "MetricName": "tma_store_fwd_blk",

tools/perf/tests/shell/daemon.sh+24−10

@@ -414,16 +414,30 @@ EOF · 413 unmodified lines
414	# start daemon	414	# start daemon
415	daemon_start ${config} test	415	daemon_start ${config} test
416		416
417	# send 2 signals	417	# send 2 signals then exit. Do this in a loop watching the number of
418	perf daemon signal --config ${config} --session test	418	# files to avoid races. If the loop retries more than 600 times then
419	perf daemon signal --config ${config}	419	# give up.
420		420	local retries=0
421	# stop daemon	421	local signals=0
422	daemon_exit ${config}	422	local success=0
423		423	while [ ${retries} -lt 600 ] && [ ${success} -eq 0 ]; do
424	# count is 2 perf.data for signals and 1 for perf record finished	424	local files
425	count=`ls ${base}/session-test/perf.data \| wc -l`	425	files=`ls ${base}/session-test/perf.data 2> /dev/null \| wc -l`
426	if [ ${count} -ne 3 ]; then	426	if [ ${signals} -eq 0 ]; then
		427	perf daemon signal --config ${config} --session test
		428	signals=1
		429	elif [ ${signals} -eq 1 ] && [ $files -ge 1 ]; then
		430	perf daemon signal --config ${config}
		431	signals=2
		432	elif [ ${signals} -eq 2 ] && [ $files -ge 2 ]; then
		433	daemon_exit ${config}
		434	signals=3
		435	elif [ ${signals} -eq 3 ] && [ $files -ge 3 ]; then
		436	success=1
		437	fi
		438	retries=$((${retries} +1))
		439	done
		440	if [ ${success} -eq 0 ]; then
427	error=1	441	error=1
428	echo "FAILED: perf data no generated"	442	echo "FAILED: perf data no generated"
429	fi	443	fi

tools/perf/tests/shell/list.sh+18−3

 # SPDX-License-Identifier: GPL-2.0
 set -e
-err=0
 shelldir=$(dirname "$0")
 # shellcheck source=lib/setup_python.sh
 . "${shelldir}"/lib/setup_python.sh
+list_output=$(mktemp /tmp/__perf_test.list_output.json.XXXXX)
+cleanup() {
+  rm -f "${list_output}"
+  trap - EXIT TERM INT
+}
+trap_cleanup() {
+  cleanup
+  exit 1
+}
+trap trap_cleanup EXIT TERM INT
 test_list_json() {
   echo "Json output test"
-  perf list -j | $PYTHON -m json.tool
+  perf list -j -o "${list_output}"
+  $PYTHON -m json.tool "${list_output}"
   echo "Json output test [Success]"
 }
 test_list_json
-exit $err
+cleanup
+exit 0

tools/perf/tests/shell/script.sh+9−3

 	echo "DB test"
 	# Check if python script is supported
-	libpython=$(perf version --build-options | grep python | grep -cv OFF)
+        if perf version --build-options | grep python | grep -q OFF ; then
-	if [ "${libpython}" != "1" ] ; then
 		echo "SKIP: python scripting is not supported"
 		err=2
 		return
 def call_path_table(*args):
     print(f'call_path_table({args}')
 _end_of_file_
-	perf record -g -o "${perfdatafile}" true
+	case $(uname -m)
+	in s390x)
+		cmd_flags="--call-graph dwarf -e cpu-clock";;
+	*)
+		cmd_flags="-g";;
+	esac
+	perf record $cmd_flags -o "${perfdatafile}" true
 	perf script -i "${perfdatafile}" -s "${db_test}"
 	echo "DB test [Success]"
 }

tools/perf/trace/beauty/statx.c+1−0

@@ -67,6 +67,7 @@ size_t syscall_arg__scnprintf_statx_mask(char *bf, size_t size, struct syscall_a · 66 unmodified lines
67	P_FLAG(BTIME);	67	P_FLAG(BTIME);
68	P_FLAG(MNT_ID);	68	P_FLAG(MNT_ID);
69	P_FLAG(DIOALIGN);	69	P_FLAG(DIOALIGN);
		70	P_FLAG(MNT_ID_UNIQUE);
70		71
71	#undef P_FLAG	72	#undef P_FLAG
72		73

tools/perf/util/evlist.c+8−1

 	err = parse_event(evlist, can_profile_kernel ? "cycles:P" : "cycles:Pu");
 	if (err) {
 		evlist__delete(evlist);
-		evlist = NULL;
+		return NULL;
+	}
+	if (evlist->core.nr_entries > 1) {
+		struct evsel *evsel;
+		evlist__for_each_entry(evlist, evsel)
+			evsel__set_sample_id(evsel, /*can_sample_identifier=*/false);
 	}
 	return evlist;

tools/perf/util/hist.c+2−2

@@ -491,8 +491,8 @@ static int hist_entry__init(struct hist_entry *he, · 490 unmodified lines
491	}	491	}
492		492
493	if (symbol_conf.res_sample) {	493	if (symbol_conf.res_sample) {
494	he->res_samples = calloc(sizeof(struct res_sample),	494	he->res_samples = calloc(symbol_conf.res_sample,
495	symbol_conf.res_sample);	495	sizeof(struct res_sample));
496	if (!he->res_samples)	496	if (!he->res_samples)
497	goto err_srcline;	497	goto err_srcline;
498	}	498	}

tools/perf/util/include/linux/linkage.h+4−0

 	SYM_ALIAS(alias, name, SYM_T_FUNC, SYM_L_WEAK)
 #endif
+#ifndef SYM_FUNC_ALIAS_MEMFUNC
+#define SYM_FUNC_ALIAS_MEMFUNC SYM_FUNC_ALIAS
+#endif
 // In the kernel sources (include/linux/cfi_types.h), this has a different
 // definition when CONFIG_CFI_CLANG is used, for tools/ just use the !clang
 // definition:

tools/perf/util/metricgroup.c+1−1

@@ -286,7 +286,7 @@ static int setup_metric_events(const char pmu, struct hashmap ids, · 285 unmodified lines
286	*out_metric_events = NULL;	286	*out_metric_events = NULL;
287	ids_size = hashmap__size(ids);	287	ids_size = hashmap__size(ids);
288		288
289	metric_events = calloc(sizeof(void *), ids_size + 1);	289	metric_events = calloc(ids_size + 1, sizeof(void *));
290	if (!metric_events)	290	if (!metric_events)
291	return -ENOMEM;	291	return -ENOMEM;
292		292

tools/perf/util/print-events.c+1−1

@@ -66,7 +66,7 @@ void print_tracepoint_events(const struct print_callbacks *print_cb __maybe_unus · 65 unmodified lines
66		66
67	put_tracing_file(events_path);	67	put_tracing_file(events_path);
68	if (events_fd < 0) {	68	if (events_fd < 0) {
69	printf("Error: failed to open tracing events directory\n");	69	pr_err("Error: failed to open tracing events directory\n");
70	return;	70	return;
71	}	71	}
72		72

tools/perf/util/synthetic-events.c+2−2

@@ -1055,11 +1055,11 @@ int perf_event__synthesize_threads(struct perf_tool *tool, · 1054 unmodified lines
1055	if (thread_nr > n)	1055	if (thread_nr > n)
1056	thread_nr = n;	1056	thread_nr = n;
1057		1057
1058	synthesize_threads = calloc(sizeof(pthread_t), thread_nr);	1058	synthesize_threads = calloc(thread_nr, sizeof(pthread_t));
1059	if (synthesize_threads == NULL)	1059	if (synthesize_threads == NULL)
1060	goto free_dirent;	1060	goto free_dirent;
1061		1061
1062	args = calloc(sizeof(*args), thread_nr);	1062	args = calloc(thread_nr, sizeof(*args));
1063	if (args == NULL)	1063	if (args == NULL)
1064	goto free_threads;	1064	goto free_threads;
1065		1065

tools/testing/selftests/kvm/riscv/get-reg-list.c+108−0

@@ -49,15 +49,42 @@ bool filter_reg(__u64 reg) · 48 unmodified lines
49	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_SVPBMT:	49	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_SVPBMT:
50	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBA:	50	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBA:
51	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBB:	51	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBB:
		52	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBC:
		53	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBKB:
		54	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBKC:
		55	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBKX:
52	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBS:	56	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZBS:
		57	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZFA:
		58	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZFH:
		59	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZFHMIN:
53	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICBOM:	60	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICBOM:
54	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICBOZ:	61	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICBOZ:
55	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICNTR:	62	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICNTR:
56	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICOND:	63	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICOND:
57	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICSR:	64	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZICSR:
58	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZIFENCEI:	65	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZIFENCEI:
		66	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZIHINTNTL:
59	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZIHINTPAUSE:	67	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZIHINTPAUSE:
60	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZIHPM:	68	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZIHPM:
		69	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZKND:
		70	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZKNE:
		71	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZKNH:
		72	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZKR:
		73	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZKSED:
		74	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZKSH:
		75	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZKT:
		76	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVBB:
		77	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVBC:
		78	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVFH:
		79	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVFHMIN:
		80	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVKB:
		81	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVKG:
		82	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVKNED:
		83	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVKNHA:
		84	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVKNHB:
		85	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVKSED:
		86	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVKSH:
		87	case KVM_REG_RISCV_ISA_EXT \| KVM_REG_RISCV_ISA_SINGLE \| KVM_RISCV_ISA_EXT_ZVKT:
61	/*	88	/*
62	* Like ISA_EXT registers, SBI_EXT registers are only visible when the	89	* Like ISA_EXT registers, SBI_EXT registers are only visible when the
63	* host supports them and disabling them does not affect the visibility	90	* host supports them and disabling them does not affect the visibility
@@ -394,15 +421,42 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) · 330 unmodified lines
394	KVM_ISA_EXT_ARR(SVPBMT),	421	KVM_ISA_EXT_ARR(SVPBMT),
395	KVM_ISA_EXT_ARR(ZBA),	422	KVM_ISA_EXT_ARR(ZBA),
396	KVM_ISA_EXT_ARR(ZBB),	423	KVM_ISA_EXT_ARR(ZBB),
		424	KVM_ISA_EXT_ARR(ZBC),
		425	KVM_ISA_EXT_ARR(ZBKB),
		426	KVM_ISA_EXT_ARR(ZBKC),
		427	KVM_ISA_EXT_ARR(ZBKX),
397	KVM_ISA_EXT_ARR(ZBS),	428	KVM_ISA_EXT_ARR(ZBS),
		429	KVM_ISA_EXT_ARR(ZFA),
		430	KVM_ISA_EXT_ARR(ZFH),
		431	KVM_ISA_EXT_ARR(ZFHMIN),
398	KVM_ISA_EXT_ARR(ZICBOM),	432	KVM_ISA_EXT_ARR(ZICBOM),
399	KVM_ISA_EXT_ARR(ZICBOZ),	433	KVM_ISA_EXT_ARR(ZICBOZ),
400	KVM_ISA_EXT_ARR(ZICNTR),	434	KVM_ISA_EXT_ARR(ZICNTR),
401	KVM_ISA_EXT_ARR(ZICOND),	435	KVM_ISA_EXT_ARR(ZICOND),
402	KVM_ISA_EXT_ARR(ZICSR),	436	KVM_ISA_EXT_ARR(ZICSR),
403	KVM_ISA_EXT_ARR(ZIFENCEI),	437	KVM_ISA_EXT_ARR(ZIFENCEI),
		438	KVM_ISA_EXT_ARR(ZIHINTNTL),
404	KVM_ISA_EXT_ARR(ZIHINTPAUSE),	439	KVM_ISA_EXT_ARR(ZIHINTPAUSE),
405	KVM_ISA_EXT_ARR(ZIHPM),	440	KVM_ISA_EXT_ARR(ZIHPM),
		441	KVM_ISA_EXT_ARR(ZKND),
		442	KVM_ISA_EXT_ARR(ZKNE),
		443	KVM_ISA_EXT_ARR(ZKNH),
		444	KVM_ISA_EXT_ARR(ZKR),
		445	KVM_ISA_EXT_ARR(ZKSED),
		446	KVM_ISA_EXT_ARR(ZKSH),
		447	KVM_ISA_EXT_ARR(ZKT),
		448	KVM_ISA_EXT_ARR(ZVBB),
		449	KVM_ISA_EXT_ARR(ZVBC),
		450	KVM_ISA_EXT_ARR(ZVFH),
		451	KVM_ISA_EXT_ARR(ZVFHMIN),
		452	KVM_ISA_EXT_ARR(ZVKB),
		453	KVM_ISA_EXT_ARR(ZVKG),
		454	KVM_ISA_EXT_ARR(ZVKNED),
		455	KVM_ISA_EXT_ARR(ZVKNHA),
		456	KVM_ISA_EXT_ARR(ZVKNHB),
		457	KVM_ISA_EXT_ARR(ZVKSED),
		458	KVM_ISA_EXT_ARR(ZVKSH),
		459	KVM_ISA_EXT_ARR(ZVKT),
406	};	460	};
407		461
408	if (reg_off >= ARRAY_SIZE(kvm_isa_ext_reg_name))	462	if (reg_off >= ARRAY_SIZE(kvm_isa_ext_reg_name))
@@ -888,15 +942,42 @@ KVM_ISA_EXT_SIMPLE_CONFIG(svnapot, SVNAPOT); · 479 unmodified lines
888	KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);	942	KVM_ISA_EXT_SIMPLE_CONFIG(svpbmt, SVPBMT);
889	KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);	943	KVM_ISA_EXT_SIMPLE_CONFIG(zba, ZBA);
890	KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);	944	KVM_ISA_EXT_SIMPLE_CONFIG(zbb, ZBB);
		945	KVM_ISA_EXT_SIMPLE_CONFIG(zbc, ZBC);
		946	KVM_ISA_EXT_SIMPLE_CONFIG(zbkb, ZBKB);
		947	KVM_ISA_EXT_SIMPLE_CONFIG(zbkc, ZBKC);
		948	KVM_ISA_EXT_SIMPLE_CONFIG(zbkx, ZBKX);
891	KVM_ISA_EXT_SIMPLE_CONFIG(zbs, ZBS);	949	KVM_ISA_EXT_SIMPLE_CONFIG(zbs, ZBS);
		950	KVM_ISA_EXT_SIMPLE_CONFIG(zfa, ZFA);
		951	KVM_ISA_EXT_SIMPLE_CONFIG(zfh, ZFH);
		952	KVM_ISA_EXT_SIMPLE_CONFIG(zfhmin, ZFHMIN);
892	KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM);	953	KVM_ISA_EXT_SUBLIST_CONFIG(zicbom, ZICBOM);
893	KVM_ISA_EXT_SUBLIST_CONFIG(zicboz, ZICBOZ);	954	KVM_ISA_EXT_SUBLIST_CONFIG(zicboz, ZICBOZ);
894	KVM_ISA_EXT_SIMPLE_CONFIG(zicntr, ZICNTR);	955	KVM_ISA_EXT_SIMPLE_CONFIG(zicntr, ZICNTR);
895	KVM_ISA_EXT_SIMPLE_CONFIG(zicond, ZICOND);	956	KVM_ISA_EXT_SIMPLE_CONFIG(zicond, ZICOND);
896	KVM_ISA_EXT_SIMPLE_CONFIG(zicsr, ZICSR);	957	KVM_ISA_EXT_SIMPLE_CONFIG(zicsr, ZICSR);
897	KVM_ISA_EXT_SIMPLE_CONFIG(zifencei, ZIFENCEI);	958	KVM_ISA_EXT_SIMPLE_CONFIG(zifencei, ZIFENCEI);
		959	KVM_ISA_EXT_SIMPLE_CONFIG(zihintntl, ZIHINTNTL);
898	KVM_ISA_EXT_SIMPLE_CONFIG(zihintpause, ZIHINTPAUSE);	960	KVM_ISA_EXT_SIMPLE_CONFIG(zihintpause, ZIHINTPAUSE);
899	KVM_ISA_EXT_SIMPLE_CONFIG(zihpm, ZIHPM);	961	KVM_ISA_EXT_SIMPLE_CONFIG(zihpm, ZIHPM);
		962	KVM_ISA_EXT_SIMPLE_CONFIG(zknd, ZKND);
		963	KVM_ISA_EXT_SIMPLE_CONFIG(zkne, ZKNE);
		964	KVM_ISA_EXT_SIMPLE_CONFIG(zknh, ZKNH);
		965	KVM_ISA_EXT_SIMPLE_CONFIG(zkr, ZKR);
		966	KVM_ISA_EXT_SIMPLE_CONFIG(zksed, ZKSED);
		967	KVM_ISA_EXT_SIMPLE_CONFIG(zksh, ZKSH);
		968	KVM_ISA_EXT_SIMPLE_CONFIG(zkt, ZKT);
		969	KVM_ISA_EXT_SIMPLE_CONFIG(zvbb, ZVBB);
		970	KVM_ISA_EXT_SIMPLE_CONFIG(zvbc, ZVBC);
		971	KVM_ISA_EXT_SIMPLE_CONFIG(zvfh, ZVFH);
		972	KVM_ISA_EXT_SIMPLE_CONFIG(zvfhmin, ZVFHMIN);
		973	KVM_ISA_EXT_SIMPLE_CONFIG(zvkb, ZVKB);
		974	KVM_ISA_EXT_SIMPLE_CONFIG(zvkg, ZVKG);
		975	KVM_ISA_EXT_SIMPLE_CONFIG(zvkned, ZVKNED);
		976	KVM_ISA_EXT_SIMPLE_CONFIG(zvknha, ZVKNHA);
		977	KVM_ISA_EXT_SIMPLE_CONFIG(zvknhb, ZVKNHB);
		978	KVM_ISA_EXT_SIMPLE_CONFIG(zvksed, ZVKSED);
		979	KVM_ISA_EXT_SIMPLE_CONFIG(zvksh, ZVKSH);
		980	KVM_ISA_EXT_SIMPLE_CONFIG(zvkt, ZVKT);
900		981
901	struct vcpu_reg_list *vcpu_configs[] = {	982	struct vcpu_reg_list *vcpu_configs[] = {
902	&config_sbi_base,	983	&config_sbi_base,
@@ -914,14 +995,41 @@ struct vcpu_reg_list *vcpu_configs[] = { · 11 unmodified lines
914	&config_svpbmt,	995	&config_svpbmt,
915	&config_zba,	996	&config_zba,
916	&config_zbb,	997	&config_zbb,
		998	&config_zbc,
		999	&config_zbkb,
		1000	&config_zbkc,
		1001	&config_zbkx,
917	&config_zbs,	1002	&config_zbs,
		1003	&config_zfa,
		1004	&config_zfh,
		1005	&config_zfhmin,
918	&config_zicbom,	1006	&config_zicbom,
919	&config_zicboz,	1007	&config_zicboz,
920	&config_zicntr,	1008	&config_zicntr,
921	&config_zicond,	1009	&config_zicond,
922	&config_zicsr,	1010	&config_zicsr,
923	&config_zifencei,	1011	&config_zifencei,
		1012	&config_zihintntl,
924	&config_zihintpause,	1013	&config_zihintpause,
925	&config_zihpm,	1014	&config_zihpm,
		1015	&config_zknd,
		1016	&config_zkne,
		1017	&config_zknh,
		1018	&config_zkr,
		1019	&config_zksed,
		1020	&config_zksh,
		1021	&config_zkt,
		1022	&config_zvbb,
		1023	&config_zvbc,
		1024	&config_zvfh,
		1025	&config_zvfhmin,
		1026	&config_zvkb,
		1027	&config_zvkg,
		1028	&config_zvkned,
		1029	&config_zvknha,
		1030	&config_zvknhb,
		1031	&config_zvksed,
		1032	&config_zvksh,
		1033	&config_zvkt,
926	};	1034	};
927	int vcpu_configs_n = ARRAY_SIZE(vcpu_configs);	1035	int vcpu_configs_n = ARRAY_SIZE(vcpu_configs);

tools/testing/selftests/net/big_tcp.sh+3−1

@@ -122,7 +122,9 @@ do_netperf() { · 121 unmodified lines
122	local netns=$1	122	local netns=$1
123		123
124	[ "$NF" = "6" ] && serip=$SERVER_IP6	124	[ "$NF" = "6" ] && serip=$SERVER_IP6
125	ip net exec $netns netperf -$NF -t TCP_STREAM -H $serip 2>&1 >/dev/null	125
		126	# use large write to be sure to generate big tcp packets
		127	ip net exec $netns netperf -$NF -t TCP_STREAM -l 1 -H $serip -- -m 262144 2>&1 >/dev/null
126	}	128	}
127		129
128	do_test() {	130	do_test() {

tools/testing/selftests/net/cmsg_ipv6.sh+2−2

@@ -89,7 +89,7 @@ for ovr in setsock cmsg both diff; do · 88 unmodified lines
89	check_result $? 0 "TCLASS $prot $ovr - pass"	89	check_result $? 0 "TCLASS $prot $ovr - pass"
90		90
91	while [ -d /proc/$BG ]; do	91	while [ -d /proc/$BG ]; do
92	$NSEXE ./cmsg_sender -6 -p u $TGT6 1234	92	$NSEXE ./cmsg_sender -6 -p $p $m $((TOS2)) $TGT6 1234
93	done	93	done
94		94
95	tcpdump -r $TMPF -v 2>&1 \| grep "class $TOS2" >> /dev/null	95	tcpdump -r $TMPF -v 2>&1 \| grep "class $TOS2" >> /dev/null
@@ -126,7 +126,7 @@ for ovr in setsock cmsg both diff; do · 30 unmodified lines
126	check_result $? 0 "HOPLIMIT $prot $ovr - pass"	126	check_result $? 0 "HOPLIMIT $prot $ovr - pass"
127		127
128	while [ -d /proc/$BG ]; do	128	while [ -d /proc/$BG ]; do
129	$NSEXE ./cmsg_sender -6 -p u $TGT6 1234	129	$NSEXE ./cmsg_sender -6 -p $p $m $LIM $TGT6 1234
130	done	130	done
131		131
132	tcpdump -r $TMPF -v 2>&1 \| grep "hlim $LIM[^0-9]" >> /dev/null	132	tcpdump -r $TMPF -v 2>&1 \| grep "hlim $LIM[^0-9]" >> /dev/null

tools/testing/selftests/net/pmtu.sh+17−6

 #	Same as above but with IPv6
 source lib.sh
+source net_helper.sh
 PAUSE_ON_FAIL=no
 VERBOSE=0
 			TCPDST="TCP:[${dst}]:50000"
 		fi
 		${ns_b} socat -T 3 -u -6 TCP-LISTEN:50000 STDOUT > $tmpoutfile &
+		local socat_pid=$!
-		sleep 1
+		wait_local_port_listen ${NS_B} 50000 tcp
 		dd if=/dev/zero status=none bs=1M count=1 | ${target} socat -T 3 -u STDIN $TCPDST,connect-timeout=3
 		size=$(du -sb $tmpoutfile)
 		size=${size%%/tmp/*}
+		wait ${socat_pid}
 		[ $size -ne 1048576 ] && err "File size $size mismatches exepcted value in locally bridged vxlan test" && return 1
 	done
 	return 0
 }
+check_running() {
+	pid=${1}
+	cmd=${2}
+	[ "$(cat /proc/${pid}/cmdline 2>/dev/null | tr -d '\0')" = "{cmd}" ]
+}
 test_cleanup_vxlanX_exception() {
 	outer="${1}"
 	encap="vxlan"
 	${ns_a} ip link del dev veth_A-R1 &
 	iplink_pid=$!
-	sleep 1
+	for i in $(seq 1 20); do
-	if [ "$(cat /proc/${iplink_pid}/cmdline 2>/dev/null | tr -d '\0')" = "iplinkdeldevveth_A-R1" ]; then
+		check_running ${iplink_pid} "iplinkdeldevveth_A-R1" || return 0
-		err "  can't delete veth device in a timely manner, PMTU dst likely leaked"
+		sleep 0.1
-		return 1
+	done
-	fi
+	err "  can't delete veth device in a timely manner, PMTU dst likely leaked"
+	return 1
 }
 test_cleanup_ipv6_exception() {

tools/testing/selftests/net/rtnetlink.sh+2−4

 	local ret=0
 	vxlan="test-vxlan0"
 	vlan="test-vlan0"
-	testns="$1"
 	run_cmd ip -netns "$testns" link add "$vxlan" type vxlan id 42 group 239.1.1.1 \
 		dev "$devdummy" dstport 4789
 	if [ $? -ne 0 ]; then
 {
 	local ret=0
 	name="test-fou"
-	testns="$1"
 	run_cmd_grep 'Usage: ip fou' ip fou help
 	if [ $? -ne 0 ];then
 		end_test "SKIP: fou: iproute2 too old"
 	run_cmd ip -netns "$testns" link set lo up
 	run_cmd ip -netns "$testns" link add name "$devdummy" type dummy
 	run_cmd ip -netns "$testns" link set "$devdummy" up
-	run_cmd kci_test_encap_vxlan "$testns"
+	run_cmd kci_test_encap_vxlan
-	run_cmd kci_test_encap_fou "$testns"
+	run_cmd kci_test_encap_fou
 	ip netns del "$testns"
 	return $ret

tools/testing/selftests/net/tcp_ao/unsigned-md5.c+6−6

@@ -110,9 +110,9 @@ static void try_accept(const char *tst_name, unsigned int port, · 109 unmodified lines
110	test_tcp_ao_counters_cmp(tst_name, &ao_cnt1, &ao_cnt2, cnt_expected);	110	test_tcp_ao_counters_cmp(tst_name, &ao_cnt1, &ao_cnt2, cnt_expected);
111		111
112	out:	112	out:
113	synchronize_threads(); /* close() */	113	synchronize_threads(); /* test_kill_sk() */
114	if (sk > 0)	114	if (sk > 0)
115	close(sk);	115	test_kill_sk(sk);
116	}	116	}
117		117
118	static void server_add_routes(void)	118	static void server_add_routes(void)
@@ -302,10 +302,10 @@ static void try_connect(const char *tst_name, unsigned int port, · 183 unmodified lines
302	test_ok("%s: connected", tst_name);	302	test_ok("%s: connected", tst_name);
303		303
304	out:	304	out:
305	synchronize_threads(); /* close() */	305	synchronize_threads(); /* test_kill_sk() */
306	/* _test_connect_socket() cleans up on failure */	306	/* _test_connect_socket() cleans up on failure */
307	if (ret > 0)	307	if (ret > 0)
308	close(sk);	308	test_kill_sk(sk);
309	}	309	}
310		310
311	#define PREINSTALL_MD5_FIRST BIT(0)	311	#define PREINSTALL_MD5_FIRST BIT(0)
@@ -486,10 +486,10 @@ static void try_to_add(const char *tst_name, unsigned int port, · 174 unmodified lines
486	}	486	}
487		487
488	out:	488	out:
489	synchronize_threads(); /* close() */	489	synchronize_threads(); /* test_kill_sk() */
490	/* _test_connect_socket() cleans up on failure */	490	/* _test_connect_socket() cleans up on failure */
491	if (ret > 0)	491	if (ret > 0)
492	close(sk);	492	test_kill_sk(sk);
493	}	493	}
494		494
495	static void client_add_ip(union tcp_addr client, const char ip)	495	static void client_add_ip(union tcp_addr client, const char ip)

tools/testing/selftests/net/udpgro_fwd.sh+12−2

 	for ns in $NS_SRC $NS_DST; do
 		ip netns add $ns
 		ip -n $ns link set dev lo up
+		# disable route solicitations to decrease 'noise' traffic
+		ip netns exec $ns sysctl -qw net.ipv6.conf.default.router_solicitations=0
+		ip netns exec $ns sysctl -qw net.ipv6.conf.all.router_solicitations=0
 	done
 	ip link add name veth$SRC type veth peer name veth$DST
 		create_vxlan_endpoint $BASE$ns veth$ns $BM_NET_V6$((3 - $ns)) vxlan6$ns 6
 		ip -n $BASE$ns addr add dev vxlan6$ns $OL_NET_V6$ns/24 nodad
 	done
+	# preload neighbur cache, do avoid some noisy traffic
+	local addr_dst=$(ip -j -n $BASE$DST link show dev vxlan6$DST  |jq -r '.[]["address"]')
+	local addr_src=$(ip -j -n $BASE$SRC link show dev vxlan6$SRC  |jq -r '.[]["address"]')
+	ip -n $BASE$DST neigh add dev vxlan6$DST lladdr $addr_src $OL_NET_V6$SRC
+	ip -n $BASE$SRC neigh add dev vxlan6$SRC lladdr $addr_dst $OL_NET_V6$DST
 }
 is_ipv6() {
 	# not enable GRO
 	ip netns exec $NS_DST $ipt -A INPUT -p udp --dport 4789
 	ip netns exec $NS_DST $ipt -A INPUT -p udp --dport 8000
-	ip netns exec $NS_DST ./udpgso_bench_rx -C 1000 -R 10 -n 10 -l 1300 $rx_args &
+	ip netns exec $NS_DST ./udpgso_bench_rx -C 2000 -R 100 -n 10 -l 1300 $rx_args &
 	local spid=$!
 	wait_local_port_listen "$NS_DST" 8000 udp
 	ip netns exec $NS_SRC ./udpgso_bench_tx $family -M 1 -s 13000 -S 1300 -D $dst
 	# bind the sender and the receiver to different CPUs to try
 	# get reproducible results
 	ip netns exec $NS_DST bash -c "echo 2 > /sys/class/net/veth$DST/queues/rx-0/rps_cpus"
-	ip netns exec $NS_DST taskset 0x2 ./udpgso_bench_rx -C 1000 -R 10  &
+	ip netns exec $NS_DST taskset 0x2 ./udpgso_bench_rx -C 2000 -R 100  &
 	local spid=$!
 	wait_local_port_listen "$NS_DST" 8000 udp
 	ip netns exec $NS_SRC taskset 0x1 ./udpgso_bench_tx $family -l 3 -S 1300 -D $dst

tools/testing/selftests/net/udpgso_bench_rx.c+1−1

@@ -375,7 +375,7 @@ static void do_recv(void) · 374 unmodified lines
375	do_flush_udp(fd);	375	do_flush_udp(fd);
376		376
377	tnow = gettimeofday_ms();	377	tnow = gettimeofday_ms();
378	if (tnow > treport) {	378	if (!cfg_expected_pkt_nr && tnow > treport) {
379	if (packets)	379	if (packets)
380	fprintf(stderr,	380	fprintf(stderr,
381	"%s rx: %6lu MB/s %8lu calls/s\n",	381	"%s rx: %6lu MB/s %8lu calls/s\n",

tools/testing/selftests/netfilter/conntrack_dump_flush.c+42−1

@@ -13,7 +13,7 @@ · 12 unmodified lines
13	#include "../kselftest_harness.h"	13	#include "../kselftest_harness.h"
14		14
15	#define TEST_ZONE_ID 123	15	#define TEST_ZONE_ID 123
16	#define CTA_FILTER_F_CTA_TUPLE_ZONE (1 << 2)	16	#define NF_CT_DEFAULT_ZONE_ID 0
17		17
18	static int reply_counter;	18	static int reply_counter;
19		19
@@ -336,6 +336,9 @@ FIXTURE_SETUP(conntrack_dump_flush) · 316 unmodified lines
336	ret = conntrack_data_generate_v4(self->sock, 0xf4f4f4f4, 0xf5f5f5f5,	336	ret = conntrack_data_generate_v4(self->sock, 0xf4f4f4f4, 0xf5f5f5f5,
337	TEST_ZONE_ID + 2);	337	TEST_ZONE_ID + 2);
338	EXPECT_EQ(ret, 0);	338	EXPECT_EQ(ret, 0);
		339	ret = conntrack_data_generate_v4(self->sock, 0xf6f6f6f6, 0xf7f7f7f7,
		340	NF_CT_DEFAULT_ZONE_ID);
		341	EXPECT_EQ(ret, 0);
339		342
340	src = (struct in6_addr) {{	343	src = (struct in6_addr) {{
341	.__u6_addr32 = {	344	.__u6_addr32 = {
@@ -395,6 +398,26 @@ FIXTURE_SETUP(conntrack_dump_flush) · 53 unmodified lines
395	TEST_ZONE_ID + 2);	398	TEST_ZONE_ID + 2);
396	EXPECT_EQ(ret, 0);	399	EXPECT_EQ(ret, 0);
397		400
		401	src = (struct in6_addr) {{
		402	.__u6_addr32 = {
		403	0xb80d0120,
		404	0x00000000,
		405	0x00000000,
		406	0x07000000
		407	}
		408	}};
		409	dst = (struct in6_addr) {{
		410	.__u6_addr32 = {
		411	0xb80d0120,
		412	0x00000000,
		413	0x00000000,
		414	0x08000000
		415	}
		416	}};
		417	ret = conntrack_data_generate_v6(self->sock, src, dst,
		418	NF_CT_DEFAULT_ZONE_ID);
		419	EXPECT_EQ(ret, 0);
		420
398	ret = conntracK_count_zone(self->sock, TEST_ZONE_ID);	421	ret = conntracK_count_zone(self->sock, TEST_ZONE_ID);
399	EXPECT_GE(ret, 2);	422	EXPECT_GE(ret, 2);
400	if (ret > 2)	423	if (ret > 2)
@@ -425,6 +448,24 @@ TEST_F(conntrack_dump_flush, test_flush_by_zone) · 24 unmodified lines
425	EXPECT_EQ(ret, 2);	448	EXPECT_EQ(ret, 2);
426	ret = conntracK_count_zone(self->sock, TEST_ZONE_ID + 2);	449	ret = conntracK_count_zone(self->sock, TEST_ZONE_ID + 2);
427	EXPECT_EQ(ret, 2);	450	EXPECT_EQ(ret, 2);
		451	ret = conntracK_count_zone(self->sock, NF_CT_DEFAULT_ZONE_ID);
		452	EXPECT_EQ(ret, 2);
		453	}
		454
		455	TEST_F(conntrack_dump_flush, test_flush_by_zone_default)
		456	{
		457	int ret;
		458
		459	ret = conntrack_flush_zone(self->sock, NF_CT_DEFAULT_ZONE_ID);
		460	EXPECT_EQ(ret, 0);
		461	ret = conntracK_count_zone(self->sock, TEST_ZONE_ID);
		462	EXPECT_EQ(ret, 2);
		463	ret = conntracK_count_zone(self->sock, TEST_ZONE_ID + 1);
		464	EXPECT_EQ(ret, 2);
		465	ret = conntracK_count_zone(self->sock, TEST_ZONE_ID + 2);
		466	EXPECT_EQ(ret, 2);
		467	ret = conntracK_count_zone(self->sock, NF_CT_DEFAULT_ZONE_ID);
		468	EXPECT_EQ(ret, 0);
428	}	469	}
429		470
430	TEST_HARNESS_MAIN	471	TEST_HARNESS_MAIN

@@ -448,17 +448,17 @@ Function-specific configfs interface · 447 unmodified lines
448	The function name to use when creating the function directory is "ncm".	448	The function name to use when creating the function directory is "ncm".
449	The NCM function provides these attributes in its function directory:	449	The NCM function provides these attributes in its function directory:
450		450
451	=============== ==================================================	451	======================= ==================================================
452	ifname network device interface name associated with this	452	ifname network device interface name associated with this
453	function instance	453	function instance
454	qmult queue length multiplier for high and super speed	454	qmult queue length multiplier for high and super speed
455	host_addr MAC address of host's end of this	455	host_addr MAC address of host's end of this
456	Ethernet over USB link	456	Ethernet over USB link
457	dev_addr MAC address of device's end of this	457	dev_addr MAC address of device's end of this
458	Ethernet over USB link	458	Ethernet over USB link
459	max_segment_size Segment size required for P2P connections. This	459	max_segment_size Segment size required for P2P connections. This
460	will set MTU to (max_segment_size - 14 bytes)	460	will set MTU to 14 bytes
461	=============== ==================================================	461	======================= ==================================================
462		462
463	and after creating the functions/ncm.<instance name> they contain default	463	and after creating the functions/ncm.<instance name> they contain default
464	values: qmult is 5, dev_addr and host_addr are randomly selected.	464	values: qmult is 5, dev_addr and host_addr are randomly selected.

@@ -40,18 +40,18 @@ · 39 unmodified lines
40	*/	40	*/
41		41
42	#define GUC_HXG_MSG_MIN_LEN 1u	42	#define GUC_HXG_MSG_MIN_LEN 1u
43	#define GUC_HXG_MSG_0_ORIGIN (0x1 << 31)	43	#define GUC_HXG_MSG_0_ORIGIN (0x1u << 31)
44	#define GUC_HXG_ORIGIN_HOST 0u	44	#define GUC_HXG_ORIGIN_HOST 0u
45	#define GUC_HXG_ORIGIN_GUC 1u	45	#define GUC_HXG_ORIGIN_GUC 1u
46	#define GUC_HXG_MSG_0_TYPE (0x7 << 28)	46	#define GUC_HXG_MSG_0_TYPE (0x7u << 28)
47	#define GUC_HXG_TYPE_REQUEST 0u	47	#define GUC_HXG_TYPE_REQUEST 0u
48	#define GUC_HXG_TYPE_EVENT 1u	48	#define GUC_HXG_TYPE_EVENT 1u
49	#define GUC_HXG_TYPE_NO_RESPONSE_BUSY 3u	49	#define GUC_HXG_TYPE_NO_RESPONSE_BUSY 3u
50	#define GUC_HXG_TYPE_NO_RESPONSE_RETRY 5u	50	#define GUC_HXG_TYPE_NO_RESPONSE_RETRY 5u
51	#define GUC_HXG_TYPE_RESPONSE_FAILURE 6u	51	#define GUC_HXG_TYPE_RESPONSE_FAILURE 6u
52	#define GUC_HXG_TYPE_RESPONSE_SUCCESS 7u	52	#define GUC_HXG_TYPE_RESPONSE_SUCCESS 7u
53	#define GUC_HXG_MSG_0_AUX (0xfffffff << 0)	53	#define GUC_HXG_MSG_0_AUX (0xfffffffu << 0)
54	#define GUC_HXG_MSG_n_PAYLOAD (0xffffffff << 0)	54	#define GUC_HXG_MSG_n_PAYLOAD (0xffffffffu << 0)
55		55
56	/**	56	/**
57	* DOC: HXG Request	57	* DOC: HXG Request
@@ -85,8 +85,8 @@ · 27 unmodified lines
85	*/	85	*/
86		86
87	#define GUC_HXG_REQUEST_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN	87	#define GUC_HXG_REQUEST_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN
88	#define GUC_HXG_REQUEST_MSG_0_DATA0 (0xfff << 16)	88	#define GUC_HXG_REQUEST_MSG_0_DATA0 (0xfffu << 16)
89	#define GUC_HXG_REQUEST_MSG_0_ACTION (0xffff << 0)	89	#define GUC_HXG_REQUEST_MSG_0_ACTION (0xffffu << 0)
90	#define GUC_HXG_REQUEST_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD	90	#define GUC_HXG_REQUEST_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD
91		91
92	/**	92	/**
@@ -117,8 +117,8 @@ · 24 unmodified lines
117	*/	117	*/
118		118
119	#define GUC_HXG_EVENT_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN	119	#define GUC_HXG_EVENT_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN
120	#define GUC_HXG_EVENT_MSG_0_DATA0 (0xfff << 16)	120	#define GUC_HXG_EVENT_MSG_0_DATA0 (0xfffu << 16)
121	#define GUC_HXG_EVENT_MSG_0_ACTION (0xffff << 0)	121	#define GUC_HXG_EVENT_MSG_0_ACTION (0xffffu << 0)
122	#define GUC_HXG_EVENT_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD	122	#define GUC_HXG_EVENT_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD
123		123
124	/**	124	/**
@@ -188,8 +188,8 @@ · 63 unmodified lines
188	*/	188	*/
189		189
190	#define GUC_HXG_FAILURE_MSG_LEN GUC_HXG_MSG_MIN_LEN	190	#define GUC_HXG_FAILURE_MSG_LEN GUC_HXG_MSG_MIN_LEN
191	#define GUC_HXG_FAILURE_MSG_0_HINT (0xfff << 16)	191	#define GUC_HXG_FAILURE_MSG_0_HINT (0xfffu << 16)
192	#define GUC_HXG_FAILURE_MSG_0_ERROR (0xffff << 0)	192	#define GUC_HXG_FAILURE_MSG_0_ERROR (0xffffu << 0)
193		193
194	/**	194	/**
195	* DOC: HXG Response	195	* DOC: HXG Response