Pull ARM SoC fixes from Arnd Bergmann: "Lots of small fixes for Arm SoCs this time, nothing too worrying: - omap/beaglebone boot regression fix in gpt12 timer - revert for i.mx8 soc driver breaking as a platform_driver - kexec/kdump fixes for op-tee - various fixes for incorrect DT settings on imx, mvebu, omap, stm32, and tegra causing problems. - device tree fixes for static checks in nomadik, versatile, stm32 - code fixes for issues found in build testing and with static checking on tegra, ixp4xx, imx, omap" * tag 'soc-fixes-5.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (36 commits) soc: ixp4xx/qmgr: fix invalid __iomem access soc: ixp4xx: fix printing resources ARM: ixp4xx: goramo_mlr depends on old PCI driver ARM: ixp4xx: fix compile-testing soc drivers soc/tegra: Make regulator couplers depend on CONFIG_REGULATOR ARM: dts: nomadik: Fix up interrupt controller node names ARM: dts: stm32: Fix touchscreen IRQ line assignment on DHCOM ARM: dts: stm32: Disable LAN8710 EDPD on DHCOM ARM: dts: stm32: Prefer HW RTC on DHCOM SoM omap5-board-common: remove not physically existing vdds_1v8_main fixed-regulator ARM: dts: am437x-l4: fix typo in can@0 node ARM: dts: am43x-epos-evm: Reduce i2c0 bus speed for tps65218 bus: ti-sysc: AM3: RNG is GP only ARM: omap2+: hwmod: fix potential NULL pointer access arm64: dts: armada-3720-turris-mox: remove mrvl,i2c-fast-mode arm64: dts: armada-3720-turris-mox: fixed indices for the SDHC controllers ARM: dts: imx: Swap M53Menlo pinctrl_power_button/pinctrl_power_out pins ARM: imx: fix missing 3rd argument in macro imx_mmdc_perf_init ARM: dts: colibri-imx6ull: limit SDIO clock to 25MHz arm64: dts: ls1028: sl28: fix networking for variant 2 ...
Unified · Split
| @@ -1595,7 +1595,7 @@ · 1594 unmodified lines | |||
| 1595 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; | 1595 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; |
| 1596 | reg = <0x0 0x2000>; | 1596 | reg = <0x0 0x2000>; |
| 1597 | clocks = <&dcan1_fck>; | 1597 | clocks = <&dcan1_fck>; |
| 1598 | clock-name = "fck"; | 1598 | clock-names = "fck"; |
| 1599 | syscon-raminit = <&scm_conf 0x644 1>; | 1599 | syscon-raminit = <&scm_conf 0x644 1>; |
| 1600 | interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; | 1600 | interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; |
| 1601 | status = "disabled"; | 1601 | status = "disabled"; |
| @@ -582,7 +582,7 @@ · 581 unmodified lines | |||
| 582 | status = "okay"; | 582 | status = "okay"; |
| 583 | pinctrl-names = "default"; | 583 | pinctrl-names = "default"; |
| 584 | pinctrl-0 = <&i2c0_pins>; | 584 | pinctrl-0 = <&i2c0_pins>; |
| 585 | clock-frequency = <400000>; | 585 | clock-frequency = <100000>; |
| 586 | 586 | ||
| 587 | tps65218: tps65218@24 { | 587 | tps65218: tps65218@24 { |
| 588 | reg = <0x24>; | 588 | reg = <0x24>; |
| @@ -388,13 +388,13 @@ · 387 unmodified lines | |||
| 388 | 388 | ||
| 389 | pinctrl_power_button: powerbutgrp { | 389 | pinctrl_power_button: powerbutgrp { |
| 390 | fsl,pins = < | 390 | fsl,pins = < |
| 391 | MX53_PAD_SD2_DATA2__GPIO1_13 0x1e4 | 391 | MX53_PAD_SD2_DATA0__GPIO1_15 0x1e4 |
| 392 | >; | 392 | >; |
| 393 | }; | 393 | }; |
| 394 | 394 | ||
| 395 | pinctrl_power_out: poweroutgrp { | 395 | pinctrl_power_out: poweroutgrp { |
| 396 | fsl,pins = < | 396 | fsl,pins = < |
| 397 | MX53_PAD_SD2_DATA0__GPIO1_15 0x1e4 | 397 | MX53_PAD_SD2_DATA2__GPIO1_13 0x1e4 |
| 398 | >; | 398 | >; |
| 399 | }; | 399 | }; |
| 400 | 400 | ||
| @@ -54,7 +54,13 @@ · 53 unmodified lines | |||
| 54 | pinctrl-names = "default"; | 54 | pinctrl-names = "default"; |
| 55 | pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; | 55 | pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; |
| 56 | phy-mode = "rgmii-id"; | 56 | phy-mode = "rgmii-id"; |
| 57 | phy-reset-duration = <2>; | 57 | |
| 58 | /* | ||
| 59 | * The PHY seems to require a long-enough reset duration to avoid | ||
| 60 | * some rare issues where the PHY gets stuck in an inconsistent and | ||
| 61 | * non-functional state at boot-up. 10ms proved to be fine . | ||
| 62 | */ | ||
| 63 | phy-reset-duration = <10>; | ||
| 58 | phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; | 64 | phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; |
| 59 | status = "okay"; | 65 | status = "okay"; |
| 60 | 66 | ||
| @@ -43,6 +43,7 @@ · 42 unmodified lines | |||
| 43 | assigned-clock-rates = <0>, <198000000>; | 43 | assigned-clock-rates = <0>, <198000000>; |
| 44 | cap-power-off-card; | 44 | cap-power-off-card; |
| 45 | keep-power-in-suspend; | 45 | keep-power-in-suspend; |
| 46 | max-frequency = <25000000>; | ||
| 46 | mmc-pwrseq = <&wifi_pwrseq>; | 47 | mmc-pwrseq = <&wifi_pwrseq>; |
| 47 | no-1-8-v; | 48 | no-1-8-v; |
| 48 | non-removable; | 49 | non-removable; |
| @@ -30,14 +30,6 @@ · 29 unmodified lines | |||
| 30 | regulator-max-microvolt = <5000000>; | 30 | regulator-max-microvolt = <5000000>; |
| 31 | }; | 31 | }; |
| 32 | 32 | ||
| 33 | vdds_1v8_main: fixedregulator-vdds_1v8_main { | ||
| 34 | compatible = "regulator-fixed"; | ||
| 35 | regulator-name = "vdds_1v8_main"; | ||
| 36 | vin-supply = <&smps7_reg>; | ||
| 37 | regulator-min-microvolt = <1800000>; | ||
| 38 | regulator-max-microvolt = <1800000>; | ||
| 39 | }; | ||
| 40 | |||
| 41 | vmmcsd_fixed: fixedregulator-mmcsd { | 33 | vmmcsd_fixed: fixedregulator-mmcsd { |
| 42 | compatible = "regulator-fixed"; | 34 | compatible = "regulator-fixed"; |
| 43 | regulator-name = "vmmcsd_fixed"; | 35 | regulator-name = "vmmcsd_fixed"; |
| @@ -487,6 +479,7 @@ · 443 unmodified lines | |||
| 487 | regulator-boot-on; | 479 | regulator-boot-on; |
| 488 | }; | 480 | }; |
| 489 | 481 | ||
| 482 | vdds_1v8_main: | ||
| 490 | smps7_reg: smps7 { | 483 | smps7_reg: smps7 { |
| 491 | /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */ | 484 | /* VDDS_1v8_OMAP over VDDS_1v8_MAIN */ |
| 492 | regulator-name = "smps7"; | 485 | regulator-name = "smps7"; |
| @@ -755,14 +755,14 @@ · 754 unmodified lines | |||
| 755 | status = "disabled"; | 755 | status = "disabled"; |
| 756 | }; | 756 | }; |
| 757 | 757 | ||
| 758 | vica: intc@10140000 { | 758 | vica: interrupt-controller@10140000 { |
| 759 | compatible = "arm,versatile-vic"; | 759 | compatible = "arm,versatile-vic"; |
| 760 | interrupt-controller; | 760 | interrupt-controller; |
| 761 | #interrupt-cells = <1>; | 761 | #interrupt-cells = <1>; |
| 762 | reg = <0x10140000 0x20>; | 762 | reg = <0x10140000 0x20>; |
| 763 | }; | 763 | }; |
| 764 | 764 | ||
| 765 | vicb: intc@10140020 { | 765 | vicb: interrupt-controller@10140020 { |
| 766 | compatible = "arm,versatile-vic"; | 766 | compatible = "arm,versatile-vic"; |
| 767 | interrupt-controller; | 767 | interrupt-controller; |
| 768 | #interrupt-cells = <1>; | 768 | #interrupt-cells = <1>; |
| @@ -37,7 +37,7 @@ · 36 unmodified lines | |||
| 37 | poll-interval = <20>; | 37 | poll-interval = <20>; |
| 38 | 38 | ||
| 39 | /* | 39 | /* |
| 40 | * The EXTi IRQ line 3 is shared with touchscreen and ethernet, | 40 | * The EXTi IRQ line 3 is shared with ethernet, |
| 41 | * so mark this as polled GPIO key. | 41 | * so mark this as polled GPIO key. |
| 42 | */ | 42 | */ |
| 43 | button-0 { | 43 | button-0 { |
| @@ -46,6 +46,16 @@ · 2 unmodified lines | |||
| 46 | gpios = <&gpiof 3 GPIO_ACTIVE_LOW>; | 46 | gpios = <&gpiof 3 GPIO_ACTIVE_LOW>; |
| 47 | }; | 47 | }; |
| 48 | 48 | ||
| 49 | /* | ||
| 50 | * The EXTi IRQ line 6 is shared with touchscreen, | ||
| 51 | * so mark this as polled GPIO key. | ||
| 52 | */ | ||
| 53 | button-1 { | ||
| 54 | label = "TA2-GPIO-B"; | ||
| 55 | linux,code = <KEY_B>; | ||
| 56 | gpios = <&gpiod 6 GPIO_ACTIVE_LOW>; | ||
| 57 | }; | ||
| 58 | |||
| 49 | /* | 59 | /* |
| 50 | * The EXTi IRQ line 0 is shared with PMIC, | 60 | * The EXTi IRQ line 0 is shared with PMIC, |
| 51 | * so mark this as polled GPIO key. | 61 | * so mark this as polled GPIO key. |
| @@ -60,13 +70,6 @@ · 8 unmodified lines | |||
| 60 | gpio-keys { | 70 | gpio-keys { |
| 61 | compatible = "gpio-keys"; | 71 | compatible = "gpio-keys"; |
| 62 | 72 | ||
| 63 | button-1 { | ||
| 64 | label = "TA2-GPIO-B"; | ||
| 65 | linux,code = <KEY_B>; | ||
| 66 | gpios = <&gpiod 6 GPIO_ACTIVE_LOW>; | ||
| 67 | wakeup-source; | ||
| 68 | }; | ||
| 69 | |||
| 70 | button-3 { | 73 | button-3 { |
| 71 | label = "TA4-GPIO-D"; | 74 | label = "TA4-GPIO-D"; |
| 72 | linux,code = <KEY_D>; | 75 | linux,code = <KEY_D>; |
| @@ -82,6 +85,7 @@ · 9 unmodified lines | |||
| 82 | label = "green:led5"; | 85 | label = "green:led5"; |
| 83 | gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>; | 86 | gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>; |
| 84 | default-state = "off"; | 87 | default-state = "off"; |
| 88 | status = "disabled"; | ||
| 85 | }; | 89 | }; |
| 86 | 90 | ||
| 87 | led-1 { | 91 | led-1 { |
| @@ -185,8 +189,8 @@ · 97 unmodified lines | |||
| 185 | touchscreen@38 { | 189 | touchscreen@38 { |
| 186 | compatible = "edt,edt-ft5406"; | 190 | compatible = "edt,edt-ft5406"; |
| 187 | reg = <0x38>; | 191 | reg = <0x38>; |
| 188 | interrupt-parent = <&gpiog>; | 192 | interrupt-parent = <&gpioc>; |
| 189 | interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ | 193 | interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ |
| 190 | }; | 194 | }; |
| 191 | }; | 195 | }; |
| 192 | 196 | ||
| @@ -12,6 +12,8 @@ · 11 unmodified lines | |||
| 12 | aliases { | 12 | aliases { |
| 13 | ethernet0 = ðernet0; | 13 | ethernet0 = ðernet0; |
| 14 | ethernet1 = &ksz8851; | 14 | ethernet1 = &ksz8851; |
| 15 | rtc0 = &hwrtc; | ||
| 16 | rtc1 = &rtc; | ||
| 15 | }; | 17 | }; |
| 16 | 18 | ||
| 17 | memory@c0000000 { | 19 | memory@c0000000 { |
| @@ -138,6 +140,7 @@ · 120 unmodified lines | |||
| 138 | reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; | 140 | reset-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; |
| 139 | reset-assert-us = <500>; | 141 | reset-assert-us = <500>; |
| 140 | reset-deassert-us = <500>; | 142 | reset-deassert-us = <500>; |
| 143 | smsc,disable-energy-detect; | ||
| 141 | interrupt-parent = <&gpioi>; | 144 | interrupt-parent = <&gpioi>; |
| 142 | interrupts = <11 IRQ_TYPE_LEVEL_LOW>; | 145 | interrupts = <11 IRQ_TYPE_LEVEL_LOW>; |
| 143 | }; | 146 | }; |
| @@ -248,7 +251,7 @@ · 104 unmodified lines | |||
| 248 | /delete-property/dmas; | 251 | /delete-property/dmas; |
| 249 | /delete-property/dma-names; | 252 | /delete-property/dma-names; |
| 250 | 253 | ||
| 251 | rtc@32 { | 254 | hwrtc: rtc@32 { |
| 252 | compatible = "microcrystal,rv8803"; | 255 | compatible = "microcrystal,rv8803"; |
| 253 | reg = <0x32>; | 256 | reg = <0x32>; |
| 254 | }; | 257 | }; |
| @@ -68,7 +68,6 @@ void imx_set_cpu_arg(int cpu, u32 arg); · 67 unmodified lines | |||
| 68 | void v7_secondary_startup(void); | 68 | void v7_secondary_startup(void); |
| 69 | void imx_scu_map_io(void); | 69 | void imx_scu_map_io(void); |
| 70 | void imx_smp_prepare(void); | 70 | void imx_smp_prepare(void); |
| 71 | void imx_gpcv2_set_core1_pdn_pup_by_software(bool pdn); | ||
| 72 | #else | 71 | #else |
| 73 | static inline void imx_scu_map_io(void) {} | 72 | static inline void imx_scu_map_io(void) {} |
| 74 | static inline void imx_smp_prepare(void) {} | 73 | static inline void imx_smp_prepare(void) {} |
| @@ -81,6 +80,7 @@ void imx_gpc_mask_all(void); · 6 unmodified lines | |||
| 81 | void imx_gpc_restore_all(void); | 80 | void imx_gpc_restore_all(void); |
| 82 | void imx_gpc_hwirq_mask(unsigned int hwirq); | 81 | void imx_gpc_hwirq_mask(unsigned int hwirq); |
| 83 | void imx_gpc_hwirq_unmask(unsigned int hwirq); | 82 | void imx_gpc_hwirq_unmask(unsigned int hwirq); |
| 83 | void imx_gpcv2_set_core1_pdn_pup_by_software(bool pdn); | ||
| 84 | void imx_anatop_init(void); | 84 | void imx_anatop_init(void); |
| 85 | void imx_anatop_pre_suspend(void); | 85 | void imx_anatop_pre_suspend(void); |
| 86 | void imx_anatop_post_resume(void); | 86 | void imx_anatop_post_resume(void); |
| @@ -103,6 +103,7 @@ struct mmdc_pmu { · 102 unmodified lines | |||
| 103 | struct perf_event *mmdc_events[MMDC_NUM_COUNTERS]; | 103 | struct perf_event *mmdc_events[MMDC_NUM_COUNTERS]; |
| 104 | struct hlist_node node; | 104 | struct hlist_node node; |
| 105 | struct fsl_mmdc_devtype_data *devtype_data; | 105 | struct fsl_mmdc_devtype_data *devtype_data; |
| 106 | struct clk *mmdc_ipg_clk; | ||
| 106 | }; | 107 | }; |
| 107 | 108 | ||
| 108 | /* | 109 | /* |
| @@ -462,11 +463,14 @@ static int imx_mmdc_remove(struct platform_device *pdev) · 353 unmodified lines | |||
| 462 | 463 | ||
| 463 | cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node); | 464 | cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node); |
| 464 | perf_pmu_unregister(&pmu_mmdc->pmu); | 465 | perf_pmu_unregister(&pmu_mmdc->pmu); |
| 466 | iounmap(pmu_mmdc->mmdc_base); | ||
| 467 | clk_disable_unprepare(pmu_mmdc->mmdc_ipg_clk); | ||
| 465 | kfree(pmu_mmdc); | 468 | kfree(pmu_mmdc); |
| 466 | return 0; | 469 | return 0; |
| 467 | } | 470 | } |
| 468 | 471 | ||
| 469 | static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_base) | 472 | static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_base, |
| 473 | struct clk *mmdc_ipg_clk) | ||
| 470 | { | 474 | { |
| 471 | struct mmdc_pmu *pmu_mmdc; | 475 | struct mmdc_pmu *pmu_mmdc; |
| 472 | char *name; | 476 | char *name; |
| @@ -494,6 +498,7 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b · 21 unmodified lines | |||
| 494 | } | 498 | } |
| 495 | 499 | ||
| 496 | mmdc_num = mmdc_pmu_init(pmu_mmdc, mmdc_base, &pdev->dev); | 500 | mmdc_num = mmdc_pmu_init(pmu_mmdc, mmdc_base, &pdev->dev); |
| 501 | pmu_mmdc->mmdc_ipg_clk = mmdc_ipg_clk; | ||
| 497 | if (mmdc_num == 0) | 502 | if (mmdc_num == 0) |
| 498 | name = "mmdc"; | 503 | name = "mmdc"; |
| 499 | else | 504 | else |
| @@ -529,7 +534,7 @@ pmu_free: · 29 unmodified lines | |||
| 529 | 534 | ||
| 530 | #else | 535 | #else |
| 531 | #define imx_mmdc_remove NULL | 536 | #define imx_mmdc_remove NULL |
| 532 | #define imx_mmdc_perf_init(pdev, mmdc_base) 0 | 537 | #define imx_mmdc_perf_init(pdev, mmdc_base, mmdc_ipg_clk) 0 |
| 533 | #endif | 538 | #endif |
| 534 | 539 | ||
| 535 | static int imx_mmdc_probe(struct platform_device *pdev) | 540 | static int imx_mmdc_probe(struct platform_device *pdev) |
| @@ -567,7 +572,13 @@ static int imx_mmdc_probe(struct platform_device *pdev) · 31 unmodified lines | |||
| 567 | val &= ~(1 << BP_MMDC_MAPSR_PSD); | 572 | val &= ~(1 << BP_MMDC_MAPSR_PSD); |
| 568 | writel_relaxed(val, reg); | 573 | writel_relaxed(val, reg); |
| 569 | 574 | ||
| 570 | return imx_mmdc_perf_init(pdev, mmdc_base); | 575 | err = imx_mmdc_perf_init(pdev, mmdc_base, mmdc_ipg_clk); |
| 576 | if (err) { | ||
| 577 | iounmap(mmdc_base); | ||
| 578 | clk_disable_unprepare(mmdc_ipg_clk); | ||
| 579 | } | ||
| 580 | |||
| 581 | return err; | ||
| 571 | } | 582 | } |
| 572 | 583 | ||
| 573 | int imx_mmdc_get_ddr_type(void) | 584 | int imx_mmdc_get_ddr_type(void) |
| @@ -91,6 +91,7 @@ config MACH_IXDP465 · 90 unmodified lines | |||
| 91 | 91 | ||
| 92 | config MACH_GORAMO_MLR | 92 | config MACH_GORAMO_MLR |
| 93 | bool "GORAMO Multi Link Router" | 93 | bool "GORAMO Multi Link Router" |
| 94 | depends on IXP4XX_PCI_LEGACY | ||
| 94 | help | 95 | help |
| 95 | Say 'Y' here if you want your kernel to support GORAMO | 96 | Say 'Y' here if you want your kernel to support GORAMO |
| 96 | MultiLink router. | 97 | MultiLink router. |
| @@ -3776,6 +3776,7 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) · 3775 unmodified lines | |||
| 3776 | struct omap_hwmod_ocp_if *oi; | 3776 | struct omap_hwmod_ocp_if *oi; |
| 3777 | struct clockdomain *clkdm; | 3777 | struct clockdomain *clkdm; |
| 3778 | struct clk_hw_omap *clk; | 3778 | struct clk_hw_omap *clk; |
| 3779 | struct clk_hw *hw; | ||
| 3779 | 3780 | ||
| 3780 | if (!oh) | 3781 | if (!oh) |
| 3781 | return NULL; | 3782 | return NULL; |
| @@ -3792,7 +3793,14 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) · 10 unmodified lines | |||
| 3792 | c = oi->_clk; | 3793 | c = oi->_clk; |
| 3793 | } | 3794 | } |
| 3794 | 3795 | ||
| 3795 | clk = to_clk_hw_omap(__clk_get_hw(c)); | 3796 | hw = __clk_get_hw(c); |
| 3797 | if (!hw) | ||
| 3798 | return NULL; | ||
| 3799 | |||
| 3800 | clk = to_clk_hw_omap(hw); | ||
| 3801 | if (!clk) | ||
| 3802 | return NULL; | ||
| 3803 | |||
| 3796 | clkdm = clk->clkdm; | 3804 | clkdm = clk->clkdm; |
| 3797 | if (!clkdm) | 3805 | if (!clkdm) |
| 3798 | return NULL; | 3806 | return NULL; |
| @@ -54,6 +54,7 @@ · 53 unmodified lines | |||
| 54 | 54 | ||
| 55 | &mscc_felix_port0 { | 55 | &mscc_felix_port0 { |
| 56 | label = "swp0"; | 56 | label = "swp0"; |
| 57 | managed = "in-band-status"; | ||
| 57 | phy-handle = <&phy0>; | 58 | phy-handle = <&phy0>; |
| 58 | phy-mode = "sgmii"; | 59 | phy-mode = "sgmii"; |
| 59 | status = "okay"; | 60 | status = "okay"; |
| @@ -61,6 +62,7 @@ · 1 unmodified line | |||
| 61 | 62 | ||
| 62 | &mscc_felix_port1 { | 63 | &mscc_felix_port1 { |
| 63 | label = "swp1"; | 64 | label = "swp1"; |
| 65 | managed = "in-band-status"; | ||
| 64 | phy-handle = <&phy1>; | 66 | phy-handle = <&phy1>; |
| 65 | phy-mode = "sgmii"; | 67 | phy-mode = "sgmii"; |
| 66 | status = "okay"; | 68 | status = "okay"; |
| @@ -66,7 +66,7 @@ · 65 unmodified lines | |||
| 66 | }; | 66 | }; |
| 67 | }; | 67 | }; |
| 68 | 68 | ||
| 69 | sysclk: clock-sysclk { | 69 | sysclk: sysclk { |
| 70 | compatible = "fixed-clock"; | 70 | compatible = "fixed-clock"; |
| 71 | #clock-cells = <0>; | 71 | #clock-cells = <0>; |
| 72 | clock-frequency = <100000000>; | 72 | clock-frequency = <100000000>; |
| @@ -19,6 +19,8 @@ · 18 unmodified lines | |||
| 19 | aliases { | 19 | aliases { |
| 20 | spi0 = &spi0; | 20 | spi0 = &spi0; |
| 21 | ethernet1 = ð1; | 21 | ethernet1 = ð1; |
| 22 | mmc0 = &sdhci0; | ||
| 23 | mmc1 = &sdhci1; | ||
| 22 | }; | 24 | }; |
| 23 | 25 | ||
| 24 | chosen { | 26 | chosen { |
| @@ -119,6 +121,7 @@ · 94 unmodified lines | |||
| 119 | pinctrl-names = "default"; | 121 | pinctrl-names = "default"; |
| 120 | pinctrl-0 = <&i2c1_pins>; | 122 | pinctrl-0 = <&i2c1_pins>; |
| 121 | clock-frequency = <100000>; | 123 | clock-frequency = <100000>; |
| 124 | /delete-property/ mrvl,i2c-fast-mode; | ||
| 122 | status = "okay"; | 125 | status = "okay"; |
| 123 | 126 | ||
| 124 | rtc@6f { | 127 | rtc@6f { |
| @@ -1840,7 +1840,11 @@ · 1839 unmodified lines | |||
| 1840 | 1840 | ||
| 1841 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE1R &emc>, | 1841 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE1R &emc>, |
| 1842 | <&mc TEGRA194_MEMORY_CLIENT_PCIE1W &emc>; | 1842 | <&mc TEGRA194_MEMORY_CLIENT_PCIE1W &emc>; |
| 1843 | interconnect-names = "read", "write"; | 1843 | interconnect-names = "dma-mem", "write"; |
| 1844 | iommus = <&smmu TEGRA194_SID_PCIE1>; | ||
| 1845 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE1 0x1000>; | ||
| 1846 | iommu-map-mask = <0x0>; | ||
| 1847 | dma-coherent; | ||
| 1844 | }; | 1848 | }; |
| 1845 | 1849 | ||
| 1846 | pcie@14120000 { | 1850 | pcie@14120000 { |
| @@ -1890,7 +1894,11 @@ · 43 unmodified lines | |||
| 1890 | 1894 | ||
| 1891 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE2AR &emc>, | 1895 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE2AR &emc>, |
| 1892 | <&mc TEGRA194_MEMORY_CLIENT_PCIE2AW &emc>; | 1896 | <&mc TEGRA194_MEMORY_CLIENT_PCIE2AW &emc>; |
| 1893 | interconnect-names = "read", "write"; | 1897 | interconnect-names = "dma-mem", "write"; |
| 1898 | iommus = <&smmu TEGRA194_SID_PCIE2>; | ||
| 1899 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE2 0x1000>; | ||
| 1900 | iommu-map-mask = <0x0>; | ||
| 1901 | dma-coherent; | ||
| 1894 | }; | 1902 | }; |
| 1895 | 1903 | ||
| 1896 | pcie@14140000 { | 1904 | pcie@14140000 { |
| @@ -1940,7 +1948,11 @@ · 43 unmodified lines | |||
| 1940 | 1948 | ||
| 1941 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE3R &emc>, | 1949 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE3R &emc>, |
| 1942 | <&mc TEGRA194_MEMORY_CLIENT_PCIE3W &emc>; | 1950 | <&mc TEGRA194_MEMORY_CLIENT_PCIE3W &emc>; |
| 1943 | interconnect-names = "read", "write"; | 1951 | interconnect-names = "dma-mem", "write"; |
| 1952 | iommus = <&smmu TEGRA194_SID_PCIE3>; | ||
| 1953 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE3 0x1000>; | ||
| 1954 | iommu-map-mask = <0x0>; | ||
| 1955 | dma-coherent; | ||
| 1944 | }; | 1956 | }; |
| 1945 | 1957 | ||
| 1946 | pcie@14160000 { | 1958 | pcie@14160000 { |
| @@ -1990,7 +2002,11 @@ · 43 unmodified lines | |||
| 1990 | 2002 | ||
| 1991 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>, | 2003 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>, |
| 1992 | <&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>; | 2004 | <&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>; |
| 1993 | interconnect-names = "read", "write"; | 2005 | interconnect-names = "dma-mem", "write"; |
| 2006 | iommus = <&smmu TEGRA194_SID_PCIE4>; | ||
| 2007 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE4 0x1000>; | ||
| 2008 | iommu-map-mask = <0x0>; | ||
| 2009 | dma-coherent; | ||
| 1994 | }; | 2010 | }; |
| 1995 | 2011 | ||
| 1996 | pcie@14180000 { | 2012 | pcie@14180000 { |
| @@ -2040,7 +2056,11 @@ · 43 unmodified lines | |||
| 2040 | 2056 | ||
| 2041 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>, | 2057 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>, |
| 2042 | <&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>; | 2058 | <&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>; |
| 2043 | interconnect-names = "read", "write"; | 2059 | interconnect-names = "dma-mem", "write"; |
| 2060 | iommus = <&smmu TEGRA194_SID_PCIE0>; | ||
| 2061 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE0 0x1000>; | ||
| 2062 | iommu-map-mask = <0x0>; | ||
| 2063 | dma-coherent; | ||
| 2044 | }; | 2064 | }; |
| 2045 | 2065 | ||
| 2046 | pcie@141a0000 { | 2066 | pcie@141a0000 { |
| @@ -2094,7 +2114,11 @@ · 47 unmodified lines | |||
| 2094 | 2114 | ||
| 2095 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>, | 2115 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>, |
| 2096 | <&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>; | 2116 | <&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>; |
| 2097 | interconnect-names = "read", "write"; | 2117 | interconnect-names = "dma-mem", "write"; |
| 2118 | iommus = <&smmu TEGRA194_SID_PCIE5>; | ||
| 2119 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE5 0x1000>; | ||
| 2120 | iommu-map-mask = <0x0>; | ||
| 2121 | dma-coherent; | ||
| 2098 | }; | 2122 | }; |
| 2099 | 2123 | ||
| 2100 | pcie_ep@14160000 { | 2124 | pcie_ep@14160000 { |
| @@ -2127,6 +2151,14 @@ · 26 unmodified lines | |||
| 2127 | nvidia,aspm-cmrt-us = <60>; | 2151 | nvidia,aspm-cmrt-us = <60>; |
| 2128 | nvidia,aspm-pwr-on-t-us = <20>; | 2152 | nvidia,aspm-pwr-on-t-us = <20>; |
| 2129 | nvidia,aspm-l0s-entrance-latency-us = <3>; | 2153 | nvidia,aspm-l0s-entrance-latency-us = <3>; |
| 2154 | |||
| 2155 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>, | ||
| 2156 | <&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>; | ||
| 2157 | interconnect-names = "dma-mem", "write"; | ||
| 2158 | iommus = <&smmu TEGRA194_SID_PCIE4>; | ||
| 2159 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE4 0x1000>; | ||
| 2160 | iommu-map-mask = <0x0>; | ||
| 2161 | dma-coherent; | ||
| 2130 | }; | 2162 | }; |
| 2131 | 2163 | ||
| 2132 | pcie_ep@14180000 { | 2164 | pcie_ep@14180000 { |
| @@ -2159,6 +2191,14 @@ · 26 unmodified lines | |||
| 2159 | nvidia,aspm-cmrt-us = <60>; | 2191 | nvidia,aspm-cmrt-us = <60>; |
| 2160 | nvidia,aspm-pwr-on-t-us = <20>; | 2192 | nvidia,aspm-pwr-on-t-us = <20>; |
| 2161 | nvidia,aspm-l0s-entrance-latency-us = <3>; | 2193 | nvidia,aspm-l0s-entrance-latency-us = <3>; |
| 2194 | |||
| 2195 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>, | ||
| 2196 | <&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>; | ||
| 2197 | interconnect-names = "dma-mem", "write"; | ||
| 2198 | iommus = <&smmu TEGRA194_SID_PCIE0>; | ||
| 2199 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE0 0x1000>; | ||
| 2200 | iommu-map-mask = <0x0>; | ||
| 2201 | dma-coherent; | ||
| 2162 | }; | 2202 | }; |
| 2163 | 2203 | ||
| 2164 | pcie_ep@141a0000 { | 2204 | pcie_ep@141a0000 { |
| @@ -2194,6 +2234,14 @@ · 29 unmodified lines | |||
| 2194 | nvidia,aspm-cmrt-us = <60>; | 2234 | nvidia,aspm-cmrt-us = <60>; |
| 2195 | nvidia,aspm-pwr-on-t-us = <20>; | 2235 | nvidia,aspm-pwr-on-t-us = <20>; |
| 2196 | nvidia,aspm-l0s-entrance-latency-us = <3>; | 2236 | nvidia,aspm-l0s-entrance-latency-us = <3>; |
| 2237 | |||
| 2238 | interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>, | ||
| 2239 | <&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>; | ||
| 2240 | interconnect-names = "dma-mem", "write"; | ||
| 2241 | iommus = <&smmu TEGRA194_SID_PCIE5>; | ||
| 2242 | iommu-map = <0x0 &smmu TEGRA194_SID_PCIE5 0x1000>; | ||
| 2243 | iommu-map-mask = <0x0>; | ||
| 2244 | dma-coherent; | ||
| 2197 | }; | 2245 | }; |
| 2198 | 2246 | ||
| 2199 | sram@40000000 { | 2247 | sram@40000000 { |
| @@ -100,6 +100,7 @@ static const char * const clock_names[SYSC_MAX_CLOCKS] = { · 99 unmodified lines | |||
| 100 | * @cookie: data used by legacy platform callbacks | 100 | * @cookie: data used by legacy platform callbacks |
| 101 | * @name: name if available | 101 | * @name: name if available |
| 102 | * @revision: interconnect target module revision | 102 | * @revision: interconnect target module revision |
| 103 | * @reserved: target module is reserved and already in use | ||
| 103 | * @enabled: sysc runtime enabled status | 104 | * @enabled: sysc runtime enabled status |
| 104 | * @needs_resume: runtime resume needed on resume from suspend | 105 | * @needs_resume: runtime resume needed on resume from suspend |
| 105 | * @child_needs_resume: runtime resume needed for child on resume from suspend | 106 | * @child_needs_resume: runtime resume needed for child on resume from suspend |
| @@ -130,6 +131,7 @@ struct sysc { · 24 unmodified lines | |||
| 130 | struct ti_sysc_cookie cookie; | 131 | struct ti_sysc_cookie cookie; |
| 131 | const char *name; | 132 | const char *name; |
| 132 | u32 revision; | 133 | u32 revision; |
| 134 | unsigned int reserved:1; | ||
| 133 | unsigned int enabled:1; | 135 | unsigned int enabled:1; |
| 134 | unsigned int needs_resume:1; | 136 | unsigned int needs_resume:1; |
| 135 | unsigned int child_needs_resume:1; | 137 | unsigned int child_needs_resume:1; |
| @@ -2951,6 +2953,8 @@ static int sysc_init_soc(struct sysc *ddata) · 2815 unmodified lines | |||
| 2951 | case SOC_3430 ... SOC_3630: | 2953 | case SOC_3430 ... SOC_3630: |
| 2952 | sysc_add_disabled(0x48304000); /* timer12 */ | 2954 | sysc_add_disabled(0x48304000); /* timer12 */ |
| 2953 | break; | 2955 | break; |
| 2956 | case SOC_AM3: | ||
| 2957 | sysc_add_disabled(0x48310000); /* rng */ | ||
| 2954 | default: | 2958 | default: |
| 2955 | break; | 2959 | break; |
| 2956 | } | 2960 | } |
| @@ -3093,8 +3097,8 @@ static int sysc_probe(struct platform_device *pdev) · 136 unmodified lines | |||
| 3093 | return error; | 3097 | return error; |
| 3094 | 3098 | ||
| 3095 | error = sysc_check_active_timer(ddata); | 3099 | error = sysc_check_active_timer(ddata); |
| 3096 | if (error) | 3100 | if (error == -EBUSY) |
| 3097 | return error; | 3101 | ddata->reserved = true; |
| 3098 | 3102 | ||
| 3099 | error = sysc_get_clocks(ddata); | 3103 | error = sysc_get_clocks(ddata); |
| 3100 | if (error) | 3104 | if (error) |
| @@ -3130,11 +3134,15 @@ static int sysc_probe(struct platform_device *pdev) · 29 unmodified lines | |||
| 3130 | sysc_show_registers(ddata); | 3134 | sysc_show_registers(ddata); |
| 3131 | 3135 | ||
| 3132 | ddata->dev->type = &sysc_device_type; | 3136 | ddata->dev->type = &sysc_device_type; |
| 3133 | error = of_platform_populate(ddata->dev->of_node, sysc_match_table, | 3137 | |
| 3134 | pdata ? pdata->auxdata : NULL, | 3138 | if (!ddata->reserved) { |
| 3135 | ddata->dev); | 3139 | error = of_platform_populate(ddata->dev->of_node, |
| 3136 | if (error) | 3140 | sysc_match_table, |
| 3137 | goto err; | 3141 | pdata ? pdata->auxdata : NULL, |
| 3142 | ddata->dev); | ||
| 3143 | if (error) | ||
| 3144 | goto err; | ||
| 3145 | } | ||
| 3138 | 3146 | ||
| 3139 | INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle); | 3147 | INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle); |
| 3140 | 3148 | ||
| @@ -254,11 +254,11 @@ static int ftpm_tee_probe(struct device *dev) · 253 unmodified lines | |||
| 254 | pvt_data->session = sess_arg.session; | 254 | pvt_data->session = sess_arg.session; |
| 255 | 255 | ||
| 256 | /* Allocate dynamic shared memory with fTPM TA */ | 256 | /* Allocate dynamic shared memory with fTPM TA */ |
| 257 | pvt_data->shm = tee_shm_alloc(pvt_data->ctx, | 257 | pvt_data->shm = tee_shm_alloc_kernel_buf(pvt_data->ctx, |
| 258 | MAX_COMMAND_SIZE + MAX_RESPONSE_SIZE, | 258 | MAX_COMMAND_SIZE + |
| 259 | TEE_SHM_MAPPED | TEE_SHM_DMA_BUF); | 259 | MAX_RESPONSE_SIZE); |
| 260 | if (IS_ERR(pvt_data->shm)) { | 260 | if (IS_ERR(pvt_data->shm)) { |
| 261 | dev_err(dev, "%s: tee_shm_alloc failed\n", __func__); | 261 | dev_err(dev, "%s: tee_shm_alloc_kernel_buf failed\n", __func__); |
| 262 | rc = -ENOMEM; | 262 | rc = -ENOMEM; |
| 263 | goto out_shm_alloc; | 263 | goto out_shm_alloc; |
| 264 | } | 264 | } |
| @@ -212,10 +212,9 @@ static int tee_bnxt_fw_probe(struct device *dev) · 211 unmodified lines | |||
| 212 | 212 | ||
| 213 | pvt_data.dev = dev; | 213 | pvt_data.dev = dev; |
| 214 | 214 | ||
| 215 | fw_shm_pool = tee_shm_alloc(pvt_data.ctx, MAX_SHM_MEM_SZ, | 215 | fw_shm_pool = tee_shm_alloc_kernel_buf(pvt_data.ctx, MAX_SHM_MEM_SZ); |
| 216 | TEE_SHM_MAPPED | TEE_SHM_DMA_BUF); | ||
| 217 | if (IS_ERR(fw_shm_pool)) { | 216 | if (IS_ERR(fw_shm_pool)) { |
| 218 | dev_err(pvt_data.dev, "tee_shm_alloc failed\n"); | 217 | dev_err(pvt_data.dev, "tee_shm_alloc_kernel_buf failed\n"); |
| 219 | err = PTR_ERR(fw_shm_pool); | 218 | err = PTR_ERR(fw_shm_pool); |
| 220 | goto out_sess; | 219 | goto out_sess; |
| 221 | } | 220 | } |
| @@ -242,6 +241,14 @@ static int tee_bnxt_fw_remove(struct device *dev) · 20 unmodified lines | |||
| 242 | return 0; | 241 | return 0; |
| 243 | } | 242 | } |
| 244 | 243 | ||
| 244 | static void tee_bnxt_fw_shutdown(struct device *dev) | ||
| 245 | { | ||
| 246 | tee_shm_free(pvt_data.fw_shm_pool); | ||
| 247 | tee_client_close_session(pvt_data.ctx, pvt_data.session_id); | ||
| 248 | tee_client_close_context(pvt_data.ctx); | ||
| 249 | pvt_data.ctx = NULL; | ||
| 250 | } | ||
| 251 | |||
| 245 | static const struct tee_client_device_id tee_bnxt_fw_id_table[] = { | 252 | static const struct tee_client_device_id tee_bnxt_fw_id_table[] = { |
| 246 | {UUID_INIT(0x6272636D, 0x2019, 0x0716, | 253 | {UUID_INIT(0x6272636D, 0x2019, 0x0716, |
| 247 | 0x42, 0x43, 0x4D, 0x5F, 0x53, 0x43, 0x48, 0x49)}, | 254 | 0x42, 0x43, 0x4D, 0x5F, 0x53, 0x43, 0x48, 0x49)}, |
| @@ -257,6 +264,7 @@ static struct tee_client_driver tee_bnxt_fw_driver = { · 9 unmodified lines | |||
| 257 | .bus = &tee_bus_type, | 264 | .bus = &tee_bus_type, |
| 258 | .probe = tee_bnxt_fw_probe, | 265 | .probe = tee_bnxt_fw_probe, |
| 259 | .remove = tee_bnxt_fw_remove, | 266 | .remove = tee_bnxt_fw_remove, |
| 267 | .shutdown = tee_bnxt_fw_shutdown, | ||
| 260 | }, | 268 | }, |
| 261 | }; | 269 | }; |
| 262 | 270 | ||
| @@ -13,7 +13,7 @@ obj-$(CONFIG_MACH_DOVE) += dove/ · 12 unmodified lines | |||
| 13 | obj-y += fsl/ | 13 | obj-y += fsl/ |
| 14 | obj-$(CONFIG_ARCH_GEMINI) += gemini/ | 14 | obj-$(CONFIG_ARCH_GEMINI) += gemini/ |
| 15 | obj-y += imx/ | 15 | obj-y += imx/ |
| 16 | obj-$(CONFIG_ARCH_IXP4XX) += ixp4xx/ | 16 | obj-y += ixp4xx/ |
| 17 | obj-$(CONFIG_SOC_XWAY) += lantiq/ | 17 | obj-$(CONFIG_SOC_XWAY) += lantiq/ |
| 18 | obj-$(CONFIG_LITEX_SOC_CONTROLLER) += litex/ | 18 | obj-$(CONFIG_LITEX_SOC_CONTROLLER) += litex/ |
| 19 | obj-y += mediatek/ | 19 | obj-y += mediatek/ |
| @@ -5,8 +5,6 @@ · 4 unmodified lines | |||
| 5 | 5 | ||
| 6 | #include <linux/init.h> | 6 | #include <linux/init.h> |
| 7 | #include <linux/io.h> | 7 | #include <linux/io.h> |
| 8 | #include <linux/module.h> | ||
| 9 | #include <linux/nvmem-consumer.h> | ||
| 10 | #include <linux/of_address.h> | 8 | #include <linux/of_address.h> |
| 11 | #include <linux/slab.h> | 9 | #include <linux/slab.h> |
| 12 | #include <linux/sys_soc.h> | 10 | #include <linux/sys_soc.h> |
| @@ -31,7 +29,7 @@ · 18 unmodified lines | |||
| 31 | 29 | ||
| 32 | struct imx8_soc_data { | 30 | struct imx8_soc_data { |
| 33 | char *name; | 31 | char *name; |
| 34 | u32 (*soc_revision)(struct device *dev); | 32 | u32 (*soc_revision)(void); |
| 35 | }; | 33 | }; |
| 36 | 34 | ||
| 37 | static u64 soc_uid; | 35 | static u64 soc_uid; |
| @@ -52,7 +50,7 @@ static u32 imx8mq_soc_revision_from_atf(void) · 14 unmodified lines | |||
| 52 | static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; }; | 50 | static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; }; |
| 53 | #endif | 51 | #endif |
| 54 | 52 | ||
| 55 | static u32 __init imx8mq_soc_revision(struct device *dev) | 53 | static u32 __init imx8mq_soc_revision(void) |
| 56 | { | 54 | { |
| 57 | struct device_node *np; | 55 | struct device_node *np; |
| 58 | void __iomem *ocotp_base; | 56 | void __iomem *ocotp_base; |
| @@ -77,20 +75,9 @@ static u32 __init imx8mq_soc_revision(struct device *dev) · 18 unmodified lines | |||
| 77 | rev = REV_B1; | 75 | rev = REV_B1; |
| 78 | } | 76 | } |
| 79 | 77 | ||
| 80 | if (dev) { | 78 | soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH); |
| 81 | int ret; | 79 | soc_uid <<= 32; |
| 82 | 80 | soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); | |
| 83 | ret = nvmem_cell_read_u64(dev, "soc_unique_id", &soc_uid); | ||
| 84 | if (ret) { | ||
| 85 | iounmap(ocotp_base); | ||
| 86 | of_node_put(np); | ||
| 87 | return ret; | ||
| 88 | } | ||
| 89 | } else { | ||
| 90 | soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH); | ||
| 91 | soc_uid <<= 32; | ||
| 92 | soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); | ||
| 93 | } | ||
| 94 | 81 | ||
| 95 | iounmap(ocotp_base); | 82 | iounmap(ocotp_base); |
| 96 | of_node_put(np); | 83 | of_node_put(np); |
| @@ -120,7 +107,7 @@ static void __init imx8mm_soc_uid(void) · 23 unmodified lines | |||
| 120 | of_node_put(np); | 107 | of_node_put(np); |
| 121 | } | 108 | } |
| 122 | 109 | ||
| 123 | static u32 __init imx8mm_soc_revision(struct device *dev) | 110 | static u32 __init imx8mm_soc_revision(void) |
| 124 | { | 111 | { |
| 125 | struct device_node *np; | 112 | struct device_node *np; |
| 126 | void __iomem *anatop_base; | 113 | void __iomem *anatop_base; |
| @@ -138,15 +125,7 @@ static u32 __init imx8mm_soc_revision(struct device *dev) · 11 unmodified lines | |||
| 138 | iounmap(anatop_base); | 125 | iounmap(anatop_base); |
| 139 | of_node_put(np); | 126 | of_node_put(np); |
| 140 | 127 | ||
| 141 | if (dev) { | 128 | imx8mm_soc_uid(); |
| 142 | int ret; | ||
| 143 | |||
| 144 | ret = nvmem_cell_read_u64(dev, "soc_unique_id", &soc_uid); | ||
| 145 | if (ret) | ||
| 146 | return ret; | ||
| 147 | } else { | ||
| 148 | imx8mm_soc_uid(); | ||
| 149 | } | ||
| 150 | 129 | ||
| 151 | return rev; | 130 | return rev; |
| 152 | } | 131 | } |
| @@ -171,7 +150,7 @@ static const struct imx8_soc_data imx8mp_soc_data = { · 18 unmodified lines | |||
| 171 | .soc_revision = imx8mm_soc_revision, | 150 | .soc_revision = imx8mm_soc_revision, |
| 172 | }; | 151 | }; |
| 173 | 152 | ||
| 174 | static __maybe_unused const struct of_device_id imx8_machine_match[] = { | 153 | static __maybe_unused const struct of_device_id imx8_soc_match[] = { |
| 175 | { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, }, | 154 | { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, }, |
| 176 | { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, }, | 155 | { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, }, |
| 177 | { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, }, | 156 | { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, }, |
| @@ -179,20 +158,12 @@ static __maybe_unused const struct of_device_id imx8_machine_match[] = { · 1 unmodified line | |||
| 179 | { } | 158 | { } |
| 180 | }; | 159 | }; |
| 181 | 160 | ||
| 182 | static __maybe_unused const struct of_device_id imx8_soc_match[] = { | ||
| 183 | { .compatible = "fsl,imx8mq-soc", .data = &imx8mq_soc_data, }, | ||
| 184 | { .compatible = "fsl,imx8mm-soc", .data = &imx8mm_soc_data, }, | ||
| 185 | { .compatible = "fsl,imx8mn-soc", .data = &imx8mn_soc_data, }, | ||
| 186 | { .compatible = "fsl,imx8mp-soc", .data = &imx8mp_soc_data, }, | ||
| 187 | { } | ||
| 188 | }; | ||
| 189 | |||
| 190 | #define imx8_revision(soc_rev) \ | 161 | #define imx8_revision(soc_rev) \ |
| 191 | soc_rev ? \ | 162 | soc_rev ? \ |
| 192 | kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \ | 163 | kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \ |
| 193 | "unknown" | 164 | "unknown" |
| 194 | 165 | ||
| 195 | static int imx8_soc_info(struct platform_device *pdev) | 166 | static int __init imx8_soc_init(void) |
| 196 | { | 167 | { |
| 197 | struct soc_device_attribute *soc_dev_attr; | 168 | struct soc_device_attribute *soc_dev_attr; |
| 198 | struct soc_device *soc_dev; | 169 | struct soc_device *soc_dev; |
| @@ -211,10 +182,7 @@ static int imx8_soc_info(struct platform_device *pdev) · 12 unmodified lines | |||
| 211 | if (ret) | 182 | if (ret) |
| 212 | goto free_soc; | 183 | goto free_soc; |
| 213 | 184 | ||
| 214 | if (pdev) | 185 | id = of_match_node(imx8_soc_match, of_root); |
| 215 | id = of_match_node(imx8_soc_match, pdev->dev.of_node); | ||
| 216 | else | ||
| 217 | id = of_match_node(imx8_machine_match, of_root); | ||
| 218 | if (!id) { | 186 | if (!id) { |
| 219 | ret = -ENODEV; | 187 | ret = -ENODEV; |
| 220 | goto free_soc; | 188 | goto free_soc; |
| @@ -223,16 +191,8 @@ static int imx8_soc_info(struct platform_device *pdev) · 2 unmodified lines | |||
| 223 | data = id->data; | 191 | data = id->data; |
| 224 | if (data) { | 192 | if (data) { |
| 225 | soc_dev_attr->soc_id = data->name; | 193 | soc_dev_attr->soc_id = data->name; |
| 226 | if (data->soc_revision) { | 194 | if (data->soc_revision) |
| 227 | if (pdev) { | 195 | soc_rev = data->soc_revision(); |
| 228 | soc_rev = data->soc_revision(&pdev->dev); | ||
| 229 | ret = soc_rev; | ||
| 230 | if (ret < 0) | ||
| 231 | goto free_soc; | ||
| 232 | } else { | ||
| 233 | soc_rev = data->soc_revision(NULL); | ||
| 234 | } | ||
| 235 | } | ||
| 236 | } | 196 | } |
| 237 | 197 | ||
| 238 | soc_dev_attr->revision = imx8_revision(soc_rev); | 198 | soc_dev_attr->revision = imx8_revision(soc_rev); |
| @@ -270,24 +230,4 @@ free_soc: · 31 unmodified lines | |||
| 270 | kfree(soc_dev_attr); | 230 | kfree(soc_dev_attr); |
| 271 | return ret; | 231 | return ret; |
| 272 | } | 232 | } |
| 273 | |||
| 274 | /* Retain device_initcall is for backward compatibility with DTS. */ | ||
| 275 | static int __init imx8_soc_init(void) | ||
| 276 | { | ||
| 277 | if (of_find_matching_node_and_match(NULL, imx8_soc_match, NULL)) | ||
| 278 | return 0; | ||
| 279 | |||
| 280 | return imx8_soc_info(NULL); | ||
| 281 | } | ||
| 282 | device_initcall(imx8_soc_init); | 233 | device_initcall(imx8_soc_init); |
| 283 | |||
| 284 | static struct platform_driver imx8_soc_info_driver = { | ||
| 285 | .probe = imx8_soc_info, | ||
| 286 | .driver = { | ||
| 287 | .name = "imx8_soc_info", | ||
| 288 | .of_match_table = imx8_soc_match, | ||
| 289 | }, | ||
| 290 | }; | ||
| 291 | |||
| 292 | module_platform_driver(imx8_soc_info_driver); | ||
| 293 | MODULE_LICENSE("GPL v2"); | ||
| @@ -21,7 +21,6 @@ · 20 unmodified lines | |||
| 21 | #include <linux/of_platform.h> | 21 | #include <linux/of_platform.h> |
| 22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/soc/ixp4xx/npe.h> | 23 | #include <linux/soc/ixp4xx/npe.h> |
| 24 | #include <mach/hardware.h> | ||
| 25 | #include <linux/soc/ixp4xx/cpu.h> | 24 | #include <linux/soc/ixp4xx/cpu.h> |
| 26 | 25 | ||
| 27 | #define DEBUG_MSG 0 | 26 | #define DEBUG_MSG 0 |
| @@ -694,8 +693,8 @@ static int ixp4xx_npe_probe(struct platform_device *pdev) · 666 unmodified lines | |||
| 694 | 693 | ||
| 695 | if (!(ixp4xx_read_feature_bits() & | 694 | if (!(ixp4xx_read_feature_bits() & |
| 696 | (IXP4XX_FEATURE_RESET_NPEA << i))) { | 695 | (IXP4XX_FEATURE_RESET_NPEA << i))) { |
| 697 | dev_info(dev, "NPE%d at 0x%08x-0x%08x not available\n", | 696 | dev_info(dev, "NPE%d at %pR not available\n", |
| 698 | i, res->start, res->end); | 697 | i, res); |
| 699 | continue; /* NPE already disabled or not present */ | 698 | continue; /* NPE already disabled or not present */ |
| 700 | } | 699 | } |
| 701 | npe->regs = devm_ioremap_resource(dev, res); | 700 | npe->regs = devm_ioremap_resource(dev, res); |
| @@ -703,13 +702,12 @@ static int ixp4xx_npe_probe(struct platform_device *pdev) · 1 unmodified line | |||
| 703 | return PTR_ERR(npe->regs); | 702 | return PTR_ERR(npe->regs); |
| 704 | 703 | ||
| 705 | if (npe_reset(npe)) { | 704 | if (npe_reset(npe)) { |
| 706 | dev_info(dev, "NPE%d at 0x%08x-0x%08x does not reset\n", | 705 | dev_info(dev, "NPE%d at %pR does not reset\n", |
| 707 | i, res->start, res->end); | 706 | i, res); |
| 708 | continue; | 707 | continue; |
| 709 | } | 708 | } |
| 710 | npe->valid = 1; | 709 | npe->valid = 1; |
| 711 | dev_info(dev, "NPE%d at 0x%08x-0x%08x registered\n", | 710 | dev_info(dev, "NPE%d at %pR registered\n", i, res); |
| 712 | i, res->start, res->end); | ||
| 713 | found++; | 711 | found++; |
| 714 | } | 712 | } |
| 715 | 713 | ||
| @@ -12,7 +12,6 @@ · 11 unmodified lines | |||
| 12 | #include <linux/of.h> | 12 | #include <linux/of.h> |
| 13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/soc/ixp4xx/qmgr.h> | 14 | #include <linux/soc/ixp4xx/qmgr.h> |
| 15 | #include <mach/hardware.h> | ||
| 16 | #include <linux/soc/ixp4xx/cpu.h> | 15 | #include <linux/soc/ixp4xx/cpu.h> |
| 17 | 16 | ||
| 18 | static struct qmgr_regs __iomem *qmgr_regs; | 17 | static struct qmgr_regs __iomem *qmgr_regs; |
| @@ -147,12 +146,12 @@ static irqreturn_t qmgr_irq1_a0(int irq, void *pdev) · 128 unmodified lines | |||
| 147 | /* ACK - it may clear any bits so don't rely on it */ | 146 | /* ACK - it may clear any bits so don't rely on it */ |
| 148 | __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[0]); | 147 | __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[0]); |
| 149 | 148 | ||
| 150 | en_bitmap = qmgr_regs->irqen[0]; | 149 | en_bitmap = __raw_readl(&qmgr_regs->irqen[0]); |
| 151 | while (en_bitmap) { | 150 | while (en_bitmap) { |
| 152 | i = __fls(en_bitmap); /* number of the last "low" queue */ | 151 | i = __fls(en_bitmap); /* number of the last "low" queue */ |
| 153 | en_bitmap &= ~BIT(i); | 152 | en_bitmap &= ~BIT(i); |
| 154 | src = qmgr_regs->irqsrc[i >> 3]; | 153 | src = __raw_readl(&qmgr_regs->irqsrc[i >> 3]); |
| 155 | stat = qmgr_regs->stat1[i >> 3]; | 154 | stat = __raw_readl(&qmgr_regs->stat1[i >> 3]); |
| 156 | if (src & 4) /* the IRQ condition is inverted */ | 155 | if (src & 4) /* the IRQ condition is inverted */ |
| 157 | stat = ~stat; | 156 | stat = ~stat; |
| 158 | if (stat & BIT(src & 3)) { | 157 | if (stat & BIT(src & 3)) { |
| @@ -172,7 +171,8 @@ static irqreturn_t qmgr_irq2_a0(int irq, void *pdev) · 13 unmodified lines | |||
| 172 | /* ACK - it may clear any bits so don't rely on it */ | 171 | /* ACK - it may clear any bits so don't rely on it */ |
| 173 | __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[1]); | 172 | __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[1]); |
| 174 | 173 | ||
| 175 | req_bitmap = qmgr_regs->irqen[1] & qmgr_regs->statne_h; | 174 | req_bitmap = __raw_readl(&qmgr_regs->irqen[1]) & |
| 175 | __raw_readl(&qmgr_regs->statne_h); | ||
| 176 | while (req_bitmap) { | 176 | while (req_bitmap) { |
| 177 | i = __fls(req_bitmap); /* number of the last "high" queue */ | 177 | i = __fls(req_bitmap); /* number of the last "high" queue */ |
| 178 | req_bitmap &= ~BIT(i); | 178 | req_bitmap &= ~BIT(i); |
| @@ -15,7 +15,7 @@ config ARCH_TEGRA_2x_SOC · 14 unmodified lines | |||
| 15 | select PL310_ERRATA_769419 if CACHE_L2X0 | 15 | select PL310_ERRATA_769419 if CACHE_L2X0 |
| 16 | select SOC_TEGRA_FLOWCTRL | 16 | select SOC_TEGRA_FLOWCTRL |
| 17 | select SOC_TEGRA_PMC | 17 | select SOC_TEGRA_PMC |
| 18 | select SOC_TEGRA20_VOLTAGE_COUPLER | 18 | select SOC_TEGRA20_VOLTAGE_COUPLER if REGULATOR |
| 19 | select TEGRA_TIMER | 19 | select TEGRA_TIMER |
| 20 | help | 20 | help |
| 21 | Support for NVIDIA Tegra AP20 and T20 processors, based on the | 21 | Support for NVIDIA Tegra AP20 and T20 processors, based on the |
| @@ -29,7 +29,7 @@ config ARCH_TEGRA_3x_SOC · 7 unmodified lines | |||
| 29 | select PL310_ERRATA_769419 if CACHE_L2X0 | 29 | select PL310_ERRATA_769419 if CACHE_L2X0 |
| 30 | select SOC_TEGRA_FLOWCTRL | 30 | select SOC_TEGRA_FLOWCTRL |
| 31 | select SOC_TEGRA_PMC | 31 | select SOC_TEGRA_PMC |
| 32 | select SOC_TEGRA30_VOLTAGE_COUPLER | 32 | select SOC_TEGRA30_VOLTAGE_COUPLER if REGULATOR |
| 33 | select TEGRA_TIMER | 33 | select TEGRA_TIMER |
| 34 | help | 34 | help |
| 35 | Support for NVIDIA Tegra T30 processor family, based on the | 35 | Support for NVIDIA Tegra T30 processor family, based on the |
| @@ -155,7 +155,9 @@ config SOC_TEGRA_POWERGATE_BPMP · 119 unmodified lines | |||
| 155 | config SOC_TEGRA20_VOLTAGE_COUPLER | 155 | config SOC_TEGRA20_VOLTAGE_COUPLER |
| 156 | bool "Voltage scaling support for Tegra20 SoCs" | 156 | bool "Voltage scaling support for Tegra20 SoCs" |
| 157 | depends on ARCH_TEGRA_2x_SOC || COMPILE_TEST | 157 | depends on ARCH_TEGRA_2x_SOC || COMPILE_TEST |
| 158 | depends on REGULATOR | ||
| 158 | 159 | ||
| 159 | config SOC_TEGRA30_VOLTAGE_COUPLER | 160 | config SOC_TEGRA30_VOLTAGE_COUPLER |
| 160 | bool "Voltage scaling support for Tegra30 SoCs" | 161 | bool "Voltage scaling support for Tegra30 SoCs" |
| 161 | depends on ARCH_TEGRA_3x_SOC || COMPILE_TEST | 162 | depends on ARCH_TEGRA_3x_SOC || COMPILE_TEST |
| 163 | depends on REGULATOR | ||
| @@ -184,7 +184,7 @@ static struct tee_shm *get_msg_arg(struct tee_context *ctx, size_t num_params, · 183 unmodified lines | |||
| 184 | struct optee_msg_arg *ma; | 184 | struct optee_msg_arg *ma; |
| 185 | 185 | ||
| 186 | shm = tee_shm_alloc(ctx, OPTEE_MSG_GET_ARG_SIZE(num_params), | 186 | shm = tee_shm_alloc(ctx, OPTEE_MSG_GET_ARG_SIZE(num_params), |
| 187 | TEE_SHM_MAPPED); | 187 | TEE_SHM_MAPPED | TEE_SHM_PRIV); |
| 188 | if (IS_ERR(shm)) | 188 | if (IS_ERR(shm)) |
| 189 | return shm; | 189 | return shm; |
| 190 | 190 | ||
| @@ -416,11 +416,13 @@ void optee_enable_shm_cache(struct optee *optee) · 225 unmodified lines | |||
| 416 | } | 416 | } |
| 417 | 417 | ||
| 418 | /** | 418 | /** |
| 419 | * optee_disable_shm_cache() - Disables caching of some shared memory allocation | 419 | * __optee_disable_shm_cache() - Disables caching of some shared memory |
| 420 | * in OP-TEE | 420 | * allocation in OP-TEE |
| 421 | * @optee: main service struct | 421 | * @optee: main service struct |
| 422 | * @is_mapped: true if the cached shared memory addresses were mapped by this | ||
| 423 | * kernel, are safe to dereference, and should be freed | ||
| 422 | */ | 424 | */ |
| 423 | void optee_disable_shm_cache(struct optee *optee) | 425 | static void __optee_disable_shm_cache(struct optee *optee, bool is_mapped) |
| 424 | { | 426 | { |
| 425 | struct optee_call_waiter w; | 427 | struct optee_call_waiter w; |
| 426 | 428 | ||
| @@ -439,6 +441,13 @@ void optee_disable_shm_cache(struct optee *optee) · 12 unmodified lines | |||
| 439 | if (res.result.status == OPTEE_SMC_RETURN_OK) { | 441 | if (res.result.status == OPTEE_SMC_RETURN_OK) { |
| 440 | struct tee_shm *shm; | 442 | struct tee_shm *shm; |
| 441 | 443 | ||
| 444 | /* | ||
| 445 | * Shared memory references that were not mapped by | ||
| 446 | * this kernel must be ignored to prevent a crash. | ||
| 447 | */ | ||
| 448 | if (!is_mapped) | ||
| 449 | continue; | ||
| 450 | |||
| 442 | shm = reg_pair_to_ptr(res.result.shm_upper32, | 451 | shm = reg_pair_to_ptr(res.result.shm_upper32, |
| 443 | res.result.shm_lower32); | 452 | res.result.shm_lower32); |
| 444 | tee_shm_free(shm); | 453 | tee_shm_free(shm); |
| @@ -449,6 +458,27 @@ void optee_disable_shm_cache(struct optee *optee) · 4 unmodified lines | |||
| 449 | optee_cq_wait_final(&optee->call_queue, &w); | 458 | optee_cq_wait_final(&optee->call_queue, &w); |
| 450 | } | 459 | } |
| 451 | 460 | ||
| 461 | /** | ||
| 462 | * optee_disable_shm_cache() - Disables caching of mapped shared memory | ||
| 463 | * allocations in OP-TEE | ||
| 464 | * @optee: main service struct | ||
| 465 | */ | ||
| 466 | void optee_disable_shm_cache(struct optee *optee) | ||
| 467 | { | ||
| 468 | return __optee_disable_shm_cache(optee, true); | ||
| 469 | } | ||
| 470 | |||
| 471 | /** | ||
| 472 | * optee_disable_unmapped_shm_cache() - Disables caching of shared memory | ||
| 473 | * allocations in OP-TEE which are not | ||
| 474 | * currently mapped | ||
| 475 | * @optee: main service struct | ||
| 476 | */ | ||
| 477 | void optee_disable_unmapped_shm_cache(struct optee *optee) | ||
| 478 | { | ||
| 479 | return __optee_disable_shm_cache(optee, false); | ||
| 480 | } | ||
| 481 | |||
| 452 | #define PAGELIST_ENTRIES_PER_PAGE \ | 482 | #define PAGELIST_ENTRIES_PER_PAGE \ |
| 453 | ((OPTEE_MSG_NONCONTIG_PAGE_SIZE / sizeof(u64)) - 1) | 483 | ((OPTEE_MSG_NONCONTIG_PAGE_SIZE / sizeof(u64)) - 1) |
| 454 | 484 | ||
| @@ -6,6 +6,7 @@ · 5 unmodified lines | |||
| 6 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | 6 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 7 | 7 | ||
| 8 | #include <linux/arm-smccc.h> | 8 | #include <linux/arm-smccc.h> |
| 9 | #include <linux/crash_dump.h> | ||
| 9 | #include <linux/errno.h> | 10 | #include <linux/errno.h> |
| 10 | #include <linux/io.h> | 11 | #include <linux/io.h> |
| 11 | #include <linux/module.h> | 12 | #include <linux/module.h> |
| @@ -277,7 +278,8 @@ static void optee_release(struct tee_context *ctx) · 265 unmodified lines | |||
| 277 | if (!ctxdata) | 278 | if (!ctxdata) |
| 278 | return; | 279 | return; |
| 279 | 280 | ||
| 280 | shm = tee_shm_alloc(ctx, sizeof(struct optee_msg_arg), TEE_SHM_MAPPED); | 281 | shm = tee_shm_alloc(ctx, sizeof(struct optee_msg_arg), |
| 282 | TEE_SHM_MAPPED | TEE_SHM_PRIV); | ||
| 281 | if (!IS_ERR(shm)) { | 283 | if (!IS_ERR(shm)) { |
| 282 | arg = tee_shm_get_va(shm, 0); | 284 | arg = tee_shm_get_va(shm, 0); |
| 283 | /* | 285 | /* |
| @@ -572,6 +574,13 @@ static optee_invoke_fn *get_invoke_func(struct device *dev) · 288 unmodified lines | |||
| 572 | return ERR_PTR(-EINVAL); | 574 | return ERR_PTR(-EINVAL); |
| 573 | } | 575 | } |
| 574 | 576 | ||
| 577 | /* optee_remove - Device Removal Routine | ||
| 578 | * @pdev: platform device information struct | ||
| 579 | * | ||
| 580 | * optee_remove is called by platform subsystem to alert the driver | ||
| 581 | * that it should release the device | ||
| 582 | */ | ||
| 583 | |||
| 575 | static int optee_remove(struct platform_device *pdev) | 584 | static int optee_remove(struct platform_device *pdev) |
| 576 | { | 585 | { |
| 577 | struct optee *optee = platform_get_drvdata(pdev); | 586 | struct optee *optee = platform_get_drvdata(pdev); |
| @@ -602,6 +611,18 @@ static int optee_remove(struct platform_device *pdev) · 24 unmodified lines | |||
| 602 | return 0; | 611 | return 0; |
| 603 | } | 612 | } |
| 604 | 613 | ||
| 614 | /* optee_shutdown - Device Removal Routine | ||
| 615 | * @pdev: platform device information struct | ||
| 616 | * | ||
| 617 | * platform_shutdown is called by the platform subsystem to alert | ||
| 618 | * the driver that a shutdown, reboot, or kexec is happening and | ||
| 619 | * device must be disabled. | ||
| 620 | */ | ||
| 621 | static void optee_shutdown(struct platform_device *pdev) | ||
| 622 | { | ||
| 623 | optee_disable_shm_cache(platform_get_drvdata(pdev)); | ||
| 624 | } | ||
| 625 | |||
| 605 | static int optee_probe(struct platform_device *pdev) | 626 | static int optee_probe(struct platform_device *pdev) |
| 606 | { | 627 | { |
| 607 | optee_invoke_fn *invoke_fn; | 628 | optee_invoke_fn *invoke_fn; |
| @@ -612,6 +633,16 @@ static int optee_probe(struct platform_device *pdev) · 4 unmodified lines | |||
| 612 | u32 sec_caps; | 633 | u32 sec_caps; |
| 613 | int rc; | 634 | int rc; |
| 614 | 635 | ||
| 636 | /* | ||
| 637 | * The kernel may have crashed at the same time that all available | ||
| 638 | * secure world threads were suspended and we cannot reschedule the | ||
| 639 | * suspended threads without access to the crashed kernel's wait_queue. | ||
| 640 | * Therefore, we cannot reliably initialize the OP-TEE driver in the | ||
| 641 | * kdump kernel. | ||
| 642 | */ | ||
| 643 | if (is_kdump_kernel()) | ||
| 644 | return -ENODEV; | ||
| 645 | |||
| 615 | invoke_fn = get_invoke_func(&pdev->dev); | 646 | invoke_fn = get_invoke_func(&pdev->dev); |
| 616 | if (IS_ERR(invoke_fn)) | 647 | if (IS_ERR(invoke_fn)) |
| 617 | return PTR_ERR(invoke_fn); | 648 | return PTR_ERR(invoke_fn); |
| @@ -686,6 +717,15 @@ static int optee_probe(struct platform_device *pdev) · 68 unmodified lines | |||
| 686 | optee->memremaped_shm = memremaped_shm; | 717 | optee->memremaped_shm = memremaped_shm; |
| 687 | optee->pool = pool; | 718 | optee->pool = pool; |
| 688 | 719 | ||
| 720 | /* | ||
| 721 | * Ensure that there are no pre-existing shm objects before enabling | ||
| 722 | * the shm cache so that there's no chance of receiving an invalid | ||
| 723 | * address during shutdown. This could occur, for example, if we're | ||
| 724 | * kexec booting from an older kernel that did not properly cleanup the | ||
| 725 | * shm cache. | ||
| 726 | */ | ||
| 727 | optee_disable_unmapped_shm_cache(optee); | ||
| 728 | |||
| 689 | optee_enable_shm_cache(optee); | 729 | optee_enable_shm_cache(optee); |
| 690 | 730 | ||
| 691 | if (optee->sec_caps & OPTEE_SMC_SEC_CAP_DYNAMIC_SHM) | 731 | if (optee->sec_caps & OPTEE_SMC_SEC_CAP_DYNAMIC_SHM) |
| @@ -728,6 +768,7 @@ MODULE_DEVICE_TABLE(of, optee_dt_match); · 36 unmodified lines | |||
| 728 | static struct platform_driver optee_driver = { | 768 | static struct platform_driver optee_driver = { |
| 729 | .probe = optee_probe, | 769 | .probe = optee_probe, |
| 730 | .remove = optee_remove, | 770 | .remove = optee_remove, |
| 771 | .shutdown = optee_shutdown, | ||
| 731 | .driver = { | 772 | .driver = { |
| 732 | .name = "optee", | 773 | .name = "optee", |
| 733 | .of_match_table = optee_dt_match, | 774 | .of_match_table = optee_dt_match, |
| @@ -159,6 +159,7 @@ int optee_cancel_req(struct tee_context *ctx, u32 cancel_id, u32 session); · 158 unmodified lines | |||
| 159 | 159 | ||
| 160 | void optee_enable_shm_cache(struct optee *optee); | 160 | void optee_enable_shm_cache(struct optee *optee); |
| 161 | void optee_disable_shm_cache(struct optee *optee); | 161 | void optee_disable_shm_cache(struct optee *optee); |
| 162 | void optee_disable_unmapped_shm_cache(struct optee *optee); | ||
| 162 | 163 | ||
| 163 | int optee_shm_register(struct tee_context *ctx, struct tee_shm *shm, | 164 | int optee_shm_register(struct tee_context *ctx, struct tee_shm *shm, |
| 164 | struct page **pages, size_t num_pages, | 165 | struct page **pages, size_t num_pages, |
| @@ -314,7 +314,7 @@ static void handle_rpc_func_cmd_shm_alloc(struct tee_context *ctx, · 313 unmodified lines | |||
| 314 | shm = cmd_alloc_suppl(ctx, sz); | 314 | shm = cmd_alloc_suppl(ctx, sz); |
| 315 | break; | 315 | break; |
| 316 | case OPTEE_RPC_SHM_TYPE_KERNEL: | 316 | case OPTEE_RPC_SHM_TYPE_KERNEL: |
| 317 | shm = tee_shm_alloc(ctx, sz, TEE_SHM_MAPPED); | 317 | shm = tee_shm_alloc(ctx, sz, TEE_SHM_MAPPED | TEE_SHM_PRIV); |
| 318 | break; | 318 | break; |
| 319 | default: | 319 | default: |
| 320 | arg->ret = TEEC_ERROR_BAD_PARAMETERS; | 320 | arg->ret = TEEC_ERROR_BAD_PARAMETERS; |
| @@ -502,7 +502,8 @@ void optee_handle_rpc(struct tee_context *ctx, struct optee_rpc_param *param, · 181 unmodified lines | |||
| 502 | 502 | ||
| 503 | switch (OPTEE_SMC_RETURN_GET_RPC_FUNC(param->a0)) { | 503 | switch (OPTEE_SMC_RETURN_GET_RPC_FUNC(param->a0)) { |
| 504 | case OPTEE_SMC_RPC_FUNC_ALLOC: | 504 | case OPTEE_SMC_RPC_FUNC_ALLOC: |
| 505 | shm = tee_shm_alloc(ctx, param->a1, TEE_SHM_MAPPED); | 505 | shm = tee_shm_alloc(ctx, param->a1, |
| 506 | TEE_SHM_MAPPED | TEE_SHM_PRIV); | ||
| 506 | if (!IS_ERR(shm) && !tee_shm_get_pa(shm, 0, &pa)) { | 507 | if (!IS_ERR(shm) && !tee_shm_get_pa(shm, 0, &pa)) { |
| 507 | reg_pair_from_64(¶m->a1, ¶m->a2, pa); | 508 | reg_pair_from_64(¶m->a1, ¶m->a2, pa); |
| 508 | reg_pair_from_64(¶m->a4, ¶m->a5, | 509 | reg_pair_from_64(¶m->a4, ¶m->a5, |
| @@ -27,13 +27,19 @@ static int pool_op_alloc(struct tee_shm_pool_mgr *poolm, · 26 unmodified lines | |||
| 27 | shm->paddr = page_to_phys(page); | 27 | shm->paddr = page_to_phys(page); |
| 28 | shm->size = PAGE_SIZE << order; | 28 | shm->size = PAGE_SIZE << order; |
| 29 | 29 | ||
| 30 | if (shm->flags & TEE_SHM_DMA_BUF) { | 30 | /* |
| 31 | * Shared memory private to the OP-TEE driver doesn't need | ||
| 32 | * to be registered with OP-TEE. | ||
| 33 | */ | ||
| 34 | if (!(shm->flags & TEE_SHM_PRIV)) { | ||
| 31 | unsigned int nr_pages = 1 << order, i; | 35 | unsigned int nr_pages = 1 << order, i; |
| 32 | struct page **pages; | 36 | struct page **pages; |
| 33 | 37 | ||
| 34 | pages = kcalloc(nr_pages, sizeof(pages), GFP_KERNEL); | 38 | pages = kcalloc(nr_pages, sizeof(pages), GFP_KERNEL); |
| 35 | if (!pages) | 39 | if (!pages) { |
| 36 | return -ENOMEM; | 40 | rc = -ENOMEM; |
| 41 | goto err; | ||
| 42 | } | ||
| 37 | 43 | ||
| 38 | for (i = 0; i < nr_pages; i++) { | 44 | for (i = 0; i < nr_pages; i++) { |
| 39 | pages[i] = page; | 45 | pages[i] = page; |
| @@ -44,15 +50,21 @@ static int pool_op_alloc(struct tee_shm_pool_mgr *poolm, · 4 unmodified lines | |||
| 44 | rc = optee_shm_register(shm->ctx, shm, pages, nr_pages, | 50 | rc = optee_shm_register(shm->ctx, shm, pages, nr_pages, |
| 45 | (unsigned long)shm->kaddr); | 51 | (unsigned long)shm->kaddr); |
| 46 | kfree(pages); | 52 | kfree(pages); |
| 53 | if (rc) | ||
| 54 | goto err; | ||
| 47 | } | 55 | } |
| 48 | 56 | ||
| 57 | return 0; | ||
| 58 | |||
| 59 | err: | ||
| 60 | __free_pages(page, order); | ||
| 49 | return rc; | 61 | return rc; |
| 50 | } | 62 | } |
| 51 | 63 | ||
| 52 | static void pool_op_free(struct tee_shm_pool_mgr *poolm, | 64 | static void pool_op_free(struct tee_shm_pool_mgr *poolm, |
| 53 | struct tee_shm *shm) | 65 | struct tee_shm *shm) |
| 54 | { | 66 | { |
| 55 | if (shm->flags & TEE_SHM_DMA_BUF) | 67 | if (!(shm->flags & TEE_SHM_PRIV)) |
| 56 | optee_shm_unregister(shm->ctx, shm); | 68 | optee_shm_unregister(shm->ctx, shm); |
| 57 | 69 | ||
| 58 | free_pages((unsigned long)shm->kaddr, get_order(shm->size)); | 70 | free_pages((unsigned long)shm->kaddr, get_order(shm->size)); |
| @@ -117,7 +117,7 @@ struct tee_shm *tee_shm_alloc(struct tee_context *ctx, size_t size, u32 flags) · 116 unmodified lines | |||
| 117 | return ERR_PTR(-EINVAL); | 117 | return ERR_PTR(-EINVAL); |
| 118 | } | 118 | } |
| 119 | 119 | ||
| 120 | if ((flags & ~(TEE_SHM_MAPPED | TEE_SHM_DMA_BUF))) { | 120 | if ((flags & ~(TEE_SHM_MAPPED | TEE_SHM_DMA_BUF | TEE_SHM_PRIV))) { |
| 121 | dev_err(teedev->dev.parent, "invalid shm flags 0x%x", flags); | 121 | dev_err(teedev->dev.parent, "invalid shm flags 0x%x", flags); |
| 122 | return ERR_PTR(-EINVAL); | 122 | return ERR_PTR(-EINVAL); |
| 123 | } | 123 | } |
| @@ -193,6 +193,24 @@ err_dev_put: · 69 unmodified lines | |||
| 193 | } | 193 | } |
| 194 | EXPORT_SYMBOL_GPL(tee_shm_alloc); | 194 | EXPORT_SYMBOL_GPL(tee_shm_alloc); |
| 195 | 195 | ||
| 196 | /** | ||
| 197 | * tee_shm_alloc_kernel_buf() - Allocate shared memory for kernel buffer | ||
| 198 | * @ctx: Context that allocates the shared memory | ||
| 199 | * @size: Requested size of shared memory | ||
| 200 | * | ||
| 201 | * The returned memory registered in secure world and is suitable to be | ||
| 202 | * passed as a memory buffer in parameter argument to | ||
| 203 | * tee_client_invoke_func(). The memory allocated is later freed with a | ||
| 204 | * call to tee_shm_free(). | ||
| 205 | * | ||
| 206 | * @returns a pointer to 'struct tee_shm' | ||
| 207 | */ | ||
| 208 | struct tee_shm *tee_shm_alloc_kernel_buf(struct tee_context *ctx, size_t size) | ||
| 209 | { | ||
| 210 | return tee_shm_alloc(ctx, size, TEE_SHM_MAPPED); | ||
| 211 | } | ||
| 212 | EXPORT_SYMBOL_GPL(tee_shm_alloc_kernel_buf); | ||
| 213 | |||
| 196 | struct tee_shm *tee_shm_register(struct tee_context *ctx, unsigned long addr, | 214 | struct tee_shm *tee_shm_register(struct tee_context *ctx, unsigned long addr, |
| 197 | size_t length, u32 flags) | 215 | size_t length, u32 flags) |
| 198 | { | 216 | { |
| @@ -27,6 +27,7 @@ · 26 unmodified lines | |||
| 27 | #define TEE_SHM_USER_MAPPED BIT(4) /* Memory mapped in user space */ | 27 | #define TEE_SHM_USER_MAPPED BIT(4) /* Memory mapped in user space */ |
| 28 | #define TEE_SHM_POOL BIT(5) /* Memory allocated from pool */ | 28 | #define TEE_SHM_POOL BIT(5) /* Memory allocated from pool */ |
| 29 | #define TEE_SHM_KERNEL_MAPPED BIT(6) /* Memory mapped in kernel space */ | 29 | #define TEE_SHM_KERNEL_MAPPED BIT(6) /* Memory mapped in kernel space */ |
| 30 | #define TEE_SHM_PRIV BIT(7) /* Memory private to TEE driver */ | ||
| 30 | 31 | ||
| 31 | struct device; | 32 | struct device; |
| 32 | struct tee_device; | 33 | struct tee_device; |
| @@ -332,6 +333,7 @@ void *tee_get_drvdata(struct tee_device *teedev); · 299 unmodified lines | |||
| 332 | * @returns a pointer to 'struct tee_shm' | 333 | * @returns a pointer to 'struct tee_shm' |
| 333 | */ | 334 | */ |
| 334 | struct tee_shm *tee_shm_alloc(struct tee_context *ctx, size_t size, u32 flags); | 335 | struct tee_shm *tee_shm_alloc(struct tee_context *ctx, size_t size, u32 flags); |
| 336 | struct tee_shm *tee_shm_alloc_kernel_buf(struct tee_context *ctx, size_t size); | ||
| 335 | 337 | ||
| 336 | /** | 338 | /** |
| 337 | * tee_shm_register() - Register shared memory buffer | 339 | * tee_shm_register() - Register shared memory buffer |