Merge tag 'sunxi-fixes-for-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes

Allwinner fixes for 6.18 Just one fix to correct the "thead,vlenb" property for the RISC-V based D1 SoC family. * tag 'sunxi-fixes-for-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: dts: allwinner: d1: fix vlenb property

Arnd Bergmann committed 11 months ago

Commit 3ecfcf32 parents a6737fe 9f393d81 file · +1 −1Browse files

Unified · Split

arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi+1−1

@@ -28,7 +28,7 @@ · 27 unmodified lines
28	riscv,isa-base = "rv64i";	28	riscv,isa-base = "rv64i";
29	riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",	29	riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
30	"zifencei", "zihpm", "xtheadvector";	30	"zifencei", "zihpm", "xtheadvector";
31	thead,vlenb = <128>;	31	thead,vlenb = <16>;
32	#cooling-cells = <2>;	32	#cooling-cells = <2>;
33		33
34	cpu0_intc: interrupt-controller {	34	cpu0_intc: interrupt-controller {