gpiolib: let gpiochip_add_pin_range() specify offset

Like with commit 3c739ad0df5eb41cd7adad879eda6aa09879eb76 it is not always enough to specify all the pins of a gpio_chip from offset zero to be added to a pin map range, since the mapping from GPIO to pin controller may not be linear at all, but need to be broken into a few consecutive sub-ranges or 1-pin entries for complicated cases. The ranges may also be sparse. This alters the signature of the function to accept offsets into both the GPIO-chip local pinspace and the pin controller local pinspace.

Linus Walleij committed 13 years ago

Commit 3f0f8671 parent 5212d094 files · +47 −6Browse files

Unified · Split

4 files

drivers/gpio/gpiolib-of.c +12 −0
drivers/gpio/gpiolib.c +29 −3
include/asm-generic/gpio.h +4 −2
include/linux/gpio.h +2 −1

drivers/gpio/gpiolib-of.c+12−0

@@ -238,8 +238,20 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip) · 237 unmodified lines
238	if (!pctldev)	238	if (!pctldev)
239	break;	239	break;
240		240
		241	/*
		242	* This assumes that the n GPIO pins are consecutive in the
		243	* GPIO number space, and that the pins are also consecutive
		244	* in their local number space. Currently it is not possible
		245	* to add different ranges for one and the same GPIO chip,
		246	* as the code assumes that we have one consecutive range
		247	* on both, mapping 1-to-1.
		248	*
		249	* TODO: make the OF bindings handle multiple sparse ranges
		250	* on the same GPIO chip.
		251	*/
241	ret = gpiochip_add_pin_range(chip,	252	ret = gpiochip_add_pin_range(chip,
242	pinctrl_dev_get_name(pctldev),	253	pinctrl_dev_get_name(pctldev),
		254	0, /* offset in gpiochip */
243	pinspec.args[0],	255	pinspec.args[0],
244	pinspec.args[1]);	256	pinspec.args[1]);
245		257

drivers/gpio/gpiolib.c+29−3

 #ifdef CONFIG_PINCTRL
+/**
+ * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
+ * @chip: the gpiochip to add the range for
+ * @pinctrl_name: the dev_name() of the pin controller to map to
+ * @offset: the start offset in the current gpio_chip number space
+ * @pin_base: the start offset in the pin controller number space
+ * @npins: the number of pins from the offset of each pin space (GPIO and
+ *	pin controller) to accumulate in this range
+ */
 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
-			   unsigned int pin_base, unsigned int npins)
+			   unsigned int offset, unsigned int pin_base,
+			   unsigned int npins)
 {
 	struct gpio_pin_range *pin_range;
-	pin_range = devm_kzalloc(chip->dev, sizeof(*pin_range), GFP_KERNEL);
+	pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
 	if (!pin_range) {
 		pr_err("%s: GPIO chip: failed to allocate pin ranges\n",
 				chip->label);
 		return -ENOMEM;
 	}
+	/* Use local offset as range ID */
+	pin_range->range.id = offset;
+	pin_range->range.gc = chip;
 	pin_range->range.name = chip->label;
-	pin_range->range.base = chip->base;
+	pin_range->range.base = chip->base + offset;
 	pin_range->range.pin_base = pin_base;
 	pin_range->range.npins = npins;
 	pin_range->pctldev = find_pinctrl_and_add_gpio_range(pinctl_name,
 			&pin_range->range);
+	if (!pin_range->pctldev) {
+		pr_err("%s: GPIO chip: could not create pin range\n",
+		       chip->label);
+		kfree(pin_range);
+	}
+	pr_debug("%s: GPIO chip: created GPIO range %d->%d ==> PIN %d->%d\n",
+		 chip->label, offset, offset + npins - 1,
+		 pin_base, pin_base + npins - 1);
 	list_add_tail(&pin_range->node, &chip->pin_ranges);
 }
 EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
+/**
+ * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
+ * @chip: the chip to remove all the mappings for
+ */
 void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
 {
 	struct gpio_pin_range *pin_range, *tmp;
 		list_del(&pin_range->node);
 		pinctrl_remove_gpio_range(pin_range->pctldev,
 				&pin_range->range);
+		kfree(pin_range);
 	}
 }
 EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);

include/asm-generic/gpio.h+4−2

 };
 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
-			   unsigned int pin_base, unsigned int npins);
+			   unsigned int offset, unsigned int pin_base,
+			   unsigned int npins);
 void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
 #else
 static inline int
 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
-		       unsigned int pin_base, unsigned int npins)
+		       unsigned int offset, unsigned int pin_base,
+		       unsigned int npins)
 {
 	return 0;
 }

include/linux/gpio.h+2−1

@@ -233,7 +233,8 @@ static inline int irq_to_gpio(unsigned irq) · 232 unmodified lines
233		233
234	static inline int	234	static inline int
235	gpiochip_add_pin_range(struct gpio_chip chip, const char pinctl_name,	235	gpiochip_add_pin_range(struct gpio_chip chip, const char pinctl_name,
236	unsigned int pin_base, unsigned int npins)	236	unsigned int offset, unsigned int pin_base,
		237	unsigned int npins)
237	{	238	{
238	WARN_ON(1);	239	WARN_ON(1);
239	return -EINVAL;	240	return -EINVAL;

gpiolib: let gpiochip_add_pin_range() specify offset

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