History

Merge tag 'spi-nor/for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next

SPI NOR core changes: - add, update support and fix few flashes - prepare BFPT parsing for JESD216 rev D - kernel doc fixes

Richard Weinberger committed 6 years ago

Commit 3f554002 parents a8dfb61 e8aec1513 files · +134 −56Browse files

Unified · Split

13 files
  1. drivers/mtd/spi-nor/Kconfig +2 −2
  2. drivers/mtd/spi-nor/controllers/Kconfig +2 −2
  3. drivers/mtd/spi-nor/controllers/aspeed-smc.c +1 −1
  4. drivers/mtd/spi-nor/controllers/hisi-sfc.c +1 −1
  5. drivers/mtd/spi-nor/controllers/nxp-spifi.c +1 −1
  6. drivers/mtd/spi-nor/core.c +11 −11
  7. drivers/mtd/spi-nor/macronix.c +6 −0
  8. drivers/mtd/spi-nor/micron-st.c +5 −1
  9. drivers/mtd/spi-nor/sfdp.c +18 −16
  10. drivers/mtd/spi-nor/sfdp.h +9 −2
  11. drivers/mtd/spi-nor/spansion.c +39 −5
  12. drivers/mtd/spi-nor/winbond.c +27 −2
  13. include/linux/mtd/spi-nor.h +12 −12
drivers/mtd/spi-nor/Kconfig+2−2
@@ -1,12 +1,12 @@
1# SPDX-License-Identifier: GPL-2.0-only1# SPDX-License-Identifier: GPL-2.0-only
2menuconfig MTD_SPI_NOR2menuconfig MTD_SPI_NOR
3 tristate "SPI-NOR device support"3 tristate "SPI NOR device support"
4 depends on MTD4 depends on MTD
5 depends on MTD && SPI_MASTER5 depends on MTD && SPI_MASTER
6 select SPI_MEM6 select SPI_MEM
7 help7 help
8 This is the framework for the SPI NOR which can be used by the SPI8 This is the framework for the SPI NOR which can be used by the SPI
9 device drivers and the SPI-NOR device driver.9 device drivers and the SPI NOR device driver.
10 10
11if MTD_SPI_NOR11if MTD_SPI_NOR
12 12
drivers/mtd/spi-nor/controllers/Kconfig+2−2
@@ -21,11 +21,11 @@ config SPI_CADENCE_QUADSPI · 20 unmodified lines
21 Flash as an MTD device.21 Flash as an MTD device.
22 22
23config SPI_HISI_SFC23config SPI_HISI_SFC
24 tristate "Hisilicon FMC SPI-NOR Flash Controller(SFC)"24 tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
25 depends on ARCH_HISI || COMPILE_TEST25 depends on ARCH_HISI || COMPILE_TEST
26 depends on HAS_IOMEM26 depends on HAS_IOMEM
27 help27 help
28 This enables support for HiSilicon FMC SPI-NOR flash controller.28 This enables support for HiSilicon FMC SPI NOR flash controller.
29 29
30config SPI_NXP_SPIFI30config SPI_NXP_SPIFI
31 tristate "NXP SPI Flash Interface (SPIFI)"31 tristate "NXP SPI Flash Interface (SPIFI)"
drivers/mtd/spi-nor/controllers/aspeed-smc.c+1−1
@@ -727,7 +727,7 @@ static int aspeed_smc_chip_setup_finish(struct aspeed_smc_chip *chip) · 726 unmodified lines
727 727
728 /*728 /*
729 * TODO: Adjust clocks if fast read is supported and interpret729 * TODO: Adjust clocks if fast read is supported and interpret
730 * SPI-NOR flags to adjust controller settings.730 * SPI NOR flags to adjust controller settings.
731 */731 */
732 if (chip->nor.read_proto == SNOR_PROTO_1_1_1) {732 if (chip->nor.read_proto == SNOR_PROTO_1_1_1) {
733 if (chip->nor.read_dummy == 0)733 if (chip->nor.read_dummy == 0)
drivers/mtd/spi-nor/controllers/hisi-sfc.c+1−1
@@ -1,6 +1,6 @@
1// SPDX-License-Identifier: GPL-2.0-or-later1// SPDX-License-Identifier: GPL-2.0-or-later
2/*2/*
3 * HiSilicon FMC SPI-NOR flash controller driver3 * HiSilicon FMC SPI NOR flash controller driver
4 *4 *
5 * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd.5 * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd.
6 */6 */
drivers/mtd/spi-nor/controllers/nxp-spifi.c+1−1
@@ -1,6 +1,6 @@
1// SPDX-License-Identifier: GPL-2.0-only1// SPDX-License-Identifier: GPL-2.0-only
2/*2/*
3 * SPI-NOR driver for NXP SPI Flash Interface (SPIFI)3 * SPI NOR driver for NXP SPI Flash Interface (SPIFI)
4 *4 *
5 * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>5 * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
6 *6 *
drivers/mtd/spi-nor/core.c+11−11
@@ -499,7 +499,7 @@ int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr) · 498 unmodified lines
499 * the flash is ready for new commands.499 * the flash is ready for new commands.
500 * @nor: pointer to 'struct spi_nor'.500 * @nor: pointer to 'struct spi_nor'.
501 *501 *
502 * Return: 0 on success, -errno otherwise.502 * Return: 1 if ready, 0 if not ready, -errno on errors.
503 */503 */
504static int spi_nor_xsr_ready(struct spi_nor *nor)504static int spi_nor_xsr_ready(struct spi_nor *nor)
505{505{
@@ -542,7 +542,7 @@ static void spi_nor_clear_sr(struct spi_nor *nor) · 36 unmodified lines
542 * for new commands.542 * for new commands.
543 * @nor: pointer to 'struct spi_nor'.543 * @nor: pointer to 'struct spi_nor'.
544 *544 *
545 * Return: 0 on success, -errno otherwise.545 * Return: 1 if ready, 0 if not ready, -errno on errors.
546 */546 */
547static int spi_nor_sr_ready(struct spi_nor *nor)547static int spi_nor_sr_ready(struct spi_nor *nor)
548{548{
@@ -606,7 +606,7 @@ static void spi_nor_clear_fsr(struct spi_nor *nor) · 57 unmodified lines
606 * ready for new commands.606 * ready for new commands.
607 * @nor: pointer to 'struct spi_nor'.607 * @nor: pointer to 'struct spi_nor'.
608 *608 *
609 * Return: 0 on success, -errno otherwise.609 * Return: 1 if ready, 0 if not ready, -errno on errors.
610 */610 */
611static int spi_nor_fsr_ready(struct spi_nor *nor)611static int spi_nor_fsr_ready(struct spi_nor *nor)
612{612{
@@ -640,14 +640,14 @@ static int spi_nor_fsr_ready(struct spi_nor *nor) · 27 unmodified lines
640 return -EIO;640 return -EIO;
641 }641 }
642 642
643 return nor->bouncebuf[0] & FSR_READY;643 return !!(nor->bouncebuf[0] & FSR_READY);
644}644}
645 645
646/**646/**
647 * spi_nor_ready() - Query the flash to see if it is ready for new commands.647 * spi_nor_ready() - Query the flash to see if it is ready for new commands.
648 * @nor: pointer to 'struct spi_nor'.648 * @nor: pointer to 'struct spi_nor'.
649 *649 *
650 * Return: 0 on success, -errno otherwise.650 * Return: 1 if ready, 0 if not ready, -errno on errors.
651 */651 */
652static int spi_nor_ready(struct spi_nor *nor)652static int spi_nor_ready(struct spi_nor *nor)
653{653{
@@ -2469,7 +2469,7 @@ static int spi_nor_select_read(struct spi_nor *nor, · 1815 unmodified lines
2469 nor->read_proto = read->proto;2469 nor->read_proto = read->proto;
2470 2470
2471 /*2471 /*
2472 * In the spi-nor framework, we don't need to make the difference2472 * In the SPI NOR framework, we don't need to make the difference
2473 * between mode clock cycles and wait state clock cycles.2473 * between mode clock cycles and wait state clock cycles.
2474 * Indeed, the value of the mode clock cycles is used by a QSPI2474 * Indeed, the value of the mode clock cycles is used by a QSPI
2475 * flash memory to know whether it should enter or leave its 0-4-42475 * flash memory to know whether it should enter or leave its 0-4-4
@@ -2675,7 +2675,7 @@ static int spi_nor_setup(struct spi_nor *nor, · 199 unmodified lines
2675/**2675/**
2676 * spi_nor_manufacturer_init_params() - Initialize the flash's parameters and2676 * spi_nor_manufacturer_init_params() - Initialize the flash's parameters and
2677 * settings based on MFR register and ->default_init() hook.2677 * settings based on MFR register and ->default_init() hook.
2678 * @nor: pointer to a 'struct spi-nor'.2678 * @nor: pointer to a 'struct spi_nor'.
2679 */2679 */
2680static void spi_nor_manufacturer_init_params(struct spi_nor *nor)2680static void spi_nor_manufacturer_init_params(struct spi_nor *nor)
2681{2681{
@@ -2690,7 +2690,7 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor) · 8 unmodified lines
2690/**2690/**
2691 * spi_nor_sfdp_init_params() - Initialize the flash's parameters and settings2691 * spi_nor_sfdp_init_params() - Initialize the flash's parameters and settings
2692 * based on JESD216 SFDP standard.2692 * based on JESD216 SFDP standard.
2693 * @nor: pointer to a 'struct spi-nor'.2693 * @nor: pointer to a 'struct spi_nor'.
2694 *2694 *
2695 * The method has a roll-back mechanism: in case the SFDP parsing fails, the2695 * The method has a roll-back mechanism: in case the SFDP parsing fails, the
2696 * legacy flash parameters and settings will be restored.2696 * legacy flash parameters and settings will be restored.
@@ -2712,7 +2712,7 @@ static void spi_nor_sfdp_init_params(struct spi_nor *nor) · 15 unmodified lines
2712/**2712/**
2713 * spi_nor_info_init_params() - Initialize the flash's parameters and settings2713 * spi_nor_info_init_params() - Initialize the flash's parameters and settings
2714 * based on nor->info data.2714 * based on nor->info data.
2715 * @nor: pointer to a 'struct spi-nor'.2715 * @nor: pointer to a 'struct spi_nor'.
2716 */2716 */
2717static void spi_nor_info_init_params(struct spi_nor *nor)2717static void spi_nor_info_init_params(struct spi_nor *nor)
2718{2718{
@@ -2841,7 +2841,7 @@ static void spi_nor_late_init_params(struct spi_nor *nor) · 122 unmodified lines
2841 2841
2842/**2842/**
2843 * spi_nor_init_params() - Initialize the flash's parameters and settings.2843 * spi_nor_init_params() - Initialize the flash's parameters and settings.
2844 * @nor: pointer to a 'struct spi-nor'.2844 * @nor: pointer to a 'struct spi_nor'.
2845 *2845 *
2846 * The flash parameters and settings are initialized based on a sequence of2846 * The flash parameters and settings are initialized based on a sequence of
2847 * calls that are ordered by priority:2847 * calls that are ordered by priority:
@@ -3126,7 +3126,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, · 278 unmodified lines
3126 /*3126 /*
3127 * Make sure the XSR_RDY flag is set before calling3127 * Make sure the XSR_RDY flag is set before calling
3128 * spi_nor_wait_till_ready(). Xilinx S3AN share MFR3128 * spi_nor_wait_till_ready(). Xilinx S3AN share MFR
3129 * with Atmel spi-nor3129 * with Atmel SPI NOR.
3130 */3130 */
3131 if (info->flags & SPI_NOR_XSR_RDY)3131 if (info->flags & SPI_NOR_XSR_RDY)
3132 nor->flags |= SNOR_F_READY_XSR_RDY;3132 nor->flags |= SNOR_F_READY_XSR_RDY;
drivers/mtd/spi-nor/macronix.c+6−0
@@ -63,10 +63,16 @@ static const struct flash_info macronix_parts[] = { · 62 unmodified lines
63 .fixups = &mx25l25635_fixups },63 .fixups = &mx25l25635_fixups },
64 { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512,64 { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512,
65 SECT_4K | SPI_NOR_4B_OPCODES) },65 SECT_4K | SPI_NOR_4B_OPCODES) },
66 { "mx25u51245g", INFO(0xc2253a, 0, 64 * 1024, 1024,
67 SECT_4K | SPI_NOR_DUAL_READ |
68 SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
66 { "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16,69 { "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16,
67 SECT_4K | SPI_NOR_DUAL_READ |70 SECT_4K | SPI_NOR_DUAL_READ |
68 SPI_NOR_QUAD_READ) },71 SPI_NOR_QUAD_READ) },
69 { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },72 { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
73 { "mx25l51245g", INFO(0xc2201a, 0, 64 * 1024, 1024,
74 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
75 SPI_NOR_4B_OPCODES) },
70 { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024,76 { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024,
71 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |77 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
72 SPI_NOR_4B_OPCODES) },78 SPI_NOR_4B_OPCODES) },
drivers/mtd/spi-nor/micron-st.c+5−1
@@ -29,7 +29,9 @@ static const struct flash_info st_parts[] = { · 28 unmodified lines
29 { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128,29 { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128,
30 SECT_4K | SPI_NOR_QUAD_READ) },30 SECT_4K | SPI_NOR_QUAD_READ) },
31 { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256,31 { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256,
32 SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },32 SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
33 SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
34 SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
33 { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256,35 { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256,
34 SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },36 SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
35 { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512,37 { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512,
@@ -59,6 +61,8 @@ static const struct flash_info st_parts[] = { · 23 unmodified lines
59 SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },61 SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) },
60 { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048,62 { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048,
61 SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |63 SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
64 SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB |
65 SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6 |
62 NO_CHIP_ERASE) },66 NO_CHIP_ERASE) },
63 { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048,67 { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048,
64 SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |68 SECT_4K | USE_FSR | SPI_NOR_QUAD_READ |
drivers/mtd/spi-nor/sfdp.c+18−16
@@ -21,10 +21,6 @@ · 20 unmodified lines
21#define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */21#define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
22 22
23#define SFDP_SIGNATURE 0x50444653U23#define SFDP_SIGNATURE 0x50444653U
24#define SFDP_JESD216_MAJOR 1
25#define SFDP_JESD216_MINOR 0
26#define SFDP_JESD216A_MINOR 5
27#define SFDP_JESD216B_MINOR 6
28 24
29struct sfdp_header {25struct sfdp_header {
30 u32 signature; /* Ox50444653U <=> "SFDP" */26 u32 signature; /* Ox50444653U <=> "SFDP" */
@@ -437,7 +433,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, · 406 unmodified lines
437 struct sfdp_bfpt bfpt;433 struct sfdp_bfpt bfpt;
438 size_t len;434 size_t len;
439 int i, cmd, err;435 int i, cmd, err;
440 u32 addr;436 u32 addr, val;
441 u16 half;437 u16 half;
442 u8 erase_mask;438 u8 erase_mask;
443 439
@@ -460,6 +456,7 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, · 16 unmodified lines
460 /* Number of address bytes. */456 /* Number of address bytes. */
461 switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {457 switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
462 case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:458 case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
459 case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
463 nor->addr_width = 3;460 nor->addr_width = 3;
464 break;461 break;
465 462
@@ -472,21 +469,21 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, · 6 unmodified lines
472 }469 }
473 470
474 /* Flash Memory Density (in bits). */471 /* Flash Memory Density (in bits). */
475 params->size = bfpt.dwords[BFPT_DWORD(2)];472 val = bfpt.dwords[BFPT_DWORD(2)];
476 if (params->size & BIT(31)) {473 if (val & BIT(31)) {
477 params->size &= ~BIT(31);474 val &= ~BIT(31);
478 475
479 /*476 /*
480 * Prevent overflows on params->size. Anyway, a NOR of 2^64477 * Prevent overflows on params->size. Anyway, a NOR of 2^64
481 * bits is unlikely to exist so this error probably means478 * bits is unlikely to exist so this error probably means
482 * the BFPT we are reading is corrupted/wrong.479 * the BFPT we are reading is corrupted/wrong.
483 */480 */
484 if (params->size > 63)481 if (val > 63)
485 return -EINVAL;482 return -EINVAL;
486 483
487 params->size = 1ULL << params->size;484 params->size = 1ULL << val;
488 } else {485 } else {
489 params->size++;486 params->size = val + 1;
490 }487 }
491 params->size >>= 3; /* Convert to bytes. */488 params->size >>= 3; /* Convert to bytes. */
492 489
@@ -548,15 +545,15 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, · 55 unmodified lines
548 SNOR_ERASE_TYPE_MASK;545 SNOR_ERASE_TYPE_MASK;
549 546
550 /* Stop here if not JESD216 rev A or later. */547 /* Stop here if not JESD216 rev A or later. */
551 if (bfpt_header->length < BFPT_DWORD_MAX)548 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216)
552 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt,549 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt,
553 params);550 params);
554 551
555 /* Page size: this field specifies 'N' so the page size = 2^N bytes. */552 /* Page size: this field specifies 'N' so the page size = 2^N bytes. */
556 params->page_size = bfpt.dwords[BFPT_DWORD(11)];553 val = bfpt.dwords[BFPT_DWORD(11)];
557 params->page_size &= BFPT_DWORD11_PAGE_SIZE_MASK;554 val &= BFPT_DWORD11_PAGE_SIZE_MASK;
558 params->page_size >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;555 val >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;
559 params->page_size = 1U << params->page_size;556 params->page_size = 1U << val;
560 557
561 /* Quad Enable Requirements. */558 /* Quad Enable Requirements. */
562 switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) {559 switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) {
@@ -604,6 +601,11 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor, · 41 unmodified lines
604 return -EINVAL;601 return -EINVAL;
605 }602 }
606 603
604 /* Stop here if not JESD216 rev C or later. */
605 if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)
606 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt,
607 params);
608
607 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params);609 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params);
608}610}
609 611
drivers/mtd/spi-nor/sfdp.h+9−2
@@ -7,14 +7,20 @@ · 6 unmodified lines
7#ifndef __LINUX_MTD_SFDP_H7#ifndef __LINUX_MTD_SFDP_H
8#define __LINUX_MTD_SFDP_H8#define __LINUX_MTD_SFDP_H
9 9
10/* SFDP revisions */
11#define SFDP_JESD216_MAJOR 1
12#define SFDP_JESD216_MINOR 0
13#define SFDP_JESD216A_MINOR 5
14#define SFDP_JESD216B_MINOR 6
15
10/* Basic Flash Parameter Table */16/* Basic Flash Parameter Table */
11 17
12/*18/*
13 * JESD216 rev B defines a Basic Flash Parameter Table of 16 DWORDs.19 * JESD216 rev D defines a Basic Flash Parameter Table of 20 DWORDs.
14 * They are indexed from 1 but C arrays are indexed from 0.20 * They are indexed from 1 but C arrays are indexed from 0.
15 */21 */
16#define BFPT_DWORD(i) ((i) - 1)22#define BFPT_DWORD(i) ((i) - 1)
17#define BFPT_DWORD_MAX 1623#define BFPT_DWORD_MAX 20
18 24
19struct sfdp_bfpt {25struct sfdp_bfpt {
20 u32 dwords[BFPT_DWORD_MAX];26 u32 dwords[BFPT_DWORD_MAX];
@@ -22,6 +28,7 @@ struct sfdp_bfpt { · 1 unmodified line
22 28
23/* The first version of JESD216 defined only 9 DWORDs. */29/* The first version of JESD216 defined only 9 DWORDs. */
24#define BFPT_DWORD_MAX_JESD216 930#define BFPT_DWORD_MAX_JESD216 9
31#define BFPT_DWORD_MAX_JESD216B 16
25 32
26/* 1st DWORD. */33/* 1st DWORD. */
27#define BFPT_DWORD1_FAST_READ_1_1_2 BIT(16)34#define BFPT_DWORD1_FAST_READ_1_1_2 BIT(16)
drivers/mtd/spi-nor/spansion.c+39−5
@@ -8,6 +8,27 @@ · 7 unmodified lines
8 8
9#include "core.h"9#include "core.h"
10 10
11static int
12s25fs_s_post_bfpt_fixups(struct spi_nor *nor,
13 const struct sfdp_parameter_header *bfpt_header,
14 const struct sfdp_bfpt *bfpt,
15 struct spi_nor_flash_parameter *params)
16{
17 /*
18 * The S25FS-S chip family reports 512-byte pages in BFPT but
19 * in reality the write buffer still wraps at the safe default
20 * of 256 bytes. Overwrite the page size advertised by BFPT
21 * to get the writes working.
22 */
23 params->page_size = 256;
24
25 return 0;
26}
27
28static struct spi_nor_fixups s25fs_s_fixups = {
29 .post_bfpt = s25fs_s_post_bfpt_fixups,
30};
31
11static const struct flash_info spansion_parts[] = {32static const struct flash_info spansion_parts[] = {
12 /* Spansion/Cypress -- single (large) sector size only, at least33 /* Spansion/Cypress -- single (large) sector size only, at least
13 * for the chips listed here (without boot sectors).34 * for the chips listed here (without boot sectors).
@@ -22,16 +43,27 @@ static const struct flash_info spansion_parts[] = { · 8 unmodified lines
22 { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256,43 { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256,
23 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |44 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
24 USE_CLSR) },45 USE_CLSR) },
25 { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },46 { "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128,
26 { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512,47 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
27 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |48 USE_CLSR) },
28 USE_CLSR) },49 { "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512,
50 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
51 USE_CLSR) },
29 { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256,52 { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256,
30 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |53 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
31 SPI_NOR_HAS_LOCK | USE_CLSR) },54 SPI_NOR_HAS_LOCK | USE_CLSR) },
32 { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256,55 { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256,
56 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR)
57 .fixups = &s25fs_s_fixups, },
58 { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128,
59 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
60 USE_CLSR) },
61 { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512,
33 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |62 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
34 USE_CLSR) },63 USE_CLSR) },
64 { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256,
65 SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR)
66 .fixups = &s25fs_s_fixups, },
35 { "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },67 { "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
36 { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },68 { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
37 { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },69 { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
@@ -70,6 +102,8 @@ static const struct flash_info spansion_parts[] = { · 32 unmodified lines
70 { "s25fl256l", INFO(0x016019, 0, 64 * 1024, 512,102 { "s25fl256l", INFO(0x016019, 0, 64 * 1024, 512,
71 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |103 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
72 SPI_NOR_4B_OPCODES) },104 SPI_NOR_4B_OPCODES) },
105 { "cy15x104q", INFO6(0x042cc2, 0x7f7f7f, 512 * 1024, 1,
106 SPI_NOR_NO_ERASE) },
73};107};
74 108
75static void spansion_post_sfdp_fixups(struct spi_nor *nor)109static void spansion_post_sfdp_fixups(struct spi_nor *nor)
drivers/mtd/spi-nor/winbond.c+27−2
@@ -8,6 +8,31 @@ · 7 unmodified lines
8 8
9#include "core.h"9#include "core.h"
10 10
11static int
12w25q256_post_bfpt_fixups(struct spi_nor *nor,
13 const struct sfdp_parameter_header *bfpt_header,
14 const struct sfdp_bfpt *bfpt,
15 struct spi_nor_flash_parameter *params)
16{
17 /*
18 * W25Q256JV supports 4B opcodes but W25Q256FV does not.
19 * Unfortunately, Winbond has re-used the same JEDEC ID for both
20 * variants which prevents us from defining a new entry in the parts
21 * table.
22 * To differentiate between W25Q256JV and W25Q256FV check SFDP header
23 * version: only JV has JESD216A compliant structure (version 5).
24 */
25 if (bfpt_header->major == SFDP_JESD216_MAJOR &&
26 bfpt_header->minor == SFDP_JESD216A_MINOR)
27 nor->flags |= SNOR_F_4B_OPCODES;
28
29 return 0;
30}
31
32static struct spi_nor_fixups w25q256_fixups = {
33 .post_bfpt = w25q256_post_bfpt_fixups,
34};
35
11static const struct flash_info winbond_parts[] = {36static const struct flash_info winbond_parts[] = {
12 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */37 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
13 { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1, SECT_4K) },38 { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1, SECT_4K) },
@@ -53,8 +78,8 @@ static const struct flash_info winbond_parts[] = { · 39 unmodified lines
53 { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },78 { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },
54 { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },79 { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
55 { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512,80 { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512,
56 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |81 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
57 SPI_NOR_4B_OPCODES) },82 .fixups = &w25q256_fixups },
58 { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512,83 { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512,
59 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },84 SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
60 { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512,85 { "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512,
include/linux/mtd/spi-nor.h+12−12
@@ -20,6 +20,7 @@ · 19 unmodified lines
20 */20 */
21 21
22/* Flash opcodes. */22/* Flash opcodes. */
23#define SPINOR_OP_WRDI 0x04 /* Write disable */
23#define SPINOR_OP_WREN 0x06 /* Write enable */24#define SPINOR_OP_WREN 0x06 /* Write enable */
24#define SPINOR_OP_RDSR 0x05 /* Read status register */25#define SPINOR_OP_RDSR 0x05 /* Read status register */
25#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */26#define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
@@ -80,7 +81,6 @@ · 54 unmodified lines
80 81
81/* Used for SST flashes only. */82/* Used for SST flashes only. */
82#define SPINOR_OP_BP 0x02 /* Byte program */83#define SPINOR_OP_BP 0x02 /* Byte program */
83#define SPINOR_OP_WRDI 0x04 /* Write disable */
84#define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */84#define SPINOR_OP_AAI_WP 0xad /* Auto address increment word program */
85 85
86/* Used for S3AN flashes only */86/* Used for S3AN flashes only */
@@ -302,7 +302,7 @@ struct spi_nor; · 215 unmodified lines
302 * @read: read data from the SPI NOR.302 * @read: read data from the SPI NOR.
303 * @write: write data to the SPI NOR.303 * @write: write data to the SPI NOR.
304 * @erase: erase a sector of the SPI NOR at the offset @offs; if304 * @erase: erase a sector of the SPI NOR at the offset @offs; if
305 * not provided by the driver, spi-nor will send the erase305 * not provided by the driver, SPI NOR will send the erase
306 * opcode via write_reg().306 * opcode via write_reg().
307 */307 */
308struct spi_nor_controller_ops {308struct spi_nor_controller_ops {
@@ -327,16 +327,16 @@ struct spi_nor_manufacturer; · 18 unmodified lines
327struct spi_nor_flash_parameter;327struct spi_nor_flash_parameter;
328 328
329/**329/**
330 * struct spi_nor - Structure for defining a the SPI NOR layer330 * struct spi_nor - Structure for defining the SPI NOR layer
331 * @mtd: point to a mtd_info structure331 * @mtd: an mtd_info structure
332 * @lock: the lock for the read/write/erase/lock/unlock operations332 * @lock: the lock for the read/write/erase/lock/unlock operations
333 * @dev: point to a spi device, or a spi nor controller device.333 * @dev: pointer to an SPI device or an SPI NOR controller device
334 * @spimem: point to the spi mem device334 * @spimem: pointer to the SPI memory device
335 * @bouncebuf: bounce buffer used when the buffer passed by the MTD335 * @bouncebuf: bounce buffer used when the buffer passed by the MTD
336 * layer is not DMA-able336 * layer is not DMA-able
337 * @bouncebuf_size: size of the bounce buffer337 * @bouncebuf_size: size of the bounce buffer
338 * @info: spi-nor part JDEC MFR id and other info338 * @info: SPI NOR part JEDEC MFR ID and other info
339 * @manufacturer: spi-nor manufacturer339 * @manufacturer: SPI NOR manufacturer
340 * @page_size: the page size of the SPI NOR340 * @page_size: the page size of the SPI NOR
341 * @addr_width: number of address bytes341 * @addr_width: number of address bytes
342 * @erase_opcode: the opcode for erasing a sector342 * @erase_opcode: the opcode for erasing a sector
@@ -344,17 +344,17 @@ struct spi_nor_flash_parameter; · 1 unmodified line
344 * @read_dummy: the dummy needed by the read operation344 * @read_dummy: the dummy needed by the read operation
345 * @program_opcode: the program opcode345 * @program_opcode: the program opcode
346 * @sst_write_second: used by the SST write operation346 * @sst_write_second: used by the SST write operation
347 * @flags: flag options for the current SPI-NOR (SNOR_F_*)347 * @flags: flag options for the current SPI NOR (SNOR_F_*)
348 * @read_proto: the SPI protocol for read operations348 * @read_proto: the SPI protocol for read operations
349 * @write_proto: the SPI protocol for write operations349 * @write_proto: the SPI protocol for write operations
350 * @reg_proto the SPI protocol for read_reg/write_reg/erase operations350 * @reg_proto: the SPI protocol for read_reg/write_reg/erase operations
351 * @controller_ops: SPI NOR controller driver specific operations.351 * @controller_ops: SPI NOR controller driver specific operations.
352 * @params: [FLASH-SPECIFIC] SPI-NOR flash parameters and settings.352 * @params: [FLASH-SPECIFIC] SPI NOR flash parameters and settings.
353 * The structure includes legacy flash parameters and353 * The structure includes legacy flash parameters and
354 * settings that can be overwritten by the spi_nor_fixups354 * settings that can be overwritten by the spi_nor_fixups
355 * hooks, or dynamically when parsing the SFDP tables.355 * hooks, or dynamically when parsing the SFDP tables.
356 * @dirmap: pointers to struct spi_mem_dirmap_desc for reads/writes.356 * @dirmap: pointers to struct spi_mem_dirmap_desc for reads/writes.
357 * @priv: the private data357 * @priv: pointer to the private data
358 */358 */
359struct spi_nor {359struct spi_nor {
360 struct mtd_info mtd;360 struct mtd_info mtd;

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