The vsc85xx_default_config function called in the vsc85xx_config_init function which is used by VSC8530, VSC8531, VSC8540 and VSC8541 PHYs mistakenly calls phy_read and phy_write in-between phy_select_page and phy_restore_page. phy_select_page and phy_restore_page actually take and release the MDIO bus lock and phy_write and phy_read take and release the lock to write or read to a PHY register. Let's fix this deadlock by using phy_modify_paged which handles correctly a read followed by a write in a non-standard page.
Unified · Split
| @@ -810,17 +810,13 @@ static int vsc85xx_default_config(struct phy_device *phydev) · 809 unmodified lines | ||
| 810 | 810 | |
| 811 | 811 | phydev->mdix_ctrl = ETH_TP_MDI_AUTO; |
| 812 | 812 | mutex_lock(&phydev->lock); |
| 813 | − rc = phy_select_page(phydev, MSCC_PHY_PAGE_EXTENDED_2); | |
| 814 | − if (rc < 0) | |
| 815 | − goto out_unlock; | |
| 816 | 813 | |
| 817 | − reg_val = phy_read(phydev, MSCC_PHY_RGMII_CNTL); | |
| 818 | − reg_val &= ~(RGMII_RX_CLK_DELAY_MASK); | |
| 819 | − reg_val |= (RGMII_RX_CLK_DELAY_1_1_NS << RGMII_RX_CLK_DELAY_POS); | |
| 820 | − phy_write(phydev, MSCC_PHY_RGMII_CNTL, reg_val); | |
| 814 | + reg_val = RGMII_RX_CLK_DELAY_1_1_NS << RGMII_RX_CLK_DELAY_POS; | |
| 815 | + | |
| 816 | + rc = phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2, | |
| 817 | + MSCC_PHY_RGMII_CNTL, RGMII_RX_CLK_DELAY_MASK, | |
| 818 | + reg_val); | |
| 821 | 819 | |
| 822 | −out_unlock: | |
| 823 | − rc = phy_restore_page(phydev, rc, rc > 0 ? 0 : rc); | |
| 824 | 820 | mutex_unlock(&phydev->lock); |
| 825 | 821 | |
| 826 | 822 | return rc; |