History

Merge branch 'renesas/boards2' into next/late

Conflicts: arch/arm/mach-shmobile/setup-r8a7778.c This is a dependency for the Renesas sh-sci updates.

Arnd Bergmann committed 13 years ago

Commit 4022acd2 parents 37c5a9f 2c8332212 files · +490 −77Browse files

Unified · Split

12 files
  1. arch/arm/mach-shmobile/board-ape6evm.c +15 −0
  2. arch/arm/mach-shmobile/board-bockw.c +151 −6
  3. arch/arm/mach-shmobile/board-kzm9d.c +1 −1
  4. arch/arm/mach-shmobile/board-kzm9g.c +140 −53
  5. arch/arm/mach-shmobile/board-lager.c +49 −0
  6. arch/arm/mach-shmobile/board-marzen.c +3 −2
  7. arch/arm/mach-shmobile/clock-r8a73a4.c +17 −5
  8. arch/arm/mach-shmobile/clock-r8a7778.c +22 −1
  9. arch/arm/mach-shmobile/clock-r8a7790.c +24 −7
  10. arch/arm/mach-shmobile/include/mach/r8a7778.h +5 −0
  11. arch/arm/mach-shmobile/setup-r8a7778.c +62 −1
  12. arch/arm/mach-shmobile/setup-r8a7779.c +1 −1
arch/arm/mach-shmobile/board-ape6evm.c+15−0
@@ -26,6 +26,7 @@ · 25 unmodified lines
26#include <linux/platform_device.h>26#include <linux/platform_device.h>
27#include <linux/regulator/fixed.h>27#include <linux/regulator/fixed.h>
28#include <linux/regulator/machine.h>28#include <linux/regulator/machine.h>
29#include <linux/sh_clk.h>
29#include <linux/smsc911x.h>30#include <linux/smsc911x.h>
30#include <mach/common.h>31#include <mach/common.h>
31#include <mach/irqs.h>32#include <mach/irqs.h>
@@ -65,7 +66,21 @@ static const struct pinctrl_map ape6evm_pinctrl_map[] = { · 33 unmodified lines
65 66
66static void __init ape6evm_add_standard_devices(void)67static void __init ape6evm_add_standard_devices(void)
67{68{
69
70 struct clk *parent;
71 struct clk *mp;
72
68 r8a73a4_clock_init();73 r8a73a4_clock_init();
74
75 /* MP clock parent = extal2 */
76 parent = clk_get(NULL, "extal2");
77 mp = clk_get(NULL, "mp");
78 BUG_ON(IS_ERR(parent) || IS_ERR(mp));
79
80 clk_set_parent(mp, parent);
81 clk_put(parent);
82 clk_put(mp);
83
69 pinctrl_register_mappings(ape6evm_pinctrl_map,84 pinctrl_register_mappings(ape6evm_pinctrl_map,
70 ARRAY_SIZE(ape6evm_pinctrl_map));85 ARRAY_SIZE(ape6evm_pinctrl_map));
71 r8a73a4_pinmux_init();86 r8a73a4_pinmux_init();
arch/arm/mach-shmobile/board-bockw.c+151−6
@@ -18,14 +18,52 @@ · 17 unmodified lines
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */19 */
20 20
21#include <linux/mfd/tmio.h>
22#include <linux/mmc/host.h>
23#include <linux/mtd/partitions.h>
21#include <linux/pinctrl/machine.h>24#include <linux/pinctrl/machine.h>
22#include <linux/platform_device.h>25#include <linux/platform_device.h>
26#include <linux/regulator/fixed.h>
27#include <linux/regulator/machine.h>
23#include <linux/smsc911x.h>28#include <linux/smsc911x.h>
29#include <linux/spi/spi.h>
30#include <linux/spi/flash.h>
24#include <mach/common.h>31#include <mach/common.h>
25#include <mach/irqs.h>32#include <mach/irqs.h>
26#include <mach/r8a7778.h>33#include <mach/r8a7778.h>
27#include <asm/mach/arch.h>34#include <asm/mach/arch.h>
28 35
36/*
37 * CN9(Upper side) SCIF/RCAN selection
38 *
39 * 1,4 3,6
40 * SW40 SCIF RCAN
41 * SW41 SCIF RCAN
42 */
43
44/*
45 * MMC (CN26) pin
46 *
47 * SW6 (D2) 3 pin
48 * SW7 (D5) ON
49 * SW8 (D3) 3 pin
50 * SW10 (D4) 1 pin
51 * SW12 (CLK) 1 pin
52 * SW13 (D6) 3 pin
53 * SW14 (CMD) ON
54 * SW15 (D6) 1 pin
55 * SW16 (D0) ON
56 * SW17 (D1) ON
57 * SW18 (D7) 3 pin
58 * SW19 (MMC) 1 pin
59 */
60
61/* Dummy supplies, where voltage doesn't matter */
62static struct regulator_consumer_supply dummy_supplies[] = {
63 REGULATOR_SUPPLY("vddvario", "smsc911x"),
64 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
65};
66
29static struct smsc911x_platform_config smsc911x_data = {67static struct smsc911x_platform_config smsc911x_data = {
30 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,68 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
31 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,69 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
@@ -38,29 +76,119 @@ static struct resource smsc911x_resources[] = { · 6 unmodified lines
38 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */76 DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
39};77};
40 78
79/* SDHI */
80static struct sh_mobile_sdhi_info sdhi0_info = {
81 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
82 .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
83 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
84};
85
86static struct sh_eth_plat_data ether_platform_data __initdata = {
87 .phy = 0x01,
88 .edmac_endian = EDMAC_LITTLE_ENDIAN,
89 .register_type = SH_ETH_REG_FAST_RCAR,
90 .phy_interface = PHY_INTERFACE_MODE_RMII,
91 /*
92 * Although the LINK signal is available on the board, it's connected to
93 * the link/activity LED output of the PHY, thus the link disappears and
94 * reappears after each packet. We'd be better off ignoring such signal
95 * and getting the link state from the PHY indirectly.
96 */
97 .no_ether_link = 1,
98};
99
100/* I2C */
101static struct i2c_board_info i2c0_devices[] = {
102 {
103 I2C_BOARD_INFO("rx8581", 0x51),
104 },
105};
106
107/* HSPI*/
108static struct mtd_partition m25p80_spi_flash_partitions[] = {
109 {
110 .name = "data(spi)",
111 .size = 0x0100000,
112 .offset = 0,
113 },
114};
115
116static struct flash_platform_data spi_flash_data = {
117 .name = "m25p80",
118 .type = "s25fl008k",
119 .parts = m25p80_spi_flash_partitions,
120 .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
121};
122
123static struct spi_board_info spi_board_info[] __initdata = {
124 {
125 .modalias = "m25p80",
126 .max_speed_hz = 104000000,
127 .chip_select = 0,
128 .bus_num = 0,
129 .mode = SPI_MODE_0,
130 .platform_data = &spi_flash_data,
131 },
132};
133
134/* MMC */
135static struct sh_mmcif_plat_data sh_mmcif_plat = {
136 .sup_pclk = 0,
137 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
138 .caps = MMC_CAP_4_BIT_DATA |
139 MMC_CAP_8_BIT_DATA |
140 MMC_CAP_NEEDS_POLL,
141};
142
41static const struct pinctrl_map bockw_pinctrl_map[] = {143static const struct pinctrl_map bockw_pinctrl_map[] = {
144 /* Ether */
145 PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
146 "ether_rmii", "ether"),
147 /* HSPI0 */
148 PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
149 "hspi0_a", "hspi0"),
150 /* MMC */
151 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
152 "mmc_data8", "mmc"),
153 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
154 "mmc_ctrl", "mmc"),
42 /* SCIF0 */155 /* SCIF0 */
43 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",156 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
44 "scif0_data_a", "scif0"),157 "scif0_data_a", "scif0"),
45 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",158 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
46 "scif0_ctrl", "scif0"),159 "scif0_ctrl", "scif0"),
160 /* SDHI0 */
161 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
162 "sdhi0", "sdhi0"),
47};163};
48 164
165#define FPGA 0x18200000
49#define IRQ0MR 0x30166#define IRQ0MR 0x30
167#define PFC 0xfffc0000
168#define PUPR4 0x110
50static void __init bockw_init(void)169static void __init bockw_init(void)
51{170{
52 void __iomem *fpga;171 void __iomem *base;
53 172
54 r8a7778_clock_init();173 r8a7778_clock_init();
55 r8a7778_init_irq_extpin(1);174 r8a7778_init_irq_extpin(1);
56 r8a7778_add_standard_devices();175 r8a7778_add_standard_devices();
176 r8a7778_add_ether_device(&ether_platform_data);
177 r8a7778_add_i2c_device(0);
178 r8a7778_add_hspi_device(0);
179 r8a7778_add_mmc_device(&sh_mmcif_plat);
57 180
181 i2c_register_board_info(0, i2c0_devices,
182 ARRAY_SIZE(i2c0_devices));
183 spi_register_board_info(spi_board_info,
184 ARRAY_SIZE(spi_board_info));
58 pinctrl_register_mappings(bockw_pinctrl_map,185 pinctrl_register_mappings(bockw_pinctrl_map,
59 ARRAY_SIZE(bockw_pinctrl_map));186 ARRAY_SIZE(bockw_pinctrl_map));
60 r8a7778_pinmux_init();187 r8a7778_pinmux_init();
61 188
62 fpga = ioremap_nocache(0x18200000, SZ_1M);189 /* for SMSC */
63 if (fpga) {190 base = ioremap_nocache(FPGA, SZ_1M);
191 if (base) {
64 /*192 /*
65 * CAUTION193 * CAUTION
66 *194 *
@@ -68,16 +196,33 @@ static void __init bockw_init(void) · 1 unmodified line
68 * it should be cared in the future196 * it should be cared in the future
69 * Now, it is assuming IRQ0 was used only from SMSC.197 * Now, it is assuming IRQ0 was used only from SMSC.
70 */198 */
71 u16 val = ioread16(fpga + IRQ0MR);199 u16 val = ioread16(base + IRQ0MR);
72 val &= ~(1 << 4); /* enable SMSC911x */200 val &= ~(1 << 4); /* enable SMSC911x */
73 iowrite16(val, fpga + IRQ0MR);201 iowrite16(val, base + IRQ0MR);
74 iounmap(fpga);202 iounmap(base);
203
204 regulator_register_fixed(0, dummy_supplies,
205 ARRAY_SIZE(dummy_supplies));
75 206
76 platform_device_register_resndata(207 platform_device_register_resndata(
77 &platform_bus, "smsc911x", -1,208 &platform_bus, "smsc911x", -1,
78 smsc911x_resources, ARRAY_SIZE(smsc911x_resources),209 smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
79 &smsc911x_data, sizeof(smsc911x_data));210 &smsc911x_data, sizeof(smsc911x_data));
80 }211 }
212
213 /* for SDHI */
214 base = ioremap_nocache(PFC, 0x200);
215 if (base) {
216 /*
217 * FIXME
218 *
219 * SDHI CD/WP pin needs pull-up
220 */
221 iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
222 iounmap(base);
223
224 r8a7778_sdhi_init(0, &sdhi0_info);
225 }
81}226}
82 227
83static const char *bockw_boards_compat_dt[] __initdata = {228static const char *bockw_boards_compat_dt[] __initdata = {
arch/arm/mach-shmobile/board-kzm9d.c+1−1
@@ -56,7 +56,7 @@ static struct smsc911x_platform_config smsc911x_platdata = { · 55 unmodified lines
56 56
57static struct platform_device smsc91x_device = {57static struct platform_device smsc91x_device = {
58 .name = "smsc911x",58 .name = "smsc911x",
59 .id = 0,59 .id = -1,
60 .dev = {60 .dev = {
61 .platform_data = &smsc911x_platdata,61 .platform_data = &smsc911x_platdata,
62 },62 },
arch/arm/mach-shmobile/board-kzm9g.c+140−53
@@ -29,6 +29,7 @@ · 28 unmodified lines
29#include <linux/mmc/host.h>29#include <linux/mmc/host.h>
30#include <linux/mmc/sh_mmcif.h>30#include <linux/mmc/sh_mmcif.h>
31#include <linux/mmc/sh_mobile_sdhi.h>31#include <linux/mmc/sh_mobile_sdhi.h>
32#include <linux/mfd/as3711.h>
32#include <linux/mfd/tmio.h>33#include <linux/mfd/tmio.h>
33#include <linux/pinctrl/machine.h>34#include <linux/pinctrl/machine.h>
34#include <linux/pinctrl/pinconf-generic.h>35#include <linux/pinctrl/pinconf-generic.h>
@@ -606,6 +607,140 @@ static struct platform_device fsi_ak4648_device = { · 571 unmodified lines
606};607};
607 608
608/* I2C */609/* I2C */
610
611/* StepDown1 is used to supply 1.315V to the CPU */
612static struct regulator_init_data as3711_sd1 = {
613 .constraints = {
614 .name = "1.315V CPU",
615 .boot_on = 1,
616 .always_on = 1,
617 .min_uV = 1315000,
618 .max_uV = 1335000,
619 },
620};
621
622/* StepDown2 is used to supply 1.8V to the CPU and to the board */
623static struct regulator_init_data as3711_sd2 = {
624 .constraints = {
625 .name = "1.8V",
626 .boot_on = 1,
627 .always_on = 1,
628 .min_uV = 1800000,
629 .max_uV = 1800000,
630 },
631};
632
633/*
634 * StepDown3 is switched in parallel with StepDown2, seems to be off,
635 * according to read-back pre-set register values
636 */
637
638/* StepDown4 is used to supply 1.215V to the CPU and to the board */
639static struct regulator_init_data as3711_sd4 = {
640 .constraints = {
641 .name = "1.215V",
642 .boot_on = 1,
643 .always_on = 1,
644 .min_uV = 1215000,
645 .max_uV = 1235000,
646 },
647};
648
649/* LDO1 is unused and unconnected */
650
651/* LDO2 is used to supply 2.8V to the CPU */
652static struct regulator_init_data as3711_ldo2 = {
653 .constraints = {
654 .name = "2.8V CPU",
655 .boot_on = 1,
656 .always_on = 1,
657 .min_uV = 2800000,
658 .max_uV = 2800000,
659 },
660};
661
662/* LDO3 is used to supply 3.0V to the CPU */
663static struct regulator_init_data as3711_ldo3 = {
664 .constraints = {
665 .name = "3.0V CPU",
666 .boot_on = 1,
667 .always_on = 1,
668 .min_uV = 3000000,
669 .max_uV = 3000000,
670 },
671};
672
673/* LDO4 is used to supply 2.8V to the board */
674static struct regulator_init_data as3711_ldo4 = {
675 .constraints = {
676 .name = "2.8V",
677 .boot_on = 1,
678 .always_on = 1,
679 .min_uV = 2800000,
680 .max_uV = 2800000,
681 },
682};
683
684/* LDO5 is switched parallel to LDO4, also set to 2.8V */
685static struct regulator_init_data as3711_ldo5 = {
686 .constraints = {
687 .name = "2.8V #2",
688 .boot_on = 1,
689 .always_on = 1,
690 .min_uV = 2800000,
691 .max_uV = 2800000,
692 },
693};
694
695/* LDO6 is unused and unconnected */
696
697/* LDO7 is used to supply 1.15V to the CPU */
698static struct regulator_init_data as3711_ldo7 = {
699 .constraints = {
700 .name = "1.15V CPU",
701 .boot_on = 1,
702 .always_on = 1,
703 .min_uV = 1150000,
704 .max_uV = 1150000,
705 },
706};
707
708/* LDO8 is switched parallel to LDO7, also set to 1.15V */
709static struct regulator_init_data as3711_ldo8 = {
710 .constraints = {
711 .name = "1.15V CPU #2",
712 .boot_on = 1,
713 .always_on = 1,
714 .min_uV = 1150000,
715 .max_uV = 1150000,
716 },
717};
718
719static struct as3711_platform_data as3711_pdata = {
720 .regulator = {
721 .init_data = {
722 [AS3711_REGULATOR_SD_1] = &as3711_sd1,
723 [AS3711_REGULATOR_SD_2] = &as3711_sd2,
724 [AS3711_REGULATOR_SD_4] = &as3711_sd4,
725 [AS3711_REGULATOR_LDO_2] = &as3711_ldo2,
726 [AS3711_REGULATOR_LDO_3] = &as3711_ldo3,
727 [AS3711_REGULATOR_LDO_4] = &as3711_ldo4,
728 [AS3711_REGULATOR_LDO_5] = &as3711_ldo5,
729 [AS3711_REGULATOR_LDO_7] = &as3711_ldo7,
730 [AS3711_REGULATOR_LDO_8] = &as3711_ldo8,
731 },
732 },
733 .backlight = {
734 .su2_fb = "sh_mobile_lcdc_fb.0",
735 .su2_max_uA = 36000,
736 .su2_feedback = AS3711_SU2_CURR_AUTO,
737 .su2_fbprot = AS3711_SU2_GPIO4,
738 .su2_auto_curr1 = true,
739 .su2_auto_curr2 = true,
740 .su2_auto_curr3 = true,
741 },
742};
743
609static struct pcf857x_platform_data pcf8575_pdata = {744static struct pcf857x_platform_data pcf8575_pdata = {
610 .gpio_base = GPIO_PCF8575_BASE,745 .gpio_base = GPIO_PCF8575_BASE,
611};746};
@@ -625,6 +760,11 @@ static struct i2c_board_info i2c0_devices[] = { · 13 unmodified lines
625 I2C_BOARD_INFO("adxl34x", 0x1d),760 I2C_BOARD_INFO("adxl34x", 0x1d),
626 .irq = irq_pin(26), /* IRQ26 */761 .irq = irq_pin(26), /* IRQ26 */
627 },762 },
763 {
764 I2C_BOARD_INFO("as3711", 0x40),
765 .irq = intcs_evt2irq(0x3300), /* IRQ24 */
766 .platform_data = &as3711_pdata,
767 },
628};768};
629 769
630static struct i2c_board_info i2c1_devices[] = {770static struct i2c_board_info i2c1_devices[] = {
@@ -715,59 +855,6 @@ static const struct pinctrl_map kzm_pinctrl_map[] = { · 84 unmodified lines
715 "usb_vbus", "usb"),855 "usb_vbus", "usb"),
716};856};
717 857
718/*
719 * FIXME
720 *
721 * This is quick hack for enabling LCDC backlight
722 */
723static int __init as3711_enable_lcdc_backlight(void)
724{
725 struct i2c_adapter *a = i2c_get_adapter(0);
726 struct i2c_msg msg;
727 int i, ret;
728 __u8 magic[] = {
729 0x40, 0x2a,
730 0x43, 0x3c,
731 0x44, 0x3c,
732 0x45, 0x3c,
733 0x54, 0x03,
734 0x51, 0x00,
735 0x51, 0x01,
736 0xff, 0x00, /* wait */
737 0x43, 0xf0,
738 0x44, 0xf0,
739 0x45, 0xf0,
740 };
741
742 if (!of_machine_is_compatible("renesas,kzm9g"))
743 return 0;
744
745 if (!a)
746 return 0;
747
748 msg.addr = 0x40;
749 msg.len = 2;
750 msg.flags = 0;
751
752 for (i = 0; i < ARRAY_SIZE(magic); i += 2) {
753 msg.buf = magic + i;
754
755 if (0xff == msg.buf[0]) {
756 udelay(500);
757 continue;
758 }
759
760 ret = i2c_transfer(a, &msg, 1);
761 if (ret < 0) {
762 pr_err("i2c transfer fail\n");
763 break;
764 }
765 }
766
767 return 0;
768}
769device_initcall(as3711_enable_lcdc_backlight);
770
771static void __init kzm_init(void)858static void __init kzm_init(void)
772{859{
773 regulator_register_always_on(2, "fixed-1.8V", fixed1v8_power_consumers,860 regulator_register_always_on(2, "fixed-1.8V", fixed1v8_power_consumers,
arch/arm/mach-shmobile/board-lager.c+49−0
@@ -18,16 +18,59 @@ · 17 unmodified lines
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */19 */
20 20
21#include <linux/gpio.h>
22#include <linux/gpio_keys.h>
23#include <linux/input.h>
21#include <linux/interrupt.h>24#include <linux/interrupt.h>
22#include <linux/irqchip.h>25#include <linux/irqchip.h>
23#include <linux/kernel.h>26#include <linux/kernel.h>
27#include <linux/leds.h>
24#include <linux/pinctrl/machine.h>28#include <linux/pinctrl/machine.h>
29#include <linux/platform_data/gpio-rcar.h>
25#include <linux/platform_device.h>30#include <linux/platform_device.h>
26#include <mach/common.h>31#include <mach/common.h>
27#include <mach/r8a7790.h>32#include <mach/r8a7790.h>
28#include <asm/mach-types.h>33#include <asm/mach-types.h>
29#include <asm/mach/arch.h>34#include <asm/mach/arch.h>
30 35
36/* LEDS */
37static struct gpio_led lager_leds[] = {
38 {
39 .name = "led8",
40 .gpio = RCAR_GP_PIN(5, 17),
41 .default_state = LEDS_GPIO_DEFSTATE_ON,
42 }, {
43 .name = "led7",
44 .gpio = RCAR_GP_PIN(4, 23),
45 .default_state = LEDS_GPIO_DEFSTATE_ON,
46 }, {
47 .name = "led6",
48 .gpio = RCAR_GP_PIN(4, 22),
49 .default_state = LEDS_GPIO_DEFSTATE_ON,
50 },
51};
52
53static __initdata struct gpio_led_platform_data lager_leds_pdata = {
54 .leds = lager_leds,
55 .num_leds = ARRAY_SIZE(lager_leds),
56};
57
58/* GPIO KEY */
59#define GPIO_KEY(c, g, d, ...) \
60 { .code = c, .gpio = g, .desc = d, .active_low = 1 }
61
62static __initdata struct gpio_keys_button gpio_buttons[] = {
63 GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
64 GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
65 GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
66 GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
67};
68
69static __initdata struct gpio_keys_platform_data lager_keys_pdata = {
70 .buttons = gpio_buttons,
71 .nbuttons = ARRAY_SIZE(gpio_buttons),
72};
73
31static const struct pinctrl_map lager_pinctrl_map[] = {74static const struct pinctrl_map lager_pinctrl_map[] = {
32 /* SCIF0 (CN19: DEBUG SERIAL0) */75 /* SCIF0 (CN19: DEBUG SERIAL0) */
33 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",76 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
@@ -46,6 +89,12 @@ static void __init lager_add_standard_devices(void) · 12 unmodified lines
46 r8a7790_pinmux_init();89 r8a7790_pinmux_init();
47 90
48 r8a7790_add_standard_devices();91 r8a7790_add_standard_devices();
92 platform_device_register_data(&platform_bus, "leds-gpio", -1,
93 &lager_leds_pdata,
94 sizeof(lager_leds_pdata));
95 platform_device_register_data(&platform_bus, "gpio-keys", -1,
96 &lager_keys_pdata,
97 sizeof(lager_keys_pdata));
49}98}
50 99
51static const char *lager_boards_compat_dt[] __initdata = {100static const char *lager_boards_compat_dt[] __initdata = {
arch/arm/mach-shmobile/board-marzen.c+3−2
@@ -69,7 +69,7 @@ static struct resource smsc911x_resources[] = { · 68 unmodified lines
69 .flags = IORESOURCE_MEM,69 .flags = IORESOURCE_MEM,
70 },70 },
71 [1] = {71 [1] = {
72 .start = gic_iid(0x3c), /* IRQ 1 */72 .start = irq_pin(1), /* IRQ 1 */
73 .flags = IORESOURCE_IRQ,73 .flags = IORESOURCE_IRQ,
74 },74 },
75};75};
@@ -350,7 +350,7 @@ static struct platform_device *marzen_late_devices[] __initdata = { · 274 unmodified lines
350 &ohci1_device,350 &ohci1_device,
351};351};
352 352
353void __init marzen_init_late(void)353static void __init marzen_init_late(void)
354{354{
355 /* get usb phy */355 /* get usb phy */
356 phy = usb_get_phy(USB_PHY_TYPE_USB2);356 phy = usb_get_phy(USB_PHY_TYPE_USB2);
@@ -405,6 +405,7 @@ static void __init marzen_init(void) · 48 unmodified lines
405 pinctrl_register_mappings(marzen_pinctrl_map,405 pinctrl_register_mappings(marzen_pinctrl_map,
406 ARRAY_SIZE(marzen_pinctrl_map));406 ARRAY_SIZE(marzen_pinctrl_map));
407 r8a7779_pinmux_init();407 r8a7779_pinmux_init();
408 r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
408 409
409 r8a7779_add_standard_devices();410 r8a7779_add_standard_devices();
410 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));411 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
arch/arm/mach-shmobile/clock-r8a73a4.c+17−5
@@ -29,6 +29,7 @@ · 28 unmodified lines
29#define CPG_LEN 0x27029#define CPG_LEN 0x270
30 30
31#define SMSTPCR2 0xe615013831#define SMSTPCR2 0xe6150138
32#define SMSTPCR3 0xe615013c
32#define SMSTPCR5 0xe615014433#define SMSTPCR5 0xe6150144
33 34
34#define FRQCRA 0xE615000035#define FRQCRA 0xE6150000
@@ -348,6 +349,7 @@ static struct clk div6_clks[DIV6_NR] = { · 313 unmodified lines
348/* MSTP */349/* MSTP */
349enum {350enum {
350 MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,351 MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
352 MSTP315, MSTP314, MSTP313, MSTP312, MSTP305,
351 MSTP522,353 MSTP522,
352 MSTP_NR354 MSTP_NR
353};355};
@@ -359,6 +361,11 @@ static struct clk mstp_clks[MSTP_NR] = { · 5 unmodified lines
359 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */361 [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
360 [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */362 [MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
361 [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */363 [MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
364 [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
365 [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
366 [MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */
367 [MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */
368 [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */
362 [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */369 [MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
363};370};
364 371
@@ -381,11 +388,6 @@ static struct clk_lookup lookups[] = { · 16 unmodified lines
381 388
382 /* DIV6 */389 /* DIV6 */
383 CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),390 CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),
384 CLKDEV_CON_ID("sdhi0", &div6_clks[DIV6_SDHI0]),
385 CLKDEV_CON_ID("sdhi1", &div6_clks[DIV6_SDHI1]),
386 CLKDEV_CON_ID("sdhi2", &div6_clks[DIV6_SDHI2]),
387 CLKDEV_CON_ID("mmc0", &div6_clks[DIV6_MMC0]),
388 CLKDEV_CON_ID("mmc1", &div6_clks[DIV6_MMC1]),
389 CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]),391 CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]),
390 CLKDEV_CON_ID("vck2", &div6_clks[DIV6_VCK2]),392 CLKDEV_CON_ID("vck2", &div6_clks[DIV6_VCK2]),
391 CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]),393 CLKDEV_CON_ID("vck3", &div6_clks[DIV6_VCK3]),
@@ -406,6 +408,16 @@ static struct clk_lookup lookups[] = { · 14 unmodified lines
406 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),408 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
407 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),409 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
408 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),410 CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
411 CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
412 CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
413 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
414 CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
415 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
416 CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
417 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
418 CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
419 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
420 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
409 421
410 /* for DT */422 /* for DT */
411 CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),423 CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
arch/arm/mach-shmobile/clock-r8a7778.c+22−1
@@ -103,17 +103,25 @@ static struct clk *main_clks[] = { · 102 unmodified lines
103};103};
104 104
105enum {105enum {
106 MSTP331,
106 MSTP323, MSTP322, MSTP321,107 MSTP323, MSTP322, MSTP321,
107 MSTP114,108 MSTP114,
108 MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,109 MSTP030,
110 MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
109 MSTP016, MSTP015,111 MSTP016, MSTP015,
112 MSTP007,
110 MSTP_NR };113 MSTP_NR };
111 114
112static struct clk mstp_clks[MSTP_NR] = {115static struct clk mstp_clks[MSTP_NR] = {
116 [MSTP331] = SH_CLK_MSTP32(&s4_clk, MSTPCR3, 31, 0), /* MMC */
113 [MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */117 [MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
114 [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */118 [MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
115 [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */119 [MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
116 [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */120 [MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
121 [MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */
122 [MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */
123 [MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */
124 [MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */
117 [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */125 [MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */
118 [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */126 [MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */
119 [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */127 [MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
@@ -122,14 +130,24 @@ static struct clk mstp_clks[MSTP_NR] = { · 2 unmodified lines
122 [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */130 [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
123 [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */131 [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
124 [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */132 [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
133 [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */
125};134};
126 135
127static struct clk_lookup lookups[] = {136static struct clk_lookup lookups[] = {
137 /* main */
138 CLKDEV_CON_ID("shyway_clk", &s_clk),
139 CLKDEV_CON_ID("peripheral_clk", &p_clk),
140
128 /* MSTP32 clocks */141 /* MSTP32 clocks */
142 CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
129 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */143 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
130 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */144 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
131 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */145 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
132 CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */146 CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
147 CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
148 CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
149 CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
150 CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
133 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */151 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
134 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */152 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
135 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */153 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
@@ -138,6 +156,9 @@ static struct clk_lookup lookups[] = { · 2 unmodified lines
138 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */156 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
139 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */157 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
140 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */158 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
159 CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
160 CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
161 CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
141};162};
142 163
143void __init r8a7778_clock_init(void)164void __init r8a7778_clock_init(void)
arch/arm/mach-shmobile/clock-r8a7790.c+24−7
@@ -181,7 +181,8 @@ static struct clk div6_clks[DIV6_NR] = { · 180 unmodified lines
181/* MSTP */181/* MSTP */
182enum {182enum {
183 MSTP721, MSTP720,183 MSTP721, MSTP720,
184 MSTP304,184 MSTP717, MSTP716,
185 MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
185 MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,186 MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
186 MSTP_NR187 MSTP_NR
187};188};
@@ -189,6 +190,12 @@ enum { · 1 unmodified line
189static struct clk mstp_clks[MSTP_NR] = {190static struct clk mstp_clks[MSTP_NR] = {
190 [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */191 [MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
191 [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */192 [MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
193 [MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
194 [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
195 [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
196 [MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SD2], SMSTPCR3, 12, 0), /* SDHI2 */
197 [MSTP311] = SH_CLK_MSTP32(&div6_clks[DIV6_SD3], SMSTPCR3, 11, 0), /* SDHI3 */
198 [MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, 0), /* MMC1 */
192 [MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */199 [MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */
193 [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */200 [MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
194 [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */201 [MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
@@ -196,6 +203,8 @@ static struct clk mstp_clks[MSTP_NR] = { · 1 unmodified line
196 [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */203 [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
197 [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */204 [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
198 [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */205 [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
206 [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
207 [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
199};208};
200 209
201static struct clk_lookup lookups[] = {210static struct clk_lookup lookups[] = {
@@ -229,14 +238,8 @@ static struct clk_lookup lookups[] = { · 27 unmodified lines
229 238
230 /* DIV4 */239 /* DIV4 */
231 CLKDEV_CON_ID("sdh", &div4_clks[DIV4_SDH]),240 CLKDEV_CON_ID("sdh", &div4_clks[DIV4_SDH]),
232 CLKDEV_CON_ID("sd0", &div4_clks[DIV4_SD0]),
233 CLKDEV_CON_ID("sd1", &div4_clks[DIV4_SD1]),
234 241
235 /* DIV6 */242 /* DIV6 */
236 CLKDEV_CON_ID("sd2", &div6_clks[DIV6_SD2]),
237 CLKDEV_CON_ID("sd3", &div6_clks[DIV6_SD3]),
238 CLKDEV_CON_ID("mmc0", &div6_clks[DIV6_MMC0]),
239 CLKDEV_CON_ID("mmc1", &div6_clks[DIV6_MMC1]),
240 CLKDEV_CON_ID("ssp", &div6_clks[DIV6_SSP]),243 CLKDEV_CON_ID("ssp", &div6_clks[DIV6_SSP]),
241 CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),244 CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),
242 245
@@ -249,6 +252,20 @@ static struct clk_lookup lookups[] = { · 6 unmodified lines
249 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]),252 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]),
250 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]),253 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]),
251 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),254 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
255 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
256 CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
257 CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
258 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
259 CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
260 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
261 CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
262 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
263 CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
264 CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
265 CLKDEV_DEV_ID("ee160000.sdhi", &mstp_clks[MSTP311]),
266 CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
267 CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
268 CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
252};269};
253 270
254#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \271#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
arch/arm/mach-shmobile/include/mach/r8a7778.h+5−0
@@ -18,12 +18,17 @@ · 17 unmodified lines
18#ifndef __ASM_R8A7778_H__18#ifndef __ASM_R8A7778_H__
19#define __ASM_R8A7778_H__19#define __ASM_R8A7778_H__
20 20
21#include <linux/mmc/sh_mmcif.h>
21#include <linux/mmc/sh_mobile_sdhi.h>22#include <linux/mmc/sh_mobile_sdhi.h>
22#include <linux/sh_eth.h>23#include <linux/sh_eth.h>
23 24
24extern void r8a7778_add_standard_devices(void);25extern void r8a7778_add_standard_devices(void);
25extern void r8a7778_add_standard_devices_dt(void);26extern void r8a7778_add_standard_devices_dt(void);
26extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);27extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
28extern void r8a7778_add_i2c_device(int id);
29extern void r8a7778_add_hspi_device(int id);
30extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
31
27extern void r8a7778_init_delay(void);32extern void r8a7778_init_delay(void);
28extern void r8a7778_init_irq(void);33extern void r8a7778_init_irq(void);
29extern void r8a7778_init_irq_dt(void);34extern void r8a7778_init_irq_dt(void);
arch/arm/mach-shmobile/setup-r8a7778.c+62−1
@@ -97,7 +97,7 @@ static struct resource ether_resources[] = { · 96 unmodified lines
97 97
98void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)98void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
99{99{
100 platform_device_register_resndata(&platform_bus, "sh_eth", -1,100 platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
101 ether_resources,101 ether_resources,
102 ARRAY_SIZE(ether_resources),102 ARRAY_SIZE(ether_resources),
103 pdata, sizeof(*pdata));103 pdata, sizeof(*pdata));
@@ -173,6 +173,67 @@ void __init r8a7778_sdhi_init(int id, · 69 unmodified lines
173 info, sizeof(*info));173 info, sizeof(*info));
174}174}
175 175
176/* I2C */
177static struct resource i2c_resources[] __initdata = {
178 /* I2C0 */
179 DEFINE_RES_MEM(0xffc70000, 0x1000),
180 DEFINE_RES_IRQ(gic_iid(0x63)),
181 /* I2C1 */
182 DEFINE_RES_MEM(0xffc71000, 0x1000),
183 DEFINE_RES_IRQ(gic_iid(0x6e)),
184 /* I2C2 */
185 DEFINE_RES_MEM(0xffc72000, 0x1000),
186 DEFINE_RES_IRQ(gic_iid(0x6c)),
187 /* I2C3 */
188 DEFINE_RES_MEM(0xffc73000, 0x1000),
189 DEFINE_RES_IRQ(gic_iid(0x6d)),
190};
191
192void __init r8a7778_add_i2c_device(int id)
193{
194 BUG_ON(id < 0 || id > 3);
195
196 platform_device_register_simple(
197 "i2c-rcar", id,
198 i2c_resources + (2 * id), 2);
199}
200
201/* HSPI */
202static struct resource hspi_resources[] __initdata = {
203 /* HSPI0 */
204 DEFINE_RES_MEM(0xfffc7000, 0x18),
205 DEFINE_RES_IRQ(gic_iid(0x5f)),
206 /* HSPI1 */
207 DEFINE_RES_MEM(0xfffc8000, 0x18),
208 DEFINE_RES_IRQ(gic_iid(0x74)),
209 /* HSPI2 */
210 DEFINE_RES_MEM(0xfffc6000, 0x18),
211 DEFINE_RES_IRQ(gic_iid(0x75)),
212};
213
214void __init r8a7778_add_hspi_device(int id)
215{
216 BUG_ON(id < 0 || id > 2);
217
218 platform_device_register_simple(
219 "sh-hspi", id,
220 hspi_resources + (2 * id), 2);
221}
222
223/* MMC */
224static struct resource mmc_resources[] __initdata = {
225 DEFINE_RES_MEM(0xffe4e000, 0x100),
226 DEFINE_RES_IRQ(gic_iid(0x5d)),
227};
228
229void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info)
230{
231 platform_device_register_resndata(
232 &platform_bus, "sh_mmcif", -1,
233 mmc_resources, ARRAY_SIZE(mmc_resources),
234 info, sizeof(*info));
235}
236
176void __init r8a7778_add_standard_devices(void)237void __init r8a7778_add_standard_devices(void)
177{238{
178 int i;239 int i;
arch/arm/mach-shmobile/setup-r8a7779.c+1−1
@@ -432,7 +432,7 @@ void __init r8a7779_add_standard_devices(void) · 431 unmodified lines
432 432
433void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)433void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
434{434{
435 platform_device_register_resndata(&platform_bus, "sh_eth", -1,435 platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
436 ether_resources,436 ether_resources,
437 ARRAY_SIZE(ether_resources),437 ARRAY_SIZE(ether_resources),
438 pdata, sizeof(*pdata));438 pdata, sizeof(*pdata));