History

Merge tag 'irqchip-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates from Marc Zyngier: - Qualcomm PDC wakeup interrupt support - Layerscape external IRQ support - Broadcom bcm7038 PM and wakeup support - Ingenic driver cleanup and modernization - GICv3 ITS preparation for GICv4.1 updates - GICv4 fixes - Various cleanups

Thomas Gleixner committed 6 years ago

Commit 407e62f2 parents 20a15ee 585d11824 files · +1041 −160Browse files

Showing the changes to include/linux (5 of 24 files). Show all

Unified · Split

5 files
  1. include/linux/irq.h +6 −0
  2. include/linux/irqchip/arm-gic-v3.h +2 −2
  3. include/linux/irqchip/ingenic.h +0 −14
  4. include/linux/irqdomain.h +1 −0
  5. include/linux/soc/qcom/irq.h +34 −0
include/linux/irq.h+6−0
@@ -610,6 +610,12 @@ extern int irq_chip_pm_put(struct irq_data *data); · 609 unmodified lines
610#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY610#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
611extern void handle_fasteoi_ack_irq(struct irq_desc *desc);611extern void handle_fasteoi_ack_irq(struct irq_desc *desc);
612extern void handle_fasteoi_mask_irq(struct irq_desc *desc);612extern void handle_fasteoi_mask_irq(struct irq_desc *desc);
613extern int irq_chip_set_parent_state(struct irq_data *data,
614 enum irqchip_irq_state which,
615 bool val);
616extern int irq_chip_get_parent_state(struct irq_data *data,
617 enum irqchip_irq_state which,
618 bool *state);
613extern void irq_chip_enable_parent(struct irq_data *data);619extern void irq_chip_enable_parent(struct irq_data *data);
614extern void irq_chip_disable_parent(struct irq_data *data);620extern void irq_chip_disable_parent(struct irq_data *data);
615extern void irq_chip_ack_parent(struct irq_data *data);621extern void irq_chip_ack_parent(struct irq_data *data);
include/linux/irqchip/arm-gic-v3.h+2−2
@@ -334,10 +334,10 @@ · 333 unmodified lines
334#define GITS_TYPER_PLPIS (1UL << 0)334#define GITS_TYPER_PLPIS (1UL << 0)
335#define GITS_TYPER_VLPIS (1UL << 1)335#define GITS_TYPER_VLPIS (1UL << 1)
336#define GITS_TYPER_ITT_ENTRY_SIZE_SHIFT 4336#define GITS_TYPER_ITT_ENTRY_SIZE_SHIFT 4
337#define GITS_TYPER_ITT_ENTRY_SIZE(r) ((((r) >> GITS_TYPER_ITT_ENTRY_SIZE_SHIFT) & 0xf) + 1)337#define GITS_TYPER_ITT_ENTRY_SIZE GENMASK_ULL(7, 4)
338#define GITS_TYPER_IDBITS_SHIFT 8338#define GITS_TYPER_IDBITS_SHIFT 8
339#define GITS_TYPER_DEVBITS_SHIFT 13339#define GITS_TYPER_DEVBITS_SHIFT 13
340#define GITS_TYPER_DEVBITS(r) ((((r) >> GITS_TYPER_DEVBITS_SHIFT) & 0x1f) + 1)340#define GITS_TYPER_DEVBITS GENMASK_ULL(17, 13)
341#define GITS_TYPER_PTA (1UL << 19)341#define GITS_TYPER_PTA (1UL << 19)
342#define GITS_TYPER_HCC_SHIFT 24342#define GITS_TYPER_HCC_SHIFT 24
343#define GITS_TYPER_HCC(r) (((r) >> GITS_TYPER_HCC_SHIFT) & 0xff)343#define GITS_TYPER_HCC(r) (((r) >> GITS_TYPER_HCC_SHIFT) & 0xff)
include/linux/irqchip/ingenic.h+0−14
@@ -1,14 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
4 */
5
6#ifndef __LINUX_IRQCHIP_INGENIC_H__
7#define __LINUX_IRQCHIP_INGENIC_H__
8
9#include <linux/irq.h>
10
11extern void ingenic_intc_irq_suspend(struct irq_data *data);
12extern void ingenic_intc_irq_resume(struct irq_data *data);
13
14#endif
include/linux/irqdomain.h+1−0
@@ -83,6 +83,7 @@ enum irq_domain_bus_token { · 82 unmodified lines
83 DOMAIN_BUS_IPI,83 DOMAIN_BUS_IPI,
84 DOMAIN_BUS_FSL_MC_MSI,84 DOMAIN_BUS_FSL_MC_MSI,
85 DOMAIN_BUS_TI_SCI_INTA_MSI,85 DOMAIN_BUS_TI_SCI_INTA_MSI,
86 DOMAIN_BUS_WAKEUP,
86};87};
87 88
88/**89/**
include/linux/soc/qcom/irq.h+34−0
@@ -0,0 +1,34 @@
1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#ifndef __QCOM_IRQ_H
4#define __QCOM_IRQ_H
5
6#include <linux/irqdomain.h>
7
8#define GPIO_NO_WAKE_IRQ ~0U
9
10/**
11 * QCOM specific IRQ domain flags that distinguishes the handling of wakeup
12 * capable interrupts by different interrupt controllers.
13 *
14 * IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP: Line must be masked at TLMM and the
15 * interrupt configuration is done at PDC
16 * IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP: Interrupt configuration is handled at TLMM
17 */
18#define IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 0)
19#define IRQ_DOMAIN_FLAG_QCOM_MPM_WAKEUP (IRQ_DOMAIN_FLAG_NONCORE << 1)
20
21/**
22 * irq_domain_qcom_handle_wakeup: Return if the domain handles interrupt
23 * configuration
24 * @d: irq domain
25 *
26 * This QCOM specific irq domain call returns if the interrupt controller
27 * requires the interrupt be masked at the child interrupt controller.
28 */
29static inline bool irq_domain_qcom_handle_wakeup(const struct irq_domain *d)
30{
31 return (d->flags & IRQ_DOMAIN_FLAG_QCOM_PDC_WAKEUP);
32}
33
34#endif

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