lael-labs/linux

.mailmap+1−0

@@ -17,6 +17,7 @@ Aleksey Gorelov <aleksey_gorelov@phoenix.com> · 16 unmodified lines
17	Al Viro <viro@ftp.linux.org.uk>	17	Al Viro <viro@ftp.linux.org.uk>
18	Al Viro <viro@zenIV.linux.org.uk>	18	Al Viro <viro@zenIV.linux.org.uk>
19	Andreas Herrmann <aherrman@de.ibm.com>	19	Andreas Herrmann <aherrman@de.ibm.com>
		20	Andrey Ryabinin <ryabinin.a.a@gmail.com> <a.ryabinin@samsung.com>
20	Andrew Morton <akpm@linux-foundation.org>	21	Andrew Morton <akpm@linux-foundation.org>
21	Andrew Vasquez <andrew.vasquez@qlogic.com>	22	Andrew Vasquez <andrew.vasquez@qlogic.com>
22	Andy Adamson <andros@citi.umich.edu>	23	Andy Adamson <andros@citi.umich.edu>

Documentation/devicetree/bindings/arm/cpus.txt+1−0

@@ -199,6 +199,7 @@ nodes to be present and contain the properties described below. · 198 unmodified lines
199	"qcom,kpss-acc-v1"	199	"qcom,kpss-acc-v1"
200	"qcom,kpss-acc-v2"	200	"qcom,kpss-acc-v2"
201	"rockchip,rk3066-smp"	201	"rockchip,rk3066-smp"
		202	"ste,dbx500-smp"
202		203
203	- cpu-release-addr	204	- cpu-release-addr
204	Usage: required for systems that have an "enable-method"	205	Usage: required for systems that have an "enable-method"

Documentation/devicetree/bindings/dma/apm-xgene-dma.txt+1−1

@@ -35,7 +35,7 @@ Example: · 34 unmodified lines
35	device_type = "dma";	35	device_type = "dma";
36	reg = <0x0 0x1f270000 0x0 0x10000>,	36	reg = <0x0 0x1f270000 0x0 0x10000>,
37	<0x0 0x1f200000 0x0 0x10000>,	37	<0x0 0x1f200000 0x0 0x10000>,
38	<0x0 0x1b008000 0x0 0x2000>,	38	<0x0 0x1b000000 0x0 0x400000>,
39	<0x0 0x1054a000 0x0 0x100>;	39	<0x0 0x1054a000 0x0 0x100>;
40	interrupts = <0x0 0x82 0x4>,	40	interrupts = <0x0 0x82 0x4>,
41	<0x0 0xb8 0x4>,	41	<0x0 0xb8 0x4>,

Documentation/devicetree/bindings/phy/ti-phy.txt+16−0

@@ -82,6 +82,9 @@ Optional properties: · 81 unmodified lines
82	- id: If there are multiple instance of the same type, in order to	82	- id: If there are multiple instance of the same type, in order to
83	differentiate between each instance "id" can be used (e.g., multi-lane PCIe	83	differentiate between each instance "id" can be used (e.g., multi-lane PCIe
84	PHY). If "id" is not provided, it is set to default value of '1'.	84	PHY). If "id" is not provided, it is set to default value of '1'.
		85	- syscon-pllreset: Handle to system control region that contains the
		86	CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
		87	register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
85		88
86	This is usually a subnode of ocp2scp to which it is connected.	89	This is usually a subnode of ocp2scp to which it is connected.
87		90
@@ -100,3 +103,16 @@ usb3phy@4a084400 { · 12 unmodified lines
100	"sysclk",	103	"sysclk",
101	"refclk";	104	"refclk";
102	};	105	};
		106
		107	sata_phy: phy@4A096000 {
		108	compatible = "ti,phy-pipe3-sata";
		109	reg = <0x4A096000 0x80>, /* phy_rx */
		110	<0x4A096400 0x64>, /* phy_tx */
		111	<0x4A096800 0x40>; /* pll_ctrl */
		112	reg-names = "phy_rx", "phy_tx", "pll_ctrl";
		113	ctrl-module = <&omap_control_sata>;
		114	clocks = <&sys_clkin1>, <&sata_ref_clk>;
		115	clock-names = "sysclk", "refclk";
		116	syscon-pllreset = <&scm_conf 0x3fc>;
		117	#phy-cells = <0>;
		118	};

Documentation/devicetree/bindings/sound/mt8173-max98090.txt+2−0

 Required properties:
 - compatible : "mediatek,mt8173-max98090"
 - mediatek,audio-codec: the phandle of the MAX98090 audio codec
+- mediatek,platform: the phandle of MT8173 ASoC platform
 Example:
 	sound {
 		compatible = "mediatek,mt8173-max98090";
 		mediatek,audio-codec = <&max98090>;
+		mediatek,platform = <&afe>;
 	};

Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt+2−0

 Required properties:
 - compatible : "mediatek,mt8173-rt5650-rt5676"
 - mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs
+- mediatek,platform: the phandle of MT8173 ASoC platform
 Example:
 	sound {
 		compatible = "mediatek,mt8173-rt5650-rt5676";
 		mediatek,audio-codec = <&rt5650 &rt5676>;
+		mediatek,platform = <&afe>;
 	};

Documentation/devicetree/bindings/spi/spi-ath79.txt+3−3

@@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller · 2 unmodified lines
3	Required properties:	3	Required properties:
4	- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.	4	- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
5	- reg: Base address and size of the controllers memory area	5	- reg: Base address and size of the controllers memory area
6	- clocks: phandle to the AHB clock.	6	- clocks: phandle of the AHB clock.
7	- clock-names: has to be "ahb".	7	- clock-names: has to be "ahb".
8	- #address-cells: <1>, as required by generic SPI binding.	8	- #address-cells: <1>, as required by generic SPI binding.
9	- #size-cells: <0>, also as required by generic SPI binding.	9	- #size-cells: <0>, also as required by generic SPI binding.
@@ -12,9 +12,9 @@ Child nodes as per the generic SPI binding. · 2 unmodified lines
12		12
13	Example:	13	Example:
14		14
15	spi@1F000000 {	15	spi@1f000000 {
16	compatible = "qca,ar9132-spi", "qca,ar7100-spi";	16	compatible = "qca,ar9132-spi", "qca,ar7100-spi";
17	reg = <0x1F000000 0x10>;	17	reg = <0x1f000000 0x10>;
18		18
19	clocks = <&pll 2>;	19	clocks = <&pll 2>;
20	clock-names = "ahb";	20	clock-names = "ahb";

Documentation/hwmon/nct7904+2−2

@@ -35,11 +35,11 @@ temp1_input Local temperature (1/1000 degree, · 34 unmodified lines
35	temp[2-9]_input CPU temperatures (1/1000 degree,	35	temp[2-9]_input CPU temperatures (1/1000 degree,
36	0.125 degree resolution)	36	0.125 degree resolution)
37		37
38	fan[1-4]_mode R/W, 0/1 for manual or SmartFan mode	38	pwm[1-4]_enable R/W, 1/2 for manual or SmartFan mode
39	Setting SmartFan mode is supported only if it has been	39	Setting SmartFan mode is supported only if it has been
40	previously configured by BIOS (or configuration EEPROM)	40	previously configured by BIOS (or configuration EEPROM)
41		41
42	fan[1-4]_pwm R/O in SmartFan mode, R/W in manual control mode	42	pwm[1-4] R/O in SmartFan mode, R/W in manual control mode
43		43
44	The driver checks sensor control registers and does not export the sensors	44	The driver checks sensor control registers and does not export the sensors
45	that are not enabled. Anyway, a sensor that is enabled may actually be not	45	that are not enabled. Anyway, a sensor that is enabled may actually be not

Documentation/input/alps.txt+4−2

@@ -119,8 +119,10 @@ ALPS Absolute Mode - Protocol Version 2 · 118 unmodified lines
119	byte 5: 0 z6 z5 z4 z3 z2 z1 z0	119	byte 5: 0 z6 z5 z4 z3 z2 z1 z0
120		120
121	Protocol Version 2 DualPoint devices send standard PS/2 mouse packets for	121	Protocol Version 2 DualPoint devices send standard PS/2 mouse packets for
122	the DualPoint Stick. For non interleaved dualpoint devices the pointingstick	122	the DualPoint Stick. The M, R and L bits signal the combined status of both
123	buttons get reported separately in the PSM, PSR and PSL bits.	123	the pointingstick and touchpad buttons, except for Dell dualpoint devices
		124	where the pointingstick buttons get reported separately in the PSM, PSR
		125	and PSL bits.
124		126
125	Dualpoint device -- interleaved packet format	127	Dualpoint device -- interleaved packet format
126	---------------------------------------------	128	---------------------------------------------

Documentation/target/tcm_mod_builder.py+14−7

@@ -199,7 +199,8 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 198 unmodified lines
199	buf += "#include <linux/string.h>\n"	199	buf += "#include <linux/string.h>\n"
200	buf += "#include <linux/configfs.h>\n"	200	buf += "#include <linux/configfs.h>\n"
201	buf += "#include <linux/ctype.h>\n"	201	buf += "#include <linux/ctype.h>\n"
202	buf += "#include <asm/unaligned.h>\n\n"	202	buf += "#include <asm/unaligned.h>\n"
		203	buf += "#include <scsi/scsi_proto.h>\n\n"
203	buf += "#include <target/target_core_base.h>\n"	204	buf += "#include <target/target_core_base.h>\n"
204	buf += "#include <target/target_core_fabric.h>\n"	205	buf += "#include <target/target_core_fabric.h>\n"
205	buf += "#include <target/target_core_fabric_configfs.h>\n"	206	buf += "#include <target/target_core_fabric_configfs.h>\n"
@@ -230,8 +231,14 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 24 unmodified lines
230	buf += " }\n"	231	buf += " }\n"
231	buf += " tpg->" + fabric_mod_port + " = " + fabric_mod_port + ";\n"	232	buf += " tpg->" + fabric_mod_port + " = " + fabric_mod_port + ";\n"
232	buf += " tpg->" + fabric_mod_port + "_tpgt = tpgt;\n\n"	233	buf += " tpg->" + fabric_mod_port + "_tpgt = tpgt;\n\n"
233	buf += " ret = core_tpg_register(&" + fabric_mod_name + "_ops, wwn,\n"	234
234	buf += " &tpg->se_tpg, SCSI_PROTOCOL_SAS);\n"	235	if proto_ident == "FC":
		236	buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_FCP);\n"
		237	elif proto_ident == "SAS":
		238	buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_SAS);\n"
		239	elif proto_ident == "iSCSI":
		240	buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_ISCSI);\n"
		241
235	buf += " if (ret < 0) {\n"	242	buf += " if (ret < 0) {\n"
236	buf += " kfree(tpg);\n"	243	buf += " kfree(tpg);\n"
237	buf += " return NULL;\n"	244	buf += " return NULL;\n"
@@ -292,7 +299,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 54 unmodified lines
292		299
293	buf += "static const struct target_core_fabric_ops " + fabric_mod_name + "_ops = {\n"	300	buf += "static const struct target_core_fabric_ops " + fabric_mod_name + "_ops = {\n"
294	buf += " .module = THIS_MODULE,\n"	301	buf += " .module = THIS_MODULE,\n"
295	buf += " .name = " + fabric_mod_name + ",\n"	302	buf += " .name = \"" + fabric_mod_name + "\",\n"
296	buf += " .get_fabric_name = " + fabric_mod_name + "_get_fabric_name,\n"	303	buf += " .get_fabric_name = " + fabric_mod_name + "_get_fabric_name,\n"
297	buf += " .tpg_get_wwn = " + fabric_mod_name + "_get_fabric_wwn,\n"	304	buf += " .tpg_get_wwn = " + fabric_mod_name + "_get_fabric_wwn,\n"
298	buf += " .tpg_get_tag = " + fabric_mod_name + "_get_tag,\n"	305	buf += " .tpg_get_tag = " + fabric_mod_name + "_get_tag,\n"
@@ -322,17 +329,17 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name): · 23 unmodified lines
322	buf += " .fabric_make_tpg = " + fabric_mod_name + "_make_tpg,\n"	329	buf += " .fabric_make_tpg = " + fabric_mod_name + "_make_tpg,\n"
323	buf += " .fabric_drop_tpg = " + fabric_mod_name + "_drop_tpg,\n"	330	buf += " .fabric_drop_tpg = " + fabric_mod_name + "_drop_tpg,\n"
324	buf += "\n"	331	buf += "\n"
325	buf += " .tfc_wwn_attrs = " + fabric_mod_name + "_wwn_attrs;\n"	332	buf += " .tfc_wwn_attrs = " + fabric_mod_name + "_wwn_attrs,\n"
326	buf += "};\n\n"	333	buf += "};\n\n"
327		334
328	buf += "static int __init " + fabric_mod_name + "_init(void)\n"	335	buf += "static int __init " + fabric_mod_name + "_init(void)\n"
329	buf += "{\n"	336	buf += "{\n"
330	buf += " return target_register_template(" + fabric_mod_name + "_ops);\n"	337	buf += " return target_register_template(&" + fabric_mod_name + "_ops);\n"
331	buf += "};\n\n"	338	buf += "};\n\n"
332		339
333	buf += "static void __exit " + fabric_mod_name + "_exit(void)\n"	340	buf += "static void __exit " + fabric_mod_name + "_exit(void)\n"
334	buf += "{\n"	341	buf += "{\n"
335	buf += " target_unregister_template(" + fabric_mod_name + "_ops);\n"	342	buf += " target_unregister_template(&" + fabric_mod_name + "_ops);\n"
336	buf += "};\n\n"	343	buf += "};\n\n"
337		344
338	buf += "MODULE_DESCRIPTION(\"" + fabric_mod_name.upper() + " series fabric driver\");\n"	345	buf += "MODULE_DESCRIPTION(\"" + fabric_mod_name.upper() + " series fabric driver\");\n"

MAINTAINERS+14−1

 F:	drivers/gpu/drm/rockchip/
 F:	Documentation/devicetree/bindings/video/rockchip*
+DRM DRIVERS FOR STI
+M:	Benjamin Gaignard <benjamin.gaignard@linaro.org>
+M:	Vincent Abriou <vincent.abriou@st.com>
+L:	dri-devel@lists.freedesktop.org
+T:	git http://git.linaro.org/people/benjamin.gaignard/kernel.git
+S:	Maintained
+F:	drivers/gpu/drm/sti
+F:	Documentation/devicetree/bindings/gpu/st,stih4xx.txt
 DSBR100 USB FM RADIO DRIVER
 M:	Alexey Klimov <klimov.linux@gmail.com>
 L:	linux-media@vger.kernel.org
 IRQCHIP DRIVERS
 M:	Thomas Gleixner <tglx@linutronix.de>
 M:	Jason Cooper <jason@lakedaemon.net>
+M:	Marc Zyngier <marc.zyngier@arm.com>
 L:	linux-kernel@vger.kernel.org
 S:	Maintained
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
 F:	drivers/irqchip/
 IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
-M:	Benjamin Herrenschmidt <benh@kernel.crashing.org>
+M:	Jiang Liu <jiang.liu@linux.intel.com>
+M:	Marc Zyngier <marc.zyngier@arm.com>
 S:	Maintained
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
 F:	Documentation/IRQ-domain.txt
 F:	include/linux/irqdomain.h
 F:	kernel/irq/irqdomain.c
+F:	kernel/irq/msi.c
 ISAPNP
 M:	Jaroslav Kysela <perex@perex.cz>

Makefile+8−3

 VERSION = 4
 PATCHLEVEL = 2
 SUBLEVEL = 0
-EXTRAVERSION = -rc4
+EXTRAVERSION = -rc7
 NAME = Hurr durr I'ma sheep
 # *DOCUMENTATION*
 # Defaults to vmlinux, but the arch makefile usually adds further targets
 all: vmlinux
+# The arch Makefile can set ARCH_{CPP,A,C}FLAGS to override the default
+# values of the respective KBUILD_* variables
+ARCH_CPPFLAGS :=
+ARCH_AFLAGS :=
+ARCH_CFLAGS :=
 include arch/$(SRCARCH)/Makefile
 KBUILD_CFLAGS	+= $(call cc-option,-fno-delete-null-pointer-checks,)
 mod_compress_cmd = true
 ifdef CONFIG_MODULE_COMPRESS
   ifdef CONFIG_MODULE_COMPRESS_GZIP
-    mod_compress_cmd = gzip -n
+    mod_compress_cmd = gzip -n -f
   endif # CONFIG_MODULE_COMPRESS_GZIP
   ifdef CONFIG_MODULE_COMPRESS_XZ
-    mod_compress_cmd = xz
+    mod_compress_cmd = xz -f
   endif # CONFIG_MODULE_COMPRESS_XZ
 endif # CONFIG_MODULE_COMPRESS
 export mod_compress_cmd

arch/arc/Kconfig+11−2

 config ARC_PAGE_SIZE_16K
 	bool "16KB"
-	depends on ARC_MMU_V3
+	depends on ARC_MMU_V3 || ARC_MMU_V4
 config ARC_PAGE_SIZE_4K
 	bool "4KB"
-	depends on ARC_MMU_V3
+	depends on ARC_MMU_V3 || ARC_MMU_V4
 endchoice
 	default y
 	depends on !ARC_CANT_LLSC
+config ARC_STAR_9000923308
+	bool "Workaround for llock/scond livelock"
+	default y
+	depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
 config ARC_HAS_SWAPE
 	bool "Insn: SWAPE (endian-swap)"
 	default y
 	  dest operands with 2 possible source operands.
 	default y
+config ARC_HAS_DIV_REM
+	bool "Insn: div, divu, rem, remu"
+	default y
 config ARC_HAS_RTC
 	bool "Local 64-bit r/o cycle counter"
 	default n

arch/arc/Makefile+9−1

 cflags-$(CONFIG_ARC_HAS_LLSC)		+= -mlock
 cflags-$(CONFIG_ARC_HAS_SWAPE)		+= -mswape
+ifdef CONFIG_ISA_ARCV2
 ifndef CONFIG_ARC_HAS_LL64
-cflags-$(CONFIG_ISA_ARCV2)		+= -mno-ll64
+cflags-y				+= -mno-ll64
+endif
+ifndef CONFIG_ARC_HAS_DIV_REM
+cflags-y				+= -mno-div-rem
+endif
 endif
 cflags-$(CONFIG_ARC_DW2_UNWIND)		+= -fasynchronous-unwind-tables

arch/arc/include/asm/arcregs.h+3−4

@@ -89,11 +89,10 @@ · 88 unmodified lines
89	#define ECR_C_BIT_DTLB_LD_MISS 8	89	#define ECR_C_BIT_DTLB_LD_MISS 8
90	#define ECR_C_BIT_DTLB_ST_MISS 9	90	#define ECR_C_BIT_DTLB_ST_MISS 9
91		91
92
93	/* Auxiliary registers */	92	/* Auxiliary registers */
94	#define AUX_IDENTITY 4	93	#define AUX_IDENTITY 4
95	#define AUX_INTR_VEC_BASE 0x25	94	#define AUX_INTR_VEC_BASE 0x25
96		95	#define AUX_NON_VOL 0x5e
97		96
98	/*	97	/*
99	* Floating Pt Registers	98	* Floating Pt Registers
@@ -240,9 +239,9 @@ struct bcr_extn_xymem { · 140 unmodified lines
240		239
241	struct bcr_perip {	240	struct bcr_perip {
242	#ifdef CONFIG_CPU_BIG_ENDIAN	241	#ifdef CONFIG_CPU_BIG_ENDIAN
243	unsigned int start:8, pad2:8, sz:8, pad:8;	242	unsigned int start:8, pad2:8, sz:8, ver:8;
244	#else	243	#else
245	unsigned int pad:8, sz:8, pad2:8, start:8;	244	unsigned int ver:8, sz:8, pad2:8, start:8;
246	#endif	245	#endif
247	};	246	};
248		247

arch/arc/include/asm/atomic.h+55−23

@@ -23,33 +23,60 @@ · 22 unmodified lines
23		23
24	#define atomic_set(v, i) (((v)->counter) = (i))	24	#define atomic_set(v, i) (((v)->counter) = (i))
25		25
26	#ifdef CONFIG_ISA_ARCV2	26	#ifdef CONFIG_ARC_STAR_9000923308
27	#define PREFETCHW " prefetchw [%1] \n"	27
28	#else	28	#define SCOND_FAIL_RETRY_VAR_DEF \
29	#define PREFETCHW	29	unsigned int delay = 1, tmp; \
		30
		31	#define SCOND_FAIL_RETRY_ASM \
		32	" bz 4f \n" \
		33	" ; --- scond fail delay --- \n" \
		34	" mov %[tmp], %[delay] \n" /* tmp = delay */ \
		35	"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
		36	" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
		37	" rol %[delay], %[delay] \n" /* delay = 2 / \
		38	" b 1b \n" /* start over */ \
		39	"4: ; --- success --- \n" \
		40
		41	#define SCOND_FAIL_RETRY_VARS \
		42	,[delay] "+&r" (delay),[tmp] "=&r" (tmp) \
		43
		44	#else /* !CONFIG_ARC_STAR_9000923308 */
		45
		46	#define SCOND_FAIL_RETRY_VAR_DEF
		47
		48	#define SCOND_FAIL_RETRY_ASM \
		49	" bnz 1b \n" \
		50
		51	#define SCOND_FAIL_RETRY_VARS
		52
30	#endif	53	#endif
31		54
32	#define ATOMIC_OP(op, c_op, asm_op) \	55	#define ATOMIC_OP(op, c_op, asm_op) \
33	static inline void atomic_##op(int i, atomic_t *v) \	56	static inline void atomic_##op(int i, atomic_t *v) \
34	{ \	57	{ \
35	unsigned int temp; \	58	unsigned int val; \
		59	SCOND_FAIL_RETRY_VAR_DEF \
36	\	60	\
37	__asm__ __volatile__( \	61	__asm__ __volatile__( \
38	"1: \n" \	62	"1: llock %[val], [%[ctr]] \n" \
39	PREFETCHW \	63	" " #asm_op " %[val], %[val], %[i] \n" \
40	" llock %0, [%1] \n" \	64	" scond %[val], [%[ctr]] \n" \
41	" " #asm_op " %0, %0, %2 \n" \	65	" \n" \
42	" scond %0, [%1] \n" \	66	SCOND_FAIL_RETRY_ASM \
43	" bnz 1b \n" \	67	\
44	: "=&r"(temp) /* Early clobber, to prevent reg reuse */ \	68	: [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \
45	: "r"(&v->counter), "ir"(i) \	69	SCOND_FAIL_RETRY_VARS \
		70	: [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
		71	[i] "ir" (i) \
46	: "cc"); \	72	: "cc"); \
47	} \	73	} \
48		74
49	#define ATOMIC_OP_RETURN(op, c_op, asm_op) \	75	#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
50	static inline int atomic_##op##_return(int i, atomic_t *v) \	76	static inline int atomic_##op##_return(int i, atomic_t *v) \
51	{ \	77	{ \
52	unsigned int temp; \	78	unsigned int val; \
		79	SCOND_FAIL_RETRY_VAR_DEF \
53	\	80	\
54	/* \	81	/* \
55	* Explicit full memory barrier needed before/after as \	82	* Explicit full memory barrier needed before/after as \
@@ -58,19 +85,21 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \ · 2 unmodified lines
58	smp_mb(); \	85	smp_mb(); \
59	\	86	\
60	__asm__ __volatile__( \	87	__asm__ __volatile__( \
61	"1: \n" \	88	"1: llock %[val], [%[ctr]] \n" \
62	PREFETCHW \	89	" " #asm_op " %[val], %[val], %[i] \n" \
63	" llock %0, [%1] \n" \	90	" scond %[val], [%[ctr]] \n" \
64	" " #asm_op " %0, %0, %2 \n" \	91	" \n" \
65	" scond %0, [%1] \n" \	92	SCOND_FAIL_RETRY_ASM \
66	" bnz 1b \n" \	93	\
67	: "=&r"(temp) \	94	: [val] "=&r" (val) \
68	: "r"(&v->counter), "ir"(i) \	95	SCOND_FAIL_RETRY_VARS \
		96	: [ctr] "r" (&v->counter), \
		97	[i] "ir" (i) \
69	: "cc"); \	98	: "cc"); \
70	\	99	\
71	smp_mb(); \	100	smp_mb(); \
72	\	101	\
73	return temp; \	102	return val; \
74	}	103	}
75		104
76	#else /* !CONFIG_ARC_HAS_LLSC */	105	#else /* !CONFIG_ARC_HAS_LLSC */
@@ -150,6 +179,9 @@ ATOMIC_OP(and, &=, and) · 73 unmodified lines
150	#undef ATOMIC_OPS	179	#undef ATOMIC_OPS
151	#undef ATOMIC_OP_RETURN	180	#undef ATOMIC_OP_RETURN
152	#undef ATOMIC_OP	181	#undef ATOMIC_OP
		182	#undef SCOND_FAIL_RETRY_VAR_DEF
		183	#undef SCOND_FAIL_RETRY_ASM
		184	#undef SCOND_FAIL_RETRY_VARS
153		185
154	/**	186	/**
155	* __atomic_add_unless - add unless the number is a given value	187	* __atomic_add_unless - add unless the number is a given value

arch/arc/include/asm/ptrace.h+27−27

@@ -20,20 +20,20 @@ · 19 unmodified lines
20	struct pt_regs {	20	struct pt_regs {
21		21
22	/* Real registers */	22	/* Real registers */
23	long bta; /* bta_l1, bta_l2, erbta */	23	unsigned long bta; /* bta_l1, bta_l2, erbta */
24		24
25	long lp_start, lp_end, lp_count;	25	unsigned long lp_start, lp_end, lp_count;
26		26
27	long status32; /* status32_l1, status32_l2, erstatus */	27	unsigned long status32; /* status32_l1, status32_l2, erstatus */
28	long ret; /* ilink1, ilink2 or eret */	28	unsigned long ret; /* ilink1, ilink2 or eret */
29	long blink;	29	unsigned long blink;
30	long fp;	30	unsigned long fp;
31	long r26; /* gp */	31	unsigned long r26; /* gp */
32		32
33	long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;	33	unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
34		34
35	long sp; /* user/kernel sp depending on where we came from */	35	unsigned long sp; /* User/Kernel depending on where we came from */
36	long orig_r0;	36	unsigned long orig_r0;
37		37
38	/*	38	/*
39	* To distinguish bet excp, syscall, irq	39	* To distinguish bet excp, syscall, irq
@@ -55,13 +55,13 @@ struct pt_regs { · 15 unmodified lines
55	unsigned long event;	55	unsigned long event;
56	};	56	};
57		57
58	long user_r25;	58	unsigned long user_r25;
59	};	59	};
60	#else	60	#else
61		61
62	struct pt_regs {	62	struct pt_regs {
63		63
64	long orig_r0;	64	unsigned long orig_r0;
65		65
66	union {	66	union {
67	struct {	67	struct {
@@ -76,26 +76,26 @@ struct pt_regs { · 8 unmodified lines
76	unsigned long event;	76	unsigned long event;
77	};	77	};
78		78
79	long bta; /* bta_l1, bta_l2, erbta */	79	unsigned long bta; /* bta_l1, bta_l2, erbta */
80		80
81	long user_r25;	81	unsigned long user_r25;
82		82
83	long r26; /* gp */	83	unsigned long r26; /* gp */
84	long fp;	84	unsigned long fp;
85	long sp; /* user/kernel sp depending on where we came from */	85	unsigned long sp; /* user/kernel sp depending on where we came from */
86		86
87	long r12;	87	unsigned long r12;
88		88
89	/------- Below list auto saved by h/w -----------/	89	/------- Below list auto saved by h/w -----------/
90	long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;	90	unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
91		91
92	long blink;	92	unsigned long blink;
93	long lp_end, lp_start, lp_count;	93	unsigned long lp_end, lp_start, lp_count;
94		94
95	long ei, ldi, jli;	95	unsigned long ei, ldi, jli;
96		96
97	long ret;	97	unsigned long ret;
98	long status32;	98	unsigned long status32;
99	};	99	};
100		100
101	#endif	101	#endif
@@ -103,10 +103,10 @@ struct pt_regs { · 1 unmodified line
103	/* Callee saved registers - need to be saved only when you are scheduled out */	103	/* Callee saved registers - need to be saved only when you are scheduled out */
104		104
105	struct callee_regs {	105	struct callee_regs {
106	long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;	106	unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
107	};	107	};
108		108
109	#define instruction_pointer(regs) (unsigned long)((regs)->ret)	109	#define instruction_pointer(regs) ((regs)->ret)
110	#define profile_pc(regs) instruction_pointer(regs)	110	#define profile_pc(regs) instruction_pointer(regs)
111		111
112	/* return 1 if user mode or 0 if kernel mode */	112	/* return 1 if user mode or 0 if kernel mode */
@@ -142,7 +142,7 @@ struct callee_regs { · 29 unmodified lines
142		142
143	static inline long regs_return_value(struct pt_regs *regs)	143	static inline long regs_return_value(struct pt_regs *regs)
144	{	144	{
145	return regs->r0;	145	return (long)regs->r0;
146	}	146	}
147		147
148	#endif /* !__ASSEMBLY__ */	148	#endif /* !__ASSEMBLY__ */

arch/arc/include/asm/spinlock.h+523−15

@@ -18,9 +18,518 @@ · 17 unmodified lines
18	#define arch_spin_unlock_wait(x) \	18	#define arch_spin_unlock_wait(x) \
19	do { while (arch_spin_is_locked(x)) cpu_relax(); } while (0)	19	do { while (arch_spin_is_locked(x)) cpu_relax(); } while (0)
20		20
		21	#ifdef CONFIG_ARC_HAS_LLSC
		22
		23	/*
		24	* A normal LLOCK/SCOND based system, w/o need for livelock workaround
		25	*/
		26	#ifndef CONFIG_ARC_STAR_9000923308
		27
21	static inline void arch_spin_lock(arch_spinlock_t *lock)	28	static inline void arch_spin_lock(arch_spinlock_t *lock)
22	{	29	{
23	unsigned int tmp = __ARCH_SPIN_LOCK_LOCKED__;	30	unsigned int val;
		31
		32	smp_mb();
		33
		34	__asm__ __volatile__(
		35	"1: llock %[val], [%[slock]] \n"
		36	" breq %[val], %[LOCKED], 1b \n" /* spin while LOCKED */
		37	" scond %[LOCKED], [%[slock]] \n" /* acquire */
		38	" bnz 1b \n"
		39	" \n"
		40	: [val] "=&r" (val)
		41	: [slock] "r" (&(lock->slock)),
		42	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
		43	: "memory", "cc");
		44
		45	smp_mb();
		46	}
		47
		48	/* 1 - lock taken successfully */
		49	static inline int arch_spin_trylock(arch_spinlock_t *lock)
		50	{
		51	unsigned int val, got_it = 0;
		52
		53	smp_mb();
		54
		55	__asm__ __volatile__(
		56	"1: llock %[val], [%[slock]] \n"
		57	" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
		58	" scond %[LOCKED], [%[slock]] \n" /* acquire */
		59	" bnz 1b \n"
		60	" mov %[got_it], 1 \n"
		61	"4: \n"
		62	" \n"
		63	: [val] "=&r" (val),
		64	[got_it] "+&r" (got_it)
		65	: [slock] "r" (&(lock->slock)),
		66	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
		67	: "memory", "cc");
		68
		69	smp_mb();
		70
		71	return got_it;
		72	}
		73
		74	static inline void arch_spin_unlock(arch_spinlock_t *lock)
		75	{
		76	smp_mb();
		77
		78	lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
		79
		80	smp_mb();
		81	}
		82
		83	/*
		84	* Read-write spinlocks, allowing multiple readers but only one writer.
		85	* Unfair locking as Writers could be starved indefinitely by Reader(s)
		86	*/
		87
		88	static inline void arch_read_lock(arch_rwlock_t *rw)
		89	{
		90	unsigned int val;
		91
		92	smp_mb();
		93
		94	/*
		95	* zero means writer holds the lock exclusively, deny Reader.
		96	* Otherwise grant lock to first/subseq reader
		97	*
		98	* if (rw->counter > 0) {
		99	* rw->counter--;
		100	* ret = 1;
		101	* }
		102	*/
		103
		104	__asm__ __volatile__(
		105	"1: llock %[val], [%[rwlock]] \n"
		106	" brls %[val], %[WR_LOCKED], 1b\n" /* <= 0: spin while write locked */
		107	" sub %[val], %[val], 1 \n" /* reader lock */
		108	" scond %[val], [%[rwlock]] \n"
		109	" bnz 1b \n"
		110	" \n"
		111	: [val] "=&r" (val)
		112	: [rwlock] "r" (&(rw->counter)),
		113	[WR_LOCKED] "ir" (0)
		114	: "memory", "cc");
		115
		116	smp_mb();
		117	}
		118
		119	/* 1 - lock taken successfully */
		120	static inline int arch_read_trylock(arch_rwlock_t *rw)
		121	{
		122	unsigned int val, got_it = 0;
		123
		124	smp_mb();
		125
		126	__asm__ __volatile__(
		127	"1: llock %[val], [%[rwlock]] \n"
		128	" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
		129	" sub %[val], %[val], 1 \n" /* counter-- */
		130	" scond %[val], [%[rwlock]] \n"
		131	" bnz 1b \n" /* retry if collided with someone */
		132	" mov %[got_it], 1 \n"
		133	" \n"
		134	"4: ; --- done --- \n"
		135
		136	: [val] "=&r" (val),
		137	[got_it] "+&r" (got_it)
		138	: [rwlock] "r" (&(rw->counter)),
		139	[WR_LOCKED] "ir" (0)
		140	: "memory", "cc");
		141
		142	smp_mb();
		143
		144	return got_it;
		145	}
		146
		147	static inline void arch_write_lock(arch_rwlock_t *rw)
		148	{
		149	unsigned int val;
		150
		151	smp_mb();
		152
		153	/*
		154	* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
		155	* deny writer. Otherwise if unlocked grant to writer
		156	* Hence the claim that Linux rwlocks are unfair to writers.
		157	* (can be starved for an indefinite time by readers).
		158	*
		159	* if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) {
		160	* rw->counter = 0;
		161	* ret = 1;
		162	* }
		163	*/
		164
		165	__asm__ __volatile__(
		166	"1: llock %[val], [%[rwlock]] \n"
		167	" brne %[val], %[UNLOCKED], 1b \n" /* while !UNLOCKED spin */
		168	" mov %[val], %[WR_LOCKED] \n"
		169	" scond %[val], [%[rwlock]] \n"
		170	" bnz 1b \n"
		171	" \n"
		172	: [val] "=&r" (val)
		173	: [rwlock] "r" (&(rw->counter)),
		174	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
		175	[WR_LOCKED] "ir" (0)
		176	: "memory", "cc");
		177
		178	smp_mb();
		179	}
		180
		181	/* 1 - lock taken successfully */
		182	static inline int arch_write_trylock(arch_rwlock_t *rw)
		183	{
		184	unsigned int val, got_it = 0;
		185
		186	smp_mb();
		187
		188	__asm__ __volatile__(
		189	"1: llock %[val], [%[rwlock]] \n"
		190	" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
		191	" mov %[val], %[WR_LOCKED] \n"
		192	" scond %[val], [%[rwlock]] \n"
		193	" bnz 1b \n" /* retry if collided with someone */
		194	" mov %[got_it], 1 \n"
		195	" \n"
		196	"4: ; --- done --- \n"
		197
		198	: [val] "=&r" (val),
		199	[got_it] "+&r" (got_it)
		200	: [rwlock] "r" (&(rw->counter)),
		201	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
		202	[WR_LOCKED] "ir" (0)
		203	: "memory", "cc");
		204
		205	smp_mb();
		206
		207	return got_it;
		208	}
		209
		210	static inline void arch_read_unlock(arch_rwlock_t *rw)
		211	{
		212	unsigned int val;
		213
		214	smp_mb();
		215
		216	/*
		217	* rw->counter++;
		218	*/
		219	__asm__ __volatile__(
		220	"1: llock %[val], [%[rwlock]] \n"
		221	" add %[val], %[val], 1 \n"
		222	" scond %[val], [%[rwlock]] \n"
		223	" bnz 1b \n"
		224	" \n"
		225	: [val] "=&r" (val)
		226	: [rwlock] "r" (&(rw->counter))
		227	: "memory", "cc");
		228
		229	smp_mb();
		230	}
		231
		232	static inline void arch_write_unlock(arch_rwlock_t *rw)
		233	{
		234	smp_mb();
		235
		236	rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
		237
		238	smp_mb();
		239	}
		240
		241	#else /* CONFIG_ARC_STAR_9000923308 */
		242
		243	/*
		244	* HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping
		245	* coherency transactions in the SCU. The exclusive line state keeps rotating
		246	* among contenting cores leading to a never ending cycle. So break the cycle
		247	* by deferring the retry of failed exclusive access (SCOND). The actual delay
		248	* needed is function of number of contending cores as well as the unrelated
		249	* coherency traffic from other cores. To keep the code simple, start off with
		250	* small delay of 1 which would suffice most cases and in case of contention
		251	* double the delay. Eventually the delay is sufficient such that the coherency
		252	* pipeline is drained, thus a subsequent exclusive access would succeed.
		253	*/
		254
		255	#define SCOND_FAIL_RETRY_VAR_DEF \
		256	unsigned int delay, tmp; \
		257
		258	#define SCOND_FAIL_RETRY_ASM \
		259	" ; --- scond fail delay --- \n" \
		260	" mov %[tmp], %[delay] \n" /* tmp = delay */ \
		261	"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
		262	" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
		263	" rol %[delay], %[delay] \n" /* delay = 2 / \
		264	" b 1b \n" /* start over */ \
		265	" \n" \
		266	"4: ; --- done --- \n" \
		267
		268	#define SCOND_FAIL_RETRY_VARS \
		269	,[delay] "=&r" (delay), [tmp] "=&r" (tmp) \
		270
		271	static inline void arch_spin_lock(arch_spinlock_t *lock)
		272	{
		273	unsigned int val;
		274	SCOND_FAIL_RETRY_VAR_DEF;
		275
		276	smp_mb();
		277
		278	__asm__ __volatile__(
		279	"0: mov %[delay], 1 \n"
		280	"1: llock %[val], [%[slock]] \n"
		281	" breq %[val], %[LOCKED], 0b \n" /* spin while LOCKED */
		282	" scond %[LOCKED], [%[slock]] \n" /* acquire */
		283	" bz 4f \n" /* done */
		284	" \n"
		285	SCOND_FAIL_RETRY_ASM
		286
		287	: [val] "=&r" (val)
		288	SCOND_FAIL_RETRY_VARS
		289	: [slock] "r" (&(lock->slock)),
		290	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
		291	: "memory", "cc");
		292
		293	smp_mb();
		294	}
		295
		296	/* 1 - lock taken successfully */
		297	static inline int arch_spin_trylock(arch_spinlock_t *lock)
		298	{
		299	unsigned int val, got_it = 0;
		300	SCOND_FAIL_RETRY_VAR_DEF;
		301
		302	smp_mb();
		303
		304	__asm__ __volatile__(
		305	"0: mov %[delay], 1 \n"
		306	"1: llock %[val], [%[slock]] \n"
		307	" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
		308	" scond %[LOCKED], [%[slock]] \n" /* acquire */
		309	" bz.d 4f \n"
		310	" mov.z %[got_it], 1 \n" /* got it */
		311	" \n"
		312	SCOND_FAIL_RETRY_ASM
		313
		314	: [val] "=&r" (val),
		315	[got_it] "+&r" (got_it)
		316	SCOND_FAIL_RETRY_VARS
		317	: [slock] "r" (&(lock->slock)),
		318	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
		319	: "memory", "cc");
		320
		321	smp_mb();
		322
		323	return got_it;
		324	}
		325
		326	static inline void arch_spin_unlock(arch_spinlock_t *lock)
		327	{
		328	smp_mb();
		329
		330	lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
		331
		332	smp_mb();
		333	}
		334
		335	/*
		336	* Read-write spinlocks, allowing multiple readers but only one writer.
		337	* Unfair locking as Writers could be starved indefinitely by Reader(s)
		338	*/
		339
		340	static inline void arch_read_lock(arch_rwlock_t *rw)
		341	{
		342	unsigned int val;
		343	SCOND_FAIL_RETRY_VAR_DEF;
		344
		345	smp_mb();
		346
		347	/*
		348	* zero means writer holds the lock exclusively, deny Reader.
		349	* Otherwise grant lock to first/subseq reader
		350	*
		351	* if (rw->counter > 0) {
		352	* rw->counter--;
		353	* ret = 1;
		354	* }
		355	*/
		356
		357	__asm__ __volatile__(
		358	"0: mov %[delay], 1 \n"
		359	"1: llock %[val], [%[rwlock]] \n"
		360	" brls %[val], %[WR_LOCKED], 0b\n" /* <= 0: spin while write locked */
		361	" sub %[val], %[val], 1 \n" /* reader lock */
		362	" scond %[val], [%[rwlock]] \n"
		363	" bz 4f \n" /* done */
		364	" \n"
		365	SCOND_FAIL_RETRY_ASM
		366
		367	: [val] "=&r" (val)
		368	SCOND_FAIL_RETRY_VARS
		369	: [rwlock] "r" (&(rw->counter)),
		370	[WR_LOCKED] "ir" (0)
		371	: "memory", "cc");
		372
		373	smp_mb();
		374	}
		375
		376	/* 1 - lock taken successfully */
		377	static inline int arch_read_trylock(arch_rwlock_t *rw)
		378	{
		379	unsigned int val, got_it = 0;
		380	SCOND_FAIL_RETRY_VAR_DEF;
		381
		382	smp_mb();
		383
		384	__asm__ __volatile__(
		385	"0: mov %[delay], 1 \n"
		386	"1: llock %[val], [%[rwlock]] \n"
		387	" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
		388	" sub %[val], %[val], 1 \n" /* counter-- */
		389	" scond %[val], [%[rwlock]] \n"
		390	" bz.d 4f \n"
		391	" mov.z %[got_it], 1 \n" /* got it */
		392	" \n"
		393	SCOND_FAIL_RETRY_ASM
		394
		395	: [val] "=&r" (val),
		396	[got_it] "+&r" (got_it)
		397	SCOND_FAIL_RETRY_VARS
		398	: [rwlock] "r" (&(rw->counter)),
		399	[WR_LOCKED] "ir" (0)
		400	: "memory", "cc");
		401
		402	smp_mb();
		403
		404	return got_it;
		405	}
		406
		407	static inline void arch_write_lock(arch_rwlock_t *rw)
		408	{
		409	unsigned int val;
		410	SCOND_FAIL_RETRY_VAR_DEF;
		411
		412	smp_mb();
		413
		414	/*
		415	* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
		416	* deny writer. Otherwise if unlocked grant to writer
		417	* Hence the claim that Linux rwlocks are unfair to writers.
		418	* (can be starved for an indefinite time by readers).
		419	*
		420	* if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) {
		421	* rw->counter = 0;
		422	* ret = 1;
		423	* }
		424	*/
		425
		426	__asm__ __volatile__(
		427	"0: mov %[delay], 1 \n"
		428	"1: llock %[val], [%[rwlock]] \n"
		429	" brne %[val], %[UNLOCKED], 0b \n" /* while !UNLOCKED spin */
		430	" mov %[val], %[WR_LOCKED] \n"
		431	" scond %[val], [%[rwlock]] \n"
		432	" bz 4f \n"
		433	" \n"
		434	SCOND_FAIL_RETRY_ASM
		435
		436	: [val] "=&r" (val)
		437	SCOND_FAIL_RETRY_VARS
		438	: [rwlock] "r" (&(rw->counter)),
		439	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
		440	[WR_LOCKED] "ir" (0)
		441	: "memory", "cc");
		442
		443	smp_mb();
		444	}
		445
		446	/* 1 - lock taken successfully */
		447	static inline int arch_write_trylock(arch_rwlock_t *rw)
		448	{
		449	unsigned int val, got_it = 0;
		450	SCOND_FAIL_RETRY_VAR_DEF;
		451
		452	smp_mb();
		453
		454	__asm__ __volatile__(
		455	"0: mov %[delay], 1 \n"
		456	"1: llock %[val], [%[rwlock]] \n"
		457	" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
		458	" mov %[val], %[WR_LOCKED] \n"
		459	" scond %[val], [%[rwlock]] \n"
		460	" bz.d 4f \n"
		461	" mov.z %[got_it], 1 \n" /* got it */
		462	" \n"
		463	SCOND_FAIL_RETRY_ASM
		464
		465	: [val] "=&r" (val),
		466	[got_it] "+&r" (got_it)
		467	SCOND_FAIL_RETRY_VARS
		468	: [rwlock] "r" (&(rw->counter)),
		469	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
		470	[WR_LOCKED] "ir" (0)
		471	: "memory", "cc");
		472
		473	smp_mb();
		474
		475	return got_it;
		476	}
		477
		478	static inline void arch_read_unlock(arch_rwlock_t *rw)
		479	{
		480	unsigned int val;
		481
		482	smp_mb();
		483
		484	/*
		485	* rw->counter++;
		486	*/
		487	__asm__ __volatile__(
		488	"1: llock %[val], [%[rwlock]] \n"
		489	" add %[val], %[val], 1 \n"
		490	" scond %[val], [%[rwlock]] \n"
		491	" bnz 1b \n"
		492	" \n"
		493	: [val] "=&r" (val)
		494	: [rwlock] "r" (&(rw->counter))
		495	: "memory", "cc");
		496
		497	smp_mb();
		498	}
		499
		500	static inline void arch_write_unlock(arch_rwlock_t *rw)
		501	{
		502	unsigned int val;
		503
		504	smp_mb();
		505
		506	/*
		507	* rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
		508	*/
		509	__asm__ __volatile__(
		510	"1: llock %[val], [%[rwlock]] \n"
		511	" scond %[UNLOCKED], [%[rwlock]]\n"
		512	" bnz 1b \n"
		513	" \n"
		514	: [val] "=&r" (val)
		515	: [rwlock] "r" (&(rw->counter)),
		516	[UNLOCKED] "r" (__ARCH_RW_LOCK_UNLOCKED__)
		517	: "memory", "cc");
		518
		519	smp_mb();
		520	}
		521
		522	#undef SCOND_FAIL_RETRY_VAR_DEF
		523	#undef SCOND_FAIL_RETRY_ASM
		524	#undef SCOND_FAIL_RETRY_VARS
		525
		526	#endif /* CONFIG_ARC_STAR_9000923308 */
		527
		528	#else /* !CONFIG_ARC_HAS_LLSC */
		529
		530	static inline void arch_spin_lock(arch_spinlock_t *lock)
		531	{
		532	unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
24		533
25	/*	534	/*
26	* This smp_mb() is technically superfluous, we only need the one	535	* This smp_mb() is technically superfluous, we only need the one
@@ -33,7 +542,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) · 6 unmodified lines
33	__asm__ __volatile__(	542	__asm__ __volatile__(
34	"1: ex %0, [%1] \n"	543	"1: ex %0, [%1] \n"
35	" breq %0, %2, 1b \n"	544	" breq %0, %2, 1b \n"
36	: "+&r" (tmp)	545	: "+&r" (val)
37	: "r"(&(lock->slock)), "ir"(__ARCH_SPIN_LOCK_LOCKED__)	546	: "r"(&(lock->slock)), "ir"(__ARCH_SPIN_LOCK_LOCKED__)
38	: "memory");	547	: "memory");
39		548
@@ -48,26 +557,27 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) · 8 unmodified lines
48	smp_mb();	557	smp_mb();
49	}	558	}
50		559
		560	/* 1 - lock taken successfully */
51	static inline int arch_spin_trylock(arch_spinlock_t *lock)	561	static inline int arch_spin_trylock(arch_spinlock_t *lock)
52	{	562	{
53	unsigned int tmp = __ARCH_SPIN_LOCK_LOCKED__;	563	unsigned int val = __ARCH_SPIN_LOCK_LOCKED__;
54		564
55	smp_mb();	565	smp_mb();
56		566
57	__asm__ __volatile__(	567	__asm__ __volatile__(
58	"1: ex %0, [%1] \n"	568	"1: ex %0, [%1] \n"
59	: "+r" (tmp)	569	: "+r" (val)
60	: "r"(&(lock->slock))	570	: "r"(&(lock->slock))
61	: "memory");	571	: "memory");
62		572
63	smp_mb();	573	smp_mb();
64		574
65	return (tmp == __ARCH_SPIN_LOCK_UNLOCKED__);	575	return (val == __ARCH_SPIN_LOCK_UNLOCKED__);
66	}	576	}
67		577
68	static inline void arch_spin_unlock(arch_spinlock_t *lock)	578	static inline void arch_spin_unlock(arch_spinlock_t *lock)
69	{	579	{
70	unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__;	580	unsigned int val = __ARCH_SPIN_LOCK_UNLOCKED__;
71		581
72	/*	582	/*
73	* RELEASE barrier: given the instructions avail on ARCv2, full barrier	583	* RELEASE barrier: given the instructions avail on ARCv2, full barrier
@@ -77,7 +587,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) · 3 unmodified lines
77		587
78	__asm__ __volatile__(	588	__asm__ __volatile__(
79	" ex %0, [%1] \n"	589	" ex %0, [%1] \n"
80	: "+r" (tmp)	590	: "+r" (val)
81	: "r"(&(lock->slock))	591	: "r"(&(lock->slock))
82	: "memory");	592	: "memory");
83		593
@@ -90,19 +600,12 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) · 6 unmodified lines
90		600
91	/*	601	/*
92	* Read-write spinlocks, allowing multiple readers but only one writer.	602	* Read-write spinlocks, allowing multiple readers but only one writer.
		603	* Unfair locking as Writers could be starved indefinitely by Reader(s)
93	*	604	*
94	* The spinlock itself is contained in @counter and access to it is	605	* The spinlock itself is contained in @counter and access to it is
95	* serialized with @lock_mutex.	606	* serialized with @lock_mutex.
96	*
97	* Unfair locking as Writers could be starved indefinitely by Reader(s)
98	*/	607	*/
99		608
100	/* Would read_trylock() succeed? */
101	#define arch_read_can_lock(x) ((x)->counter > 0)
102
103	/* Would write_trylock() succeed? */
104	#define arch_write_can_lock(x) ((x)->counter == __ARCH_RW_LOCK_UNLOCKED__)
105
106	/* 1 - lock taken successfully */	609	/* 1 - lock taken successfully */
107	static inline int arch_read_trylock(arch_rwlock_t *rw)	610	static inline int arch_read_trylock(arch_rwlock_t *rw)
108	{	611	{
@@ -173,6 +676,11 @@ static inline void arch_write_unlock(arch_rwlock_t *rw) · 64 unmodified lines
173	arch_spin_unlock(&(rw->lock_mutex));	676	arch_spin_unlock(&(rw->lock_mutex));
174	}	677	}
175		678
		679	#endif
		680
		681	#define arch_read_can_lock(x) ((x)->counter > 0)
		682	#define arch_write_can_lock(x) ((x)->counter == __ARCH_RW_LOCK_UNLOCKED__)
		683
176	#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)	684	#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
177	#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)	685	#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
178		686

arch/arc/include/asm/spinlock_types.h+2−0

  */
 typedef struct {
 	volatile unsigned int	counter;
+#ifndef CONFIG_ARC_HAS_LLSC
 	arch_spinlock_t		lock_mutex;
+#endif
 } arch_rwlock_t;
 #define __ARCH_RW_LOCK_UNLOCKED__	0x01000000

arch/arc/include/uapi/asm/ptrace.h+10−10

@@ -32,20 +32,20 @@ · 31 unmodified lines
32	*/	32	*/
33	struct user_regs_struct {	33	struct user_regs_struct {
34		34
35	long pad;	35	unsigned long pad;
36	struct {	36	struct {
37	long bta, lp_start, lp_end, lp_count;	37	unsigned long bta, lp_start, lp_end, lp_count;
38	long status32, ret, blink, fp, gp;	38	unsigned long status32, ret, blink, fp, gp;
39	long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;	39	unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
40	long sp;	40	unsigned long sp;
41	} scratch;	41	} scratch;
42	long pad2;	42	unsigned long pad2;
43	struct {	43	struct {
44	long r25, r24, r23, r22, r21, r20;	44	unsigned long r25, r24, r23, r22, r21, r20;
45	long r19, r18, r17, r16, r15, r14, r13;	45	unsigned long r19, r18, r17, r16, r15, r14, r13;
46	} callee;	46	} callee;
47	long efa; /* break pt addr, for break points in delay slots */	47	unsigned long efa; /* break pt addr, for break points in delay slots */
48	long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */	48	unsigned long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */
49	};	49	};
50	#endif /* !__ASSEMBLY__ */	50	#endif /* !__ASSEMBLY__ */
51		51

arch/arc/kernel/setup.c+11−1

 	struct bcr_perip uncached_space;
 	struct bcr_generic bcr;
 	struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
+	unsigned long perip_space;
 	FIX_PTR(cpu);
 	READ_BCR(AUX_IDENTITY, cpu->core);
 	cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 	READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
-	BUG_ON((uncached_space.start << 24) != ARC_UNCACHED_ADDR_SPACE);
+        if (uncached_space.ver < 3)
+		perip_space = uncached_space.start << 24;
+	else
+		perip_space = read_aux_reg(AUX_NON_VOL) & 0xF0000000;
+	BUG_ON(perip_space != ARC_UNCACHED_ADDR_SPACE);
 	READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 		pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
 	else if (!cpu->extn.fpu_dp && fpu_enabled)
 		panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
+	if (is_isa_arcv2() && IS_ENABLED(CONFIG_SMP) && cpu->isa.atomic &&
+	    !IS_ENABLED(CONFIG_ARC_STAR_9000923308))
+		panic("llock/scond livelock workaround missing\n");
 }
 /*

arch/arc/kernel/time.c+15−25

@@ -203,34 +203,24 @@ static int arc_clkevent_set_next_event(unsigned long delta, · 202 unmodified lines
203	return 0;	203	return 0;
204	}	204	}
205		205
206	static void arc_clkevent_set_mode(enum clock_event_mode mode,	206	static int arc_clkevent_set_periodic(struct clock_event_device *dev)
207	struct clock_event_device *dev)
208	{	207	{
209	switch (mode) {	208	/*
210	case CLOCK_EVT_MODE_PERIODIC:	209	* At X Hz, 1 sec = 1000ms -> X cycles;
211	/*	210	* 10ms -> X / 100 cycles
212	* At X Hz, 1 sec = 1000ms -> X cycles;	211	*/
213	* 10ms -> X / 100 cycles	212	arc_timer_event_setup(arc_get_core_freq() / HZ);
214	*/	213	return 0;
215	arc_timer_event_setup(arc_get_core_freq() / HZ);
216	break;
217	case CLOCK_EVT_MODE_ONESHOT:
218	break;
219	default:
220	break;
221	}
222
223	return;
224	}	214	}
225		215
226	static DEFINE_PER_CPU(struct clock_event_device, arc_clockevent_device) = {	216	static DEFINE_PER_CPU(struct clock_event_device, arc_clockevent_device) = {
227	.name = "ARC Timer0",	217	.name = "ARC Timer0",
228	.features = CLOCK_EVT_FEAT_ONESHOT \| CLOCK_EVT_FEAT_PERIODIC,	218	.features = CLOCK_EVT_FEAT_ONESHOT \|
229	.mode = CLOCK_EVT_MODE_UNUSED,	219	CLOCK_EVT_FEAT_PERIODIC,
230	.rating = 300,	220	.rating = 300,
231	.irq = TIMER0_IRQ, /* hardwired, no need for resources */	221	.irq = TIMER0_IRQ, /* hardwired, no need for resources */
232	.set_next_event = arc_clkevent_set_next_event,	222	.set_next_event = arc_clkevent_set_next_event,
233	.set_mode = arc_clkevent_set_mode,	223	.set_state_periodic = arc_clkevent_set_periodic,
234	};	224	};
235		225
236	static irqreturn_t timer_irq_handler(int irq, void *dev_id)	226	static irqreturn_t timer_irq_handler(int irq, void *dev_id)
@@ -240,7 +230,7 @@ static irqreturn_t timer_irq_handler(int irq, void *dev_id) · 3 unmodified lines
240	* irq_set_chip_and_handler() asked for handle_percpu_devid_irq()	230	* irq_set_chip_and_handler() asked for handle_percpu_devid_irq()
241	*/	231	*/
242	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);	232	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
243	int irq_reenable = evt->mode == CLOCK_EVT_MODE_PERIODIC;	233	int irq_reenable = clockevent_state_periodic(evt);
244		234
245	/*	235	/*
246	* Any write to CTRL reg ACks the interrupt, we rewrite the	236	* Any write to CTRL reg ACks the interrupt, we rewrite the

arch/arc/lib/memcpy-archs.S+1−1

@@ -206,7 +206,7 @@ unalignedOffby3: · 205 unmodified lines
206	ld.ab r6, [r1, 4]	206	ld.ab r6, [r1, 4]
207	prefetch [r1, 28] ;Prefetch the next read location	207	prefetch [r1, 28] ;Prefetch the next read location
208	ld.ab r8, [r1,4]	208	ld.ab r8, [r1,4]
209	prefetch [r3, 32] ;Prefetch the next write location	209	prefetchw [r3, 32] ;Prefetch the next write location
210		210
211	SHIFT_1 (r7, r6, 8)	211	SHIFT_1 (r7, r6, 8)
212	or r7, r7, r5	212	or r7, r7, r5

arch/arc/lib/memset-archs.S+36−7

 #undef PREALLOC_NOT_AVAIL
-#ifdef PREALLOC_NOT_AVAIL
-#define PREWRITE(A,B)	prefetchw [(A),(B)]
-#else
-#define PREWRITE(A,B)	prealloc [(A),(B)]
-#endif
 ENTRY(memset)
 	prefetchw [r0]		; Prefetch the write location
 	mov.f	0, r2
 ;;; Convert len to Dwords, unfold x8
 	lsr.f	lp_count, lp_count, 6
 	lpnz	@.Lset64bytes
 	;; LOOP START
-	PREWRITE(r3, 64)	;Prefetch the next write location
+#ifdef PREALLOC_NOT_AVAIL
+	prefetchw [r3, 64]	;Prefetch the next write location
+#else
+	prealloc  [r3, 64]
+#endif
+#ifdef CONFIG_ARC_HAS_LL64
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
+#else
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+#endif
 .Lset64bytes:
 	lsr.f	lp_count, r2, 5 ;Last remaining  max 124 bytes
 	lpnz	.Lset32bytes
 	;; LOOP START
 	prefetchw   [r3, 32]	;Prefetch the next write location
+#ifdef CONFIG_ARC_HAS_LL64
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
 	std.ab	r4, [r3, 8]
+#else
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+	st.ab	r4, [r3, 4]
+#endif
 .Lset32bytes:
 	and.f	lp_count, r2, 0x1F ;Last remaining 31 bytes

arch/arc/plat-axs10x/axs10x.c+15−0

@@ -389,6 +389,21 @@ axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od) · 388 unmodified lines
389		389
390	static void __init axs103_early_init(void)	390	static void __init axs103_early_init(void)
391	{	391	{
		392	/*
		393	* AXS103 configurations for SMP/QUAD configurations share device tree
		394	* which defaults to 90 MHz. However recent failures of Quad config
		395	* revealed P&R timing violations so clamp it down to safe 50 MHz
		396	* Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack
		397	*
		398	* This hack is really hacky as of now. Fix it properly by getting the
		399	* number of cores as return value of platform's early SMP callback
		400	*/
		401	#ifdef CONFIG_ARC_MCIP
		402	unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
		403	if (num_cores > 2)
		404	arc_set_core_freq(50 * 1000000);
		405	#endif
		406
392	switch (arc_get_core_freq()/1000000) {	407	switch (arc_get_core_freq()/1000000) {
393	case 33:	408	case 33:
394	axs103_set_freq(1, 1, 1);	409	axs103_set_freq(1, 1, 1);

arch/arm/boot/dts/dra7.dtsi+2−1

 				ranges = <0 0x2000 0x2000>;
 				scm_conf: scm_conf@0 {
-					compatible = "syscon";
+					compatible = "syscon", "simple-bus";
 					reg = <0x0 0x1400>;
 					#address-cells = <1>;
 					#size-cells = <1>;
 				ctrl-module = <&omap_control_sata>;
 				clocks = <&sys_clkin1>, <&sata_ref_clk>;
 				clock-names = "sysclk", "refclk";
+				syscon-pllreset = <&scm_conf 0x3fc>;
 				#phy-cells = <0>;
 			};

arch/arm/boot/dts/exynos3250.dtsi+1−1

@@ -138,8 +138,8 @@ · 137 unmodified lines
138		138
139	mipi_phy: video-phy@10020710 {	139	mipi_phy: video-phy@10020710 {
140	compatible = "samsung,s5pv210-mipi-video-phy";	140	compatible = "samsung,s5pv210-mipi-video-phy";
141	reg = <0x10020710 8>;
142	#phy-cells = <1>;	141	#phy-cells = <1>;
		142	syscon = <&pmu_system_controller>;
143	};	143	};
144		144
145	pd_cam: cam-power-domain@10023C00 {	145	pd_cam: cam-power-domain@10023C00 {

arch/arm/boot/dts/exynos4210-origen.dts+4−0

 	};
 };
+&cpu0 {
+	cpu0-supply = <&buck1_reg>;
+};
 &fimd {
 	pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
 	pinctrl-names = "default";

arch/arm/boot/dts/exynos4210-trats.dts+4−0

 	};
 };
+&cpu0 {
+	cpu0-supply = <&varm_breg>;
+};
 &dsi_0 {
 	vddcore-supply = <&vusb_reg>;
 	vddio-supply = <&vmipi_reg>;

arch/arm/boot/dts/exynos4210-universal_c210.dts+4−0

 	};
 };
+&cpu0 {
+	cpu0-supply = <&vdd_arm_reg>;
+};
 &pinctrl_1 {
 	hdmi_hpd: hdmi-hpd {
 		samsung,pins = "gpx3-7";

arch/arm/boot/dts/exynos4210.dtsi+12−0

@@ -40,6 +40,18 @@ · 39 unmodified lines
40	device_type = "cpu";	40	device_type = "cpu";
41	compatible = "arm,cortex-a9";	41	compatible = "arm,cortex-a9";
42	reg = <0x900>;	42	reg = <0x900>;
		43	clocks = <&clock CLK_ARM_CLK>;
		44	clock-names = "cpu";
		45	clock-latency = <160000>;
		46
		47	operating-points = <
		48	1200000 1250000
		49	1000000 1150000
		50	800000 1075000
		51	500000 975000
		52	400000 975000
		53	200000 950000
		54	>;
43	cooling-min-level = <4>;	55	cooling-min-level = <4>;
44	cooling-max-level = <2>;	56	cooling-max-level = <2>;
45	#cooling-cells = <2>; /* min followed by max */	57	#cooling-cells = <2>; /* min followed by max */

arch/arm/boot/dts/imx35.dtsi+4−4

@@ -286,8 +286,8 @@ · 285 unmodified lines
286	can1: can@53fe4000 {	286	can1: can@53fe4000 {
287	compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";	287	compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
288	reg = <0x53fe4000 0x1000>;	288	reg = <0x53fe4000 0x1000>;
289	clocks = <&clks 33>;	289	clocks = <&clks 33>, <&clks 33>;
290	clock-names = "ipg";	290	clock-names = "ipg", "per";
291	interrupts = <43>;	291	interrupts = <43>;
292	status = "disabled";	292	status = "disabled";
293	};	293	};
@@ -295,8 +295,8 @@ · 1 unmodified line
295	can2: can@53fe8000 {	295	can2: can@53fe8000 {
296	compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";	296	compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
297	reg = <0x53fe8000 0x1000>;	297	reg = <0x53fe8000 0x1000>;
298	clocks = <&clks 34>;	298	clocks = <&clks 34>, <&clks 34>;
299	clock-names = "ipg";	299	clock-names = "ipg", "per";
300	interrupts = <44>;	300	interrupts = <44>;
301	status = "disabled";	301	status = "disabled";
302	};	302	};

arch/arm/boot/dts/imx6qdl.dtsi+4−4

@@ -181,10 +181,10 @@ · 180 unmodified lines
181	interrupt-names = "msi";	181	interrupt-names = "msi";
182	#interrupt-cells = <1>;	182	#interrupt-cells = <1>;
183	interrupt-map-mask = <0 0 0 0x7>;	183	interrupt-map-mask = <0 0 0 0x7>;
184	interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,	184	interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
185	<0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,	185	<0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
186	<0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,	186	<0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
187	<0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;	187	<0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
188	clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,	188	clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
189	<&clks IMX6QDL_CLK_LVDS1_GATE>,	189	<&clks IMX6QDL_CLK_LVDS1_GATE>,
190	<&clks IMX6QDL_CLK_PCIE_REF_125M>;	190	<&clks IMX6QDL_CLK_PCIE_REF_125M>;

arch/arm/boot/dts/k2e-clocks.dtsi+2−3

 		#clock-cells = <0>;
 		compatible = "ti,keystone,main-pll-clock";
 		clocks = <&refclksys>;
-		reg = <0x02620350 4>, <0x02310110 4>;
+		reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
-		reg-names = "control", "multiplier";
+		reg-names = "control", "multiplier", "post-divider";
-		fixed-postdiv = <2>;
 	};
 	papllclk: papllclk@2620358 {

arch/arm/boot/dts/k2e.dtsi+11−4

@@ -131,10 +131,17 @@ · 130 unmodified lines
131	<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;	131	<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
132	};	132	};
133	};	133	};
		134
		135	mdio: mdio@24200f00 {
		136	compatible = "ti,keystone_mdio", "ti,davinci_mdio";
		137	#address-cells = <1>;
		138	#size-cells = <0>;
		139	reg = <0x24200f00 0x100>;
		140	status = "disabled";
		141	clocks = <&clkcpgmac>;
		142	clock-names = "fck";
		143	bus_freq = <2500000>;
		144	};
134	/include/ "k2e-netcp.dtsi"	145	/include/ "k2e-netcp.dtsi"
135	};	146	};
136	};	147	};
137
138	&mdio {
139	reg = <0x24200f00 0x100>;
140	};

arch/arm/boot/dts/k2hk-clocks.dtsi+2−3

 		#clock-cells = <0>;
 		compatible = "ti,keystone,main-pll-clock";
 		clocks = <&refclksys>;
-		reg = <0x02620350 4>, <0x02310110 4>;
+		reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
-		reg-names = "control", "multiplier";
+		reg-names = "control", "multiplier", "post-divider";
-		fixed-postdiv = <2>;
 	};
 	papllclk: papllclk@2620358 {

arch/arm/boot/dts/k2hk.dtsi+11−0

@@ -98,6 +98,17 @@ · 97 unmodified lines
98	#gpio-cells = <2>;	98	#gpio-cells = <2>;
99	gpio,syscon-dev = <&devctrl 0x25c>;	99	gpio,syscon-dev = <&devctrl 0x25c>;
100	};	100	};
		101
		102	mdio: mdio@02090300 {
		103	compatible = "ti,keystone_mdio", "ti,davinci_mdio";
		104	#address-cells = <1>;
		105	#size-cells = <0>;
		106	reg = <0x02090300 0x100>;
		107	status = "disabled";
		108	clocks = <&clkcpgmac>;
		109	clock-names = "fck";
		110	bus_freq = <2500000>;
		111	};
101	/include/ "k2hk-netcp.dtsi"	112	/include/ "k2hk-netcp.dtsi"
102	};	113	};
103	};	114	};

arch/arm/boot/dts/k2l-clocks.dtsi+2−3

 		#clock-cells = <0>;
 		compatible = "ti,keystone,main-pll-clock";
 		clocks = <&refclksys>;
-		reg = <0x02620350 4>, <0x02310110 4>;
+		reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>;
-		reg-names = "control", "multiplier";
+		reg-names = "control", "multiplier", "post-divider";
-		fixed-postdiv = <2>;
 	};
 	papllclk: papllclk@2620358 {

arch/arm/boot/dts/k2l.dtsi+11−5

 	};
 	soc {
 		/include/ "k2l-clocks.dtsi"
 		uart2: serial@02348400 {
 			#gpio-cells = <2>;
 			gpio,syscon-dev = <&devctrl 0x24c>;
 		};
+		mdio: mdio@26200f00 {
+			compatible	= "ti,keystone_mdio", "ti,davinci_mdio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x26200f00 0x100>;
+			status = "disabled";
+			clocks = <&clkcpgmac>;
+			clock-names = "fck";
+			bus_freq	= <2500000>;
+		};
 		/include/ "k2l-netcp.dtsi"
 	};
 };
        /* Pin muxed. Enabled and configured by Bootloader */
        status = "disabled";
 };
-&mdio {
-	reg = <0x26200f00 0x100>;
-};

arch/arm/boot/dts/keystone.dtsi+0−11

@@ -267,17 +267,6 @@ · 266 unmodified lines
267	1 0 0x21000A00 0x00000100>;	267	1 0 0x21000A00 0x00000100>;
268	};	268	};
269		269
270	mdio: mdio@02090300 {
271	compatible = "ti,keystone_mdio", "ti,davinci_mdio";
272	#address-cells = <1>;
273	#size-cells = <0>;
274	reg = <0x02090300 0x100>;
275	status = "disabled";
276	clocks = <&clkpa>;
277	clock-names = "fck";
278	bus_freq = <2500000>;
279	};
280
281	kirq0: keystone_irq@26202a0 {	270	kirq0: keystone_irq@26202a0 {
282	compatible = "ti,keystone-irq";	271	compatible = "ti,keystone-irq";
283	interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;	272	interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;

arch/arm/boot/dts/omap2430.dtsi+2−1

@@ -51,7 +51,8 @@ · 50 unmodified lines
51	};	51	};
52		52
53	scm_conf: scm_conf@270 {	53	scm_conf: scm_conf@270 {
54	compatible = "syscon";	54	compatible = "syscon",
		55	"simple-bus";
55	reg = <0x270 0x240>;	56	reg = <0x270 0x240>;
56	#address-cells = <1>;	57	#address-cells = <1>;
57	#size-cells = <1>;	58	#size-cells = <1>;

arch/arm/boot/dts/omap4.dtsi+2−1

@@ -191,7 +191,8 @@ · 190 unmodified lines
191	};	191	};
192		192
193	omap4_padconf_global: omap4_padconf_global@5a0 {	193	omap4_padconf_global: omap4_padconf_global@5a0 {
194	compatible = "syscon";	194	compatible = "syscon",
		195	"simple-bus";
195	reg = <0x5a0 0x170>;	196	reg = <0x5a0 0x170>;
196	#address-cells = <1>;	197	#address-cells = <1>;
197	#size-cells = <1>;	198	#size-cells = <1>;

arch/arm/boot/dts/omap5.dtsi+2−1

@@ -180,7 +180,8 @@ · 179 unmodified lines
180	};	180	};
181		181
182	omap5_padconf_global: omap5_padconf_global@5a0 {	182	omap5_padconf_global: omap5_padconf_global@5a0 {
183	compatible = "syscon";	183	compatible = "syscon",
		184	"simple-bus";
184	reg = <0x5a0 0xec>;	185	reg = <0x5a0 0xec>;
185	#address-cells = <1>;	186	#address-cells = <1>;
186	#size-cells = <1>;	187	#size-cells = <1>;

arch/arm/boot/dts/ste-dbx5x0.dtsi+27−26

 #include "skeleton.dtsi"
 / {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		enable-method = "ste,dbx500-smp";
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&CPU0>;
+				};
+				core1 {
+					cpu = <&CPU1>;
+				};
+			};
+		};
+		CPU0: cpu@300 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0x300>;
+		};
+		CPU1: cpu@301 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a9";
+			reg = <0x301>;
+		};
+	};
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		interrupt-parent = <&intc>;
 		ranges;
-		cpus {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cpu-map {
-				cluster0 {
-					core0 {
-						cpu = <&CPU0>;
-					};
-					core1 {
-						cpu = <&CPU1>;
-					};
-				};
-			};
-			CPU0: cpu@0 {
-				device_type = "cpu";
-				compatible = "arm,cortex-a9";
-				reg = <0>;
-			};
-			CPU1: cpu@1 {
-				device_type = "cpu";
-				compatible = "arm,cortex-a9";
-				reg = <1>;
-			};
-		};
 		ptm@801ae000 {
 			compatible = "arm,coresight-etm3x", "arm,primecell";
 			reg = <0x801ae000 0x1000>;

arch/arm/boot/dts/ste-nomadik-nhk15.dts+1−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	};	17	};
18		18
19	aliases {	19	aliases {
		20	serial1 = &uart1;
20	stmpe-i2c0 = &stmpe0;	21	stmpe-i2c0 = &stmpe0;
21	stmpe-i2c1 = &stmpe1;	22	stmpe-i2c1 = &stmpe1;
22	};	23	};

arch/arm/boot/dts/ste-nomadik-s8815.dts+4−0

 		bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
 	};
+	aliases {
+		serial1 = &uart1;
+	};
 	src@101e0000 {
 		/* These chrystal drivers are not used on this board */
 		disable-sxtalo;

arch/arm/boot/dts/ste-nomadik-stn8815.dtsi+1−0

@@ -757,6 +757,7 @@ · 756 unmodified lines
757	clock-names = "uartclk", "apb_pclk";	757	clock-names = "uartclk", "apb_pclk";
758	pinctrl-names = "default";	758	pinctrl-names = "default";
759	pinctrl-0 = <&uart0_default_mux>;	759	pinctrl-0 = <&uart0_default_mux>;
		760	status = "disabled";
760	};	761	};
761		762
762	uart1: uart@101fb000 {	763	uart1: uart@101fb000 {

arch/arm/kernel/entry-common.S+1−0

@@ -61,6 +61,7 @@ work_pending: · 60 unmodified lines
61	movlt scno, #(__NR_restart_syscall - __NR_SYSCALL_BASE)	61	movlt scno, #(__NR_restart_syscall - __NR_SYSCALL_BASE)
62	ldmia sp, {r0 - r6} @ have to reload r0 - r6	62	ldmia sp, {r0 - r6} @ have to reload r0 - r6
63	b local_restart @ ... and off we go	63	b local_restart @ ... and off we go
		64	ENDPROC(ret_fast_syscall)
64		65
65	/*	66	/*
66	* "slow" syscall return path. "why" tells us if this was a real syscall.	67	* "slow" syscall return path. "why" tells us if this was a real syscall.

arch/arm/kernel/head.S+3−0

 	sub	lr, r4, r5			@ mmu has been enabled
 	add	r3, r7, lr
 	ldrd	r4, [r3, #0]			@ get secondary_data.pgdir
+ARM_BE8(eor	r4, r4, r5)			@ Swap r5 and r4 in BE:
+ARM_BE8(eor	r5, r4, r5)			@ it can be done in 3 steps
+ARM_BE8(eor	r4, r4, r5)			@ without using a temp reg.
 	ldr	r8, [r3, #8]			@ get secondary_data.swapper_pg_dir
 	badr	lr, __enable_mmu		@ return address
 	mov	r13, r12			@ __secondary_switched address

arch/arm/kernel/vdso.c+3−4

  */
 void update_vsyscall(struct timekeeper *tk)
 {
-	struct timespec xtime_coarse;
 	struct timespec64 *wtm = &tk->wall_to_monotonic;
 	if (!cntvct_ok) {
 	vdso_write_begin(vdso_data);
-	xtime_coarse = __current_kernel_time();
 	vdso_data->tk_is_cntvct			= tk_is_cntvct(tk);
-	vdso_data->xtime_coarse_sec		= xtime_coarse.tv_sec;
+	vdso_data->xtime_coarse_sec		= tk->xtime_sec;
-	vdso_data->xtime_coarse_nsec		= xtime_coarse.tv_nsec;
+	vdso_data->xtime_coarse_nsec		= (u32)(tk->tkr_mono.xtime_nsec >>
+							tk->tkr_mono.shift);
 	vdso_data->wtm_clock_sec		= wtm->tv_sec;
 	vdso_data->wtm_clock_nsec		= wtm->tv_nsec;

arch/arm/mach-exynos/pm_domains.c+1−2

 		pd->base = of_iomap(np, 0);
 		if (!pd->base) {
 			pr_warn("%s: failed to map memory\n", __func__);
-			kfree(pd->pd.name);
+			kfree_const(pd->pd.name);
 			kfree(pd);
-			of_node_put(np);
 			continue;
 		}

arch/arm/mach-omap2/omap_hwmod.c+16−8

  * registers.  This address is needed early so the OCP registers that
  * are part of the device's address space can be ioremapped properly.
  *
+ * If SYSC access is not needed, the registers will not be remapped
+ * and non-availability of MPU access is not treated as an error.
+ *
  * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
  * -ENXIO on absent or invalid register target address space.
  */
 	_save_mpu_port_index(oh);
+	/* if we don't need sysc access we don't need to ioremap */
+	if (!oh->class->sysc)
+		return 0;
+	/* we can't continue without MPU PORT if we need sysc access */
 	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
 		return -ENXIO;
 			 oh->name);
 		/* Extract the IO space from device tree blob */
-		if (!np)
+		if (!np) {
+			pr_err("omap_hwmod: %s: no dt node\n", oh->name);
 			return -ENXIO;
+		}
 		va_start = of_iomap(np, index + oh->mpu_rt_idx);
 	} else {
 				oh->name, np->name);
 	}
-	if (oh->class->sysc) {
+	r = _init_mpu_rt_base(oh, NULL, index, np);
-		r = _init_mpu_rt_base(oh, NULL, index, np);
+	if (r < 0) {
-		if (r < 0) {
+		WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
-			WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
+		     oh->name);
-			     oh->name);
+		return 0;
-			return 0;
-		}
 	}
 	r = _init_clocks(oh, NULL);

arch/arm/mach-omap2/omap_hwmod_7xx_data.c+2−3

 	.syss_offs	= 0x0014,
 	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
 			   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
-	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
-			   SIDLE_SMART_WKUP),
 	.sysc_fields	= &omap_hwmod_sysc_type1,
 };
 	.class		= &dra7xx_gpmc_hwmod_class,
 	.clkdm_name	= "l3main1_clkdm",
 	/* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
-	.flags		= HWMOD_SWSUP_SIDLE | DEBUG_OMAP_GPMC_HWMOD_FLAGS,
+	.flags		= DEBUG_OMAP_GPMC_HWMOD_FLAGS,
 	.main_clk	= "l3_iclk_div",
 	.prcm = {
 		.omap4 = {

arch/arm/vdso/Makefile+1−1

@@ -14,7 +14,7 @@ VDSO_LDFLAGS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096 · 13 unmodified lines
14	VDSO_LDFLAGS += -nostdlib -shared	14	VDSO_LDFLAGS += -nostdlib -shared
15	VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)	15	VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
16	VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--build-id)	16	VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--build-id)
17	VDSO_LDFLAGS += $(call cc-option, -fuse-ld=bfd)	17	VDSO_LDFLAGS += $(call cc-ldoption, -fuse-ld=bfd)
18		18
19	obj-$(CONFIG_VDSO) += vdso.o	19	obj-$(CONFIG_VDSO) += vdso.o
20	extra-$(CONFIG_VDSO) += vdso.lds	20	extra-$(CONFIG_VDSO) += vdso.lds

arch/arm64/boot/dts/apm/apm-storm.dtsi+1−1

@@ -823,7 +823,7 @@ · 822 unmodified lines
823	device_type = "dma";	823	device_type = "dma";
824	reg = <0x0 0x1f270000 0x0 0x10000>,	824	reg = <0x0 0x1f270000 0x0 0x10000>,
825	<0x0 0x1f200000 0x0 0x10000>,	825	<0x0 0x1f200000 0x0 0x10000>,
826	<0x0 0x1b008000 0x0 0x2000>,	826	<0x0 0x1b000000 0x0 0x400000>,
827	<0x0 0x1054a000 0x0 0x100>;	827	<0x0 0x1054a000 0x0 0x100>;
828	interrupts = <0x0 0x82 0x4>,	828	interrupts = <0x0 0x82 0x4>,
829	<0x0 0xb8 0x4>,	829	<0x0 0xb8 0x4>,

arch/arm64/kernel/efi.c+2−2

@@ -122,12 +122,12 @@ static int __init uefi_init(void) · 121 unmodified lines
122		122
123	/* Show what we know for posterity */	123	/* Show what we know for posterity */
124	c16 = early_memremap(efi_to_phys(efi.systab->fw_vendor),	124	c16 = early_memremap(efi_to_phys(efi.systab->fw_vendor),
125	sizeof(vendor));	125	sizeof(vendor) * sizeof(efi_char16_t));
126	if (c16) {	126	if (c16) {
127	for (i = 0; i < (int) sizeof(vendor) - 1 && *c16; ++i)	127	for (i = 0; i < (int) sizeof(vendor) - 1 && *c16; ++i)
128	vendor[i] = c16[i];	128	vendor[i] = c16[i];
129	vendor[i] = '\0';	129	vendor[i] = '\0';
130	early_memunmap(c16, sizeof(vendor));	130	early_memunmap(c16, sizeof(vendor) * sizeof(efi_char16_t));
131	}	131	}
132		132
133	pr_info("EFI v%u.%.02u by %s\n",	133	pr_info("EFI v%u.%.02u by %s\n",

arch/arm64/kernel/signal32.c+2−3

 		 * Other callers might not initialize the si_lsb field,
 		 * so check explicitely for the right codes here.
 		 */
-		if (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO)
+		if (from->si_signo == SIGBUS &&
+		    (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO))
 			err |= __put_user(from->si_addr_lsb, &to->si_addr_lsb);
 #endif
 		break;
 int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
 {
-	memset(to, 0, sizeof *to);
 	if (copy_from_user(to, from, __ARCH_SI_PREAMBLE_SIZE) ||
 	    copy_from_user(to->_sifields._pad,
 			   from->_sifields._pad, SI_PAD_SIZE))

arch/arm64/kernel/vdso.c+3−4

  */
 void update_vsyscall(struct timekeeper *tk)
 {
-	struct timespec xtime_coarse;
 	u32 use_syscall = strcmp(tk->tkr_mono.clock->name, "arch_sys_counter");
 	++vdso_data->tb_seq_count;
 	smp_wmb();
-	xtime_coarse = __current_kernel_time();
 	vdso_data->use_syscall			= use_syscall;
-	vdso_data->xtime_coarse_sec		= xtime_coarse.tv_sec;
+	vdso_data->xtime_coarse_sec		= tk->xtime_sec;
-	vdso_data->xtime_coarse_nsec		= xtime_coarse.tv_nsec;
+	vdso_data->xtime_coarse_nsec		= tk->tkr_mono.xtime_nsec >>
+							tk->tkr_mono.shift;
 	vdso_data->wtm_clock_sec		= tk->wall_to_monotonic.tv_sec;
 	vdso_data->wtm_clock_nsec		= tk->wall_to_monotonic.tv_nsec;

arch/avr32/mach-at32ap/clock.c+19−1

 {
 	unsigned long flags;
+	if (!clk)
+		return 0;
 	spin_lock_irqsave(&clk_lock, flags);
 	__clk_enable(clk);
 	spin_unlock_irqrestore(&clk_lock, flags);
 {
 	unsigned long flags;
+	if (IS_ERR_OR_NULL(clk))
+		return;
 	spin_lock_irqsave(&clk_lock, flags);
 	__clk_disable(clk);
 	spin_unlock_irqrestore(&clk_lock, flags);
 	unsigned long flags;
 	unsigned long rate;
+	if (!clk)
+		return 0;
 	spin_lock_irqsave(&clk_lock, flags);
 	rate = clk->get_rate(clk);
 	spin_unlock_irqrestore(&clk_lock, flags);
 {
 	unsigned long flags, actual_rate;
+	if (!clk)
+		return 0;
 	if (!clk->set_rate)
 		return -ENOSYS;
 	unsigned long flags;
 	long ret;
+	if (!clk)
+		return 0;
 	if (!clk->set_rate)
 		return -ENOSYS;
 	unsigned long flags;
 	int ret;
+	if (!clk)
+		return 0;
 	if (!clk->set_parent)
 		return -ENOSYS;
 struct clk *clk_get_parent(struct clk *clk)
 {
-	return clk->parent;
+	return !clk ? NULL : clk->parent;
 }
 EXPORT_SYMBOL(clk_get_parent);

arch/mips/Kconfig+0−1

@@ -151,7 +151,6 @@ config BMIPS_GENERIC · 150 unmodified lines
151	select BCM7120_L2_IRQ	151	select BCM7120_L2_IRQ
152	select BRCMSTB_L2_IRQ	152	select BRCMSTB_L2_IRQ
153	select IRQ_MIPS_CPU	153	select IRQ_MIPS_CPU
154	select RAW_IRQ_ACCESSORS
155	select DMA_NONCOHERENT	154	select DMA_NONCOHERENT
156	select SYS_SUPPORTS_32BIT_KERNEL	155	select SYS_SUPPORTS_32BIT_KERNEL
157	select SYS_SUPPORTS_LITTLE_ENDIAN	156	select SYS_SUPPORTS_LITTLE_ENDIAN

arch/mips/ath79/setup.c+1−0

@@ -190,6 +190,7 @@ int get_c0_perfcount_int(void) · 189 unmodified lines
190	{	190	{
191	return ATH79_MISC_IRQ(5);	191	return ATH79_MISC_IRQ(5);
192	}	192	}
		193	EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
193		194
194	unsigned int get_c0_compare_int(void)	195	unsigned int get_c0_compare_int(void)
195	{	196	{

arch/mips/cavium-octeon/smp.c+1−1

@@ -42,7 +42,7 @@ static irqreturn_t mailbox_interrupt(int irq, void *dev_id) · 41 unmodified lines
42	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action);	42	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(coreid), action);
43		43
44	if (action & SMP_CALL_FUNCTION)	44	if (action & SMP_CALL_FUNCTION)
45	smp_call_function_interrupt();	45	generic_smp_call_function_interrupt();
46	if (action & SMP_RESCHEDULE_YOURSELF)	46	if (action & SMP_RESCHEDULE_YOURSELF)
47	scheduler_ipi();	47	scheduler_ipi();
48		48

arch/mips/include/asm/mach-bcm63xx/dma-coherence.h+0−10

@@ -1,10 +0,0 @@
1	#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H
2	#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H
3
4	#include <asm/bmips.h>
5
6	#define plat_post_dma_flush bmips_post_dma_flush
7
8	#include <asm/mach-generic/dma-coherence.h>
9
10	#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */

arch/mips/include/asm/pgtable.h+31−0

@@ -182,8 +182,39 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) · 181 unmodified lines
182	* Make sure the buddy is global too (if it's !none,	182	* Make sure the buddy is global too (if it's !none,
183	* it better already be global)	183	* it better already be global)
184	*/	184	*/
		185	#ifdef CONFIG_SMP
		186	/*
		187	* For SMP, multiple CPUs can race, so we need to do
		188	* this atomically.
		189	*/
		190	#ifdef CONFIG_64BIT
		191	#define LL_INSN "lld"
		192	#define SC_INSN "scd"
		193	#else /* CONFIG_32BIT */
		194	#define LL_INSN "ll"
		195	#define SC_INSN "sc"
		196	#endif
		197	unsigned long page_global = _PAGE_GLOBAL;
		198	unsigned long tmp;
		199
		200	__asm__ __volatile__ (
		201	" .set push\n"
		202	" .set noreorder\n"
		203	"1: " LL_INSN " %[tmp], %[buddy]\n"
		204	" bnez %[tmp], 2f\n"
		205	" or %[tmp], %[tmp], %[global]\n"
		206	" " SC_INSN " %[tmp], %[buddy]\n"
		207	" beqz %[tmp], 1b\n"
		208	" nop\n"
		209	"2:\n"
		210	" .set pop"
		211	: [buddy] "+m" (buddy->pte),
		212	[tmp] "=&r" (tmp)
		213	: [global] "r" (page_global));
		214	#else /* !CONFIG_SMP */
185	if (pte_none(*buddy))	215	if (pte_none(*buddy))
186	pte_val(buddy) = pte_val(buddy) \| _PAGE_GLOBAL;	216	pte_val(buddy) = pte_val(buddy) \| _PAGE_GLOBAL;
		217	#endif /* CONFIG_SMP */
187	}	218	}
188	#endif	219	#endif
189	}	220	}

arch/mips/include/asm/smp.h+0−2

@@ -83,8 +83,6 @@ static inline void __cpu_die(unsigned int cpu) · 82 unmodified lines
83	extern void play_dead(void);	83	extern void play_dead(void);
84	#endif	84	#endif
85		85
86	extern asmlinkage void smp_call_function_interrupt(void);
87
88	static inline void arch_send_call_function_single_ipi(int cpu)	86	static inline void arch_send_call_function_single_ipi(int cpu)
89	{	87	{
90	extern struct plat_smp_ops mp_ops; / private */	88	extern struct plat_smp_ops mp_ops; / private */

arch/mips/include/asm/stackframe.h+25−0

@@ -152,6 +152,31 @@ · 151 unmodified lines
152	.set noreorder	152	.set noreorder
153	bltz k0, 8f	153	bltz k0, 8f
154	move k1, sp	154	move k1, sp
		155	#ifdef CONFIG_EVA
		156	/*
		157	* Flush interAptiv's Return Prediction Stack (RPS) by writing
		158	* EntryHi. Toggling Config7.RPS is slower and less portable.
		159	*
		160	* The RPS isn't automatically flushed when exceptions are
		161	* taken, which can result in kernel mode speculative accesses
		162	* to user addresses if the RPS mispredicts. That's harmless
		163	* when user and kernel share the same address space, but with
		164	* EVA the same user segments may be unmapped to kernel mode,
		165	* even containing sensitive MMIO regions or invalid memory.
		166	*
		167	* This can happen when the kernel sets the return address to
		168	* ret_from_* and jr's to the exception handler, which looks
		169	* more like a tail call than a function call. If nested calls
		170	* don't evict the last user address in the RPS, it will
		171	* mispredict the return and fetch from a user controlled
		172	* address into the icache.
		173	*
		174	* More recent EVA-capable cores with MAAR to restrict
		175	* speculative accesses aren't affected.
		176	*/
		177	MFC0 k0, CP0_ENTRYHI
		178	MTC0 k0, CP0_ENTRYHI
		179	#endif
155	.set reorder	180	.set reorder
156	/* Called from user mode, new stack. */	181	/* Called from user mode, new stack. */
157	get_saved_sp	182	get_saved_sp

arch/mips/kernel/mips-mt-fpaff.c+3−2

 				      unsigned long __user *user_mask_ptr)
 {
 	unsigned int real_len;
-	cpumask_t mask;
+	cpumask_t allowed, mask;
 	int retval;
 	struct task_struct *p;
 	if (retval)
 		goto out_unlock;
-	cpumask_and(&mask, &p->thread.user_cpus_allowed, cpu_possible_mask);
+	cpumask_or(&allowed, &p->thread.user_cpus_allowed, &p->cpus_allowed);
+	cpumask_and(&mask, &allowed, cpu_active_mask);
 out_unlock:
 	read_unlock(&tasklist_lock);

arch/mips/kernel/prom.c+1−1

@@ -38,7 +38,7 @@ char *mips_get_machine_name(void) · 37 unmodified lines
38	return mips_machine_name;	38	return mips_machine_name;
39	}	39	}
40		40
41	#ifdef CONFIG_OF	41	#ifdef CONFIG_USE_OF
42	void __init early_init_dt_add_memory_arch(u64 base, u64 size)	42	void __init early_init_dt_add_memory_arch(u64 base, u64 size)
43	{	43	{
44	return add_memory_region(base, size, BOOT_MEM_RAM);	44	return add_memory_region(base, size, BOOT_MEM_RAM);

arch/mips/kernel/relocate_kernel.S+4−4

@@ -24,7 +24,7 @@ LEAF(relocate_new_kernel) · 23 unmodified lines
24		24
25	process_entry:	25	process_entry:
26	PTR_L s2, (s0)	26	PTR_L s2, (s0)
27	PTR_ADD s0, s0, SZREG	27	PTR_ADDIU s0, s0, SZREG
28		28
29	/*	29	/*
30	* In case of a kdump/crash kernel, the indirection page is not	30	* In case of a kdump/crash kernel, the indirection page is not
@@ -61,9 +61,9 @@ copy_word: · 30 unmodified lines
61	/* copy page word by word */	61	/* copy page word by word */
62	REG_L s5, (s2)	62	REG_L s5, (s2)
63	REG_S s5, (s4)	63	REG_S s5, (s4)
64	PTR_ADD s4, s4, SZREG	64	PTR_ADDIU s4, s4, SZREG
65	PTR_ADD s2, s2, SZREG	65	PTR_ADDIU s2, s2, SZREG
66	LONG_SUB s6, s6, 1	66	LONG_ADDIU s6, s6, -1
67	beq s6, zero, process_entry	67	beq s6, zero, process_entry
68	b copy_word	68	b copy_word
69	b process_entry	69	b process_entry

arch/mips/kernel/scall64-64.S+1−1

@@ -80,7 +80,7 @@ syscall_trace_entry: · 79 unmodified lines
80	SAVE_STATIC	80	SAVE_STATIC
81	move s0, t2	81	move s0, t2
82	move a0, sp	82	move a0, sp
83	daddiu a1, v0, __NR_64_Linux	83	move a1, v0
84	jal syscall_trace_enter	84	jal syscall_trace_enter
85		85
86	bltz v0, 2f # seccomp failed? Skip syscall	86	bltz v0, 2f # seccomp failed? Skip syscall

arch/mips/kernel/scall64-n32.S+1−1

@@ -72,7 +72,7 @@ n32_syscall_trace_entry: · 71 unmodified lines
72	SAVE_STATIC	72	SAVE_STATIC
73	move s0, t2	73	move s0, t2
74	move a0, sp	74	move a0, sp
75	daddiu a1, v0, __NR_N32_Linux	75	move a1, v0
76	jal syscall_trace_enter	76	jal syscall_trace_enter
77		77
78	bltz v0, 2f # seccomp failed? Skip syscall	78	bltz v0, 2f # seccomp failed? Skip syscall

arch/mips/kernel/signal32.c+0−2

@@ -409,8 +409,6 @@ int copy_siginfo_to_user32(compat_siginfo_t __user to, const siginfo_t from) · 408 unmodified lines
409		409
410	int copy_siginfo_from_user32(siginfo_t to, compat_siginfo_t __user from)	410	int copy_siginfo_from_user32(siginfo_t to, compat_siginfo_t __user from)
411	{	411	{
412	memset(to, 0, sizeof *to);
413
414	if (copy_from_user(to, from, 3*sizeof(int)) \|\|	412	if (copy_from_user(to, from, 3*sizeof(int)) \|\|
415	copy_from_user(to->_sifields._pad,	413	copy_from_user(to->_sifields._pad,
416	from->_sifields._pad, SI_PAD_SIZE32))	414	from->_sifields._pad, SI_PAD_SIZE32))

arch/mips/kernel/smp-bmips.c+2−2

@@ -284,7 +284,7 @@ static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id) · 283 unmodified lines
284	if (action == 0)	284	if (action == 0)
285	scheduler_ipi();	285	scheduler_ipi();
286	else	286	else
287	smp_call_function_interrupt();	287	generic_smp_call_function_interrupt();
288		288
289	return IRQ_HANDLED;	289	return IRQ_HANDLED;
290	}	290	}
@@ -336,7 +336,7 @@ static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id) · 45 unmodified lines
336	if (action & SMP_RESCHEDULE_YOURSELF)	336	if (action & SMP_RESCHEDULE_YOURSELF)
337	scheduler_ipi();	337	scheduler_ipi();
338	if (action & SMP_CALL_FUNCTION)	338	if (action & SMP_CALL_FUNCTION)
339	smp_call_function_interrupt();	339	generic_smp_call_function_interrupt();
340		340
341	return IRQ_HANDLED;	341	return IRQ_HANDLED;
342	}	342	}

arch/mips/kernel/smp.c+0−10

@@ -192,16 +192,6 @@ asmlinkage void start_secondary(void) · 191 unmodified lines
192	cpu_startup_entry(CPUHP_ONLINE);	192	cpu_startup_entry(CPUHP_ONLINE);
193	}	193	}
194		194
195	/*
196	* Call into both interrupt handlers, as we share the IPI for them
197	*/
198	void __irq_entry smp_call_function_interrupt(void)
199	{
200	irq_enter();
201	generic_smp_call_function_interrupt();
202	irq_exit();
203	}
204
205	static void stop_this_cpu(void *dummy)	195	static void stop_this_cpu(void *dummy)
206	{	196	{
207	/*	197	/*

arch/mips/kernel/traps.c+13−0

 void show_stack(struct task_struct *task, unsigned long *sp)
 {
 	struct pt_regs regs;
+	mm_segment_t old_fs = get_fs();
 	if (sp) {
 		regs.regs[29] = (unsigned long)sp;
 		regs.regs[31] = 0;
 			prepare_frametrace(&regs);
 		}
 	}
+	/*
+	 * show_stack() deals exclusively with kernel mode, so be sure to access
+	 * the stack in the kernel (not user) address space.
+	 */
+	set_fs(KERNEL_DS);
 	show_stacktrace(task, &regs);
+	set_fs(old_fs);
 }
 static void show_code(unsigned int __user *pc)
 	const int field = 2 * sizeof(unsigned long);
 	int multi_match = regs->cp0_status & ST0_TS;
 	enum ctx_state prev_state;
+	mm_segment_t old_fs = get_fs();
 	prev_state = exception_enter();
 	show_regs(regs);
 		dump_tlb_all();
 	}
+	if (!user_mode(regs))
+		set_fs(KERNEL_DS);
 	show_code((unsigned int __user *) regs->cp0_epc);
+	set_fs(old_fs);
 	/*
 	 * Some chips may have other causes of machine check (e.g. SB1
 	 * graduation timer)

arch/mips/kernel/unaligned.c+1−1

@@ -438,7 +438,7 @@ do { \ · 437 unmodified lines
438	: "memory"); \	438	: "memory"); \
439	} while(0)	439	} while(0)
440		440
441	#define StoreDW(addr, value, res) \	441	#define _StoreDW(addr, value, res) \
442	do { \	442	do { \
443	__asm__ __volatile__ ( \	443	__asm__ __volatile__ ( \
444	".set\tpush\n\t" \	444	".set\tpush\n\t" \

arch/mips/lantiq/irq.c+2−1

 static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
 {
-	smp_call_function_interrupt();
+	generic_smp_call_function_interrupt();
 	return IRQ_HANDLED;
 }
 {
 	return ltq_perfcount_irq;
 }
+EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
 unsigned int get_c0_compare_int(void)
 {

arch/mips/loongson64/loongson-3/smp.c+5−2

 	if (action & SMP_RESCHEDULE_YOURSELF)
 		scheduler_ipi();
-	if (action & SMP_CALL_FUNCTION)
+	if (action & SMP_CALL_FUNCTION) {
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
+	}
 	if (action & SMP_ASK_C0COUNT) {
 		BUG_ON(cpu != 0);

arch/mips/mm/cache.c+4−4

arch/mips/mm/fault.c+2−1

 #endif
 				goto bad_area;
 			}
-			if (!(vma->vm_flags & VM_READ)) {
+			if (!(vma->vm_flags & VM_READ) &&
+			    exception_epc(regs) != address) {
 #if 0
 				pr_notice("Cpu%d[%s:%d:%0*lx:%ld:%0*lx] RI violation\n",
 					  raw_smp_processor_id(),

arch/mips/mti-malta/malta-int.c+1−1

@@ -222,7 +222,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 221 unmodified lines
222		222
223	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)	223	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
224	{	224	{
225	smp_call_function_interrupt();	225	generic_smp_call_function_interrupt();
226		226
227	return IRQ_HANDLED;	227	return IRQ_HANDLED;
228	}	228	}

arch/mips/mti-malta/malta-time.c+10−6

 	return mips_cpu_perf_irq;
 }
+EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
 unsigned int get_c0_compare_int(void)
 {
 static void __init init_rtc(void)
 {
-	/* stop the clock whilst setting it up */
+	unsigned char freq, ctrl;
-	CMOS_WRITE(RTC_SET | RTC_24H, RTC_CONTROL);
-	/* 32KHz time base */
+	/* Set 32KHz time base if not already set */
-	CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT);
+	freq = CMOS_READ(RTC_FREQ_SELECT);
+	if ((freq & RTC_DIV_CTL) != RTC_REF_CLCK_32KHZ)
+		CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT);
-	/* start the clock */
+	/* Ensure SET bit is clear so RTC can run */
-	CMOS_WRITE(RTC_24H, RTC_CONTROL);
+	ctrl = CMOS_READ(RTC_CONTROL);
+	if (ctrl & RTC_SET)
+		CMOS_WRITE(ctrl & ~RTC_SET, RTC_CONTROL);
 }
 void __init plat_time_init(void)

arch/mips/mti-sead3/sead3-time.c+1−0

@@ -77,6 +77,7 @@ int get_c0_perfcount_int(void) · 76 unmodified lines
77	return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;	77	return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
78	return -1;	78	return -1;
79	}	79	}
		80	EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
80		81
81	unsigned int get_c0_compare_int(void)	82	unsigned int get_c0_compare_int(void)
82	{	83	{

arch/mips/netlogic/common/smp.c+1−1

@@ -86,7 +86,7 @@ void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc) · 85 unmodified lines
86	{	86	{
87	clear_c0_eimr(irq);	87	clear_c0_eimr(irq);
88	ack_c0_eirr(irq);	88	ack_c0_eirr(irq);
89	smp_call_function_interrupt();	89	generic_smp_call_function_interrupt();
90	set_c0_eimr(irq);	90	set_c0_eimr(irq);
91	}	91	}
92		92

arch/mips/paravirt/paravirt-smp.c+1−1

@@ -114,7 +114,7 @@ static irqreturn_t paravirt_reched_interrupt(int irq, void *dev_id) · 113 unmodified lines
114		114
115	static irqreturn_t paravirt_function_interrupt(int irq, void *dev_id)	115	static irqreturn_t paravirt_function_interrupt(int irq, void *dev_id)
116	{	116	{
117	smp_call_function_interrupt();	117	generic_smp_call_function_interrupt();
118	return IRQ_HANDLED;	118	return IRQ_HANDLED;
119	}	119	}
120		120

arch/mips/pistachio/time.c+1−0

@@ -26,6 +26,7 @@ int get_c0_perfcount_int(void) · 25 unmodified lines
26	{	26	{
27	return gic_get_c0_perfcount_int();	27	return gic_get_c0_perfcount_int();
28	}	28	}
		29	EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
29		30
30	int get_c0_fdc_int(void)	31	int get_c0_fdc_int(void)
31	{	32	{

arch/mips/pmcs-msp71xx/msp_smp.c+1−1

@@ -44,7 +44,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 43 unmodified lines
44		44
45	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)	45	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
46	{	46	{
47	smp_call_function_interrupt();	47	generic_smp_call_function_interrupt();
48		48
49	return IRQ_HANDLED;	49	return IRQ_HANDLED;
50	}	50	}

arch/mips/ralink/irq.c+1−0

@@ -89,6 +89,7 @@ int get_c0_perfcount_int(void) · 88 unmodified lines
89	{	89	{
90	return rt_perfcount_irq;	90	return rt_perfcount_irq;
91	}	91	}
		92	EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
92		93
93	unsigned int get_c0_compare_int(void)	94	unsigned int get_c0_compare_int(void)
94	{	95	{

arch/mips/sgi-ip27/ip27-irq.c+6−2

 		scheduler_ipi();
 	} else if (pend0 & (1UL << CPU_CALL_A_IRQ)) {
 		LOCAL_HUB_CLR_INTR(CPU_CALL_A_IRQ);
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
 	} else if (pend0 & (1UL << CPU_CALL_B_IRQ)) {
 		LOCAL_HUB_CLR_INTR(CPU_CALL_B_IRQ);
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
 	} else
 #endif
 	{

arch/mips/sibyte/bcm1480/smp.c+5−4

 #include <asm/sibyte/bcm1480_regs.h>
 #include <asm/sibyte/bcm1480_int.h>
-extern void smp_call_function_interrupt(void);
 /*
  * These are routines for dealing with the bcm1480 smp capabilities
  * independent of board/firmware
 	if (action & SMP_RESCHEDULE_YOURSELF)
 		scheduler_ipi();
-	if (action & SMP_CALL_FUNCTION)
+	if (action & SMP_CALL_FUNCTION) {
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
+	}
 }

arch/mips/sibyte/sb1250/smp.c+5−2

 	if (action & SMP_RESCHEDULE_YOURSELF)
 		scheduler_ipi();
-	if (action & SMP_CALL_FUNCTION)
+	if (action & SMP_CALL_FUNCTION) {
-		smp_call_function_interrupt();
+		irq_enter();
+		generic_smp_call_function_interrupt();
+		irq_exit();
+	}
 }

arch/powerpc/kernel/signal_32.c+0−2

@@ -966,8 +966,6 @@ int copy_siginfo_to_user32(struct compat_siginfo __user d, const siginfo_t s) · 965 unmodified lines
966		966
967	int copy_siginfo_from_user32(siginfo_t to, struct compat_siginfo __user from)	967	int copy_siginfo_from_user32(siginfo_t to, struct compat_siginfo __user from)
968	{	968	{
969	memset(to, 0, sizeof *to);
970
971	if (copy_from_user(to, from, 3*sizeof(int)) \|\|	969	if (copy_from_user(to, from, 3*sizeof(int)) \|\|
972	copy_from_user(to->_sifields._pad,	970	copy_from_user(to->_sifields._pad,
973	from->_sifields._pad, SI_PAD_SIZE32))	971	from->_sifields._pad, SI_PAD_SIZE32))

arch/powerpc/platforms/powernv/eeh-powernv.c+1−1

@@ -1478,7 +1478,7 @@ static int pnv_eeh_next_error(struct eeh_pe **pe) · 1477 unmodified lines
1478	}	1478	}
1479		1479
1480	/* Unmask the event */	1480	/* Unmask the event */
1481	if (eeh_enabled())	1481	if (ret == EEH_NEXT_ERR_NONE && eeh_enabled())
1482	enable_irq(eeh_event_irq);	1482	enable_irq(eeh_event_irq);
1483		1483
1484	return ret;	1484	return ret;

arch/powerpc/platforms/powernv/pci-ioda.c+6−5

 static __be64 *pnv_pci_ioda2_table_do_alloc_pages(int nid, unsigned shift,
 		unsigned levels, unsigned long limit,
-		unsigned long *current_offset)
+		unsigned long *current_offset, unsigned long *total_allocated)
 {
 	struct page *tce_mem = NULL;
 	__be64 *addr, *tmp;
 	}
 	addr = page_address(tce_mem);
 	memset(addr, 0, allocated);
+	*total_allocated += allocated;
 	--levels;
 	if (!levels) {
 	for (i = 0; i < entries; ++i) {
 		tmp = pnv_pci_ioda2_table_do_alloc_pages(nid, shift,
-				levels, limit, current_offset);
+				levels, limit, current_offset, total_allocated);
 		if (!tmp)
 			break;
 		struct iommu_table *tbl)
 {
 	void *addr;
-	unsigned long offset = 0, level_shift;
+	unsigned long offset = 0, level_shift, total_allocated = 0;
 	const unsigned window_shift = ilog2(window_size);
 	unsigned entries_shift = window_shift - page_shift;
 	unsigned table_shift = max_t(unsigned, entries_shift + 3, PAGE_SHIFT);
 	/* Allocate TCE table */
 	addr = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift,
-			levels, tce_table_size, &offset);
+			levels, tce_table_size, &offset, &total_allocated);
 	/* addr==NULL means that the first level allocation failed */
 	if (!addr)
 			page_shift);
 	tbl->it_level_size = 1ULL << (level_shift - 3);
 	tbl->it_indirect_levels = levels - 1;
-	tbl->it_allocated_size = offset;
+	tbl->it_allocated_size = total_allocated;
 	pr_devel("Created TCE table: ws=%08llx ts=%lx @%08llx\n",
 			window_size, tce_table_size, bus_offset);

arch/s390/kernel/cache.c+2−0

@@ -138,6 +138,8 @@ int init_cache_level(unsigned int cpu) · 137 unmodified lines
138	union cache_topology ct;	138	union cache_topology ct;
139	enum cache_type ctype;	139	enum cache_type ctype;
140		140
		141	if (!test_facility(34))
		142	return -EOPNOTSUPP;
141	if (!this_cpu_ci)	143	if (!this_cpu_ci)
142	return -EINVAL;	144	return -EINVAL;
143	ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);	145	ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);

arch/s390/kvm/kvm-s390.c+2−2

 static int kvm_s390_handle_requests(struct kvm_vcpu *vcpu)
 {
-	if (!vcpu->requests)
-		return 0;
 retry:
 	kvm_s390_vcpu_request_handled(vcpu);
+	if (!vcpu->requests)
+		return 0;
 	/*
 	 * We use MMU_RELOAD just to re-arm the ipte notifier for the
 	 * guest prefix page. gmap_ipte_notify will wait on the ptl lock.

arch/s390/net/bpf_jit_comp.c+7−7

@@ -448,13 +448,13 @@ static void bpf_jit_prologue(struct bpf_jit *jit) · 447 unmodified lines
448	EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,	448	EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,
449	BPF_REG_1, offsetof(struct sk_buff, data));	449	BPF_REG_1, offsetof(struct sk_buff, data));
450	}	450	}
451	/* BPF compatibility: clear A (%b7) and X (%b8) registers */	451	/* BPF compatibility: clear A (%b0) and X (%b7) registers */
452	if (REG_SEEN(BPF_REG_7))	452	if (REG_SEEN(BPF_REG_A))
453	/* lghi %b7,0 */	453	/* lghi %ba,0 */
454	EMIT4_IMM(0xa7090000, BPF_REG_7, 0);	454	EMIT4_IMM(0xa7090000, BPF_REG_A, 0);
455	if (REG_SEEN(BPF_REG_8))	455	if (REG_SEEN(BPF_REG_X))
456	/* lghi %b8,0 */	456	/* lghi %bx,0 */
457	EMIT4_IMM(0xa7090000, BPF_REG_8, 0);	457	EMIT4_IMM(0xa7090000, BPF_REG_X, 0);
458	}	458	}
459		459
460	/*	460	/*

arch/sparc/include/asm/visasm.h+5−11

@@ -28,16 +28,10 @@ · 27 unmodified lines
28	* Must preserve %o5 between VISEntryHalf and VISExitHalf */	28	* Must preserve %o5 between VISEntryHalf and VISExitHalf */
29		29
30	#define VISEntryHalf \	30	#define VISEntryHalf \
31	rd %fprs, %o5; \	31	VISEntry
32	andcc %o5, FPRS_FEF, %g0; \	32
33	be,pt %icc, 297f; \	33	#define VISExitHalf \
34	sethi %hi(298f), %g7; \	34	VISExit
35	sethi %hi(VISenterhalf), %g1; \
36	jmpl %g1 + %lo(VISenterhalf), %g0; \
37	or %g7, %lo(298f), %g7; \
38	clr %o5; \
39	297: wr %o5, FPRS_FEF, %fprs; \
40	298:
41		35
42	#define VISEntryHalfFast(fail_label) \	36	#define VISEntryHalfFast(fail_label) \
43	rd %fprs, %o5; \	37	rd %fprs, %o5; \
@@ -47,7 +41,7 @@ · 3 unmodified lines
47	ba,a,pt %xcc, fail_label; \	41	ba,a,pt %xcc, fail_label; \
48	297: wr %o5, FPRS_FEF, %fprs;	42	297: wr %o5, FPRS_FEF, %fprs;
49		43
50	#define VISExitHalf \	44	#define VISExitHalfFast \
51	wr %o5, 0, %fprs;	45	wr %o5, 0, %fprs;
52		46
53	#ifndef __ASSEMBLY__	47	#ifndef __ASSEMBLY__

arch/sparc/lib/NG4memcpy.S+4−1

@@ -240,8 +240,11 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */ · 239 unmodified lines
240	add %o0, 0x40, %o0	240	add %o0, 0x40, %o0
241	bne,pt %icc, 1b	241	bne,pt %icc, 1b
242	LOAD(prefetch, %g1 + 0x200, #n_reads_strong)	242	LOAD(prefetch, %g1 + 0x200, #n_reads_strong)
		243	#ifdef NON_USER_COPY
		244	VISExitHalfFast
		245	#else
243	VISExitHalf	246	VISExitHalf
244		247	#endif
245	brz,pn %o2, .Lexit	248	brz,pn %o2, .Lexit
246	cmp %o2, 19	249	cmp %o2, 19
247	ble,pn %icc, .Lsmall_unaligned	250	ble,pn %icc, .Lsmall_unaligned

arch/sparc/lib/VISsave.S+2−65

@@ -44,9 +44,8 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3 · 43 unmodified lines
44		44
45	stx %g3, [%g6 + TI_GSR]	45	stx %g3, [%g6 + TI_GSR]
46	2: add %g6, %g1, %g3	46	2: add %g6, %g1, %g3
47	cmp %o5, FPRS_DU	47	mov FPRS_DU \| FPRS_DL \| FPRS_FEF, %o5
48	be,pn %icc, 6f	48	sll %g1, 3, %g1
49	sll %g1, 3, %g1
50	stb %o5, [%g3 + TI_FPSAVED]	49	stb %o5, [%g3 + TI_FPSAVED]
51	rd %gsr, %g2	50	rd %gsr, %g2
52	add %g6, %g1, %g3	51	add %g6, %g1, %g3
@@ -80,65 +79,3 @@ vis1: ldub [%g6 + TI_FPSAVED], %g3 · 27 unmodified lines
80	.align 32	79	.align 32
81	80: jmpl %g7 + %g0, %g0	80	80: jmpl %g7 + %g0, %g0
82	nop	81	nop
83
84	6: ldub [%g3 + TI_FPSAVED], %o5
85	or %o5, FPRS_DU, %o5
86	add %g6, TI_FPREGS+0x80, %g2
87	stb %o5, [%g3 + TI_FPSAVED]
88
89	sll %g1, 5, %g1
90	add %g6, TI_FPREGS+0xc0, %g3
91	wr %g0, FPRS_FEF, %fprs
92	membar #Sync
93	stda %f32, [%g2 + %g1] ASI_BLK_P
94	stda %f48, [%g3 + %g1] ASI_BLK_P
95	membar #Sync
96	ba,pt %xcc, 80f
97	nop
98
99	.align 32
100	80: jmpl %g7 + %g0, %g0
101	nop
102
103	.align 32
104	VISenterhalf:
105	ldub [%g6 + TI_FPDEPTH], %g1
106	brnz,a,pn %g1, 1f
107	cmp %g1, 1
108	stb %g0, [%g6 + TI_FPSAVED]
109	stx %fsr, [%g6 + TI_XFSR]
110	clr %o5
111	jmpl %g7 + %g0, %g0
112	wr %g0, FPRS_FEF, %fprs
113
114	1: bne,pn %icc, 2f
115	srl %g1, 1, %g1
116	ba,pt %xcc, vis1
117	sub %g7, 8, %g7
118	2: addcc %g6, %g1, %g3
119	sll %g1, 3, %g1
120	andn %o5, FPRS_DU, %g2
121	stb %g2, [%g3 + TI_FPSAVED]
122
123	rd %gsr, %g2
124	add %g6, %g1, %g3
125	stx %g2, [%g3 + TI_GSR]
126	add %g6, %g1, %g2
127	stx %fsr, [%g2 + TI_XFSR]
128	sll %g1, 5, %g1
129	3: andcc %o5, FPRS_DL, %g0
130	be,pn %icc, 4f
131	add %g6, TI_FPREGS, %g2
132
133	add %g6, TI_FPREGS+0x40, %g3
134	membar #Sync
135	stda %f0, [%g2 + %g1] ASI_BLK_P
136	stda %f16, [%g3 + %g1] ASI_BLK_P
137	membar #Sync
138	ba,pt %xcc, 4f
139	nop
140
141	.align 32
142	4: and %o5, FPRS_DU, %o5
143	jmpl %g7 + %g0, %g0
144	wr %o5, FPRS_FEF, %fprs

arch/sparc/lib/ksyms.c+0−4

 void VISenter(void);
 EXPORT_SYMBOL(VISenter);
-/* CRYPTO code needs this */
-void VISenterhalf(void);
-EXPORT_SYMBOL(VISenterhalf);
 extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *);
 extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *,
 		unsigned long *);

arch/tile/kernel/compat_signal.c+0−2

@@ -113,8 +113,6 @@ int copy_siginfo_from_user32(siginfo_t to, struct compat_siginfo __user from) · 112 unmodified lines
113	if (!access_ok(VERIFY_READ, from, sizeof(struct compat_siginfo)))	113	if (!access_ok(VERIFY_READ, from, sizeof(struct compat_siginfo)))
114	return -EFAULT;	114	return -EFAULT;
115		115
116	memset(to, 0, sizeof(*to));
117
118	err = __get_user(to->si_signo, &from->si_signo);	116	err = __get_user(to->si_signo, &from->si_signo);
119	err \|= __get_user(to->si_errno, &from->si_errno);	117	err \|= __get_user(to->si_errno, &from->si_errno);
120	err \|= __get_user(to->si_code, &from->si_code);	118	err \|= __get_user(to->si_code, &from->si_code);

arch/x86/boot/compressed/eboot.c+4−0

 		unsigned int e820_type = 0;
 		unsigned long m = efi->efi_memmap;
+#ifdef CONFIG_X86_64
+		m |= (u64)efi->efi_memmap_hi << 32;
+#endif
 		d = (efi_memory_desc_t *)(m + (i * efi->efi_memdesc_size));
 		switch (d->type) {
 		case EFI_RESERVED_TYPE:

arch/x86/entry/entry_64_compat.S+2−1

 	 */
 	andl	$~TS_COMPAT, ASM_THREAD_INFO(TI_status, %rsp, SIZEOF_PTREGS)
 	movl	RIP(%rsp), %ecx		/* User %eip */
+	movq    RAX(%rsp), %rax
 	RESTORE_RSI_RDI
 	xorl	%edx, %edx		/* Do not leak kernel information */
 	xorq	%r8, %r8
 1:	setbe	%al			/* 1 if error, 0 if not */
 	movzbl	%al, %edi		/* zero-extend that into %edi */
 	call	__audit_syscall_exit
-	movq	RAX(%rsp), %rax		/* reload syscall return value */
 	movl	$(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %edi
 	DISABLE_INTERRUPTS(CLBR_NONE)
 	TRACE_IRQS_OFF
 	RESTORE_RSI_RDI_RDX
 	movl	RIP(%rsp), %ecx
 	movl	EFLAGS(%rsp), %r11d
+	movq    RAX(%rsp), %rax
 	xorq	%r10, %r10
 	xorq	%r9, %r9
 	xorq	%r8, %r8

arch/x86/include/asm/desc.h+0−15

@@ -280,21 +280,6 @@ static inline void clear_LDT(void) · 279 unmodified lines
280	set_ldt(NULL, 0);	280	set_ldt(NULL, 0);
281	}	281	}
282		282
283	/*
284	* load one particular LDT into the current CPU
285	*/
286	static inline void load_LDT_nolock(mm_context_t *pc)
287	{
288	set_ldt(pc->ldt, pc->size);
289	}
290
291	static inline void load_LDT(mm_context_t *pc)
292	{
293	preempt_disable();
294	load_LDT_nolock(pc);
295	preempt_enable();
296	}
297
298	static inline unsigned long get_desc_base(const struct desc_struct *desc)	283	static inline unsigned long get_desc_base(const struct desc_struct *desc)
299	{	284	{
300	return (unsigned)(desc->base0 \| ((desc->base1) << 16) \| ((desc->base2) << 24));	285	return (unsigned)(desc->base0 \| ((desc->base1) << 16) \| ((desc->base2) << 24));

arch/x86/include/asm/mmu.h+1−2

@@ -9,8 +9,7 @@ · 8 unmodified lines
9	* we put the segment information here.	9	* we put the segment information here.
10	*/	10	*/
11	typedef struct {	11	typedef struct {
12	void *ldt;	12	struct ldt_struct *ldt;
13	int size;
14		13
15	#ifdef CONFIG_X86_64	14	#ifdef CONFIG_X86_64
16	/* True if mm supports a task running in 32 bit compatibility mode. */	15	/* True if mm supports a task running in 32 bit compatibility mode. */

arch/x86/include/asm/mmu_context.h+49−5

@@ -33,6 +33,50 @@ static inline void load_mm_cr4(struct mm_struct *mm) · 32 unmodified lines
33	static inline void load_mm_cr4(struct mm_struct *mm) {}	33	static inline void load_mm_cr4(struct mm_struct *mm) {}
34	#endif	34	#endif
35		35
		36	/*
		37	* ldt_structs can be allocated, used, and freed, but they are never
		38	* modified while live.
		39	*/
		40	struct ldt_struct {
		41	/*
		42	* Xen requires page-aligned LDTs with special permissions. This is
		43	* needed to prevent us from installing evil descriptors such as
		44	* call gates. On native, we could merge the ldt_struct and LDT
		45	* allocations, but it's not worth trying to optimize.
		46	*/
		47	struct desc_struct *entries;
		48	int size;
		49	};
		50
		51	static inline void load_mm_ldt(struct mm_struct *mm)
		52	{
		53	struct ldt_struct *ldt;
		54
		55	/* lockless_dereference synchronizes with smp_store_release */
		56	ldt = lockless_dereference(mm->context.ldt);
		57
		58	/*
		59	* Any change to mm->context.ldt is followed by an IPI to all
		60	* CPUs with the mm active. The LDT will not be freed until
		61	* after the IPI is handled by all such CPUs. This means that,
		62	* if the ldt_struct changes before we return, the values we see
		63	* will be safe, and the new values will be loaded before we run
		64	* any user code.
		65	*
		66	* NB: don't try to convert this to use RCU without extreme care.
		67	* We would still need IRQs off, because we don't want to change
		68	* the local LDT after an IPI loaded a newer value than the one
		69	* that we can see.
		70	*/
		71
		72	if (unlikely(ldt))
		73	set_ldt(ldt->entries, ldt->size);
		74	else
		75	clear_LDT();
		76
		77	DEBUG_LOCKS_WARN_ON(preemptible());
		78	}
		79
36	/*	80	/*
37	* Used for LDT copy/destruction.	81	* Used for LDT copy/destruction.
38	*/	82	*/
@@ -78,12 +122,12 @@ static inline void switch_mm(struct mm_struct prev, struct mm_struct next, · 39 unmodified lines
78	* was called and then modify_ldt changed	122	* was called and then modify_ldt changed
79	* prev->context.ldt but suppressed an IPI to this CPU.	123	* prev->context.ldt but suppressed an IPI to this CPU.
80	* In this case, prev->context.ldt != NULL, because we	124	* In this case, prev->context.ldt != NULL, because we
81	* never free an LDT while the mm still exists. That	125	* never set context.ldt to NULL while the mm still
82	* means that next->context.ldt != prev->context.ldt,	126	* exists. That means that next->context.ldt !=
83	* because mms never share an LDT.	127	* prev->context.ldt, because mms never share an LDT.
84	*/	128	*/
85	if (unlikely(prev->context.ldt != next->context.ldt))	129	if (unlikely(prev->context.ldt != next->context.ldt))
86	load_LDT_nolock(&next->context);	130	load_mm_ldt(next);
87	}	131	}
88	#ifdef CONFIG_SMP	132	#ifdef CONFIG_SMP
89	else {	133	else {
@@ -106,7 +150,7 @@ static inline void switch_mm(struct mm_struct prev, struct mm_struct next, · 16 unmodified lines
106	load_cr3(next->pgd);	150	load_cr3(next->pgd);
107	trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);	151	trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
108	load_mm_cr4(next);	152	load_mm_cr4(next);
109	load_LDT_nolock(&next->context);	153	load_mm_ldt(next);
110	}	154	}
111	}	155	}
112	#endif	156	#endif

arch/x86/include/asm/sigcontext.h+3−3

@@ -57,9 +57,9 @@ struct sigcontext { · 56 unmodified lines
57	unsigned long ip;	57	unsigned long ip;
58	unsigned long flags;	58	unsigned long flags;
59	unsigned short cs;	59	unsigned short cs;
60	unsigned short __pad2; /* Was called gs, but was always zero. */	60	unsigned short gs;
61	unsigned short __pad1; /* Was called fs, but was always zero. */	61	unsigned short fs;
62	unsigned short ss;	62	unsigned short __pad0;
63	unsigned long err;	63	unsigned long err;
64	unsigned long trapno;	64	unsigned long trapno;
65	unsigned long oldmask;	65	unsigned long oldmask;

arch/x86/include/uapi/asm/sigcontext.h+3−18

@@ -177,24 +177,9 @@ struct sigcontext { · 176 unmodified lines
177	__u64 rip;	177	__u64 rip;
178	__u64 eflags; /* RFLAGS */	178	__u64 eflags; /* RFLAGS */
179	__u16 cs;	179	__u16 cs;
180		180	__u16 gs;
181	/*	181	__u16 fs;
182	* Prior to 2.5.64 ("[PATCH] x86-64 updates for 2.5.64-bk3"),	182	__u16 __pad0;
183	* Linux saved and restored fs and gs in these slots. This
184	* was counterproductive, as fsbase and gsbase were never
185	* saved, so arch_prctl was presumably unreliable.
186	*
187	* If these slots are ever needed for any other purpose, there
188	* is some risk that very old 64-bit binaries could get
189	* confused. I doubt that many such binaries still work,
190	* though, since the same patch in 2.5.64 also removed the
191	* 64-bit set_thread_area syscall, so it appears that there is
192	* no TLS API that works in both pre- and post-2.5.64 kernels.
193	*/
194	__u16 __pad2; /* Was gs. */
195	__u16 __pad1; /* Was fs. */
196
197	__u16 ss;
198	__u64 err;	183	__u64 err;
199	__u64 trapno;	184	__u64 trapno;
200	__u64 oldmask;	185	__u64 oldmask;

arch/x86/kernel/apic/io_apic.c+1−1

@@ -943,7 +943,7 @@ static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info) · 942 unmodified lines
943	*/	943	*/
944	if (irq < nr_legacy_irqs() && data->count == 1) {	944	if (irq < nr_legacy_irqs() && data->count == 1) {
945	if (info->ioapic_trigger != data->trigger)	945	if (info->ioapic_trigger != data->trigger)
946	mp_register_handler(irq, data->trigger);	946	mp_register_handler(irq, info->ioapic_trigger);
947	data->entry.trigger = data->trigger = info->ioapic_trigger;	947	data->entry.trigger = data->trigger = info->ioapic_trigger;
948	data->entry.polarity = data->polarity = info->ioapic_polarity;	948	data->entry.polarity = data->polarity = info->ioapic_polarity;
949	}	949	}

arch/x86/kernel/cpu/common.c+2−2

@@ -1410,7 +1410,7 @@ void cpu_init(void) · 1409 unmodified lines
1410	load_sp0(t, &current->thread);	1410	load_sp0(t, &current->thread);
1411	set_tss_desc(cpu, t);	1411	set_tss_desc(cpu, t);
1412	load_TR_desc();	1412	load_TR_desc();
1413	load_LDT(&init_mm.context);	1413	load_mm_ldt(&init_mm);
1414		1414
1415	clear_all_debug_regs();	1415	clear_all_debug_regs();
1416	dbg_restore_debug_regs();	1416	dbg_restore_debug_regs();
@@ -1459,7 +1459,7 @@ void cpu_init(void) · 42 unmodified lines
1459	load_sp0(t, thread);	1459	load_sp0(t, thread);
1460	set_tss_desc(cpu, t);	1460	set_tss_desc(cpu, t);
1461	load_TR_desc();	1461	load_TR_desc();
1462	load_LDT(&init_mm.context);	1462	load_mm_ldt(&init_mm);
1463		1463
1464	t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);	1464	t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
1465		1465

arch/x86/kernel/cpu/perf_event.c+8−4

 	int idx = segment >> 3;
 	if ((segment & SEGMENT_TI_MASK) == SEGMENT_LDT) {
+		struct ldt_struct *ldt;
 		if (idx > LDT_ENTRIES)
 			return 0;
-		if (idx > current->active_mm->context.size)
+		/* IRQs are off, so this synchronizes with smp_store_release */
+		ldt = lockless_dereference(current->active_mm->context.ldt);
+		if (!ldt || idx > ldt->size)
 			return 0;
-		desc = current->active_mm->context.ldt;
+		desc = &ldt->entries[idx];
 	} else {
 		if (idx > GDT_ENTRIES)
 			return 0;
-		desc = raw_cpu_ptr(gdt_page.gdt);
+		desc = raw_cpu_ptr(gdt_page.gdt) + idx;
 	}
-	return get_desc_base(desc + idx);
+	return get_desc_base(desc);
 }
 #ifdef CONFIG_COMPAT

arch/x86/kernel/ldt.c+142−120

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	#include <linux/string.h>	12	#include <linux/string.h>
13	#include <linux/mm.h>	13	#include <linux/mm.h>
14	#include <linux/smp.h>	14	#include <linux/smp.h>
		15	#include <linux/slab.h>
15	#include <linux/vmalloc.h>	16	#include <linux/vmalloc.h>
16	#include <linux/uaccess.h>	17	#include <linux/uaccess.h>
17		18
@@ -20,82 +21,82 @@ · 2 unmodified lines
20	#include <asm/mmu_context.h>	21	#include <asm/mmu_context.h>
21	#include <asm/syscalls.h>	22	#include <asm/syscalls.h>
22		23
23	#ifdef CONFIG_SMP	24	/* context.lock is held for us, so we don't need any locking. */
24	static void flush_ldt(void *current_mm)	25	static void flush_ldt(void *current_mm)
25	{	26	{
26	if (current->active_mm == current_mm)	27	mm_context_t *pc;
27	load_LDT(&current->active_mm->context);	28
		29	if (current->active_mm != current_mm)
		30	return;
		31
		32	pc = &current->active_mm->context;
		33	set_ldt(pc->ldt->entries, pc->ldt->size);
28	}	34	}
29	#endif
30		35
31	static int alloc_ldt(mm_context_t *pc, int mincount, int reload)	36	/* The caller must call finalize_ldt_struct on the result. LDT starts zeroed. */
		37	static struct ldt_struct *alloc_ldt_struct(int size)
32	{	38	{
33	void oldldt, newldt;	39	struct ldt_struct *new_ldt;
34	int oldsize;	40	int alloc_size;
35		41
36	if (mincount <= pc->size)	42	if (size > LDT_ENTRIES)
37	return 0;	43	return NULL;
38	oldsize = pc->size;	44
39	mincount = (mincount + (PAGE_SIZE / LDT_ENTRY_SIZE - 1)) &	45	new_ldt = kmalloc(sizeof(struct ldt_struct), GFP_KERNEL);
40	(~(PAGE_SIZE / LDT_ENTRY_SIZE - 1));	46	if (!new_ldt)
41	if (mincount * LDT_ENTRY_SIZE > PAGE_SIZE)	47	return NULL;
42	newldt = vmalloc(mincount * LDT_ENTRY_SIZE);	48
		49	BUILD_BUG_ON(LDT_ENTRY_SIZE != sizeof(struct desc_struct));
		50	alloc_size = size * LDT_ENTRY_SIZE;
		51
		52	/*
		53	* Xen is very picky: it requires a page-aligned LDT that has no
		54	* trailing nonzero bytes in any page that contains LDT descriptors.
		55	* Keep it simple: zero the whole allocation and never allocate less
		56	* than PAGE_SIZE.
		57	*/
		58	if (alloc_size > PAGE_SIZE)
		59	new_ldt->entries = vzalloc(alloc_size);
43	else	60	else
44	newldt = (void *)__get_free_page(GFP_KERNEL);	61	new_ldt->entries = kzalloc(PAGE_SIZE, GFP_KERNEL);
45
46	if (!newldt)
47	return -ENOMEM;
48		62
49	if (oldsize)	63	if (!new_ldt->entries) {
50	memcpy(newldt, pc->ldt, oldsize * LDT_ENTRY_SIZE);	64	kfree(new_ldt);
51	oldldt = pc->ldt;	65	return NULL;
52	memset(newldt + oldsize * LDT_ENTRY_SIZE, 0,	66	}
53	(mincount - oldsize) * LDT_ENTRY_SIZE);
54		67
55	paravirt_alloc_ldt(newldt, mincount);	68	new_ldt->size = size;
		69	return new_ldt;
		70	}
56		71
57	#ifdef CONFIG_X86_64	72	/* After calling this, the LDT is immutable. */
58	/* CHECKME: Do we really need this ? */	73	static void finalize_ldt_struct(struct ldt_struct *ldt)
59	wmb();	74	{
60	#endif	75	paravirt_alloc_ldt(ldt->entries, ldt->size);
61	pc->ldt = newldt;
62	wmb();
63	pc->size = mincount;
64	wmb();
65
66	if (reload) {
67	#ifdef CONFIG_SMP
68	preempt_disable();
69	load_LDT(pc);
70	if (!cpumask_equal(mm_cpumask(current->mm),
71	cpumask_of(smp_processor_id())))
72	smp_call_function(flush_ldt, current->mm, 1);
73	preempt_enable();
74	#else
75	load_LDT(pc);
76	#endif
77	}
78	if (oldsize) {
79	paravirt_free_ldt(oldldt, oldsize);
80	if (oldsize * LDT_ENTRY_SIZE > PAGE_SIZE)
81	vfree(oldldt);
82	else
83	put_page(virt_to_page(oldldt));
84	}
85	return 0;
86	}	76	}
87		77
88	static inline int copy_ldt(mm_context_t new, mm_context_t old)	78	/* context.lock is held */
		79	static void install_ldt(struct mm_struct *current_mm,
		80	struct ldt_struct *ldt)
89	{	81	{
90	int err = alloc_ldt(new, old->size, 0);	82	/* Synchronizes with lockless_dereference in load_mm_ldt. */
91	int i;	83	smp_store_release(&current_mm->context.ldt, ldt);
		84
		85	/* Activate the LDT for all CPUs using current_mm. */
		86	on_each_cpu_mask(mm_cpumask(current_mm), flush_ldt, current_mm, true);
		87	}
92		88
93	if (err < 0)	89	static void free_ldt_struct(struct ldt_struct *ldt)
94	return err;	90	{
		91	if (likely(!ldt))
		92	return;
95		93
96	for (i = 0; i < old->size; i++)	94	paravirt_free_ldt(ldt->entries, ldt->size);
97	write_ldt_entry(new->ldt, i, old->ldt + i * LDT_ENTRY_SIZE);	95	if (ldt->size * LDT_ENTRY_SIZE > PAGE_SIZE)
98	return 0;	96	vfree(ldt->entries);
		97	else
		98	kfree(ldt->entries);
		99	kfree(ldt);
99	}	100	}
100		101
101	/*	102	/*
@@ -104,17 +105,37 @@ static inline int copy_ldt(mm_context_t new, mm_context_t old) · 2 unmodified lines
104	*/	105	*/
105	int init_new_context(struct task_struct tsk, struct mm_struct mm)	106	int init_new_context(struct task_struct tsk, struct mm_struct mm)
106	{	107	{
		108	struct ldt_struct *new_ldt;
107	struct mm_struct *old_mm;	109	struct mm_struct *old_mm;
108	int retval = 0;	110	int retval = 0;
109		111
110	mutex_init(&mm->context.lock);	112	mutex_init(&mm->context.lock);
111	mm->context.size = 0;
112	old_mm = current->mm;	113	old_mm = current->mm;
113	if (old_mm && old_mm->context.size > 0) {	114	if (!old_mm) {
114	mutex_lock(&old_mm->context.lock);	115	mm->context.ldt = NULL;
115	retval = copy_ldt(&mm->context, &old_mm->context);	116	return 0;
116	mutex_unlock(&old_mm->context.lock);
117	}	117	}
		118
		119	mutex_lock(&old_mm->context.lock);
		120	if (!old_mm->context.ldt) {
		121	mm->context.ldt = NULL;
		122	goto out_unlock;
		123	}
		124
		125	new_ldt = alloc_ldt_struct(old_mm->context.ldt->size);
		126	if (!new_ldt) {
		127	retval = -ENOMEM;
		128	goto out_unlock;
		129	}
		130
		131	memcpy(new_ldt->entries, old_mm->context.ldt->entries,
		132	new_ldt->size * LDT_ENTRY_SIZE);
		133	finalize_ldt_struct(new_ldt);
		134
		135	mm->context.ldt = new_ldt;
		136
		137	out_unlock:
		138	mutex_unlock(&old_mm->context.lock);
118	return retval;	139	return retval;
119	}	140	}
120		141
@@ -125,53 +146,47 @@ int init_new_context(struct task_struct tsk, struct mm_struct mm) · 4 unmodified lines
125	*/	146	*/
126	void destroy_context(struct mm_struct *mm)	147	void destroy_context(struct mm_struct *mm)
127	{	148	{
128	if (mm->context.size) {	149	free_ldt_struct(mm->context.ldt);
129	#ifdef CONFIG_X86_32	150	mm->context.ldt = NULL;
130	/* CHECKME: Can this ever happen ? */
131	if (mm == current->active_mm)
132	clear_LDT();
133	#endif
134	paravirt_free_ldt(mm->context.ldt, mm->context.size);
135	if (mm->context.size * LDT_ENTRY_SIZE > PAGE_SIZE)
136	vfree(mm->context.ldt);
137	else
138	put_page(virt_to_page(mm->context.ldt));
139	mm->context.size = 0;
140	}
141	}	151	}
142		152
143	static int read_ldt(void __user *ptr, unsigned long bytecount)	153	static int read_ldt(void __user *ptr, unsigned long bytecount)
144	{	154	{
145	int err;	155	int retval;
146	unsigned long size;	156	unsigned long size;
147	struct mm_struct *mm = current->mm;	157	struct mm_struct *mm = current->mm;
148		158
149	if (!mm->context.size)	159	mutex_lock(&mm->context.lock);
150	return 0;	160
		161	if (!mm->context.ldt) {
		162	retval = 0;
		163	goto out_unlock;
		164	}
		165
151	if (bytecount > LDT_ENTRY_SIZE * LDT_ENTRIES)	166	if (bytecount > LDT_ENTRY_SIZE * LDT_ENTRIES)
152	bytecount = LDT_ENTRY_SIZE * LDT_ENTRIES;	167	bytecount = LDT_ENTRY_SIZE * LDT_ENTRIES;
153		168
154	mutex_lock(&mm->context.lock);	169	size = mm->context.ldt->size * LDT_ENTRY_SIZE;
155	size = mm->context.size * LDT_ENTRY_SIZE;
156	if (size > bytecount)	170	if (size > bytecount)
157	size = bytecount;	171	size = bytecount;
158		172
159	err = 0;	173	if (copy_to_user(ptr, mm->context.ldt->entries, size)) {
160	if (copy_to_user(ptr, mm->context.ldt, size))	174	retval = -EFAULT;
161	err = -EFAULT;	175	goto out_unlock;
162	mutex_unlock(&mm->context.lock);	176	}
163	if (err < 0)	177
164	goto error_return;
165	if (size != bytecount) {	178	if (size != bytecount) {
166	/* zero-fill the rest */	179	/* Zero-fill the rest and pretend we read bytecount bytes. */
167	if (clear_user(ptr + size, bytecount - size) != 0) {	180	if (clear_user(ptr + size, bytecount - size)) {
168	err = -EFAULT;	181	retval = -EFAULT;
169	goto error_return;	182	goto out_unlock;
170	}	183	}
171	}	184	}
172	return bytecount;	185	retval = bytecount;
173	error_return:	186
174	return err;	187	out_unlock:
		188	mutex_unlock(&mm->context.lock);
		189	return retval;
175	}	190	}
176		191
177	static int read_default_ldt(void __user *ptr, unsigned long bytecount)	192	static int read_default_ldt(void __user *ptr, unsigned long bytecount)
@@ -195,6 +210,8 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) · 17 unmodified lines
195	struct desc_struct ldt;	210	struct desc_struct ldt;
196	int error;	211	int error;
197	struct user_desc ldt_info;	212	struct user_desc ldt_info;
		213	int oldsize, newsize;
		214	struct ldt_struct new_ldt, old_ldt;
198		215
199	error = -EINVAL;	216	error = -EINVAL;
200	if (bytecount != sizeof(ldt_info))	217	if (bytecount != sizeof(ldt_info))
@@ -213,34 +230,39 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) · 12 unmodified lines
213	goto out;	230	goto out;
214	}	231	}
215		232
216	mutex_lock(&mm->context.lock);	233	if ((oldmode && !ldt_info.base_addr && !ldt_info.limit) \|\|
217	if (ldt_info.entry_number >= mm->context.size) {	234	LDT_empty(&ldt_info)) {
218	error = alloc_ldt(&current->mm->context,	235	/* The user wants to clear the entry. */
219	ldt_info.entry_number + 1, 1);	236	memset(&ldt, 0, sizeof(ldt));
220	if (error < 0)	237	} else {
221	goto out_unlock;	238	if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) {
222	}	239	error = -EINVAL;
223		240	goto out;
224	/* Allow LDTs to be cleared by the user. */
225	if (ldt_info.base_addr == 0 && ldt_info.limit == 0) {
226	if (oldmode \|\| LDT_empty(&ldt_info)) {
227	memset(&ldt, 0, sizeof(ldt));
228	goto install;
229	}	241	}
		242
		243	fill_ldt(&ldt, &ldt_info);
		244	if (oldmode)
		245	ldt.avl = 0;
230	}	246	}
231		247
232	if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) {	248	mutex_lock(&mm->context.lock);
233	error = -EINVAL;	249
		250	old_ldt = mm->context.ldt;
		251	oldsize = old_ldt ? old_ldt->size : 0;
		252	newsize = max((int)(ldt_info.entry_number + 1), oldsize);
		253
		254	error = -ENOMEM;
		255	new_ldt = alloc_ldt_struct(newsize);
		256	if (!new_ldt)
234	goto out_unlock;	257	goto out_unlock;
235	}
236		258
237	fill_ldt(&ldt, &ldt_info);	259	if (old_ldt)
238	if (oldmode)	260	memcpy(new_ldt->entries, old_ldt->entries, oldsize * LDT_ENTRY_SIZE);
239	ldt.avl = 0;	261	new_ldt->entries[ldt_info.entry_number] = ldt;
		262	finalize_ldt_struct(new_ldt);
240		263
241	/* Install the new entry ... */	264	install_ldt(mm, new_ldt);
242	install:	265	free_ldt_struct(old_ldt);
243	write_ldt_entry(mm->context.ldt, ldt_info.entry_number, &ldt);
244	error = 0;	266	error = 0;
245		267
246	out_unlock:	268	out_unlock:

arch/x86/kernel/process_64.c+2−2

@@ -121,11 +121,11 @@ void __show_regs(struct pt_regs *regs, int all) · 120 unmodified lines
121	void release_thread(struct task_struct *dead_task)	121	void release_thread(struct task_struct *dead_task)
122	{	122	{
123	if (dead_task->mm) {	123	if (dead_task->mm) {
124	if (dead_task->mm->context.size) {	124	if (dead_task->mm->context.ldt) {
125	pr_warn("WARNING: dead process %s still has LDT? <%p/%d>\n",	125	pr_warn("WARNING: dead process %s still has LDT? <%p/%d>\n",
126	dead_task->comm,	126	dead_task->comm,
127	dead_task->mm->context.ldt,	127	dead_task->mm->context.ldt,
128	dead_task->mm->context.size);	128	dead_task->mm->context.ldt->size);
129	BUG();	129	BUG();
130	}	130	}
131	}	131	}

arch/x86/kernel/signal.c+11−15

 		COPY(r15);
 #endif /* CONFIG_X86_64 */
+#ifdef CONFIG_X86_32
 		COPY_SEG_CPL3(cs);
 		COPY_SEG_CPL3(ss);
+#else /* !CONFIG_X86_32 */
+		/* Kernel saves and restores only the CS segment register on signals,
+		 * which is the bare minimum needed to allow mixed 32/64-bit code.
+		 * App's signal handler can save/restore other segments if needed. */
+		COPY_SEG_CPL3(cs);
+#endif /* CONFIG_X86_32 */
 		get_user_ex(tmpflags, &sc->flags);
 		regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS);
 #else /* !CONFIG_X86_32 */
 		put_user_ex(regs->flags, &sc->flags);
 		put_user_ex(regs->cs, &sc->cs);
-		put_user_ex(0, &sc->__pad2);
+		put_user_ex(0, &sc->gs);
-		put_user_ex(0, &sc->__pad1);
+		put_user_ex(0, &sc->fs);
-		put_user_ex(regs->ss, &sc->ss);
 #endif /* CONFIG_X86_32 */
 		put_user_ex(fpstate, &sc->fpstate);
 	regs->sp = (unsigned long)frame;
-	/*
+	/* Set up the CS register to run signal handlers in 64-bit mode,
-	 * Set up the CS and SS registers to run signal handlers in
+	   even if the handler happens to be interrupting 32-bit code. */
-	 * 64-bit mode, even if the handler happens to be interrupting
-	 * 32-bit or 16-bit code.
-	 *
-	 * SS is subtle.  In 64-bit mode, we don't need any particular
-	 * SS descriptor, but we do need SS to be valid.  It's possible
-	 * that the old SS is entirely bogus -- this can happen if the
-	 * signal we're trying to deliver is #GP or #SS caused by a bad
-	 * SS value.
-	 */
 	regs->cs = __USER_CS;
-	regs->ss = __USER_DS;
 	return 0;
 }

arch/x86/kernel/step.c+5−3

 #include <linux/mm.h>
 #include <linux/ptrace.h>
 #include <asm/desc.h>
+#include <asm/mmu_context.h>
 unsigned long convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs)
 {
 		struct desc_struct *desc;
 		unsigned long base;
-		seg &= ~7UL;
+		seg >>= 3;
 		mutex_lock(&child->mm->context.lock);
-		if (unlikely((seg >> 3) >= child->mm->context.size))
+		if (unlikely(!child->mm->context.ldt ||
+			     seg >= child->mm->context.ldt->size))
 			addr = -1L; /* bogus selector, access would fault */
 		else {
-			desc = child->mm->context.ldt + seg;
+			desc = &child->mm->context.ldt->entries[seg];
 			base = get_desc_base(desc);
 			/* 16-bit code segment? */

arch/x86/kvm/mtrr.c+4−4

 	if (iter.mtrr_disabled)
 		return mtrr_disabled_type();
+	/* not contained in any MTRRs. */
+	if (type == -1)
+		return mtrr_default_type(mtrr_state);
 	/*
 	 * We just check one page, partially covered by MTRRs is
 	 * impossible.
 	 */
 	WARN_ON(iter.partial_map);
-	/* not contained in any MTRRs. */
-	if (type == -1)
-		return mtrr_default_type(mtrr_state);
 	return type;
 }
 EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);

arch/x86/kvm/x86.c+6−1

 		if (guest_cpuid_has_tsc_adjust(vcpu)) {
 			if (!msr_info->host_initiated) {
 				s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
-				kvm_x86_ops->adjust_tsc_offset(vcpu, adj, true);
+				adjust_tsc_offset_guest(vcpu, adj);
 			}
 			vcpu->arch.ia32_tsc_adjust_msr = data;
 		}
 static void process_smi(struct kvm_vcpu *vcpu)
 {
 	struct kvm_segment cs, ds;
+	struct desc_ptr dt;
 	char buf[512];
 	u32 cr0;
 	kvm_x86_ops->set_cr4(vcpu, 0);
+	/* Undocumented: IDT limit is set to zero on entry to SMM.  */
+	dt.address = dt.size = 0;
+	kvm_x86_ops->set_idt(vcpu, &dt);
 	__kvm_set_dr(vcpu, 7, DR7_FIXED_1);
 	cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;

arch/x86/math-emu/fpu_entry.c+1−2

 #include <asm/uaccess.h>
 #include <asm/traps.h>
-#include <asm/desc.h>
 #include <asm/user.h>
 #include <asm/fpu/internal.h>
 			math_abort(FPU_info, SIGILL);
 		}
-		code_descriptor = LDT_DESCRIPTOR(FPU_CS);
+		code_descriptor = FPU_get_ldt_descriptor(FPU_CS);
 		if (SEG_D_SIZE(code_descriptor)) {
 			/* The above test may be wrong, the book is not clear */
 			/* Segmented 32 bit protected mode */

arch/x86/math-emu/fpu_system.h+18−3

@@ -16,9 +16,24 @@ · 15 unmodified lines
16	#include <linux/kernel.h>	16	#include <linux/kernel.h>
17	#include <linux/mm.h>	17	#include <linux/mm.h>
18		18
19	/* s is always from a cpu register, and the cpu does bounds checking	19	#include <asm/desc.h>
20	* during register load --> no further bounds checks needed */	20	#include <asm/mmu_context.h>
21	#define LDT_DESCRIPTOR(s) (((struct desc_struct *)current->mm->context.ldt)[(s) >> 3])	21
		22	static inline struct desc_struct FPU_get_ldt_descriptor(unsigned seg)
		23	{
		24	static struct desc_struct zero_desc;
		25	struct desc_struct ret = zero_desc;
		26
		27	#ifdef CONFIG_MODIFY_LDT_SYSCALL
		28	seg >>= 3;
		29	mutex_lock(&current->mm->context.lock);
		30	if (current->mm->context.ldt && seg < current->mm->context.ldt->size)
		31	ret = current->mm->context.ldt->entries[seg];
		32	mutex_unlock(&current->mm->context.lock);
		33	#endif
		34	return ret;
		35	}
		36
22	#define SEG_D_SIZE(x) ((x).b & (3 << 21))	37	#define SEG_D_SIZE(x) ((x).b & (3 << 21))
23	#define SEG_G_BIT(x) ((x).b & (1 << 23))	38	#define SEG_G_BIT(x) ((x).b & (1 << 23))
24	#define SEG_GRANULARITY(x) (((x).b & (1 << 23)) ? 4096 : 1)	39	#define SEG_GRANULARITY(x) (((x).b & (1 << 23)) ? 4096 : 1)

arch/x86/math-emu/get_address.c+1−2

 #include <linux/stddef.h>
 #include <asm/uaccess.h>
-#include <asm/desc.h>
 #include "fpu_system.h"
 #include "exception.h"
 		addr->selector = PM_REG_(segment);
 	}
-	descriptor = LDT_DESCRIPTOR(PM_REG_(segment));
+	descriptor = FPU_get_ldt_descriptor(addr->selector);
 	base_address = SEG_BASE_ADDR(descriptor);
 	address = base_address + offset;
 	limit = base_address

arch/x86/net/bpf_jit_comp.c+4−4

arch/x86/platform/efi/efi.c+5−0

 static int __init arch_parse_efi_cmdline(char *str)
 {
+	if (!str) {
+		pr_warn("need at least one option\n");
+		return -EINVAL;
+	}
 	if (parse_option_str(str, "old_map"))
 		set_bit(EFI_OLD_MEMMAP, &efi.flags);
 	if (parse_option_str(str, "debug"))

arch/x86/power/cpu.c+2−1

 #include <asm/fpu/internal.h>
 #include <asm/debugreg.h>
 #include <asm/cpu.h>
+#include <asm/mmu_context.h>
 #ifdef CONFIG_X86_32
 __visible unsigned long saved_context_ebx;
 	syscall_init();				/* This sets MSR_*STAR and related */
 #endif
 	load_TR_desc();				/* This does ltr */
-	load_LDT(&current->active_mm->context);	/* This does lldt */
+	load_mm_ldt(current->active_mm);	/* This does lldt */
 	fpu__resume_cpu();
 }

arch/x86/xen/Makefile+2−2

@@ -13,13 +13,13 @@ CFLAGS_mmu.o := $(nostackp) · 12 unmodified lines
13	obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \	13	obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \
14	time.o xen-asm.o xen-asm_$(BITS).o \	14	time.o xen-asm.o xen-asm_$(BITS).o \
15	grant-table.o suspend.o platform-pci-unplug.o \	15	grant-table.o suspend.o platform-pci-unplug.o \
16	p2m.o	16	p2m.o apic.o
17		17
18	obj-$(CONFIG_EVENT_TRACING) += trace.o	18	obj-$(CONFIG_EVENT_TRACING) += trace.o
19		19
20	obj-$(CONFIG_SMP) += smp.o	20	obj-$(CONFIG_SMP) += smp.o
21	obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o	21	obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o
22	obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o	22	obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o
23	obj-$(CONFIG_XEN_DOM0) += apic.o vga.o	23	obj-$(CONFIG_XEN_DOM0) += vga.o
24	obj-$(CONFIG_SWIOTLB_XEN) += pci-swiotlb-xen.o	24	obj-$(CONFIG_SWIOTLB_XEN) += pci-swiotlb-xen.o
25	obj-$(CONFIG_XEN_EFI) += efi.o	25	obj-$(CONFIG_XEN_EFI) += efi.o

arch/x86/xen/enlighten.c+40−0

@@ -483,6 +483,7 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 482 unmodified lines
483	pte_t pte;	483	pte_t pte;
484	unsigned long pfn;	484	unsigned long pfn;
485	struct page *page;	485	struct page *page;
		486	unsigned char dummy;
486		487
487	ptep = lookup_address((unsigned long)v, &level);	488	ptep = lookup_address((unsigned long)v, &level);
488	BUG_ON(ptep == NULL);	489	BUG_ON(ptep == NULL);
@@ -492,6 +493,32 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 3 unmodified lines
492		493
493	pte = pfn_pte(pfn, prot);	494	pte = pfn_pte(pfn, prot);
494		495
		496	/*
		497	* Careful: update_va_mapping() will fail if the virtual address
		498	* we're poking isn't populated in the page tables. We don't
		499	* need to worry about the direct map (that's always in the page
		500	* tables), but we need to be careful about vmap space. In
		501	* particular, the top level page table can lazily propagate
		502	* entries between processes, so if we've switched mms since we
		503	* vmapped the target in the first place, we might not have the
		504	* top-level page table entry populated.
		505	*
		506	* We disable preemption because we want the same mm active when
		507	* we probe the target and when we issue the hypercall. We'll
		508	* have the same nominal mm, but if we're a kernel thread, lazy
		509	* mm dropping could change our pgd.
		510	*
		511	* Out of an abundance of caution, this uses __get_user() to fault
		512	* in the target address just in case there's some obscure case
		513	* in which the target address isn't readable.
		514	*/
		515
		516	preempt_disable();
		517
		518	pagefault_disable(); /* Avoid warnings due to being atomic. */
		519	__get_user(dummy, (unsigned char __user __force *)v);
		520	pagefault_enable();
		521
495	if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))	522	if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
496	BUG();	523	BUG();
497		524
@@ -503,6 +530,8 @@ static void set_aliased_prot(void *v, pgprot_t prot) · 5 unmodified lines
503	BUG();	530	BUG();
504	} else	531	} else
505	kmap_flush_unused();	532	kmap_flush_unused();
		533
		534	preempt_enable();
506	}	535	}
507		536
508	static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)	537	static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
@@ -510,6 +539,17 @@ static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) · 1 unmodified line
510	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;	539	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
511	int i;	540	int i;
512		541
		542	/*
		543	* We need to mark the all aliases of the LDT pages RO. We
		544	* don't need to call vm_flush_aliases(), though, since that's
		545	* only responsible for flushing aliases out the TLBs, not the
		546	* page tables, and Xen will flush the TLB for us if needed.
		547	*
		548	* To avoid confusing future readers: none of this is necessary
		549	* to load the LDT. The hypervisor only checks this when the
		550	* LDT is faulted in due to subsequent descriptor access.
		551	*/
		552
513	for(i = 0; i < entries; i += entries_per_page)	553	for(i = 0; i < entries; i += entries_per_page)
514	set_aliased_prot(ldt + i, PAGE_KERNEL_RO);	554	set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
515	}	555	}

arch/x86/xen/xen-ops.h+2−4

 #ifdef CONFIG_XEN_DOM0
 void __init xen_init_vga(const struct dom0_vga_console_info *, size_t size);
-void __init xen_init_apic(void);
 #else
 static inline void __init xen_init_vga(const struct dom0_vga_console_info *info,
 				       size_t size)
 {
 }
-static inline void __init xen_init_apic(void)
-{
-}
 #endif
+void __init xen_init_apic(void);
 #ifdef CONFIG_XEN_EFI
 extern void xen_efi_init(void);
 #else

block/blk-settings.c+2−2

@@ -241,8 +241,8 @@ EXPORT_SYMBOL(blk_queue_bounce_limit); · 240 unmodified lines
241	* Description:	241	* Description:
242	* Enables a low level driver to set a hard upper limit,	242	* Enables a low level driver to set a hard upper limit,
243	* max_hw_sectors, on the size of requests. max_hw_sectors is set by	243	* max_hw_sectors, on the size of requests. max_hw_sectors is set by
244	* the device driver based upon the combined capabilities of I/O	244	* the device driver based upon the capabilities of the I/O
245	* controller and storage device.	245	* controller.
246	*	246	*
247	* max_sectors is a soft limit imposed by the block layer for	247	* max_sectors is a soft limit imposed by the block layer for
248	* filesystem type requests. This value can be overridden on a	248	* filesystem type requests. This value can be overridden on a

crypto/authencesn.c+12−32

 	struct scatterlist *cipher = areq_ctx->cipher;
 	struct scatterlist *hsg = areq_ctx->hsg;
 	struct scatterlist *tsg = areq_ctx->tsg;
-	struct scatterlist *assoc1;
-	struct scatterlist *assoc2;
 	unsigned int ivsize = crypto_aead_ivsize(authenc_esn);
 	unsigned int cryptlen = req->cryptlen;
 	struct page *dstp;
 		cryptlen += ivsize;
 	}
-	if (sg_is_last(assoc))
+	if (assoc->length < 12)
-		return -EINVAL;
-	assoc1 = assoc + 1;
-	if (sg_is_last(assoc1))
-		return -EINVAL;
-	assoc2 = assoc + 2;
-	if (!sg_is_last(assoc2))
 		return -EINVAL;
 	sg_init_table(hsg, 2);
-	sg_set_page(hsg, sg_page(assoc), assoc->length, assoc->offset);
+	sg_set_page(hsg, sg_page(assoc), 4, assoc->offset);
-	sg_set_page(hsg + 1, sg_page(assoc2), assoc2->length, assoc2->offset);
+	sg_set_page(hsg + 1, sg_page(assoc), 4, assoc->offset + 8);
 	sg_init_table(tsg, 1);
-	sg_set_page(tsg, sg_page(assoc1), assoc1->length, assoc1->offset);
+	sg_set_page(tsg, sg_page(assoc), 4, assoc->offset + 4);
 	areq_ctx->cryptlen = cryptlen;
-	areq_ctx->headlen = assoc->length + assoc2->length;
+	areq_ctx->headlen = 8;
-	areq_ctx->trailen = assoc1->length;
+	areq_ctx->trailen = 4;
 	areq_ctx->sg = dst;
 	areq_ctx->complete = authenc_esn_geniv_ahash_done;
 	struct scatterlist *cipher = areq_ctx->cipher;
 	struct scatterlist *hsg = areq_ctx->hsg;
 	struct scatterlist *tsg = areq_ctx->tsg;
-	struct scatterlist *assoc1;
-	struct scatterlist *assoc2;
 	unsigned int ivsize = crypto_aead_ivsize(authenc_esn);
 	struct page *srcp;
 	u8 *vsrc;
 		cryptlen += ivsize;
 	}
-	if (sg_is_last(assoc))
+	if (assoc->length < 12)
-		return -EINVAL;
-	assoc1 = assoc + 1;
-	if (sg_is_last(assoc1))
-		return -EINVAL;
-	assoc2 = assoc + 2;
-	if (!sg_is_last(assoc2))
 		return -EINVAL;
 	sg_init_table(hsg, 2);
-	sg_set_page(hsg, sg_page(assoc), assoc->length, assoc->offset);
+	sg_set_page(hsg, sg_page(assoc), 4, assoc->offset);
-	sg_set_page(hsg + 1, sg_page(assoc2), assoc2->length, assoc2->offset);
+	sg_set_page(hsg + 1, sg_page(assoc), 4, assoc->offset + 8);
 	sg_init_table(tsg, 1);
-	sg_set_page(tsg, sg_page(assoc1), assoc1->length, assoc1->offset);
+	sg_set_page(tsg, sg_page(assoc), 4, assoc->offset + 4);
 	areq_ctx->cryptlen = cryptlen;
-	areq_ctx->headlen = assoc->length + assoc2->length;
+	areq_ctx->headlen = 8;
-	areq_ctx->trailen = assoc1->length;
+	areq_ctx->trailen = 4;
 	areq_ctx->sg = src;
 	areq_ctx->complete = authenc_esn_verify_ahash_done;

drivers/acpi/device_pm.c+1−1

@@ -231,7 +231,7 @@ int acpi_device_set_power(struct acpi_device *device, int state) · 230 unmodified lines
231	dev_warn(&device->dev, "Failed to change power state to %s\n",	231	dev_warn(&device->dev, "Failed to change power state to %s\n",
232	acpi_power_state_string(state));	232	acpi_power_state_string(state));
233	} else {	233	} else {
234	device->power.state = state;	234	device->power.state = target_state;
235	ACPI_DEBUG_PRINT((ACPI_DB_INFO,	235	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
236	"Device [%s] transitioned to %s\n",	236	"Device [%s] transitioned to %s\n",
237	device->pnp.bus_id,	237	device->pnp.bus_id,

drivers/ata/ahci_brcmstb.c+4−2

 	 * Other architectures (e.g., ARM) either do not support big endian, or
 	 * else leave I/O in little endian mode.
 	 */
-	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(__BIG_ENDIAN))
+	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
 		return __raw_readl(addr);
 	else
 		return readl_relaxed(addr);
 static inline void brcm_sata_writereg(u32 val, void __iomem *addr)
 {
 	/* See brcm_sata_readreg() comments */
-	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(__BIG_ENDIAN))
+	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
 		__raw_writel(val, addr);
 	else
 		writel_relaxed(val, addr);
 			   priv->top_ctrl + SATA_TOP_CTRL_BUS_CTRL);
 }
+#ifdef CONFIG_PM_SLEEP
 static int brcm_ahci_suspend(struct device *dev)
 {
 	struct ata_host *host = dev_get_drvdata(dev);
 	brcm_sata_phys_enable(priv);
 	return ahci_platform_resume(dev);
 }
+#endif
 static struct scsi_host_template ahci_platform_sht = {
 	AHCI_SHT(DRV_NAME),

drivers/ata/libata-core.c+3−21

@@ -694,11 +694,11 @@ static int ata_rwcmd_protocol(struct ata_taskfile tf, struct ata_device dev) · 693 unmodified lines
694	* RETURNS:	694	* RETURNS:
695	* Block address read from @tf.	695	* Block address read from @tf.
696	*/	696	*/
697	u64 ata_tf_read_block(const struct ata_taskfile tf, struct ata_device dev)	697	u64 ata_tf_read_block(struct ata_taskfile tf, struct ata_device dev)
698	{	698	{
699	u64 block = 0;	699	u64 block = 0;
700		700
701	if (!dev \|\| tf->flags & ATA_TFLAG_LBA) {	701	if (tf->flags & ATA_TFLAG_LBA) {
702	if (tf->flags & ATA_TFLAG_LBA48) {	702	if (tf->flags & ATA_TFLAG_LBA48) {
703	block \|= (u64)tf->hob_lbah << 40;	703	block \|= (u64)tf->hob_lbah << 40;
704	block \|= (u64)tf->hob_lbam << 32;	704	block \|= (u64)tf->hob_lbam << 32;
@@ -2147,24 +2147,6 @@ static int ata_dev_config_ncq(struct ata_device *dev, · 1442 unmodified lines
2147	return 0;	2147	return 0;
2148	}	2148	}
2149		2149
2150	static void ata_dev_config_sense_reporting(struct ata_device *dev)
2151	{
2152	unsigned int err_mask;
2153
2154	if (!ata_id_has_sense_reporting(dev->id))
2155	return;
2156
2157	if (ata_id_sense_reporting_enabled(dev->id))
2158	return;
2159
2160	err_mask = ata_dev_set_feature(dev, SETFEATURE_SENSE_DATA, 0x1);
2161	if (err_mask) {
2162	ata_dev_dbg(dev,
2163	"failed to enable Sense Data Reporting, Emask 0x%x\n",
2164	err_mask);
2165	}
2166	}
2167
2168	/**	2150	/**
2169	* ata_dev_configure - Configure the specified ATA/ATAPI device	2151	* ata_dev_configure - Configure the specified ATA/ATAPI device
2170	* @dev: Target device to configure	2152	* @dev: Target device to configure
@@ -2387,7 +2369,7 @@ int ata_dev_configure(struct ata_device *dev) · 216 unmodified lines
2387	dev->devslp_timing[i] = sata_setting[j];	2369	dev->devslp_timing[i] = sata_setting[j];
2388	}	2370	}
2389	}	2371	}
2390	ata_dev_config_sense_reporting(dev);	2372
2391	dev->cdb_len = 16;	2373	dev->cdb_len = 16;
2392	}	2374	}
2393		2375

drivers/ata/libata-eh.c+2−103

@@ -1592,8 +1592,6 @@ static int ata_eh_read_log_10h(struct ata_device *dev, · 1591 unmodified lines
1592	tf->hob_lbah = buf[10];	1592	tf->hob_lbah = buf[10];
1593	tf->nsect = buf[12];	1593	tf->nsect = buf[12];
1594	tf->hob_nsect = buf[13];	1594	tf->hob_nsect = buf[13];
1595	if (ata_id_has_ncq_autosense(dev->id))
1596	tf->auxiliary = buf[14] << 16 \| buf[15] << 8 \| buf[16];
1597		1595
1598	return 0;	1596	return 0;
1599	}	1597	}
@@ -1629,70 +1627,6 @@ unsigned int atapi_eh_tur(struct ata_device dev, u8 r_sense_key) · 29 unmodified lines
1629	return err_mask;	1627	return err_mask;
1630	}	1628	}
1631		1629
1632	/**
1633	* ata_eh_request_sense - perform REQUEST_SENSE_DATA_EXT
1634	* @dev: device to perform REQUEST_SENSE_SENSE_DATA_EXT to
1635	* @sense_buf: result sense data buffer (SCSI_SENSE_BUFFERSIZE bytes long)
1636	* @dfl_sense_key: default sense key to use
1637	*
1638	* Perform REQUEST_SENSE_DATA_EXT after the device reported CHECK
1639	* SENSE. This function is EH helper.
1640	*
1641	* LOCKING:
1642	* Kernel thread context (may sleep).
1643	*
1644	* RETURNS:
1645	* encoded sense data on success, 0 on failure or if sense data
1646	* is not available.
1647	*/
1648	static u32 ata_eh_request_sense(struct ata_queued_cmd *qc,
1649	struct scsi_cmnd *cmd)
1650	{
1651	struct ata_device *dev = qc->dev;
1652	struct ata_taskfile tf;
1653	unsigned int err_mask;
1654
1655	if (!cmd)
1656	return 0;
1657
1658	DPRINTK("ATA request sense\n");
1659	ata_dev_warn(dev, "request sense\n");
1660	if (!ata_id_sense_reporting_enabled(dev->id)) {
1661	ata_dev_warn(qc->dev, "sense data reporting disabled\n");
1662	return 0;
1663	}
1664	ata_tf_init(dev, &tf);
1665
1666	tf.flags \|= ATA_TFLAG_ISADDR \| ATA_TFLAG_DEVICE;
1667	tf.flags \|= ATA_TFLAG_LBA \| ATA_TFLAG_LBA48;
1668	tf.command = ATA_CMD_REQ_SENSE_DATA;
1669	tf.protocol = ATA_PROT_NODATA;
1670
1671	err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1672	/*
1673	* ACS-4 states:
1674	* The device may set the SENSE DATA AVAILABLE bit to one in the
1675	* STATUS field and clear the ERROR bit to zero in the STATUS field
1676	* to indicate that the command returned completion without an error
1677	* and the sense data described in table 306 is available.
1678	*
1679	* IOW the 'ATA_SENSE' bit might not be set even though valid
1680	* sense data is available.
1681	* So check for both.
1682	*/
1683	if ((tf.command & ATA_SENSE) \|\|
1684	tf.lbah != 0 \|\| tf.lbam != 0 \|\| tf.lbal != 0) {
1685	ata_scsi_set_sense(cmd, tf.lbah, tf.lbam, tf.lbal);
1686	qc->flags \|= ATA_QCFLAG_SENSE_VALID;
1687	ata_dev_warn(dev, "sense data %02x/%02x/%02x\n",
1688	tf.lbah, tf.lbam, tf.lbal);
1689	} else {
1690	ata_dev_warn(dev, "request sense failed stat %02x emask %x\n",
1691	tf.command, err_mask);
1692	}
1693	return err_mask;
1694	}
1695
1696	/**	1630	/**
1697	* atapi_eh_request_sense - perform ATAPI REQUEST_SENSE	1631	* atapi_eh_request_sense - perform ATAPI REQUEST_SENSE
1698	* @dev: device to perform REQUEST_SENSE to	1632	* @dev: device to perform REQUEST_SENSE to
@@ -1855,19 +1789,6 @@ void ata_eh_analyze_ncq_error(struct ata_link *link) · 156 unmodified lines
1855	memcpy(&qc->result_tf, &tf, sizeof(tf));	1789	memcpy(&qc->result_tf, &tf, sizeof(tf));
1856	qc->result_tf.flags = ATA_TFLAG_ISADDR \| ATA_TFLAG_LBA \| ATA_TFLAG_LBA48;	1790	qc->result_tf.flags = ATA_TFLAG_ISADDR \| ATA_TFLAG_LBA \| ATA_TFLAG_LBA48;
1857	qc->err_mask \|= AC_ERR_DEV \| AC_ERR_NCQ;	1791	qc->err_mask \|= AC_ERR_DEV \| AC_ERR_NCQ;
1858	if (qc->result_tf.auxiliary) {
1859	char sense_key, asc, ascq;
1860
1861	sense_key = (qc->result_tf.auxiliary >> 16) & 0xff;
1862	asc = (qc->result_tf.auxiliary >> 8) & 0xff;
1863	ascq = qc->result_tf.auxiliary & 0xff;
1864	ata_dev_dbg(dev, "NCQ Autosense %02x/%02x/%02x\n",
1865	sense_key, asc, ascq);
1866	ata_scsi_set_sense(qc->scsicmd, sense_key, asc, ascq);
1867	ata_scsi_set_sense_information(qc->scsicmd, &qc->result_tf);
1868	qc->flags \|= ATA_QCFLAG_SENSE_VALID;
1869	}
1870
1871	ehc->i.err_mask &= ~AC_ERR_DEV;	1792	ehc->i.err_mask &= ~AC_ERR_DEV;
1872	}	1793	}
1873		1794
@@ -1897,27 +1818,6 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc, · 23 unmodified lines
1897	return ATA_EH_RESET;	1818	return ATA_EH_RESET;
1898	}	1819	}
1899		1820
1900	/*
1901	* Sense data reporting does not work if the
1902	* device fault bit is set.
1903	*/
1904	if ((stat & ATA_SENSE) && !(stat & ATA_DF) &&
1905	!(qc->flags & ATA_QCFLAG_SENSE_VALID)) {
1906	if (!(qc->ap->pflags & ATA_PFLAG_FROZEN)) {
1907	tmp = ata_eh_request_sense(qc, qc->scsicmd);
1908	if (tmp)
1909	qc->err_mask \|= tmp;
1910	else
1911	ata_scsi_set_sense_information(qc->scsicmd, tf);
1912	} else {
1913	ata_dev_warn(qc->dev, "sense data available but port frozen\n");
1914	}
1915	}
1916
1917	/* Set by NCQ autosense or request sense above */
1918	if (qc->flags & ATA_QCFLAG_SENSE_VALID)
1919	return 0;
1920
1921	if (stat & (ATA_ERR \| ATA_DF))	1821	if (stat & (ATA_ERR \| ATA_DF))
1922	qc->err_mask \|= AC_ERR_DEV;	1822	qc->err_mask \|= AC_ERR_DEV;
1923	else	1823	else
@@ -2661,15 +2561,14 @@ static void ata_eh_link_report(struct ata_link *link) · 737 unmodified lines
2661		2561
2662	#ifdef CONFIG_ATA_VERBOSE_ERROR	2562	#ifdef CONFIG_ATA_VERBOSE_ERROR
2663	if (res->command & (ATA_BUSY \| ATA_DRDY \| ATA_DF \| ATA_DRQ \|	2563	if (res->command & (ATA_BUSY \| ATA_DRDY \| ATA_DF \| ATA_DRQ \|
2664	ATA_SENSE \| ATA_ERR)) {	2564	ATA_ERR)) {
2665	if (res->command & ATA_BUSY)	2565	if (res->command & ATA_BUSY)
2666	ata_dev_err(qc->dev, "status: { Busy }\n");	2566	ata_dev_err(qc->dev, "status: { Busy }\n");
2667	else	2567	else
2668	ata_dev_err(qc->dev, "status: { %s%s%s%s%s}\n",	2568	ata_dev_err(qc->dev, "status: { %s%s%s%s}\n",
2669	res->command & ATA_DRDY ? "DRDY " : "",	2569	res->command & ATA_DRDY ? "DRDY " : "",
2670	res->command & ATA_DF ? "DF " : "",	2570	res->command & ATA_DF ? "DF " : "",
2671	res->command & ATA_DRQ ? "DRQ " : "",	2571	res->command & ATA_DRQ ? "DRQ " : "",
2672	res->command & ATA_SENSE ? "SENSE " : "",
2673	res->command & ATA_ERR ? "ERR " : "");	2572	res->command & ATA_ERR ? "ERR " : "");
2674	}	2573	}
2675		2574

drivers/ata/libata-scsi.c+2−19

 	    ata_scsi_park_show, ata_scsi_park_store);
 EXPORT_SYMBOL_GPL(dev_attr_unload_heads);
-void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
+static void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
 {
-	if (!cmd)
-		return;
 	cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
 	scsi_build_sense_buffer(0, cmd->sense_buffer, sk, asc, ascq);
 }
-void ata_scsi_set_sense_information(struct scsi_cmnd *cmd,
-				    const struct ata_taskfile *tf)
-{
-	u64 information;
-	if (!cmd)
-		return;
-	information = ata_tf_read_block(tf, NULL);
-	scsi_set_sense_information(cmd->sense_buffer, information);
-}
 static ssize_t
 ata_scsi_em_message_store(struct device *dev, struct device_attribute *attr,
 			  const char *buf, size_t count)
 	    ((cdb[2] & 0x20) || need_sense)) {
 		ata_gen_passthru_sense(qc);
 	} else {
-		if (qc->flags & ATA_QCFLAG_SENSE_VALID) {
+		if (!need_sense) {
-			cmd->result = SAM_STAT_CHECK_CONDITION;
-		} else if (!need_sense) {
 			cmd->result = SAM_STAT_GOOD;
 		} else {
 			/* TODO: decide which descriptor format to use

drivers/ata/libata.h+1−5

 extern int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
 			   u64 block, u32 n_block, unsigned int tf_flags,
 			   unsigned int tag);
-extern u64 ata_tf_read_block(const struct ata_taskfile *tf,
+extern u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev);
-			     struct ata_device *dev);
 extern unsigned ata_exec_internal(struct ata_device *dev,
 				  struct ata_taskfile *tf, const u8 *cdb,
 				  int dma_dir, void *buf, unsigned int buflen,
 			      struct scsi_host_template *sht);
 extern void ata_scsi_scan_host(struct ata_port *ap, int sync);
 extern int ata_scsi_offline_dev(struct ata_device *dev);
-extern void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq);
-extern void ata_scsi_set_sense_information(struct scsi_cmnd *cmd,
-					   const struct ata_taskfile *tf);
 extern void ata_scsi_media_change_notify(struct ata_device *dev);
 extern void ata_scsi_hotplug(struct work_struct *work);
 extern void ata_schedule_scsi_eh(struct Scsi_Host *shost);

drivers/ata/sata_sx4.c+12−4

 	readl(mmio + PDC_SDRAM_CONTROL);
 	/* Turn on for ECC */
-	pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
+	if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
-			  PDC_DIMM_SPD_TYPE, &spd0);
+			       PDC_DIMM_SPD_TYPE, &spd0)) {
+		pr_err("Failed in i2c read: device=%#x, subaddr=%#x\n",
+		       PDC_DIMM0_SPD_DEV_ADDRESS, PDC_DIMM_SPD_TYPE);
+		return 1;
+	}
 	if (spd0 == 0x02) {
 		data |= (0x01 << 16);
 		writel(data, mmio + PDC_SDRAM_CONTROL);
 	/* ECC initiliazation. */
-	pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
+	if (!pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS,
-			  PDC_DIMM_SPD_TYPE, &spd0);
+			       PDC_DIMM_SPD_TYPE, &spd0)) {
+		pr_err("Failed in i2c read: device=%#x, subaddr=%#x\n",
+		       PDC_DIMM0_SPD_DEV_ADDRESS, PDC_DIMM_SPD_TYPE);
+		return 1;
+	}
 	if (spd0 == 0x02) {
 		void *buf;
 		VPRINTK("Start ECC initialization\n");

drivers/base/regmap/regcache-rbtree.c+14−5

 	if (!blk)
 		return -ENOMEM;
-	present = krealloc(rbnode->cache_present,
+	if (BITS_TO_LONGS(blklen) > BITS_TO_LONGS(rbnode->blklen)) {
-		    BITS_TO_LONGS(blklen) * sizeof(*present), GFP_KERNEL);
+		present = krealloc(rbnode->cache_present,
-	if (!present) {
+				   BITS_TO_LONGS(blklen) * sizeof(*present),
-		kfree(blk);
+				   GFP_KERNEL);
-		return -ENOMEM;
+		if (!present) {
+			kfree(blk);
+			return -ENOMEM;
+		}
+		memset(present + BITS_TO_LONGS(rbnode->blklen), 0,
+		       (BITS_TO_LONGS(blklen) - BITS_TO_LONGS(rbnode->blklen))
+		       * sizeof(*present));
+	} else {
+		present = rbnode->cache_present;
 	}
 	/* insert the register value in the correct place in the rbnode block */

drivers/block/rbd.c+17−5

 #  define rbd_assert(expr)	((void) 0)
 #endif /* !RBD_DEBUG */
+static void rbd_osd_copyup_callback(struct rbd_obj_request *obj_request);
 static int rbd_img_obj_request_submit(struct rbd_obj_request *obj_request);
 static void rbd_img_parent_read(struct rbd_obj_request *obj_request);
 static void rbd_dev_remove_parent(struct rbd_device *rbd_dev);
 	obj_request_done_set(obj_request);
 }
+static void rbd_osd_call_callback(struct rbd_obj_request *obj_request)
+{
+	dout("%s: obj %p\n", __func__, obj_request);
+	if (obj_request_img_data_test(obj_request))
+		rbd_osd_copyup_callback(obj_request);
+	else
+		obj_request_done_set(obj_request);
+}
 static void rbd_osd_req_callback(struct ceph_osd_request *osd_req,
 				struct ceph_msg *msg)
 {
 		rbd_osd_discard_callback(obj_request);
 		break;
 	case CEPH_OSD_OP_CALL:
+		rbd_osd_call_callback(obj_request);
+		break;
 	case CEPH_OSD_OP_NOTIFY_ACK:
 	case CEPH_OSD_OP_WATCH:
 		rbd_osd_trivial_callback(obj_request);
 }
 static void
-rbd_img_obj_copyup_callback(struct rbd_obj_request *obj_request)
+rbd_osd_copyup_callback(struct rbd_obj_request *obj_request)
 {
 	struct rbd_img_request *img_request;
 	struct rbd_device *rbd_dev;
 	struct page **pages;
 	u32 page_count;
+	dout("%s: obj %p\n", __func__, obj_request);
 	rbd_assert(obj_request->type == OBJ_REQUEST_BIO ||
 		obj_request->type == OBJ_REQUEST_NODATA);
 	rbd_assert(obj_request_img_data_test(obj_request));
 	if (!obj_request->result)
 		obj_request->xferred = obj_request->length;
-	/* Finish up with the normal image object callback */
+	obj_request_done_set(obj_request);
-	rbd_img_obj_callback(obj_request);
 }
 static void
 	/* All set, send it off. */
-	orig_request->callback = rbd_img_obj_copyup_callback;
 	osdc = &rbd_dev->rbd_client->client->osdc;
 	img_result = rbd_obj_request_submit(osdc, orig_request);
 	if (!img_result)

drivers/block/xen-blkback/blkback.c+2−2

@@ -369,8 +369,8 @@ static void purge_persistent_gnt(struct xen_blkif *blkif) · 368 unmodified lines
369	return;	369	return;
370	}	370	}
371		371
372	if (work_pending(&blkif->persistent_purge_work)) {	372	if (work_busy(&blkif->persistent_purge_work)) {
373	pr_alert_ratelimited("Scheduled work from previous purge is still pending, cannot purge list\n");	373	pr_alert_ratelimited("Scheduled work from previous purge is still busy, cannot purge list\n");
374	return;	374	return;
375	}	375	}
376		376

drivers/block/xen-blkfront.c+72−56

 	((_segs + SEGS_PER_INDIRECT_FRAME - 1)/SEGS_PER_INDIRECT_FRAME)
 static int blkfront_setup_indirect(struct blkfront_info *info);
+static int blkfront_gather_backend_features(struct blkfront_info *info);
 static int get_id_from_freelist(struct blkfront_info *info)
 {
 				 * Add the used indirect page back to the list of
 				 * available pages for indirect grefs.
 				 */
-				indirect_page = pfn_to_page(s->indirect_grants[i]->pfn);
+				if (!info->feature_persistent) {
-				list_add(&indirect_page->lru, &info->indirect_pages);
+					indirect_page = pfn_to_page(s->indirect_grants[i]->pfn);
+					list_add(&indirect_page->lru, &info->indirect_pages);
+				}
 				s->indirect_grants[i]->gref = GRANT_INVALID_REF;
 				list_add_tail(&s->indirect_grants[i]->node, &info->grants);
 			}
 	info->shadow_free = info->ring.req_prod_pvt;
 	info->shadow[BLK_RING_SIZE(info)-1].req.u.rw.id = 0x0fffffff;
-	rc = blkfront_setup_indirect(info);
+	rc = blkfront_gather_backend_features(info);
 	if (rc) {
 		kfree(copy);
 		return rc;
 static int blkfront_setup_indirect(struct blkfront_info *info)
 {
-	unsigned int indirect_segments, segs;
+	unsigned int segs;
 	int err, i;
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+	if (info->max_indirect_segments == 0)
-			    "feature-max-indirect-segments", "%u", &indirect_segments,
-			    NULL);
-	if (err) {
-		info->max_indirect_segments = 0;
 		segs = BLKIF_MAX_SEGMENTS_PER_REQUEST;
-	} else {
+	else
-		info->max_indirect_segments = min(indirect_segments,
-						  xen_blkif_max_segments);
 		segs = info->max_indirect_segments;
-	}
 	err = fill_grant_buffer(info, (segs + INDIRECT_GREFS(segs)) * BLK_RING_SIZE(info));
 	if (err)
 	return -ENOMEM;
 }
+/*
+ * Gather all backend feature-*
+ */
+static int blkfront_gather_backend_features(struct blkfront_info *info)
+{
+	int err;
+	int barrier, flush, discard, persistent;
+	unsigned int indirect_segments;
+	info->feature_flush = 0;
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			"feature-barrier", "%d", &barrier,
+			NULL);
+	/*
+	 * If there's no "feature-barrier" defined, then it means
+	 * we're dealing with a very old backend which writes
+	 * synchronously; nothing to do.
+	 *
+	 * If there are barriers, then we use flush.
+	 */
+	if (!err && barrier)
+		info->feature_flush = REQ_FLUSH | REQ_FUA;
+	/*
+	 * And if there is "feature-flush-cache" use that above
+	 * barriers.
+	 */
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			"feature-flush-cache", "%d", &flush,
+			NULL);
+	if (!err && flush)
+		info->feature_flush = REQ_FLUSH;
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			"feature-discard", "%d", &discard,
+			NULL);
+	if (!err && discard)
+		blkfront_setup_discard(info);
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			"feature-persistent", "%u", &persistent,
+			NULL);
+	if (err)
+		info->feature_persistent = 0;
+	else
+		info->feature_persistent = persistent;
+	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
+			    "feature-max-indirect-segments", "%u", &indirect_segments,
+			    NULL);
+	if (err)
+		info->max_indirect_segments = 0;
+	else
+		info->max_indirect_segments = min(indirect_segments,
+						  xen_blkif_max_segments);
+	return blkfront_setup_indirect(info);
+}
 /*
  * Invoked when the backend is finally 'ready' (and has told produced
  * the details about the physical device - #sectors, size, etc).
 	unsigned int physical_sector_size;
 	unsigned int binfo;
 	int err;
-	int barrier, flush, discard, persistent;
 	switch (info->connected) {
 	case BLKIF_STATE_CONNECTED:
 	if (err != 1)
 		physical_sector_size = sector_size;
-	info->feature_flush = 0;
+	err = blkfront_gather_backend_features(info);
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
-			    "feature-barrier", "%d", &barrier,
-			    NULL);
-	/*
-	 * If there's no "feature-barrier" defined, then it means
-	 * we're dealing with a very old backend which writes
-	 * synchronously; nothing to do.
-	 *
-	 * If there are barriers, then we use flush.
-	 */
-	if (!err && barrier)
-		info->feature_flush = REQ_FLUSH | REQ_FUA;
-	/*
-	 * And if there is "feature-flush-cache" use that above
-	 * barriers.
-	 */
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
-			    "feature-flush-cache", "%d", &flush,
-			    NULL);
-	if (!err && flush)
-		info->feature_flush = REQ_FLUSH;
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
-			    "feature-discard", "%d", &discard,
-			    NULL);
-	if (!err && discard)
-		blkfront_setup_discard(info);
-	err = xenbus_gather(XBT_NIL, info->xbdev->otherend,
-			    "feature-persistent", "%u", &persistent,
-			    NULL);
-	if (err)
-		info->feature_persistent = 0;
-	else
-		info->feature_persistent = persistent;
-	err = blkfront_setup_indirect(info);
 	if (err) {
 		xenbus_dev_fatal(info->xbdev, err, "setup_indirect at %s",
 				 info->xbdev->otherend);

drivers/block/zram/zram_drv.c+2−4

 	kfree(meta);
 }
-static struct zram_meta *zram_meta_alloc(int device_id, u64 disksize)
+static struct zram_meta *zram_meta_alloc(char *pool_name, u64 disksize)
 {
 	size_t num_pages;
-	char pool_name[8];
 	struct zram_meta *meta = kmalloc(sizeof(*meta), GFP_KERNEL);
 	if (!meta)
 		goto out_error;
 	}
-	snprintf(pool_name, sizeof(pool_name), "zram%d", device_id);
 	meta->mem_pool = zs_create_pool(pool_name, GFP_NOIO | __GFP_HIGHMEM);
 	if (!meta->mem_pool) {
 		pr_err("Error creating memory pool\n");
 		return -EINVAL;
 	disksize = PAGE_ALIGN(disksize);
-	meta = zram_meta_alloc(zram->disk->first_minor, disksize);
+	meta = zram_meta_alloc(zram->disk->disk_name, disksize);
 	if (!meta)
 		return -ENOMEM;

drivers/char/hw_random/core.c+1−1

@@ -429,7 +429,7 @@ static int hwrng_fillfn(void *unused) · 428 unmodified lines
429	static void start_khwrngd(void)	429	static void start_khwrngd(void)
430	{	430	{
431	hwrng_fill = kthread_run(hwrng_fillfn, NULL, "hwrng");	431	hwrng_fill = kthread_run(hwrng_fillfn, NULL, "hwrng");
432	if (hwrng_fill == ERR_PTR(-ENOMEM)) {	432	if (IS_ERR(hwrng_fill)) {
433	pr_err("hwrng_fill thread creation failed");	433	pr_err("hwrng_fill thread creation failed");
434	hwrng_fill = NULL;	434	hwrng_fill = NULL;
435	}	435	}

drivers/clk/pxa/clk-pxa3xx.c+1−1

@@ -126,7 +126,7 @@ PARENTS(pxa3xx_ac97_bus) = { "ring_osc_60mhz", "ac97" }; · 125 unmodified lines
126	PARENTS(pxa3xx_sbus) = { "ring_osc_60mhz", "system_bus" };	126	PARENTS(pxa3xx_sbus) = { "ring_osc_60mhz", "system_bus" };
127	PARENTS(pxa3xx_smemcbus) = { "ring_osc_60mhz", "smemc" };	127	PARENTS(pxa3xx_smemcbus) = { "ring_osc_60mhz", "smemc" };
128		128
129	#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENA : &CKENB)	129	#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENB : &CKENA)
130	#define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp, \	130	#define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp, \
131	div_hp, bit, is_lp, flags) \	131	div_hp, bit, is_lp, flags) \
132	PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp, \	132	PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp, \

drivers/clocksource/sh_cmt.c+6−0

 {
 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);
+	if (!ch->cs_enabled)
+		return;
 	sh_cmt_stop(ch, FLAG_CLOCKSOURCE);
 	pm_genpd_syscore_poweroff(&ch->cmt->pdev->dev);
 }
 {
 	struct sh_cmt_channel *ch = cs_to_sh_cmt(cs);
+	if (!ch->cs_enabled)
+		return;
 	pm_genpd_syscore_poweron(&ch->cmt->pdev->dev);
 	sh_cmt_start(ch, FLAG_CLOCKSOURCE);
 }

drivers/cpufreq/cpufreq.c+55−53

 	int ret = 0;
 	/* Some related CPUs might not be present (physically hotplugged) */
-	for_each_cpu_and(j, policy->related_cpus, cpu_present_mask) {
+	for_each_cpu(j, policy->real_cpus) {
 		if (j == policy->kobj_cpu)
 			continue;
 	unsigned int j;
 	/* Some related CPUs might not be present (physically hotplugged) */
-	for_each_cpu_and(j, policy->related_cpus, cpu_present_mask) {
+	for_each_cpu(j, policy->real_cpus) {
 		if (j == policy->kobj_cpu)
 			continue;
 	if (!zalloc_cpumask_var(&policy->related_cpus, GFP_KERNEL))
 		goto err_free_cpumask;
+	if (!zalloc_cpumask_var(&policy->real_cpus, GFP_KERNEL))
+		goto err_free_rcpumask;
 	ret = kobject_init_and_add(&policy->kobj, &ktype_cpufreq, &dev->kobj,
 				   "cpufreq");
 	if (ret) {
 		pr_err("%s: failed to init policy->kobj: %d\n", __func__, ret);
-		goto err_free_rcpumask;
+		goto err_free_real_cpus;
 	}
 	INIT_LIST_HEAD(&policy->policy_list);
 	return policy;
+err_free_real_cpus:
+	free_cpumask_var(policy->real_cpus);
 err_free_rcpumask:
 	free_cpumask_var(policy->related_cpus);
 err_free_cpumask:
 	write_unlock_irqrestore(&cpufreq_driver_lock, flags);
 	cpufreq_policy_put_kobj(policy, notify);
+	free_cpumask_var(policy->real_cpus);
 	free_cpumask_var(policy->related_cpus);
 	free_cpumask_var(policy->cpus);
 	kfree(policy);
 	pr_debug("adding CPU %u\n", cpu);
-	/*
+	if (cpu_is_offline(cpu)) {
-	 * Only possible if 'cpu' wasn't physically present earlier and we are
+		/*
-	 * here from subsys_interface add callback. A hotplug notifier will
+		 * Only possible if we are here from the subsys_interface add
-	 * follow and we will handle it like logical CPU hotplug then. For now,
+		 * callback.  A hotplug notifier will follow and we will handle
-	 * just create the sysfs link.
+		 * it as CPU online then.  For now, just create the sysfs link,
-	 */
+		 * unless there is no policy or the link is already present.
-	if (cpu_is_offline(cpu))
+		 */
-		return add_cpu_dev_symlink(per_cpu(cpufreq_cpu_data, cpu), cpu);
+		policy = per_cpu(cpufreq_cpu_data, cpu);
+		return policy && !cpumask_test_and_set_cpu(cpu, policy->real_cpus)
+			? add_cpu_dev_symlink(policy, cpu) : 0;
+	}
 	if (!down_read_trylock(&cpufreq_rwsem))
 		return 0;
 	/* related cpus should atleast have policy->cpus */
 	cpumask_or(policy->related_cpus, policy->related_cpus, policy->cpus);
+	/* Remember which CPUs have been present at the policy creation time. */
+	if (!recover_policy)
+		cpumask_and(policy->real_cpus, policy->cpus, cpu_present_mask);
 	/*
 	 * affected cpus must always be the one, which are online. We aren't
 	 * managing offline cpus here.
 	return ret;
 }
-static int __cpufreq_remove_dev_prepare(struct device *dev,
+static int __cpufreq_remove_dev_prepare(struct device *dev)
-					struct subsys_interface *sif)
 {
 	unsigned int cpu = dev->id;
 	int ret = 0;
 	if (has_target()) {
 		ret = __cpufreq_governor(policy, CPUFREQ_GOV_STOP);
-		if (ret) {
+		if (ret)
 			pr_err("%s: Failed to stop governor\n", __func__);
-			return ret;
-		}
 	}
 	down_write(&policy->rwsem);
 	return ret;
 }
-static int __cpufreq_remove_dev_finish(struct device *dev,
+static int __cpufreq_remove_dev_finish(struct device *dev)
-				       struct subsys_interface *sif)
 {
 	unsigned int cpu = dev->id;
 	int ret;
 	/* If cpu is last user of policy, free policy */
 	if (has_target()) {
 		ret = __cpufreq_governor(policy, CPUFREQ_GOV_POLICY_EXIT);
-		if (ret) {
+		if (ret)
 			pr_err("%s: Failed to exit governor\n", __func__);
-			return ret;
-		}
 	}
 	/*
 	if (cpufreq_driver->exit)
 		cpufreq_driver->exit(policy);
-	/* Free the policy only if the driver is getting removed. */
-	if (sif)
-		cpufreq_policy_free(policy, true);
 	return 0;
 }
 static int cpufreq_remove_dev(struct device *dev, struct subsys_interface *sif)
 {
 	unsigned int cpu = dev->id;
-	int ret;
+	struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_data, cpu);
-	/*
-	 * Only possible if 'cpu' is getting physically removed now. A hotplug
-	 * notifier should have already been called and we just need to remove
-	 * link or free policy here.
-	 */
-	if (cpu_is_offline(cpu)) {
-		struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_data, cpu);
-		struct cpumask mask;
-		if (!policy)
+	if (!policy)
-			return 0;
+		return 0;
-		cpumask_copy(&mask, policy->related_cpus);
+	if (cpu_online(cpu)) {
-		cpumask_clear_cpu(cpu, &mask);
+		__cpufreq_remove_dev_prepare(dev);
+		__cpufreq_remove_dev_finish(dev);
+	}
-		/*
+	cpumask_clear_cpu(cpu, policy->real_cpus);
-		 * Free policy only if all policy->related_cpus are removed
-		 * physically.
-		 */
-		if (cpumask_intersects(&mask, cpu_present_mask)) {
-			remove_cpu_dev_symlink(policy, cpu);
-			return 0;
-		}
+	if (cpumask_empty(policy->real_cpus)) {
 		cpufreq_policy_free(policy, true);
 		return 0;
 	}
-	ret = __cpufreq_remove_dev_prepare(dev, sif);
+	if (cpu != policy->kobj_cpu) {
+		remove_cpu_dev_symlink(policy, cpu);
+	} else {
+		/*
+		 * The CPU owning the policy object is going away.  Move it to
+		 * another suitable CPU.
+		 */
+		unsigned int new_cpu = cpumask_first(policy->real_cpus);
+		struct device *new_dev = get_cpu_device(new_cpu);
+		dev_dbg(dev, "%s: Moving policy object to CPU%u\n", __func__, new_cpu);
-	if (!ret)
+		sysfs_remove_link(&new_dev->kobj, "cpufreq");
-		ret = __cpufreq_remove_dev_finish(dev, sif);
+		policy->kobj_cpu = new_cpu;
+		WARN_ON(kobject_move(&policy->kobj, &new_dev->kobj));
+	}
-	return ret;
+	return 0;
 }
 static void handle_update(struct work_struct *work)
 			break;
 		case CPU_DOWN_PREPARE:
-			__cpufreq_remove_dev_prepare(dev, NULL);
+			__cpufreq_remove_dev_prepare(dev);
 			break;
 		case CPU_POST_DEAD:
-			__cpufreq_remove_dev_finish(dev, NULL);
+			__cpufreq_remove_dev_finish(dev);
 			break;
 		case CPU_DOWN_FAILED:

drivers/cpufreq/intel_pstate.c+1−0

@@ -681,6 +681,7 @@ static struct cpu_defaults knl_params = { · 680 unmodified lines
681	.get_max = core_get_max_pstate,	681	.get_max = core_get_max_pstate,
682	.get_min = core_get_min_pstate,	682	.get_min = core_get_min_pstate,
683	.get_turbo = knl_get_turbo_pstate,	683	.get_turbo = knl_get_turbo_pstate,
		684	.get_scaling = core_get_scaling,
684	.set = core_set_pstate,	685	.set = core_set_pstate,
685	},	686	},
686	};	687	};

drivers/cpufreq/loongson2_cpufreq.c+1−1

@@ -20,7 +20,7 @@ · 19 unmodified lines
20	#include <asm/clock.h>	20	#include <asm/clock.h>
21	#include <asm/idle.h>	21	#include <asm/idle.h>
22		22
23	#include <asm/mach-loongson/loongson.h>	23	#include <asm/mach-loongson64/loongson.h>
24		24
25	static uint nowait;	25	static uint nowait;
26		26

drivers/crypto/caam/caamhash.c+4−3

 			  state->buflen_1;
 	u32 *sh_desc = ctx->sh_desc_fin, *desc;
 	dma_addr_t ptr = ctx->sh_desc_fin_dma;
-	int sec4_sg_bytes;
+	int sec4_sg_bytes, sec4_sg_src_index;
 	int digestsize = crypto_ahash_digestsize(ahash);
 	struct ahash_edesc *edesc;
 	int ret = 0;
 	int sh_len;
-	sec4_sg_bytes = (1 + (buflen ? 1 : 0)) * sizeof(struct sec4_sg_entry);
+	sec4_sg_src_index = 1 + (buflen ? 1 : 0);
+	sec4_sg_bytes = sec4_sg_src_index * sizeof(struct sec4_sg_entry);
 	/* allocate space for base edesc and hw desc commands, link tables */
 	edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN +
 	state->buf_dma = try_buf_map_to_sec4_sg(jrdev, edesc->sec4_sg + 1,
 						buf, state->buf_dma, buflen,
 						last_buflen);
-	(edesc->sec4_sg + sec4_sg_bytes - 1)->len |= SEC4_SG_LEN_FIN;
+	(edesc->sec4_sg + sec4_sg_src_index - 1)->len |= SEC4_SG_LEN_FIN;
 	edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
 					    sec4_sg_bytes, DMA_TO_DEVICE);

drivers/crypto/ixp4xx_crypto.c+0−1

@@ -905,7 +905,6 @@ static int ablk_perform(struct ablkcipher_request *req, int encrypt) · 904 unmodified lines
905	crypt->mode \|= NPE_OP_NOT_IN_PLACE;	905	crypt->mode \|= NPE_OP_NOT_IN_PLACE;
906	/* This was never tested by Intel	906	/* This was never tested by Intel
907	* for more than one dst buffer, I think. */	907	* for more than one dst buffer, I think. */
908	BUG_ON(req->dst->length < nbytes);
909	req_ctx->dst = NULL;	908	req_ctx->dst = NULL;
910	if (!chainup_buffers(dev, req->dst, nbytes, &dst_hook,	909	if (!chainup_buffers(dev, req->dst, nbytes, &dst_hook,
911	flags, DMA_FROM_DEVICE))	910	flags, DMA_FROM_DEVICE))

drivers/crypto/nx/nx-sha256.c+16−11

 	struct sha256_state *sctx = shash_desc_ctx(desc);
 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
-	struct nx_sg *in_sg;
 	struct nx_sg *out_sg;
 	u64 to_process = 0, leftover, total;
 	unsigned long irq_flags;
 	NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
 	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
-	in_sg = nx_ctx->in_sg;
 	max_sg_len = min_t(u64, nx_ctx->ap->sglen,
 			nx_driver.of.max_sg_len/sizeof(struct nx_sg));
 	max_sg_len = min_t(u64, max_sg_len,
 	}
 	do {
-		/*
+		int used_sgs = 0;
-		 * to_process: the SHA256_BLOCK_SIZE data chunk to process in
+		struct nx_sg *in_sg = nx_ctx->in_sg;
-		 * this update. This value is also restricted by the sg list
-		 * limits.
-		 */
-		to_process = total - to_process;
-		to_process = to_process & ~(SHA256_BLOCK_SIZE - 1);
 		if (buf_len) {
 			data_len = buf_len;
-			in_sg = nx_build_sg_list(nx_ctx->in_sg,
+			in_sg = nx_build_sg_list(in_sg,
 						 (u8 *) sctx->buf,
 						 &data_len,
 						 max_sg_len);
 				rc = -EINVAL;
 				goto out;
 			}
+			used_sgs = in_sg - nx_ctx->in_sg;
 		}
+		/* to_process: SHA256_BLOCK_SIZE aligned chunk to be
+		 * processed in this iteration. This value is restricted
+		 * by sg list limits and number of sgs we already used
+		 * for leftover data. (see above)
+		 * In ideal case, we could allow NX_PAGE_SIZE * max_sg_len,
+		 * but because data may not be aligned, we need to account
+		 * for that too. */
+		to_process = min_t(u64, total,
+			(max_sg_len - 1 - used_sgs) * NX_PAGE_SIZE);
+		to_process = to_process & ~(SHA256_BLOCK_SIZE - 1);
 		data_len = to_process - buf_len;
 		in_sg = nx_build_sg_list(in_sg, (u8 *) data,
 					 &data_len, max_sg_len);
 		nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
-		to_process = (data_len + buf_len);
+		to_process = data_len + buf_len;
 		leftover = total - to_process;
 		/*

drivers/crypto/nx/nx-sha512.c+16−12

 	struct sha512_state *sctx = shash_desc_ctx(desc);
 	struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
 	struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
-	struct nx_sg *in_sg;
 	struct nx_sg *out_sg;
 	u64 to_process, leftover = 0, total;
 	unsigned long irq_flags;
 	NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
 	NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
-	in_sg = nx_ctx->in_sg;
 	max_sg_len = min_t(u64, nx_ctx->ap->sglen,
 			nx_driver.of.max_sg_len/sizeof(struct nx_sg));
 	max_sg_len = min_t(u64, max_sg_len,
 	}
 	do {
-		/*
+		int used_sgs = 0;
-		 * to_process: the SHA512_BLOCK_SIZE data chunk to process in
+		struct nx_sg *in_sg = nx_ctx->in_sg;
-		 * this update. This value is also restricted by the sg list
-		 * limits.
-		 */
-		to_process = total - leftover;
-		to_process = to_process & ~(SHA512_BLOCK_SIZE - 1);
-		leftover = total - to_process;
 		if (buf_len) {
 			data_len = buf_len;
-			in_sg = nx_build_sg_list(nx_ctx->in_sg,
+			in_sg = nx_build_sg_list(in_sg,
 						 (u8 *) sctx->buf,
 						 &data_len, max_sg_len);
 				rc = -EINVAL;
 				goto out;
 			}
+			used_sgs = in_sg - nx_ctx->in_sg;
 		}
+		/* to_process: SHA512_BLOCK_SIZE aligned chunk to be
+		 * processed in this iteration. This value is restricted
+		 * by sg list limits and number of sgs we already used
+		 * for leftover data. (see above)
+		 * In ideal case, we could allow NX_PAGE_SIZE * max_sg_len,
+		 * but because data may not be aligned, we need to account
+		 * for that too. */
+		to_process = min_t(u64, total,
+			(max_sg_len - 1 - used_sgs) * NX_PAGE_SIZE);
+		to_process = to_process & ~(SHA512_BLOCK_SIZE - 1);
 		data_len = to_process - buf_len;
 		in_sg = nx_build_sg_list(in_sg, (u8 *) data,
 					 &data_len, max_sg_len);
 			goto out;
 		}
-		to_process = (data_len + buf_len);
+		to_process = data_len + buf_len;
 		leftover = total - to_process;
 		/*

drivers/crypto/qat/qat_common/qat_algs.c+16−8

@@ -73,7 +73,8 @@ · 72 unmodified lines
73	ICP_QAT_HW_CIPHER_KEY_CONVERT, \	73	ICP_QAT_HW_CIPHER_KEY_CONVERT, \
74	ICP_QAT_HW_CIPHER_DECRYPT)	74	ICP_QAT_HW_CIPHER_DECRYPT)
75		75
76	static atomic_t active_dev;	76	static DEFINE_MUTEX(algs_lock);
		77	static unsigned int active_devs;
77		78
78	struct qat_alg_buf {	79	struct qat_alg_buf {
79	uint32_t len;	80	uint32_t len;
@@ -1280,7 +1281,10 @@ static struct crypto_alg qat_algs[] = { { · 1200 unmodified lines
1280		1281
1281	int qat_algs_register(void)	1282	int qat_algs_register(void)
1282	{	1283	{
1283	if (atomic_add_return(1, &active_dev) == 1) {	1284	int ret = 0;
		1285
		1286	mutex_lock(&algs_lock);
		1287	if (++active_devs == 1) {
1284	int i;	1288	int i;
1285		1289
1286	for (i = 0; i < ARRAY_SIZE(qat_algs); i++)	1290	for (i = 0; i < ARRAY_SIZE(qat_algs); i++)
@@ -1289,21 +1293,25 @@ int qat_algs_register(void) · 2 unmodified lines
1289	CRYPTO_ALG_TYPE_AEAD \| CRYPTO_ALG_ASYNC :	1293	CRYPTO_ALG_TYPE_AEAD \| CRYPTO_ALG_ASYNC :
1290	CRYPTO_ALG_TYPE_ABLKCIPHER \| CRYPTO_ALG_ASYNC;	1294	CRYPTO_ALG_TYPE_ABLKCIPHER \| CRYPTO_ALG_ASYNC;
1291		1295
1292	return crypto_register_algs(qat_algs, ARRAY_SIZE(qat_algs));	1296	ret = crypto_register_algs(qat_algs, ARRAY_SIZE(qat_algs));
1293	}	1297	}
1294	return 0;	1298	mutex_unlock(&algs_lock);
		1299	return ret;
1295	}	1300	}
1296		1301
1297	int qat_algs_unregister(void)	1302	int qat_algs_unregister(void)
1298	{	1303	{
1299	if (atomic_sub_return(1, &active_dev) == 0)	1304	int ret = 0;
1300	return crypto_unregister_algs(qat_algs, ARRAY_SIZE(qat_algs));	1305
1301	return 0;	1306	mutex_lock(&algs_lock);
		1307	if (--active_devs == 0)
		1308	ret = crypto_unregister_algs(qat_algs, ARRAY_SIZE(qat_algs));
		1309	mutex_unlock(&algs_lock);
		1310	return ret;
1302	}	1311	}
1303		1312
1304	int qat_algs_init(void)	1313	int qat_algs_init(void)
1305	{	1314	{
1306	atomic_set(&active_dev, 0);
1307	crypto_get_default_rng();	1315	crypto_get_default_rng();
1308	return 0;	1316	return 0;
1309	}	1317	}

drivers/dma/at_hdmac.c+87−45

 	BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |\
 	BIT(DMA_SLAVE_BUSWIDTH_4_BYTES))
+#define ATC_MAX_DSCR_TRIALS	10
 /*
  * Initial number of descriptors to allocate for each channel. This could
  * be increased during dma usage.
  *
  * @current_len: the number of bytes left before reading CTRLA
  * @ctrla: the value of CTRLA
- * @desc: the descriptor containing the transfer width
  */
-static inline int atc_calc_bytes_left(int current_len, u32 ctrla,
+static inline int atc_calc_bytes_left(int current_len, u32 ctrla)
-					struct at_desc *desc)
 {
-	return current_len - ((ctrla & ATC_BTSIZE_MAX) << desc->tx_width);
+	u32 btsize = (ctrla & ATC_BTSIZE_MAX);
-}
+	u32 src_width = ATC_REG_TO_SRC_WIDTH(ctrla);
-/**
+	/*
- * atc_calc_bytes_left_from_reg - calculates the number of bytes left according
+	 * According to the datasheet, when reading the Control A Register
- * to the current value of CTRLA.
+	 * (ctrla), the Buffer Transfer Size (btsize) bitfield refers to the
- *
+	 * number of transfers completed on the Source Interface.
- * @current_len: the number of bytes left before reading CTRLA
+	 * So btsize is always a number of source width transfers.
- * @atchan: the channel to read CTRLA for
+	 */
- * @desc: the descriptor containing the transfer width
+	return current_len - (btsize << src_width);
- */
-static inline int atc_calc_bytes_left_from_reg(int current_len,
-			struct at_dma_chan *atchan, struct at_desc *desc)
-{
-	u32 ctrla = channel_readl(atchan, CTRLA);
-	return atc_calc_bytes_left(current_len, ctrla, desc);
 }
 /**
 	struct at_desc *desc_first = atc_first_active(atchan);
 	struct at_desc *desc;
 	int ret;
-	u32 ctrla, dscr;
+	u32 ctrla, dscr, trials;
 	/*
 	 * If the cookie doesn't match to the currently running transfer then
 		 * the channel's DSCR register and compare it against the value
 		 * of the hardware linked list structure of each child
 		 * descriptor.
+		 *
+		 * The CTRLA register provides us with the amount of data
+		 * already read from the source for the current child
+		 * descriptor. So we can compute a more accurate residue by also
+		 * removing the number of bytes corresponding to this amount of
+		 * data.
+		 *
+		 * However, the DSCR and CTRLA registers cannot be read both
+		 * atomically. Hence a race condition may occur: the first read
+		 * register may refer to one child descriptor whereas the second
+		 * read may refer to a later child descriptor in the list
+		 * because of the DMA transfer progression inbetween the two
+		 * reads.
+		 *
+		 * One solution could have been to pause the DMA transfer, read
+		 * the DSCR and CTRLA then resume the DMA transfer. Nonetheless,
+		 * this approach presents some drawbacks:
+		 * - If the DMA transfer is paused, RX overruns or TX underruns
+		 *   are more likey to occur depending on the system latency.
+		 *   Taking the USART driver as an example, it uses a cyclic DMA
+		 *   transfer to read data from the Receive Holding Register
+		 *   (RHR) to avoid RX overruns since the RHR is not protected
+		 *   by any FIFO on most Atmel SoCs. So pausing the DMA transfer
+		 *   to compute the residue would break the USART driver design.
+		 * - The atc_pause() function masks interrupts but we'd rather
+		 *   avoid to do so for system latency purpose.
+		 *
+		 * Then we'd rather use another solution: the DSCR is read a
+		 * first time, the CTRLA is read in turn, next the DSCR is read
+		 * a second time. If the two consecutive read values of the DSCR
+		 * are the same then we assume both refers to the very same
+		 * child descriptor as well as the CTRLA value read inbetween
+		 * does. For cyclic tranfers, the assumption is that a full loop
+		 * is "not so fast".
+		 * If the two DSCR values are different, we read again the CTRLA
+		 * then the DSCR till two consecutive read values from DSCR are
+		 * equal or till the maxium trials is reach.
+		 * This algorithm is very unlikely not to find a stable value for
+		 * DSCR.
 		 */
-		ctrla = channel_readl(atchan, CTRLA);
-		rmb(); /* ensure CTRLA is read before DSCR */
 		dscr = channel_readl(atchan, DSCR);
+		rmb(); /* ensure DSCR is read before CTRLA */
+		ctrla = channel_readl(atchan, CTRLA);
+		for (trials = 0; trials < ATC_MAX_DSCR_TRIALS; ++trials) {
+			u32 new_dscr;
+			rmb(); /* ensure DSCR is read after CTRLA */
+			new_dscr = channel_readl(atchan, DSCR);
+			/*
+			 * If the DSCR register value has not changed inside the
+			 * DMA controller since the previous read, we assume
+			 * that both the dscr and ctrla values refers to the
+			 * very same descriptor.
+			 */
+			if (likely(new_dscr == dscr))
+				break;
+			/*
+			 * DSCR has changed inside the DMA controller, so the
+			 * previouly read value of CTRLA may refer to an already
+			 * processed descriptor hence could be outdated.
+			 * We need to update ctrla to match the current
+			 * descriptor.
+			 */
+			dscr = new_dscr;
+			rmb(); /* ensure DSCR is read before CTRLA */
+			ctrla = channel_readl(atchan, CTRLA);
+		}
+		if (unlikely(trials >= ATC_MAX_DSCR_TRIALS))
+			return -ETIMEDOUT;
 		/* for the first descriptor we can be more accurate */
 		if (desc_first->lli.dscr == dscr)
-			return atc_calc_bytes_left(ret, ctrla, desc_first);
+			return atc_calc_bytes_left(ret, ctrla);
 		ret -= desc_first->len;
 		list_for_each_entry(desc, &desc_first->tx_list, desc_node) {
 		}
 		/*
-		 * For the last descriptor in the chain we can calculate
+		 * For the current descriptor in the chain we can calculate
 		 * the remaining bytes using the channel's register.
-		 * Note that the transfer width of the first and last
-		 * descriptor may differ.
 		 */
-		if (!desc->lli.dscr)
+		ret = atc_calc_bytes_left(ret, ctrla);
-			ret = atc_calc_bytes_left_from_reg(ret, atchan, desc);
 	} else {
 		/* single transfer */
-		ret = atc_calc_bytes_left_from_reg(ret, atchan, desc_first);
+		ctrla = channel_readl(atchan, CTRLA);
+		ret = atc_calc_bytes_left(ret, ctrla);
 	}
 	return ret;
 	desc->txd.cookie = -EBUSY;
 	desc->total_len = desc->len = len;
-	desc->tx_width = dwidth;
 	/* set end-of-link to the last link descriptor of list*/
 	set_desc_eol(desc);
 	first->txd.cookie = -EBUSY;
 	first->total_len = len;
-	/* set transfer width for the calculation of the residue */
-	first->tx_width = src_width;
-	prev->tx_width = src_width;
 	/* set end-of-link to the last link descriptor of list*/
 	set_desc_eol(desc);
 	first->txd.cookie = -EBUSY;
 	first->total_len = total_len;
-	/* set transfer width for the calculation of the residue */
-	first->tx_width = reg_width;
-	prev->tx_width = reg_width;
 	/* first link descriptor of list is responsible of flags */
 	first->txd.flags = flags; /* client is in control of this ack */
 		desc->txd.cookie = 0;
 		desc->len = len;
-		/*
-		 * Although we only need the transfer width for the first and
-		 * the last descriptor, its easier to set it to all descriptors.
-		 */
-		desc->tx_width = src_width;
 		atc_desc_chain(&first, &prev, desc);
 		/* update the lengths and addresses for the next loop cycle */
 	/* First descriptor of the chain embedds additional information */
 	first->txd.cookie = -EBUSY;
 	first->total_len = buf_len;
-	first->tx_width = reg_width;
 	return &first->txd;

drivers/dma/at_hdmac_regs.h+1−2

 #define		ATC_SRC_WIDTH_BYTE	(0x0 << 24)
 #define		ATC_SRC_WIDTH_HALFWORD	(0x1 << 24)
 #define		ATC_SRC_WIDTH_WORD	(0x2 << 24)
+#define		ATC_REG_TO_SRC_WIDTH(r)	(((r) >> 24) & 0x3)
 #define	ATC_DST_WIDTH_MASK	(0x3 << 28)	/* Destination Single Transfer Size */
 #define		ATC_DST_WIDTH(x)	((x) << 28)
 #define		ATC_DST_WIDTH_BYTE	(0x0 << 28)
  * @txd: support for the async_tx api
  * @desc_node: node on the channed descriptors list
  * @len: descriptor byte count
- * @tx_width: transfer width
  * @total_len: total transaction byte count
  */
 struct at_desc {
 	struct dma_async_tx_descriptor	txd;
 	struct list_head		desc_node;
 	size_t				len;
-	u32				tx_width;
 	size_t				total_len;
 	/* Interleaved data */

drivers/dma/at_xdmac.c+14−12

 	 * descriptor view 2 since some fields of the configuration register
 	 * depend on transfer size and src/dest addresses.
 	 */
-	if (at_xdmac_chan_is_cyclic(atchan)) {
+	if (at_xdmac_chan_is_cyclic(atchan))
 		reg = AT_XDMAC_CNDC_NDVIEW_NDV1;
-		at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);
+	else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3)
-	} else if (first->lld.mbr_ubc & AT_XDMAC_MBR_UBC_NDV3) {
 		reg = AT_XDMAC_CNDC_NDVIEW_NDV3;
-	} else {
+	else
-		/*
-		 * No need to write AT_XDMAC_CC reg, it will be done when the
-		 * descriptor is fecthed.
-		 */
 		reg = AT_XDMAC_CNDC_NDVIEW_NDV2;
-	}
+	/*
+	 * Even if the register will be updated from the configuration in the
+	 * descriptor when using view 2 or higher, the PROT bit won't be set
+	 * properly. This bit can be modified only by using the channel
+	 * configuration register.
+	 */
+	at_xdmac_chan_write(atchan, AT_XDMAC_CC, first->lld.mbr_cfg);
 	reg |= AT_XDMAC_CNDC_NDDUP
 	       | AT_XDMAC_CNDC_NDSUP
 			desc->lld.mbr_sa = mem;
 			desc->lld.mbr_da = atchan->sconfig.dst_addr;
 		}
-		desc->lld.mbr_cfg = atchan->cfg;
+		dwidth = at_xdmac_get_dwidth(atchan->cfg);
-		dwidth = at_xdmac_get_dwidth(desc->lld.mbr_cfg);
 		fixed_dwidth = IS_ALIGNED(len, 1 << dwidth)
-			       ? at_xdmac_get_dwidth(desc->lld.mbr_cfg)
+			       ? dwidth
 			       : AT_XDMAC_CC_DWIDTH_BYTE;
 		desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV2			/* next descriptor view */
 			| AT_XDMAC_MBR_UBC_NDEN					/* next descriptor dst parameter update */
 			| AT_XDMAC_MBR_UBC_NSEN					/* next descriptor src parameter update */
 			| (len >> fixed_dwidth);				/* microblock length */
+		desc->lld.mbr_cfg = (atchan->cfg & ~AT_XDMAC_CC_DWIDTH_MASK) |
+				    AT_XDMAC_CC_DWIDTH(fixed_dwidth);
 		dev_dbg(chan2dev(chan),
 			 "%s: lld: mbr_sa=%pad, mbr_da=%pad, mbr_ubc=0x%08x\n",
 			 __func__, &desc->lld.mbr_sa, &desc->lld.mbr_da, desc->lld.mbr_ubc);

drivers/dma/dmaengine.c+4−0

 	struct dma_chan *ch = dma_request_slave_channel_reason(dev, name);
 	if (IS_ERR(ch))
 		return NULL;
+	dma_cap_set(DMA_PRIVATE, ch->device->cap_mask);
+	ch->device->privatecnt++;
 	return ch;
 }
 EXPORT_SYMBOL_GPL(dma_request_slave_channel);

drivers/dma/mv_xor.c+5−4

@@ -162,10 +162,11 @@ static void mv_chan_set_mode(struct mv_xor_chan *chan, · 161 unmodified lines
162	config &= ~0x7;	162	config &= ~0x7;
163	config \|= op_mode;	163	config \|= op_mode;
164		164
165	if (IS_ENABLED(__BIG_ENDIAN))	165	#if defined(__BIG_ENDIAN)
166	config \|= XOR_DESCRIPTOR_SWAP;	166	config \|= XOR_DESCRIPTOR_SWAP;
167	else	167	#else
168	config &= ~XOR_DESCRIPTOR_SWAP;	168	config &= ~XOR_DESCRIPTOR_SWAP;
		169	#endif
169		170
170	writel_relaxed(config, XOR_CONFIG(chan));	171	writel_relaxed(config, XOR_CONFIG(chan));
171	chan->current_type = type;	172	chan->current_type = type;

drivers/dma/pl330.c+2−1

 			desc->txd.callback = last->txd.callback;
 			desc->txd.callback_param = last->txd.callback_param;
 		}
-		last->last = false;
+		desc->last = false;
 		dma_cookie_assign(&desc->txd);
 		desc->rqcfg.brst_len = 1;
 	desc->rqcfg.brst_len = get_burst_len(desc, len);
+	desc->bytes_requested = len;
 	desc->txd.flags = flags;

drivers/dma/virt-dma.c+6−13

@@ -29,7 +29,7 @@ dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx) · 28 unmodified lines
29	spin_lock_irqsave(&vc->lock, flags);	29	spin_lock_irqsave(&vc->lock, flags);
30	cookie = dma_cookie_assign(tx);	30	cookie = dma_cookie_assign(tx);
31		31
32	list_move_tail(&vd->node, &vc->desc_submitted);	32	list_add_tail(&vd->node, &vc->desc_submitted);
33	spin_unlock_irqrestore(&vc->lock, flags);	33	spin_unlock_irqrestore(&vc->lock, flags);
34		34
35	dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n",	35	dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n",
@@ -83,10 +83,8 @@ static void vchan_complete(unsigned long arg) · 47 unmodified lines
83	cb_data = vd->tx.callback_param;	83	cb_data = vd->tx.callback_param;
84		84
85	list_del(&vd->node);	85	list_del(&vd->node);
86	if (async_tx_test_ack(&vd->tx))	86
87	list_add(&vd->node, &vc->desc_allocated);	87	vc->desc_free(vd);
88	else
89	vc->desc_free(vd);
90		88
91	if (cb)	89	if (cb)
92	cb(cb_data);	90	cb(cb_data);
@@ -98,13 +96,9 @@ void vchan_dma_desc_free_list(struct virt_dma_chan vc, struct list_head head) · 5 unmodified lines
98	while (!list_empty(head)) {	96	while (!list_empty(head)) {
99	struct virt_dma_desc *vd = list_first_entry(head,	97	struct virt_dma_desc *vd = list_first_entry(head,
100	struct virt_dma_desc, node);	98	struct virt_dma_desc, node);
101	if (async_tx_test_ack(&vd->tx)) {	99	list_del(&vd->node);
102	list_move_tail(&vd->node, &vc->desc_allocated);	100	dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
103	} else {	101	vc->desc_free(vd);
104	dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
105	list_del(&vd->node);
106	vc->desc_free(vd);
107	}
108	}	102	}
109	}	103	}
110	EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list);	104	EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list);
@@ -114,7 +108,6 @@ void vchan_init(struct virt_dma_chan vc, struct dma_device dmadev) · 3 unmodified lines
114	dma_cookie_init(&vc->chan);	108	dma_cookie_init(&vc->chan);
115		109
116	spin_lock_init(&vc->lock);	110	spin_lock_init(&vc->lock);
117	INIT_LIST_HEAD(&vc->desc_allocated);
118	INIT_LIST_HEAD(&vc->desc_submitted);	111	INIT_LIST_HEAD(&vc->desc_submitted);
119	INIT_LIST_HEAD(&vc->desc_issued);	112	INIT_LIST_HEAD(&vc->desc_issued);
120	INIT_LIST_HEAD(&vc->desc_completed);	113	INIT_LIST_HEAD(&vc->desc_completed);

drivers/dma/virt-dma.h+1−12

 	spinlock_t lock;
 	/* protected by vc.lock */
-	struct list_head desc_allocated;
 	struct list_head desc_submitted;
 	struct list_head desc_issued;
 	struct list_head desc_completed;
 	struct virt_dma_desc *vd, unsigned long tx_flags)
 {
 	extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *);
-	unsigned long flags;
 	dma_async_tx_descriptor_init(&vd->tx, &vc->chan);
 	vd->tx.flags = tx_flags;
 	vd->tx.tx_submit = vchan_tx_submit;
-	spin_lock_irqsave(&vc->lock, flags);
-	list_add_tail(&vd->node, &vc->desc_allocated);
-	spin_unlock_irqrestore(&vc->lock, flags);
 	return &vd->tx;
 }
 }
 /**
- * vchan_get_all_descriptors - obtain all allocated, submitted and issued
+ * vchan_get_all_descriptors - obtain all submitted and issued descriptors
- *                             descriptors
  * vc: virtual channel to get descriptors from
  * head: list of descriptors found
  *
 static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc,
 	struct list_head *head)
 {
-	list_splice_tail_init(&vc->desc_allocated, head);
 	list_splice_tail_init(&vc->desc_submitted, head);
 	list_splice_tail_init(&vc->desc_issued, head);
 	list_splice_tail_init(&vc->desc_completed, head);
 static inline void vchan_free_chan_resources(struct virt_dma_chan *vc)
 {
-	struct virt_dma_desc *vd;
 	unsigned long flags;
 	LIST_HEAD(head);
 	spin_lock_irqsave(&vc->lock, flags);
 	vchan_get_all_descriptors(vc, &head);
-	list_for_each_entry(vd, &head, node)
-		async_tx_clear_ack(&vd->tx);
 	spin_unlock_irqrestore(&vc->lock, flags);
 	vchan_dma_desc_free_list(vc, &head);

drivers/dma/xgene-dma.c+3−0

 #define XGENE_DMA_MEM_RAM_SHUTDOWN		0xD070
 #define XGENE_DMA_BLK_MEM_RDY			0xD074
 #define XGENE_DMA_BLK_MEM_RDY_VAL		0xFFFFFFFF
+#define XGENE_DMA_RING_CMD_SM_OFFSET		0x8000
 /* X-Gene SoC EFUSE csr register and bit defination */
 #define XGENE_SOC_JTAG1_SHADOW			0x18
 		return -ENOMEM;
 	}
+	pdma->csr_ring_cmd += XGENE_DMA_RING_CMD_SM_OFFSET;
 	/* Get efuse csr region */
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
 	if (!res) {

drivers/edac/ppc4xx_edac.c+1−1

@@ -920,7 +920,7 @@ static int ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) · 919 unmodified lines
920	*/	920	*/
921		921
922	for (row = 0; row < mci->nr_csrows; row++) {	922	for (row = 0; row < mci->nr_csrows; row++) {
923	struct csrow_info *csi = &mci->csrows[row];	923	struct csrow_info *csi = mci->csrows[row];
924		924
925	/*	925	/*
926	* Get the configuration settings for this	926	* Get the configuration settings for this

drivers/extcon/extcon-palmas.c+0−13

 	status = devm_extcon_dev_register(&pdev->dev, palmas_usb->edev);
 	if (status) {
 		dev_err(&pdev->dev, "failed to register extcon device\n");
-		kfree(palmas_usb->edev->name);
 		return status;
 	}
 		if (status < 0) {
 			dev_err(&pdev->dev, "can't get IRQ %d, err %d\n",
 					palmas_usb->id_irq, status);
-			kfree(palmas_usb->edev->name);
 			return status;
 		}
 	}
 		if (status < 0) {
 			dev_err(&pdev->dev, "can't get IRQ %d, err %d\n",
 					palmas_usb->vbus_irq, status);
-			kfree(palmas_usb->edev->name);
 			return status;
 		}
 	}
 	return 0;
 }
-static int palmas_usb_remove(struct platform_device *pdev)
-{
-	struct palmas_usb *palmas_usb = platform_get_drvdata(pdev);
-	kfree(palmas_usb->edev->name);
-	return 0;
-}
 #ifdef CONFIG_PM_SLEEP
 static int palmas_usb_suspend(struct device *dev)
 {
 static struct platform_driver palmas_usb_driver = {
 	.probe = palmas_usb_probe,
-	.remove = palmas_usb_remove,
 	.driver = {
 		.name = "palmas-usb",
 		.of_match_table = of_palmas_match_tbl,

drivers/extcon/extcon.c+44−17

@@ -124,25 +124,35 @@ static int find_cable_index_by_id(struct extcon_dev *edev, const unsigned int id · 123 unmodified lines
124	return -EINVAL;	124	return -EINVAL;
125	}	125	}
126		126
127	static int find_cable_index_by_name(struct extcon_dev edev, const char name)	127	static int find_cable_id_by_name(struct extcon_dev edev, const char name)
128	{	128	{
129	unsigned int id = EXTCON_NONE;	129	unsigned int id = -EINVAL;
130	int i = 0;	130	int i = 0;
131		131
132	if (edev->max_supported == 0)	132	/* Find the id of extcon cable */
133	return -EINVAL;
134
135	/* Find the the number of extcon cable */
136	while (extcon_name[i]) {	133	while (extcon_name[i]) {
137	if (!strncmp(extcon_name[i], name, CABLE_NAME_MAX)) {	134	if (!strncmp(extcon_name[i], name, CABLE_NAME_MAX)) {
138	id = i;	135	id = i;
139	break;	136	break;
140	}	137	}
		138	i++;
141	}	139	}
142		140
143	if (id == EXTCON_NONE)	141	return id;
		142	}
		143
		144	static int find_cable_index_by_name(struct extcon_dev edev, const char name)
		145	{
		146	unsigned int id;
		147
		148	if (edev->max_supported == 0)
144	return -EINVAL;	149	return -EINVAL;
145		150
		151	/* Find the the number of extcon cable */
		152	id = find_cable_id_by_name(edev, name);
		153	if (id < 0)
		154	return id;
		155
146	return find_cable_index_by_id(edev, id);	156	return find_cable_index_by_id(edev, id);
147	}	157	}
148		158
@@ -228,9 +238,11 @@ static ssize_t cable_state_show(struct device *dev, · 79 unmodified lines
228	struct extcon_cable *cable = container_of(attr, struct extcon_cable,	238	struct extcon_cable *cable = container_of(attr, struct extcon_cable,
229	attr_state);	239	attr_state);
230		240
		241	int i = cable->cable_index;
		242
231	return sprintf(buf, "%d\n",	243	return sprintf(buf, "%d\n",
232	extcon_get_cable_state_(cable->edev,	244	extcon_get_cable_state_(cable->edev,
233	cable->cable_index));	245	cable->edev->supported_cable[i]));
234	}	246	}
235		247
236	/**	248	/**
@@ -263,20 +275,25 @@ int extcon_update_state(struct extcon_dev *edev, u32 mask, u32 state) · 26 unmodified lines
263	spin_lock_irqsave(&edev->lock, flags);	275	spin_lock_irqsave(&edev->lock, flags);
264		276
265	if (edev->state != ((edev->state & ~mask) \| (state & mask))) {	277	if (edev->state != ((edev->state & ~mask) \| (state & mask))) {
		278	u32 old_state;
		279
266	if (check_mutually_exclusive(edev, (edev->state & ~mask) \|	280	if (check_mutually_exclusive(edev, (edev->state & ~mask) \|
267	(state & mask))) {	281	(state & mask))) {
268	spin_unlock_irqrestore(&edev->lock, flags);	282	spin_unlock_irqrestore(&edev->lock, flags);
269	return -EPERM;	283	return -EPERM;
270	}	284	}
271		285
272	for (index = 0; index < edev->max_supported; index++) {	286	old_state = edev->state;
273	if (is_extcon_changed(edev->state, state, index, &attached))
274	raw_notifier_call_chain(&edev->nh[index], attached, edev);
275	}
276
277	edev->state &= ~mask;	287	edev->state &= ~mask;
278	edev->state \|= state & mask;	288	edev->state \|= state & mask;
279		289
		290	for (index = 0; index < edev->max_supported; index++) {
		291	if (is_extcon_changed(old_state, edev->state, index,
		292	&attached))
		293	raw_notifier_call_chain(&edev->nh[index],
		294	attached, edev);
		295	}
		296
280	/* This could be in interrupt handler */	297	/* This could be in interrupt handler */
281	prop_buf = (char *)get_zeroed_page(GFP_ATOMIC);	298	prop_buf = (char *)get_zeroed_page(GFP_ATOMIC);
282	if (prop_buf) {	299	if (prop_buf) {
@@ -361,8 +378,13 @@ EXPORT_SYMBOL_GPL(extcon_get_cable_state_); · 78 unmodified lines
361	*/	378	*/
362	int extcon_get_cable_state(struct extcon_dev edev, const char cable_name)	379	int extcon_get_cable_state(struct extcon_dev edev, const char cable_name)
363	{	380	{
364	return extcon_get_cable_state_(edev, find_cable_index_by_name	381	unsigned int id;
365	(edev, cable_name));	382
		383	id = find_cable_id_by_name(edev, cable_name);
		384	if (id < 0)
		385	return id;
		386
		387	return extcon_get_cable_state_(edev, id);
366	}	388	}
367	EXPORT_SYMBOL_GPL(extcon_get_cable_state);	389	EXPORT_SYMBOL_GPL(extcon_get_cable_state);
368		390
@@ -404,8 +426,13 @@ EXPORT_SYMBOL_GPL(extcon_set_cable_state_); · 35 unmodified lines
404	int extcon_set_cable_state(struct extcon_dev *edev,	426	int extcon_set_cable_state(struct extcon_dev *edev,
405	const char *cable_name, bool cable_state)	427	const char *cable_name, bool cable_state)
406	{	428	{
407	return extcon_set_cable_state_(edev, find_cable_index_by_name	429	unsigned int id;
408	(edev, cable_name), cable_state);	430
		431	id = find_cable_id_by_name(edev, cable_name);
		432	if (id < 0)
		433	return id;
		434
		435	return extcon_set_cable_state_(edev, id, cable_state);
409	}	436	}
410	EXPORT_SYMBOL_GPL(extcon_set_cable_state);	437	EXPORT_SYMBOL_GPL(extcon_set_cable_state);
411		438

drivers/firmware/efi/efi.c+5−0

 static int __init parse_efi_cmdline(char *str)
 {
+	if (!str) {
+		pr_warn("need at least one option\n");
+		return -EINVAL;
+	}
 	if (parse_option_str(str, "noruntime"))
 		disable_runtime = true;

drivers/gpu/drm/amd/amdgpu/amdgpu.h+11−1

 	uint32_t			me_feature_version;
 	uint32_t			ce_feature_version;
 	uint32_t			pfp_feature_version;
+	uint32_t			rlc_feature_version;
+	uint32_t			mec_feature_version;
+	uint32_t			mec2_feature_version;
 	struct amdgpu_ring		gfx_ring[AMDGPU_MAX_GFX_RINGS];
 	unsigned			num_gfx_rings;
 	struct amdgpu_ring		compute_ring[AMDGPU_MAX_COMPUTE_RINGS];
 	/* SDMA firmware */
 	const struct firmware	*fw;
 	uint32_t		fw_version;
+	uint32_t		feature_version;
 	struct amdgpu_ring	ring;
 };
 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);
+struct amdgpu_ip_block_status {
+	bool valid;
+	bool sw;
+	bool hw;
+};
 struct amdgpu_device {
 	struct device			*dev;
 	struct drm_device		*ddev;
 	const struct amdgpu_ip_block_version *ip_blocks;
 	int				num_ip_blocks;
-	bool				*ip_block_enabled;
+	struct amdgpu_ip_block_status	*ip_block_status;
 	struct mutex	mn_lock;
 	DECLARE_HASHTABLE(mn_hash, 7);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+22−16

 		return -EINVAL;
 	}
-	adev->ip_block_enabled = kcalloc(adev->num_ip_blocks, sizeof(bool), GFP_KERNEL);
+	adev->ip_block_status = kcalloc(adev->num_ip_blocks,
-	if (adev->ip_block_enabled == NULL)
+					sizeof(struct amdgpu_ip_block_status), GFP_KERNEL);
+	if (adev->ip_block_status == NULL)
 		return -ENOMEM;
 	if (adev->ip_blocks == NULL) {
 	for (i = 0; i < adev->num_ip_blocks; i++) {
 		if ((amdgpu_ip_block_mask & (1 << i)) == 0) {
 			DRM_ERROR("disabled ip block: %d\n", i);
-			adev->ip_block_enabled[i] = false;
+			adev->ip_block_status[i].valid = false;
 		} else {
 			if (adev->ip_blocks[i].funcs->early_init) {
 				r = adev->ip_blocks[i].funcs->early_init((void *)adev);
 				if (r == -ENOENT)
-					adev->ip_block_enabled[i] = false;
+					adev->ip_block_status[i].valid = false;
 				else if (r)
 					return r;
 				else
-					adev->ip_block_enabled[i] = true;
+					adev->ip_block_status[i].valid = true;
 			} else {
-				adev->ip_block_enabled[i] = true;
+				adev->ip_block_status[i].valid = true;
 			}
 		}
 	}
 	int i, r;
 	for (i = 0; i < adev->num_ip_blocks; i++) {
-		if (!adev->ip_block_enabled[i])
+		if (!adev->ip_block_status[i].valid)
 			continue;
 		r = adev->ip_blocks[i].funcs->sw_init((void *)adev);
 		if (r)
 			return r;
+		adev->ip_block_status[i].sw = true;
 		/* need to do gmc hw init early so we can allocate gpu mem */
 		if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) {
 			r = amdgpu_vram_scratch_init(adev);
 			r = amdgpu_wb_init(adev);
 			if (r)
 				return r;
+			adev->ip_block_status[i].hw = true;
 		}
 	}
 	for (i = 0; i < adev->num_ip_blocks; i++) {
-		if (!adev->ip_block_enabled[i])
+		if (!adev->ip_block_status[i].sw)
 			continue;
 		/* gmc hw init is done early */
 		if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC)
 		r = adev->ip_blocks[i].funcs->hw_init((void *)adev);
 		if (r)
 			return r;
+		adev->ip_block_status[i].hw = true;
 	}
 	return 0;
 	int i = 0, r;
 	for (i = 0; i < adev->num_ip_blocks; i++) {
-		if (!adev->ip_block_enabled[i])
+		if (!adev->ip_block_status[i].valid)
 			continue;
 		/* enable clockgating to save power */
 		r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev,
 	int i, r;
 	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
-		if (!adev->ip_block_enabled[i])
+		if (!adev->ip_block_status[i].hw)
 			continue;
 		if (adev->ip_blocks[i].type == AMD_IP_BLOCK_TYPE_GMC) {
 			amdgpu_wb_fini(adev);
 			return r;
 		r = adev->ip_blocks[i].funcs->hw_fini((void *)adev);
 		/* XXX handle errors */
+		adev->ip_block_status[i].hw = false;
 	}
 	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
-		if (!adev->ip_block_enabled[i])
+		if (!adev->ip_block_status[i].sw)
 			continue;
 		r = adev->ip_blocks[i].funcs->sw_fini((void *)adev);
 		/* XXX handle errors */
-		adev->ip_block_enabled[i] = false;
+		adev->ip_block_status[i].sw = false;
+		adev->ip_block_status[i].valid = false;
 	}
 	return 0;
 	int i, r;
 	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
-		if (!adev->ip_block_enabled[i])
+		if (!adev->ip_block_status[i].valid)
 			continue;
 		/* ungate blocks so that suspend can properly shut them down */
 		r = adev->ip_blocks[i].funcs->set_clockgating_state((void *)adev,
 	int i, r;
 	for (i = 0; i < adev->num_ip_blocks; i++) {
-		if (!adev->ip_block_enabled[i])
+		if (!adev->ip_block_status[i].valid)
 			continue;
 		r = adev->ip_blocks[i].funcs->resume(adev);
 		if (r)
 	amdgpu_fence_driver_fini(adev);
 	amdgpu_fbdev_fini(adev);
 	r = amdgpu_fini(adev);
-	kfree(adev->ip_block_enabled);
+	kfree(adev->ip_block_status);
-	adev->ip_block_enabled = NULL;
+	adev->ip_block_status = NULL;
 	adev->accel_working = false;
 	/* free i2c buses */
 	amdgpu_i2c_fini(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c+5−3

@@ -449,7 +449,7 @@ out: · 448 unmodified lines
449	* vital here, so they are not reported back to userspace.	449	* vital here, so they are not reported back to userspace.
450	*/	450	*/
451	static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,	451	static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
452	struct amdgpu_bo_va *bo_va)	452	struct amdgpu_bo_va *bo_va, uint32_t operation)
453	{	453	{
454	struct ttm_validate_buffer tv, *entry;	454	struct ttm_validate_buffer tv, *entry;
455	struct amdgpu_bo_list_entry *vm_bos;	455	struct amdgpu_bo_list_entry *vm_bos;
@@ -485,7 +485,9 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev, · 29 unmodified lines
485	if (r)	485	if (r)
486	goto error_unlock;	486	goto error_unlock;
487		487
488	r = amdgpu_vm_bo_update(adev, bo_va, &bo_va->bo->tbo.mem);	488
		489	if (operation == AMDGPU_VA_OP_MAP)
		490	r = amdgpu_vm_bo_update(adev, bo_va, &bo_va->bo->tbo.mem);
489		491
490	error_unlock:	492	error_unlock:
491	mutex_unlock(&bo_va->vm->mutex);	493	mutex_unlock(&bo_va->vm->mutex);
@@ -580,7 +582,7 @@ int amdgpu_gem_va_ioctl(struct drm_device dev, void data, · 88 unmodified lines
580	}	582	}
581		583
582	if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE))	584	if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE))
583	amdgpu_gem_va_update_vm(adev, bo_va);	585	amdgpu_gem_va_update_vm(adev, bo_va, args->operation);
584		586
585	drm_gem_object_unreference_unlocked(gobj);	587	drm_gem_object_unreference_unlocked(gobj);
586	return r;	588	return r;

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c+8−8

@@ -180,16 +180,16 @@ int amdgpu_ib_schedule(struct amdgpu_device *adev, unsigned num_ibs, · 179 unmodified lines
180	if (vm) {	180	if (vm) {
181	/* do context switch */	181	/* do context switch */
182	amdgpu_vm_flush(ring, vm, ib->sync.last_vm_update);	182	amdgpu_vm_flush(ring, vm, ib->sync.last_vm_update);
183	}
184		183
185	if (vm && ring->funcs->emit_gds_switch)	184	if (ring->funcs->emit_gds_switch)
186	amdgpu_ring_emit_gds_switch(ring, ib->vm->ids[ring->idx].id,	185	amdgpu_ring_emit_gds_switch(ring, ib->vm->ids[ring->idx].id,
187	ib->gds_base, ib->gds_size,	186	ib->gds_base, ib->gds_size,
188	ib->gws_base, ib->gws_size,	187	ib->gws_base, ib->gws_size,
189	ib->oa_base, ib->oa_size);	188	ib->oa_base, ib->oa_size);
190		189
191	if (ring->funcs->emit_hdp_flush)	190	if (ring->funcs->emit_hdp_flush)
192	amdgpu_ring_emit_hdp_flush(ring);	191	amdgpu_ring_emit_hdp_flush(ring);
		192	}
193		193
194	old_ctx = ring->current_ctx;	194	old_ctx = ring->current_ctx;
195	for (i = 0; i < num_ibs; ++i) {	195	for (i = 0; i < num_ibs; ++i) {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+10−9

 		for (i = 0; i < adev->num_ip_blocks; i++) {
 			if (adev->ip_blocks[i].type == type &&
-			    adev->ip_block_enabled[i]) {
+			    adev->ip_block_status[i].valid) {
 				ip.hw_ip_version_major = adev->ip_blocks[i].major;
 				ip.hw_ip_version_minor = adev->ip_blocks[i].minor;
 				ip.capabilities_flags = 0;
 		for (i = 0; i < adev->num_ip_blocks; i++)
 			if (adev->ip_blocks[i].type == type &&
-			    adev->ip_block_enabled[i] &&
+			    adev->ip_block_status[i].valid &&
 			    count < AMDGPU_HW_IP_INSTANCE_MAX_COUNT)
 				count++;
 			break;
 		case AMDGPU_INFO_FW_GFX_RLC:
 			fw_info.ver = adev->gfx.rlc_fw_version;
-			fw_info.feature = 0;
+			fw_info.feature = adev->gfx.rlc_feature_version;
 			break;
 		case AMDGPU_INFO_FW_GFX_MEC:
-			if (info->query_fw.index == 0)
+			if (info->query_fw.index == 0) {
 				fw_info.ver = adev->gfx.mec_fw_version;
-			else if (info->query_fw.index == 1)
+				fw_info.feature = adev->gfx.mec_feature_version;
+			} else if (info->query_fw.index == 1) {
 				fw_info.ver = adev->gfx.mec2_fw_version;
-			else
+				fw_info.feature = adev->gfx.mec2_feature_version;
+			} else
 				return -EINVAL;
-			fw_info.feature = 0;
 			break;
 		case AMDGPU_INFO_FW_SMC:
 			fw_info.ver = adev->pm.fw_version;
 			if (info->query_fw.index >= 2)
 				return -EINVAL;
 			fw_info.ver = adev->sdma[info->query_fw.index].fw_version;
-			fw_info.feature = 0;
+			fw_info.feature = adev->sdma[info->query_fw.index].feature_version;
 			break;
 		default:
 			return -EINVAL;
 		return n ? -EFAULT : 0;
 	}
 	case AMDGPU_INFO_DEV_INFO: {
-		struct drm_amdgpu_info_device dev_info;
+		struct drm_amdgpu_info_device dev_info = {};
 		struct amdgpu_cu_info cu_info;
 		dev_info.device_id = dev->pdev->device;

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c+14−3

 	unsigned height_in_mb = ALIGN(height / 16, 2);
 	unsigned fs_in_mb = width_in_mb * height_in_mb;
-	unsigned image_size, tmp, min_dpb_size, num_dpb_buffer;
+	unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size;
 	image_size = width * height;
 	image_size += image_size / 2;
 		num_dpb_buffer = (le32_to_cpu(msg[59]) & 0xff) + 2;
 		min_dpb_size = image_size * num_dpb_buffer;
+		min_ctx_size = ((width + 255) / 16) * ((height + 255) / 16)
+					   * 16 * num_dpb_buffer + 52 * 1024;
 		break;
 	default:
 	buf_sizes[0x1] = dpb_size;
 	buf_sizes[0x2] = image_size;
+	buf_sizes[0x4] = min_ctx_size;
 	return 0;
 }
 			return -EINVAL;
 		}
+	} else if (cmd == 0x206) {
+		if ((end - start) < ctx->buf_sizes[4]) {
+			DRM_ERROR("buffer (%d) to small (%d / %d)!\n", cmd,
+					  (unsigned)(end - start),
+					  ctx->buf_sizes[4]);
+			return -EINVAL;
+		}
 	} else if ((cmd != 0x100) && (cmd != 0x204)) {
 		DRM_ERROR("invalid UVD command %X!\n", cmd);
 		return -EINVAL;
 	struct amdgpu_uvd_cs_ctx ctx = {};
 	unsigned buf_sizes[] = {
 		[0x00000000]	=	2048,
-		[0x00000001]	=	32 * 1024 * 1024,
+		[0x00000001]	=	0xFFFFFFFF,
-		[0x00000002]	=	2048 * 1152 * 3,
+		[0x00000002]	=	0xFFFFFFFF,
 		[0x00000003]	=	2048,
+		[0x00000004]	=	0xFFFFFFFF,
 	};
 	struct amdgpu_ib *ib = &parser->ibs[ib_idx];
 	int r;

drivers/gpu/drm/amd/amdgpu/cik_sdma.c+1−0

@@ -500,6 +500,7 @@ static int cik_sdma_load_microcode(struct amdgpu_device *adev) · 499 unmodified lines
500	amdgpu_ucode_print_sdma_hdr(&hdr->header);	500	amdgpu_ucode_print_sdma_hdr(&hdr->header);
501	fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;	501	fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
502	adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);	502	adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
		503	adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);
503	fw_data = (const __le32 *)	504	fw_data = (const __le32 *)
504	(adev->sdma[i].fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));	505	(adev->sdma[i].fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
505	WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], 0);	506	WREG32(mmSDMA0_UCODE_ADDR + sdma_offsets[i], 0);

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c+42−12

  * sheduling on the ring.  This function schedules the IB
  * on the gfx ring for execution by the GPU.
  */
-static void gfx_v7_0_ring_emit_ib(struct amdgpu_ring *ring,
+static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
 				  struct amdgpu_ib *ib)
 {
 	bool need_ctx_switch = ring->current_ctx != ib->ctx;
 	u32 next_rptr = ring->wptr + 5;
 	/* drop the CE preamble IB for the same context */
-	if ((ring->type == AMDGPU_RING_TYPE_GFX) &&
+	if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && !need_ctx_switch)
-	    (ib->flags & AMDGPU_IB_FLAG_PREAMBLE) &&
-	    !need_ctx_switch)
 		return;
-	if (ring->type == AMDGPU_RING_TYPE_COMPUTE)
+	if (need_ctx_switch)
-		control |= INDIRECT_BUFFER_VALID;
-	if (need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX)
 		next_rptr += 2;
 	next_rptr += 4;
 	amdgpu_ring_write(ring, next_rptr);
 	/* insert SWITCH_BUFFER packet before first IB in the ring frame */
-	if (need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) {
+	if (need_ctx_switch) {
 		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
 		amdgpu_ring_write(ring, 0);
 	}
 	amdgpu_ring_write(ring, control);
 }
+static void gfx_v7_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
+				  struct amdgpu_ib *ib)
+{
+	u32 header, control = 0;
+	u32 next_rptr = ring->wptr + 5;
+	control |= INDIRECT_BUFFER_VALID;
+	next_rptr += 4;
+	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
+	amdgpu_ring_write(ring, WRITE_DATA_DST_SEL(5) | WR_CONFIRM);
+	amdgpu_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc);
+	amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff);
+	amdgpu_ring_write(ring, next_rptr);
+	header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
+	control |= ib->length_dw |
+			   (ib->vm ? (ib->vm->ids[ring->idx].id << 24) : 0);
+	amdgpu_ring_write(ring, header);
+	amdgpu_ring_write(ring,
+#ifdef __BIG_ENDIAN
+					  (2 << 0) |
+#endif
+					  (ib->gpu_addr & 0xFFFFFFFC));
+	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);
+	amdgpu_ring_write(ring, control);
+}
 /**
  * gfx_v7_0_ring_test_ib - basic ring IB test
  *
 	mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;
 	amdgpu_ucode_print_gfx_hdr(&mec_hdr->header);
 	adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version);
+	adev->gfx.mec_feature_version = le32_to_cpu(
+					mec_hdr->ucode_feature_version);
 	gfx_v7_0_cp_compute_enable(adev, false);
 		mec2_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data;
 		amdgpu_ucode_print_gfx_hdr(&mec2_hdr->header);
 		adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version);
+		adev->gfx.mec2_feature_version = le32_to_cpu(
+				mec2_hdr->ucode_feature_version);
 		/* MEC2 */
 		fw_data = (const __le32 *)
 	hdr = (const struct rlc_firmware_header_v1_0 *)adev->gfx.rlc_fw->data;
 	amdgpu_ucode_print_rlc_hdr(&hdr->header);
 	adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version);
+	adev->gfx.rlc_feature_version = le32_to_cpu(
+					hdr->ucode_feature_version);
 	gfx_v7_0_rlc_stop(adev);
 		dev_info(adev->dev, "  CP_HPD_EOP_CONTROL=0x%08X\n",
 			 RREG32(mmCP_HPD_EOP_CONTROL));
-		for (queue = 0; queue < 8; i++) {
+		for (queue = 0; queue < 8; queue++) {
 			cik_srbm_select(adev, me, pipe, queue, 0);
 			dev_info(adev->dev, "  queue: %d\n", queue);
 			dev_info(adev->dev, "  CP_PQ_WPTR_POLL_CNTL=0x%08X\n",
 	.get_wptr = gfx_v7_0_ring_get_wptr_gfx,
 	.set_wptr = gfx_v7_0_ring_set_wptr_gfx,
 	.parse_cs = NULL,
-	.emit_ib = gfx_v7_0_ring_emit_ib,
+	.emit_ib = gfx_v7_0_ring_emit_ib_gfx,
 	.emit_fence = gfx_v7_0_ring_emit_fence_gfx,
 	.emit_semaphore = gfx_v7_0_ring_emit_semaphore,
 	.emit_vm_flush = gfx_v7_0_ring_emit_vm_flush,
 	.get_wptr = gfx_v7_0_ring_get_wptr_compute,
 	.set_wptr = gfx_v7_0_ring_set_wptr_compute,
 	.parse_cs = NULL,
-	.emit_ib = gfx_v7_0_ring_emit_ib,
+	.emit_ib = gfx_v7_0_ring_emit_ib_compute,
 	.emit_fence = gfx_v7_0_ring_emit_fence_compute,
 	.emit_semaphore = gfx_v7_0_ring_emit_semaphore,
 	.emit_vm_flush = gfx_v7_0_ring_emit_vm_flush,

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+60−25

 	int err;
 	struct amdgpu_firmware_info *info = NULL;
 	const struct common_firmware_header *header = NULL;
+	const struct gfx_firmware_header_v1_0 *cp_hdr;
 	DRM_DEBUG("\n");
 	err = amdgpu_ucode_validate(adev->gfx.pfp_fw);
 	if (err)
 		goto out;
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data;
+	adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name);
 	err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev);
 	err = amdgpu_ucode_validate(adev->gfx.me_fw);
 	if (err)
 		goto out;
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data;
+	adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name);
 	err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev);
 	err = amdgpu_ucode_validate(adev->gfx.ce_fw);
 	if (err)
 		goto out;
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data;
+	adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name);
 	err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
 	if (err)
 		goto out;
 	err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.rlc_fw->data;
+	adev->gfx.rlc_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.rlc_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name);
 	err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
 	err = amdgpu_ucode_validate(adev->gfx.mec_fw);
 	if (err)
 		goto out;
+	cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;
+	adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+	adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
 	snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
 	err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev);
 		err = amdgpu_ucode_validate(adev->gfx.mec2_fw);
 		if (err)
 			goto out;
+		cp_hdr = (const struct gfx_firmware_header_v1_0 *)
+						adev->gfx.mec2_fw->data;
+		adev->gfx.mec2_fw_version = le32_to_cpu(
+						cp_hdr->header.ucode_version);
+		adev->gfx.mec2_feature_version = le32_to_cpu(
+						cp_hdr->ucode_feature_version);
 	} else {
 		err = 0;
 		adev->gfx.mec2_fw = NULL;
 		adev->gfx.config.max_shader_engines = 1;
 		adev->gfx.config.max_tile_pipes = 2;
 		adev->gfx.config.max_sh_per_se = 1;
+		adev->gfx.config.max_backends_per_se = 2;
 		switch (adev->pdev->revision) {
 		case 0xc4:
 		case 0xcc:
 			/* B10 */
 			adev->gfx.config.max_cu_per_sh = 8;
-			adev->gfx.config.max_backends_per_se = 2;
 			break;
 		case 0xc5:
 		case 0x81:
 		case 0xcd:
 			/* B8 */
 			adev->gfx.config.max_cu_per_sh = 6;
-			adev->gfx.config.max_backends_per_se = 2;
 			break;
 		case 0xc6:
 		case 0xca:
 		case 0xce:
 			/* B6 */
 			adev->gfx.config.max_cu_per_sh = 6;
-			adev->gfx.config.max_backends_per_se = 2;
 			break;
 		case 0xc7:
 		case 0x87:
 		default:
 			/* B4 */
 			adev->gfx.config.max_cu_per_sh = 4;
-			adev->gfx.config.max_backends_per_se = 1;
 			break;
 		}
 	hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
 	amdgpu_ucode_print_rlc_hdr(&hdr->header);
-	adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version);
 	fw_data = (const __le32 *)(adev->gfx.rlc_fw->data +
 			   le32_to_cpu(hdr->header.ucode_array_offset_bytes));
 	amdgpu_ucode_print_gfx_hdr(&pfp_hdr->header);
 	amdgpu_ucode_print_gfx_hdr(&ce_hdr->header);
 	amdgpu_ucode_print_gfx_hdr(&me_hdr->header);
-	adev->gfx.pfp_fw_version = le32_to_cpu(pfp_hdr->header.ucode_version);
-	adev->gfx.ce_fw_version = le32_to_cpu(ce_hdr->header.ucode_version);
-	adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version);
-	adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version);
-	adev->gfx.ce_feature_version = le32_to_cpu(ce_hdr->ucode_feature_version);
-	adev->gfx.pfp_feature_version = le32_to_cpu(pfp_hdr->ucode_feature_version);
 	gfx_v8_0_cp_gfx_enable(adev, false);
 	mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data;
 	amdgpu_ucode_print_gfx_hdr(&mec_hdr->header);
-	adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version);
 	fw_data = (const __le32 *)
 		(adev->gfx.mec_fw->data +
 		mec2_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data;
 		amdgpu_ucode_print_gfx_hdr(&mec2_hdr->header);
-		adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version);
 		fw_data = (const __le32 *)
 			(adev->gfx.mec2_fw->data +
 				WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER,
 				       AMDGPU_DOORBELL_KIQ << 2);
 				WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,
-						0x7FFFF << 2);
+				       AMDGPU_DOORBELL_MEC_RING7 << 2);
 			}
 			tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
 			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
 	amdgpu_ring_write(ring, 0x20); /* poll interval */
 }
-static void gfx_v8_0_ring_emit_ib(struct amdgpu_ring *ring,
+static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
 				  struct amdgpu_ib *ib)
 {
 	bool need_ctx_switch = ring->current_ctx != ib->ctx;
 	u32 next_rptr = ring->wptr + 5;
 	/* drop the CE preamble IB for the same context */
-	if ((ring->type == AMDGPU_RING_TYPE_GFX) &&
+	if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && !need_ctx_switch)
-	    (ib->flags & AMDGPU_IB_FLAG_PREAMBLE) &&
-	    !need_ctx_switch)
 		return;
-	if (ring->type == AMDGPU_RING_TYPE_COMPUTE)
+	if (need_ctx_switch)
-		control |= INDIRECT_BUFFER_VALID;
-	if (need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX)
 		next_rptr += 2;
 	next_rptr += 4;
 	amdgpu_ring_write(ring, next_rptr);
 	/* insert SWITCH_BUFFER packet before first IB in the ring frame */
-	if (need_ctx_switch && ring->type == AMDGPU_RING_TYPE_GFX) {
+	if (need_ctx_switch) {
 		amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
 		amdgpu_ring_write(ring, 0);
 	}
 	amdgpu_ring_write(ring, control);
 }
+static void gfx_v8_0_ring_emit_ib_compute(struct amdgpu_ring *ring,
+				  struct amdgpu_ib *ib)
+{
+	u32 header, control = 0;
+	u32 next_rptr = ring->wptr + 5;
+	control |= INDIRECT_BUFFER_VALID;
+	next_rptr += 4;
+	amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
+	amdgpu_ring_write(ring, WRITE_DATA_DST_SEL(5) | WR_CONFIRM);
+	amdgpu_ring_write(ring, ring->next_rptr_gpu_addr & 0xfffffffc);
+	amdgpu_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xffffffff);
+	amdgpu_ring_write(ring, next_rptr);
+	header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
+	control |= ib->length_dw |
+			   (ib->vm ? (ib->vm->ids[ring->idx].id << 24) : 0);
+	amdgpu_ring_write(ring, header);
+	amdgpu_ring_write(ring,
+#ifdef __BIG_ENDIAN
+					  (2 << 0) |
+#endif
+					  (ib->gpu_addr & 0xFFFFFFFC));
+	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);
+	amdgpu_ring_write(ring, control);
+}
 static void gfx_v8_0_ring_emit_fence_gfx(struct amdgpu_ring *ring, u64 addr,
 					 u64 seq, unsigned flags)
 {
 	.get_wptr = gfx_v8_0_ring_get_wptr_gfx,
 	.set_wptr = gfx_v8_0_ring_set_wptr_gfx,
 	.parse_cs = NULL,
-	.emit_ib = gfx_v8_0_ring_emit_ib,
+	.emit_ib = gfx_v8_0_ring_emit_ib_gfx,
 	.emit_fence = gfx_v8_0_ring_emit_fence_gfx,
 	.emit_semaphore = gfx_v8_0_ring_emit_semaphore,
 	.emit_vm_flush = gfx_v8_0_ring_emit_vm_flush,
 	.get_wptr = gfx_v8_0_ring_get_wptr_compute,
 	.set_wptr = gfx_v8_0_ring_set_wptr_compute,
 	.parse_cs = NULL,
-	.emit_ib = gfx_v8_0_ring_emit_ib,
+	.emit_ib = gfx_v8_0_ring_emit_ib_compute,
 	.emit_fence = gfx_v8_0_ring_emit_fence_compute,
 	.emit_semaphore = gfx_v8_0_ring_emit_semaphore,
 	.emit_vm_flush = gfx_v8_0_ring_emit_vm_flush,

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c+4−2

 	int err, i;
 	struct amdgpu_firmware_info *info = NULL;
 	const struct common_firmware_header *header = NULL;
+	const struct sdma_firmware_header_v1_0 *hdr;
 	DRM_DEBUG("\n");
 		err = amdgpu_ucode_validate(adev->sdma[i].fw);
 		if (err)
 			goto out;
+		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data;
+		adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
+		adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);
 		if (adev->firmware.smu_load) {
 			info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i];
 			hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data;
 			amdgpu_ucode_print_sdma_hdr(&hdr->header);
 			fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
-			adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
 			fw_data = (const __le32 *)
 				(adev->sdma[i].fw->data +
 				 le32_to_cpu(hdr->header.ucode_array_offset_bytes));

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c+4−2

 	int err, i;
 	struct amdgpu_firmware_info *info = NULL;
 	const struct common_firmware_header *header = NULL;
+	const struct sdma_firmware_header_v1_0 *hdr;
 	DRM_DEBUG("\n");
 		err = amdgpu_ucode_validate(adev->sdma[i].fw);
 		if (err)
 			goto out;
+		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data;
+		adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
+		adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);
 		if (adev->firmware.smu_load) {
 			info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i];
 		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data;
 		amdgpu_ucode_print_sdma_hdr(&hdr->header);
 		fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;
-		adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version);
 		fw_data = (const __le32 *)
 			(adev->sdma[i].fw->data +
 				le32_to_cpu(hdr->header.ucode_array_offset_bytes));

drivers/gpu/drm/drm_atomic_helper.c+9−1

@@ -196,7 +196,12 @@ update_connector_routing(struct drm_atomic_state *state, int conn_idx) · 195 unmodified lines
196	}	196	}
197		197
198	funcs = connector->helper_private;	198	funcs = connector->helper_private;
199	new_encoder = funcs->best_encoder(connector);	199
		200	if (funcs->atomic_best_encoder)
		201	new_encoder = funcs->atomic_best_encoder(connector,
		202	connector_state);
		203	else
		204	new_encoder = funcs->best_encoder(connector);
200		205
201	if (!new_encoder) {	206	if (!new_encoder) {
202	DRM_DEBUG_ATOMIC("No suitable encoder found for [CONNECTOR:%d:%s]\n",	207	DRM_DEBUG_ATOMIC("No suitable encoder found for [CONNECTOR:%d:%s]\n",
@@ -229,6 +234,9 @@ update_connector_routing(struct drm_atomic_state *state, int conn_idx) · 26 unmodified lines
229	}	234	}
230	}	235	}
231		236
		237	if (WARN_ON(!connector_state->crtc))
		238	return -EINVAL;
		239
232	connector_state->best_encoder = new_encoder;	240	connector_state->best_encoder = new_encoder;
233	idx = drm_crtc_index(connector_state->crtc);	241	idx = drm_crtc_index(connector_state->crtc);
234		242

drivers/gpu/drm/drm_dp_mst_topology.c+13−7

 		   from an EDID retrieval */
 		if (port->connector) {
 			mutex_lock(&mgr->destroy_connector_lock);
-			list_add(&port->connector->destroy_list, &mgr->destroy_connector_list);
+			list_add(&port->next, &mgr->destroy_connector_list);
 			mutex_unlock(&mgr->destroy_connector_lock);
 			schedule_work(&mgr->destroy_connector_work);
+			return;
 		}
 		drm_dp_port_teardown_pdt(port, port->pdt);
 				goto retry;
 			}
 			DRM_DEBUG_KMS("failed to dpcd write %d %d\n", tosend, ret);
-			WARN(1, "fail\n");
 			return -EIO;
 		}
 static void drm_dp_destroy_connector_work(struct work_struct *work)
 {
 	struct drm_dp_mst_topology_mgr *mgr = container_of(work, struct drm_dp_mst_topology_mgr, destroy_connector_work);
-	struct drm_connector *connector;
+	struct drm_dp_mst_port *port;
 	/*
 	 * Not a regular list traverse as we have to drop the destroy
 	 */
 	for (;;) {
 		mutex_lock(&mgr->destroy_connector_lock);
-		connector = list_first_entry_or_null(&mgr->destroy_connector_list, struct drm_connector, destroy_list);
+		port = list_first_entry_or_null(&mgr->destroy_connector_list, struct drm_dp_mst_port, next);
-		if (!connector) {
+		if (!port) {
 			mutex_unlock(&mgr->destroy_connector_lock);
 			break;
 		}
-		list_del(&connector->destroy_list);
+		list_del(&port->next);
 		mutex_unlock(&mgr->destroy_connector_lock);
-		mgr->cbs->destroy_connector(mgr, connector);
+		mgr->cbs->destroy_connector(mgr, port->connector);
+		drm_dp_port_teardown_pdt(port, port->pdt);
+		if (!port->input && port->vcpi.vcpi > 0)
+			drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
+		kfree(port);
 	}
 }

drivers/gpu/drm/drm_irq.c+1−1

@@ -75,7 +75,7 @@ module_param_named(timestamp_precision_usec, drm_timestamp_precision, int, 0600) · 74 unmodified lines
75	module_param_named(timestamp_monotonic, drm_timestamp_monotonic, int, 0600);	75	module_param_named(timestamp_monotonic, drm_timestamp_monotonic, int, 0600);
76		76
77	static void store_vblank(struct drm_device *dev, int crtc,	77	static void store_vblank(struct drm_device *dev, int crtc,
78	unsigned vblank_count_inc,	78	u32 vblank_count_inc,
79	struct timeval *t_vblank)	79	struct timeval *t_vblank)
80	{	80	{
81	struct drm_vblank_crtc *vblank = &dev->vblank[crtc];	81	struct drm_vblank_crtc *vblank = &dev->vblank[crtc];

drivers/gpu/drm/exynos/exynos_drm_fimc.c+0−1

@@ -1745,7 +1745,6 @@ static int fimc_probe(struct platform_device *pdev) · 1744 unmodified lines
1745	spin_lock_init(&ctx->lock);	1745	spin_lock_init(&ctx->lock);
1746	platform_set_drvdata(pdev, ctx);	1746	platform_set_drvdata(pdev, ctx);
1747		1747
1748	pm_runtime_set_active(dev);
1749	pm_runtime_enable(dev);	1748	pm_runtime_enable(dev);
1750		1749
1751	ret = exynos_drm_ippdrv_register(ippdrv);	1750	ret = exynos_drm_ippdrv_register(ippdrv);

drivers/gpu/drm/exynos/exynos_drm_gsc.c+2−4

 	gsc_write(cfg, GSC_IN_CON);
-	ctx->rotation = cfg &
+	ctx->rotation = (cfg & GSC_IN_ROT_90) ? 1 : 0;
-		(GSC_IN_ROT_90 | GSC_IN_ROT_270) ? 1 : 0;
 	*swap = ctx->rotation;
 	return 0;
 	gsc_write(cfg, GSC_IN_CON);
-	ctx->rotation = cfg &
+	ctx->rotation = (cfg & GSC_IN_ROT_90) ? 1 : 0;
-		(GSC_IN_ROT_90 | GSC_IN_ROT_270) ? 1 : 0;
 	*swap = ctx->rotation;
 	return 0;

drivers/gpu/drm/exynos/exynos_hdmi.c+6−1

 {
 	struct hdmi_context *hdata = ctx_from_connector(connector);
 	struct edid *edid;
+	int ret;
 	if (!hdata->ddc_adpt)
 		return -ENODEV;
 	drm_mode_connector_update_edid_property(connector, edid);
-	return drm_add_edid_modes(connector, edid);
+	ret = drm_add_edid_modes(connector, edid);
+	kfree(edid);
+	return ret;
 }
 static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock)

drivers/gpu/drm/exynos/exynos_mixer.c+14−7

 	/* handling VSYNC */
 	if (val & MXR_INT_STATUS_VSYNC) {
+		/* vsync interrupt use different bit for read and clear */
+		val |= MXR_INT_CLEAR_VSYNC;
+		val &= ~MXR_INT_STATUS_VSYNC;
 		/* interlace scan need to check shadow register */
 		if (ctx->interlace) {
 			base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0));
 out:
 	/* clear interrupts */
-	if (~val & MXR_INT_EN_VSYNC) {
-		/* vsync interrupt use different bit for read and clear */
-		val &= ~MXR_INT_EN_VSYNC;
-		val |= MXR_INT_CLEAR_VSYNC;
-	}
 	mixer_reg_write(res, MXR_INT_STATUS, val);
 	spin_unlock(&res->reg_slock);
 	}
 	/* enable vsync interrupt */
-	mixer_reg_writemask(res, MXR_INT_EN, MXR_INT_EN_VSYNC,
+	mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
-			MXR_INT_EN_VSYNC);
+	mixer_reg_writemask(res, MXR_INT_EN, ~0, MXR_INT_EN_VSYNC);
 	return 0;
 }
 	struct mixer_context *mixer_ctx = crtc->ctx;
 	struct mixer_resources *res = &mixer_ctx->mixer_res;
+	if (!mixer_ctx->powered) {
+		mixer_ctx->int_en &= MXR_INT_EN_VSYNC;
+		return;
+	}
 	/* disable vsync interrupt */
+	mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
 	mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC);
 }
 	mixer_reg_writemask(res, MXR_STATUS, ~0, MXR_STATUS_SOFT_RESET);
+	if (ctx->int_en & MXR_INT_EN_VSYNC)
+		mixer_reg_writemask(res, MXR_INT_STATUS, ~0, MXR_INT_CLEAR_VSYNC);
 	mixer_reg_write(res, MXR_INT_EN, ctx->int_en);
 	mixer_win_reset(ctx);
 }

drivers/gpu/drm/i2c/tda998x_drv.c+2−2

 tda998x_write_if(struct tda998x_priv *priv, uint8_t bit, uint16_t addr,
 		 uint8_t *buf, size_t size)
 {
-	buf[PB(0)] = tda998x_cksum(buf, size);
 	reg_clear(priv, REG_DIP_IF_FLAGS, bit);
 	reg_write_range(priv, addr, buf, size);
 	reg_set(priv, REG_DIP_IF_FLAGS, bit);
 	buf[PB(4)] = p->audio_frame[4];
 	buf[PB(5)] = p->audio_frame[5] & 0xf8; /* DM_INH + LSV */
+	buf[PB(0)] = tda998x_cksum(buf, sizeof(buf));
 	tda998x_write_if(priv, DIP_IF_FLAGS_IF4, REG_IF4_HB0, buf,
 			 sizeof(buf));
 }

drivers/gpu/drm/i915/i915_drv.h+8−9

@@ -3303,15 +3303,14 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); · 3302 unmodified lines
3303	#define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)	3303	#define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)
3304		3304
3305	#define I915_READ64_2x32(lower_reg, upper_reg) ({ \	3305	#define I915_READ64_2x32(lower_reg, upper_reg) ({ \
3306	u32 upper = I915_READ(upper_reg); \	3306	u32 upper, lower, tmp; \
3307	u32 lower = I915_READ(lower_reg); \	3307	tmp = I915_READ(upper_reg); \
3308	u32 tmp = I915_READ(upper_reg); \	3308	do { \
3309	if (upper != tmp) { \	3309	upper = tmp; \
3310	upper = tmp; \	3310	lower = I915_READ(lower_reg); \
3311	lower = I915_READ(lower_reg); \	3311	tmp = I915_READ(upper_reg); \
3312	WARN_ON(I915_READ(upper_reg) != upper); \	3312	} while (upper != tmp); \
3313	} \	3313	(u64)upper << 32 \| lower; })
3314	(u64)upper << 32 \| lower; })
3315		3314
3316	#define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg)	3315	#define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg)
3317	#define POSTING_READ16(reg) (void)I915_READ16_NOTRACE(reg)	3316	#define POSTING_READ16(reg) (void)I915_READ16_NOTRACE(reg)

drivers/gpu/drm/i915/i915_gem_gtt.c+11−0

@@ -1923,6 +1923,17 @@ static int ggtt_bind_vma(struct i915_vma *vma, · 1922 unmodified lines
1923	vma->vm->insert_entries(vma->vm, pages,	1923	vma->vm->insert_entries(vma->vm, pages,
1924	vma->node.start,	1924	vma->node.start,
1925	cache_level, pte_flags);	1925	cache_level, pte_flags);
		1926
		1927	/* Note the inconsistency here is due to absence of the
		1928	* aliasing ppgtt on gen4 and earlier. Though we always
		1929	* request PIN_USER for execbuffer (translated to LOCAL_BIND),
		1930	* without the appgtt, we cannot honour that request and so
		1931	* must substitute it with a global binding. Since we do this
		1932	* behind the upper layers back, we need to explicitly set
		1933	* the bound flag ourselves.
		1934	*/
		1935	vma->bound \|= GLOBAL_BIND;
		1936
1926	}	1937	}
1927		1938
1928	if (dev_priv->mm.aliasing_ppgtt && flags & LOCAL_BIND) {	1939	if (dev_priv->mm.aliasing_ppgtt && flags & LOCAL_BIND) {

drivers/gpu/drm/i915/i915_gem_tiling.c+4−1

 	}
 	/* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */
-	args->phys_swizzle_mode = args->swizzle_mode;
+	if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES)
+		args->phys_swizzle_mode = I915_BIT_6_SWIZZLE_UNKNOWN;
+	else
+		args->phys_swizzle_mode = args->swizzle_mode;
 	if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17)
 		args->swizzle_mode = I915_BIT_6_SWIZZLE_9;
 	if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17)

drivers/gpu/drm/i915/intel_atomic.c+8−37

@@ -129,8 +129,9 @@ int intel_atomic_commit(struct drm_device *dev, · 128 unmodified lines
129	struct drm_atomic_state *state,	129	struct drm_atomic_state *state,
130	bool async)	130	bool async)
131	{	131	{
132	int ret;	132	struct drm_crtc_state *crtc_state;
133	int i;	133	struct drm_crtc *crtc;
		134	int ret, i;
134		135
135	if (async) {	136	if (async) {
136	DRM_DEBUG_KMS("i915 does not yet support async commit\n");	137	DRM_DEBUG_KMS("i915 does not yet support async commit\n");
@@ -142,48 +143,18 @@ int intel_atomic_commit(struct drm_device *dev, · 5 unmodified lines
142	return ret;	143	return ret;
143		144
144	/* Point of no return */	145	/* Point of no return */
145		146	drm_atomic_helper_swap_state(dev, state);
146	/*
147	* FIXME: The proper sequence here will eventually be:
148	*
149	* drm_atomic_helper_swap_state(dev, state)
150	* drm_atomic_helper_commit_modeset_disables(dev, state);
151	* drm_atomic_helper_commit_planes(dev, state);
152	* drm_atomic_helper_commit_modeset_enables(dev, state);
153	* drm_atomic_helper_wait_for_vblanks(dev, state);
154	* drm_atomic_helper_cleanup_planes(dev, state);
155	* drm_atomic_state_free(state);
156	*
157	* once we have full atomic modeset. For now, just manually update
158	* plane states to avoid clobbering good states with dummy states
159	* while nuclear pageflipping.
160	*/
161	for (i = 0; i < dev->mode_config.num_total_plane; i++) {
162	struct drm_plane *plane = state->planes[i];
163
164	if (!plane)
165	continue;
166
167	plane->state->state = state;
168	swap(state->plane_states[i], plane->state);
169	plane->state->state = NULL;
170	}
171		147
172	/* swap crtc_scaler_state */	148	/* swap crtc_scaler_state */
173	for (i = 0; i < dev->mode_config.num_crtc; i++) {	149	for_each_crtc_in_state(state, crtc, crtc_state, i) {
174	struct drm_crtc *crtc = state->crtcs[i];	150	to_intel_crtc(crtc)->config = to_intel_crtc_state(crtc->state);
175	if (!crtc) {
176	continue;
177	}
178
179	to_intel_crtc(crtc)->config->scaler_state =
180	to_intel_crtc_state(state->crtc_states[i])->scaler_state;
181		151
182	if (INTEL_INFO(dev)->gen >= 9)	152	if (INTEL_INFO(dev)->gen >= 9)
183	skl_detach_scalers(to_intel_crtc(crtc));	153	skl_detach_scalers(to_intel_crtc(crtc));
		154
		155	drm_atomic_helper_commit_planes_on_crtc(crtc_state);
184	}	156	}
185		157
186	drm_atomic_helper_commit_planes(dev, state);
187	drm_atomic_helper_wait_for_vblanks(dev, state);	158	drm_atomic_helper_wait_for_vblanks(dev, state);
188	drm_atomic_helper_cleanup_planes(dev, state);	159	drm_atomic_helper_cleanup_planes(dev, state);
189	drm_atomic_state_free(state);	160	drm_atomic_state_free(state);

drivers/gpu/drm/i915/intel_bios.c+23−4

 	const union child_device_config *p_child;
 	union child_device_config *child_dev_ptr;
 	int i, child_device_num, count;
-	u16	block_size;
+	u8 expected_size;
+	u16 block_size;
 	p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
 	if (!p_defs) {
 		DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
 		return;
 	}
-	if (p_defs->child_dev_size < sizeof(*p_child)) {
+	if (bdb->version < 195) {
-		DRM_ERROR("General definiton block child device size is too small.\n");
+		expected_size = 33;
+	} else if (bdb->version == 195) {
+		expected_size = 37;
+	} else if (bdb->version <= 197) {
+		expected_size = 38;
+	} else {
+		expected_size = 38;
+		DRM_DEBUG_DRIVER("Expected child_device_config size for BDB version %u not known; assuming %u\n",
+				 expected_size, bdb->version);
+	}
+	if (expected_size > sizeof(*p_child)) {
+		DRM_ERROR("child_device_config cannot fit in p_child\n");
+		return;
+	}
+	if (p_defs->child_dev_size != expected_size) {
+		DRM_ERROR("Size mismatch; child_device_config size=%u (expected %u); bdb->version: %u\n",
+			  p_defs->child_dev_size, expected_size, bdb->version);
 		return;
 	}
 	/* get the block size of general definitions */
 		child_dev_ptr = dev_priv->vbt.child_dev + count;
 		count++;
-		memcpy(child_dev_ptr, p_child, sizeof(*p_child));
+		memcpy(child_dev_ptr, p_child, p_defs->child_dev_size);
 	}
 	return;
 }

drivers/gpu/drm/i915/intel_display.c+15−44

 		goto encoder_retry;
 	}
-	pipe_config->dither = pipe_config->pipe_bpp != base_bpp;
+	/* Dithering seems to not pass-through bits correctly when it should, so
+	 * only enable it on 6bpc panels. */
+	pipe_config->dither = pipe_config->pipe_bpp == 6*3;
 	DRM_DEBUG_KMS("plane bpp: %i, pipe bpp: %i, dithering: %i\n",
 		      base_bpp, pipe_config->pipe_bpp, pipe_config->dither);
 	modeset_update_crtc_power_domains(state);
-	drm_atomic_helper_commit_planes(dev, state);
 	/* Now enable the clocks, plane, pipe, and connectors that we set up. */
 	for_each_crtc_in_state(state, crtc, crtc_state, i) {
-		if (!needs_modeset(crtc->state) || !crtc->state->enable)
+		if (!needs_modeset(crtc->state) || !crtc->state->enable) {
+			drm_atomic_helper_commit_planes_on_crtc(crtc_state);
 			continue;
+		}
 		update_scanline_offset(to_intel_crtc(crtc));
 		dev_priv->display.crtc_enable(crtc);
-		intel_crtc_enable_planes(crtc);
+		drm_atomic_helper_commit_planes_on_crtc(crtc_state);
 	}
 	/* FIXME: add subpixel order */
 	return 0;
 }
-static bool primary_plane_visible(struct drm_crtc *crtc)
-{
-	struct intel_plane_state *plane_state =
-		to_intel_plane_state(crtc->primary->state);
-	return plane_state->visible;
-}
 static int intel_crtc_set_config(struct drm_mode_set *set)
 {
 	struct drm_device *dev;
 	struct drm_atomic_state *state = NULL;
 	struct intel_crtc_state *pipe_config;
-	bool primary_plane_was_visible;
 	int ret;
 	BUG_ON(!set);
 	intel_update_pipe_size(to_intel_crtc(set->crtc));
-	primary_plane_was_visible = primary_plane_visible(set->crtc);
 	ret = intel_set_mode_with_config(set->crtc, pipe_config, true);
-	if (ret == 0 &&
-	    pipe_config->base.enable &&
-	    pipe_config->base.planes_changed &&
-	    !needs_modeset(&pipe_config->base)) {
-		struct intel_crtc *intel_crtc = to_intel_crtc(set->crtc);
-		/*
-		 * We need to make sure the primary plane is re-enabled if it
-		 * has previously been turned off.
-		 */
-		if (ret == 0 && !primary_plane_was_visible &&
-		    primary_plane_visible(set->crtc)) {
-			WARN_ON(!intel_crtc->active);
-			intel_post_enable_primary(set->crtc);
-		}
-		/*
-		 * In the fastboot case this may be our only check of the
-		 * state after boot.  It would be better to only do it on
-		 * the first update, but we don't have a nice way of doing that
-		 * (and really, set_config isn't used much for high freq page
-		 * flipping, so increasing its cost here shouldn't be a big
-		 * deal).
-		 */
-		if (i915.fastboot && ret == 0)
-			intel_modeset_check_state(set->crtc->dev);
-	}
 	if (ret) {
 		DRM_DEBUG_KMS("failed to set mode on [CRTC:%d], err = %d\n",
 			      set->crtc->base.id, ret);
 			 */
 			if (IS_BROADWELL(dev))
 				intel_crtc->atomic.wait_vblank = true;
+			if (crtc_state)
+				intel_crtc->atomic.post_enable_primary = true;
 		}
 		/*
 		if (!state->visible || !fb)
 			intel_crtc->atomic.disable_ips = true;
+		if (!state->visible && old_state->visible &&
+		    crtc_state && !needs_modeset(&crtc_state->base))
+			intel_crtc->atomic.pre_disable_primary = true;
 		intel_crtc->atomic.fb_bits |=
 			INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe);
 		struct intel_plane_state *plane_state;
 		memset(crtc->config, 0, sizeof(*crtc->config));
+		crtc->config->base.crtc = &crtc->base;
 		crtc->config->quirks |= PIPE_CONFIG_QUIRK_INHERITED_MODE;

drivers/gpu/drm/i915/intel_dp_mst.c+11−0

 	return MODE_OK;
 }
+static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
+							 struct drm_connector_state *state)
+{
+	struct intel_connector *intel_connector = to_intel_connector(connector);
+	struct intel_dp *intel_dp = intel_connector->mst_port;
+	struct intel_crtc *crtc = to_intel_crtc(state->crtc);
+	return &intel_dp->mst_encoders[crtc->pipe]->base.base;
+}
 static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
 {
 	struct intel_connector *intel_connector = to_intel_connector(connector);
 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
 	.get_modes = intel_dp_mst_get_modes,
 	.mode_valid = intel_dp_mst_mode_valid,
+	.atomic_best_encoder = intel_mst_atomic_best_encoder,
 	.best_encoder = intel_mst_best_encoder,
 };

drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c+3−1

 	uint32_t op_mode = 0;
 	uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
 	uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
-	enum mdp4_frame_format frame_type = mdp4_get_frame_format(fb);
+	enum mdp4_frame_format frame_type;
 	if (!(crtc && fb)) {
 		DBG("%s: disabled!", mdp4_plane->name);
 		return 0;
 	}
+	frame_type = mdp4_get_frame_format(fb);
 	/* src values are in Q16 fixed point, convert to integer: */
 	src_x = src_x >> 16;
 	src_y = src_y >> 16;

drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c+13−0

@@ -76,7 +76,20 @@ static void mdp5_prepare_commit(struct msm_kms kms, struct drm_atomic_state st · 75 unmodified lines
76		76
77	static void mdp5_complete_commit(struct msm_kms kms, struct drm_atomic_state state)	77	static void mdp5_complete_commit(struct msm_kms kms, struct drm_atomic_state state)
78	{	78	{
		79	int i;
79	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));	80	struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
		81	int nplanes = mdp5_kms->dev->mode_config.num_total_plane;
		82
		83	for (i = 0; i < nplanes; i++) {
		84	struct drm_plane *plane = state->planes[i];
		85	struct drm_plane_state *plane_state = state->plane_states[i];
		86
		87	if (!plane)
		88	continue;
		89
		90	mdp5_plane_complete_commit(plane, plane_state);
		91	}
		92
80	mdp5_disable(mdp5_kms);	93	mdp5_disable(mdp5_kms);
81	}	94	}
82		95

drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h+2−0

 		struct drm_mode_object *obj);
 uint32_t mdp5_plane_get_flush(struct drm_plane *plane);
 void mdp5_plane_complete_flip(struct drm_plane *plane);
+void mdp5_plane_complete_commit(struct drm_plane *plane,
+	struct drm_plane_state *state);
 enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane);
 struct drm_plane *mdp5_plane_init(struct drm_device *dev,
 		enum mdp5_pipe pipe, bool private_plane, uint32_t reg_offset);

drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c+14−19

 	uint32_t nformats;
 	uint32_t formats[32];
-	bool enabled;
 };
 #define to_mdp5_plane(x) container_of(x, struct mdp5_plane, base)
 	return state->fb && state->crtc;
 }
-static int mdp5_plane_disable(struct drm_plane *plane)
-{
-	struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
-	struct mdp5_kms *mdp5_kms = get_kms(plane);
-	enum mdp5_pipe pipe = mdp5_plane->pipe;
-	DBG("%s: disable", mdp5_plane->name);
-	if (mdp5_kms) {
-		/* Release the memory we requested earlier from the SMP: */
-		mdp5_smp_release(mdp5_kms->smp, pipe);
-	}
-	return 0;
-}
 static void mdp5_plane_destroy(struct drm_plane *plane)
 {
 	struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
 	if (!plane_enabled(state)) {
 		to_mdp5_plane_state(state)->pending = true;
-		mdp5_plane_disable(plane);
 	} else if (to_mdp5_plane_state(state)->mode_changed) {
 		int ret;
 		to_mdp5_plane_state(state)->pending = true;
 	return mdp5_plane->flush_mask;
 }
+/* called after vsync in thread context */
+void mdp5_plane_complete_commit(struct drm_plane *plane,
+	struct drm_plane_state *state)
+{
+	struct mdp5_kms *mdp5_kms = get_kms(plane);
+	struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
+	enum mdp5_pipe pipe = mdp5_plane->pipe;
+	if (!plane_enabled(plane->state)) {
+		DBG("%s: free SMP", mdp5_plane->name);
+		mdp5_smp_release(mdp5_kms->smp, pipe);
+	}
+}
 /* initialize plane */
 struct drm_plane *mdp5_plane_init(struct drm_device *dev,
 		enum mdp5_pipe pipe, bool private_plane, uint32_t reg_offset)

drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c+74−13

@@ -34,22 +34,44 @@ · 33 unmodified lines
34	* and CANNOT be re-allocated (eg: MMB0 and MMB1 both tied to RGB0).	34	* and CANNOT be re-allocated (eg: MMB0 and MMB1 both tied to RGB0).
35	*	35	*
36	* For each block that can be dynamically allocated, it can be either	36	* For each block that can be dynamically allocated, it can be either
37	* free, or pending/in-use by a client. The updates happen in three steps:	37	* free:
		38	* The block is free.
		39	*
		40	* pending:
		41	* The block is allocated to some client and not free.
		42	*
		43	* configured:
		44	* The block is allocated to some client, and assigned to that
		45	* client in MDP5_MDP_SMP_ALLOC registers.
		46	*
		47	* inuse:
		48	* The block is being actively used by a client.
		49	*
		50	* The updates happen in the following steps:
38	*	51	*
39	* 1) mdp5_smp_request():	52	* 1) mdp5_smp_request():
40	* When plane scanout is setup, calculate required number of	53	* When plane scanout is setup, calculate required number of
41	* blocks needed per client, and request. Blocks not inuse or	54	* blocks needed per client, and request. Blocks neither inuse nor
42	* pending by any other client are added to client's pending	55	* configured nor pending by any other client are added to client's
43	* set.	56	* pending set.
		57	* For shrinking, blocks in pending but not in configured can be freed
		58	* directly, but those already in configured will be freed later by
		59	* mdp5_smp_commit.
44	*	60	*
45	* 2) mdp5_smp_configure():	61	* 2) mdp5_smp_configure():
46	* As hw is programmed, before FLUSH, MDP5_MDP_SMP_ALLOC registers	62	* As hw is programmed, before FLUSH, MDP5_MDP_SMP_ALLOC registers
47	* are configured for the union(pending, inuse)	63	* are configured for the union(pending, inuse)
		64	* Current pending is copied to configured.
		65	* It is assumed that mdp5_smp_request and mdp5_smp_configure not run
		66	* concurrently for the same pipe.
48	*	67	*
49	* 3) mdp5_smp_commit():	68	* 3) mdp5_smp_commit():
50	* After next vblank, copy pending -> inuse. Optionally update	69	* After next vblank, copy configured -> inuse. Optionally update
51	* MDP5_SMP_ALLOC registers if there are newly unused blocks	70	* MDP5_SMP_ALLOC registers if there are newly unused blocks
52	*	71	*
		72	* 4) mdp5_smp_release():
		73	* Must be called after the pipe is disabled and no longer uses any SMB
		74	*
53	* On the next vblank after changes have been committed to hw, the	75	* On the next vblank after changes have been committed to hw, the
54	* client's pending blocks become it's in-use blocks (and no-longer	76	* client's pending blocks become it's in-use blocks (and no-longer
55	* in-use blocks become available to other clients).	77	* in-use blocks become available to other clients).
@@ -77,6 +99,9 @@ struct mdp5_smp { · 21 unmodified lines
77	struct mdp5_client_smp_state client_state[MAX_CLIENTS];	99	struct mdp5_client_smp_state client_state[MAX_CLIENTS];
78	};	100	};
79		101
		102	static void update_smp_state(struct mdp5_smp *smp,
		103	u32 cid, mdp5_smp_state_t *assigned);
		104
80	static inline	105	static inline
81	struct mdp5_kms get_kms(struct mdp5_smp smp)	106	struct mdp5_kms get_kms(struct mdp5_smp smp)
82	{	107	{
@@ -149,7 +174,12 @@ static int smp_request_block(struct mdp5_smp *smp, · 66 unmodified lines
149	for (i = cur_nblks; i > nblks; i--) {	174	for (i = cur_nblks; i > nblks; i--) {
150	int blk = find_first_bit(ps->pending, cnt);	175	int blk = find_first_bit(ps->pending, cnt);
151	clear_bit(blk, ps->pending);	176	clear_bit(blk, ps->pending);
152	/* don't clear in global smp_state until _commit() */	177
		178	/* clear in global smp_state if not in configured
		179	* otherwise until _commit()
		180	*/
		181	if (!test_bit(blk, ps->configured))
		182	clear_bit(blk, smp->state);
153	}	183	}
154	}	184	}
155		185
@@ -223,10 +253,33 @@ int mdp5_smp_request(struct mdp5_smp *smp, enum mdp5_pipe pipe, u32 fmt, u32 wid · 67 unmodified lines
223	/* Release SMP blocks for all clients of the pipe */	253	/* Release SMP blocks for all clients of the pipe */
224	void mdp5_smp_release(struct mdp5_smp *smp, enum mdp5_pipe pipe)	254	void mdp5_smp_release(struct mdp5_smp *smp, enum mdp5_pipe pipe)
225	{	255	{
226	int i, nblks;	256	int i;
		257	unsigned long flags;
		258	int cnt = smp->blk_cnt;
		259
		260	for (i = 0; i < pipe2nclients(pipe); i++) {
		261	mdp5_smp_state_t assigned;
		262	u32 cid = pipe2client(pipe, i);
		263	struct mdp5_client_smp_state *ps = &smp->client_state[cid];
		264
		265	spin_lock_irqsave(&smp->state_lock, flags);
		266
		267	/* clear hw assignment */
		268	bitmap_or(assigned, ps->inuse, ps->configured, cnt);
		269	update_smp_state(smp, CID_UNUSED, &assigned);
		270
		271	/* free to global pool */
		272	bitmap_andnot(smp->state, smp->state, ps->pending, cnt);
		273	bitmap_andnot(smp->state, smp->state, assigned, cnt);
		274
		275	/* clear client's infor */
		276	bitmap_zero(ps->pending, cnt);
		277	bitmap_zero(ps->configured, cnt);
		278	bitmap_zero(ps->inuse, cnt);
		279
		280	spin_unlock_irqrestore(&smp->state_lock, flags);
		281	}
227		282
228	for (i = 0, nblks = 0; i < pipe2nclients(pipe); i++)
229	smp_request_block(smp, pipe2client(pipe, i), 0);
230	set_fifo_thresholds(smp, pipe, 0);	283	set_fifo_thresholds(smp, pipe, 0);
231	}	284	}
232		285
@@ -274,12 +327,20 @@ void mdp5_smp_configure(struct mdp5_smp *smp, enum mdp5_pipe pipe) · 41 unmodified lines
274	u32 cid = pipe2client(pipe, i);	327	u32 cid = pipe2client(pipe, i);
275	struct mdp5_client_smp_state *ps = &smp->client_state[cid];	328	struct mdp5_client_smp_state *ps = &smp->client_state[cid];
276		329
277	bitmap_or(assigned, ps->inuse, ps->pending, cnt);	330	/*
		331	* if vblank has not happened since last smp_configure
		332	* skip the configure for now
		333	*/
		334	if (!bitmap_equal(ps->inuse, ps->configured, cnt))
		335	continue;
		336
		337	bitmap_copy(ps->configured, ps->pending, cnt);
		338	bitmap_or(assigned, ps->inuse, ps->configured, cnt);
278	update_smp_state(smp, cid, &assigned);	339	update_smp_state(smp, cid, &assigned);
279	}	340	}
280	}	341	}
281		342
282	/* step #3: after vblank, copy pending -> inuse: */	343	/* step #3: after vblank, copy configured -> inuse: */
283	void mdp5_smp_commit(struct mdp5_smp *smp, enum mdp5_pipe pipe)	344	void mdp5_smp_commit(struct mdp5_smp *smp, enum mdp5_pipe pipe)
284	{	345	{
285	int cnt = smp->blk_cnt;	346	int cnt = smp->blk_cnt;
@@ -295,7 +356,7 @@ void mdp5_smp_commit(struct mdp5_smp *smp, enum mdp5_pipe pipe) · 9 unmodified lines
295	* using, which can be released and made available to other	356	* using, which can be released and made available to other
296	* clients:	357	* clients:
297	*/	358	*/
298	if (bitmap_andnot(released, ps->inuse, ps->pending, cnt)) {	359	if (bitmap_andnot(released, ps->inuse, ps->configured, cnt)) {
299	unsigned long flags;	360	unsigned long flags;
300		361
301	spin_lock_irqsave(&smp->state_lock, flags);	362	spin_lock_irqsave(&smp->state_lock, flags);
@@ -306,7 +367,7 @@ void mdp5_smp_commit(struct mdp5_smp *smp, enum mdp5_pipe pipe) · 4 unmodified lines
306	update_smp_state(smp, CID_UNUSED, &released);	367	update_smp_state(smp, CID_UNUSED, &released);
307	}	368	}
308		369
309	bitmap_copy(ps->inuse, ps->pending, cnt);	370	bitmap_copy(ps->inuse, ps->configured, cnt);
310	}	371	}
311	}	372	}
312		373

drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.h+1−0

@@ -23,6 +23,7 @@ · 22 unmodified lines
23		23
24	struct mdp5_client_smp_state {	24	struct mdp5_client_smp_state {
25	mdp5_smp_state_t inuse;	25	mdp5_smp_state_t inuse;
		26	mdp5_smp_state_t configured;
26	mdp5_smp_state_t pending;	27	mdp5_smp_state_t pending;
27	};	28	};
28		29

drivers/gpu/drm/msm/msm_atomic.c+2−6

 	timeout = ktime_add_ms(ktime_get(), 1000);
-	ret = msm_wait_fence_interruptable(dev, c->fence, &timeout);
+	/* uninterruptible wait */
-	if (ret) {
+	msm_wait_fence(dev, c->fence, &timeout, false);
-		WARN_ON(ret);  // TODO unswap state back?  or??
-		commit_destroy(c);
-		return ret;
-	}
 	complete_commit(c);

drivers/gpu/drm/msm/msm_drv.c+9−4

  * Fences:
  */
-int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,
+int msm_wait_fence(struct drm_device *dev, uint32_t fence,
-		ktime_t *timeout)
+		ktime_t *timeout , bool interruptible)
 {
 	struct msm_drm_private *priv = dev->dev_private;
 	int ret;
 			remaining_jiffies = timespec_to_jiffies(&ts);
 		}
-		ret = wait_event_interruptible_timeout(priv->fence_event,
+		if (interruptible)
+			ret = wait_event_interruptible_timeout(priv->fence_event,
+				fence_completed(dev, fence),
+				remaining_jiffies);
+		else
+			ret = wait_event_timeout(priv->fence_event,
 				fence_completed(dev, fence),
 				remaining_jiffies);
 		return -EINVAL;
 	}
-	return msm_wait_fence_interruptable(dev, args->fence, &timeout);
+	return msm_wait_fence(dev, args->fence, &timeout, true);
 }
 static const struct drm_ioctl_desc msm_ioctls[] = {

drivers/gpu/drm/msm/msm_drv.h+2−2

@@ -164,8 +164,8 @@ int msm_atomic_commit(struct drm_device *dev, · 163 unmodified lines
164		164
165	int msm_register_mmu(struct drm_device dev, struct msm_mmu mmu);	165	int msm_register_mmu(struct drm_device dev, struct msm_mmu mmu);
166		166
167	int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,	167	int msm_wait_fence(struct drm_device *dev, uint32_t fence,
168	ktime_t *timeout);	168	ktime_t *timeout, bool interruptible);
169	int msm_queue_fence_cb(struct drm_device *dev,	169	int msm_queue_fence_cb(struct drm_device *dev,
170	struct msm_fence_cb *cb, uint32_t fence);	170	struct msm_fence_cb *cb, uint32_t fence);
171	void msm_update_fence(struct drm_device *dev, uint32_t fence);	171	void msm_update_fence(struct drm_device *dev, uint32_t fence);

drivers/gpu/drm/msm/msm_gem.c+1−1

@@ -460,7 +460,7 @@ int msm_gem_cpu_prep(struct drm_gem_object obj, uint32_t op, ktime_t timeout) · 459 unmodified lines
460	if (op & MSM_PREP_NOSYNC)	460	if (op & MSM_PREP_NOSYNC)
461	timeout = NULL;	461	timeout = NULL;
462		462
463	ret = msm_wait_fence_interruptable(dev, fence, timeout);	463	ret = msm_wait_fence(dev, fence, timeout, true);
464	}	464	}
465		465
466	/* TODO cache maintenance */	466	/* TODO cache maintenance */

drivers/gpu/drm/msm/msm_gem_prime.c+6−2

@@ -23,8 +23,12 @@ · 22 unmodified lines
23	struct sg_table msm_gem_prime_get_sg_table(struct drm_gem_object obj)	23	struct sg_table msm_gem_prime_get_sg_table(struct drm_gem_object obj)
24	{	24	{
25	struct msm_gem_object *msm_obj = to_msm_bo(obj);	25	struct msm_gem_object *msm_obj = to_msm_bo(obj);
26	BUG_ON(!msm_obj->sgt); /* should have already pinned! */	26	int npages = obj->size >> PAGE_SHIFT;
27	return msm_obj->sgt;	27
		28	if (WARN_ON(!msm_obj->pages)) /* should have already pinned! */
		29	return NULL;
		30
		31	return drm_prime_pages_to_sg(msm_obj->pages, npages);
28	}	32	}
29		33
30	void msm_gem_prime_vmap(struct drm_gem_object obj)	34	void msm_gem_prime_vmap(struct drm_gem_object obj)

drivers/gpu/drm/nouveau/nouveau_drm.c+3−0

 	nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
 	nvif_client_fini(&cli->base);
 	usif_client_fini(cli);
+	kfree(cli);
 }
 static void
 	pm_runtime_get_sync(dev->dev);
+	mutex_lock(&cli->mutex);
 	if (cli->abi16)
 		nouveau_abi16_fini(cli->abi16);
+	mutex_unlock(&cli->mutex);
 	mutex_lock(&drm->client.mutex);
 	list_del(&cli->head);

drivers/gpu/drm/nouveau/nouveau_platform.c+16−0

@@ -92,6 +92,8 @@ static int nouveau_platform_power_down(struct nouveau_platform_gpu *gpu) · 91 unmodified lines
92	return 0;	92	return 0;
93	}	93	}
94		94
		95	#if IS_ENABLED(CONFIG_IOMMU_API)
		96
95	static void nouveau_platform_probe_iommu(struct device *dev,	97	static void nouveau_platform_probe_iommu(struct device *dev,
96	struct nouveau_platform_gpu *gpu)	98	struct nouveau_platform_gpu *gpu)
97	{	99	{
@@ -158,6 +160,20 @@ static void nouveau_platform_remove_iommu(struct device *dev, · 60 unmodified lines
158	}	160	}
159	}	161	}
160		162
		163	#else
		164
		165	static void nouveau_platform_probe_iommu(struct device *dev,
		166	struct nouveau_platform_gpu *gpu)
		167	{
		168	}
		169
		170	static void nouveau_platform_remove_iommu(struct device *dev,
		171	struct nouveau_platform_gpu *gpu)
		172	{
		173	}
		174
		175	#endif
		176
161	static int nouveau_platform_probe(struct platform_device *pdev)	177	static int nouveau_platform_probe(struct platform_device *pdev)
162	{	178	{
163	struct nouveau_platform_gpu *gpu;	179	struct nouveau_platform_gpu *gpu;

drivers/gpu/drm/nouveau/nouveau_ttm.c+9−0

 	node->page_shift = 12;
 	switch (drm->device.info.family) {
+	case NV_DEVICE_INFO_V0_TNT:
+	case NV_DEVICE_INFO_V0_CELSIUS:
+	case NV_DEVICE_INFO_V0_KELVIN:
+	case NV_DEVICE_INFO_V0_RANKINE:
+	case NV_DEVICE_INFO_V0_CURIE:
+		break;
 	case NV_DEVICE_INFO_V0_TESLA:
 		if (drm->device.info.chipset != 0x50)
 			node->memtype = (nvbo->tile_flags & 0x7f00) >> 8;
 		break;
 	case NV_DEVICE_INFO_V0_FERMI:
 	case NV_DEVICE_INFO_V0_KEPLER:
+	case NV_DEVICE_INFO_V0_MAXWELL:
 		node->memtype = (nvbo->tile_flags & 0xff00) >> 8;
 		break;
 	default:
+		NV_WARN(drm, "%s: unhandled family type %x\n", __func__,
+			drm->device.info.family);
 		break;
 	}

drivers/gpu/drm/nouveau/nv04_fbcon.c+1−1

@@ -203,7 +203,7 @@ nv04_fbcon_accel_init(struct fb_info *info) · 202 unmodified lines
203	if (ret)	203	if (ret)
204	return ret;	204	return ret;
205		205
206	if (RING_SPACE(chan, 49)) {	206	if (RING_SPACE(chan, 49 + (device->info.chipset >= 0x11 ? 4 : 0))) {
207	nouveau_fbcon_gpu_lockup(info);	207	nouveau_fbcon_gpu_lockup(info);
208	return 0;	208	return 0;
209	}	209	}

drivers/gpu/drm/nouveau/nv50_display.c+1−1

@@ -979,7 +979,7 @@ nv50_crtc_cursor_show_hide(struct nouveau_crtc *nv_crtc, bool show, bool update) · 978 unmodified lines
979	{	979	{
980	struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);	980	struct nv50_mast *mast = nv50_mast(nv_crtc->base.dev);
981		981
982	if (show && nv_crtc->cursor.nvbo)	982	if (show && nv_crtc->cursor.nvbo && nv_crtc->base.enabled)
983	nv50_crtc_cursor_show(nv_crtc);	983	nv50_crtc_cursor_show(nv_crtc);
984	else	984	else
985	nv50_crtc_cursor_hide(nv_crtc);	985	nv50_crtc_cursor_hide(nv_crtc);

drivers/gpu/drm/nouveau/nv50_fbcon.c+2−1

 	if (ret)
 		return ret;
-	ret = RING_SPACE(chan, 59);
+	ret = RING_SPACE(chan, 58);
 	if (ret) {
 		nouveau_fbcon_gpu_lockup(info);
 		return ret;
 	OUT_RING(chan, info->var.yres_virtual);
 	OUT_RING(chan, upper_32_bits(fb->vma.offset));
 	OUT_RING(chan, lower_32_bits(fb->vma.offset));
+	FIRE_RING(chan);
 	return 0;
 }

drivers/gpu/drm/nouveau/nvc0_fbcon.c+1−1

@@ -188,7 +188,7 @@ nvc0_fbcon_accel_init(struct fb_info *info) · 187 unmodified lines
188	return -EINVAL;	188	return -EINVAL;
189	}	189	}
190		190
191	ret = RING_SPACE(chan, 60);	191	ret = RING_SPACE(chan, 58);
192	if (ret) {	192	if (ret) {
193	WARN_ON(1);	193	WARN_ON(1);
194	nouveau_fbcon_gpu_lockup(info);	194	nouveau_fbcon_gpu_lockup(info);

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf110.c+1−1

@@ -809,7 +809,7 @@ exec_lookup(struct nv50_disp_priv *priv, int head, int or, u32 ctrl, · 808 unmodified lines
809	case 0x00000900: type = DCB_OUTPUT_DP; mask = 2; break;	809	case 0x00000900: type = DCB_OUTPUT_DP; mask = 2; break;
810	default:	810	default:
811	nv_error(priv, "unknown SOR mc 0x%08x\n", ctrl);	811	nv_error(priv, "unknown SOR mc 0x%08x\n", ctrl);
812	return 0x0000;	812	return NULL;
813	}	813	}
814	}	814	}
815		815

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c+38−1

@@ -663,6 +663,37 @@ gf100_gr_zbc_init(struct gf100_gr_priv *priv) · 662 unmodified lines
663	gf100_gr_zbc_clear_depth(priv, index);	663	gf100_gr_zbc_clear_depth(priv, index);
664	}	664	}
665		665
		666	/**
		667	* Wait until GR goes idle. GR is considered idle if it is disabled by the
		668	* MC (0x200) register, or GR is not busy and a context switch is not in
		669	* progress.
		670	*/
		671	int
		672	gf100_gr_wait_idle(struct gf100_gr_priv *priv)
		673	{
		674	unsigned long end_jiffies = jiffies + msecs_to_jiffies(2000);
		675	bool gr_enabled, ctxsw_active, gr_busy;
		676
		677	do {
		678	/*
		679	* required to make sure FIFO_ENGINE_STATUS (0x2640) is
		680	* up-to-date
		681	*/
		682	nv_rd32(priv, 0x400700);
		683
		684	gr_enabled = nv_rd32(priv, 0x200) & 0x1000;
		685	ctxsw_active = nv_rd32(priv, 0x2640) & 0x8000;
		686	gr_busy = nv_rd32(priv, 0x40060c) & 0x1;
		687
		688	if (!gr_enabled \|\| (!gr_busy && !ctxsw_active))
		689	return 0;
		690	} while (time_before(jiffies, end_jiffies));
		691
		692	nv_error(priv, "wait for idle timeout (en: %d, ctxsw: %d, busy: %d)\n",
		693	gr_enabled, ctxsw_active, gr_busy);
		694	return -EAGAIN;
		695	}
		696
666	void	697	void
667	gf100_gr_mmio(struct gf100_gr_priv priv, const struct gf100_gr_pack p)	698	gf100_gr_mmio(struct gf100_gr_priv priv, const struct gf100_gr_pack p)
668	{	699	{
@@ -699,7 +730,13 @@ gf100_gr_icmd(struct gf100_gr_priv priv, const struct gf100_gr_pack p) · 30 unmodified lines
699		730
700	while (addr < next) {	731	while (addr < next) {
701	nv_wr32(priv, 0x400200, addr);	732	nv_wr32(priv, 0x400200, addr);
702	nv_wait(priv, 0x400700, 0x00000002, 0x00000000);	733	/**
		734	* Wait for GR to go idle after submitting a
		735	* GO_IDLE bundle
		736	*/
		737	if ((addr & 0xffff) == 0xe100)
		738	gf100_gr_wait_idle(priv);
		739	nv_wait(priv, 0x400700, 0x00000004, 0x00000000);
703	addr += init->pitch;	740	addr += init->pitch;
704	}	741	}
705	}	742	}

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h+1−0

@@ -181,6 +181,7 @@ struct gf100_gr_oclass { · 180 unmodified lines
181	int ppc_nr;	181	int ppc_nr;
182	};	182	};
183		183
		184	int gf100_gr_wait_idle(struct gf100_gr_priv *);
184	void gf100_gr_mmio(struct gf100_gr_priv , const struct gf100_gr_pack );	185	void gf100_gr_mmio(struct gf100_gr_priv , const struct gf100_gr_pack );
185	void gf100_gr_icmd(struct gf100_gr_priv , const struct gf100_gr_pack );	186	void gf100_gr_icmd(struct gf100_gr_priv , const struct gf100_gr_pack );
186	void gf100_gr_mthd(struct gf100_gr_priv , const struct gf100_gr_pack );	187	void gf100_gr_mthd(struct gf100_gr_priv , const struct gf100_gr_pack );

drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c+8−6

 nvkm_perfctx_dtor(struct nvkm_object *object)
 {
 	struct nvkm_pm *ppm = (void *)object->engine;
+	struct nvkm_perfctx *ctx = (void *)object;
 	mutex_lock(&nv_subdev(ppm)->mutex);
-	nvkm_engctx_destroy(&ppm->context->base);
+	nvkm_engctx_destroy(&ctx->base);
-	ppm->context = NULL;
+	if (ppm->context == ctx)
+		ppm->context = NULL;
 	mutex_unlock(&nv_subdev(ppm)->mutex);
 }
 	mutex_lock(&nv_subdev(ppm)->mutex);
 	if (ppm->context == NULL)
 		ppm->context = ctx;
-	mutex_unlock(&nv_subdev(ppm)->mutex);
 	if (ctx != ppm->context)
-		return -EBUSY;
+		ret = -EBUSY;
+	mutex_unlock(&nv_subdev(ppm)->mutex);
-	return 0;
+	return ret;
 }
 struct nvkm_oclass

drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c+40−0

@@ -1284,6 +1284,44 @@ init_zm_reg_sequence(struct nvbios_init *init) · 1283 unmodified lines
1284	}	1284	}
1285	}	1285	}
1286		1286
		1287	/**
		1288	* INIT_PLL_INDIRECT - opcode 0x59
		1289	*
		1290	*/
		1291	static void
		1292	init_pll_indirect(struct nvbios_init *init)
		1293	{
		1294	struct nvkm_bios *bios = init->bios;
		1295	u32 reg = nv_ro32(bios, init->offset + 1);
		1296	u16 addr = nv_ro16(bios, init->offset + 5);
		1297	u32 freq = (u32)nv_ro16(bios, addr) * 1000;
		1298
		1299	trace("PLL_INDIRECT\tR[0x%06x] =PLL= VBIOS[%04x] = %dkHz\n",
		1300	reg, addr, freq);
		1301	init->offset += 7;
		1302
		1303	init_prog_pll(init, reg, freq);
		1304	}
		1305
		1306	/**
		1307	* INIT_ZM_REG_INDIRECT - opcode 0x5a
		1308	*
		1309	*/
		1310	static void
		1311	init_zm_reg_indirect(struct nvbios_init *init)
		1312	{
		1313	struct nvkm_bios *bios = init->bios;
		1314	u32 reg = nv_ro32(bios, init->offset + 1);
		1315	u16 addr = nv_ro16(bios, init->offset + 5);
		1316	u32 data = nv_ro32(bios, addr);
		1317
		1318	trace("ZM_REG_INDIRECT\tR[0x%06x] = VBIOS[0x%04x] = 0x%08x\n",
		1319	reg, addr, data);
		1320	init->offset += 7;
		1321
		1322	init_wr32(init, addr, data);
		1323	}
		1324
1287	/**	1325	/**
1288	* INIT_SUB_DIRECT - opcode 0x5b	1326	* INIT_SUB_DIRECT - opcode 0x5b
1289	*	1327	*
@@ -2145,6 +2183,8 @@ static struct nvbios_init_opcode { · 855 unmodified lines
2145	[0x56] = { init_condition_time },	2183	[0x56] = { init_condition_time },
2146	[0x57] = { init_ltime },	2184	[0x57] = { init_ltime },
2147	[0x58] = { init_zm_reg_sequence },	2185	[0x58] = { init_zm_reg_sequence },
		2186	[0x59] = { init_pll_indirect },
		2187	[0x5a] = { init_zm_reg_indirect },
2148	[0x5b] = { init_sub_direct },	2188	[0x5b] = { init_sub_direct },
2149	[0x5c] = { init_jump },	2189	[0x5c] = { init_jump },
2150	[0x5e] = { init_i2c_if },	2190	[0x5e] = { init_i2c_if },

drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.c+2−1

@@ -180,7 +180,8 @@ gt215_clk_info(struct nvkm_clk *clock, int clk, u32 khz, · 179 unmodified lines
180	struct gt215_clk_info *info)	180	struct gt215_clk_info *info)
181	{	181	{
182	struct gt215_clk_priv priv = (void )clock;	182	struct gt215_clk_priv priv = (void )clock;
183	u32 oclk, sclk, sdiv, diff;	183	u32 oclk, sclk, sdiv;
		184	s32 diff;
184		185
185	info->clk = 0;	186	info->clk = 0;
186		187

drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c+8−0

@@ -38,6 +38,14 @@ gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv *priv) · 37 unmodified lines
38	nv_wr32(priv, 0x12004c, 0x4);	38	nv_wr32(priv, 0x12004c, 0x4);
39	nv_wr32(priv, 0x122204, 0x2);	39	nv_wr32(priv, 0x122204, 0x2);
40	nv_rd32(priv, 0x122204);	40	nv_rd32(priv, 0x122204);
		41
		42	/*
		43	* Bug: increase clock timeout to avoid operation failure at high
		44	* gpcclk rate.
		45	*/
		46	nv_wr32(priv, 0x122354, 0x800);
		47	nv_wr32(priv, 0x128328, 0x800);
		48	nv_wr32(priv, 0x124320, 0x800);
41	}	49	}
42		50
43	static void	51	static void

drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.c+8−0

 {
 	struct nv04_instmem_priv *priv = (void *)nvkm_instmem(object);
 	struct nv04_instobj_priv *node = (void *)object;
+	struct nvkm_subdev *subdev = (void *)priv;
+	mutex_lock(&subdev->mutex);
 	nvkm_mm_free(&priv->heap, &node->mem);
+	mutex_unlock(&subdev->mutex);
 	nvkm_instobj_destroy(&node->base);
 }
 	struct nv04_instmem_priv *priv = (void *)nvkm_instmem(parent);
 	struct nv04_instobj_priv *node;
 	struct nvkm_instobj_args *args = data;
+	struct nvkm_subdev *subdev = (void *)priv;
 	int ret;
 	if (!args->align)
 	if (ret)
 		return ret;
+	mutex_lock(&subdev->mutex);
 	ret = nvkm_mm_head(&priv->heap, 0, 1, args->size, args->size,
 			   args->align, &node->mem);
+	mutex_unlock(&subdev->mutex);
 	if (ret)
 		return ret;

drivers/gpu/drm/radeon/atombios_encoders.c+1−2

@@ -2299,8 +2299,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, · 2298 unmodified lines
2299	encoder_mode = atombios_get_encoder_mode(encoder);	2299	encoder_mode = atombios_get_encoder_mode(encoder);
2300	if (connector && (radeon_audio != 0) &&	2300	if (connector && (radeon_audio != 0) &&
2301	((encoder_mode == ATOM_ENCODER_MODE_HDMI) \|\|	2301	((encoder_mode == ATOM_ENCODER_MODE_HDMI) \|\|
2302	(ENCODER_MODE_IS_DP(encoder_mode) &&	2302	ENCODER_MODE_IS_DP(encoder_mode)))
2303	drm_detect_monitor_audio(radeon_connector_edid(connector)))))
2304	radeon_audio_mode_set(encoder, adjusted_mode);	2303	radeon_audio_mode_set(encoder, adjusted_mode);
2305	}	2304	}
2306		2305

drivers/gpu/drm/radeon/dce6_afmt.c+28−34

@@ -93,30 +93,26 @@ void dce6_afmt_select_pin(struct drm_encoder *encoder) · 92 unmodified lines
93	struct radeon_device *rdev = encoder->dev->dev_private;	93	struct radeon_device *rdev = encoder->dev->dev_private;
94	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	94	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
95	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;	95	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
96	u32 offset;
97		96
98	if (!dig \|\| !dig->afmt \|\| !dig->afmt->pin)	97	if (!dig \|\| !dig->afmt \|\| !dig->pin)
99	return;	98	return;
100		99
101	offset = dig->afmt->offset;	100	WREG32(AFMT_AUDIO_SRC_CONTROL + dig->afmt->offset,
102		101	AFMT_AUDIO_SRC_SELECT(dig->pin->id));
103	WREG32(AFMT_AUDIO_SRC_CONTROL + offset,
104	AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id));
105	}	102	}
106		103
107	void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,	104	void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
108	struct drm_connector connector, struct drm_display_mode mode)	105	struct drm_connector *connector,
		106	struct drm_display_mode *mode)
109	{	107	{
110	struct radeon_device *rdev = encoder->dev->dev_private;	108	struct radeon_device *rdev = encoder->dev->dev_private;
111	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	109	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
112	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;	110	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
113	u32 tmp = 0, offset;	111	u32 tmp = 0;
114		112
115	if (!dig \|\| !dig->afmt \|\| !dig->afmt->pin)	113	if (!dig \|\| !dig->afmt \|\| !dig->pin)
116	return;	114	return;
117		115
118	offset = dig->afmt->pin->offset;
119
120	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {	116	if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
121	if (connector->latency_present[1])	117	if (connector->latency_present[1])
122	tmp = VIDEO_LIPSYNC(connector->video_latency[1]) \|	118	tmp = VIDEO_LIPSYNC(connector->video_latency[1]) \|
@@ -130,24 +126,24 @@ void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, · 7 unmodified lines
130	else	126	else
131	tmp = VIDEO_LIPSYNC(0) \| AUDIO_LIPSYNC(0);	127	tmp = VIDEO_LIPSYNC(0) \| AUDIO_LIPSYNC(0);
132	}	128	}
133	WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp);	129	WREG32_ENDPOINT(dig->pin->offset,
		130	AZ_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp);
134	}	131	}
135		132
136	void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,	133	void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
137	u8 *sadb, int sad_count)	134	u8 *sadb, int sad_count)
138	{	135	{
139	struct radeon_device *rdev = encoder->dev->dev_private;	136	struct radeon_device *rdev = encoder->dev->dev_private;
140	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	137	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
141	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;	138	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
142	u32 offset, tmp;	139	u32 tmp;
143		140
144	if (!dig \|\| !dig->afmt \|\| !dig->afmt->pin)	141	if (!dig \|\| !dig->afmt \|\| !dig->pin)
145	return;	142	return;
146		143
147	offset = dig->afmt->pin->offset;
148
149	/* program the speaker allocation */	144	/* program the speaker allocation */
150	tmp = RREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER);	145	tmp = RREG32_ENDPOINT(dig->pin->offset,
		146	AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER);
151	tmp &= ~(DP_CONNECTION \| SPEAKER_ALLOCATION_MASK);	147	tmp &= ~(DP_CONNECTION \| SPEAKER_ALLOCATION_MASK);
152	/* set HDMI mode */	148	/* set HDMI mode */
153	tmp \|= HDMI_CONNECTION;	149	tmp \|= HDMI_CONNECTION;
@@ -155,24 +151,24 @@ void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, · 1 unmodified line
155	tmp \|= SPEAKER_ALLOCATION(sadb[0]);	151	tmp \|= SPEAKER_ALLOCATION(sadb[0]);
156	else	152	else
157	tmp \|= SPEAKER_ALLOCATION(5); /* stereo */	153	tmp \|= SPEAKER_ALLOCATION(5); /* stereo */
158	WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp);	154	WREG32_ENDPOINT(dig->pin->offset,
		155	AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp);
159	}	156	}
160		157
161	void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,	158	void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
162	u8 *sadb, int sad_count)	159	u8 *sadb, int sad_count)
163	{	160	{
164	struct radeon_device *rdev = encoder->dev->dev_private;	161	struct radeon_device *rdev = encoder->dev->dev_private;
165	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	162	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
166	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;	163	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
167	u32 offset, tmp;	164	u32 tmp;
168		165
169	if (!dig \|\| !dig->afmt \|\| !dig->afmt->pin)	166	if (!dig \|\| !dig->afmt \|\| !dig->pin)
170	return;	167	return;
171		168
172	offset = dig->afmt->pin->offset;
173
174	/* program the speaker allocation */	169	/* program the speaker allocation */
175	tmp = RREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER);	170	tmp = RREG32_ENDPOINT(dig->pin->offset,
		171	AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER);
176	tmp &= ~(HDMI_CONNECTION \| SPEAKER_ALLOCATION_MASK);	172	tmp &= ~(HDMI_CONNECTION \| SPEAKER_ALLOCATION_MASK);
177	/* set DP mode */	173	/* set DP mode */
178	tmp \|= DP_CONNECTION;	174	tmp \|= DP_CONNECTION;
@@ -180,13 +176,13 @@ void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, · 1 unmodified line
180	tmp \|= SPEAKER_ALLOCATION(sadb[0]);	176	tmp \|= SPEAKER_ALLOCATION(sadb[0]);
181	else	177	else
182	tmp \|= SPEAKER_ALLOCATION(5); /* stereo */	178	tmp \|= SPEAKER_ALLOCATION(5); /* stereo */
183	WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp);	179	WREG32_ENDPOINT(dig->pin->offset,
		180	AZ_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER, tmp);
184	}	181	}
185		182
186	void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,	183	void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
187	struct cea_sad *sads, int sad_count)	184	struct cea_sad *sads, int sad_count)
188	{	185	{
189	u32 offset;
190	int i;	186	int i;
191	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	187	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
192	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;	188	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
@@ -206,11 +202,9 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, · 13 unmodified lines
206	{ AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO },	202	{ AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO },
207	};	203	};
208		204
209	if (!dig \|\| !dig->afmt \|\| !dig->afmt->pin)	205	if (!dig \|\| !dig->afmt \|\| !dig->pin)
210	return;	206	return;
211		207
212	offset = dig->afmt->pin->offset;
213
214	for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) {	208	for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) {
215	u32 value = 0;	209	u32 value = 0;
216	u8 stereo_freqs = 0;	210	u8 stereo_freqs = 0;
@@ -237,7 +231,7 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, · 20 unmodified lines
237		231
238	value \|= SUPPORTED_FREQUENCIES_STEREO(stereo_freqs);	232	value \|= SUPPORTED_FREQUENCIES_STEREO(stereo_freqs);
239		233
240	WREG32_ENDPOINT(offset, eld_reg_to_type[i][0], value);	234	WREG32_ENDPOINT(dig->pin->offset, eld_reg_to_type[i][0], value);
241	}	235	}
242	}	236	}
243		237
@@ -253,7 +247,7 @@ void dce6_audio_enable(struct radeon_device *rdev, · 9 unmodified lines
253	}	247	}
254		248
255	void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,	249	void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
256	struct radeon_crtc *crtc, unsigned int clock)	250	struct radeon_crtc *crtc, unsigned int clock)
257	{	251	{
258	/* Two dtos; generally use dto0 for HDMI */	252	/* Two dtos; generally use dto0 for HDMI */
259	u32 value = 0;	253	u32 value = 0;
@@ -272,7 +266,7 @@ void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, · 12 unmodified lines
272	}	266	}
273		267
274	void dce6_dp_audio_set_dto(struct radeon_device *rdev,	268	void dce6_dp_audio_set_dto(struct radeon_device *rdev,
275	struct radeon_crtc *crtc, unsigned int clock)	269	struct radeon_crtc *crtc, unsigned int clock)
276	{	270	{
277	/* Two dtos; generally use dto1 for DP */	271	/* Two dtos; generally use dto1 for DP */
278	u32 value = 0;	272	u32 value = 0;

drivers/gpu/drm/radeon/radeon_audio.c+97−107

 static void radeon_audio_enable(struct radeon_device *rdev,
 				struct r600_audio_pin *pin, u8 enable_mask)
 {
+	struct drm_encoder *encoder;
+	struct radeon_encoder *radeon_encoder;
+	struct radeon_encoder_atom_dig *dig;
+	int pin_count = 0;
+	if (!pin)
+		return;
+	if (rdev->mode_info.mode_config_initialized) {
+		list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) {
+			if (radeon_encoder_is_digital(encoder)) {
+				radeon_encoder = to_radeon_encoder(encoder);
+				dig = radeon_encoder->enc_priv;
+				if (dig->pin == pin)
+					pin_count++;
+			}
+		}
+		if ((pin_count > 1) && (enable_mask == 0))
+			return;
+	}
 	if (rdev->audio.funcs->enable)
 		rdev->audio.funcs->enable(rdev, pin, enable_mask);
 }
 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
 {
-	struct radeon_encoder *radeon_encoder;
+	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
-	struct drm_connector *connector;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-	struct radeon_connector *radeon_connector = NULL;
 	struct cea_sad *sads;
 	int sad_count;
-	list_for_each_entry(connector,
+	if (!connector)
-		&encoder->dev->mode_config.connector_list, head) {
-		if (connector->encoder == encoder) {
-			radeon_connector = to_radeon_connector(connector);
-			break;
-		}
-	}
-	if (!radeon_connector) {
-		DRM_ERROR("Couldn't find encoder's connector\n");
 		return;
-	}
 	sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
 	if (sad_count <= 0) {
 	}
 	BUG_ON(!sads);
-	radeon_encoder = to_radeon_encoder(encoder);
 	if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
 		radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
 {
+	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-	struct drm_connector *connector;
-	struct radeon_connector *radeon_connector = NULL;
 	u8 *sadb = NULL;
 	int sad_count;
-	list_for_each_entry(connector,
+	if (!connector)
-			    &encoder->dev->mode_config.connector_list, head) {
-		if (connector->encoder == encoder) {
-			radeon_connector = to_radeon_connector(connector);
-			break;
-		}
-	}
-	if (!radeon_connector) {
-		DRM_ERROR("Couldn't find encoder's connector\n");
 		return;
-	}
-	sad_count = drm_edid_to_speaker_allocation(
+	sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector),
-		radeon_connector_edid(connector), &sadb);
+						   &sadb);
 	if (sad_count < 0) {
 		DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
 			  sad_count);
 }
 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
-	struct drm_display_mode *mode)
+					      struct drm_display_mode *mode)
 {
-	struct radeon_encoder *radeon_encoder;
+	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
-	struct drm_connector *connector;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
-	struct radeon_connector *radeon_connector = 0;
-	list_for_each_entry(connector,
-		&encoder->dev->mode_config.connector_list, head) {
-		if (connector->encoder == encoder) {
-			radeon_connector = to_radeon_connector(connector);
-			break;
-		}
-	}
-	if (!radeon_connector) {
+	if (!connector)
-		DRM_ERROR("Couldn't find encoder's connector\n");
 		return;
-	}
-	radeon_encoder = to_radeon_encoder(encoder);
 	if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
 		radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
 }
 void radeon_audio_detect(struct drm_connector *connector,
+			 struct drm_encoder *encoder,
 			 enum drm_connector_status status)
 {
-	struct radeon_device *rdev;
+	struct drm_device *dev = connector->dev;
-	struct radeon_encoder *radeon_encoder;
+	struct radeon_device *rdev = dev->dev_private;
+	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 	struct radeon_encoder_atom_dig *dig;
-	if (!connector || !connector->encoder)
+	if (!radeon_audio_chipset_supported(rdev))
 		return;
-	rdev = connector->encoder->dev->dev_private;
+	if (!radeon_encoder_is_digital(encoder))
-	if (!radeon_audio_chipset_supported(rdev))
 		return;
-	radeon_encoder = to_radeon_encoder(connector->encoder);
 	dig = radeon_encoder->enc_priv;
 	if (status == connector_status_connected) {
-		if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
-			radeon_encoder->audio = NULL;
-			return;
-		}
 		if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
 			struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 			radeon_encoder->audio = rdev->audio.hdmi_funcs;
 		}
-		dig->afmt->pin = radeon_audio_get_pin(connector->encoder);
+		if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
-		radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
+			if (!dig->pin)
+				dig->pin = radeon_audio_get_pin(encoder);
+			radeon_audio_enable(rdev, dig->pin, 0xf);
+		} else {
+			radeon_audio_enable(rdev, dig->pin, 0);
+			dig->pin = NULL;
+		}
 	} else {
-		radeon_audio_enable(rdev, dig->afmt->pin, 0);
+		radeon_audio_enable(rdev, dig->pin, 0);
-		dig->afmt->pin = NULL;
+		dig->pin = NULL;
 	}
 }
 }
 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
-	struct drm_display_mode *mode)
+				       struct drm_display_mode *mode)
 {
 	struct radeon_device *rdev = encoder->dev->dev_private;
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
-	struct drm_connector *connector;
+	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
-	struct radeon_connector *radeon_connector = NULL;
 	u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
 	struct hdmi_avi_infoframe frame;
 	int err;
-	list_for_each_entry(connector,
+	if (!connector)
-		&encoder->dev->mode_config.connector_list, head) {
+		return -EINVAL;
-		if (connector->encoder == encoder) {
-			radeon_connector = to_radeon_connector(connector);
-			break;
-		}
-	}
-	if (!radeon_connector) {
-		DRM_ERROR("Couldn't find encoder's connector\n");
-		return -ENOENT;
-	}
 	err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
 	if (err < 0) {
 		return err;
 	}
-	if (dig && dig->afmt &&
+	if (dig && dig->afmt && radeon_encoder->audio &&
-		radeon_encoder->audio && radeon_encoder->audio->set_avi_packet)
+	    radeon_encoder->audio->set_avi_packet)
 		radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
 			buffer, sizeof(buffer));
 {
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
 	if (!dig || !dig->afmt)
 		return;
-	radeon_audio_set_mute(encoder, true);
+	if (!connector)
+		return;
-	radeon_audio_write_speaker_allocation(encoder);
+	if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
-	radeon_audio_write_sad_regs(encoder);
+		radeon_audio_set_mute(encoder, true);
-	radeon_audio_write_latency_fields(encoder, mode);
-	radeon_audio_set_dto(encoder, mode->clock);
-	radeon_audio_set_vbi_packet(encoder);
-	radeon_hdmi_set_color_depth(encoder);
-	radeon_audio_update_acr(encoder, mode->clock);
-	radeon_audio_set_audio_packet(encoder);
-	radeon_audio_select_pin(encoder);
-	if (radeon_audio_set_avi_packet(encoder, mode) < 0)
+		radeon_audio_write_speaker_allocation(encoder);
-		return;
+		radeon_audio_write_sad_regs(encoder);
+		radeon_audio_write_latency_fields(encoder, mode);
+		radeon_audio_set_dto(encoder, mode->clock);
+		radeon_audio_set_vbi_packet(encoder);
+		radeon_hdmi_set_color_depth(encoder);
+		radeon_audio_update_acr(encoder, mode->clock);
+		radeon_audio_set_audio_packet(encoder);
+		radeon_audio_select_pin(encoder);
+		if (radeon_audio_set_avi_packet(encoder, mode) < 0)
+			return;
-	radeon_audio_set_mute(encoder, false);
+		radeon_audio_set_mute(encoder, false);
+	} else {
+		radeon_hdmi_set_color_depth(encoder);
+		if (radeon_audio_set_avi_packet(encoder, mode) < 0)
+			return;
+	}
 }
 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
-	struct drm_display_mode *mode)
+				     struct drm_display_mode *mode)
 {
 	struct drm_device *dev = encoder->dev;
 	struct radeon_device *rdev = dev->dev_private;
 	if (!dig || !dig->afmt)
 		return;
-	radeon_audio_write_speaker_allocation(encoder);
+	if (!connector)
-	radeon_audio_write_sad_regs(encoder);
-	radeon_audio_write_latency_fields(encoder, mode);
-	if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev))
-		radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
-	else
-		radeon_audio_set_dto(encoder, dig_connector->dp_clock);
-	radeon_audio_set_audio_packet(encoder);
-	radeon_audio_select_pin(encoder);
-	if (radeon_audio_set_avi_packet(encoder, mode) < 0)
 		return;
+	if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
+		radeon_audio_write_speaker_allocation(encoder);
+		radeon_audio_write_sad_regs(encoder);
+		radeon_audio_write_latency_fields(encoder, mode);
+		if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev))
+			radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
+		else
+			radeon_audio_set_dto(encoder, dig_connector->dp_clock);
+		radeon_audio_set_audio_packet(encoder);
+		radeon_audio_select_pin(encoder);
+		if (radeon_audio_set_avi_packet(encoder, mode) < 0)
+			return;
+	}
 }
 void radeon_audio_mode_set(struct drm_encoder *encoder,
-	struct drm_display_mode *mode)
+			   struct drm_display_mode *mode)
 {
 	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);

drivers/gpu/drm/radeon/radeon_audio.h+2−1

@@ -68,7 +68,8 @@ struct radeon_audio_funcs · 67 unmodified lines
68		68
69	int radeon_audio_init(struct radeon_device *rdev);	69	int radeon_audio_init(struct radeon_device *rdev);
70	void radeon_audio_detect(struct drm_connector *connector,	70	void radeon_audio_detect(struct drm_connector *connector,
71	enum drm_connector_status status);	71	struct drm_encoder *encoder,
		72	enum drm_connector_status status);
72	u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev,	73	u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev,
73	u32 offset, u32 reg);	74	u32 offset, u32 reg);
74	void radeon_audio_endpoint_wreg(struct radeon_device *rdev,	75	void radeon_audio_endpoint_wreg(struct radeon_device *rdev,

drivers/gpu/drm/radeon/radeon_combios.c+6−1

 			if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) &&
 			    (RBIOS16(tmp + 2) == lvds->native_mode.vdisplay)) {
+				u32 hss = (RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - 1) * 8;
+				if (hss > lvds->native_mode.hdisplay)
+					hss = (10 - 1) * 8;
 				lvds->native_mode.htotal = lvds->native_mode.hdisplay +
 					(RBIOS16(tmp + 17) - RBIOS16(tmp + 19)) * 8;
 				lvds->native_mode.hsync_start = lvds->native_mode.hdisplay +
-					(RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - 1) * 8;
+					hss;
 				lvds->native_mode.hsync_end = lvds->native_mode.hsync_start +
 					(RBIOS8(tmp + 23) * 8);

drivers/gpu/drm/radeon/radeon_connectors.c+14−4

 	/* updated in get modes as well since we need to know if it's analog or digital */
 	radeon_connector_update_scratch_regs(connector, ret);
-	if (radeon_audio != 0)
+	if ((radeon_audio != 0) && radeon_connector->use_digital) {
-		radeon_audio_detect(connector, ret);
+		const struct drm_connector_helper_funcs *connector_funcs =
+			connector->helper_private;
+		encoder = connector_funcs->best_encoder(connector);
+		if (encoder && (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)) {
+			radeon_connector_get_edid(connector);
+			radeon_audio_detect(connector, encoder, ret);
+		}
+	}
 exit:
 	pm_runtime_mark_last_busy(connector->dev->dev);
 	radeon_connector_update_scratch_regs(connector, ret);
-	if (radeon_audio != 0)
+	if ((radeon_audio != 0) && encoder) {
-		radeon_audio_detect(connector, ret);
+		radeon_connector_get_edid(connector);
+		radeon_audio_detect(connector, encoder, ret);
+	}
 out:
 	pm_runtime_mark_last_busy(connector->dev->dev);

drivers/gpu/drm/radeon/radeon_mode.h+1−1

 	int offset;
 	bool last_buffer_filled_status;
 	int id;
-	struct r600_audio_pin *pin;
 };
 struct radeon_mode_info {
 	uint8_t backlight_level;
 	int panel_mode;
 	struct radeon_afmt *afmt;
+	struct r600_audio_pin *pin;
 	int active_mst_links;
 };

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c+2−2

 	ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes,
 				     true, NULL);
 	if (unlikely(ret != 0))
-		goto out_err;
+		goto out_err_nores;
 	ret = vmw_validate_buffers(dev_priv, sw_context);
 	if (unlikely(ret != 0))
 	vmw_resource_relocations_free(&sw_context->res_relocations);
 	vmw_fifo_commit(dev_priv, command_size);
+	mutex_unlock(&dev_priv->binding_mutex);
 	vmw_query_bo_switch_commit(dev_priv, sw_context);
 	ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
 		DRM_ERROR("Fence submission error. Syncing.\n");
 	vmw_resource_list_unreserve(&sw_context->resource_list, false);
-	mutex_unlock(&dev_priv->binding_mutex);
 	ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
 				    (void *) fence);

drivers/hid/hid-apple.c+6−0

 		.driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_JIS),
 		.driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI),
+		.driver_data = APPLE_HAS_FN },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ISO),
+		.driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_JIS),
+		.driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI),
 		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO),

drivers/hid/hid-core.c+6−0

 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ISO) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_JIS) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ISO) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_JIS) },
 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI) },
 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO) },
 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_ISO) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING8_JIS) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_ISO) },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING9_JIS) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) },
 	{ }

drivers/hid/hid-ids.h+3−0

 #define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI	0x0290
 #define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO	0x0291
 #define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS	0x0292
+#define USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI	0x0272
+#define USB_DEVICE_ID_APPLE_WELLSPRING9_ISO		0x0273
+#define USB_DEVICE_ID_APPLE_WELLSPRING9_JIS		0x0274
 #define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY	0x030a
 #define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY	0x030b
 #define USB_DEVICE_ID_APPLE_IRCONTROL	0x8240

drivers/hid/hid-input.c+5−2

 static void hidinput_cleanup_battery(struct hid_device *dev)
 {
+	const struct power_supply_desc *psy_desc;
 	if (!dev->battery)
 		return;
+	psy_desc = dev->battery->desc;
 	power_supply_unregister(dev->battery);
-	kfree(dev->battery->desc->name);
+	kfree(psy_desc->name);
-	kfree(dev->battery->desc);
+	kfree(psy_desc);
 	dev->battery = NULL;
 }
 #else  /* !CONFIG_HID_BATTERY_STRENGTH */

drivers/hid/hid-uclogic.c+1−1

@@ -858,7 +858,7 @@ static int uclogic_tablet_enable(struct hid_device *hdev) · 857 unmodified lines
858	for (p = drvdata->rdesc;	858	for (p = drvdata->rdesc;
859	p <= drvdata->rdesc + drvdata->rsize - 4;) {	859	p <= drvdata->rdesc + drvdata->rsize - 4;) {
860	if (p[0] == 0xFE && p[1] == 0xED && p[2] == 0x1D &&	860	if (p[0] == 0xFE && p[1] == 0xED && p[2] == 0x1D &&
861	p[3] < sizeof(params)) {	861	p[3] < ARRAY_SIZE(params)) {
862	v = params[p[3]];	862	v = params[p[3]];
863	put_unaligned(cpu_to_le32(v), (s32 *)p);	863	put_unaligned(cpu_to_le32(v), (s32 *)p);
864	p += 4;	864	p += 4;

drivers/hid/wacom_sys.c+37−33

 	return error;
 }
+/*
+ * Not all devices report physical dimensions from HID.
+ * Compute the default from hardcoded logical dimension
+ * and resolution before driver overwrites them.
+ */
+static void wacom_set_default_phy(struct wacom_features *features)
+{
+	if (features->x_resolution) {
+		features->x_phy = (features->x_max * 100) /
+					features->x_resolution;
+		features->y_phy = (features->y_max * 100) /
+					features->y_resolution;
+	}
+}
+static void wacom_calculate_res(struct wacom_features *features)
+{
+	/* set unit to "100th of a mm" for devices not reported by HID */
+	if (!features->unit) {
+		features->unit = 0x11;
+		features->unitExpo = -3;
+	}
+	features->x_resolution = wacom_calc_hid_res(features->x_max,
+						    features->x_phy,
+						    features->unit,
+						    features->unitExpo);
+	features->y_resolution = wacom_calc_hid_res(features->y_max,
+						    features->y_phy,
+						    features->unit,
+						    features->unitExpo);
+}
 static void wacom_wireless_work(struct work_struct *work)
 {
 	struct wacom *wacom = container_of(work, struct wacom, work);
 		if (wacom_wac1->features.type != INTUOSHT &&
 		    wacom_wac1->features.type != BAMBOO_PT)
 			wacom_wac1->features.device_type |= WACOM_DEVICETYPE_PAD;
+		wacom_set_default_phy(&wacom_wac1->features);
+		wacom_calculate_res(&wacom_wac1->features);
 		snprintf(wacom_wac1->pen_name, WACOM_NAME_MAX, "%s (WL) Pen",
 			 wacom_wac1->features.name);
 		snprintf(wacom_wac1->pad_name, WACOM_NAME_MAX, "%s (WL) Pad",
 			wacom_wac2->features =
 				*((struct wacom_features *)id->driver_data);
 			wacom_wac2->features.pktlen = WACOM_PKGLEN_BBTOUCH3;
+			wacom_set_default_phy(&wacom_wac2->features);
 			wacom_wac2->features.x_max = wacom_wac2->features.y_max = 4096;
+			wacom_calculate_res(&wacom_wac2->features);
 			snprintf(wacom_wac2->touch_name, WACOM_NAME_MAX,
 				 "%s (WL) Finger",wacom_wac2->features.name);
 			snprintf(wacom_wac2->pad_name, WACOM_NAME_MAX,
 	}
 }
-/*
- * Not all devices report physical dimensions from HID.
- * Compute the default from hardcoded logical dimension
- * and resolution before driver overwrites them.
- */
-static void wacom_set_default_phy(struct wacom_features *features)
-{
-	if (features->x_resolution) {
-		features->x_phy = (features->x_max * 100) /
-					features->x_resolution;
-		features->y_phy = (features->y_max * 100) /
-					features->y_resolution;
-	}
-}
-static void wacom_calculate_res(struct wacom_features *features)
-{
-	/* set unit to "100th of a mm" for devices not reported by HID */
-	if (!features->unit) {
-		features->unit = 0x11;
-		features->unitExpo = -3;
-	}
-	features->x_resolution = wacom_calc_hid_res(features->x_max,
-						    features->x_phy,
-						    features->unit,
-						    features->unitExpo);
-	features->y_resolution = wacom_calc_hid_res(features->y_max,
-						    features->y_phy,
-						    features->unit,
-						    features->unitExpo);
-}
 static size_t wacom_compute_pktlen(struct hid_device *hdev)
 {
 	struct hid_report_enum *report_enum;

drivers/hwmon/dell-smm-hwmon.c+17−1

@@ -929,6 +929,21 @@ static struct dmi_system_id i8k_dmi_table[] __initdata = { · 928 unmodified lines
929		929
930	MODULE_DEVICE_TABLE(dmi, i8k_dmi_table);	930	MODULE_DEVICE_TABLE(dmi, i8k_dmi_table);
931		931
		932	static struct dmi_system_id i8k_blacklist_dmi_table[] __initdata = {
		933	{
		934	/*
		935	* CPU fan speed going up and down on Dell Studio XPS 8100
		936	* for unknown reasons.
		937	*/
		938	.ident = "Dell Studio XPS 8100",
		939	.matches = {
		940	DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
		941	DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Studio XPS 8100"),
		942	},
		943	},
		944	{ }
		945	};
		946
932	/*	947	/*
933	* Probe for the presence of a supported laptop.	948	* Probe for the presence of a supported laptop.
934	*/	949	*/
@@ -940,7 +955,8 @@ static int __init i8k_probe(void) · 5 unmodified lines
940	/*	955	/*
941	* Get DMI information	956	* Get DMI information
942	*/	957	*/
943	if (!dmi_check_system(i8k_dmi_table)) {	958	if (!dmi_check_system(i8k_dmi_table) \|\|
		959	dmi_check_system(i8k_blacklist_dmi_table)) {
944	if (!ignore_dmi && !force)	960	if (!ignore_dmi && !force)
945	return -ENODEV;	961	return -ENODEV;
946		962

drivers/hwmon/g762.c+1−0

@@ -582,6 +582,7 @@ static const struct of_device_id g762_dt_match[] = { · 581 unmodified lines
582	{ .compatible = "gmt,g763" },	582	{ .compatible = "gmt,g763" },
583	{ },	583	{ },
584	};	584	};
		585	MODULE_DEVICE_TABLE(of, g762_dt_match);
585		586
586	/*	587	/*
587	* Grab clock (a required property), enable it, get (fixed) clock frequency	588	* Grab clock (a required property), enable it, get (fixed) clock frequency

drivers/hwmon/nct7802.c+1−1

@@ -195,7 +195,7 @@ abort: · 194 unmodified lines
195	}	195	}
196		196
197	static int nct7802_write_voltage(struct nct7802_data *data, int nr, int index,	197	static int nct7802_write_voltage(struct nct7802_data *data, int nr, int index,
198	unsigned int voltage)	198	unsigned long voltage)
199	{	199	{
200	int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr];	200	int shift = 8 - REG_VOLTAGE_LIMIT_MSB_SHIFT[index - 1][nr];
201	int err;	201	int err;

drivers/hwmon/nct7904.c+30−28

@@ -412,8 +412,9 @@ static ssize_t show_pwm(struct device *dev, · 411 unmodified lines
412	return sprintf(buf, "%d\n", val);	412	return sprintf(buf, "%d\n", val);
413	}	413	}
414		414
415	static ssize_t store_mode(struct device dev, struct device_attribute devattr,	415	static ssize_t store_enable(struct device *dev,
416	const char *buf, size_t count)	416	struct device_attribute *devattr,
		417	const char *buf, size_t count)
417	{	418	{
418	int index = to_sensor_dev_attr(devattr)->index;	419	int index = to_sensor_dev_attr(devattr)->index;
419	struct nct7904_data *data = dev_get_drvdata(dev);	420	struct nct7904_data *data = dev_get_drvdata(dev);
@@ -422,18 +423,18 @@ static ssize_t store_mode(struct device dev, struct device_attribute devattr, · 2 unmodified lines
422		423
423	if (kstrtoul(buf, 10, &val) < 0)	424	if (kstrtoul(buf, 10, &val) < 0)
424	return -EINVAL;	425	return -EINVAL;
425	if (val > 1 \|\| (val && !data->fan_mode[index]))	426	if (val < 1 \|\| val > 2 \|\| (val == 2 && !data->fan_mode[index]))
426	return -EINVAL;	427	return -EINVAL;
427		428
428	ret = nct7904_write_reg(data, BANK_3, FANCTL1_FMR_REG + index,	429	ret = nct7904_write_reg(data, BANK_3, FANCTL1_FMR_REG + index,
429	val ? data->fan_mode[index] : 0);	430	val == 2 ? data->fan_mode[index] : 0);
430		431
431	return ret ? ret : count;	432	return ret ? ret : count;
432	}	433	}
433		434
434	/* Return 0 for manual mode or 1 for SmartFan mode */	435	/* Return 1 for manual mode or 2 for SmartFan mode */
435	static ssize_t show_mode(struct device *dev,	436	static ssize_t show_enable(struct device *dev,
436	struct device_attribute devattr, char buf)	437	struct device_attribute devattr, char buf)
437	{	438	{
438	int index = to_sensor_dev_attr(devattr)->index;	439	int index = to_sensor_dev_attr(devattr)->index;
439	struct nct7904_data *data = dev_get_drvdata(dev);	440	struct nct7904_data *data = dev_get_drvdata(dev);
@@ -443,36 +444,36 @@ static ssize_t show_mode(struct device *dev, · 3 unmodified lines
443	if (val < 0)	444	if (val < 0)
444	return val;	445	return val;
445		446
446	return sprintf(buf, "%d\n", val ? 1 : 0);	447	return sprintf(buf, "%d\n", val ? 2 : 1);
447	}	448	}
448		449
449	/* 2 attributes per channel: pwm and mode */	450	/* 2 attributes per channel: pwm and mode */
450	static SENSOR_DEVICE_ATTR(fan1_pwm, S_IRUGO \| S_IWUSR,	451	static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO \| S_IWUSR,
451	show_pwm, store_pwm, 0);	452	show_pwm, store_pwm, 0);
452	static SENSOR_DEVICE_ATTR(fan1_mode, S_IRUGO \| S_IWUSR,	453	static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO \| S_IWUSR,
453	show_mode, store_mode, 0);	454	show_enable, store_enable, 0);
454	static SENSOR_DEVICE_ATTR(fan2_pwm, S_IRUGO \| S_IWUSR,	455	static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO \| S_IWUSR,
455	show_pwm, store_pwm, 1);	456	show_pwm, store_pwm, 1);
456	static SENSOR_DEVICE_ATTR(fan2_mode, S_IRUGO \| S_IWUSR,	457	static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO \| S_IWUSR,
457	show_mode, store_mode, 1);	458	show_enable, store_enable, 1);
458	static SENSOR_DEVICE_ATTR(fan3_pwm, S_IRUGO \| S_IWUSR,	459	static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO \| S_IWUSR,
459	show_pwm, store_pwm, 2);	460	show_pwm, store_pwm, 2);
460	static SENSOR_DEVICE_ATTR(fan3_mode, S_IRUGO \| S_IWUSR,	461	static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO \| S_IWUSR,
461	show_mode, store_mode, 2);	462	show_enable, store_enable, 2);
462	static SENSOR_DEVICE_ATTR(fan4_pwm, S_IRUGO \| S_IWUSR,	463	static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO \| S_IWUSR,
463	show_pwm, store_pwm, 3);	464	show_pwm, store_pwm, 3);
464	static SENSOR_DEVICE_ATTR(fan4_mode, S_IRUGO \| S_IWUSR,	465	static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO \| S_IWUSR,
465	show_mode, store_mode, 3);	466	show_enable, store_enable, 3);
466		467
467	static struct attribute *nct7904_fanctl_attrs[] = {	468	static struct attribute *nct7904_fanctl_attrs[] = {
468	&sensor_dev_attr_fan1_pwm.dev_attr.attr,	469	&sensor_dev_attr_pwm1.dev_attr.attr,
469	&sensor_dev_attr_fan1_mode.dev_attr.attr,	470	&sensor_dev_attr_pwm1_enable.dev_attr.attr,
470	&sensor_dev_attr_fan2_pwm.dev_attr.attr,	471	&sensor_dev_attr_pwm2.dev_attr.attr,
471	&sensor_dev_attr_fan2_mode.dev_attr.attr,	472	&sensor_dev_attr_pwm2_enable.dev_attr.attr,
472	&sensor_dev_attr_fan3_pwm.dev_attr.attr,	473	&sensor_dev_attr_pwm3.dev_attr.attr,
473	&sensor_dev_attr_fan3_mode.dev_attr.attr,	474	&sensor_dev_attr_pwm3_enable.dev_attr.attr,
474	&sensor_dev_attr_fan4_pwm.dev_attr.attr,	475	&sensor_dev_attr_pwm4.dev_attr.attr,
475	&sensor_dev_attr_fan4_mode.dev_attr.attr,	476	&sensor_dev_attr_pwm4_enable.dev_attr.attr,
476	NULL	477	NULL
477	};	478	};
478		479
@@ -574,6 +575,7 @@ static const struct i2c_device_id nct7904_id[] = { · 95 unmodified lines
574	{"nct7904", 0},	575	{"nct7904", 0},
575	{}	576	{}
576	};	577	};
		578	MODULE_DEVICE_TABLE(i2c, nct7904_id);
577		579
578	static struct i2c_driver nct7904_driver = {	580	static struct i2c_driver nct7904_driver = {
579	.class = I2C_CLASS_HWMON,	581	.class = I2C_CLASS_HWMON,

drivers/i2c/busses/i2c-bfin-twi.c+2−2

@@ -692,7 +692,7 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev) · 691 unmodified lines
692		692
693	platform_set_drvdata(pdev, iface);	693	platform_set_drvdata(pdev, iface);
694		694
695	dev_info(&pdev->dev, "Blackfin BF5xx on-chip I2C TWI Contoller, "	695	dev_info(&pdev->dev, "Blackfin BF5xx on-chip I2C TWI Controller, "
696	"regs_base@%p\n", iface->regs_base);	696	"regs_base@%p\n", iface->regs_base);
697		697
698	return 0;	698	return 0;
@@ -735,6 +735,6 @@ subsys_initcall(i2c_bfin_twi_init); · 36 unmodified lines
735	module_exit(i2c_bfin_twi_exit);	735	module_exit(i2c_bfin_twi_exit);
736		736
737	MODULE_AUTHOR("Bryan Wu, Sonic Zhang");	737	MODULE_AUTHOR("Bryan Wu, Sonic Zhang");
738	MODULE_DESCRIPTION("Blackfin BF5xx on-chip I2C TWI Contoller Driver");	738	MODULE_DESCRIPTION("Blackfin BF5xx on-chip I2C TWI Controller Driver");
739	MODULE_LICENSE("GPL");	739	MODULE_LICENSE("GPL");
740	MODULE_ALIAS("platform:i2c-bfin-twi");	740	MODULE_ALIAS("platform:i2c-bfin-twi");

drivers/i2c/busses/i2c-omap.c+11−0

 	u32 reg;
 	reg = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG);
+	/* enable test mode */
 	reg |= OMAP_I2C_SYSTEST_ST_EN;
+	/* select SDA/SCL IO mode */
+	reg |= 3 << OMAP_I2C_SYSTEST_TMODE_SHIFT;
+	/* set SCL to high-impedance state (reset value is 0) */
+	reg |= OMAP_I2C_SYSTEST_SCL_O;
+	/* set SDA to high-impedance state (reset value is 0) */
+	reg |= OMAP_I2C_SYSTEST_SDA_O;
 	omap_i2c_write_reg(dev, OMAP_I2C_SYSTEST_REG, reg);
 }
 	u32 reg;
 	reg = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG);
+	/* restore reset values */
 	reg &= ~OMAP_I2C_SYSTEST_ST_EN;
+	reg &= ~OMAP_I2C_SYSTEST_TMODE_MASK;
+	reg &= ~OMAP_I2C_SYSTEST_SCL_O;
+	reg &= ~OMAP_I2C_SYSTEST_SDA_O;
 	omap_i2c_write_reg(dev, OMAP_I2C_SYSTEST_REG, reg);
 }

drivers/i2c/i2c-core.c+17−7

 	if (bri->prepare_recovery)
 		bri->prepare_recovery(adap);
+	bri->set_scl(adap, val);
+	ndelay(RECOVERY_NDELAY);
 	/*
 	 * By this time SCL is high, as we need to give 9 falling-rising edges
 	 */
 int i2c_generic_scl_recovery(struct i2c_adapter *adap)
 {
-	adap->bus_recovery_info->set_scl(adap, 1);
 	return i2c_generic_recovery(adap);
 }
 EXPORT_SYMBOL_GPL(i2c_generic_scl_recovery);
 struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
 {
 	struct device *dev;
+	struct i2c_client *client;
-	dev = bus_find_device(&i2c_bus_type, NULL, node,
+	dev = bus_find_device(&i2c_bus_type, NULL, node, of_dev_node_match);
-					 of_dev_node_match);
 	if (!dev)
 		return NULL;
-	return i2c_verify_client(dev);
+	client = i2c_verify_client(dev);
+	if (!client)
+		put_device(dev);
+	return client;
 }
 EXPORT_SYMBOL(of_find_i2c_device_by_node);
 struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)
 {
 	struct device *dev;
+	struct i2c_adapter *adapter;
-	dev = bus_find_device(&i2c_bus_type, NULL, node,
+	dev = bus_find_device(&i2c_bus_type, NULL, node, of_dev_node_match);
-					 of_dev_node_match);
 	if (!dev)
 		return NULL;
-	return i2c_verify_adapter(dev);
+	adapter = i2c_verify_adapter(dev);
+	if (!adapter)
+		put_device(dev);
+	return adapter;
 }
 EXPORT_SYMBOL(of_find_i2c_adapter_by_node);
 #else

drivers/i2c/i2c-slave-eeprom.c+0−6

 	struct eeprom_data *eeprom;
 	unsigned long flags;
-	if (off + count > attr->size)
-		return -EFBIG;
 	eeprom = dev_get_drvdata(container_of(kobj, struct device, kobj));
 	spin_lock_irqsave(&eeprom->buffer_lock, flags);
 	struct eeprom_data *eeprom;
 	unsigned long flags;
-	if (off + count > attr->size)
-		return -EFBIG;
 	eeprom = dev_get_drvdata(container_of(kobj, struct device, kobj));
 	spin_lock_irqsave(&eeprom->buffer_lock, flags);

drivers/infiniband/hw/cxgb3/iwch_provider.c+4−0

 	/*
 	 * T3 only supports 32 bits of size.
 	 */
+	if (sizeof(phys_addr_t) > 4) {
+		pr_warn_once(MOD "Cannot support dma_mrs on this platform.\n");
+		return ERR_PTR(-ENOTSUPP);
+	}
 	bl.size = 0xffffffff;
 	bl.addr = 0;
 	kva = 0;

drivers/infiniband/hw/cxgb4/cq.c+1−1

@@ -814,7 +814,7 @@ static int c4iw_poll_cq_one(struct c4iw_cq chp, struct ib_wc wc) · 813 unmodified lines
814	printk(KERN_ERR MOD	814	printk(KERN_ERR MOD
815	"Unexpected cqe_status 0x%x for QPID=0x%0x\n",	815	"Unexpected cqe_status 0x%x for QPID=0x%0x\n",
816	CQE_STATUS(&cqe), CQE_QPID(&cqe));	816	CQE_STATUS(&cqe), CQE_QPID(&cqe));
817	ret = -EINVAL;	817	wc->status = IB_WC_FATAL_ERR;
818	}	818	}
819	}	819	}
820	out:	820	out:

drivers/infiniband/hw/ocrdma/ocrdma.h+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#ifndef __OCRDMA_H__	43	#ifndef __OCRDMA_H__
29	#define __OCRDMA_H__	44	#define __OCRDMA_H__

drivers/infiniband/hw/ocrdma/ocrdma_abi.h+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#ifndef __OCRDMA_ABI_H__	43	#ifndef __OCRDMA_ABI_H__
29	#define __OCRDMA_ABI_H__	44	#define __OCRDMA_ABI_H__

drivers/infiniband/hw/ocrdma/ocrdma_ah.c+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#include <net/neighbour.h>	43	#include <net/neighbour.h>
29	#include <net/netevent.h>	44	#include <net/netevent.h>

drivers/infiniband/hw/ocrdma/ocrdma_ah.h+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#ifndef __OCRDMA_AH_H__	43	#ifndef __OCRDMA_AH_H__
29	#define __OCRDMA_AH_H__	44	#define __OCRDMA_AH_H__

drivers/infiniband/hw/ocrdma/ocrdma_hw.c+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) CNA Adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#include <linux/sched.h>	43	#include <linux/sched.h>
29	#include <linux/interrupt.h>	44	#include <linux/interrupt.h>

drivers/infiniband/hw/ocrdma/ocrdma_hw.h+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) CNA Adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#ifndef __OCRDMA_HW_H__	43	#ifndef __OCRDMA_HW_H__
29	#define __OCRDMA_HW_H__	44	#define __OCRDMA_HW_H__

drivers/infiniband/hw/ocrdma/ocrdma_main.c+35−20

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#include <linux/module.h>	43	#include <linux/module.h>
29	#include <linux/idr.h>	44	#include <linux/idr.h>
@@ -46,7 +61,7 @@ · 16 unmodified lines
46	MODULE_VERSION(OCRDMA_ROCE_DRV_VERSION);	61	MODULE_VERSION(OCRDMA_ROCE_DRV_VERSION);
47	MODULE_DESCRIPTION(OCRDMA_ROCE_DRV_DESC " " OCRDMA_ROCE_DRV_VERSION);	62	MODULE_DESCRIPTION(OCRDMA_ROCE_DRV_DESC " " OCRDMA_ROCE_DRV_VERSION);
48	MODULE_AUTHOR("Emulex Corporation");	63	MODULE_AUTHOR("Emulex Corporation");
49	MODULE_LICENSE("GPL");	64	MODULE_LICENSE("Dual BSD/GPL");
50		65
51	static LIST_HEAD(ocrdma_dev_list);	66	static LIST_HEAD(ocrdma_dev_list);
52	static DEFINE_SPINLOCK(ocrdma_devlist_lock);	67	static DEFINE_SPINLOCK(ocrdma_devlist_lock);

drivers/infiniband/hw/ocrdma/ocrdma_sli.h+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#ifndef __OCRDMA_SLI_H__	43	#ifndef __OCRDMA_SLI_H__
29	#define __OCRDMA_SLI_H__	44	#define __OCRDMA_SLI_H__

drivers/infiniband/hw/ocrdma/ocrdma_stats.c+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2014 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#include <rdma/ib_addr.h>	43	#include <rdma/ib_addr.h>
29	#include <rdma/ib_pma.h>	44	#include <rdma/ib_pma.h>

drivers/infiniband/hw/ocrdma/ocrdma_stats.h+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2014 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#ifndef __OCRDMA_STATS_H__	43	#ifndef __OCRDMA_STATS_H__
29	#define __OCRDMA_STATS_H__	44	#define __OCRDMA_STATS_H__

drivers/infiniband/hw/ocrdma/ocrdma_verbs.c+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#include <linux/dma-mapping.h>	43	#include <linux/dma-mapping.h>
29	#include <rdma/ib_verbs.h>	44	#include <rdma/ib_verbs.h>

drivers/infiniband/hw/ocrdma/ocrdma_verbs.h+34−19

@@ -1,21 +1,36 @@
1	/*******************************************************************	1	/* This file is part of the Emulex RoCE Device Driver for
2	* This file is part of the Emulex RoCE Device Driver for *	2	* RoCE (RDMA over Converged Ethernet) adapters.
3	* RoCE (RDMA over Converged Ethernet) adapters. *	3	* Copyright (C) 2012-2015 Emulex. All rights reserved.
4	* Copyright (C) 2008-2012 Emulex. All rights reserved. *	4	* EMULEX and SLI are trademarks of Emulex.
5	* EMULEX and SLI are trademarks of Emulex. *	5	* www.emulex.com
6	* www.emulex.com *	6	*
7	* *	7	* This software is available to you under a choice of one of two licenses.
8	* This program is free software; you can redistribute it and/or *	8	* You may choose to be licensed under the terms of the GNU General Public
9	* modify it under the terms of version 2 of the GNU General *	9	* License (GPL) Version 2, available from the file COPYING in the main
10	* Public License as published by the Free Software Foundation. *	10	* directory of this source tree, or the BSD license below:
11	* This program is distributed in the hope that it will be useful. *	11	*
12	* ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *	12	* Redistribution and use in source and binary forms, with or without
13	* WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *	13	* modification, are permitted provided that the following conditions
14	* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *	14	* are met:
15	* DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *	15	*
16	* TO BE LEGALLY INVALID. See the GNU General Public License for *	16	* - Redistributions of source code must retain the above copyright notice,
17	* more details, a copy of which can be found in the file COPYING *	17	* this list of conditions and the following disclaimer.
18	* included with this package. *	18	*
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the distribution.
		22	*
		23	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		24	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
		25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		26	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		27	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		28	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		29	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
		30	* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
		31	* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
		32	* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
		33	* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19	*	34	*
20	* Contact Information:	35	* Contact Information:
21	* linux-drivers@emulex.com	36	* linux-drivers@emulex.com
@@ -23,7 +38,7 @@ · 1 unmodified line
23	* Emulex	38	* Emulex
24	* 3333 Susan Street	39	* 3333 Susan Street
25	* Costa Mesa, CA 92626	40	* Costa Mesa, CA 92626
26	*******************************************************************/	41	*/
27		42
28	#ifndef __OCRDMA_VERBS_H__	43	#ifndef __OCRDMA_VERBS_H__
29	#define __OCRDMA_VERBS_H__	44	#define __OCRDMA_VERBS_H__

drivers/infiniband/ulp/ipoib/ipoib_verbs.c+2−1

@@ -177,7 +177,8 @@ int ipoib_transport_dev_init(struct net_device dev, struct ib_device ca) · 176 unmodified lines
177	else	177	else
178	size += ipoib_recvq_size * ipoib_max_conn_qp;	178	size += ipoib_recvq_size * ipoib_max_conn_qp;
179	} else	179	} else
180	goto out_free_wq;	180	if (ret != -ENOSYS)
		181	goto out_free_wq;
181		182
182	cq_attr.cqe = size;	183	cq_attr.cqe = size;
183	priv->recv_cq = ib_create_cq(priv->ca, ipoib_ib_completion, NULL,	184	priv->recv_cq = ib_create_cq(priv->ca, ipoib_ib_completion, NULL,

drivers/infiniband/ulp/isert/ib_isert.c+11−5

 	ret = isert_rdma_post_recvl(isert_conn);
 	if (ret)
 		goto out_conn_dev;
+	/*
+	 * Obtain the second reference now before isert_rdma_accept() to
+	 * ensure that any initiator generated REJECT CM event that occurs
+	 * asynchronously won't drop the last reference until the error path
+	 * in iscsi_target_login_sess_out() does it's ->iscsit_free_conn() ->
+	 * isert_free_conn() -> isert_put_conn() -> kref_put().
+	 */
+	if (!kref_get_unless_zero(&isert_conn->kref)) {
+		isert_warn("conn %p connect_release is running\n", isert_conn);
+		goto out_conn_dev;
+	}
 	ret = isert_rdma_accept(isert_conn);
 	if (ret)
 	isert_info("conn %p\n", isert_conn);
-	if (!kref_get_unless_zero(&isert_conn->kref)) {
-		isert_warn("conn %p connect_release is running\n", isert_conn);
-		return;
-	}
 	mutex_lock(&isert_conn->mutex);
 	if (isert_conn->state != ISER_CONN_FULL_FEATURE)
 		isert_conn->state = ISER_CONN_UP;

drivers/input/joystick/turbografx.c+1−1

@@ -196,7 +196,7 @@ static struct tgfx __init tgfx_probe(int parport, int n_buttons, int n_devs) · 195 unmodified lines
196	if (n_buttons[i] < 1)	196	if (n_buttons[i] < 1)
197	continue;	197	continue;
198		198
199	if (n_buttons[i] > 6) {	199	if (n_buttons[i] > ARRAY_SIZE(tgfx_buttons)) {
200	printk(KERN_ERR "turbografx.c: Invalid number of buttons %d\n", n_buttons[i]);	200	printk(KERN_ERR "turbografx.c: Invalid number of buttons %d\n", n_buttons[i]);
201	err = -EINVAL;	201	err = -EINVAL;
202	goto err_unreg_devs;	202	goto err_unreg_devs;

drivers/input/misc/axp20x-pek.c+1−0

@@ -292,3 +292,4 @@ module_platform_driver(axp20x_pek_driver); · 291 unmodified lines
292	MODULE_DESCRIPTION("axp20x Power Button");	292	MODULE_DESCRIPTION("axp20x Power Button");
293	MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");	293	MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
294	MODULE_LICENSE("GPL");	294	MODULE_LICENSE("GPL");
		295	MODULE_ALIAS("platform:axp20x-pek");

drivers/input/misc/twl4030-vibra.c+2−1

@@ -183,7 +183,8 @@ static bool twl4030_vibra_check_coexist(struct twl4030_vibra_data *pdata, · 182 unmodified lines
183	if (pdata && pdata->coexist)	183	if (pdata && pdata->coexist)
184	return true;	184	return true;
185		185
186	if (of_find_node_by_name(node, "codec")) {	186	node = of_find_node_by_name(node, "codec");
		187	if (node) {
187	of_node_put(node);	188	of_node_put(node);
188	return true;	189	return true;
189	}	190	}

drivers/input/mouse/alps.c+6−2

 #include <linux/input/mt.h>
 #include <linux/serio.h>
 #include <linux/libps2.h>
+#include <linux/dmi.h>
 #include "psmouse.h"
 #include "alps.h"
 #define ALPS_FOUR_BUTTONS	0x40	/* 4 direction button present */
 #define ALPS_PS2_INTERLEAVED	0x80	/* 3-byte PS/2 packet interleaved with
 					   6-byte ALPS packet */
+#define ALPS_DELL		0x100	/* device is a Dell laptop */
 #define ALPS_BUTTONPAD		0x200	/* device is a clickpad */
 static const struct alps_model_info alps_model_data[] = {
 		return;
 	}
-	/* Non interleaved V2 dualpoint has separate stick button bits */
+	/* Dell non interleaved V2 dualpoint has separate stick button bits */
 	if (priv->proto_version == ALPS_PROTO_V2 &&
-	    priv->flags == (ALPS_PASS | ALPS_DUALPOINT)) {
+	    priv->flags == (ALPS_DELL | ALPS_PASS | ALPS_DUALPOINT)) {
 		left |= packet[0] & 1;
 		right |= packet[0] & 2;
 		middle |= packet[0] & 4;
 	priv->byte0 = protocol->byte0;
 	priv->mask0 = protocol->mask0;
 	priv->flags = protocol->flags;
+	if (dmi_name_in_vendors("Dell"))
+		priv->flags |= ALPS_DELL;
 	priv->x_max = 2000;
 	priv->y_max = 1400;

drivers/input/mouse/bcm5974.c+112−53

  * Apple USB BCM5974 (Macbook Air and Penryn Macbook Pro) multitouch driver
  *
  * Copyright (C) 2008	   Henrik Rydberg (rydberg@euromail.se)
+ * Copyright (C) 2015      John Horan (knasher@gmail.com)
  *
  * The USB initialization and package decoding was made by
  * Scott Shawcroft as part of the touchd user-space driver project:
 #define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI	0x0290
 #define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO	0x0291
 #define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS	0x0292
+/* MacbookPro12,1 (2015) */
+#define USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI	0x0272
+#define USB_DEVICE_ID_APPLE_WELLSPRING9_ISO	0x0273
+#define USB_DEVICE_ID_APPLE_WELLSPRING9_JIS	0x0274
 #define BCM5974_DEVICE(prod) {					\
 	.match_flags = (USB_DEVICE_ID_MATCH_DEVICE |		\
 	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI),
 	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING8_ISO),
 	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING8_JIS),
+	/* MacbookPro12,1 */
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI),
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING9_ISO),
+	BCM5974_DEVICE(USB_DEVICE_ID_APPLE_WELLSPRING9_JIS),
 	/* Terminating entry */
 	{}
 };
 enum tp_type {
 	TYPE1,			/* plain trackpad */
 	TYPE2,			/* button integrated in trackpad */
-	TYPE3			/* additional header fields since June 2013 */
+	TYPE3,			/* additional header fields since June 2013 */
+	TYPE4			/* additional header field for pressure data */
 };
 /* trackpad finger data offsets, le16-aligned */
-#define FINGER_TYPE1		(13 * sizeof(__le16))
+#define HEADER_TYPE1		(13 * sizeof(__le16))
-#define FINGER_TYPE2		(15 * sizeof(__le16))
+#define HEADER_TYPE2		(15 * sizeof(__le16))
-#define FINGER_TYPE3		(19 * sizeof(__le16))
+#define HEADER_TYPE3		(19 * sizeof(__le16))
+#define HEADER_TYPE4		(23 * sizeof(__le16))
 /* trackpad button data offsets */
+#define BUTTON_TYPE1		0
 #define BUTTON_TYPE2		15
 #define BUTTON_TYPE3		23
+#define BUTTON_TYPE4		31
 /* list of device capability bits */
 #define HAS_INTEGRATED_BUTTON	1
+/* trackpad finger data block size */
+#define FSIZE_TYPE1		(14 * sizeof(__le16))
+#define FSIZE_TYPE2		(14 * sizeof(__le16))
+#define FSIZE_TYPE3		(14 * sizeof(__le16))
+#define FSIZE_TYPE4		(15 * sizeof(__le16))
+/* offset from header to finger struct */
+#define DELTA_TYPE1		(0 * sizeof(__le16))
+#define DELTA_TYPE2		(0 * sizeof(__le16))
+#define DELTA_TYPE3		(0 * sizeof(__le16))
+#define DELTA_TYPE4		(1 * sizeof(__le16))
+/* usb control message mode switch data */
+#define USBMSG_TYPE1		8, 0x300, 0, 0, 0x1, 0x8
+#define USBMSG_TYPE2		8, 0x300, 0, 0, 0x1, 0x8
+#define USBMSG_TYPE3		8, 0x300, 0, 0, 0x1, 0x8
+#define USBMSG_TYPE4		2, 0x302, 2, 1, 0x1, 0x0
+/* Wellspring initialization constants */
+#define BCM5974_WELLSPRING_MODE_READ_REQUEST_ID		1
+#define BCM5974_WELLSPRING_MODE_WRITE_REQUEST_ID	9
 /* trackpad finger structure, le16-aligned */
 struct tp_finger {
 	__le16 origin;		/* zero when switching track finger */
 	__le16 orientation;	/* 16384 when point, else 15 bit angle */
 	__le16 touch_major;	/* touch area, major axis */
 	__le16 touch_minor;	/* touch area, minor axis */
-	__le16 unused[3];	/* zeros */
+	__le16 unused[2];	/* zeros */
+	__le16 pressure;	/* pressure on forcetouch touchpad */
 	__le16 multi;		/* one finger: varies, more fingers: constant */
 } __attribute__((packed,aligned(2)));
 /* trackpad finger data size, empirically at least ten fingers */
 #define MAX_FINGERS		16
-#define SIZEOF_FINGER		sizeof(struct tp_finger)
-#define SIZEOF_ALL_FINGERS	(MAX_FINGERS * SIZEOF_FINGER)
 #define MAX_FINGER_ORIENTATION	16384
 /* device-specific parameters */
 	int bt_datalen;		/* data length of the button interface */
 	int tp_ep;		/* the endpoint of the trackpad interface */
 	enum tp_type tp_type;	/* type of trackpad interface */
-	int tp_offset;		/* offset to trackpad finger data */
+	int tp_header;		/* bytes in header block */
 	int tp_datalen;		/* data length of the trackpad interface */
+	int tp_button;		/* offset to button data */
+	int tp_fsize;		/* bytes in single finger block */
+	int tp_delta;		/* offset from header to finger struct */
+	int um_size;		/* usb control message length */
+	int um_req_val;		/* usb control message value */
+	int um_req_idx;		/* usb control message index */
+	int um_switch_idx;	/* usb control message mode switch index */
+	int um_switch_on;	/* usb control message mode switch on */
+	int um_switch_off;	/* usb control message mode switch off */
 	struct bcm5974_param p;	/* finger pressure limits */
 	struct bcm5974_param w;	/* finger width limits */
 	struct bcm5974_param x;	/* horizontal limits */
 	int slots[MAX_FINGERS];				/* slot assignments */
 };
+/* trackpad finger block data, le16-aligned */
+static const struct tp_finger *get_tp_finger(const struct bcm5974 *dev, int i)
+{
+	const struct bcm5974_config *c = &dev->cfg;
+	u8 *f_base = dev->tp_data + c->tp_header + c->tp_delta;
+	return (const struct tp_finger *)(f_base + i * c->tp_fsize);
+}
+#define DATAFORMAT(type)				\
+	type,						\
+	HEADER_##type,					\
+	HEADER_##type + (MAX_FINGERS) * (FSIZE_##type),	\
+	BUTTON_##type,					\
+	FSIZE_##type,					\
+	DELTA_##type,					\
+	USBMSG_##type
 /* logical signal quality */
 #define SN_PRESSURE	45		/* pressure signal-to-noise ratio */
 #define SN_WIDTH	25		/* width signal-to-noise ratio */
 		USB_DEVICE_ID_APPLE_WELLSPRING_JIS,
 		0,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE1, FINGER_TYPE1, FINGER_TYPE1 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE1),
 		{ SN_PRESSURE, 0, 256 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4824, 5342 },
 		USB_DEVICE_ID_APPLE_WELLSPRING2_JIS,
 		0,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE1, FINGER_TYPE1, FINGER_TYPE1 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE1),
 		{ SN_PRESSURE, 0, 256 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4824, 4824 },
 		USB_DEVICE_ID_APPLE_WELLSPRING3_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4460, 5166 },
 		USB_DEVICE_ID_APPLE_WELLSPRING4_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4620, 5140 },
 		USB_DEVICE_ID_APPLE_WELLSPRING4A_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4616, 5112 },
 		USB_DEVICE_ID_APPLE_WELLSPRING5_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4415, 5050 },
 		USB_DEVICE_ID_APPLE_WELLSPRING6_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4620, 5140 },
 		USB_DEVICE_ID_APPLE_WELLSPRING5A_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4750, 5280 },
 		USB_DEVICE_ID_APPLE_WELLSPRING6A_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4620, 5140 },
 		USB_DEVICE_ID_APPLE_WELLSPRING7_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4750, 5280 },
 		USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0x84, sizeof(struct bt_data),
-		0x81, TYPE2, FINGER_TYPE2, FINGER_TYPE2 + SIZEOF_ALL_FINGERS,
+		0x81, DATAFORMAT(TYPE2),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4750, 5280 },
 		USB_DEVICE_ID_APPLE_WELLSPRING8_JIS,
 		HAS_INTEGRATED_BUTTON,
 		0, sizeof(struct bt_data),
-		0x83, TYPE3, FINGER_TYPE3, FINGER_TYPE3 + SIZEOF_ALL_FINGERS,
+		0x83, DATAFORMAT(TYPE3),
 		{ SN_PRESSURE, 0, 300 },
 		{ SN_WIDTH, 0, 2048 },
 		{ SN_COORD, -4620, 5140 },
 		{ SN_COORD, -150, 6600 },
 		{ SN_ORIENT, -MAX_FINGER_ORIENTATION, MAX_FINGER_ORIENTATION }
 	},
+	{
+		USB_DEVICE_ID_APPLE_WELLSPRING9_ANSI,
+		USB_DEVICE_ID_APPLE_WELLSPRING9_ISO,
+		USB_DEVICE_ID_APPLE_WELLSPRING9_JIS,
+		HAS_INTEGRATED_BUTTON,
+		0, sizeof(struct bt_data),
+		0x83, DATAFORMAT(TYPE4),
+		{ SN_PRESSURE, 0, 300 },
+		{ SN_WIDTH, 0, 2048 },
+		{ SN_COORD, -4828, 5345 },
+		{ SN_COORD, -203, 6803 },
+		{ SN_ORIENT, -MAX_FINGER_ORIENTATION, MAX_FINGER_ORIENTATION }
+	},
 	{}
 };
 	struct input_dev *input = dev->input;
 	int raw_n, i, n = 0;
-	if (size < c->tp_offset || (size - c->tp_offset) % SIZEOF_FINGER != 0)
+	if (size < c->tp_header || (size - c->tp_header) % c->tp_fsize != 0)
 		return -EIO;
-	/* finger data, le16-aligned */
+	raw_n = (size - c->tp_header) / c->tp_fsize;
-	f = (const struct tp_finger *)(dev->tp_data + c->tp_offset);
-	raw_n = (size - c->tp_offset) / SIZEOF_FINGER;
 	for (i = 0; i < raw_n; i++) {
-		if (raw2int(f[i].touch_major) == 0)
+		f = get_tp_finger(dev, i);
+		if (raw2int(f->touch_major) == 0)
 			continue;
-		dev->pos[n].x = raw2int(f[i].abs_x);
+		dev->pos[n].x = raw2int(f->abs_x);
-		dev->pos[n].y = c->y.min + c->y.max - raw2int(f[i].abs_y);
+		dev->pos[n].y = c->y.min + c->y.max - raw2int(f->abs_y);
-		dev->index[n++] = &f[i];
+		dev->index[n++] = f;
 	}
 	input_mt_assign_slots(input, dev->slots, dev->pos, n, 0);
 	input_mt_sync_frame(input);
-	report_synaptics_data(input, c, f, raw_n);
+	report_synaptics_data(input, c, get_tp_finger(dev, 0), raw_n);
-	/* type 2 reports button events via ibt only */
+	/* later types report button events via integrated button only */
-	if (c->tp_type == TYPE2) {
+	if (c->caps & HAS_INTEGRATED_BUTTON) {
-		int ibt = raw2int(dev->tp_data[BUTTON_TYPE2]);
+		int ibt = raw2int(dev->tp_data[c->tp_button]);
 		input_report_key(input, BTN_LEFT, ibt);
 	}
-	if (c->tp_type == TYPE3)
-		input_report_key(input, BTN_LEFT, dev->tp_data[BUTTON_TYPE3]);
 	input_sync(input);
 	return 0;
 }
-/* Wellspring initialization constants */
-#define BCM5974_WELLSPRING_MODE_READ_REQUEST_ID		1
-#define BCM5974_WELLSPRING_MODE_WRITE_REQUEST_ID	9
-#define BCM5974_WELLSPRING_MODE_REQUEST_VALUE		0x300
-#define BCM5974_WELLSPRING_MODE_REQUEST_INDEX		0
-#define BCM5974_WELLSPRING_MODE_VENDOR_VALUE		0x01
-#define BCM5974_WELLSPRING_MODE_NORMAL_VALUE		0x08
 static int bcm5974_wellspring_mode(struct bcm5974 *dev, bool on)
 {
+	const struct bcm5974_config *c = &dev->cfg;
 	int retval = 0, size;
 	char *data;
 	if (dev->cfg.tp_type == TYPE3)
 		return 0;
-	data = kmalloc(8, GFP_KERNEL);
+	data = kmalloc(c->um_size, GFP_KERNEL);
 	if (!data) {
 		dev_err(&dev->intf->dev, "out of memory\n");
 		retval = -ENOMEM;
 	size = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
 			BCM5974_WELLSPRING_MODE_READ_REQUEST_ID,
 			USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
-			BCM5974_WELLSPRING_MODE_REQUEST_VALUE,
+			c->um_req_val, c->um_req_idx, data, c->um_size, 5000);
-			BCM5974_WELLSPRING_MODE_REQUEST_INDEX, data, 8, 5000);
-	if (size != 8) {
+	if (size != c->um_size) {
 		dev_err(&dev->intf->dev, "could not read from device\n");
 		retval = -EIO;
 		goto out;
 	}
 	/* apply the mode switch */
-	data[0] = on ?
+	data[c->um_switch_idx] = on ? c->um_switch_on : c->um_switch_off;
-		BCM5974_WELLSPRING_MODE_VENDOR_VALUE :
-		BCM5974_WELLSPRING_MODE_NORMAL_VALUE;
 	/* write configuration */
 	size = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
 			BCM5974_WELLSPRING_MODE_WRITE_REQUEST_ID,
 			USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
-			BCM5974_WELLSPRING_MODE_REQUEST_VALUE,
+			c->um_req_val, c->um_req_idx, data, c->um_size, 5000);
-			BCM5974_WELLSPRING_MODE_REQUEST_INDEX, data, 8, 5000);
-	if (size != 8) {
+	if (size != c->um_size) {
 		dev_err(&dev->intf->dev, "could not write to device\n");
 		retval = -EIO;
 		goto out;

drivers/input/mouse/elantech.c+20−2

 	struct elantech_data *etd = psmouse->private;
 	unsigned char *packet = psmouse->packet;
 	unsigned char packet_type = packet[3] & 0x03;
+	unsigned int ic_version;
 	bool sanity_check;
 	if (etd->tp_dev && (packet[3] & 0x0f) == 0x06)
 		return PACKET_TRACKPOINT;
+	/* This represents the version of IC body. */
+	ic_version = (etd->fw_version & 0x0f0000) >> 16;
 	/*
 	 * Sanity check based on the constant bits of a packet.
 	 * The constant bits change depending on the value of
-	 * the hardware flag 'crc_enabled' but are the same for
+	 * the hardware flag 'crc_enabled' and the version of
-	 * every packet, regardless of the type.
+	 * the IC body, but are the same for every packet,
+	 * regardless of the type.
 	 */
 	if (etd->crc_enabled)
 		sanity_check = ((packet[3] & 0x08) == 0x00);
+	else if (ic_version == 7 && etd->samples[1] == 0x2A)
+		sanity_check = ((packet[3] & 0x1c) == 0x10);
 	else
 		sanity_check = ((packet[0] & 0x0c) == 0x04 &&
 				(packet[3] & 0x1c) == 0x10);
  * Avatar AVIU-145A2       0x361f00        ?               clickpad
  * Fujitsu LIFEBOOK E544   0x470f00        d0, 12, 09      2 hw buttons
  * Fujitsu LIFEBOOK E554   0x570f01        40, 14, 0c      2 hw buttons
+ * Fujitsu T725            0x470f01        05, 12, 09      2 hw buttons
  * Fujitsu H730            0x570f00        c0, 14, 0c      3 hw buttons (**)
  * Gigabyte U2442          0x450f01        58, 17, 0c      2 hw buttons
  * Lenovo L430             0x350f02        b9, 15, 0c      2 hw buttons (*)
 		     etd->capabilities[0], etd->capabilities[1],
 		     etd->capabilities[2]);
+	if (etd->hw_version != 1) {
+		if (etd->send_cmd(psmouse, ETP_SAMPLE_QUERY, etd->samples)) {
+			psmouse_err(psmouse, "failed to query sample data\n");
+			goto init_fail;
+		}
+		psmouse_info(psmouse,
+			     "Elan sample query result %02x, %02x, %02x\n",
+			     etd->samples[0], etd->samples[1], etd->samples[2]);
+	}
 	if (elantech_set_absolute_mode(psmouse)) {
 		psmouse_err(psmouse,
 			    "failed to put touchpad into absolute mode.\n");

drivers/input/mouse/elantech.h+1−0

@@ -129,6 +129,7 @@ struct elantech_data { · 128 unmodified lines
129	unsigned char reg_26;	129	unsigned char reg_26;
130	unsigned char debug;	130	unsigned char debug;
131	unsigned char capabilities[3];	131	unsigned char capabilities[3];
		132	unsigned char samples[3];
132	bool paritycheck;	133	bool paritycheck;
133	bool jumpy_cursor;	134	bool jumpy_cursor;
134	bool reports_pressure;	135	bool reports_pressure;

drivers/input/mouse/synaptics.c+2−2

@@ -1484,12 +1484,12 @@ static int __synaptics_init(struct psmouse *psmouse, bool absolute_mode) · 1483 unmodified lines
1484	priv->pkt_type = SYN_MODEL_NEWABS(priv->model_id) ? SYN_NEWABS : SYN_OLDABS;	1484	priv->pkt_type = SYN_MODEL_NEWABS(priv->model_id) ? SYN_NEWABS : SYN_OLDABS;
1485		1485
1486	psmouse_info(psmouse,	1486	psmouse_info(psmouse,
1487	"Touchpad model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx/%#lx, board id: %lu, fw id: %lu\n",	1487	"Touchpad model: %ld, fw: %ld.%ld, id: %#lx, caps: %#lx/%#lx/%#lx/%#lx, board id: %lu, fw id: %lu\n",
1488	SYN_ID_MODEL(priv->identity),	1488	SYN_ID_MODEL(priv->identity),
1489	SYN_ID_MAJOR(priv->identity), SYN_ID_MINOR(priv->identity),	1489	SYN_ID_MAJOR(priv->identity), SYN_ID_MINOR(priv->identity),
1490	priv->model_id,	1490	priv->model_id,
1491	priv->capabilities, priv->ext_cap, priv->ext_cap_0c,	1491	priv->capabilities, priv->ext_cap, priv->ext_cap_0c,
1492	priv->board_id, priv->firmware_id);	1492	priv->ext_cap_10, priv->board_id, priv->firmware_id);
1493		1493
1494	set_input_params(psmouse, priv);	1494	set_input_params(psmouse, priv);
1495		1495

drivers/input/touchscreen/zforce_ts.c+1−1

@@ -429,7 +429,7 @@ static int zforce_read_packet(struct zforce_ts ts, u8 buf) · 428 unmodified lines
429	goto unlock;	429	goto unlock;
430	}	430	}
431		431
432	if (buf[PAYLOAD_LENGTH] == 0 \|\| buf[PAYLOAD_LENGTH] > FRAME_MAXSIZE) {	432	if (buf[PAYLOAD_LENGTH] == 0) {
433	dev_err(&client->dev, "invalid payload length: %d\n",	433	dev_err(&client->dev, "invalid payload length: %d\n",
434	buf[PAYLOAD_LENGTH]);	434	buf[PAYLOAD_LENGTH]);
435	ret = -EIO;	435	ret = -EIO;

drivers/iommu/amd_iommu.c+29−69

@@ -76,8 +76,6 @@ LIST_HEAD(hpet_map); · 75 unmodified lines
76	* Domain for untranslated devices - only allocated	76	* Domain for untranslated devices - only allocated
77	* if iommu=pt passed on kernel cmd line.	77	* if iommu=pt passed on kernel cmd line.
78	*/	78	*/
79	static struct protection_domain *pt_domain;
80
81	static const struct iommu_ops amd_iommu_ops;	79	static const struct iommu_ops amd_iommu_ops;
82		80
83	static ATOMIC_NOTIFIER_HEAD(ppr_notifier);	81	static ATOMIC_NOTIFIER_HEAD(ppr_notifier);
@@ -96,7 +94,7 @@ struct iommu_dev_data { · 12 unmodified lines
96	struct protection_domain domain; / Domain the device is bound to */	94	struct protection_domain domain; / Domain the device is bound to */
97	u16 devid; /* PCI Device ID */	95	u16 devid; /* PCI Device ID */
98	bool iommu_v2; /* Device can make use of IOMMUv2 */	96	bool iommu_v2; /* Device can make use of IOMMUv2 */
99	bool passthrough; /* Default for device is pt_domain */	97	bool passthrough; /* Device is identity mapped */
100	struct {	98	struct {
101	bool enabled;	99	bool enabled;
102	int qdep;	100	int qdep;
@@ -116,7 +114,6 @@ struct iommu_cmd { · 13 unmodified lines
116	struct kmem_cache *amd_iommu_irq_cache;	114	struct kmem_cache *amd_iommu_irq_cache;
117		115
118	static void update_domain(struct protection_domain *domain);	116	static void update_domain(struct protection_domain *domain);
119	static int alloc_passthrough_domain(void);
120	static int protection_domain_init(struct protection_domain *domain);	117	static int protection_domain_init(struct protection_domain *domain);
121		118
122	/****************************************************************************	119	/****************************************************************************
@@ -2167,15 +2164,17 @@ static int attach_device(struct device *dev, · 2044 unmodified lines
2167	dev_data = get_dev_data(dev);	2164	dev_data = get_dev_data(dev);
2168		2165
2169	if (domain->flags & PD_IOMMUV2_MASK) {	2166	if (domain->flags & PD_IOMMUV2_MASK) {
2170	if (!dev_data->iommu_v2 \|\| !dev_data->passthrough)	2167	if (!dev_data->passthrough)
2171	return -EINVAL;	2168	return -EINVAL;
2172		2169
2173	if (pdev_iommuv2_enable(pdev) != 0)	2170	if (dev_data->iommu_v2) {
2174	return -EINVAL;	2171	if (pdev_iommuv2_enable(pdev) != 0)
		2172	return -EINVAL;
2175		2173
2176	dev_data->ats.enabled = true;	2174	dev_data->ats.enabled = true;
2177	dev_data->ats.qdep = pci_ats_queue_depth(pdev);	2175	dev_data->ats.qdep = pci_ats_queue_depth(pdev);
2178	dev_data->pri_tlp = pci_pri_tlp_required(pdev);	2176	dev_data->pri_tlp = pci_pri_tlp_required(pdev);
		2177	}
2179	} else if (amd_iommu_iotlb_sup &&	2178	} else if (amd_iommu_iotlb_sup &&
2180	pci_enable_ats(pdev, PAGE_SHIFT) == 0) {	2179	pci_enable_ats(pdev, PAGE_SHIFT) == 0) {
2181	dev_data->ats.enabled = true;	2180	dev_data->ats.enabled = true;
@@ -2221,15 +2220,6 @@ static void __detach_device(struct iommu_dev_data *dev_data) · 39 unmodified lines
2221	do_detach(head);	2220	do_detach(head);
2222		2221
2223	spin_unlock_irqrestore(&domain->lock, flags);	2222	spin_unlock_irqrestore(&domain->lock, flags);
2224
2225	/*
2226	* If we run in passthrough mode the device must be assigned to the
2227	* passthrough domain if it is detached from any other domain.
2228	* Make sure we can deassign from the pt_domain itself.
2229	*/
2230	if (dev_data->passthrough &&
2231	(dev_data->domain == NULL && domain != pt_domain))
2232	__attach_device(dev_data, pt_domain);
2233	}	2223	}
2234		2224
2235	/*	2225	/*
@@ -2249,7 +2239,7 @@ static void detach_device(struct device *dev) · 13 unmodified lines
2249	__detach_device(dev_data);	2239	__detach_device(dev_data);
2250	write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);	2240	write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
2251		2241
2252	if (domain->flags & PD_IOMMUV2_MASK)	2242	if (domain->flags & PD_IOMMUV2_MASK && dev_data->iommu_v2)
2253	pdev_iommuv2_disable(to_pci_dev(dev));	2243	pdev_iommuv2_disable(to_pci_dev(dev));
2254	else if (dev_data->ats.enabled)	2244	else if (dev_data->ats.enabled)
2255	pci_disable_ats(to_pci_dev(dev));	2245	pci_disable_ats(to_pci_dev(dev));
@@ -2287,17 +2277,15 @@ static int amd_iommu_add_device(struct device *dev) · 31 unmodified lines
2287		2277
2288	BUG_ON(!dev_data);	2278	BUG_ON(!dev_data);
2289		2279
2290	if (dev_data->iommu_v2)	2280	if (iommu_pass_through \|\| dev_data->iommu_v2)
2291	iommu_request_dm_for_dev(dev);	2281	iommu_request_dm_for_dev(dev);
2292		2282
2293	/* Domains are initialized for this device - have a look what we ended up with */	2283	/* Domains are initialized for this device - have a look what we ended up with */
2294	domain = iommu_get_domain_for_dev(dev);	2284	domain = iommu_get_domain_for_dev(dev);
2295	if (domain->type == IOMMU_DOMAIN_IDENTITY) {	2285	if (domain->type == IOMMU_DOMAIN_IDENTITY)
2296	dev_data->passthrough = true;	2286	dev_data->passthrough = true;
2297	dev->archdata.dma_ops = &nommu_dma_ops;	2287	else
2298	} else {
2299	dev->archdata.dma_ops = &amd_iommu_dma_ops;	2288	dev->archdata.dma_ops = &amd_iommu_dma_ops;
2300	}
2301		2289
2302	out:	2290	out:
2303	iommu_completion_wait(iommu);	2291	iommu_completion_wait(iommu);
@@ -2862,8 +2850,17 @@ int __init amd_iommu_init_api(void) · 558 unmodified lines
2862		2850
2863	int __init amd_iommu_init_dma_ops(void)	2851	int __init amd_iommu_init_dma_ops(void)
2864	{	2852	{
		2853	swiotlb = iommu_pass_through ? 1 : 0;
2865	iommu_detected = 1;	2854	iommu_detected = 1;
2866	swiotlb = 0;	2855
		2856	/*
		2857	* In case we don't initialize SWIOTLB (actually the common case
		2858	* when AMD IOMMU is enabled), make sure there are global
		2859	* dma_ops set as a fall-back for devices not handled by this
		2860	* driver (for example non-PCI devices).
		2861	*/
		2862	if (!swiotlb)
		2863	dma_ops = &nommu_dma_ops;
2867		2864
2868	amd_iommu_stats_init();	2865	amd_iommu_stats_init();
2869		2866
@@ -2947,21 +2944,6 @@ out_err: · 77 unmodified lines
2947	return NULL;	2944	return NULL;
2948	}	2945	}
2949		2946
2950	static int alloc_passthrough_domain(void)
2951	{
2952	if (pt_domain != NULL)
2953	return 0;
2954
2955	/* allocate passthrough domain */
2956	pt_domain = protection_domain_alloc();
2957	if (!pt_domain)
2958	return -ENOMEM;
2959
2960	pt_domain->mode = PAGE_MODE_NONE;
2961
2962	return 0;
2963	}
2964
2965	static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)	2947	static struct iommu_domain *amd_iommu_domain_alloc(unsigned type)
2966	{	2948	{
2967	struct protection_domain *pdomain;	2949	struct protection_domain *pdomain;
@@ -3222,33 +3204,6 @@ static const struct iommu_ops amd_iommu_ops = { · 254 unmodified lines
3222	*	3204	*
3223	*****************************************************************************/	3205	*****************************************************************************/
3224		3206
3225	int __init amd_iommu_init_passthrough(void)
3226	{
3227	struct iommu_dev_data *dev_data;
3228	struct pci_dev *dev = NULL;
3229	int ret;
3230
3231	ret = alloc_passthrough_domain();
3232	if (ret)
3233	return ret;
3234
3235	for_each_pci_dev(dev) {
3236	if (!check_device(&dev->dev))
3237	continue;
3238
3239	dev_data = get_dev_data(&dev->dev);
3240	dev_data->passthrough = true;
3241
3242	attach_device(&dev->dev, pt_domain);
3243	}
3244
3245	amd_iommu_stats_init();
3246
3247	pr_info("AMD-Vi: Initialized for Passthrough Mode\n");
3248
3249	return 0;
3250	}
3251
3252	/* IOMMUv2 specific functions */	3207	/* IOMMUv2 specific functions */
3253	int amd_iommu_register_ppr_notifier(struct notifier_block *nb)	3208	int amd_iommu_register_ppr_notifier(struct notifier_block *nb)
3254	{	3209	{
@@ -3363,7 +3318,12 @@ static int __flush_pasid(struct protection_domain *domain, int pasid, · 108 unmodified lines
3363	struct amd_iommu *iommu;	3318	struct amd_iommu *iommu;
3364	int qdep;	3319	int qdep;
3365		3320
3366	BUG_ON(!dev_data->ats.enabled);	3321	/*
		3322	There might be non-IOMMUv2 capable devices in an IOMMUv2
		3323	* domain.
		3324	*/
		3325	if (!dev_data->ats.enabled)
		3326	continue;
3367		3327
3368	qdep = dev_data->ats.qdep;	3328	qdep = dev_data->ats.qdep;
3369	iommu = amd_iommu_rlookup_table[dev_data->devid];	3329	iommu = amd_iommu_rlookup_table[dev_data->devid];

drivers/iommu/amd_iommu_init.c+1−9

 	return true;
 }
-static int amd_iommu_init_dma(void)
-{
-	if (iommu_pass_through)
-		return amd_iommu_init_passthrough();
-	else
-		return amd_iommu_init_dma_ops();
-}
 /****************************************************************************
  *
  * AMD IOMMU Initialization State Machine
 		init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN;
 		break;
 	case IOMMU_INTERRUPTS_EN:
-		ret = amd_iommu_init_dma();
+		ret = amd_iommu_init_dma_ops();
 		init_state = ret ? IOMMU_INIT_ERROR : IOMMU_DMA_OPS;
 		break;
 	case IOMMU_DMA_OPS:

drivers/iommu/amd_iommu_v2.c+21−3

 static void free_device_state(struct device_state *dev_state)
 {
+	struct iommu_group *group;
 	/*
 	 * First detach device from domain - No more PRI requests will arrive
 	 * from that device after it is unbound from the IOMMUv2 domain.
 	 */
-	iommu_detach_device(dev_state->domain, &dev_state->pdev->dev);
+	group = iommu_group_get(&dev_state->pdev->dev);
+	if (WARN_ON(!group))
+		return;
+	iommu_detach_group(dev_state->domain, group);
+	iommu_group_put(group);
 	/* Everything is down now, free the IOMMUv2 domain */
 	iommu_domain_free(dev_state->domain);
 int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
 {
 	struct device_state *dev_state;
+	struct iommu_group *group;
 	unsigned long flags;
 	int ret, tmp;
 	u16 devid;
 	if (ret)
 		goto out_free_domain;
-	ret = iommu_attach_device(dev_state->domain, &pdev->dev);
+	group = iommu_group_get(&pdev->dev);
-	if (ret != 0)
+	if (!group)
 		goto out_free_domain;
+	ret = iommu_attach_group(dev_state->domain, group);
+	if (ret != 0)
+		goto out_drop_group;
+	iommu_group_put(group);
 	spin_lock_irqsave(&state_lock, flags);
 	if (__get_device_state(devid) != NULL) {
 	return 0;
+out_drop_group:
+	iommu_group_put(group);
 out_free_domain:
 	iommu_domain_free(dev_state->domain);

drivers/irqchip/irq-mips-gic.c+1−1

@@ -538,7 +538,7 @@ static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) · 537 unmodified lines
538		538
539	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)	539	static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
540	{	540	{
541	smp_call_function_interrupt();	541	generic_smp_call_function_interrupt();
542		542
543	return IRQ_HANDLED;	543	return IRQ_HANDLED;
544	}	544	}

drivers/macintosh/ans-lcd.c+1−1

@@ -7,7 +7,7 @@ · 6 unmodified lines
7	#include <linux/kernel.h>	7	#include <linux/kernel.h>
8	#include <linux/miscdevice.h>	8	#include <linux/miscdevice.h>
9	#include <linux/fcntl.h>	9	#include <linux/fcntl.h>
10	#include <linux/init.h>	10	#include <linux/module.h>
11	#include <linux/delay.h>	11	#include <linux/delay.h>
12	#include <linux/fs.h>	12	#include <linux/fs.h>
13		13

drivers/md/Kconfig+1−1

@@ -259,7 +259,7 @@ config DM_CRYPT · 258 unmodified lines
259	the ciphers you're going to use in the cryptoapi configuration.	259	the ciphers you're going to use in the cryptoapi configuration.
260		260
261	For further information on dm-crypt and userspace tools see:	261	For further information on dm-crypt and userspace tools see:
262	<http://code.google.com/p/cryptsetup/wiki/DMCrypt>	262	<https://gitlab.com/cryptsetup/cryptsetup/wikis/DMCrypt>
263		263
264	To compile this code as a module, choose M here: the module will	264	To compile this code as a module, choose M here: the module will
265	be called dm-crypt.	265	be called dm-crypt.

drivers/md/dm-cache-policy-mq.c+0−2

@@ -1471,5 +1471,3 @@ module_exit(mq_exit); · 1470 unmodified lines
1471	MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>");	1471	MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>");
1472	MODULE_LICENSE("GPL");	1472	MODULE_LICENSE("GPL");
1473	MODULE_DESCRIPTION("mq cache policy");	1473	MODULE_DESCRIPTION("mq cache policy");
1474
1475	MODULE_ALIAS("dm-cache-default");

drivers/md/dm-cache-policy-smq.c+3−1

 	if (from_cblock(cache_size)) {
 		mq->cache_hit_bits = alloc_bitset(from_cblock(cache_size));
-		if (!mq->cache_hit_bits && mq->cache_hit_bits) {
+		if (!mq->cache_hit_bits) {
 			DMERR("couldn't allocate cache hit bitset");
 			goto bad_cache_hit_bits;
 		}
 MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>");
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("smq cache policy");
+MODULE_ALIAS("dm-cache-default");

drivers/md/dm-cache-target.c+4−3

 		wake_up(&cache->migration_wait);
 	mempool_free(mg, cache->migration_pool);
+	wake_worker(cache);
 }
 static int prealloc_data_structs(struct cache *cache, struct prealloc *p)
 		 * this bio might require one, we pause until there are some
 		 * prepared mappings to process.
 		 */
+		prealloc_used = true;
 		if (prealloc_data_structs(cache, &structs)) {
 			spin_lock_irqsave(&cache->lock, flags);
 			bio_list_merge(&cache->deferred_bios, &bios);
 			process_discard_bio(cache, &structs, bio);
 		else
 			process_bio(cache, &structs, bio);
-		prealloc_used = true;
 	}
 	if (prealloc_used)
 		 * this bio might require one, we pause until there are some
 		 * prepared mappings to process.
 		 */
+		prealloc_used = true;
 		if (prealloc_data_structs(cache, &structs)) {
 			spin_lock_irqsave(&cache->lock, flags);
 			list_splice(&cells, &cache->deferred_cells);
 		}
 		process_cell(cache, &structs, cell);
-		prealloc_used = true;
 	}
 	if (prealloc_used)
 		if (policy_writeback_work(cache->policy, &oblock, &cblock, busy))
 			break; /* no work to do */
+		prealloc_used = true;
 		if (prealloc_data_structs(cache, &structs) ||
 		    get_cell(cache, oblock, &structs, &old_ocell)) {
 			policy_set_dirty(cache->policy, oblock);
 		}
 		writeback(cache, &structs, oblock, cblock, old_ocell);
-		prealloc_used = true;
 	}
 	if (prealloc_used)

drivers/md/dm-thin-metadata.c+2−2

@@ -1293,8 +1293,8 @@ static int __release_metadata_snap(struct dm_pool_metadata *pmd) · 1292 unmodified lines
1293	return r;	1293	return r;
1294		1294
1295	disk_super = dm_block_data(copy);	1295	disk_super = dm_block_data(copy);
1296	dm_sm_dec_block(pmd->metadata_sm, le64_to_cpu(disk_super->data_mapping_root));	1296	dm_btree_del(&pmd->info, le64_to_cpu(disk_super->data_mapping_root));
1297	dm_sm_dec_block(pmd->metadata_sm, le64_to_cpu(disk_super->device_details_root));	1297	dm_btree_del(&pmd->details_info, le64_to_cpu(disk_super->device_details_root));
1298	dm_sm_dec_block(pmd->metadata_sm, held_root);	1298	dm_sm_dec_block(pmd->metadata_sm, held_root);
1299		1299
1300	return dm_tm_unlock(pmd->tm, copy);	1300	return dm_tm_unlock(pmd->tm, copy);

drivers/md/dm-thin.c+8−3

 	requeue_deferred_cells(tc);
 }
-static void error_retry_list(struct pool *pool)
+static void error_retry_list_with_code(struct pool *pool, int error)
 {
 	struct thin_c *tc;
 	rcu_read_lock();
 	list_for_each_entry_rcu(tc, &pool->active_thins, list)
-		error_thin_bio_list(tc, &tc->retry_on_resume_list, -EIO);
+		error_thin_bio_list(tc, &tc->retry_on_resume_list, error);
 	rcu_read_unlock();
 }
+static void error_retry_list(struct pool *pool)
+{
+	return error_retry_list_with_code(pool, -EIO);
+}
 /*
  * This section of code contains the logic for processing a thin device's IO.
  * Much of the code depends on pool object resources (lists, workqueues, etc)
 	if (get_pool_mode(pool) == PM_OUT_OF_DATA_SPACE && !pool->pf.error_if_no_space) {
 		pool->pf.error_if_no_space = true;
 		notify_of_pool_mode_change_to_oods(pool);
-		error_retry_list(pool);
+		error_retry_list_with_code(pool, -ENOSPC);
 	}
 }

drivers/md/dm.c+10−17

@@ -1729,7 +1729,8 @@ static int dm_merge_bvec(struct request_queue *q, · 1728 unmodified lines
1729	struct mapped_device *md = q->queuedata;	1729	struct mapped_device *md = q->queuedata;
1730	struct dm_table *map = dm_get_live_table_fast(md);	1730	struct dm_table *map = dm_get_live_table_fast(md);
1731	struct dm_target *ti;	1731	struct dm_target *ti;
1732	sector_t max_sectors, max_size = 0;	1732	sector_t max_sectors;
		1733	int max_size = 0;
1733		1734
1734	if (unlikely(!map))	1735	if (unlikely(!map))
1735	goto out;	1736	goto out;
@@ -1742,18 +1743,10 @@ static int dm_merge_bvec(struct request_queue *q, · 6 unmodified lines
1742	* Find maximum amount of I/O that won't need splitting	1743	* Find maximum amount of I/O that won't need splitting
1743	*/	1744	*/
1744	max_sectors = min(max_io_len(bvm->bi_sector, ti),	1745	max_sectors = min(max_io_len(bvm->bi_sector, ti),
1745	(sector_t) queue_max_sectors(q));	1746	(sector_t) BIO_MAX_SECTORS);
1746	max_size = (max_sectors << SECTOR_SHIFT) - bvm->bi_size;	1747	max_size = (max_sectors << SECTOR_SHIFT) - bvm->bi_size;
1747		1748	if (max_size < 0)
1748	/*	1749	max_size = 0;
1749	* FIXME: this stop-gap fix _must_ be cleaned up (by passing a sector_t
1750	* to the targets' merge function since it holds sectors not bytes).
1751	* Just doing this as an interim fix for stable@ because the more
1752	* comprehensive cleanup of switching to sector_t will impact every
1753	* DM target that implements a ->merge hook.
1754	*/
1755	if (max_size > INT_MAX)
1756	max_size = INT_MAX;
1757		1750
1758	/*	1751	/*
1759	* merge_bvec_fn() returns number of bytes	1752	* merge_bvec_fn() returns number of bytes
@@ -1761,13 +1754,13 @@ static int dm_merge_bvec(struct request_queue *q, · 1 unmodified line
1761	* max is precomputed maximal io size	1754	* max is precomputed maximal io size
1762	*/	1755	*/
1763	if (max_size && ti->type->merge)	1756	if (max_size && ti->type->merge)
1764	max_size = ti->type->merge(ti, bvm, biovec, (int) max_size);	1757	max_size = ti->type->merge(ti, bvm, biovec, max_size);
1765	/*	1758	/*
1766	* If the target doesn't support merge method and some of the devices	1759	* If the target doesn't support merge method and some of the devices
1767	* provided their merge_bvec method (we know this by looking for the	1760	* provided their merge_bvec method (we know this by looking at
1768	* max_hw_sectors that dm_set_device_limits may set), then we can't	1761	* queue_max_hw_sectors), then we can't allow bios with multiple vector
1769	* allow bios with multiple vector entries. So always set max_size	1762	* entries. So always set max_size to 0, and the code below allows
1770	* to 0, and the code below allows just one page.	1763	* just one page.
1771	*/	1764	*/
1772	else if (queue_max_hw_sectors(q) <= PAGE_SIZE >> 9)	1765	else if (queue_max_hw_sectors(q) <= PAGE_SIZE >> 9)
1773	max_size = 0;	1766	max_size = 0;

drivers/md/md.c+1−1

@@ -5759,7 +5759,7 @@ static int get_bitmap_file(struct mddev mddev, void __user arg) · 5758 unmodified lines
5759	char *ptr;	5759	char *ptr;
5760	int err;	5760	int err;
5761		5761
5762	file = kmalloc(sizeof(*file), GFP_NOIO);	5762	file = kzalloc(sizeof(*file), GFP_NOIO);
5763	if (!file)	5763	if (!file)
5764	return -ENOMEM;	5764	return -ENOMEM;
5765		5765

drivers/md/persistent-data/dm-btree-internal.h+6−0

@@ -138,4 +138,10 @@ int lower_bound(struct btree_node *n, uint64_t key); · 137 unmodified lines
138		138
139	extern struct dm_block_validator btree_node_validator;	139	extern struct dm_block_validator btree_node_validator;
140		140
		141	/*
		142	* Value type for upper levels of multi-level btrees.
		143	*/
		144	extern void init_le64_type(struct dm_transaction_manager *tm,
		145	struct dm_btree_value_type *vt);
		146
141	#endif /* DM_BTREE_INTERNAL_H */	147	#endif /* DM_BTREE_INTERNAL_H */

drivers/md/persistent-data/dm-btree-remove.c+7−10

 	return r;
 }
-static struct dm_btree_value_type le64_type = {
-	.context = NULL,
-	.size = sizeof(__le64),
-	.inc = NULL,
-	.dec = NULL,
-	.equal = NULL
-};
 int dm_btree_remove(struct dm_btree_info *info, dm_block_t root,
 		    uint64_t *keys, dm_block_t *new_root)
 {
 	int index = 0, r = 0;
 	struct shadow_spine spine;
 	struct btree_node *n;
+	struct dm_btree_value_type le64_vt;
+	init_le64_type(info->tm, &le64_vt);
 	init_shadow_spine(&spine, info);
 	for (level = 0; level < info->levels; level++) {
 		r = remove_raw(&spine, info,
 			       (level == last_level ?
-				&info->value_type : &le64_type),
+				&info->value_type : &le64_vt),
 			       root, keys[level], (unsigned *)&index);
 		if (r < 0)
 			break;
 	int index = 0, r = 0;
 	struct shadow_spine spine;
 	struct btree_node *n;
+	struct dm_btree_value_type le64_vt;
 	uint64_t k;
+	init_le64_type(info->tm, &le64_vt);
 	init_shadow_spine(&spine, info);
 	for (level = 0; level < last_level; level++) {
-		r = remove_raw(&spine, info, &le64_type,
+		r = remove_raw(&spine, info, &le64_vt,
 			       root, keys[level], (unsigned *) &index);
 		if (r < 0)
 			goto out;
 					     value_ptr(n, index));
 		delete_at(n, index);
+		keys[last_level] = k + 1ull;
 	} else
 		r = -ENODATA;

drivers/md/persistent-data/dm-btree-spine.c+37−0

@@ -249,3 +249,40 @@ int shadow_root(struct shadow_spine *s) · 248 unmodified lines
249	{	249	{
250	return s->root;	250	return s->root;
251	}	251	}
		252
		253	static void le64_inc(void context, const void value_le)
		254	{
		255	struct dm_transaction_manager *tm = context;
		256	__le64 v_le;
		257
		258	memcpy(&v_le, value_le, sizeof(v_le));
		259	dm_tm_inc(tm, le64_to_cpu(v_le));
		260	}
		261
		262	static void le64_dec(void context, const void value_le)
		263	{
		264	struct dm_transaction_manager *tm = context;
		265	__le64 v_le;
		266
		267	memcpy(&v_le, value_le, sizeof(v_le));
		268	dm_tm_dec(tm, le64_to_cpu(v_le));
		269	}
		270
		271	static int le64_equal(void context, const void value1_le, const void *value2_le)
		272	{
		273	__le64 v1_le, v2_le;
		274
		275	memcpy(&v1_le, value1_le, sizeof(v1_le));
		276	memcpy(&v2_le, value2_le, sizeof(v2_le));
		277	return v1_le == v2_le;
		278	}
		279
		280	void init_le64_type(struct dm_transaction_manager *tm,
		281	struct dm_btree_value_type *vt)
		282	{
		283	vt->context = tm;
		284	vt->size = sizeof(__le64);
		285	vt->inc = le64_inc;
		286	vt->dec = le64_dec;
		287	vt->equal = le64_equal;
		288	}

drivers/md/persistent-data/dm-btree.c+1−6

 	struct btree_node *n;
 	struct dm_btree_value_type le64_type;
-	le64_type.context = NULL;
+	init_le64_type(info->tm, &le64_type);
-	le64_type.size = sizeof(__le64);
-	le64_type.inc = NULL;
-	le64_type.dec = NULL;
-	le64_type.equal = NULL;
 	init_shadow_spine(&spine, info);
 	for (level = 0; level < (info->levels - 1); level++) {

drivers/md/raid1.c+6−4

 {
 	char b[BDEVNAME_SIZE];
 	struct r1conf *conf = mddev->private;
+	unsigned long flags;
 	/*
 	 * If it is not operational, then we have already marked it as dead
 		return;
 	}
 	set_bit(Blocked, &rdev->flags);
+	spin_lock_irqsave(&conf->device_lock, flags);
 	if (test_and_clear_bit(In_sync, &rdev->flags)) {
-		unsigned long flags;
-		spin_lock_irqsave(&conf->device_lock, flags);
 		mddev->degraded++;
 		set_bit(Faulty, &rdev->flags);
-		spin_unlock_irqrestore(&conf->device_lock, flags);
 	} else
 		set_bit(Faulty, &rdev->flags);
+	spin_unlock_irqrestore(&conf->device_lock, flags);
 	/*
 	 * if recovery is running, make sure it aborts.
 	 */
 	 * Find all failed disks within the RAID1 configuration
 	 * and mark them readable.
 	 * Called under mddev lock, so rcu protection not needed.
+	 * device_lock used to avoid races with raid1_end_read_request
+	 * which expects 'In_sync' flags and ->degraded to be consistent.
 	 */
+	spin_lock_irqsave(&conf->device_lock, flags);
 	for (i = 0; i < conf->raid_disks; i++) {
 		struct md_rdev *rdev = conf->mirrors[i].rdev;
 		struct md_rdev *repl = conf->mirrors[conf->raid_disks + i].rdev;
 			sysfs_notify_dirent_safe(rdev->sysfs_state);
 		}
 	}
-	spin_lock_irqsave(&conf->device_lock, flags);
 	mddev->degraded -= count;
 	spin_unlock_irqrestore(&conf->device_lock, flags);

drivers/md/raid5.c+3−2

 static int drop_one_stripe(struct r5conf *conf)
 {
 	struct stripe_head *sh;
-	int hash = (conf->max_nr_stripes - 1) % NR_STRIPE_HASH_LOCKS;
+	int hash = (conf->max_nr_stripes - 1) & STRIPE_HASH_LOCKS_MASK;
 	spin_lock_irq(conf->hash_locks + hash);
 	sh = get_free_stripe(conf, hash);
 	if (mutex_trylock(&conf->cache_size_mutex)) {
 		ret= 0;
-		while (ret < sc->nr_to_scan) {
+		while (ret < sc->nr_to_scan &&
+		       conf->max_nr_stripes > conf->min_nr_stripes) {
 			if (drop_one_stripe(conf) == 0) {
 				ret = SHRINK_STOP;
 				break;

drivers/memory/omap-gpmc.c+6−0

 {
 	int i;
+	if (!gpmc_base)
+		return;
 	gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG);
 	gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE);
 	gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL);
 {
 	int i;
+	if (!gpmc_base)
+		return;
 	gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig);
 	gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable);
 	gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl);

drivers/mfd/Kconfig+1−1

@@ -115,7 +115,7 @@ config MFD_CROS_EC_I2C · 114 unmodified lines
115		115
116	config MFD_CROS_EC_SPI	116	config MFD_CROS_EC_SPI
117	tristate "ChromeOS Embedded Controller (SPI)"	117	tristate "ChromeOS Embedded Controller (SPI)"
118	depends on MFD_CROS_EC && CROS_EC_PROTO && SPI && OF	118	depends on MFD_CROS_EC && CROS_EC_PROTO && SPI
119		119
120	---help---	120	---help---
121	If you say Y here, you get support for talking to the ChromeOS EC	121	If you say Y here, you get support for talking to the ChromeOS EC

drivers/mfd/arizona-core.c+7−9

 		arizona->has_fully_powered_off = true;
-		disable_irq(arizona->irq);
+		disable_irq_nosync(arizona->irq);
 		arizona_enable_reset(arizona);
 		regulator_bulk_disable(arizona->num_core_supplies,
 				       arizona->core_supplies);
 			     arizona->pdata.gpio_defaults[i]);
 	}
-	pm_runtime_set_autosuspend_delay(arizona->dev, 100);
-	pm_runtime_use_autosuspend(arizona->dev);
-	pm_runtime_enable(arizona->dev);
 	/* Chip default */
 	if (!arizona->pdata.clk32k_src)
 		arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
 					   arizona->pdata.spk_fmt[i]);
 	}
+	pm_runtime_set_active(arizona->dev);
+	pm_runtime_enable(arizona->dev);
 	/* Set up for interrupts */
 	ret = arizona_irq_init(arizona);
 	if (ret != 0)
 		goto err_reset;
+	pm_runtime_set_autosuspend_delay(arizona->dev, 100);
+	pm_runtime_use_autosuspend(arizona->dev);
 	arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
 			    arizona_clkgen_err, arizona);
 	arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
 		goto err_irq;
 	}
-#ifdef CONFIG_PM
-	regulator_disable(arizona->dcvdd);
-#endif
 	return 0;
 err_irq:

drivers/misc/eeprom/at24.c+0−3

@@ -438,9 +438,6 @@ static ssize_t at24_bin_write(struct file filp, struct kobject kobj, · 437 unmodified lines
438	{	438	{
439	struct at24_data *at24;	439	struct at24_data *at24;
440		440
441	if (unlikely(off >= attr->size))
442	return -EFBIG;
443
444	at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));	441	at24 = dev_get_drvdata(container_of(kobj, struct device, kobj));
445	return at24_write(at24, buf, off, count);	442	return at24_write(at24, buf, off, count);
446	}	443	}

drivers/net/bonding/bond_main.c+1−0

@@ -786,6 +786,7 @@ static bool bond_should_notify_peers(struct bonding *bond) · 785 unmodified lines
786	slave ? slave->dev->name : "NULL");	786	slave ? slave->dev->name : "NULL");
787		787
788	if (!slave \|\| !bond->send_peer_notif \|\|	788	if (!slave \|\| !bond->send_peer_notif \|\|
		789	!netif_carrier_ok(bond->dev) \|\|
789	test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state))	790	test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state))
790	return false;	791	return false;
791		792

drivers/net/ethernet/3com/3c59x.c+8−9

 			vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
 		}
 		if (i != RX_RING_SIZE) {
-			int j;
 			pr_emerg("%s: no memory for rx ring\n", dev->name);
-			for (j = 0; j < i; j++) {
-				if (vp->rx_skbuff[j]) {
-					dev_kfree_skb(vp->rx_skbuff[j]);
-					vp->rx_skbuff[j] = NULL;
-				}
-			}
 			retval = -ENOMEM;
-			goto err_free_irq;
+			goto err_free_skb;
 		}
 		/* Wrap the ring. */
 		vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
 	if (!retval)
 		goto out;
-err_free_irq:
+err_free_skb:
+	for (i = 0; i < RX_RING_SIZE; i++) {
+		if (vp->rx_skbuff[i]) {
+			dev_kfree_skb(vp->rx_skbuff[i]);
+			vp->rx_skbuff[i] = NULL;
+		}
+	}
 	free_irq(dev->irq, dev);
 err:
 	if (vortex_debug > 1)

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c+1−1

 	if (likely(skb)) {
 		(*pkts_compl)++;
 		(*bytes_compl) += skb->len;
+		dev_kfree_skb_any(skb);
 	}
-	dev_kfree_skb_any(skb);
 	tx_buf->first_bd = 0;
 	tx_buf->skb = NULL;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c+16−0

@@ -1718,6 +1718,22 @@ static int bnx2x_nvram_write(struct bnx2x bp, u32 offset, u8 data_buf, · 1717 unmodified lines
1718	offset += sizeof(u32);	1718	offset += sizeof(u32);
1719	data_buf += sizeof(u32);	1719	data_buf += sizeof(u32);
1720	written_so_far += sizeof(u32);	1720	written_so_far += sizeof(u32);
		1721
		1722	/* At end of each 4Kb page, release nvram lock to allow MFW
		1723	* chance to take it for its own use.
		1724	*/
		1725	if ((cmd_flags & MCPR_NVM_COMMAND_LAST) &&
		1726	(written_so_far < buf_size)) {
		1727	DP(BNX2X_MSG_ETHTOOL \| BNX2X_MSG_NVM,
		1728	"Releasing NVM lock after offset 0x%x\n",
		1729	(u32)(offset - sizeof(u32)));
		1730	bnx2x_release_nvram_lock(bp);
		1731	usleep_range(1000, 2000);
		1732	rc = bnx2x_acquire_nvram_lock(bp);
		1733	if (rc)
		1734	return rc;
		1735	}
		1736
1721	cmd_flags = 0;	1737	cmd_flags = 0;
1722	}	1738	}
1723		1739

drivers/net/ethernet/brocade/bna/bnad.c+1−1

 			if (!next_cmpl->valid)
 				break;
 		}
+		packets++;
 		/* TODO: BNA_CQ_EF_LOCAL ? */
 		if (unlikely(flags & (BNA_CQ_EF_MAC_ERROR |
 		else
 			bnad_cq_setup_skb_frags(rcb, skb, sop_ci, nvecs, len);
-		packets++;
 		rcb->rxq->rx_packets++;
 		rcb->rxq->rx_bytes += totlen;
 		ccb->bytes_per_intr += totlen;

drivers/net/ethernet/cadence/macb.c+83−42

 	return bp->rx_buffers + bp->rx_buffer_size * macb_rx_ring_wrap(index);
 }
+/* I/O accessors */
+static u32 hw_readl_native(struct macb *bp, int offset)
+{
+	return __raw_readl(bp->regs + offset);
+}
+static void hw_writel_native(struct macb *bp, int offset, u32 value)
+{
+	__raw_writel(value, bp->regs + offset);
+}
+static u32 hw_readl(struct macb *bp, int offset)
+{
+	return readl_relaxed(bp->regs + offset);
+}
+static void hw_writel(struct macb *bp, int offset, u32 value)
+{
+	writel_relaxed(value, bp->regs + offset);
+}
+/*
+ * Find the CPU endianness by using the loopback bit of NCR register. When the
+ * CPU is in big endian we need to program swaped mode for management
+ * descriptor access.
+ */
+static bool hw_is_native_io(void __iomem *addr)
+{
+	u32 value = MACB_BIT(LLB);
+	__raw_writel(value, addr + MACB_NCR);
+	value = __raw_readl(addr + MACB_NCR);
+	/* Write 0 back to disable everything */
+	__raw_writel(0, addr + MACB_NCR);
+	return value == MACB_BIT(LLB);
+}
+static bool hw_is_gem(void __iomem *addr, bool native_io)
+{
+	u32 id;
+	if (native_io)
+		id = __raw_readl(addr + MACB_MID);
+	else
+		id = readl_relaxed(addr + MACB_MID);
+	return MACB_BFEXT(IDNUM, id) >= 0x2;
+}
 static void macb_set_hwaddr(struct macb *bp)
 {
 	u32 bottom;
 		}
 	}
-	netdev_info(bp->dev, "invalid hw address, using random\n");
+	dev_info(&bp->pdev->dev, "invalid hw address, using random\n");
 	eth_hw_addr_random(bp->dev);
 }
 	struct macb *bp = netdev_priv(dev);
 	struct phy_device *phydev = bp->phy_dev;
 	unsigned long flags;
 	int status_change = 0;
 	spin_lock_irqsave(&bp->lock, flags);
 static void macb_update_stats(struct macb *bp)
 {
-	u32 __iomem *reg = bp->regs + MACB_PFR;
 	u32 *p = &bp->hw_stats.macb.rx_pause_frames;
 	u32 *end = &bp->hw_stats.macb.tx_pause_frames + 1;
+	int offset = MACB_PFR;
 	WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
-	for(; p < end; p++, reg++)
+	for(; p < end; p++, offset += 4)
-		*p += readl_relaxed(reg);
+		*p += bp->macb_reg_readl(bp, offset);
 }
 static int macb_halt_tx(struct macb *bp)
 }
 #endif
-static inline unsigned int macb_count_tx_descriptors(struct macb *bp,
-						     unsigned int len)
-{
-	return (len + bp->max_tx_length - 1) / bp->max_tx_length;
-}
 static unsigned int macb_tx_map(struct macb *bp,
 				struct macb_queue *queue,
 				struct sk_buff *skb)
 	 * socket buffer: skb fragments of jumbo frames may need to be
 	 * splitted into many buffer descriptors.
 	 */
-	count = macb_count_tx_descriptors(bp, skb_headlen(skb));
+	count = DIV_ROUND_UP(skb_headlen(skb), bp->max_tx_length);
 	nr_frags = skb_shinfo(skb)->nr_frags;
 	for (f = 0; f < nr_frags; f++) {
 		frag_size = skb_frag_size(&skb_shinfo(skb)->frags[f]);
-		count += macb_count_tx_descriptors(bp, frag_size);
+		count += DIV_ROUND_UP(frag_size, bp->max_tx_length);
 	}
 	spin_lock_irqsave(&bp->lock, flags);
 static void macb_configure_dma(struct macb *bp)
 {
 	u32 dmacfg;
-	u32 tmp, ncr;
 	if (macb_is_gem(bp)) {
 		dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
 		dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);
 		dmacfg &= ~GEM_BIT(ENDIA_PKT);
-		/* Find the CPU endianness by using the loopback bit of net_ctrl
+		if (bp->native_io)
-		 * register. save it first. When the CPU is in big endian we
-		 * need to program swaped mode for management descriptor access.
-		 */
-		ncr = macb_readl(bp, NCR);
-		__raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR);
-		tmp =  __raw_readl(bp->regs + MACB_NCR);
-		if (tmp == MACB_BIT(LLB))
 			dmacfg &= ~GEM_BIT(ENDIA_DESC);
 		else
 			dmacfg |= GEM_BIT(ENDIA_DESC); /* CPU in big endian */
-		/* Restore net_ctrl */
-		macb_writel(bp, NCR, ncr);
 		if (bp->dev->features & NETIF_F_HW_CSUM)
 			dmacfg |= GEM_BIT(TXCOEN);
 		else
 static void gem_update_stats(struct macb *bp)
 {
-	int i;
+	unsigned int i;
 	u32 *p = &bp->hw_stats.gem.tx_octets_31_0;
 	for (i = 0; i < GEM_STATS_LEN; ++i, ++p) {
 		u32 offset = gem_statistics[i].offset;
-		u64 val = readl_relaxed(bp->regs + offset);
+		u64 val = bp->macb_reg_readl(bp, offset);
 		bp->ethtool_stats[i] += val;
 		*p += val;
 		if (offset == GEM_OCTTXL || offset == GEM_OCTRXL) {
 			/* Add GEM_OCTTXH, GEM_OCTRXH */
-			val = readl_relaxed(bp->regs + offset + 4);
+			val = bp->macb_reg_readl(bp, offset + 4);
 			bp->ethtool_stats[i] += ((u64)val) << 32;
 			*(++p) += val;
 		}
 static void gem_get_ethtool_strings(struct net_device *dev, u32 sset, u8 *p)
 {
-	int i;
+	unsigned int i;
 	switch (sset) {
 	case ETH_SS_STATS:
 	if (dt_conf)
 		bp->caps = dt_conf->caps;
-	if (macb_is_gem_hw(bp->regs)) {
+	if (hw_is_gem(bp->regs, bp->native_io)) {
 		bp->caps |= MACB_CAPS_MACB_IS_GEM;
 		dcfg = gem_readl(bp, DCFG1);
 			bp->caps |= MACB_CAPS_FIFO_MODE;
 	}
-	netdev_dbg(bp->dev, "Cadence caps 0x%08x\n", bp->caps);
+	dev_dbg(&bp->pdev->dev, "Cadence caps 0x%08x\n", bp->caps);
 }
 static void macb_probe_queues(void __iomem *mem,
+			      bool native_io,
 			      unsigned int *queue_mask,
 			      unsigned int *num_queues)
 {
 	 * we are early in the probe process and don't have the
 	 * MACB_CAPS_MACB_IS_GEM flag positioned
 	 */
-	if (!macb_is_gem_hw(mem))
+	if (!hw_is_gem(mem, native_io))
 		return;
 	/* bit 0 is never set but queue 0 always exists */
 	struct clk *pclk, *hclk, *tx_clk;
 	unsigned int queue_mask, num_queues;
 	struct macb_platform_data *pdata;
+	bool native_io;
 	struct phy_device *phydev;
 	struct net_device *dev;
 	struct resource *regs;
 	struct macb *bp;
 	int err;
+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	mem = devm_ioremap_resource(&pdev->dev, regs);
+	if (IS_ERR(mem))
+		return PTR_ERR(mem);
 	if (np) {
 		const struct of_device_id *match;
 	if (err)
 		return err;
-	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	native_io = hw_is_native_io(mem);
-	mem = devm_ioremap_resource(&pdev->dev, regs);
-	if (IS_ERR(mem)) {
-		err = PTR_ERR(mem);
-		goto err_disable_clocks;
-	}
-	macb_probe_queues(mem, &queue_mask, &num_queues);
+	macb_probe_queues(mem, native_io, &queue_mask, &num_queues);
 	dev = alloc_etherdev_mq(sizeof(*bp), num_queues);
 	if (!dev) {
 		err = -ENOMEM;
 	bp->pdev = pdev;
 	bp->dev = dev;
 	bp->regs = mem;
+	bp->native_io = native_io;
+	if (native_io) {
+		bp->macb_reg_readl = hw_readl_native;
+		bp->macb_reg_writel = hw_writel_native;
+	} else {
+		bp->macb_reg_readl = hw_readl;
+		bp->macb_reg_writel = hw_writel;
+	}
 	bp->num_queues = num_queues;
 	bp->queue_mask = queue_mask;
 	if (macb_config)
 	bp->pclk = pclk;
 	bp->hclk = hclk;
 	bp->tx_clk = tx_clk;
-	if (macb_config->jumbo_max_len) {
+	if (macb_config)
 		bp->jumbo_max_len = macb_config->jumbo_max_len;
-	}
 	spin_lock_init(&bp->lock);

drivers/net/ethernet/cadence/macb.h+14−20

 	 | GEM_BF(name, value))
 /* Register access macros */
-#define macb_readl(port,reg)				\
+#define macb_readl(port, reg)		(port)->macb_reg_readl((port), MACB_##reg)
-	readl_relaxed((port)->regs + MACB_##reg)
+#define macb_writel(port, reg, value)	(port)->macb_reg_writel((port), MACB_##reg, (value))
-#define macb_writel(port,reg,value)			\
+#define gem_readl(port, reg)		(port)->macb_reg_readl((port), GEM_##reg)
-	writel_relaxed((value), (port)->regs + MACB_##reg)
+#define gem_writel(port, reg, value)	(port)->macb_reg_writel((port), GEM_##reg, (value))
-#define gem_readl(port, reg)				\
+#define queue_readl(queue, reg)		(queue)->bp->macb_reg_readl((queue)->bp, (queue)->reg)
-	readl_relaxed((port)->regs + GEM_##reg)
+#define queue_writel(queue, reg, value)	(queue)->bp->macb_reg_writel((queue)->bp, (queue)->reg, (value))
-#define gem_writel(port, reg, value)			\
-	writel_relaxed((value), (port)->regs + GEM_##reg)
-#define queue_readl(queue, reg)				\
-	readl_relaxed((queue)->bp->regs + (queue)->reg)
-#define queue_writel(queue, reg, value)			\
-	writel_relaxed((value), (queue)->bp->regs + (queue)->reg)
 /* Conditional GEM/MACB macros.  These perform the operation to the correct
  * register dependent on whether the device is a GEM or a MACB.  For registers
 struct macb {
 	void __iomem		*regs;
+	bool			native_io;
+	/* hardware IO accessors */
+	u32	(*macb_reg_readl)(struct macb *bp, int offset);
+	void	(*macb_reg_writel)(struct macb *bp, int offset, u32 value);
 	unsigned int		rx_tail;
 	unsigned int		rx_prepared_head;
 	struct mii_bus		*mii_bus;
 	struct phy_device	*phy_dev;
-	unsigned int 		link;
+	int 			link;
-	unsigned int 		speed;
+	int 			speed;
-	unsigned int 		duplex;
+	int 			duplex;
 	u32			caps;
 	unsigned int		dma_burst_length;
 	return !!(bp->caps & MACB_CAPS_MACB_IS_GEM);
 }
-static inline bool macb_is_gem_hw(void __iomem *addr)
-{
-	return !!(MACB_BFEXT(IDNUM, readl_relaxed(addr + MACB_MID)) >= 0x2);
-}
 #endif /* _MACB_H */

drivers/net/ethernet/cavium/Kconfig+0−3

 config THUNDER_NIC_PF
 	tristate "Thunder Physical function driver"
 	depends on 64BIT
-	default ARCH_THUNDER
 	select THUNDER_NIC_BGX
 	---help---
 	  This driver supports Thunder's NIC physical function.
 config THUNDER_NIC_VF
 	tristate "Thunder Virtual function driver"
 	depends on 64BIT
-	default ARCH_THUNDER
 	---help---
 	  This driver supports Thunder's NIC virtual function
 config	THUNDER_NIC_BGX
 	tristate "Thunder MAC interface driver (BGX)"
 	depends on 64BIT
-	default ARCH_THUNDER
 	---help---
 	  This driver supports programming and controlling of MAC
 	  interface from NIC physical function driver.

drivers/net/ethernet/cavium/thunder/nic.h+11−1

  */
 #define NICPF_CLK_PER_INT_TICK		2
+/* Time to wait before we decide that a SQ is stuck.
+ *
+ * Since both pkt rx and tx notifications are done with same CQ,
+ * when packets are being received at very high rate (eg: L2 forwarding)
+ * then freeing transmitted skbs will be delayed and watchdog
+ * will kick in, resetting interface. Hence keeping this value high.
+ */
+#define	NICVF_TX_TIMEOUT		(50 * HZ)
 struct nicvf_cq_poll {
 	u8	cq_idx;		/* Completion queue index */
 	struct	napi_struct napi;
 	/* Tx */
 	u64 tx_frames_ok;
 	u64 tx_drops;
-	u64 tx_busy;
 	u64 tx_tso;
+	u64 txq_stop;
+	u64 txq_wake;
 };
 struct nicvf {

drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c+16−10

 	NICVF_DRV_STAT(rx_frames_jumbo),
 	NICVF_DRV_STAT(rx_drops),
 	NICVF_DRV_STAT(tx_frames_ok),
-	NICVF_DRV_STAT(tx_busy),
 	NICVF_DRV_STAT(tx_tso),
 	NICVF_DRV_STAT(tx_drops),
+	NICVF_DRV_STAT(txq_stop),
+	NICVF_DRV_STAT(txq_wake),
 };
 static const struct nicvf_stat nicvf_queue_stats[] = {
 static void nicvf_get_strings(struct net_device *netdev, u32 sset, u8 *data)
 {
+	struct nicvf *nic = netdev_priv(netdev);
 	int stats, qidx;
 	if (sset != ETH_SS_STATS)
 		data += ETH_GSTRING_LEN;
 	}
-	for (qidx = 0; qidx < MAX_RCV_QUEUES_PER_QS; qidx++) {
+	for (qidx = 0; qidx < nic->qs->rq_cnt; qidx++) {
 		for (stats = 0; stats < nicvf_n_queue_stats; stats++) {
 			sprintf(data, "rxq%d: %s", qidx,
 				nicvf_queue_stats[stats].name);
 		}
 	}
-	for (qidx = 0; qidx < MAX_SND_QUEUES_PER_QS; qidx++) {
+	for (qidx = 0; qidx < nic->qs->sq_cnt; qidx++) {
 		for (stats = 0; stats < nicvf_n_queue_stats; stats++) {
 			sprintf(data, "txq%d: %s", qidx,
 				nicvf_queue_stats[stats].name);
 static int nicvf_get_sset_count(struct net_device *netdev, int sset)
 {
+	struct nicvf *nic = netdev_priv(netdev);
 	if (sset != ETH_SS_STATS)
 		return -EINVAL;
 	return nicvf_n_hw_stats + nicvf_n_drv_stats +
 		(nicvf_n_queue_stats *
-		 (MAX_RCV_QUEUES_PER_QS + MAX_SND_QUEUES_PER_QS)) +
+		 (nic->qs->rq_cnt + nic->qs->sq_cnt)) +
 		BGX_RX_STATS_COUNT + BGX_TX_STATS_COUNT;
 }
 		*(data++) = ((u64 *)&nic->drv_stats)
 				[nicvf_drv_stats[stat].index];
-	for (qidx = 0; qidx < MAX_RCV_QUEUES_PER_QS; qidx++) {
+	for (qidx = 0; qidx < nic->qs->rq_cnt; qidx++) {
 		for (stat = 0; stat < nicvf_n_queue_stats; stat++)
 			*(data++) = ((u64 *)&nic->qs->rq[qidx].stats)
 					[nicvf_queue_stats[stat].index];
 	}
-	for (qidx = 0; qidx < MAX_SND_QUEUES_PER_QS; qidx++) {
+	for (qidx = 0; qidx < nic->qs->sq_cnt; qidx++) {
 		for (stat = 0; stat < nicvf_n_queue_stats; stat++)
 			*(data++) = ((u64 *)&nic->qs->sq[qidx].stats)
 					[nicvf_queue_stats[stat].index];
 {
 	struct nicvf *nic = netdev_priv(dev);
 	int err = 0;
+	bool if_up = netif_running(dev);
 	if (!channel->rx_count || !channel->tx_count)
 		return -EINVAL;
 	if (channel->tx_count > MAX_SND_QUEUES_PER_QS)
 		return -EINVAL;
+	if (if_up)
+		nicvf_stop(dev);
 	nic->qs->rq_cnt = channel->rx_count;
 	nic->qs->sq_cnt = channel->tx_count;
 	nic->qs->cq_cnt = max(nic->qs->rq_cnt, nic->qs->sq_cnt);
 	if (err)
 		return err;
-	if (!netif_running(dev))
+	if (if_up)
-		return err;
+		nicvf_open(dev);
-	nicvf_stop(dev);
-	nicvf_open(dev);
 	netdev_info(dev, "Setting num Tx rings to %d, Rx rings to %d success\n",
 		    nic->qs->sq_cnt, nic->qs->rq_cnt);

drivers/net/ethernet/cavium/thunder/nicvf_main.c+39−16

 				    nic->duplex == DUPLEX_FULL ?
 				"Full duplex" : "Half duplex");
 			netif_carrier_on(nic->netdev);
-			netif_tx_wake_all_queues(nic->netdev);
+			netif_tx_start_all_queues(nic->netdev);
 		} else {
 			netdev_info(nic->netdev, "%s: Link is Down\n",
 				    nic->netdev->name);
 	if (skb) {
 		prefetch(skb);
 		dev_consume_skb_any(skb);
+		sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
 	}
 }
 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
 				 struct napi_struct *napi, int budget)
 {
-	int processed_cqe, work_done = 0;
+	int processed_cqe, work_done = 0, tx_done = 0;
 	int cqe_count, cqe_head;
 	struct nicvf *nic = netdev_priv(netdev);
 	struct queue_set *qs = nic->qs;
 	struct cmp_queue *cq = &qs->cq[cq_idx];
 	struct cqe_rx_t *cq_desc;
+	struct netdev_queue *txq;
 	spin_lock_bh(&cq->lock);
 loop:
 	cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
 	cqe_head &= 0xFFFF;
-	netdev_dbg(nic->netdev, "%s cqe_count %d cqe_head %d\n",
+	netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n",
-		   __func__, cqe_count, cqe_head);
+		   __func__, cq_idx, cqe_count, cqe_head);
 	while (processed_cqe < cqe_count) {
 		/* Get the CQ descriptor */
 		cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
 			break;
 		}
-		netdev_dbg(nic->netdev, "cq_desc->cqe_type %d\n",
+		netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n",
-			   cq_desc->cqe_type);
+			   cq_idx, cq_desc->cqe_type);
 		switch (cq_desc->cqe_type) {
 		case CQE_TYPE_RX:
 			nicvf_rcv_pkt_handler(netdev, napi, cq,
 		case CQE_TYPE_SEND:
 			nicvf_snd_pkt_handler(netdev, cq,
 					      (void *)cq_desc, CQE_TYPE_SEND);
+			tx_done++;
 		break;
 		case CQE_TYPE_INVALID:
 		case CQE_TYPE_RX_SPLIT:
 		}
 		processed_cqe++;
 	}
-	netdev_dbg(nic->netdev, "%s processed_cqe %d work_done %d budget %d\n",
+	netdev_dbg(nic->netdev,
-		   __func__, processed_cqe, work_done, budget);
+		   "%s CQ%d processed_cqe %d work_done %d budget %d\n",
+		   __func__, cq_idx, processed_cqe, work_done, budget);
 	/* Ring doorbell to inform H/W to reuse processed CQEs */
 	nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
 		goto loop;
 done:
+	/* Wakeup TXQ if its stopped earlier due to SQ full */
+	if (tx_done) {
+		txq = netdev_get_tx_queue(netdev, cq_idx);
+		if (netif_tx_queue_stopped(txq)) {
+			netif_tx_start_queue(txq);
+			nic->drv_stats.txq_wake++;
+			if (netif_msg_tx_err(nic))
+				netdev_warn(netdev,
+					    "%s: Transmit queue wakeup SQ%d\n",
+					    netdev->name, cq_idx);
+		}
+	}
 	spin_unlock_bh(&cq->lock);
 	return work_done;
 }
 	struct net_device *netdev = napi->dev;
 	struct nicvf *nic = netdev_priv(netdev);
 	struct nicvf_cq_poll *cq;
-	struct netdev_queue *txq;
 	cq = container_of(napi, struct nicvf_cq_poll, napi);
 	work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
-	txq = netdev_get_tx_queue(netdev, cq->cq_idx);
-	if (netif_tx_queue_stopped(txq))
-		netif_tx_wake_queue(txq);
 	if (work_done < budget) {
 		/* Slow packet rate, exit polling */
 		napi_complete(napi);
 		return NETDEV_TX_OK;
 	}
-	if (!nicvf_sq_append_skb(nic, skb) && !netif_tx_queue_stopped(txq)) {
+	if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) {
 		netif_tx_stop_queue(txq);
-		nic->drv_stats.tx_busy++;
+		nic->drv_stats.txq_stop++;
 		if (netif_msg_tx_err(nic))
 			netdev_warn(netdev,
 				    "%s: Transmit ring full, stopping SQ%d\n",
 	nicvf_send_msg_to_pf(nic, &mbx);
 	netif_carrier_off(netdev);
-	netif_tx_disable(netdev);
 	/* Disable RBDR & QS error interrupts */
 	for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
 		kfree(cq_poll);
 	}
+	netif_tx_disable(netdev);
 	/* Free resources */
 	nicvf_config_data_transfer(nic, false);
 	for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
 		nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
+	nic->drv_stats.txq_stop = 0;
+	nic->drv_stats.txq_wake = 0;
 	netif_carrier_on(netdev);
 	netif_tx_start_all_queues(netdev);
 	netdev->hw_features = netdev->features;
 	netdev->netdev_ops = &nicvf_netdev_ops;
+	netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
 	INIT_WORK(&nic->reset_task, nicvf_reset_task);
 	pci_disable_device(pdev);
 }
+static void nicvf_shutdown(struct pci_dev *pdev)
+{
+	nicvf_remove(pdev);
+}
 static struct pci_driver nicvf_driver = {
 	.name = DRV_NAME,
 	.id_table = nicvf_id_table,
 	.probe = nicvf_probe,
 	.remove = nicvf_remove,
+	.shutdown = nicvf_shutdown,
 };
 static int __init nicvf_init_module(void)

drivers/net/ethernet/cavium/thunder/nicvf_queues.c+11−6

 	/* Allocate a new page */
 	if (!nic->rb_page) {
-		nic->rb_page = alloc_pages(gfp | __GFP_COMP, order);
+		nic->rb_page = alloc_pages(gfp | __GFP_COMP | __GFP_NOWARN,
+					   order);
 		if (!nic->rb_page) {
-			netdev_err(nic->netdev, "Failed to allocate new rcv buffer\n");
+			netdev_err(nic->netdev,
+				   "Failed to allocate new rcv buffer\n");
 			return -ENOMEM;
 		}
 		nic->rb_page_offset = 0;
 		return;
 	if (sq->tso_hdrs)
-		dma_free_coherent(&nic->pdev->dev, sq->dmem.q_len,
+		dma_free_coherent(&nic->pdev->dev,
+				  sq->dmem.q_len * TSO_HEADER_SIZE,
 				  sq->tso_hdrs, sq->tso_hdrs_phys);
 	kfree(sq->skbuff);
 			continue;
 		}
 		skb = (struct sk_buff *)sq->skbuff[sq->head];
+		if (skb)
+			dev_kfree_skb_any(skb);
 		atomic64_add(1, (atomic64_t *)&netdev->stats.tx_packets);
 		atomic64_add(hdr->tot_len,
 			     (atomic64_t *)&netdev->stats.tx_bytes);
-		dev_kfree_skb_any(skb);
 		nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
 	}
 }
 	memset(gather, 0, SND_QUEUE_DESC_SIZE);
 	gather->subdesc_type = SQ_DESC_TYPE_GATHER;
-	gather->ld_type = NIC_SEND_LD_TYPE_E_LDWB;
+	gather->ld_type = NIC_SEND_LD_TYPE_E_LDD;
 	gather->size = size;
 	gather->addr = data;
 }
 		}
 		nicvf_sq_add_hdr_subdesc(sq, hdr_qentry,
 					 seg_subdescs - 1, skb, seg_len);
-		sq->skbuff[hdr_qentry] = 0;
+		sq->skbuff[hdr_qentry] = (u64)NULL;
 		qentry = nicvf_get_nxt_sqentry(sq, qentry);
 		desc_cnt += seg_subdescs;
 	/* Inform HW to xmit all TSO segments */
 	nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_DOOR,
 			      skb_get_queue_mapping(skb), desc_cnt);
+	nic->drv_stats.tx_tso++;
 	return 1;
 }

drivers/net/ethernet/cavium/thunder/nicvf_queues.h+11−3

 #define SND_QUEUE_CNT		8
 #define CMP_QUEUE_CNT		8 /* Max of RCV and SND qcount */
-#define SND_QSIZE		SND_QUEUE_SIZE4
+#define SND_QSIZE		SND_QUEUE_SIZE2
 #define SND_QUEUE_LEN		(1ULL << (SND_QSIZE + 10))
 #define MAX_SND_QUEUE_LEN	(1ULL << (SND_QUEUE_SIZE6 + 10))
 #define SND_QUEUE_THRESH	2ULL
 /* Since timestamp not enabled, otherwise 2 */
 #define MAX_CQE_PER_PKT_XMIT		1
-#define CMP_QSIZE		CMP_QUEUE_SIZE4
+/* Keep CQ and SQ sizes same, if timestamping
+ * is enabled this equation will change.
+ */
+#define CMP_QSIZE		CMP_QUEUE_SIZE2
 #define CMP_QUEUE_LEN		(1ULL << (CMP_QSIZE + 10))
 #define CMP_QUEUE_CQE_THRESH	0
 #define CMP_QUEUE_TIMER_THRESH	220 /* 10usec */
 #define MAX_CQES_FOR_TX		((SND_QUEUE_LEN / MIN_SQ_DESC_PER_PKT_XMIT) * \
 				 MAX_CQE_PER_PKT_XMIT)
-#define RQ_CQ_DROP		((CMP_QUEUE_LEN - MAX_CQES_FOR_TX) / 256)
+/* Calculate number of CQEs to reserve for all SQEs.
+ * Its 1/256th level of CQ size.
+ * '+ 1' to account for pipelining
+ */
+#define RQ_CQ_DROP		((256 / (CMP_QUEUE_LEN / \
+				 (CMP_QUEUE_LEN - MAX_CQES_FOR_TX))) + 1)
 /* Descriptor size in bytes */
 #define SND_QUEUE_DESC_SIZE	16

drivers/net/ethernet/cavium/thunder/thunder_bgx.c+4−1

 	bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cmrx_cfg);
 	bgx_flush_dmac_addrs(bgx, lmacid);
-	if (lmac->phydev)
+	if ((bgx->lmac_type != BGX_MODE_XFI) &&
+	    (bgx->lmac_type != BGX_MODE_XLAUI) &&
+	    (bgx->lmac_type != BGX_MODE_40G_KR) &&
+	    (bgx->lmac_type != BGX_MODE_10G_KR) && lmac->phydev)
 		phy_disconnect(lmac->phydev);
 	lmac->phydev = NULL;

drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c+2−1

 					EXT_MEM1_SIZE_G(size));
 		}
 	} else {
-		if (i & EXT_MEM_ENABLE_F)
+		if (i & EXT_MEM_ENABLE_F) {
 			size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
 			add_debugfs_mem(adap, "mc", MEM_MC,
 					EXT_MEM_SIZE_G(size));
+		}
 	}
 	de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap,

drivers/net/ethernet/emulex/benet/be_cmds.h+5−0

 					 BE_IF_FLAGS_VLAN_PROMISCUOUS |\
 					 BE_IF_FLAGS_MCAST_PROMISCUOUS)
+#define BE_IF_EN_FLAGS	(BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PASS_L3L4_ERRORS |\
+			BE_IF_FLAGS_MULTICAST | BE_IF_FLAGS_UNTAGGED)
+#define BE_IF_ALL_FILT_FLAGS	(BE_IF_EN_FLAGS | BE_IF_FLAGS_ALL_PROMISCUOUS)
 /* An RX interface is an object with one or more MAC addresses and
  * filtering capabilities. */
 struct be_cmd_req_if_create {

drivers/net/ethernet/emulex/benet/be_main.c+120−67

@@ -273,6 +273,10 @@ static int be_mac_addr_set(struct net_device netdev, void p) · 272 unmodified lines
273	if (ether_addr_equal(addr->sa_data, netdev->dev_addr))	273	if (ether_addr_equal(addr->sa_data, netdev->dev_addr))
274	return 0;	274	return 0;
275		275
		276	/* if device is not running, copy MAC to netdev->dev_addr */
		277	if (!netif_running(netdev))
		278	goto done;
		279
276	/* The PMAC_ADD cmd may fail if the VF doesn't have FILTMGMT	280	/* The PMAC_ADD cmd may fail if the VF doesn't have FILTMGMT
277	* privilege or if PF did not provision the new MAC address.	281	* privilege or if PF did not provision the new MAC address.
278	* On BE3, this cmd will always fail if the VF doesn't have the	282	* On BE3, this cmd will always fail if the VF doesn't have the
@@ -307,9 +311,9 @@ static int be_mac_addr_set(struct net_device netdev, void p) · 28 unmodified lines
307	status = -EPERM;	311	status = -EPERM;
308	goto err;	312	goto err;
309	}	313	}
310		314	done:
311	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);	315	ether_addr_copy(netdev->dev_addr, addr->sa_data);
312	dev_info(dev, "MAC address changed to %pM\n", mac);	316	dev_info(dev, "MAC address changed to %pM\n", addr->sa_data);
313	return 0;	317	return 0;
314	err:	318	err:
315	dev_warn(dev, "MAC address change to %pM failed\n", addr->sa_data);	319	dev_warn(dev, "MAC address change to %pM failed\n", addr->sa_data);
@@ -2447,10 +2451,24 @@ static void be_eq_clean(struct be_eq_obj *eqo) · 2131 unmodified lines
2447	be_eq_notify(eqo->adapter, eqo->q.id, false, true, num, 0);	2451	be_eq_notify(eqo->adapter, eqo->q.id, false, true, num, 0);
2448	}	2452	}
2449		2453
2450	static void be_rx_cq_clean(struct be_rx_obj *rxo)	2454	/* Free posted rx buffers that were not used */
		2455	static void be_rxq_clean(struct be_rx_obj *rxo)
2451	{	2456	{
2452	struct be_rx_page_info *page_info;
2453	struct be_queue_info *rxq = &rxo->q;	2457	struct be_queue_info *rxq = &rxo->q;
		2458	struct be_rx_page_info *page_info;
		2459
		2460	while (atomic_read(&rxq->used) > 0) {
		2461	page_info = get_rx_page_info(rxo);
		2462	put_page(page_info->page);
		2463	memset(page_info, 0, sizeof(*page_info));
		2464	}
		2465	BUG_ON(atomic_read(&rxq->used));
		2466	rxq->tail = 0;
		2467	rxq->head = 0;
		2468	}
		2469
		2470	static void be_rx_cq_clean(struct be_rx_obj *rxo)
		2471	{
2454	struct be_queue_info *rx_cq = &rxo->cq;	2472	struct be_queue_info *rx_cq = &rxo->cq;
2455	struct be_rx_compl_info *rxcp;	2473	struct be_rx_compl_info *rxcp;
2456	struct be_adapter *adapter = rxo->adapter;	2474	struct be_adapter *adapter = rxo->adapter;
@@ -2487,16 +2505,6 @@ static void be_rx_cq_clean(struct be_rx_obj *rxo) · 30 unmodified lines
2487		2505
2488	/* After cleanup, leave the CQ in unarmed state */	2506	/* After cleanup, leave the CQ in unarmed state */
2489	be_cq_notify(adapter, rx_cq->id, false, 0);	2507	be_cq_notify(adapter, rx_cq->id, false, 0);
2490
2491	/* Then free posted rx buffers that were not used */
2492	while (atomic_read(&rxq->used) > 0) {
2493	page_info = get_rx_page_info(rxo);
2494	put_page(page_info->page);
2495	memset(page_info, 0, sizeof(*page_info));
2496	}
2497	BUG_ON(atomic_read(&rxq->used));
2498	rxq->tail = 0;
2499	rxq->head = 0;
2500	}	2508	}
2501		2509
2502	static void be_tx_compl_clean(struct be_adapter *adapter)	2510	static void be_tx_compl_clean(struct be_adapter *adapter)
@@ -2576,8 +2584,8 @@ static void be_evt_queues_destroy(struct be_adapter *adapter) · 73 unmodified lines
2576	be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);	2584	be_cmd_q_destroy(adapter, &eqo->q, QTYPE_EQ);
2577	napi_hash_del(&eqo->napi);	2585	napi_hash_del(&eqo->napi);
2578	netif_napi_del(&eqo->napi);	2586	netif_napi_del(&eqo->napi);
		2587	free_cpumask_var(eqo->affinity_mask);
2579	}	2588	}
2580	free_cpumask_var(eqo->affinity_mask);
2581	be_queue_free(adapter, &eqo->q);	2589	be_queue_free(adapter, &eqo->q);
2582	}	2590	}
2583	}	2591	}
@@ -2594,13 +2602,7 @@ static int be_evt_queues_create(struct be_adapter *adapter) · 10 unmodified lines
2594		2602
2595	for_all_evt_queues(adapter, eqo, i) {	2603	for_all_evt_queues(adapter, eqo, i) {
2596	int numa_node = dev_to_node(&adapter->pdev->dev);	2604	int numa_node = dev_to_node(&adapter->pdev->dev);
2597	if (!zalloc_cpumask_var(&eqo->affinity_mask, GFP_KERNEL))	2605
2598	return -ENOMEM;
2599	cpumask_set_cpu(cpumask_local_spread(i, numa_node),
2600	eqo->affinity_mask);
2601	netif_napi_add(adapter->netdev, &eqo->napi, be_poll,
2602	BE_NAPI_WEIGHT);
2603	napi_hash_add(&eqo->napi);
2604	aic = &adapter->aic_obj[i];	2606	aic = &adapter->aic_obj[i];
2605	eqo->adapter = adapter;	2607	eqo->adapter = adapter;
2606	eqo->idx = i;	2608	eqo->idx = i;
@@ -2616,6 +2618,14 @@ static int be_evt_queues_create(struct be_adapter *adapter) · 9 unmodified lines
2616	rc = be_cmd_eq_create(adapter, eqo);	2618	rc = be_cmd_eq_create(adapter, eqo);
2617	if (rc)	2619	if (rc)
2618	return rc;	2620	return rc;
		2621
		2622	if (!zalloc_cpumask_var(&eqo->affinity_mask, GFP_KERNEL))
		2623	return -ENOMEM;
		2624	cpumask_set_cpu(cpumask_local_spread(i, numa_node),
		2625	eqo->affinity_mask);
		2626	netif_napi_add(adapter->netdev, &eqo->napi, be_poll,
		2627	BE_NAPI_WEIGHT);
		2628	napi_hash_add(&eqo->napi);
2619	}	2629	}
2620	return 0;	2630	return 0;
2621	}	2631	}
@@ -3354,13 +3364,54 @@ static void be_rx_qs_destroy(struct be_adapter *adapter) · 732 unmodified lines
3354	for_all_rx_queues(adapter, rxo, i) {	3364	for_all_rx_queues(adapter, rxo, i) {
3355	q = &rxo->q;	3365	q = &rxo->q;
3356	if (q->created) {	3366	if (q->created) {
		3367	/* If RXQs are destroyed while in an "out of buffer"
		3368	* state, there is a possibility of an HW stall on
		3369	* Lancer. So, post 64 buffers to each queue to relieve
		3370	* the "out of buffer" condition.
		3371	* Make sure there's space in the RXQ before posting.
		3372	*/
		3373	if (lancer_chip(adapter)) {
		3374	be_rx_cq_clean(rxo);
		3375	if (atomic_read(&q->used) == 0)
		3376	be_post_rx_frags(rxo, GFP_KERNEL,
		3377	MAX_RX_POST);
		3378	}
		3379
3357	be_cmd_rxq_destroy(adapter, q);	3380	be_cmd_rxq_destroy(adapter, q);
3358	be_rx_cq_clean(rxo);	3381	be_rx_cq_clean(rxo);
		3382	be_rxq_clean(rxo);
3359	}	3383	}
3360	be_queue_free(adapter, q);	3384	be_queue_free(adapter, q);
3361	}	3385	}
3362	}	3386	}
3363		3387
		3388	static void be_disable_if_filters(struct be_adapter *adapter)
		3389	{
		3390	be_cmd_pmac_del(adapter, adapter->if_handle,
		3391	adapter->pmac_id[0], 0);
		3392
		3393	be_clear_uc_list(adapter);
		3394
		3395	/* The IFACE flags are enabled in the open path and cleared
		3396	* in the close path. When a VF gets detached from the host and
		3397	* assigned to a VM the following happens:
		3398	* - VF's IFACE flags get cleared in the detach path
		3399	* - IFACE create is issued by the VF in the attach path
		3400	* Due to a bug in the BE3/Skyhawk-R FW
		3401	* (Lancer FW doesn't have the bug), the IFACE capability flags
		3402	* specified along with the IFACE create cmd issued by a VF are not
		3403	* honoured by FW. As a consequence, if a new driver
		3404	* (that enables/disables IFACE flags in open/close)
		3405	* is loaded in the host and an old driver is * used by a VM/VF,
		3406	* the IFACE gets created without the needed flags.
		3407	* To avoid this, disable RX-filter flags only for Lancer.
		3408	*/
		3409	if (lancer_chip(adapter)) {
		3410	be_cmd_rx_filter(adapter, BE_IF_ALL_FILT_FLAGS, OFF);
		3411	adapter->if_flags &= ~BE_IF_ALL_FILT_FLAGS;
		3412	}
		3413	}
		3414
3364	static int be_close(struct net_device *netdev)	3415	static int be_close(struct net_device *netdev)
3365	{	3416	{
3366	struct be_adapter *adapter = netdev_priv(netdev);	3417	struct be_adapter *adapter = netdev_priv(netdev);
@@ -3373,6 +3424,8 @@ static int be_close(struct net_device *netdev) · 6 unmodified lines
3373	if (!(adapter->flags & BE_FLAGS_SETUP_DONE))	3424	if (!(adapter->flags & BE_FLAGS_SETUP_DONE))
3374	return 0;	3425	return 0;
3375		3426
		3427	be_disable_if_filters(adapter);
		3428
3376	be_roce_dev_close(adapter);	3429	be_roce_dev_close(adapter);
3377		3430
3378	if (adapter->flags & BE_FLAGS_NAPI_ENABLED) {	3431	if (adapter->flags & BE_FLAGS_NAPI_ENABLED) {
@@ -3392,7 +3445,6 @@ static int be_close(struct net_device *netdev) · 13 unmodified lines
3392	be_tx_compl_clean(adapter);	3445	be_tx_compl_clean(adapter);
3393		3446
3394	be_rx_qs_destroy(adapter);	3447	be_rx_qs_destroy(adapter);
3395	be_clear_uc_list(adapter);
3396		3448
3397	for_all_evt_queues(adapter, eqo, i) {	3449	for_all_evt_queues(adapter, eqo, i) {
3398	if (msix_enabled(adapter))	3450	if (msix_enabled(adapter))
@@ -3477,6 +3529,31 @@ static int be_rx_qs_create(struct be_adapter *adapter) · 78 unmodified lines
3477	return 0;	3529	return 0;
3478	}	3530	}
3479		3531
		3532	static int be_enable_if_filters(struct be_adapter *adapter)
		3533	{
		3534	int status;
		3535
		3536	status = be_cmd_rx_filter(adapter, BE_IF_EN_FLAGS, ON);
		3537	if (status)
		3538	return status;
		3539
		3540	/* For BE3 VFs, the PF programs the initial MAC address */
		3541	if (!(BEx_chip(adapter) && be_virtfn(adapter))) {
		3542	status = be_cmd_pmac_add(adapter, adapter->netdev->dev_addr,
		3543	adapter->if_handle,
		3544	&adapter->pmac_id[0], 0);
		3545	if (status)
		3546	return status;
		3547	}
		3548
		3549	if (adapter->vlans_added)
		3550	be_vid_config(adapter);
		3551
		3552	be_set_rx_mode(adapter->netdev);
		3553
		3554	return 0;
		3555	}
		3556
3480	static int be_open(struct net_device *netdev)	3557	static int be_open(struct net_device *netdev)
3481	{	3558	{
3482	struct be_adapter *adapter = netdev_priv(netdev);	3559	struct be_adapter *adapter = netdev_priv(netdev);
@@ -3490,6 +3567,10 @@ static int be_open(struct net_device *netdev) · 7 unmodified lines
3490	if (status)	3567	if (status)
3491	goto err;	3568	goto err;
3492		3569
		3570	status = be_enable_if_filters(adapter);
		3571	if (status)
		3572	goto err;
		3573
3493	status = be_irq_register(adapter);	3574	status = be_irq_register(adapter);
3494	if (status)	3575	if (status)
3495	goto err;	3576	goto err;
@@ -3686,16 +3767,6 @@ static void be_cancel_err_detection(struct be_adapter *adapter) · 190 unmodified lines
3686	}	3767	}
3687	}	3768	}
3688		3769
3689	static void be_mac_clear(struct be_adapter *adapter)
3690	{
3691	if (adapter->pmac_id) {
3692	be_cmd_pmac_del(adapter, adapter->if_handle,
3693	adapter->pmac_id[0], 0);
3694	kfree(adapter->pmac_id);
3695	adapter->pmac_id = NULL;
3696	}
3697	}
3698
3699	#ifdef CONFIG_BE2NET_VXLAN	3770	#ifdef CONFIG_BE2NET_VXLAN
3700	static void be_disable_vxlan_offloads(struct be_adapter *adapter)	3771	static void be_disable_vxlan_offloads(struct be_adapter *adapter)
3701	{	3772	{
@@ -3770,8 +3841,8 @@ static int be_clear(struct be_adapter *adapter) · 68 unmodified lines
3770	#ifdef CONFIG_BE2NET_VXLAN	3841	#ifdef CONFIG_BE2NET_VXLAN
3771	be_disable_vxlan_offloads(adapter);	3842	be_disable_vxlan_offloads(adapter);
3772	#endif	3843	#endif
3773	/* delete the primary mac along with the uc-mac list */	3844	kfree(adapter->pmac_id);
3774	be_mac_clear(adapter);	3845	adapter->pmac_id = NULL;
3775		3846
3776	be_cmd_if_destroy(adapter, adapter->if_handle, 0);	3847	be_cmd_if_destroy(adapter, adapter->if_handle, 0);
3777		3848
@@ -3782,25 +3853,11 @@ static int be_clear(struct be_adapter *adapter) · 4 unmodified lines
3782	return 0;	3853	return 0;
3783	}	3854	}
3784		3855
3785	static int be_if_create(struct be_adapter adapter, u32 if_handle,
3786	u32 cap_flags, u32 vf)
3787	{
3788	u32 en_flags;
3789
3790	en_flags = BE_IF_FLAGS_UNTAGGED \| BE_IF_FLAGS_BROADCAST \|
3791	BE_IF_FLAGS_MULTICAST \| BE_IF_FLAGS_PASS_L3L4_ERRORS \|
3792	BE_IF_FLAGS_RSS \| BE_IF_FLAGS_DEFQ_RSS;
3793
3794	en_flags &= cap_flags;
3795
3796	return be_cmd_if_create(adapter, cap_flags, en_flags, if_handle, vf);
3797	}
3798
3799	static int be_vfs_if_create(struct be_adapter *adapter)	3856	static int be_vfs_if_create(struct be_adapter *adapter)
3800	{	3857	{
3801	struct be_resources res = {0};	3858	struct be_resources res = {0};
		3859	u32 cap_flags, en_flags, vf;
3802	struct be_vf_cfg *vf_cfg;	3860	struct be_vf_cfg *vf_cfg;
3803	u32 cap_flags, vf;
3804	int status;	3861	int status;
3805		3862
3806	/* If a FW profile exists, then cap_flags are updated */	3863	/* If a FW profile exists, then cap_flags are updated */
@@ -3821,8 +3878,12 @@ static int be_vfs_if_create(struct be_adapter *adapter) · 14 unmodified lines
3821	}	3878	}
3822	}	3879	}
3823		3880
3824	status = be_if_create(adapter, &vf_cfg->if_handle,	3881	en_flags = cap_flags & (BE_IF_FLAGS_UNTAGGED \|
3825	cap_flags, vf + 1);	3882	BE_IF_FLAGS_BROADCAST \|
		3883	BE_IF_FLAGS_MULTICAST \|
		3884	BE_IF_FLAGS_PASS_L3L4_ERRORS);
		3885	status = be_cmd_if_create(adapter, cap_flags, en_flags,
		3886	&vf_cfg->if_handle, vf + 1);
3826	if (status)	3887	if (status)
3827	return status;	3888	return status;
3828	}	3889	}
@@ -4194,15 +4255,8 @@ static int be_mac_setup(struct be_adapter *adapter) · 365 unmodified lines
4194		4255
4195	memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);	4256	memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
4196	memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);	4257	memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
4197	} else {
4198	/* Maybe the HW was reset; dev_addr must be re-programmed */
4199	memcpy(mac, adapter->netdev->dev_addr, ETH_ALEN);
4200	}	4258	}
4201		4259
4202	/* For BE3-R VFs, the PF programs the initial MAC address */
4203	if (!(BEx_chip(adapter) && be_virtfn(adapter)))
4204	be_cmd_pmac_add(adapter, mac, adapter->if_handle,
4205	&adapter->pmac_id[0], 0);
4206	return 0;	4260	return 0;
4207	}	4261	}
4208		4262
@@ -4342,6 +4396,7 @@ static int be_func_init(struct be_adapter *adapter) · 133 unmodified lines
4342	static int be_setup(struct be_adapter *adapter)	4396	static int be_setup(struct be_adapter *adapter)
4343	{	4397	{
4344	struct device *dev = &adapter->pdev->dev;	4398	struct device *dev = &adapter->pdev->dev;
		4399	u32 en_flags;
4345	int status;	4400	int status;
4346		4401
4347	status = be_func_init(adapter);	4402	status = be_func_init(adapter);
@@ -4364,8 +4419,11 @@ static int be_setup(struct be_adapter *adapter) · 16 unmodified lines
4364	if (status)	4419	if (status)
4365	goto err;	4420	goto err;
4366		4421
4367	status = be_if_create(adapter, &adapter->if_handle,	4422	/* will enable all the needed filter flags in be_open() */
4368	be_if_cap_flags(adapter), 0);	4423	en_flags = BE_IF_FLAGS_RSS \| BE_IF_FLAGS_DEFQ_RSS;
		4424	en_flags = en_flags & be_if_cap_flags(adapter);
		4425	status = be_cmd_if_create(adapter, be_if_cap_flags(adapter), en_flags,
		4426	&adapter->if_handle, 0);
4369	if (status)	4427	if (status)
4370	goto err;	4428	goto err;
4371		4429
@@ -4391,11 +4449,6 @@ static int be_setup(struct be_adapter *adapter) · 19 unmodified lines
4391	dev_err(dev, "Please upgrade firmware to version >= 4.0\n");	4449	dev_err(dev, "Please upgrade firmware to version >= 4.0\n");
4392	}	4450	}
4393		4451
4394	if (adapter->vlans_added)
4395	be_vid_config(adapter);
4396
4397	be_set_rx_mode(adapter->netdev);
4398
4399	status = be_cmd_set_flow_control(adapter, adapter->tx_fc,	4452	status = be_cmd_set_flow_control(adapter, adapter->tx_fc,
4400	adapter->rx_fc);	4453	adapter->rx_fc);
4401	if (status)	4454	if (status)

drivers/net/ethernet/freescale/fec.h+1−0

@@ -562,6 +562,7 @@ struct fec_enet_private { · 561 unmodified lines
562	};	562	};
563		563
564	void fec_ptp_init(struct platform_device *pdev);	564	void fec_ptp_init(struct platform_device *pdev);
		565	void fec_ptp_stop(struct platform_device *pdev);
565	void fec_ptp_start_cyclecounter(struct net_device *ndev);	566	void fec_ptp_start_cyclecounter(struct net_device *ndev);
566	int fec_ptp_set(struct net_device ndev, struct ifreq ifr);	567	int fec_ptp_set(struct net_device ndev, struct ifreq ifr);
567	int fec_ptp_get(struct net_device ndev, struct ifreq ifr);	568	int fec_ptp_get(struct net_device ndev, struct ifreq ifr);

drivers/net/ethernet/freescale/fec_main.c+81−18

@@ -24,6 +24,7 @@ · 23 unmodified lines
24	#include <linux/module.h>	24	#include <linux/module.h>
25	#include <linux/kernel.h>	25	#include <linux/kernel.h>
26	#include <linux/string.h>	26	#include <linux/string.h>
		27	#include <linux/pm_runtime.h>
27	#include <linux/ptrace.h>	28	#include <linux/ptrace.h>
28	#include <linux/errno.h>	29	#include <linux/errno.h>
29	#include <linux/ioport.h>	30	#include <linux/ioport.h>
@@ -77,6 +78,7 @@ static void fec_enet_itr_coal_init(struct net_device *ndev); · 47 unmodified lines
77	#define FEC_ENET_RAEM_V 0x8	78	#define FEC_ENET_RAEM_V 0x8
78	#define FEC_ENET_RAFL_V 0x8	79	#define FEC_ENET_RAFL_V 0x8
79	#define FEC_ENET_OPD_V 0xFFF0	80	#define FEC_ENET_OPD_V 0xFFF0
		81	#define FEC_MDIO_PM_TIMEOUT 100 /* ms */
80		82
81	static struct platform_device_id fec_devtype[] = {	83	static struct platform_device_id fec_devtype[] = {
82	{	84	{
@@ -1767,7 +1769,13 @@ static void fec_enet_adjust_link(struct net_device *ndev) · 1684 unmodified lines
1767	static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)	1769	static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
1768	{	1770	{
1769	struct fec_enet_private *fep = bus->priv;	1771	struct fec_enet_private *fep = bus->priv;
		1772	struct device *dev = &fep->pdev->dev;
1770	unsigned long time_left;	1773	unsigned long time_left;
		1774	int ret = 0;
		1775
		1776	ret = pm_runtime_get_sync(dev);
		1777	if (IS_ERR_VALUE(ret))
		1778	return ret;
1771		1779
1772	fep->mii_timeout = 0;	1780	fep->mii_timeout = 0;
1773	init_completion(&fep->mdio_done);	1781	init_completion(&fep->mdio_done);
@@ -1783,18 +1791,30 @@ static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum) · 9 unmodified lines
1783	if (time_left == 0) {	1791	if (time_left == 0) {
1784	fep->mii_timeout = 1;	1792	fep->mii_timeout = 1;
1785	netdev_err(fep->netdev, "MDIO read timeout\n");	1793	netdev_err(fep->netdev, "MDIO read timeout\n");
1786	return -ETIMEDOUT;	1794	ret = -ETIMEDOUT;
		1795	goto out;
1787	}	1796	}
1788		1797
1789	/* return value */	1798	ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
1790	return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));	1799
		1800	out:
		1801	pm_runtime_mark_last_busy(dev);
		1802	pm_runtime_put_autosuspend(dev);
		1803
		1804	return ret;
1791	}	1805	}
1792		1806
1793	static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,	1807	static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
1794	u16 value)	1808	u16 value)
1795	{	1809	{
1796	struct fec_enet_private *fep = bus->priv;	1810	struct fec_enet_private *fep = bus->priv;
		1811	struct device *dev = &fep->pdev->dev;
1797	unsigned long time_left;	1812	unsigned long time_left;
		1813	int ret = 0;
		1814
		1815	ret = pm_runtime_get_sync(dev);
		1816	if (IS_ERR_VALUE(ret))
		1817	return ret;
1798		1818
1799	fep->mii_timeout = 0;	1819	fep->mii_timeout = 0;
1800	init_completion(&fep->mdio_done);	1820	init_completion(&fep->mdio_done);
@@ -1811,10 +1831,13 @@ static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum, · 10 unmodified lines
1811	if (time_left == 0) {	1831	if (time_left == 0) {
1812	fep->mii_timeout = 1;	1832	fep->mii_timeout = 1;
1813	netdev_err(fep->netdev, "MDIO write timeout\n");	1833	netdev_err(fep->netdev, "MDIO write timeout\n");
1814	return -ETIMEDOUT;	1834	ret = -ETIMEDOUT;
1815	}	1835	}
1816		1836
1817	return 0;	1837	pm_runtime_mark_last_busy(dev);
		1838	pm_runtime_put_autosuspend(dev);
		1839
		1840	return ret;
1818	}	1841	}
1819		1842
1820	static int fec_enet_clk_enable(struct net_device *ndev, bool enable)	1843	static int fec_enet_clk_enable(struct net_device *ndev, bool enable)
@@ -1826,9 +1849,6 @@ static int fec_enet_clk_enable(struct net_device *ndev, bool enable) · 5 unmodified lines
1826	ret = clk_prepare_enable(fep->clk_ahb);	1849	ret = clk_prepare_enable(fep->clk_ahb);
1827	if (ret)	1850	if (ret)
1828	return ret;	1851	return ret;
1829	ret = clk_prepare_enable(fep->clk_ipg);
1830	if (ret)
1831	goto failed_clk_ipg;
1832	if (fep->clk_enet_out) {	1852	if (fep->clk_enet_out) {
1833	ret = clk_prepare_enable(fep->clk_enet_out);	1853	ret = clk_prepare_enable(fep->clk_enet_out);
1834	if (ret)	1854	if (ret)
@@ -1852,7 +1872,6 @@ static int fec_enet_clk_enable(struct net_device *ndev, bool enable) · 17 unmodified lines
1852	}	1872	}
1853	} else {	1873	} else {
1854	clk_disable_unprepare(fep->clk_ahb);	1874	clk_disable_unprepare(fep->clk_ahb);
1855	clk_disable_unprepare(fep->clk_ipg);
1856	if (fep->clk_enet_out)	1875	if (fep->clk_enet_out)
1857	clk_disable_unprepare(fep->clk_enet_out);	1876	clk_disable_unprepare(fep->clk_enet_out);
1858	if (fep->clk_ptp) {	1877	if (fep->clk_ptp) {
@@ -1874,8 +1893,6 @@ failed_clk_ptp: · 15 unmodified lines
1874	if (fep->clk_enet_out)	1893	if (fep->clk_enet_out)
1875	clk_disable_unprepare(fep->clk_enet_out);	1894	clk_disable_unprepare(fep->clk_enet_out);
1876	failed_clk_enet_out:	1895	failed_clk_enet_out:
1877	clk_disable_unprepare(fep->clk_ipg);
1878	failed_clk_ipg:
1879	clk_disable_unprepare(fep->clk_ahb);	1896	clk_disable_unprepare(fep->clk_ahb);
1880		1897
1881	return ret;	1898	return ret;
@@ -2847,10 +2864,14 @@ fec_enet_open(struct net_device *ndev) · 965 unmodified lines
2847	struct fec_enet_private *fep = netdev_priv(ndev);	2864	struct fec_enet_private *fep = netdev_priv(ndev);
2848	int ret;	2865	int ret;
2849		2866
		2867	ret = pm_runtime_get_sync(&fep->pdev->dev);
		2868	if (IS_ERR_VALUE(ret))
		2869	return ret;
		2870
2850	pinctrl_pm_select_default_state(&fep->pdev->dev);	2871	pinctrl_pm_select_default_state(&fep->pdev->dev);
2851	ret = fec_enet_clk_enable(ndev, true);	2872	ret = fec_enet_clk_enable(ndev, true);
2852	if (ret)	2873	if (ret)
2853	return ret;	2874	goto clk_enable;
2854		2875
2855	/* I should reset the ring buffers here, but I don't yet know	2876	/* I should reset the ring buffers here, but I don't yet know
2856	* a simple way to do that.	2877	* a simple way to do that.
@@ -2881,6 +2902,9 @@ err_enet_mii_probe: · 24 unmodified lines
2881	fec_enet_free_buffers(ndev);	2902	fec_enet_free_buffers(ndev);
2882	err_enet_alloc:	2903	err_enet_alloc:
2883	fec_enet_clk_enable(ndev, false);	2904	fec_enet_clk_enable(ndev, false);
		2905	clk_enable:
		2906	pm_runtime_mark_last_busy(&fep->pdev->dev);
		2907	pm_runtime_put_autosuspend(&fep->pdev->dev);
2884	pinctrl_pm_select_sleep_state(&fep->pdev->dev);	2908	pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2885	return ret;	2909	return ret;
2886	}	2910	}
@@ -2903,6 +2927,9 @@ fec_enet_close(struct net_device *ndev) · 16 unmodified lines
2903		2927
2904	fec_enet_clk_enable(ndev, false);	2928	fec_enet_clk_enable(ndev, false);
2905	pinctrl_pm_select_sleep_state(&fep->pdev->dev);	2929	pinctrl_pm_select_sleep_state(&fep->pdev->dev);
		2930	pm_runtime_mark_last_busy(&fep->pdev->dev);
		2931	pm_runtime_put_autosuspend(&fep->pdev->dev);
		2932
2906	fec_enet_free_buffers(ndev);	2933	fec_enet_free_buffers(ndev);
2907		2934
2908	return 0;	2935	return 0;
@@ -3115,8 +3142,8 @@ static int fec_enet_init(struct net_device *ndev) · 206 unmodified lines
3115	fep->bufdesc_size;	3142	fep->bufdesc_size;
3116		3143
3117	/* Allocate memory for buffer descriptors. */	3144	/* Allocate memory for buffer descriptors. */
3118	cbd_base = dma_alloc_coherent(NULL, bd_size, &bd_dma,	3145	cbd_base = dmam_alloc_coherent(&fep->pdev->dev, bd_size, &bd_dma,
3119	GFP_KERNEL);	3146	GFP_KERNEL);
3120	if (!cbd_base) {	3147	if (!cbd_base) {
3121	return -ENOMEM;	3148	return -ENOMEM;
3122	}	3149	}
@@ -3388,6 +3415,10 @@ fec_probe(struct platform_device *pdev) · 265 unmodified lines
3388	if (ret)	3415	if (ret)
3389	goto failed_clk;	3416	goto failed_clk;
3390		3417
		3418	ret = clk_prepare_enable(fep->clk_ipg);
		3419	if (ret)
		3420	goto failed_clk_ipg;
		3421
3391	fep->reg_phy = devm_regulator_get(&pdev->dev, "phy");	3422	fep->reg_phy = devm_regulator_get(&pdev->dev, "phy");
3392	if (!IS_ERR(fep->reg_phy)) {	3423	if (!IS_ERR(fep->reg_phy)) {
3393	ret = regulator_enable(fep->reg_phy);	3424	ret = regulator_enable(fep->reg_phy);
@@ -3400,6 +3431,12 @@ fec_probe(struct platform_device *pdev) · 6 unmodified lines
3400	fep->reg_phy = NULL;	3431	fep->reg_phy = NULL;
3401	}	3432	}
3402		3433
		3434	pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT);
		3435	pm_runtime_use_autosuspend(&pdev->dev);
		3436	pm_runtime_get_noresume(&pdev->dev);
		3437	pm_runtime_set_active(&pdev->dev);
		3438	pm_runtime_enable(&pdev->dev);
		3439
3403	fec_reset_phy(pdev);	3440	fec_reset_phy(pdev);
3404		3441
3405	if (fep->bufdesc_ex)	3442	if (fep->bufdesc_ex)
@@ -3447,6 +3484,10 @@ fec_probe(struct platform_device *pdev) · 41 unmodified lines
3447		3484
3448	fep->rx_copybreak = COPYBREAK_DEFAULT;	3485	fep->rx_copybreak = COPYBREAK_DEFAULT;
3449	INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work);	3486	INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work);
		3487
		3488	pm_runtime_mark_last_busy(&pdev->dev);
		3489	pm_runtime_put_autosuspend(&pdev->dev);
		3490
3450	return 0;	3491	return 0;
3451		3492
3452	failed_register:	3493	failed_register:
@@ -3454,9 +3495,12 @@ failed_register: · 1 unmodified line
3454	failed_mii_init:	3495	failed_mii_init:
3455	failed_irq:	3496	failed_irq:
3456	failed_init:	3497	failed_init:
		3498	fec_ptp_stop(pdev);
3457	if (fep->reg_phy)	3499	if (fep->reg_phy)
3458	regulator_disable(fep->reg_phy);	3500	regulator_disable(fep->reg_phy);
3459	failed_regulator:	3501	failed_regulator:
		3502	clk_disable_unprepare(fep->clk_ipg);
		3503	failed_clk_ipg:
3460	fec_enet_clk_enable(ndev, false);	3504	fec_enet_clk_enable(ndev, false);
3461	failed_clk:	3505	failed_clk:
3462	failed_phy:	3506	failed_phy:
@@ -3473,14 +3517,12 @@ fec_drv_remove(struct platform_device *pdev) · 10 unmodified lines
3473	struct net_device *ndev = platform_get_drvdata(pdev);	3517	struct net_device *ndev = platform_get_drvdata(pdev);
3474	struct fec_enet_private *fep = netdev_priv(ndev);	3518	struct fec_enet_private *fep = netdev_priv(ndev);
3475		3519
3476	cancel_delayed_work_sync(&fep->time_keep);
3477	cancel_work_sync(&fep->tx_timeout_work);	3520	cancel_work_sync(&fep->tx_timeout_work);
		3521	fec_ptp_stop(pdev);
3478	unregister_netdev(ndev);	3522	unregister_netdev(ndev);
3479	fec_enet_mii_remove(fep);	3523	fec_enet_mii_remove(fep);
3480	if (fep->reg_phy)	3524	if (fep->reg_phy)
3481	regulator_disable(fep->reg_phy);	3525	regulator_disable(fep->reg_phy);
3482	if (fep->ptp_clock)
3483	ptp_clock_unregister(fep->ptp_clock);
3484	of_node_put(fep->phy_node);	3526	of_node_put(fep->phy_node);
3485	free_netdev(ndev);	3527	free_netdev(ndev);
3486		3528
@@ -3568,7 +3610,28 @@ failed_clk: · 81 unmodified lines
3568	return ret;	3610	return ret;
3569	}	3611	}
3570		3612
3571	static SIMPLE_DEV_PM_OPS(fec_pm_ops, fec_suspend, fec_resume);	3613	static int __maybe_unused fec_runtime_suspend(struct device *dev)
		3614	{
		3615	struct net_device *ndev = dev_get_drvdata(dev);
		3616	struct fec_enet_private *fep = netdev_priv(ndev);
		3617
		3618	clk_disable_unprepare(fep->clk_ipg);
		3619
		3620	return 0;
		3621	}
		3622
		3623	static int __maybe_unused fec_runtime_resume(struct device *dev)
		3624	{
		3625	struct net_device *ndev = dev_get_drvdata(dev);
		3626	struct fec_enet_private *fep = netdev_priv(ndev);
		3627
		3628	return clk_prepare_enable(fep->clk_ipg);
		3629	}
		3630
		3631	static const struct dev_pm_ops fec_pm_ops = {
		3632	SET_SYSTEM_SLEEP_PM_OPS(fec_suspend, fec_resume)
		3633	SET_RUNTIME_PM_OPS(fec_runtime_suspend, fec_runtime_resume, NULL)
		3634	};
3572		3635
3573	static struct platform_driver fec_driver = {	3636	static struct platform_driver fec_driver = {
3574	.driver = {	3637	.driver = {

drivers/net/ethernet/freescale/fec_ptp.c+10−0

@@ -604,6 +604,16 @@ void fec_ptp_init(struct platform_device *pdev) · 603 unmodified lines
604	schedule_delayed_work(&fep->time_keep, HZ);	604	schedule_delayed_work(&fep->time_keep, HZ);
605	}	605	}
606		606
		607	void fec_ptp_stop(struct platform_device *pdev)
		608	{
		609	struct net_device *ndev = platform_get_drvdata(pdev);
		610	struct fec_enet_private *fep = netdev_priv(ndev);
		611
		612	cancel_delayed_work_sync(&fep->time_keep);
		613	if (fep->ptp_clock)
		614	ptp_clock_unregister(fep->ptp_clock);
		615	}
		616
607	/**	617	/**
608	* fec_ptp_check_pps_event	618	* fec_ptp_check_pps_event
609	* @fep: the fec_enet_private structure handle	619	* @fep: the fec_enet_private structure handle

drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c+2−1

@@ -586,7 +586,8 @@ static int fs_enet_start_xmit(struct sk_buff skb, struct net_device dev) · 585 unmodified lines
586	frag = skb_shinfo(skb)->frags;	586	frag = skb_shinfo(skb)->frags;
587	while (nr_frags) {	587	while (nr_frags) {
588	CBDC_SC(bdp,	588	CBDC_SC(bdp,
589	BD_ENET_TX_STATS \| BD_ENET_TX_LAST \| BD_ENET_TX_TC);	589	BD_ENET_TX_STATS \| BD_ENET_TX_INTR \| BD_ENET_TX_LAST \|
		590	BD_ENET_TX_TC);
590	CBDS_SC(bdp, BD_ENET_TX_READY);	591	CBDS_SC(bdp, BD_ENET_TX_READY);
591		592
592	if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)	593	if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)

drivers/net/ethernet/freescale/fs_enet/mac-fec.c+1−1

@@ -110,7 +110,7 @@ static int do_pd_setup(struct fs_enet_private *fep) · 109 unmodified lines
110	}	110	}
111		111
112	#define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF \| FEC_ENET_RXB)	112	#define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF \| FEC_ENET_RXB)
113	#define FEC_NAPI_TX_EVENT_MSK (FEC_ENET_TXF \| FEC_ENET_TXB)	113	#define FEC_NAPI_TX_EVENT_MSK (FEC_ENET_TXF)
114	#define FEC_RX_EVENT (FEC_ENET_RXF)	114	#define FEC_RX_EVENT (FEC_ENET_RXF)
115	#define FEC_TX_EVENT (FEC_ENET_TXF)	115	#define FEC_TX_EVENT (FEC_ENET_TXF)
116	#define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR \| FEC_ENET_BABR \| \	116	#define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR \| FEC_ENET_BABR \| \

drivers/net/ethernet/freescale/gianfar.c+32−72

@@ -565,22 +565,6 @@ static void gfar_ints_enable(struct gfar_private *priv) · 564 unmodified lines
565	}	565	}
566	}	566	}
567		567
568	static void lock_tx_qs(struct gfar_private *priv)
569	{
570	int i;
571
572	for (i = 0; i < priv->num_tx_queues; i++)
573	spin_lock(&priv->tx_queue[i]->txlock);
574	}
575
576	static void unlock_tx_qs(struct gfar_private *priv)
577	{
578	int i;
579
580	for (i = 0; i < priv->num_tx_queues; i++)
581	spin_unlock(&priv->tx_queue[i]->txlock);
582	}
583
584	static int gfar_alloc_tx_queues(struct gfar_private *priv)	568	static int gfar_alloc_tx_queues(struct gfar_private *priv)
585	{	569	{
586	int i;	570	int i;
@@ -1376,7 +1360,6 @@ static int gfar_probe(struct platform_device *ofdev) · 789 unmodified lines
1376	priv->dev = &ofdev->dev;	1360	priv->dev = &ofdev->dev;
1377	SET_NETDEV_DEV(dev, &ofdev->dev);	1361	SET_NETDEV_DEV(dev, &ofdev->dev);
1378		1362
1379	spin_lock_init(&priv->bflock);
1380	INIT_WORK(&priv->reset_task, gfar_reset_task);	1363	INIT_WORK(&priv->reset_task, gfar_reset_task);
1381		1364
1382	platform_set_drvdata(ofdev, priv);	1365	platform_set_drvdata(ofdev, priv);
@@ -1470,9 +1453,8 @@ static int gfar_probe(struct platform_device *ofdev) · 87 unmodified lines
1470	goto register_fail;	1453	goto register_fail;
1471	}	1454	}
1472		1455
1473	device_init_wakeup(&dev->dev,	1456	device_set_wakeup_capable(&dev->dev, priv->device_flags &
1474	priv->device_flags &	1457	FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
1475	FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
1476		1458
1477	/* fill out IRQ number and name fields */	1459	/* fill out IRQ number and name fields */
1478	for (i = 0; i < priv->num_grps; i++) {	1460	for (i = 0; i < priv->num_grps; i++) {
@@ -1540,48 +1522,37 @@ static int gfar_suspend(struct device *dev) · 61 unmodified lines
1540	struct gfar_private *priv = dev_get_drvdata(dev);	1522	struct gfar_private *priv = dev_get_drvdata(dev);
1541	struct net_device *ndev = priv->ndev;	1523	struct net_device *ndev = priv->ndev;
1542	struct gfar __iomem *regs = priv->gfargrp[0].regs;	1524	struct gfar __iomem *regs = priv->gfargrp[0].regs;
1543	unsigned long flags;
1544	u32 tempval;	1525	u32 tempval;
1545
1546	int magic_packet = priv->wol_en &&	1526	int magic_packet = priv->wol_en &&
1547	(priv->device_flags &	1527	(priv->device_flags &
1548	FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);	1528	FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
1549		1529
		1530	if (!netif_running(ndev))
		1531	return 0;
		1532
		1533	disable_napi(priv);
		1534	netif_tx_lock(ndev);
1550	netif_device_detach(ndev);	1535	netif_device_detach(ndev);
		1536	netif_tx_unlock(ndev);
1551		1537
1552	if (netif_running(ndev)) {	1538	gfar_halt(priv);
1553		1539
1554	local_irq_save(flags);	1540	if (magic_packet) {
1555	lock_tx_qs(priv);	1541	/* Enable interrupt on Magic Packet */
		1542	gfar_write(&regs->imask, IMASK_MAG);
1556		1543
1557	gfar_halt_nodisable(priv);	1544	/* Enable Magic Packet mode */
		1545	tempval = gfar_read(&regs->maccfg2);
		1546	tempval \|= MACCFG2_MPEN;
		1547	gfar_write(&regs->maccfg2, tempval);
1558		1548
1559	/* Disable Tx, and Rx if wake-on-LAN is disabled. */	1549	/* re-enable the Rx block */
1560	tempval = gfar_read(&regs->maccfg1);	1550	tempval = gfar_read(&regs->maccfg1);
1561		1551	tempval \|= MACCFG1_RX_EN;
1562	tempval &= ~MACCFG1_TX_EN;
1563
1564	if (!magic_packet)
1565	tempval &= ~MACCFG1_RX_EN;
1566
1567	gfar_write(&regs->maccfg1, tempval);	1552	gfar_write(&regs->maccfg1, tempval);
1568		1553
1569	unlock_tx_qs(priv);	1554	} else {
1570	local_irq_restore(flags);	1555	phy_stop(priv->phydev);
1571
1572	disable_napi(priv);
1573
1574	if (magic_packet) {
1575	/* Enable interrupt on Magic Packet */
1576	gfar_write(&regs->imask, IMASK_MAG);
1577
1578	/* Enable Magic Packet mode */
1579	tempval = gfar_read(&regs->maccfg2);
1580	tempval \|= MACCFG2_MPEN;
1581	gfar_write(&regs->maccfg2, tempval);
1582	} else {
1583	phy_stop(priv->phydev);
1584	}
1585	}	1556	}
1586		1557
1587	return 0;	1558	return 0;
@@ -1592,37 +1563,26 @@ static int gfar_resume(struct device *dev) · 4 unmodified lines
1592	struct gfar_private *priv = dev_get_drvdata(dev);	1563	struct gfar_private *priv = dev_get_drvdata(dev);
1593	struct net_device *ndev = priv->ndev;	1564	struct net_device *ndev = priv->ndev;
1594	struct gfar __iomem *regs = priv->gfargrp[0].regs;	1565	struct gfar __iomem *regs = priv->gfargrp[0].regs;
1595	unsigned long flags;
1596	u32 tempval;	1566	u32 tempval;
1597	int magic_packet = priv->wol_en &&	1567	int magic_packet = priv->wol_en &&
1598	(priv->device_flags &	1568	(priv->device_flags &
1599	FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);	1569	FSL_GIANFAR_DEV_HAS_MAGIC_PACKET);
1600		1570
1601	if (!netif_running(ndev)) {	1571	if (!netif_running(ndev))
1602	netif_device_attach(ndev);
1603	return 0;	1572	return 0;
1604	}
1605		1573
1606	if (!magic_packet && priv->phydev)	1574	if (magic_packet) {
		1575	/* Disable Magic Packet mode */
		1576	tempval = gfar_read(&regs->maccfg2);
		1577	tempval &= ~MACCFG2_MPEN;
		1578	gfar_write(&regs->maccfg2, tempval);
		1579	} else {
1607	phy_start(priv->phydev);	1580	phy_start(priv->phydev);
1608		1581	}
1609	/* Disable Magic Packet mode, in case something
1610	* else woke us up.
1611	*/
1612	local_irq_save(flags);
1613	lock_tx_qs(priv);
1614
1615	tempval = gfar_read(&regs->maccfg2);
1616	tempval &= ~MACCFG2_MPEN;
1617	gfar_write(&regs->maccfg2, tempval);
1618		1582
1619	gfar_start(priv);	1583	gfar_start(priv);
1620		1584
1621	unlock_tx_qs(priv);
1622	local_irq_restore(flags);
1623
1624	netif_device_attach(ndev);	1585	netif_device_attach(ndev);
1625
1626	enable_napi(priv);	1586	enable_napi(priv);
1627		1587
1628	return 0;	1588	return 0;
@@ -2045,7 +2005,8 @@ static int register_grp_irqs(struct gfar_priv_grp *grp) · 416 unmodified lines
2045	/* Install our interrupt handlers for Error,	2005	/* Install our interrupt handlers for Error,
2046	* Transmit, and Receive	2006	* Transmit, and Receive
2047	*/	2007	*/
2048	err = request_irq(gfar_irq(grp, ER)->irq, gfar_error, 0,	2008	err = request_irq(gfar_irq(grp, ER)->irq, gfar_error,
		2009	IRQF_NO_SUSPEND,
2049	gfar_irq(grp, ER)->name, grp);	2010	gfar_irq(grp, ER)->name, grp);
2050	if (err < 0) {	2011	if (err < 0) {
2051	netif_err(priv, intr, dev, "Can't get IRQ %d\n",	2012	netif_err(priv, intr, dev, "Can't get IRQ %d\n",
@@ -2068,7 +2029,8 @@ static int register_grp_irqs(struct gfar_priv_grp *grp) · 16 unmodified lines
2068	goto rx_irq_fail;	2029	goto rx_irq_fail;
2069	}	2030	}
2070	} else {	2031	} else {
2071	err = request_irq(gfar_irq(grp, TX)->irq, gfar_interrupt, 0,	2032	err = request_irq(gfar_irq(grp, TX)->irq, gfar_interrupt,
		2033	IRQF_NO_SUSPEND,
2072	gfar_irq(grp, TX)->name, grp);	2034	gfar_irq(grp, TX)->name, grp);
2073	if (err < 0) {	2035	if (err < 0) {
2074	netif_err(priv, intr, dev, "Can't get IRQ %d\n",	2036	netif_err(priv, intr, dev, "Can't get IRQ %d\n",
@@ -2169,8 +2131,6 @@ static int gfar_enet_open(struct net_device *dev) · 94 unmodified lines
2169	if (err)	2131	if (err)
2170	return err;	2132	return err;
2171		2133
2172	device_set_wakeup_enable(&dev->dev, priv->wol_en);
2173
2174	return err;	2134	return err;
2175	}	2135	}
2176		2136

drivers/net/ethernet/freescale/gianfar.h+0−3

@@ -1145,9 +1145,6 @@ struct gfar_private { · 1144 unmodified lines
1145	int oldduplex;	1145	int oldduplex;
1146	int oldlink;	1146	int oldlink;
1147		1147
1148	/* Bitfield update lock */
1149	spinlock_t bflock;
1150
1151	uint32_t msg_enable;	1148	uint32_t msg_enable;
1152		1149
1153	struct work_struct reset_task;	1150	struct work_struct reset_task;

drivers/net/ethernet/freescale/gianfar_ethtool.c+5−345

@@ -653,7 +653,6 @@ static void gfar_get_wol(struct net_device dev, struct ethtool_wolinfo wol) · 652 unmodified lines
653	static int gfar_set_wol(struct net_device dev, struct ethtool_wolinfo wol)	653	static int gfar_set_wol(struct net_device dev, struct ethtool_wolinfo wol)
654	{	654	{
655	struct gfar_private *priv = netdev_priv(dev);	655	struct gfar_private *priv = netdev_priv(dev);
656	unsigned long flags;
657		656
658	if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&	657	if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
659	wol->wolopts != 0)	658	wol->wolopts != 0)
@@ -664,9 +663,7 @@ static int gfar_set_wol(struct net_device dev, struct ethtool_wolinfo wol) · 4 unmodified lines
664		663
665	device_set_wakeup_enable(&dev->dev, wol->wolopts & WAKE_MAGIC);	664	device_set_wakeup_enable(&dev->dev, wol->wolopts & WAKE_MAGIC);
666		665
667	spin_lock_irqsave(&priv->bflock, flags);	666	priv->wol_en = !!device_may_wakeup(&dev->dev);
668	priv->wol_en = !!device_may_wakeup(&dev->dev);
669	spin_unlock_irqrestore(&priv->bflock, flags);
670		667
671	return 0;	668	return 0;
672	}	669	}
@@ -903,27 +900,6 @@ static int gfar_check_filer_hardware(struct gfar_private *priv) · 230 unmodified lines
903	return 0;	900	return 0;
904	}	901	}
905		902
906	static int gfar_comp_asc(const void a, const void b)
907	{
908	return memcmp(a, b, 4);
909	}
910
911	static int gfar_comp_desc(const void a, const void b)
912	{
913	return -memcmp(a, b, 4);
914	}
915
916	static void gfar_swap(void a, void b, int size)
917	{
918	u32 *_a = a;
919	u32 *_b = b;
920
921	swap(_a[0], _b[0]);
922	swap(_a[1], _b[1]);
923	swap(_a[2], _b[2]);
924	swap(_a[3], _b[3]);
925	}
926
927	/* Write a mask to filer cache */	903	/* Write a mask to filer cache */
928	static void gfar_set_mask(u32 mask, struct filer_table *tab)	904	static void gfar_set_mask(u32 mask, struct filer_table *tab)
929	{	905	{
@@ -1273,310 +1249,6 @@ static int gfar_convert_to_filer(struct ethtool_rx_flow_spec *rule, · 343 unmodified lines
1273	return 0;	1249	return 0;
1274	}	1250	}
1275		1251
1276	/* Copy size filer entries */
1277	static void gfar_copy_filer_entries(struct gfar_filer_entry dst[0],
1278	struct gfar_filer_entry src[0], s32 size)
1279	{
1280	while (size > 0) {
1281	size--;
1282	dst[size].ctrl = src[size].ctrl;
1283	dst[size].prop = src[size].prop;
1284	}
1285	}
1286
1287	/* Delete the contents of the filer-table between start and end
1288	* and collapse them
1289	*/
1290	static int gfar_trim_filer_entries(u32 begin, u32 end, struct filer_table *tab)
1291	{
1292	int length;
1293
1294	if (end > MAX_FILER_CACHE_IDX \|\| end < begin)
1295	return -EINVAL;
1296
1297	end++;
1298	length = end - begin;
1299
1300	/* Copy */
1301	while (end < tab->index) {
1302	tab->fe[begin].ctrl = tab->fe[end].ctrl;
1303	tab->fe[begin++].prop = tab->fe[end++].prop;
1304
1305	}
1306	/* Fill up with don't cares */
1307	while (begin < tab->index) {
1308	tab->fe[begin].ctrl = 0x60;
1309	tab->fe[begin].prop = 0xFFFFFFFF;
1310	begin++;
1311	}
1312
1313	tab->index -= length;
1314	return 0;
1315	}
1316
1317	/* Make space on the wanted location */
1318	static int gfar_expand_filer_entries(u32 begin, u32 length,
1319	struct filer_table *tab)
1320	{
1321	if (length == 0 \|\| length + tab->index > MAX_FILER_CACHE_IDX \|\|
1322	begin > MAX_FILER_CACHE_IDX)
1323	return -EINVAL;
1324
1325	gfar_copy_filer_entries(&(tab->fe[begin + length]), &(tab->fe[begin]),
1326	tab->index - length + 1);
1327
1328	tab->index += length;
1329	return 0;
1330	}
1331
1332	static int gfar_get_next_cluster_start(int start, struct filer_table *tab)
1333	{
1334	for (; (start < tab->index) && (start < MAX_FILER_CACHE_IDX - 1);
1335	start++) {
1336	if ((tab->fe[start].ctrl & (RQFCR_AND \| RQFCR_CLE)) ==
1337	(RQFCR_AND \| RQFCR_CLE))
1338	return start;
1339	}
1340	return -1;
1341	}
1342
1343	static int gfar_get_next_cluster_end(int start, struct filer_table *tab)
1344	{
1345	for (; (start < tab->index) && (start < MAX_FILER_CACHE_IDX - 1);
1346	start++) {
1347	if ((tab->fe[start].ctrl & (RQFCR_AND \| RQFCR_CLE)) ==
1348	(RQFCR_CLE))
1349	return start;
1350	}
1351	return -1;
1352	}
1353
1354	/* Uses hardwares clustering option to reduce
1355	* the number of filer table entries
1356	*/
1357	static void gfar_cluster_filer(struct filer_table *tab)
1358	{
1359	s32 i = -1, j, iend, jend;
1360
1361	while ((i = gfar_get_next_cluster_start(++i, tab)) != -1) {
1362	j = i;
1363	while ((j = gfar_get_next_cluster_start(++j, tab)) != -1) {
1364	/* The cluster entries self and the previous one
1365	* (a mask) must be identical!
1366	*/
1367	if (tab->fe[i].ctrl != tab->fe[j].ctrl)
1368	break;
1369	if (tab->fe[i].prop != tab->fe[j].prop)
1370	break;
1371	if (tab->fe[i - 1].ctrl != tab->fe[j - 1].ctrl)
1372	break;
1373	if (tab->fe[i - 1].prop != tab->fe[j - 1].prop)
1374	break;
1375	iend = gfar_get_next_cluster_end(i, tab);
1376	jend = gfar_get_next_cluster_end(j, tab);
1377	if (jend == -1 \|\| iend == -1)
1378	break;
1379
1380	/* First we make some free space, where our cluster
1381	* element should be. Then we copy it there and finally
1382	* delete in from its old location.
1383	*/
1384	if (gfar_expand_filer_entries(iend, (jend - j), tab) ==
1385	-EINVAL)
1386	break;
1387
1388	gfar_copy_filer_entries(&(tab->fe[iend + 1]),
1389	&(tab->fe[jend + 1]), jend - j);
1390
1391	if (gfar_trim_filer_entries(jend - 1,
1392	jend + (jend - j),
1393	tab) == -EINVAL)
1394	return;
1395
1396	/* Mask out cluster bit */
1397	tab->fe[iend].ctrl &= ~(RQFCR_CLE);
1398	}
1399	}
1400	}
1401
1402	/* Swaps the masked bits of a1<>a2 and b1<>b2 */
1403	static void gfar_swap_bits(struct gfar_filer_entry *a1,
1404	struct gfar_filer_entry *a2,
1405	struct gfar_filer_entry *b1,
1406	struct gfar_filer_entry *b2, u32 mask)
1407	{
1408	u32 temp[4];
1409	temp[0] = a1->ctrl & mask;
1410	temp[1] = a2->ctrl & mask;
1411	temp[2] = b1->ctrl & mask;
1412	temp[3] = b2->ctrl & mask;
1413
1414	a1->ctrl &= ~mask;
1415	a2->ctrl &= ~mask;
1416	b1->ctrl &= ~mask;
1417	b2->ctrl &= ~mask;
1418
1419	a1->ctrl \|= temp[1];
1420	a2->ctrl \|= temp[0];
1421	b1->ctrl \|= temp[3];
1422	b2->ctrl \|= temp[2];
1423	}
1424
1425	/* Generate a list consisting of masks values with their start and
1426	* end of validity and block as indicator for parts belonging
1427	* together (glued by ANDs) in mask_table
1428	*/
1429	static u32 gfar_generate_mask_table(struct gfar_mask_entry *mask_table,
1430	struct filer_table *tab)
1431	{
1432	u32 i, and_index = 0, block_index = 1;
1433
1434	for (i = 0; i < tab->index; i++) {
1435
1436	/* LSByte of control = 0 sets a mask */
1437	if (!(tab->fe[i].ctrl & 0xF)) {
1438	mask_table[and_index].mask = tab->fe[i].prop;
1439	mask_table[and_index].start = i;
1440	mask_table[and_index].block = block_index;
1441	if (and_index >= 1)
1442	mask_table[and_index - 1].end = i - 1;
1443	and_index++;
1444	}
1445	/* cluster starts and ends will be separated because they should
1446	* hold their position
1447	*/
1448	if (tab->fe[i].ctrl & RQFCR_CLE)
1449	block_index++;
1450	/* A not set AND indicates the end of a depended block */
1451	if (!(tab->fe[i].ctrl & RQFCR_AND))
1452	block_index++;
1453	}
1454
1455	mask_table[and_index - 1].end = i - 1;
1456
1457	return and_index;
1458	}
1459
1460	/* Sorts the entries of mask_table by the values of the masks.
1461	* Important: The 0xFF80 flags of the first and last entry of a
1462	* block must hold their position (which queue, CLusterEnable, ReJEct,
1463	* AND)
1464	*/
1465	static void gfar_sort_mask_table(struct gfar_mask_entry *mask_table,
1466	struct filer_table *temp_table, u32 and_index)
1467	{
1468	/* Pointer to compare function (_asc or _desc) */
1469	int (gfar_comp)(const void , const void *);
1470
1471	u32 i, size = 0, start = 0, prev = 1;
1472	u32 old_first, old_last, new_first, new_last;
1473
1474	gfar_comp = &gfar_comp_desc;
1475
1476	for (i = 0; i < and_index; i++) {
1477	if (prev != mask_table[i].block) {
1478	old_first = mask_table[start].start + 1;
1479	old_last = mask_table[i - 1].end;
1480	sort(mask_table + start, size,
1481	sizeof(struct gfar_mask_entry),
1482	gfar_comp, &gfar_swap);
1483
1484	/* Toggle order for every block. This makes the
1485	* thing more efficient!
1486	*/
1487	if (gfar_comp == gfar_comp_desc)
1488	gfar_comp = &gfar_comp_asc;
1489	else
1490	gfar_comp = &gfar_comp_desc;
1491
1492	new_first = mask_table[start].start + 1;
1493	new_last = mask_table[i - 1].end;
1494
1495	gfar_swap_bits(&temp_table->fe[new_first],
1496	&temp_table->fe[old_first],
1497	&temp_table->fe[new_last],
1498	&temp_table->fe[old_last],
1499	RQFCR_QUEUE \| RQFCR_CLE \|
1500	RQFCR_RJE \| RQFCR_AND);
1501
1502	start = i;
1503	size = 0;
1504	}
1505	size++;
1506	prev = mask_table[i].block;
1507	}
1508	}
1509
1510	/* Reduces the number of masks needed in the filer table to save entries
1511	* This is done by sorting the masks of a depended block. A depended block is
1512	* identified by gluing ANDs or CLE. The sorting order toggles after every
1513	* block. Of course entries in scope of a mask must change their location with
1514	* it.
1515	*/
1516	static int gfar_optimize_filer_masks(struct filer_table *tab)
1517	{
1518	struct filer_table *temp_table;
1519	struct gfar_mask_entry *mask_table;
1520
1521	u32 and_index = 0, previous_mask = 0, i = 0, j = 0, size = 0;
1522	s32 ret = 0;
1523
1524	/* We need a copy of the filer table because
1525	* we want to change its order
1526	*/
1527	temp_table = kmemdup(tab, sizeof(*temp_table), GFP_KERNEL);
1528	if (temp_table == NULL)
1529	return -ENOMEM;
1530
1531	mask_table = kcalloc(MAX_FILER_CACHE_IDX / 2 + 1,
1532	sizeof(struct gfar_mask_entry), GFP_KERNEL);
1533
1534	if (mask_table == NULL) {
1535	ret = -ENOMEM;
1536	goto end;
1537	}
1538
1539	and_index = gfar_generate_mask_table(mask_table, tab);
1540
1541	gfar_sort_mask_table(mask_table, temp_table, and_index);
1542
1543	/* Now we can copy the data from our duplicated filer table to
1544	* the real one in the order the mask table says
1545	*/
1546	for (i = 0; i < and_index; i++) {
1547	size = mask_table[i].end - mask_table[i].start + 1;
1548	gfar_copy_filer_entries(&(tab->fe[j]),
1549	&(temp_table->fe[mask_table[i].start]), size);
1550	j += size;
1551	}
1552
1553	/* And finally we just have to check for duplicated masks and drop the
1554	* second ones
1555	*/
1556	for (i = 0; i < tab->index && i < MAX_FILER_CACHE_IDX; i++) {
1557	if (tab->fe[i].ctrl == 0x80) {
1558	previous_mask = i++;
1559	break;
1560	}
1561	}
1562	for (; i < tab->index && i < MAX_FILER_CACHE_IDX; i++) {
1563	if (tab->fe[i].ctrl == 0x80) {
1564	if (tab->fe[i].prop == tab->fe[previous_mask].prop) {
1565	/* Two identical ones found!
1566	* So drop the second one!
1567	*/
1568	gfar_trim_filer_entries(i, i, tab);
1569	} else
1570	/* Not identical! */
1571	previous_mask = i;
1572	}
1573	}
1574
1575	kfree(mask_table);
1576	end: kfree(temp_table);
1577	return ret;
1578	}
1579
1580	/* Write the bit-pattern from software's buffer to hardware registers */	1252	/* Write the bit-pattern from software's buffer to hardware registers */
1581	static int gfar_write_filer_table(struct gfar_private *priv,	1253	static int gfar_write_filer_table(struct gfar_private *priv,
1582	struct filer_table *tab)	1254	struct filer_table *tab)
@@ -1586,11 +1258,10 @@ static int gfar_write_filer_table(struct gfar_private *priv, · 3 unmodified lines
1586	return -EBUSY;	1258	return -EBUSY;
1587		1259
1588	/* Fill regular entries */	1260	/* Fill regular entries */
1589	for (; i < MAX_FILER_IDX - 1 && (tab->fe[i].ctrl \| tab->fe[i].prop);	1261	for (; i < MAX_FILER_IDX && (tab->fe[i].ctrl \| tab->fe[i].prop); i++)
1590	i++)
1591	gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop);	1262	gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop);
1592	/* Fill the rest with fall-troughs */	1263	/* Fill the rest with fall-troughs */
1593	for (; i < MAX_FILER_IDX - 1; i++)	1264	for (; i < MAX_FILER_IDX; i++)
1594	gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF);	1265	gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF);
1595	/* Last entry must be default accept	1266	/* Last entry must be default accept
1596	* because that's what people expect	1267	* because that's what people expect
@@ -1624,7 +1295,6 @@ static int gfar_process_filer_changes(struct gfar_private *priv) · 27 unmodified lines
1624	{	1295	{
1625	struct ethtool_flow_spec_container *j;	1296	struct ethtool_flow_spec_container *j;
1626	struct filer_table *tab;	1297	struct filer_table *tab;
1627	s32 i = 0;
1628	s32 ret = 0;	1298	s32 ret = 0;
1629		1299
1630	/* So index is set to zero, too! */	1300	/* So index is set to zero, too! */
@@ -1649,17 +1319,6 @@ static int gfar_process_filer_changes(struct gfar_private *priv) · 18 unmodified lines
1649	}	1319	}
1650	}	1320	}
1651		1321
1652	i = tab->index;
1653
1654	/* Optimizations to save entries */
1655	gfar_cluster_filer(tab);
1656	gfar_optimize_filer_masks(tab);
1657
1658	pr_debug("\tSummary:\n"
1659	"\tData on hardware: %d\n"
1660	"\tCompression rate: %d%%\n",
1661	tab->index, 100 - (100 * tab->index) / i);
1662
1663	/* Write everything to hardware */	1322	/* Write everything to hardware */
1664	ret = gfar_write_filer_table(priv, tab);	1323	ret = gfar_write_filer_table(priv, tab);
1665	if (ret == -EBUSY) {	1324	if (ret == -EBUSY) {
@@ -1725,13 +1384,14 @@ static int gfar_add_cls(struct gfar_private *priv, · 59 unmodified lines
1725	}	1384	}
1726		1385
1727	process:	1386	process:
		1387	priv->rx_list.count++;
1728	ret = gfar_process_filer_changes(priv);	1388	ret = gfar_process_filer_changes(priv);
1729	if (ret)	1389	if (ret)
1730	goto clean_list;	1390	goto clean_list;
1731	priv->rx_list.count++;
1732	return ret;	1391	return ret;
1733		1392
1734	clean_list:	1393	clean_list:
		1394	priv->rx_list.count--;
1735	list_del(&temp->list);	1395	list_del(&temp->list);
1736	clean_mem:	1396	clean_mem:
1737	kfree(temp);	1397	kfree(temp);

drivers/net/ethernet/marvell/mvpp2.c+167−77

@@ -27,6 +27,8 @@ · 26 unmodified lines
27	#include <linux/of_address.h>	27	#include <linux/of_address.h>
28	#include <linux/phy.h>	28	#include <linux/phy.h>
29	#include <linux/clk.h>	29	#include <linux/clk.h>
		30	#include <linux/hrtimer.h>
		31	#include <linux/ktime.h>
30	#include <uapi/linux/ppp_defs.h>	32	#include <uapi/linux/ppp_defs.h>
31	#include <net/ip.h>	33	#include <net/ip.h>
32	#include <net/ipv6.h>	34	#include <net/ipv6.h>
@@ -299,6 +301,7 @@ · 266 unmodified lines
299		301
300	/* Coalescing */	302	/* Coalescing */
301	#define MVPP2_TXDONE_COAL_PKTS_THRESH 15	303	#define MVPP2_TXDONE_COAL_PKTS_THRESH 15
		304	#define MVPP2_TXDONE_HRTIMER_PERIOD_NS 1000000UL
302	#define MVPP2_RX_COAL_PKTS 32	305	#define MVPP2_RX_COAL_PKTS 32
303	#define MVPP2_RX_COAL_USEC 100	306	#define MVPP2_RX_COAL_USEC 100
304		307
@@ -660,6 +663,14 @@ struct mvpp2_pcpu_stats { · 355 unmodified lines
660	u64 tx_bytes;	663	u64 tx_bytes;
661	};	664	};
662		665
		666	/* Per-CPU port control */
		667	struct mvpp2_port_pcpu {
		668	struct hrtimer tx_done_timer;
		669	bool timer_scheduled;
		670	/* Tasklet for egress finalization */
		671	struct tasklet_struct tx_done_tasklet;
		672	};
		673
663	struct mvpp2_port {	674	struct mvpp2_port {
664	u8 id;	675	u8 id;
665		676
@@ -679,6 +690,9 @@ struct mvpp2_port { · 13 unmodified lines
679	u32 pending_cause_rx;	690	u32 pending_cause_rx;
680	struct napi_struct napi;	691	struct napi_struct napi;
681		692
		693	/* Per-CPU port control */
		694	struct mvpp2_port_pcpu __percpu *pcpu;
		695
682	/* Flags */	696	/* Flags */
683	unsigned long flags;	697	unsigned long flags;
684		698
@@ -776,6 +790,9 @@ struct mvpp2_txq_pcpu { · 91 unmodified lines
776	/* Array of transmitted skb */	790	/* Array of transmitted skb */
777	struct sk_buff **tx_skb;	791	struct sk_buff **tx_skb;
778		792
		793	/* Array of transmitted buffers' physical addresses */
		794	dma_addr_t *tx_buffs;
		795
779	/* Index of last TX DMA descriptor that was inserted */	796	/* Index of last TX DMA descriptor that was inserted */
780	int txq_put_index;	797	int txq_put_index;
781		798
@@ -913,8 +930,6 @@ struct mvpp2_bm_pool { · 131 unmodified lines
913	/* Occupied buffers indicator */	930	/* Occupied buffers indicator */
914	atomic_t in_use;	931	atomic_t in_use;
915	int in_use_thresh;	932	int in_use_thresh;
916
917	spinlock_t lock;
918	};	933	};
919		934
920	struct mvpp2_buff_hdr {	935	struct mvpp2_buff_hdr {
@@ -963,9 +978,13 @@ static void mvpp2_txq_inc_get(struct mvpp2_txq_pcpu *txq_pcpu) · 42 unmodified lines
963	}	978	}
964		979
965	static void mvpp2_txq_inc_put(struct mvpp2_txq_pcpu *txq_pcpu,	980	static void mvpp2_txq_inc_put(struct mvpp2_txq_pcpu *txq_pcpu,
966	struct sk_buff *skb)	981	struct sk_buff *skb,
		982	struct mvpp2_tx_desc *tx_desc)
967	{	983	{
968	txq_pcpu->tx_skb[txq_pcpu->txq_put_index] = skb;	984	txq_pcpu->tx_skb[txq_pcpu->txq_put_index] = skb;
		985	if (skb)
		986	txq_pcpu->tx_buffs[txq_pcpu->txq_put_index] =
		987	tx_desc->buf_phys_addr;
969	txq_pcpu->txq_put_index++;	988	txq_pcpu->txq_put_index++;
970	if (txq_pcpu->txq_put_index == txq_pcpu->size)	989	if (txq_pcpu->txq_put_index == txq_pcpu->size)
971	txq_pcpu->txq_put_index = 0;	990	txq_pcpu->txq_put_index = 0;
@@ -3376,7 +3395,6 @@ static int mvpp2_bm_pool_create(struct platform_device *pdev, · 2404 unmodified lines
3376	bm_pool->pkt_size = 0;	3395	bm_pool->pkt_size = 0;
3377	bm_pool->buf_num = 0;	3396	bm_pool->buf_num = 0;
3378	atomic_set(&bm_pool->in_use, 0);	3397	atomic_set(&bm_pool->in_use, 0);
3379	spin_lock_init(&bm_pool->lock);
3380		3398
3381	return 0;	3399	return 0;
3382	}	3400	}
@@ -3647,7 +3665,6 @@ static struct mvpp2_bm_pool * · 264 unmodified lines
3647	mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,	3665	mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type,
3648	int pkt_size)	3666	int pkt_size)
3649	{	3667	{
3650	unsigned long flags = 0;
3651	struct mvpp2_bm_pool *new_pool = &port->priv->bm_pools[pool];	3668	struct mvpp2_bm_pool *new_pool = &port->priv->bm_pools[pool];
3652	int num;	3669	int num;
3653		3670
@@ -3656,8 +3673,6 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 2 unmodified lines
3656	return NULL;	3673	return NULL;
3657	}	3674	}
3658		3675
3659	spin_lock_irqsave(&new_pool->lock, flags);
3660
3661	if (new_pool->type == MVPP2_BM_FREE)	3676	if (new_pool->type == MVPP2_BM_FREE)
3662	new_pool->type = type;	3677	new_pool->type = type;
3663		3678
@@ -3686,8 +3701,6 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 22 unmodified lines
3686	if (num != pkts_num) {	3701	if (num != pkts_num) {
3687	WARN(1, "pool %d: %d of %d allocated\n",	3702	WARN(1, "pool %d: %d of %d allocated\n",
3688	new_pool->id, num, pkts_num);	3703	new_pool->id, num, pkts_num);
3689	/* We need to undo the bufs_add() allocations */
3690	spin_unlock_irqrestore(&new_pool->lock, flags);
3691	return NULL;	3704	return NULL;
3692	}	3705	}
3693	}	3706	}
@@ -3695,15 +3708,12 @@ mvpp2_bm_pool_use(struct mvpp2_port *port, int pool, enum mvpp2_bm_type type, · 1 unmodified line
3695	mvpp2_bm_pool_bufsize_set(port->priv, new_pool,	3708	mvpp2_bm_pool_bufsize_set(port->priv, new_pool,
3696	MVPP2_RX_BUF_SIZE(new_pool->pkt_size));	3709	MVPP2_RX_BUF_SIZE(new_pool->pkt_size));
3697		3710
3698	spin_unlock_irqrestore(&new_pool->lock, flags);
3699
3700	return new_pool;	3711	return new_pool;
3701	}	3712	}
3702		3713
3703	/* Initialize pools for swf */	3714	/* Initialize pools for swf */
3704	static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port)	3715	static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port)
3705	{	3716	{
3706	unsigned long flags = 0;
3707	int rxq;	3717	int rxq;
3708		3718
3709	if (!port->pool_long) {	3719	if (!port->pool_long) {
@@ -3714,9 +3724,7 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port) · 4 unmodified lines
3714	if (!port->pool_long)	3724	if (!port->pool_long)
3715	return -ENOMEM;	3725	return -ENOMEM;
3716		3726
3717	spin_lock_irqsave(&port->pool_long->lock, flags);
3718	port->pool_long->port_map \|= (1 << port->id);	3727	port->pool_long->port_map \|= (1 << port->id);
3719	spin_unlock_irqrestore(&port->pool_long->lock, flags);
3720		3728
3721	for (rxq = 0; rxq < rxq_number; rxq++)	3729	for (rxq = 0; rxq < rxq_number; rxq++)
3722	mvpp2_rxq_long_pool_set(port, rxq, port->pool_long->id);	3730	mvpp2_rxq_long_pool_set(port, rxq, port->pool_long->id);
@@ -3730,9 +3738,7 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port) · 7 unmodified lines
3730	if (!port->pool_short)	3738	if (!port->pool_short)
3731	return -ENOMEM;	3739	return -ENOMEM;
3732		3740
3733	spin_lock_irqsave(&port->pool_short->lock, flags);
3734	port->pool_short->port_map \|= (1 << port->id);	3741	port->pool_short->port_map \|= (1 << port->id);
3735	spin_unlock_irqrestore(&port->pool_short->lock, flags);
3736		3742
3737	for (rxq = 0; rxq < rxq_number; rxq++)	3743	for (rxq = 0; rxq < rxq_number; rxq++)
3738	mvpp2_rxq_short_pool_set(port, rxq,	3744	mvpp2_rxq_short_pool_set(port, rxq,
@@ -3806,7 +3812,6 @@ static void mvpp2_interrupts_unmask(void *arg) · 67 unmodified lines
3806		3812
3807	mvpp2_write(port->priv, MVPP2_ISR_RX_TX_MASK_REG(port->id),	3813	mvpp2_write(port->priv, MVPP2_ISR_RX_TX_MASK_REG(port->id),
3808	(MVPP2_CAUSE_MISC_SUM_MASK \|	3814	(MVPP2_CAUSE_MISC_SUM_MASK \|
3809	MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK \|
3810	MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK));	3815	MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK));
3811	}	3816	}
3812		3817
@@ -4382,23 +4387,6 @@ static void mvpp2_rx_time_coal_set(struct mvpp2_port *port, · 569 unmodified lines
4382	rxq->time_coal = usec;	4387	rxq->time_coal = usec;
4383	}	4388	}
4384		4389
4385	/* Set threshold for TX_DONE pkts coalescing */
4386	static void mvpp2_tx_done_pkts_coal_set(void *arg)
4387	{
4388	struct mvpp2_port *port = arg;
4389	int queue;
4390	u32 val;
4391
4392	for (queue = 0; queue < txq_number; queue++) {
4393	struct mvpp2_tx_queue *txq = port->txqs[queue];
4394
4395	val = (txq->done_pkts_coal << MVPP2_TRANSMITTED_THRESH_OFFSET) &
4396	MVPP2_TRANSMITTED_THRESH_MASK;
4397	mvpp2_write(port->priv, MVPP2_TXQ_NUM_REG, txq->id);
4398	mvpp2_write(port->priv, MVPP2_TXQ_THRESH_REG, val);
4399	}
4400	}
4401
4402	/* Free Tx queue skbuffs */	4390	/* Free Tx queue skbuffs */
4403	static void mvpp2_txq_bufs_free(struct mvpp2_port *port,	4391	static void mvpp2_txq_bufs_free(struct mvpp2_port *port,
4404	struct mvpp2_tx_queue *txq,	4392	struct mvpp2_tx_queue *txq,
@@ -4407,8 +4395,8 @@ static void mvpp2_txq_bufs_free(struct mvpp2_port *port, · 2 unmodified lines
4407	int i;	4395	int i;
4408		4396
4409	for (i = 0; i < num; i++) {	4397	for (i = 0; i < num; i++) {
4410	struct mvpp2_tx_desc *tx_desc = txq->descs +	4398	dma_addr_t buf_phys_addr =
4411	txq_pcpu->txq_get_index;	4399	txq_pcpu->tx_buffs[txq_pcpu->txq_get_index];
4412	struct sk_buff *skb = txq_pcpu->tx_skb[txq_pcpu->txq_get_index];	4400	struct sk_buff *skb = txq_pcpu->tx_skb[txq_pcpu->txq_get_index];
4413		4401
4414	mvpp2_txq_inc_get(txq_pcpu);	4402	mvpp2_txq_inc_get(txq_pcpu);
@@ -4416,8 +4404,8 @@ static void mvpp2_txq_bufs_free(struct mvpp2_port *port, · 1 unmodified line
4416	if (!skb)	4404	if (!skb)
4417	continue;	4405	continue;
4418		4406
4419	dma_unmap_single(port->dev->dev.parent, tx_desc->buf_phys_addr,	4407	dma_unmap_single(port->dev->dev.parent, buf_phys_addr,
4420	tx_desc->data_size, DMA_TO_DEVICE);	4408	skb_headlen(skb), DMA_TO_DEVICE);
4421	dev_kfree_skb_any(skb);	4409	dev_kfree_skb_any(skb);
4422	}	4410	}
4423	}	4411	}
@@ -4433,7 +4421,7 @@ static inline struct mvpp2_rx_queue mvpp2_get_rx_queue(struct mvpp2_port port, · 9 unmodified lines
4433	static inline struct mvpp2_tx_queue mvpp2_get_tx_queue(struct mvpp2_port port,	4421	static inline struct mvpp2_tx_queue mvpp2_get_tx_queue(struct mvpp2_port port,
4434	u32 cause)	4422	u32 cause)
4435	{	4423	{
4436	int queue = fls(cause >> 16) - 1;	4424	int queue = fls(cause) - 1;
4437		4425
4438	return port->txqs[queue];	4426	return port->txqs[queue];
4439	}	4427	}
@@ -4460,6 +4448,29 @@ static void mvpp2_txq_done(struct mvpp2_port port, struct mvpp2_tx_queue txq, · 20 unmodified lines
4460	netif_tx_wake_queue(nq);	4448	netif_tx_wake_queue(nq);
4461	}	4449	}
4462		4450
		4451	static unsigned int mvpp2_tx_done(struct mvpp2_port *port, u32 cause)
		4452	{
		4453	struct mvpp2_tx_queue *txq;
		4454	struct mvpp2_txq_pcpu *txq_pcpu;
		4455	unsigned int tx_todo = 0;
		4456
		4457	while (cause) {
		4458	txq = mvpp2_get_tx_queue(port, cause);
		4459	if (!txq)
		4460	break;
		4461
		4462	txq_pcpu = this_cpu_ptr(txq->pcpu);
		4463
		4464	if (txq_pcpu->count) {
		4465	mvpp2_txq_done(port, txq, txq_pcpu);
		4466	tx_todo += txq_pcpu->count;
		4467	}
		4468
		4469	cause &= ~(1 << txq->log_id);
		4470	}
		4471	return tx_todo;
		4472	}
		4473
4463	/* Rx/Tx queue initialization/cleanup methods */	4474	/* Rx/Tx queue initialization/cleanup methods */
4464		4475
4465	/* Allocate and initialize descriptors for aggr TXQ */	4476	/* Allocate and initialize descriptors for aggr TXQ */
@@ -4649,12 +4660,13 @@ static int mvpp2_txq_init(struct mvpp2_port *port, · 183 unmodified lines
4649	txq_pcpu->tx_skb = kmalloc(txq_pcpu->size *	4660	txq_pcpu->tx_skb = kmalloc(txq_pcpu->size *
4650	sizeof(*txq_pcpu->tx_skb),	4661	sizeof(*txq_pcpu->tx_skb),
4651	GFP_KERNEL);	4662	GFP_KERNEL);
4652	if (!txq_pcpu->tx_skb) {	4663	if (!txq_pcpu->tx_skb)
4653	dma_free_coherent(port->dev->dev.parent,	4664	goto error;
4654	txq->size * MVPP2_DESC_ALIGNED_SIZE,	4665
4655	txq->descs, txq->descs_phys);	4666	txq_pcpu->tx_buffs = kmalloc(txq_pcpu->size *
4656	return -ENOMEM;	4667	sizeof(dma_addr_t), GFP_KERNEL);
4657	}	4668	if (!txq_pcpu->tx_buffs)
		4669	goto error;
4658		4670
4659	txq_pcpu->count = 0;	4671	txq_pcpu->count = 0;
4660	txq_pcpu->reserved_num = 0;	4672	txq_pcpu->reserved_num = 0;
@@ -4663,6 +4675,19 @@ static int mvpp2_txq_init(struct mvpp2_port *port, · 2 unmodified lines
4663	}	4675	}
4664		4676
4665	return 0;	4677	return 0;
		4678
		4679	error:
		4680	for_each_present_cpu(cpu) {
		4681	txq_pcpu = per_cpu_ptr(txq->pcpu, cpu);
		4682	kfree(txq_pcpu->tx_skb);
		4683	kfree(txq_pcpu->tx_buffs);
		4684	}
		4685
		4686	dma_free_coherent(port->dev->dev.parent,
		4687	txq->size * MVPP2_DESC_ALIGNED_SIZE,
		4688	txq->descs, txq->descs_phys);
		4689
		4690	return -ENOMEM;
4666	}	4691	}
4667		4692
4668	/* Free allocated TXQ resources */	4693	/* Free allocated TXQ resources */
@@ -4675,6 +4700,7 @@ static void mvpp2_txq_deinit(struct mvpp2_port *port, · 6 unmodified lines
4675	for_each_present_cpu(cpu) {	4700	for_each_present_cpu(cpu) {
4676	txq_pcpu = per_cpu_ptr(txq->pcpu, cpu);	4701	txq_pcpu = per_cpu_ptr(txq->pcpu, cpu);
4677	kfree(txq_pcpu->tx_skb);	4702	kfree(txq_pcpu->tx_skb);
		4703	kfree(txq_pcpu->tx_buffs);
4678	}	4704	}
4679		4705
4680	if (txq->descs)	4706	if (txq->descs)
@@ -4805,7 +4831,6 @@ static int mvpp2_setup_txqs(struct mvpp2_port *port) · 124 unmodified lines
4805	goto err_cleanup;	4831	goto err_cleanup;
4806	}	4832	}
4807		4833
4808	on_each_cpu(mvpp2_tx_done_pkts_coal_set, port, 1);
4809	on_each_cpu(mvpp2_txq_sent_counter_clear, port, 1);	4834	on_each_cpu(mvpp2_txq_sent_counter_clear, port, 1);
4810	return 0;	4835	return 0;
4811		4836
@@ -4887,6 +4912,49 @@ static void mvpp2_link_event(struct net_device *dev) · 75 unmodified lines
4887	}	4912	}
4888	}	4913	}
4889		4914
		4915	static void mvpp2_timer_set(struct mvpp2_port_pcpu *port_pcpu)
		4916	{
		4917	ktime_t interval;
		4918
		4919	if (!port_pcpu->timer_scheduled) {
		4920	port_pcpu->timer_scheduled = true;
		4921	interval = ktime_set(0, MVPP2_TXDONE_HRTIMER_PERIOD_NS);
		4922	hrtimer_start(&port_pcpu->tx_done_timer, interval,
		4923	HRTIMER_MODE_REL_PINNED);
		4924	}
		4925	}
		4926
		4927	static void mvpp2_tx_proc_cb(unsigned long data)
		4928	{
		4929	struct net_device dev = (struct net_device )data;
		4930	struct mvpp2_port *port = netdev_priv(dev);
		4931	struct mvpp2_port_pcpu *port_pcpu = this_cpu_ptr(port->pcpu);
		4932	unsigned int tx_todo, cause;
		4933
		4934	if (!netif_running(dev))
		4935	return;
		4936	port_pcpu->timer_scheduled = false;
		4937
		4938	/* Process all the Tx queues */
		4939	cause = (1 << txq_number) - 1;
		4940	tx_todo = mvpp2_tx_done(port, cause);
		4941
		4942	/* Set the timer in case not all the packets were processed */
		4943	if (tx_todo)
		4944	mvpp2_timer_set(port_pcpu);
		4945	}
		4946
		4947	static enum hrtimer_restart mvpp2_hr_timer_cb(struct hrtimer *timer)
		4948	{
		4949	struct mvpp2_port_pcpu *port_pcpu = container_of(timer,
		4950	struct mvpp2_port_pcpu,
		4951	tx_done_timer);
		4952
		4953	tasklet_schedule(&port_pcpu->tx_done_tasklet);
		4954
		4955	return HRTIMER_NORESTART;
		4956	}
		4957
4890	/* Main RX/TX processing routines */	4958	/* Main RX/TX processing routines */
4891		4959
4892	/* Display more error info */	4960	/* Display more error info */
@@ -5144,11 +5212,11 @@ static int mvpp2_tx_frag_process(struct mvpp2_port port, struct sk_buff skb, · 251 unmodified lines
5144	if (i == (skb_shinfo(skb)->nr_frags - 1)) {	5212	if (i == (skb_shinfo(skb)->nr_frags - 1)) {
5145	/* Last descriptor */	5213	/* Last descriptor */
5146	tx_desc->command = MVPP2_TXD_L_DESC;	5214	tx_desc->command = MVPP2_TXD_L_DESC;
5147	mvpp2_txq_inc_put(txq_pcpu, skb);	5215	mvpp2_txq_inc_put(txq_pcpu, skb, tx_desc);
5148	} else {	5216	} else {
5149	/* Descriptor in the middle: Not First, Not Last */	5217	/* Descriptor in the middle: Not First, Not Last */
5150	tx_desc->command = 0;	5218	tx_desc->command = 0;
5151	mvpp2_txq_inc_put(txq_pcpu, NULL);	5219	mvpp2_txq_inc_put(txq_pcpu, NULL, tx_desc);
5152	}	5220	}
5153	}	5221	}
5154		5222
@@ -5214,12 +5282,12 @@ static int mvpp2_tx(struct sk_buff skb, struct net_device dev) · 59 unmodified lines
5214	/* First and Last descriptor */	5282	/* First and Last descriptor */
5215	tx_cmd \|= MVPP2_TXD_F_DESC \| MVPP2_TXD_L_DESC;	5283	tx_cmd \|= MVPP2_TXD_F_DESC \| MVPP2_TXD_L_DESC;
5216	tx_desc->command = tx_cmd;	5284	tx_desc->command = tx_cmd;
5217	mvpp2_txq_inc_put(txq_pcpu, skb);	5285	mvpp2_txq_inc_put(txq_pcpu, skb, tx_desc);
5218	} else {	5286	} else {
5219	/* First but not Last */	5287	/* First but not Last */
5220	tx_cmd \|= MVPP2_TXD_F_DESC \| MVPP2_TXD_PADDING_DISABLE;	5288	tx_cmd \|= MVPP2_TXD_F_DESC \| MVPP2_TXD_PADDING_DISABLE;
5221	tx_desc->command = tx_cmd;	5289	tx_desc->command = tx_cmd;
5222	mvpp2_txq_inc_put(txq_pcpu, NULL);	5290	mvpp2_txq_inc_put(txq_pcpu, NULL, tx_desc);
5223		5291
5224	/* Continue with other skb fragments */	5292	/* Continue with other skb fragments */
5225	if (mvpp2_tx_frag_process(port, skb, aggr_txq, txq)) {	5293	if (mvpp2_tx_frag_process(port, skb, aggr_txq, txq)) {
@@ -5255,6 +5323,17 @@ out: · 29 unmodified lines
5255	dev_kfree_skb_any(skb);	5323	dev_kfree_skb_any(skb);
5256	}	5324	}
5257		5325
		5326	/* Finalize TX processing */
		5327	if (txq_pcpu->count >= txq->done_pkts_coal)
		5328	mvpp2_txq_done(port, txq, txq_pcpu);
		5329
		5330	/* Set the timer in case not all frags were processed */
		5331	if (txq_pcpu->count <= frags && txq_pcpu->count > 0) {
		5332	struct mvpp2_port_pcpu *port_pcpu = this_cpu_ptr(port->pcpu);
		5333
		5334	mvpp2_timer_set(port_pcpu);
		5335	}
		5336
5258	return NETDEV_TX_OK;	5337	return NETDEV_TX_OK;
5259	}	5338	}
5260		5339
@@ -5268,10 +5347,11 @@ static inline void mvpp2_cause_error(struct net_device *dev, int cause) · 7 unmodified lines
5268	netdev_err(dev, "tx fifo underrun error\n");	5347	netdev_err(dev, "tx fifo underrun error\n");
5269	}	5348	}
5270		5349
5271	static void mvpp2_txq_done_percpu(void *arg)	5350	static int mvpp2_poll(struct napi_struct *napi, int budget)
5272	{	5351	{
5273	struct mvpp2_port *port = arg;	5352	u32 cause_rx_tx, cause_rx, cause_misc;
5274	u32 cause_rx_tx, cause_tx, cause_misc;	5353	int rx_done = 0;
		5354	struct mvpp2_port *port = netdev_priv(napi->dev);
5275		5355
5276	/* Rx/Tx cause register	5356	/* Rx/Tx cause register
5277	*	5357	*
@@ -5285,7 +5365,7 @@ static void mvpp2_txq_done_percpu(void *arg) · 7 unmodified lines
5285	*/	5365	*/
5286	cause_rx_tx = mvpp2_read(port->priv,	5366	cause_rx_tx = mvpp2_read(port->priv,
5287	MVPP2_ISR_RX_TX_CAUSE_REG(port->id));	5367	MVPP2_ISR_RX_TX_CAUSE_REG(port->id));
5288	cause_tx = cause_rx_tx & MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;	5368	cause_rx_tx &= ~MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;
5289	cause_misc = cause_rx_tx & MVPP2_CAUSE_MISC_SUM_MASK;	5369	cause_misc = cause_rx_tx & MVPP2_CAUSE_MISC_SUM_MASK;
5290		5370
5291	if (cause_misc) {	5371	if (cause_misc) {
@@ -5297,26 +5377,6 @@ static void mvpp2_txq_done_percpu(void *arg) · 5 unmodified lines
5297	cause_rx_tx & ~MVPP2_CAUSE_MISC_SUM_MASK);	5377	cause_rx_tx & ~MVPP2_CAUSE_MISC_SUM_MASK);
5298	}	5378	}
5299		5379
5300	/* Release TX descriptors */
5301	if (cause_tx) {
5302	struct mvpp2_tx_queue *txq = mvpp2_get_tx_queue(port, cause_tx);
5303	struct mvpp2_txq_pcpu *txq_pcpu = this_cpu_ptr(txq->pcpu);
5304
5305	if (txq_pcpu->count)
5306	mvpp2_txq_done(port, txq, txq_pcpu);
5307	}
5308	}
5309
5310	static int mvpp2_poll(struct napi_struct *napi, int budget)
5311	{
5312	u32 cause_rx_tx, cause_rx;
5313	int rx_done = 0;
5314	struct mvpp2_port *port = netdev_priv(napi->dev);
5315
5316	on_each_cpu(mvpp2_txq_done_percpu, port, 1);
5317
5318	cause_rx_tx = mvpp2_read(port->priv,
5319	MVPP2_ISR_RX_TX_CAUSE_REG(port->id));
5320	cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK;	5380	cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK;
5321		5381
5322	/* Process RX packets */	5382	/* Process RX packets */
@@ -5561,6 +5621,8 @@ err_cleanup_rxqs: · 238 unmodified lines
5561	static int mvpp2_stop(struct net_device *dev)	5621	static int mvpp2_stop(struct net_device *dev)
5562	{	5622	{
5563	struct mvpp2_port *port = netdev_priv(dev);	5623	struct mvpp2_port *port = netdev_priv(dev);
		5624	struct mvpp2_port_pcpu *port_pcpu;
		5625	int cpu;
5564		5626
5565	mvpp2_stop_dev(port);	5627	mvpp2_stop_dev(port);
5566	mvpp2_phy_disconnect(port);	5628	mvpp2_phy_disconnect(port);
@@ -5569,6 +5631,13 @@ static int mvpp2_stop(struct net_device *dev) · 2 unmodified lines
5569	on_each_cpu(mvpp2_interrupts_mask, port, 1);	5631	on_each_cpu(mvpp2_interrupts_mask, port, 1);
5570		5632
5571	free_irq(port->irq, port);	5633	free_irq(port->irq, port);
		5634	for_each_present_cpu(cpu) {
		5635	port_pcpu = per_cpu_ptr(port->pcpu, cpu);
		5636
		5637	hrtimer_cancel(&port_pcpu->tx_done_timer);
		5638	port_pcpu->timer_scheduled = false;
		5639	tasklet_kill(&port_pcpu->tx_done_tasklet);
		5640	}
5572	mvpp2_cleanup_rxqs(port);	5641	mvpp2_cleanup_rxqs(port);
5573	mvpp2_cleanup_txqs(port);	5642	mvpp2_cleanup_txqs(port);
5574		5643
@@ -5784,7 +5853,6 @@ static int mvpp2_ethtool_set_coalesce(struct net_device *dev, · 209 unmodified lines
5784	txq->done_pkts_coal = c->tx_max_coalesced_frames;	5853	txq->done_pkts_coal = c->tx_max_coalesced_frames;
5785	}	5854	}
5786		5855
5787	on_each_cpu(mvpp2_tx_done_pkts_coal_set, port, 1);
5788	return 0;	5856	return 0;
5789	}	5857	}
5790		5858
@@ -6035,6 +6103,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 244 unmodified lines
6035	{	6103	{
6036	struct device_node *phy_node;	6104	struct device_node *phy_node;
6037	struct mvpp2_port *port;	6105	struct mvpp2_port *port;
		6106	struct mvpp2_port_pcpu *port_pcpu;
6038	struct net_device *dev;	6107	struct net_device *dev;
6039	struct resource *res;	6108	struct resource *res;
6040	const char *dt_mac_addr;	6109	const char *dt_mac_addr;
@@ -6044,7 +6113,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 3 unmodified lines
6044	int features;	6113	int features;
6045	int phy_mode;	6114	int phy_mode;
6046	int priv_common_regs_num = 2;	6115	int priv_common_regs_num = 2;
6047	int err, i;	6116	int err, i, cpu;
6048		6117
6049	dev = alloc_etherdev_mqs(sizeof(struct mvpp2_port), txq_number,	6118	dev = alloc_etherdev_mqs(sizeof(struct mvpp2_port), txq_number,
6050	rxq_number);	6119	rxq_number);
@@ -6135,6 +6204,24 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 84 unmodified lines
6135	}	6204	}
6136	mvpp2_port_power_up(port);	6205	mvpp2_port_power_up(port);
6137		6206
		6207	port->pcpu = alloc_percpu(struct mvpp2_port_pcpu);
		6208	if (!port->pcpu) {
		6209	err = -ENOMEM;
		6210	goto err_free_txq_pcpu;
		6211	}
		6212
		6213	for_each_present_cpu(cpu) {
		6214	port_pcpu = per_cpu_ptr(port->pcpu, cpu);
		6215
		6216	hrtimer_init(&port_pcpu->tx_done_timer, CLOCK_MONOTONIC,
		6217	HRTIMER_MODE_REL_PINNED);
		6218	port_pcpu->tx_done_timer.function = mvpp2_hr_timer_cb;
		6219	port_pcpu->timer_scheduled = false;
		6220
		6221	tasklet_init(&port_pcpu->tx_done_tasklet, mvpp2_tx_proc_cb,
		6222	(unsigned long)dev);
		6223	}
		6224
6138	netif_napi_add(dev, &port->napi, mvpp2_poll, NAPI_POLL_WEIGHT);	6225	netif_napi_add(dev, &port->napi, mvpp2_poll, NAPI_POLL_WEIGHT);
6139	features = NETIF_F_SG \| NETIF_F_IP_CSUM;	6226	features = NETIF_F_SG \| NETIF_F_IP_CSUM;
6140	dev->features = features \| NETIF_F_RXCSUM;	6227	dev->features = features \| NETIF_F_RXCSUM;
@@ -6144,7 +6231,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 3 unmodified lines
6144	err = register_netdev(dev);	6231	err = register_netdev(dev);
6145	if (err < 0) {	6232	if (err < 0) {
6146	dev_err(&pdev->dev, "failed to register netdev\n");	6233	dev_err(&pdev->dev, "failed to register netdev\n");
6147	goto err_free_txq_pcpu;	6234	goto err_free_port_pcpu;
6148	}	6235	}
6149	netdev_info(dev, "Using %s mac address %pM\n", mac_from, dev->dev_addr);	6236	netdev_info(dev, "Using %s mac address %pM\n", mac_from, dev->dev_addr);
6150		6237
@@ -6153,6 +6240,8 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 2 unmodified lines
6153	priv->port_list[id] = port;	6240	priv->port_list[id] = port;
6154	return 0;	6241	return 0;
6155		6242
		6243	err_free_port_pcpu:
		6244	free_percpu(port->pcpu);
6156	err_free_txq_pcpu:	6245	err_free_txq_pcpu:
6157	for (i = 0; i < txq_number; i++)	6246	for (i = 0; i < txq_number; i++)
6158	free_percpu(port->txqs[i]->pcpu);	6247	free_percpu(port->txqs[i]->pcpu);
@@ -6171,6 +6260,7 @@ static void mvpp2_port_remove(struct mvpp2_port *port) · 12 unmodified lines
6171	int i;	6260	int i;
6172		6261
6173	unregister_netdev(port->dev);	6262	unregister_netdev(port->dev);
		6263	free_percpu(port->pcpu);
6174	free_percpu(port->stats);	6264	free_percpu(port->stats);
6175	for (i = 0; i < txq_number; i++)	6265	for (i = 0; i < txq_number; i++)
6176	free_percpu(port->txqs[i]->pcpu);	6266	free_percpu(port->txqs[i]->pcpu);

drivers/net/ethernet/mellanox/mlx4/cmd.c+15−2

 {
 	struct mlx4_cmd *cmd = &mlx4_priv(dev)->cmd;
 	struct mlx4_cmd_context *context;
+	long ret_wait;
 	int err = 0;
 	down(&cmd->event_sem);
 	if (err)
 		goto out_reset;
-	if (!wait_for_completion_timeout(&context->done,
+	if (op == MLX4_CMD_SENSE_PORT) {
-					 msecs_to_jiffies(timeout))) {
+		ret_wait =
+			wait_for_completion_interruptible_timeout(&context->done,
+								  msecs_to_jiffies(timeout));
+		if (ret_wait < 0) {
+			context->fw_status = 0;
+			context->out_param = 0;
+			context->result = 0;
+		}
+	} else {
+		ret_wait = (long)wait_for_completion_timeout(&context->done,
+							     msecs_to_jiffies(timeout));
+	}
+	if (!ret_wait) {
 		mlx4_warn(dev, "command 0x%x timed out (go bit not cleared)\n",
 			  op);
 		if (op == MLX4_CMD_NOP) {

drivers/net/ethernet/mellanox/mlx4/en_rx.c+0−1

@@ -246,7 +246,6 @@ static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv, · 245 unmodified lines
246		246
247	static inline bool mlx4_en_is_ring_empty(struct mlx4_en_rx_ring *ring)	247	static inline bool mlx4_en_is_ring_empty(struct mlx4_en_rx_ring *ring)
248	{	248	{
249	BUG_ON((u32)(ring->prod - ring->cons) > ring->actual_size);
250	return ring->prod == ring->cons;	249	return ring->prod == ring->cons;
251	}	250	}
252		251

drivers/net/ethernet/mellanox/mlx4/eq.c+2−2

@@ -601,7 +601,7 @@ static int mlx4_eq_int(struct mlx4_dev dev, struct mlx4_eq eq) · 600 unmodified lines
601	continue;	601	continue;
602	mlx4_dbg(dev, "%s: Sending MLX4_PORT_CHANGE_SUBTYPE_DOWN to slave: %d, port:%d\n",	602	mlx4_dbg(dev, "%s: Sending MLX4_PORT_CHANGE_SUBTYPE_DOWN to slave: %d, port:%d\n",
603	__func__, i, port);	603	__func__, i, port);
604	s_info = &priv->mfunc.master.vf_oper[slave].vport[port].state;	604	s_info = &priv->mfunc.master.vf_oper[i].vport[port].state;
605	if (IFLA_VF_LINK_STATE_AUTO == s_info->link_state) {	605	if (IFLA_VF_LINK_STATE_AUTO == s_info->link_state) {
606	eqe->event.port_change.port =	606	eqe->event.port_change.port =
607	cpu_to_be32(	607	cpu_to_be32(
@@ -640,7 +640,7 @@ static int mlx4_eq_int(struct mlx4_dev dev, struct mlx4_eq eq) · 32 unmodified lines
640	continue;	640	continue;
641	if (i == mlx4_master_func_num(dev))	641	if (i == mlx4_master_func_num(dev))
642	continue;	642	continue;
643	s_info = &priv->mfunc.master.vf_oper[slave].vport[port].state;	643	s_info = &priv->mfunc.master.vf_oper[i].vport[port].state;
644	if (IFLA_VF_LINK_STATE_AUTO == s_info->link_state) {	644	if (IFLA_VF_LINK_STATE_AUTO == s_info->link_state) {
645	eqe->event.port_change.port =	645	eqe->event.port_change.port =
646	cpu_to_be32(	646	cpu_to_be32(

drivers/net/ethernet/mellanox/mlx4/main.c+5−0

 		} else if (err == -ENOENT) {
 			err = 0;
 			continue;
+		} else if (mlx4_is_slave(dev) && err == -EINVAL) {
+			priv->def_counter[port] = MLX4_SINK_COUNTER_INDEX(dev);
+			mlx4_warn(dev, "can't allocate counter from old PF driver, using index %d\n",
+				  MLX4_SINK_COUNTER_INDEX(dev));
+			err = 0;
 		} else {
 			mlx4_err(dev, "%s: failed to allocate default counter port %d err %d\n",
 				 __func__, port + 1, err);

drivers/net/ethernet/mellanox/mlx5/core/main.c+2−0

@@ -391,6 +391,8 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) · 390 unmodified lines
391	/* disable cmdif checksum */	391	/* disable cmdif checksum */
392	MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0);	392	MLX5_SET(cmd_hca_cap, set_hca_cap, cmdif_checksum, 0);
393		393
		394	MLX5_SET(cmd_hca_cap, set_hca_cap, log_uar_page_sz, PAGE_SHIFT - 12);
		395
394	err = set_caps(dev, set_ctx, set_sz);	396	err = set_caps(dev, set_ctx, set_sz);
395		397
396	query_ex:	398	query_ex:

drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c+1−1

@@ -1415,7 +1415,7 @@ static int qlcnic_83xx_copy_fw_file(struct qlcnic_adapter *adapter) · 1414 unmodified lines
1415	if (fw->size & 0xF) {	1415	if (fw->size & 0xF) {
1416	addr = dest + size;	1416	addr = dest + size;
1417	for (i = 0; i < (fw->size & 0xF); i++)	1417	for (i = 0; i < (fw->size & 0xF); i++)
1418	data[i] = temp[size + i];	1418	data[i] = ((u8 *)temp)[size + i];
1419	for (; i < 16; i++)	1419	for (; i < 16; i++)
1420	data[i] = 0;	1420	data[i] = 0;
1421	ret = qlcnic_ms_mem_write128(adapter, addr,	1421	ret = qlcnic_ms_mem_write128(adapter, addr,

drivers/net/ethernet/realtek/r8169.c+3−1

 	case RTL_GIGA_MAC_VER_46:
 	case RTL_GIGA_MAC_VER_47:
 	case RTL_GIGA_MAC_VER_48:
+		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST | RX_EARLY_OFF);
+		break;
 	case RTL_GIGA_MAC_VER_49:
 	case RTL_GIGA_MAC_VER_50:
 	case RTL_GIGA_MAC_VER_51:
-		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST | RX_EARLY_OFF);
+		RTL_W32(RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST | RX_EARLY_OFF);
 		break;
 	default:
 		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST);

drivers/net/ethernet/rocker/rocker.c+1−0

@@ -4821,6 +4821,7 @@ static void rocker_remove_ports(const struct rocker *rocker) · 4820 unmodified lines
4821	rocker_port_ig_tbl(rocker_port, SWITCHDEV_TRANS_NONE,	4821	rocker_port_ig_tbl(rocker_port, SWITCHDEV_TRANS_NONE,
4822	ROCKER_OP_FLAG_REMOVE);	4822	ROCKER_OP_FLAG_REMOVE);
4823	unregister_netdev(rocker_port->dev);	4823	unregister_netdev(rocker_port->dev);
		4824	free_netdev(rocker_port->dev);
4824	}	4825	}
4825	kfree(rocker->ports);	4826	kfree(rocker->ports);
4826	}	4827	}

drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c+2−2

@@ -42,7 +42,7 @@ · 41 unmodified lines
42	#define NSS_COMMON_CLK_DIV_MASK 0x7f	42	#define NSS_COMMON_CLK_DIV_MASK 0x7f
43		43
44	#define NSS_COMMON_CLK_SRC_CTRL 0x14	44	#define NSS_COMMON_CLK_SRC_CTRL 0x14
45	#define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (1 << x)	45	#define NSS_COMMON_CLK_SRC_CTRL_OFFSET(x) (x)
46	/* Mode is coded on 1 bit but is different depending on the MAC ID:	46	/* Mode is coded on 1 bit but is different depending on the MAC ID:
47	* MAC0: QSGMII=0 RGMII=1	47	* MAC0: QSGMII=0 RGMII=1
48	* MAC1: QSGMII=0 SGMII=0 RGMII=1	48	* MAC1: QSGMII=0 SGMII=0 RGMII=1
@@ -291,7 +291,7 @@ static void ipq806x_gmac_setup(struct platform_device pdev) · 242 unmodified lines
291		291
292	/* Configure the clock src according to the mode */	292	/* Configure the clock src according to the mode */
293	regmap_read(gmac->nss_common, NSS_COMMON_CLK_SRC_CTRL, &val);	293	regmap_read(gmac->nss_common, NSS_COMMON_CLK_SRC_CTRL, &val);
294	val &= ~NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id);	294	val &= ~(1 << NSS_COMMON_CLK_SRC_CTRL_OFFSET(gmac->id));
295	switch (gmac->phy_mode) {	295	switch (gmac->phy_mode) {
296	case PHY_INTERFACE_MODE_RGMII:	296	case PHY_INTERFACE_MODE_RGMII:
297	val \|= NSS_COMMON_CLK_SRC_CTRL_RGMII(gmac->id) <<	297	val \|= NSS_COMMON_CLK_SRC_CTRL_RGMII(gmac->id) <<

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c+4−0

@@ -413,3 +413,7 @@ static int stmmac_pltfr_resume(struct device *dev) · 412 unmodified lines
413	SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,	413	SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,
414	stmmac_pltfr_resume);	414	stmmac_pltfr_resume);
415	EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);	415	EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
		416
		417	MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
		418	MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
		419	MODULE_LICENSE("GPL");

drivers/net/ethernet/sun/niu.c+1−3

 		struct sk_buff *skb_new;
 		skb_new = skb_realloc_headroom(skb, len);
-		if (!skb_new) {
+		if (!skb_new)
-			rp->tx_errors++;
 			goto out_drop;
-		}
 		kfree_skb(skb);
 		skb = skb_new;
 	} else

drivers/net/ethernet/ti/netcp.h+1−1

 	struct list_head	rxhook_list_head;
 	unsigned int		rx_queue_id;
 	void			*rx_fdq[KNAV_DMA_FDQ_PER_CHAN];
-	u32			rx_buffer_sizes[KNAV_DMA_FDQ_PER_CHAN];
 	struct napi_struct	rx_napi;
 	struct napi_struct	tx_napi;
 /* SGMII functions */
 int netcp_sgmii_reset(void __iomem *sgmii_ofs, int port);
+bool netcp_sgmii_rtreset(void __iomem *sgmii_ofs, int port, bool set);
 int netcp_sgmii_get_port_link(void __iomem *sgmii_ofs, int port);
 int netcp_sgmii_config(void __iomem *sgmii_ofs, int port, u32 interface);

drivers/net/ethernet/ti/netcp_core.c+24−25

 #define NETCP_SOP_OFFSET	(NET_IP_ALIGN + NET_SKB_PAD)
 #define NETCP_NAPI_WEIGHT	64
 #define NETCP_TX_TIMEOUT	(5 * HZ)
+#define NETCP_PACKET_SIZE	(ETH_FRAME_LEN + ETH_FCS_LEN)
 #define NETCP_MIN_PACKET_SIZE	ETH_ZLEN
 #define NETCP_MAX_MCAST_ADDR	16
 	if (likely(fdq == 0)) {
 		unsigned int primary_buf_len;
 		/* Allocate a primary receive queue entry */
-		buf_len = netcp->rx_buffer_sizes[0] + NETCP_SOP_OFFSET;
+		buf_len = NETCP_PACKET_SIZE + NETCP_SOP_OFFSET;
 		primary_buf_len = SKB_DATA_ALIGN(buf_len) +
 				SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
-		if (primary_buf_len <= PAGE_SIZE) {
+		bufptr = netdev_alloc_frag(primary_buf_len);
-			bufptr = netdev_alloc_frag(primary_buf_len);
+		pad[1] = primary_buf_len;
-			pad[1] = primary_buf_len;
-		} else {
-			bufptr = kmalloc(primary_buf_len, GFP_ATOMIC |
-					 GFP_DMA32 | __GFP_COLD);
-			pad[1] = 0;
-		}
 		if (unlikely(!bufptr)) {
-			dev_warn_ratelimited(netcp->ndev_dev, "Primary RX buffer alloc failed\n");
+			dev_warn_ratelimited(netcp->ndev_dev,
+					     "Primary RX buffer alloc failed\n");
 			goto fail;
 		}
 		dma = dma_map_single(netcp->dev, bufptr, buf_len,
 				     DMA_TO_DEVICE);
+		if (unlikely(dma_mapping_error(netcp->dev, dma)))
+			goto fail;
 		pad[0] = (u32)bufptr;
 	} else {
 		/* Allocate a secondary receive queue entry */
-		page = alloc_page(GFP_ATOMIC | GFP_DMA32 | __GFP_COLD);
+		page = alloc_page(GFP_ATOMIC | GFP_DMA | __GFP_COLD);
 		if (unlikely(!page)) {
 			dev_warn_ratelimited(netcp->ndev_dev, "Secondary page alloc failed\n");
 			goto fail;
 	/* Map the linear buffer */
 	dma_addr = dma_map_single(dev, skb->data, pkt_len, DMA_TO_DEVICE);
-	if (unlikely(!dma_addr)) {
+	if (unlikely(dma_mapping_error(dev, dma_addr))) {
 		dev_err(netcp->ndev_dev, "Failed to map skb buffer\n");
 		return NULL;
 	}
 	knav_queue_disable_notify(netcp->rx_queue);
 	/* open Rx FDQs */
-	for (i = 0; i < KNAV_DMA_FDQ_PER_CHAN &&
+	for (i = 0; i < KNAV_DMA_FDQ_PER_CHAN && netcp->rx_queue_depths[i];
-	     netcp->rx_queue_depths[i] && netcp->rx_buffer_sizes[i]; ++i) {
+	     ++i) {
 		snprintf(name, sizeof(name), "rx-fdq-%s-%d", ndev->name, i);
 		netcp->rx_fdq[i] = knav_queue_open(name, KNAV_QUEUE_GP, 0);
 		if (IS_ERR_OR_NULL(netcp->rx_fdq[i])) {
 		netcp->rx_queue_depths[0] = 128;
 	}
-	ret = of_property_read_u32_array(node_interface, "rx-buffer-size",
-					 netcp->rx_buffer_sizes,
-					 KNAV_DMA_FDQ_PER_CHAN);
-	if (ret) {
-		dev_err(dev, "missing \"rx-buffer-size\" parameter\n");
-		netcp->rx_buffer_sizes[0] = 1536;
-	}
 	ret = of_property_read_u32_array(node_interface, "rx-pool", temp, 2);
 	if (ret < 0) {
 		dev_err(dev, "missing \"rx-pool\" parameter\n");
 static int netcp_remove(struct platform_device *pdev)
 {
 	struct netcp_device *netcp_device = platform_get_drvdata(pdev);
+	struct netcp_intf *netcp_intf, *netcp_tmp;
 	struct netcp_inst_modpriv *inst_modpriv, *tmp;
 	struct netcp_module *module;
 		list_del(&inst_modpriv->inst_list);
 		kfree(inst_modpriv);
 	}
-	WARN(!list_empty(&netcp_device->interface_head), "%s interface list not empty!\n",
-	     pdev->name);
-	devm_kfree(&pdev->dev, netcp_device);
+	/* now that all modules are removed, clean up the interfaces */
+	list_for_each_entry_safe(netcp_intf, netcp_tmp,
+				 &netcp_device->interface_head,
+				 interface_list) {
+		netcp_delete_interface(netcp_device, netcp_intf->ndev);
+	}
+	WARN(!list_empty(&netcp_device->interface_head),
+	     "%s interface list not empty!\n", pdev->name);
 	pm_runtime_put_sync(&pdev->dev);
 	pm_runtime_disable(&pdev->dev);
 	platform_set_drvdata(pdev, NULL);

drivers/net/ethernet/ti/netcp_ethss.c+37−30

@@ -1901,11 +1901,28 @@ static void gbe_port_config(struct gbe_priv gbe_dev, struct gbe_slave slave, · 1900 unmodified lines
1901	writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control));	1901	writel(slave->mac_control, GBE_REG_ADDR(slave, emac_regs, mac_control));
1902	}	1902	}
1903		1903
		1904	static void gbe_sgmii_rtreset(struct gbe_priv *priv,
		1905	struct gbe_slave *slave, bool set)
		1906	{
		1907	void __iomem *sgmii_port_regs;
		1908
		1909	if (SLAVE_LINK_IS_XGMII(slave))
		1910	return;
		1911
		1912	if ((priv->ss_version == GBE_SS_VERSION_14) && (slave->slave_num >= 2))
		1913	sgmii_port_regs = priv->sgmii_port34_regs;
		1914	else
		1915	sgmii_port_regs = priv->sgmii_port_regs;
		1916
		1917	netcp_sgmii_rtreset(sgmii_port_regs, slave->slave_num, set);
		1918	}
		1919
1904	static void gbe_slave_stop(struct gbe_intf *intf)	1920	static void gbe_slave_stop(struct gbe_intf *intf)
1905	{	1921	{
1906	struct gbe_priv *gbe_dev = intf->gbe_dev;	1922	struct gbe_priv *gbe_dev = intf->gbe_dev;
1907	struct gbe_slave *slave = intf->slave;	1923	struct gbe_slave *slave = intf->slave;
1908		1924
		1925	gbe_sgmii_rtreset(gbe_dev, slave, true);
1909	gbe_port_reset(slave);	1926	gbe_port_reset(slave);
1910	/* Disable forwarding */	1927	/* Disable forwarding */
1911	cpsw_ale_control_set(gbe_dev->ale, slave->port_num,	1928	cpsw_ale_control_set(gbe_dev->ale, slave->port_num,
@@ -1947,6 +1964,7 @@ static int gbe_slave_open(struct gbe_intf *gbe_intf) · 35 unmodified lines
1947		1964
1948	gbe_sgmii_config(priv, slave);	1965	gbe_sgmii_config(priv, slave);
1949	gbe_port_reset(slave);	1966	gbe_port_reset(slave);
		1967	gbe_sgmii_rtreset(priv, slave, false);
1950	gbe_port_config(priv, slave, priv->rx_packet_max);	1968	gbe_port_config(priv, slave, priv->rx_packet_max);
1951	gbe_set_slave_mac(slave, gbe_intf);	1969	gbe_set_slave_mac(slave, gbe_intf);
1952	/* enable forwarding */	1970	/* enable forwarding */
@@ -2490,10 +2508,9 @@ static void free_secondary_ports(struct gbe_priv *gbe_dev) · 537 unmodified lines
2490	{	2508	{
2491	struct gbe_slave *slave;	2509	struct gbe_slave *slave;
2492		2510
2493	for (;;) {	2511	while (!list_empty(&gbe_dev->secondary_slaves)) {
2494	slave = first_sec_slave(gbe_dev);	2512	slave = first_sec_slave(gbe_dev);
2495	if (!slave)	2513
2496	break;
2497	if (slave->phy)	2514	if (slave->phy)
2498	phy_disconnect(slave->phy);	2515	phy_disconnect(slave->phy);
2499	list_del(&slave->slave_list);	2516	list_del(&slave->slave_list);
@@ -2839,14 +2856,13 @@ static int gbe_probe(struct netcp_device netcp_device, struct device dev, · 339 unmodified lines
2839	&gbe_dev->dma_chan_name);	2856	&gbe_dev->dma_chan_name);
2840	if (ret < 0) {	2857	if (ret < 0) {
2841	dev_err(dev, "missing \"tx-channel\" parameter\n");	2858	dev_err(dev, "missing \"tx-channel\" parameter\n");
2842	ret = -ENODEV;	2859	return -EINVAL;
2843	goto quit;
2844	}	2860	}
2845		2861
2846	if (!strcmp(node->name, "gbe")) {	2862	if (!strcmp(node->name, "gbe")) {
2847	ret = get_gbe_resource_version(gbe_dev, node);	2863	ret = get_gbe_resource_version(gbe_dev, node);
2848	if (ret)	2864	if (ret)
2849	goto quit;	2865	return ret;
2850		2866
2851	dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version);	2867	dev_dbg(dev, "ss_version: 0x%08x\n", gbe_dev->ss_version);
2852		2868
@@ -2857,22 +2873,20 @@ static int gbe_probe(struct netcp_device netcp_device, struct device dev, · 4 unmodified lines
2857	else	2873	else
2858	ret = -ENODEV;	2874	ret = -ENODEV;
2859		2875
2860	if (ret)
2861	goto quit;
2862	} else if (!strcmp(node->name, "xgbe")) {	2876	} else if (!strcmp(node->name, "xgbe")) {
2863	ret = set_xgbe_ethss10_priv(gbe_dev, node);	2877	ret = set_xgbe_ethss10_priv(gbe_dev, node);
2864	if (ret)	2878	if (ret)
2865	goto quit;	2879	return ret;
2866	ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs,	2880	ret = netcp_xgbe_serdes_init(gbe_dev->xgbe_serdes_regs,
2867	gbe_dev->ss_regs);	2881	gbe_dev->ss_regs);
2868	if (ret)
2869	goto quit;
2870	} else {	2882	} else {
2871	dev_err(dev, "unknown GBE node(%s)\n", node->name);	2883	dev_err(dev, "unknown GBE node(%s)\n", node->name);
2872	ret = -ENODEV;	2884	ret = -ENODEV;
2873	goto quit;
2874	}	2885	}
2875		2886
		2887	if (ret)
		2888	return ret;
		2889
2876	interfaces = of_get_child_by_name(node, "interfaces");	2890	interfaces = of_get_child_by_name(node, "interfaces");
2877	if (!interfaces)	2891	if (!interfaces)
2878	dev_err(dev, "could not find interfaces\n");	2892	dev_err(dev, "could not find interfaces\n");
@@ -2880,11 +2894,11 @@ static int gbe_probe(struct netcp_device netcp_device, struct device dev, · 1 unmodified line
2880	ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device,	2894	ret = netcp_txpipe_init(&gbe_dev->tx_pipe, netcp_device,
2881	gbe_dev->dma_chan_name, gbe_dev->tx_queue_id);	2895	gbe_dev->dma_chan_name, gbe_dev->tx_queue_id);
2882	if (ret)	2896	if (ret)
2883	goto quit;	2897	return ret;
2884		2898
2885	ret = netcp_txpipe_open(&gbe_dev->tx_pipe);	2899	ret = netcp_txpipe_open(&gbe_dev->tx_pipe);
2886	if (ret)	2900	if (ret)
2887	goto quit;	2901	return ret;
2888		2902
2889	/* Create network interfaces */	2903	/* Create network interfaces */
2890	INIT_LIST_HEAD(&gbe_dev->gbe_intf_head);	2904	INIT_LIST_HEAD(&gbe_dev->gbe_intf_head);
@@ -2899,6 +2913,7 @@ static int gbe_probe(struct netcp_device netcp_device, struct device dev, · 8 unmodified lines
2899	if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves)	2913	if (gbe_dev->num_slaves >= gbe_dev->max_num_slaves)
2900	break;	2914	break;
2901	}	2915	}
		2916	of_node_put(interfaces);
2902		2917
2903	if (!gbe_dev->num_slaves)	2918	if (!gbe_dev->num_slaves)
2904	dev_warn(dev, "No network interface configured\n");	2919	dev_warn(dev, "No network interface configured\n");
@@ -2911,9 +2926,10 @@ static int gbe_probe(struct netcp_device netcp_device, struct device dev, · 6 unmodified lines
2911	of_node_put(secondary_ports);	2926	of_node_put(secondary_ports);
2912		2927
2913	if (!gbe_dev->num_slaves) {	2928	if (!gbe_dev->num_slaves) {
2914	dev_err(dev, "No network interface or secondary ports configured\n");	2929	dev_err(dev,
		2930	"No network interface or secondary ports configured\n");
2915	ret = -ENODEV;	2931	ret = -ENODEV;
2916	goto quit;	2932	goto free_sec_ports;
2917	}	2933	}
2918		2934
2919	memset(&ale_params, 0, sizeof(ale_params));	2935	memset(&ale_params, 0, sizeof(ale_params));
@@ -2927,7 +2943,7 @@ static int gbe_probe(struct netcp_device netcp_device, struct device dev, · 7 unmodified lines
2927	if (!gbe_dev->ale) {	2943	if (!gbe_dev->ale) {
2928	dev_err(gbe_dev->dev, "error initializing ale engine\n");	2944	dev_err(gbe_dev->dev, "error initializing ale engine\n");
2929	ret = -ENODEV;	2945	ret = -ENODEV;
2930	goto quit;	2946	goto free_sec_ports;
2931	} else {	2947	} else {
2932	dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n");	2948	dev_dbg(gbe_dev->dev, "Created a gbe ale engine\n");
2933	}	2949	}
@@ -2943,14 +2959,8 @@ static int gbe_probe(struct netcp_device netcp_device, struct device dev, · 9 unmodified lines
2943	*inst_priv = gbe_dev;	2959	*inst_priv = gbe_dev;
2944	return 0;	2960	return 0;
2945		2961
2946	quit:	2962	free_sec_ports:
2947	if (gbe_dev->hw_stats)	2963	free_secondary_ports(gbe_dev);
2948	devm_kfree(dev, gbe_dev->hw_stats);
2949	cpsw_ale_destroy(gbe_dev->ale);
2950	if (gbe_dev->ss_regs)
2951	devm_iounmap(dev, gbe_dev->ss_regs);
2952	of_node_put(interfaces);
2953	devm_kfree(dev, gbe_dev);
2954	return ret;	2964	return ret;
2955	}	2965	}
2956		2966
@@ -3023,12 +3033,9 @@ static int gbe_remove(struct netcp_device netcp_device, void inst_priv) · 66 unmodified lines
3023	free_secondary_ports(gbe_dev);	3033	free_secondary_ports(gbe_dev);
3024		3034
3025	if (!list_empty(&gbe_dev->gbe_intf_head))	3035	if (!list_empty(&gbe_dev->gbe_intf_head))
3026	dev_alert(gbe_dev->dev, "unreleased ethss interfaces present\n");	3036	dev_alert(gbe_dev->dev,
		3037	"unreleased ethss interfaces present\n");
3027		3038
3028	devm_kfree(gbe_dev->dev, gbe_dev->hw_stats);
3029	devm_iounmap(gbe_dev->dev, gbe_dev->ss_regs);
3030	memset(gbe_dev, 0x00, sizeof(*gbe_dev));
3031	devm_kfree(gbe_dev->dev, gbe_dev);
3032	return 0;	3039	return 0;
3033	}	3040	}
3034		3041

drivers/net/ethernet/ti/netcp_sgmii.c+28−2

@@ -18,6 +18,9 @@ · 17 unmodified lines
18		18
19	#include "netcp.h"	19	#include "netcp.h"
20		20
		21	#define SGMII_SRESET_RESET BIT(0)
		22	#define SGMII_SRESET_RTRESET BIT(1)
		23
21	#define SGMII_REG_STATUS_LOCK BIT(4)	24	#define SGMII_REG_STATUS_LOCK BIT(4)
22	#define SGMII_REG_STATUS_LINK BIT(0)	25	#define SGMII_REG_STATUS_LINK BIT(0)
23	#define SGMII_REG_STATUS_AUTONEG BIT(2)	26	#define SGMII_REG_STATUS_AUTONEG BIT(2)
@@ -51,12 +54,35 @@ static void sgmii_write_reg_bit(void __iomem *base, int reg, u32 val) · 27 unmodified lines
51	int netcp_sgmii_reset(void __iomem *sgmii_ofs, int port)	54	int netcp_sgmii_reset(void __iomem *sgmii_ofs, int port)
52	{	55	{
53	/* Soft reset */	56	/* Soft reset */
54	sgmii_write_reg_bit(sgmii_ofs, SGMII_SRESET_REG(port), 0x1);	57	sgmii_write_reg_bit(sgmii_ofs, SGMII_SRESET_REG(port),
55	while (sgmii_read_reg(sgmii_ofs, SGMII_SRESET_REG(port)) != 0x0)	58	SGMII_SRESET_RESET);
		59
		60	while ((sgmii_read_reg(sgmii_ofs, SGMII_SRESET_REG(port)) &
		61	SGMII_SRESET_RESET) != 0x0)
56	;	62	;
		63
57	return 0;	64	return 0;
58	}	65	}
59		66
		67	/* port is 0 based */
		68	bool netcp_sgmii_rtreset(void __iomem *sgmii_ofs, int port, bool set)
		69	{
		70	u32 reg;
		71	bool oldval;
		72
		73	/* Initiate a soft reset */
		74	reg = sgmii_read_reg(sgmii_ofs, SGMII_SRESET_REG(port));
		75	oldval = (reg & SGMII_SRESET_RTRESET) != 0x0;
		76	if (set)
		77	reg \|= SGMII_SRESET_RTRESET;
		78	else
		79	reg &= ~SGMII_SRESET_RTRESET;
		80	sgmii_write_reg(sgmii_ofs, SGMII_SRESET_REG(port), reg);
		81	wmb();
		82
		83	return oldval;
		84	}
		85
60	int netcp_sgmii_get_port_link(void __iomem *sgmii_ofs, int port)	86	int netcp_sgmii_get_port_link(void __iomem *sgmii_ofs, int port)
61	{	87	{
62	u32 status = 0, link = 0;	88	u32 status = 0, link = 0;

drivers/net/hamradio/mkiss.c+4−3

 	dev->type = ARPHRD_AX25;
 	/* Perform the low-level AX25 initialization. */
-	if ((err = ax_open(ax->dev))) {
+	err = ax_open(ax->dev);
+	if (err)
 		goto out_free_netdev;
-	}
-	if (register_netdev(dev))
+	err = register_netdev(dev);
+	if (err)
 		goto out_free_buffers;
 	/* after register_netdev() - because else printk smashes the kernel */

drivers/net/macvtap.c+7−0

 	struct virtio_net_hdr vnet_hdr = { 0 };
 	int vnet_hdr_len = 0;
 	int copylen = 0;
+	int depth;
 	bool zerocopy = false;
 	size_t linear;
 	ssize_t n;
 	skb_probe_transport_header(skb, ETH_HLEN);
+	/* Move network header to the right position for VLAN tagged packets */
+	if ((skb->protocol == htons(ETH_P_8021Q) ||
+	     skb->protocol == htons(ETH_P_8021AD)) &&
+	    __vlan_get_protocol(skb, skb->protocol, &depth) != 0)
+		skb_set_network_header(skb, depth);
 	rcu_read_lock();
 	vlan = rcu_dereference(q->vlan);
 	/* copy skb_ubuf_info for callback when skb has no error */

drivers/net/ntb_netdev.c+8−1

 	netdev_dbg(ndev, "%s: %d byte payload received\n", __func__, len);
+	if (len < 0) {
+		ndev->stats.rx_errors++;
+		ndev->stats.rx_length_errors++;
+		goto enqueue_again;
+	}
 	skb_put(skb, len);
 	skb->protocol = eth_type_trans(skb, ndev);
 	skb->ip_summed = CHECKSUM_NONE;
 		return;
 	}
+enqueue_again:
 	rc = ntb_transport_rx_enqueue(qp, skb, skb->data, ndev->mtu + ETH_HLEN);
 	if (rc) {
 		dev_kfree_skb(skb);
 		rc = ntb_transport_rx_enqueue(dev->qp, skb, skb->data,
 					      ndev->mtu + ETH_HLEN);
-		if (rc == -EINVAL) {
+		if (rc) {
 			dev_kfree_skb(skb);
 			goto err;
 		}

drivers/net/usb/r8152.c+137−52

@@ -27,7 +27,7 @@ · 26 unmodified lines
27	#include <linux/usb/cdc.h>	27	#include <linux/usb/cdc.h>
28		28
29	/* Version Information */	29	/* Version Information */
30	#define DRIVER_VERSION "v1.08.0 (2015/01/13)"	30	#define DRIVER_VERSION "v1.08.1 (2015/07/28)"
31	#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"	31	#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
32	#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"	32	#define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
33	#define MODULENAME "r8152"	33	#define MODULENAME "r8152"
@@ -1902,11 +1902,10 @@ static void rtl_drop_queued_tx(struct r8152 *tp) · 1868 unmodified lines
1902	static void rtl8152_tx_timeout(struct net_device *netdev)	1902	static void rtl8152_tx_timeout(struct net_device *netdev)
1903	{	1903	{
1904	struct r8152 *tp = netdev_priv(netdev);	1904	struct r8152 *tp = netdev_priv(netdev);
1905	int i;
1906		1905
1907	netif_warn(tp, tx_err, netdev, "Tx timeout\n");	1906	netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1908	for (i = 0; i < RTL8152_MAX_TX; i++)	1907
1909	usb_unlink_urb(tp->tx_info[i].urb);	1908	usb_queue_reset_device(tp->intf);
1910	}	1909	}
1911		1910
1912	static void rtl8152_set_rx_mode(struct net_device *netdev)	1911	static void rtl8152_set_rx_mode(struct net_device *netdev)
@@ -2075,7 +2074,6 @@ static int rtl_start_rx(struct r8152 *tp) · 162 unmodified lines
2075	{	2074	{
2076	int i, ret = 0;	2075	int i, ret = 0;
2077		2076
2078	napi_disable(&tp->napi);
2079	INIT_LIST_HEAD(&tp->rx_done);	2077	INIT_LIST_HEAD(&tp->rx_done);
2080	for (i = 0; i < RTL8152_MAX_RX; i++) {	2078	for (i = 0; i < RTL8152_MAX_RX; i++) {
2081	INIT_LIST_HEAD(&tp->rx_info[i].list);	2079	INIT_LIST_HEAD(&tp->rx_info[i].list);
@@ -2083,7 +2081,6 @@ static int rtl_start_rx(struct r8152 *tp) · 1 unmodified line
2083	if (ret)	2081	if (ret)
2084	break;	2082	break;
2085	}	2083	}
2086	napi_enable(&tp->napi);
2087		2084
2088	if (ret && ++i < RTL8152_MAX_RX) {	2085	if (ret && ++i < RTL8152_MAX_RX) {
2089	struct list_head rx_queue;	2086	struct list_head rx_queue;
@@ -2166,6 +2163,7 @@ static int rtl8153_enable(struct r8152 *tp) · 76 unmodified lines
2166	if (test_bit(RTL8152_UNPLUG, &tp->flags))	2163	if (test_bit(RTL8152_UNPLUG, &tp->flags))
2167	return -ENODEV;	2164	return -ENODEV;
2168		2165
		2166	usb_disable_lpm(tp->udev);
2169	set_tx_qlen(tp);	2167	set_tx_qlen(tp);
2170	rtl_set_eee_plus(tp);	2168	rtl_set_eee_plus(tp);
2171	r8153_set_rx_early_timeout(tp);	2169	r8153_set_rx_early_timeout(tp);
@@ -2337,11 +2335,61 @@ static void __rtl_set_wol(struct r8152 *tp, u32 wolopts) · 165 unmodified lines
2337	device_set_wakeup_enable(&tp->udev->dev, false);	2335	device_set_wakeup_enable(&tp->udev->dev, false);
2338	}	2336	}
2339		2337
		2338	static void r8153_u1u2en(struct r8152 *tp, bool enable)
		2339	{
		2340	u8 u1u2[8];
		2341
		2342	if (enable)
		2343	memset(u1u2, 0xff, sizeof(u1u2));
		2344	else
		2345	memset(u1u2, 0x00, sizeof(u1u2));
		2346
		2347	usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
		2348	}
		2349
		2350	static void r8153_u2p3en(struct r8152 *tp, bool enable)
		2351	{
		2352	u32 ocp_data;
		2353
		2354	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
		2355	if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
		2356	ocp_data \|= U2P3_ENABLE;
		2357	else
		2358	ocp_data &= ~U2P3_ENABLE;
		2359	ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
		2360	}
		2361
		2362	static void r8153_power_cut_en(struct r8152 *tp, bool enable)
		2363	{
		2364	u32 ocp_data;
		2365
		2366	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
		2367	if (enable)
		2368	ocp_data \|= PWR_EN \| PHASE2_EN;
		2369	else
		2370	ocp_data &= ~(PWR_EN \| PHASE2_EN);
		2371	ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
		2372
		2373	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
		2374	ocp_data &= ~PCUT_STATUS;
		2375	ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
		2376	}
		2377
		2378	static bool rtl_can_wakeup(struct r8152 *tp)
		2379	{
		2380	struct usb_device *udev = tp->udev;
		2381
		2382	return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
		2383	}
		2384
2340	static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)	2385	static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2341	{	2386	{
2342	if (enable) {	2387	if (enable) {
2343	u32 ocp_data;	2388	u32 ocp_data;
2344		2389
		2390	r8153_u1u2en(tp, false);
		2391	r8153_u2p3en(tp, false);
		2392
2345	__rtl_set_wol(tp, WAKE_ANY);	2393	__rtl_set_wol(tp, WAKE_ANY);
2346		2394
2347	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);	2395	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
@@ -2353,6 +2401,8 @@ static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable) · 5 unmodified lines
2353	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);	2401	ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2354	} else {	2402	} else {
2355	__rtl_set_wol(tp, tp->saved_wolopts);	2403	__rtl_set_wol(tp, tp->saved_wolopts);
		2404	r8153_u2p3en(tp, true);
		2405	r8153_u1u2en(tp, true);
2356	}	2406	}
2357	}	2407	}
2358		2408
@@ -2599,46 +2649,6 @@ static void r8153_hw_phy_cfg(struct r8152 *tp) · 240 unmodified lines
2599	set_bit(PHY_RESET, &tp->flags);	2649	set_bit(PHY_RESET, &tp->flags);
2600	}	2650	}
2601		2651
2602	static void r8153_u1u2en(struct r8152 *tp, bool enable)
2603	{
2604	u8 u1u2[8];
2605
2606	if (enable)
2607	memset(u1u2, 0xff, sizeof(u1u2));
2608	else
2609	memset(u1u2, 0x00, sizeof(u1u2));
2610
2611	usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2612	}
2613
2614	static void r8153_u2p3en(struct r8152 *tp, bool enable)
2615	{
2616	u32 ocp_data;
2617
2618	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2619	if (enable)
2620	ocp_data \|= U2P3_ENABLE;
2621	else
2622	ocp_data &= ~U2P3_ENABLE;
2623	ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2624	}
2625
2626	static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2627	{
2628	u32 ocp_data;
2629
2630	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2631	if (enable)
2632	ocp_data \|= PWR_EN \| PHASE2_EN;
2633	else
2634	ocp_data &= ~(PWR_EN \| PHASE2_EN);
2635	ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2636
2637	ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2638	ocp_data &= ~PCUT_STATUS;
2639	ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2640	}
2641
2642	static void r8153_first_init(struct r8152 *tp)	2652	static void r8153_first_init(struct r8152 *tp)
2643	{	2653	{
2644	u32 ocp_data;	2654	u32 ocp_data;
@@ -2781,6 +2791,7 @@ static void rtl8153_disable(struct r8152 *tp) · 136 unmodified lines
2781	r8153_disable_aldps(tp);	2791	r8153_disable_aldps(tp);
2782	rtl_disable(tp);	2792	rtl_disable(tp);
2783	r8153_enable_aldps(tp);	2793	r8153_enable_aldps(tp);
		2794	usb_enable_lpm(tp->udev);
2784	}	2795	}
2785		2796
2786	static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)	2797	static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
@@ -2901,9 +2912,13 @@ static void rtl8153_up(struct r8152 *tp) · 114 unmodified lines
2901	if (test_bit(RTL8152_UNPLUG, &tp->flags))	2912	if (test_bit(RTL8152_UNPLUG, &tp->flags))
2902	return;	2913	return;
2903		2914
		2915	r8153_u1u2en(tp, false);
2904	r8153_disable_aldps(tp);	2916	r8153_disable_aldps(tp);
2905	r8153_first_init(tp);	2917	r8153_first_init(tp);
2906	r8153_enable_aldps(tp);	2918	r8153_enable_aldps(tp);
		2919	r8153_u2p3en(tp, true);
		2920	r8153_u1u2en(tp, true);
		2921	usb_enable_lpm(tp->udev);
2907	}	2922	}
2908		2923
2909	static void rtl8153_down(struct r8152 *tp)	2924	static void rtl8153_down(struct r8152 *tp)
@@ -2914,6 +2929,7 @@ static void rtl8153_down(struct r8152 *tp) · 4 unmodified lines
2914	}	2929	}
2915		2930
2916	r8153_u1u2en(tp, false);	2931	r8153_u1u2en(tp, false);
		2932	r8153_u2p3en(tp, false);
2917	r8153_power_cut_en(tp, false);	2933	r8153_power_cut_en(tp, false);
2918	r8153_disable_aldps(tp);	2934	r8153_disable_aldps(tp);
2919	r8153_enter_oob(tp);	2935	r8153_enter_oob(tp);
@@ -2932,8 +2948,10 @@ static void set_carrier(struct r8152 *tp) · 12 unmodified lines
2932	if (!netif_carrier_ok(netdev)) {	2948	if (!netif_carrier_ok(netdev)) {
2933	tp->rtl_ops.enable(tp);	2949	tp->rtl_ops.enable(tp);
2934	set_bit(RTL8152_SET_RX_MODE, &tp->flags);	2950	set_bit(RTL8152_SET_RX_MODE, &tp->flags);
		2951	napi_disable(&tp->napi);
2935	netif_carrier_on(netdev);	2952	netif_carrier_on(netdev);
2936	rtl_start_rx(tp);	2953	rtl_start_rx(tp);
		2954	napi_enable(&tp->napi);
2937	}	2955	}
2938	} else {	2956	} else {
2939	if (netif_carrier_ok(netdev)) {	2957	if (netif_carrier_ok(netdev)) {
@@ -3252,6 +3270,7 @@ static void r8153_init(struct r8152 *tp) · 312 unmodified lines
3252	msleep(20);	3270	msleep(20);
3253	}	3271	}
3254		3272
		3273	usb_disable_lpm(tp->udev);
3255	r8153_u2p3en(tp, false);	3274	r8153_u2p3en(tp, false);
3256		3275
3257	if (tp->version == RTL_VER_04) {	3276	if (tp->version == RTL_VER_04) {
@@ -3319,6 +3338,59 @@ static void r8153_init(struct r8152 *tp) · 61 unmodified lines
3319	r8153_enable_aldps(tp);	3338	r8153_enable_aldps(tp);
3320	r8152b_enable_fc(tp);	3339	r8152b_enable_fc(tp);
3321	rtl_tally_reset(tp);	3340	rtl_tally_reset(tp);
		3341	r8153_u2p3en(tp, true);
		3342	}
		3343
		3344	static int rtl8152_pre_reset(struct usb_interface *intf)
		3345	{
		3346	struct r8152 *tp = usb_get_intfdata(intf);
		3347	struct net_device *netdev;
		3348
		3349	if (!tp)
		3350	return 0;
		3351
		3352	netdev = tp->netdev;
		3353	if (!netif_running(netdev))
		3354	return 0;
		3355
		3356	napi_disable(&tp->napi);
		3357	clear_bit(WORK_ENABLE, &tp->flags);
		3358	usb_kill_urb(tp->intr_urb);
		3359	cancel_delayed_work_sync(&tp->schedule);
		3360	if (netif_carrier_ok(netdev)) {
		3361	netif_stop_queue(netdev);
		3362	mutex_lock(&tp->control);
		3363	tp->rtl_ops.disable(tp);
		3364	mutex_unlock(&tp->control);
		3365	}
		3366
		3367	return 0;
		3368	}
		3369
		3370	static int rtl8152_post_reset(struct usb_interface *intf)
		3371	{
		3372	struct r8152 *tp = usb_get_intfdata(intf);
		3373	struct net_device *netdev;
		3374
		3375	if (!tp)
		3376	return 0;
		3377
		3378	netdev = tp->netdev;
		3379	if (!netif_running(netdev))
		3380	return 0;
		3381
		3382	set_bit(WORK_ENABLE, &tp->flags);
		3383	if (netif_carrier_ok(netdev)) {
		3384	mutex_lock(&tp->control);
		3385	tp->rtl_ops.enable(tp);
		3386	rtl8152_set_rx_mode(netdev);
		3387	mutex_unlock(&tp->control);
		3388	netif_wake_queue(netdev);
		3389	}
		3390
		3391	napi_enable(&tp->napi);
		3392
		3393	return 0;
3322	}	3394	}
3323		3395
3324	static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)	3396	static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
@@ -3374,9 +3446,11 @@ static int rtl8152_resume(struct usb_interface *intf) · 49 unmodified lines
3374	if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {	3446	if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3375	rtl_runtime_suspend_enable(tp, false);	3447	rtl_runtime_suspend_enable(tp, false);
3376	clear_bit(SELECTIVE_SUSPEND, &tp->flags);	3448	clear_bit(SELECTIVE_SUSPEND, &tp->flags);
		3449	napi_disable(&tp->napi);
3377	set_bit(WORK_ENABLE, &tp->flags);	3450	set_bit(WORK_ENABLE, &tp->flags);
3378	if (netif_carrier_ok(tp->netdev))	3451	if (netif_carrier_ok(tp->netdev))
3379	rtl_start_rx(tp);	3452	rtl_start_rx(tp);
		3453	napi_enable(&tp->napi);
3380	} else {	3454	} else {
3381	tp->rtl_ops.up(tp);	3455	tp->rtl_ops.up(tp);
3382	rtl8152_set_speed(tp, AUTONEG_ENABLE,	3456	rtl8152_set_speed(tp, AUTONEG_ENABLE,
@@ -3403,12 +3477,15 @@ static void rtl8152_get_wol(struct net_device dev, struct ethtool_wolinfo wol) · 20 unmodified lines
3403	if (usb_autopm_get_interface(tp->intf) < 0)	3477	if (usb_autopm_get_interface(tp->intf) < 0)
3404	return;	3478	return;
3405		3479
3406	mutex_lock(&tp->control);	3480	if (!rtl_can_wakeup(tp)) {
3407		3481	wol->supported = 0;
3408	wol->supported = WAKE_ANY;	3482	wol->wolopts = 0;
3409	wol->wolopts = __rtl_get_wol(tp);	3483	} else {
3410		3484	mutex_lock(&tp->control);
3411	mutex_unlock(&tp->control);	3485	wol->supported = WAKE_ANY;
		3486	wol->wolopts = __rtl_get_wol(tp);
		3487	mutex_unlock(&tp->control);
		3488	}
3412		3489
3413	usb_autopm_put_interface(tp->intf);	3490	usb_autopm_put_interface(tp->intf);
3414	}	3491	}
@@ -3418,6 +3495,9 @@ static int rtl8152_set_wol(struct net_device dev, struct ethtool_wolinfo wol) · 3 unmodified lines
3418	struct r8152 *tp = netdev_priv(dev);	3495	struct r8152 *tp = netdev_priv(dev);
3419	int ret;	3496	int ret;
3420		3497
		3498	if (!rtl_can_wakeup(tp))
		3499	return -EOPNOTSUPP;
		3500
3421	ret = usb_autopm_get_interface(tp->intf);	3501	ret = usb_autopm_get_interface(tp->intf);
3422	if (ret < 0)	3502	if (ret < 0)
3423	goto out_set_wol;	3503	goto out_set_wol;
@@ -4059,6 +4139,9 @@ static int rtl8152_probe(struct usb_interface *intf, · 635 unmodified lines
4059	goto out1;	4139	goto out1;
4060	}	4140	}
4061		4141
		4142	if (!rtl_can_wakeup(tp))
		4143	__rtl_set_wol(tp, 0);
		4144
4062	tp->saved_wolopts = __rtl_get_wol(tp);	4145	tp->saved_wolopts = __rtl_get_wol(tp);
4063	if (tp->saved_wolopts)	4146	if (tp->saved_wolopts)
4064	device_set_wakeup_enable(&udev->dev, true);	4147	device_set_wakeup_enable(&udev->dev, true);
@@ -4132,6 +4215,8 @@ static struct usb_driver rtl8152_driver = { · 67 unmodified lines
4132	.suspend = rtl8152_suspend,	4215	.suspend = rtl8152_suspend,
4133	.resume = rtl8152_resume,	4216	.resume = rtl8152_resume,
4134	.reset_resume = rtl8152_resume,	4217	.reset_resume = rtl8152_resume,
		4218	.pre_reset = rtl8152_pre_reset,
		4219	.post_reset = rtl8152_post_reset,
4135	.supports_autosuspend = 1,	4220	.supports_autosuspend = 1,
4136	.disable_hub_initiated_lpm = 1,	4221	.disable_hub_initiated_lpm = 1,
4137	};	4222	};

drivers/net/virtio_net.c+2−2

@@ -1756,9 +1756,9 @@ static int virtnet_probe(struct virtio_device *vdev) · 1755 unmodified lines
1756	/* Do we support "hardware" checksums? */	1756	/* Do we support "hardware" checksums? */
1757	if (virtio_has_feature(vdev, VIRTIO_NET_F_CSUM)) {	1757	if (virtio_has_feature(vdev, VIRTIO_NET_F_CSUM)) {
1758	/* This opens up the world of extra features. */	1758	/* This opens up the world of extra features. */
1759	dev->hw_features \|= NETIF_F_HW_CSUM\|NETIF_F_SG\|NETIF_F_FRAGLIST;	1759	dev->hw_features \|= NETIF_F_HW_CSUM \| NETIF_F_SG;
1760	if (csum)	1760	if (csum)
1761	dev->features \|= NETIF_F_HW_CSUM\|NETIF_F_SG\|NETIF_F_FRAGLIST;	1761	dev->features \|= NETIF_F_HW_CSUM \| NETIF_F_SG;
1762		1762
1763	if (virtio_has_feature(vdev, VIRTIO_NET_F_GSO)) {	1763	if (virtio_has_feature(vdev, VIRTIO_NET_F_GSO)) {
1764	dev->hw_features \|= NETIF_F_TSO \| NETIF_F_UFO	1764	dev->hw_features \|= NETIF_F_TSO \| NETIF_F_UFO

drivers/net/wan/cosa.c+2−1

 		chan->netdev->base_addr = chan->cosa->datareg;
 		chan->netdev->irq = chan->cosa->irq;
 		chan->netdev->dma = chan->cosa->dma;
-		if (register_hdlc_device(chan->netdev)) {
+		err = register_hdlc_device(chan->netdev);
+		if (err) {
 			netdev_warn(chan->netdev,
 				    "register_hdlc_device() failed\n");
 			free_netdev(chan->netdev);

drivers/net/wireless/b43/tables_nphy.c+1−1

@@ -3728,7 +3728,7 @@ const u32 b43_nphy_get_tx_gain_table(struct b43_wldev dev) · 3727 unmodified lines
3728	switch (phy->rev) {	3728	switch (phy->rev) {
3729	case 6:	3729	case 6:
3730	case 5:	3730	case 5:
3731	if (sprom->fem.ghz5.extpa_gain == 3)	3731	if (sprom->fem.ghz2.extpa_gain == 3)
3732	return b43_ntab_tx_gain_epa_rev3_hi_pwr_2g;	3732	return b43_ntab_tx_gain_epa_rev3_hi_pwr_2g;
3733	/* fall through */	3733	/* fall through */
3734	case 4:	3734	case 4:

drivers/net/wireless/iwlwifi/mvm/scan.c+1−1

@@ -1023,7 +1023,7 @@ static void iwl_mvm_scan_umac_dwell(struct iwl_mvm *mvm, · 1022 unmodified lines
1023	cmd->scan_priority =	1023	cmd->scan_priority =
1024	iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6);	1024	iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6);
1025		1025
1026	if (iwl_mvm_scan_total_iterations(params) == 0)	1026	if (iwl_mvm_scan_total_iterations(params) == 1)
1027	cmd->ooc_priority =	1027	cmd->ooc_priority =
1028	iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6);	1028	iwl_mvm_scan_priority(mvm, IWL_SCAN_PRIORITY_EXT_6);
1029	else	1029	else

drivers/net/wireless/iwlwifi/pcie/trans.c+19−3

 		if (trans->cfg->device_family == IWL_DEVICE_FAMILY_7000)
 			iwl_set_bits_prph(trans, APMG_PCIDEV_STT_REG,
 					  APMG_PCIDEV_STT_VAL_WAKE_ME);
-		else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
+		else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
+			iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+				    CSR_RESET_LINK_PWR_MGMT_DISABLED);
 			iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
 				    CSR_HW_IF_CONFIG_REG_PREPARE |
 				    CSR_HW_IF_CONFIG_REG_ENABLE_PME);
+			mdelay(1);
+			iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+				      CSR_RESET_LINK_PWR_MGMT_DISABLED);
+		}
 		mdelay(5);
 	}
 	if (ret >= 0)
 		return 0;
+	iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+		    CSR_RESET_LINK_PWR_MGMT_DISABLED);
+	msleep(1);
 	for (iter = 0; iter < 10; iter++) {
 		/* If HW is not ready, prepare the conditions to check again */
 		iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
 		do {
 			ret = iwl_pcie_set_hw_ready(trans);
-			if (ret >= 0)
+			if (ret >= 0) {
-				return 0;
+				ret = 0;
+				goto out;
+			}
 			usleep_range(200, 1000);
 			t += 200;
 	IWL_ERR(trans, "Couldn't prepare the card\n");
+out:
+	iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+		      CSR_RESET_LINK_PWR_MGMT_DISABLED);
 	return ret;
 }

drivers/net/wireless/iwlwifi/pcie/tx.c+13−2

@@ -1875,8 +1875,19 @@ int iwl_trans_pcie_tx(struct iwl_trans trans, struct sk_buff skb, · 1874 unmodified lines
1875		1875
1876	/* start timer if queue currently empty */	1876	/* start timer if queue currently empty */
1877	if (q->read_ptr == q->write_ptr) {	1877	if (q->read_ptr == q->write_ptr) {
1878	if (txq->wd_timeout)	1878	if (txq->wd_timeout) {
1879	mod_timer(&txq->stuck_timer, jiffies + txq->wd_timeout);	1879	/*
		1880	* If the TXQ is active, then set the timer, if not,
		1881	* set the timer in remainder so that the timer will
		1882	* be armed with the right value when the station will
		1883	* wake up.
		1884	*/
		1885	if (!txq->frozen)
		1886	mod_timer(&txq->stuck_timer,
		1887	jiffies + txq->wd_timeout);
		1888	else
		1889	txq->frozen_expiry_remainder = txq->wd_timeout;
		1890	}
1880	IWL_DEBUG_RPM(trans, "Q: %d first tx - take ref\n", q->id);	1891	IWL_DEBUG_RPM(trans, "Q: %d first tx - take ref\n", q->id);
1881	iwl_trans_pcie_ref(trans);	1892	iwl_trans_pcie_ref(trans);
1882	}	1893	}

drivers/net/wireless/rsi/rsi_91x_sdio_ops.c+7−1

 		(struct rsi_91x_sdiodev *)adapter->rsi_dev;
 	u32 len;
 	u32 num_blocks;
+	const u8 *fw;
 	const struct firmware *fw_entry = NULL;
 	u32 block_size = dev->tx_blk_size;
 	int status = 0;
 		return status;
 	}
+	/* Copy firmware into DMA-accessible memory */
+	fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
+	if (!fw)
+		return -ENOMEM;
 	len = fw_entry->size;
 	if (len % 4)
 	rsi_dbg(INIT_ZONE, "%s: Instruction size:%d\n", __func__, len);
 	rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks);
-	status = rsi_copy_to_card(common, fw_entry->data, len, num_blocks);
+	status = rsi_copy_to_card(common, fw, len, num_blocks);
+	kfree(fw);
 	release_firmware(fw_entry);
 	return status;
 }

drivers/net/wireless/rsi/rsi_91x_usb_ops.c+4−0

 		return status;
 	}
+	/* Copy firmware into DMA-accessible memory */
 	fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
+	if (!fw)
+		return -ENOMEM;
 	len = fw_entry->size;
 	if (len % 4)
 	rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks);
 	status = rsi_copy_to_card(common, fw, len, num_blocks);
+	kfree(fw);
 	release_firmware(fw_entry);
 	return status;
 }

drivers/net/wireless/rtlwifi/core.c+5−2

 {
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
 	struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
+	struct rtl_tcb_desc tcb_desc;
-	if (skb)
+	if (skb) {
-		rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, NULL);
+		memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
+		rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
+	}
 }
 static void rtl_op_bss_info_changed(struct ieee80211_hw *hw,

drivers/net/wireless/rtlwifi/rtl8723be/sw.c+1−0

@@ -385,6 +385,7 @@ module_param_named(debug, rtl8723be_mod_params.debug, int, 0444); · 384 unmodified lines
385	module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444);	385	module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444);
386	module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444);	386	module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444);
387	module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444);	387	module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444);
		388	module_param_named(msi, rtl8723be_mod_params.msi_support, bool, 0444);
388	module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog,	389	module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog,
389	bool, 0444);	390	bool, 0444);
390	MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");	391	MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");

drivers/net/xen-netback/interface.c+6−0

 void xenvif_skb_zerocopy_complete(struct xenvif_queue *queue)
 {
 	atomic_dec(&queue->inflight_packets);
+	/* Wake the dealloc thread _after_ decrementing inflight_packets so
+	 * that if kthread_stop() has already been called, the dealloc thread
+	 * does not wait forever with nothing to wake it.
+	 */
+	wake_up(&queue->dealloc_wq);
 }
 int xenvif_schedulable(struct xenvif *vif)

drivers/net/xen-netback/netback.c+33−29

 static struct gnttab_map_grant_ref *xenvif_get_requests(struct xenvif_queue *queue,
 							struct sk_buff *skb,
 							struct xen_netif_tx_request *txp,
-							struct gnttab_map_grant_ref *gop)
+							struct gnttab_map_grant_ref *gop,
+							unsigned int frag_overflow,
+							struct sk_buff *nskb)
 {
 	struct skb_shared_info *shinfo = skb_shinfo(skb);
 	skb_frag_t *frags = shinfo->frags;
 	u16 pending_idx = XENVIF_TX_CB(skb)->pending_idx;
 	int start;
 	pending_ring_idx_t index;
-	unsigned int nr_slots, frag_overflow = 0;
+	unsigned int nr_slots;
-	/* At this point shinfo->nr_frags is in fact the number of
-	 * slots, which can be as large as XEN_NETBK_LEGACY_SLOTS_MAX.
-	 */
-	if (shinfo->nr_frags > MAX_SKB_FRAGS) {
-		frag_overflow = shinfo->nr_frags - MAX_SKB_FRAGS;
-		BUG_ON(frag_overflow > MAX_SKB_FRAGS);
-		shinfo->nr_frags = MAX_SKB_FRAGS;
-	}
 	nr_slots = shinfo->nr_frags;
 	/* Skip first skb fragment if it is on same page as header fragment. */
 	}
 	if (frag_overflow) {
-		struct sk_buff *nskb = xenvif_alloc_skb(0);
-		if (unlikely(nskb == NULL)) {
-			if (net_ratelimit())
-				netdev_err(queue->vif->dev,
-					   "Can't allocate the frag_list skb.\n");
-			return NULL;
-		}
 		shinfo = skb_shinfo(nskb);
 		frags = shinfo->frags;
 				     unsigned *copy_ops,
 				     unsigned *map_ops)
 {
-	struct gnttab_map_grant_ref *gop = queue->tx_map_ops, *request_gop;
+	struct gnttab_map_grant_ref *gop = queue->tx_map_ops;
-	struct sk_buff *skb;
+	struct sk_buff *skb, *nskb;
 	int ret;
+	unsigned int frag_overflow;
 	while (skb_queue_len(&queue->tx_queue) < budget) {
 		struct xen_netif_tx_request txreq;
 			break;
 		}
+		skb_shinfo(skb)->nr_frags = ret;
+		if (data_len < txreq.size)
+			skb_shinfo(skb)->nr_frags++;
+		/* At this point shinfo->nr_frags is in fact the number of
+		 * slots, which can be as large as XEN_NETBK_LEGACY_SLOTS_MAX.
+		 */
+		frag_overflow = 0;
+		nskb = NULL;
+		if (skb_shinfo(skb)->nr_frags > MAX_SKB_FRAGS) {
+			frag_overflow = skb_shinfo(skb)->nr_frags - MAX_SKB_FRAGS;
+			BUG_ON(frag_overflow > MAX_SKB_FRAGS);
+			skb_shinfo(skb)->nr_frags = MAX_SKB_FRAGS;
+			nskb = xenvif_alloc_skb(0);
+			if (unlikely(nskb == NULL)) {
+				kfree_skb(skb);
+				xenvif_tx_err(queue, &txreq, idx);
+				if (net_ratelimit())
+					netdev_err(queue->vif->dev,
+						   "Can't allocate the frag_list skb.\n");
+				break;
+			}
+		}
 		if (extras[XEN_NETIF_EXTRA_TYPE_GSO - 1].type) {
 			struct xen_netif_extra_info *gso;
 			gso = &extras[XEN_NETIF_EXTRA_TYPE_GSO - 1];
 			if (xenvif_set_skb_gso(queue->vif, skb, gso)) {
 				/* Failure in xenvif_set_skb_gso is fatal. */
 				kfree_skb(skb);
+				kfree_skb(nskb);
 				break;
 			}
 		}
 		(*copy_ops)++;
-		skb_shinfo(skb)->nr_frags = ret;
 		if (data_len < txreq.size) {
-			skb_shinfo(skb)->nr_frags++;
 			frag_set_pending_idx(&skb_shinfo(skb)->frags[0],
 					     pending_idx);
 			xenvif_tx_create_map_op(queue, pending_idx, &txreq, gop);
 		queue->pending_cons++;
-		request_gop = xenvif_get_requests(queue, skb, txfrags, gop);
+		gop = xenvif_get_requests(queue, skb, txfrags, gop,
-		if (request_gop == NULL) {
+				          frag_overflow, nskb);
-			kfree_skb(skb);
-			xenvif_tx_err(queue, &txreq, idx);
-			break;
-		}
-		gop = request_gop;
 		__skb_queue_tail(&queue->tx_queue, skb);
 		smp_wmb();
 		queue->dealloc_prod++;
 	} while (ubuf);
-	wake_up(&queue->dealloc_wq);
 	spin_unlock_irqrestore(&queue->callback_lock, flags);
 	if (likely(zerocopy_success))

drivers/ntb/ntb.c+1−1

@@ -114,7 +114,7 @@ int ntb_register_device(struct ntb_dev *ntb) · 113 unmodified lines
114	ntb->dev.bus = &ntb_bus;	114	ntb->dev.bus = &ntb_bus;
115	ntb->dev.parent = &ntb->pdev->dev;	115	ntb->dev.parent = &ntb->pdev->dev;
116	ntb->dev.release = ntb_dev_release;	116	ntb->dev.release = ntb_dev_release;
117	dev_set_name(&ntb->dev, pci_name(ntb->pdev));	117	dev_set_name(&ntb->dev, "%s", pci_name(ntb->pdev));
118		118
119	ntb->ctx = NULL;	119	ntb->ctx = NULL;
120	ntb->ctx_ops = NULL;	120	ntb->ctx_ops = NULL;

drivers/ntb/ntb_transport.c+124−77

@@ -142,10 +142,11 @@ struct ntb_transport_qp { · 141 unmodified lines
142		142
143	void (rx_handler)(struct ntb_transport_qp qp, void *qp_data,	143	void (rx_handler)(struct ntb_transport_qp qp, void *qp_data,
144	void *data, int len);	144	void *data, int len);
		145	struct list_head rx_post_q;
145	struct list_head rx_pend_q;	146	struct list_head rx_pend_q;
146	struct list_head rx_free_q;	147	struct list_head rx_free_q;
147	spinlock_t ntb_rx_pend_q_lock;	148	/* ntb_rx_q_lock: synchronize access to rx_XXXX_q */
148	spinlock_t ntb_rx_free_q_lock;	149	spinlock_t ntb_rx_q_lock;
149	void *rx_buff;	150	void *rx_buff;
150	unsigned int rx_index;	151	unsigned int rx_index;
151	unsigned int rx_max_entry;	152	unsigned int rx_max_entry;
@@ -211,6 +212,8 @@ struct ntb_transport_ctx { · 59 unmodified lines
211	bool link_is_up;	212	bool link_is_up;
212	struct delayed_work link_work;	213	struct delayed_work link_work;
213	struct work_struct link_cleanup;	214	struct work_struct link_cleanup;
		215
		216	struct dentry *debugfs_node_dir;
214	};	217	};
215		218
216	enum {	219	enum {
@@ -436,13 +439,17 @@ static ssize_t debugfs_read(struct file filp, char __user ubuf, size_t count, · 219 unmodified lines
436	char *buf;	439	char *buf;
437	ssize_t ret, out_offset, out_count;	440	ssize_t ret, out_offset, out_count;
438		441
		442	qp = filp->private_data;
		443
		444	if (!qp \|\| !qp->link_is_up)
		445	return 0;
		446
439	out_count = 1000;	447	out_count = 1000;
440		448
441	buf = kmalloc(out_count, GFP_KERNEL);	449	buf = kmalloc(out_count, GFP_KERNEL);
442	if (!buf)	450	if (!buf)
443	return -ENOMEM;	451	return -ENOMEM;
444		452
445	qp = filp->private_data;
446	out_offset = 0;	453	out_offset = 0;
447	out_offset += snprintf(buf + out_offset, out_count - out_offset,	454	out_offset += snprintf(buf + out_offset, out_count - out_offset,
448	"NTB QP stats\n");	455	"NTB QP stats\n");
@@ -534,6 +541,27 @@ out: · 85 unmodified lines
534	return entry;	541	return entry;
535	}	542	}
536		543
		544	static struct ntb_queue_entry ntb_list_mv(spinlock_t lock,
		545	struct list_head *list,
		546	struct list_head *to_list)
		547	{
		548	struct ntb_queue_entry *entry;
		549	unsigned long flags;
		550
		551	spin_lock_irqsave(lock, flags);
		552
		553	if (list_empty(list)) {
		554	entry = NULL;
		555	} else {
		556	entry = list_first_entry(list, struct ntb_queue_entry, entry);
		557	list_move_tail(&entry->entry, to_list);
		558	}
		559
		560	spin_unlock_irqrestore(lock, flags);
		561
		562	return entry;
		563	}
		564
537	static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,	565	static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,
538	unsigned int qp_num)	566	unsigned int qp_num)
539	{	567	{
@@ -601,13 +629,16 @@ static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw) · 61 unmodified lines
601	}	629	}
602		630
603	static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,	631	static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,
604	unsigned int size)	632	resource_size_t size)
605	{	633	{
606	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];	634	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
607	struct pci_dev *pdev = nt->ndev->pdev;	635	struct pci_dev *pdev = nt->ndev->pdev;
608	unsigned int xlat_size, buff_size;	636	size_t xlat_size, buff_size;
609	int rc;	637	int rc;
610		638
		639	if (!size)
		640	return -EINVAL;
		641
611	xlat_size = round_up(size, mw->xlat_align_size);	642	xlat_size = round_up(size, mw->xlat_align_size);
612	buff_size = round_up(size, mw->xlat_align);	643	buff_size = round_up(size, mw->xlat_align);
613		644
@@ -627,7 +658,7 @@ static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw, · 13 unmodified lines
627	if (!mw->virt_addr) {	658	if (!mw->virt_addr) {
628	mw->xlat_size = 0;	659	mw->xlat_size = 0;
629	mw->buff_size = 0;	660	mw->buff_size = 0;
630	dev_err(&pdev->dev, "Unable to alloc MW buff of size %d\n",	661	dev_err(&pdev->dev, "Unable to alloc MW buff of size %zu\n",
631	buff_size);	662	buff_size);
632	return -ENOMEM;	663	return -ENOMEM;
633	}	664	}
@@ -867,6 +898,8 @@ static void ntb_qp_link_work(struct work_struct *work) · 233 unmodified lines
867		898
868	if (qp->event_handler)	899	if (qp->event_handler)
869	qp->event_handler(qp->cb_data, qp->link_is_up);	900	qp->event_handler(qp->cb_data, qp->link_is_up);
		901
		902	tasklet_schedule(&qp->rxc_db_work);
870	} else if (nt->link_is_up)	903	} else if (nt->link_is_up)
871	schedule_delayed_work(&qp->link_work,	904	schedule_delayed_work(&qp->link_work,
872	msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));	905	msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
@@ -923,12 +956,12 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt, · 50 unmodified lines
923	qp->tx_max_frame = min(transport_mtu, tx_size / 2);	956	qp->tx_max_frame = min(transport_mtu, tx_size / 2);
924	qp->tx_max_entry = tx_size / qp->tx_max_frame;	957	qp->tx_max_entry = tx_size / qp->tx_max_frame;
925		958
926	if (nt_debugfs_dir) {	959	if (nt->debugfs_node_dir) {
927	char debugfs_name[4];	960	char debugfs_name[4];
928		961
929	snprintf(debugfs_name, 4, "qp%d", qp_num);	962	snprintf(debugfs_name, 4, "qp%d", qp_num);
930	qp->debugfs_dir = debugfs_create_dir(debugfs_name,	963	qp->debugfs_dir = debugfs_create_dir(debugfs_name,
931	nt_debugfs_dir);	964	nt->debugfs_node_dir);
932		965
933	qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,	966	qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,
934	qp->debugfs_dir, qp,	967	qp->debugfs_dir, qp,
@@ -941,10 +974,10 @@ static int ntb_transport_init_queue(struct ntb_transport_ctx *nt, · 6 unmodified lines
941	INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);	974	INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);
942	INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);	975	INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);
943		976
944	spin_lock_init(&qp->ntb_rx_pend_q_lock);	977	spin_lock_init(&qp->ntb_rx_q_lock);
945	spin_lock_init(&qp->ntb_rx_free_q_lock);
946	spin_lock_init(&qp->ntb_tx_free_q_lock);	978	spin_lock_init(&qp->ntb_tx_free_q_lock);
947		979
		980	INIT_LIST_HEAD(&qp->rx_post_q);
948	INIT_LIST_HEAD(&qp->rx_pend_q);	981	INIT_LIST_HEAD(&qp->rx_pend_q);
949	INIT_LIST_HEAD(&qp->rx_free_q);	982	INIT_LIST_HEAD(&qp->rx_free_q);
950	INIT_LIST_HEAD(&qp->tx_free_q);	983	INIT_LIST_HEAD(&qp->tx_free_q);
@@ -1031,6 +1064,12 @@ static int ntb_transport_probe(struct ntb_client self, struct ntb_dev ndev) · 80 unmodified lines
1031	goto err2;	1064	goto err2;
1032	}	1065	}
1033		1066
		1067	if (nt_debugfs_dir) {
		1068	nt->debugfs_node_dir =
		1069	debugfs_create_dir(pci_name(ndev->pdev),
		1070	nt_debugfs_dir);
		1071	}
		1072
1034	for (i = 0; i < qp_count; i++) {	1073	for (i = 0; i < qp_count; i++) {
1035	rc = ntb_transport_init_queue(nt, i);	1074	rc = ntb_transport_init_queue(nt, i);
1036	if (rc)	1075	if (rc)
@@ -1107,22 +1146,47 @@ static void ntb_transport_free(struct ntb_client self, struct ntb_dev ndev) · 70 unmodified lines
1107	kfree(nt);	1146	kfree(nt);
1108	}	1147	}
1109		1148
1110	static void ntb_rx_copy_callback(void *data)	1149	static void ntb_complete_rxc(struct ntb_transport_qp *qp)
1111	{	1150	{
1112	struct ntb_queue_entry *entry = data;	1151	struct ntb_queue_entry *entry;
1113	struct ntb_transport_qp *qp = entry->qp;	1152	void *cb_data;
1114	void *cb_data = entry->cb_data;	1153	unsigned int len;
1115	unsigned int len = entry->len;	1154	unsigned long irqflags;
1116	struct ntb_payload_header *hdr = entry->rx_hdr;	1155
		1156	spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
		1157
		1158	while (!list_empty(&qp->rx_post_q)) {
		1159	entry = list_first_entry(&qp->rx_post_q,
		1160	struct ntb_queue_entry, entry);
		1161	if (!(entry->flags & DESC_DONE_FLAG))
		1162	break;
		1163
		1164	entry->rx_hdr->flags = 0;
		1165	iowrite32(entry->index, &qp->rx_info->entry);
1117		1166
1118	hdr->flags = 0;	1167	cb_data = entry->cb_data;
		1168	len = entry->len;
1119		1169
1120	iowrite32(entry->index, &qp->rx_info->entry);	1170	list_move_tail(&entry->entry, &qp->rx_free_q);
1121		1171
1122	ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry, &qp->rx_free_q);	1172	spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
1123		1173
1124	if (qp->rx_handler && qp->client_ready)	1174	if (qp->rx_handler && qp->client_ready)
1125	qp->rx_handler(qp, qp->cb_data, cb_data, len);	1175	qp->rx_handler(qp, qp->cb_data, cb_data, len);
		1176
		1177	spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
		1178	}
		1179
		1180	spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
		1181	}
		1182
		1183	static void ntb_rx_copy_callback(void *data)
		1184	{
		1185	struct ntb_queue_entry *entry = data;
		1186
		1187	entry->flags \|= DESC_DONE_FLAG;
		1188
		1189	ntb_complete_rxc(entry->qp);
1126	}	1190	}
1127		1191
1128	static void ntb_memcpy_rx(struct ntb_queue_entry entry, void offset)	1192	static void ntb_memcpy_rx(struct ntb_queue_entry entry, void offset)
@@ -1138,19 +1202,18 @@ static void ntb_memcpy_rx(struct ntb_queue_entry entry, void offset) · 9 unmodified lines
1138	ntb_rx_copy_callback(entry);	1202	ntb_rx_copy_callback(entry);
1139	}	1203	}
1140		1204
1141	static void ntb_async_rx(struct ntb_queue_entry entry, void offset,	1205	static void ntb_async_rx(struct ntb_queue_entry entry, void offset)
1142	size_t len)
1143	{	1206	{
1144	struct dma_async_tx_descriptor *txd;	1207	struct dma_async_tx_descriptor *txd;
1145	struct ntb_transport_qp *qp = entry->qp;	1208	struct ntb_transport_qp *qp = entry->qp;
1146	struct dma_chan *chan = qp->dma_chan;	1209	struct dma_chan *chan = qp->dma_chan;
1147	struct dma_device *device;	1210	struct dma_device *device;
1148	size_t pay_off, buff_off;	1211	size_t pay_off, buff_off, len;
1149	struct dmaengine_unmap_data *unmap;	1212	struct dmaengine_unmap_data *unmap;
1150	dma_cookie_t cookie;	1213	dma_cookie_t cookie;
1151	void *buf = entry->buf;	1214	void *buf = entry->buf;
1152		1215
1153	entry->len = len;	1216	len = entry->len;
1154		1217
1155	if (!chan)	1218	if (!chan)
1156	goto err;	1219	goto err;
@@ -1226,7 +1289,6 @@ static int ntb_process_rxc(struct ntb_transport_qp *qp) · 69 unmodified lines
1226	struct ntb_payload_header *hdr;	1289	struct ntb_payload_header *hdr;
1227	struct ntb_queue_entry *entry;	1290	struct ntb_queue_entry *entry;
1228	void *offset;	1291	void *offset;
1229	int rc;
1230		1292
1231	offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;	1293	offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;
1232	hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);	1294	hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);
@@ -1255,65 +1317,43 @@ static int ntb_process_rxc(struct ntb_transport_qp *qp) · 22 unmodified lines
1255	return -EIO;	1317	return -EIO;
1256	}	1318	}
1257		1319
1258	entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q);	1320	entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q);
1259	if (!entry) {	1321	if (!entry) {
1260	dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");	1322	dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");
1261	qp->rx_err_no_buf++;	1323	qp->rx_err_no_buf++;
1262		1324	return -EAGAIN;
1263	rc = -ENOMEM;
1264	goto err;
1265	}	1325	}
1266		1326
		1327	entry->rx_hdr = hdr;
		1328	entry->index = qp->rx_index;
		1329
1267	if (hdr->len > entry->len) {	1330	if (hdr->len > entry->len) {
1268	dev_dbg(&qp->ndev->pdev->dev,	1331	dev_dbg(&qp->ndev->pdev->dev,
1269	"receive buffer overflow! Wanted %d got %d\n",	1332	"receive buffer overflow! Wanted %d got %d\n",
1270	hdr->len, entry->len);	1333	hdr->len, entry->len);
1271	qp->rx_err_oflow++;	1334	qp->rx_err_oflow++;
1272		1335
1273	rc = -EIO;	1336	entry->len = -EIO;
1274	goto err;	1337	entry->flags \|= DESC_DONE_FLAG;
1275	}
1276		1338
1277	dev_dbg(&qp->ndev->pdev->dev,	1339	ntb_complete_rxc(qp);
1278	"RX OK index %u ver %u size %d into buf size %d\n",	1340	} else {
1279	qp->rx_index, hdr->ver, hdr->len, entry->len);	1341	dev_dbg(&qp->ndev->pdev->dev,
		1342	"RX OK index %u ver %u size %d into buf size %d\n",
		1343	qp->rx_index, hdr->ver, hdr->len, entry->len);
1280		1344
1281	qp->rx_bytes += hdr->len;	1345	qp->rx_bytes += hdr->len;
1282	qp->rx_pkts++;	1346	qp->rx_pkts++;
1283		1347
1284	entry->index = qp->rx_index;	1348	entry->len = hdr->len;
1285	entry->rx_hdr = hdr;
1286		1349
1287	ntb_async_rx(entry, offset, hdr->len);	1350	ntb_async_rx(entry, offset);
		1351	}
1288		1352
1289	qp->rx_index++;	1353	qp->rx_index++;
1290	qp->rx_index %= qp->rx_max_entry;	1354	qp->rx_index %= qp->rx_max_entry;
1291		1355
1292	return 0;	1356	return 0;
1293
1294	err:
1295	/* FIXME: if this syncrhonous update of the rx_index gets ahead of
1296	* asyncrhonous ntb_rx_copy_callback of previous entry, there are three
1297	* scenarios:
1298	*
1299	* 1) The peer might miss this update, but observe the update
1300	* from the memcpy completion callback. In this case, the buffer will
1301	* not be freed on the peer to be reused for a different packet. The
1302	* successful rx of a later packet would clear the condition, but the
1303	* condition could persist if several rx fail in a row.
1304	*
1305	* 2) The peer may observe this update before the asyncrhonous copy of
1306	* prior packets is completed. The peer may overwrite the buffers of
1307	* the prior packets before they are copied.
1308	*
1309	* 3) Both: the peer may observe the update, and then observe the index
1310	* decrement by the asynchronous completion callback. Who knows what
1311	* badness that will cause.
1312	*/
1313	hdr->flags = 0;
1314	iowrite32(qp->rx_index, &qp->rx_info->entry);
1315
1316	return rc;
1317	}	1357	}
1318		1358
1319	static void ntb_transport_rxc_db(unsigned long data)	1359	static void ntb_transport_rxc_db(unsigned long data)
@@ -1333,7 +1373,7 @@ static void ntb_transport_rxc_db(unsigned long data) · 13 unmodified lines
1333	break;	1373	break;
1334	}	1374	}
1335		1375
1336	if (qp->dma_chan)	1376	if (i && qp->dma_chan)
1337	dma_async_issue_pending(qp->dma_chan);	1377	dma_async_issue_pending(qp->dma_chan);
1338		1378
1339	if (i == qp->rx_max_entry) {	1379	if (i == qp->rx_max_entry) {
@@ -1609,7 +1649,7 @@ ntb_transport_create_queue(void data, struct device client_dev, · 269 unmodified lines
1609	goto err1;	1649	goto err1;
1610		1650
1611	entry->qp = qp;	1651	entry->qp = qp;
1612	ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry,	1652	ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
1613	&qp->rx_free_q);	1653	&qp->rx_free_q);
1614	}	1654	}
1615		1655
@@ -1634,7 +1674,7 @@ err2: · 18 unmodified lines
1634	while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))	1674	while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
1635	kfree(entry);	1675	kfree(entry);
1636	err1:	1676	err1:
1637	while ((entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q)))	1677	while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
1638	kfree(entry);	1678	kfree(entry);
1639	if (qp->dma_chan)	1679	if (qp->dma_chan)
1640	dma_release_channel(qp->dma_chan);	1680	dma_release_channel(qp->dma_chan);
@@ -1652,7 +1692,6 @@ EXPORT_SYMBOL_GPL(ntb_transport_create_queue); · 11 unmodified lines
1652	*/	1692	*/
1653	void ntb_transport_free_queue(struct ntb_transport_qp *qp)	1693	void ntb_transport_free_queue(struct ntb_transport_qp *qp)
1654	{	1694	{
1655	struct ntb_transport_ctx *nt = qp->transport;
1656	struct pci_dev *pdev;	1695	struct pci_dev *pdev;
1657	struct ntb_queue_entry *entry;	1696	struct ntb_queue_entry *entry;
1658	u64 qp_bit;	1697	u64 qp_bit;
@@ -1689,18 +1728,23 @@ void ntb_transport_free_queue(struct ntb_transport_qp *qp) · 30 unmodified lines
1689	qp->tx_handler = NULL;	1728	qp->tx_handler = NULL;
1690	qp->event_handler = NULL;	1729	qp->event_handler = NULL;
1691		1730
1692	while ((entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q)))	1731	while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
1693	kfree(entry);	1732	kfree(entry);
1694		1733
1695	while ((entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q))) {	1734	while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) {
1696	dev_warn(&pdev->dev, "Freeing item from a non-empty queue\n");	1735	dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n");
		1736	kfree(entry);
		1737	}
		1738
		1739	while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) {
		1740	dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n");
1697	kfree(entry);	1741	kfree(entry);
1698	}	1742	}
1699		1743
1700	while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))	1744	while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
1701	kfree(entry);	1745	kfree(entry);
1702		1746
1703	nt->qp_bitmap_free \|= qp_bit;	1747	qp->transport->qp_bitmap_free \|= qp_bit;
1704		1748
1705	dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);	1749	dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);
1706	}	1750	}
@@ -1724,14 +1768,14 @@ void ntb_transport_rx_remove(struct ntb_transport_qp qp, unsigned int *len) · 17 unmodified lines
1724	if (!qp \|\| qp->client_ready)	1768	if (!qp \|\| qp->client_ready)
1725	return NULL;	1769	return NULL;
1726		1770
1727	entry = ntb_list_rm(&qp->ntb_rx_pend_q_lock, &qp->rx_pend_q);	1771	entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q);
1728	if (!entry)	1772	if (!entry)
1729	return NULL;	1773	return NULL;
1730		1774
1731	buf = entry->cb_data;	1775	buf = entry->cb_data;
1732	*len = entry->len;	1776	*len = entry->len;
1733		1777
1734	ntb_list_add(&qp->ntb_rx_free_q_lock, &entry->entry, &qp->rx_free_q);	1778	ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q);
1735		1779
1736	return buf;	1780	return buf;
1737	}	1781	}
@@ -1757,15 +1801,18 @@ int ntb_transport_rx_enqueue(struct ntb_transport_qp qp, void cb, void *data, · 19 unmodified lines
1757	if (!qp)	1801	if (!qp)
1758	return -EINVAL;	1802	return -EINVAL;
1759		1803
1760	entry = ntb_list_rm(&qp->ntb_rx_free_q_lock, &qp->rx_free_q);	1804	entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q);
1761	if (!entry)	1805	if (!entry)
1762	return -ENOMEM;	1806	return -ENOMEM;
1763		1807
1764	entry->cb_data = cb;	1808	entry->cb_data = cb;
1765	entry->buf = data;	1809	entry->buf = data;
1766	entry->len = len;	1810	entry->len = len;
		1811	entry->flags = 0;
		1812
		1813	ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q);
1767		1814
1768	ntb_list_add(&qp->ntb_rx_pend_q_lock, &entry->entry, &qp->rx_pend_q);	1815	tasklet_schedule(&qp->rxc_db_work);
1769		1816
1770	return 0;	1817	return 0;
1771	}	1818	}

drivers/of/Kconfig+1−1

@@ -47,7 +47,7 @@ config OF_DYNAMIC · 46 unmodified lines
47		47
48	config OF_ADDRESS	48	config OF_ADDRESS
49	def_bool y	49	def_bool y
50	depends on !SPARC	50	depends on !SPARC && HAS_IOMEM
51	select OF_ADDRESS_PCI if PCI	51	select OF_ADDRESS_PCI if PCI
52		52
53	config OF_ADDRESS_PCI	53	config OF_ADDRESS_PCI

drivers/of/unittest.c+0−3

 	.remove			= unittest_remove,
 	.driver = {
 		.name		= "unittest",
-		.owner		= THIS_MODULE,
 		.of_match_table	= of_match_ptr(unittest_match),
 	},
 };
 static struct i2c_driver unittest_i2c_dev_driver = {
 	.driver = {
 		.name = "unittest-i2c-dev",
-		.owner = THIS_MODULE,
 	},
 	.probe = unittest_i2c_dev_probe,
 	.remove = unittest_i2c_dev_remove,
 static struct i2c_driver unittest_i2c_mux_driver = {
 	.driver = {
 		.name = "unittest-i2c-mux",
-		.owner = THIS_MODULE,
 	},
 	.probe = unittest_i2c_mux_probe,
 	.remove = unittest_i2c_mux_remove,

drivers/phy/phy-sun4i-usb.c+1−0

@@ -212,6 +212,7 @@ void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled) · 211 unmodified lines
212		212
213	sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);	213	sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
214	}	214	}
		215	EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
215		216
216	static struct phy_ops sun4i_usb_phy_ops = {	217	static struct phy_ops sun4i_usb_phy_ops = {
217	.init = sun4i_usb_phy_init,	218	.init = sun4i_usb_phy_init,

drivers/phy/phy-ti-pipe3.c+55−6

@@ -28,6 +28,8 @@ · 27 unmodified lines
28	#include <linux/delay.h>	28	#include <linux/delay.h>
29	#include <linux/phy/omap_control_phy.h>	29	#include <linux/phy/omap_control_phy.h>
30	#include <linux/of_platform.h>	30	#include <linux/of_platform.h>
		31	#include <linux/mfd/syscon.h>
		32	#include <linux/regmap.h>
31		33
32	#define PLL_STATUS 0x00000004	34	#define PLL_STATUS 0x00000004
33	#define PLL_GO 0x00000008	35	#define PLL_GO 0x00000008
@@ -52,6 +54,8 @@ · 18 unmodified lines
52	#define PLL_LOCK 0x2	54	#define PLL_LOCK 0x2
53	#define PLL_IDLE 0x1	55	#define PLL_IDLE 0x1
54		56
		57	#define SATA_PLL_SOFT_RESET BIT(18)
		58
55	/*	59	/*
56	* This is an Empirical value that works, need to confirm the actual	60	* This is an Empirical value that works, need to confirm the actual
57	* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status	61	* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -82,6 +86,9 @@ struct ti_pipe3 { · 24 unmodified lines
82	struct clk *refclk;	86	struct clk *refclk;
83	struct clk *div_clk;	87	struct clk *div_clk;
84	struct pipe3_dpll_map *dpll_map;	88	struct pipe3_dpll_map *dpll_map;
		89	struct regmap dpll_reset_syscon; / ctrl. reg. acces */
		90	unsigned int dpll_reset_reg; /* reg. index within syscon */
		91	bool sata_refclk_enabled;
85	};	92	};
86		93
87	static struct pipe3_dpll_map dpll_map_usb[] = {	94	static struct pipe3_dpll_map dpll_map_usb[] = {
@@ -249,8 +256,11 @@ static int ti_pipe3_exit(struct phy *x) · 161 unmodified lines
249	u32 val;	256	u32 val;
250	unsigned long timeout;	257	unsigned long timeout;
251		258
252	/* SATA DPLL can't be powered down due to Errata i783 */	259	/* If dpll_reset_syscon is not present we wont power down SATA DPLL
253	if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata"))	260	* due to Errata i783
		261	*/
		262	if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata") &&
		263	!phy->dpll_reset_syscon)
254	return 0;	264	return 0;
255		265
256	/* PCIe doesn't have internal DPLL */	266	/* PCIe doesn't have internal DPLL */
@@ -276,6 +286,14 @@ static int ti_pipe3_exit(struct phy *x) · 19 unmodified lines
276	}	286	}
277	}	287	}
278		288
		289	/* i783: SATA needs control bit toggle after PLL unlock */
		290	if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata")) {
		291	regmap_update_bits(phy->dpll_reset_syscon, phy->dpll_reset_reg,
		292	SATA_PLL_SOFT_RESET, SATA_PLL_SOFT_RESET);
		293	regmap_update_bits(phy->dpll_reset_syscon, phy->dpll_reset_reg,
		294	SATA_PLL_SOFT_RESET, 0);
		295	}
		296
279	ti_pipe3_disable_clocks(phy);	297	ti_pipe3_disable_clocks(phy);
280		298
281	return 0;	299	return 0;
@@ -350,6 +368,21 @@ static int ti_pipe3_probe(struct platform_device *pdev) · 68 unmodified lines
350	}	368	}
351	} else {	369	} else {
352	phy->wkupclk = ERR_PTR(-ENODEV);	370	phy->wkupclk = ERR_PTR(-ENODEV);
		371	phy->dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,
		372	"syscon-pllreset");
		373	if (IS_ERR(phy->dpll_reset_syscon)) {
		374	dev_info(&pdev->dev,
		375	"can't get syscon-pllreset, sata dpll won't idle\n");
		376	phy->dpll_reset_syscon = NULL;
		377	} else {
		378	if (of_property_read_u32_index(node,
		379	"syscon-pllreset", 1,
		380	&phy->dpll_reset_reg)) {
		381	dev_err(&pdev->dev,
		382	"couldn't get pllreset reg. offset\n");
		383	return -EINVAL;
		384	}
		385	}
353	}	386	}
354		387
355	if (of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {	388	if (of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
@@ -402,10 +435,16 @@ static int ti_pipe3_probe(struct platform_device *pdev) · 46 unmodified lines
402		435
403	platform_set_drvdata(pdev, phy);	436	platform_set_drvdata(pdev, phy);
404	pm_runtime_enable(phy->dev);	437	pm_runtime_enable(phy->dev);
405	/* Prevent auto-disable of refclk for SATA PHY due to Errata i783 */	438
406	if (of_device_is_compatible(node, "ti,phy-pipe3-sata"))	439	/*
407	if (!IS_ERR(phy->refclk))	440	* Prevent auto-disable of refclk for SATA PHY due to Errata i783
		441	*/
		442	if (of_device_is_compatible(node, "ti,phy-pipe3-sata")) {
		443	if (!IS_ERR(phy->refclk)) {
408	clk_prepare_enable(phy->refclk);	444	clk_prepare_enable(phy->refclk);
		445	phy->sata_refclk_enabled = true;
		446	}
		447	}
409		448
410	generic_phy = devm_phy_create(phy->dev, NULL, &ops);	449	generic_phy = devm_phy_create(phy->dev, NULL, &ops);
411	if (IS_ERR(generic_phy))	450	if (IS_ERR(generic_phy))
@@ -472,8 +511,18 @@ static void ti_pipe3_disable_clocks(struct ti_pipe3 *phy) · 60 unmodified lines
472	{	511	{
473	if (!IS_ERR(phy->wkupclk))	512	if (!IS_ERR(phy->wkupclk))
474	clk_disable_unprepare(phy->wkupclk);	513	clk_disable_unprepare(phy->wkupclk);
475	if (!IS_ERR(phy->refclk))	514	if (!IS_ERR(phy->refclk)) {
476	clk_disable_unprepare(phy->refclk);	515	clk_disable_unprepare(phy->refclk);
		516	/*
		517	* SATA refclk needs an additional disable as we left it
		518	* on in probe to avoid Errata i783
		519	*/
		520	if (phy->sata_refclk_enabled) {
		521	clk_disable_unprepare(phy->refclk);
		522	phy->sata_refclk_enabled = false;
		523	}
		524	}
		525
477	if (!IS_ERR(phy->div_clk))	526	if (!IS_ERR(phy->div_clk))
478	clk_disable_unprepare(phy->div_clk);	527	clk_disable_unprepare(phy->div_clk);
479	}	528	}

drivers/platform/chrome/Kconfig+0−1

@@ -4,7 +4,6 @@ · 3 unmodified lines
4		4
5	menuconfig CHROME_PLATFORMS	5	menuconfig CHROME_PLATFORMS
6	bool "Platform support for Chrome hardware"	6	bool "Platform support for Chrome hardware"
7	depends on X86 \|\| ARM
8	---help---	7	---help---
9	Say Y here to get to see options for platform support for	8	Say Y here to get to see options for platform support for
10	various Chromebooks and Chromeboxes. This option alone does	9	various Chromebooks and Chromeboxes. This option alone does

drivers/scsi/ipr.c+18−10

 {
 	struct ipr_trace_entry *trace_entry;
 	struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
+	unsigned int trace_index;
-	trace_entry = &ioa_cfg->trace[atomic_add_return
+	trace_index = atomic_add_return(1, &ioa_cfg->trace_index) & IPR_TRACE_INDEX_MASK;
-			(1, &ioa_cfg->trace_index)%IPR_NUM_TRACE_ENTRIES];
+	trace_entry = &ioa_cfg->trace[trace_index];
 	trace_entry->time = jiffies;
 	trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
 	trace_entry->type = type;
 static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
 {
+	unsigned int hrrq;
 	if (ioa_cfg->hrrq_num == 1)
-		return 0;
+		hrrq = 0;
-	else
+	else {
-		return (atomic_add_return(1, &ioa_cfg->hrrq_index) % (ioa_cfg->hrrq_num - 1)) + 1;
+		hrrq = atomic_add_return(1, &ioa_cfg->hrrq_index);
+		hrrq = (hrrq % (ioa_cfg->hrrq_num - 1)) + 1;
+	}
+	return hrrq;
 }
 /**
 	struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
 	struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
 	u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
-	unsigned long hrrq_flags;
+	unsigned long lock_flags;
 	scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
 	if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
 		scsi_dma_unmap(scsi_cmd);
-		spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
+		spin_lock_irqsave(ipr_cmd->hrrq->lock, lock_flags);
 		list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
 		scsi_cmd->scsi_done(scsi_cmd);
-		spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
+		spin_unlock_irqrestore(ipr_cmd->hrrq->lock, lock_flags);
 	} else {
-		spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
+		spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
+		spin_lock(&ipr_cmd->hrrq->_lock);
 		ipr_erp_start(ioa_cfg, ipr_cmd);
-		spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
+		spin_unlock(&ipr_cmd->hrrq->_lock);
+		spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
 	}
 }

drivers/scsi/ipr.h+1−0

@@ -1486,6 +1486,7 @@ struct ipr_ioa_cfg { · 1485 unmodified lines
1486		1486
1487	#define IPR_NUM_TRACE_INDEX_BITS 8	1487	#define IPR_NUM_TRACE_INDEX_BITS 8
1488	#define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)	1488	#define IPR_NUM_TRACE_ENTRIES (1 << IPR_NUM_TRACE_INDEX_BITS)
		1489	#define IPR_TRACE_INDEX_MASK (IPR_NUM_TRACE_ENTRIES - 1)
1489	#define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)	1490	#define IPR_TRACE_SIZE (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
1490	char trace_start[8];	1491	char trace_start[8];
1491	#define IPR_TRACE_START_LABEL "trace"	1492	#define IPR_TRACE_START_LABEL "trace"

drivers/scsi/libfc/fc_exch.c+4−4

 	if (resp) {
 		resp(sp, fp, arg);
 		res = true;
-	} else if (!IS_ERR(fp)) {
-		fc_frame_free(fp);
 	}
 	spin_lock_bh(&ep->ex_lock);
 	 * If new exch resp handler is valid then call that
 	 * first.
 	 */
-	fc_invoke_resp(ep, sp, fp);
+	if (!fc_invoke_resp(ep, sp, fp))
+		fc_frame_free(fp);
 	fc_exch_release(ep);
 	return;
 	fc_exch_hold(ep);
 	if (!rc)
 		fc_exch_delete(ep);
-	fc_invoke_resp(ep, sp, fp);
+	if (!fc_invoke_resp(ep, sp, fp))
+		fc_frame_free(fp);
 	if (has_rec)
 		fc_exch_timer_set(ep, ep->r_a_tov);
 	fc_exch_release(ep);

drivers/scsi/libfc/fc_fcp.c+17−2

@@ -1039,11 +1039,26 @@ restart: · 1038 unmodified lines
1039	fc_fcp_pkt_hold(fsp);	1039	fc_fcp_pkt_hold(fsp);
1040	spin_unlock_irqrestore(&si->scsi_queue_lock, flags);	1040	spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
1041		1041
1042	if (!fc_fcp_lock_pkt(fsp)) {	1042	spin_lock_bh(&fsp->scsi_pkt_lock);
		1043	if (!(fsp->state & FC_SRB_COMPL)) {
		1044	fsp->state \|= FC_SRB_COMPL;
		1045	/*
		1046	* TODO: dropping scsi_pkt_lock and then reacquiring
		1047	* again around fc_fcp_cleanup_cmd() is required,
		1048	* since fc_fcp_cleanup_cmd() calls into
		1049	* fc_seq_set_resp() and that func preempts cpu using
		1050	* schedule. May be schedule and related code should be
		1051	* removed instead of unlocking here to avoid scheduling
		1052	* while atomic bug.
		1053	*/
		1054	spin_unlock_bh(&fsp->scsi_pkt_lock);
		1055
1043	fc_fcp_cleanup_cmd(fsp, error);	1056	fc_fcp_cleanup_cmd(fsp, error);
		1057
		1058	spin_lock_bh(&fsp->scsi_pkt_lock);
1044	fc_io_compl(fsp);	1059	fc_io_compl(fsp);
1045	fc_fcp_unlock_pkt(fsp);
1046	}	1060	}
		1061	spin_unlock_bh(&fsp->scsi_pkt_lock);
1047		1062
1048	fc_fcp_pkt_release(fsp);	1063	fc_fcp_pkt_release(fsp);
1049	spin_lock_irqsave(&si->scsi_queue_lock, flags);	1064	spin_lock_irqsave(&si->scsi_queue_lock, flags);

drivers/scsi/libiscsi.c+2−23

 {
 	struct iscsi_conn *conn = cls_conn->dd_data;
 	struct iscsi_session *session = conn->session;
-	unsigned long flags;
 	del_timer_sync(&conn->transport_timer);
+	mutex_lock(&session->eh_mutex);
 	spin_lock_bh(&session->frwd_lock);
 	conn->c_stage = ISCSI_CONN_CLEANUP_WAIT;
 	if (session->leadconn == conn) {
 	}
 	spin_unlock_bh(&session->frwd_lock);
-	/*
-	 * Block until all in-progress commands for this connection
-	 * time out or fail.
-	 */
-	for (;;) {
-		spin_lock_irqsave(session->host->host_lock, flags);
-		if (!atomic_read(&session->host->host_busy)) { /* OK for ERL == 0 */
-			spin_unlock_irqrestore(session->host->host_lock, flags);
-			break;
-		}
-		spin_unlock_irqrestore(session->host->host_lock, flags);
-		msleep_interruptible(500);
-		iscsi_conn_printk(KERN_INFO, conn, "iscsi conn_destroy(): "
-				  "host_busy %d host_failed %d\n",
-				  atomic_read(&session->host->host_busy),
-				  session->host->host_failed);
-		/*
-		 * force eh_abort() to unblock
-		 */
-		wake_up(&conn->ehwait);
-	}
 	/* flush queued up work because we free the connection below */
 	iscsi_suspend_tx(conn);
 	if (session->leadconn == conn)
 		session->leadconn = NULL;
 	spin_unlock_bh(&session->frwd_lock);
+	mutex_unlock(&session->eh_mutex);
 	iscsi_destroy_conn(cls_conn);
 }

drivers/scsi/qla2xxx/qla_attr.c+1−1

@@ -738,7 +738,7 @@ qla2x00_sysfs_write_reset(struct file filp, struct kobject kobj, · 737 unmodified lines
738	ql_log(ql_log_info, vha, 0x706f,	738	ql_log(ql_log_info, vha, 0x706f,
739	"Issuing MPI reset.\n");	739	"Issuing MPI reset.\n");
740		740
741	if (IS_QLA83XX(ha)) {	741	if (IS_QLA83XX(ha) \|\| IS_QLA27XX(ha)) {
742	uint32_t idc_control;	742	uint32_t idc_control;
743		743
744	qla83xx_idc_lock(vha, 0);	744	qla83xx_idc_lock(vha, 0);

drivers/scsi/qla2xxx/qla_dbg.c+3−3

@@ -67,10 +67,10 @@ · 66 unmodified lines
67	* \| \| \| 0xd031-0xd0ff \|	67	* \| \| \| 0xd031-0xd0ff \|
68	* \| \| \| 0xd101-0xd1fe \|	68	* \| \| \| 0xd101-0xd1fe \|
69	* \| \| \| 0xd214-0xd2fe \|	69	* \| \| \| 0xd214-0xd2fe \|
70	* \| Target Mode \| 0xe079 \| \|	70	* \| Target Mode \| 0xe080 \| \|
71	* \| Target Mode Management \| 0xf072 \| 0xf002 \|	71	* \| Target Mode Management \| 0xf096 \| 0xf002 \|
72	* \| \| \| 0xf046-0xf049 \|	72	* \| \| \| 0xf046-0xf049 \|
73	* \| Target Mode Task Management \| 0x1000b \| \|	73	* \| Target Mode Task Management \| 0x1000d \| \|
74	* ----------------------------------------------------------------------	74	* ----------------------------------------------------------------------
75	*/	75	*/
76		76

drivers/scsi/qla2xxx/qla_def.h+16−4

 #define RESPONSE_ENTRY_CNT_FX00		256     /* Number of response entries.*/
 struct req_que;
+struct qla_tgt_sess;
 /*
  * (sd.h is not exported, hence local inclusion)
 	uint16_t port_id;
 	unsigned long retry_delay_timestamp;
+	struct qla_tgt_sess *tgt_session;
 } fc_port_t;
 #include "qla_mr.h"
 /* Bit 21 of fw_attributes decides the MCTP capabilities */
 #define IS_MCTP_CAPABLE(ha)	(IS_QLA2031(ha) && \
 				((ha)->fw_attributes_ext[0] & BIT_0))
-#define IS_PI_UNINIT_CAPABLE(ha)	(IS_QLA83XX(ha))
+#define IS_PI_UNINIT_CAPABLE(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha))
-#define IS_PI_IPGUARD_CAPABLE(ha)	(IS_QLA83XX(ha))
+#define IS_PI_IPGUARD_CAPABLE(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha))
 #define IS_PI_DIFB_DIX0_CAPABLE(ha)	(0)
-#define IS_PI_SPLIT_DET_CAPABLE_HBA(ha)	(IS_QLA83XX(ha))
+#define IS_PI_SPLIT_DET_CAPABLE_HBA(ha)	(IS_QLA83XX(ha) || IS_QLA27XX(ha))
 #define IS_PI_SPLIT_DET_CAPABLE(ha)	(IS_PI_SPLIT_DET_CAPABLE_HBA(ha) && \
     (((ha)->fw_attributes_h << 16 | (ha)->fw_attributes) & BIT_22))
-#define IS_ATIO_MSIX_CAPABLE(ha) (IS_QLA83XX(ha))
+#define IS_ATIO_MSIX_CAPABLE(ha) (IS_QLA83XX(ha) || IS_QLA27XX(ha))
 #define IS_TGT_MODE_CAPABLE(ha)	(ha->tgt.atio_q_length)
 #define IS_SHADOW_REG_CAPABLE(ha)  (IS_QLA27XX(ha))
 #define IS_DPORT_CAPABLE(ha)  (IS_QLA83XX(ha) || IS_QLA27XX(ha))
 	uint16_t	fcoe_fcf_idx;
 	uint8_t		fcoe_vn_port_mac[6];
+	/* list of commands waiting on workqueue */
+	struct list_head	qla_cmd_list;
+	struct list_head	qla_sess_op_cmd_list;
+	spinlock_t		cmd_list_lock;
+	/* Counter to detect races between ELS and RSCN events */
+	atomic_t		generation_tick;
+	/* Time when global fcport update has been scheduled */
+	int			total_fcport_update_gen;
 	uint32_t	vp_abort_cnt;
 	struct fc_vport	*fc_vport;	/* holds fc_vport * for each vport */

drivers/scsi/qla2xxx/qla_init.c+150−40

@@ -115,6 +115,8 @@ qla2x00_async_iocb_timeout(void *data) · 114 unmodified lines
115	QLA_LOGIO_LOGIN_RETRIED : 0;	115	QLA_LOGIO_LOGIN_RETRIED : 0;
116	qla2x00_post_async_login_done_work(fcport->vha, fcport,	116	qla2x00_post_async_login_done_work(fcport->vha, fcport,
117	lio->u.logio.data);	117	lio->u.logio.data);
		118	} else if (sp->type == SRB_LOGOUT_CMD) {
		119	qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT);
118	}	120	}
119	}	121	}
120		122
@@ -497,7 +499,10 @@ void · 376 unmodified lines
497	qla2x00_async_logout_done(struct scsi_qla_host vha, fc_port_t fcport,	499	qla2x00_async_logout_done(struct scsi_qla_host vha, fc_port_t fcport,
498	uint16_t *data)	500	uint16_t *data)
499	{	501	{
500	qla2x00_mark_device_lost(vha, fcport, 1, 0);	502	/* Don't re-login in target mode */
		503	if (!fcport->tgt_session)
		504	qla2x00_mark_device_lost(vha, fcport, 1, 0);
		505	qlt_logo_completion_handler(fcport, data[0]);
501	return;	506	return;
502	}	507	}
503		508
@@ -1538,7 +1543,7 @@ qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) · 1034 unmodified lines
1538	mem_size = (ha->fw_memory_size - 0x11000 + 1) *	1543	mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1539	sizeof(uint16_t);	1544	sizeof(uint16_t);
1540	} else if (IS_FWI2_CAPABLE(ha)) {	1545	} else if (IS_FWI2_CAPABLE(ha)) {
1541	if (IS_QLA83XX(ha))	1546	if (IS_QLA83XX(ha) \|\| IS_QLA27XX(ha))
1542	fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);	1547	fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1543	else if (IS_QLA81XX(ha))	1548	else if (IS_QLA81XX(ha))
1544	fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);	1549	fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
@@ -1550,7 +1555,7 @@ qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) · 5 unmodified lines
1550	mem_size = (ha->fw_memory_size - 0x100000 + 1) *	1555	mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1551	sizeof(uint32_t);	1556	sizeof(uint32_t);
1552	if (ha->mqenable) {	1557	if (ha->mqenable) {
1553	if (!IS_QLA83XX(ha))	1558	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
1554	mq_size = sizeof(struct qla2xxx_mq_chain);	1559	mq_size = sizeof(struct qla2xxx_mq_chain);
1555	/*	1560	/*
1556	* Allocate maximum buffer size for all queues.	1561	* Allocate maximum buffer size for all queues.
@@ -2922,21 +2927,14 @@ qla2x00_rport_del(void *data) · 1365 unmodified lines
2922	{	2927	{
2923	fc_port_t *fcport = data;	2928	fc_port_t *fcport = data;
2924	struct fc_rport *rport;	2929	struct fc_rport *rport;
2925	scsi_qla_host_t *vha = fcport->vha;
2926	unsigned long flags;	2930	unsigned long flags;
2927		2931
2928	spin_lock_irqsave(fcport->vha->host->host_lock, flags);	2932	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2929	rport = fcport->drport ? fcport->drport: fcport->rport;	2933	rport = fcport->drport ? fcport->drport: fcport->rport;
2930	fcport->drport = NULL;	2934	fcport->drport = NULL;
2931	spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);	2935	spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2932	if (rport) {	2936	if (rport)
2933	fc_remote_port_delete(rport);	2937	fc_remote_port_delete(rport);
2934	/*
2935	* Release the target mode FC NEXUS in qla_target.c code
2936	* if target mod is enabled.
2937	*/
2938	qlt_fc_port_deleted(vha, fcport);
2939	}
2940	}	2938	}
2941		2939
2942	/**	2940	/**
@@ -3303,6 +3301,7 @@ qla2x00_reg_remote_port(scsi_qla_host_t vha, fc_port_t fcport) · 360 unmodified lines
3303	* Create target mode FC NEXUS in qla_target.c if target mode is	3301	* Create target mode FC NEXUS in qla_target.c if target mode is
3304	* enabled..	3302	* enabled..
3305	*/	3303	*/
		3304
3306	qlt_fc_port_added(vha, fcport);	3305	qlt_fc_port_added(vha, fcport);
3307		3306
3308	spin_lock_irqsave(fcport->vha->host->host_lock, flags);	3307	spin_lock_irqsave(fcport->vha->host->host_lock, flags);
@@ -3341,8 +3340,7 @@ qla2x00_update_fcport(scsi_qla_host_t vha, fc_port_t fcport) · 32 unmodified lines
3341		3340
3342	if (IS_QLAFX00(vha->hw)) {	3341	if (IS_QLAFX00(vha->hw)) {
3343	qla2x00_set_fcport_state(fcport, FCS_ONLINE);	3342	qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3344	qla2x00_reg_remote_port(vha, fcport);	3343	goto reg_port;
3345	return;
3346	}	3344	}
3347	fcport->login_retry = 0;	3345	fcport->login_retry = 0;
3348	fcport->flags &= ~(FCF_LOGIN_NEEDED \| FCF_ASYNC_SENT);	3346	fcport->flags &= ~(FCF_LOGIN_NEEDED \| FCF_ASYNC_SENT);
@@ -3350,7 +3348,16 @@ qla2x00_update_fcport(scsi_qla_host_t vha, fc_port_t fcport) · 1 unmodified line
3350	qla2x00_set_fcport_state(fcport, FCS_ONLINE);	3348	qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3351	qla2x00_iidma_fcport(vha, fcport);	3349	qla2x00_iidma_fcport(vha, fcport);
3352	qla24xx_update_fcport_fcp_prio(vha, fcport);	3350	qla24xx_update_fcport_fcp_prio(vha, fcport);
3353	qla2x00_reg_remote_port(vha, fcport);	3351
		3352	reg_port:
		3353	if (qla_ini_mode_enabled(vha))
		3354	qla2x00_reg_remote_port(vha, fcport);
		3355	else {
		3356	/*
		3357	* Create target mode FC NEXUS in qla_target.c
		3358	*/
		3359	qlt_fc_port_added(vha, fcport);
		3360	}
3354	}	3361	}
3355		3362
3356	/*	3363	/*
@@ -3375,6 +3382,7 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha) · 18 unmodified lines
3375	LIST_HEAD(new_fcports);	3382	LIST_HEAD(new_fcports);
3376	struct qla_hw_data *ha = vha->hw;	3383	struct qla_hw_data *ha = vha->hw;
3377	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);	3384	struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
		3385	int discovery_gen;
3378		3386
3379	/* If FL port exists, then SNS is present */	3387	/* If FL port exists, then SNS is present */
3380	if (IS_FWI2_CAPABLE(ha))	3388	if (IS_FWI2_CAPABLE(ha))
@@ -3445,6 +3453,14 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha) · 64 unmodified lines
3445	fcport->scan_state = QLA_FCPORT_SCAN;	3453	fcport->scan_state = QLA_FCPORT_SCAN;
3446	}	3454	}
3447		3455
		3456	/* Mark the time right before querying FW for connected ports.
		3457	* This process is long, asynchronous and by the time it's done,
		3458	* collected information might not be accurate anymore. E.g.
		3459	* disconnected port might have re-connected and a brand new
		3460	* session has been created. In this case session's generation
		3461	* will be newer than discovery_gen. */
		3462	qlt_do_generation_tick(vha, &discovery_gen);
		3463
3448	rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);	3464	rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
3449	if (rval != QLA_SUCCESS)	3465	if (rval != QLA_SUCCESS)
3450	break;	3466	break;
@@ -3460,20 +3476,44 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha) · 9 unmodified lines
3460	if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)	3476	if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3461	continue;	3477	continue;
3462		3478
3463	if (fcport->scan_state == QLA_FCPORT_SCAN &&	3479	if (fcport->scan_state == QLA_FCPORT_SCAN) {
3464	atomic_read(&fcport->state) == FCS_ONLINE) {	3480	if (qla_ini_mode_enabled(base_vha) &&
3465	qla2x00_mark_device_lost(vha, fcport,	3481	atomic_read(&fcport->state) == FCS_ONLINE) {
3466	ql2xplogiabsentdevice, 0);	3482	qla2x00_mark_device_lost(vha, fcport,
3467	if (fcport->loop_id != FC_NO_LOOP_ID &&	3483	ql2xplogiabsentdevice, 0);
3468	(fcport->flags & FCF_FCP2_DEVICE) == 0 &&	3484	if (fcport->loop_id != FC_NO_LOOP_ID &&
3469	fcport->port_type != FCT_INITIATOR &&	3485	(fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3470	fcport->port_type != FCT_BROADCAST) {	3486	fcport->port_type != FCT_INITIATOR &&
3471	ha->isp_ops->fabric_logout(vha,	3487	fcport->port_type != FCT_BROADCAST) {
3472	fcport->loop_id,	3488	ha->isp_ops->fabric_logout(vha,
3473	fcport->d_id.b.domain,	3489	fcport->loop_id,
3474	fcport->d_id.b.area,	3490	fcport->d_id.b.domain,
3475	fcport->d_id.b.al_pa);	3491	fcport->d_id.b.area,
3476	qla2x00_clear_loop_id(fcport);	3492	fcport->d_id.b.al_pa);
		3493	qla2x00_clear_loop_id(fcport);
		3494	}
		3495	} else if (!qla_ini_mode_enabled(base_vha)) {
		3496	/*
		3497	* In target mode, explicitly kill
		3498	* sessions and log out of devices
		3499	* that are gone, so that we don't
		3500	* end up with an initiator using the
		3501	* wrong ACL (if the fabric recycles
		3502	* an FC address and we have a stale
		3503	* session around) and so that we don't
		3504	* report initiators that are no longer
		3505	* on the fabric.
		3506	*/
		3507	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf077,
		3508	"port gone, logging out/killing session: "
		3509	"%8phC state 0x%x flags 0x%x fc4_type 0x%x "
		3510	"scan_state %d\n",
		3511	fcport->port_name,
		3512	atomic_read(&fcport->state),
		3513	fcport->flags, fcport->fc4_type,
		3514	fcport->scan_state);
		3515	qlt_fc_port_deleted(vha, fcport,
		3516	discovery_gen);
3477	}	3517	}
3478	}	3518	}
3479	}	3519	}
@@ -3494,6 +3534,28 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha) · 14 unmodified lines
3494	(fcport->flags & FCF_LOGIN_NEEDED) == 0)	3534	(fcport->flags & FCF_LOGIN_NEEDED) == 0)
3495	continue;	3535	continue;
3496		3536
		3537	/*
		3538	* If we're not an initiator, skip looking for devices
		3539	* and logging in. There's no reason for us to do it,
		3540	* and it seems to actively cause problems in target
		3541	* mode if we race with the initiator logging into us
		3542	* (we might get the "port ID used" status back from
		3543	* our login command and log out the initiator, which
		3544	* seems to cause havoc).
		3545	*/
		3546	if (!qla_ini_mode_enabled(base_vha)) {
		3547	if (fcport->scan_state == QLA_FCPORT_FOUND) {
		3548	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf078,
		3549	"port %8phC state 0x%x flags 0x%x fc4_type 0x%x "
		3550	"scan_state %d (initiator mode disabled; skipping "
		3551	"login)\n", fcport->port_name,
		3552	atomic_read(&fcport->state),
		3553	fcport->flags, fcport->fc4_type,
		3554	fcport->scan_state);
		3555	}
		3556	continue;
		3557	}
		3558
3497	if (fcport->loop_id == FC_NO_LOOP_ID) {	3559	if (fcport->loop_id == FC_NO_LOOP_ID) {
3498	fcport->loop_id = next_loopid;	3560	fcport->loop_id = next_loopid;
3499	rval = qla2x00_find_new_loop_id(	3561	rval = qla2x00_find_new_loop_id(
@@ -3520,16 +3582,38 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha) · 20 unmodified lines
3520	test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))	3582	test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3521	break;	3583	break;
3522		3584
3523	/* Find a new loop ID to use. */	3585	/*
3524	fcport->loop_id = next_loopid;	3586	* If we're not an initiator, skip looking for devices
3525	rval = qla2x00_find_new_loop_id(base_vha, fcport);	3587	* and logging in. There's no reason for us to do it,
3526	if (rval != QLA_SUCCESS) {	3588	* and it seems to actively cause problems in target
3527	/* Ran out of IDs to use */	3589	* mode if we race with the initiator logging into us
3528	break;	3590	* (we might get the "port ID used" status back from
3529	}	3591	* our login command and log out the initiator, which
		3592	* seems to cause havoc).
		3593	*/
		3594	if (qla_ini_mode_enabled(base_vha)) {
		3595	/* Find a new loop ID to use. */
		3596	fcport->loop_id = next_loopid;
		3597	rval = qla2x00_find_new_loop_id(base_vha,
		3598	fcport);
		3599	if (rval != QLA_SUCCESS) {
		3600	/* Ran out of IDs to use */
		3601	break;
		3602	}
3530		3603
3531	/* Login and update database */	3604	/* Login and update database */
3532	qla2x00_fabric_dev_login(vha, fcport, &next_loopid);	3605	qla2x00_fabric_dev_login(vha, fcport,
		3606	&next_loopid);
		3607	} else {
		3608	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf079,
		3609	"new port %8phC state 0x%x flags 0x%x fc4_type "
		3610	"0x%x scan_state %d (initiator mode disabled; "
		3611	"skipping login)\n",
		3612	fcport->port_name,
		3613	atomic_read(&fcport->state),
		3614	fcport->flags, fcport->fc4_type,
		3615	fcport->scan_state);
		3616	}
3533		3617
3534	list_move_tail(&fcport->list, &vha->vp_fcports);	3618	list_move_tail(&fcport->list, &vha->vp_fcports);
3535	}	3619	}
@@ -3725,11 +3809,12 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, · 189 unmodified lines
3725	fcport->fp_speed = new_fcport->fp_speed;	3809	fcport->fp_speed = new_fcport->fp_speed;
3726		3810
3727	/*	3811	/*
3728	* If address the same and state FCS_ONLINE, nothing	3812	* If address the same and state FCS_ONLINE
3729	* changed.	3813	* (or in target mode), nothing changed.
3730	*/	3814	*/
3731	if (fcport->d_id.b24 == new_fcport->d_id.b24 &&	3815	if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3732	atomic_read(&fcport->state) == FCS_ONLINE) {	3816	(atomic_read(&fcport->state) == FCS_ONLINE \|\|
		3817	!qla_ini_mode_enabled(base_vha))) {
3733	break;	3818	break;
3734	}	3819	}
3735		3820
@@ -3749,6 +3834,22 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, · 13 unmodified lines
3749	* Log it out if still logged in and mark it for	3834	* Log it out if still logged in and mark it for
3750	* relogin later.	3835	* relogin later.
3751	*/	3836	*/
		3837	if (!qla_ini_mode_enabled(base_vha)) {
		3838	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
		3839	"port changed FC ID, %8phC"
		3840	" old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
		3841	fcport->port_name,
		3842	fcport->d_id.b.domain,
		3843	fcport->d_id.b.area,
		3844	fcport->d_id.b.al_pa,
		3845	fcport->loop_id,
		3846	new_fcport->d_id.b.domain,
		3847	new_fcport->d_id.b.area,
		3848	new_fcport->d_id.b.al_pa);
		3849	fcport->d_id.b24 = new_fcport->d_id.b24;
		3850	break;
		3851	}
		3852
3752	fcport->d_id.b24 = new_fcport->d_id.b24;	3853	fcport->d_id.b24 = new_fcport->d_id.b24;
3753	fcport->flags \|= FCF_LOGIN_NEEDED;	3854	fcport->flags \|= FCF_LOGIN_NEEDED;
3754	if (fcport->loop_id != FC_NO_LOOP_ID &&	3855	if (fcport->loop_id != FC_NO_LOOP_ID &&
@@ -3768,6 +3869,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, · 13 unmodified lines
3768	if (found)	3869	if (found)
3769	continue;	3870	continue;
3770	/* If device was not in our fcports list, then add it. */	3871	/* If device was not in our fcports list, then add it. */
		3872	new_fcport->scan_state = QLA_FCPORT_FOUND;
3771	list_add_tail(&new_fcport->list, new_fcports);	3873	list_add_tail(&new_fcport->list, new_fcports);
3772		3874
3773	/* Allocate a new replacement fcport. */	3875	/* Allocate a new replacement fcport. */
@@ -4188,6 +4290,14 @@ qla2x00_update_fcports(scsi_qla_host_t *base_vha) · 414 unmodified lines
4188	atomic_read(&fcport->state) != FCS_UNCONFIGURED) {	4290	atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
4189	spin_unlock_irqrestore(&ha->vport_slock, flags);	4291	spin_unlock_irqrestore(&ha->vport_slock, flags);
4190	qla2x00_rport_del(fcport);	4292	qla2x00_rport_del(fcport);
		4293
		4294	/*
		4295	* Release the target mode FC NEXUS in
		4296	* qla_target.c, if target mod is enabled.
		4297	*/
		4298	qlt_fc_port_deleted(vha, fcport,
		4299	base_vha->total_fcport_update_gen);
		4300
4191	spin_lock_irqsave(&ha->vport_slock, flags);	4301	spin_lock_irqsave(&ha->vport_slock, flags);
4192	}	4302	}
4193	}	4303	}

drivers/scsi/qla2xxx/qla_iocb.c+3−0

 	logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
 	logio->control_flags =
 	    cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
+	if (!sp->fcport->tgt_session ||
+	    !sp->fcport->tgt_session->keep_nport_handle)
+		logio->control_flags |= cpu_to_le16(LCF_FREE_NPORT);
 	logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
 	logio->port_id[0] = sp->fcport->d_id.b.al_pa;
 	logio->port_id[1] = sp->fcport->d_id.b.area;

drivers/scsi/qla2xxx/qla_mbx.c+4−3

 			*orig_iocb_cnt = mcp->mb[10];
 		if (vha->hw->flags.npiv_supported && max_npiv_vports)
 			*max_npiv_vports = mcp->mb[11];
-		if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
+		if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) ||
+		    IS_QLA27XX(vha->hw)) && max_fcfs)
 			*max_fcfs = mcp->mb[12];
 	}
 	spin_lock_irqsave(&ha->hardware_lock, flags);
 	if (!(rsp->options & BIT_0)) {
 		WRT_REG_DWORD(rsp->rsp_q_out, 0);
-		if (!IS_QLA83XX(ha))
+		if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
 			WRT_REG_DWORD(rsp->rsp_q_in, 0);
 	}
 	mbx_cmd_t *mcp = &mc;
 	struct qla_hw_data *ha = vha->hw;
-	if (!IS_QLA83XX(ha))
+	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
 		return QLA_FUNCTION_FAILED;
 	ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);

drivers/scsi/qla2xxx/qla_os.c+10−2

 		ha->mbx_count = MAILBOX_REGISTER_COUNT;
 		req_length = REQUEST_ENTRY_CNT_24XX;
 		rsp_length = RESPONSE_ENTRY_CNT_2300;
+		ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
 		ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
 		ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
 		ha->gid_list_info_size = 8;
 		spin_lock_irqsave(vha->host->host_lock, flags);
 		fcport->drport = rport;
 		spin_unlock_irqrestore(vha->host->host_lock, flags);
+		qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
 		set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
 		qla2xxx_wake_dpc(base_vha);
 	} else {
-		fc_remote_port_delete(rport);
+		int now;
-		qlt_fc_port_deleted(vha, fcport);
+		if (rport)
+			fc_remote_port_delete(rport);
+		qlt_do_generation_tick(vha, &now);
+		qlt_fc_port_deleted(vha, fcport, now);
 	}
 }
 	INIT_LIST_HEAD(&vha->vp_fcports);
 	INIT_LIST_HEAD(&vha->work_list);
 	INIT_LIST_HEAD(&vha->list);
+	INIT_LIST_HEAD(&vha->qla_cmd_list);
+	INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
 	spin_lock_init(&vha->work_lock);
+	spin_lock_init(&vha->cmd_list_lock);
 	sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
 	ql_dbg(ql_dbg_init, vha, 0x0041,

drivers/scsi/qla2xxx/qla_sup.c+1−1

@@ -1697,7 +1697,7 @@ qla83xx_select_led_port(struct qla_hw_data *ha) · 1696 unmodified lines
1697	{	1697	{
1698	uint32_t led_select_value = 0;	1698	uint32_t led_select_value = 0;
1699		1699
1700	if (!IS_QLA83XX(ha))	1700	if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
1701	goto out;	1701	goto out;
1702		1702
1703	if (ha->port_no == 0)	1703	if (ha->port_no == 0)

drivers/scsi/qla2xxx/qla_target.c+692−71

@@ -113,6 +113,11 @@ static void qlt_abort_cmd_on_host_reset(struct scsi_qla_host *vha, · 112 unmodified lines
113	static void qlt_alloc_qfull_cmd(struct scsi_qla_host *vha,	113	static void qlt_alloc_qfull_cmd(struct scsi_qla_host *vha,
114	struct atio_from_isp *atio, uint16_t status, int qfull);	114	struct atio_from_isp *atio, uint16_t status, int qfull);
115	static void qlt_disable_vha(struct scsi_qla_host *vha);	115	static void qlt_disable_vha(struct scsi_qla_host *vha);
		116	static void qlt_clear_tgt_db(struct qla_tgt *tgt);
		117	static void qlt_send_notify_ack(struct scsi_qla_host *vha,
		118	struct imm_ntfy_from_isp *ntfy,
		119	uint32_t add_flags, uint16_t resp_code, int resp_code_valid,
		120	uint16_t srr_flags, uint16_t srr_reject_code, uint8_t srr_explan);
116	/*	121	/*
117	* Global Variables	122	* Global Variables
118	*/	123	*/
@@ -122,6 +127,16 @@ static struct workqueue_struct *qla_tgt_wq; · 3 unmodified lines
122	static DEFINE_MUTEX(qla_tgt_mutex);	127	static DEFINE_MUTEX(qla_tgt_mutex);
123	static LIST_HEAD(qla_tgt_glist);	128	static LIST_HEAD(qla_tgt_glist);
124		129
		130	/* This API intentionally takes dest as a parameter, rather than returning
		131	* int value to avoid caller forgetting to issue wmb() after the store */
		132	void qlt_do_generation_tick(struct scsi_qla_host vha, int dest)
		133	{
		134	scsi_qla_host_t *base_vha = pci_get_drvdata(vha->hw->pdev);
		135	*dest = atomic_inc_return(&base_vha->generation_tick);
		136	/* memory barrier */
		137	wmb();
		138	}
		139
125	/* ha->hardware_lock supposed to be held on entry (to protect tgt->sess_list) */	140	/* ha->hardware_lock supposed to be held on entry (to protect tgt->sess_list) */
126	static struct qla_tgt_sess *qlt_find_sess_by_port_name(	141	static struct qla_tgt_sess *qlt_find_sess_by_port_name(
127	struct qla_tgt *tgt,	142	struct qla_tgt *tgt,
@@ -381,14 +396,73 @@ static void qlt_free_session_done(struct work_struct *work) · 253 unmodified lines
381	struct qla_tgt *tgt = sess->tgt;	396	struct qla_tgt *tgt = sess->tgt;
382	struct scsi_qla_host *vha = sess->vha;	397	struct scsi_qla_host *vha = sess->vha;
383	struct qla_hw_data *ha = vha->hw;	398	struct qla_hw_data *ha = vha->hw;
		399	unsigned long flags;
		400	bool logout_started = false;
		401	fc_port_t fcport;
		402
		403	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf084,
		404	"%s: se_sess %p / sess %p from port %8phC loop_id %#04x"
		405	" s_id %02x:%02x:%02x logout %d keep %d plogi %d\n",
		406	__func__, sess->se_sess, sess, sess->port_name, sess->loop_id,
		407	sess->s_id.b.domain, sess->s_id.b.area, sess->s_id.b.al_pa,
		408	sess->logout_on_delete, sess->keep_nport_handle,
		409	sess->plogi_ack_needed);
384		410
385	BUG_ON(!tgt);	411	BUG_ON(!tgt);
		412
		413	if (sess->logout_on_delete) {
		414	int rc;
		415
		416	memset(&fcport, 0, sizeof(fcport));
		417	fcport.loop_id = sess->loop_id;
		418	fcport.d_id = sess->s_id;
		419	memcpy(fcport.port_name, sess->port_name, WWN_SIZE);
		420	fcport.vha = vha;
		421	fcport.tgt_session = sess;
		422
		423	rc = qla2x00_post_async_logout_work(vha, &fcport, NULL);
		424	if (rc != QLA_SUCCESS)
		425	ql_log(ql_log_warn, vha, 0xf085,
		426	"Schedule logo failed sess %p rc %d\n",
		427	sess, rc);
		428	else
		429	logout_started = true;
		430	}
		431
386	/*	432	/*
387	* Release the target session for FC Nexus from fabric module code.	433	* Release the target session for FC Nexus from fabric module code.
388	*/	434	*/
389	if (sess->se_sess != NULL)	435	if (sess->se_sess != NULL)
390	ha->tgt.tgt_ops->free_session(sess);	436	ha->tgt.tgt_ops->free_session(sess);
391		437
		438	if (logout_started) {
		439	bool traced = false;
		440
		441	while (!ACCESS_ONCE(sess->logout_completed)) {
		442	if (!traced) {
		443	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf086,
		444	"%s: waiting for sess %p logout\n",
		445	__func__, sess);
		446	traced = true;
		447	}
		448	msleep(100);
		449	}
		450
		451	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf087,
		452	"%s: sess %p logout completed\n",
		453	__func__, sess);
		454	}
		455
		456	spin_lock_irqsave(&ha->hardware_lock, flags);
		457
		458	if (sess->plogi_ack_needed)
		459	qlt_send_notify_ack(vha, &sess->tm_iocb,
		460	0, 0, 0, 0, 0, 0);
		461
		462	list_del(&sess->sess_list_entry);
		463
		464	spin_unlock_irqrestore(&ha->hardware_lock, flags);
		465
392	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf001,	466	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf001,
393	"Unregistration of sess %p finished\n", sess);	467	"Unregistration of sess %p finished\n", sess);
394		468
@@ -409,9 +483,9 @@ void qlt_unreg_sess(struct qla_tgt_sess *sess) · 14 unmodified lines
409		483
410	vha->hw->tgt.tgt_ops->clear_nacl_from_fcport_map(sess);	484	vha->hw->tgt.tgt_ops->clear_nacl_from_fcport_map(sess);
411		485
412	list_del(&sess->sess_list_entry);	486	if (!list_empty(&sess->del_list_entry))
413	if (sess->deleted)	487	list_del_init(&sess->del_list_entry);
414	list_del(&sess->del_list_entry);	488	sess->deleted = QLA_SESS_DELETION_IN_PROGRESS;
415		489
416	INIT_WORK(&sess->free_work, qlt_free_session_done);	490	INIT_WORK(&sess->free_work, qlt_free_session_done);
417	schedule_work(&sess->free_work);	491	schedule_work(&sess->free_work);
@@ -431,10 +505,10 @@ static int qlt_reset(struct scsi_qla_host vha, void iocb, int mcmd) · 13 unmodified lines
431		505
432	loop_id = le16_to_cpu(n->u.isp24.nport_handle);	506	loop_id = le16_to_cpu(n->u.isp24.nport_handle);
433	if (loop_id == 0xFFFF) {	507	if (loop_id == 0xFFFF) {
434	#if 0 /* FIXME: Re-enable Global event handling.. */
435	/* Global event */	508	/* Global event */
436	atomic_inc(&ha->tgt.qla_tgt->tgt_global_resets_count);	509	atomic_inc(&vha->vha_tgt.qla_tgt->tgt_global_resets_count);
437	qlt_clear_tgt_db(ha->tgt.qla_tgt);	510	qlt_clear_tgt_db(vha->vha_tgt.qla_tgt);
		511	#if 0 /* FIXME: do we need to choose a session here? */
438	if (!list_empty(&ha->tgt.qla_tgt->sess_list)) {	512	if (!list_empty(&ha->tgt.qla_tgt->sess_list)) {
439	sess = list_entry(ha->tgt.qla_tgt->sess_list.next,	513	sess = list_entry(ha->tgt.qla_tgt->sess_list.next,
440	typeof(*sess), sess_list_entry);	514	typeof(*sess), sess_list_entry);
@@ -489,27 +563,38 @@ static void qlt_schedule_sess_for_deletion(struct qla_tgt_sess *sess, · 48 unmodified lines
489	struct qla_tgt *tgt = sess->tgt;	563	struct qla_tgt *tgt = sess->tgt;
490	uint32_t dev_loss_tmo = tgt->ha->port_down_retry_count + 5;	564	uint32_t dev_loss_tmo = tgt->ha->port_down_retry_count + 5;
491		565
492	if (sess->deleted)	566	if (sess->deleted) {
493	return;	567	/* Upgrade to unconditional deletion in case it was temporary */
		568	if (immediate && sess->deleted == QLA_SESS_DELETION_PENDING)
		569	list_del(&sess->del_list_entry);
		570	else
		571	return;
		572	}
494		573
495	ql_dbg(ql_dbg_tgt, sess->vha, 0xe001,	574	ql_dbg(ql_dbg_tgt, sess->vha, 0xe001,
496	"Scheduling sess %p for deletion\n", sess);	575	"Scheduling sess %p for deletion\n", sess);
497	list_add_tail(&sess->del_list_entry, &tgt->del_sess_list);
498	sess->deleted = 1;
499		576
500	if (immediate)	577	if (immediate) {
501	dev_loss_tmo = 0;	578	dev_loss_tmo = 0;
		579	sess->deleted = QLA_SESS_DELETION_IN_PROGRESS;
		580	list_add(&sess->del_list_entry, &tgt->del_sess_list);
		581	} else {
		582	sess->deleted = QLA_SESS_DELETION_PENDING;
		583	list_add_tail(&sess->del_list_entry, &tgt->del_sess_list);
		584	}
502		585
503	sess->expires = jiffies + dev_loss_tmo * HZ;	586	sess->expires = jiffies + dev_loss_tmo * HZ;
504		587
505	ql_dbg(ql_dbg_tgt, sess->vha, 0xe048,	588	ql_dbg(ql_dbg_tgt, sess->vha, 0xe048,
506	"qla_target(%d): session for port %8phC (loop ID %d) scheduled for "	589	"qla_target(%d): session for port %8phC (loop ID %d s_id %02x:%02x:%02x)"
507	"deletion in %u secs (expires: %lu) immed: %d\n",	590	" scheduled for deletion in %u secs (expires: %lu) immed: %d, logout: %d, gen: %#x\n",
508	sess->vha->vp_idx, sess->port_name, sess->loop_id, dev_loss_tmo,	591	sess->vha->vp_idx, sess->port_name, sess->loop_id,
509	sess->expires, immediate);	592	sess->s_id.b.domain, sess->s_id.b.area, sess->s_id.b.al_pa,
		593	dev_loss_tmo, sess->expires, immediate, sess->logout_on_delete,
		594	sess->generation);
510		595
511	if (immediate)	596	if (immediate)
512	schedule_delayed_work(&tgt->sess_del_work, 0);	597	mod_delayed_work(system_wq, &tgt->sess_del_work, 0);
513	else	598	else
514	schedule_delayed_work(&tgt->sess_del_work,	599	schedule_delayed_work(&tgt->sess_del_work,
515	sess->expires - jiffies);	600	sess->expires - jiffies);
@@ -578,9 +663,9 @@ out_free_id_list: · 62 unmodified lines
578	/* ha->hardware_lock supposed to be held on entry */	663	/* ha->hardware_lock supposed to be held on entry */
579	static void qlt_undelete_sess(struct qla_tgt_sess *sess)	664	static void qlt_undelete_sess(struct qla_tgt_sess *sess)
580	{	665	{
581	BUG_ON(!sess->deleted);	666	BUG_ON(sess->deleted != QLA_SESS_DELETION_PENDING);
582		667
583	list_del(&sess->del_list_entry);	668	list_del_init(&sess->del_list_entry);
584	sess->deleted = 0;	669	sess->deleted = 0;
585	}	670	}
586		671
@@ -599,7 +684,9 @@ static void qlt_del_sess_work_fn(struct delayed_work *work) · 12 unmodified lines
599	del_list_entry);	684	del_list_entry);
600	elapsed = jiffies;	685	elapsed = jiffies;
601	if (time_after_eq(elapsed, sess->expires)) {	686	if (time_after_eq(elapsed, sess->expires)) {
602	qlt_undelete_sess(sess);	687	/* No turning back */
		688	list_del_init(&sess->del_list_entry);
		689	sess->deleted = QLA_SESS_DELETION_IN_PROGRESS;
603		690
604	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf004,	691	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf004,
605	"Timeout: sess %p about to be deleted\n",	692	"Timeout: sess %p about to be deleted\n",
@@ -643,6 +730,13 @@ static struct qla_tgt_sess *qlt_create_sess( · 37 unmodified lines
643	fcport->d_id.b.al_pa, fcport->d_id.b.area,	730	fcport->d_id.b.al_pa, fcport->d_id.b.area,
644	fcport->loop_id);	731	fcport->loop_id);
645		732
		733	/* Cannot undelete at this point */
		734	if (sess->deleted == QLA_SESS_DELETION_IN_PROGRESS) {
		735	spin_unlock_irqrestore(&ha->hardware_lock,
		736	flags);
		737	return NULL;
		738	}
		739
646	if (sess->deleted)	740	if (sess->deleted)
647	qlt_undelete_sess(sess);	741	qlt_undelete_sess(sess);
648		742
@@ -652,6 +746,9 @@ static struct qla_tgt_sess *qlt_create_sess( · 3 unmodified lines
652		746
653	if (sess->local && !local)	747	if (sess->local && !local)
654	sess->local = 0;	748	sess->local = 0;
		749
		750	qlt_do_generation_tick(vha, &sess->generation);
		751
655	spin_unlock_irqrestore(&ha->hardware_lock, flags);	752	spin_unlock_irqrestore(&ha->hardware_lock, flags);
656		753
657	return sess;	754	return sess;
@@ -673,6 +770,14 @@ static struct qla_tgt_sess *qlt_create_sess( · 15 unmodified lines
673	sess->s_id = fcport->d_id;	770	sess->s_id = fcport->d_id;
674	sess->loop_id = fcport->loop_id;	771	sess->loop_id = fcport->loop_id;
675	sess->local = local;	772	sess->local = local;
		773	INIT_LIST_HEAD(&sess->del_list_entry);
		774
		775	/* Under normal circumstances we want to logout from firmware when
		776	* session eventually ends and release corresponding nport handle.
		777	* In the exception cases (e.g. when new PLOGI is waiting) corresponding
		778	* code will adjust these flags as necessary. */
		779	sess->logout_on_delete = 1;
		780	sess->keep_nport_handle = 0;
676		781
677	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf006,	782	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf006,
678	"Adding sess %p to tgt %p via ->check_initiator_node_acl()\n",	783	"Adding sess %p to tgt %p via ->check_initiator_node_acl()\n",
@@ -705,6 +810,7 @@ static struct qla_tgt_sess *qlt_create_sess( · 26 unmodified lines
705	spin_lock_irqsave(&ha->hardware_lock, flags);	810	spin_lock_irqsave(&ha->hardware_lock, flags);
706	list_add_tail(&sess->sess_list_entry, &vha->vha_tgt.qla_tgt->sess_list);	811	list_add_tail(&sess->sess_list_entry, &vha->vha_tgt.qla_tgt->sess_list);
707	vha->vha_tgt.qla_tgt->sess_count++;	812	vha->vha_tgt.qla_tgt->sess_count++;
		813	qlt_do_generation_tick(vha, &sess->generation);
708	spin_unlock_irqrestore(&ha->hardware_lock, flags);	814	spin_unlock_irqrestore(&ha->hardware_lock, flags);
709		815
710	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04b,	816	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf04b,
@@ -718,7 +824,7 @@ static struct qla_tgt_sess *qlt_create_sess( · 7 unmodified lines
718	}	824	}
719		825
720	/*	826	/*
721	* Called from drivers/scsi/qla2xxx/qla_init.c:qla2x00_reg_remote_port()	827	* Called from qla2x00_reg_remote_port()
722	*/	828	*/
723	void qlt_fc_port_added(struct scsi_qla_host vha, fc_port_t fcport)	829	void qlt_fc_port_added(struct scsi_qla_host vha, fc_port_t fcport)
724	{	830	{
@@ -750,6 +856,10 @@ void qlt_fc_port_added(struct scsi_qla_host vha, fc_port_t fcport) · 25 unmodified lines
750	mutex_unlock(&vha->vha_tgt.tgt_mutex);	856	mutex_unlock(&vha->vha_tgt.tgt_mutex);
751		857
752	spin_lock_irqsave(&ha->hardware_lock, flags);	858	spin_lock_irqsave(&ha->hardware_lock, flags);
		859	} else if (sess->deleted == QLA_SESS_DELETION_IN_PROGRESS) {
		860	/* Point of no return */
		861	spin_unlock_irqrestore(&ha->hardware_lock, flags);
		862	return;
753	} else {	863	} else {
754	kref_get(&sess->se_sess->sess_kref);	864	kref_get(&sess->se_sess->sess_kref);
755		865
@@ -780,27 +890,36 @@ void qlt_fc_port_added(struct scsi_qla_host vha, fc_port_t fcport) · 24 unmodified lines
780	spin_unlock_irqrestore(&ha->hardware_lock, flags);	890	spin_unlock_irqrestore(&ha->hardware_lock, flags);
781	}	891	}
782		892
783	void qlt_fc_port_deleted(struct scsi_qla_host vha, fc_port_t fcport)	893	/*
		894	* max_gen - specifies maximum session generation
		895	* at which this deletion requestion is still valid
		896	*/
		897	void
		898	qlt_fc_port_deleted(struct scsi_qla_host vha, fc_port_t fcport, int max_gen)
784	{	899	{
785	struct qla_hw_data *ha = vha->hw;
786	struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;	900	struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
787	struct qla_tgt_sess *sess;	901	struct qla_tgt_sess *sess;
788	unsigned long flags;
789		902
790	if (!vha->hw->tgt.tgt_ops)	903	if (!vha->hw->tgt.tgt_ops)
791	return;	904	return;
792		905
793	if (!tgt \|\| (fcport->port_type != FCT_INITIATOR))	906	if (!tgt)
794	return;	907	return;
795		908
796	spin_lock_irqsave(&ha->hardware_lock, flags);
797	if (tgt->tgt_stop) {	909	if (tgt->tgt_stop) {
798	spin_unlock_irqrestore(&ha->hardware_lock, flags);
799	return;	910	return;
800	}	911	}
801	sess = qlt_find_sess_by_port_name(tgt, fcport->port_name);	912	sess = qlt_find_sess_by_port_name(tgt, fcport->port_name);
802	if (!sess) {	913	if (!sess) {
803	spin_unlock_irqrestore(&ha->hardware_lock, flags);	914	return;
		915	}
		916
		917	if (max_gen - sess->generation < 0) {
		918	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf092,
		919	"Ignoring stale deletion request for se_sess %p / sess %p"
		920	" for port %8phC, req_gen %d, sess_gen %d\n",
		921	sess->se_sess, sess, sess->port_name, max_gen,
		922	sess->generation);
804	return;	923	return;
805	}	924	}
806		925
@@ -808,7 +927,6 @@ void qlt_fc_port_deleted(struct scsi_qla_host vha, fc_port_t fcport) · 1 unmodified line
808		927
809	sess->local = 1;	928	sess->local = 1;
810	qlt_schedule_sess_for_deletion(sess, false);	929	qlt_schedule_sess_for_deletion(sess, false);
811	spin_unlock_irqrestore(&ha->hardware_lock, flags);
812	}	930	}
813		931
814	static inline int test_tgt_sess_count(struct qla_tgt *tgt)	932	static inline int test_tgt_sess_count(struct qla_tgt *tgt)
@@ -1175,6 +1293,70 @@ static void qlt_24xx_retry_term_exchange(struct scsi_qla_host *vha, · 360 unmodified lines
1175	FCP_TMF_CMPL, true);	1293	FCP_TMF_CMPL, true);
1176	}	1294	}
1177		1295
		1296	static int abort_cmd_for_tag(struct scsi_qla_host *vha, uint32_t tag)
		1297	{
		1298	struct qla_tgt_sess_op *op;
		1299	struct qla_tgt_cmd *cmd;
		1300
		1301	spin_lock(&vha->cmd_list_lock);
		1302
		1303	list_for_each_entry(op, &vha->qla_sess_op_cmd_list, cmd_list) {
		1304	if (tag == op->atio.u.isp24.exchange_addr) {
		1305	op->aborted = true;
		1306	spin_unlock(&vha->cmd_list_lock);
		1307	return 1;
		1308	}
		1309	}
		1310
		1311	list_for_each_entry(cmd, &vha->qla_cmd_list, cmd_list) {
		1312	if (tag == cmd->atio.u.isp24.exchange_addr) {
		1313	cmd->state = QLA_TGT_STATE_ABORTED;
		1314	spin_unlock(&vha->cmd_list_lock);
		1315	return 1;
		1316	}
		1317	}
		1318
		1319	spin_unlock(&vha->cmd_list_lock);
		1320	return 0;
		1321	}
		1322
		1323	/* drop cmds for the given lun
		1324	* XXX only looks for cmds on the port through which lun reset was recieved
		1325	* XXX does not go through the list of other port (which may have cmds
		1326	* for the same lun)
		1327	*/
		1328	static void abort_cmds_for_lun(struct scsi_qla_host *vha,
		1329	uint32_t lun, uint8_t *s_id)
		1330	{
		1331	struct qla_tgt_sess_op *op;
		1332	struct qla_tgt_cmd *cmd;
		1333	uint32_t key;
		1334
		1335	key = sid_to_key(s_id);
		1336	spin_lock(&vha->cmd_list_lock);
		1337	list_for_each_entry(op, &vha->qla_sess_op_cmd_list, cmd_list) {
		1338	uint32_t op_key;
		1339	uint32_t op_lun;
		1340
		1341	op_key = sid_to_key(op->atio.u.isp24.fcp_hdr.s_id);
		1342	op_lun = scsilun_to_int(
		1343	(struct scsi_lun *)&op->atio.u.isp24.fcp_cmnd.lun);
		1344	if (op_key == key && op_lun == lun)
		1345	op->aborted = true;
		1346	}
		1347	list_for_each_entry(cmd, &vha->qla_cmd_list, cmd_list) {
		1348	uint32_t cmd_key;
		1349	uint32_t cmd_lun;
		1350
		1351	cmd_key = sid_to_key(cmd->atio.u.isp24.fcp_hdr.s_id);
		1352	cmd_lun = scsilun_to_int(
		1353	(struct scsi_lun *)&cmd->atio.u.isp24.fcp_cmnd.lun);
		1354	if (cmd_key == key && cmd_lun == lun)
		1355	cmd->state = QLA_TGT_STATE_ABORTED;
		1356	}
		1357	spin_unlock(&vha->cmd_list_lock);
		1358	}
		1359
1178	/* ha->hardware_lock supposed to be held on entry */	1360	/* ha->hardware_lock supposed to be held on entry */
1179	static int __qlt_24xx_handle_abts(struct scsi_qla_host *vha,	1361	static int __qlt_24xx_handle_abts(struct scsi_qla_host *vha,
1180	struct abts_recv_from_24xx abts, struct qla_tgt_sess sess)	1362	struct abts_recv_from_24xx abts, struct qla_tgt_sess sess)
@@ -1199,8 +1381,19 @@ static int __qlt_24xx_handle_abts(struct scsi_qla_host *vha, · 18 unmodified lines
1199	}	1381	}
1200	spin_unlock(&se_sess->sess_cmd_lock);	1382	spin_unlock(&se_sess->sess_cmd_lock);
1201		1383
1202	if (!found_lun)	1384	/* cmd not in LIO lists, look in qla list */
1203	return -ENOENT;	1385	if (!found_lun) {
		1386	if (abort_cmd_for_tag(vha, abts->exchange_addr_to_abort)) {
		1387	/* send TASK_ABORT response immediately */
		1388	qlt_24xx_send_abts_resp(vha, abts, FCP_TMF_CMPL, false);
		1389	return 0;
		1390	} else {
		1391	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf081,
		1392	"unable to find cmd in driver or LIO for tag 0x%x\n",
		1393	abts->exchange_addr_to_abort);
		1394	return -ENOENT;
		1395	}
		1396	}
1204		1397
1205	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf00f,	1398	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf00f,
1206	"qla_target(%d): task abort (tag=%d)\n",	1399	"qla_target(%d): task abort (tag=%d)\n",
@@ -1284,6 +1477,11 @@ static void qlt_24xx_handle_abts(struct scsi_qla_host *vha, · 77 unmodified lines
1284	return;	1477	return;
1285	}	1478	}
1286		1479
		1480	if (sess->deleted == QLA_SESS_DELETION_IN_PROGRESS) {
		1481	qlt_24xx_send_abts_resp(vha, abts, FCP_TMF_REJECTED, false);
		1482	return;
		1483	}
		1484
1287	rc = __qlt_24xx_handle_abts(vha, abts, sess);	1485	rc = __qlt_24xx_handle_abts(vha, abts, sess);
1288	if (rc != 0) {	1486	if (rc != 0) {
1289	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf054,	1487	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf054,
@@ -1726,20 +1924,6 @@ static int qlt_pre_xmit_response(struct qla_tgt_cmd *cmd, · 436 unmodified lines
1726	struct qla_hw_data *ha = vha->hw;	1924	struct qla_hw_data *ha = vha->hw;
1727	struct se_cmd *se_cmd = &cmd->se_cmd;	1925	struct se_cmd *se_cmd = &cmd->se_cmd;
1728		1926
1729	if (unlikely(cmd->aborted)) {
1730	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf014,
1731	"qla_target(%d): terminating exchange for aborted cmd=%p (se_cmd=%p, tag=%lld)",
1732	vha->vp_idx, cmd, se_cmd, se_cmd->tag);
1733
1734	cmd->state = QLA_TGT_STATE_ABORTED;
1735	cmd->cmd_flags \|= BIT_6;
1736
1737	qlt_send_term_exchange(vha, cmd, &cmd->atio, 0);
1738
1739	/* !! At this point cmd could be already freed !! */
1740	return QLA_TGT_PRE_XMIT_RESP_CMD_ABORTED;
1741	}
1742
1743	prm->cmd = cmd;	1927	prm->cmd = cmd;
1744	prm->tgt = tgt;	1928	prm->tgt = tgt;
1745	prm->rq_result = scsi_status;	1929	prm->rq_result = scsi_status;
@@ -2301,6 +2485,19 @@ int qlt_xmit_response(struct qla_tgt_cmd *cmd, int xmit_type, · 555 unmodified lines
2301	unsigned long flags = 0;	2485	unsigned long flags = 0;
2302	int res;	2486	int res;
2303		2487
		2488	spin_lock_irqsave(&ha->hardware_lock, flags);
		2489	if (cmd->sess && cmd->sess->deleted == QLA_SESS_DELETION_IN_PROGRESS) {
		2490	cmd->state = QLA_TGT_STATE_PROCESSED;
		2491	if (cmd->sess->logout_completed)
		2492	/* no need to terminate. FW already freed exchange. */
		2493	qlt_abort_cmd_on_host_reset(cmd->vha, cmd);
		2494	else
		2495	qlt_send_term_exchange(vha, cmd, &cmd->atio, 1);
		2496	spin_unlock_irqrestore(&ha->hardware_lock, flags);
		2497	return 0;
		2498	}
		2499	spin_unlock_irqrestore(&ha->hardware_lock, flags);
		2500
2304	memset(&prm, 0, sizeof(prm));	2501	memset(&prm, 0, sizeof(prm));
2305	qlt_check_srr_debug(cmd, &xmit_type);	2502	qlt_check_srr_debug(cmd, &xmit_type);
2306		2503
@@ -2313,9 +2510,6 @@ int qlt_xmit_response(struct qla_tgt_cmd *cmd, int xmit_type, · 6 unmodified lines
2313	res = qlt_pre_xmit_response(cmd, &prm, xmit_type, scsi_status,	2510	res = qlt_pre_xmit_response(cmd, &prm, xmit_type, scsi_status,
2314	&full_req_cnt);	2511	&full_req_cnt);
2315	if (unlikely(res != 0)) {	2512	if (unlikely(res != 0)) {
2316	if (res == QLA_TGT_PRE_XMIT_RESP_CMD_ABORTED)
2317	return 0;
2318
2319	return res;	2513	return res;
2320	}	2514	}
2321		2515
@@ -2345,9 +2539,10 @@ int qlt_xmit_response(struct qla_tgt_cmd *cmd, int xmit_type, · 23 unmodified lines
2345	res = qlt_build_ctio_crc2_pkt(&prm, vha);	2539	res = qlt_build_ctio_crc2_pkt(&prm, vha);
2346	else	2540	else
2347	res = qlt_24xx_build_ctio_pkt(&prm, vha);	2541	res = qlt_24xx_build_ctio_pkt(&prm, vha);
2348	if (unlikely(res != 0))	2542	if (unlikely(res != 0)) {
		2543	vha->req->cnt += full_req_cnt;
2349	goto out_unmap_unlock;	2544	goto out_unmap_unlock;
2350		2545	}
2351		2546
2352	pkt = (struct ctio7_to_24xx *)prm.pkt;	2547	pkt = (struct ctio7_to_24xx *)prm.pkt;
2353		2548
@@ -2461,7 +2656,8 @@ int qlt_rdy_to_xfer(struct qla_tgt_cmd *cmd) · 107 unmodified lines
2461		2656
2462	spin_lock_irqsave(&ha->hardware_lock, flags);	2657	spin_lock_irqsave(&ha->hardware_lock, flags);
2463		2658
2464	if (qla2x00_reset_active(vha) \|\| cmd->reset_count != ha->chip_reset) {	2659	if (qla2x00_reset_active(vha) \|\| (cmd->reset_count != ha->chip_reset) \|\|
		2660	(cmd->sess && cmd->sess->deleted == QLA_SESS_DELETION_IN_PROGRESS)) {
2465	/*	2661	/*
2466	* Either a chip reset is active or this request was from	2662	* Either a chip reset is active or this request was from
2467	* previous life, just abort the processing.	2663	* previous life, just abort the processing.
@@ -2485,8 +2681,11 @@ int qlt_rdy_to_xfer(struct qla_tgt_cmd *cmd) · 17 unmodified lines
2485	else	2681	else
2486	res = qlt_24xx_build_ctio_pkt(&prm, vha);	2682	res = qlt_24xx_build_ctio_pkt(&prm, vha);
2487		2683
2488	if (unlikely(res != 0))	2684	if (unlikely(res != 0)) {
		2685	vha->req->cnt += prm.req_cnt;
2489	goto out_unlock_free_unmap;	2686	goto out_unlock_free_unmap;
		2687	}
		2688
2490	pkt = (struct ctio7_to_24xx *)prm.pkt;	2689	pkt = (struct ctio7_to_24xx *)prm.pkt;
2491	pkt->u.status0.flags \|= __constant_cpu_to_le16(CTIO7_FLAGS_DATA_OUT \|	2690	pkt->u.status0.flags \|= __constant_cpu_to_le16(CTIO7_FLAGS_DATA_OUT \|
2492	CTIO7_FLAGS_STATUS_MODE_0);	2691	CTIO7_FLAGS_STATUS_MODE_0);
@@ -2649,6 +2848,89 @@ out: · 156 unmodified lines
2649	}	2848	}
2650		2849
2651		2850
		2851	/* If hardware_lock held on entry, might drop it, then reaquire */
		2852	/* This function sends the appropriate CTIO to ISP 2xxx or 24xx */
		2853	static int __qlt_send_term_imm_notif(struct scsi_qla_host *vha,
		2854	struct imm_ntfy_from_isp *ntfy)
		2855	{
		2856	struct nack_to_isp *nack;
		2857	struct qla_hw_data *ha = vha->hw;
		2858	request_t *pkt;
		2859	int ret = 0;
		2860
		2861	ql_dbg(ql_dbg_tgt_tmr, vha, 0xe01c,
		2862	"Sending TERM ELS CTIO (ha=%p)\n", ha);
		2863
		2864	pkt = (request_t *)qla2x00_alloc_iocbs_ready(vha, NULL);
		2865	if (pkt == NULL) {
		2866	ql_dbg(ql_dbg_tgt, vha, 0xe080,
		2867	"qla_target(%d): %s failed: unable to allocate "
		2868	"request packet\n", vha->vp_idx, __func__);
		2869	return -ENOMEM;
		2870	}
		2871
		2872	pkt->entry_type = NOTIFY_ACK_TYPE;
		2873	pkt->entry_count = 1;
		2874	pkt->handle = QLA_TGT_SKIP_HANDLE \| CTIO_COMPLETION_HANDLE_MARK;
		2875
		2876	nack = (struct nack_to_isp *)pkt;
		2877	nack->ox_id = ntfy->ox_id;
		2878
		2879	nack->u.isp24.nport_handle = ntfy->u.isp24.nport_handle;
		2880	if (le16_to_cpu(ntfy->u.isp24.status) == IMM_NTFY_ELS) {
		2881	nack->u.isp24.flags = ntfy->u.isp24.flags &
		2882	__constant_cpu_to_le32(NOTIFY24XX_FLAGS_PUREX_IOCB);
		2883	}
		2884
		2885	/* terminate */
		2886	nack->u.isp24.flags \|=
		2887	__constant_cpu_to_le16(NOTIFY_ACK_FLAGS_TERMINATE);
		2888
		2889	nack->u.isp24.srr_rx_id = ntfy->u.isp24.srr_rx_id;
		2890	nack->u.isp24.status = ntfy->u.isp24.status;
		2891	nack->u.isp24.status_subcode = ntfy->u.isp24.status_subcode;
		2892	nack->u.isp24.fw_handle = ntfy->u.isp24.fw_handle;
		2893	nack->u.isp24.exchange_address = ntfy->u.isp24.exchange_address;
		2894	nack->u.isp24.srr_rel_offs = ntfy->u.isp24.srr_rel_offs;
		2895	nack->u.isp24.srr_ui = ntfy->u.isp24.srr_ui;
		2896	nack->u.isp24.vp_index = ntfy->u.isp24.vp_index;
		2897
		2898	qla2x00_start_iocbs(vha, vha->req);
		2899	return ret;
		2900	}
		2901
		2902	static void qlt_send_term_imm_notif(struct scsi_qla_host *vha,
		2903	struct imm_ntfy_from_isp *imm, int ha_locked)
		2904	{
		2905	unsigned long flags = 0;
		2906	int rc;
		2907
		2908	if (qlt_issue_marker(vha, ha_locked) < 0)
		2909	return;
		2910
		2911	if (ha_locked) {
		2912	rc = __qlt_send_term_imm_notif(vha, imm);
		2913
		2914	#if 0 /* Todo */
		2915	if (rc == -ENOMEM)
		2916	qlt_alloc_qfull_cmd(vha, imm, 0, 0);
		2917	#endif
		2918	goto done;
		2919	}
		2920
		2921	spin_lock_irqsave(&vha->hw->hardware_lock, flags);
		2922	rc = __qlt_send_term_imm_notif(vha, imm);
		2923
		2924	#if 0 /* Todo */
		2925	if (rc == -ENOMEM)
		2926	qlt_alloc_qfull_cmd(vha, imm, 0, 0);
		2927	#endif
		2928
		2929	done:
		2930	if (!ha_locked)
		2931	spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
		2932	}
		2933
2652	/* If hardware_lock held on entry, might drop it, then reaquire */	2934	/* If hardware_lock held on entry, might drop it, then reaquire */
2653	/* This function sends the appropriate CTIO to ISP 2xxx or 24xx */	2935	/* This function sends the appropriate CTIO to ISP 2xxx or 24xx */
2654	static int __qlt_send_term_exchange(struct scsi_qla_host *vha,	2936	static int __qlt_send_term_exchange(struct scsi_qla_host *vha,
@@ -2715,7 +2997,7 @@ static int __qlt_send_term_exchange(struct scsi_qla_host *vha, · 60 unmodified lines
2715	static void qlt_send_term_exchange(struct scsi_qla_host *vha,	2997	static void qlt_send_term_exchange(struct scsi_qla_host *vha,
2716	struct qla_tgt_cmd cmd, struct atio_from_isp atio, int ha_locked)	2998	struct qla_tgt_cmd cmd, struct atio_from_isp atio, int ha_locked)
2717	{	2999	{
2718	unsigned long flags;	3000	unsigned long flags = 0;
2719	int rc;	3001	int rc;
2720		3002
2721	if (qlt_issue_marker(vha, ha_locked) < 0)	3003	if (qlt_issue_marker(vha, ha_locked) < 0)
@@ -2731,17 +3013,18 @@ static void qlt_send_term_exchange(struct scsi_qla_host *vha, · 9 unmodified lines
2731	rc = __qlt_send_term_exchange(vha, cmd, atio);	3013	rc = __qlt_send_term_exchange(vha, cmd, atio);
2732	if (rc == -ENOMEM)	3014	if (rc == -ENOMEM)
2733	qlt_alloc_qfull_cmd(vha, atio, 0, 0);	3015	qlt_alloc_qfull_cmd(vha, atio, 0, 0);
2734	spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
2735		3016
2736	done:	3017	done:
2737	if (cmd && ((cmd->state != QLA_TGT_STATE_ABORTED) \|\|	3018	if (cmd && ((cmd->state != QLA_TGT_STATE_ABORTED) \|\|
2738	!cmd->cmd_sent_to_fw)) {	3019	!cmd->cmd_sent_to_fw)) {
2739	if (!ha_locked && !in_interrupt())	3020	if (cmd->sg_mapped)
2740	msleep(250); /* just in case */	3021	qlt_unmap_sg(vha, cmd);
2741
2742	qlt_unmap_sg(vha, cmd);
2743	vha->hw->tgt.tgt_ops->free_cmd(cmd);	3022	vha->hw->tgt.tgt_ops->free_cmd(cmd);
2744	}	3023	}
		3024
		3025	if (!ha_locked)
		3026	spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
		3027
2745	return;	3028	return;
2746	}	3029	}
2747		3030
@@ -2792,6 +3075,24 @@ static void qlt_chk_exch_leak_thresh_hold(struct scsi_qla_host *vha) · 44 unmodified lines
2792		3075
2793	}	3076	}
2794		3077
		3078	void qlt_abort_cmd(struct qla_tgt_cmd *cmd)
		3079	{
		3080	struct qla_tgt *tgt = cmd->tgt;
		3081	struct scsi_qla_host *vha = tgt->vha;
		3082	struct se_cmd *se_cmd = &cmd->se_cmd;
		3083
		3084	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf014,
		3085	"qla_target(%d): terminating exchange for aborted cmd=%p "
		3086	"(se_cmd=%p, tag=%llu)", vha->vp_idx, cmd, &cmd->se_cmd,
		3087	se_cmd->tag);
		3088
		3089	cmd->state = QLA_TGT_STATE_ABORTED;
		3090	cmd->cmd_flags \|= BIT_6;
		3091
		3092	qlt_send_term_exchange(vha, cmd, &cmd->atio, 0);
		3093	}
		3094	EXPORT_SYMBOL(qlt_abort_cmd);
		3095
2795	void qlt_free_cmd(struct qla_tgt_cmd *cmd)	3096	void qlt_free_cmd(struct qla_tgt_cmd *cmd)
2796	{	3097	{
2797	struct qla_tgt_sess *sess = cmd->sess;	3098	struct qla_tgt_sess *sess = cmd->sess;
@@ -3015,7 +3316,7 @@ qlt_abort_cmd_on_host_reset(struct scsi_qla_host vha, struct qla_tgt_cmd cmd) · 217 unmodified lines
3015	dump_stack();	3316	dump_stack();
3016	}	3317	}
3017		3318
3018	cmd->cmd_flags \|= BIT_12;	3319	cmd->cmd_flags \|= BIT_17;
3019	ha->tgt.tgt_ops->free_cmd(cmd);	3320	ha->tgt.tgt_ops->free_cmd(cmd);
3020	}	3321	}
3021		3322
@@ -3177,7 +3478,7 @@ static void qlt_do_ctio_completion(struct scsi_qla_host *vha, uint32_t handle, · 155 unmodified lines
3177	skip_term:	3478	skip_term:
3178		3479
3179	if (cmd->state == QLA_TGT_STATE_PROCESSED) {	3480	if (cmd->state == QLA_TGT_STATE_PROCESSED) {
3180	;	3481	cmd->cmd_flags \|= BIT_12;
3181	} else if (cmd->state == QLA_TGT_STATE_NEED_DATA) {	3482	} else if (cmd->state == QLA_TGT_STATE_NEED_DATA) {
3182	int rx_status = 0;	3483	int rx_status = 0;
3183		3484
@@ -3191,9 +3492,11 @@ skip_term: · 7 unmodified lines
3191	ha->tgt.tgt_ops->handle_data(cmd);	3492	ha->tgt.tgt_ops->handle_data(cmd);
3192	return;	3493	return;
3193	} else if (cmd->state == QLA_TGT_STATE_ABORTED) {	3494	} else if (cmd->state == QLA_TGT_STATE_ABORTED) {
		3495	cmd->cmd_flags \|= BIT_18;
3194	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01e,	3496	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf01e,
3195	"Aborted command %p (tag %lld) finished\n", cmd, se_cmd->tag);	3497	"Aborted command %p (tag %lld) finished\n", cmd, se_cmd->tag);
3196	} else {	3498	} else {
		3499	cmd->cmd_flags \|= BIT_19;
3197	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf05c,	3500	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf05c,
3198	"qla_target(%d): A command in state (%d) should "	3501	"qla_target(%d): A command in state (%d) should "
3199	"not return a CTIO complete\n", vha->vp_idx, cmd->state);	3502	"not return a CTIO complete\n", vha->vp_idx, cmd->state);
@@ -3205,7 +3508,6 @@ skip_term: · 5 unmodified lines
3205	dump_stack();	3508	dump_stack();
3206	}	3509	}
3207		3510
3208
3209	ha->tgt.tgt_ops->free_cmd(cmd);	3511	ha->tgt.tgt_ops->free_cmd(cmd);
3210	}	3512	}
3211		3513
@@ -3263,6 +3565,13 @@ static void __qlt_do_work(struct qla_tgt_cmd *cmd) · 51 unmodified lines
3263	if (tgt->tgt_stop)	3565	if (tgt->tgt_stop)
3264	goto out_term;	3566	goto out_term;
3265		3567
		3568	if (cmd->state == QLA_TGT_STATE_ABORTED) {
		3569	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf082,
		3570	"cmd with tag %u is aborted\n",
		3571	cmd->atio.u.isp24.exchange_addr);
		3572	goto out_term;
		3573	}
		3574
3266	cdb = &atio->u.isp24.fcp_cmnd.cdb[0];	3575	cdb = &atio->u.isp24.fcp_cmnd.cdb[0];
3267	cmd->se_cmd.tag = atio->u.isp24.exchange_addr;	3576	cmd->se_cmd.tag = atio->u.isp24.exchange_addr;
3268	cmd->unpacked_lun = scsilun_to_int(	3577	cmd->unpacked_lun = scsilun_to_int(
@@ -3316,6 +3625,12 @@ out_term: · 47 unmodified lines
3316	static void qlt_do_work(struct work_struct *work)	3625	static void qlt_do_work(struct work_struct *work)
3317	{	3626	{
3318	struct qla_tgt_cmd *cmd = container_of(work, struct qla_tgt_cmd, work);	3627	struct qla_tgt_cmd *cmd = container_of(work, struct qla_tgt_cmd, work);
		3628	scsi_qla_host_t *vha = cmd->vha;
		3629	unsigned long flags;
		3630
		3631	spin_lock_irqsave(&vha->cmd_list_lock, flags);
		3632	list_del(&cmd->cmd_list);
		3633	spin_unlock_irqrestore(&vha->cmd_list_lock, flags);
3319		3634
3320	__qlt_do_work(cmd);	3635	__qlt_do_work(cmd);
3321	}	3636	}
@@ -3345,6 +3660,11 @@ static struct qla_tgt_cmd qlt_get_tag(scsi_qla_host_t vha, · 23 unmodified lines
3345	cmd->loop_id = sess->loop_id;	3660	cmd->loop_id = sess->loop_id;
3346	cmd->conf_compl_supported = sess->conf_compl_supported;	3661	cmd->conf_compl_supported = sess->conf_compl_supported;
3347		3662
		3663	cmd->cmd_flags = 0;
		3664	cmd->jiffies_at_alloc = get_jiffies_64();
		3665
		3666	cmd->reset_count = vha->hw->chip_reset;
		3667
3348	return cmd;	3668	return cmd;
3349	}	3669	}
3350		3670
@@ -3362,14 +3682,25 @@ static void qlt_create_sess_from_atio(struct work_struct *work) · 11 unmodified lines
3362	unsigned long flags;	3682	unsigned long flags;
3363	uint8_t *s_id = op->atio.u.isp24.fcp_hdr.s_id;	3683	uint8_t *s_id = op->atio.u.isp24.fcp_hdr.s_id;
3364		3684
		3685	spin_lock_irqsave(&vha->cmd_list_lock, flags);
		3686	list_del(&op->cmd_list);
		3687	spin_unlock_irqrestore(&vha->cmd_list_lock, flags);
		3688
		3689	if (op->aborted) {
		3690	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf083,
		3691	"sess_op with tag %u is aborted\n",
		3692	op->atio.u.isp24.exchange_addr);
		3693	goto out_term;
		3694	}
		3695
3365	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf022,	3696	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf022,
3366	"qla_target(%d): Unable to find wwn login"	3697	"qla_target(%d): Unable to find wwn login"
3367	" (s_id %x:%x:%x), trying to create it manually\n",	3698	" (s_id %x:%x:%x), trying to create it manually\n",
3368	vha->vp_idx, s_id[0], s_id[1], s_id[2]);	3699	vha->vp_idx, s_id[0], s_id[1], s_id[2]);
3369		3700
3370	if (op->atio.u.raw.entry_count > 1) {	3701	if (op->atio.u.raw.entry_count > 1) {
3371	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf023,	3702	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf023,
3372	"Dropping multy entry atio %p\n", &op->atio);	3703	"Dropping multy entry atio %p\n", &op->atio);
3373	goto out_term;	3704	goto out_term;
3374	}	3705	}
3375		3706
@@ -3434,10 +3765,25 @@ static int qlt_handle_cmd_for_atio(struct scsi_qla_host *vha, · 58 unmodified lines
3434		3765
3435	memcpy(&op->atio, atio, sizeof(*atio));	3766	memcpy(&op->atio, atio, sizeof(*atio));
3436	op->vha = vha;	3767	op->vha = vha;
		3768
		3769	spin_lock(&vha->cmd_list_lock);
		3770	list_add_tail(&op->cmd_list, &vha->qla_sess_op_cmd_list);
		3771	spin_unlock(&vha->cmd_list_lock);
		3772
3437	INIT_WORK(&op->work, qlt_create_sess_from_atio);	3773	INIT_WORK(&op->work, qlt_create_sess_from_atio);
3438	queue_work(qla_tgt_wq, &op->work);	3774	queue_work(qla_tgt_wq, &op->work);
3439	return 0;	3775	return 0;
3440	}	3776	}
		3777
		3778	/* Another WWN used to have our s_id. Our PLOGI scheduled its
		3779	* session deletion, but it's still in sess_del_work wq */
		3780	if (sess->deleted == QLA_SESS_DELETION_IN_PROGRESS) {
		3781	ql_dbg(ql_dbg_io, vha, 0x3061,
		3782	"New command while old session %p is being deleted\n",
		3783	sess);
		3784	return -EFAULT;
		3785	}
		3786
3441	/*	3787	/*
3442	* Do kref_get() before returning + dropping qla_hw_data->hardware_lock.	3788	* Do kref_get() before returning + dropping qla_hw_data->hardware_lock.
3443	*/	3789	*/
@@ -3451,13 +3797,13 @@ static int qlt_handle_cmd_for_atio(struct scsi_qla_host *vha, · 7 unmodified lines
3451	return -ENOMEM;	3797	return -ENOMEM;
3452	}	3798	}
3453		3799
3454	cmd->cmd_flags = 0;
3455	cmd->jiffies_at_alloc = get_jiffies_64();
3456
3457	cmd->reset_count = vha->hw->chip_reset;
3458
3459	cmd->cmd_in_wq = 1;	3800	cmd->cmd_in_wq = 1;
3460	cmd->cmd_flags \|= BIT_0;	3801	cmd->cmd_flags \|= BIT_0;
		3802
		3803	spin_lock(&vha->cmd_list_lock);
		3804	list_add_tail(&cmd->cmd_list, &vha->qla_cmd_list);
		3805	spin_unlock(&vha->cmd_list_lock);
		3806
3461	INIT_WORK(&cmd->work, qlt_do_work);	3807	INIT_WORK(&cmd->work, qlt_do_work);
3462	queue_work(qla_tgt_wq, &cmd->work);	3808	queue_work(qla_tgt_wq, &cmd->work);
3463	return 0;	3809	return 0;
@@ -3471,6 +3817,7 @@ static int qlt_issue_task_mgmt(struct qla_tgt_sess *sess, uint32_t lun, · 7 unmodified lines
3471	struct scsi_qla_host *vha = sess->vha;	3817	struct scsi_qla_host *vha = sess->vha;
3472	struct qla_hw_data *ha = vha->hw;	3818	struct qla_hw_data *ha = vha->hw;
3473	struct qla_tgt_mgmt_cmd *mcmd;	3819	struct qla_tgt_mgmt_cmd *mcmd;
		3820	struct atio_from_isp a = (struct atio_from_isp )iocb;
3474	int res;	3821	int res;
3475	uint8_t tmr_func;	3822	uint8_t tmr_func;
3476		3823
@@ -3511,6 +3858,7 @@ static int qlt_issue_task_mgmt(struct qla_tgt_sess *sess, uint32_t lun, · 34 unmodified lines
3511	ql_dbg(ql_dbg_tgt_tmr, vha, 0x10002,	3858	ql_dbg(ql_dbg_tgt_tmr, vha, 0x10002,
3512	"qla_target(%d): LUN_RESET received\n", sess->vha->vp_idx);	3859	"qla_target(%d): LUN_RESET received\n", sess->vha->vp_idx);
3513	tmr_func = TMR_LUN_RESET;	3860	tmr_func = TMR_LUN_RESET;
		3861	abort_cmds_for_lun(vha, lun, a->u.isp24.fcp_hdr.s_id);
3514	break;	3862	break;
3515		3863
3516	case QLA_TGT_CLEAR_TS:	3864	case QLA_TGT_CLEAR_TS:
@@ -3599,6 +3947,9 @@ static int qlt_handle_task_mgmt(struct scsi_qla_host vha, void iocb) · 82 unmodified lines
3599	sizeof(struct atio_from_isp));	3947	sizeof(struct atio_from_isp));
3600	}	3948	}
3601		3949
		3950	if (sess->deleted == QLA_SESS_DELETION_IN_PROGRESS)
		3951	return -EFAULT;
		3952
3602	return qlt_issue_task_mgmt(sess, unpacked_lun, fn, iocb, 0);	3953	return qlt_issue_task_mgmt(sess, unpacked_lun, fn, iocb, 0);
3603	}	3954	}
3604		3955
@@ -3664,22 +4015,280 @@ static int qlt_abort_task(struct scsi_qla_host *vha, · 59 unmodified lines
3664	return __qlt_abort_task(vha, iocb, sess);	4015	return __qlt_abort_task(vha, iocb, sess);
3665	}	4016	}
3666		4017
		4018	void qlt_logo_completion_handler(fc_port_t *fcport, int rc)
		4019	{
		4020	if (fcport->tgt_session) {
		4021	if (rc != MBS_COMMAND_COMPLETE) {
		4022	ql_dbg(ql_dbg_tgt_mgt, fcport->vha, 0xf093,
		4023	"%s: se_sess %p / sess %p from"
		4024	" port %8phC loop_id %#04x s_id %02x:%02x:%02x"
		4025	" LOGO failed: %#x\n",
		4026	__func__,
		4027	fcport->tgt_session->se_sess,
		4028	fcport->tgt_session,
		4029	fcport->port_name, fcport->loop_id,
		4030	fcport->d_id.b.domain, fcport->d_id.b.area,
		4031	fcport->d_id.b.al_pa, rc);
		4032	}
		4033
		4034	fcport->tgt_session->logout_completed = 1;
		4035	}
		4036	}
		4037
		4038	static void qlt_swap_imm_ntfy_iocb(struct imm_ntfy_from_isp *a,
		4039	struct imm_ntfy_from_isp *b)
		4040	{
		4041	struct imm_ntfy_from_isp tmp;
		4042	memcpy(&tmp, a, sizeof(struct imm_ntfy_from_isp));
		4043	memcpy(a, b, sizeof(struct imm_ntfy_from_isp));
		4044	memcpy(b, &tmp, sizeof(struct imm_ntfy_from_isp));
		4045	}
		4046
		4047	/*
		4048	* ha->hardware_lock supposed to be held on entry (to protect tgt->sess_list)
		4049	*
		4050	* Schedules sessions with matching port_id/loop_id but different wwn for
		4051	* deletion. Returns existing session with matching wwn if present.
		4052	* Null otherwise.
		4053	*/
		4054	static struct qla_tgt_sess *
		4055	qlt_find_sess_invalidate_other(struct qla_tgt *tgt, uint64_t wwn,
		4056	port_id_t port_id, uint16_t loop_id)
		4057	{
		4058	struct qla_tgt_sess sess = NULL, other_sess;
		4059	uint64_t other_wwn;
		4060
		4061	list_for_each_entry(other_sess, &tgt->sess_list, sess_list_entry) {
		4062
		4063	other_wwn = wwn_to_u64(other_sess->port_name);
		4064
		4065	if (wwn == other_wwn) {
		4066	WARN_ON(sess);
		4067	sess = other_sess;
		4068	continue;
		4069	}
		4070
		4071	/* find other sess with nport_id collision */
		4072	if (port_id.b24 == other_sess->s_id.b24) {
		4073	if (loop_id != other_sess->loop_id) {
		4074	ql_dbg(ql_dbg_tgt_tmr, tgt->vha, 0x1000c,
		4075	"Invalidating sess %p loop_id %d wwn %llx.\n",
		4076	other_sess, other_sess->loop_id, other_wwn);
		4077
		4078	/*
		4079	* logout_on_delete is set by default, but another
		4080	* session that has the same s_id/loop_id combo
		4081	* might have cleared it when requested this session
		4082	* deletion, so don't touch it
		4083	*/
		4084	qlt_schedule_sess_for_deletion(other_sess, true);
		4085	} else {
		4086	/*
		4087	* Another wwn used to have our s_id/loop_id
		4088	* combo - kill the session, but don't log out
		4089	*/
		4090	sess->logout_on_delete = 0;
		4091	qlt_schedule_sess_for_deletion(other_sess,
		4092	true);
		4093	}
		4094	continue;
		4095	}
		4096
		4097	/* find other sess with nport handle collision */
		4098	if (loop_id == other_sess->loop_id) {
		4099	ql_dbg(ql_dbg_tgt_tmr, tgt->vha, 0x1000d,
		4100	"Invalidating sess %p loop_id %d wwn %llx.\n",
		4101	other_sess, other_sess->loop_id, other_wwn);
		4102
		4103	/* Same loop_id but different s_id
		4104	* Ok to kill and logout */
		4105	qlt_schedule_sess_for_deletion(other_sess, true);
		4106	}
		4107	}
		4108
		4109	return sess;
		4110	}
		4111
		4112	/* Abort any commands for this s_id waiting on qla_tgt_wq workqueue */
		4113	static int abort_cmds_for_s_id(struct scsi_qla_host vha, port_id_t s_id)
		4114	{
		4115	struct qla_tgt_sess_op *op;
		4116	struct qla_tgt_cmd *cmd;
		4117	uint32_t key;
		4118	int count = 0;
		4119
		4120	key = (((u32)s_id->b.domain << 16) \|
		4121	((u32)s_id->b.area << 8) \|
		4122	((u32)s_id->b.al_pa));
		4123
		4124	spin_lock(&vha->cmd_list_lock);
		4125	list_for_each_entry(op, &vha->qla_sess_op_cmd_list, cmd_list) {
		4126	uint32_t op_key = sid_to_key(op->atio.u.isp24.fcp_hdr.s_id);
		4127	if (op_key == key) {
		4128	op->aborted = true;
		4129	count++;
		4130	}
		4131	}
		4132	list_for_each_entry(cmd, &vha->qla_cmd_list, cmd_list) {
		4133	uint32_t cmd_key = sid_to_key(cmd->atio.u.isp24.fcp_hdr.s_id);
		4134	if (cmd_key == key) {
		4135	cmd->state = QLA_TGT_STATE_ABORTED;
		4136	count++;
		4137	}
		4138	}
		4139	spin_unlock(&vha->cmd_list_lock);
		4140
		4141	return count;
		4142	}
		4143
3667	/*	4144	/*
3668	* ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire	4145	* ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire
3669	*/	4146	*/
3670	static int qlt_24xx_handle_els(struct scsi_qla_host *vha,	4147	static int qlt_24xx_handle_els(struct scsi_qla_host *vha,
3671	struct imm_ntfy_from_isp *iocb)	4148	struct imm_ntfy_from_isp *iocb)
3672	{	4149	{
		4150	struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
		4151	struct qla_hw_data *ha = vha->hw;
		4152	struct qla_tgt_sess *sess = NULL;
		4153	uint64_t wwn;
		4154	port_id_t port_id;
		4155	uint16_t loop_id;
		4156	uint16_t wd3_lo;
3673	int res = 0;	4157	int res = 0;
3674		4158
		4159	wwn = wwn_to_u64(iocb->u.isp24.port_name);
		4160
		4161	port_id.b.domain = iocb->u.isp24.port_id[2];
		4162	port_id.b.area = iocb->u.isp24.port_id[1];
		4163	port_id.b.al_pa = iocb->u.isp24.port_id[0];
		4164	port_id.b.rsvd_1 = 0;
		4165
		4166	loop_id = le16_to_cpu(iocb->u.isp24.nport_handle);
		4167
3675	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf026,	4168	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf026,
3676	"qla_target(%d): Port ID: 0x%3phC ELS opcode: 0x%02x\n",	4169	"qla_target(%d): Port ID: 0x%3phC ELS opcode: 0x%02x\n",
3677	vha->vp_idx, iocb->u.isp24.port_id, iocb->u.isp24.status_subcode);	4170	vha->vp_idx, iocb->u.isp24.port_id, iocb->u.isp24.status_subcode);
3678		4171
		4172	/* res = 1 means ack at the end of thread
		4173	* res = 0 means ack async/later.
		4174	*/
3679	switch (iocb->u.isp24.status_subcode) {	4175	switch (iocb->u.isp24.status_subcode) {
3680	case ELS_PLOGI:	4176	case ELS_PLOGI:
3681	case ELS_FLOGI:	4177
		4178	/* Mark all stale commands in qla_tgt_wq for deletion */
		4179	abort_cmds_for_s_id(vha, &port_id);
		4180
		4181	if (wwn)
		4182	sess = qlt_find_sess_invalidate_other(tgt, wwn,
		4183	port_id, loop_id);
		4184
		4185	if (!sess \|\| IS_SW_RESV_ADDR(sess->s_id)) {
		4186	res = 1;
		4187	break;
		4188	}
		4189
		4190	if (sess->plogi_ack_needed) {
		4191	/*
		4192	* Initiator sent another PLOGI before last PLOGI could
		4193	* finish. Swap plogi iocbs and terminate old one
		4194	* without acking, new one will get acked when session
		4195	* deletion completes.
		4196	*/
		4197	ql_log(ql_log_warn, sess->vha, 0xf094,
		4198	"sess %p received double plogi.\n", sess);
		4199
		4200	qlt_swap_imm_ntfy_iocb(iocb, &sess->tm_iocb);
		4201
		4202	qlt_send_term_imm_notif(vha, iocb, 1);
		4203
		4204	res = 0;
		4205	break;
		4206	}
		4207
		4208	res = 0;
		4209
		4210	/*
		4211	* Save immediate Notif IOCB for Ack when sess is done
		4212	* and being deleted.
		4213	*/
		4214	memcpy(&sess->tm_iocb, iocb, sizeof(sess->tm_iocb));
		4215	sess->plogi_ack_needed = 1;
		4216
		4217	/*
		4218	* Under normal circumstances we want to release nport handle
		4219	* during LOGO process to avoid nport handle leaks inside FW.
		4220	* The exception is when LOGO is done while another PLOGI with
		4221	* the same nport handle is waiting as might be the case here.
		4222	* Note: there is always a possibily of a race where session
		4223	* deletion has already started for other reasons (e.g. ACL
		4224	* removal) and now PLOGI arrives:
		4225	* 1. if PLOGI arrived in FW after nport handle has been freed,
		4226	* FW must have assigned this PLOGI a new/same handle and we
		4227	* can proceed ACK'ing it as usual when session deletion
		4228	* completes.
		4229	* 2. if PLOGI arrived in FW before LOGO with LCF_FREE_NPORT
		4230	* bit reached it, the handle has now been released. We'll
		4231	* get an error when we ACK this PLOGI. Nothing will be sent
		4232	* back to initiator. Initiator should eventually retry
		4233	* PLOGI and situation will correct itself.
		4234	*/
		4235	sess->keep_nport_handle = ((sess->loop_id == loop_id) &&
		4236	(sess->s_id.b24 == port_id.b24));
		4237	qlt_schedule_sess_for_deletion(sess, true);
		4238	break;
		4239
3682	case ELS_PRLI:	4240	case ELS_PRLI:
		4241	wd3_lo = le16_to_cpu(iocb->u.isp24.u.prli.wd3_lo);
		4242
		4243	if (wwn)
		4244	sess = qlt_find_sess_invalidate_other(tgt, wwn, port_id,
		4245	loop_id);
		4246
		4247	if (sess != NULL) {
		4248	if (sess->deleted) {
		4249	/*
		4250	* Impatient initiator sent PRLI before last
		4251	* PLOGI could finish. Will force him to re-try,
		4252	* while last one finishes.
		4253	*/
		4254	ql_log(ql_log_warn, sess->vha, 0xf095,
		4255	"sess %p PRLI received, before plogi ack.\n",
		4256	sess);
		4257	qlt_send_term_imm_notif(vha, iocb, 1);
		4258	res = 0;
		4259	break;
		4260	}
		4261
		4262	/*
		4263	* This shouldn't happen under normal circumstances,
		4264	* since we have deleted the old session during PLOGI
		4265	*/
		4266	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf096,
		4267	"PRLI (loop_id %#04x) for existing sess %p (loop_id %#04x)\n",
		4268	sess->loop_id, sess, iocb->u.isp24.nport_handle);
		4269
		4270	sess->local = 0;
		4271	sess->loop_id = loop_id;
		4272	sess->s_id = port_id;
		4273
		4274	if (wd3_lo & BIT_7)
		4275	sess->conf_compl_supported = 1;
		4276
		4277	}
		4278	res = 1; /* send notify ack */
		4279
		4280	/* Make session global (not used in fabric mode) */
		4281	if (ha->current_topology != ISP_CFG_F) {
		4282	set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
		4283	set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
		4284	qla2xxx_wake_dpc(vha);
		4285	} else {
		4286	/* todo: else - create sess here. */
		4287	res = 1; /* send notify ack */
		4288	}
		4289
		4290	break;
		4291
3683	case ELS_LOGO:	4292	case ELS_LOGO:
3684	case ELS_PRLO:	4293	case ELS_PRLO:
3685	res = qlt_reset(vha, iocb, QLA_TGT_NEXUS_LOSS_SESS);	4294	res = qlt_reset(vha, iocb, QLA_TGT_NEXUS_LOSS_SESS);
@@ -3697,6 +4306,7 @@ static int qlt_24xx_handle_els(struct scsi_qla_host *vha, · 11 unmodified lines
3697	break;	4306	break;
3698	}	4307	}
3699		4308
		4309	case ELS_FLOGI: /* should never happen */
3700	default:	4310	default:
3701	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf061,	4311	ql_dbg(ql_dbg_tgt_mgt, vha, 0xf061,
3702	"qla_target(%d): Unsupported ELS command %x "	4312	"qla_target(%d): Unsupported ELS command %x "
@@ -5012,6 +5622,11 @@ static void qlt_abort_work(struct qla_tgt *tgt, · 1309 unmodified lines
5012	if (!sess)	5622	if (!sess)
5013	goto out_term;	5623	goto out_term;
5014	} else {	5624	} else {
		5625	if (sess->deleted == QLA_SESS_DELETION_IN_PROGRESS) {
		5626	sess = NULL;
		5627	goto out_term;
		5628	}
		5629
5015	kref_get(&sess->se_sess->sess_kref);	5630	kref_get(&sess->se_sess->sess_kref);
5016	}	5631	}
5017		5632
@@ -5066,6 +5681,11 @@ static void qlt_tmr_work(struct qla_tgt *tgt, · 48 unmodified lines
5066	if (!sess)	5681	if (!sess)
5067	goto out_term;	5682	goto out_term;
5068	} else {	5683	} else {
		5684	if (sess->deleted == QLA_SESS_DELETION_IN_PROGRESS) {
		5685	sess = NULL;
		5686	goto out_term;
		5687	}
		5688
5069	kref_get(&sess->se_sess->sess_kref);	5689	kref_get(&sess->se_sess->sess_kref);
5070	}	5690	}
5071		5691
@@ -5552,6 +6172,7 @@ qlt_24xx_process_atio_queue(struct scsi_qla_host *vha) · 480 unmodified lines
5552		6172
5553	/* Adjust ring index */	6173	/* Adjust ring index */
5554	WRT_REG_DWORD(ISP_ATIO_Q_OUT(vha), ha->tgt.atio_ring_index);	6174	WRT_REG_DWORD(ISP_ATIO_Q_OUT(vha), ha->tgt.atio_ring_index);
		6175	RD_REG_DWORD_RELAXED(ISP_ATIO_Q_OUT(vha));
5555	}	6176	}
5556		6177
5557	void	6178	void
@@ -5793,7 +6414,7 @@ qlt_probe_one_stage1(struct scsi_qla_host base_vha, struct qla_hw_data ha) · 235 unmodified lines
5793	if (!QLA_TGT_MODE_ENABLED())	6414	if (!QLA_TGT_MODE_ENABLED())
5794	return;	6415	return;
5795		6416
5796	if (ha->mqenable \|\| IS_QLA83XX(ha)) {	6417	if (ha->mqenable \|\| IS_QLA83XX(ha) \|\| IS_QLA27XX(ha)) {
5797	ISP_ATIO_Q_IN(base_vha) = &ha->mqiobase->isp25mq.atio_q_in;	6418	ISP_ATIO_Q_IN(base_vha) = &ha->mqiobase->isp25mq.atio_q_in;
5798	ISP_ATIO_Q_OUT(base_vha) = &ha->mqiobase->isp25mq.atio_q_out;	6419	ISP_ATIO_Q_OUT(base_vha) = &ha->mqiobase->isp25mq.atio_q_out;
5799	} else {	6420	} else {

drivers/scsi/qla2xxx/qla_target.h+61−11

 			uint32_t srr_rel_offs;
 			uint16_t srr_ui;
 			uint16_t srr_ox_id;
-			uint8_t  reserved_4[19];
+			union {
+				struct {
+					uint8_t node_name[8];
+				} plogi; /* PLOGI/ADISC/PDISC */
+				struct {
+					/* PRLI word 3 bit 0-15 */
+					uint16_t wd3_lo;
+					uint8_t resv0[6];
+				} prli;
+				struct {
+					uint8_t port_id[3];
+					uint8_t resv1;
+					uint16_t nport_handle;
+					uint16_t resv2;
+				} req_els;
+			} u;
+			uint8_t port_name[8];
+			uint8_t resv3[3];
 			uint8_t  vp_index;
 			uint32_t reserved_5;
 			uint8_t  port_id[3];
 	uint8_t  reserved[2];
 	uint16_t ox_id;
 } __packed;
+#define NOTIFY_ACK_FLAGS_TERMINATE	BIT_3
 #define NOTIFY_ACK_SRR_FLAGS_ACCEPT	0
 #define NOTIFY_ACK_SRR_FLAGS_REJECT	1
 #define	FC_TM_REJECT                4
 #define FC_TM_FAILED                5
-/*
- * Error code of qlt_pre_xmit_response() meaning that cmd's exchange was
- * terminated, so no more actions is needed and success should be returned
- * to target.
- */
-#define QLA_TGT_PRE_XMIT_RESP_CMD_ABORTED	0x1717
 #if (BITS_PER_LONG > 32) || defined(CONFIG_HIGHMEM64G)
 #define pci_dma_lo32(a) (a & 0xffffffff)
 #define pci_dma_hi32(a) ((((a) >> 16)>>16) & 0xffffffff)
 	struct scsi_qla_host *vha;
 	struct atio_from_isp atio;
 	struct work_struct work;
+	struct list_head cmd_list;
+	bool aborted;
+};
+enum qla_sess_deletion {
+	QLA_SESS_DELETION_NONE		= 0,
+	QLA_SESS_DELETION_PENDING	= 1, /* hopefully we can get rid of
+					      * this one */
+	QLA_SESS_DELETION_IN_PROGRESS	= 2,
 };
 /*
 	port_id_t s_id;
 	unsigned int conf_compl_supported:1;
-	unsigned int deleted:1;
+	unsigned int deleted:2;
 	unsigned int local:1;
+	unsigned int logout_on_delete:1;
+	unsigned int plogi_ack_needed:1;
+	unsigned int keep_nport_handle:1;
+	unsigned char logout_completed;
+	int generation;
 	struct se_session *se_sess;
 	struct scsi_qla_host *vha;
 	uint8_t port_name[WWN_SIZE];
 	struct work_struct free_work;
+	union {
+		struct imm_ntfy_from_isp tm_iocb;
+	};
 };
 struct qla_tgt_cmd {
 	unsigned int conf_compl_supported:1;
 	unsigned int sg_mapped:1;
 	unsigned int free_sg:1;
-	unsigned int aborted:1; /* Needed in case of SRR */
 	unsigned int write_data_transferred:1;
 	unsigned int ctx_dsd_alloced:1;
 	unsigned int q_full:1;
 	 * BIT_14 - Back end data received/sent.
 	 * BIT_15 - SRR prepare ctio
 	 * BIT_16 - complete free
+	 * BIT_17 - flush - qlt_abort_cmd_on_host_reset
+	 * BIT_18 - completion w/abort status
+	 * BIT_19 - completion w/unknown status
 	 */
 	uint32_t cmd_flags;
 };
 	struct qla_tgt_cmd *cmd;
 };
+/* Check for Switch reserved address */
+#define IS_SW_RESV_ADDR(_s_id) \
+	((_s_id.b.domain == 0xff) && (_s_id.b.area == 0xfc))
 #define QLA_TGT_XMIT_DATA		1
 #define QLA_TGT_XMIT_STATUS		2
 #define QLA_TGT_XMIT_ALL		(QLA_TGT_XMIT_STATUS|QLA_TGT_XMIT_DATA)
 extern void qlt_lport_deregister(struct scsi_qla_host *);
 extern void qlt_unreg_sess(struct qla_tgt_sess *);
 extern void qlt_fc_port_added(struct scsi_qla_host *, fc_port_t *);
-extern void qlt_fc_port_deleted(struct scsi_qla_host *, fc_port_t *);
+extern void qlt_fc_port_deleted(struct scsi_qla_host *, fc_port_t *, int);
 extern int __init qlt_init(void);
 extern void qlt_exit(void);
 extern void qlt_update_vp_map(struct scsi_qla_host *, int);
 		ha->host->active_mode |= MODE_INITIATOR;
 }
+static inline uint32_t sid_to_key(const uint8_t *s_id)
+{
+	uint32_t key;
+	key = (((unsigned long)s_id[0] << 16) |
+	       ((unsigned long)s_id[1] << 8) |
+	       (unsigned long)s_id[2]);
+	return key;
+}
 /*
  * Exported symbols from qla_target.c LLD logic used by qla2xxx code..
  */
 extern void qlt_response_pkt_all_vps(struct scsi_qla_host *, response_t *);
 extern int qlt_rdy_to_xfer(struct qla_tgt_cmd *);
 extern int qlt_xmit_response(struct qla_tgt_cmd *, int, uint8_t);
+extern void qlt_abort_cmd(struct qla_tgt_cmd *);
 extern void qlt_xmit_tm_rsp(struct qla_tgt_mgmt_cmd *);
 extern void qlt_free_mcmd(struct qla_tgt_mgmt_cmd *);
 extern void qlt_free_cmd(struct qla_tgt_cmd *cmd);
 extern irqreturn_t qla83xx_msix_atio_q(int, void *);
 extern void qlt_83xx_iospace_config(struct qla_hw_data *);
 extern int qlt_free_qfull_cmds(struct scsi_qla_host *);
+extern void qlt_logo_completion_handler(fc_port_t *, int);
+extern void qlt_do_generation_tick(struct scsi_qla_host *, int *);
 #endif /* __QLA_TARGET_H */

drivers/scsi/qla2xxx/tcm_qla2xxx.c+9−19

@@ -374,7 +374,7 @@ static int tcm_qla2xxx_write_pending(struct se_cmd *se_cmd) · 373 unmodified lines
374	{	374	{
375	struct qla_tgt_cmd *cmd = container_of(se_cmd,	375	struct qla_tgt_cmd *cmd = container_of(se_cmd,
376	struct qla_tgt_cmd, se_cmd);	376	struct qla_tgt_cmd, se_cmd);
377		377	cmd->cmd_flags \|= BIT_3;
378	cmd->bufflen = se_cmd->data_length;	378	cmd->bufflen = se_cmd->data_length;
379	cmd->dma_data_direction = target_reverse_dma_direction(se_cmd);	379	cmd->dma_data_direction = target_reverse_dma_direction(se_cmd);
380		380
@@ -405,7 +405,7 @@ static int tcm_qla2xxx_write_pending_status(struct se_cmd *se_cmd) · 24 unmodified lines
405	se_cmd->t_state == TRANSPORT_COMPLETE_QF_WP) {	405	se_cmd->t_state == TRANSPORT_COMPLETE_QF_WP) {
406	spin_unlock_irqrestore(&se_cmd->t_state_lock, flags);	406	spin_unlock_irqrestore(&se_cmd->t_state_lock, flags);
407	wait_for_completion_timeout(&se_cmd->t_transport_stop_comp,	407	wait_for_completion_timeout(&se_cmd->t_transport_stop_comp,
408	3000);	408	3 * HZ);
409	return 0;	409	return 0;
410	}	410	}
411	spin_unlock_irqrestore(&se_cmd->t_state_lock, flags);	411	spin_unlock_irqrestore(&se_cmd->t_state_lock, flags);
@@ -541,12 +541,10 @@ static int tcm_qla2xxx_queue_data_in(struct se_cmd *se_cmd) · 129 unmodified lines
541	cmd->cmd_flags \|= BIT_4;	541	cmd->cmd_flags \|= BIT_4;
542	cmd->bufflen = se_cmd->data_length;	542	cmd->bufflen = se_cmd->data_length;
543	cmd->dma_data_direction = target_reverse_dma_direction(se_cmd);	543	cmd->dma_data_direction = target_reverse_dma_direction(se_cmd);
544	cmd->aborted = (se_cmd->transport_state & CMD_T_ABORTED);
545		544
546	cmd->sg_cnt = se_cmd->t_data_nents;	545	cmd->sg_cnt = se_cmd->t_data_nents;
547	cmd->sg = se_cmd->t_data_sg;	546	cmd->sg = se_cmd->t_data_sg;
548	cmd->offset = 0;	547	cmd->offset = 0;
549	cmd->cmd_flags \|= BIT_3;
550		548
551	cmd->prot_sg_cnt = se_cmd->t_prot_nents;	549	cmd->prot_sg_cnt = se_cmd->t_prot_nents;
552	cmd->prot_sg = se_cmd->t_prot_sg;	550	cmd->prot_sg = se_cmd->t_prot_sg;
@@ -571,7 +569,6 @@ static int tcm_qla2xxx_queue_status(struct se_cmd *se_cmd) · 18 unmodified lines
571	cmd->sg_cnt = 0;	569	cmd->sg_cnt = 0;
572	cmd->offset = 0;	570	cmd->offset = 0;
573	cmd->dma_data_direction = target_reverse_dma_direction(se_cmd);	571	cmd->dma_data_direction = target_reverse_dma_direction(se_cmd);
574	cmd->aborted = (se_cmd->transport_state & CMD_T_ABORTED);
575	if (cmd->cmd_flags & BIT_5) {	572	if (cmd->cmd_flags & BIT_5) {
576	pr_crit("Bit_5 already set for cmd = %p.\n", cmd);	573	pr_crit("Bit_5 already set for cmd = %p.\n", cmd);
577	dump_stack();	574	dump_stack();
@@ -636,14 +633,7 @@ static void tcm_qla2xxx_aborted_task(struct se_cmd *se_cmd) · 58 unmodified lines
636	{	633	{
637	struct qla_tgt_cmd *cmd = container_of(se_cmd,	634	struct qla_tgt_cmd *cmd = container_of(se_cmd,
638	struct qla_tgt_cmd, se_cmd);	635	struct qla_tgt_cmd, se_cmd);
639	struct scsi_qla_host *vha = cmd->vha;	636	qlt_abort_cmd(cmd);
640	struct qla_hw_data *ha = vha->hw;
641
642	if (!cmd->sg_mapped)
643	return;
644
645	pci_unmap_sg(ha->pdev, cmd->sg, cmd->sg_cnt, cmd->dma_data_direction);
646	cmd->sg_mapped = 0;
647	}	637	}
648		638
649	static void tcm_qla2xxx_clear_sess_lookup(struct tcm_qla2xxx_lport *,	639	static void tcm_qla2xxx_clear_sess_lookup(struct tcm_qla2xxx_lport *,
@@ -1149,9 +1139,7 @@ static struct qla_tgt_sess *tcm_qla2xxx_find_sess_by_s_id( · 499 unmodified lines
1149	return NULL;	1139	return NULL;
1150	}	1140	}
1151		1141
1152	key = (((unsigned long)s_id[0] << 16) \|	1142	key = sid_to_key(s_id);
1153	((unsigned long)s_id[1] << 8) \|
1154	(unsigned long)s_id[2]);
1155	pr_debug("find_sess_by_s_id: 0x%06x\n", key);	1143	pr_debug("find_sess_by_s_id: 0x%06x\n", key);
1156		1144
1157	se_nacl = btree_lookup32(&lport->lport_fcport_map, key);	1145	se_nacl = btree_lookup32(&lport->lport_fcport_map, key);
@@ -1186,9 +1174,7 @@ static void tcm_qla2xxx_set_sess_by_s_id( · 28 unmodified lines
1186	void *slot;	1174	void *slot;
1187	int rc;	1175	int rc;
1188		1176
1189	key = (((unsigned long)s_id[0] << 16) \|	1177	key = sid_to_key(s_id);
1190	((unsigned long)s_id[1] << 8) \|
1191	(unsigned long)s_id[2]);
1192	pr_debug("set_sess_by_s_id: %06x\n", key);	1178	pr_debug("set_sess_by_s_id: %06x\n", key);
1193		1179
1194	slot = btree_lookup32(&lport->lport_fcport_map, key);	1180	slot = btree_lookup32(&lport->lport_fcport_map, key);
@@ -1544,6 +1530,10 @@ static void tcm_qla2xxx_update_sess(struct qla_tgt_sess *sess, port_id_t s_id, · 349 unmodified lines
1544	}	1530	}
1545		1531
1546	sess->conf_compl_supported = conf_compl_supported;	1532	sess->conf_compl_supported = conf_compl_supported;
		1533
		1534	/* Reset logout parameters to default */
		1535	sess->logout_on_delete = 1;
		1536	sess->keep_nport_handle = 0;
1547	}	1537	}
1548		1538
1549	/*	1539	/*

drivers/scsi/scsi_error.c+1−32

@@ -26,7 +26,6 @@ · 25 unmodified lines
26	#include <linux/blkdev.h>	26	#include <linux/blkdev.h>
27	#include <linux/delay.h>	27	#include <linux/delay.h>
28	#include <linux/jiffies.h>	28	#include <linux/jiffies.h>
29	#include <asm/unaligned.h>
30		29
31	#include <scsi/scsi.h>	30	#include <scsi/scsi.h>
32	#include <scsi/scsi_cmnd.h>	31	#include <scsi/scsi_cmnd.h>
@@ -944,7 +943,7 @@ void scsi_eh_prep_cmnd(struct scsi_cmnd scmd, struct scsi_eh_save ses, · 911 unmodified lines
944	scmd->sdb.length);	943	scmd->sdb.length);
945	scmd->sdb.table.sgl = &ses->sense_sgl;	944	scmd->sdb.table.sgl = &ses->sense_sgl;
946	scmd->sc_data_direction = DMA_FROM_DEVICE;	945	scmd->sc_data_direction = DMA_FROM_DEVICE;
947	scmd->sdb.table.nents = 1;	946	scmd->sdb.table.nents = scmd->sdb.table.orig_nents = 1;
948	scmd->cmnd[0] = REQUEST_SENSE;	947	scmd->cmnd[0] = REQUEST_SENSE;
949	scmd->cmnd[4] = scmd->sdb.length;	948	scmd->cmnd[4] = scmd->sdb.length;
950	scmd->cmd_len = COMMAND_SIZE(scmd->cmnd[0]);	949	scmd->cmd_len = COMMAND_SIZE(scmd->cmnd[0]);
@@ -2523,33 +2522,3 @@ void scsi_build_sense_buffer(int desc, u8 *buf, u8 key, u8 asc, u8 ascq) · 1572 unmodified lines
2523	}	2522	}
2524	}	2523	}
2525	EXPORT_SYMBOL(scsi_build_sense_buffer);	2524	EXPORT_SYMBOL(scsi_build_sense_buffer);
2526
2527	/**
2528	* scsi_set_sense_information - set the information field in a
2529	* formatted sense data buffer
2530	* @buf: Where to build sense data
2531	* @info: 64-bit information value to be set
2532	*
2533	**/
2534	void scsi_set_sense_information(u8 *buf, u64 info)
2535	{
2536	if ((buf[0] & 0x7f) == 0x72) {
2537	u8 *ucp, len;
2538
2539	len = buf[7];
2540	ucp = (char *)scsi_sense_desc_find(buf, len + 8, 0);
2541	if (!ucp) {
2542	buf[7] = len + 0xa;
2543	ucp = buf + 8 + len;
2544	}
2545	ucp[0] = 0;
2546	ucp[1] = 0xa;
2547	ucp[2] = 0x80; /* Valid bit */
2548	ucp[3] = 0;
2549	put_unaligned_be64(info, &ucp[4]);
2550	} else if ((buf[0] & 0x7f) == 0x70) {
2551	buf[0] \|= 0x80;
2552	put_unaligned_be64(info, &buf[3]);
2553	}
2554	}
2555	EXPORT_SYMBOL(scsi_set_sense_information);

drivers/scsi/scsi_lib.c+3−3

@@ -583,7 +583,7 @@ static struct scatterlist *scsi_sg_alloc(unsigned int nents, gfp_t gfp_mask) · 582 unmodified lines
583		583
584	static void scsi_free_sgtable(struct scsi_data_buffer *sdb, bool mq)	584	static void scsi_free_sgtable(struct scsi_data_buffer *sdb, bool mq)
585	{	585	{
586	if (mq && sdb->table.nents <= SCSI_MAX_SG_SEGMENTS)	586	if (mq && sdb->table.orig_nents <= SCSI_MAX_SG_SEGMENTS)
587	return;	587	return;
588	__sg_free_table(&sdb->table, SCSI_MAX_SG_SEGMENTS, mq, scsi_sg_free);	588	__sg_free_table(&sdb->table, SCSI_MAX_SG_SEGMENTS, mq, scsi_sg_free);
589	}	589	}
@@ -597,8 +597,8 @@ static int scsi_alloc_sgtable(struct scsi_data_buffer *sdb, int nents, bool mq) · 7 unmodified lines
597		597
598	if (mq) {	598	if (mq) {
599	if (nents <= SCSI_MAX_SG_SEGMENTS) {	599	if (nents <= SCSI_MAX_SG_SEGMENTS) {
600	sdb->table.nents = nents;	600	sdb->table.nents = sdb->table.orig_nents = nents;
601	sg_init_table(sdb->table.sgl, sdb->table.nents);	601	sg_init_table(sdb->table.sgl, nents);
602	return 0;	602	return 0;
603	}	603	}
604	first_chunk = sdb->table.sgl;	604	first_chunk = sdb->table.sgl;

drivers/scsi/sd.c+3−3

@@ -2770,9 +2770,9 @@ static int sd_revalidate_disk(struct gendisk *disk) · 2769 unmodified lines
2770	max_xfer = sdkp->max_xfer_blocks;	2770	max_xfer = sdkp->max_xfer_blocks;
2771	max_xfer <<= ilog2(sdp->sector_size) - 9;	2771	max_xfer <<= ilog2(sdp->sector_size) - 9;
2772		2772
2773	max_xfer = min_not_zero(queue_max_hw_sectors(sdkp->disk->queue),	2773	sdkp->disk->queue->limits.max_sectors =
2774	max_xfer);	2774	min_not_zero(queue_max_hw_sectors(sdkp->disk->queue), max_xfer);
2775	blk_queue_max_hw_sectors(sdkp->disk->queue, max_xfer);	2775
2776	set_capacity(disk, sdkp->capacity);	2776	set_capacity(disk, sdkp->capacity);
2777	sd_config_write_same(sdkp);	2777	sd_config_write_same(sdkp);
2778	kfree(buffer);	2778	kfree(buffer);

drivers/staging/comedi/drivers/das1800.c+1−0

@@ -1266,6 +1266,7 @@ static const struct das1800_board das1800_probe(struct comedi_device dev) · 1265 unmodified lines
1266	if (index == das1801hc \|\| index == das1802hc)	1266	if (index == das1801hc \|\| index == das1802hc)
1267	return board;	1267	return board;
1268	index = das1801hc;	1268	index = das1801hc;
		1269	break;
1269	default:	1270	default:
1270	dev_err(dev->class_dev,	1271	dev_err(dev->class_dev,
1271	"Board model: probe returned 0x%x (unknown, please report)\n",	1272	"Board model: probe returned 0x%x (unknown, please report)\n",

drivers/staging/lustre/lustre/obdclass/debug.c+1−1

@@ -40,7 +40,7 @@ · 39 unmodified lines
40		40
41	#define DEBUG_SUBSYSTEM D_OTHER	41	#define DEBUG_SUBSYSTEM D_OTHER
42		42
43	#include <linux/unaligned/access_ok.h>	43	#include <asm/unaligned.h>
44		44
45	#include "../include/obd_support.h"	45	#include "../include/obd_support.h"
46	#include "../include/lustre_debug.h"	46	#include "../include/lustre_debug.h"

drivers/staging/vt6655/device_main.c+3−2

@@ -1483,8 +1483,9 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw, · 1482 unmodified lines
1483	}	1483	}
1484	}	1484	}
1485		1485
1486	if (changed & BSS_CHANGED_ASSOC && priv->op_mode != NL80211_IFTYPE_AP) {	1486	if (changed & (BSS_CHANGED_ASSOC \| BSS_CHANGED_BEACON_INFO) &&
1487	if (conf->assoc) {	1487	priv->op_mode != NL80211_IFTYPE_AP) {
		1488	if (conf->assoc && conf->beacon_rate) {
1488	CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,	1489	CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1489	conf->sync_tsf);	1490	conf->sync_tsf);
1490		1491

drivers/target/iscsi/iscsi_target.c+39−9

 	}
 transport_err:
-	iscsit_take_action_for_connection_exit(conn);
+	/*
+	 * Avoid the normal connection failure code-path if this connection
+	 * is still within LOGIN mode, and iscsi_np process context is
+	 * responsible for cleaning up the early connection failure.
+	 */
+	if (conn->conn_state != TARG_CONN_STATE_IN_LOGIN)
+		iscsit_take_action_for_connection_exit(conn);
 out:
 	return 0;
 }
 int iscsi_target_rx_thread(void *arg)
 {
-	int ret;
+	int ret, rc;
 	u8 buffer[ISCSI_HDR_LEN], opcode;
 	u32 checksum = 0, digest = 0;
 	struct iscsi_conn *conn = arg;
 	 * connection recovery / failure event can be triggered externally.
 	 */
 	allow_signal(SIGINT);
+	/*
+	 * Wait for iscsi_post_login_handler() to complete before allowing
+	 * incoming iscsi/tcp socket I/O, and/or failing the connection.
+	 */
+	rc = wait_for_completion_interruptible(&conn->rx_login_comp);
+	if (rc < 0)
+		return 0;
 	if (conn->conn_transport->transport_type == ISCSI_INFINIBAND) {
 		struct completion comp;
-		int rc;
 		init_completion(&comp);
 		rc = wait_for_completion_interruptible(&comp);
 	struct iscsi_conn *conn)
 {
 	struct iscsi_session *sess = conn->sess;
-	int sleep = cmpxchg(&conn->tx_thread_active, true, false);
+	int sleep = 1;
+	/*
+	 * Traditional iscsi/tcp will invoke this logic from TX thread
+	 * context during session logout, so clear tx_thread_active and
+	 * sleep if iscsit_close_connection() has not already occured.
+	 *
+	 * Since iser-target invokes this logic from it's own workqueue,
+	 * always sleep waiting for RX/TX thread shutdown to complete
+	 * within iscsit_close_connection().
+	 */
+	if (conn->conn_transport->transport_type == ISCSI_TCP)
+		sleep = cmpxchg(&conn->tx_thread_active, true, false);
 	atomic_set(&conn->conn_logout_remove, 0);
 	complete(&conn->conn_logout_comp);
 static void iscsit_logout_post_handler_samecid(
 	struct iscsi_conn *conn)
 {
-	int sleep = cmpxchg(&conn->tx_thread_active, true, false);
+	int sleep = 1;
+	if (conn->conn_transport->transport_type == ISCSI_TCP)
+		sleep = cmpxchg(&conn->tx_thread_active, true, false);
 	atomic_set(&conn->conn_logout_remove, 0);
 	complete(&conn->conn_logout_comp);
 	struct iscsi_session *sess;
 	struct se_portal_group *se_tpg = &tpg->tpg_se_tpg;
 	struct se_session *se_sess, *se_sess_tmp;
+	LIST_HEAD(free_list);
 	int session_count = 0;
 	spin_lock_bh(&se_tpg->session_lock);
 		}
 		atomic_set(&sess->session_reinstatement, 1);
 		spin_unlock(&sess->conn_lock);
-		spin_unlock_bh(&se_tpg->session_lock);
-		iscsit_free_session(sess);
+		list_move_tail(&se_sess->sess_list, &free_list);
-		spin_lock_bh(&se_tpg->session_lock);
+	}
+	spin_unlock_bh(&se_tpg->session_lock);
+	list_for_each_entry_safe(se_sess, se_sess_tmp, &free_list, sess_list) {
+		sess = (struct iscsi_session *)se_sess->fabric_sess_ptr;
+		iscsit_free_session(sess);
 		session_count++;
 	}
-	spin_unlock_bh(&se_tpg->session_lock);
 	pr_debug("Released %d iSCSI Session(s) from Target Portal"
 			" Group: %hu\n", session_count, tpg->tpgt);

drivers/target/iscsi/iscsi_target_login.c+17−28

@@ -82,6 +82,7 @@ static struct iscsi_login iscsi_login_init_conn(struct iscsi_conn conn) · 81 unmodified lines
82	init_completion(&conn->conn_logout_comp);	82	init_completion(&conn->conn_logout_comp);
83	init_completion(&conn->rx_half_close_comp);	83	init_completion(&conn->rx_half_close_comp);
84	init_completion(&conn->tx_half_close_comp);	84	init_completion(&conn->tx_half_close_comp);
		85	init_completion(&conn->rx_login_comp);
85	spin_lock_init(&conn->cmd_lock);	86	spin_lock_init(&conn->cmd_lock);
86	spin_lock_init(&conn->conn_usage_lock);	87	spin_lock_init(&conn->conn_usage_lock);
87	spin_lock_init(&conn->immed_queue_lock);	88	spin_lock_init(&conn->immed_queue_lock);
@@ -644,7 +645,7 @@ static void iscsi_post_login_start_timers(struct iscsi_conn *conn) · 556 unmodified lines
644	iscsit_start_nopin_timer(conn);	645	iscsit_start_nopin_timer(conn);
645	}	646	}
646		647
647	static int iscsit_start_kthreads(struct iscsi_conn *conn)	648	int iscsit_start_kthreads(struct iscsi_conn *conn)
648	{	649	{
649	int ret = 0;	650	int ret = 0;
650		651
@@ -679,6 +680,7 @@ static int iscsit_start_kthreads(struct iscsi_conn *conn) · 28 unmodified lines
679		680
680	return 0;	681	return 0;
681	out_tx:	682	out_tx:
		683	send_sig(SIGINT, conn->tx_thread, 1);
682	kthread_stop(conn->tx_thread);	684	kthread_stop(conn->tx_thread);
683	conn->tx_thread_active = false;	685	conn->tx_thread_active = false;
684	out_bitmap:	686	out_bitmap:
@@ -689,7 +691,7 @@ out_bitmap: · 4 unmodified lines
689	return ret;	691	return ret;
690	}	692	}
691		693
692	int iscsi_post_login_handler(	694	void iscsi_post_login_handler(
693	struct iscsi_np *np,	695	struct iscsi_np *np,
694	struct iscsi_conn *conn,	696	struct iscsi_conn *conn,
695	u8 zero_tsih)	697	u8 zero_tsih)
@@ -699,7 +701,6 @@ int iscsi_post_login_handler( · 3 unmodified lines
699	struct se_session *se_sess = sess->se_sess;	701	struct se_session *se_sess = sess->se_sess;
700	struct iscsi_portal_group *tpg = sess->tpg;	702	struct iscsi_portal_group *tpg = sess->tpg;
701	struct se_portal_group *se_tpg = &tpg->tpg_se_tpg;	703	struct se_portal_group *se_tpg = &tpg->tpg_se_tpg;
702	int rc;
703		704
704	iscsit_inc_conn_usage_count(conn);	705	iscsit_inc_conn_usage_count(conn);
705		706
@@ -739,10 +740,6 @@ int iscsi_post_login_handler( · 33 unmodified lines
739	sess->sess_ops->InitiatorName);	740	sess->sess_ops->InitiatorName);
740	spin_unlock_bh(&sess->conn_lock);	741	spin_unlock_bh(&sess->conn_lock);
741		742
742	rc = iscsit_start_kthreads(conn);
743	if (rc)
744	return rc;
745
746	iscsi_post_login_start_timers(conn);	743	iscsi_post_login_start_timers(conn);
747	/*	744	/*
748	* Determine CPU mask to ensure connection's RX and TX kthreads	745	* Determine CPU mask to ensure connection's RX and TX kthreads
@@ -751,15 +748,20 @@ int iscsi_post_login_handler( · 2 unmodified lines
751	iscsit_thread_get_cpumask(conn);	748	iscsit_thread_get_cpumask(conn);
752	conn->conn_rx_reset_cpumask = 1;	749	conn->conn_rx_reset_cpumask = 1;
753	conn->conn_tx_reset_cpumask = 1;	750	conn->conn_tx_reset_cpumask = 1;
754		751	/*
		752	* Wakeup the sleeping iscsi_target_rx_thread() now that
		753	* iscsi_conn is in TARG_CONN_STATE_LOGGED_IN state.
		754	*/
		755	complete(&conn->rx_login_comp);
755	iscsit_dec_conn_usage_count(conn);	756	iscsit_dec_conn_usage_count(conn);
		757
756	if (stop_timer) {	758	if (stop_timer) {
757	spin_lock_bh(&se_tpg->session_lock);	759	spin_lock_bh(&se_tpg->session_lock);
758	iscsit_stop_time2retain_timer(sess);	760	iscsit_stop_time2retain_timer(sess);
759	spin_unlock_bh(&se_tpg->session_lock);	761	spin_unlock_bh(&se_tpg->session_lock);
760	}	762	}
761	iscsit_dec_session_usage_count(sess);	763	iscsit_dec_session_usage_count(sess);
762	return 0;	764	return;
763	}	765	}
764		766
765	iscsi_set_session_parameters(sess->sess_ops, conn->param_list, 1);	767	iscsi_set_session_parameters(sess->sess_ops, conn->param_list, 1);
@@ -800,10 +802,6 @@ int iscsi_post_login_handler( · 34 unmodified lines
800	" iSCSI Target Portal Group: %hu\n", tpg->nsessions, tpg->tpgt);	802	" iSCSI Target Portal Group: %hu\n", tpg->nsessions, tpg->tpgt);
801	spin_unlock_bh(&se_tpg->session_lock);	803	spin_unlock_bh(&se_tpg->session_lock);
802		804
803	rc = iscsit_start_kthreads(conn);
804	if (rc)
805	return rc;
806
807	iscsi_post_login_start_timers(conn);	805	iscsi_post_login_start_timers(conn);
808	/*	806	/*
809	* Determine CPU mask to ensure connection's RX and TX kthreads	807	* Determine CPU mask to ensure connection's RX and TX kthreads
@@ -812,10 +810,12 @@ int iscsi_post_login_handler( · 2 unmodified lines
812	iscsit_thread_get_cpumask(conn);	810	iscsit_thread_get_cpumask(conn);
813	conn->conn_rx_reset_cpumask = 1;	811	conn->conn_rx_reset_cpumask = 1;
814	conn->conn_tx_reset_cpumask = 1;	812	conn->conn_tx_reset_cpumask = 1;
815		813	/*
		814	* Wakeup the sleeping iscsi_target_rx_thread() now that
		815	* iscsi_conn is in TARG_CONN_STATE_LOGGED_IN state.
		816	*/
		817	complete(&conn->rx_login_comp);
816	iscsit_dec_conn_usage_count(conn);	818	iscsit_dec_conn_usage_count(conn);
817
818	return 0;
819	}	819	}
820		820
821	static void iscsi_handle_login_thread_timeout(unsigned long data)	821	static void iscsi_handle_login_thread_timeout(unsigned long data)
@@ -1380,23 +1380,12 @@ static int __iscsi_target_login_thread(struct iscsi_np *np) · 558 unmodified lines
1380	if (ret < 0)	1380	if (ret < 0)
1381	goto new_sess_out;	1381	goto new_sess_out;
1382		1382
1383	if (!conn->sess) {
1384	pr_err("struct iscsi_conn session pointer is NULL!\n");
1385	goto new_sess_out;
1386	}
1387
1388	iscsi_stop_login_thread_timer(np);	1383	iscsi_stop_login_thread_timer(np);
1389		1384
1390	if (signal_pending(current))
1391	goto new_sess_out;
1392
1393	if (ret == 1) {	1385	if (ret == 1) {
1394	tpg_np = conn->tpg_np;	1386	tpg_np = conn->tpg_np;
1395		1387
1396	ret = iscsi_post_login_handler(np, conn, zero_tsih);	1388	iscsi_post_login_handler(np, conn, zero_tsih);
1397	if (ret < 0)
1398	goto new_sess_out;
1399
1400	iscsit_deaccess_np(np, tpg, tpg_np);	1389	iscsit_deaccess_np(np, tpg, tpg_np);
1401	}	1390	}
1402		1391

drivers/target/iscsi/iscsi_target_login.h+2−1

 extern int iscsit_get_login_rx(struct iscsi_conn *, struct iscsi_login *);
 extern int iscsit_put_login_tx(struct iscsi_conn *, struct iscsi_login *, u32);
 extern void iscsit_free_conn(struct iscsi_np *, struct iscsi_conn *);
-extern int iscsi_post_login_handler(struct iscsi_np *, struct iscsi_conn *, u8);
+extern int iscsit_start_kthreads(struct iscsi_conn *);
+extern void iscsi_post_login_handler(struct iscsi_np *, struct iscsi_conn *, u8);
 extern void iscsi_target_login_sess_out(struct iscsi_conn *, struct iscsi_np *,
 				bool, bool);
 extern int iscsi_target_login_thread(void *);

drivers/target/iscsi/iscsi_target_nego.c+33−1

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	******************************************************************************/	17	******************************************************************************/
18		18
19	#include <linux/ctype.h>	19	#include <linux/ctype.h>
		20	#include <linux/kthread.h>
20	#include <scsi/iscsi_proto.h>	21	#include <scsi/iscsi_proto.h>
21	#include <target/target_core_base.h>	22	#include <target/target_core_base.h>
22	#include <target/target_core_fabric.h>	23	#include <target/target_core_fabric.h>
@@ -361,10 +362,24 @@ static int iscsi_target_do_tx_login_io(struct iscsi_conn *conn, struct iscsi_log · 338 unmodified lines
361	ntohl(login_rsp->statsn), login->rsp_length);	362	ntohl(login_rsp->statsn), login->rsp_length);
362		363
363	padding = ((-login->rsp_length) & 3);	364	padding = ((-login->rsp_length) & 3);
		365	/*
		366	* Before sending the last login response containing the transition
		367	* bit for full-feature-phase, go ahead and start up TX/RX threads
		368	* now to avoid potential resource allocation failures after the
		369	* final login response has been sent.
		370	*/
		371	if (login->login_complete) {
		372	int rc = iscsit_start_kthreads(conn);
		373	if (rc) {
		374	iscsit_tx_login_rsp(conn, ISCSI_STATUS_CLS_TARGET_ERR,
		375	ISCSI_LOGIN_STATUS_NO_RESOURCES);
		376	return -1;
		377	}
		378	}
364		379
365	if (conn->conn_transport->iscsit_put_login_tx(conn, login,	380	if (conn->conn_transport->iscsit_put_login_tx(conn, login,
366	login->rsp_length + padding) < 0)	381	login->rsp_length + padding) < 0)
367	return -1;	382	goto err;
368		383
369	login->rsp_length = 0;	384	login->rsp_length = 0;
370	mutex_lock(&sess->cmdsn_mutex);	385	mutex_lock(&sess->cmdsn_mutex);
@@ -373,6 +388,23 @@ static int iscsi_target_do_tx_login_io(struct iscsi_conn *conn, struct iscsi_log · 2 unmodified lines
373	mutex_unlock(&sess->cmdsn_mutex);	388	mutex_unlock(&sess->cmdsn_mutex);
374		389
375	return 0;	390	return 0;
		391
		392	err:
		393	if (login->login_complete) {
		394	if (conn->rx_thread && conn->rx_thread_active) {
		395	send_sig(SIGINT, conn->rx_thread, 1);
		396	kthread_stop(conn->rx_thread);
		397	}
		398	if (conn->tx_thread && conn->tx_thread_active) {
		399	send_sig(SIGINT, conn->tx_thread, 1);
		400	kthread_stop(conn->tx_thread);
		401	}
		402	spin_lock(&iscsit_global->ts_bitmap_lock);
		403	bitmap_release_region(iscsit_global->ts_bitmap, conn->bitmap_id,
		404	get_order(1));
		405	spin_unlock(&iscsit_global->ts_bitmap_lock);
		406	}
		407	return -1;
376	}	408	}
377		409
378	static void iscsi_target_sk_data_ready(struct sock *sk)	410	static void iscsi_target_sk_data_ready(struct sock *sk)

drivers/target/target_core_configfs.c+28−12

 	if (!dev->transport->init_prot || !dev->transport->free_prot) {
 		/* 0 is only allowed value for non-supporting backends */
 		if (flag == 0)
-			return 0;
+			return count;
 		pr_err("DIF protection not supported by backend: %s\n",
 		       dev->transport->name);
 	u8 type = 0;
 	if (dev->transport->transport_flags & TRANSPORT_FLAG_PASSTHROUGH)
-		return 0;
+		return count;
 	if (dev->dev_reservation_flags & DRF_SPC2_RESERVATIONS)
-		return 0;
+		return count;
 	if (dev->export_count) {
 		pr_debug("Unable to process APTPL metadata while"
 		 * PR APTPL Metadata for Reservation
 		 */
 		case Opt_res_holder:
-			match_int(args, &arg);
+			ret = match_int(args, &arg);
+			if (ret)
+				goto out;
 			res_holder = arg;
 			break;
 		case Opt_res_type:
-			match_int(args, &arg);
+			ret = match_int(args, &arg);
+			if (ret)
+				goto out;
 			type = (u8)arg;
 			break;
 		case Opt_res_scope:
-			match_int(args, &arg);
+			ret = match_int(args, &arg);
+			if (ret)
+				goto out;
 			break;
 		case Opt_res_all_tg_pt:
-			match_int(args, &arg);
+			ret = match_int(args, &arg);
+			if (ret)
+				goto out;
 			all_tg_pt = (int)arg;
 			break;
 		case Opt_mapped_lun:
-			match_int(args, &arg);
+			ret = match_int(args, &arg);
+			if (ret)
+				goto out;
 			mapped_lun = (u64)arg;
 			break;
 		/*
 			}
 			break;
 		case Opt_tpgt:
-			match_int(args, &arg);
+			ret = match_int(args, &arg);
+			if (ret)
+				goto out;
 			tpgt = (u16)arg;
 			break;
 		case Opt_port_rtpi:
-			match_int(args, &arg);
+			ret = match_int(args, &arg);
+			if (ret)
+				goto out;
 			break;
 		case Opt_target_lun:
-			match_int(args, &arg);
+			ret = match_int(args, &arg);
+			if (ret)
+				goto out;
 			target_lun = (u64)arg;
 			break;
 		default:
 	lu_gp_mem = dev->dev_alua_lu_gp_mem;
 	if (!lu_gp_mem)
-		return 0;
+		return count;
 	if (count > LU_GROUP_NAME_BUF) {
 		pr_err("ALUA LU Group Alias too large!\n");

drivers/target/target_core_pr.c+1−1

@@ -1474,7 +1474,7 @@ core_scsi3_decode_spec_i_port( · 1473 unmodified lines
1474	LIST_HEAD(tid_dest_list);	1474	LIST_HEAD(tid_dest_list);
1475	struct pr_transport_id_holder tidh_new, tidh, *tidh_tmp;	1475	struct pr_transport_id_holder tidh_new, tidh, *tidh_tmp;
1476	unsigned char buf, ptr, proto_ident;	1476	unsigned char buf, ptr, proto_ident;
1477	const unsigned char *i_str;	1477	const unsigned char *i_str = NULL;
1478	char *iport_ptr = NULL, i_buf[PR_REG_ISID_ID_LEN];	1478	char *iport_ptr = NULL, i_buf[PR_REG_ISID_ID_LEN];
1479	sense_reason_t ret;	1479	sense_reason_t ret;
1480	u32 tpdl, tid_len = 0;	1480	u32 tpdl, tid_len = 0;

drivers/target/target_core_rd.c+1−0

@@ -333,6 +333,7 @@ static int rd_configure_device(struct se_device *dev) · 332 unmodified lines
333	dev->dev_attrib.hw_block_size = RD_BLOCKSIZE;	333	dev->dev_attrib.hw_block_size = RD_BLOCKSIZE;
334	dev->dev_attrib.hw_max_sectors = UINT_MAX;	334	dev->dev_attrib.hw_max_sectors = UINT_MAX;
335	dev->dev_attrib.hw_queue_depth = RD_MAX_DEVICE_QUEUE_DEPTH;	335	dev->dev_attrib.hw_queue_depth = RD_MAX_DEVICE_QUEUE_DEPTH;
		336	dev->dev_attrib.is_nonrot = 1;
336		337
337	rd_dev->rd_dev_id = rd_host->rd_host_dev_id_count++;	338	rd_dev->rd_dev_id = rd_host->rd_host_dev_id_count++;
338		339

drivers/target/target_core_spc.c+8−1

 		    cmd->se_sess->sess_prot_type == TARGET_DIF_TYPE1_PROT)
 			buf[4] = 0x5;
 		else if (dev->dev_attrib.pi_prot_type == TARGET_DIF_TYPE3_PROT ||
-			cmd->se_sess->sess_prot_type == TARGET_DIF_TYPE3_PROT)
+			 cmd->se_sess->sess_prot_type == TARGET_DIF_TYPE3_PROT)
 			buf[4] = 0x4;
 	}
+	/* logical unit supports type 1 and type 3 protection */
+	if ((dev->transport->get_device_type(dev) == TYPE_DISK) &&
+	    (sess->sup_prot_ops & (TARGET_PROT_DIN_PASS | TARGET_PROT_DOUT_PASS)) &&
+	    (dev->dev_attrib.pi_prot_type || cmd->se_sess->sess_prot_type)) {
+		buf[4] |= (0x3 << 3);
+	}
 	/* Set HEADSUP, ORDSUP, SIMPSUP */
 	buf[5] = 0x07;

drivers/thermal/hisi_thermal.c+0−1

@@ -405,7 +405,6 @@ static SIMPLE_DEV_PM_OPS(hisi_thermal_pm_ops, · 404 unmodified lines
405	static struct platform_driver hisi_thermal_driver = {	405	static struct platform_driver hisi_thermal_driver = {
406	.driver = {	406	.driver = {
407	.name = "hisi_thermal",	407	.name = "hisi_thermal",
408	.owner = THIS_MODULE,
409	.pm = &hisi_thermal_pm_ops,	408	.pm = &hisi_thermal_pm_ops,
410	.of_match_table = of_hisi_thermal_match,	409	.of_match_table = of_hisi_thermal_match,
411	},	410	},

drivers/thermal/power_allocator.c+16−10

 	struct thermal_instance *instance;
 	struct power_allocator_params *params = tz->governor_data;
 	u32 *req_power, *max_power, *granted_power, *extra_actor_power;
-	u32 total_req_power, max_allocatable_power;
+	u32 *weighted_req_power;
+	u32 total_req_power, max_allocatable_power, total_weighted_req_power;
 	u32 total_granted_power, power_range;
 	int i, num_actors, total_weight, ret = 0;
 	int trip_max_desired_temperature = params->trip_max_desired_temperature;
 	}
 	/*
-	 * We need to allocate three arrays of the same size:
+	 * We need to allocate five arrays of the same size:
-	 * req_power, max_power and granted_power.  They are going to
+	 * req_power, max_power, granted_power, extra_actor_power and
-	 * be needed until this function returns.  Allocate them all
+	 * weighted_req_power.  They are going to be needed until this
-	 * in one go to simplify the allocation and deallocation
+	 * function returns.  Allocate them all in one go to simplify
-	 * logic.
+	 * the allocation and deallocation logic.
 	 */
 	BUILD_BUG_ON(sizeof(*req_power) != sizeof(*max_power));
 	BUILD_BUG_ON(sizeof(*req_power) != sizeof(*granted_power));
 	BUILD_BUG_ON(sizeof(*req_power) != sizeof(*extra_actor_power));
-	req_power = devm_kcalloc(&tz->device, num_actors * 4,
+	BUILD_BUG_ON(sizeof(*req_power) != sizeof(*weighted_req_power));
+	req_power = devm_kcalloc(&tz->device, num_actors * 5,
 				 sizeof(*req_power), GFP_KERNEL);
 	if (!req_power) {
 		ret = -ENOMEM;
 	max_power = &req_power[num_actors];
 	granted_power = &req_power[2 * num_actors];
 	extra_actor_power = &req_power[3 * num_actors];
+	weighted_req_power = &req_power[4 * num_actors];
 	i = 0;
+	total_weighted_req_power = 0;
 	total_req_power = 0;
 	max_allocatable_power = 0;
 		else
 			weight = instance->weight;
-		req_power[i] = frac_to_int(weight * req_power[i]);
+		weighted_req_power[i] = frac_to_int(weight * req_power[i]);
 		if (power_actor_get_max_power(cdev, tz, &max_power[i]))
 			continue;
 		total_req_power += req_power[i];
 		max_allocatable_power += max_power[i];
+		total_weighted_req_power += weighted_req_power[i];
 		i++;
 	}
 	power_range = pid_controller(tz, current_temp, control_temp,
 				     max_allocatable_power);
-	divvy_up_power(req_power, max_power, num_actors, total_req_power,
+	divvy_up_power(weighted_req_power, max_power, num_actors,
-		       power_range, granted_power, extra_actor_power);
+		       total_weighted_req_power, power_range, granted_power,
+		       extra_actor_power);
 	total_granted_power = 0;
 	i = 0;

drivers/thermal/samsung/Kconfig+1−1

@@ -1,6 +1,6 @@
1	config EXYNOS_THERMAL	1	config EXYNOS_THERMAL
2	tristate "Exynos thermal management unit driver"	2	tristate "Exynos thermal management unit driver"
3	depends on OF	3	depends on THERMAL_OF
4	help	4	help
5	If you say yes here you get support for the TMU (Thermal Management	5	If you say yes here you get support for the TMU (Thermal Management
6	Unit) driver for SAMSUNG EXYNOS series of SoCs. This driver initialises	6	Unit) driver for SAMSUNG EXYNOS series of SoCs. This driver initialises

drivers/thermal/samsung/exynos_tmu.c+2−3

 static int exynos_tmu_probe(struct platform_device *pdev)
 {
-	struct exynos_tmu_platform_data *pdata;
 	struct exynos_tmu_data *data;
 	int ret;
 	if (ret)
 		goto err_sensor;
-	pdata = data->pdata;
 	INIT_WORK(&data->irq_work, exynos_tmu_work);
 	data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
 	if (!IS_ERR(data->clk_sec))
 		clk_unprepare(data->clk_sec);
 err_sensor:
+	if (!IS_ERR_OR_NULL(data->regulator))
+		regulator_disable(data->regulator);
 	thermal_zone_of_sensor_unregister(&pdev->dev, data->tzd);
 	return ret;

drivers/thermal/thermal_core.c+1−0

@@ -1333,6 +1333,7 @@ int thermal_zone_unbind_cooling_device(struct thermal_zone_device *tz, · 1332 unmodified lines
1333	return -ENODEV;	1333	return -ENODEV;
1334		1334
1335	unbind:	1335	unbind:
		1336	device_remove_file(&tz->device, &pos->weight_attr);
1336	device_remove_file(&tz->device, &pos->attr);	1337	device_remove_file(&tz->device, &pos->attr);
1337	sysfs_remove_link(&tz->device.kobj, pos->name);	1338	sysfs_remove_link(&tz->device.kobj, pos->name);
1338	release_idr(&tz->idr, &tz->lock, pos->id);	1339	release_idr(&tz->idr, &tz->lock, pos->id);

drivers/usb/chipidea/core.c+12−1

@@ -1024,7 +1024,18 @@ static struct platform_driver ci_hdrc_driver = { · 1023 unmodified lines
1024	},	1024	},
1025	};	1025	};
1026		1026
1027	module_platform_driver(ci_hdrc_driver);	1027	static int __init ci_hdrc_platform_register(void)
		1028	{
		1029	ci_hdrc_host_driver_init();
		1030	return platform_driver_register(&ci_hdrc_driver);
		1031	}
		1032	module_init(ci_hdrc_platform_register);
		1033
		1034	static void __exit ci_hdrc_platform_unregister(void)
		1035	{
		1036	platform_driver_unregister(&ci_hdrc_driver);
		1037	}
		1038	module_exit(ci_hdrc_platform_unregister);
1028		1039
1029	MODULE_ALIAS("platform:ci_hdrc");	1040	MODULE_ALIAS("platform:ci_hdrc");
1030	MODULE_LICENSE("GPL v2");	1041	MODULE_LICENSE("GPL v2");

drivers/usb/chipidea/host.c+5−2

 	rdrv->name	= "host";
 	ci->roles[CI_ROLE_HOST] = rdrv;
+	return 0;
+}
+void ci_hdrc_host_driver_init(void)
+{
 	ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
 	orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
 	ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
-	return 0;
 }

drivers/usb/chipidea/host.h+6−0

 int ci_hdrc_host_init(struct ci_hdrc *ci);
 void ci_hdrc_host_destroy(struct ci_hdrc *ci);
+void ci_hdrc_host_driver_init(void);
 #else
 }
+static void ci_hdrc_host_driver_init(void)
+{
+}
 #endif
 #endif /* __DRIVERS_USB_CHIPIDEA_HOST_H */

drivers/usb/gadget/function/f_hid.c+4−0

 	int ret;
 	ret = ida_simple_get(&hidg_ida, 0, 0, GFP_KERNEL);
+	if (ret >= HIDG_MINORS) {
+		ida_simple_remove(&hidg_ida, ret);
+		ret = -ENODEV;
+	}
 	return ret;
 }

drivers/usb/gadget/function/f_printer.c+9−1

@@ -1248,7 +1248,15 @@ static struct config_item_type printer_func_type = { · 1247 unmodified lines
1248		1248
1249	static inline int gprinter_get_minor(void)	1249	static inline int gprinter_get_minor(void)
1250	{	1250	{
1251	return ida_simple_get(&printer_ida, 0, 0, GFP_KERNEL);	1251	int ret;
		1252
		1253	ret = ida_simple_get(&printer_ida, 0, 0, GFP_KERNEL);
		1254	if (ret >= PRINTER_MINORS) {
		1255	ida_simple_remove(&printer_ida, ret);
		1256	ret = -ENODEV;
		1257	}
		1258
		1259	return ret;
1252	}	1260	}
1253		1261
1254	static inline void gprinter_put_minor(int minor)	1262	static inline void gprinter_put_minor(int minor)

drivers/usb/gadget/function/f_uac2.c+2−2

@@ -1162,14 +1162,14 @@ afunc_set_alt(struct usb_function *fn, unsigned intf, unsigned alt) · 1161 unmodified lines
1162	factor = 1000;	1162	factor = 1000;
1163	} else {	1163	} else {
1164	ep_desc = &hs_epin_desc;	1164	ep_desc = &hs_epin_desc;
1165	factor = 125;	1165	factor = 8000;
1166	}	1166	}
1167		1167
1168	/* pre-compute some values for iso_complete() */	1168	/* pre-compute some values for iso_complete() */
1169	uac2->p_framesize = opts->p_ssize *	1169	uac2->p_framesize = opts->p_ssize *
1170	num_channels(opts->p_chmask);	1170	num_channels(opts->p_chmask);
1171	rate = opts->p_srate * uac2->p_framesize;	1171	rate = opts->p_srate * uac2->p_framesize;
1172	uac2->p_interval = (1 << (ep_desc->bInterval - 1)) * factor;	1172	uac2->p_interval = factor / (1 << (ep_desc->bInterval - 1));
1173	uac2->p_pktsize = min_t(unsigned int, rate / uac2->p_interval,	1173	uac2->p_pktsize = min_t(unsigned int, rate / uac2->p_interval,
1174	prm->max_psize);	1174	prm->max_psize);
1175		1175

drivers/usb/gadget/udc/bdc/bdc_ep.c+1−1

@@ -779,7 +779,7 @@ static int ep_dequeue(struct bdc_ep ep, struct bdc_req req) · 778 unmodified lines
779	/* The current hw dequeue pointer */	779	/* The current hw dequeue pointer */
780	tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS0(0));	780	tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS0(0));
781	deq_ptr_64 = tmp_32;	781	deq_ptr_64 = tmp_32;
782	tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS0(1));	782	tmp_32 = bdc_readl(bdc->regs, BDC_EPSTS1(0));
783	deq_ptr_64 \|= ((u64)tmp_32 << 32);	783	deq_ptr_64 \|= ((u64)tmp_32 << 32);
784		784
785	/* we have the dma addr of next bd that will be fetched by hardware */	785	/* we have the dma addr of next bd that will be fetched by hardware */

drivers/usb/gadget/udc/udc-core.c+1−0

@@ -323,6 +323,7 @@ err4: · 322 unmodified lines
323		323
324	err3:	324	err3:
325	put_device(&udc->dev);	325	put_device(&udc->dev);
		326	device_del(&gadget->dev);
326		327
327	err2:	328	err2:
328	put_device(&gadget->dev);	329	put_device(&gadget->dev);

drivers/usb/host/xhci-mem.c+2−1

@@ -1792,7 +1792,8 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci) · 1791 unmodified lines
1792	int size;	1792	int size;
1793	int i, j, num_ports;	1793	int i, j, num_ports;
1794		1794
1795	del_timer_sync(&xhci->cmd_timer);	1795	if (timer_pending(&xhci->cmd_timer))
		1796	del_timer_sync(&xhci->cmd_timer);
1796		1797
1797	/* Free the Event Ring Segment Table and the actual Event Ring */	1798	/* Free the Event Ring Segment Table and the actual Event Ring */
1798	size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);	1799	size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);

drivers/usb/host/xhci-ring.c+1−1

@@ -82,7 +82,7 @@ dma_addr_t xhci_trb_virt_to_dma(struct xhci_segment *seg, · 81 unmodified lines
82	return 0;	82	return 0;
83	/* offset in TRBs */	83	/* offset in TRBs */
84	segment_offset = trb - seg->trbs;	84	segment_offset = trb - seg->trbs;
85	if (segment_offset > TRBS_PER_SEGMENT)	85	if (segment_offset >= TRBS_PER_SEGMENT)
86	return 0;	86	return 0;
87	return seg->dma + (segment_offset * sizeof(*trb));	87	return seg->dma + (segment_offset * sizeof(*trb));
88	}	88	}

drivers/usb/serial/option.c+2−0

 	{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000)}, /* SIMCom SIM5218 */
 	{ USB_DEVICE_INTERFACE_CLASS(SIERRA_VENDOR_ID, 0x68c0, 0xff),
 	  .driver_info = (kernel_ulong_t)&sierra_mc73xx_blacklist }, /* MC73xx */
+	{ USB_DEVICE_INTERFACE_CLASS(SIERRA_VENDOR_ID, 0x9041, 0xff),
+	  .driver_info = (kernel_ulong_t)&sierra_mc73xx_blacklist }, /* MC7305/MC7355 */
 	{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6001) },
 	{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_CMU_300) },
 	{ USB_DEVICE(CMOTECH_VENDOR_ID, CMOTECH_PRODUCT_6003),

drivers/usb/serial/qcserial.c+1−1

 	{DEVICE_SWI(0x1199, 0x901c)},	/* Sierra Wireless EM7700 */
 	{DEVICE_SWI(0x1199, 0x901f)},	/* Sierra Wireless EM7355 */
 	{DEVICE_SWI(0x1199, 0x9040)},	/* Sierra Wireless Modem */
-	{DEVICE_SWI(0x1199, 0x9041)},	/* Sierra Wireless MC7305/MC7355 */
 	{DEVICE_SWI(0x1199, 0x9051)},	/* Netgear AirCard 340U */
 	{DEVICE_SWI(0x1199, 0x9053)},	/* Sierra Wireless Modem */
 	{DEVICE_SWI(0x1199, 0x9054)},	/* Sierra Wireless Modem */
 	{DEVICE_SWI(0x413c, 0x81a4)},	/* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card */
 	{DEVICE_SWI(0x413c, 0x81a8)},	/* Dell Wireless 5808 Gobi(TM) 4G LTE Mobile Broadband Card */
 	{DEVICE_SWI(0x413c, 0x81a9)},	/* Dell Wireless 5808e Gobi(TM) 4G LTE Mobile Broadband Card */
+	{DEVICE_SWI(0x413c, 0x81b1)},	/* Dell Wireless 5809e Gobi(TM) 4G LTE Mobile Broadband Card */
 	/* Huawei devices */
 	{DEVICE_HWI(0x03f0, 0x581d)},	/* HP lt4112 LTE/HSPA+ Gobi 4G Modem (Huawei me906e) */

drivers/usb/serial/sierra.c+1−0

@@ -289,6 +289,7 @@ static const struct usb_device_id id_table[] = { · 288 unmodified lines
289	{ USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x68AA, 0xFF, 0xFF, 0xFF),	289	{ USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x68AA, 0xFF, 0xFF, 0xFF),
290	.driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist	290	.driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist
291	},	291	},
		292	{ USB_DEVICE(0x1199, 0x68AB) }, /* Sierra Wireless AR8550 */
292	/* AT&T Direct IP LTE modems */	293	/* AT&T Direct IP LTE modems */
293	{ USB_DEVICE_AND_INTERFACE_INFO(0x0F3D, 0x68AA, 0xFF, 0xFF, 0xFF),	294	{ USB_DEVICE_AND_INTERFACE_INFO(0x0F3D, 0x68AA, 0xFF, 0xFF, 0xFF),
294	.driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist	295	.driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist

drivers/vfio/vfio.c+54−37

 }
 EXPORT_SYMBOL_GPL(vfio_device_get_from_dev);
+static struct vfio_device *vfio_device_get_from_name(struct vfio_group *group,
+						     char *buf)
+{
+	struct vfio_device *device;
+	mutex_lock(&group->device_lock);
+	list_for_each_entry(device, &group->device_list, group_next) {
+		if (!strcmp(dev_name(device->dev), buf)) {
+			vfio_device_get(device);
+			break;
+		}
+	}
+	mutex_unlock(&group->device_lock);
+	return device;
+}
 /*
  * Caller must hold a reference to the vfio_device
  */
 {
 	struct vfio_device *device;
 	struct file *filep;
-	int ret = -ENODEV;
+	int ret;
 	if (0 == atomic_read(&group->container_users) ||
 	    !group->container->iommu_driver || !vfio_group_viable(group))
 		return -EINVAL;
-	mutex_lock(&group->device_lock);
+	device = vfio_device_get_from_name(group, buf);
-	list_for_each_entry(device, &group->device_list, group_next) {
+	if (!device)
-		if (strcmp(dev_name(device->dev), buf))
+		return -ENODEV;
-			continue;
-		ret = device->ops->open(device->device_data);
+	ret = device->ops->open(device->device_data);
-		if (ret)
+	if (ret) {
-			break;
+		vfio_device_put(device);
-		/*
+		return ret;
-		 * We can't use anon_inode_getfd() because we need to modify
+	}
-		 * the f_mode flags directly to allow more than just ioctls
-		 */
-		ret = get_unused_fd_flags(O_CLOEXEC);
-		if (ret < 0) {
-			device->ops->release(device->device_data);
-			break;
-		}
-		filep = anon_inode_getfile("[vfio-device]", &vfio_device_fops,
+	/*
-					   device, O_RDWR);
+	 * We can't use anon_inode_getfd() because we need to modify
-		if (IS_ERR(filep)) {
+	 * the f_mode flags directly to allow more than just ioctls
-			put_unused_fd(ret);
+	 */
-			ret = PTR_ERR(filep);
+	ret = get_unused_fd_flags(O_CLOEXEC);
-			device->ops->release(device->device_data);
+	if (ret < 0) {
-			break;
+		device->ops->release(device->device_data);
-		}
+		vfio_device_put(device);
+		return ret;
+	}
-		/*
+	filep = anon_inode_getfile("[vfio-device]", &vfio_device_fops,
-		 * TODO: add an anon_inode interface to do this.
+				   device, O_RDWR);
-		 * Appears to be missing by lack of need rather than
+	if (IS_ERR(filep)) {
-		 * explicitly prevented.  Now there's need.
+		put_unused_fd(ret);
-		 */
+		ret = PTR_ERR(filep);
-		filep->f_mode |= (FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE);
+		device->ops->release(device->device_data);
+		vfio_device_put(device);
+		return ret;
+	}
+	/*
+	 * TODO: add an anon_inode interface to do this.
+	 * Appears to be missing by lack of need rather than
+	 * explicitly prevented.  Now there's need.
+	 */
+	filep->f_mode |= (FMODE_LSEEK | FMODE_PREAD | FMODE_PWRITE);
-		vfio_device_get(device);
+	atomic_inc(&group->container_users);
-		atomic_inc(&group->container_users);
-		fd_install(ret, filep);
+	fd_install(ret, filep);
-		break;
-	}
-	mutex_unlock(&group->device_lock);
 	return ret;
 }

drivers/vhost/vhost.c+2−4

 {
 	void *n = kzalloc(size, GFP_KERNEL | __GFP_NOWARN | __GFP_REPEAT);
-	if (!n) {
+	if (!n)
 		n = vzalloc(size);
-		if (!n)
-			return ERR_PTR(-ENOMEM);
-	}
 	return n;
 }
 		}
 		if (eventfp != d->log_file) {
 			filep = d->log_file;
+			d->log_file = eventfp;
 			ctx = d->log_ctx;
 			d->log_ctx = eventfp ?
 				eventfd_ctx_fileget(eventfp) : NULL;

drivers/video/console/fbcon.c+2−1

 	int y;
  	int c = scr_readw((u16 *) vc->vc_pos);
+	ops->cur_blink_jiffies = msecs_to_jiffies(vc->vc_cur_blink_ms);
 	if (fbcon_is_inactive(vc, info) || vc->vc_deccm != 1)
 		return;
-	ops->cur_blink_jiffies = msecs_to_jiffies(vc->vc_cur_blink_ms);
 	if (vc->vc_cursor_type & 0x10)
 		fbcon_del_cursor_timer(info);
 	else

drivers/video/fbdev/Kconfig+1−1

@@ -298,7 +298,7 @@ config FB_ARMCLCD · 297 unmodified lines
298		298
299	# Helper logic selected only by the ARM Versatile platform family.	299	# Helper logic selected only by the ARM Versatile platform family.
300	config PLAT_VERSATILE_CLCD	300	config PLAT_VERSATILE_CLCD
301	def_bool ARCH_VERSATILE \|\| ARCH_REALVIEW \|\| ARCH_VEXPRESS	301	def_bool ARCH_VERSATILE \|\| ARCH_REALVIEW \|\| ARCH_VEXPRESS \|\| ARCH_INTEGRATOR
302	depends on ARM	302	depends on ARM
303	depends on FB_ARMCLCD && FB=y	303	depends on FB_ARMCLCD && FB=y
304		304

drivers/video/fbdev/omap2/dss/dss-of.c+3−1

 			}
 			prev = port;
 		} while (of_node_cmp(port->name, "port") != 0);
+		of_node_put(ports);
 	}
 	return port;
 	if (!port)
 		return NULL;
-	np = of_get_next_parent(port);
+	np = of_get_parent(port);
 	for (i = 0; i < 2 && np; ++i) {
 		struct property *prop;

drivers/video/fbdev/pxa3xx-gcu.c+2−2

@@ -653,7 +653,7 @@ static int pxa3xx_gcu_probe(struct platform_device *pdev) · 652 unmodified lines
653	goto err_free_dma;	653	goto err_free_dma;
654	}	654	}
655		655
656	ret = clk_enable(priv->clk);	656	ret = clk_prepare_enable(priv->clk);
657	if (ret < 0) {	657	if (ret < 0) {
658	dev_err(dev, "failed to enable clock\n");	658	dev_err(dev, "failed to enable clock\n");
659	goto err_misc_deregister;	659	goto err_misc_deregister;
@@ -685,7 +685,7 @@ err_misc_deregister: · 25 unmodified lines
685	misc_deregister(&priv->misc_dev);	685	misc_deregister(&priv->misc_dev);
686		686
687	err_disable_clk:	687	err_disable_clk:
688	clk_disable(priv->clk);	688	clk_disable_unprepare(priv->clk);
689		689
690	return ret;	690	return ret;
691	}	691	}

drivers/video/of_videomode.c+1−3

 		index = disp->native_mode;
 	ret = videomode_from_timings(disp, vm, index);
-	if (ret)
-		return ret;
 	display_timings_release(disp);
-	return 0;
+	return ret;
 }
 EXPORT_SYMBOL_GPL(of_get_videomode);

drivers/virtio/virtio_input.c+4−0

 static void virtinput_remove(struct virtio_device *vdev)
 {
 	struct virtio_input *vi = vdev->priv;
+	void *buf;
 	unsigned long flags;
 	spin_lock_irqsave(&vi->lock, flags);
 	spin_unlock_irqrestore(&vi->lock, flags);
 	input_unregister_device(vi->idev);
+	vdev->config->reset(vdev);
+	while ((buf = virtqueue_detach_unused_buf(vi->sts)) != NULL)
+		kfree(buf);
 	vdev->config->del_vqs(vdev);
 	kfree(vi);
 }

drivers/xen/balloon.c+7−8

@@ -472,7 +472,7 @@ static enum bp_state decrease_reservation(unsigned long nr_pages, gfp_t gfp) · 471 unmodified lines
472	}	472	}
473		473
474	/*	474	/*
475	* We avoid multiple worker processes conflicting via the balloon mutex.	475	* As this is a work item it is guaranteed to run as a single instance only.
476	* We may of course race updates of the target counts (which are protected	476	* We may of course race updates of the target counts (which are protected
477	* by the balloon lock), or with changes to the Xen hard limit, but we will	477	* by the balloon lock), or with changes to the Xen hard limit, but we will
478	* recover from these in time.	478	* recover from these in time.
@@ -482,9 +482,10 @@ static void balloon_process(struct work_struct *work) · 3 unmodified lines
482	enum bp_state state = BP_DONE;	482	enum bp_state state = BP_DONE;
483	long credit;	483	long credit;
484		484
485	mutex_lock(&balloon_mutex);
486		485
487	do {	486	do {
		487	mutex_lock(&balloon_mutex);
		488
488	credit = current_credit();	489	credit = current_credit();
489		490
490	if (credit > 0) {	491	if (credit > 0) {
@@ -499,17 +500,15 @@ static void balloon_process(struct work_struct *work) · 8 unmodified lines
499		500
500	state = update_schedule(state);	501	state = update_schedule(state);
501		502
502	#ifndef CONFIG_PREEMPT	503	mutex_unlock(&balloon_mutex);
503	if (need_resched())	504
504	schedule();	505	cond_resched();
505	#endif	506
506	} while (credit && state == BP_DONE);	507	} while (credit && state == BP_DONE);
507		508
508	/* Schedule more work if there is some still to be done. */	509	/* Schedule more work if there is some still to be done. */
509	if (state == BP_EAGAIN)	510	if (state == BP_EAGAIN)
510	schedule_delayed_work(&balloon_worker, balloon_stats.schedule_delay * HZ);	511	schedule_delayed_work(&balloon_worker, balloon_stats.schedule_delay * HZ);
511
512	mutex_unlock(&balloon_mutex);
513	}	512	}
514		513
515	/* Resets the Xen limit, sets new target, and kicks off processing. */	514	/* Resets the Xen limit, sets new target, and kicks off processing. */

drivers/xen/gntdev.c+2−0

 	pr_debug("priv %p\n", priv);
+	mutex_lock(&priv->lock);
 	while (!list_empty(&priv->maps)) {
 		map = list_entry(priv->maps.next, struct grant_map, next);
 		list_del(&map->next);
 		gntdev_put_map(NULL /* already removed */, map);
 	}
 	WARN_ON(!list_empty(&priv->freeable_maps));
+	mutex_unlock(&priv->lock);
 	if (use_ptemod)
 		mmu_notifier_unregister(&priv->mn, priv->mm);

drivers/xen/xenbus/xenbus_client.c+3−1

 	rv = xenbus_unmap_ring(dev, node->handles, node->nr_handles,
 			       addrs);
-	if (!rv)
+	if (!rv) {
 		vunmap(vaddr);
+		free_xenballooned_pages(node->nr_handles, node->hvm.pages);
+	}
 	else
 		WARN(1, "Leaking %p, size %u page(s)\n", vaddr,
 		     node->nr_handles);

fs/btrfs/dev-replace.c+1−1

@@ -378,7 +378,7 @@ int btrfs_dev_replace_start(struct btrfs_root *root, · 377 unmodified lines
378		378
379	ret = btrfs_kobj_add_device(tgt_device->fs_devices, tgt_device);	379	ret = btrfs_kobj_add_device(tgt_device->fs_devices, tgt_device);
380	if (ret)	380	if (ret)
381	btrfs_error(root->fs_info, ret, "kobj add dev failed");	381	btrfs_err(root->fs_info, "kobj add dev failed %d\n", ret);
382		382
383	printk_in_rcu(KERN_INFO	383	printk_in_rcu(KERN_INFO
384	"BTRFS: dev_replace from %s (devid %llu) to %s started\n",	384	"BTRFS: dev_replace from %s (devid %llu) to %s started\n",

fs/btrfs/disk-io.c+2−1

@@ -2842,6 +2842,7 @@ int open_ctree(struct super_block *sb, · 2841 unmodified lines
2842	!extent_buffer_uptodate(chunk_root->node)) {	2842	!extent_buffer_uptodate(chunk_root->node)) {
2843	printk(KERN_ERR "BTRFS: failed to read chunk root on %s\n",	2843	printk(KERN_ERR "BTRFS: failed to read chunk root on %s\n",
2844	sb->s_id);	2844	sb->s_id);
		2845	chunk_root->node = NULL;
2845	goto fail_tree_roots;	2846	goto fail_tree_roots;
2846	}	2847	}
2847	btrfs_set_root_node(&chunk_root->root_item, chunk_root->node);	2848	btrfs_set_root_node(&chunk_root->root_item, chunk_root->node);
@@ -2879,7 +2880,7 @@ retry_root_backup: · 31 unmodified lines
2879	!extent_buffer_uptodate(tree_root->node)) {	2880	!extent_buffer_uptodate(tree_root->node)) {
2880	printk(KERN_WARNING "BTRFS: failed to read tree root on %s\n",	2881	printk(KERN_WARNING "BTRFS: failed to read tree root on %s\n",
2881	sb->s_id);	2882	sb->s_id);
2882		2883	tree_root->node = NULL;
2883	goto recovery_tree_root;	2884	goto recovery_tree_root;
2884	}	2885	}
2885		2886

fs/btrfs/extent-tree.c+18−0

@@ -4227,6 +4227,24 @@ out: · 4226 unmodified lines
4227	space_info->chunk_alloc = 0;	4227	space_info->chunk_alloc = 0;
4228	spin_unlock(&space_info->lock);	4228	spin_unlock(&space_info->lock);
4229	mutex_unlock(&fs_info->chunk_mutex);	4229	mutex_unlock(&fs_info->chunk_mutex);
		4230	/*
		4231	* When we allocate a new chunk we reserve space in the chunk block
		4232	* reserve to make sure we can COW nodes/leafs in the chunk tree or
		4233	* add new nodes/leafs to it if we end up needing to do it when
		4234	* inserting the chunk item and updating device items as part of the
		4235	* second phase of chunk allocation, performed by
		4236	* btrfs_finish_chunk_alloc(). So make sure we don't accumulate a
		4237	* large number of new block groups to create in our transaction
		4238	* handle's new_bgs list to avoid exhausting the chunk block reserve
		4239	* in extreme cases - like having a single transaction create many new
		4240	* block groups when starting to write out the free space caches of all
		4241	* the block groups that were made dirty during the lifetime of the
		4242	* transaction.
		4243	*/
		4244	if (trans->chunk_bytes_reserved >= (2 * 1024 * 1024ull)) {
		4245	btrfs_create_pending_block_groups(trans, trans->root);
		4246	btrfs_trans_release_chunk_metadata(trans);
		4247	}
4230	return ret;	4248	return ret;
4231	}	4249	}
4232		4250

fs/btrfs/qgroup.c+5−0

 				/* Exclusive -> exclusive, nothing changed */
 			}
 		}
+		/* For exclusive extent, free its reserved bytes too */
+		if (nr_old_roots == 0 && nr_new_roots == 1 &&
+		    cur_new_count == nr_new_roots)
+			qg->reserved -= num_bytes;
 		if (dirty)
 			qgroup_dirty(fs_info, qg);
 	}

fs/btrfs/transaction.c+2−1

@@ -2152,7 +2152,8 @@ int btrfs_commit_transaction(struct btrfs_trans_handle *trans, · 2151 unmodified lines
2152		2152
2153	kmem_cache_free(btrfs_trans_handle_cachep, trans);	2153	kmem_cache_free(btrfs_trans_handle_cachep, trans);
2154		2154
2155	if (current != root->fs_info->transaction_kthread)	2155	if (current != root->fs_info->transaction_kthread &&
		2156	current != root->fs_info->cleaner_kthread)
2156	btrfs_run_delayed_iputs(root);	2157	btrfs_run_delayed_iputs(root);
2157		2158
2158	return ret;	2159	return ret;

fs/ceph/caps.c+5−17

 	swap(cf, ci->i_prealloc_cap_flush);
 	cf->caps = flushing;
-	cf->kick = false;
 	spin_lock(&mdsc->cap_dirty_lock);
 	list_del_init(&ci->i_dirty_item);
 static int __kick_flushing_caps(struct ceph_mds_client *mdsc,
 				struct ceph_mds_session *session,
-				struct ceph_inode_info *ci,
+				struct ceph_inode_info *ci)
-				bool kick_all)
 {
 	struct inode *inode = &ci->vfs_inode;
 	struct ceph_cap *cap;
 		for (n = rb_first(&ci->i_cap_flush_tree); n; n = rb_next(n)) {
 			cf = rb_entry(n, struct ceph_cap_flush, i_node);
-			if (cf->tid < first_tid)
+			if (cf->tid >= first_tid)
-				continue;
-			if (kick_all || cf->kick)
 				break;
 		}
 		if (!n) {
 		}
 		cf = rb_entry(n, struct ceph_cap_flush, i_node);
-		cf->kick = false;
 		first_tid = cf->tid + 1;
 {
 	struct ceph_inode_info *ci;
 	struct ceph_cap *cap;
-	struct ceph_cap_flush *cf;
-	struct rb_node *n;
 	dout("early_kick_flushing_caps mds%d\n", session->s_mds);
 	list_for_each_entry(ci, &session->s_cap_flushing, i_flushing_item) {
 		if ((cap->issued & ci->i_flushing_caps) !=
 		    ci->i_flushing_caps) {
 			spin_unlock(&ci->i_ceph_lock);
-			if (!__kick_flushing_caps(mdsc, session, ci, true))
+			if (!__kick_flushing_caps(mdsc, session, ci))
 				continue;
 			spin_lock(&ci->i_ceph_lock);
 		}
-		for (n = rb_first(&ci->i_cap_flush_tree); n; n = rb_next(n)) {
-			cf = rb_entry(n, struct ceph_cap_flush, i_node);
-			cf->kick = true;
-		}
 		spin_unlock(&ci->i_ceph_lock);
 	}
 }
 	dout("kick_flushing_caps mds%d\n", session->s_mds);
 	list_for_each_entry(ci, &session->s_cap_flushing, i_flushing_item) {
-		int delayed = __kick_flushing_caps(mdsc, session, ci, false);
+		int delayed = __kick_flushing_caps(mdsc, session, ci);
 		if (delayed) {
 			spin_lock(&ci->i_ceph_lock);
 			__cap_delay_requeue(mdsc, ci);
 		spin_unlock(&ci->i_ceph_lock);
-		delayed = __kick_flushing_caps(mdsc, session, ci, true);
+		delayed = __kick_flushing_caps(mdsc, session, ci);
 		if (delayed) {
 			spin_lock(&ci->i_ceph_lock);
 			__cap_delay_requeue(mdsc, ci);

fs/ceph/locks.c+1−1

@@ -287,7 +287,7 @@ int ceph_encode_locks_to_buffer(struct inode *inode, · 286 unmodified lines
287	return 0;	287	return 0;
288		288
289	spin_lock(&ctx->flc_lock);	289	spin_lock(&ctx->flc_lock);
290	list_for_each_entry(lock, &ctx->flc_flock, fl_list) {	290	list_for_each_entry(lock, &ctx->flc_posix, fl_list) {
291	++seen_fcntl;	291	++seen_fcntl;
292	if (seen_fcntl > num_fcntl_locks) {	292	if (seen_fcntl > num_fcntl_locks) {
293	err = -ENOSPC;	293	err = -ENOSPC;

fs/ceph/super.h+0−1

@@ -189,7 +189,6 @@ static inline void ceph_put_cap_snap(struct ceph_cap_snap *capsnap) · 188 unmodified lines
189	struct ceph_cap_flush {	189	struct ceph_cap_flush {
190	u64 tid;	190	u64 tid;
191	int caps;	191	int caps;
192	bool kick;
193	struct rb_node g_node; // global	192	struct rb_node g_node; // global
194	union {	193	union {
195	struct rb_node i_node; // inode	194	struct rb_node i_node; // inode

fs/dax.c+12−2

  * @vma: The virtual memory area where the fault occurred
  * @vmf: The description of the fault
  * @get_block: The filesystem method used to translate file offsets to blocks
+ * @complete_unwritten: The filesystem method used to convert unwritten blocks
+ *	to written so the data written to them is exposed. This is required for
+ *	required by write faults for filesystems that will return unwritten
+ *	extent mappings from @get_block, but it is optional for reads as
+ *	dax_insert_mapping() will always zero unwritten blocks. If the fs does
+ *	not support unwritten extents, the it should pass NULL.
  *
  * When a page fault occurs, filesystems may call this helper in their
  * fault handler for DAX files. __dax_fault() assumes the caller has done all
 	 * as for normal BH based IO completions.
 	 */
 	error = dax_insert_mapping(inode, &bh, vma, vmf);
-	if (buffer_unwritten(&bh))
+	if (buffer_unwritten(&bh)) {
-		complete_unwritten(&bh, !error);
+		if (complete_unwritten)
+			complete_unwritten(&bh, !error);
+		else
+			WARN_ON_ONCE(!(vmf->flags & FAULT_FLAG_WRITE));
+	}
  out:
 	if (error == -ENOMEM)

fs/dcache.c+3−10

 	inode_init_early();
 }
-void __init vfs_caches_init(unsigned long mempages)
+void __init vfs_caches_init(void)
 {
-	unsigned long reserve;
-	/* Base hash sizes on available memory, with a reserve equal to
-           150% of current kernel size */
-	reserve = min((mempages - nr_free_pages()) * 3/2, mempages - 1);
-	mempages -= reserve;
 	names_cachep = kmem_cache_create("names_cache", PATH_MAX, 0,
 			SLAB_HWCACHE_ALIGN|SLAB_PANIC, NULL);
 	dcache_init();
 	inode_init();
-	files_init(mempages);
+	files_init();
+	files_maxfiles_init();
 	mnt_init();
 	bdev_cache_init();
 	chrdev_init();

fs/f2fs/data.c+0−2

@@ -2072,8 +2072,6 @@ static int f2fs_set_data_page_dirty(struct page *page) · 2071 unmodified lines
2072	return 1;	2072	return 1;
2073	}	2073	}
2074		2074
2075	mark_inode_dirty(inode);
2076
2077	if (!PageDirty(page)) {	2075	if (!PageDirty(page)) {
2078	__set_page_dirty_nobuffers(page);	2076	__set_page_dirty_nobuffers(page);
2079	update_dirty_page(inode, page);	2077	update_dirty_page(inode, page);

fs/f2fs/file.c+4−3

 	if (ret)
 		return ret;
-	if (f2fs_is_atomic_file(inode))
+	if (f2fs_is_atomic_file(inode)) {
+		clear_inode_flag(F2FS_I(inode), FI_ATOMIC_FILE);
 		commit_inmem_pages(inode, false);
+	}
 	ret = f2fs_sync_file(filp, 0, LONG_MAX, 0);
 	mnt_drop_write_file(filp);
-	clear_inode_flag(F2FS_I(inode), FI_ATOMIC_FILE);
 	return ret;
 }
 	f2fs_balance_fs(F2FS_I_SB(inode));
 	if (f2fs_is_atomic_file(inode)) {
-		commit_inmem_pages(inode, false);
 		clear_inode_flag(F2FS_I(inode), FI_ATOMIC_FILE);
+		commit_inmem_pages(inode, false);
 	}
 	if (f2fs_is_volatile_file(inode))

fs/f2fs/gc.c+21−9

@@ -556,27 +556,39 @@ static void move_encrypted_block(struct inode *inode, block_t bidx) · 555 unmodified lines
556	if (!fio.encrypted_page)	556	if (!fio.encrypted_page)
557	goto put_out;	557	goto put_out;
558		558
559	f2fs_submit_page_bio(&fio);	559	err = f2fs_submit_page_bio(&fio);
		560	if (err)
		561	goto put_page_out;
		562
		563	/* write page */
		564	lock_page(fio.encrypted_page);
		565
		566	if (unlikely(!PageUptodate(fio.encrypted_page)))
		567	goto put_page_out;
		568	if (unlikely(fio.encrypted_page->mapping != META_MAPPING(fio.sbi)))
		569	goto put_page_out;
		570
		571	set_page_dirty(fio.encrypted_page);
		572	f2fs_wait_on_page_writeback(fio.encrypted_page, META);
		573	if (clear_page_dirty_for_io(fio.encrypted_page))
		574	dec_page_count(fio.sbi, F2FS_DIRTY_META);
		575
		576	set_page_writeback(fio.encrypted_page);
560		577
561	/* allocate block address */	578	/* allocate block address */
562	f2fs_wait_on_page_writeback(dn.node_page, NODE);	579	f2fs_wait_on_page_writeback(dn.node_page, NODE);
563
564	allocate_data_block(fio.sbi, NULL, fio.blk_addr,	580	allocate_data_block(fio.sbi, NULL, fio.blk_addr,
565	&fio.blk_addr, &sum, CURSEG_COLD_DATA);	581	&fio.blk_addr, &sum, CURSEG_COLD_DATA);
566	dn.data_blkaddr = fio.blk_addr;
567
568	/* write page */
569	lock_page(fio.encrypted_page);
570	set_page_writeback(fio.encrypted_page);
571	fio.rw = WRITE_SYNC;	582	fio.rw = WRITE_SYNC;
572	f2fs_submit_page_mbio(&fio);	583	f2fs_submit_page_mbio(&fio);
573		584
		585	dn.data_blkaddr = fio.blk_addr;
574	set_data_blkaddr(&dn);	586	set_data_blkaddr(&dn);
575	f2fs_update_extent_cache(&dn);	587	f2fs_update_extent_cache(&dn);
576	set_inode_flag(F2FS_I(inode), FI_APPEND_WRITE);	588	set_inode_flag(F2FS_I(inode), FI_APPEND_WRITE);
577	if (page->index == 0)	589	if (page->index == 0)
578	set_inode_flag(F2FS_I(inode), FI_FIRST_BLOCK_WRITTEN);	590	set_inode_flag(F2FS_I(inode), FI_FIRST_BLOCK_WRITTEN);
579		591	put_page_out:
580	f2fs_put_page(fio.encrypted_page, 1);	592	f2fs_put_page(fio.encrypted_page, 1);
581	put_out:	593	put_out:
582	f2fs_put_dnode(&dn);	594	f2fs_put_dnode(&dn);
@@ -605,8 +617,8 @@ static void move_data_page(struct inode *inode, block_t bidx, int gc_type) · 22 unmodified lines
605	.page = page,	617	.page = page,
606	.encrypted_page = NULL,	618	.encrypted_page = NULL,
607	};	619	};
		620	set_page_dirty(page);
608	f2fs_wait_on_page_writeback(page, DATA);	621	f2fs_wait_on_page_writeback(page, DATA);
609
610	if (clear_page_dirty_for_io(page))	622	if (clear_page_dirty_for_io(page))
611	inode_dec_dirty_pages(inode);	623	inode_dec_dirty_pages(inode);
612	set_cold_data(page);	624	set_cold_data(page);

fs/f2fs/inline.c+2−0

@@ -141,6 +141,8 @@ int f2fs_convert_inline_page(struct dnode_of_data dn, struct page page) · 140 unmodified lines
141	kunmap_atomic(dst_addr);	141	kunmap_atomic(dst_addr);
142	SetPageUptodate(page);	142	SetPageUptodate(page);
143	no_update:	143	no_update:
		144	set_page_dirty(page);
		145
144	/* clear dirty state */	146	/* clear dirty state */
145	dirty = clear_page_dirty_for_io(page);	147	dirty = clear_page_dirty_for_io(page);
146		148

fs/f2fs/segment.c+1−0

@@ -257,6 +257,7 @@ void commit_inmem_pages(struct inode *inode, bool abort) · 256 unmodified lines
257	if (!abort) {	257	if (!abort) {
258	lock_page(cur->page);	258	lock_page(cur->page);
259	if (cur->page->mapping == inode->i_mapping) {	259	if (cur->page->mapping == inode->i_mapping) {
		260	set_page_dirty(cur->page);
260	f2fs_wait_on_page_writeback(cur->page, DATA);	261	f2fs_wait_on_page_writeback(cur->page, DATA);
261	if (clear_page_dirty_for_io(cur->page))	262	if (clear_page_dirty_for_io(cur->page))
262	inode_dec_dirty_pages(inode);	263	inode_dec_dirty_pages(inode);

fs/file_table.c+15−9

 #include <linux/hardirq.h>
 #include <linux/task_work.h>
 #include <linux/ima.h>
+#include <linux/swap.h>
 #include <linux/atomic.h>
 	}
 }
-void __init files_init(unsigned long mempages)
+void __init files_init(void)
 {
-	unsigned long n;
 	filp_cachep = kmem_cache_create("filp", sizeof(struct file), 0,
 			SLAB_HWCACHE_ALIGN | SLAB_PANIC, NULL);
+	percpu_counter_init(&nr_files, 0, GFP_KERNEL);
+}
-	/*
+/*
-	 * One file with associated inode and dcache is very roughly 1K.
+ * One file with associated inode and dcache is very roughly 1K. Per default
-	 * Per default don't use more than 10% of our memory for files.
+ * do not use more than 10% of our memory for files.
-	 */
+ */
+void __init files_maxfiles_init(void)
+{
+	unsigned long n;
+	unsigned long memreserve = (totalram_pages - nr_free_pages()) * 3/2;
+	memreserve = min(memreserve, totalram_pages - 1);
+	n = ((totalram_pages - memreserve) * (PAGE_SIZE / 1024)) / 10;
-	n = (mempages * (PAGE_SIZE / 1024)) / 10;
 	files_stat.max_files = max_t(unsigned long, n, NR_FILE);
-	percpu_counter_init(&nr_files, 0, GFP_KERNEL);
 }

fs/fuse/dev.c+9−1

@@ -2246,7 +2246,15 @@ static long fuse_dev_ioctl(struct file *file, unsigned int cmd, · 2245 unmodified lines
2246		2246
2247	err = -EINVAL;	2247	err = -EINVAL;
2248	if (old) {	2248	if (old) {
2249	struct fuse_dev *fud = fuse_get_dev(old);	2249	struct fuse_dev *fud = NULL;
		2250
		2251	/*
		2252	* Check against file->f_op because CUSE
		2253	* uses the same ioctl handler.
		2254	*/
		2255	if (old->f_op == file->f_op &&
		2256	old->f_cred->user_ns == file->f_cred->user_ns)
		2257	fud = fuse_get_dev(old);
2250		2258
2251	if (fud) {	2259	if (fud) {
2252	mutex_lock(&fuse_mutex);	2260	mutex_lock(&fuse_mutex);

fs/hugetlbfs/inode.c+2−0

@@ -1010,6 +1010,8 @@ struct file hugetlb_file_setup(const char name, size_t size, · 1009 unmodified lines
1010	inode = hugetlbfs_get_inode(sb, NULL, S_IFREG \| S_IRWXUGO, 0);	1010	inode = hugetlbfs_get_inode(sb, NULL, S_IFREG \| S_IRWXUGO, 0);
1011	if (!inode)	1011	if (!inode)
1012	goto out_dentry;	1012	goto out_dentry;
		1013	if (creat_flags == HUGETLB_SHMFS_INODE)
		1014	inode->i_flags \|= S_PRIVATE;
1013		1015
1014	file = ERR_PTR(-ENOMEM);	1016	file = ERR_PTR(-ENOMEM);
1015	if (hugetlb_reserve_pages(inode, 0,	1017	if (hugetlb_reserve_pages(inode, 0,

fs/namei.c+7−2

 		return 0;
 	/* Allowed if parent directory not sticky and world-writable. */
-	parent = nd->path.dentry->d_inode;
+	parent = nd->inode;
 	if ((parent->i_mode & (S_ISVTX|S_IWOTH)) != (S_ISVTX|S_IWOTH))
 		return 0;
 				continue;
 			}
 		}
-		if (unlikely(!d_can_lookup(nd->path.dentry)))
+		if (unlikely(!d_can_lookup(nd->path.dentry))) {
+			if (nd->flags & LOOKUP_RCU) {
+				if (unlazy_walk(nd, NULL, 0))
+					return -ECHILD;
+			}
 			return -ENOTDIR;
+		}
 	}
 }

fs/nfs/client.c+1−1

@@ -775,7 +775,7 @@ static int nfs_init_server(struct nfs_server *server, · 774 unmodified lines
775	server->options = data->options;	775	server->options = data->options;
776	server->caps \|= NFS_CAP_HARDLINKS\|NFS_CAP_SYMLINKS\|NFS_CAP_FILEID\|	776	server->caps \|= NFS_CAP_HARDLINKS\|NFS_CAP_SYMLINKS\|NFS_CAP_FILEID\|
777	NFS_CAP_MODE\|NFS_CAP_NLINK\|NFS_CAP_OWNER\|NFS_CAP_OWNER_GROUP\|	777	NFS_CAP_MODE\|NFS_CAP_NLINK\|NFS_CAP_OWNER\|NFS_CAP_OWNER_GROUP\|
778	NFS_CAP_ATIME\|NFS_CAP_CTIME\|NFS_CAP_MTIME\|NFS_CAP_CHANGE_ATTR;	778	NFS_CAP_ATIME\|NFS_CAP_CTIME\|NFS_CAP_MTIME;
779		779
780	if (data->rsize)	780	if (data->rsize)
781	server->rsize = nfs_block_size(data->rsize, NULL);	781	server->rsize = nfs_block_size(data->rsize, NULL);

fs/nfs/flexfilelayout/flexfilelayout.c+1−1

@@ -1852,7 +1852,7 @@ ff_layout_mirror_prepare_stats(struct nfs42_layoutstat_args *args, · 1851 unmodified lines
1852	struct nfs42_layoutstat_devinfo *devinfo;	1852	struct nfs42_layoutstat_devinfo *devinfo;
1853	int i;	1853	int i;
1854		1854
1855	for (i = 0; i <= FF_LAYOUT_MIRROR_COUNT(pls); i++) {	1855	for (i = 0; i < FF_LAYOUT_MIRROR_COUNT(pls); i++) {
1856	if (*dev_count >= dev_limit)	1856	if (*dev_count >= dev_limit)
1857	break;	1857	break;
1858	mirror = FF_LAYOUT_COMP(pls, i);	1858	mirror = FF_LAYOUT_COMP(pls, i);

fs/nfs/inode.c+8−7

 			nfs_set_cache_invalid(inode, NFS_INO_INVALID_ATTR);
 		if (fattr->valid & NFS_ATTR_FATTR_CHANGE)
 			inode->i_version = fattr->change_attr;
-		else if (nfs_server_capable(inode, NFS_CAP_CHANGE_ATTR))
+		else
-			nfs_set_cache_invalid(inode, NFS_INO_INVALID_ATTR);
+			nfs_set_cache_invalid(inode, NFS_INO_INVALID_ATTR
+				| NFS_INO_REVAL_PAGECACHE);
 		if (fattr->valid & NFS_ATTR_FATTR_SIZE)
 			inode->i_size = nfs_size_to_loff_t(fattr->size);
 		else
 	if (fattr->valid & NFS_ATTR_FATTR_SIZE) {
 		cur_size = i_size_read(inode);
 		new_isize = nfs_size_to_loff_t(fattr->size);
-		if (cur_size != new_isize && nfsi->nrequests == 0)
+		if (cur_size != new_isize)
 			invalid |= NFS_INO_INVALID_ATTR|NFS_INO_REVAL_PAGECACHE;
 	}
+	if (nfsi->nrequests != 0)
+		invalid &= ~NFS_INO_REVAL_PAGECACHE;
 	/* Have any file permissions changed? */
 	if ((fattr->valid & NFS_ATTR_FATTR_MODE) && (inode->i_mode & S_IALLUGO) != (fattr->mode & S_IALLUGO))
 			invalid |= NFS_INO_INVALID_ATTR
 				| NFS_INO_INVALID_DATA
 				| NFS_INO_INVALID_ACCESS
-				| NFS_INO_INVALID_ACL
+				| NFS_INO_INVALID_ACL;
-				| NFS_INO_REVAL_PAGECACHE;
 			if (S_ISDIR(inode->i_mode))
 				nfs_force_lookup_revalidate(inode);
 			inode->i_version = fattr->change_attr;
 		}
-	} else if (server->caps & NFS_CAP_CHANGE_ATTR)
+	} else
 		nfsi->cache_validity |= save_cache_validity;
 	if (fattr->valid & NFS_ATTR_FATTR_MTIME) {
 			if ((nfsi->nrequests == 0) || new_isize > cur_isize) {
 				i_size_write(inode, new_isize);
 				invalid |= NFS_INO_INVALID_ATTR|NFS_INO_INVALID_DATA;
-				invalid &= ~NFS_INO_REVAL_PAGECACHE;
 			}
 			dprintk("NFS: isize change on server for file %s/%ld "
 					"(%Ld to %Ld)\n",

fs/nfs/internal.h+21−0

@@ -296,6 +296,22 @@ extern struct rpc_procinfo nfs4_procedures[]; · 295 unmodified lines
296		296
297	#ifdef CONFIG_NFS_V4_SECURITY_LABEL	297	#ifdef CONFIG_NFS_V4_SECURITY_LABEL
298	extern struct nfs4_label nfs4_label_alloc(struct nfs_server server, gfp_t flags);	298	extern struct nfs4_label nfs4_label_alloc(struct nfs_server server, gfp_t flags);
		299	static inline struct nfs4_label *
		300	nfs4_label_copy(struct nfs4_label dst, struct nfs4_label src)
		301	{
		302	if (!dst \|\| !src)
		303	return NULL;
		304
		305	if (src->len > NFS4_MAXLABELLEN)
		306	return NULL;
		307
		308	dst->lfs = src->lfs;
		309	dst->pi = src->pi;
		310	dst->len = src->len;
		311	memcpy(dst->label, src->label, src->len);
		312
		313	return dst;
		314	}
299	static inline void nfs4_label_free(struct nfs4_label *label)	315	static inline void nfs4_label_free(struct nfs4_label *label)
300	{	316	{
301	if (label) {	317	if (label) {
@@ -316,6 +332,11 @@ static inline void nfs4_label_free(void *label) {} · 14 unmodified lines
316	static inline void nfs_zap_label_cache_locked(struct nfs_inode *nfsi)	332	static inline void nfs_zap_label_cache_locked(struct nfs_inode *nfsi)
317	{	333	{
318	}	334	}
		335	static inline struct nfs4_label *
		336	nfs4_label_copy(struct nfs4_label dst, struct nfs4_label src)
		337	{
		338	return NULL;
		339	}
319	#endif /* CONFIG_NFS_V4_SECURITY_LABEL */	340	#endif /* CONFIG_NFS_V4_SECURITY_LABEL */
320		341
321	/* proc.c */	342	/* proc.c */

fs/nfs/nfs42proc.c+18−1

@@ -135,7 +135,7 @@ int nfs42_proc_deallocate(struct file *filep, loff_t offset, loff_t len) · 134 unmodified lines
135	return err;	135	return err;
136	}	136	}
137		137
138	loff_t nfs42_proc_llseek(struct file *filep, loff_t offset, int whence)	138	static loff_t _nfs42_proc_llseek(struct file *filep, loff_t offset, int whence)
139	{	139	{
140	struct inode *inode = file_inode(filep);	140	struct inode *inode = file_inode(filep);
141	struct nfs42_seek_args args = {	141	struct nfs42_seek_args args = {
@@ -171,6 +171,23 @@ loff_t nfs42_proc_llseek(struct file *filep, loff_t offset, int whence) · 29 unmodified lines
171	return vfs_setpos(filep, res.sr_offset, inode->i_sb->s_maxbytes);	171	return vfs_setpos(filep, res.sr_offset, inode->i_sb->s_maxbytes);
172	}	172	}
173		173
		174	loff_t nfs42_proc_llseek(struct file *filep, loff_t offset, int whence)
		175	{
		176	struct nfs_server *server = NFS_SERVER(file_inode(filep));
		177	struct nfs4_exception exception = { };
		178	int err;
		179
		180	do {
		181	err = _nfs42_proc_llseek(filep, offset, whence);
		182	if (err == -ENOTSUPP)
		183	return -EOPNOTSUPP;
		184	err = nfs4_handle_exception(server, err, &exception);
		185	} while (exception.retry);
		186
		187	return err;
		188	}
		189
		190
174	static void	191	static void
175	nfs42_layoutstat_prepare(struct rpc_task task, void calldata)	192	nfs42_layoutstat_prepare(struct rpc_task task, void calldata)
176	{	193	{

fs/nfs/nfs4proc.c+21−15

 static void renew_lease(const struct nfs_server *server, unsigned long timestamp)
 {
-	do_renew_lease(server->nfs_client, timestamp);
+	struct nfs_client *clp = server->nfs_client;
+	if (!nfs4_has_session(clp))
+		do_renew_lease(clp, timestamp);
 }
 struct nfs4_call_sync_data {
 		clp = session->clp;
 		do_renew_lease(clp, res->sr_timestamp);
 		/* Check sequence flags */
-		if (res->sr_status_flags != 0)
+		nfs41_handle_sequence_flag_errors(clp, res->sr_status_flags);
-			nfs4_schedule_lease_recovery(clp);
 		nfs41_update_target_slotid(slot->table, slot, res);
 		break;
 	case 1:
 	struct nfs_open_confirmres c_res;
 	struct nfs4_string owner_name;
 	struct nfs4_string group_name;
+	struct nfs4_label *a_label;
 	struct nfs_fattr f_attr;
 	struct nfs4_label *f_label;
 	struct dentry *dir;
 	if (IS_ERR(p->f_label))
 		goto err_free_p;
+	p->a_label = nfs4_label_alloc(server, gfp_mask);
+	if (IS_ERR(p->a_label))
+		goto err_free_f;
 	alloc_seqid = server->nfs_client->cl_mvops->alloc_seqid;
 	p->o_arg.seqid = alloc_seqid(&sp->so_seqid, gfp_mask);
 	if (IS_ERR(p->o_arg.seqid))
 	p->o_arg.server = server;
 	p->o_arg.bitmask = nfs4_bitmask(server, label);
 	p->o_arg.open_bitmap = &nfs4_fattr_bitmap[0];
-	p->o_arg.label = label;
+	p->o_arg.label = nfs4_label_copy(p->a_label, label);
 	p->o_arg.claim = nfs4_map_atomic_open_claim(server, claim);
 	switch (p->o_arg.claim) {
 	case NFS4_OPEN_CLAIM_NULL:
 	return p;
 err_free_label:
+	nfs4_label_free(p->a_label);
+err_free_f:
 	nfs4_label_free(p->f_label);
 err_free_p:
 	kfree(p);
 		nfs4_put_open_state(p->state);
 	nfs4_put_state_owner(p->owner);
+	nfs4_label_free(p->a_label);
 	nfs4_label_free(p->f_label);
 	dput(p->dir);
 static void nfs_resync_open_stateid_locked(struct nfs4_state *state)
 {
+	if (!(state->n_wronly || state->n_rdonly || state->n_rdwr))
+		return;
 	if (state->n_wronly)
 		set_bit(NFS_O_WRONLY_STATE, &state->flags);
 	if (state->n_rdonly)
 		set_bit(NFS_O_RDONLY_STATE, &state->flags);
 	if (state->n_rdwr)
 		set_bit(NFS_O_RDWR_STATE, &state->flags);
+	set_bit(NFS_OPEN_STATE, &state->flags);
 }
 static void nfs_clear_open_stateid_locked(struct nfs4_state *state,
 		goto out;
 	}
 	ret = rpc_wait_for_completion_task(task);
-	if (!ret) {
+	if (!ret)
-		struct nfs4_sequence_res *res = task->tk_msg.rpc_resp;
-		if (task->tk_status == 0)
-			nfs41_handle_sequence_flag_errors(clp, res->sr_status_flags);
 		ret = task->tk_status;
-	}
 	rpc_put_task(task);
 out:
 	dprintk("<-- %s status=%d\n", __func__, ret);
 {
 	struct nfs4_layoutreturn *lrp = calldata;
 	struct pnfs_layout_hdr *lo = lrp->args.layout;
+	LIST_HEAD(freeme);
 	dprintk("--> %s\n", __func__);
 	spin_lock(&lo->plh_inode->i_lock);
 	if (lrp->res.lrs_present)
 		pnfs_set_layout_stateid(lo, &lrp->res.stateid, true);
+	pnfs_mark_matching_lsegs_invalid(lo, &freeme, &lrp->args.range);
 	pnfs_clear_layoutreturn_waitbit(lo);
-	clear_bit(NFS_LAYOUT_RETURN_BEFORE_CLOSE, &lo->plh_flags);
-	rpc_wake_up(&NFS_SERVER(lo->plh_inode)->roc_rpcwaitq);
 	lo->plh_block_lgets--;
 	spin_unlock(&lo->plh_inode->i_lock);
+	pnfs_free_lseg_list(&freeme);
 	pnfs_put_layout_hdr(lrp->args.layout);
 	nfs_iput_and_deactive(lrp->inode);
 	kfree(calldata);
 	.minor_version = 0,
 	.init_caps = NFS_CAP_READDIRPLUS
 		| NFS_CAP_ATOMIC_OPEN
-		| NFS_CAP_CHANGE_ATTR
 		| NFS_CAP_POSIX_LOCK,
 	.init_client = nfs40_init_client,
 	.shutdown_client = nfs40_shutdown_client,
 	.minor_version = 1,
 	.init_caps = NFS_CAP_READDIRPLUS
 		| NFS_CAP_ATOMIC_OPEN
-		| NFS_CAP_CHANGE_ATTR
 		| NFS_CAP_POSIX_LOCK
 		| NFS_CAP_STATEID_NFSV41
 		| NFS_CAP_ATOMIC_OPEN_V1,
 	.minor_version = 2,
 	.init_caps = NFS_CAP_READDIRPLUS
 		| NFS_CAP_ATOMIC_OPEN
-		| NFS_CAP_CHANGE_ATTR
 		| NFS_CAP_POSIX_LOCK
 		| NFS_CAP_STATEID_NFSV41
 		| NFS_CAP_ATOMIC_OPEN_V1

fs/nfs/nfs4state.c+20−9

@@ -2191,25 +2191,35 @@ static void nfs41_handle_server_reboot(struct nfs_client *clp) · 2190 unmodified lines
2191	}	2191	}
2192	}	2192	}
2193		2193
2194	static void nfs41_handle_state_revoked(struct nfs_client *clp)	2194	static void nfs41_handle_all_state_revoked(struct nfs_client *clp)
2195	{	2195	{
2196	nfs4_reset_all_state(clp);	2196	nfs4_reset_all_state(clp);
2197	dprintk("%s: state revoked on server %s\n", __func__, clp->cl_hostname);	2197	dprintk("%s: state revoked on server %s\n", __func__, clp->cl_hostname);
2198	}	2198	}
2199		2199
		2200	static void nfs41_handle_some_state_revoked(struct nfs_client *clp)
		2201	{
		2202	nfs4_state_mark_reclaim_helper(clp, nfs4_state_mark_reclaim_nograce);
		2203	nfs4_schedule_state_manager(clp);
		2204
		2205	dprintk("%s: state revoked on server %s\n", __func__, clp->cl_hostname);
		2206	}
		2207
2200	static void nfs41_handle_recallable_state_revoked(struct nfs_client *clp)	2208	static void nfs41_handle_recallable_state_revoked(struct nfs_client *clp)
2201	{	2209	{
2202	/* This will need to handle layouts too */	2210	/* FIXME: For now, we destroy all layouts. */
2203	nfs_expire_all_delegations(clp);	2211	pnfs_destroy_all_layouts(clp);
		2212	/* FIXME: For now, we test all delegations+open state+locks. */
		2213	nfs41_handle_some_state_revoked(clp);
2204	dprintk("%s: Recallable state revoked on server %s!\n", __func__,	2214	dprintk("%s: Recallable state revoked on server %s!\n", __func__,
2205	clp->cl_hostname);	2215	clp->cl_hostname);
2206	}	2216	}
2207		2217
2208	static void nfs41_handle_backchannel_fault(struct nfs_client *clp)	2218	static void nfs41_handle_backchannel_fault(struct nfs_client *clp)
2209	{	2219	{
2210	nfs_expire_all_delegations(clp);	2220	set_bit(NFS4CLNT_SESSION_RESET, &clp->cl_state);
2211	if (test_and_set_bit(NFS4CLNT_SESSION_RESET, &clp->cl_state) == 0)	2221	nfs4_schedule_state_manager(clp);
2212	nfs4_schedule_state_manager(clp);	2222
2213	dprintk("%s: server %s declared a backchannel fault\n", __func__,	2223	dprintk("%s: server %s declared a backchannel fault\n", __func__,
2214	clp->cl_hostname);	2224	clp->cl_hostname);
2215	}	2225	}
@@ -2231,10 +2241,11 @@ void nfs41_handle_sequence_flag_errors(struct nfs_client *clp, u32 flags) · 15 unmodified lines
2231		2241
2232	if (flags & SEQ4_STATUS_RESTART_RECLAIM_NEEDED)	2242	if (flags & SEQ4_STATUS_RESTART_RECLAIM_NEEDED)
2233	nfs41_handle_server_reboot(clp);	2243	nfs41_handle_server_reboot(clp);
2234	if (flags & (SEQ4_STATUS_EXPIRED_ALL_STATE_REVOKED \|	2244	if (flags & (SEQ4_STATUS_EXPIRED_ALL_STATE_REVOKED))
2235	SEQ4_STATUS_EXPIRED_SOME_STATE_REVOKED \|	2245	nfs41_handle_all_state_revoked(clp);
		2246	if (flags & (SEQ4_STATUS_EXPIRED_SOME_STATE_REVOKED \|
2236	SEQ4_STATUS_ADMIN_STATE_REVOKED))	2247	SEQ4_STATUS_ADMIN_STATE_REVOKED))
2237	nfs41_handle_state_revoked(clp);	2248	nfs41_handle_some_state_revoked(clp);
2238	if (flags & SEQ4_STATUS_LEASE_MOVED)	2249	if (flags & SEQ4_STATUS_LEASE_MOVED)
2239	nfs4_schedule_lease_moved_recovery(clp);	2250	nfs4_schedule_lease_moved_recovery(clp);
2240	if (flags & SEQ4_STATUS_RECALLABLE_STATE_REVOKED)	2251	if (flags & SEQ4_STATUS_RECALLABLE_STATE_REVOKED)

fs/nfs/pagelist.c+4−3

 		mirror->pg_base = 0;
 		mirror->pg_recoalesce = 0;
-		desc->pg_moreio = 0;
 		while (!list_empty(&head)) {
 			struct nfs_page *req;
 			nfs_list_remove_request(req);
 			if (__nfs_pageio_add_request(desc, req))
 				continue;
-			if (desc->pg_error < 0)
+			if (desc->pg_error < 0) {
+				list_splice_tail(&head, &mirror->pg_list);
+				mirror->pg_recoalesce = 1;
 				return 0;
+			}
 			break;
 		}
 	} while (mirror->pg_recoalesce);

fs/nfs/pnfs.c+57−44

@@ -352,7 +352,7 @@ pnfs_layout_need_return(struct pnfs_layout_hdr *lo, · 351 unmodified lines
352	{	352	{
353	struct pnfs_layout_segment *s;	353	struct pnfs_layout_segment *s;
354		354
355	if (!test_bit(NFS_LSEG_LAYOUTRETURN, &lseg->pls_flags))	355	if (!test_and_clear_bit(NFS_LSEG_LAYOUTRETURN, &lseg->pls_flags))
356	return false;	356	return false;
357		357
358	list_for_each_entry(s, &lo->plh_segs, pls_list)	358	list_for_each_entry(s, &lo->plh_segs, pls_list)
@@ -362,6 +362,18 @@ pnfs_layout_need_return(struct pnfs_layout_hdr *lo, · 3 unmodified lines
362	return true;	362	return true;
363	}	363	}
364		364
		365	static bool
		366	pnfs_prepare_layoutreturn(struct pnfs_layout_hdr *lo)
		367	{
		368	if (test_and_set_bit(NFS_LAYOUT_RETURN, &lo->plh_flags))
		369	return false;
		370	lo->plh_return_iomode = 0;
		371	lo->plh_block_lgets++;
		372	pnfs_get_layout_hdr(lo);
		373	clear_bit(NFS_LAYOUT_RETURN_BEFORE_CLOSE, &lo->plh_flags);
		374	return true;
		375	}
		376
365	static void pnfs_layoutreturn_before_put_lseg(struct pnfs_layout_segment *lseg,	377	static void pnfs_layoutreturn_before_put_lseg(struct pnfs_layout_segment *lseg,
366	struct pnfs_layout_hdr lo, struct inode inode)	378	struct pnfs_layout_hdr lo, struct inode inode)
367	{	379	{
@@ -372,17 +384,16 @@ static void pnfs_layoutreturn_before_put_lseg(struct pnfs_layout_segment *lseg, · 4 unmodified lines
372	if (pnfs_layout_need_return(lo, lseg)) {	384	if (pnfs_layout_need_return(lo, lseg)) {
373	nfs4_stateid stateid;	385	nfs4_stateid stateid;
374	enum pnfs_iomode iomode;	386	enum pnfs_iomode iomode;
		387	bool send;
375		388
376	stateid = lo->plh_stateid;	389	stateid = lo->plh_stateid;
377	iomode = lo->plh_return_iomode;	390	iomode = lo->plh_return_iomode;
378	/* decreased in pnfs_send_layoutreturn() */	391	send = pnfs_prepare_layoutreturn(lo);
379	lo->plh_block_lgets++;
380	lo->plh_return_iomode = 0;
381	spin_unlock(&inode->i_lock);	392	spin_unlock(&inode->i_lock);
382	pnfs_get_layout_hdr(lo);	393	if (send) {
383		394	/* Send an async layoutreturn so we dont deadlock */
384	/* Send an async layoutreturn so we dont deadlock */	395	pnfs_send_layoutreturn(lo, stateid, iomode, false);
385	pnfs_send_layoutreturn(lo, stateid, iomode, false);	396	}
386	} else	397	} else
387	spin_unlock(&inode->i_lock);	398	spin_unlock(&inode->i_lock);
388	}	399	}
@@ -411,6 +422,10 @@ pnfs_put_lseg(struct pnfs_layout_segment *lseg) · 22 unmodified lines
411	pnfs_layoutreturn_before_put_lseg(lseg, lo, inode);	422	pnfs_layoutreturn_before_put_lseg(lseg, lo, inode);
412		423
413	if (atomic_dec_and_lock(&lseg->pls_refcount, &inode->i_lock)) {	424	if (atomic_dec_and_lock(&lseg->pls_refcount, &inode->i_lock)) {
		425	if (test_bit(NFS_LSEG_VALID, &lseg->pls_flags)) {
		426	spin_unlock(&inode->i_lock);
		427	return;
		428	}
414	pnfs_get_layout_hdr(lo);	429	pnfs_get_layout_hdr(lo);
415	pnfs_layout_remove_lseg(lo, lseg);	430	pnfs_layout_remove_lseg(lo, lseg);
416	spin_unlock(&inode->i_lock);	431	spin_unlock(&inode->i_lock);
@@ -451,6 +466,8 @@ pnfs_put_lseg_locked(struct pnfs_layout_segment *lseg) · 34 unmodified lines
451	test_bit(NFS_LSEG_VALID, &lseg->pls_flags));	466	test_bit(NFS_LSEG_VALID, &lseg->pls_flags));
452	if (atomic_dec_and_test(&lseg->pls_refcount)) {	467	if (atomic_dec_and_test(&lseg->pls_refcount)) {
453	struct pnfs_layout_hdr *lo = lseg->pls_layout;	468	struct pnfs_layout_hdr *lo = lseg->pls_layout;
		469	if (test_bit(NFS_LSEG_VALID, &lseg->pls_flags))
		470	return;
454	pnfs_get_layout_hdr(lo);	471	pnfs_get_layout_hdr(lo);
455	pnfs_layout_remove_lseg(lo, lseg);	472	pnfs_layout_remove_lseg(lo, lseg);
456	pnfs_free_lseg_async(lseg);	473	pnfs_free_lseg_async(lseg);
@@ -924,6 +941,7 @@ void pnfs_clear_layoutreturn_waitbit(struct pnfs_layout_hdr *lo) · 467 unmodified lines
924	clear_bit_unlock(NFS_LAYOUT_RETURN, &lo->plh_flags);	941	clear_bit_unlock(NFS_LAYOUT_RETURN, &lo->plh_flags);
925	smp_mb__after_atomic();	942	smp_mb__after_atomic();
926	wake_up_bit(&lo->plh_flags, NFS_LAYOUT_RETURN);	943	wake_up_bit(&lo->plh_flags, NFS_LAYOUT_RETURN);
		944	rpc_wake_up(&NFS_SERVER(lo->plh_inode)->roc_rpcwaitq);
927	}	945	}
928		946
929	static int	947	static int
@@ -978,6 +996,7 @@ _pnfs_return_layout(struct inode *ino) · 48 unmodified lines
978	LIST_HEAD(tmp_list);	996	LIST_HEAD(tmp_list);
979	nfs4_stateid stateid;	997	nfs4_stateid stateid;
980	int status = 0, empty;	998	int status = 0, empty;
		999	bool send;
981		1000
982	dprintk("NFS: %s for inode %lu\n", __func__, ino->i_ino);	1001	dprintk("NFS: %s for inode %lu\n", __func__, ino->i_ino);
983		1002
@@ -1007,17 +1026,18 @@ _pnfs_return_layout(struct inode *ino) · 23 unmodified lines
1007	/* Don't send a LAYOUTRETURN if list was initially empty */	1026	/* Don't send a LAYOUTRETURN if list was initially empty */
1008	if (empty) {	1027	if (empty) {
1009	spin_unlock(&ino->i_lock);	1028	spin_unlock(&ino->i_lock);
1010	pnfs_put_layout_hdr(lo);
1011	dprintk("NFS: %s no layout segments to return\n", __func__);	1029	dprintk("NFS: %s no layout segments to return\n", __func__);
1012	goto out;	1030	goto out_put_layout_hdr;
1013	}	1031	}
1014		1032
1015	set_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags);	1033	set_bit(NFS_LAYOUT_INVALID_STID, &lo->plh_flags);
1016	lo->plh_block_lgets++;	1034	send = pnfs_prepare_layoutreturn(lo);
1017	spin_unlock(&ino->i_lock);	1035	spin_unlock(&ino->i_lock);
1018	pnfs_free_lseg_list(&tmp_list);	1036	pnfs_free_lseg_list(&tmp_list);
1019		1037	if (send)
1020	status = pnfs_send_layoutreturn(lo, stateid, IOMODE_ANY, true);	1038	status = pnfs_send_layoutreturn(lo, stateid, IOMODE_ANY, true);
		1039	out_put_layout_hdr:
		1040	pnfs_put_layout_hdr(lo);
1021	out:	1041	out:
1022	dprintk("<-- %s status: %d\n", __func__, status);	1042	dprintk("<-- %s status: %d\n", __func__, status);
1023	return status;	1043	return status;
@@ -1097,13 +1117,9 @@ bool pnfs_roc(struct inode *ino) · 73 unmodified lines
1097	out_noroc:	1117	out_noroc:
1098	if (lo) {	1118	if (lo) {
1099	stateid = lo->plh_stateid;	1119	stateid = lo->plh_stateid;
1100	layoutreturn =	1120	if (test_and_clear_bit(NFS_LAYOUT_RETURN_BEFORE_CLOSE,
1101	test_and_clear_bit(NFS_LAYOUT_RETURN_BEFORE_CLOSE,	1121	&lo->plh_flags))
1102	&lo->plh_flags);	1122	layoutreturn = pnfs_prepare_layoutreturn(lo);
1103	if (layoutreturn) {
1104	lo->plh_block_lgets++;
1105	pnfs_get_layout_hdr(lo);
1106	}
1107	}	1123	}
1108	spin_unlock(&ino->i_lock);	1124	spin_unlock(&ino->i_lock);
1109	if (layoutreturn) {	1125	if (layoutreturn) {
@@ -1146,15 +1162,18 @@ bool pnfs_roc_drain(struct inode ino, u32 barrier, struct rpc_task *task) · 36 unmodified lines
1146	struct pnfs_layout_segment *lseg;	1162	struct pnfs_layout_segment *lseg;
1147	nfs4_stateid stateid;	1163	nfs4_stateid stateid;
1148	u32 current_seqid;	1164	u32 current_seqid;
1149	bool found = false, layoutreturn = false;	1165	bool layoutreturn = false;
1150		1166
1151	spin_lock(&ino->i_lock);	1167	spin_lock(&ino->i_lock);
1152	list_for_each_entry(lseg, &nfsi->layout->plh_segs, pls_list)	1168	list_for_each_entry(lseg, &nfsi->layout->plh_segs, pls_list) {
1153	if (test_bit(NFS_LSEG_ROC, &lseg->pls_flags)) {	1169	if (!test_bit(NFS_LSEG_ROC, &lseg->pls_flags))
1154	rpc_sleep_on(&NFS_SERVER(ino)->roc_rpcwaitq, task, NULL);	1170	continue;
1155	found = true;	1171	if (test_bit(NFS_LSEG_VALID, &lseg->pls_flags))
1156	goto out;	1172	continue;
1157	}	1173	rpc_sleep_on(&NFS_SERVER(ino)->roc_rpcwaitq, task, NULL);
		1174	spin_unlock(&ino->i_lock);
		1175	return true;
		1176	}
1158	lo = nfsi->layout;	1177	lo = nfsi->layout;
1159	current_seqid = be32_to_cpu(lo->plh_stateid.seqid);	1178	current_seqid = be32_to_cpu(lo->plh_stateid.seqid);
1160		1179
@@ -1162,23 +1181,19 @@ bool pnfs_roc_drain(struct inode ino, u32 barrier, struct rpc_task *task) · 1 unmodified line
1162	* a barrier, we choose the worst-case barrier.	1181	* a barrier, we choose the worst-case barrier.
1163	*/	1182	*/
1164	*barrier = current_seqid + atomic_read(&lo->plh_outstanding);	1183	*barrier = current_seqid + atomic_read(&lo->plh_outstanding);
1165	out:	1184	stateid = lo->plh_stateid;
1166	if (!found) {	1185	if (test_and_clear_bit(NFS_LAYOUT_RETURN_BEFORE_CLOSE,
1167	stateid = lo->plh_stateid;	1186	&lo->plh_flags))
1168	layoutreturn =	1187	layoutreturn = pnfs_prepare_layoutreturn(lo);
1169	test_and_clear_bit(NFS_LAYOUT_RETURN_BEFORE_CLOSE,	1188	if (test_bit(NFS_LAYOUT_RETURN, &lo->plh_flags))
1170	&lo->plh_flags);	1189	rpc_sleep_on(&NFS_SERVER(ino)->roc_rpcwaitq, task, NULL);
1171	if (layoutreturn) {	1190
1172	lo->plh_block_lgets++;
1173	pnfs_get_layout_hdr(lo);
1174	}
1175	}
1176	spin_unlock(&ino->i_lock);	1191	spin_unlock(&ino->i_lock);
1177	if (layoutreturn) {	1192	if (layoutreturn) {
1178	rpc_sleep_on(&NFS_SERVER(ino)->roc_rpcwaitq, task, NULL);
1179	pnfs_send_layoutreturn(lo, stateid, IOMODE_ANY, false);	1193	pnfs_send_layoutreturn(lo, stateid, IOMODE_ANY, false);
		1194	return true;
1180	}	1195	}
1181	return found;	1196	return false;
1182	}	1197	}
1183		1198
1184	/*	1199	/*
@@ -1695,7 +1710,6 @@ void pnfs_error_mark_layout_for_return(struct inode *inode, · 510 unmodified lines
1695	spin_lock(&inode->i_lock);	1710	spin_lock(&inode->i_lock);
1696	/* set failure bit so that pnfs path will be retried later */	1711	/* set failure bit so that pnfs path will be retried later */
1697	pnfs_layout_set_fail_bit(lo, iomode);	1712	pnfs_layout_set_fail_bit(lo, iomode);
1698	set_bit(NFS_LAYOUT_RETURN, &lo->plh_flags);
1699	if (lo->plh_return_iomode == 0)	1713	if (lo->plh_return_iomode == 0)
1700	lo->plh_return_iomode = range.iomode;	1714	lo->plh_return_iomode = range.iomode;
1701	else if (lo->plh_return_iomode != range.iomode)	1715	else if (lo->plh_return_iomode != range.iomode)
@@ -2207,13 +2221,12 @@ pnfs_layoutcommit_inode(struct inode *inode, bool sync) · 505 unmodified lines
2207	if (ld->prepare_layoutcommit) {	2221	if (ld->prepare_layoutcommit) {
2208	status = ld->prepare_layoutcommit(&data->args);	2222	status = ld->prepare_layoutcommit(&data->args);
2209	if (status) {	2223	if (status) {
		2224	put_rpccred(data->cred);
2210	spin_lock(&inode->i_lock);	2225	spin_lock(&inode->i_lock);
2211	set_bit(NFS_INO_LAYOUTCOMMIT, &nfsi->flags);	2226	set_bit(NFS_INO_LAYOUTCOMMIT, &nfsi->flags);
2212	if (end_pos > nfsi->layout->plh_lwb)	2227	if (end_pos > nfsi->layout->plh_lwb)
2213	nfsi->layout->plh_lwb = end_pos;	2228	nfsi->layout->plh_lwb = end_pos;
2214	spin_unlock(&inode->i_lock);	2229	goto out_unlock;
2215	put_rpccred(data->cred);
2216	goto clear_layoutcommitting;
2217	}	2230	}
2218	}	2231	}
2219		2232

fs/nfs/write.c+9−6

 {
 	struct nfs_pgio_args *argp = &hdr->args;
 	struct nfs_pgio_res *resp = &hdr->res;
+	u64 size = argp->offset + resp->count;
 	if (!(fattr->valid & NFS_ATTR_FATTR_SIZE))
+		fattr->size = size;
+	if (nfs_size_to_loff_t(fattr->size) < i_size_read(hdr->inode)) {
+		fattr->valid &= ~NFS_ATTR_FATTR_SIZE;
 		return;
-	if (argp->offset + resp->count != fattr->size)
+	}
-		return;
+	if (size != fattr->size)
-	if (nfs_size_to_loff_t(fattr->size) < i_size_read(hdr->inode))
 		return;
 	/* Set attribute barrier */
 	nfs_fattr_set_barrier(fattr);
+	/* ...and update size */
+	fattr->valid |= NFS_ATTR_FATTR_SIZE;
 }
 void nfs_writeback_update_inode(struct nfs_pgio_header *hdr)
 {
-	struct nfs_fattr *fattr = hdr->res.fattr;
+	struct nfs_fattr *fattr = &hdr->fattr;
 	struct inode *inode = hdr->inode;
-	if (fattr == NULL)
-		return;
 	spin_lock(&inode->i_lock);
 	nfs_writeback_check_extend(hdr, fattr);
 	nfs_post_op_update_inode_force_wcc_locked(inode, fattr);

fs/nfsd/nfs4layouts.c+1−0

@@ -212,6 +212,7 @@ nfsd4_alloc_layout_stateid(struct nfsd4_compound_state *cstate, · 211 unmodified lines
212	BUG_ON(!ls->ls_file);	212	BUG_ON(!ls->ls_file);
213		213
214	if (nfsd4_layout_setlease(ls)) {	214	if (nfsd4_layout_setlease(ls)) {
		215	fput(ls->ls_file);
215	put_nfs4_file(fp);	216	put_nfs4_file(fp);
216	kmem_cache_free(nfs4_layout_stateid_cache, ls);	217	kmem_cache_free(nfs4_layout_stateid_cache, ls);
217	return NULL;	218	return NULL;

fs/nfsd/nfs4state.c+6−6

 	queue_delayed_work(laundry_wq, &nn->laundromat_work, t*HZ);
 }
-static inline __be32 nfs4_check_fh(struct svc_fh *fhp, struct nfs4_ol_stateid *stp)
+static inline __be32 nfs4_check_fh(struct svc_fh *fhp, struct nfs4_stid *stp)
 {
-	if (!fh_match(&fhp->fh_handle, &stp->st_stid.sc_file->fi_fhandle))
+	if (!fh_match(&fhp->fh_handle, &stp->sc_file->fi_fhandle))
 		return nfserr_bad_stateid;
 	return nfs_ok;
 }
 {
 	__be32 status;
-	status = nfs4_check_fh(fhp, ols);
-	if (status)
-		return status;
 	status = nfsd4_check_openowner_confirmed(ols);
 	if (status)
 		return status;
 		status = nfserr_bad_stateid;
 		break;
 	}
+	if (status)
+		goto out;
+	status = nfs4_check_fh(fhp, s);
 done:
 	if (!status && filpp)
 	status = check_stateid_generation(stateid, &stp->st_stid.sc_stateid, nfsd4_has_session(cstate));
 	if (status)
 		return status;
-	return nfs4_check_fh(current_fh, stp);
+	return nfs4_check_fh(current_fh, &stp->st_stid);
 }
 /*

fs/nfsd/nfs4xdr.c+6−5

 #define WORD0_ABSENT_FS_ATTRS (FATTR4_WORD0_FS_LOCATIONS | FATTR4_WORD0_FSID | \
 			      FATTR4_WORD0_RDATTR_ERROR)
 #define WORD1_ABSENT_FS_ATTRS FATTR4_WORD1_MOUNTED_ON_FILEID
+#define WORD2_ABSENT_FS_ATTRS 0
 #ifdef CONFIG_NFSD_V4_SECURITY_LABEL
 static inline __be32
 { return 0; }
 #endif
-static __be32 fattr_handle_absent_fs(u32 *bmval0, u32 *bmval1, u32 *rdattr_err)
+static __be32 fattr_handle_absent_fs(u32 *bmval0, u32 *bmval1, u32 *bmval2, u32 *rdattr_err)
 {
 	/* As per referral draft:  */
 	if (*bmval0 & ~WORD0_ABSENT_FS_ATTRS ||
 	}
 	*bmval0 &= WORD0_ABSENT_FS_ATTRS;
 	*bmval1 &= WORD1_ABSENT_FS_ATTRS;
+	*bmval2 &= WORD2_ABSENT_FS_ATTRS;
 	return 0;
 }
 	BUG_ON(bmval2 & ~nfsd_suppattrs2(minorversion));
 	if (exp->ex_fslocs.migrated) {
-		BUG_ON(bmval[2]);
+		status = fattr_handle_absent_fs(&bmval0, &bmval1, &bmval2, &rdattr_err);
-		status = fattr_handle_absent_fs(&bmval0, &bmval1, &rdattr_err);
 		if (status)
 			goto out;
 	}
 	}
 #ifdef CONFIG_NFSD_V4_SECURITY_LABEL
-	if ((bmval[2] & FATTR4_WORD2_SECURITY_LABEL) ||
+	if ((bmval2 & FATTR4_WORD2_SECURITY_LABEL) ||
-			bmval[0] & FATTR4_WORD0_SUPPORTED_ATTRS) {
+	     bmval0 & FATTR4_WORD0_SUPPORTED_ATTRS) {
 		err = security_inode_getsecctx(d_inode(dentry),
 						&context, &contextlen);
 		contextsupport = (err == 0);

fs/notify/mark.c+25−5

@@ -412,16 +412,36 @@ void fsnotify_clear_marks_by_group_flags(struct fsnotify_group *group, · 411 unmodified lines
412	unsigned int flags)	412	unsigned int flags)
413	{	413	{
414	struct fsnotify_mark lmark, mark;	414	struct fsnotify_mark lmark, mark;
		415	LIST_HEAD(to_free);
415		416
		417	/*
		418	* We have to be really careful here. Anytime we drop mark_mutex, e.g.
		419	* fsnotify_clear_marks_by_inode() can come and free marks. Even in our
		420	* to_free list so we have to use mark_mutex even when accessing that
		421	* list. And freeing mark requires us to drop mark_mutex. So we can
		422	* reliably free only the first mark in the list. That's why we first
		423	* move marks to free to to_free list in one go and then free marks in
		424	* to_free list one by one.
		425	*/
416	mutex_lock_nested(&group->mark_mutex, SINGLE_DEPTH_NESTING);	426	mutex_lock_nested(&group->mark_mutex, SINGLE_DEPTH_NESTING);
417	list_for_each_entry_safe(mark, lmark, &group->marks_list, g_list) {	427	list_for_each_entry_safe(mark, lmark, &group->marks_list, g_list) {
418	if (mark->flags & flags) {	428	if (mark->flags & flags)
419	fsnotify_get_mark(mark);	429	list_move(&mark->g_list, &to_free);
420	fsnotify_destroy_mark_locked(mark, group);
421	fsnotify_put_mark(mark);
422	}
423	}	430	}
424	mutex_unlock(&group->mark_mutex);	431	mutex_unlock(&group->mark_mutex);
		432
		433	while (1) {
		434	mutex_lock_nested(&group->mark_mutex, SINGLE_DEPTH_NESTING);
		435	if (list_empty(&to_free)) {
		436	mutex_unlock(&group->mark_mutex);
		437	break;
		438	}
		439	mark = list_first_entry(&to_free, struct fsnotify_mark, g_list);
		440	fsnotify_get_mark(mark);
		441	fsnotify_destroy_mark_locked(mark, group);
		442	mutex_unlock(&group->mark_mutex);
		443	fsnotify_put_mark(mark);
		444	}
425	}	445	}
426		446
427	/*	447	/*

fs/ocfs2/aops.c+2−2

@@ -685,7 +685,7 @@ static int ocfs2_direct_IO_zero_extend(struct ocfs2_super *osb, · 684 unmodified lines
685		685
686	if (p_cpos && !(ext_flags & OCFS2_EXT_UNWRITTEN)) {	686	if (p_cpos && !(ext_flags & OCFS2_EXT_UNWRITTEN)) {
687	u64 s = i_size_read(inode);	687	u64 s = i_size_read(inode);
688	sector_t sector = (p_cpos << (osb->s_clustersize_bits - 9)) +	688	sector_t sector = ((u64)p_cpos << (osb->s_clustersize_bits - 9)) +
689	(do_div(s, osb->s_clustersize) >> 9);	689	(do_div(s, osb->s_clustersize) >> 9);
690		690
691	ret = blkdev_issue_zeroout(osb->sb->s_bdev, sector,	691	ret = blkdev_issue_zeroout(osb->sb->s_bdev, sector,
@@ -910,7 +910,7 @@ static ssize_t ocfs2_direct_IO_write(struct kiocb *iocb, · 218 unmodified lines
910	BUG_ON(!p_cpos \|\| (ext_flags & OCFS2_EXT_UNWRITTEN));	910	BUG_ON(!p_cpos \|\| (ext_flags & OCFS2_EXT_UNWRITTEN));
911		911
912	ret = blkdev_issue_zeroout(osb->sb->s_bdev,	912	ret = blkdev_issue_zeroout(osb->sb->s_bdev,
913	p_cpos << (osb->s_clustersize_bits - 9),	913	(u64)p_cpos << (osb->s_clustersize_bits - 9),
914	zero_len_head >> 9, GFP_NOFS, false);	914	zero_len_head >> 9, GFP_NOFS, false);
915	if (ret < 0)	915	if (ret < 0)
916	mlog_errno(ret);	916	mlog_errno(ret);

fs/ocfs2/dlmglue.c+7−3

@@ -4025,9 +4025,13 @@ static void ocfs2_downconvert_thread_do_work(struct ocfs2_super *osb) · 4024 unmodified lines
4025	osb->dc_work_sequence = osb->dc_wake_sequence;	4025	osb->dc_work_sequence = osb->dc_wake_sequence;
4026		4026
4027	processed = osb->blocked_lock_count;	4027	processed = osb->blocked_lock_count;
4028	while (processed) {	4028	/*
4029	BUG_ON(list_empty(&osb->blocked_lock_list));	4029	* blocked lock processing in this loop might call iput which can
4030		4030	* remove items off osb->blocked_lock_list. Downconvert up to
		4031	* 'processed' number of locks, but stop short if we had some
		4032	* removed in ocfs2_mark_lockres_freeing when downconverting.
		4033	*/
		4034	while (processed && !list_empty(&osb->blocked_lock_list)) {
4031	lockres = list_entry(osb->blocked_lock_list.next,	4035	lockres = list_entry(osb->blocked_lock_list.next,
4032	struct ocfs2_lock_res, l_blocked_list);	4036	struct ocfs2_lock_res, l_blocked_list);
4033	list_del_init(&lockres->l_blocked_list);	4037	list_del_init(&lockres->l_blocked_list);

fs/signalfd.c+3−2

 		 * Other callers might not initialize the si_lsb field,
 		 * so check explicitly for the right codes here.
 		 */
-		if (kinfo->si_code == BUS_MCEERR_AR ||
+		if (kinfo->si_signo == SIGBUS &&
-		    kinfo->si_code == BUS_MCEERR_AO)
+		    (kinfo->si_code == BUS_MCEERR_AR ||
+		     kinfo->si_code == BUS_MCEERR_AO))
 			err |= __put_user((short) kinfo->si_addr_lsb,
 					  &uinfo->ssi_addr_lsb);
 #endif

fs/xfs/libxfs/xfs_attr_remote.c+34−10

 	struct xfs_buf	*bp)
 {
 	struct xfs_mount *mp = bp->b_target->bt_mount;
-	struct xfs_buf_log_item	*bip = bp->b_fspriv;
+	int		blksize = mp->m_attr_geo->blksize;
 	char		*ptr;
 	int		len;
 	xfs_daddr_t	bno;
-	int		blksize = mp->m_attr_geo->blksize;
 	/* no verification of non-crc buffers */
 	if (!xfs_sb_version_hascrc(&mp->m_sb))
 	ASSERT(len >= blksize);
 	while (len > 0) {
+		struct xfs_attr3_rmt_hdr *rmt = (struct xfs_attr3_rmt_hdr *)ptr;
 		if (!xfs_attr3_rmt_verify(mp, ptr, blksize, bno)) {
 			xfs_buf_ioerror(bp, -EFSCORRUPTED);
 			xfs_verifier_error(bp);
 			return;
 		}
-		if (bip) {
-			struct xfs_attr3_rmt_hdr *rmt;
-			rmt = (struct xfs_attr3_rmt_hdr *)ptr;
+		/*
-			rmt->rm_lsn = cpu_to_be64(bip->bli_item.li_lsn);
+		 * Ensure we aren't writing bogus LSNs to disk. See
+		 * xfs_attr3_rmt_hdr_set() for the explanation.
+		 */
+		if (rmt->rm_lsn != cpu_to_be64(NULLCOMMITLSN)) {
+			xfs_buf_ioerror(bp, -EFSCORRUPTED);
+			xfs_verifier_error(bp);
+			return;
 		}
 		xfs_update_cksum(ptr, blksize, XFS_ATTR3_RMT_CRC_OFF);
 	rmt->rm_owner = cpu_to_be64(ino);
 	rmt->rm_blkno = cpu_to_be64(bno);
+	/*
+	 * Remote attribute blocks are written synchronously, so we don't
+	 * have an LSN that we can stamp in them that makes any sense to log
+	 * recovery. To ensure that log recovery handles overwrites of these
+	 * blocks sanely (i.e. once they've been freed and reallocated as some
+	 * other type of metadata) we need to ensure that the LSN has a value
+	 * that tells log recovery to ignore the LSN and overwrite the buffer
+	 * with whatever is in it's log. To do this, we use the magic
+	 * NULLCOMMITLSN to indicate that the LSN is invalid.
+	 */
+	rmt->rm_lsn = cpu_to_be64(NULLCOMMITLSN);
 	return sizeof(struct xfs_attr3_rmt_hdr);
 }
 		/*
 		 * Allocate a single extent, up to the size of the value.
+		 *
+		 * Note that we have to consider this a data allocation as we
+		 * write the remote attribute without logging the contents.
+		 * Hence we must ensure that we aren't using blocks that are on
+		 * the busy list so that we don't overwrite blocks which have
+		 * recently been freed but their transactions are not yet
+		 * committed to disk. If we overwrite the contents of a busy
+		 * extent and then crash then the block may not contain the
+		 * correct metadata after log recovery occurs.
 		 */
 		xfs_bmap_init(args->flist, args->firstblock);
 		nmap = 1;
 		error = xfs_bmapi_write(args->trans, dp, (xfs_fileoff_t)lblkno,
-				  blkcnt,
+				  blkcnt, XFS_BMAPI_ATTRFORK, args->firstblock,
-				  XFS_BMAPI_ATTRFORK | XFS_BMAPI_METADATA,
+				  args->total, &map, &nmap, args->flist);
-				  args->firstblock, args->total, &map, &nmap,
-				  args->flist);
 		if (!error) {
 			error = xfs_bmap_finish(&args->trans, args->flist,
 						&committed);

fs/xfs/xfs_file.c+15−6

 	struct vm_area_struct	*vma,
 	struct vm_fault		*vmf)
 {
-	struct xfs_inode	*ip = XFS_I(file_inode(vma->vm_file));
+	struct inode		*inode = file_inode(vma->vm_file);
 	int			ret;
-	trace_xfs_filemap_fault(ip);
+	trace_xfs_filemap_fault(XFS_I(inode));
 	/* DAX can shortcut the normal fault path on write faults! */
-	if ((vmf->flags & FAULT_FLAG_WRITE) && IS_DAX(VFS_I(ip)))
+	if ((vmf->flags & FAULT_FLAG_WRITE) && IS_DAX(inode))
 		return xfs_filemap_page_mkwrite(vma, vmf);
-	xfs_ilock(ip, XFS_MMAPLOCK_SHARED);
+	xfs_ilock(XFS_I(inode), XFS_MMAPLOCK_SHARED);
-	ret = filemap_fault(vma, vmf);
+	if (IS_DAX(inode)) {
-	xfs_iunlock(ip, XFS_MMAPLOCK_SHARED);
+		/*
+		 * we do not want to trigger unwritten extent conversion on read
+		 * faults - that is unnecessary overhead and would also require
+		 * changes to xfs_get_blocks_direct() to map unwritten extent
+		 * ioend for conversion on read-only mappings.
+		 */
+		ret = __dax_fault(vma, vmf, xfs_get_blocks_direct, NULL);
+	} else
+		ret = filemap_fault(vma, vmf);
+	xfs_iunlock(XFS_I(inode), XFS_MMAPLOCK_SHARED);
 	return ret;
 }

fs/xfs/xfs_log_recover.c+8−3

 		uuid = &((struct xfs_dir3_blk_hdr *)blk)->uuid;
 		break;
 	case XFS_ATTR3_RMT_MAGIC:
-		lsn = be64_to_cpu(((struct xfs_attr3_rmt_hdr *)blk)->rm_lsn);
+		/*
-		uuid = &((struct xfs_attr3_rmt_hdr *)blk)->rm_uuid;
+		 * Remote attr blocks are written synchronously, rather than
-		break;
+		 * being logged. That means they do not contain a valid LSN
+		 * (i.e. transactionally ordered) in them, and hence any time we
+		 * see a buffer to replay over the top of a remote attribute
+		 * block we should simply do so.
+		 */
+		goto recover_immediately;
 	case XFS_SB_MAGIC:
 		lsn = be64_to_cpu(((struct xfs_dsb *)blk)->sb_lsn);
 		uuid = &((struct xfs_dsb *)blk)->sb_uuid;

include/drm/drmP.h+1−1

@@ -691,7 +691,7 @@ struct drm_vblank_crtc { · 690 unmodified lines
691	struct timer_list disable_timer; /* delayed disable timer */	691	struct timer_list disable_timer; /* delayed disable timer */
692		692
693	/* vblank counter, protected by dev->vblank_time_lock for writes */	693	/* vblank counter, protected by dev->vblank_time_lock for writes */
694	unsigned long count;	694	u32 count;
695	/* vblank timestamps, protected by dev->vblank_time_lock for writes */	695	/* vblank timestamps, protected by dev->vblank_time_lock for writes */
696	struct timeval time[DRM_VBLANKTIME_RBSIZE];	696	struct timeval time[DRM_VBLANKTIME_RBSIZE];
697		697

include/drm/drm_crtc.h+0−2

@@ -743,8 +743,6 @@ struct drm_connector { · 742 unmodified lines
743	uint8_t num_h_tile, num_v_tile;	743	uint8_t num_h_tile, num_v_tile;
744	uint8_t tile_h_loc, tile_v_loc;	744	uint8_t tile_h_loc, tile_v_loc;
745	uint16_t tile_h_size, tile_v_size;	745	uint16_t tile_h_size, tile_v_size;
746
747	struct list_head destroy_list;
748	};	746	};
749		747
750	/**	748	/**

include/drm/drm_crtc_helper.h+3−0

  * @get_modes: get mode list for this connector
  * @mode_valid: is this mode valid on the given connector? (optional)
  * @best_encoder: return the preferred encoder for this connector
+ * @atomic_best_encoder: atomic version of @best_encoder
  *
  * The helper operations are called by the mid-layer CRTC helper.
  */
 	enum drm_mode_status (*mode_valid)(struct drm_connector *connector,
 					   struct drm_display_mode *mode);
 	struct drm_encoder *(*best_encoder)(struct drm_connector *connector);
+	struct drm_encoder *(*atomic_best_encoder)(struct drm_connector *connector,
+						   struct drm_connector_state *connector_state);
 };
 extern void drm_helper_disable_unused_functions(struct drm_device *dev);

include/drm/drm_pciids.h+1−0

@@ -172,6 +172,7 @@ · 171 unmodified lines
172	{0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \	172	{0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \
173	{0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \	173	{0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \
174	{0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \	174	{0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_NEW_MEMMAP}, \
		175	{0x1002, 0x6617, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \
175	{0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \	176	{0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \
176	{0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \	177	{0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \
177	{0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \	178	{0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND\|RADEON_IS_MOBILITY\|RADEON_NEW_MEMMAP}, \

include/linux/ata.h+0−18

 	SATA_SSP		= 0x06,	/* Software Settings Preservation */
 	SATA_DEVSLP		= 0x09,	/* Device Sleep */
-	SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */
 	/* feature values for SET_MAX */
 	ATA_SET_MAX_ADDR	= 0x00,
 	ATA_SET_MAX_PASSWD	= 0x01,
 #define ata_id_cdb_intr(id)	(((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
 #define ata_id_has_da(id)	((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
 #define ata_id_has_devslp(id)	((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
-#define ata_id_has_ncq_autosense(id) \
-				((id)[ATA_ID_FEATURE_SUPP] & (1 << 7))
 static inline bool ata_id_has_hipm(const u16 *id)
 {
 	return false;
 }
-static inline bool ata_id_has_sense_reporting(const u16 *id)
-{
-	if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
-		return false;
-	return id[ATA_ID_COMMAND_SET_3] & (1 << 6);
-}
-static inline bool ata_id_sense_reporting_enabled(const u16 *id)
-{
-	if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
-		return false;
-	return id[ATA_ID_COMMAND_SET_4] & (1 << 6);
-}
 /**
  *	ata_id_major_version	-	get ATA level of drive
  *	@id: Identify data

include/linux/cpufreq.h+1−0

@@ -62,6 +62,7 @@ struct cpufreq_policy { · 61 unmodified lines
62	/* CPUs sharing clock, require sw coordination */	62	/* CPUs sharing clock, require sw coordination */
63	cpumask_var_t cpus; /* Online CPUs only */	63	cpumask_var_t cpus; /* Online CPUs only */
64	cpumask_var_t related_cpus; /* Online + Offline CPUs */	64	cpumask_var_t related_cpus; /* Online + Offline CPUs */
		65	cpumask_var_t real_cpus; /* Related and present */
65		66
66	unsigned int shared_type; /* ACPI: ANY or ALL affected CPUs	67	unsigned int shared_type; /* ACPI: ANY or ALL affected CPUs
67	should set cpufreq */	68	should set cpufreq */

include/linux/fs.h+3−2

 extern void __init inode_init(void);
 extern void __init inode_init_early(void);
-extern void __init files_init(unsigned long);
+extern void __init files_init(void);
+extern void __init files_maxfiles_init(void);
 extern struct files_stat_struct files_stat;
 extern unsigned long get_max_files(void);
 /* fs/dcache.c */
 extern void __init vfs_caches_init_early(void);
-extern void __init vfs_caches_init(unsigned long);
+extern void __init vfs_caches_init(void);
 extern struct kmem_cache *names_cachep;

include/linux/nfs_fs.h+5−2

 	struct nfs_inode *nfsi = NFS_I(inode);
 	spin_lock(&inode->i_lock);
-	nfsi->cache_validity |= NFS_INO_INVALID_ATTR|NFS_INO_INVALID_ACCESS;
+	nfsi->cache_validity |= NFS_INO_INVALID_ATTR |
+				NFS_INO_REVAL_PAGECACHE |
+				NFS_INO_INVALID_ACCESS |
+				NFS_INO_INVALID_ACL;
 	if (S_ISDIR(inode->i_mode))
-		nfsi->cache_validity |= NFS_INO_REVAL_PAGECACHE|NFS_INO_INVALID_DATA;
+		nfsi->cache_validity |= NFS_INO_INVALID_DATA;
 	spin_unlock(&inode->i_lock);
 }

include/linux/nfs_fs_sb.h+1−1

@@ -220,7 +220,7 @@ struct nfs_server { · 219 unmodified lines
220	#define NFS_CAP_SYMLINKS (1U << 2)	220	#define NFS_CAP_SYMLINKS (1U << 2)
221	#define NFS_CAP_ACLS (1U << 3)	221	#define NFS_CAP_ACLS (1U << 3)
222	#define NFS_CAP_ATOMIC_OPEN (1U << 4)	222	#define NFS_CAP_ATOMIC_OPEN (1U << 4)
223	#define NFS_CAP_CHANGE_ATTR (1U << 5)	223	/* #define NFS_CAP_CHANGE_ATTR (1U << 5) */
224	#define NFS_CAP_FILEID (1U << 6)	224	#define NFS_CAP_FILEID (1U << 6)
225	#define NFS_CAP_MODE (1U << 7)	225	#define NFS_CAP_MODE (1U << 7)
226	#define NFS_CAP_NLINK (1U << 8)	226	#define NFS_CAP_NLINK (1U << 8)

include/linux/of_device.h+1−1

@@ -59,7 +59,7 @@ void of_dma_configure(struct device dev, struct device_node np); · 58 unmodified lines
59	#else /* CONFIG_OF */	59	#else /* CONFIG_OF */
60		60
61	static inline int of_driver_match_device(struct device *dev,	61	static inline int of_driver_match_device(struct device *dev,
62	struct device_driver *drv)	62	const struct device_driver *drv)
63	{	63	{
64	return 0;	64	return 0;
65	}	65	}

include/linux/page-flags.h+7−3

 	 1 << PG_private | 1 << PG_private_2 | \
 	 1 << PG_writeback | 1 << PG_reserved | \
 	 1 << PG_slab	 | 1 << PG_swapcache | 1 << PG_active | \
-	 1 << PG_unevictable | __PG_MLOCKED | __PG_HWPOISON | \
+	 1 << PG_unevictable | __PG_MLOCKED | \
 	 __PG_COMPOUND_LOCK)
 /*
  * Flags checked when a page is prepped for return by the page allocator.
- * Pages being prepped should not have any flags set.  It they are set,
+ * Pages being prepped should not have these flags set.  It they are set,
  * there has been a kernel bug or struct page corruption.
+ *
+ * __PG_HWPOISON is exceptional because it needs to be kept beyond page's
+ * alloc-free cycle to prevent from reusing the page.
  */
-#define PAGE_FLAGS_CHECK_AT_PREP	((1 << NR_PAGEFLAGS) - 1)
+#define PAGE_FLAGS_CHECK_AT_PREP	\
+	(((1 << NR_PAGEFLAGS) - 1) & ~__PG_HWPOISON)
 #define PAGE_FLAGS_PRIVATE				\
 	(1 << PG_private | 1 << PG_private_2)

include/linux/platform_data/macb.h+11−3

 #ifndef __MACB_PDATA_H__
 #define __MACB_PDATA_H__
+/**
+ * struct macb_platform_data - platform data for MACB Ethernet
+ * @phy_mask:		phy mask passed when register the MDIO bus
+ *			within the driver
+ * @phy_irq_pin:	PHY IRQ
+ * @is_rmii:		using RMII interface?
+ * @rev_eth_addr:	reverse Ethernet address byte order
+ */
 struct macb_platform_data {
 	u32		phy_mask;
-	int		phy_irq_pin;	/* PHY IRQ */
+	int		phy_irq_pin;
-	u8		is_rmii;	/* using RMII interface? */
+	u8		is_rmii;
-	u8		rev_eth_addr;	/* reverse Ethernet address byte order */
+	u8		rev_eth_addr;
 };
 #endif /* __MACB_PDATA_H__ */

include/linux/skbuff.h+3−3

@@ -2884,11 +2884,11 @@ static inline bool skb_defer_rx_timestamp(struct sk_buff *skb) · 2883 unmodified lines
2884	*	2884	*
2885	* PHY drivers may accept clones of transmitted packets for	2885	* PHY drivers may accept clones of transmitted packets for
2886	* timestamping via their phy_driver.txtstamp method. These drivers	2886	* timestamping via their phy_driver.txtstamp method. These drivers
2887	* must call this function to return the skb back to the stack, with	2887	* must call this function to return the skb back to the stack with a
2888	* or without a timestamp.	2888	* timestamp.
2889	*	2889	*
2890	* @skb: clone of the the original outgoing packet	2890	* @skb: clone of the the original outgoing packet

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@@ -160,18 +160,18 @@ static inline void setup_protection_map(void) · 159 unmodified lines
160	protection_map[1] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);	160	protection_map[1] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
161	protection_map[2] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);	161	protection_map[2] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
162	protection_map[3] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);	162	protection_map[3] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
163	protection_map[4] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);	163	protection_map[4] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
164	protection_map[5] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);	164	protection_map[5] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
165	protection_map[6] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);	165	protection_map[6] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
166	protection_map[7] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);	166	protection_map[7] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
167		167
168	protection_map[8] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);	168	protection_map[8] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_NO_READ);
169	protection_map[9] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);	169	protection_map[9] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC);
170	protection_map[10] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE \| _PAGE_NO_READ);	170	protection_map[10] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE \| _PAGE_NO_READ);
171	protection_map[11] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE);	171	protection_map[11] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_EXEC \| _PAGE_WRITE);
172	protection_map[12] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_NO_READ);	172	protection_map[12] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
173	protection_map[13] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);	173	protection_map[13] = __pgprot(_page_cachable_default \| _PAGE_PRESENT);
174	protection_map[14] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE \| _PAGE_NO_READ);	174	protection_map[14] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);
175	protection_map[15] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);	175	protection_map[15] = __pgprot(_page_cachable_default \| _PAGE_PRESENT \| _PAGE_WRITE);
176		176
177	} else {	177	} else {

@@ -269,7 +269,7 @@ static void emit_bpf_tail_call(u8 **pprog) · 268 unmodified lines
269	EMIT4(0x48, 0x8B, 0x46, /* mov rax, qword ptr [rsi + 16] */	269	EMIT4(0x48, 0x8B, 0x46, /* mov rax, qword ptr [rsi + 16] */
270	offsetof(struct bpf_array, map.max_entries));	270	offsetof(struct bpf_array, map.max_entries));
271	EMIT3(0x48, 0x39, 0xD0); /* cmp rax, rdx */	271	EMIT3(0x48, 0x39, 0xD0); /* cmp rax, rdx */
272	#define OFFSET1 44 /* number of bytes to jump */	272	#define OFFSET1 47 /* number of bytes to jump */
273	EMIT2(X86_JBE, OFFSET1); /* jbe out */	273	EMIT2(X86_JBE, OFFSET1); /* jbe out */
274	label1 = cnt;	274	label1 = cnt;
275		275
@@ -278,15 +278,15 @@ static void emit_bpf_tail_call(u8 **pprog) · 2 unmodified lines
278	*/	278	*/
279	EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */	279	EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */
280	EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */	280	EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */
281	#define OFFSET2 33	281	#define OFFSET2 36
282	EMIT2(X86_JA, OFFSET2); /* ja out */	282	EMIT2(X86_JA, OFFSET2); /* ja out */
283	label2 = cnt;	283	label2 = cnt;
284	EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */	284	EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */
285	EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */	285	EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */
286		286
287	/* prog = array->prog[index]; */	287	/* prog = array->prog[index]; */
288	EMIT4(0x48, 0x8D, 0x44, 0xD6); /* lea rax, [rsi + rdx * 8 + 0x50] */	288	EMIT4_off32(0x48, 0x8D, 0x84, 0xD6, /* lea rax, [rsi + rdx * 8 + offsetof(...)] */
289	EMIT1(offsetof(struct bpf_array, prog));	289	offsetof(struct bpf_array, prog));
290	EMIT3(0x48, 0x8B, 0x00); /* mov rax, qword ptr [rax] */	290	EMIT3(0x48, 0x8B, 0x00); /* mov rax, qword ptr [rax] */
291		291
292	/* if (prog == NULL)	292	/* if (prog == NULL)