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drm/amdgpu: add a workaround for GDS ordered append hangs with compute queues

I'm not increasing the DRM version because GDS isn't totally without bugs yet. v2: update emit_ib_size

Marek Olšák committed 7 years ago

Commit 41cca161 parent 67dd1a36 files · +84 −6Browse files

Showing the changes to include/uapi (1 of 6 files). Show all

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include/uapi/drm/amdgpu_drm.h+5−0
@@ -566,6 +566,11 @@ union drm_amdgpu_cs { · 565 unmodified lines
566 * caches (L2/vL1/sL1/I$). */566 * caches (L2/vL1/sL1/I$). */
567#define AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE (1 << 3)567#define AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE (1 << 3)
568 568
569/* Set GDS_COMPUTE_MAX_WAVE_ID = DEFAULT before PACKET3_INDIRECT_BUFFER.
570 * This will reset wave ID counters for the IB.
571 */
572#define AMDGPU_IB_FLAG_RESET_GDS_MAX_WAVE_ID (1 << 4)
573
569struct drm_amdgpu_cs_chunk_ib {574struct drm_amdgpu_cs_chunk_ib {
570 __u32 _pad;575 __u32 _pad;
571 /** AMDGPU_IB_FLAG_* */576 /** AMDGPU_IB_FLAG_* */

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