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NTB: Add parameters for Intel SNB B2B addresses

Add module parameters for the addresses to be used in B2B topology.

Allen Hubbe committed 11 years ago

Commit 42fefc81 parent 2849b5d2 files · +68 −19Browse files

Unified · Split

2 files
  1. Documentation/ntb.txt +10 −0
  2. drivers/ntb/hw/intel/ntb_hw_intel.c +58 −19
Documentation/ntb.txt+10−0
@@ -56,3 +56,13 @@ Module Parameters: · 55 unmodified lines
56* b2b\_mw\_share - If the peer ntb is to be accessed via a memory window, and if56* b2b\_mw\_share - If the peer ntb is to be accessed via a memory window, and if
57 the memory window is large enough, still allow the client to use the57 the memory window is large enough, still allow the client to use the
58 second half of the memory window for address translation to the peer.58 second half of the memory window for address translation to the peer.
59* snb\_b2b\_usd\_bar2\_addr64 - If using B2B topology on Xeon hardware, use this
60 64 bit address on the bus between the NTB devices for the window at
61 BAR2, on the upstream side of the link.
62* snb\_b2b\_usd\_bar4\_addr64 - See *snb\_b2b\_bar2\_addr64*.
63* snb\_b2b\_usd\_bar4\_addr32 - See *snb\_b2b\_bar2\_addr64*.
64* snb\_b2b\_usd\_bar5\_addr32 - See *snb\_b2b\_bar2\_addr64*.
65* snb\_b2b\_dsd\_bar2\_addr64 - See *snb\_b2b\_bar2\_addr64*.
66* snb\_b2b\_dsd\_bar4\_addr64 - See *snb\_b2b\_bar2\_addr64*.
67* snb\_b2b\_dsd\_bar4\_addr32 - See *snb\_b2b\_bar2\_addr64*.
68* snb\_b2b\_dsd\_bar5\_addr32 - See *snb\_b2b\_bar2\_addr64*.
drivers/ntb/hw/intel/ntb_hw_intel.c+58−19
@@ -72,20 +72,6 @@ MODULE_AUTHOR("Intel Corporation"); · 71 unmodified lines
72#define bar0_off(base, bar) ((base) + ((bar) << 2))72#define bar0_off(base, bar) ((base) + ((bar) << 2))
73#define bar2_off(base, bar) bar0_off(base, (bar) - 2)73#define bar2_off(base, bar) bar0_off(base, (bar) - 2)
74 74
75static int b2b_mw_idx = -1;
76module_param(b2b_mw_idx, int, 0644);
77MODULE_PARM_DESC(b2b_mw_idx, "Use this mw idx to access the peer ntb. A "
78 "value of zero or positive starts from first mw idx, and a "
79 "negative value starts from last mw idx. Both sides MUST "
80 "set the same value here!");
81
82static unsigned int b2b_mw_share;
83module_param(b2b_mw_share, uint, 0644);
84MODULE_PARM_DESC(b2b_mw_share, "If the b2b mw is large enough, configure the "
85 "ntb so that the peer ntb only occupies the first half of "
86 "the mw, so the second half can still be used as a mw. Both "
87 "sides MUST set the same value here!");
88
89static const struct intel_ntb_reg bwd_reg;75static const struct intel_ntb_reg bwd_reg;
90static const struct intel_ntb_alt_reg bwd_pri_reg;76static const struct intel_ntb_alt_reg bwd_pri_reg;
91static const struct intel_ntb_alt_reg bwd_sec_reg;77static const struct intel_ntb_alt_reg bwd_sec_reg;
@@ -98,14 +84,67 @@ static const struct intel_ntb_alt_reg snb_sec_reg; · 6 unmodified lines
98static const struct intel_ntb_alt_reg snb_b2b_reg;84static const struct intel_ntb_alt_reg snb_b2b_reg;
99static const struct intel_ntb_xlat_reg snb_pri_xlat;85static const struct intel_ntb_xlat_reg snb_pri_xlat;
100static const struct intel_ntb_xlat_reg snb_sec_xlat;86static const struct intel_ntb_xlat_reg snb_sec_xlat;
101static const struct intel_b2b_addr snb_b2b_usd_addr;87static struct intel_b2b_addr snb_b2b_usd_addr;
102static const struct intel_b2b_addr snb_b2b_dsd_addr;88static struct intel_b2b_addr snb_b2b_dsd_addr;
103
104static const struct ntb_dev_ops intel_ntb_ops;89static const struct ntb_dev_ops intel_ntb_ops;
105 90
106static const struct file_operations intel_ntb_debugfs_info;91static const struct file_operations intel_ntb_debugfs_info;
107static struct dentry *debugfs_dir;92static struct dentry *debugfs_dir;
108 93
94static int b2b_mw_idx = -1;
95module_param(b2b_mw_idx, int, 0644);
96MODULE_PARM_DESC(b2b_mw_idx, "Use this mw idx to access the peer ntb. A "
97 "value of zero or positive starts from first mw idx, and a "
98 "negative value starts from last mw idx. Both sides MUST "
99 "set the same value here!");
100
101static unsigned int b2b_mw_share;
102module_param(b2b_mw_share, uint, 0644);
103MODULE_PARM_DESC(b2b_mw_share, "If the b2b mw is large enough, configure the "
104 "ntb so that the peer ntb only occupies the first half of "
105 "the mw, so the second half can still be used as a mw. Both "
106 "sides MUST set the same value here!");
107
108module_param_named(snb_b2b_usd_bar2_addr64,
109 snb_b2b_usd_addr.bar2_addr64, ullong, 0644);
110MODULE_PARM_DESC(snb_b2b_usd_bar2_addr64,
111 "SNB B2B USD BAR 2 64-bit address");
112
113module_param_named(snb_b2b_usd_bar4_addr64,
114 snb_b2b_usd_addr.bar4_addr64, ullong, 0644);
115MODULE_PARM_DESC(snb_b2b_usd_bar2_addr64,
116 "SNB B2B USD BAR 4 64-bit address");
117
118module_param_named(snb_b2b_usd_bar4_addr32,
119 snb_b2b_usd_addr.bar4_addr32, ullong, 0644);
120MODULE_PARM_DESC(snb_b2b_usd_bar2_addr64,
121 "SNB B2B USD split-BAR 4 32-bit address");
122
123module_param_named(snb_b2b_usd_bar5_addr32,
124 snb_b2b_usd_addr.bar5_addr32, ullong, 0644);
125MODULE_PARM_DESC(snb_b2b_usd_bar2_addr64,
126 "SNB B2B USD split-BAR 5 32-bit address");
127
128module_param_named(snb_b2b_dsd_bar2_addr64,
129 snb_b2b_dsd_addr.bar2_addr64, ullong, 0644);
130MODULE_PARM_DESC(snb_b2b_dsd_bar2_addr64,
131 "SNB B2B DSD BAR 2 64-bit address");
132
133module_param_named(snb_b2b_dsd_bar4_addr64,
134 snb_b2b_dsd_addr.bar4_addr64, ullong, 0644);
135MODULE_PARM_DESC(snb_b2b_dsd_bar2_addr64,
136 "SNB B2B DSD BAR 4 64-bit address");
137
138module_param_named(snb_b2b_dsd_bar4_addr32,
139 snb_b2b_dsd_addr.bar4_addr32, ullong, 0644);
140MODULE_PARM_DESC(snb_b2b_dsd_bar2_addr64,
141 "SNB B2B DSD split-BAR 4 32-bit address");
142
143module_param_named(snb_b2b_dsd_bar5_addr32,
144 snb_b2b_dsd_addr.bar5_addr32, ullong, 0644);
145MODULE_PARM_DESC(snb_b2b_dsd_bar2_addr64,
146 "SNB B2B DSD split-BAR 5 32-bit address");
147
109#ifndef ioread64148#ifndef ioread64
110#ifdef readq149#ifdef readq
111#define ioread64 readq150#define ioread64 readq
@@ -2073,14 +2112,14 @@ static const struct intel_ntb_xlat_reg snb_sec_xlat = { · 1961 unmodified lines
2073 .bar2_xlat = SNB_SBAR23XLAT_OFFSET,2112 .bar2_xlat = SNB_SBAR23XLAT_OFFSET,
2074};2113};
2075 2114
2076static const struct intel_b2b_addr snb_b2b_usd_addr = {2115static struct intel_b2b_addr snb_b2b_usd_addr = {
2077 .bar2_addr64 = SNB_B2B_BAR2_USD_ADDR64,2116 .bar2_addr64 = SNB_B2B_BAR2_USD_ADDR64,
2078 .bar4_addr64 = SNB_B2B_BAR4_USD_ADDR64,2117 .bar4_addr64 = SNB_B2B_BAR4_USD_ADDR64,
2079 .bar4_addr32 = SNB_B2B_BAR4_USD_ADDR32,2118 .bar4_addr32 = SNB_B2B_BAR4_USD_ADDR32,
2080 .bar5_addr32 = SNB_B2B_BAR5_USD_ADDR32,2119 .bar5_addr32 = SNB_B2B_BAR5_USD_ADDR32,
2081};2120};
2082 2121
2083static const struct intel_b2b_addr snb_b2b_dsd_addr = {2122static struct intel_b2b_addr snb_b2b_dsd_addr = {
2084 .bar2_addr64 = SNB_B2B_BAR2_DSD_ADDR64,2123 .bar2_addr64 = SNB_B2B_BAR2_DSD_ADDR64,
2085 .bar4_addr64 = SNB_B2B_BAR4_DSD_ADDR64,2124 .bar4_addr64 = SNB_B2B_BAR4_DSD_ADDR64,
2086 .bar4_addr32 = SNB_B2B_BAR4_DSD_ADDR32,2125 .bar4_addr32 = SNB_B2B_BAR4_DSD_ADDR32,