Merge tag 'for-5.14/libata-2021-06-27' of git://git.kernel.dk/linux-block

Pull libata updates from Jens Axboe: "The big change in this round is that we're finally in a position where we can sanely remove the old drivers/ide/ code, as libata covers everything we need by now. This is exciting for two reasons: 1) we delete a lot of legacy code that doesn't really meet the standards we have today, and 2) it enables us to clean up various bits in the block layer that exist only because of the old IDE code. Outside of that, just a few minor fixes here, fixups for warnings, etc" * tag 'for-5.14/libata-2021-06-27' of git://git.kernel.dk/linux-block: (29 commits) ata: rb532_cf: remove redundant codes ide: remove the legacy ide driver m68k: use libata instead of the legacy ide driver ARM: disable CONFIG_IDE in pxa_defconfig ARM: disable CONFIG_IDE in footbridge_defconfig alpha: use libata instead of the legacy ide driver pata_cypress: add a module option to disable BM-DMA ata: pata_macio: Avoid overwriting initialised field in 'pata_macio_sht' ata: pata_serverworks: Avoid overwriting initialised field in 'serverworks_osb4_sht ata: pata_sc1200: sc1200_sht'Avoid overwriting initialised field in ' ata: pata_cs5530: Avoid overwriting initialised field in 'cs5530_sht' ata: pata_cs5520: Avoid overwriting initialised field in 'cs5520_sht' ata: pata_atiixp: Avoid overwriting initialised field in 'atiixp_sht' ata: sata_nv: Do not over-write initialise fields in 'nv_adma_sht' and 'nv_swncq_sht' ata: sata_mv: Do not over-write initialise fields in 'mv6_sht' ata: sata_sil24: Do not over-write initialise fields in 'sil24_sht' ata: ahci: Ensure initialised fields are not overwritten in AHCI_SHT() ata: include: libata: Move fields commonly over-written to separate MACRO ahci: Add support for Dell S140 and later controllers ata: ahci_sunxi: Disable DIPM ...

Linus Torvalds committed 5 years ago

Commit 43bd8a62 parents 66d9282 1af11d0136 files · +224 −41635Browse files

Unified · Split

136 files

Documentation/userspace-api/ioctl/hdio.rst +25 −820
MAINTAINERS +0 −16
arch/alpha/configs/defconfig +6 −7
arch/arm/configs/footbridge_defconfig +0 −1
arch/arm/configs/pxa_defconfig +0 −2
arch/m68k/atari/config.c +2 −10
arch/m68k/configs/amiga_defconfig +5 −5
arch/m68k/configs/atari_defconfig +4 −4
arch/m68k/configs/mac_defconfig +4 −5
arch/m68k/configs/multi_defconfig +7 −9
arch/m68k/configs/q40_defconfig +4 −4
arch/m68k/mac/config.c +14 −10
arch/m68k/q40/config.c +31 −6
drivers/Kconfig +0 −2
drivers/Makefile +0 −1
drivers/ata/Kconfig +3 −3
drivers/ata/ahci.c +4 −0
drivers/ata/ahci.h +5 −2
drivers/ata/ahci_sunxi.c +1 −1
drivers/ata/pata_atiixp.c +2 −1
drivers/ata/pata_cs5520.c +2 −1
drivers/ata/pata_cs5530.c +2 −1
drivers/ata/pata_cypress.c +8 −2
drivers/ata/pata_ep93xx.c +1 −1
drivers/ata/pata_falcon.c +45 −17
drivers/ata/pata_macio.c +4 −1
drivers/ata/pata_octeon_cf.c +3 −2
drivers/ata/pata_rb532_cf.c +4 −4
drivers/ata/pata_sc1200.c +2 −1
drivers/ata/pata_serverworks.c +2 −1
drivers/ata/sata_fsl.c +1 −1
drivers/ata/sata_highbank.c +4 −2
drivers/ata/sata_mv.c +5 −1
drivers/ata/sata_nv.c +9 −3
drivers/ata/sata_sil24.c +4 −1
drivers/ide/Kconfig +0 −849
drivers/ide/Makefile +0 −111
drivers/ide/aec62xx.c +0 −331
drivers/ide/ali14xx.c +0 −250
drivers/ide/alim15x3.c +0 −602
drivers/ide/amd74xx.c +0 −343
drivers/ide/atiixp.c +0 −212
drivers/ide/buddha.c +0 −238
drivers/ide/cmd640.c +0 −848
drivers/ide/cmd64x.c +0 −452
drivers/ide/cs5520.c +0 −168
drivers/ide/cs5530.c +0 −295
drivers/ide/cs5535.c +0 −216
drivers/ide/cs5536.c +0 −294
drivers/ide/cy82c693.c +0 −234
drivers/ide/delkin_cb.c +0 −181
drivers/ide/dtc2278.c +0 −155
drivers/ide/falconide.c +0 −197
drivers/ide/gayle.c +0 −188
drivers/ide/hpt366.c +0 −1545
drivers/ide/ht6560b.c +0 −383
drivers/ide/icside.c +0 −692
drivers/ide/ide-4drives.c +0 −65
drivers/ide/ide-acpi.c +0 −622
drivers/ide/ide-atapi.c +0 −756
drivers/ide/ide-cd.c +0 −1858
drivers/ide/ide-cd.h +0 −123
drivers/ide/ide-cd_ioctl.c +0 −468
drivers/ide/ide-cd_verbose.c +0 −362
drivers/ide/ide-cs.c +0 −364
drivers/ide/ide-devsets.c +0 −192
drivers/ide/ide-disk.c +0 −795
drivers/ide/ide-disk.h +0 −30
drivers/ide/ide-disk_ioctl.c +0 −33
drivers/ide/ide-disk_proc.c +0 −125
drivers/ide/ide-dma-sff.c +0 −336
drivers/ide/ide-dma.c +0 −551
drivers/ide/ide-eh.c +0 −443
drivers/ide/ide-floppy.c +0 −551
drivers/ide/ide-floppy.h +0 −42
drivers/ide/ide-floppy_ioctl.c +0 −339
drivers/ide/ide-floppy_proc.c +0 −34
drivers/ide/ide-gd.c +0 −432
drivers/ide/ide-gd.h +0 −43
drivers/ide/ide-generic.c +0 −139
drivers/ide/ide-io-std.c +0 −262
drivers/ide/ide-io.c +0 −904
drivers/ide/ide-ioctls.c +0 −306
drivers/ide/ide-iops.c +0 −536
drivers/ide/ide-legacy.c +0 −59
drivers/ide/ide-lib.c +0 −146
drivers/ide/ide-park.c +0 −155
drivers/ide/ide-pci-generic.c +0 −203
drivers/ide/ide-pio-blacklist.c +0 −96
drivers/ide/ide-pm.c +0 −261
drivers/ide/ide-pnp.c +0 −92
drivers/ide/ide-probe.c +0 −1623
drivers/ide/ide-proc.c +0 −633
drivers/ide/ide-scan-pci.c +0 −113
drivers/ide/ide-sysfs.c +0 −143
drivers/ide/ide-tape.c +0 −2083
drivers/ide/ide-taskfile.c +0 −668
drivers/ide/ide-timings.c +0 −198
drivers/ide/ide-xfer-mode.c +0 −267
drivers/ide/ide.c +0 −415
drivers/ide/ide_platform.c +0 −133
drivers/ide/it8172.c +0 −165
drivers/ide/it8213.c +0 −217
drivers/ide/it821x.c +0 −715
drivers/ide/jmicron.c +0 −176
drivers/ide/macide.c +0 −161
drivers/ide/ns87415.c +0 −350
drivers/ide/opti621.c +0 −179
drivers/ide/palm_bk3710.c +0 −387
drivers/ide/pdc202xx_new.c +0 −557
drivers/ide/pdc202xx_old.c +0 −362
drivers/ide/piix.c +0 −476
drivers/ide/pmac.c +0 −1703
drivers/ide/q40ide.c +0 −168
drivers/ide/qd65xx.c +0 −446
drivers/ide/qd65xx.h +0 −145
drivers/ide/rapide.c +0 −106
drivers/ide/rz1000.c +0 −100
drivers/ide/sc1200.c +0 −355
drivers/ide/serverworks.c +0 −456
drivers/ide/setup-pci.c +0 −682
drivers/ide/siimage.c +0 −843
drivers/ide/sis5513.c +0 −637
drivers/ide/sl82c105.c +0 −367
drivers/ide/slc90e66.c +0 −182
drivers/ide/tc86c001.c +0 −270
drivers/ide/triflex.c +0 −143
drivers/ide/trm290.c +0 −374
drivers/ide/tx4938ide.c +0 −209
drivers/ide/tx4939ide.c +0 −628
drivers/ide/umc8672.c +0 −184
drivers/ide/via82cxxx.c +0 −532
include/linux/ata.h +1 −1
include/linux/ide.h +0 −1623
include/linux/libata.h +8 −5
include/linux/pci_ids.h +2 −0

Documentation/userspace-api/ioctl/hdio.rst+25−820

@@ -7,8 +7,8 @@ Summary of `HDIO_` ioctl calls · 6 unmodified lines
7	November, 2004	7	November, 2004
8		8
9	This document attempts to describe the ioctl(2) calls supported by	9	This document attempts to describe the ioctl(2) calls supported by
10	the HD/IDE layer. These are by-and-large implemented (as of Linux 2.6)	10	the HD/IDE layer. These are by-and-large implemented (as of Linux 5.11)
11	in drivers/ide/ide.c and drivers/block/scsi_ioctl.c	11	drivers/ata/libata-scsi.c.
12		12
13	ioctl values are listed in <linux/hdreg.h>. As of this writing, they	13	ioctl values are listed in <linux/hdreg.h>. As of this writing, they
14	are as follows:	14	are as follows:
@@ -17,50 +17,17 @@ are as follows: · 2 unmodified lines
17		17
18	======================= =======================================	18	======================= =======================================
19	HDIO_GETGEO get device geometry	19	HDIO_GETGEO get device geometry
20	HDIO_GET_UNMASKINTR get current unmask setting
21	HDIO_GET_MULTCOUNT get current IDE blockmode setting
22	HDIO_GET_QDMA get use-qdma flag
23	HDIO_SET_XFER set transfer rate via proc
24	HDIO_OBSOLETE_IDENTITY OBSOLETE, DO NOT USE
25	HDIO_GET_KEEPSETTINGS get keep-settings-on-reset flag
26	HDIO_GET_32BIT get current io_32bit setting	20	HDIO_GET_32BIT get current io_32bit setting
27	HDIO_GET_NOWERR get ignore-write-error flag
28	HDIO_GET_DMA get use-dma flag
29	HDIO_GET_NICE get nice flags
30	HDIO_GET_IDENTITY get IDE identification info	21	HDIO_GET_IDENTITY get IDE identification info
31	HDIO_GET_WCACHE get write cache mode on\|off
32	HDIO_GET_ACOUSTIC get acoustic value
33	HDIO_GET_ADDRESS get sector addressing mode
34	HDIO_GET_BUSSTATE get the bus state of the hwif
35	HDIO_TRISTATE_HWIF execute a channel tristate
36	HDIO_DRIVE_RESET execute a device reset
37	HDIO_DRIVE_TASKFILE execute raw taskfile	22	HDIO_DRIVE_TASKFILE execute raw taskfile
38	HDIO_DRIVE_TASK execute task and special drive command	23	HDIO_DRIVE_TASK execute task and special drive command
39	HDIO_DRIVE_CMD execute a special drive command	24	HDIO_DRIVE_CMD execute a special drive command
40	HDIO_DRIVE_CMD_AEB HDIO_DRIVE_TASK
41	======================= =======================================	25	======================= =======================================
42		26
43	ioctls that pass non-pointer values:	27	ioctls that pass non-pointer values:
44		28
45	======================= =======================================	29	======================= =======================================
46	HDIO_SET_MULTCOUNT change IDE blockmode
47	HDIO_SET_UNMASKINTR permit other irqs during I/O
48	HDIO_SET_KEEPSETTINGS keep ioctl settings on reset
49	HDIO_SET_32BIT change io_32bit flags	30	HDIO_SET_32BIT change io_32bit flags
50	HDIO_SET_NOWERR change ignore-write-error flag
51	HDIO_SET_DMA change use-dma flag
52	HDIO_SET_PIO_MODE reconfig interface to new speed
53	HDIO_SCAN_HWIF register and (re)scan interface
54	HDIO_SET_NICE set nice flags
55	HDIO_UNREGISTER_HWIF unregister interface
56	HDIO_SET_WCACHE change write cache enable-disable
57	HDIO_SET_ACOUSTIC change acoustic behavior
58	HDIO_SET_BUSSTATE set the bus state of the hwif
59	HDIO_SET_QDMA change use-qdma flag
60	HDIO_SET_ADDRESS change lba addressing modes
61
62	HDIO_SET_IDE_SCSI Set scsi emulation mode on/off
63	HDIO_SET_SCSI_IDE not implemented yet
64	======================= =======================================	31	======================= =======================================
65		32
66		33
@@ -137,512 +104,49 @@ HDIO_GETGEO · 70 unmodified lines
137		104
138		105
139		106
140		107	HDIO_GET_IDENTITY
141	HDIO_GET_UNMASKINTR	108	get IDE identification info
142	get current unmask setting
143
144
145	usage::
146
147	long val;
148
149	ioctl(fd, HDIO_GET_UNMASKINTR, &val);
150
151	inputs:
152	none
153
154
155
156	outputs:
157	The value of the drive's current unmask setting
158
159
160
161
162
163	HDIO_SET_UNMASKINTR
164	permit other irqs during I/O
165
166
167	usage::
168
169	unsigned long val;
170
171	ioctl(fd, HDIO_SET_UNMASKINTR, val);
172
173	inputs:
174	New value for unmask flag
175
176
177
178	outputs:
179	none
180
181
182
183	error return:
184	- EINVAL Called on a partition instead of the whole disk device
185	- EACCES Access denied: requires CAP_SYS_ADMIN
186	- EINVAL value out of range [0 1]
187	- EBUSY Controller busy
188
189
190
191
192	HDIO_GET_MULTCOUNT
193	get current IDE blockmode setting
194
195
196	usage::
197
198	long val;
199
200	ioctl(fd, HDIO_GET_MULTCOUNT, &val);
201
202	inputs:
203	none
204
205
206
207	outputs:
208	The value of the current IDE block mode setting. This
209	controls how many sectors the drive will transfer per
210	interrupt.
211
212
213
214	HDIO_SET_MULTCOUNT
215	change IDE blockmode
216
217
218	usage::
219
220	int val;
221
222	ioctl(fd, HDIO_SET_MULTCOUNT, val);
223
224	inputs:
225	New value for IDE block mode setting. This controls how many
226	sectors the drive will transfer per interrupt.
227
228	outputs:
229	none
230
231
232
233	error return:
234	- EINVAL Called on a partition instead of the whole disk device
235	- EACCES Access denied: requires CAP_SYS_ADMIN
236	- EINVAL value out of range supported by disk.
237	- EBUSY Controller busy or blockmode already set.
238	- EIO Drive did not accept new block mode.
239
240	notes:
241	Source code comments read::
242
243	This is tightly woven into the driver->do_special cannot
244	touch. DON'T do it again until a total personality rewrite
245	is committed.
246
247	If blockmode has already been set, this ioctl will fail with
248	-EBUSY
249
250
251
252	HDIO_GET_QDMA
253	get use-qdma flag
254
255
256	Not implemented, as of 2.6.8.1
257
258
259
260	HDIO_SET_XFER
261	set transfer rate via proc
262
263
264	Not implemented, as of 2.6.8.1
265
266
267
268	HDIO_OBSOLETE_IDENTITY
269	OBSOLETE, DO NOT USE
270
271
272	Same as HDIO_GET_IDENTITY (see below), except that it only
273	returns the first 142 bytes of drive identity information.
274
275
276
277	HDIO_GET_IDENTITY
278	get IDE identification info
279
280
281	usage::
282
283	unsigned char identity[512];
284
285	ioctl(fd, HDIO_GET_IDENTITY, identity);
286
287	inputs:
288	none
289
290
291
292	outputs:
293	ATA drive identity information. For full description, see
294	the IDENTIFY DEVICE and IDENTIFY PACKET DEVICE commands in
295	the ATA specification.
296
297	error returns:
298	- EINVAL Called on a partition instead of the whole disk device
299	- ENOMSG IDENTIFY DEVICE information not available
300
301	notes:
302	Returns information that was obtained when the drive was
303	probed. Some of this information is subject to change, and
304	this ioctl does not re-probe the drive to update the
305	information.
306
307	This information is also available from /proc/ide/hdX/identify
308
309
310
311	HDIO_GET_KEEPSETTINGS
312	get keep-settings-on-reset flag
313
314
315	usage::
316
317	long val;
318
319	ioctl(fd, HDIO_GET_KEEPSETTINGS, &val);
320
321	inputs:
322	none
323
324
325
326	outputs:
327	The value of the current "keep settings" flag
328
329
330
331	notes:
332	When set, indicates that kernel should restore settings
333	after a drive reset.
334
335
336
337	HDIO_SET_KEEPSETTINGS
338	keep ioctl settings on reset
339
340
341	usage::
342
343	long val;
344
345	ioctl(fd, HDIO_SET_KEEPSETTINGS, val);
346
347	inputs:
348	New value for keep_settings flag
349
350
351
352	outputs:
353	none
354
355
356
357	error return:
358	- EINVAL Called on a partition instead of the whole disk device
359	- EACCES Access denied: requires CAP_SYS_ADMIN
360	- EINVAL value out of range [0 1]
361	- EBUSY Controller busy
362
363
364
365	HDIO_GET_32BIT
366	get current io_32bit setting
367
368
369	usage::
370
371	long val;
372
373	ioctl(fd, HDIO_GET_32BIT, &val);
374
375	inputs:
376	none
377
378
379
380	outputs:
381	The value of the current io_32bit setting
382
383
384
385	notes:
386	0=16-bit, 1=32-bit, 2,3 = 32bit+sync
387
388
389
390
391
392	HDIO_GET_NOWERR
393	get ignore-write-error flag
394
395
396	usage::
397
398	long val;
399
400	ioctl(fd, HDIO_GET_NOWERR, &val);
401
402	inputs:
403	none
404
405
406
407	outputs:
408	The value of the current ignore-write-error flag
409
410
411
412
413
414	HDIO_GET_DMA
415	get use-dma flag
416
417
418	usage::
419
420	long val;
421
422	ioctl(fd, HDIO_GET_DMA, &val);
423
424	inputs:
425	none
426
427
428
429	outputs:
430	The value of the current use-dma flag
431
432
433
434
435
436	HDIO_GET_NICE
437	get nice flags
438
439
440	usage::
441
442	long nice;
443
444	ioctl(fd, HDIO_GET_NICE, &nice);
445
446	inputs:
447	none
448
449
450
451	outputs:
452	The drive's "nice" values.
453
454
455
456	notes:
457	Per-drive flags which determine when the system will give more
458	bandwidth to other devices sharing the same IDE bus.
459
460	See <linux/hdreg.h>, near symbol IDE_NICE_DSC_OVERLAP.
461
462
463
464
465	HDIO_SET_NICE
466	set nice flags
467
468
469	usage::
470
471	unsigned long nice;
472
473	...
474	ioctl(fd, HDIO_SET_NICE, nice);
475
476	inputs:
477	bitmask of nice flags.
478
479
480
481	outputs:
482	none
483
484
485
486	error returns:
487	- EACCES Access denied: requires CAP_SYS_ADMIN
488	- EPERM Flags other than DSC_OVERLAP and NICE_1 set.
489	- EPERM DSC_OVERLAP specified but not supported by drive
490
491	notes:
492	This ioctl sets the DSC_OVERLAP and NICE_1 flags from values
493	provided by the user.
494
495	Nice flags are listed in <linux/hdreg.h>, starting with
496	IDE_NICE_DSC_OVERLAP. These values represent shifts.
497
498
499
500
501
502	HDIO_GET_WCACHE
503	get write cache mode on\|off
504
505
506	usage::
507
508	long val;
509
510	ioctl(fd, HDIO_GET_WCACHE, &val);
511
512	inputs:
513	none
514
515
516
517	outputs:
518	The value of the current write cache mode
519
520
521
522
523
524	HDIO_GET_ACOUSTIC
525	get acoustic value
526
527
528	usage::
529
530	long val;
531
532	ioctl(fd, HDIO_GET_ACOUSTIC, &val);
533
534	inputs:
535	none
536
537
538
539	outputs:
540	The value of the current acoustic settings
541
542
543
544	notes:
545	See HDIO_SET_ACOUSTIC
546
547
548
549
550
551	HDIO_GET_ADDRESS
552	usage::
553
554
555	long val;
556
557	ioctl(fd, HDIO_GET_ADDRESS, &val);
558
559	inputs:
560	none
561
562
563
564	outputs:
565	The value of the current addressing mode:
566
567	= ===================
568	0 28-bit
569	1 48-bit
570	2 48-bit doing 28-bit
571	3 64-bit
572	= ===================
573
574
575
576	HDIO_GET_BUSSTATE
577	get the bus state of the hwif
578
579
580	usage::
581
582	long state;
583
584	ioctl(fd, HDIO_SCAN_HWIF, &state);
585
586	inputs:
587	none
588
589
590
591	outputs:
592	Current power state of the IDE bus. One of BUSSTATE_OFF,
593	BUSSTATE_ON, or BUSSTATE_TRISTATE
594
595	error returns:
596	- EACCES Access denied: requires CAP_SYS_ADMIN
597
598
599
600
601	HDIO_SET_BUSSTATE
602	set the bus state of the hwif
603		109
604		110
605	usage::	111	usage::
606		112
607	int state;	113	unsigned char identity[512];
608		114
609	...	115	ioctl(fd, HDIO_GET_IDENTITY, identity);
610	ioctl(fd, HDIO_SCAN_HWIF, state);
611		116
612	inputs:	117	inputs:
613	Desired IDE power state. One of BUSSTATE_OFF, BUSSTATE_ON,
614	or BUSSTATE_TRISTATE
615
616	outputs:
617	none	118	none
618		119
619		120
620		121
621	error returns:	122	outputs:
622	- EACCES Access denied: requires CAP_SYS_RAWIO	123	ATA drive identity information. For full description, see
623	- EOPNOTSUPP Hardware interface does not support bus power control	124	the IDENTIFY DEVICE and IDENTIFY PACKET DEVICE commands in
624		125	the ATA specification.
625
626
627		126
628	HDIO_TRISTATE_HWIF	127	error returns:
629	execute a channel tristate	128	- EINVAL Called on a partition instead of the whole disk device
		129	- ENOMSG IDENTIFY DEVICE information not available
630		130
		131	notes:
		132	Returns information that was obtained when the drive was
		133	probed. Some of this information is subject to change, and
		134	this ioctl does not re-probe the drive to update the
		135	information.
631		136
632	Not implemented, as of 2.6.8.1. See HDIO_SET_BUSSTATE	137	This information is also available from /proc/ide/hdX/identify
633		138
634		139
635		140
636	HDIO_DRIVE_RESET	141	HDIO_GET_32BIT
637	execute a device reset	142	get current io_32bit setting
638		143
639		144
640	usage::	145	usage::
641		146
642	int args[3]	147	long val;
643		148
644	...	149	ioctl(fd, HDIO_GET_32BIT, &val);
645	ioctl(fd, HDIO_DRIVE_RESET, args);
646		150
647	inputs:	151	inputs:
648	none	152	none
@@ -650,22 +154,12 @@ HDIO_DRIVE_RESET · 1 unmodified line
650		154
651		155
652	outputs:	156	outputs:
653	none	157	The value of the current io_32bit setting
654
655		158
656		159
657	error returns:
658	- EACCES Access denied: requires CAP_SYS_ADMIN
659	- ENXIO No such device: phy dead or ctl_addr == 0
660	- EIO I/O error: reset timed out or hardware error
661		160
662	notes:	161	notes:
663		162	0=16-bit, 1=32-bit, 2,3 = 32bit+sync
664	- Execute a reset on the device as soon as the current IO
665	operation has completed.
666
667	- Executes an ATAPI soft reset if applicable, otherwise
668	executes an ATA soft reset on the controller.
669		163
670		164
671		165
@@ -1026,14 +520,6 @@ HDIO_DRIVE_TASK · 354 unmodified lines
1026		520
1027		521
1028		522
1029	HDIO_DRIVE_CMD_AEB
1030	HDIO_DRIVE_TASK
1031
1032
1033	Not implemented, as of 2.6.8.1
1034
1035
1036
1037	HDIO_SET_32BIT	523	HDIO_SET_32BIT
1038	change io_32bit flags	524	change io_32bit flags
1039		525
@@ -1059,284 +545,3 @@ HDIO_SET_32BIT · 19 unmodified lines
1059	- EACCES Access denied: requires CAP_SYS_ADMIN	545	- EACCES Access denied: requires CAP_SYS_ADMIN
1060	- EINVAL value out of range [0 3]	546	- EINVAL value out of range [0 3]
1061	- EBUSY Controller busy	547	- EBUSY Controller busy
1062
1063
1064
1065
1066	HDIO_SET_NOWERR
1067	change ignore-write-error flag
1068
1069
1070	usage::
1071
1072	int val;
1073
1074	ioctl(fd, HDIO_SET_NOWERR, val);
1075
1076	inputs:
1077	New value for ignore-write-error flag. Used for ignoring
1078
1079
1080	WRERR_STAT
1081
1082	outputs:
1083	none
1084
1085
1086
1087	error return:
1088	- EINVAL Called on a partition instead of the whole disk device
1089	- EACCES Access denied: requires CAP_SYS_ADMIN
1090	- EINVAL value out of range [0 1]
1091	- EBUSY Controller busy
1092
1093
1094
1095	HDIO_SET_DMA
1096	change use-dma flag
1097
1098
1099	usage::
1100
1101	long val;
1102
1103	ioctl(fd, HDIO_SET_DMA, val);
1104
1105	inputs:
1106	New value for use-dma flag
1107
1108
1109
1110	outputs:
1111	none
1112
1113
1114
1115	error return:
1116	- EINVAL Called on a partition instead of the whole disk device
1117	- EACCES Access denied: requires CAP_SYS_ADMIN
1118	- EINVAL value out of range [0 1]
1119	- EBUSY Controller busy
1120
1121
1122
1123	HDIO_SET_PIO_MODE
1124	reconfig interface to new speed
1125
1126
1127	usage::
1128
1129	long val;
1130
1131	ioctl(fd, HDIO_SET_PIO_MODE, val);
1132
1133	inputs:
1134	New interface speed.
1135
1136
1137
1138	outputs:
1139	none
1140
1141
1142
1143	error return:
1144	- EINVAL Called on a partition instead of the whole disk device
1145	- EACCES Access denied: requires CAP_SYS_ADMIN
1146	- EINVAL value out of range [0 255]
1147	- EBUSY Controller busy
1148
1149
1150
1151	HDIO_SCAN_HWIF
1152	register and (re)scan interface
1153
1154
1155	usage::
1156
1157	int args[3]
1158
1159	...
1160	ioctl(fd, HDIO_SCAN_HWIF, args);
1161
1162	inputs:
1163
1164	======= =========================
1165	args[0] io address to probe
1166
1167
1168	args[1] control address to probe
1169	args[2] irq number
1170	======= =========================
1171
1172	outputs:
1173	none
1174
1175
1176
1177	error returns:
1178	- EACCES Access denied: requires CAP_SYS_RAWIO
1179	- EIO Probe failed.
1180
1181	notes:
1182	This ioctl initializes the addresses and irq for a disk
1183	controller, probes for drives, and creates /proc/ide
1184	interfaces as appropriate.
1185
1186
1187
1188	HDIO_UNREGISTER_HWIF
1189	unregister interface
1190
1191
1192	usage::
1193
1194	int index;
1195
1196	ioctl(fd, HDIO_UNREGISTER_HWIF, index);
1197
1198	inputs:
1199	index index of hardware interface to unregister
1200
1201
1202
1203	outputs:
1204	none
1205
1206
1207
1208	error returns:
1209	- EACCES Access denied: requires CAP_SYS_RAWIO
1210
1211	notes:
1212	This ioctl removes a hardware interface from the kernel.
1213
1214	Currently (2.6.8) this ioctl silently fails if any drive on
1215	the interface is busy.
1216
1217
1218
1219	HDIO_SET_WCACHE
1220	change write cache enable-disable
1221
1222
1223	usage::
1224
1225	int val;
1226
1227	ioctl(fd, HDIO_SET_WCACHE, val);
1228
1229	inputs:
1230	New value for write cache enable
1231
1232
1233
1234	outputs:
1235	none
1236
1237
1238
1239	error return:
1240	- EINVAL Called on a partition instead of the whole disk device
1241	- EACCES Access denied: requires CAP_SYS_ADMIN
1242	- EINVAL value out of range [0 1]
1243	- EBUSY Controller busy
1244
1245
1246
1247	HDIO_SET_ACOUSTIC
1248	change acoustic behavior
1249
1250
1251	usage::
1252
1253	int val;
1254
1255	ioctl(fd, HDIO_SET_ACOUSTIC, val);
1256
1257	inputs:
1258	New value for drive acoustic settings
1259
1260
1261
1262	outputs:
1263	none
1264
1265
1266
1267	error return:
1268	- EINVAL Called on a partition instead of the whole disk device
1269	- EACCES Access denied: requires CAP_SYS_ADMIN
1270	- EINVAL value out of range [0 254]
1271	- EBUSY Controller busy
1272
1273
1274
1275	HDIO_SET_QDMA
1276	change use-qdma flag
1277
1278
1279	Not implemented, as of 2.6.8.1
1280
1281
1282
1283	HDIO_SET_ADDRESS
1284	change lba addressing modes
1285
1286
1287	usage::
1288
1289	int val;
1290
1291	ioctl(fd, HDIO_SET_ADDRESS, val);
1292
1293	inputs:
1294	New value for addressing mode
1295
1296	= ===================
1297	0 28-bit
1298	1 48-bit
1299	2 48-bit doing 28-bit
1300	= ===================
1301
1302	outputs:
1303	none
1304
1305
1306
1307	error return:
1308	- EINVAL Called on a partition instead of the whole disk device
1309	- EACCES Access denied: requires CAP_SYS_ADMIN
1310	- EINVAL value out of range [0 2]
1311	- EBUSY Controller busy
1312	- EIO Drive does not support lba48 mode.
1313
1314
1315	HDIO_SET_IDE_SCSI
1316	usage::
1317
1318
1319	long val;
1320
1321	ioctl(fd, HDIO_SET_IDE_SCSI, val);
1322
1323	inputs:
1324	New value for scsi emulation mode (?)
1325
1326
1327
1328	outputs:
1329	none
1330
1331
1332
1333	error return:
1334	- EINVAL Called on a partition instead of the whole disk device
1335	- EACCES Access denied: requires CAP_SYS_ADMIN
1336	- EINVAL value out of range [0 1]
1337	- EBUSY Controller busy
1338
1339
1340
1341	HDIO_SET_SCSI_IDE
1342	Not implemented, as of 2.6.8.1

MAINTAINERS+0−16

@@ -8771,22 +8771,6 @@ L: linux-i2c@vger.kernel.org · 8770 unmodified lines
8771	S: Maintained	8771	S: Maintained
8772	F: drivers/i2c/busses/i2c-icy.c	8772	F: drivers/i2c/busses/i2c-icy.c
8773		8773
8774	IDE SUBSYSTEM
8775	M: "David S. Miller" <davem@davemloft.net>
8776	L: linux-ide@vger.kernel.org
8777	S: Maintained
8778	Q: http://patchwork.ozlabs.org/project/linux-ide/list/
8779	T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide.git
8780	F: Documentation/ide/
8781	F: drivers/ide/
8782	F: include/linux/ide.h
8783
8784	IDE/ATAPI DRIVERS
8785	L: linux-ide@vger.kernel.org
8786	S: Orphan
8787	F: Documentation/cdrom/ide-cd.rst
8788	F: drivers/ide/ide-cd*
8789
8790	IDEAPAD LAPTOP EXTRAS DRIVER	8774	IDEAPAD LAPTOP EXTRAS DRIVER
8791	M: Ike Panhc <ike.pan@canonical.com>	8775	M: Ike Panhc <ike.pan@canonical.com>
8792	L: platform-driver-x86@vger.kernel.org	8776	L: platform-driver-x86@vger.kernel.org

arch/alpha/configs/defconfig+6−7

 CONFIG_ISAPNP=y
 CONFIG_BLK_DEV_FD=y
 CONFIG_BLK_DEV_LOOP=m
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_IDE_GENERIC=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_ALI15X3=y
-CONFIG_BLK_DEV_CMD64X=y
-CONFIG_BLK_DEV_CY82C693=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_SCSI_AIC7XXX=m
 CONFIG_AIC7XXX_CMDS_PER_DEVICE=253
 # CONFIG_AIC7XXX_DEBUG_ENABLE is not set
+CONFIG_ATA=y
+# CONFIG_SATA_PMP is not set
+CONFIG_PATA_ALI=y
+CONFIG_PATA_CMD64X=y
+CONFIG_PATA_CYPRESS=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=m
 CONFIG_NET_ETHERNET=y

arch/arm/configs/footbridge_defconfig+0−1

@@ -64,7 +64,6 @@ CONFIG_PARIDE_ON26=m · 63 unmodified lines
64	CONFIG_BLK_DEV_LOOP=m	64	CONFIG_BLK_DEV_LOOP=m
65	CONFIG_BLK_DEV_NBD=m	65	CONFIG_BLK_DEV_NBD=m
66	CONFIG_BLK_DEV_RAM=y	66	CONFIG_BLK_DEV_RAM=y
67	CONFIG_IDE=y
68	CONFIG_NETDEVICES=y	67	CONFIG_NETDEVICES=y
69	CONFIG_NET_ETHERNET=y	68	CONFIG_NET_ETHERNET=y
70	CONFIG_NET_VENDOR_3COM=y	69	CONFIG_NET_VENDOR_3COM=y

arch/arm/configs/pxa_defconfig+0−2

 CONFIG_AD5446=m
 CONFIG_EEPROM_AT24=m
 CONFIG_SENSORS_LIS3_SPI=m
-CONFIG_IDE=m
-CONFIG_BLK_DEV_IDECS=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=m
 CONFIG_CHR_DEV_ST=m

arch/m68k/atari/config.c+2−10

 #define FALCON_IDE_BASE	0xfff00000
 static const struct resource atari_falconide_rsrc[] __initconst = {
-	{
+	DEFINE_RES_MEM(FALCON_IDE_BASE, 0x38),
-		.flags = IORESOURCE_MEM,
+	DEFINE_RES_MEM(FALCON_IDE_BASE + 0x38, 2),
-		.start = FALCON_IDE_BASE,
-		.end   = FALCON_IDE_BASE + 0x39,
-	},
-	{
-		.flags = IORESOURCE_IRQ,
-		.start = IRQ_MFP_FSCSI,
-		.end   = IRQ_MFP_FSCSI,
-	},
 };
 int __init atari_platform_init(void)

arch/m68k/configs/amiga_defconfig+5−5

 CONFIG_CDROM_PKTCDVD=m
 CONFIG_ATA_OVER_ETH=m
 CONFIG_DUMMY_IRQ=m
-CONFIG_IDE=y
-CONFIG_IDE_GD_ATAPI=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_GAYLE=y
-CONFIG_BLK_DEV_BUDDHA=y
 CONFIG_RAID_ATTRS=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_A4000T=y
 CONFIG_SCSI_ZORRO7XX=y
 CONFIG_SCSI_ZORRO_ESP=y
+CONFIG_ATA=y
+# CONFIG_ATA_VERBOSE_ERROR is not set
+# CONFIG_ATA_BMDMA is not set
+CONFIG_PATA_GAYLE=y
+CONFIG_PATA_BUDDHA=y
 CONFIG_MD=y
 CONFIG_MD_LINEAR=m
 CONFIG_BLK_DEV_DM=m

arch/m68k/configs/atari_defconfig+4−4

 CONFIG_CDROM_PKTCDVD=m
 CONFIG_ATA_OVER_ETH=m
 CONFIG_DUMMY_IRQ=m
-CONFIG_IDE=y
-CONFIG_IDE_GD_ATAPI=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_FALCON_IDE=y
 CONFIG_RAID_ATTRS=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_ISCSI_TCP=m
 CONFIG_ISCSI_BOOT_SYSFS=m
 CONFIG_ATARI_SCSI=y
+CONFIG_ATA=y
+# CONFIG_ATA_VERBOSE_ERROR is not set
+# CONFIG_ATA_BMDMA is not set
+CONFIG_PATA_FALCON=y
 CONFIG_MD=y
 CONFIG_MD_LINEAR=m
 CONFIG_BLK_DEV_DM=m

arch/m68k/configs/mac_defconfig+4−5

 CONFIG_CDROM_PKTCDVD=m
 CONFIG_ATA_OVER_ETH=m
 CONFIG_DUMMY_IRQ=m
-CONFIG_IDE=y
-CONFIG_IDE_GD_ATAPI=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_PLATFORM=y
-CONFIG_BLK_DEV_MAC_IDE=y
 CONFIG_RAID_ATTRS=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_ISCSI_BOOT_SYSFS=m
 CONFIG_MAC_SCSI=y
 CONFIG_SCSI_MAC_ESP=y
+CONFIG_ATA=y
+# CONFIG_ATA_VERBOSE_ERROR is not set
+# CONFIG_ATA_BMDMA is not set
+CONFIG_PATA_PLATFORM=y
 CONFIG_MD=y
 CONFIG_MD_LINEAR=m
 CONFIG_BLK_DEV_DM=m

arch/m68k/configs/multi_defconfig+7−9

 CONFIG_CDROM_PKTCDVD=m
 CONFIG_ATA_OVER_ETH=m
 CONFIG_DUMMY_IRQ=m
-CONFIG_IDE=y
-CONFIG_IDE_GD_ATAPI=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_PLATFORM=y
-CONFIG_BLK_DEV_GAYLE=y
-CONFIG_BLK_DEV_BUDDHA=y
-CONFIG_BLK_DEV_FALCON_IDE=y
-CONFIG_BLK_DEV_MAC_IDE=y
-CONFIG_BLK_DEV_Q40IDE=y
 CONFIG_RAID_ATTRS=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_MVME16x_SCSI=y
 CONFIG_BVME6000_SCSI=y
 CONFIG_SUN3X_ESP=y
+CONFIG_ATA=y
+# CONFIG_ATA_VERBOSE_ERROR is not set
+# CONFIG_ATA_BMDMA is not set
+CONFIG_PATA_FALCON=y
+CONFIG_PATA_GAYLE=y
+CONFIG_PATA_BUDDHA=y
+CONFIG_PATA_PLATFORM=y
 CONFIG_MD=y
 CONFIG_MD_LINEAR=m
 CONFIG_BLK_DEV_DM=m

arch/m68k/configs/q40_defconfig+4−4

 CONFIG_CDROM_PKTCDVD=m
 CONFIG_ATA_OVER_ETH=m
 CONFIG_DUMMY_IRQ=m
-CONFIG_IDE=y
-CONFIG_IDE_GD_ATAPI=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_Q40IDE=y
 CONFIG_RAID_ATTRS=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_SAS_ATTRS=m
 CONFIG_ISCSI_TCP=m
 CONFIG_ISCSI_BOOT_SYSFS=m
+CONFIG_ATA=y
+# CONFIG_ATA_VERBOSE_ERROR is not set
+# CONFIG_ATA_BMDMA is not set
+CONFIG_PATA_FALCON=y
 CONFIG_MD=y
 CONFIG_MD_LINEAR=m
 CONFIG_BLK_DEV_DM=m

arch/m68k/mac/config.c+14−10

 	},
 };
-static const struct resource mac_ide_quadra_rsrc[] __initconst = {
+static const struct resource mac_pata_quadra_rsrc[] __initconst = {
-	DEFINE_RES_MEM(0x50F1A000, 0x104),
+	DEFINE_RES_MEM(0x50F1A000, 0x38),
+	DEFINE_RES_MEM(0x50F1A038, 0x04),
 	DEFINE_RES_IRQ(IRQ_NUBUS_F),
 };
-static const struct resource mac_ide_pb_rsrc[] __initconst = {
+static const struct resource mac_pata_pb_rsrc[] __initconst = {
-	DEFINE_RES_MEM(0x50F1A000, 0x104),
+	DEFINE_RES_MEM(0x50F1A000, 0x38),
+	DEFINE_RES_MEM(0x50F1A038, 0x04),
 	DEFINE_RES_IRQ(IRQ_NUBUS_C),
 };
 	DEFINE_RES_IRQ(IRQ_BABOON_1),
 };
-static const struct pata_platform_info mac_pata_baboon_data __initconst = {
+static const struct pata_platform_info mac_pata_data __initconst = {
 	.ioport_shift = 2,
 };
 	switch (macintosh_config->ide_type) {
 	case MAC_IDE_QUADRA:
-		platform_device_register_simple("mac_ide", -1,
+		platform_device_register_resndata(NULL, "pata_platform", -1,
-			mac_ide_quadra_rsrc, ARRAY_SIZE(mac_ide_quadra_rsrc));
+			mac_pata_quadra_rsrc, ARRAY_SIZE(mac_pata_quadra_rsrc),
+			&mac_pata_data, sizeof(mac_pata_data));
 		break;
 	case MAC_IDE_PB:
-		platform_device_register_simple("mac_ide", -1,
+		platform_device_register_resndata(NULL, "pata_platform", -1,
-			mac_ide_pb_rsrc, ARRAY_SIZE(mac_ide_pb_rsrc));
+			mac_pata_pb_rsrc, ARRAY_SIZE(mac_pata_pb_rsrc),
+			&mac_pata_data, sizeof(mac_pata_data));
 		break;
 	case MAC_IDE_BABOON:
 		platform_device_register_resndata(NULL, "pata_platform", -1,
 			mac_pata_baboon_rsrc, ARRAY_SIZE(mac_pata_baboon_rsrc),
-			&mac_pata_baboon_data, sizeof(mac_pata_baboon_data));
+			&mac_pata_data, sizeof(mac_pata_data));
 		break;
 	}

arch/m68k/q40/config.c+31−6

@@ -286,14 +286,39 @@ static int q40_set_rtc_pll(struct rtc_pll_info *pll) · 285 unmodified lines
286	return -EINVAL;	286	return -EINVAL;
287	}	287	}
288		288
289	static __init int q40_add_kbd_device(void)	289	#define PCIDE_BASE1 0x1f0
290	{	290	#define PCIDE_BASE2 0x170
291	struct platform_device *pdev;	291	#define PCIDE_CTL 0x206
		292
		293	static const struct resource q40_pata_rsrc_0[] __initconst = {
		294	DEFINE_RES_MEM(q40_isa_io_base + PCIDE_BASE1 * 4, 0x38),
		295	DEFINE_RES_MEM(q40_isa_io_base + (PCIDE_BASE1 + PCIDE_CTL) * 4, 2),
		296	DEFINE_RES_IO(PCIDE_BASE1, 8),
		297	DEFINE_RES_IO(PCIDE_BASE1 + PCIDE_CTL, 1),
		298	DEFINE_RES_IRQ(14),
		299	};
292		300
		301	static const struct resource q40_pata_rsrc_1[] __initconst = {
		302	DEFINE_RES_MEM(q40_isa_io_base + PCIDE_BASE2 * 4, 0x38),
		303	DEFINE_RES_MEM(q40_isa_io_base + (PCIDE_BASE2 + PCIDE_CTL) * 4, 2),
		304	DEFINE_RES_IO(PCIDE_BASE2, 8),
		305	DEFINE_RES_IO(PCIDE_BASE2 + PCIDE_CTL, 1),
		306	DEFINE_RES_IRQ(15),
		307	};
		308
		309	static __init int q40_platform_init(void)
		310	{
293	if (!MACH_IS_Q40)	311	if (!MACH_IS_Q40)
294	return -ENODEV;	312	return -ENODEV;
295		313
296	pdev = platform_device_register_simple("q40kbd", -1, NULL, 0);	314	platform_device_register_simple("q40kbd", -1, NULL, 0);
297	return PTR_ERR_OR_ZERO(pdev);	315
		316	platform_device_register_simple("atari-falcon-ide", 0, q40_pata_rsrc_0,
		317	ARRAY_SIZE(q40_pata_rsrc_0));
		318
		319	platform_device_register_simple("atari-falcon-ide", 1, q40_pata_rsrc_1,
		320	ARRAY_SIZE(q40_pata_rsrc_1));
		321
		322	return 0;
298	}	323	}
299	arch_initcall(q40_add_kbd_device);	324	arch_initcall(q40_platform_init);

drivers/Kconfig+0−2

@@ -33,8 +33,6 @@ source "drivers/nvme/Kconfig" · 32 unmodified lines
33		33
34	source "drivers/misc/Kconfig"	34	source "drivers/misc/Kconfig"
35		35
36	source "drivers/ide/Kconfig"
37
38	source "drivers/scsi/Kconfig"	36	source "drivers/scsi/Kconfig"
39		37
40	source "drivers/ata/Kconfig"	38	source "drivers/ata/Kconfig"

drivers/Makefile+0−1

@@ -78,7 +78,6 @@ obj-$(CONFIG_CXL_BUS) += cxl/ · 77 unmodified lines
78	obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf/	78	obj-$(CONFIG_DMA_SHARED_BUFFER) += dma-buf/
79	obj-$(CONFIG_NUBUS) += nubus/	79	obj-$(CONFIG_NUBUS) += nubus/
80	obj-y += macintosh/	80	obj-y += macintosh/
81	obj-$(CONFIG_IDE) += ide/
82	obj-y += scsi/	81	obj-y += scsi/
83	obj-y += nvme/	82	obj-y += nvme/
84	obj-$(CONFIG_ATA) += ata/	83	obj-$(CONFIG_ATA) += ata/

drivers/ata/Kconfig+3−3

@@ -1015,11 +1015,11 @@ config PATA_CMD640_PCI · 1014 unmodified lines
1015	If unsure, say N.	1015	If unsure, say N.
1016		1016
1017	config PATA_FALCON	1017	config PATA_FALCON
1018	tristate "Atari Falcon PATA support"	1018	tristate "Atari Falcon and Q40/Q60 PATA support"
1019	depends on M68K && ATARI	1019	depends on M68K && (ATARI \|\| Q40)
1020	help	1020	help
1021	This option enables support for the on-board IDE	1021	This option enables support for the on-board IDE
1022	interface on the Atari Falcon.	1022	interface on the Atari Falcon and Q40/Q60.
1023		1023
1024	If unsure, say N.	1024	If unsure, say N.
1025		1025

drivers/ata/ahci.c+4−0

 	{ PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
 	  PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
+	/* Dell S140/S150 */
+	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_SUBVENDOR_ID_DELL, PCI_ANY_ID,
+	  PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
 	/* VIA */
 	{ PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */
 	{ PCI_VDEVICE(VIA, 0x6287), board_ahci_vt8251 }, /* VIA VT8251 */

drivers/ata/ahci.h+5−2

  * for ATA_BASE_SHT
  */
 #define AHCI_SHT(drv_name)						\
-	ATA_NCQ_SHT(drv_name),						\
+	__ATA_BASE_SHT(drv_name),					\
 	.can_queue		= AHCI_MAX_CMDS,			\
 	.sg_tablesize		= AHCI_MAX_SG,				\
 	.dma_boundary		= AHCI_DMA_BOUNDARY,			\
 	.shost_attrs		= ahci_shost_attrs,			\
-	.sdev_attrs		= ahci_sdev_attrs
+	.sdev_attrs		= ahci_sdev_attrs,			\
+	.change_queue_depth     = ata_scsi_change_queue_depth,		\
+	.tag_alloc_policy       = BLK_TAG_ALLOC_RR,             	\
+	.slave_configure        = ata_scsi_slave_config
 extern struct ata_port_operations ahci_ops;
 extern struct ata_port_operations ahci_platform_ops;

drivers/ata/ahci_sunxi.c+1−1

@@ -200,7 +200,7 @@ static void ahci_sunxi_start_engine(struct ata_port *ap) · 199 unmodified lines
200	}	200	}
201		201
202	static const struct ata_port_info ahci_sunxi_port_info = {	202	static const struct ata_port_info ahci_sunxi_port_info = {
203	.flags = AHCI_FLAG_COMMON \| ATA_FLAG_NCQ,	203	.flags = AHCI_FLAG_COMMON \| ATA_FLAG_NCQ \| ATA_FLAG_NO_DIPM,
204	.pio_mask = ATA_PIO4,	204	.pio_mask = ATA_PIO4,
205	.udma_mask = ATA_UDMA6,	205	.udma_mask = ATA_UDMA6,
206	.port_ops = &ahci_platform_ops,	206	.port_ops = &ahci_platform_ops,

drivers/ata/pata_atiixp.c+2−1

@@ -252,8 +252,9 @@ static void atiixp_bmdma_stop(struct ata_queued_cmd *qc) · 251 unmodified lines
252	}	252	}
253		253
254	static struct scsi_host_template atiixp_sht = {	254	static struct scsi_host_template atiixp_sht = {
255	ATA_BMDMA_SHT(DRV_NAME),	255	ATA_BASE_SHT(DRV_NAME),
256	.sg_tablesize = LIBATA_DUMB_MAX_PRD,	256	.sg_tablesize = LIBATA_DUMB_MAX_PRD,
		257	.dma_boundary = ATA_DMA_BOUNDARY,
257	};	258	};
258		259
259	static struct ata_port_operations atiixp_port_ops = {	260	static struct ata_port_operations atiixp_port_ops = {

drivers/ata/pata_cs5520.c+2−1

@@ -95,8 +95,9 @@ static void cs5520_set_piomode(struct ata_port ap, struct ata_device adev) · 94 unmodified lines
95	}	95	}
96		96
97	static struct scsi_host_template cs5520_sht = {	97	static struct scsi_host_template cs5520_sht = {
98	ATA_BMDMA_SHT(DRV_NAME),	98	ATA_BASE_SHT(DRV_NAME),
99	.sg_tablesize = LIBATA_DUMB_MAX_PRD,	99	.sg_tablesize = LIBATA_DUMB_MAX_PRD,
		100	.dma_boundary = ATA_DMA_BOUNDARY,
100	};	101	};
101		102
102	static struct ata_port_operations cs5520_port_ops = {	103	static struct ata_port_operations cs5520_port_ops = {

drivers/ata/pata_cs5530.c+2−1

@@ -147,8 +147,9 @@ static unsigned int cs5530_qc_issue(struct ata_queued_cmd *qc) · 146 unmodified lines
147	}	147	}
148		148
149	static struct scsi_host_template cs5530_sht = {	149	static struct scsi_host_template cs5530_sht = {
150	ATA_BMDMA_SHT(DRV_NAME),	150	ATA_BASE_SHT(DRV_NAME),
151	.sg_tablesize = LIBATA_DUMB_MAX_PRD,	151	.sg_tablesize = LIBATA_DUMB_MAX_PRD,
		152	.dma_boundary = ATA_DMA_BOUNDARY,
152	};	153	};
153		154
154	static struct ata_port_operations cs5530_port_ops = {	155	static struct ata_port_operations cs5530_port_ops = {

drivers/ata/pata_cypress.c+8−2

 	CY82_INDEX_TIMEOUT	= 0x32
 };
+static bool enable_dma = true;
+module_param(enable_dma, bool, 0);
+MODULE_PARM_DESC(enable_dma, "Enable bus master DMA operations");
 /**
  *	cy82c693_set_piomode	-	set initial PIO mode data
  *	@ap: ATA interface
 static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 {
-	static const struct ata_port_info info = {
+	static struct ata_port_info info = {
 		.flags = ATA_FLAG_SLAVE_POSS,
 		.pio_mask = ATA_PIO4,
-		.mwdma_mask = ATA_MWDMA2,
 		.port_ops = &cy82c693_port_ops
 	};
 	const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
+	if (enable_dma)
+		info.mwdma_mask = ATA_MWDMA2;
 	/* Devfn 1 is the ATA primary. The secondary is magic and on devfn2.
 	   For the moment we don't handle the secondary. FIXME */

drivers/ata/pata_ep93xx.c+1−1

@@ -928,7 +928,7 @@ static int ep93xx_pata_probe(struct platform_device *pdev) · 927 unmodified lines
928	/* INT[3] (IRQ_EP93XX_EXT3) line connected as pull down */	928	/* INT[3] (IRQ_EP93XX_EXT3) line connected as pull down */
929	irq = platform_get_irq(pdev, 0);	929	irq = platform_get_irq(pdev, 0);
930	if (irq < 0) {	930	if (irq < 0) {
931	err = -ENXIO;	931	err = irq;
932	goto err_rel_gpio;	932	goto err_rel_gpio;
933	}	933	}
934		934

drivers/ata/pata_falcon.c+45−17

 #define DRV_NAME "pata_falcon"
 #define DRV_VERSION "0.1.0"
-#define ATA_HD_CONTROL	0x39
 static struct scsi_host_template pata_falcon_sht = {
 	ATA_PIO_SHT(DRV_NAME),
 };
 static int __init pata_falcon_init_one(struct platform_device *pdev)
 {
-	struct resource *res;
+	struct resource *base_mem_res, *ctl_mem_res;
+	struct resource *base_res, *ctl_res, *irq_res;
 	struct ata_host *host;
 	struct ata_port *ap;
 	void __iomem *base;
+	int irq = 0;
-	dev_info(&pdev->dev, "Atari Falcon PATA controller\n");
+	dev_info(&pdev->dev, "Atari Falcon and Q40/Q60 PATA controller\n");
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	base_res = platform_get_resource(pdev, IORESOURCE_IO, 0);
-	if (!res)
+	if (base_res && !devm_request_region(&pdev->dev, base_res->start,
-		return -ENODEV;
+					   resource_size(base_res), DRV_NAME)) {
+		dev_err(&pdev->dev, "resources busy\n");
+		return -EBUSY;
+	}
-	if (!devm_request_mem_region(&pdev->dev, res->start,
+	ctl_res = platform_get_resource(pdev, IORESOURCE_IO, 1);
-				     resource_size(res), DRV_NAME)) {
+	if (ctl_res && !devm_request_region(&pdev->dev, ctl_res->start,
+					    resource_size(ctl_res), DRV_NAME)) {
 		dev_err(&pdev->dev, "resources busy\n");
 		return -EBUSY;
 	}
+	base_mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!base_mem_res)
+		return -ENODEV;
+	if (!devm_request_mem_region(&pdev->dev, base_mem_res->start,
+				     resource_size(base_mem_res), DRV_NAME)) {
+		dev_err(&pdev->dev, "resources busy\n");
+		return -EBUSY;
+	}
+	ctl_mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+	if (!ctl_mem_res)
+		return -ENODEV;
 	/* allocate host */
 	host = ata_host_alloc(&pdev->dev, 1);
 	if (!host)
 	ap->ops = &pata_falcon_ops;
 	ap->pio_mask = ATA_PIO4;
 	ap->flags |= ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY;
-	ap->flags |= ATA_FLAG_PIO_POLLING;
-	base = (void __iomem *)res->start;
+	base = (void __iomem *)base_mem_res->start;
-	ap->ioaddr.data_addr		= base;
+	/* N.B. this assumes data_addr will be used for word-sized I/O only */
+	ap->ioaddr.data_addr		= base + 0 + 0 * 4;
 	ap->ioaddr.error_addr		= base + 1 + 1 * 4;
 	ap->ioaddr.feature_addr		= base + 1 + 1 * 4;
 	ap->ioaddr.nsect_addr		= base + 1 + 2 * 4;
 	ap->ioaddr.status_addr		= base + 1 + 7 * 4;
 	ap->ioaddr.command_addr		= base + 1 + 7 * 4;
-	ap->ioaddr.altstatus_addr	= base + ATA_HD_CONTROL;
+	base = (void __iomem *)ctl_mem_res->start;
-	ap->ioaddr.ctl_addr		= base + ATA_HD_CONTROL;
+	ap->ioaddr.altstatus_addr	= base + 1;
+	ap->ioaddr.ctl_addr		= base + 1;
-	ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", (unsigned long)base,
+	ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx",
-		      (unsigned long)base + ATA_HD_CONTROL);
+		      (unsigned long)base_mem_res->start,
+		      (unsigned long)ctl_mem_res->start);
+	irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+	if (irq_res && irq_res->start > 0) {
+		irq = irq_res->start;
+	} else {
+		ap->flags |= ATA_FLAG_PIO_POLLING;
+		ata_port_desc(ap, "no IRQ, using PIO polling");
+	}
 	/* activate */
-	return ata_host_activate(host, 0, NULL, 0, &pata_falcon_sht);
+	return ata_host_activate(host, irq, irq ? ata_sff_interrupt : NULL,
+				 IRQF_SHARED, &pata_falcon_sht);
 }
 static int __exit pata_falcon_remove_one(struct platform_device *pdev)

drivers/ata/pata_macio.c+4−1

 #endif /* CONFIG_PM_SLEEP */
 static struct scsi_host_template pata_macio_sht = {
-	ATA_BASE_SHT(DRV_NAME),
+	__ATA_BASE_SHT(DRV_NAME),
 	.sg_tablesize		= MAX_DCMDS,
 	/* We may not need that strict one */
 	.dma_boundary		= ATA_DMA_BOUNDARY,
 	 */
 	.max_segment_size	= MAX_DBDMA_SEG,
 	.slave_configure	= pata_macio_slave_config,
+	.sdev_attrs		= ata_common_sdev_attrs,
+	.can_queue		= ATA_DEF_QUEUE,
+	.tag_alloc_policy	= BLK_TAG_ALLOC_RR,
 };
 static struct ata_port_operations pata_macio_ops = {

drivers/ata/pata_octeon_cf.c+3−2

 					return -EINVAL;
 				}
-				irq_handler = octeon_cf_interrupt;
 				i = platform_get_irq(dma_dev, 0);
-				if (i > 0)
+				if (i > 0) {
 					irq = i;
+					irq_handler = octeon_cf_interrupt;
+				}
 			}
 			of_node_put(dma_node);
 		}

drivers/ata/pata_rb532_cf.c+4−4

@@ -115,10 +115,10 @@ static int rb532_pata_driver_probe(struct platform_device *pdev) · 114 unmodified lines
115	}	115	}
116		116
117	irq = platform_get_irq(pdev, 0);	117	irq = platform_get_irq(pdev, 0);
118	if (irq <= 0) {	118	if (irq < 0)
119	dev_err(&pdev->dev, "no IRQ resource found\n");	119	return irq;
120	return -ENOENT;	120	if (!irq)
121	}	121	return -EINVAL;
122		122
123	gpiod = devm_gpiod_get(&pdev->dev, NULL, GPIOD_IN);	123	gpiod = devm_gpiod_get(&pdev->dev, NULL, GPIOD_IN);
124	if (IS_ERR(gpiod)) {	124	if (IS_ERR(gpiod)) {

drivers/ata/pata_sc1200.c+2−1

@@ -193,8 +193,9 @@ static int sc1200_qc_defer(struct ata_queued_cmd *qc) · 192 unmodified lines
193	}	193	}
194		194
195	static struct scsi_host_template sc1200_sht = {	195	static struct scsi_host_template sc1200_sht = {
196	ATA_BMDMA_SHT(DRV_NAME),	196	ATA_BASE_SHT(DRV_NAME),
197	.sg_tablesize = LIBATA_DUMB_MAX_PRD,	197	.sg_tablesize = LIBATA_DUMB_MAX_PRD,
		198	.dma_boundary = ATA_DMA_BOUNDARY,
198	};	199	};
199		200
200	static struct ata_port_operations sc1200_port_ops = {	201	static struct ata_port_operations sc1200_port_ops = {

drivers/ata/pata_serverworks.c+2−1

@@ -253,8 +253,9 @@ static void serverworks_set_dmamode(struct ata_port ap, struct ata_device adev · 252 unmodified lines
253	}	253	}
254		254
255	static struct scsi_host_template serverworks_osb4_sht = {	255	static struct scsi_host_template serverworks_osb4_sht = {
256	ATA_BMDMA_SHT(DRV_NAME),	256	ATA_BASE_SHT(DRV_NAME),
257	.sg_tablesize = LIBATA_DUMB_MAX_PRD,	257	.sg_tablesize = LIBATA_DUMB_MAX_PRD,
		258	.dma_boundary = ATA_DMA_BOUNDARY,
258	};	259	};
259		260
260	static struct scsi_host_template serverworks_csb_sht = {	261	static struct scsi_host_template serverworks_csb_sht = {

drivers/ata/sata_fsl.c+1−1

@@ -313,7 +313,7 @@ static void fsl_sata_set_irq_coalescing(struct ata_host *host, · 312 unmodified lines
313		313
314	DPRINTK("interrupt coalescing, count = 0x%x, ticks = %x\n",	314	DPRINTK("interrupt coalescing, count = 0x%x, ticks = %x\n",
315	intr_coalescing_count, intr_coalescing_ticks);	315	intr_coalescing_count, intr_coalescing_ticks);
316	DPRINTK("ICC register status: (hcr base: 0x%x) = 0x%x\n",	316	DPRINTK("ICC register status: (hcr base: %p) = 0x%x\n",
317	hcr_base, ioread32(hcr_base + ICC));	317	hcr_base, ioread32(hcr_base + ICC));
318	}	318	}
319		319

drivers/ata/sata_highbank.c+4−2

 	}
 	irq = platform_get_irq(pdev, 0);
-	if (irq <= 0) {
+	if (irq < 0) {
 		dev_err(dev, "no irq\n");
-		return -EINVAL;
+		return irq;
 	}
+	if (!irq)
+		return -EINVAL;
 	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
 	if (!hpriv) {

drivers/ata/sata_mv.c+5−1

 };
 #endif
 static struct scsi_host_template mv6_sht = {
-	ATA_NCQ_SHT(DRV_NAME),
+	__ATA_BASE_SHT(DRV_NAME),
 	.can_queue		= MV_MAX_Q_DEPTH - 1,
 	.sg_tablesize		= MV_MAX_SG_CT / 2,
 	.dma_boundary		= MV_DMA_BOUNDARY,
+	.sdev_attrs             = ata_ncq_sdev_attrs,
+	.change_queue_depth	= ata_scsi_change_queue_depth,
+	.tag_alloc_policy	= BLK_TAG_ALLOC_RR,
+	.slave_configure	= ata_scsi_slave_config
 };
 static struct ata_port_operations mv5_ops = {

drivers/ata/sata_nv.c+9−3

 };
 static struct scsi_host_template nv_adma_sht = {
-	ATA_NCQ_SHT(DRV_NAME),
+	__ATA_BASE_SHT(DRV_NAME),
 	.can_queue		= NV_ADMA_MAX_CPBS,
 	.sg_tablesize		= NV_ADMA_SGTBL_TOTAL_LEN,
 	.dma_boundary		= NV_ADMA_DMA_BOUNDARY,
 	.slave_configure	= nv_adma_slave_config,
+	.sdev_attrs             = ata_ncq_sdev_attrs,
+	.change_queue_depth     = ata_scsi_change_queue_depth,
+	.tag_alloc_policy	= BLK_TAG_ALLOC_RR,
 };
 static struct scsi_host_template nv_swncq_sht = {
-	ATA_NCQ_SHT(DRV_NAME),
+	__ATA_BASE_SHT(DRV_NAME),
 	.can_queue		= ATA_MAX_QUEUE - 1,
 	.sg_tablesize		= LIBATA_MAX_PRD,
 	.dma_boundary		= ATA_DMA_BOUNDARY,
 	.slave_configure	= nv_swncq_slave_config,
+	.sdev_attrs             = ata_ncq_sdev_attrs,
+	.change_queue_depth     = ata_scsi_change_queue_depth,
+	.tag_alloc_policy	= BLK_TAG_ALLOC_RR,
 };
 /*
 		 */
 		lack_dhfis = 1;
-	DPRINTK("id 0x%x QC: qc_active 0x%x,"
+	DPRINTK("id 0x%x QC: qc_active 0x%llx,"
 		"SWNCQ:qc_active 0x%X defer_bits %X "
 		"dhfis 0x%X dmafis 0x%X last_issue_tag %x\n",
 		ap->print_id, ap->qc_active, pp->qc_active,

drivers/ata/sata_sil24.c+4−1

 };
 static struct scsi_host_template sil24_sht = {
-	ATA_NCQ_SHT(DRV_NAME),
+	__ATA_BASE_SHT(DRV_NAME),
 	.can_queue		= SIL24_MAX_CMDS,
 	.sg_tablesize		= SIL24_MAX_SGE,
 	.dma_boundary		= ATA_DMA_BOUNDARY,
 	.tag_alloc_policy	= BLK_TAG_ALLOC_FIFO,
+	.sdev_attrs		= ata_ncq_sdev_attrs,
+	.change_queue_depth	= ata_scsi_change_queue_depth,
+	.slave_configure	= ata_scsi_slave_config
 };
 static struct ata_port_operations sil24_ops = {

drivers/ide/Kconfig+0−849

@@ -1,849 +0,0 @@
1	# SPDX-License-Identifier: GPL-2.0-only
2	#
3	# IDE ATA ATAPI Block device driver configuration
4	#
5
6	# Select HAVE_IDE if IDE is supported
7	config HAVE_IDE
8	bool
9
10	menuconfig IDE
11	tristate "ATA/ATAPI/MFM/RLL support (DEPRECATED)"
12	depends on HAVE_IDE
13	depends on BLOCK
14	select BLK_SCSI_REQUEST
15	help
16	If you say Y here, your kernel will be able to manage ATA/(E)IDE and
17	ATAPI units. The most common cases are IDE hard drives and ATAPI
18	CD-ROM drives.
19
20	This subsystem is currently in maintenance mode with only bug fix
21	changes applied. Users of ATA hardware are encouraged to migrate to
22	the newer ATA subsystem ("Serial ATA (prod) and Parallel ATA
23	(experimental) drivers") which is more actively maintained.
24
25	To compile this driver as a module, choose M here: the
26	module will be called ide-core.
27
28	For further information, please read <file:Documentation/ide/ide.rst>.
29
30	If unsure, say N.
31
32	if IDE
33
34	comment "Please see Documentation/ide/ide.rst for help/info on IDE drives"
35
36	config IDE_XFER_MODE
37	bool
38
39	config IDE_TIMINGS
40	bool
41	select IDE_XFER_MODE
42
43	config IDE_ATAPI
44	bool
45
46	config IDE_LEGACY
47	bool
48
49	config BLK_DEV_IDE_SATA
50	bool "Support for SATA (deprecated; conflicts with libata SATA driver)"
51	default n
52	help
53	There are two drivers for Serial ATA controllers.
54
55	The main driver, "libata", uses the SCSI subsystem
56	and supports most modern SATA controllers. In order to use it
57	you may take a look at "Serial ATA (prod) and Parallel ATA
58	(experimental) drivers".
59
60	The IDE driver (which you are currently configuring) supports
61	a few first-generation SATA controllers.
62
63	In order to eliminate conflicts between the two subsystems,
64	this config option enables the IDE driver's SATA support.
65	Normally this is disabled, as it is preferred that libata
66	supports SATA controllers, and this (IDE) driver supports
67	PATA controllers.
68
69	If unsure, say N.
70
71	config IDE_GD
72	tristate "generic ATA/ATAPI disk support"
73	default y
74	help
75	Support for ATA/ATAPI disks (including ATAPI floppy drives).
76
77	To compile this driver as a module, choose M here.
78	The module will be called ide-gd_mod.
79
80	If unsure, say Y.
81
82	config IDE_GD_ATA
83	bool "ATA disk support"
84	depends on IDE_GD
85	default y
86	help
87	This will include support for ATA hard disks.
88
89	If unsure, say Y.
90
91	config IDE_GD_ATAPI
92	bool "ATAPI floppy support"
93	depends on IDE_GD
94	select IDE_ATAPI
95	help
96	This will include support for ATAPI floppy drives
97	(i.e. Iomega ZIP or MKE LS-120).
98
99	For information about jumper settings and the question
100	of when a ZIP drive uses a partition table, see
101	<http://www.win.tue.nl/~aeb/linux/zip/zip-1.html>.
102
103	If unsure, say N.
104
105	config BLK_DEV_IDECS
106	tristate "PCMCIA IDE support"
107	depends on PCMCIA
108	help
109	Support for Compact Flash cards, outboard IDE disks, tape drives,
110	and CD-ROM drives connected through a PCMCIA card.
111
112	config BLK_DEV_DELKIN
113	tristate "Cardbus IDE support (Delkin/ASKA/Workbit)"
114	depends on CARDBUS && PCI
115	help
116	Support for Delkin, ASKA, and Workbit Cardbus CompactFlash
117	Adapters. This may also work for similar SD and XD adapters.
118
119	config BLK_DEV_IDECD
120	tristate "Include IDE/ATAPI CDROM support"
121	depends on BLK_DEV
122	select IDE_ATAPI
123	select CDROM
124	help
125	If you have a CD-ROM drive using the ATAPI protocol, say Y. ATAPI is
126	a newer protocol used by IDE CD-ROM and TAPE drives, similar to the
127	SCSI protocol. Most new CD-ROM drives use ATAPI, including the
128	NEC-260, Mitsumi FX400, Sony 55E, and just about all non-SCSI
129	double(2X) or better speed drives.
130
131	If you say Y here, the CD-ROM drive will be identified at boot time
132	along with other IDE devices, as "hdb" or "hdc", or something
133	similar (check the boot messages with dmesg). If this is your only
134	CD-ROM drive, you can say N to all other CD-ROM options, but be sure
135	to say Y or M to "ISO 9660 CD-ROM file system support".
136
137	To compile this driver as a module, choose M here: the
138	module will be called ide-cd.
139
140	config BLK_DEV_IDECD_VERBOSE_ERRORS
141	bool "Verbose error logging for IDE/ATAPI CDROM driver" if EXPERT
142	depends on BLK_DEV_IDECD
143	default y
144	help
145	Turn this on to have the driver print out the meanings of the
146	ATAPI error codes. This will use up additional 8kB of kernel-space
147	memory, though.
148
149	config BLK_DEV_IDETAPE
150	tristate "Include IDE/ATAPI TAPE support"
151	select IDE_ATAPI
152	help
153	If you have an IDE tape drive using the ATAPI protocol, say Y.
154	ATAPI is a newer protocol used by IDE tape and CD-ROM drives,
155	similar to the SCSI protocol. If you have an SCSI tape drive
156	however, you can say N here.
157
158	You should also say Y if you have an OnStream DI-30 tape drive; this
159	will not work with the SCSI protocol, until there is support for the
160	SC-30 and SC-50 versions.
161
162	If you say Y here, the tape drive will be identified at boot time
163	along with other IDE devices, as "hdb" or "hdc", or something
164	similar, and will be mapped to a character device such as "ht0"
165	(check the boot messages with dmesg). Be sure to consult the
166	<file:drivers/ide/ide-tape.c> and <file:Documentation/ide/ide.rst>
167	files for usage information.
168
169	To compile this driver as a module, choose M here: the
170	module will be called ide-tape.
171
172	config BLK_DEV_IDEACPI
173	bool "IDE ACPI support"
174	depends on ACPI
175	help
176	Implement ACPI support for generic IDE devices. On modern
177	machines ACPI support is required to properly handle ACPI S3 states.
178
179	config IDE_TASK_IOCTL
180	bool "IDE Taskfile Access"
181	help
182	This is a direct raw access to the media. It is a complex but
183	elegant solution to test and validate the domain of the hardware and
184	perform below the driver data recovery if needed. This is the most
185	basic form of media-forensics.
186
187	If you are unsure, say N here.
188
189	config IDE_PROC_FS
190	bool "legacy /proc/ide/ support"
191	depends on IDE && PROC_FS
192	default y
193	help
194	This option enables support for the various files in
195	/proc/ide. In Linux 2.6 this has been superseded by
196	files in sysfs but many legacy applications rely on this.
197
198	If unsure say Y.
199
200	comment "IDE chipset support/bugfixes"
201
202	config IDE_GENERIC
203	tristate "generic/default IDE chipset support"
204	depends on ALPHA \|\| X86 \|\| IA64 \|\| MIPS \|\| ARCH_RPC
205	default ARM && ARCH_RPC
206	help
207	This is the generic IDE driver. This driver attaches to the
208	fixed legacy ports (e.g. on PCs 0x1f0/0x170, 0x1e8/0x168 and
209	so on). Please note that if this driver is built into the
210	kernel or loaded before other ATA (IDE or libata) drivers
211	and the controller is located at legacy ports, this driver
212	may grab those ports and thus can prevent the controller
213	specific driver from attaching.
214
215	Also, currently, IDE generic doesn't allow IRQ sharing
216	meaning that the IRQs it grabs won't be available to other
217	controllers sharing those IRQs which usually makes drivers
218	for those controllers fail. Generally, it's not a good idea
219	to load IDE generic driver on modern systems.
220
221	If unsure, say N.
222
223	config BLK_DEV_PLATFORM
224	tristate "Platform driver for IDE interfaces"
225	help
226	This is the platform IDE driver, used mostly for Memory Mapped
227	IDE devices, like Compact Flashes running in True IDE mode.
228
229	If unsure, say N.
230
231	config BLK_DEV_CMD640
232	tristate "CMD640 chipset bugfix/support"
233	depends on X86
234	select IDE_TIMINGS
235	help
236	The CMD-Technologies CMD640 IDE chip is used on many common 486 and
237	Pentium motherboards, usually in combination with a "Neptune" or
238	"SiS" chipset. Unfortunately, it has a number of rather nasty
239	design flaws that can cause severe data corruption under many common
240	conditions. Say Y here to include code which tries to automatically
241	detect and correct the problems under Linux. This option also
242	enables access to the secondary IDE ports in some CMD640 based
243	systems.
244
245	This driver will work automatically in PCI based systems (most new
246	systems have PCI slots). But if your system uses VESA local bus
247	(VLB) instead of PCI, you must also supply a kernel boot parameter
248	to enable the CMD640 bugfix/support: "cmd640.probe_vlb". (Try "man
249	bootparam" or see the documentation of your boot loader about how to
250	pass options to the kernel.)
251
252	The CMD640 chip is also used on add-in cards by Acculogic, and on
253	the "CSA-6400E PCI to IDE controller" that some people have. For
254	details, read <file:Documentation/ide/ide.rst>.
255
256	config BLK_DEV_CMD640_ENHANCED
257	bool "CMD640 enhanced support"
258	depends on BLK_DEV_CMD640
259	help
260	This option includes support for setting/autotuning PIO modes and
261	prefetch on CMD640 IDE interfaces. For details, read
262	<file:Documentation/ide/ide.rst>. If you have a CMD640 IDE interface
263	and your BIOS does not already do this for you, then say Y here.
264	Otherwise say N.
265
266	config BLK_DEV_IDEPNP
267	tristate "PNP EIDE support"
268	depends on PNP
269	help
270	If you have a PnP (Plug and Play) compatible EIDE card and
271	would like the kernel to automatically detect and activate
272	it, say Y here.
273
274	config BLK_DEV_IDEDMA_SFF
275	bool
276
277	if PCI
278
279	comment "PCI IDE chipsets support"
280
281	config BLK_DEV_IDEPCI
282	bool
283
284	config IDEPCI_PCIBUS_ORDER
285	bool "Probe IDE PCI devices in the PCI bus order (DEPRECATED)"
286	depends on IDE=y && BLK_DEV_IDEPCI
287	default y
288	help
289	Probe IDE PCI devices in the order in which they appear on the
290	PCI bus (i.e. 00:1f.1 PCI device before 02:01.0 PCI device)
291	instead of the order in which IDE PCI host drivers are loaded.
292
293	Please note that this method of assuring stable naming of
294	IDE devices is unreliable and use other means for achieving
295	it (i.e. udev).
296
297	If in doubt, say N.
298
299	# TODO: split it on per host driver config options (or module parameters)
300	config BLK_DEV_OFFBOARD
301	bool "Boot off-board chipsets first support (DEPRECATED)"
302	depends on BLK_DEV_IDEPCI && (BLK_DEV_AEC62XX \|\| BLK_DEV_GENERIC \|\| BLK_DEV_HPT366 \|\| BLK_DEV_PDC202XX_NEW \|\| BLK_DEV_PDC202XX_OLD \|\| BLK_DEV_TC86C001)
303	help
304	Normally, IDE controllers built into the motherboard (on-board
305	controllers) are assigned to ide0 and ide1 while those on add-in PCI
306	cards (off-board controllers) are relegated to ide2 and ide3.
307	Answering Y here will allow you to reverse the situation, with
308	off-board controllers on ide0/1 and on-board controllers on ide2/3.
309	This can improve the usability of some boot managers such as lilo
310	when booting from a drive on an off-board controller.
311
312	Note that, if you do this, the order of the hd* devices will be
313	rearranged which may require modification of fstab and other files.
314
315	Please also note that this method of assuring stable naming of
316	IDE devices is unreliable and use other means for achieving it
317	(i.e. udev).
318
319	If in doubt, say N.
320
321	config BLK_DEV_GENERIC
322	tristate "Generic PCI IDE Chipset Support"
323	select BLK_DEV_IDEPCI
324	help
325	This option provides generic support for various PCI IDE Chipsets
326	which otherwise might not be supported.
327
328	config BLK_DEV_OPTI621
329	tristate "OPTi 82C621 chipset enhanced support"
330	select BLK_DEV_IDEPCI
331	help
332	This is a driver for the OPTi 82C621 EIDE controller.
333	Please read the comments at the top of <file:drivers/ide/opti621.c>.
334
335	config BLK_DEV_RZ1000
336	tristate "RZ1000 chipset bugfix/support"
337	depends on X86
338	select BLK_DEV_IDEPCI
339	help
340	The PC-Technologies RZ1000 IDE chip is used on many common 486 and
341	Pentium motherboards, usually along with the "Neptune" chipset.
342	Unfortunately, it has a rather nasty design flaw that can cause
343	severe data corruption under many conditions. Say Y here to include
344	code which automatically detects and corrects the problem under
345	Linux. This may slow disk throughput by a few percent, but at least
346	things will operate 100% reliably.
347
348	config BLK_DEV_IDEDMA_PCI
349	bool
350	select BLK_DEV_IDEPCI
351	select BLK_DEV_IDEDMA_SFF
352
353	config BLK_DEV_AEC62XX
354	tristate "AEC62XX chipset support"
355	select BLK_DEV_IDEDMA_PCI
356	help
357	This driver adds explicit support for Acard AEC62xx (Artop ATP8xx)
358	IDE controllers. This allows the kernel to change PIO, DMA and UDMA
359	speeds and to configure the chip to optimum performance.
360
361	config BLK_DEV_ALI15X3
362	tristate "ALI M15x3 chipset support"
363	select IDE_TIMINGS
364	select BLK_DEV_IDEDMA_PCI
365	help
366	This driver ensures (U)DMA support for ALI 1533, 1543 and 1543C
367	onboard chipsets. It also tests for Simplex mode and enables
368	normal dual channel support.
369
370	Please read the comments at the top of
371	<file:drivers/ide/alim15x3.c>.
372
373	If unsure, say N.
374
375	config BLK_DEV_AMD74XX
376	tristate "AMD and nVidia IDE support"
377	depends on !ARM
378	select IDE_TIMINGS
379	select BLK_DEV_IDEDMA_PCI
380	help
381	This driver adds explicit support for AMD-7xx and AMD-8111 chips
382	and also for the nVidia nForce chip. This allows the kernel to
383	change PIO, DMA and UDMA speeds and to configure the chip to
384	optimum performance.
385
386	config BLK_DEV_ATIIXP
387	tristate "ATI IXP chipset IDE support"
388	depends on X86
389	select BLK_DEV_IDEDMA_PCI
390	help
391	This driver adds explicit support for ATI IXP chipset.
392	This allows the kernel to change PIO, DMA and UDMA speeds
393	and to configure the chip to optimum performance.
394
395	Say Y here if you have an ATI IXP chipset IDE controller.
396
397	config BLK_DEV_CMD64X
398	tristate "CMD64{3\|6\|8\|9} chipset support"
399	select IDE_TIMINGS
400	select BLK_DEV_IDEDMA_PCI
401	help
402	Say Y here if you have an IDE controller which uses any of these
403	chipsets: CMD643, CMD646, or CMD648.
404
405	config BLK_DEV_TRIFLEX
406	tristate "Compaq Triflex IDE support"
407	select BLK_DEV_IDEDMA_PCI
408	help
409	Say Y here if you have a Compaq Triflex IDE controller, such
410	as those commonly found on Compaq Pentium-Pro systems
411
412	config BLK_DEV_CY82C693
413	tristate "CY82C693 chipset support"
414	depends on ALPHA
415	select IDE_TIMINGS
416	select BLK_DEV_IDEDMA_PCI
417	help
418	This driver adds detection and support for the CY82C693 chipset
419	used on Digital's PC-Alpha 164SX boards.
420
421	config BLK_DEV_CS5520
422	tristate "Cyrix CS5510/20 MediaGX chipset support (VERY EXPERIMENTAL)"
423	depends on X86_32 \|\| COMPILE_TEST
424	select BLK_DEV_IDEDMA_PCI
425	help
426	Include support for PIO tuning and virtual DMA on the Cyrix MediaGX
427	5510/5520 chipset. This will automatically be detected and
428	configured if found.
429
430	It is safe to say Y to this question.
431
432	config BLK_DEV_CS5530
433	tristate "Cyrix/National Semiconductor CS5530 MediaGX chipset support"
434	depends on X86_32 \|\| COMPILE_TEST
435	select BLK_DEV_IDEDMA_PCI
436	help
437	Include support for UDMA on the Cyrix MediaGX 5530 chipset. This
438	will automatically be detected and configured if found.
439
440	It is safe to say Y to this question.
441
442	config BLK_DEV_CS5535
443	tristate "AMD CS5535 chipset support"
444	depends on X86_32
445	select BLK_DEV_IDEDMA_PCI
446	help
447	Include support for UDMA on the NSC/AMD CS5535 companion chipset.
448	This will automatically be detected and configured if found.
449
450	It is safe to say Y to this question.
451
452	config BLK_DEV_CS5536
453	tristate "CS5536 chipset support"
454	depends on X86_32
455	select BLK_DEV_IDEDMA_PCI
456	help
457	This option enables support for the AMD CS5536
458	companion chip used with the Geode LX processor family.
459
460	If unsure, say N.
461
462	config BLK_DEV_HPT366
463	tristate "HPT36X/37X chipset support"
464	select BLK_DEV_IDEDMA_PCI
465	help
466	HPT366 is an Ultra DMA chipset for ATA-66.
467	HPT368 is an Ultra DMA chipset for ATA-66 RAID Based.
468	HPT370 is an Ultra DMA chipset for ATA-100.
469	HPT372 is an Ultra DMA chipset for ATA-100.
470	HPT374 is an Ultra DMA chipset for ATA-100.
471
472	This driver adds up to 4 more EIDE devices sharing a single
473	interrupt.
474
475	The HPT366 chipset in its current form is bootable. One solution
476	for this problem are special LILO commands for redirecting the
477	reference to device 0x80. The other solution is to say Y to "Boot
478	off-board chipsets first support" (CONFIG_BLK_DEV_OFFBOARD) unless
479	your mother board has the chipset natively mounted. Regardless one
480	should use the fore mentioned option and call at LILO.
481
482	This driver requires dynamic tuning of the chipset during the
483	ide-probe at boot. It is reported to support DVD II drives, by the
484	manufacturer.
485
486	config BLK_DEV_JMICRON
487	tristate "JMicron JMB36x support"
488	select BLK_DEV_IDEDMA_PCI
489	help
490	Basic support for the JMicron ATA controllers. For full support
491	use the libata drivers.
492
493	config BLK_DEV_SC1200
494	tristate "National SCx200 chipset support"
495	depends on X86_32 \|\| COMPILE_TEST
496	select BLK_DEV_IDEDMA_PCI
497	help
498	This driver adds support for the on-board IDE controller on the
499	National SCx200 series of embedded x86 "Geode" systems.
500
501	config BLK_DEV_PIIX
502	tristate "Intel PIIX/ICH chipsets support"
503	select BLK_DEV_IDEDMA_PCI
504	help
505	This driver adds explicit support for Intel PIIX and ICH chips.
506	This allows the kernel to change PIO, DMA and UDMA speeds and to
507	configure the chip to optimum performance.
508
509	config BLK_DEV_IT8172
510	tristate "IT8172 IDE support"
511	select BLK_DEV_IDEDMA_PCI
512	help
513	This driver adds support for the IDE controller on the
514	IT8172 System Controller.
515
516	config BLK_DEV_IT8213
517	tristate "IT8213 IDE support"
518	select BLK_DEV_IDEDMA_PCI
519	help
520	This driver adds support for the ITE 8213 IDE controller.
521
522	config BLK_DEV_IT821X
523	tristate "IT821X IDE support"
524	select BLK_DEV_IDEDMA_PCI
525	help
526	This driver adds support for the ITE 8211 IDE controller and the
527	IT 8212 IDE RAID controller in both RAID and pass-through mode.
528
529	config BLK_DEV_NS87415
530	tristate "NS87415 chipset support"
531	select BLK_DEV_IDEDMA_PCI
532	help
533	This driver adds detection and support for the NS87415 chip
534	(used mainly on SPARC64 and PA-RISC machines).
535
536	Please read the comments at the top of <file:drivers/ide/ns87415.c>.
537
538	config BLK_DEV_PDC202XX_OLD
539	tristate "PROMISE PDC202{46\|62\|65\|67} support"
540	select BLK_DEV_IDEDMA_PCI
541	help
542	Promise Ultra33 or PDC20246
543	Promise Ultra66 or PDC20262
544	Promise Ultra100 or PDC20265/PDC20267/PDC20268
545
546	This driver adds up to 4 more EIDE devices sharing a single
547	interrupt. This add-on card is a bootable PCI UDMA controller. Since
548	multiple cards can be installed and there are BIOS ROM problems that
549	happen if the BIOS revisions of all installed cards (three-max) do
550	not match, the driver attempts to do dynamic tuning of the chipset
551	at boot-time for max-speed. Ultra33 BIOS 1.25 or newer is required
552	for more than one card.
553
554	Please read the comments at the top of
555	<file:drivers/ide/pdc202xx_old.c>.
556
557	If unsure, say N.
558
559	config BLK_DEV_PDC202XX_NEW
560	tristate "PROMISE PDC202{68\|69\|70\|71\|75\|76\|77} support"
561	select BLK_DEV_IDEDMA_PCI
562
563	config BLK_DEV_SVWKS
564	tristate "ServerWorks OSB4/CSB5/CSB6 chipsets support"
565	select BLK_DEV_IDEDMA_PCI
566	help
567	This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5
568	chipsets.
569
570	config BLK_DEV_SIIMAGE
571	tristate "Silicon Image chipset support"
572	select BLK_DEV_IDEDMA_PCI
573	help
574	This driver adds PIO/(U)DMA support for the SI CMD680 and SII
575	3112 (Serial ATA) chips.
576
577	config BLK_DEV_SIS5513
578	tristate "SiS5513 chipset support"
579	depends on X86
580	select BLK_DEV_IDEDMA_PCI
581	help
582	This driver ensures (U)DMA support for SIS5513 chipset family based
583	mainboards.
584
585	The following chipsets are supported:
586	ATA16: SiS5511, SiS5513
587	ATA33: SiS5591, SiS5597, SiS5598, SiS5600
588	ATA66: SiS530, SiS540, SiS620, SiS630, SiS640
589	ATA100: SiS635, SiS645, SiS650, SiS730, SiS735, SiS740,
590	SiS745, SiS750
591
592	Please read the comments at the top of <file:drivers/ide/sis5513.c>.
593
594	config BLK_DEV_SL82C105
595	tristate "Winbond SL82c105 support"
596	depends on (PPC \|\| ARM)
597	select IDE_TIMINGS
598	select BLK_DEV_IDEDMA_PCI
599	help
600	If you have a Winbond SL82c105 IDE controller, say Y here to enable
601	special configuration for this chip. This is common on various CHRP
602	motherboards, but could be used elsewhere. If in doubt, say Y.
603
604	config BLK_DEV_SLC90E66
605	tristate "SLC90E66 chipset support"
606	select BLK_DEV_IDEDMA_PCI
607	help
608	This driver ensures (U)DMA support for Victory66 SouthBridges for
609	SMsC with Intel NorthBridges. This is an Ultra66 based chipset.
610	The nice thing about it is that you can mix Ultra/DMA/PIO devices
611	and it will handle timing cycles. Since this is an improved
612	look-a-like to the PIIX4 it should be a nice addition.
613
614	Please read the comments at the top of
615	<file:drivers/ide/slc90e66.c>.
616
617	config BLK_DEV_TRM290
618	tristate "Tekram TRM290 chipset support"
619	select BLK_DEV_IDEDMA_PCI
620	help
621	This driver adds support for bus master DMA transfers
622	using the Tekram TRM290 PCI IDE chip. Volunteers are
623	needed for further tweaking and development.
624	Please read the comments at the top of <file:drivers/ide/trm290.c>.
625
626	config BLK_DEV_VIA82CXXX
627	tristate "VIA82CXXX chipset support"
628	select IDE_TIMINGS
629	select BLK_DEV_IDEDMA_PCI
630	help
631	This driver adds explicit support for VIA BusMastering IDE chips.
632	This allows the kernel to change PIO, DMA and UDMA speeds and to
633	configure the chip to optimum performance.
634
635	config BLK_DEV_TC86C001
636	tristate "Toshiba TC86C001 support"
637	select BLK_DEV_IDEDMA_PCI
638	help
639	This driver adds support for Toshiba TC86C001 GOKU-S chip.
640
641	endif
642
643	# TODO: BLK_DEV_IDEDMA_PCI -> BLK_DEV_IDEDMA_SFF
644	config BLK_DEV_IDE_PMAC
645	tristate "PowerMac on-board IDE support"
646	depends on PPC_PMAC
647	select IDE_TIMINGS
648	select BLK_DEV_IDEDMA_PCI
649	help
650	This driver provides support for the on-board IDE controller on
651	most of the recent Apple Power Macintoshes and PowerBooks.
652	If unsure, say Y.
653
654	config BLK_DEV_IDE_PMAC_ATA100FIRST
655	bool "Probe on-board ATA/100 (Kauai) first"
656	depends on BLK_DEV_IDE_PMAC
657	help
658	This option will cause the ATA/100 controller found in UniNorth2
659	based machines (Windtunnel PowerMac, Aluminium PowerBooks, ...)
660	to be probed before the ATA/66 and ATA/33 controllers. Without
661	these, those machine used to have the hard disk on hdc and the
662	CD-ROM on hda. This option changes this to more natural hda for
663	hard disk and hdc for CD-ROM.
664
665	config BLK_DEV_IDE_TX4938
666	tristate "TX4938 internal IDE support"
667	depends on SOC_TX4938
668	select IDE_TIMINGS
669
670	config BLK_DEV_IDE_TX4939
671	tristate "TX4939 internal IDE support"
672	depends on SOC_TX4939
673	select BLK_DEV_IDEDMA_SFF
674
675	config BLK_DEV_IDE_ICSIDE
676	tristate "ICS IDE interface support"
677	depends on ARM && ARCH_ACORN
678	help
679	On Acorn systems, say Y here if you wish to use the ICS IDE
680	interface card. This is not required for ICS partition support.
681	If you are unsure, say N to this.
682
683	config BLK_DEV_IDEDMA_ICS
684	bool "ICS DMA support"
685	depends on BLK_DEV_IDE_ICSIDE
686	help
687	Say Y here if you want to add DMA (Direct Memory Access) support to
688	the ICS IDE driver.
689
690	config BLK_DEV_IDE_RAPIDE
691	tristate "RapIDE interface support"
692	depends on ARM && ARCH_ACORN
693	help
694	Say Y here if you want to support the Yellowstone RapIDE controller
695	manufactured for use with Acorn computers.
696
697	config BLK_DEV_GAYLE
698	tristate "Amiga Gayle IDE interface support"
699	depends on AMIGA
700	help
701	This is the IDE driver for the Amiga Gayle IDE interface. It supports
702	both the `A1200 style' and `A4000 style' of the Gayle IDE interface,
703	This includes on-board IDE interfaces on some Amiga models (A600,
704	A1200, A4000, and A4000T), and IDE interfaces on the Zorro expansion
705	bus (M-Tech E-Matrix 530 expansion card).
706
707	It also provides support for the so-called `IDE doublers' (made
708	by various manufacturers, e.g. Eyetech) that can be connected to
709	the on-board IDE interface of some Amiga models. Using such an IDE
710	doubler, you can connect up to four instead of two IDE devices to
711	the Amiga's on-board IDE interface. The feature is enabled at kernel
712	runtime using the "gayle.doubler" kernel boot parameter.
713
714	Say Y if you have an Amiga with a Gayle IDE interface and want to use
715	IDE devices (hard disks, CD-ROM drives, etc.) that are connected to
716	it.
717
718	Note that you also have to enable Zorro bus support if you want to
719	use Gayle IDE interfaces on the Zorro expansion bus.
720
721	config BLK_DEV_BUDDHA
722	tristate "Buddha/Catweasel/X-Surf IDE interface support"
723	depends on ZORRO
724	help
725	This is the IDE driver for the IDE interfaces on the Buddha, Catweasel
726	and X-Surf expansion boards. It supports up to two interfaces on the
727	Buddha, three on the Catweasel and two on the X-Surf.
728
729	Say Y if you have a Buddha or Catweasel expansion board and want to
730	use IDE devices (hard disks, CD-ROM drives, etc.) that are connected
731	to one of its IDE interfaces.
732
733	config BLK_DEV_FALCON_IDE
734	tristate "Falcon IDE interface support"
735	depends on ATARI
736	help
737	This is the IDE driver for the on-board IDE interface on the Atari
738	Falcon. Say Y if you have a Falcon and want to use IDE devices (hard
739	disks, CD-ROM drives, etc.) that are connected to the on-board IDE
740	interface.
741
742	config BLK_DEV_MAC_IDE
743	tristate "Macintosh Quadra/Powerbook IDE interface support"
744	depends on MAC
745	help
746	This is the IDE driver for the on-board IDE interface on some m68k
747	Macintosh models, namely Quadra/Centris 630, Performa 588 and
748	Powerbook 150. The IDE interface on the Powerbook 190 is not
749	supported by this driver and requires BLK_DEV_PLATFORM or
750	PATA_PLATFORM.
751
752	Say Y if you have such an Macintosh model and want to use IDE
753	devices (hard disks, CD-ROM drives, etc.) that are connected to the
754	on-board IDE interface.
755
756	config BLK_DEV_Q40IDE
757	tristate "Q40/Q60 IDE interface support"
758	depends on Q40
759	help
760	Enable the on-board IDE controller in the Q40/Q60. This should
761	normally be on; disable it only if you are running a custom hard
762	drive subsystem through an expansion card.
763
764	config BLK_DEV_PALMCHIP_BK3710
765	tristate "Palmchip bk3710 IDE controller support"
766	depends on ARCH_DAVINCI
767	select IDE_TIMINGS
768	select BLK_DEV_IDEDMA_SFF
769	help
770	Say Y here if you want to support the onchip IDE controller on the
771	TI DaVinci SoC
772
773	# no isa -> no vlb
774	if ISA && (ALPHA \|\| X86 \|\| MIPS)
775
776	comment "Other IDE chipsets support"
777	comment "Note: most of these also require special kernel boot parameters"
778
779	config BLK_DEV_4DRIVES
780	tristate "Generic 4 drives/port support"
781	help
782	Certain older chipsets, including the Tekram 690CD, use a single set
783	of I/O ports at 0x1f0 to control up to four drives, instead of the
784	customary two drives per port. Support for this can be enabled at
785	runtime using the "ide-4drives.probe" kernel boot parameter if you
786	say Y here.
787
788	config BLK_DEV_ALI14XX
789	tristate "ALI M14xx support"
790	select IDE_TIMINGS
791	select IDE_LEGACY
792	help
793	This driver is enabled at runtime using the "ali14xx.probe" kernel
794	boot parameter. It enables support for the secondary IDE interface
795	of the ALI M1439/1443/1445/1487/1489 chipsets, and permits faster
796	I/O speeds to be set as well.
797	See the files <file:Documentation/ide/ide.rst> and
798	<file:drivers/ide/ali14xx.c> for more info.
799
800	config BLK_DEV_DTC2278
801	tristate "DTC-2278 support"
802	select IDE_XFER_MODE
803	select IDE_LEGACY
804	help
805	This driver is enabled at runtime using the "dtc2278.probe" kernel
806	boot parameter. It enables support for the secondary IDE interface
807	of the DTC-2278 card, and permits faster I/O speeds to be set as
808	well. See the <file:Documentation/ide/ide.rst> and
809	<file:drivers/ide/dtc2278.c> files for more info.
810
811	config BLK_DEV_HT6560B
812	tristate "Holtek HT6560B support"
813	select IDE_TIMINGS
814	select IDE_LEGACY
815	help
816	This driver is enabled at runtime using the "ht6560b.probe" kernel
817	boot parameter. It enables support for the secondary IDE interface
818	of the Holtek card, and permits faster I/O speeds to be set as well.
819	See the <file:Documentation/ide/ide.rst> and
820	<file:drivers/ide/ht6560b.c> files for more info.
821
822	config BLK_DEV_QD65XX
823	tristate "QDI QD65xx support"
824	select IDE_TIMINGS
825	select IDE_LEGACY
826	help
827	This driver is enabled at runtime using the "qd65xx.probe" kernel
828	boot parameter. It permits faster I/O speeds to be set. See the
829	<file:Documentation/ide/ide.rst> and <file:drivers/ide/qd65xx.c>
830	for more info.
831
832	config BLK_DEV_UMC8672
833	tristate "UMC-8672 support"
834	select IDE_XFER_MODE
835	select IDE_LEGACY
836	help
837	This driver is enabled at runtime using the "umc8672.probe" kernel
838	boot parameter. It enables support for the secondary IDE interface
839	of the UMC-8672, and permits faster I/O speeds to be set as well.
840	See the files <file:Documentation/ide/ide.rst> and
841	<file:drivers/ide/umc8672.c> for more info.
842
843	endif
844
845	config BLK_DEV_IDEDMA
846	def_bool BLK_DEV_IDEDMA_SFF \|\| BLK_DEV_IDEDMA_ICS
847	select IDE_XFER_MODE
848
849	endif # IDE

drivers/ide/Makefile+0−111

@@ -1,111 +0,0 @@
1	# SPDX-License-Identifier: GPL-2.0
2	#
3	# link order is important here
4	#
5
6	ide-core-y += ide.o ide-ioctls.o ide-io.o ide-iops.o ide-lib.o ide-probe.o \
7	ide-taskfile.o ide-pm.o ide-park.o ide-sysfs.o ide-devsets.o \
8	ide-io-std.o ide-eh.o
9
10	# core IDE code
11	ide-core-$(CONFIG_IDE_XFER_MODE) += ide-pio-blacklist.o ide-xfer-mode.o
12	ide-core-$(CONFIG_IDE_TIMINGS) += ide-timings.o
13	ide-core-$(CONFIG_IDE_ATAPI) += ide-atapi.o
14	ide-core-$(CONFIG_BLK_DEV_IDEPCI) += setup-pci.o
15	ide-core-$(CONFIG_BLK_DEV_IDEDMA) += ide-dma.o
16	ide-core-$(CONFIG_BLK_DEV_IDEDMA_SFF) += ide-dma-sff.o
17	ide-core-$(CONFIG_IDE_PROC_FS) += ide-proc.o
18	ide-core-$(CONFIG_BLK_DEV_IDEACPI) += ide-acpi.o
19	ide-core-$(CONFIG_IDE_LEGACY) += ide-legacy.o
20
21	obj-$(CONFIG_IDE) += ide-core.o
22
23	obj-$(CONFIG_BLK_DEV_ALI14XX) += ali14xx.o
24	obj-$(CONFIG_BLK_DEV_UMC8672) += umc8672.o
25	obj-$(CONFIG_BLK_DEV_DTC2278) += dtc2278.o
26	obj-$(CONFIG_BLK_DEV_HT6560B) += ht6560b.o
27	obj-$(CONFIG_BLK_DEV_QD65XX) += qd65xx.o
28	obj-$(CONFIG_BLK_DEV_4DRIVES) += ide-4drives.o
29
30	obj-$(CONFIG_BLK_DEV_GAYLE) += gayle.o
31	obj-$(CONFIG_BLK_DEV_FALCON_IDE) += falconide.o
32	obj-$(CONFIG_BLK_DEV_MAC_IDE) += macide.o
33	obj-$(CONFIG_BLK_DEV_Q40IDE) += q40ide.o
34	obj-$(CONFIG_BLK_DEV_BUDDHA) += buddha.o
35
36	obj-$(CONFIG_BLK_DEV_AEC62XX) += aec62xx.o
37	obj-$(CONFIG_BLK_DEV_ALI15X3) += alim15x3.o
38	obj-$(CONFIG_BLK_DEV_AMD74XX) += amd74xx.o
39	obj-$(CONFIG_BLK_DEV_ATIIXP) += atiixp.o
40	obj-$(CONFIG_BLK_DEV_CMD64X) += cmd64x.o
41	obj-$(CONFIG_BLK_DEV_CS5520) += cs5520.o
42	obj-$(CONFIG_BLK_DEV_CS5530) += cs5530.o
43	obj-$(CONFIG_BLK_DEV_CS5535) += cs5535.o
44	obj-$(CONFIG_BLK_DEV_CS5536) += cs5536.o
45	obj-$(CONFIG_BLK_DEV_SC1200) += sc1200.o
46	obj-$(CONFIG_BLK_DEV_CY82C693) += cy82c693.o
47	obj-$(CONFIG_BLK_DEV_DELKIN) += delkin_cb.o
48	obj-$(CONFIG_BLK_DEV_HPT366) += hpt366.o
49	obj-$(CONFIG_BLK_DEV_IT8172) += it8172.o
50	obj-$(CONFIG_BLK_DEV_IT8213) += it8213.o
51	obj-$(CONFIG_BLK_DEV_IT821X) += it821x.o
52	obj-$(CONFIG_BLK_DEV_JMICRON) += jmicron.o
53	obj-$(CONFIG_BLK_DEV_NS87415) += ns87415.o
54	obj-$(CONFIG_BLK_DEV_OPTI621) += opti621.o
55	obj-$(CONFIG_BLK_DEV_PDC202XX_OLD) += pdc202xx_old.o
56	obj-$(CONFIG_BLK_DEV_PDC202XX_NEW) += pdc202xx_new.o
57	obj-$(CONFIG_BLK_DEV_PIIX) += piix.o
58	obj-$(CONFIG_BLK_DEV_RZ1000) += rz1000.o
59	obj-$(CONFIG_BLK_DEV_SVWKS) += serverworks.o
60	obj-$(CONFIG_BLK_DEV_SIIMAGE) += siimage.o
61	obj-$(CONFIG_BLK_DEV_SIS5513) += sis5513.o
62	obj-$(CONFIG_BLK_DEV_SL82C105) += sl82c105.o
63	obj-$(CONFIG_BLK_DEV_SLC90E66) += slc90e66.o
64	obj-$(CONFIG_BLK_DEV_TC86C001) += tc86c001.o
65	obj-$(CONFIG_BLK_DEV_TRIFLEX) += triflex.o
66	obj-$(CONFIG_BLK_DEV_TRM290) += trm290.o
67	obj-$(CONFIG_BLK_DEV_VIA82CXXX) += via82cxxx.o
68
69	# Must appear at the end of the block
70	obj-$(CONFIG_BLK_DEV_GENERIC) += ide-pci-generic.o
71
72	obj-$(CONFIG_IDEPCI_PCIBUS_ORDER) += ide-scan-pci.o
73
74	obj-$(CONFIG_BLK_DEV_CMD640) += cmd640.o
75
76	obj-$(CONFIG_BLK_DEV_IDE_PMAC) += pmac.o
77
78	obj-$(CONFIG_IDE_GENERIC) += ide-generic.o
79	obj-$(CONFIG_BLK_DEV_IDEPNP) += ide-pnp.o
80
81	ide-gd_mod-y += ide-gd.o
82	ide-cd_mod-y += ide-cd.o ide-cd_ioctl.o ide-cd_verbose.o
83
84	ifeq ($(CONFIG_IDE_GD_ATA), y)
85	ide-gd_mod-y += ide-disk.o ide-disk_ioctl.o
86	ifeq ($(CONFIG_IDE_PROC_FS), y)
87	ide-gd_mod-y += ide-disk_proc.o
88	endif
89	endif
90
91	ifeq ($(CONFIG_IDE_GD_ATAPI), y)
92	ide-gd_mod-y += ide-floppy.o ide-floppy_ioctl.o
93	ifeq ($(CONFIG_IDE_PROC_FS), y)
94	ide-gd_mod-y += ide-floppy_proc.o
95	endif
96	endif
97
98	obj-$(CONFIG_IDE_GD) += ide-gd_mod.o
99	obj-$(CONFIG_BLK_DEV_IDECD) += ide-cd_mod.o
100	obj-$(CONFIG_BLK_DEV_IDETAPE) += ide-tape.o
101
102	obj-$(CONFIG_BLK_DEV_IDECS) += ide-cs.o
103
104	obj-$(CONFIG_BLK_DEV_PLATFORM) += ide_platform.o
105
106	obj-$(CONFIG_BLK_DEV_IDE_ICSIDE) += icside.o
107	obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapide.o
108	obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710) += palm_bk3710.o
109
110	obj-$(CONFIG_BLK_DEV_IDE_TX4938) += tx4938ide.o
111	obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o

drivers/ide/aec62xx.c+0−331

@@ -1,331 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
4	* Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
5	*
6	*/
7
8	#include <linux/module.h>
9	#include <linux/types.h>
10	#include <linux/pci.h>
11	#include <linux/ide.h>
12	#include <linux/init.h>
13
14	#include <asm/io.h>
15
16	#define DRV_NAME "aec62xx"
17
18	struct chipset_bus_clock_list_entry {
19	u8 xfer_speed;
20	u8 chipset_settings;
21	u8 ultra_settings;
22	};
23
24	static const struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
25	{ XFER_UDMA_6, 0x31, 0x07 },
26	{ XFER_UDMA_5, 0x31, 0x06 },
27	{ XFER_UDMA_4, 0x31, 0x05 },
28	{ XFER_UDMA_3, 0x31, 0x04 },
29	{ XFER_UDMA_2, 0x31, 0x03 },
30	{ XFER_UDMA_1, 0x31, 0x02 },
31	{ XFER_UDMA_0, 0x31, 0x01 },
32
33	{ XFER_MW_DMA_2, 0x31, 0x00 },
34	{ XFER_MW_DMA_1, 0x31, 0x00 },
35	{ XFER_MW_DMA_0, 0x0a, 0x00 },
36	{ XFER_PIO_4, 0x31, 0x00 },
37	{ XFER_PIO_3, 0x33, 0x00 },
38	{ XFER_PIO_2, 0x08, 0x00 },
39	{ XFER_PIO_1, 0x0a, 0x00 },
40	{ XFER_PIO_0, 0x00, 0x00 },
41	{ 0, 0x00, 0x00 }
42	};
43
44	static const struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
45	{ XFER_UDMA_6, 0x41, 0x06 },
46	{ XFER_UDMA_5, 0x41, 0x05 },
47	{ XFER_UDMA_4, 0x41, 0x04 },
48	{ XFER_UDMA_3, 0x41, 0x03 },
49	{ XFER_UDMA_2, 0x41, 0x02 },
50	{ XFER_UDMA_1, 0x41, 0x01 },
51	{ XFER_UDMA_0, 0x41, 0x01 },
52
53	{ XFER_MW_DMA_2, 0x41, 0x00 },
54	{ XFER_MW_DMA_1, 0x42, 0x00 },
55	{ XFER_MW_DMA_0, 0x7a, 0x00 },
56	{ XFER_PIO_4, 0x41, 0x00 },
57	{ XFER_PIO_3, 0x43, 0x00 },
58	{ XFER_PIO_2, 0x78, 0x00 },
59	{ XFER_PIO_1, 0x7a, 0x00 },
60	{ XFER_PIO_0, 0x70, 0x00 },
61	{ 0, 0x00, 0x00 }
62	};
63
64	/*
65	* TO DO: active tuning and correction of cards without a bios.
66	*/
67	static u8 pci_bus_clock_list (u8 speed, struct chipset_bus_clock_list_entry * chipset_table)
68	{
69	for ( ; chipset_table->xfer_speed ; chipset_table++)
70	if (chipset_table->xfer_speed == speed) {
71	return chipset_table->chipset_settings;
72	}
73	return chipset_table->chipset_settings;
74	}
75
76	static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entry * chipset_table)
77	{
78	for ( ; chipset_table->xfer_speed ; chipset_table++)
79	if (chipset_table->xfer_speed == speed) {
80	return chipset_table->ultra_settings;
81	}
82	return chipset_table->ultra_settings;
83	}
84
85	static void aec6210_set_mode(ide_hwif_t hwif, ide_drive_t drive)
86	{
87	struct pci_dev *dev = to_pci_dev(hwif->dev);
88	struct ide_host *host = pci_get_drvdata(dev);
89	struct chipset_bus_clock_list_entry *bus_clock = host->host_priv;
90	u16 d_conf = 0;
91	u8 ultra = 0, ultra_conf = 0;
92	u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
93	const u8 speed = drive->dma_mode;
94	unsigned long flags;
95
96	local_irq_save(flags);
97	/* 0x40\|(2drive->dn): Active, 0x41\|(2drive->dn): Recovery */
98	pci_read_config_word(dev, 0x40\|(2*drive->dn), &d_conf);
99	tmp0 = pci_bus_clock_list(speed, bus_clock);
100	d_conf = ((tmp0 & 0xf0) << 4) \| (tmp0 & 0xf);
101	pci_write_config_word(dev, 0x40\|(2*drive->dn), d_conf);
102
103	tmp1 = 0x00;
104	tmp2 = 0x00;
105	pci_read_config_byte(dev, 0x54, &ultra);
106	tmp1 = ((0x00 << (2drive->dn)) \| (ultra & ~(3 << (2drive->dn))));
107	ultra_conf = pci_bus_clock_list_ultra(speed, bus_clock);
108	tmp2 = ((ultra_conf << (2drive->dn)) \| (tmp1 & ~(3 << (2drive->dn))));
109	pci_write_config_byte(dev, 0x54, tmp2);
110	local_irq_restore(flags);
111	}
112
113	static void aec6260_set_mode(ide_hwif_t hwif, ide_drive_t drive)
114	{
115	struct pci_dev *dev = to_pci_dev(hwif->dev);
116	struct ide_host *host = pci_get_drvdata(dev);
117	struct chipset_bus_clock_list_entry *bus_clock = host->host_priv;
118	u8 unit = drive->dn & 1;
119	u8 tmp1 = 0, tmp2 = 0;
120	u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
121	const u8 speed = drive->dma_mode;
122	unsigned long flags;
123
124	local_irq_save(flags);
125	/* high 4-bits: Active, low 4-bits: Recovery */
126	pci_read_config_byte(dev, 0x40\|drive->dn, &drive_conf);
127	drive_conf = pci_bus_clock_list(speed, bus_clock);
128	pci_write_config_byte(dev, 0x40\|drive->dn, drive_conf);
129
130	pci_read_config_byte(dev, (0x44\|hwif->channel), &ultra);
131	tmp1 = ((0x00 << (4unit)) \| (ultra & ~(7 << (4unit))));
132	ultra_conf = pci_bus_clock_list_ultra(speed, bus_clock);
133	tmp2 = ((ultra_conf << (4unit)) \| (tmp1 & ~(7 << (4unit))));
134	pci_write_config_byte(dev, (0x44\|hwif->channel), tmp2);
135	local_irq_restore(flags);
136	}
137
138	static void aec_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
139	{
140	drive->dma_mode = drive->pio_mode;
141	hwif->port_ops->set_dma_mode(hwif, drive);
142	}
143
144	static int init_chipset_aec62xx(struct pci_dev *dev)
145	{
146	/* These are necessary to get AEC6280 Macintosh cards to work */
147	if ((dev->device == PCI_DEVICE_ID_ARTOP_ATP865) \|\|
148	(dev->device == PCI_DEVICE_ID_ARTOP_ATP865R)) {
149	u8 reg49h = 0, reg4ah = 0;
150	/* Clear reset and test bits. */
151	pci_read_config_byte(dev, 0x49, &reg49h);
152	pci_write_config_byte(dev, 0x49, reg49h & ~0x30);
153	/* Enable chip interrupt output. */
154	pci_read_config_byte(dev, 0x4a, &reg4ah);
155	pci_write_config_byte(dev, 0x4a, reg4ah & ~0x01);
156	/* Enable burst mode. */
157	pci_read_config_byte(dev, 0x4a, &reg4ah);
158	pci_write_config_byte(dev, 0x4a, reg4ah \| 0x80);
159	}
160
161	return 0;
162	}
163
164	static u8 atp86x_cable_detect(ide_hwif_t *hwif)
165	{
166	struct pci_dev *dev = to_pci_dev(hwif->dev);
167	u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01;
168
169	pci_read_config_byte(dev, 0x49, &ata66);
170
171	return (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
172	}
173
174	static const struct ide_port_ops atp850_port_ops = {
175	.set_pio_mode = aec_set_pio_mode,
176	.set_dma_mode = aec6210_set_mode,
177	};
178
179	static const struct ide_port_ops atp86x_port_ops = {
180	.set_pio_mode = aec_set_pio_mode,
181	.set_dma_mode = aec6260_set_mode,
182	.cable_detect = atp86x_cable_detect,
183	};
184
185	static const struct ide_port_info aec62xx_chipsets[] = {
186	{ /* 0: AEC6210 */
187	.name = DRV_NAME,
188	.init_chipset = init_chipset_aec62xx,
189	.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
190	.port_ops = &atp850_port_ops,
191	.host_flags = IDE_HFLAG_SERIALIZE \|
192	IDE_HFLAG_NO_ATAPI_DMA \|
193	IDE_HFLAG_NO_DSC \|
194	IDE_HFLAG_OFF_BOARD,
195	.pio_mask = ATA_PIO4,
196	.mwdma_mask = ATA_MWDMA2,
197	.udma_mask = ATA_UDMA2,
198	},
199	{ /* 1: AEC6260 */
200	.name = DRV_NAME,
201	.init_chipset = init_chipset_aec62xx,
202	.port_ops = &atp86x_port_ops,
203	.host_flags = IDE_HFLAG_NO_ATAPI_DMA \| IDE_HFLAG_NO_AUTODMA \|
204	IDE_HFLAG_OFF_BOARD,
205	.pio_mask = ATA_PIO4,
206	.mwdma_mask = ATA_MWDMA2,
207	.udma_mask = ATA_UDMA4,
208	},
209	{ /* 2: AEC6260R */
210	.name = DRV_NAME,
211	.init_chipset = init_chipset_aec62xx,
212	.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
213	.port_ops = &atp86x_port_ops,
214	.host_flags = IDE_HFLAG_NO_ATAPI_DMA \|
215	IDE_HFLAG_NON_BOOTABLE,
216	.pio_mask = ATA_PIO4,
217	.mwdma_mask = ATA_MWDMA2,
218	.udma_mask = ATA_UDMA4,
219	},
220	{ /* 3: AEC6280 */
221	.name = DRV_NAME,
222	.init_chipset = init_chipset_aec62xx,
223	.port_ops = &atp86x_port_ops,
224	.host_flags = IDE_HFLAG_NO_ATAPI_DMA \|
225	IDE_HFLAG_OFF_BOARD,
226	.pio_mask = ATA_PIO4,
227	.mwdma_mask = ATA_MWDMA2,
228	.udma_mask = ATA_UDMA5,
229	},
230	{ /* 4: AEC6280R */
231	.name = DRV_NAME,
232	.init_chipset = init_chipset_aec62xx,
233	.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
234	.port_ops = &atp86x_port_ops,
235	.host_flags = IDE_HFLAG_NO_ATAPI_DMA \|
236	IDE_HFLAG_OFF_BOARD,
237	.pio_mask = ATA_PIO4,
238	.mwdma_mask = ATA_MWDMA2,
239	.udma_mask = ATA_UDMA5,
240	}
241	};
242
243	/**
244	* aec62xx_init_one - called when a AEC is found
245	* @dev: the aec62xx device
246	* @id: the matching pci id
247	*
248	* Called when the PCI registration layer (or the IDE initialization)
249	* finds a device matching our IDE device tables.
250	*
251	* NOTE: since we're going to modify the 'name' field for AEC-6[26]80[R]
252	* chips, pass a local copy of 'struct ide_port_info' down the call chain.
253	*/
254
255	static int aec62xx_init_one(struct pci_dev dev, const struct pci_device_id id)
256	{
257	const struct chipset_bus_clock_list_entry *bus_clock;
258	struct ide_port_info d;
259	u8 idx = id->driver_data;
260	int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
261	int err;
262
263	if (bus_speed <= 33)
264	bus_clock = aec6xxx_33_base;
265	else
266	bus_clock = aec6xxx_34_base;
267
268	err = pci_enable_device(dev);
269	if (err)
270	return err;
271
272	d = aec62xx_chipsets[idx];
273
274	if (idx == 3 \|\| idx == 4) {
275	unsigned long dma_base = pci_resource_start(dev, 4);
276
277	if (inb(dma_base + 2) & 0x10) {
278	printk(KERN_INFO DRV_NAME " %s: AEC6880%s card detected"
279	"\n", pci_name(dev), (idx == 4) ? "R" : "");
280	d.udma_mask = ATA_UDMA6;
281	}
282	}
283
284	err = ide_pci_init_one(dev, &d, (void *)bus_clock);
285	if (err)
286	pci_disable_device(dev);
287
288	return err;
289	}
290
291	static void aec62xx_remove(struct pci_dev *dev)
292	{
293	ide_pci_remove(dev);
294	pci_disable_device(dev);
295	}
296
297	static const struct pci_device_id aec62xx_pci_tbl[] = {
298	{ PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF), 0 },
299	{ PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP860), 1 },
300	{ PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R), 2 },
301	{ PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP865), 3 },
302	{ PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R), 4 },
303	{ 0, },
304	};
305	MODULE_DEVICE_TABLE(pci, aec62xx_pci_tbl);
306
307	static struct pci_driver aec62xx_pci_driver = {
308	.name = "AEC62xx_IDE",
309	.id_table = aec62xx_pci_tbl,
310	.probe = aec62xx_init_one,
311	.remove = aec62xx_remove,
312	.suspend = ide_pci_suspend,
313	.resume = ide_pci_resume,
314	};
315
316	static int __init aec62xx_ide_init(void)
317	{
318	return ide_pci_register_driver(&aec62xx_pci_driver);
319	}
320
321	static void __exit aec62xx_ide_exit(void)
322	{
323	pci_unregister_driver(&aec62xx_pci_driver);
324	}
325
326	module_init(aec62xx_ide_init);
327	module_exit(aec62xx_ide_exit);
328
329	MODULE_AUTHOR("Andre Hedrick");
330	MODULE_DESCRIPTION("PCI driver module for ARTOP AEC62xx IDE");
331	MODULE_LICENSE("GPL");

drivers/ide/ali14xx.c+0−250

@@ -1,250 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 1996 Linus Torvalds & author (see below)
4	*/
5
6	/*
7	* ALI M14xx chipset EIDE controller
8	*
9	* Works for ALI M1439/1443/1445/1487/1489 chipsets.
10	*
11	* Adapted from code developed by derekn@vw.ece.cmu.edu. -ml
12	* Derek's notes follow:
13	*
14	* I think the code should be pretty understandable,
15	* but I'll be happy to (try to) answer questions.
16	*
17	* The critical part is in the setupDrive function. The initRegisters
18	* function doesn't seem to be necessary, but the DOS driver does it, so
19	* I threw it in.
20	*
21	* I've only tested this on my system, which only has one disk. I posted
22	* it to comp.sys.linux.hardware, so maybe some other people will try it
23	* out.
24	*
25	* Derek Noonburg (derekn@ece.cmu.edu)
26	* 95-sep-26
27	*
28	* Update 96-jul-13:
29	*
30	* I've since upgraded to two disks and a CD-ROM, with no trouble, and
31	* I've also heard from several others who have used it successfully.
32	* This driver appears to work with both the 1443/1445 and the 1487/1489
33	* chipsets. I've added support for PIO mode 4 for the 1487. This
34	* seems to work just fine on the 1443 also, although I'm not sure it's
35	* advertised as supporting mode 4. (I've been running a WDC AC21200 in
36	* mode 4 for a while now with no trouble.) -Derek
37	*/
38
39	#include <linux/module.h>
40	#include <linux/types.h>
41	#include <linux/kernel.h>
42	#include <linux/delay.h>
43	#include <linux/timer.h>
44	#include <linux/mm.h>
45	#include <linux/ioport.h>
46	#include <linux/blkdev.h>
47	#include <linux/ide.h>
48	#include <linux/init.h>
49
50	#include <asm/io.h>
51
52	#define DRV_NAME "ali14xx"
53
54	/* port addresses for auto-detection */
55	#define ALI_NUM_PORTS 4
56	static const int ports[ALI_NUM_PORTS] __initconst =
57	{ 0x074, 0x0f4, 0x034, 0x0e4 };
58
59	/* register initialization data */
60	typedef struct { u8 reg, data; } RegInitializer;
61
62	static const RegInitializer initData[] __initconst = {
63	{0x01, 0x0f}, {0x02, 0x00}, {0x03, 0x00}, {0x04, 0x00},
64	{0x05, 0x00}, {0x06, 0x00}, {0x07, 0x2b}, {0x0a, 0x0f},
65	{0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00},
66	{0x29, 0x00}, {0x2a, 0x00}, {0x2f, 0x00}, {0x2b, 0x00},
67	{0x2c, 0x00}, {0x2d, 0x00}, {0x2e, 0x00}, {0x30, 0x00},
68	{0x31, 0x00}, {0x32, 0x00}, {0x33, 0x00}, {0x34, 0xff},
69	{0x35, 0x03}, {0x00, 0x00}
70	};
71
72	/* timing parameter registers for each drive */
73	static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
74	{0x03, 0x26, 0x04, 0x27}, /* drive 0 */
75	{0x05, 0x28, 0x06, 0x29}, /* drive 1 */
76	{0x2b, 0x30, 0x2c, 0x31}, /* drive 2 */
77	{0x2d, 0x32, 0x2e, 0x33}, /* drive 3 */
78	};
79
80	static int basePort; /* base port address */
81	static int regPort; /* port for register number */
82	static int dataPort; /* port for register data */
83	static u8 regOn; /* output to base port to access registers */
84	static u8 regOff; /* output to base port to close registers */
85
86	/------------------------------------------------------------------------/
87
88	/*
89	* Read a controller register.
90	*/
91	static inline u8 inReg(u8 reg)
92	{
93	outb_p(reg, regPort);
94	return inb(dataPort);
95	}
96
97	/*
98	* Write a controller register.
99	*/
100	static void outReg(u8 data, u8 reg)
101	{
102	outb_p(reg, regPort);
103	outb_p(data, dataPort);
104	}
105
106	static DEFINE_SPINLOCK(ali14xx_lock);
107
108	/*
109	* Set PIO mode for the specified drive.
110	* This function computes timing parameters
111	* and sets controller registers accordingly.
112	*/
113	static void ali14xx_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
114	{
115	int driveNum;
116	int time1, time2;
117	u8 param1, param2, param3, param4;
118	unsigned long flags;
119	int bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
120	const u8 pio = drive->pio_mode - XFER_PIO_0;
121	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
122
123	/* calculate timing, according to PIO mode */
124	time1 = ide_pio_cycle_time(drive, pio);
125	time2 = t->active;
126	param3 = param1 = (time2 * bus_speed + 999) / 1000;
127	param4 = param2 = (time1 * bus_speed + 999) / 1000 - param1;
128	if (pio < 3) {
129	param3 += 8;
130	param4 += 8;
131	}
132	printk(KERN_DEBUG "%s: PIO mode%d, t1=%dns, t2=%dns, cycles = %d+%d, %d+%d\n",
133	drive->name, pio, time1, time2, param1, param2, param3, param4);
134
135	/* stuff timing parameters into controller registers */
136	driveNum = (drive->hwif->index << 1) + (drive->dn & 1);
137	spin_lock_irqsave(&ali14xx_lock, flags);
138	outb_p(regOn, basePort);
139	outReg(param1, regTab[driveNum].reg1);
140	outReg(param2, regTab[driveNum].reg2);
141	outReg(param3, regTab[driveNum].reg3);
142	outReg(param4, regTab[driveNum].reg4);
143	outb_p(regOff, basePort);
144	spin_unlock_irqrestore(&ali14xx_lock, flags);
145	}
146
147	/*
148	* Auto-detect the IDE controller port.
149	*/
150	static int __init findPort(void)
151	{
152	int i;
153	u8 t;
154	unsigned long flags;
155
156	local_irq_save(flags);
157	for (i = 0; i < ALI_NUM_PORTS; ++i) {
158	basePort = ports[i];
159	regOff = inb(basePort);
160	for (regOn = 0x30; regOn <= 0x33; ++regOn) {
161	outb_p(regOn, basePort);
162	if (inb(basePort) == regOn) {
163	regPort = basePort + 4;
164	dataPort = basePort + 8;
165	t = inReg(0) & 0xf0;
166	outb_p(regOff, basePort);
167	local_irq_restore(flags);
168	if (t != 0x50)
169	return 0;
170	return 1; /* success */
171	}
172	}
173	outb_p(regOff, basePort);
174	}
175	local_irq_restore(flags);
176	return 0;
177	}
178
179	/*
180	* Initialize controller registers with default values.
181	*/
182	static int __init initRegisters(void)
183	{
184	const RegInitializer *p;
185	u8 t;
186	unsigned long flags;
187
188	local_irq_save(flags);
189	outb_p(regOn, basePort);
190	for (p = initData; p->reg != 0; ++p)
191	outReg(p->data, p->reg);
192	outb_p(0x01, regPort);
193	t = inb(regPort) & 0x01;
194	outb_p(regOff, basePort);
195	local_irq_restore(flags);
196	return t;
197	}
198
199	static const struct ide_port_ops ali14xx_port_ops = {
200	.set_pio_mode = ali14xx_set_pio_mode,
201	};
202
203	static const struct ide_port_info ali14xx_port_info = {
204	.name = DRV_NAME,
205	.chipset = ide_ali14xx,
206	.port_ops = &ali14xx_port_ops,
207	.host_flags = IDE_HFLAG_NO_DMA,
208	.pio_mask = ATA_PIO4,
209	};
210
211	static int __init ali14xx_probe(void)
212	{
213	printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n",
214	basePort, regOn);
215
216	/* initialize controller registers */
217	if (!initRegisters()) {
218	printk(KERN_ERR "ali14xx: Chip initialization failed.\n");
219	return 1;
220	}
221
222	return ide_legacy_device_add(&ali14xx_port_info, 0);
223	}
224
225	static bool probe_ali14xx;
226
227	module_param_named(probe, probe_ali14xx, bool, 0);
228	MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
229
230	static int __init ali14xx_init(void)
231	{
232	if (probe_ali14xx == 0)
233	goto out;
234
235	/* auto-detect IDE controller port */
236	if (findPort()) {
237	if (ali14xx_probe())
238	return -ENODEV;
239	return 0;
240	}
241	printk(KERN_ERR "ali14xx: not found.\n");
242	out:
243	return -ENODEV;
244	}
245
246	module_init(ali14xx_init);
247
248	MODULE_AUTHOR("see local file");
249	MODULE_DESCRIPTION("support of ALI 14XX IDE chipsets");
250	MODULE_LICENSE("GPL");

drivers/ide/alim15x3.c+0−602

@@ -1,602 +0,0 @@
1	/*
2	* Copyright (C) 1998-2000 Michel Aubry, Maintainer
3	* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
4	* Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
5	*
6	* Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
7	* May be copied or modified under the terms of the GNU General Public License
8	* Copyright (C) 2002 Alan Cox
9	* ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
10	* Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
11	* Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
12	*
13	* (U)DMA capable version of ali 1533/1543(C), 1535(D)
14	*
15	**********************************************************************
16	* 9/7/99 --Parts from the above author are included and need to be
17	* converted into standard interface, once I finish the thought.
18	*
19	* Recent changes
20	* Don't use LBA48 mode on ALi <= 0xC4
21	* Don't poke 0x79 with a non ALi northbridge
22	* Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
23	* Allow UDMA6 on revisions > 0xC4
24	*
25	* Documentation
26	* Chipset documentation available under NDA only
27	*
28	*/
29
30	#include <linux/module.h>
31	#include <linux/types.h>
32	#include <linux/kernel.h>
33	#include <linux/pci.h>
34	#include <linux/ide.h>
35	#include <linux/init.h>
36	#include <linux/dmi.h>
37
38	#include <asm/io.h>
39
40	#define DRV_NAME "alim15x3"
41
42	/*
43	* ALi devices are not plug in. Otherwise these static values would
44	* need to go. They ought to go away anyway
45	*/
46
47	static u8 m5229_revision;
48	static u8 chip_is_1543c_e;
49	static struct pci_dev *isa_dev;
50
51	static void ali_fifo_control(ide_hwif_t hwif, ide_drive_t drive, int on)
52	{
53	struct pci_dev *pdev = to_pci_dev(hwif->dev);
54	int pio_fifo = 0x54 + hwif->channel;
55	u8 fifo;
56	int shift = 4 * (drive->dn & 1);
57
58	pci_read_config_byte(pdev, pio_fifo, &fifo);
59	fifo &= ~(0x0F << shift);
60	fifo \|= (on << shift);
61	pci_write_config_byte(pdev, pio_fifo, fifo);
62	}
63
64	static void ali_program_timings(ide_hwif_t hwif, ide_drive_t drive,
65	struct ide_timing *t, u8 ultra)
66	{
67	struct pci_dev *dev = to_pci_dev(hwif->dev);
68	int port = hwif->channel ? 0x5c : 0x58;
69	int udmat = 0x56 + hwif->channel;
70	u8 unit = drive->dn & 1, udma;
71	int shift = 4 * unit;
72
73	/* Set up the UDMA */
74	pci_read_config_byte(dev, udmat, &udma);
75	udma &= ~(0x0F << shift);
76	udma \|= ultra << shift;
77	pci_write_config_byte(dev, udmat, udma);
78
79	if (t == NULL)
80	return;
81
82	t->setup = clamp_val(t->setup, 1, 8) & 7;
83	t->act8b = clamp_val(t->act8b, 1, 8) & 7;
84	t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
85	t->active = clamp_val(t->active, 1, 8) & 7;
86	t->recover = clamp_val(t->recover, 1, 16) & 15;
87
88	pci_write_config_byte(dev, port, t->setup);
89	pci_write_config_byte(dev, port + 1, (t->act8b << 4) \| t->rec8b);
90	pci_write_config_byte(dev, port + unit + 2,
91	(t->active << 4) \| t->recover);
92	}
93
94	/**
95	* ali_set_pio_mode - set host controller for PIO mode
96	* @hwif: port
97	* @drive: drive
98	*
99	* Program the controller for the given PIO mode.
100	*/
101
102	static void ali_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
103	{
104	ide_drive_t *pair = ide_get_pair_dev(drive);
105	int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
106	unsigned long T = 1000000 / bus_speed; /* PCI clock based */
107	struct ide_timing t;
108
109	ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
110	if (pair) {
111	struct ide_timing p;
112
113	ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
114	ide_timing_merge(&p, &t, &t,
115	IDE_TIMING_SETUP \| IDE_TIMING_8BIT);
116	if (pair->dma_mode) {
117	ide_timing_compute(pair, pair->dma_mode, &p, T, 1);
118	ide_timing_merge(&p, &t, &t,
119	IDE_TIMING_SETUP \| IDE_TIMING_8BIT);
120	}
121	}
122
123	/*
124	* PIO mode => ATA FIFO on, ATAPI FIFO off
125	*/
126	ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
127
128	ali_program_timings(hwif, drive, &t, 0);
129	}
130
131	/**
132	* ali_udma_filter - compute UDMA mask
133	* @drive: IDE device
134	*
135	* Return available UDMA modes.
136	*
137	* The actual rules for the ALi are:
138	* No UDMA on revisions <= 0x20
139	* Disk only for revisions < 0xC2
140	* Not WDC drives on M1543C-E (?)
141	*/
142
143	static u8 ali_udma_filter(ide_drive_t *drive)
144	{
145	if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
146	if (drive->media != ide_disk)
147	return 0;
148	if (chip_is_1543c_e &&
149	strstr((char *)&drive->id[ATA_ID_PROD], "WDC "))
150	return 0;
151	}
152
153	return drive->hwif->ultra_mask;
154	}
155
156	/**
157	* ali_set_dma_mode - set host controller for DMA mode
158	* @hwif: port
159	* @drive: drive
160	*
161	* Configure the hardware for the desired IDE transfer mode.
162	*/
163
164	static void ali_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
165	{
166	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
167	struct pci_dev *dev = to_pci_dev(hwif->dev);
168	ide_drive_t *pair = ide_get_pair_dev(drive);
169	int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
170	unsigned long T = 1000000 / bus_speed; /* PCI clock based */
171	const u8 speed = drive->dma_mode;
172	u8 tmpbyte = 0x00;
173	struct ide_timing t;
174
175	if (speed < XFER_UDMA_0) {
176	ide_timing_compute(drive, drive->dma_mode, &t, T, 1);
177	if (pair) {
178	struct ide_timing p;
179
180	ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
181	ide_timing_merge(&p, &t, &t,
182	IDE_TIMING_SETUP \| IDE_TIMING_8BIT);
183	if (pair->dma_mode) {
184	ide_timing_compute(pair, pair->dma_mode,
185	&p, T, 1);
186	ide_timing_merge(&p, &t, &t,
187	IDE_TIMING_SETUP \| IDE_TIMING_8BIT);
188	}
189	}
190	ali_program_timings(hwif, drive, &t, 0);
191	} else {
192	ali_program_timings(hwif, drive, NULL,
193	udma_timing[speed - XFER_UDMA_0]);
194	if (speed >= XFER_UDMA_3) {
195	pci_read_config_byte(dev, 0x4b, &tmpbyte);
196	tmpbyte \|= 1;
197	pci_write_config_byte(dev, 0x4b, tmpbyte);
198	}
199	}
200	}
201
202	/**
203	* ali_dma_check - DMA check
204	* @drive: target device
205	* @cmd: command
206	*
207	* Returns 1 if the DMA cannot be performed, zero on success.
208	*/
209
210	static int ali_dma_check(ide_drive_t drive, struct ide_cmd cmd)
211	{
212	if (m5229_revision < 0xC2 && drive->media != ide_disk) {
213	if (cmd->tf_flags & IDE_TFLAG_WRITE)
214	return 1; /* try PIO instead of DMA */
215	}
216	return 0;
217	}
218
219	/**
220	* init_chipset_ali15x3 - Initialise an ALi IDE controller
221	* @dev: PCI device
222	*
223	* This function initializes the ALI IDE controller and where
224	* appropriate also sets up the 1533 southbridge.
225	*/
226
227	static int init_chipset_ali15x3(struct pci_dev *dev)
228	{
229	unsigned long flags;
230	u8 tmpbyte;
231	struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
232
233	m5229_revision = dev->revision;
234
235	isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
236
237	local_irq_save(flags);
238
239	if (m5229_revision < 0xC2) {
240	/*
241	* revision 0x20 (1543-E, 1543-F)
242	* revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
243	* clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
244	*/
245	pci_read_config_byte(dev, 0x4b, &tmpbyte);
246	/*
247	* clear bit 7
248	*/
249	pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
250	/*
251	* check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
252	*/
253	if (m5229_revision >= 0x20 && isa_dev) {
254	pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
255	chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
256	}
257	goto out;
258	}
259
260	/*
261	* 1543C-B?, 1535, 1535D, 1553
262	* Note 1: not all "motherboard" support this detection
263	* Note 2: if no udma 66 device, the detection may "error".
264	* but in this case, we will not set the device to
265	* ultra 66, the detection result is not important
266	*/
267
268	/*
269	* enable "Cable Detection", m5229, 0x4b, bit3
270	*/
271	pci_read_config_byte(dev, 0x4b, &tmpbyte);
272	pci_write_config_byte(dev, 0x4b, tmpbyte \| 0x08);
273
274	/*
275	* We should only tune the 1533 enable if we are using an ALi
276	* North bridge. We might have no north found on some zany
277	* box without a device at 0:0.0. The ALi bridge will be at
278	* 0:0.0 so if we didn't find one we know what is cooking.
279	*/
280	if (north && north->vendor != PCI_VENDOR_ID_AL)
281	goto out;
282
283	if (m5229_revision < 0xC5 && isa_dev)
284	{
285	/*
286	* set south-bridge's enable bit, m1533, 0x79
287	*/
288
289	pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
290	if (m5229_revision == 0xC2) {
291	/*
292	* 1543C-B0 (m1533, 0x79, bit 2)
293	*/
294	pci_write_config_byte(isa_dev, 0x79, tmpbyte \| 0x04);
295	} else if (m5229_revision >= 0xC3) {
296	/*
297	* 1553/1535 (m1533, 0x79, bit 1)
298	*/
299	pci_write_config_byte(isa_dev, 0x79, tmpbyte \| 0x02);
300	}
301	}
302
303	out:
304	/*
305	* CD_ROM DMA on (m5229, 0x53, bit0)
306	* Enable this bit even if we want to use PIO.
307	* PIO FIFO off (m5229, 0x53, bit1)
308	* The hardware will use 0x54h and 0x55h to control PIO FIFO.
309	* (Not on later devices it seems)
310	*
311	* 0x53 changes meaning on later revs - we must no touch
312	* bit 1 on them. Need to check if 0x20 is the right break.
313	*/
314	if (m5229_revision >= 0x20) {
315	pci_read_config_byte(dev, 0x53, &tmpbyte);
316
317	if (m5229_revision <= 0x20)
318	tmpbyte = (tmpbyte & (~0x02)) \| 0x01;
319	else if (m5229_revision == 0xc7 \|\| m5229_revision == 0xc8)
320	tmpbyte \|= 0x03;
321	else
322	tmpbyte \|= 0x01;
323
324	pci_write_config_byte(dev, 0x53, tmpbyte);
325	}
326	local_irq_restore(flags);
327	pci_dev_put(north);
328	pci_dev_put(isa_dev);
329	return 0;
330	}
331
332	/*
333	* Cable special cases
334	*/
335
336	static const struct dmi_system_id cable_dmi_table[] = {
337	{
338	.ident = "HP Pavilion N5430",
339	.matches = {
340	DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
341	DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
342	},
343	},
344	{
345	.ident = "Toshiba Satellite S1800-814",
346	.matches = {
347	DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
348	DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
349	},
350	},
351	{ }
352	};
353
354	static int ali_cable_override(struct pci_dev *pdev)
355	{
356	/* Fujitsu P2000 */
357	if (pdev->subsystem_vendor == 0x10CF &&
358	pdev->subsystem_device == 0x10AF)
359	return 1;
360
361	/* Mitac 8317 (Winbook-A) and relatives */
362	if (pdev->subsystem_vendor == 0x1071 &&
363	pdev->subsystem_device == 0x8317)
364	return 1;
365
366	/* Systems by DMI */
367	if (dmi_check_system(cable_dmi_table))
368	return 1;
369
370	return 0;
371	}
372
373	/**
374	* ali_cable_detect - cable detection
375	* @hwif: IDE interface
376	*
377	* This checks if the controller and the cable are capable
378	* of UDMA66 transfers. It doesn't check the drives.
379	*/
380
381	static u8 ali_cable_detect(ide_hwif_t *hwif)
382	{
383	struct pci_dev *dev = to_pci_dev(hwif->dev);
384	u8 cbl = ATA_CBL_PATA40, tmpbyte;
385
386	if (m5229_revision >= 0xC2) {
387	/*
388	* m5229 80-pin cable detection (from Host View)
389	*
390	* 0x4a bit0 is 0 => primary channel has 80-pin
391	* 0x4a bit1 is 0 => secondary channel has 80-pin
392	*
393	* Certain laptops use short but suitable cables
394	* and don't implement the detect logic.
395	*/
396	if (ali_cable_override(dev))
397	cbl = ATA_CBL_PATA40_SHORT;
398	else {
399	pci_read_config_byte(dev, 0x4a, &tmpbyte);
400	if ((tmpbyte & (1 << hwif->channel)) == 0)
401	cbl = ATA_CBL_PATA80;
402	}
403	}
404
405	return cbl;
406	}
407
408	#ifndef CONFIG_SPARC64
409	/**
410	* init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
411	* @hwif: interface to configure
412	*
413	* Obtain the IRQ tables for an ALi based IDE solution on the PC
414	* class platforms. This part of the code isn't applicable to the
415	* Sparc systems.
416	*/
417
418	static void init_hwif_ali15x3(ide_hwif_t *hwif)
419	{
420	u8 ideic, inmir;
421	s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
422	1, 11, 0, 12, 0, 14, 0, 15 };
423	int irq = -1;
424
425	if (isa_dev) {
426	/*
427	* read IDE interface control
428	*/
429	pci_read_config_byte(isa_dev, 0x58, &ideic);
430
431	/* bit0, bit1 */
432	ideic = ideic & 0x03;
433
434	/* get IRQ for IDE Controller */
435	if ((hwif->channel && ideic == 0x03) \|\|
436	(!hwif->channel && !ideic)) {
437	/*
438	* get SIRQ1 routing table
439	*/
440	pci_read_config_byte(isa_dev, 0x44, &inmir);
441	inmir = inmir & 0x0f;
442	irq = irq_routing_table[inmir];
443	} else if (hwif->channel && !(ideic & 0x01)) {
444	/*
445	* get SIRQ2 routing table
446	*/
447	pci_read_config_byte(isa_dev, 0x75, &inmir);
448	inmir = inmir & 0x0f;
449	irq = irq_routing_table[inmir];
450	}
451	if(irq >= 0)
452	hwif->irq = irq;
453	}
454	}
455	#else
456	#define init_hwif_ali15x3 NULL
457	#endif /* CONFIG_SPARC64 */
458
459	/**
460	* init_dma_ali15x3 - set up DMA on ALi15x3
461	* @hwif: IDE interface
462	* @d: IDE port info
463	*
464	* Set up the DMA functionality on the ALi 15x3.
465	*/
466
467	static int init_dma_ali15x3(ide_hwif_t hwif, const struct ide_port_info d)
468	{
469	struct pci_dev *dev = to_pci_dev(hwif->dev);
470	unsigned long base = ide_pci_dma_base(hwif, d);
471
472	if (base == 0)
473	return -1;
474
475	hwif->dma_base = base;
476
477	if (ide_pci_check_simplex(hwif, d) < 0)
478	return -1;
479
480	if (ide_pci_set_master(dev, d->name) < 0)
481	return -1;
482
483	if (!hwif->channel)
484	outb(inb(base + 2) & 0x60, base + 2);
485
486	printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
487	hwif->name, base, base + 7);
488
489	if (ide_allocate_dma_engine(hwif))
490	return -1;
491
492	return 0;
493	}
494
495	static const struct ide_port_ops ali_port_ops = {
496	.set_pio_mode = ali_set_pio_mode,
497	.set_dma_mode = ali_set_dma_mode,
498	.udma_filter = ali_udma_filter,
499	.cable_detect = ali_cable_detect,
500	};
501
502	static const struct ide_dma_ops ali_dma_ops = {
503	.dma_host_set = ide_dma_host_set,
504	.dma_setup = ide_dma_setup,
505	.dma_start = ide_dma_start,
506	.dma_end = ide_dma_end,
507	.dma_test_irq = ide_dma_test_irq,
508	.dma_lost_irq = ide_dma_lost_irq,
509	.dma_check = ali_dma_check,
510	.dma_timer_expiry = ide_dma_sff_timer_expiry,
511	.dma_sff_read_status = ide_dma_sff_read_status,
512	};
513
514	static const struct ide_port_info ali15x3_chipset = {
515	.name = DRV_NAME,
516	.init_chipset = init_chipset_ali15x3,
517	.init_hwif = init_hwif_ali15x3,
518	.init_dma = init_dma_ali15x3,
519	.port_ops = &ali_port_ops,
520	.dma_ops = &sff_dma_ops,
521	.pio_mask = ATA_PIO5,
522	.swdma_mask = ATA_SWDMA2,
523	.mwdma_mask = ATA_MWDMA2,
524	};
525
526	/**
527	* alim15x3_init_one - set up an ALi15x3 IDE controller
528	* @dev: PCI device to set up
529	*
530	* Perform the actual set up for an ALi15x3 that has been found by the
531	* hot plug layer.
532	*/
533
534	static int alim15x3_init_one(struct pci_dev *dev,
535	const struct pci_device_id *id)
536	{
537	struct ide_port_info d = ali15x3_chipset;
538	u8 rev = dev->revision, idx = id->driver_data;
539
540	/* don't use LBA48 DMA on ALi devices before rev 0xC5 */
541	if (rev <= 0xC4)
542	d.host_flags \|= IDE_HFLAG_NO_LBA48_DMA;
543
544	if (rev >= 0x20) {
545	if (rev == 0x20)
546	d.host_flags \|= IDE_HFLAG_NO_ATAPI_DMA;
547
548	if (rev < 0xC2)
549	d.udma_mask = ATA_UDMA2;
550	else if (rev == 0xC2 \|\| rev == 0xC3)
551	d.udma_mask = ATA_UDMA4;
552	else if (rev == 0xC4)
553	d.udma_mask = ATA_UDMA5;
554	else
555	d.udma_mask = ATA_UDMA6;
556
557	d.dma_ops = &ali_dma_ops;
558	} else {
559	d.host_flags \|= IDE_HFLAG_NO_DMA;
560
561	d.mwdma_mask = d.swdma_mask = 0;
562	}
563
564	if (idx == 0)
565	d.host_flags \|= IDE_HFLAG_CLEAR_SIMPLEX;
566
567	return ide_pci_init_one(dev, &d, NULL);
568	}
569
570
571	static const struct pci_device_id alim15x3_pci_tbl[] = {
572	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
573	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
574	{ 0, },
575	};
576	MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
577
578	static struct pci_driver alim15x3_pci_driver = {
579	.name = "ALI15x3_IDE",
580	.id_table = alim15x3_pci_tbl,
581	.probe = alim15x3_init_one,
582	.remove = ide_pci_remove,
583	.suspend = ide_pci_suspend,
584	.resume = ide_pci_resume,
585	};
586
587	static int __init ali15x3_ide_init(void)
588	{
589	return ide_pci_register_driver(&alim15x3_pci_driver);
590	}
591
592	static void __exit ali15x3_ide_exit(void)
593	{
594	pci_unregister_driver(&alim15x3_pci_driver);
595	}
596
597	module_init(ali15x3_ide_init);
598	module_exit(ali15x3_ide_exit);
599
600	MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox, Bartlomiej Zolnierkiewicz");
601	MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
602	MODULE_LICENSE("GPL");

drivers/ide/amd74xx.c+0−343

@@ -1,343 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04
4	* IDE driver for Linux.
5	*
6	* Copyright (c) 2000-2002 Vojtech Pavlik
7	* Copyright (c) 2007-2010 Bartlomiej Zolnierkiewicz
8	*
9	* Based on the work of:
10	* Andre Hedrick
11	*/
12
13
14	#include <linux/module.h>
15	#include <linux/kernel.h>
16	#include <linux/pci.h>
17	#include <linux/init.h>
18	#include <linux/ide.h>
19
20	#define DRV_NAME "amd74xx"
21
22	enum {
23	AMD_IDE_CONFIG = 0x41,
24	AMD_CABLE_DETECT = 0x42,
25	AMD_DRIVE_TIMING = 0x48,
26	AMD_8BIT_TIMING = 0x4e,
27	AMD_ADDRESS_SETUP = 0x4c,
28	AMD_UDMA_TIMING = 0x50,
29	};
30
31	static unsigned int amd_80w;
32	static unsigned int amd_clock;
33
34	static char *amd_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
35	static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 };
36
37	static inline u8 amd_offset(struct pci_dev *dev)
38	{
39	return (dev->vendor == PCI_VENDOR_ID_NVIDIA) ? 0x10 : 0;
40	}
41
42	/*
43	* amd_set_speed() writes timing values to the chipset registers
44	*/
45
46	static void amd_set_speed(struct pci_dev *dev, u8 dn, u8 udma_mask,
47	struct ide_timing *timing)
48	{
49	u8 t = 0, offset = amd_offset(dev);
50
51	pci_read_config_byte(dev, AMD_ADDRESS_SETUP + offset, &t);
52	t = (t & ~(3 << ((3 - dn) << 1))) \| ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
53	pci_write_config_byte(dev, AMD_ADDRESS_SETUP + offset, t);
54
55	pci_write_config_byte(dev, AMD_8BIT_TIMING + offset + (1 - (dn >> 1)),
56	((clamp_val(timing->act8b, 1, 16) - 1) << 4) \| (clamp_val(timing->rec8b, 1, 16) - 1));
57
58	pci_write_config_byte(dev, AMD_DRIVE_TIMING + offset + (3 - dn),
59	((clamp_val(timing->active, 1, 16) - 1) << 4) \| (clamp_val(timing->recover, 1, 16) - 1));
60
61	switch (udma_mask) {
62	case ATA_UDMA2: t = timing->udma ? (0xc0 \| (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
63	case ATA_UDMA4: t = timing->udma ? (0xc0 \| amd_cyc2udma[clamp_val(timing->udma, 2, 10)]) : 0x03; break;
64	case ATA_UDMA5: t = timing->udma ? (0xc0 \| amd_cyc2udma[clamp_val(timing->udma, 1, 10)]) : 0x03; break;
65	case ATA_UDMA6: t = timing->udma ? (0xc0 \| amd_cyc2udma[clamp_val(timing->udma, 1, 15)]) : 0x03; break;
66	default: return;
67	}
68
69	if (timing->udma)
70	pci_write_config_byte(dev, AMD_UDMA_TIMING + offset + 3 - dn, t);
71	}
72
73	/*
74	* amd_set_drive() computes timing values and configures the chipset
75	* to a desired transfer mode. It also can be called by upper layers.
76	*/
77
78	static void amd_set_drive(ide_hwif_t hwif, ide_drive_t drive)
79	{
80	struct pci_dev *dev = to_pci_dev(hwif->dev);
81	ide_drive_t *peer = ide_get_pair_dev(drive);
82	struct ide_timing t, p;
83	int T, UT;
84	u8 udma_mask = hwif->ultra_mask;
85	const u8 speed = drive->dma_mode;
86
87	T = 1000000000 / amd_clock;
88	UT = (udma_mask == ATA_UDMA2) ? T : (T / 2);
89
90	ide_timing_compute(drive, speed, &t, T, UT);
91
92	if (peer) {
93	ide_timing_compute(peer, peer->pio_mode, &p, T, UT);
94	ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
95	}
96
97	if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1;
98	if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15;
99
100	amd_set_speed(dev, drive->dn, udma_mask, &t);
101	}
102
103	/*
104	* amd_set_pio_mode() is a callback from upper layers for PIO-only tuning.
105	*/
106
107	static void amd_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
108	{
109	drive->dma_mode = drive->pio_mode;
110	amd_set_drive(hwif, drive);
111	}
112
113	static void amd7409_cable_detect(struct pci_dev *dev)
114	{
115	/* no host side cable detection */
116	amd_80w = 0x03;
117	}
118
119	static void amd7411_cable_detect(struct pci_dev *dev)
120	{
121	int i;
122	u32 u = 0;
123	u8 t = 0, offset = amd_offset(dev);
124
125	pci_read_config_byte(dev, AMD_CABLE_DETECT + offset, &t);
126	pci_read_config_dword(dev, AMD_UDMA_TIMING + offset, &u);
127	amd_80w = ((t & 0x3) ? 1 : 0) \| ((t & 0xc) ? 2 : 0);
128	for (i = 24; i >= 0; i -= 8)
129	if (((u >> i) & 4) && !(amd_80w & (1 << (1 - (i >> 4))))) {
130	printk(KERN_WARNING DRV_NAME " %s: BIOS didn't set "
131	"cable bits correctly. Enabling workaround.\n",
132	pci_name(dev));
133	amd_80w \|= (1 << (1 - (i >> 4)));
134	}
135	}
136
137	/*
138	* The initialization callback. Initialize drive independent registers.
139	*/
140
141	static int init_chipset_amd74xx(struct pci_dev *dev)
142	{
143	u8 t = 0, offset = amd_offset(dev);
144
145	/*
146	* Check 80-wire cable presence.
147	*/
148
149	if (dev->vendor == PCI_VENDOR_ID_AMD &&
150	dev->device == PCI_DEVICE_ID_AMD_COBRA_7401)
151	; /* no UDMA > 2 */
152	else if (dev->vendor == PCI_VENDOR_ID_AMD &&
153	dev->device == PCI_DEVICE_ID_AMD_VIPER_7409)
154	amd7409_cable_detect(dev);
155	else
156	amd7411_cable_detect(dev);
157
158	/*
159	* Take care of prefetch & postwrite.
160	*/
161
162	pci_read_config_byte(dev, AMD_IDE_CONFIG + offset, &t);
163	/*
164	* Check for broken FIFO support.
165	*/
166	if (dev->vendor == PCI_VENDOR_ID_AMD &&
167	dev->device == PCI_DEVICE_ID_AMD_VIPER_7411)
168	t &= 0x0f;
169	else
170	t \|= 0xf0;
171	pci_write_config_byte(dev, AMD_IDE_CONFIG + offset, t);
172
173	return 0;
174	}
175
176	static u8 amd_cable_detect(ide_hwif_t *hwif)
177	{
178	if ((amd_80w >> hwif->channel) & 1)
179	return ATA_CBL_PATA80;
180	else
181	return ATA_CBL_PATA40;
182	}
183
184	static const struct ide_port_ops amd_port_ops = {
185	.set_pio_mode = amd_set_pio_mode,
186	.set_dma_mode = amd_set_drive,
187	.cable_detect = amd_cable_detect,
188	};
189
190	#define IDE_HFLAGS_AMD \
191	(IDE_HFLAG_PIO_NO_BLACKLIST \| \
192	IDE_HFLAG_POST_SET_MODE \| \
193	IDE_HFLAG_IO_32BIT \| \
194	IDE_HFLAG_UNMASK_IRQS)
195
196	#define DECLARE_AMD_DEV(swdma, udma) \
197	{ \
198	.name = DRV_NAME, \
199	.init_chipset = init_chipset_amd74xx, \
200	.enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \
201	.port_ops = &amd_port_ops, \
202	.host_flags = IDE_HFLAGS_AMD, \
203	.pio_mask = ATA_PIO5, \
204	.swdma_mask = swdma, \
205	.mwdma_mask = ATA_MWDMA2, \
206	.udma_mask = udma, \
207	}
208
209	#define DECLARE_NV_DEV(udma) \
210	{ \
211	.name = DRV_NAME, \
212	.init_chipset = init_chipset_amd74xx, \
213	.enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \
214	.port_ops = &amd_port_ops, \
215	.host_flags = IDE_HFLAGS_AMD, \
216	.pio_mask = ATA_PIO5, \
217	.swdma_mask = ATA_SWDMA2, \
218	.mwdma_mask = ATA_MWDMA2, \
219	.udma_mask = udma, \
220	}
221
222	static const struct ide_port_info amd74xx_chipsets[] = {
223	/* 0: AMD7401 */ DECLARE_AMD_DEV(0x00, ATA_UDMA2),
224	/* 1: AMD7409 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA4),
225	/* 2: AMD7411/7441 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA5),
226	/* 3: AMD8111 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA6),
227
228	/* 4: NFORCE */ DECLARE_NV_DEV(ATA_UDMA5),
229	/* 5: >= NFORCE2 */ DECLARE_NV_DEV(ATA_UDMA6),
230
231	/* 6: AMD5536 */ DECLARE_AMD_DEV(ATA_SWDMA2, ATA_UDMA5),
232	};
233
234	static int amd74xx_probe(struct pci_dev dev, const struct pci_device_id id)
235	{
236	struct ide_port_info d;
237	u8 idx = id->driver_data;
238
239	d = amd74xx_chipsets[idx];
240
241	/*
242	* Check for bad SWDMA and incorrectly wired Serenade mainboards.
243	*/
244	if (idx == 1) {
245	if (dev->revision <= 7)
246	d.swdma_mask = 0;
247	d.host_flags \|= IDE_HFLAG_CLEAR_SIMPLEX;
248	} else if (idx == 3) {
249	if (dev->subsystem_vendor == PCI_VENDOR_ID_AMD &&
250	dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE)
251	d.udma_mask = ATA_UDMA5;
252	}
253
254	/*
255	* It seems that on some nVidia controllers using AltStatus
256	* register can be unreliable so default to Status register
257	* if the device is in Compatibility Mode.
258	*/
259	if (dev->vendor == PCI_VENDOR_ID_NVIDIA &&
260	ide_pci_is_in_compatibility_mode(dev))
261	d.host_flags \|= IDE_HFLAG_BROKEN_ALTSTATUS;
262
263	printk(KERN_INFO "%s %s: UDMA%s controller\n",
264	d.name, pci_name(dev), amd_dma[fls(d.udma_mask) - 1]);
265
266	/*
267	* Determine the system bus clock.
268	*/
269	amd_clock = (ide_pci_clk ? ide_pci_clk : 33) * 1000;
270
271	switch (amd_clock) {
272	case 33000: amd_clock = 33333; break;
273	case 37000: amd_clock = 37500; break;
274	case 41000: amd_clock = 41666; break;
275	}
276
277	if (amd_clock < 20000 \|\| amd_clock > 50000) {
278	printk(KERN_WARNING "%s: User given PCI clock speed impossible"
279	" (%d), using 33 MHz instead.\n",
280	d.name, amd_clock);
281	amd_clock = 33333;
282	}
283
284	return ide_pci_init_one(dev, &d, NULL);
285	}
286
287	static const struct pci_device_id amd74xx_pci_tbl[] = {
288	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_COBRA_7401), 0 },
289	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7409), 1 },
290	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_VIPER_7411), 2 },
291	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_OPUS_7441), 2 },
292	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_8111_IDE), 3 },
293	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE), 4 },
294	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE), 5 },
295	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE), 5 },
296	#ifdef CONFIG_BLK_DEV_IDE_SATA
297	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA), 5 },
298	#endif
299	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE), 5 },
300	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE), 5 },
301	#ifdef CONFIG_BLK_DEV_IDE_SATA
302	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA), 5 },
303	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2), 5 },
304	#endif
305	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE), 5 },
306	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE), 5 },
307	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE), 5 },
308	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE), 5 },
309	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE), 5 },
310	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE), 5 },
311	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE), 5 },
312	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE), 5 },
313	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE), 5 },
314	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), 6 },
315	{ 0, },
316	};
317	MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl);
318
319	static struct pci_driver amd74xx_pci_driver = {
320	.name = "AMD_IDE",
321	.id_table = amd74xx_pci_tbl,
322	.probe = amd74xx_probe,
323	.remove = ide_pci_remove,
324	.suspend = ide_pci_suspend,
325	.resume = ide_pci_resume,
326	};
327
328	static int __init amd74xx_ide_init(void)
329	{
330	return ide_pci_register_driver(&amd74xx_pci_driver);
331	}
332
333	static void __exit amd74xx_ide_exit(void)
334	{
335	pci_unregister_driver(&amd74xx_pci_driver);
336	}
337
338	module_init(amd74xx_ide_init);
339	module_exit(amd74xx_ide_exit);
340
341	MODULE_AUTHOR("Vojtech Pavlik, Bartlomiej Zolnierkiewicz");
342	MODULE_DESCRIPTION("AMD PCI IDE driver");
343	MODULE_LICENSE("GPL");

drivers/ide/atiixp.c+0−212

@@ -1,212 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 2003 ATI Inc. <hyu@ati.com>
4	* Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
5	*/
6
7	#include <linux/types.h>
8	#include <linux/module.h>
9	#include <linux/kernel.h>
10	#include <linux/pci.h>
11	#include <linux/ide.h>
12	#include <linux/init.h>
13
14	#define DRV_NAME "atiixp"
15
16	#define ATIIXP_IDE_PIO_TIMING 0x40
17	#define ATIIXP_IDE_MDMA_TIMING 0x44
18	#define ATIIXP_IDE_PIO_CONTROL 0x48
19	#define ATIIXP_IDE_PIO_MODE 0x4a
20	#define ATIIXP_IDE_UDMA_CONTROL 0x54
21	#define ATIIXP_IDE_UDMA_MODE 0x56
22
23	struct atiixp_ide_timing {
24	u8 command_width;
25	u8 recover_width;
26	};
27
28	static struct atiixp_ide_timing pio_timing[] = {
29	{ 0x05, 0x0d },
30	{ 0x04, 0x07 },
31	{ 0x03, 0x04 },
32	{ 0x02, 0x02 },
33	{ 0x02, 0x00 },
34	};
35
36	static struct atiixp_ide_timing mdma_timing[] = {
37	{ 0x07, 0x07 },
38	{ 0x02, 0x01 },
39	{ 0x02, 0x00 },
40	};
41
42	static DEFINE_SPINLOCK(atiixp_lock);
43
44	/**
45	* atiixp_set_pio_mode - set host controller for PIO mode
46	* @hwif: port
47	* @drive: drive
48	*
49	* Set the interface PIO mode.
50	*/
51
52	static void atiixp_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
53	{
54	struct pci_dev *dev = to_pci_dev(hwif->dev);
55	unsigned long flags;
56	int timing_shift = (drive->dn ^ 1) * 8;
57	u32 pio_timing_data;
58	u16 pio_mode_data;
59	const u8 pio = drive->pio_mode - XFER_PIO_0;
60
61	spin_lock_irqsave(&atiixp_lock, flags);
62
63	pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
64	pio_mode_data &= ~(0x07 << (drive->dn * 4));
65	pio_mode_data \|= (pio << (drive->dn * 4));
66	pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
67
68	pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
69	pio_timing_data &= ~(0xff << timing_shift);
70	pio_timing_data \|= (pio_timing[pio].recover_width << timing_shift) \|
71	(pio_timing[pio].command_width << (timing_shift + 4));
72	pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
73
74	spin_unlock_irqrestore(&atiixp_lock, flags);
75	}
76
77	/**
78	* atiixp_set_dma_mode - set host controller for DMA mode
79	* @hwif: port
80	* @drive: drive
81	*
82	* Set a ATIIXP host controller to the desired DMA mode. This involves
83	* programming the right timing data into the PCI configuration space.
84	*/
85
86	static void atiixp_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
87	{
88	struct pci_dev *dev = to_pci_dev(hwif->dev);
89	unsigned long flags;
90	int timing_shift = (drive->dn ^ 1) * 8;
91	u32 tmp32;
92	u16 tmp16;
93	u16 udma_ctl = 0;
94	const u8 speed = drive->dma_mode;
95
96	spin_lock_irqsave(&atiixp_lock, flags);
97
98	pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_ctl);
99
100	if (speed >= XFER_UDMA_0) {
101	pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
102	tmp16 &= ~(0x07 << (drive->dn * 4));
103	tmp16 \|= ((speed & 0x07) << (drive->dn * 4));
104	pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
105
106	udma_ctl \|= (1 << drive->dn);
107	} else if (speed >= XFER_MW_DMA_0) {
108	u8 i = speed & 0x03;
109
110	pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
111	tmp32 &= ~(0xff << timing_shift);
112	tmp32 \|= (mdma_timing[i].recover_width << timing_shift) \|
113	(mdma_timing[i].command_width << (timing_shift + 4));
114	pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
115
116	udma_ctl &= ~(1 << drive->dn);
117	}
118
119	pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
120
121	spin_unlock_irqrestore(&atiixp_lock, flags);
122	}
123
124	static u8 atiixp_cable_detect(ide_hwif_t *hwif)
125	{
126	struct pci_dev *pdev = to_pci_dev(hwif->dev);
127	u8 udma_mode = 0, ch = hwif->channel;
128
129	pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
130
131	if ((udma_mode & 0x07) >= 0x04 \|\| (udma_mode & 0x70) >= 0x40)
132	return ATA_CBL_PATA80;
133	else
134	return ATA_CBL_PATA40;
135	}
136
137	static const struct ide_port_ops atiixp_port_ops = {
138	.set_pio_mode = atiixp_set_pio_mode,
139	.set_dma_mode = atiixp_set_dma_mode,
140	.cable_detect = atiixp_cable_detect,
141	};
142
143	static const struct ide_port_info atiixp_pci_info[] = {
144	{ /* 0: IXP200/300/400/700 */
145	.name = DRV_NAME,
146	.enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
147	.port_ops = &atiixp_port_ops,
148	.pio_mask = ATA_PIO4,
149	.mwdma_mask = ATA_MWDMA2,
150	.udma_mask = ATA_UDMA5,
151	},
152	{ /* 1: IXP600 */
153	.name = DRV_NAME,
154	.enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
155	.port_ops = &atiixp_port_ops,
156	.host_flags = IDE_HFLAG_SINGLE,
157	.pio_mask = ATA_PIO4,
158	.mwdma_mask = ATA_MWDMA2,
159	.udma_mask = ATA_UDMA5,
160	},
161	};
162
163	/**
164	* atiixp_init_one - called when a ATIIXP is found
165	* @dev: the atiixp device
166	* @id: the matching pci id
167	*
168	* Called when the PCI registration layer (or the IDE initialization)
169	* finds a device matching our IDE device tables.
170	*/
171
172	static int atiixp_init_one(struct pci_dev dev, const struct pci_device_id id)
173	{
174	return ide_pci_init_one(dev, &atiixp_pci_info[id->driver_data], NULL);
175	}
176
177	static const struct pci_device_id atiixp_pci_tbl[] = {
178	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), 0 },
179	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), 0 },
180	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 },
181	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 },
182	{ PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 },
183	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), 0 },
184	{ 0, },
185	};
186	MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
187
188	static struct pci_driver atiixp_pci_driver = {
189	.name = "ATIIXP_IDE",
190	.id_table = atiixp_pci_tbl,
191	.probe = atiixp_init_one,
192	.remove = ide_pci_remove,
193	.suspend = ide_pci_suspend,
194	.resume = ide_pci_resume,
195	};
196
197	static int __init atiixp_ide_init(void)
198	{
199	return ide_pci_register_driver(&atiixp_pci_driver);
200	}
201
202	static void __exit atiixp_ide_exit(void)
203	{
204	pci_unregister_driver(&atiixp_pci_driver);
205	}
206
207	module_init(atiixp_ide_init);
208	module_exit(atiixp_ide_exit);
209
210	MODULE_AUTHOR("HUI YU");
211	MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
212	MODULE_LICENSE("GPL");

drivers/ide/buddha.c+0−238

@@ -1,238 +0,0 @@
1	/*
2	* Amiga Buddha, Catweasel and X-Surf IDE Driver
3	*
4	* Copyright (C) 1997, 2001 by Geert Uytterhoeven and others
5	*
6	* This driver was written based on the specifications in README.buddha and
7	* the X-Surf info from Inside_XSurf.txt available at
8	* http://www.jschoenfeld.com
9	*
10	* This file is subject to the terms and conditions of the GNU General Public
11	* License. See the file COPYING in the main directory of this archive for
12	* more details.
13	*
14	* TODO:
15	* - test it :-)
16	* - tune the timings using the speed-register
17	*/
18
19	#include <linux/types.h>
20	#include <linux/mm.h>
21	#include <linux/interrupt.h>
22	#include <linux/blkdev.h>
23	#include <linux/zorro.h>
24	#include <linux/ide.h>
25	#include <linux/init.h>
26	#include <linux/module.h>
27
28	#include <asm/amigahw.h>
29	#include <asm/amigaints.h>
30
31
32	/*
33	* The Buddha has 2 IDE interfaces, the Catweasel has 3, X-Surf has 2
34	*/
35
36	#define BUDDHA_NUM_HWIFS 2
37	#define CATWEASEL_NUM_HWIFS 3
38	#define XSURF_NUM_HWIFS 2
39
40	#define MAX_NUM_HWIFS 3
41
42	/*
43	* Bases of the IDE interfaces (relative to the board address)
44	*/
45
46	#define BUDDHA_BASE1 0x800
47	#define BUDDHA_BASE2 0xa00
48	#define BUDDHA_BASE3 0xc00
49
50	#define XSURF_BASE1 0xb000 /* 2.5" Interface */
51	#define XSURF_BASE2 0xd000 /* 3.5" Interface */
52
53	static u_int buddha_bases[CATWEASEL_NUM_HWIFS] __initdata = {
54	BUDDHA_BASE1, BUDDHA_BASE2, BUDDHA_BASE3
55	};
56
57	static u_int xsurf_bases[XSURF_NUM_HWIFS] __initdata = {
58	XSURF_BASE1, XSURF_BASE2
59	};
60
61	/*
62	* Offsets from one of the above bases
63	*/
64
65	#define BUDDHA_CONTROL 0x11a
66
67	/*
68	* Other registers
69	*/
70
71	#define BUDDHA_IRQ1 0xf00 /* MSB = 1, Harddisk is source of */
72	#define BUDDHA_IRQ2 0xf40 /* interrupt */
73	#define BUDDHA_IRQ3 0xf80
74
75	#define XSURF_IRQ1 0x7e
76	#define XSURF_IRQ2 0x7e
77
78	static int buddha_irqports[CATWEASEL_NUM_HWIFS] __initdata = {
79	BUDDHA_IRQ1, BUDDHA_IRQ2, BUDDHA_IRQ3
80	};
81
82	static int xsurf_irqports[XSURF_NUM_HWIFS] __initdata = {
83	XSURF_IRQ1, XSURF_IRQ2
84	};
85
86	#define BUDDHA_IRQ_MR 0xfc0 /* master interrupt enable */
87
88
89	/*
90	* Board information
91	*/
92
93	typedef enum BuddhaType_Enum {
94	BOARD_BUDDHA, BOARD_CATWEASEL, BOARD_XSURF
95	} BuddhaType;
96
97	static const char *buddha_board_name[] = { "Buddha", "Catweasel", "X-Surf" };
98
99	/*
100	* Check and acknowledge the interrupt status
101	*/
102
103	static int buddha_test_irq(ide_hwif_t *hwif)
104	{
105	unsigned char ch;
106
107	ch = z_readb(hwif->io_ports.irq_addr);
108	if (!(ch & 0x80))
109	return 0;
110	return 1;
111	}
112
113	static void xsurf_clear_irq(ide_drive_t *drive)
114	{
115	/*
116	* X-Surf needs 0 written to IRQ register to ensure ISA bit A11 stays at 0
117	*/
118	z_writeb(0, drive->hwif->io_ports.irq_addr);
119	}
120
121	static void __init buddha_setup_ports(struct ide_hw *hw, unsigned long base,
122	unsigned long ctl, unsigned long irq_port)
123	{
124	int i;
125
126	memset(hw, 0, sizeof(*hw));
127
128	hw->io_ports.data_addr = base;
129
130	for (i = 1; i < 8; i++)
131	hw->io_ports_array[i] = base + 2 + i * 4;
132
133	hw->io_ports.ctl_addr = ctl;
134	hw->io_ports.irq_addr = irq_port;
135
136	hw->irq = IRQ_AMIGA_PORTS;
137	}
138
139	static const struct ide_port_ops buddha_port_ops = {
140	.test_irq = buddha_test_irq,
141	};
142
143	static const struct ide_port_ops xsurf_port_ops = {
144	.clear_irq = xsurf_clear_irq,
145	.test_irq = buddha_test_irq,
146	};
147
148	static const struct ide_port_info buddha_port_info = {
149	.port_ops = &buddha_port_ops,
150	.host_flags = IDE_HFLAG_MMIO \| IDE_HFLAG_NO_DMA,
151	.irq_flags = IRQF_SHARED,
152	.chipset = ide_generic,
153	};
154
155	/*
156	* Probe for a Buddha or Catweasel IDE interface
157	*/
158
159	static int __init buddha_init(void)
160	{
161	struct zorro_dev *z = NULL;
162	u_long buddha_board = 0;
163	BuddhaType type;
164	int buddha_num_hwifs, i;
165
166	while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
167	unsigned long board;
168	struct ide_hw hw[MAX_NUM_HWIFS], *hws[MAX_NUM_HWIFS];
169	struct ide_port_info d = buddha_port_info;
170
171	if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_BUDDHA) {
172	buddha_num_hwifs = BUDDHA_NUM_HWIFS;
173	type=BOARD_BUDDHA;
174	} else if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_CATWEASEL) {
175	buddha_num_hwifs = CATWEASEL_NUM_HWIFS;
176	type=BOARD_CATWEASEL;
177	} else if (z->id == ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF) {
178	buddha_num_hwifs = XSURF_NUM_HWIFS;
179	type=BOARD_XSURF;
180	d.port_ops = &xsurf_port_ops;
181	} else
182	continue;
183
184	board = z->resource.start;
185
186	if(type != BOARD_XSURF) {
187	if (!request_mem_region(board+BUDDHA_BASE1, 0x800, "IDE"))
188	continue;
189	} else {
190	if (!request_mem_region(board+XSURF_BASE1, 0x1000, "IDE"))
191	continue;
192	if (!request_mem_region(board+XSURF_BASE2, 0x1000, "IDE"))
193	goto fail_base2;
194	if (!request_mem_region(board+XSURF_IRQ1, 0x8, "IDE")) {
195	release_mem_region(board+XSURF_BASE2, 0x1000);
196	fail_base2:
197	release_mem_region(board+XSURF_BASE1, 0x1000);
198	continue;
199	}
200	}
201	buddha_board = (unsigned long)ZTWO_VADDR(board);
202
203	/* write to BUDDHA_IRQ_MR to enable the board IRQ */
204	/* X-Surf doesn't have this. IRQs are always on */
205	if (type != BOARD_XSURF)
206	z_writeb(0, buddha_board+BUDDHA_IRQ_MR);
207
208	printk(KERN_INFO "ide: %s IDE controller\n",
209	buddha_board_name[type]);
210
211	for (i = 0; i < buddha_num_hwifs; i++) {
212	unsigned long base, ctl, irq_port;
213
214	if (type != BOARD_XSURF) {
215	base = buddha_board + buddha_bases[i];
216	ctl = base + BUDDHA_CONTROL;
217	irq_port = buddha_board + buddha_irqports[i];
218	} else {
219	base = buddha_board + xsurf_bases[i];
220	/* X-Surf has no CS1* (Control/AltStat) */
221	ctl = 0;
222	irq_port = buddha_board + xsurf_irqports[i];
223	}
224
225	buddha_setup_ports(&hw[i], base, ctl, irq_port);
226
227	hws[i] = &hw[i];
228	}
229
230	ide_host_add(&d, hws, i, NULL);
231	}
232
233	return 0;
234	}
235
236	module_init(buddha_init);
237
238	MODULE_LICENSE("GPL");

drivers/ide/cmd640.c+0−848

@@ -1,848 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 1995-1996 Linus Torvalds & authors (see below)
4	*/
5
6	/*
7	* Original authors: abramov@cecmow.enet.dec.com (Igor Abramov)
8	* mlord@pobox.com (Mark Lord)
9	*
10	* See linux/MAINTAINERS for address of current maintainer.
11	*
12	* This file provides support for the advanced features and bugs
13	* of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
14	*
15	* These chips are basically fucked by design, and getting this driver
16	* to work on every motherboard design that uses this screwed chip seems
17	* bloody well impossible. However, we're still trying.
18	*
19	* Version 0.97 worked for everybody.
20	*
21	* User feedback is essential. Many thanks to the beta test team:
22	*
23	* A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
24	* bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
25	* chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
26	* derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
27	* flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
28	* j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
29	* kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
30	* peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
31	* s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
32	* steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
33	* liug@mama.indstate.edu, and others.
34	*
35	* Version 0.01 Initial version, hacked out of ide.c,
36	* and #include'd rather than compiled separately.
37	* This will get cleaned up in a subsequent release.
38	*
39	* Version 0.02 Fixes for vlb initialization code, enable prefetch
40	* for versions 'B' and 'C' of chip by default,
41	* some code cleanup.
42	*
43	* Version 0.03 Added reset of secondary interface,
44	* and black list for devices which are not compatible
45	* with prefetch mode. Separate function for setting
46	* prefetch is added, possibly it will be called some
47	* day from ioctl processing code.
48	*
49	* Version 0.04 Now configs/compiles separate from ide.c
50	*
51	* Version 0.05 Major rewrite of interface timing code.
52	* Added new function cmd640_set_mode to set PIO mode
53	* from ioctl call. New drives added to black list.
54	*
55	* Version 0.06 More code cleanup. Prefetch is enabled only for
56	* detected hard drives, not included in prefetch
57	* black list.
58	*
59	* Version 0.07 Changed to more conservative drive tuning policy.
60	* Unknown drives, which report PIO < 4 are set to
61	* (reported_PIO - 1) if it is supported, or to PIO0.
62	* List of known drives extended by info provided by
63	* CMD at their ftp site.
64	*
65	* Version 0.08 Added autotune/noautotune support.
66	*
67	* Version 0.09 Try to be smarter about 2nd port enabling.
68	* Version 0.10 Be nice and don't reset 2nd port.
69	* Version 0.11 Try to handle more weird situations.
70	*
71	* Version 0.12 Lots of bug fixes from Laszlo Peter
72	* irq unmasking disabled for reliability.
73	* try to be even smarter about the second port.
74	* tidy up source code formatting.
75	* Version 0.13 permit irq unmasking again.
76	* Version 0.90 massive code cleanup, some bugs fixed.
77	* defaults all drives to PIO mode0, prefetch off.
78	* autotune is OFF by default, with compile time flag.
79	* prefetch can be turned OFF/ON using "hdparm -p8/-p9"
80	* (requires hdparm-3.1 or newer)
81	* Version 0.91 first release to linux-kernel list.
82	* Version 0.92 move initial reg dump to separate callable function
83	* change "readahead" to "prefetch" to avoid confusion
84	* Version 0.95 respect original BIOS timings unless autotuning.
85	* tons of code cleanup and rearrangement.
86	* added CONFIG_BLK_DEV_CMD640_ENHANCED option
87	* prevent use of unmask when prefetch is on
88	* Version 0.96 prevent use of io_32bit when prefetch is off
89	* Version 0.97 fix VLB secondary interface for sjd@slip.net
90	* other minor tune-ups: 0.96 was very good.
91	* Version 0.98 ignore PCI version when disabled by BIOS
92	* Version 0.99 display setup/active/recovery clocks with PIO mode
93	* Version 1.00 Mmm.. cannot depend on PCMD_ENA in all systems
94	* Version 1.01 slow/fast devsel can be selected with "hdparm -p6/-p7"
95	* ("fast" is necessary for 32bit I/O in some systems)
96	* Version 1.02 fix bug that resulted in slow "setup times"
97	* (patch courtesy of Zoltan Hidvegi)
98	*/
99
100	#define CMD640_PREFETCH_MASKS 1
101
102	/#define CMD640_DUMP_REGS /
103
104	#include <linux/types.h>
105	#include <linux/kernel.h>
106	#include <linux/delay.h>
107	#include <linux/ide.h>
108	#include <linux/init.h>
109	#include <linux/module.h>
110
111	#include <asm/io.h>
112
113	#define DRV_NAME "cmd640"
114
115	static bool cmd640_vlb;
116
117	/*
118	* CMD640 specific registers definition.
119	*/
120
121	#define VID 0x00
122	#define DID 0x02
123	#define PCMD 0x04
124	#define PCMD_ENA 0x01
125	#define PSTTS 0x06
126	#define REVID 0x08
127	#define PROGIF 0x09
128	#define SUBCL 0x0a
129	#define BASCL 0x0b
130	#define BaseA0 0x10
131	#define BaseA1 0x14
132	#define BaseA2 0x18
133	#define BaseA3 0x1c
134	#define INTLINE 0x3c
135	#define INPINE 0x3d
136
137	#define CFR 0x50
138	#define CFR_DEVREV 0x03
139	#define CFR_IDE01INTR 0x04
140	#define CFR_DEVID 0x18
141	#define CFR_AT_VESA_078h 0x20
142	#define CFR_DSA1 0x40
143	#define CFR_DSA0 0x80
144
145	#define CNTRL 0x51
146	#define CNTRL_DIS_RA0 0x40
147	#define CNTRL_DIS_RA1 0x80
148	#define CNTRL_ENA_2ND 0x08
149
150	#define CMDTIM 0x52
151	#define ARTTIM0 0x53
152	#define DRWTIM0 0x54
153	#define ARTTIM1 0x55
154	#define DRWTIM1 0x56
155	#define ARTTIM23 0x57
156	#define ARTTIM23_DIS_RA2 0x04
157	#define ARTTIM23_DIS_RA3 0x08
158	#define ARTTIM23_IDE23INTR 0x10
159	#define DRWTIM23 0x58
160	#define BRST 0x59
161
162	/*
163	* Registers and masks for easy access by drive index:
164	*/
165	static u8 prefetch_regs[4] = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
166	static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
167
168	#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
169
170	static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
171	static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
172
173	/*
174	* Current cmd640 timing values for each drive.
175	* The defaults for each are the slowest possible timings.
176	*/
177	static u8 setup_counts[4] = {4, 4, 4, 4}; /* Address setup count (in clocks) */
178	static u8 active_counts[4] = {16, 16, 16, 16}; /* Active count (encoded) */
179	static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
180
181	#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
182
183	static DEFINE_SPINLOCK(cmd640_lock);
184
185	/*
186	* Interface to access cmd640x registers
187	*/
188	static unsigned int cmd640_key;
189	static void (*__put_cmd640_reg)(u16 reg, u8 val);
190	static u8 (*__get_cmd640_reg)(u16 reg);
191
192	/*
193	* This is read from the CFR reg, and is used in several places.
194	*/
195	static unsigned int cmd640_chip_version;
196
197	/*
198	* The CMD640x chip does not support DWORD config write cycles, but some
199	* of the BIOSes use them to implement the config services.
200	* Therefore, we must use direct IO instead.
201	*/
202
203	/* PCI method 1 access */
204
205	static void put_cmd640_reg_pci1(u16 reg, u8 val)
206	{
207	outl_p((reg & 0xfc) \| cmd640_key, 0xcf8);
208	outb_p(val, (reg & 3) \| 0xcfc);
209	}
210
211	static u8 get_cmd640_reg_pci1(u16 reg)
212	{
213	outl_p((reg & 0xfc) \| cmd640_key, 0xcf8);
214	return inb_p((reg & 3) \| 0xcfc);
215	}
216
217	/* PCI method 2 access (from CMD datasheet) */
218
219	static void put_cmd640_reg_pci2(u16 reg, u8 val)
220	{
221	outb_p(0x10, 0xcf8);
222	outb_p(val, cmd640_key + reg);
223	outb_p(0, 0xcf8);
224	}
225
226	static u8 get_cmd640_reg_pci2(u16 reg)
227	{
228	u8 b;
229
230	outb_p(0x10, 0xcf8);
231	b = inb_p(cmd640_key + reg);
232	outb_p(0, 0xcf8);
233	return b;
234	}
235
236	/* VLB access */
237
238	static void put_cmd640_reg_vlb(u16 reg, u8 val)
239	{
240	outb_p(reg, cmd640_key);
241	outb_p(val, cmd640_key + 4);
242	}
243
244	static u8 get_cmd640_reg_vlb(u16 reg)
245	{
246	outb_p(reg, cmd640_key);
247	return inb_p(cmd640_key + 4);
248	}
249
250	static u8 get_cmd640_reg(u16 reg)
251	{
252	unsigned long flags;
253	u8 b;
254
255	spin_lock_irqsave(&cmd640_lock, flags);
256	b = __get_cmd640_reg(reg);
257	spin_unlock_irqrestore(&cmd640_lock, flags);
258	return b;
259	}
260
261	static void put_cmd640_reg(u16 reg, u8 val)
262	{
263	unsigned long flags;
264
265	spin_lock_irqsave(&cmd640_lock, flags);
266	__put_cmd640_reg(reg, val);
267	spin_unlock_irqrestore(&cmd640_lock, flags);
268	}
269
270	static int __init match_pci_cmd640_device(void)
271	{
272	const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
273	unsigned int i;
274	for (i = 0; i < 4; i++) {
275	if (get_cmd640_reg(i) != ven_dev[i])
276	return 0;
277	}
278	#ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
279	if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
280	printk("ide: cmd640 on PCI disabled by BIOS\n");
281	return 0;
282	}
283	#endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
284	return 1; /* success */
285	}
286
287	/*
288	* Probe for CMD640x -- pci method 1
289	*/
290	static int __init probe_for_cmd640_pci1(void)
291	{
292	__get_cmd640_reg = get_cmd640_reg_pci1;
293	__put_cmd640_reg = put_cmd640_reg_pci1;
294	for (cmd640_key = 0x80000000;
295	cmd640_key <= 0x8000f800;
296	cmd640_key += 0x800) {
297	if (match_pci_cmd640_device())
298	return 1; /* success */
299	}
300	return 0;
301	}
302
303	/*
304	* Probe for CMD640x -- pci method 2
305	*/
306	static int __init probe_for_cmd640_pci2(void)
307	{
308	__get_cmd640_reg = get_cmd640_reg_pci2;
309	__put_cmd640_reg = put_cmd640_reg_pci2;
310	for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
311	if (match_pci_cmd640_device())
312	return 1; /* success */
313	}
314	return 0;
315	}
316
317	/*
318	* Probe for CMD640x -- vlb
319	*/
320	static int __init probe_for_cmd640_vlb(void)
321	{
322	u8 b;
323
324	__get_cmd640_reg = get_cmd640_reg_vlb;
325	__put_cmd640_reg = put_cmd640_reg_vlb;
326	cmd640_key = 0x178;
327	b = get_cmd640_reg(CFR);
328	if (b == 0xff \|\| b == 0x00 \|\| (b & CFR_AT_VESA_078h)) {
329	cmd640_key = 0x78;
330	b = get_cmd640_reg(CFR);
331	if (b == 0xff \|\| b == 0x00 \|\| !(b & CFR_AT_VESA_078h))
332	return 0;
333	}
334	return 1; /* success */
335	}
336
337	/*
338	* Returns 1 if an IDE interface/drive exists at 0x170,
339	* Returns 0 otherwise.
340	*/
341	static int __init secondary_port_responding(void)
342	{
343	unsigned long flags;
344
345	spin_lock_irqsave(&cmd640_lock, flags);
346
347	outb_p(0x0a, 0x176); /* select drive0 */
348	udelay(100);
349	if ((inb_p(0x176) & 0x1f) != 0x0a) {
350	outb_p(0x1a, 0x176); /* select drive1 */
351	udelay(100);
352	if ((inb_p(0x176) & 0x1f) != 0x1a) {
353	spin_unlock_irqrestore(&cmd640_lock, flags);
354	return 0; /* nothing responded */
355	}
356	}
357	spin_unlock_irqrestore(&cmd640_lock, flags);
358	return 1; /* success */
359	}
360
361	#ifdef CMD640_DUMP_REGS
362	/*
363	* Dump out all cmd640 registers. May be called from ide.c
364	*/
365	static void cmd640_dump_regs(void)
366	{
367	unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
368
369	/* Dump current state of chip registers */
370	printk("ide: cmd640 internal register dump:");
371	for (; reg <= 0x59; reg++) {
372	if (!(reg & 0x0f))
373	printk("\n%04x:", reg);
374	printk(" %02x", get_cmd640_reg(reg));
375	}
376	printk("\n");
377	}
378	#endif
379
380	static void __set_prefetch_mode(ide_drive_t *drive, int mode)
381	{
382	if (mode) { /* want prefetch on? */
383	#if CMD640_PREFETCH_MASKS
384	drive->dev_flags \|= IDE_DFLAG_NO_UNMASK;
385	drive->dev_flags &= ~IDE_DFLAG_UNMASK;
386	#endif
387	drive->dev_flags &= ~IDE_DFLAG_NO_IO_32BIT;
388	} else {
389	drive->dev_flags &= ~IDE_DFLAG_NO_UNMASK;
390	drive->dev_flags \|= IDE_DFLAG_NO_IO_32BIT;
391	drive->io_32bit = 0;
392	}
393	}
394
395	#ifndef CONFIG_BLK_DEV_CMD640_ENHANCED
396	/*
397	* Check whether prefetch is on for a drive,
398	* and initialize the unmask flags for safe operation.
399	*/
400	static void __init check_prefetch(ide_drive_t *drive, unsigned int index)
401	{
402	u8 b = get_cmd640_reg(prefetch_regs[index]);
403
404	__set_prefetch_mode(drive, (b & prefetch_masks[index]) ? 0 : 1);
405	}
406	#else
407
408	/*
409	* Sets prefetch mode for a drive.
410	*/
411	static void set_prefetch_mode(ide_drive_t *drive, unsigned int index, int mode)
412	{
413	unsigned long flags;
414	int reg = prefetch_regs[index];
415	u8 b;
416
417	spin_lock_irqsave(&cmd640_lock, flags);
418	b = __get_cmd640_reg(reg);
419	__set_prefetch_mode(drive, mode);
420	if (mode)
421	b &= ~prefetch_masks[index]; /* enable prefetch */
422	else
423	b \|= prefetch_masks[index]; /* disable prefetch */
424	__put_cmd640_reg(reg, b);
425	spin_unlock_irqrestore(&cmd640_lock, flags);
426	}
427
428	/*
429	* Dump out current drive clocks settings
430	*/
431	static void display_clocks(unsigned int index)
432	{
433	u8 active_count, recovery_count;
434
435	active_count = active_counts[index];
436	if (active_count == 1)
437	++active_count;
438	recovery_count = recovery_counts[index];
439	if (active_count > 3 && recovery_count == 1)
440	++recovery_count;
441	if (cmd640_chip_version > 1)
442	recovery_count += 1; /* cmd640b uses (count + 1)*/
443	printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
444	}
445
446	/*
447	* Pack active and recovery counts into single byte representation
448	* used by controller
449	*/
450	static inline u8 pack_nibbles(u8 upper, u8 lower)
451	{
452	return ((upper & 0x0f) << 4) \| (lower & 0x0f);
453	}
454
455	/*
456	* This routine writes the prepared setup/active/recovery counts
457	* for a drive into the cmd640 chipset registers to active them.
458	*/
459	static void program_drive_counts(ide_drive_t *drive, unsigned int index)
460	{
461	unsigned long flags;
462	u8 setup_count = setup_counts[index];
463	u8 active_count = active_counts[index];
464	u8 recovery_count = recovery_counts[index];
465
466	/*
467	* Set up address setup count and drive read/write timing registers.
468	* Primary interface has individual count/timing registers for
469	* each drive. Secondary interface has one common set of registers,
470	* so we merge the timings, using the slowest value for each timing.
471	*/
472	if (index > 1) {
473	ide_drive_t *peer = ide_get_pair_dev(drive);
474	unsigned int mate = index ^ 1;
475
476	if (peer) {
477	if (setup_count < setup_counts[mate])
478	setup_count = setup_counts[mate];
479	if (active_count < active_counts[mate])
480	active_count = active_counts[mate];
481	if (recovery_count < recovery_counts[mate])
482	recovery_count = recovery_counts[mate];
483	}
484	}
485
486	/*
487	* Convert setup_count to internal chipset representation
488	*/
489	switch (setup_count) {
490	case 4: setup_count = 0x00; break;
491	case 3: setup_count = 0x80; break;
492	case 1:
493	case 2: setup_count = 0x40; break;
494	default: setup_count = 0xc0; /* case 5 */
495	}
496
497	/*
498	* Now that everything is ready, program the new timings
499	*/
500	spin_lock_irqsave(&cmd640_lock, flags);
501	/*
502	* Program the address_setup clocks into ARTTIM reg,
503	* and then the active/recovery counts into the DRWTIM reg
504	* (this converts counts of 16 into counts of zero -- okay).
505	*/
506	setup_count \|= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
507	__put_cmd640_reg(arttim_regs[index], setup_count);
508	__put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
509	spin_unlock_irqrestore(&cmd640_lock, flags);
510	}
511
512	/*
513	* Set a specific pio_mode for a drive
514	*/
515	static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
516	u8 pio_mode, unsigned int cycle_time)
517	{
518	struct ide_timing *t;
519	int setup_time, active_time, recovery_time, clock_time;
520	u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
521	int bus_speed;
522
523	if (cmd640_vlb)
524	bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
525	else
526	bus_speed = ide_pci_clk ? ide_pci_clk : 33;
527
528	if (pio_mode > 5)
529	pio_mode = 5;
530
531	t = ide_timing_find_mode(XFER_PIO_0 + pio_mode);
532	setup_time = t->setup;
533	active_time = t->active;
534
535	recovery_time = cycle_time - (setup_time + active_time);
536	clock_time = 1000 / bus_speed;
537	cycle_count = DIV_ROUND_UP(cycle_time, clock_time);
538
539	setup_count = DIV_ROUND_UP(setup_time, clock_time);
540
541	active_count = DIV_ROUND_UP(active_time, clock_time);
542	if (active_count < 2)
543	active_count = 2; /* minimum allowed by cmd640 */
544
545	recovery_count = DIV_ROUND_UP(recovery_time, clock_time);
546	recovery_count2 = cycle_count - (setup_count + active_count);
547	if (recovery_count2 > recovery_count)
548	recovery_count = recovery_count2;
549	if (recovery_count < 2)
550	recovery_count = 2; /* minimum allowed by cmd640 */
551	if (recovery_count > 17) {
552	active_count += recovery_count - 17;
553	recovery_count = 17;
554	}
555	if (active_count > 16)
556	active_count = 16; /* maximum allowed by cmd640 */
557	if (cmd640_chip_version > 1)
558	recovery_count -= 1; /* cmd640b uses (count + 1)*/
559	if (recovery_count > 16)
560	recovery_count = 16; /* maximum allowed by cmd640 */
561
562	setup_counts[index] = setup_count;
563	active_counts[index] = active_count;
564	recovery_counts[index] = recovery_count;
565
566	/*
567	* In a perfect world, we might set the drive pio mode here
568	* (using WIN_SETFEATURE) before continuing.
569	*
570	* But we do not, because:
571	* 1) this is the wrong place to do it (proper is do_special() in ide.c)
572	* 2) in practice this is rarely, if ever, necessary
573	*/
574	program_drive_counts(drive, index);
575	}
576
577	static void cmd640_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
578	{
579	unsigned int index = 0, cycle_time;
580	const u8 pio = drive->pio_mode - XFER_PIO_0;
581	u8 b;
582
583	switch (pio) {
584	case 6: /* set fast-devsel off */
585	case 7: /* set fast-devsel on */
586	b = get_cmd640_reg(CNTRL) & ~0x27;
587	if (pio & 1)
588	b \|= 0x27;
589	put_cmd640_reg(CNTRL, b);
590	printk("%s: %sabled cmd640 fast host timing (devsel)\n",
591	drive->name, (pio & 1) ? "en" : "dis");
592	return;
593	case 8: /* set prefetch off */
594	case 9: /* set prefetch on */
595	set_prefetch_mode(drive, index, pio & 1);
596	printk("%s: %sabled cmd640 prefetch\n",
597	drive->name, (pio & 1) ? "en" : "dis");
598	return;
599	}
600
601	cycle_time = ide_pio_cycle_time(drive, pio);
602	cmd640_set_mode(drive, index, pio, cycle_time);
603
604	printk("%s: selected cmd640 PIO mode%d (%dns)",
605	drive->name, pio, cycle_time);
606
607	display_clocks(index);
608	}
609	#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
610
611	static void __init cmd640_init_dev(ide_drive_t *drive)
612	{
613	unsigned int i = drive->hwif->channel * 2 + (drive->dn & 1);
614
615	#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
616	/*
617	* Reset timing to the slowest speed and turn off prefetch.
618	* This way, the drive identify code has a better chance.
619	*/
620	setup_counts[i] = 4; /* max possible */
621	active_counts[i] = 16; /* max possible */
622	recovery_counts[i] = 16; /* max possible */
623	program_drive_counts(drive, i);
624	set_prefetch_mode(drive, i, 0);
625	printk(KERN_INFO DRV_NAME ": drive%d timings/prefetch cleared\n", i);
626	#else
627	/*
628	* Set the drive unmask flags to match the prefetch setting.
629	*/
630	check_prefetch(drive, i);
631	printk(KERN_INFO DRV_NAME ": drive%d timings/prefetch(%s) preserved\n",
632	i, (drive->dev_flags & IDE_DFLAG_NO_IO_32BIT) ? "off" : "on");
633	#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
634	}
635
636	static int cmd640_test_irq(ide_hwif_t *hwif)
637	{
638	int irq_reg = hwif->channel ? ARTTIM23 : CFR;
639	u8 irq_mask = hwif->channel ? ARTTIM23_IDE23INTR :
640	CFR_IDE01INTR;
641	u8 irq_stat = get_cmd640_reg(irq_reg);
642
643	return (irq_stat & irq_mask) ? 1 : 0;
644	}
645
646	static const struct ide_port_ops cmd640_port_ops = {
647	.init_dev = cmd640_init_dev,
648	#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
649	.set_pio_mode = cmd640_set_pio_mode,
650	#endif
651	.test_irq = cmd640_test_irq,
652	};
653
654	static int pci_conf1(void)
655	{
656	unsigned long flags;
657	u32 tmp;
658
659	spin_lock_irqsave(&cmd640_lock, flags);
660	outb(0x01, 0xCFB);
661	tmp = inl(0xCF8);
662	outl(0x80000000, 0xCF8);
663	if (inl(0xCF8) == 0x80000000) {
664	outl(tmp, 0xCF8);
665	spin_unlock_irqrestore(&cmd640_lock, flags);
666	return 1;
667	}
668	outl(tmp, 0xCF8);
669	spin_unlock_irqrestore(&cmd640_lock, flags);
670	return 0;
671	}
672
673	static int pci_conf2(void)
674	{
675	unsigned long flags;
676
677	spin_lock_irqsave(&cmd640_lock, flags);
678	outb(0x00, 0xCFB);
679	outb(0x00, 0xCF8);
680	outb(0x00, 0xCFA);
681	if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
682	spin_unlock_irqrestore(&cmd640_lock, flags);
683	return 1;
684	}
685	spin_unlock_irqrestore(&cmd640_lock, flags);
686	return 0;
687	}
688
689	static const struct ide_port_info cmd640_port_info __initconst = {
690	.chipset = ide_cmd640,
691	.host_flags = IDE_HFLAG_SERIALIZE \|
692	IDE_HFLAG_NO_DMA \|
693	IDE_HFLAG_ABUSE_PREFETCH \|
694	IDE_HFLAG_ABUSE_FAST_DEVSEL,
695	.port_ops = &cmd640_port_ops,
696	.pio_mask = ATA_PIO5,
697	};
698
699	static int __init cmd640x_init_one(unsigned long base, unsigned long ctl)
700	{
701	if (!request_region(base, 8, DRV_NAME)) {
702	printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
703	DRV_NAME, base, base + 7);
704	return -EBUSY;
705	}
706
707	if (!request_region(ctl, 1, DRV_NAME)) {
708	printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
709	DRV_NAME, ctl);
710	release_region(base, 8);
711	return -EBUSY;
712	}
713
714	return 0;
715	}
716
717	/*
718	* Probe for a cmd640 chipset, and initialize it if found.
719	*/
720	static int __init cmd640x_init(void)
721	{
722	int second_port_cmd640 = 0, rc;
723	const char bus_type, port2;
724	u8 b, cfr;
725	struct ide_hw hw[2], *hws[2];
726
727	if (cmd640_vlb && probe_for_cmd640_vlb()) {
728	bus_type = "VLB";
729	} else {
730	cmd640_vlb = 0;
731	/* Find out what kind of PCI probing is supported otherwise
732	Justin Gibbs will sulk.. */
733	if (pci_conf1() && probe_for_cmd640_pci1())
734	bus_type = "PCI (type1)";
735	else if (pci_conf2() && probe_for_cmd640_pci2())
736	bus_type = "PCI (type2)";
737	else
738	return 0;
739	}
740	/*
741	* Undocumented magic (there is no 0x5b reg in specs)
742	*/
743	put_cmd640_reg(0x5b, 0xbd);
744	if (get_cmd640_reg(0x5b) != 0xbd) {
745	printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
746	return 0;
747	}
748	put_cmd640_reg(0x5b, 0);
749
750	#ifdef CMD640_DUMP_REGS
751	cmd640_dump_regs();
752	#endif
753
754	/*
755	* Documented magic begins here
756	*/
757	cfr = get_cmd640_reg(CFR);
758	cmd640_chip_version = cfr & CFR_DEVREV;
759	if (cmd640_chip_version == 0) {
760	printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
761	return 0;
762	}
763
764	rc = cmd640x_init_one(0x1f0, 0x3f6);
765	if (rc)
766	return rc;
767
768	rc = cmd640x_init_one(0x170, 0x376);
769	if (rc) {
770	release_region(0x3f6, 1);
771	release_region(0x1f0, 8);
772	return rc;
773	}
774
775	memset(&hw, 0, sizeof(hw));
776
777	ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
778	hw[0].irq = 14;
779
780	ide_std_init_ports(&hw[1], 0x170, 0x376);
781	hw[1].irq = 15;
782
783	printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x"
784	"\n", 'a' + cmd640_chip_version - 1, bus_type, cfr);
785
786	/*
787	* Initialize data for primary port
788	*/
789	hws[0] = &hw[0];
790
791	/*
792	* Ensure compatibility by always using the slowest timings
793	* for access to the drive's command register block,
794	* and reset the prefetch burstsize to default (512 bytes).
795	*
796	* Maybe we need a way to NOT do these on some systems?
797	*/
798	put_cmd640_reg(CMDTIM, 0);
799	put_cmd640_reg(BRST, 0x40);
800
801	b = get_cmd640_reg(CNTRL);
802
803	/*
804	* Try to enable the secondary interface, if not already enabled
805	*/
806	if (secondary_port_responding()) {
807	if ((b & CNTRL_ENA_2ND)) {
808	second_port_cmd640 = 1;
809	port2 = "okay";
810	} else if (cmd640_vlb) {
811	second_port_cmd640 = 1;
812	port2 = "alive";
813	} else
814	port2 = "not cmd640";
815	} else {
816	put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
817	if (secondary_port_responding()) {
818	second_port_cmd640 = 1;
819	port2 = "enabled";
820	} else {
821	put_cmd640_reg(CNTRL, b); /* restore original setting */
822	port2 = "not responding";
823	}
824	}
825
826	/*
827	* Initialize data for secondary cmd640 port, if enabled
828	*/
829	if (second_port_cmd640)
830	hws[1] = &hw[1];
831
832	printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n",
833	second_port_cmd640 ? "" : "not ", port2);
834
835	#ifdef CMD640_DUMP_REGS
836	cmd640_dump_regs();
837	#endif
838
839	return ide_host_add(&cmd640_port_info, hws, second_port_cmd640 ? 2 : 1,
840	NULL);
841	}
842
843	module_param_named(probe_vlb, cmd640_vlb, bool, 0);
844	MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
845
846	module_init(cmd640x_init);
847
848	MODULE_LICENSE("GPL");

drivers/ide/cmd64x.c+0−452

@@ -1,452 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines.
4	* Due to massive hardware bugs, UltraDMA is only supported
5	* on the 646U2 and not on the 646U.
6	*
7	* Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
8	* Copyright (C) 1998 David S. Miller (davem@redhat.com)
9	*
10	* Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
11	* Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz
12	* Copyright (C) 2007,2009 MontaVista Software, Inc. <source@mvista.com>
13	*/
14
15	#include <linux/module.h>
16	#include <linux/types.h>
17	#include <linux/pci.h>
18	#include <linux/ide.h>
19	#include <linux/init.h>
20
21	#include <asm/io.h>
22
23	#define DRV_NAME "cmd64x"
24
25	/*
26	* CMD64x specific registers definition.
27	*/
28	#define CFR 0x50
29	#define CFR_INTR_CH0 0x04
30
31	#define CMDTIM 0x52
32	#define ARTTIM0 0x53
33	#define DRWTIM0 0x54
34	#define ARTTIM1 0x55
35	#define DRWTIM1 0x56
36	#define ARTTIM23 0x57
37	#define ARTTIM23_DIS_RA2 0x04
38	#define ARTTIM23_DIS_RA3 0x08
39	#define ARTTIM23_INTR_CH1 0x10
40	#define DRWTIM2 0x58
41	#define BRST 0x59
42	#define DRWTIM3 0x5b
43
44	#define BMIDECR0 0x70
45	#define MRDMODE 0x71
46	#define MRDMODE_INTR_CH0 0x04
47	#define MRDMODE_INTR_CH1 0x08
48	#define UDIDETCR0 0x73
49	#define DTPR0 0x74
50	#define BMIDECR1 0x78
51	#define BMIDECSR 0x79
52	#define UDIDETCR1 0x7B
53	#define DTPR1 0x7C
54
55	static void cmd64x_program_timings(ide_drive_t *drive, u8 mode)
56	{
57	ide_hwif_t *hwif = drive->hwif;
58	struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
59	int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
60	const unsigned long T = 1000000 / bus_speed;
61	static const u8 recovery_values[] =
62	{15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0};
63	static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
64	static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
65	static const u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM2, DRWTIM3};
66	struct ide_timing t;
67	u8 arttim = 0;
68
69	if (drive->dn >= ARRAY_SIZE(drwtim_regs))
70	return;
71
72	ide_timing_compute(drive, mode, &t, T, 0);
73
74	/*
75	* In case we've got too long recovery phase, try to lengthen
76	* the active phase
77	*/
78	if (t.recover > 16) {
79	t.active += t.recover - 16;
80	t.recover = 16;
81	}
82	if (t.active > 16) /* shouldn't actually happen... */
83	t.active = 16;
84
85	/*
86	* Convert values to internal chipset representation
87	*/
88	t.recover = recovery_values[t.recover];
89	t.active &= 0x0f;
90
91	/* Program the active/recovery counts into the DRWTIM register */
92	pci_write_config_byte(dev, drwtim_regs[drive->dn],
93	(t.active << 4) \| t.recover);
94
95	/*
96	* The primary channel has individual address setup timing registers
97	* for each drive and the hardware selects the slowest timing itself.
98	* The secondary channel has one common register and we have to select
99	* the slowest address setup timing ourselves.
100	*/
101	if (hwif->channel) {
102	ide_drive_t *pair = ide_get_pair_dev(drive);
103
104	if (pair) {
105	struct ide_timing tp;
106
107	ide_timing_compute(pair, pair->pio_mode, &tp, T, 0);
108	ide_timing_merge(&t, &tp, &t, IDE_TIMING_SETUP);
109	if (pair->dma_mode) {
110	ide_timing_compute(pair, pair->dma_mode,
111	&tp, T, 0);
112	ide_timing_merge(&tp, &t, &t, IDE_TIMING_SETUP);
113	}
114	}
115	}
116
117	if (t.setup > 5) /* shouldn't actually happen... */
118	t.setup = 5;
119
120	/*
121	* Program the address setup clocks into the ARTTIM registers.
122	* Avoid clearing the secondary channel's interrupt bit.
123	*/
124	(void) pci_read_config_byte (dev, arttim_regs[drive->dn], &arttim);
125	if (hwif->channel)
126	arttim &= ~ARTTIM23_INTR_CH1;
127	arttim &= ~0xc0;
128	arttim \|= setup_values[t.setup];
129	(void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim);
130	}
131
132	/*
133	* Attempts to set drive's PIO mode.
134	* Special cases are 8: prefetch off, 9: prefetch on (both never worked)
135	*/
136
137	static void cmd64x_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
138	{
139	const u8 pio = drive->pio_mode - XFER_PIO_0;
140
141	/*
142	* Filter out the prefetch control values
143	* to prevent PIO5 from being programmed
144	*/
145	if (pio == 8 \|\| pio == 9)
146	return;
147
148	cmd64x_program_timings(drive, XFER_PIO_0 + pio);
149	}
150
151	static void cmd64x_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
152	{
153	struct pci_dev *dev = to_pci_dev(hwif->dev);
154	u8 unit = drive->dn & 0x01;
155	u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
156	const u8 speed = drive->dma_mode;
157
158	pci_read_config_byte(dev, pciU, &regU);
159	regU &= ~(unit ? 0xCA : 0x35);
160
161	switch(speed) {
162	case XFER_UDMA_5:
163	regU \|= unit ? 0x0A : 0x05;
164	break;
165	case XFER_UDMA_4:
166	regU \|= unit ? 0x4A : 0x15;
167	break;
168	case XFER_UDMA_3:
169	regU \|= unit ? 0x8A : 0x25;
170	break;
171	case XFER_UDMA_2:
172	regU \|= unit ? 0x42 : 0x11;
173	break;
174	case XFER_UDMA_1:
175	regU \|= unit ? 0x82 : 0x21;
176	break;
177	case XFER_UDMA_0:
178	regU \|= unit ? 0xC2 : 0x31;
179	break;
180	case XFER_MW_DMA_2:
181	case XFER_MW_DMA_1:
182	case XFER_MW_DMA_0:
183	cmd64x_program_timings(drive, speed);
184	break;
185	}
186
187	pci_write_config_byte(dev, pciU, regU);
188	}
189
190	static void cmd648_clear_irq(ide_drive_t *drive)
191	{
192	ide_hwif_t *hwif = drive->hwif;
193	struct pci_dev *dev = to_pci_dev(hwif->dev);
194	unsigned long base = pci_resource_start(dev, 4);
195	u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
196	MRDMODE_INTR_CH0;
197	u8 mrdmode = inb(base + 1);
198
199	/* clear the interrupt bit */
200	outb((mrdmode & ~(MRDMODE_INTR_CH0 \| MRDMODE_INTR_CH1)) \| irq_mask,
201	base + 1);
202	}
203
204	static void cmd64x_clear_irq(ide_drive_t *drive)
205	{
206	ide_hwif_t *hwif = drive->hwif;
207	struct pci_dev *dev = to_pci_dev(hwif->dev);
208	int irq_reg = hwif->channel ? ARTTIM23 : CFR;
209	u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
210	CFR_INTR_CH0;
211	u8 irq_stat = 0;
212
213	(void) pci_read_config_byte(dev, irq_reg, &irq_stat);
214	/* clear the interrupt bit */
215	(void) pci_write_config_byte(dev, irq_reg, irq_stat \| irq_mask);
216	}
217
218	static int cmd648_test_irq(ide_hwif_t *hwif)
219	{
220	struct pci_dev *dev = to_pci_dev(hwif->dev);
221	unsigned long base = pci_resource_start(dev, 4);
222	u8 irq_mask = hwif->channel ? MRDMODE_INTR_CH1 :
223	MRDMODE_INTR_CH0;
224	u8 mrdmode = inb(base + 1);
225
226	pr_debug("%s: mrdmode: 0x%02x irq_mask: 0x%02x\n",
227	hwif->name, mrdmode, irq_mask);
228
229	return (mrdmode & irq_mask) ? 1 : 0;
230	}
231
232	static int cmd64x_test_irq(ide_hwif_t *hwif)
233	{
234	struct pci_dev *dev = to_pci_dev(hwif->dev);
235	int irq_reg = hwif->channel ? ARTTIM23 : CFR;
236	u8 irq_mask = hwif->channel ? ARTTIM23_INTR_CH1 :
237	CFR_INTR_CH0;
238	u8 irq_stat = 0;
239
240	(void) pci_read_config_byte(dev, irq_reg, &irq_stat);
241
242	pr_debug("%s: irq_stat: 0x%02x irq_mask: 0x%02x\n",
243	hwif->name, irq_stat, irq_mask);
244
245	return (irq_stat & irq_mask) ? 1 : 0;
246	}
247
248	/*
249	* ASUS P55T2P4D with CMD646 chipset revision 0x01 requires the old
250	* event order for DMA transfers.
251	*/
252
253	static int cmd646_1_dma_end(ide_drive_t *drive)
254	{
255	ide_hwif_t *hwif = drive->hwif;
256	u8 dma_stat = 0, dma_cmd = 0;
257
258	/* get DMA status */
259	dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
260	/* read DMA command state */
261	dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
262	/* stop DMA */
263	outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);
264	/* clear the INTR & ERROR bits */
265	outb(dma_stat \| 6, hwif->dma_base + ATA_DMA_STATUS);
266	/* verify good DMA status */
267	return (dma_stat & 7) != 4;
268	}
269
270	static int init_chipset_cmd64x(struct pci_dev *dev)
271	{
272	u8 mrdmode = 0;
273
274	/* Set a good latency timer and cache line size value. */
275	(void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
276	/* FIXME: pci_set_master() to ensure a good latency timer value */
277
278	/*
279	* Enable interrupts, select MEMORY READ LINE for reads.
280	*
281	* NOTE: although not mentioned in the PCI0646U specs,
282	* bits 0-1 are write only and won't be read back as
283	* set or not -- PCI0646U2 specs clarify this point.
284	*/
285	(void) pci_read_config_byte (dev, MRDMODE, &mrdmode);
286	mrdmode &= ~0x30;
287	(void) pci_write_config_byte(dev, MRDMODE, (mrdmode \| 0x02));
288
289	return 0;
290	}
291
292	static u8 cmd64x_cable_detect(ide_hwif_t *hwif)
293	{
294	struct pci_dev *dev = to_pci_dev(hwif->dev);
295	u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01;
296
297	switch (dev->device) {
298	case PCI_DEVICE_ID_CMD_648:
299	case PCI_DEVICE_ID_CMD_649:
300	pci_read_config_byte(dev, BMIDECSR, &bmidecsr);
301	return (bmidecsr & mask) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
302	default:
303	return ATA_CBL_PATA40;
304	}
305	}
306
307	static const struct ide_port_ops cmd64x_port_ops = {
308	.set_pio_mode = cmd64x_set_pio_mode,
309	.set_dma_mode = cmd64x_set_dma_mode,
310	.clear_irq = cmd64x_clear_irq,
311	.test_irq = cmd64x_test_irq,
312	.cable_detect = cmd64x_cable_detect,
313	};
314
315	static const struct ide_port_ops cmd648_port_ops = {
316	.set_pio_mode = cmd64x_set_pio_mode,
317	.set_dma_mode = cmd64x_set_dma_mode,
318	.clear_irq = cmd648_clear_irq,
319	.test_irq = cmd648_test_irq,
320	.cable_detect = cmd64x_cable_detect,
321	};
322
323	static const struct ide_dma_ops cmd646_rev1_dma_ops = {
324	.dma_host_set = ide_dma_host_set,
325	.dma_setup = ide_dma_setup,
326	.dma_start = ide_dma_start,
327	.dma_end = cmd646_1_dma_end,
328	.dma_test_irq = ide_dma_test_irq,
329	.dma_lost_irq = ide_dma_lost_irq,
330	.dma_timer_expiry = ide_dma_sff_timer_expiry,
331	.dma_sff_read_status = ide_dma_sff_read_status,
332	};
333
334	static const struct ide_port_info cmd64x_chipsets[] = {
335	{ /* 0: CMD643 */
336	.name = DRV_NAME,
337	.init_chipset = init_chipset_cmd64x,
338	.enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
339	.port_ops = &cmd64x_port_ops,
340	.host_flags = IDE_HFLAG_CLEAR_SIMPLEX \|
341	IDE_HFLAG_ABUSE_PREFETCH \|
342	IDE_HFLAG_SERIALIZE,
343	.pio_mask = ATA_PIO5,
344	.mwdma_mask = ATA_MWDMA2,
345	.udma_mask = 0x00, /* no udma */
346	},
347	{ /* 1: CMD646 */
348	.name = DRV_NAME,
349	.init_chipset = init_chipset_cmd64x,
350	.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
351	.port_ops = &cmd648_port_ops,
352	.host_flags = IDE_HFLAG_ABUSE_PREFETCH \|
353	IDE_HFLAG_SERIALIZE,
354	.pio_mask = ATA_PIO5,
355	.mwdma_mask = ATA_MWDMA2,
356	.udma_mask = ATA_UDMA2,
357	},
358	{ /* 2: CMD648 */
359	.name = DRV_NAME,
360	.init_chipset = init_chipset_cmd64x,
361	.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
362	.port_ops = &cmd648_port_ops,
363	.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
364	.pio_mask = ATA_PIO5,
365	.mwdma_mask = ATA_MWDMA2,
366	.udma_mask = ATA_UDMA4,
367	},
368	{ /* 3: CMD649 */
369	.name = DRV_NAME,
370	.init_chipset = init_chipset_cmd64x,
371	.enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
372	.port_ops = &cmd648_port_ops,
373	.host_flags = IDE_HFLAG_ABUSE_PREFETCH,
374	.pio_mask = ATA_PIO5,
375	.mwdma_mask = ATA_MWDMA2,
376	.udma_mask = ATA_UDMA5,
377	}
378	};
379
380	static int cmd64x_init_one(struct pci_dev dev, const struct pci_device_id id)
381	{
382	struct ide_port_info d;
383	u8 idx = id->driver_data;
384
385	d = cmd64x_chipsets[idx];
386
387	if (idx == 1) {
388	/*
389	* UltraDMA only supported on PCI646U and PCI646U2, which
390	* correspond to revisions 0x03, 0x05 and 0x07 respectively.
391	* Actually, although the CMD tech support people won't
392	* tell me the details, the 0x03 revision cannot support
393	* UDMA correctly without hardware modifications, and even
394	* then it only works with Quantum disks due to some
395	* hold time assumptions in the 646U part which are fixed
396	* in the 646U2.
397	*
398	* So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
399	*/
400	if (dev->revision < 5) {
401	d.udma_mask = 0x00;
402	/*
403	* The original PCI0646 didn't have the primary
404	* channel enable bit, it appeared starting with
405	* PCI0646U (i.e. revision ID 3).
406	*/
407	if (dev->revision < 3) {
408	d.enablebits[0].reg = 0;
409	d.port_ops = &cmd64x_port_ops;
410	if (dev->revision == 1)
411	d.dma_ops = &cmd646_rev1_dma_ops;
412	}
413	}
414	}
415
416	return ide_pci_init_one(dev, &d, NULL);
417	}
418
419	static const struct pci_device_id cmd64x_pci_tbl[] = {
420	{ PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_643), 0 },
421	{ PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_646), 1 },
422	{ PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_648), 2 },
423	{ PCI_VDEVICE(CMD, PCI_DEVICE_ID_CMD_649), 3 },
424	{ 0, },
425	};
426	MODULE_DEVICE_TABLE(pci, cmd64x_pci_tbl);
427
428	static struct pci_driver cmd64x_pci_driver = {
429	.name = "CMD64x_IDE",
430	.id_table = cmd64x_pci_tbl,
431	.probe = cmd64x_init_one,
432	.remove = ide_pci_remove,
433	.suspend = ide_pci_suspend,
434	.resume = ide_pci_resume,
435	};
436
437	static int __init cmd64x_ide_init(void)
438	{
439	return ide_pci_register_driver(&cmd64x_pci_driver);
440	}
441
442	static void __exit cmd64x_ide_exit(void)
443	{
444	pci_unregister_driver(&cmd64x_pci_driver);
445	}
446
447	module_init(cmd64x_ide_init);
448	module_exit(cmd64x_ide_exit);
449
450	MODULE_AUTHOR("Eddie Dost, David Miller, Andre Hedrick, Bartlomiej Zolnierkiewicz");
451	MODULE_DESCRIPTION("PCI driver module for CMD64x IDE");
452	MODULE_LICENSE("GPL");

drivers/ide/cs5520.c+0−168

@@ -1,168 +0,0 @@
1	/*
2	* IDE tuning and bus mastering support for the CS5510/CS5520
3	* chipsets
4	*
5	* The CS5510/CS5520 are slightly unusual devices. Unlike the
6	* typical IDE controllers they do bus mastering with the drive in
7	* PIO mode and smarter silicon.
8	*
9	* The practical upshot of this is that we must always tune the
10	* drive for the right PIO mode. We must also ignore all the blacklists
11	* and the drive bus mastering DMA information.
12	*
13	* * This driver is strictly experimental *
14	*
15	* (c) Copyright Red Hat Inc 2002
16	*
17	* This program is free software; you can redistribute it and/or modify it
18	* under the terms of the GNU General Public License as published by the
19	* Free Software Foundation; either version 2, or (at your option) any
20	* later version.
21	*
22	* This program is distributed in the hope that it will be useful, but
23	* WITHOUT ANY WARRANTY; without even the implied warranty of
24	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25	* General Public License for more details.
26	*
27	* For the avoidance of doubt the "preferred form" of this code is one which
28	* is in an open non patent encumbered format. Where cryptographic key signing
29	* forms part of the process of creating an executable the information
30	* including keys needed to generate an equivalently functional executable
31	* are deemed to be part of the source code.
32	*
33	*/
34
35	#include <linux/module.h>
36	#include <linux/types.h>
37	#include <linux/kernel.h>
38	#include <linux/init.h>
39	#include <linux/pci.h>
40	#include <linux/ide.h>
41	#include <linux/dma-mapping.h>
42
43	#define DRV_NAME "cs5520"
44
45	struct pio_clocks
46	{
47	int address;
48	int assert;
49	int recovery;
50	};
51
52	static struct pio_clocks cs5520_pio_clocks[]={
53	{3, 6, 11},
54	{2, 5, 6},
55	{1, 4, 3},
56	{1, 3, 2},
57	{1, 2, 1}
58	};
59
60	static void cs5520_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
61	{
62	struct pci_dev *pdev = to_pci_dev(hwif->dev);
63	int controller = drive->dn > 1 ? 1 : 0;
64	const u8 pio = drive->pio_mode - XFER_PIO_0;
65
66	/* 8bit CAT/CRT - 8bit command timing for channel */
67	pci_write_config_byte(pdev, 0x62 + controller,
68	(cs5520_pio_clocks[pio].recovery << 4) \|
69	(cs5520_pio_clocks[pio].assert));
70
71	/* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
72
73	/* FIXME: should these use address ? */
74	/* Data read timing */
75	pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1),
76	(cs5520_pio_clocks[pio].recovery << 4) \|
77	(cs5520_pio_clocks[pio].assert));
78	/* Write command timing */
79	pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
80	(cs5520_pio_clocks[pio].recovery << 4) \|
81	(cs5520_pio_clocks[pio].assert));
82	}
83
84	static void cs5520_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
85	{
86	printk(KERN_ERR "cs55x0: bad ide timing.\n");
87
88	drive->pio_mode = XFER_PIO_0 + 0;
89	cs5520_set_pio_mode(hwif, drive);
90	}
91
92	static const struct ide_port_ops cs5520_port_ops = {
93	.set_pio_mode = cs5520_set_pio_mode,
94	.set_dma_mode = cs5520_set_dma_mode,
95	};
96
97	static const struct ide_port_info cyrix_chipset = {
98	.name = DRV_NAME,
99	.enablebits = { { 0x60, 0x01, 0x01 }, { 0x60, 0x02, 0x02 } },
100	.port_ops = &cs5520_port_ops,
101	.host_flags = IDE_HFLAG_ISA_PORTS \| IDE_HFLAG_CS5520,
102	.pio_mask = ATA_PIO4,
103	};
104
105	/*
106	* The 5510/5520 are a bit weird. They don't quite set up the way
107	* the PCI helper layer expects so we must do much of the set up
108	* work longhand.
109	*/
110
111	static int cs5520_init_one(struct pci_dev dev, const struct pci_device_id id)
112	{
113	const struct ide_port_info *d = &cyrix_chipset;
114	struct ide_hw hw[2], *hws[] = { NULL, NULL };
115
116	ide_setup_pci_noise(dev, d);
117
118	/* We must not grab the entire device, it has 'ISA' space in its
119	* BARS too and we will freak out other bits of the kernel
120	*/
121	if (pci_enable_device_io(dev)) {
122	printk(KERN_WARNING "%s: Unable to enable 55x0.\n", d->name);
123	return -ENODEV;
124	}
125	pci_set_master(dev);
126	if (dma_set_mask(&dev->dev, DMA_BIT_MASK(32))) {
127	printk(KERN_WARNING "%s: No suitable DMA available.\n",
128	d->name);
129	return -ENODEV;
130	}
131
132	/*
133	* Now the chipset is configured we can let the core
134	* do all the device setup for us
135	*/
136
137	ide_pci_setup_ports(dev, d, &hw[0], &hws[0]);
138	hw[0].irq = 14;
139	hw[1].irq = 15;
140
141	return ide_host_add(d, hws, 2, NULL);
142	}
143
144	static const struct pci_device_id cs5520_pci_tbl[] = {
145	{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), 0 },
146	{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), 1 },
147	{ 0, },
148	};
149	MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl);
150
151	static struct pci_driver cs5520_pci_driver = {
152	.name = "Cyrix_IDE",
153	.id_table = cs5520_pci_tbl,
154	.probe = cs5520_init_one,
155	.suspend = ide_pci_suspend,
156	.resume = ide_pci_resume,
157	};
158
159	static int __init cs5520_ide_init(void)
160	{
161	return ide_pci_register_driver(&cs5520_pci_driver);
162	}
163
164	module_init(cs5520_ide_init);
165
166	MODULE_AUTHOR("Alan Cox");
167	MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE");
168	MODULE_LICENSE("GPL");

drivers/ide/cs5530.c+0−295

@@ -1,295 +0,0 @@
1	/*
2	* Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org>
3	* Copyright (C) 2000 Mark Lord <mlord@pobox.com>
4	* Copyright (C) 2007 Bartlomiej Zolnierkiewicz
5	*
6	* May be copied or modified under the terms of the GNU General Public License
7	*
8	* Development of this chipset driver was funded
9	* by the nice folks at National Semiconductor.
10	*
11	* Documentation:
12	* CS5530 documentation available from National Semiconductor.
13	*/
14
15	#include <linux/module.h>
16	#include <linux/types.h>
17	#include <linux/kernel.h>
18	#include <linux/pci.h>
19	#include <linux/init.h>
20	#include <linux/ide.h>
21
22	#include <asm/io.h>
23
24	#define DRV_NAME "cs5530"
25
26	/*
27	* Here are the standard PIO mode 0-4 timings for each "format".
28	* Format-0 uses fast data reg timings, with slower command reg timings.
29	* Format-1 uses fast timings for all registers, but won't work with all drives.
30	*/
31	static unsigned int cs5530_pio_timings[2][5] = {
32	{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
33	{0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
34	};
35
36	/*
37	* After chip reset, the PIO timings are set to 0x0000e132, which is not valid.
38	*/
39	#define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132)
40	#define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20))
41
42	/**
43	* cs5530_set_pio_mode - set host controller for PIO mode
44	* @hwif: port
45	* @drive: drive
46	*
47	* Handles setting of PIO mode for the chipset.
48	*
49	* The init_hwif_cs5530() routine guarantees that all drives
50	* will have valid default PIO timings set up before we get here.
51	*/
52
53	static void cs5530_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
54	{
55	unsigned long basereg = CS5530_BASEREG(hwif);
56	unsigned int format = (inl(basereg + 4) >> 31) & 1;
57	const u8 pio = drive->pio_mode - XFER_PIO_0;
58
59	outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
60	}
61
62	/**
63	* cs5530_udma_filter - UDMA filter
64	* @drive: drive
65	*
66	* cs5530_udma_filter() does UDMA mask filtering for the given drive
67	* taking into the consideration capabilities of the mate device.
68	*
69	* The CS5530 specifies that two drives sharing a cable cannot mix
70	* UDMA/MDMA. It has to be one or the other, for the pair, though
71	* different timings can still be chosen for each drive. We could
72	* set the appropriate timing bits on the fly, but that might be
73	* a bit confusing. So, for now we statically handle this requirement
74	* by looking at our mate drive to see what it is capable of, before
75	* choosing a mode for our own drive.
76	*
77	* Note: This relies on the fact we never fail from UDMA to MWDMA2
78	* but instead drop to PIO.
79	*/
80
81	static u8 cs5530_udma_filter(ide_drive_t *drive)
82	{
83	ide_hwif_t *hwif = drive->hwif;
84	ide_drive_t *mate = ide_get_pair_dev(drive);
85	u16 *mateid;
86	u8 mask = hwif->ultra_mask;
87
88	if (mate == NULL)
89	goto out;
90	mateid = mate->id;
91
92	if (ata_id_has_dma(mateid) && __ide_dma_bad_drive(mate) == 0) {
93	if ((mateid[ATA_ID_FIELD_VALID] & 4) &&
94	(mateid[ATA_ID_UDMA_MODES] & 7))
95	goto out;
96	if (mateid[ATA_ID_MWDMA_MODES] & 7)
97	mask = 0;
98	}
99	out:
100	return mask;
101	}
102
103	static void cs5530_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
104	{
105	unsigned long basereg;
106	unsigned int reg, timings = 0;
107
108	switch (drive->dma_mode) {
109	case XFER_UDMA_0: timings = 0x00921250; break;
110	case XFER_UDMA_1: timings = 0x00911140; break;
111	case XFER_UDMA_2: timings = 0x00911030; break;
112	case XFER_MW_DMA_0: timings = 0x00077771; break;
113	case XFER_MW_DMA_1: timings = 0x00012121; break;
114	case XFER_MW_DMA_2: timings = 0x00002020; break;
115	}
116	basereg = CS5530_BASEREG(hwif);
117	reg = inl(basereg + 4); /* get drive0 config register */
118	timings \|= reg & 0x80000000; /* preserve PIO format bit */
119	if ((drive-> dn & 1) == 0) { /* are we configuring drive0? */
120	outl(timings, basereg + 4); /* write drive0 config register */
121	} else {
122	if (timings & 0x00100000)
123	reg \|= 0x00100000; /* enable UDMA timings for both drives */
124	else
125	reg &= ~0x00100000; /* disable UDMA timings for both drives */
126	outl(reg, basereg + 4); /* write drive0 config register */
127	outl(timings, basereg + 12); /* write drive1 config register */
128	}
129	}
130
131	/**
132	* init_chipset_5530 - set up 5530 bridge
133	* @dev: PCI device
134	*
135	* Initialize the cs5530 bridge for reliable IDE DMA operation.
136	*/
137
138	static int init_chipset_cs5530(struct pci_dev *dev)
139	{
140	struct pci_dev master_0 = NULL, cs5530_0 = NULL;
141
142	if (pci_resource_start(dev, 4) == 0)
143	return -EFAULT;
144
145	dev = NULL;
146	while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
147	switch (dev->device) {
148	case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
149	master_0 = pci_dev_get(dev);
150	break;
151	case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
152	cs5530_0 = pci_dev_get(dev);
153	break;
154	}
155	}
156	if (!master_0) {
157	printk(KERN_ERR DRV_NAME ": unable to locate PCI MASTER function\n");
158	goto out;
159	}
160	if (!cs5530_0) {
161	printk(KERN_ERR DRV_NAME ": unable to locate CS5530 LEGACY function\n");
162	goto out;
163	}
164
165	/*
166	* Enable BusMaster and MemoryWriteAndInvalidate for the cs5530:
167	* --> OR 0x14 into 16-bit PCI COMMAND reg of function 0 of the cs5530
168	*/
169
170	pci_set_master(cs5530_0);
171	pci_try_set_mwi(cs5530_0);
172
173	/*
174	* Set PCI CacheLineSize to 16-bytes:
175	* --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530
176	*/
177
178	pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
179
180	/*
181	* Disable trapping of UDMA register accesses (Win98 hack):
182	* --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530
183	*/
184
185	pci_write_config_word(cs5530_0, 0xd0, 0x5006);
186
187	/*
188	* Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
189	* The other settings are what is necessary to get the register
190	* into a sane state for IDE DMA operation.
191	*/
192
193	pci_write_config_byte(master_0, 0x40, 0x1e);
194
195	/*
196	* Set max PCI burst size (16-bytes seems to work best):
197	* 16bytes: set bit-1 at 0x41 (reg value of 0x16)
198	* all others: clear bit-1 at 0x41, and do:
199	* 128bytes: OR 0x00 at 0x41
200	* 256bytes: OR 0x04 at 0x41
201	* 512bytes: OR 0x08 at 0x41
202	* 1024bytes: OR 0x0c at 0x41
203	*/
204
205	pci_write_config_byte(master_0, 0x41, 0x14);
206
207	/*
208	* These settings are necessary to get the chip
209	* into a sane state for IDE DMA operation.
210	*/
211
212	pci_write_config_byte(master_0, 0x42, 0x00);
213	pci_write_config_byte(master_0, 0x43, 0xc1);
214
215	out:
216	pci_dev_put(master_0);
217	pci_dev_put(cs5530_0);
218	return 0;
219	}
220
221	/**
222	* init_hwif_cs5530 - initialise an IDE channel
223	* @hwif: IDE to initialize
224	*
225	* This gets invoked by the IDE driver once for each channel. It
226	* performs channel-specific pre-initialization before drive probing.
227	*/
228
229	static void init_hwif_cs5530 (ide_hwif_t *hwif)
230	{
231	unsigned long basereg;
232	u32 d0_timings;
233
234	basereg = CS5530_BASEREG(hwif);
235	d0_timings = inl(basereg + 0);
236	if (CS5530_BAD_PIO(d0_timings))
237	outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 0);
238	if (CS5530_BAD_PIO(inl(basereg + 8)))
239	outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8);
240	}
241
242	static const struct ide_port_ops cs5530_port_ops = {
243	.set_pio_mode = cs5530_set_pio_mode,
244	.set_dma_mode = cs5530_set_dma_mode,
245	.udma_filter = cs5530_udma_filter,
246	};
247
248	static const struct ide_port_info cs5530_chipset = {
249	.name = DRV_NAME,
250	.init_chipset = init_chipset_cs5530,
251	.init_hwif = init_hwif_cs5530,
252	.port_ops = &cs5530_port_ops,
253	.host_flags = IDE_HFLAG_SERIALIZE \|
254	IDE_HFLAG_POST_SET_MODE,
255	.pio_mask = ATA_PIO4,
256	.mwdma_mask = ATA_MWDMA2,
257	.udma_mask = ATA_UDMA2,
258	};
259
260	static int cs5530_init_one(struct pci_dev dev, const struct pci_device_id id)
261	{
262	return ide_pci_init_one(dev, &cs5530_chipset, NULL);
263	}
264
265	static const struct pci_device_id cs5530_pci_tbl[] = {
266	{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), 0 },
267	{ 0, },
268	};
269	MODULE_DEVICE_TABLE(pci, cs5530_pci_tbl);
270
271	static struct pci_driver cs5530_pci_driver = {
272	.name = "CS5530 IDE",
273	.id_table = cs5530_pci_tbl,
274	.probe = cs5530_init_one,
275	.remove = ide_pci_remove,
276	.suspend = ide_pci_suspend,
277	.resume = ide_pci_resume,
278	};
279
280	static int __init cs5530_ide_init(void)
281	{
282	return ide_pci_register_driver(&cs5530_pci_driver);
283	}
284
285	static void __exit cs5530_ide_exit(void)
286	{
287	pci_unregister_driver(&cs5530_pci_driver);
288	}
289
290	module_init(cs5530_ide_init);
291	module_exit(cs5530_ide_exit);
292
293	MODULE_AUTHOR("Mark Lord");
294	MODULE_DESCRIPTION("PCI driver module for Cyrix/NS 5530 IDE");
295	MODULE_LICENSE("GPL");

drivers/ide/cs5535.c+0−216

@@ -1,216 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 2004-2005 Advanced Micro Devices, Inc.
4	* Copyright (C) 2007 Bartlomiej Zolnierkiewicz
5	*
6	* History:
7	* 09/20/2005 - Jaya Kumar <jayakumar.ide@gmail.com>
8	* - Reworked tuneproc, set_drive, misc mods to prep for mainline
9	* - Work was sponsored by CIS (M) Sdn Bhd.
10	* Ported to Kernel 2.6.11 on June 26, 2005 by
11	* Wolfgang Zuleger <wolfgang.zuleger@gmx.de>
12	* Alexander Kiausch <alex.kiausch@t-online.de>
13	* Originally developed by AMD for 2.4/2.6
14	*
15	* Development of this chipset driver was funded
16	* by the nice folks at National Semiconductor/AMD.
17	*
18	* Documentation:
19	* CS5535 documentation available from AMD
20	*/
21
22	#include <linux/module.h>
23	#include <linux/pci.h>
24	#include <linux/ide.h>
25
26	#define DRV_NAME "cs5535"
27
28	#define MSR_ATAC_BASE 0x51300000
29	#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
30	#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
31	#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
32	#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
33	#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
34	#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
35	#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
36	#define ATAC_RESET (MSR_ATAC_BASE+0x10)
37	#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
38	#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
39	#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
40	#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
41	#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
42	#define ATAC_BM0_CMD_PRIM 0x00
43	#define ATAC_BM0_STS_PRIM 0x02
44	#define ATAC_BM0_PRD 0x04
45	#define CS5535_CABLE_DETECT 0x48
46
47	/* Format I PIO settings. We separate out cmd and data for safer timings */
48
49	static unsigned int cs5535_pio_cmd_timings[5] =
50	{ 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 };
51	static unsigned int cs5535_pio_dta_timings[5] =
52	{ 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131 };
53
54	static unsigned int cs5535_mwdma_timings[3] =
55	{ 0x7F0FFFF3, 0x7F035352, 0x7f024241 };
56
57	static unsigned int cs5535_udma_timings[5] =
58	{ 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061 };
59
60	/* Macros to check if the register is the reset value - reset value is an
61	invalid timing and indicates the register has not been set previously */
62
63	#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL) == 0x00009172 )
64	#define CS5535_BAD_DMA(timings) ( (timings & 0x000FFFFF) == 0x00077771 )
65
66	/****
67	* cs5535_set_speed - Configure the chipset to the new speed
68	* @drive: Drive to set up
69	* @speed: desired speed
70	*
71	* cs5535_set_speed() configures the chipset to a new speed.
72	*/
73	static void cs5535_set_speed(ide_drive_t *drive, const u8 speed)
74	{
75	u32 reg = 0, dummy;
76	u8 unit = drive->dn & 1;
77
78	/* Set the PIO timings */
79	if (speed < XFER_SW_DMA_0) {
80	ide_drive_t *pair = ide_get_pair_dev(drive);
81	u8 cmd, pioa;
82
83	cmd = pioa = speed - XFER_PIO_0;
84
85	if (pair) {
86	u8 piob = pair->pio_mode - XFER_PIO_0;
87
88	if (piob < cmd)
89	cmd = piob;
90	}
91
92	/* Write the speed of the current drive */
93	reg = (cs5535_pio_cmd_timings[cmd] << 16) \|
94	cs5535_pio_dta_timings[pioa];
95	wrmsr(unit ? ATAC_CH0D1_PIO : ATAC_CH0D0_PIO, reg, 0);
96
97	/* And if nessesary - change the speed of the other drive */
98	rdmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, dummy);
99
100	if (((reg >> 16) & cs5535_pio_cmd_timings[cmd]) !=
101	cs5535_pio_cmd_timings[cmd]) {
102	reg &= 0x0000FFFF;
103	reg \|= cs5535_pio_cmd_timings[cmd] << 16;
104	wrmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, 0);
105	}
106
107	/* Set bit 31 of the DMA register for PIO format 1 timings */
108	rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
109	wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA,
110	reg \| 0x80000000UL, 0);
111	} else {
112	rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
113
114	reg &= 0x80000000UL; /* Preserve the PIO format bit */
115
116	if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_4)
117	reg \|= cs5535_udma_timings[speed - XFER_UDMA_0];
118	else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
119	reg \|= cs5535_mwdma_timings[speed - XFER_MW_DMA_0];
120	else
121	return;
122
123	wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, 0);
124	}
125	}
126
127	/**
128	* cs5535_set_dma_mode - set host controller for DMA mode
129	* @hwif: port
130	* @drive: drive
131	*
132	* Programs the chipset for DMA mode.
133	*/
134
135	static void cs5535_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
136	{
137	cs5535_set_speed(drive, drive->dma_mode);
138	}
139
140	/**
141	* cs5535_set_pio_mode - set host controller for PIO mode
142	* @hwif: port
143	* @drive: drive
144	*
145	* A callback from the upper layers for PIO-only tuning.
146	*/
147
148	static void cs5535_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
149	{
150	cs5535_set_speed(drive, drive->pio_mode);
151	}
152
153	static u8 cs5535_cable_detect(ide_hwif_t *hwif)
154	{
155	struct pci_dev *dev = to_pci_dev(hwif->dev);
156	u8 bit;
157
158	/* if a 80 wire cable was detected */
159	pci_read_config_byte(dev, CS5535_CABLE_DETECT, &bit);
160
161	return (bit & 1) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
162	}
163
164	static const struct ide_port_ops cs5535_port_ops = {
165	.set_pio_mode = cs5535_set_pio_mode,
166	.set_dma_mode = cs5535_set_dma_mode,
167	.cable_detect = cs5535_cable_detect,
168	};
169
170	static const struct ide_port_info cs5535_chipset = {
171	.name = DRV_NAME,
172	.port_ops = &cs5535_port_ops,
173	.host_flags = IDE_HFLAG_SINGLE \| IDE_HFLAG_POST_SET_MODE,
174	.pio_mask = ATA_PIO4,
175	.mwdma_mask = ATA_MWDMA2,
176	.udma_mask = ATA_UDMA4,
177	};
178
179	static int cs5535_init_one(struct pci_dev dev, const struct pci_device_id id)
180	{
181	return ide_pci_init_one(dev, &cs5535_chipset, NULL);
182	}
183
184	static const struct pci_device_id cs5535_pci_tbl[] = {
185	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), 0 },
186	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5535_IDE), },
187	{ 0, },
188	};
189
190	MODULE_DEVICE_TABLE(pci, cs5535_pci_tbl);
191
192	static struct pci_driver cs5535_pci_driver = {
193	.name = "CS5535_IDE",
194	.id_table = cs5535_pci_tbl,
195	.probe = cs5535_init_one,
196	.remove = ide_pci_remove,
197	.suspend = ide_pci_suspend,
198	.resume = ide_pci_resume,
199	};
200
201	static int __init cs5535_ide_init(void)
202	{
203	return ide_pci_register_driver(&cs5535_pci_driver);
204	}
205
206	static void __exit cs5535_ide_exit(void)
207	{
208	pci_unregister_driver(&cs5535_pci_driver);
209	}
210
211	module_init(cs5535_ide_init);
212	module_exit(cs5535_ide_exit);
213
214	MODULE_AUTHOR("AMD");
215	MODULE_DESCRIPTION("PCI driver module for AMD/NS CS5535 IDE");
216	MODULE_LICENSE("GPL");

drivers/ide/cs5536.c+0−294

@@ -1,294 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* CS5536 PATA support
4	* (C) 2007 Martin K. Petersen <mkp@mkp.net>
5	* (C) 2009 Bartlomiej Zolnierkiewicz
6	*
7	* Documentation:
8	* Available from AMD web site.
9	*
10	* The IDE timing registers for the CS5536 live in the Geode Machine
11	* Specific Register file and not PCI config space. Most BIOSes
12	* virtualize the PCI registers so the chip looks like a standard IDE
13	* controller. Unfortunately not all implementations get this right.
14	* In particular some have problems with unaligned accesses to the
15	* virtualized PCI registers. This driver always does full dword
16	* writes to work around the issue. Also, in case of a bad BIOS this
17	* driver can be loaded with the "msr=1" parameter which forces using
18	* the Machine Specific Registers to configure the device.
19	*/
20
21	#include <linux/kernel.h>
22	#include <linux/module.h>
23	#include <linux/pci.h>
24	#include <linux/init.h>
25	#include <linux/ide.h>
26	#include <asm/msr.h>
27
28	#define DRV_NAME "cs5536"
29
30	enum {
31	MSR_IDE_CFG = 0x51300010,
32	PCI_IDE_CFG = 0x40,
33
34	CFG = 0,
35	DTC = 2,
36	CAST = 3,
37	ETC = 4,
38
39	IDE_CFG_CHANEN = (1 << 1),
40	IDE_CFG_CABLE = (1 << 17) \| (1 << 16),
41
42	IDE_D0_SHIFT = 24,
43	IDE_D1_SHIFT = 16,
44	IDE_DRV_MASK = 0xff,
45
46	IDE_CAST_D0_SHIFT = 6,
47	IDE_CAST_D1_SHIFT = 4,
48	IDE_CAST_DRV_MASK = 0x3,
49
50	IDE_CAST_CMD_SHIFT = 24,
51	IDE_CAST_CMD_MASK = 0xff,
52
53	IDE_ETC_UDMA_MASK = 0xc0,
54	};
55
56	static int use_msr;
57
58	static int cs5536_read(struct pci_dev pdev, int reg, u32 val)
59	{
60	if (unlikely(use_msr)) {
61	u32 dummy;
62
63	rdmsr(MSR_IDE_CFG + reg, *val, dummy);
64	return 0;
65	}
66
67	return pci_read_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
68	}
69
70	static int cs5536_write(struct pci_dev *pdev, int reg, int val)
71	{
72	if (unlikely(use_msr)) {
73	wrmsr(MSR_IDE_CFG + reg, val, 0);
74	return 0;
75	}
76
77	return pci_write_config_dword(pdev, PCI_IDE_CFG + reg * 4, val);
78	}
79
80	static void cs5536_program_dtc(ide_drive_t *drive, u8 tim)
81	{
82	struct pci_dev *pdev = to_pci_dev(drive->hwif->dev);
83	int dshift = (drive->dn & 1) ? IDE_D1_SHIFT : IDE_D0_SHIFT;
84	u32 dtc;
85
86	cs5536_read(pdev, DTC, &dtc);
87	dtc &= ~(IDE_DRV_MASK << dshift);
88	dtc \|= tim << dshift;
89	cs5536_write(pdev, DTC, dtc);
90	}
91
92	/**
93	* cs5536_cable_detect - detect cable type
94	* @hwif: Port to detect on
95	*
96	* Perform cable detection for ATA66 capable cable.
97	*
98	* Returns a cable type.
99	*/
100
101	static u8 cs5536_cable_detect(ide_hwif_t *hwif)
102	{
103	struct pci_dev *pdev = to_pci_dev(hwif->dev);
104	u32 cfg;
105
106	cs5536_read(pdev, CFG, &cfg);
107
108	if (cfg & IDE_CFG_CABLE)
109	return ATA_CBL_PATA80;
110	else
111	return ATA_CBL_PATA40;
112	}
113
114	/**
115	* cs5536_set_pio_mode - PIO timing setup
116	* @hwif: ATA port
117	* @drive: ATA device
118	*/
119
120	static void cs5536_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
121	{
122	static const u8 drv_timings[5] = {
123	0x98, 0x55, 0x32, 0x21, 0x20,
124	};
125
126	static const u8 addr_timings[5] = {
127	0x2, 0x1, 0x0, 0x0, 0x0,
128	};
129
130	static const u8 cmd_timings[5] = {
131	0x99, 0x92, 0x90, 0x22, 0x20,
132	};
133
134	struct pci_dev *pdev = to_pci_dev(hwif->dev);
135	ide_drive_t *pair = ide_get_pair_dev(drive);
136	int cshift = (drive->dn & 1) ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
137	unsigned long timings = (unsigned long)ide_get_drivedata(drive);
138	u32 cast;
139	const u8 pio = drive->pio_mode - XFER_PIO_0;
140	u8 cmd_pio = pio;
141
142	if (pair)
143	cmd_pio = min_t(u8, pio, pair->pio_mode - XFER_PIO_0);
144
145	timings &= (IDE_DRV_MASK << 8);
146	timings \|= drv_timings[pio];
147	ide_set_drivedata(drive, (void *)timings);
148
149	cs5536_program_dtc(drive, drv_timings[pio]);
150
151	cs5536_read(pdev, CAST, &cast);
152
153	cast &= ~(IDE_CAST_DRV_MASK << cshift);
154	cast \|= addr_timings[pio] << cshift;
155
156	cast &= ~(IDE_CAST_CMD_MASK << IDE_CAST_CMD_SHIFT);
157	cast \|= cmd_timings[cmd_pio] << IDE_CAST_CMD_SHIFT;
158
159	cs5536_write(pdev, CAST, cast);
160	}
161
162	/**
163	* cs5536_set_dma_mode - DMA timing setup
164	* @hwif: ATA port
165	* @drive: ATA device
166	*/
167
168	static void cs5536_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
169	{
170	static const u8 udma_timings[6] = {
171	0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6,
172	};
173
174	static const u8 mwdma_timings[3] = {
175	0x67, 0x21, 0x20,
176	};
177
178	struct pci_dev *pdev = to_pci_dev(hwif->dev);
179	int dshift = (drive->dn & 1) ? IDE_D1_SHIFT : IDE_D0_SHIFT;
180	unsigned long timings = (unsigned long)ide_get_drivedata(drive);
181	u32 etc;
182	const u8 mode = drive->dma_mode;
183
184	cs5536_read(pdev, ETC, &etc);
185
186	if (mode >= XFER_UDMA_0) {
187	etc &= ~(IDE_DRV_MASK << dshift);
188	etc \|= udma_timings[mode - XFER_UDMA_0] << dshift;
189	} else { /* MWDMA */
190	etc &= ~(IDE_ETC_UDMA_MASK << dshift);
191	timings &= IDE_DRV_MASK;
192	timings \|= mwdma_timings[mode - XFER_MW_DMA_0] << 8;
193	ide_set_drivedata(drive, (void *)timings);
194	}
195
196	cs5536_write(pdev, ETC, etc);
197	}
198
199	static void cs5536_dma_start(ide_drive_t *drive)
200	{
201	unsigned long timings = (unsigned long)ide_get_drivedata(drive);
202
203	if (drive->current_speed < XFER_UDMA_0 &&
204	(timings >> 8) != (timings & IDE_DRV_MASK))
205	cs5536_program_dtc(drive, timings >> 8);
206
207	ide_dma_start(drive);
208	}
209
210	static int cs5536_dma_end(ide_drive_t *drive)
211	{
212	int ret = ide_dma_end(drive);
213	unsigned long timings = (unsigned long)ide_get_drivedata(drive);
214
215	if (drive->current_speed < XFER_UDMA_0 &&
216	(timings >> 8) != (timings & IDE_DRV_MASK))
217	cs5536_program_dtc(drive, timings & IDE_DRV_MASK);
218
219	return ret;
220	}
221
222	static const struct ide_port_ops cs5536_port_ops = {
223	.set_pio_mode = cs5536_set_pio_mode,
224	.set_dma_mode = cs5536_set_dma_mode,
225	.cable_detect = cs5536_cable_detect,
226	};
227
228	static const struct ide_dma_ops cs5536_dma_ops = {
229	.dma_host_set = ide_dma_host_set,
230	.dma_setup = ide_dma_setup,
231	.dma_start = cs5536_dma_start,
232	.dma_end = cs5536_dma_end,
233	.dma_test_irq = ide_dma_test_irq,
234	.dma_lost_irq = ide_dma_lost_irq,
235	.dma_timer_expiry = ide_dma_sff_timer_expiry,
236	.dma_sff_read_status = ide_dma_sff_read_status,
237	};
238
239	static const struct ide_port_info cs5536_info = {
240	.name = DRV_NAME,
241	.port_ops = &cs5536_port_ops,
242	.dma_ops = &cs5536_dma_ops,
243	.host_flags = IDE_HFLAG_SINGLE,
244	.pio_mask = ATA_PIO4,
245	.mwdma_mask = ATA_MWDMA2,
246	.udma_mask = ATA_UDMA5,
247	};
248
249	/**
250	* cs5536_init_one
251	* @dev: PCI device
252	* @id: Entry in match table
253	*/
254
255	static int cs5536_init_one(struct pci_dev dev, const struct pci_device_id id)
256	{
257	u32 cfg;
258
259	if (use_msr)
260	printk(KERN_INFO DRV_NAME ": Using MSR regs instead of PCI\n");
261
262	cs5536_read(dev, CFG, &cfg);
263
264	if ((cfg & IDE_CFG_CHANEN) == 0) {
265	printk(KERN_ERR DRV_NAME ": disabled by BIOS\n");
266	return -ENODEV;
267	}
268
269	return ide_pci_init_one(dev, &cs5536_info, NULL);
270	}
271
272	static const struct pci_device_id cs5536_pci_tbl[] = {
273	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), },
274	{ },
275	};
276
277	static struct pci_driver cs5536_pci_driver = {
278	.name = DRV_NAME,
279	.id_table = cs5536_pci_tbl,
280	.probe = cs5536_init_one,
281	.remove = ide_pci_remove,
282	.suspend = ide_pci_suspend,
283	.resume = ide_pci_resume,
284	};
285
286	module_pci_driver(cs5536_pci_driver);
287
288	MODULE_AUTHOR("Martin K. Petersen, Bartlomiej Zolnierkiewicz");
289	MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller");
290	MODULE_LICENSE("GPL");
291	MODULE_DEVICE_TABLE(pci, cs5536_pci_tbl);
292
293	module_param_named(msr, use_msr, int, 0644);
294	MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)");

drivers/ide/cy82c693.c+0−234

@@ -1,234 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 1998-2000 Andreas S. Krebs (akrebs@altavista.net), Maintainer
4	* Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>, Integrator
5	* Copyright (C) 2007-2011 Bartlomiej Zolnierkiewicz
6	*
7	* CYPRESS CY82C693 chipset IDE controller
8	*
9	* The CY82C693 chipset is used on Digital's PC-Alpha 164SX boards.
10	*/
11
12	#include <linux/module.h>
13	#include <linux/types.h>
14	#include <linux/pci.h>
15	#include <linux/ide.h>
16	#include <linux/init.h>
17
18	#include <asm/io.h>
19
20	#define DRV_NAME "cy82c693"
21
22	/*
23	* NOTE: the value for busmaster timeout is tricky and I got it by
24	* trial and error! By using a to low value will cause DMA timeouts
25	* and drop IDE performance, and by using a to high value will cause
26	* audio playback to scatter.
27	* If you know a better value or how to calc it, please let me know.
28	*/
29
30	/* twice the value written in cy82c693ub datasheet */
31	#define BUSMASTER_TIMEOUT 0x50
32	/*
33	* the value above was tested on my machine and it seems to work okay
34	*/
35
36	/* here are the offset definitions for the registers */
37	#define CY82_IDE_CMDREG 0x04
38	#define CY82_IDE_ADDRSETUP 0x48
39	#define CY82_IDE_MASTER_IOR 0x4C
40	#define CY82_IDE_MASTER_IOW 0x4D
41	#define CY82_IDE_SLAVE_IOR 0x4E
42	#define CY82_IDE_SLAVE_IOW 0x4F
43	#define CY82_IDE_MASTER_8BIT 0x50
44	#define CY82_IDE_SLAVE_8BIT 0x51
45
46	#define CY82_INDEX_PORT 0x22
47	#define CY82_DATA_PORT 0x23
48
49	#define CY82_INDEX_CHANNEL0 0x30
50	#define CY82_INDEX_CHANNEL1 0x31
51	#define CY82_INDEX_TIMEOUT 0x32
52
53	/*
54	* set DMA mode a specific channel for CY82C693
55	*/
56
57	static void cy82c693_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
58	{
59	const u8 mode = drive->dma_mode;
60	u8 single = (mode & 0x10) >> 4, index = 0, data = 0;
61
62	index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0;
63
64	data = (mode & 3) \| (single << 2);
65
66	outb(index, CY82_INDEX_PORT);
67	outb(data, CY82_DATA_PORT);
68
69	/*
70	* note: below we set the value for Bus Master IDE TimeOut Register
71	* I'm not absolutely sure what this does, but it solved my problem
72	* with IDE DMA and sound, so I now can play sound and work with
73	* my IDE driver at the same time :-)
74	*
75	* If you know the correct (best) value for this register please
76	* let me know - ASK
77	*/
78
79	data = BUSMASTER_TIMEOUT;
80	outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
81	outb(data, CY82_DATA_PORT);
82	}
83
84	static void cy82c693_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
85	{
86	struct pci_dev *dev = to_pci_dev(hwif->dev);
87	int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
88	const unsigned long T = 1000000 / bus_speed;
89	unsigned int addrCtrl;
90	struct ide_timing t;
91	u8 time_16, time_8;
92
93	/* select primary or secondary channel */
94	if (drive->dn > 1) { /* drive is on the secondary channel */
95	dev = pci_get_slot(dev->bus, dev->devfn+1);
96	if (!dev) {
97	printk(KERN_ERR "%s: tune_drive: "
98	"Cannot find secondary interface!\n",
99	drive->name);
100	return;
101	}
102	}
103
104	ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
105
106	time_16 = clamp_val(t.recover - 1, 0, 15) \|
107	(clamp_val(t.active - 1, 0, 15) << 4);
108	time_8 = clamp_val(t.act8b - 1, 0, 15) \|
109	(clamp_val(t.rec8b - 1, 0, 15) << 4);
110
111	/* now let's write the clocks registers */
112	if ((drive->dn & 1) == 0) {
113	/*
114	* set master drive
115	* address setup control register
116	* is 32 bit !!!
117	*/
118	pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
119
120	addrCtrl &= (~0xF);
121	addrCtrl \|= clamp_val(t.setup - 1, 0, 15);
122	pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
123
124	/* now let's set the remaining registers */
125	pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, time_16);
126	pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, time_16);
127	pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, time_8);
128	} else {
129	/*
130	* set slave drive
131	* address setup control register
132	* is 32 bit !!!
133	*/
134	pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
135
136	addrCtrl &= (~0xF0);
137	addrCtrl \|= (clamp_val(t.setup - 1, 0, 15) << 4);
138	pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
139
140	/* now let's set the remaining registers */
141	pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, time_16);
142	pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, time_16);
143	pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, time_8);
144	}
145	if (drive->dn > 1)
146	pci_dev_put(dev);
147	}
148
149	static void init_iops_cy82c693(ide_hwif_t *hwif)
150	{
151	static ide_hwif_t *primary;
152	struct pci_dev *dev = to_pci_dev(hwif->dev);
153
154	if (PCI_FUNC(dev->devfn) == 1)
155	primary = hwif;
156	else {
157	hwif->mate = primary;
158	hwif->channel = 1;
159	}
160	}
161
162	static const struct ide_port_ops cy82c693_port_ops = {
163	.set_pio_mode = cy82c693_set_pio_mode,
164	.set_dma_mode = cy82c693_set_dma_mode,
165	};
166
167	static const struct ide_port_info cy82c693_chipset = {
168	.name = DRV_NAME,
169	.init_iops = init_iops_cy82c693,
170	.port_ops = &cy82c693_port_ops,
171	.host_flags = IDE_HFLAG_SINGLE,
172	.pio_mask = ATA_PIO4,
173	.swdma_mask = ATA_SWDMA2,
174	.mwdma_mask = ATA_MWDMA2,
175	};
176
177	static int cy82c693_init_one(struct pci_dev *dev,
178	const struct pci_device_id *id)
179	{
180	struct pci_dev *dev2;
181	int ret = -ENODEV;
182
183	/* CY82C693 is more than only a IDE controller.
184	Function 1 is primary IDE channel, function 2 - secondary. */
185	if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
186	PCI_FUNC(dev->devfn) == 1) {
187	dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
188	ret = ide_pci_init_two(dev, dev2, &cy82c693_chipset, NULL);
189	if (ret)
190	pci_dev_put(dev2);
191	}
192	return ret;
193	}
194
195	static void cy82c693_remove(struct pci_dev *dev)
196	{
197	struct ide_host *host = pci_get_drvdata(dev);
198	struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
199
200	ide_pci_remove(dev);
201	pci_dev_put(dev2);
202	}
203
204	static const struct pci_device_id cy82c693_pci_tbl[] = {
205	{ PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), 0 },
206	{ 0, },
207	};
208	MODULE_DEVICE_TABLE(pci, cy82c693_pci_tbl);
209
210	static struct pci_driver cy82c693_pci_driver = {
211	.name = "Cypress_IDE",
212	.id_table = cy82c693_pci_tbl,
213	.probe = cy82c693_init_one,
214	.remove = cy82c693_remove,
215	.suspend = ide_pci_suspend,
216	.resume = ide_pci_resume,
217	};
218
219	static int __init cy82c693_ide_init(void)
220	{
221	return ide_pci_register_driver(&cy82c693_pci_driver);
222	}
223
224	static void __exit cy82c693_ide_exit(void)
225	{
226	pci_unregister_driver(&cy82c693_pci_driver);
227	}
228
229	module_init(cy82c693_ide_init);
230	module_exit(cy82c693_ide_exit);
231
232	MODULE_AUTHOR("Andreas Krebs, Andre Hedrick, Bartlomiej Zolnierkiewicz");
233	MODULE_DESCRIPTION("PCI driver module for the Cypress CY82C693 IDE");
234	MODULE_LICENSE("GPL");

drivers/ide/delkin_cb.c+0−181

@@ -1,181 +0,0 @@
1	/*
2	* Created 20 Oct 2004 by Mark Lord
3	*
4	* Basic support for Delkin/ASKA/Workbit Cardbus CompactFlash adapter
5	*
6	* Modeled after the 16-bit PCMCIA driver: ide-cs.c
7	*
8	* This is slightly peculiar, in that it is a PCI driver,
9	* but is NOT an IDE PCI driver -- the IDE layer does not directly
10	* support hot insertion/removal of PCI interfaces, so this driver
11	* is unable to use the IDE PCI interfaces. Instead, it uses the
12	* same interfaces as the ide-cs (PCMCIA) driver uses.
13	* On the plus side, the driver is also smaller/simpler this way.
14	*
15	* This file is subject to the terms and conditions of the GNU General Public
16	* License. See the file COPYING in the main directory of this archive for
17	* more details.
18	*/
19
20	#include <linux/types.h>
21	#include <linux/module.h>
22	#include <linux/ide.h>
23	#include <linux/init.h>
24	#include <linux/pci.h>
25
26	#include <asm/io.h>
27
28	/*
29	* No chip documentation has yet been found,
30	* so these configuration values were pulled from
31	* a running Win98 system using "debug".
32	* This gives around 3MByte/second read performance,
33	* which is about 2/3 of what the chip is capable of.
34	*
35	* There is also a 4KByte mmio region on the card,
36	* but its purpose has yet to be reverse-engineered.
37	*/
38	static const u8 setup[] = {
39	0x00, 0x05, 0xbe, 0x01, 0x20, 0x8f, 0x00, 0x00,
40	0xa4, 0x1f, 0xb3, 0x1b, 0x00, 0x00, 0x00, 0x80,
41	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
42	0x00, 0x00, 0x00, 0x00, 0xa4, 0x83, 0x02, 0x13,
43	};
44
45	static const struct ide_port_ops delkin_cb_port_ops = {
46	.quirkproc = ide_undecoded_slave,
47	};
48
49	static int delkin_cb_init_chipset(struct pci_dev *dev)
50	{
51	unsigned long base = pci_resource_start(dev, 0);
52	int i;
53
54	outb(0x02, base + 0x1e); /* set nIEN to block interrupts */
55	inb(base + 0x17); /* read status to clear interrupts */
56
57	for (i = 0; i < sizeof(setup); ++i) {
58	if (setup[i])
59	outb(setup[i], base + i);
60	}
61
62	return 0;
63	}
64
65	static const struct ide_port_info delkin_cb_port_info = {
66	.port_ops = &delkin_cb_port_ops,
67	.host_flags = IDE_HFLAG_IO_32BIT \| IDE_HFLAG_UNMASK_IRQS \|
68	IDE_HFLAG_NO_DMA,
69	.irq_flags = IRQF_SHARED,
70	.init_chipset = delkin_cb_init_chipset,
71	.chipset = ide_pci,
72	};
73
74	static int delkin_cb_probe(struct pci_dev dev, const struct pci_device_id id)
75	{
76	struct ide_host *host;
77	unsigned long base;
78	int rc;
79	struct ide_hw hw, *hws[] = { &hw };
80
81	rc = pci_enable_device(dev);
82	if (rc) {
83	printk(KERN_ERR "delkin_cb: pci_enable_device failed (%d)\n", rc);
84	return rc;
85	}
86	rc = pci_request_regions(dev, "delkin_cb");
87	if (rc) {
88	printk(KERN_ERR "delkin_cb: pci_request_regions failed (%d)\n", rc);
89	pci_disable_device(dev);
90	return rc;
91	}
92	base = pci_resource_start(dev, 0);
93
94	delkin_cb_init_chipset(dev);
95
96	memset(&hw, 0, sizeof(hw));
97	ide_std_init_ports(&hw, base + 0x10, base + 0x1e);
98	hw.irq = dev->irq;
99	hw.dev = &dev->dev;
100
101	rc = ide_host_add(&delkin_cb_port_info, hws, 1, &host);
102	if (rc)
103	goto out_disable;
104
105	pci_set_drvdata(dev, host);
106
107	return 0;
108
109	out_disable:
110	pci_release_regions(dev);
111	pci_disable_device(dev);
112	return rc;
113	}
114
115	static void
116	delkin_cb_remove (struct pci_dev *dev)
117	{
118	struct ide_host *host = pci_get_drvdata(dev);
119
120	ide_host_remove(host);
121
122	pci_release_regions(dev);
123	pci_disable_device(dev);
124	}
125
126	#ifdef CONFIG_PM
127	static int delkin_cb_suspend(struct pci_dev *dev, pm_message_t state)
128	{
129	pci_save_state(dev);
130	pci_disable_device(dev);
131	pci_set_power_state(dev, pci_choose_state(dev, state));
132
133	return 0;
134	}
135
136	static int delkin_cb_resume(struct pci_dev *dev)
137	{
138	struct ide_host *host = pci_get_drvdata(dev);
139	int rc;
140
141	pci_set_power_state(dev, PCI_D0);
142
143	rc = pci_enable_device(dev);
144	if (rc)
145	return rc;
146
147	pci_restore_state(dev);
148	pci_set_master(dev);
149
150	if (host->init_chipset)
151	host->init_chipset(dev);
152
153	return 0;
154	}
155	#else
156	#define delkin_cb_suspend NULL
157	#define delkin_cb_resume NULL
158	#endif
159
160	static struct pci_device_id delkin_cb_pci_tbl[] = {
161	{ 0x1145, 0xf021, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
162	{ 0x1145, 0xf024, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
163	{ 0, },
164	};
165	MODULE_DEVICE_TABLE(pci, delkin_cb_pci_tbl);
166
167	static struct pci_driver delkin_cb_pci_driver = {
168	.name = "Delkin-ASKA-Workbit Cardbus IDE",
169	.id_table = delkin_cb_pci_tbl,
170	.probe = delkin_cb_probe,
171	.remove = delkin_cb_remove,
172	.suspend = delkin_cb_suspend,
173	.resume = delkin_cb_resume,
174	};
175
176	module_pci_driver(delkin_cb_pci_driver);
177
178	MODULE_AUTHOR("Mark Lord");
179	MODULE_DESCRIPTION("Basic support for Delkin/ASKA/Workbit Cardbus IDE");
180	MODULE_LICENSE("GPL");
181

drivers/ide/dtc2278.c+0−155

@@ -1,155 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 1996 Linus Torvalds & author (see below)
4	*/
5
6	#include <linux/module.h>
7	#include <linux/types.h>
8	#include <linux/kernel.h>
9	#include <linux/delay.h>
10	#include <linux/timer.h>
11	#include <linux/mm.h>
12	#include <linux/ioport.h>
13	#include <linux/blkdev.h>
14	#include <linux/ide.h>
15	#include <linux/init.h>
16
17	#include <asm/io.h>
18
19	#define DRV_NAME "dtc2278"
20
21	/*
22	* Changing this #undef to #define may solve start up problems in some systems.
23	*/
24	#undef ALWAYS_SET_DTC2278_PIO_MODE
25
26	/*
27	* From: andy@cercle.cts.com (Dyan Wile)
28	*
29	* Below is a patch for DTC-2278 - alike software-programmable controllers
30	* The code enables the secondary IDE controller and the PIO4 (3?) timings on
31	* the primary (EIDE). You may probably have to enable the 32-bit support to
32	* get the full speed. You better get the disk interrupts disabled ( hdparm -u0
33	* /dev/hd.. ) for the drives connected to the EIDE interface. (I get my
34	* filesystem corrupted with -u1, but under heavy disk load only :-)
35	*
36	* This card is now forced to use the "serialize" feature,
37	* and irq-unmasking is disallowed. If io_32bit is enabled,
38	* it must be done for BOTH drives on each interface.
39	*
40	* This code was written for the DTC2278E, but might work with any of these:
41	*
42	* DTC2278S has only a single IDE interface.
43	* DTC2278D has two IDE interfaces and is otherwise identical to the S version.
44	* DTC2278E also has serial ports and a printer port
45	* DTC2278EB: has onboard BIOS, and "works like a charm" -- Kent Bradford <kent@theory.caltech.edu>
46	*
47	* There may be a fourth controller type. The S and D versions use the
48	* Winbond chip, and I think the E version does also.
49	*
50	*/
51
52	static void sub22 (char b, char c)
53	{
54	int i;
55
56	for(i = 0; i < 3; ++i) {
57	inb(0x3f6);
58	outb_p(b,0xb0);
59	inb(0x3f6);
60	outb_p(c,0xb4);
61	inb(0x3f6);
62	if(inb(0xb4) == c) {
63	outb_p(7,0xb0);
64	inb(0x3f6);
65	return; /* success */
66	}
67	}
68	}
69
70	static DEFINE_SPINLOCK(dtc2278_lock);
71
72	static void dtc2278_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
73	{
74	unsigned long flags;
75
76	if (drive->pio_mode >= XFER_PIO_3) {
77	spin_lock_irqsave(&dtc2278_lock, flags);
78	/*
79	* This enables PIO mode4 (3?) on the first interface
80	*/
81	sub22(1,0xc3);
82	sub22(0,0xa0);
83	spin_unlock_irqrestore(&dtc2278_lock, flags);
84	} else {
85	/* we don't know how to set it back again.. */
86	/* Actually we do - there is a data sheet available for the
87	Winbond but does anyone actually care */
88	}
89	}
90
91	static const struct ide_port_ops dtc2278_port_ops = {
92	.set_pio_mode = dtc2278_set_pio_mode,
93	};
94
95	static const struct ide_port_info dtc2278_port_info __initconst = {
96	.name = DRV_NAME,
97	.chipset = ide_dtc2278,
98	.port_ops = &dtc2278_port_ops,
99	.host_flags = IDE_HFLAG_SERIALIZE \|
100	IDE_HFLAG_NO_UNMASK_IRQS \|
101	IDE_HFLAG_IO_32BIT \|
102	/* disallow ->io_32bit changes */
103	IDE_HFLAG_NO_IO_32BIT \|
104	IDE_HFLAG_NO_DMA \|
105	IDE_HFLAG_DTC2278,
106	.pio_mask = ATA_PIO4,
107	};
108
109	static int __init dtc2278_probe(void)
110	{
111	unsigned long flags;
112
113	local_irq_save(flags);
114	/*
115	* This enables the second interface
116	*/
117	outb_p(4,0xb0);
118	inb(0x3f6);
119	outb_p(0x20,0xb4);
120	inb(0x3f6);
121	#ifdef ALWAYS_SET_DTC2278_PIO_MODE
122	/*
123	* This enables PIO mode4 (3?) on the first interface
124	* and may solve start-up problems for some people.
125	*/
126	sub22(1,0xc3);
127	sub22(0,0xa0);
128	#endif
129	local_irq_restore(flags);
130
131	return ide_legacy_device_add(&dtc2278_port_info, 0);
132	}
133
134	static bool probe_dtc2278;
135
136	module_param_named(probe, probe_dtc2278, bool, 0);
137	MODULE_PARM_DESC(probe, "probe for DTC2278xx chipsets");
138
139	static int __init dtc2278_init(void)
140	{
141	if (probe_dtc2278 == 0)
142	return -ENODEV;
143
144	if (dtc2278_probe()) {
145	printk(KERN_ERR "dtc2278: ide interfaces already in use!\n");
146	return -EBUSY;
147	}
148	return 0;
149	}
150
151	module_init(dtc2278_init);
152
153	MODULE_AUTHOR("See Local File");
154	MODULE_DESCRIPTION("support of DTC-2278 VLB IDE chipsets");
155	MODULE_LICENSE("GPL");

drivers/ide/falconide.c+0−197

@@ -1,197 +0,0 @@
1	/*
2	* Atari Falcon IDE Driver
3	*
4	* Created 12 Jul 1997 by Geert Uytterhoeven
5	*
6	* This file is subject to the terms and conditions of the GNU General Public
7	* License. See the file COPYING in the main directory of this archive for
8	* more details.
9	*/
10
11	#include <linux/module.h>
12	#include <linux/types.h>
13	#include <linux/mm.h>
14	#include <linux/interrupt.h>
15	#include <linux/blkdev.h>
16	#include <linux/ide.h>
17	#include <linux/init.h>
18	#include <linux/platform_device.h>
19
20	#include <asm/setup.h>
21	#include <asm/atarihw.h>
22	#include <asm/atariints.h>
23	#include <asm/atari_stdma.h>
24	#include <asm/ide.h>
25
26	#define DRV_NAME "falconide"
27
28	/*
29	* Offsets from base address
30	*/
31
32	#define ATA_HD_CONTROL 0x39
33
34	/*
35	* falconide_intr_lock is used to obtain access to the IDE interrupt,
36	* which is shared between several drivers.
37	*/
38
39	static int falconide_intr_lock;
40
41	static void falconide_release_lock(void)
42	{
43	if (falconide_intr_lock == 0) {
44	printk(KERN_ERR "%s: bug\n", __func__);
45	return;
46	}
47	falconide_intr_lock = 0;
48	stdma_release();
49	}
50
51	static void falconide_get_lock(irq_handler_t handler, void *data)
52	{
53	if (falconide_intr_lock == 0) {
54	stdma_lock(handler, data);
55	falconide_intr_lock = 1;
56	}
57	}
58
59	static void falconide_input_data(ide_drive_t drive, struct ide_cmd cmd,
60	void *buf, unsigned int len)
61	{
62	unsigned long data_addr = drive->hwif->io_ports.data_addr;
63
64	if (drive->media == ide_disk && cmd && (cmd->tf_flags & IDE_TFLAG_FS)) {
65	__ide_mm_insw(data_addr, buf, (len + 1) / 2);
66	return;
67	}
68
69	raw_insw_swapw((u16 *)data_addr, buf, (len + 1) / 2);
70	}
71
72	static void falconide_output_data(ide_drive_t drive, struct ide_cmd cmd,
73	void *buf, unsigned int len)
74	{
75	unsigned long data_addr = drive->hwif->io_ports.data_addr;
76
77	if (drive->media == ide_disk && cmd && (cmd->tf_flags & IDE_TFLAG_FS)) {
78	__ide_mm_outsw(data_addr, buf, (len + 1) / 2);
79	return;
80	}
81
82	raw_outsw_swapw((u16 *)data_addr, buf, (len + 1) / 2);
83	}
84
85	/* Atari has a byte-swapped IDE interface */
86	static const struct ide_tp_ops falconide_tp_ops = {
87	.exec_command = ide_exec_command,
88	.read_status = ide_read_status,
89	.read_altstatus = ide_read_altstatus,
90	.write_devctl = ide_write_devctl,
91
92	.dev_select = ide_dev_select,
93	.tf_load = ide_tf_load,
94	.tf_read = ide_tf_read,
95
96	.input_data = falconide_input_data,
97	.output_data = falconide_output_data,
98	};
99
100	static const struct ide_port_info falconide_port_info = {
101	.get_lock = falconide_get_lock,
102	.release_lock = falconide_release_lock,
103	.tp_ops = &falconide_tp_ops,
104	.host_flags = IDE_HFLAG_MMIO \| IDE_HFLAG_SERIALIZE \|
105	IDE_HFLAG_NO_DMA,
106	.irq_flags = IRQF_SHARED,
107	.chipset = ide_generic,
108	};
109
110	static void __init falconide_setup_ports(struct ide_hw *hw, unsigned long base)
111	{
112	int i;
113
114	memset(hw, 0, sizeof(*hw));
115
116	hw->io_ports.data_addr = base;
117
118	for (i = 1; i < 8; i++)
119	hw->io_ports_array[i] = base + 1 + i * 4;
120
121	hw->io_ports.ctl_addr = base + ATA_HD_CONTROL;
122
123	hw->irq = IRQ_MFP_IDE;
124	}
125
126	/*
127	* Probe for a Falcon IDE interface
128	*/
129
130	static int __init falconide_init(struct platform_device *pdev)
131	{
132	struct resource *res;
133	struct ide_host *host;
134	struct ide_hw hw, *hws[] = { &hw };
135	unsigned long base;
136	int rc;
137
138	dev_info(&pdev->dev, "Atari Falcon IDE controller\n");
139
140	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
141	if (!res)
142	return -ENODEV;
143
144	if (!devm_request_mem_region(&pdev->dev, res->start,
145	resource_size(res), DRV_NAME)) {
146	dev_err(&pdev->dev, "resources busy\n");
147	return -EBUSY;
148	}
149
150	base = (unsigned long)res->start;
151
152	falconide_setup_ports(&hw, base);
153
154	host = ide_host_alloc(&falconide_port_info, hws, 1);
155	if (host == NULL) {
156	rc = -ENOMEM;
157	goto err;
158	}
159
160	falconide_get_lock(NULL, NULL);
161	rc = ide_host_register(host, &falconide_port_info, hws);
162	falconide_release_lock();
163
164	if (rc)
165	goto err_free;
166
167	platform_set_drvdata(pdev, host);
168	return 0;
169	err_free:
170	ide_host_free(host);
171	err:
172	release_mem_region(res->start, resource_size(res));
173	return rc;
174	}
175
176	static int falconide_remove(struct platform_device *pdev)
177	{
178	struct ide_host *host = platform_get_drvdata(pdev);
179
180	ide_host_remove(host);
181
182	return 0;
183	}
184
185	static struct platform_driver ide_falcon_driver = {
186	.remove = falconide_remove,
187	.driver = {
188	.name = "atari-falcon-ide",
189	},
190	};
191
192	module_platform_driver_probe(ide_falcon_driver, falconide_init);
193
194	MODULE_AUTHOR("Geert Uytterhoeven");
195	MODULE_DESCRIPTION("low-level driver for Atari Falcon IDE");
196	MODULE_LICENSE("GPL");
197	MODULE_ALIAS("platform:atari-falcon-ide");

drivers/ide/gayle.c+0−188

@@ -1,188 +0,0 @@
1	/*
2	* Amiga Gayle IDE Driver
3	*
4	* Created 9 Jul 1997 by Geert Uytterhoeven
5	*
6	* This file is subject to the terms and conditions of the GNU General Public
7	* License. See the file COPYING in the main directory of this archive for
8	* more details.
9	*/
10
11	#include <linux/types.h>
12	#include <linux/mm.h>
13	#include <linux/interrupt.h>
14	#include <linux/blkdev.h>
15	#include <linux/ide.h>
16	#include <linux/init.h>
17	#include <linux/zorro.h>
18	#include <linux/module.h>
19	#include <linux/platform_device.h>
20
21	#include <asm/setup.h>
22	#include <asm/amigahw.h>
23	#include <asm/amigaints.h>
24	#include <asm/amigayle.h>
25
26
27	/*
28	* Offsets from one of the above bases
29	*/
30
31	#define GAYLE_CONTROL 0x101a
32
33	/*
34	* These are at different offsets from the base
35	*/
36
37	#define GAYLE_IRQ_4000 0xdd3020 /* MSB = 1, Harddisk is source of */
38	#define GAYLE_IRQ_1200 0xda9000 /* interrupt */
39
40
41	/*
42	* Offset of the secondary port for IDE doublers
43	* Note that GAYLE_CONTROL is NOT available then!
44	*/
45
46	#define GAYLE_NEXT_PORT 0x1000
47
48	#define GAYLE_NUM_HWIFS 2
49	#define GAYLE_NUM_PROBE_HWIFS (ide_doubler ? GAYLE_NUM_HWIFS : \
50	GAYLE_NUM_HWIFS-1)
51	#define GAYLE_HAS_CONTROL_REG (!ide_doubler)
52
53	static bool ide_doubler;
54	module_param_named(doubler, ide_doubler, bool, 0);
55	MODULE_PARM_DESC(doubler, "enable support for IDE doublers");
56
57	/*
58	* Check and acknowledge the interrupt status
59	*/
60
61	static int gayle_test_irq(ide_hwif_t *hwif)
62	{
63	unsigned char ch;
64
65	ch = z_readb(hwif->io_ports.irq_addr);
66	if (!(ch & GAYLE_IRQ_IDE))
67	return 0;
68	return 1;
69	}
70
71	static void gayle_a1200_clear_irq(ide_drive_t *drive)
72	{
73	ide_hwif_t *hwif = drive->hwif;
74
75	(void)z_readb(hwif->io_ports.status_addr);
76	z_writeb(0x7c, hwif->io_ports.irq_addr);
77	}
78
79	static void __init gayle_setup_ports(struct ide_hw *hw, unsigned long base,
80	unsigned long ctl, unsigned long irq_port)
81	{
82	int i;
83
84	memset(hw, 0, sizeof(*hw));
85
86	hw->io_ports.data_addr = base;
87
88	for (i = 1; i < 8; i++)
89	hw->io_ports_array[i] = base + 2 + i * 4;
90
91	hw->io_ports.ctl_addr = ctl;
92	hw->io_ports.irq_addr = irq_port;
93
94	hw->irq = IRQ_AMIGA_PORTS;
95	}
96
97	static const struct ide_port_ops gayle_a4000_port_ops = {
98	.test_irq = gayle_test_irq,
99	};
100
101	static const struct ide_port_ops gayle_a1200_port_ops = {
102	.clear_irq = gayle_a1200_clear_irq,
103	.test_irq = gayle_test_irq,
104	};
105
106	static const struct ide_port_info gayle_port_info = {
107	.host_flags = IDE_HFLAG_MMIO \| IDE_HFLAG_SERIALIZE \|
108	IDE_HFLAG_NO_DMA,
109	.irq_flags = IRQF_SHARED,
110	.chipset = ide_generic,
111	};
112
113	/*
114	* Probe for a Gayle IDE interface (and optionally for an IDE doubler)
115	*/
116
117	static int __init amiga_gayle_ide_probe(struct platform_device *pdev)
118	{
119	struct resource *res;
120	struct gayle_ide_platform_data *pdata;
121	unsigned long base, ctrlport, irqport;
122	unsigned int i;
123	int error;
124	struct ide_hw hw[GAYLE_NUM_HWIFS], *hws[GAYLE_NUM_HWIFS];
125	struct ide_port_info d = gayle_port_info;
126	struct ide_host *host;
127
128	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
129	if (!res)
130	return -ENODEV;
131
132	if (!request_mem_region(res->start, resource_size(res), "IDE"))
133	return -EBUSY;
134
135	pdata = dev_get_platdata(&pdev->dev);
136	pr_info("ide: Gayle IDE controller (A%u style%s)\n",
137	pdata->explicit_ack ? 1200 : 4000,
138	ide_doubler ? ", IDE doubler" : "");
139
140	base = (unsigned long)ZTWO_VADDR(pdata->base);
141	ctrlport = 0;
142	irqport = (unsigned long)ZTWO_VADDR(pdata->irqport);
143	if (pdata->explicit_ack)
144	d.port_ops = &gayle_a1200_port_ops;
145	else
146	d.port_ops = &gayle_a4000_port_ops;
147
148	for (i = 0; i < GAYLE_NUM_PROBE_HWIFS; i++, base += GAYLE_NEXT_PORT) {
149	if (GAYLE_HAS_CONTROL_REG)
150	ctrlport = base + GAYLE_CONTROL;
151
152	gayle_setup_ports(&hw[i], base, ctrlport, irqport);
153	hws[i] = &hw[i];
154	}
155
156	error = ide_host_add(&d, hws, i, &host);
157	if (error)
158	goto out;
159
160	platform_set_drvdata(pdev, host);
161	return 0;
162
163	out:
164	release_mem_region(res->start, resource_size(res));
165	return error;
166	}
167
168	static int __exit amiga_gayle_ide_remove(struct platform_device *pdev)
169	{
170	struct ide_host *host = platform_get_drvdata(pdev);
171	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
172
173	ide_host_remove(host);
174	release_mem_region(res->start, resource_size(res));
175	return 0;
176	}
177
178	static struct platform_driver amiga_gayle_ide_driver = {
179	.remove = __exit_p(amiga_gayle_ide_remove),
180	.driver = {
181	.name = "amiga-gayle-ide",
182	},
183	};
184
185	module_platform_driver_probe(amiga_gayle_ide_driver, amiga_gayle_ide_probe);
186
187	MODULE_LICENSE("GPL");
188	MODULE_ALIAS("platform:amiga-gayle-ide");

drivers/ide/hpt366.c+0−1545

@@ -1,1545 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
4	* Portions Copyright (C) 2001 Sun Microsystems, Inc.
5	* Portions Copyright (C) 2003 Red Hat Inc
6	* Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz
7	* Portions Copyright (C) 2005-2009 MontaVista Software, Inc.
8	*
9	* Thanks to HighPoint Technologies for their assistance, and hardware.
10	* Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his
11	* donation of an ABit BP6 mainboard, processor, and memory acellerated
12	* development and support.
13	*
14	*
15	* HighPoint has its own drivers (open source except for the RAID part)
16	* available from http://www.highpoint-tech.com/USA_new/service_support.htm
17	* This may be useful to anyone wanting to work on this driver, however do not
18	* trust them too much since the code tends to become less and less meaningful
19	* as the time passes... :-/
20	*
21	* Note that final HPT370 support was done by force extraction of GPL.
22	*
23	* - add function for getting/setting power status of drive
24	* - the HPT370's state machine can get confused. reset it before each dma
25	* xfer to prevent that from happening.
26	* - reset state engine whenever we get an error.
27	* - check for busmaster state at end of dma.
28	* - use new highpoint timings.
29	* - detect bus speed using highpoint register.
30	* - use pll if we don't have a clock table. added a 66MHz table that's
31	* just 2x the 33MHz table.
32	* - removed turnaround. NOTE: we never want to switch between pll and
33	* pci clocks as the chip can glitch in those cases. the highpoint
34	* approved workaround slows everything down too much to be useful. in
35	* addition, we would have to serialize access to each chip.
36	* Adrian Sun <a.sun@sun.com>
37	*
38	* add drive timings for 66MHz PCI bus,
39	* fix ATA Cable signal detection, fix incorrect /proc info
40	* add /proc display for per-drive PIO/DMA/UDMA mode and
41	* per-channel ATA-33/66 Cable detect.
42	* Duncan Laurie <void@sun.com>
43	*
44	* fixup /proc output for multiple controllers
45	* Tim Hockin <thockin@sun.com>
46	*
47	* On hpt366:
48	* Reset the hpt366 on error, reset on dma
49	* Fix disabling Fast Interrupt hpt366.
50	* Mike Waychison <crlf@sun.com>
51	*
52	* Added support for 372N clocking and clock switching. The 372N needs
53	* different clocks on read/write. This requires overloading rw_disk and
54	* other deeply crazy things. Thanks to <http://www.hoerstreich.de> for
55	* keeping me sane.
56	* Alan Cox <alan@lxorguk.ukuu.org.uk>
57	*
58	* - fix the clock turnaround code: it was writing to the wrong ports when
59	* called for the secondary channel, caching the current clock mode per-
60	* channel caused the cached register value to get out of sync with the
61	* actual one, the channels weren't serialized, the turnaround shouldn't
62	* be done on 66 MHz PCI bus
63	* - disable UltraATA/100 for HPT370 by default as the 33 MHz clock being used
64	* does not allow for this speed anyway
65	* - avoid touching disabled channels (e.g. HPT371/N are single channel chips,
66	* their primary channel is kind of virtual, it isn't tied to any pins)
67	* - fix/remove bad/unused timing tables and use one set of tables for the whole
68	* HPT37x chip family; save space by introducing the separate transfer mode
69	* table in which the mode lookup is done
70	* - use f_CNT value saved by the HighPoint BIOS as reading it directly gives
71	* the wrong PCI frequency since DPLL has already been calibrated by BIOS;
72	* read it only from the function 0 of HPT374 chips
73	* - fix the hotswap code: it caused RESET- to glitch when tristating the bus,
74	* and for HPT36x the obsolete HDIO_TRISTATE_HWIF handler was called instead
75	* - pass to init_chipset() handlers a copy of the IDE PCI device structure as
76	* they tamper with its fields
77	* - pass to the init_setup handlers a copy of the ide_pci_device_t structure
78	* since they may tamper with its fields
79	* - prefix the driver startup messages with the real chip name
80	* - claim the extra 240 bytes of I/O space for all chips
81	* - optimize the UltraDMA filtering and the drive list lookup code
82	* - use pci_get_slot() to get to the function 1 of HPT36x/374
83	* - cache offset of the channel's misc. control registers (MCRs) being used
84	* throughout the driver
85	* - only touch the relevant MCR when detecting the cable type on HPT374's
86	* function 1
87	* - rename all the register related variables consistently
88	* - move all the interrupt twiddling code from the speedproc handlers into
89	* init_hwif_hpt366(), also grouping all the DMA related code together there
90	* - merge HPT36x/HPT37x speedproc handlers, fix PIO timing register mask and
91	* separate the UltraDMA and MWDMA masks there to avoid changing PIO timings
92	* when setting an UltraDMA mode
93	* - fix hpt3xx_tune_drive() to set the PIO mode requested, not always select
94	* the best possible one
95	* - clean up DMA timeout handling for HPT370
96	* - switch to using the enumeration type to differ between the numerous chip
97	* variants, matching PCI device/revision ID with the chip type early, at the
98	* init_setup stage
99	* - extend the hpt_info structure to hold the DPLL and PCI clock frequencies,
100	* stop duplicating it for each channel by storing the pointer in the pci_dev
101	* structure: first, at the init_setup stage, point it to a static "template"
102	* with only the chip type and its specific base DPLL frequency, the highest
103	* UltraDMA mode, and the chip settings table pointer filled, then, at the
104	* init_chipset stage, allocate per-chip instance and fill it with the rest
105	* of the necessary information
106	* - get rid of the constant thresholds in the HPT37x PCI clock detection code,
107	* switch to calculating PCI clock frequency based on the chip's base DPLL
108	* frequency
109	* - switch to using the DPLL clock and enable UltraATA/133 mode by default on
110	* anything newer than HPT370/A (except HPT374 that is not capable of this
111	* mode according to the manual)
112	* - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(),
113	* also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips;
114	* unify HPT36x/37x timing setup code and the speedproc handlers by joining
115	* the register setting lists into the table indexed by the clock selected
116	* - set the correct hwif->ultra_mask for each individual chip
117	* - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards
118	* - stop resetting HPT370's state machine before each DMA transfer as that has
119	* caused more harm than good
120	* Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
121	*/
122
123	#include <linux/types.h>
124	#include <linux/module.h>
125	#include <linux/kernel.h>
126	#include <linux/delay.h>
127	#include <linux/blkdev.h>
128	#include <linux/interrupt.h>
129	#include <linux/pci.h>
130	#include <linux/init.h>
131	#include <linux/ide.h>
132	#include <linux/slab.h>
133
134	#include <linux/uaccess.h>
135	#include <asm/io.h>
136
137	#define DRV_NAME "hpt366"
138
139	/* various tuning parameters */
140	#undef HPT_RESET_STATE_ENGINE
141	#undef HPT_DELAY_INTERRUPT
142
143	static const char *bad_ata100_5[] = {
144	"IBM-DTLA-307075",
145	"IBM-DTLA-307060",
146	"IBM-DTLA-307045",
147	"IBM-DTLA-307030",
148	"IBM-DTLA-307020",
149	"IBM-DTLA-307015",
150	"IBM-DTLA-305040",
151	"IBM-DTLA-305030",
152	"IBM-DTLA-305020",
153	"IC35L010AVER07-0",
154	"IC35L020AVER07-0",
155	"IC35L030AVER07-0",
156	"IC35L040AVER07-0",
157	"IC35L060AVER07-0",
158	"WDC AC310200R",
159	NULL
160	};
161
162	static const char *bad_ata66_4[] = {
163	"IBM-DTLA-307075",
164	"IBM-DTLA-307060",
165	"IBM-DTLA-307045",
166	"IBM-DTLA-307030",
167	"IBM-DTLA-307020",
168	"IBM-DTLA-307015",
169	"IBM-DTLA-305040",
170	"IBM-DTLA-305030",
171	"IBM-DTLA-305020",
172	"IC35L010AVER07-0",
173	"IC35L020AVER07-0",
174	"IC35L030AVER07-0",
175	"IC35L040AVER07-0",
176	"IC35L060AVER07-0",
177	"WDC AC310200R",
178	"MAXTOR STM3320620A",
179	NULL
180	};
181
182	static const char *bad_ata66_3[] = {
183	"WDC AC310200R",
184	NULL
185	};
186
187	static const char *bad_ata33[] = {
188	"Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", "Maxtor 90845U3", "Maxtor 90650U2",
189	"Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5", "Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2",
190	"Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6", "Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4",
191	"Maxtor 90510D4",
192	"Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2",
193	"Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7", "Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4",
194	"Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5", "Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2",
195	NULL
196	};
197
198	static u8 xfer_speeds[] = {
199	XFER_UDMA_6,
200	XFER_UDMA_5,
201	XFER_UDMA_4,
202	XFER_UDMA_3,
203	XFER_UDMA_2,
204	XFER_UDMA_1,
205	XFER_UDMA_0,
206
207	XFER_MW_DMA_2,
208	XFER_MW_DMA_1,
209	XFER_MW_DMA_0,
210
211	XFER_PIO_4,
212	XFER_PIO_3,
213	XFER_PIO_2,
214	XFER_PIO_1,
215	XFER_PIO_0
216	};
217
218	/* Key for bus clock timings
219	* 36x 37x
220	* bits bits
221	* 0:3 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
222	* cycles = value + 1
223	* 4:7 4:8 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA.
224	* cycles = value + 1
225	* 8:11 9:12 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file
226	* register access.
227	* 12:15 13:17 cmd_low_time. Active time of DIOW_/DIOR_ during task file
228	* register access.
229	* 16:18 18:20 udma_cycle_time. Clock cycles for UDMA xfer.
230	* - 21 CLK frequency: 0=ATA clock, 1=dual ATA clock.
231	* 19:21 22:24 pre_high_time. Time to initialize the 1st cycle for PIO and
232	* MW DMA xfer.
233	* 22:24 25:27 cmd_pre_high_time. Time to initialize the 1st PIO cycle for
234	* task file register access.
235	* 28 28 UDMA enable.
236	* 29 29 DMA enable.
237	* 30 30 PIO MST enable. If set, the chip is in bus master mode during
238	* PIO xfer.
239	* 31 31 FIFO enable.
240	*/
241
242	static u32 forty_base_hpt36x[] = {
243	/* XFER_UDMA_6 */ 0x900fd943,
244	/* XFER_UDMA_5 */ 0x900fd943,
245	/* XFER_UDMA_4 */ 0x900fd943,
246	/* XFER_UDMA_3 */ 0x900ad943,
247	/* XFER_UDMA_2 */ 0x900bd943,
248	/* XFER_UDMA_1 */ 0x9008d943,
249	/* XFER_UDMA_0 */ 0x9008d943,
250
251	/* XFER_MW_DMA_2 */ 0xa008d943,
252	/* XFER_MW_DMA_1 */ 0xa010d955,
253	/* XFER_MW_DMA_0 */ 0xa010d9fc,
254
255	/* XFER_PIO_4 */ 0xc008d963,
256	/* XFER_PIO_3 */ 0xc010d974,
257	/* XFER_PIO_2 */ 0xc010d997,
258	/* XFER_PIO_1 */ 0xc010d9c7,
259	/* XFER_PIO_0 */ 0xc018d9d9
260	};
261
262	static u32 thirty_three_base_hpt36x[] = {
263	/* XFER_UDMA_6 */ 0x90c9a731,
264	/* XFER_UDMA_5 */ 0x90c9a731,
265	/* XFER_UDMA_4 */ 0x90c9a731,
266	/* XFER_UDMA_3 */ 0x90cfa731,
267	/* XFER_UDMA_2 */ 0x90caa731,
268	/* XFER_UDMA_1 */ 0x90cba731,
269	/* XFER_UDMA_0 */ 0x90c8a731,
270
271	/* XFER_MW_DMA_2 */ 0xa0c8a731,
272	/* XFER_MW_DMA_1 / 0xa0c8a732, / 0xa0c8a733 */
273	/* XFER_MW_DMA_0 */ 0xa0c8a797,
274
275	/* XFER_PIO_4 */ 0xc0c8a731,
276	/* XFER_PIO_3 */ 0xc0c8a742,
277	/* XFER_PIO_2 */ 0xc0d0a753,
278	/* XFER_PIO_1 / 0xc0d0a7a3, / 0xc0d0a793 */
279	/* XFER_PIO_0 / 0xc0d0a7aa / 0xc0d0a7a7 */
280	};
281
282	static u32 twenty_five_base_hpt36x[] = {
283	/* XFER_UDMA_6 */ 0x90c98521,
284	/* XFER_UDMA_5 */ 0x90c98521,
285	/* XFER_UDMA_4 */ 0x90c98521,
286	/* XFER_UDMA_3 */ 0x90cf8521,
287	/* XFER_UDMA_2 */ 0x90cf8521,
288	/* XFER_UDMA_1 */ 0x90cb8521,
289	/* XFER_UDMA_0 */ 0x90cb8521,
290
291	/* XFER_MW_DMA_2 */ 0xa0ca8521,
292	/* XFER_MW_DMA_1 */ 0xa0ca8532,
293	/* XFER_MW_DMA_0 */ 0xa0ca8575,
294
295	/* XFER_PIO_4 */ 0xc0ca8521,
296	/* XFER_PIO_3 */ 0xc0ca8532,
297	/* XFER_PIO_2 */ 0xc0ca8542,
298	/* XFER_PIO_1 */ 0xc0d08572,
299	/* XFER_PIO_0 */ 0xc0d08585
300	};
301
302	/*
303	* The following are the new timing tables with PIO mode data/taskfile transfer
304	* overclocking fixed...
305	*/
306
307	/* This table is taken from the HPT370 data manual rev. 1.02 */
308	static u32 thirty_three_base_hpt37x[] = {
309	/* XFER_UDMA_6 / 0x16455031, / 0x16655031 ?? */
310	/* XFER_UDMA_5 */ 0x16455031,
311	/* XFER_UDMA_4 */ 0x16455031,
312	/* XFER_UDMA_3 */ 0x166d5031,
313	/* XFER_UDMA_2 */ 0x16495031,
314	/* XFER_UDMA_1 */ 0x164d5033,
315	/* XFER_UDMA_0 */ 0x16515097,
316
317	/* XFER_MW_DMA_2 */ 0x26515031,
318	/* XFER_MW_DMA_1 */ 0x26515033,
319	/* XFER_MW_DMA_0 */ 0x26515097,
320
321	/* XFER_PIO_4 */ 0x06515021,
322	/* XFER_PIO_3 */ 0x06515022,
323	/* XFER_PIO_2 */ 0x06515033,
324	/* XFER_PIO_1 */ 0x06915065,
325	/* XFER_PIO_0 */ 0x06d1508a
326	};
327
328	static u32 fifty_base_hpt37x[] = {
329	/* XFER_UDMA_6 */ 0x1a861842,
330	/* XFER_UDMA_5 */ 0x1a861842,
331	/* XFER_UDMA_4 */ 0x1aae1842,
332	/* XFER_UDMA_3 */ 0x1a8e1842,
333	/* XFER_UDMA_2 */ 0x1a0e1842,
334	/* XFER_UDMA_1 */ 0x1a161854,
335	/* XFER_UDMA_0 */ 0x1a1a18ea,
336
337	/* XFER_MW_DMA_2 */ 0x2a821842,
338	/* XFER_MW_DMA_1 */ 0x2a821854,
339	/* XFER_MW_DMA_0 */ 0x2a8218ea,
340
341	/* XFER_PIO_4 */ 0x0a821842,
342	/* XFER_PIO_3 */ 0x0a821843,
343	/* XFER_PIO_2 */ 0x0a821855,
344	/* XFER_PIO_1 */ 0x0ac218a8,
345	/* XFER_PIO_0 */ 0x0b02190c
346	};
347
348	static u32 sixty_six_base_hpt37x[] = {
349	/* XFER_UDMA_6 */ 0x1c86fe62,
350	/* XFER_UDMA_5 / 0x1caefe62, / 0x1c8afe62 */
351	/* XFER_UDMA_4 */ 0x1c8afe62,
352	/* XFER_UDMA_3 */ 0x1c8efe62,
353	/* XFER_UDMA_2 */ 0x1c92fe62,
354	/* XFER_UDMA_1 */ 0x1c9afe62,
355	/* XFER_UDMA_0 */ 0x1c82fe62,
356
357	/* XFER_MW_DMA_2 */ 0x2c82fe62,
358	/* XFER_MW_DMA_1 */ 0x2c82fe66,
359	/* XFER_MW_DMA_0 */ 0x2c82ff2e,
360
361	/* XFER_PIO_4 */ 0x0c82fe62,
362	/* XFER_PIO_3 */ 0x0c82fe84,
363	/* XFER_PIO_2 */ 0x0c82fea6,
364	/* XFER_PIO_1 */ 0x0d02ff26,
365	/* XFER_PIO_0 */ 0x0d42ff7f
366	};
367
368	#define HPT371_ALLOW_ATA133_6 1
369	#define HPT302_ALLOW_ATA133_6 1
370	#define HPT372_ALLOW_ATA133_6 1
371	#define HPT370_ALLOW_ATA100_5 0
372	#define HPT366_ALLOW_ATA66_4 1
373	#define HPT366_ALLOW_ATA66_3 1
374
375	/* Supported ATA clock frequencies */
376	enum ata_clock {
377	ATA_CLOCK_25MHZ,
378	ATA_CLOCK_33MHZ,
379	ATA_CLOCK_40MHZ,
380	ATA_CLOCK_50MHZ,
381	ATA_CLOCK_66MHZ,
382	NUM_ATA_CLOCKS
383	};
384
385	struct hpt_timings {
386	u32 pio_mask;
387	u32 dma_mask;
388	u32 ultra_mask;
389	u32 *clock_table[NUM_ATA_CLOCKS];
390	};
391
392	/*
393	* Hold all the HighPoint chip information in one place.
394	*/
395
396	struct hpt_info {
397	char chip_name; / Chip name */
398	u8 chip_type; /* Chip type */
399	u8 udma_mask; /* Allowed UltraDMA modes mask. */
400	u8 dpll_clk; /* DPLL clock in MHz */
401	u8 pci_clk; /* PCI clock in MHz */
402	struct hpt_timings timings; / Chipset timing data */
403	u8 clock; /* ATA clock selected */
404	};
405
406	/* Supported HighPoint chips */
407	enum {
408	HPT36x,
409	HPT370,
410	HPT370A,
411	HPT374,
412	HPT372,
413	HPT372A,
414	HPT302,
415	HPT371,
416	HPT372N,
417	HPT302N,
418	HPT371N
419	};
420
421	static struct hpt_timings hpt36x_timings = {
422	.pio_mask = 0xc1f8ffff,
423	.dma_mask = 0x303800ff,
424	.ultra_mask = 0x30070000,
425	.clock_table = {
426	[ATA_CLOCK_25MHZ] = twenty_five_base_hpt36x,
427	[ATA_CLOCK_33MHZ] = thirty_three_base_hpt36x,
428	[ATA_CLOCK_40MHZ] = forty_base_hpt36x,
429	[ATA_CLOCK_50MHZ] = NULL,
430	[ATA_CLOCK_66MHZ] = NULL
431	}
432	};
433
434	static struct hpt_timings hpt37x_timings = {
435	.pio_mask = 0xcfc3ffff,
436	.dma_mask = 0x31c001ff,
437	.ultra_mask = 0x303c0000,
438	.clock_table = {
439	[ATA_CLOCK_25MHZ] = NULL,
440	[ATA_CLOCK_33MHZ] = thirty_three_base_hpt37x,
441	[ATA_CLOCK_40MHZ] = NULL,
442	[ATA_CLOCK_50MHZ] = fifty_base_hpt37x,
443	[ATA_CLOCK_66MHZ] = sixty_six_base_hpt37x
444	}
445	};
446
447	static const struct hpt_info hpt36x = {
448	.chip_name = "HPT36x",
449	.chip_type = HPT36x,
450	.udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2,
451	.dpll_clk = 0, /* no DPLL */
452	.timings = &hpt36x_timings
453	};
454
455	static const struct hpt_info hpt370 = {
456	.chip_name = "HPT370",
457	.chip_type = HPT370,
458	.udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4,
459	.dpll_clk = 48,
460	.timings = &hpt37x_timings
461	};
462
463	static const struct hpt_info hpt370a = {
464	.chip_name = "HPT370A",
465	.chip_type = HPT370A,
466	.udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4,
467	.dpll_clk = 48,
468	.timings = &hpt37x_timings
469	};
470
471	static const struct hpt_info hpt374 = {
472	.chip_name = "HPT374",
473	.chip_type = HPT374,
474	.udma_mask = ATA_UDMA5,
475	.dpll_clk = 48,
476	.timings = &hpt37x_timings
477	};
478
479	static const struct hpt_info hpt372 = {
480	.chip_name = "HPT372",
481	.chip_type = HPT372,
482	.udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
483	.dpll_clk = 55,
484	.timings = &hpt37x_timings
485	};
486
487	static const struct hpt_info hpt372a = {
488	.chip_name = "HPT372A",
489	.chip_type = HPT372A,
490	.udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
491	.dpll_clk = 66,
492	.timings = &hpt37x_timings
493	};
494
495	static const struct hpt_info hpt302 = {
496	.chip_name = "HPT302",
497	.chip_type = HPT302,
498	.udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
499	.dpll_clk = 66,
500	.timings = &hpt37x_timings
501	};
502
503	static const struct hpt_info hpt371 = {
504	.chip_name = "HPT371",
505	.chip_type = HPT371,
506	.udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
507	.dpll_clk = 66,
508	.timings = &hpt37x_timings
509	};
510
511	static const struct hpt_info hpt372n = {
512	.chip_name = "HPT372N",
513	.chip_type = HPT372N,
514	.udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
515	.dpll_clk = 77,
516	.timings = &hpt37x_timings
517	};
518
519	static const struct hpt_info hpt302n = {
520	.chip_name = "HPT302N",
521	.chip_type = HPT302N,
522	.udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
523	.dpll_clk = 77,
524	.timings = &hpt37x_timings
525	};
526
527	static const struct hpt_info hpt371n = {
528	.chip_name = "HPT371N",
529	.chip_type = HPT371N,
530	.udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5,
531	.dpll_clk = 77,
532	.timings = &hpt37x_timings
533	};
534
535	static bool check_in_drive_list(ide_drive_t drive, const char *list)
536	{
537	return match_string(list, -1, (char *)&drive->id[ATA_ID_PROD]) >= 0;
538	}
539
540	static struct hpt_info hpt3xx_get_info(struct device dev)
541	{
542	struct ide_host *host = dev_get_drvdata(dev);
543	struct hpt_info info = (struct hpt_info )host->host_priv;
544
545	return dev == host->dev[1] ? info + 1 : info;
546	}
547
548	/*
549	* The Marvell bridge chips used on the HighPoint SATA cards do not seem
550	* to support the UltraDMA modes 1, 2, and 3 as well as any MWDMA modes...
551	*/
552
553	static u8 hpt3xx_udma_filter(ide_drive_t *drive)
554	{
555	ide_hwif_t *hwif = drive->hwif;
556	struct hpt_info *info = hpt3xx_get_info(hwif->dev);
557	u8 mask = hwif->ultra_mask;
558
559	switch (info->chip_type) {
560	case HPT36x:
561	if (!HPT366_ALLOW_ATA66_4 \|\|
562	check_in_drive_list(drive, bad_ata66_4))
563	mask = ATA_UDMA3;
564
565	if (!HPT366_ALLOW_ATA66_3 \|\|
566	check_in_drive_list(drive, bad_ata66_3))
567	mask = ATA_UDMA2;
568	break;
569	case HPT370:
570	if (!HPT370_ALLOW_ATA100_5 \|\|
571	check_in_drive_list(drive, bad_ata100_5))
572	mask = ATA_UDMA4;
573	break;
574	case HPT370A:
575	if (!HPT370_ALLOW_ATA100_5 \|\|
576	check_in_drive_list(drive, bad_ata100_5))
577	return ATA_UDMA4;
578	fallthrough;
579	case HPT372 :
580	case HPT372A:
581	case HPT372N:
582	case HPT374 :
583	if (ata_id_is_sata(drive->id))
584	mask &= ~0x0e;
585	fallthrough;
586	default:
587	return mask;
588	}
589
590	return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask;
591	}
592
593	static u8 hpt3xx_mdma_filter(ide_drive_t *drive)
594	{
595	ide_hwif_t *hwif = drive->hwif;
596	struct hpt_info *info = hpt3xx_get_info(hwif->dev);
597
598	switch (info->chip_type) {
599	case HPT372 :
600	case HPT372A:
601	case HPT372N:
602	case HPT374 :
603	if (ata_id_is_sata(drive->id))
604	return 0x00;
605	fallthrough;
606	default:
607	return 0x07;
608	}
609	}
610
611	static u32 get_speed_setting(u8 speed, struct hpt_info *info)
612	{
613	int i;
614
615	/*
616	* Lookup the transfer mode table to get the index into
617	* the timing table.
618	*
619	* NOTE: For XFER_PIO_SLOW, PIO mode 0 timings will be used.
620	*/
621	for (i = 0; i < ARRAY_SIZE(xfer_speeds) - 1; i++)
622	if (xfer_speeds[i] == speed)
623	break;
624
625	return info->timings->clock_table[info->clock][i];
626	}
627
628	static void hpt3xx_set_mode(ide_hwif_t hwif, ide_drive_t drive)
629	{
630	struct pci_dev *dev = to_pci_dev(hwif->dev);
631	struct hpt_info *info = hpt3xx_get_info(hwif->dev);
632	struct hpt_timings *t = info->timings;
633	u8 itr_addr = 0x40 + (drive->dn * 4);
634	u32 old_itr = 0;
635	const u8 speed = drive->dma_mode;
636	u32 new_itr = get_speed_setting(speed, info);
637	u32 itr_mask = speed < XFER_MW_DMA_0 ? t->pio_mask :
638	(speed < XFER_UDMA_0 ? t->dma_mask :
639	t->ultra_mask);
640
641	pci_read_config_dword(dev, itr_addr, &old_itr);
642	new_itr = (old_itr & ~itr_mask) \| (new_itr & itr_mask);
643	/*
644	* Disable on-chip PIO FIFO/buffer (and PIO MST mode as well)
645	* to avoid problems handling I/O errors later
646	*/
647	new_itr &= ~0xc0000000;
648
649	pci_write_config_dword(dev, itr_addr, new_itr);
650	}
651
652	static void hpt3xx_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
653	{
654	drive->dma_mode = drive->pio_mode;
655	hpt3xx_set_mode(hwif, drive);
656	}
657
658	static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
659	{
660	ide_hwif_t *hwif = drive->hwif;
661	struct pci_dev *dev = to_pci_dev(hwif->dev);
662	struct hpt_info *info = hpt3xx_get_info(hwif->dev);
663
664	if ((drive->dev_flags & IDE_DFLAG_NIEN_QUIRK) == 0)
665	return;
666
667	if (info->chip_type >= HPT370) {
668	u8 scr1 = 0;
669
670	pci_read_config_byte(dev, 0x5a, &scr1);
671	if (((scr1 & 0x10) >> 4) != mask) {
672	if (mask)
673	scr1 \|= 0x10;
674	else
675	scr1 &= ~0x10;
676	pci_write_config_byte(dev, 0x5a, scr1);
677	}
678	} else if (mask)
679	disable_irq(hwif->irq);
680	else
681	enable_irq(hwif->irq);
682	}
683
684	/*
685	* This is specific to the HPT366 UDMA chipset
686	* by HighPoint\|Triones Technologies, Inc.
687	*/
688	static void hpt366_dma_lost_irq(ide_drive_t *drive)
689	{
690	struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
691	u8 mcr1 = 0, mcr3 = 0, scr1 = 0;
692
693	pci_read_config_byte(dev, 0x50, &mcr1);
694	pci_read_config_byte(dev, 0x52, &mcr3);
695	pci_read_config_byte(dev, 0x5a, &scr1);
696	printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n",
697	drive->name, __func__, mcr1, mcr3, scr1);
698	if (scr1 & 0x10)
699	pci_write_config_byte(dev, 0x5a, scr1 & ~0x10);
700	ide_dma_lost_irq(drive);
701	}
702
703	static void hpt370_clear_engine(ide_drive_t *drive)
704	{
705	ide_hwif_t *hwif = drive->hwif;
706	struct pci_dev *dev = to_pci_dev(hwif->dev);
707
708	pci_write_config_byte(dev, hwif->select_data, 0x37);
709	udelay(10);
710	}
711
712	static void hpt370_irq_timeout(ide_drive_t *drive)
713	{
714	ide_hwif_t *hwif = drive->hwif;
715	struct pci_dev *dev = to_pci_dev(hwif->dev);
716	u16 bfifo = 0;
717	u8 dma_cmd;
718
719	pci_read_config_word(dev, hwif->select_data + 2, &bfifo);
720	printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff);
721
722	/* get DMA command mode */
723	dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
724	/* stop DMA */
725	outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
726	hpt370_clear_engine(drive);
727	}
728
729	static void hpt370_dma_start(ide_drive_t *drive)
730	{
731	#ifdef HPT_RESET_STATE_ENGINE
732	hpt370_clear_engine(drive);
733	#endif
734	ide_dma_start(drive);
735	}
736
737	static int hpt370_dma_end(ide_drive_t *drive)
738	{
739	ide_hwif_t *hwif = drive->hwif;
740	u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
741
742	if (dma_stat & ATA_DMA_ACTIVE) {
743	/* wait a little */
744	udelay(20);
745	dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
746	if (dma_stat & ATA_DMA_ACTIVE)
747	hpt370_irq_timeout(drive);
748	}
749	return ide_dma_end(drive);
750	}
751
752	/* returns 1 if DMA IRQ issued, 0 otherwise */
753	static int hpt374_dma_test_irq(ide_drive_t *drive)
754	{
755	ide_hwif_t *hwif = drive->hwif;
756	struct pci_dev *dev = to_pci_dev(hwif->dev);
757	u16 bfifo = 0;
758	u8 dma_stat;
759
760	pci_read_config_word(dev, hwif->select_data + 2, &bfifo);
761	if (bfifo & 0x1FF) {
762	// printk("%s: %d bytes in FIFO\n", drive->name, bfifo);
763	return 0;
764	}
765
766	dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
767	/* return 1 if INTR asserted */
768	if (dma_stat & ATA_DMA_INTR)
769	return 1;
770
771	return 0;
772	}
773
774	static int hpt374_dma_end(ide_drive_t *drive)
775	{
776	ide_hwif_t *hwif = drive->hwif;
777	struct pci_dev *dev = to_pci_dev(hwif->dev);
778	u8 mcr = 0, mcr_addr = hwif->select_data;
779	u8 bwsr = 0, mask = hwif->channel ? 0x02 : 0x01;
780
781	pci_read_config_byte(dev, 0x6a, &bwsr);
782	pci_read_config_byte(dev, mcr_addr, &mcr);
783	if (bwsr & mask)
784	pci_write_config_byte(dev, mcr_addr, mcr \| 0x30);
785	return ide_dma_end(drive);
786	}
787
788	/**
789	* hpt3xxn_set_clock - perform clock switching dance
790	* @hwif: hwif to switch
791	* @mode: clocking mode (0x21 for write, 0x23 otherwise)
792	*
793	* Switch the DPLL clock on the HPT3xxN devices. This is a right mess.
794	*/
795
796	static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode)
797	{
798	unsigned long base = hwif->extra_base;
799	u8 scr2 = inb(base + 0x6b);
800
801	if ((scr2 & 0x7f) == mode)
802	return;
803
804	/* Tristate the bus */
805	outb(0x80, base + 0x63);
806	outb(0x80, base + 0x67);
807
808	/* Switch clock and reset channels */
809	outb(mode, base + 0x6b);
810	outb(0xc0, base + 0x69);
811
812	/*
813	* Reset the state machines.
814	* NOTE: avoid accidentally enabling the disabled channels.
815	*/
816	outb(inb(base + 0x60) \| 0x32, base + 0x60);
817	outb(inb(base + 0x64) \| 0x32, base + 0x64);
818
819	/* Complete reset */
820	outb(0x00, base + 0x69);
821
822	/* Reconnect channels to bus */
823	outb(0x00, base + 0x63);
824	outb(0x00, base + 0x67);
825	}
826
827	/**
828	* hpt3xxn_rw_disk - prepare for I/O
829	* @drive: drive for command
830	* @rq: block request structure
831	*
832	* This is called when a disk I/O is issued to HPT3xxN.
833	* We need it because of the clock switching.
834	*/
835
836	static void hpt3xxn_rw_disk(ide_drive_t drive, struct request rq)
837	{
838	hpt3xxn_set_clock(drive->hwif, rq_data_dir(rq) ? 0x21 : 0x23);
839	}
840
841	/**
842	* hpt37x_calibrate_dpll - calibrate the DPLL
843	* @dev: PCI device
844	*
845	* Perform a calibration cycle on the DPLL.
846	* Returns 1 if this succeeds
847	*/
848	static int hpt37x_calibrate_dpll(struct pci_dev *dev, u16 f_low, u16 f_high)
849	{
850	u32 dpll = (f_high << 16) \| f_low \| 0x100;
851	u8 scr2;
852	int i;
853
854	pci_write_config_dword(dev, 0x5c, dpll);
855
856	/* Wait for oscillator ready */
857	for(i = 0; i < 0x5000; ++i) {
858	udelay(50);
859	pci_read_config_byte(dev, 0x5b, &scr2);
860	if (scr2 & 0x80)
861	break;
862	}
863	/* See if it stays ready (we'll just bail out if it's not yet) */
864	for(i = 0; i < 0x1000; ++i) {
865	pci_read_config_byte(dev, 0x5b, &scr2);
866	/* DPLL destabilized? */
867	if(!(scr2 & 0x80))
868	return 0;
869	}
870	/* Turn off tuning, we have the DPLL set */
871	pci_read_config_dword (dev, 0x5c, &dpll);
872	pci_write_config_dword(dev, 0x5c, (dpll & ~0x100));
873	return 1;
874	}
875
876	static void hpt3xx_disable_fast_irq(struct pci_dev *dev, u8 mcr_addr)
877	{
878	struct ide_host *host = pci_get_drvdata(dev);
879	struct hpt_info *info = host->host_priv + (&dev->dev == host->dev[1]);
880	u8 chip_type = info->chip_type;
881	u8 new_mcr, old_mcr = 0;
882
883	/*
884	* Disable the "fast interrupt" prediction. Don't hold off
885	* on interrupts. (== 0x01 despite what the docs say)
886	*/
887	pci_read_config_byte(dev, mcr_addr + 1, &old_mcr);
888
889	if (chip_type >= HPT374)
890	new_mcr = old_mcr & ~0x07;
891	else if (chip_type >= HPT370) {
892	new_mcr = old_mcr;
893	new_mcr &= ~0x02;
894	#ifdef HPT_DELAY_INTERRUPT
895	new_mcr &= ~0x01;
896	#else
897	new_mcr \|= 0x01;
898	#endif
899	} else /* HPT366 and HPT368 */
900	new_mcr = old_mcr & ~0x80;
901
902	if (new_mcr != old_mcr)
903	pci_write_config_byte(dev, mcr_addr + 1, new_mcr);
904	}
905
906	static int init_chipset_hpt366(struct pci_dev *dev)
907	{
908	unsigned long io_base = pci_resource_start(dev, 4);
909	struct hpt_info *info = hpt3xx_get_info(&dev->dev);
910	const char *name = DRV_NAME;
911	u8 pci_clk, dpll_clk = 0; /* PCI and DPLL clock in MHz */
912	u8 chip_type;
913	enum ata_clock clock;
914
915	chip_type = info->chip_type;
916
917	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4));
918	pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78);
919	pci_write_config_byte(dev, PCI_MIN_GNT, 0x08);
920	pci_write_config_byte(dev, PCI_MAX_LAT, 0x08);
921
922	/*
923	* First, try to estimate the PCI clock frequency...
924	*/
925	if (chip_type >= HPT370) {
926	u8 scr1 = 0;
927	u16 f_cnt = 0;
928	u32 temp = 0;
929
930	/* Interrupt force enable. */
931	pci_read_config_byte(dev, 0x5a, &scr1);
932	if (scr1 & 0x10)
933	pci_write_config_byte(dev, 0x5a, scr1 & ~0x10);
934
935	/*
936	* HighPoint does this for HPT372A.
937	* NOTE: This register is only writeable via I/O space.
938	*/
939	if (chip_type == HPT372A)
940	outb(0x0e, io_base + 0x9c);
941
942	/*
943	* Default to PCI clock. Make sure MA15/16 are set to output
944	* to prevent drives having problems with 40-pin cables.
945	*/
946	pci_write_config_byte(dev, 0x5b, 0x23);
947
948	/*
949	* We'll have to read f_CNT value in order to determine
950	* the PCI clock frequency according to the following ratio:
951	*
952	* f_CNT = Fpci * 192 / Fdpll
953	*
954	* First try reading the register in which the HighPoint BIOS
955	* saves f_CNT value before reprogramming the DPLL from its
956	* default setting (which differs for the various chips).
957	*
958	* NOTE: This register is only accessible via I/O space;
959	* HPT374 BIOS only saves it for the function 0, so we have to
960	* always read it from there -- no need to check the result of
961	* pci_get_slot() for the function 0 as the whole device has
962	* been already "pinned" (via function 1) in init_setup_hpt374()
963	*/
964	if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) {
965	struct pci_dev *dev1 = pci_get_slot(dev->bus,
966	dev->devfn - 1);
967	unsigned long io_base = pci_resource_start(dev1, 4);
968
969	temp = inl(io_base + 0x90);
970	pci_dev_put(dev1);
971	} else
972	temp = inl(io_base + 0x90);
973
974	/*
975	* In case the signature check fails, we'll have to
976	* resort to reading the f_CNT register itself in hopes
977	* that nobody has touched the DPLL yet...
978	*/
979	if ((temp & 0xFFFFF000) != 0xABCDE000) {
980	int i;
981
982	printk(KERN_WARNING "%s %s: no clock data saved by "
983	"BIOS\n", name, pci_name(dev));
984
985	/* Calculate the average value of f_CNT. */
986	for (temp = i = 0; i < 128; i++) {
987	pci_read_config_word(dev, 0x78, &f_cnt);
988	temp += f_cnt & 0x1ff;
989	mdelay(1);
990	}
991	f_cnt = temp / 128;
992	} else
993	f_cnt = temp & 0x1ff;
994
995	dpll_clk = info->dpll_clk;
996	pci_clk = (f_cnt * dpll_clk) / 192;
997
998	/* Clamp PCI clock to bands. */
999	if (pci_clk < 40)
1000	pci_clk = 33;
1001	else if(pci_clk < 45)
1002	pci_clk = 40;
1003	else if(pci_clk < 55)
1004	pci_clk = 50;
1005	else
1006	pci_clk = 66;
1007
1008	printk(KERN_INFO "%s %s: DPLL base: %d MHz, f_CNT: %d, "
1009	"assuming %d MHz PCI\n", name, pci_name(dev),
1010	dpll_clk, f_cnt, pci_clk);
1011	} else {
1012	u32 itr1 = 0;
1013
1014	pci_read_config_dword(dev, 0x40, &itr1);
1015
1016	/* Detect PCI clock by looking at cmd_high_time. */
1017	switch ((itr1 >> 8) & 0x0f) {
1018	case 0x09:
1019	pci_clk = 40;
1020	break;
1021	case 0x05:
1022	pci_clk = 25;
1023	break;
1024	case 0x07:
1025	default:
1026	pci_clk = 33;
1027	break;
1028	}
1029	}
1030
1031	/* Let's assume we'll use PCI clock for the ATA clock... */
1032	switch (pci_clk) {
1033	case 25:
1034	clock = ATA_CLOCK_25MHZ;
1035	break;
1036	case 33:
1037	default:
1038	clock = ATA_CLOCK_33MHZ;
1039	break;
1040	case 40:
1041	clock = ATA_CLOCK_40MHZ;
1042	break;
1043	case 50:
1044	clock = ATA_CLOCK_50MHZ;
1045	break;
1046	case 66:
1047	clock = ATA_CLOCK_66MHZ;
1048	break;
1049	}
1050
1051	/*
1052	* Only try the DPLL if we don't have a table for the PCI clock that
1053	* we are running at for HPT370/A, always use it for anything newer...
1054	*
1055	* NOTE: Using the internal DPLL results in slow reads on 33 MHz PCI.
1056	* We also don't like using the DPLL because this causes glitches
1057	* on PRST-/SRST- when the state engine gets reset...
1058	*/
1059	if (chip_type >= HPT374 \|\| info->timings->clock_table[clock] == NULL) {
1060	u16 f_low, delta = pci_clk < 50 ? 2 : 4;
1061	int adjust;
1062
1063	/*
1064	* Select 66 MHz DPLL clock only if UltraATA/133 mode is
1065	* supported/enabled, use 50 MHz DPLL clock otherwise...
1066	*/
1067	if (info->udma_mask == ATA_UDMA6) {
1068	dpll_clk = 66;
1069	clock = ATA_CLOCK_66MHZ;
1070	} else if (dpll_clk) { /* HPT36x chips don't have DPLL */
1071	dpll_clk = 50;
1072	clock = ATA_CLOCK_50MHZ;
1073	}
1074
1075	if (info->timings->clock_table[clock] == NULL) {
1076	printk(KERN_ERR "%s %s: unknown bus timing!\n",
1077	name, pci_name(dev));
1078	return -EIO;
1079	}
1080
1081	/* Select the DPLL clock. */
1082	pci_write_config_byte(dev, 0x5b, 0x21);
1083
1084	/*
1085	* Adjust the DPLL based upon PCI clock, enable it,
1086	* and wait for stabilization...
1087	*/
1088	f_low = (pci_clk * 48) / dpll_clk;
1089
1090	for (adjust = 0; adjust < 8; adjust++) {
1091	if(hpt37x_calibrate_dpll(dev, f_low, f_low + delta))
1092	break;
1093
1094	/*
1095	* See if it'll settle at a fractionally different clock
1096	*/
1097	if (adjust & 1)
1098	f_low -= adjust >> 1;
1099	else
1100	f_low += adjust >> 1;
1101	}
1102	if (adjust == 8) {
1103	printk(KERN_ERR "%s %s: DPLL did not stabilize!\n",
1104	name, pci_name(dev));
1105	return -EIO;
1106	}
1107
1108	printk(KERN_INFO "%s %s: using %d MHz DPLL clock\n",
1109	name, pci_name(dev), dpll_clk);
1110	} else {
1111	/* Mark the fact that we're not using the DPLL. */
1112	dpll_clk = 0;
1113
1114	printk(KERN_INFO "%s %s: using %d MHz PCI clock\n",
1115	name, pci_name(dev), pci_clk);
1116	}
1117
1118	/* Store the clock frequencies. */
1119	info->dpll_clk = dpll_clk;
1120	info->pci_clk = pci_clk;
1121	info->clock = clock;
1122
1123	if (chip_type >= HPT370) {
1124	u8 mcr1, mcr4;
1125
1126	/*
1127	* Reset the state engines.
1128	* NOTE: Avoid accidentally enabling the disabled channels.
1129	*/
1130	pci_read_config_byte (dev, 0x50, &mcr1);
1131	pci_read_config_byte (dev, 0x54, &mcr4);
1132	pci_write_config_byte(dev, 0x50, (mcr1 \| 0x32));
1133	pci_write_config_byte(dev, 0x54, (mcr4 \| 0x32));
1134	udelay(100);
1135	}
1136
1137	/*
1138	* On HPT371N, if ATA clock is 66 MHz we must set bit 2 in
1139	* the MISC. register to stretch the UltraDMA Tss timing.
1140	* NOTE: This register is only writeable via I/O space.
1141	*/
1142	if (chip_type == HPT371N && clock == ATA_CLOCK_66MHZ)
1143	outb(inb(io_base + 0x9c) \| 0x04, io_base + 0x9c);
1144
1145	hpt3xx_disable_fast_irq(dev, 0x50);
1146	hpt3xx_disable_fast_irq(dev, 0x54);
1147
1148	return 0;
1149	}
1150
1151	static u8 hpt3xx_cable_detect(ide_hwif_t *hwif)
1152	{
1153	struct pci_dev *dev = to_pci_dev(hwif->dev);
1154	struct hpt_info *info = hpt3xx_get_info(hwif->dev);
1155	u8 chip_type = info->chip_type;
1156	u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02;
1157
1158	/*
1159	* The HPT37x uses the CBLID pins as outputs for MA15/MA16
1160	* address lines to access an external EEPROM. To read valid
1161	* cable detect state the pins must be enabled as inputs.
1162	*/
1163	if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) {
1164	/*
1165	* HPT374 PCI function 1
1166	* - set bit 15 of reg 0x52 to enable TCBLID as input
1167	* - set bit 15 of reg 0x56 to enable FCBLID as input
1168	*/
1169	u8 mcr_addr = hwif->select_data + 2;
1170	u16 mcr;
1171
1172	pci_read_config_word(dev, mcr_addr, &mcr);
1173	pci_write_config_word(dev, mcr_addr, mcr \| 0x8000);
1174	/* Debounce, then read cable ID register */
1175	udelay(10);
1176	pci_read_config_byte(dev, 0x5a, &scr1);
1177	pci_write_config_word(dev, mcr_addr, mcr);
1178	} else if (chip_type >= HPT370) {
1179	/*
1180	* HPT370/372 and 374 pcifn 0
1181	* - clear bit 0 of reg 0x5b to enable P/SCBLID as inputs
1182	*/
1183	u8 scr2 = 0;
1184
1185	pci_read_config_byte(dev, 0x5b, &scr2);
1186	pci_write_config_byte(dev, 0x5b, scr2 & ~1);
1187	/* Debounce, then read cable ID register */
1188	udelay(10);
1189	pci_read_config_byte(dev, 0x5a, &scr1);
1190	pci_write_config_byte(dev, 0x5b, scr2);
1191	} else
1192	pci_read_config_byte(dev, 0x5a, &scr1);
1193
1194	return (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
1195	}
1196
1197	static void init_hwif_hpt366(ide_hwif_t *hwif)
1198	{
1199	struct hpt_info *info = hpt3xx_get_info(hwif->dev);
1200	u8 chip_type = info->chip_type;
1201
1202	/* Cache the channel's MISC. control registers' offset */
1203	hwif->select_data = hwif->channel ? 0x54 : 0x50;
1204
1205	/*
1206	* HPT3xxN chips have some complications:
1207	*
1208	* - on 33 MHz PCI we must clock switch
1209	* - on 66 MHz PCI we must NOT use the PCI clock
1210	*/
1211	if (chip_type >= HPT372N && info->dpll_clk && info->pci_clk < 66) {
1212	/*
1213	* Clock is shared between the channels,
1214	* so we'll have to serialize them... :-(
1215	*/
1216	hwif->host->host_flags \|= IDE_HFLAG_SERIALIZE;
1217	hwif->rw_disk = &hpt3xxn_rw_disk;
1218	}
1219	}
1220
1221	static int init_dma_hpt366(ide_hwif_t *hwif,
1222	const struct ide_port_info *d)
1223	{
1224	struct pci_dev *dev = to_pci_dev(hwif->dev);
1225	unsigned long flags, base = ide_pci_dma_base(hwif, d);
1226	u8 dma_old, dma_new, masterdma = 0, slavedma = 0;
1227
1228	if (base == 0)
1229	return -1;
1230
1231	hwif->dma_base = base;
1232
1233	if (ide_pci_check_simplex(hwif, d) < 0)
1234	return -1;
1235
1236	if (ide_pci_set_master(dev, d->name) < 0)
1237	return -1;
1238
1239	dma_old = inb(base + 2);
1240
1241	local_irq_save(flags);
1242
1243	dma_new = dma_old;
1244	pci_read_config_byte(dev, hwif->channel ? 0x4b : 0x43, &masterdma);
1245	pci_read_config_byte(dev, hwif->channel ? 0x4f : 0x47, &slavedma);
1246
1247	if (masterdma & 0x30) dma_new \|= 0x20;
1248	if ( slavedma & 0x30) dma_new \|= 0x40;
1249	if (dma_new != dma_old)
1250	outb(dma_new, base + 2);
1251
1252	local_irq_restore(flags);
1253
1254	printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
1255	hwif->name, base, base + 7);
1256
1257	hwif->extra_base = base + (hwif->channel ? 8 : 16);
1258
1259	if (ide_allocate_dma_engine(hwif))
1260	return -1;
1261
1262	return 0;
1263	}
1264
1265	static void hpt374_init(struct pci_dev dev, struct pci_dev dev2)
1266	{
1267	if (dev2->irq != dev->irq) {
1268	/* FIXME: we need a core pci_set_interrupt() */
1269	dev2->irq = dev->irq;
1270	printk(KERN_INFO DRV_NAME " %s: PCI config space interrupt "
1271	"fixed\n", pci_name(dev2));
1272	}
1273	}
1274
1275	static void hpt371_init(struct pci_dev *dev)
1276	{
1277	u8 mcr1 = 0;
1278
1279	/*
1280	* HPT371 chips physically have only one channel, the secondary one,
1281	* but the primary channel registers do exist! Go figure...
1282	* So, we manually disable the non-existing channel here
1283	* (if the BIOS hasn't done this already).
1284	*/
1285	pci_read_config_byte(dev, 0x50, &mcr1);
1286	if (mcr1 & 0x04)
1287	pci_write_config_byte(dev, 0x50, mcr1 & ~0x04);
1288	}
1289
1290	static int hpt36x_init(struct pci_dev dev, struct pci_dev dev2)
1291	{
1292	u8 mcr1 = 0, pin1 = 0, pin2 = 0;
1293
1294	/*
1295	* Now we'll have to force both channels enabled if
1296	* at least one of them has been enabled by BIOS...
1297	*/
1298	pci_read_config_byte(dev, 0x50, &mcr1);
1299	if (mcr1 & 0x30)
1300	pci_write_config_byte(dev, 0x50, mcr1 \| 0x30);
1301
1302	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1);
1303	pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2);
1304
1305	if (pin1 != pin2 && dev->irq == dev2->irq) {
1306	printk(KERN_INFO DRV_NAME " %s: onboard version of chipset, "
1307	"pin1=%d pin2=%d\n", pci_name(dev), pin1, pin2);
1308	return 1;
1309	}
1310
1311	return 0;
1312	}
1313
1314	#define IDE_HFLAGS_HPT3XX \
1315	(IDE_HFLAG_NO_ATAPI_DMA \| \
1316	IDE_HFLAG_OFF_BOARD)
1317
1318	static const struct ide_port_ops hpt3xx_port_ops = {
1319	.set_pio_mode = hpt3xx_set_pio_mode,
1320	.set_dma_mode = hpt3xx_set_mode,
1321	.maskproc = hpt3xx_maskproc,
1322	.mdma_filter = hpt3xx_mdma_filter,
1323	.udma_filter = hpt3xx_udma_filter,
1324	.cable_detect = hpt3xx_cable_detect,
1325	};
1326
1327	static const struct ide_dma_ops hpt37x_dma_ops = {
1328	.dma_host_set = ide_dma_host_set,
1329	.dma_setup = ide_dma_setup,
1330	.dma_start = ide_dma_start,
1331	.dma_end = hpt374_dma_end,
1332	.dma_test_irq = hpt374_dma_test_irq,
1333	.dma_lost_irq = ide_dma_lost_irq,
1334	.dma_timer_expiry = ide_dma_sff_timer_expiry,
1335	.dma_sff_read_status = ide_dma_sff_read_status,
1336	};
1337
1338	static const struct ide_dma_ops hpt370_dma_ops = {
1339	.dma_host_set = ide_dma_host_set,
1340	.dma_setup = ide_dma_setup,
1341	.dma_start = hpt370_dma_start,
1342	.dma_end = hpt370_dma_end,
1343	.dma_test_irq = ide_dma_test_irq,
1344	.dma_lost_irq = ide_dma_lost_irq,
1345	.dma_timer_expiry = ide_dma_sff_timer_expiry,
1346	.dma_clear = hpt370_irq_timeout,
1347	.dma_sff_read_status = ide_dma_sff_read_status,
1348	};
1349
1350	static const struct ide_dma_ops hpt36x_dma_ops = {
1351	.dma_host_set = ide_dma_host_set,
1352	.dma_setup = ide_dma_setup,
1353	.dma_start = ide_dma_start,
1354	.dma_end = ide_dma_end,
1355	.dma_test_irq = ide_dma_test_irq,
1356	.dma_lost_irq = hpt366_dma_lost_irq,
1357	.dma_timer_expiry = ide_dma_sff_timer_expiry,
1358	.dma_sff_read_status = ide_dma_sff_read_status,
1359	};
1360
1361	static const struct ide_port_info hpt366_chipsets[] = {
1362	{ /* 0: HPT36x */
1363	.name = DRV_NAME,
1364	.init_chipset = init_chipset_hpt366,
1365	.init_hwif = init_hwif_hpt366,
1366	.init_dma = init_dma_hpt366,
1367	/*
1368	* HPT36x chips have one channel per function and have
1369	* both channel enable bits located differently and visible
1370	* to both functions -- really stupid design decision... :-(
1371	* Bit 4 is for the primary channel, bit 5 for the secondary.
1372	*/
1373	.enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}},
1374	.port_ops = &hpt3xx_port_ops,
1375	.dma_ops = &hpt36x_dma_ops,
1376	.host_flags = IDE_HFLAGS_HPT3XX \| IDE_HFLAG_SINGLE,
1377	.pio_mask = ATA_PIO4,
1378	.mwdma_mask = ATA_MWDMA2,
1379	},
1380	{ /* 1: HPT3xx */
1381	.name = DRV_NAME,
1382	.init_chipset = init_chipset_hpt366,
1383	.init_hwif = init_hwif_hpt366,
1384	.init_dma = init_dma_hpt366,
1385	.enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}},
1386	.port_ops = &hpt3xx_port_ops,
1387	.dma_ops = &hpt37x_dma_ops,
1388	.host_flags = IDE_HFLAGS_HPT3XX,
1389	.pio_mask = ATA_PIO4,
1390	.mwdma_mask = ATA_MWDMA2,
1391	}
1392	};
1393
1394	/**
1395	* hpt366_init_one - called when an HPT366 is found
1396	* @dev: the hpt366 device
1397	* @id: the matching pci id
1398	*
1399	* Called when the PCI registration layer (or the IDE initialization)
1400	* finds a device matching our IDE device tables.
1401	*/
1402	static int hpt366_init_one(struct pci_dev dev, const struct pci_device_id id)
1403	{
1404	const struct hpt_info *info = NULL;
1405	struct hpt_info *dyn_info;
1406	struct pci_dev *dev2 = NULL;
1407	struct ide_port_info d;
1408	u8 idx = id->driver_data;
1409	u8 rev = dev->revision;
1410	int ret;
1411
1412	if ((idx == 0 \|\| idx == 4) && (PCI_FUNC(dev->devfn) & 1))
1413	return -ENODEV;
1414
1415	switch (idx) {
1416	case 0:
1417	if (rev < 3)
1418	info = &hpt36x;
1419	else {
1420	switch (min_t(u8, rev, 6)) {
1421	case 3: info = &hpt370; break;
1422	case 4: info = &hpt370a; break;
1423	case 5: info = &hpt372; break;
1424	case 6: info = &hpt372n; break;
1425	}
1426	idx++;
1427	}
1428	break;
1429	case 1:
1430	info = (rev > 1) ? &hpt372n : &hpt372a;
1431	break;
1432	case 2:
1433	info = (rev > 1) ? &hpt302n : &hpt302;
1434	break;
1435	case 3:
1436	hpt371_init(dev);
1437	info = (rev > 1) ? &hpt371n : &hpt371;
1438	break;
1439	case 4:
1440	info = &hpt374;
1441	break;
1442	case 5:
1443	info = &hpt372n;
1444	break;
1445	}
1446
1447	printk(KERN_INFO DRV_NAME ": %s chipset detected\n", info->chip_name);
1448
1449	d = hpt366_chipsets[min_t(u8, idx, 1)];
1450
1451	d.udma_mask = info->udma_mask;
1452
1453	/* fixup ->dma_ops for HPT370/HPT370A */
1454	if (info == &hpt370 \|\| info == &hpt370a)
1455	d.dma_ops = &hpt370_dma_ops;
1456
1457	if (info == &hpt36x \|\| info == &hpt374)
1458	dev2 = pci_get_slot(dev->bus, dev->devfn + 1);
1459
1460	dyn_info = kcalloc(dev2 ? 2 : 1, sizeof(*dyn_info), GFP_KERNEL);
1461	if (dyn_info == NULL) {
1462	printk(KERN_ERR "%s %s: out of memory!\n",
1463	d.name, pci_name(dev));
1464	pci_dev_put(dev2);
1465	return -ENOMEM;
1466	}
1467
1468	/*
1469	* Copy everything from a static "template" structure
1470	* to just allocated per-chip hpt_info structure.
1471	*/
1472	memcpy(dyn_info, info, sizeof(*dyn_info));
1473
1474	if (dev2) {
1475	memcpy(dyn_info + 1, info, sizeof(*dyn_info));
1476
1477	if (info == &hpt374)
1478	hpt374_init(dev, dev2);
1479	else {
1480	if (hpt36x_init(dev, dev2))
1481	d.host_flags &= ~IDE_HFLAG_NON_BOOTABLE;
1482	}
1483
1484	ret = ide_pci_init_two(dev, dev2, &d, dyn_info);
1485	if (ret < 0) {
1486	pci_dev_put(dev2);
1487	kfree(dyn_info);
1488	}
1489	return ret;
1490	}
1491
1492	ret = ide_pci_init_one(dev, &d, dyn_info);
1493	if (ret < 0)
1494	kfree(dyn_info);
1495
1496	return ret;
1497	}
1498
1499	static void hpt366_remove(struct pci_dev *dev)
1500	{
1501	struct ide_host *host = pci_get_drvdata(dev);
1502	struct ide_info *info = host->host_priv;
1503	struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
1504
1505	ide_pci_remove(dev);
1506	pci_dev_put(dev2);
1507	kfree(info);
1508	}
1509
1510	static const struct pci_device_id hpt366_pci_tbl[] = {
1511	{ PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT366), 0 },
1512	{ PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372), 1 },
1513	{ PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT302), 2 },
1514	{ PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT371), 3 },
1515	{ PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT374), 4 },
1516	{ PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372N), 5 },
1517	{ 0, },
1518	};
1519	MODULE_DEVICE_TABLE(pci, hpt366_pci_tbl);
1520
1521	static struct pci_driver hpt366_pci_driver = {
1522	.name = "HPT366_IDE",
1523	.id_table = hpt366_pci_tbl,
1524	.probe = hpt366_init_one,
1525	.remove = hpt366_remove,
1526	.suspend = ide_pci_suspend,
1527	.resume = ide_pci_resume,
1528	};
1529
1530	static int __init hpt366_ide_init(void)
1531	{
1532	return ide_pci_register_driver(&hpt366_pci_driver);
1533	}
1534
1535	static void __exit hpt366_ide_exit(void)
1536	{
1537	pci_unregister_driver(&hpt366_pci_driver);
1538	}
1539
1540	module_init(hpt366_ide_init);
1541	module_exit(hpt366_ide_exit);
1542
1543	MODULE_AUTHOR("Andre Hedrick");
1544	MODULE_DESCRIPTION("PCI driver module for Highpoint HPT366 IDE");
1545	MODULE_LICENSE("GPL");

drivers/ide/ht6560b.c+0−383

@@ -1,383 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (C) 1995-2000 Linus Torvalds & author (see below)
4	*/
5
6	/*
7	* HT-6560B EIDE-controller support
8	* To activate controller support use kernel parameter "ide0=ht6560b".
9	* Use hdparm utility to enable PIO mode support.
10	*
11	* Author: Mikko Ala-Fossi <maf@iki.fi>
12	* Jan Evert van Grootheest <j.e.van.grootheest@caiway.nl>
13	*
14	*/
15
16	#define DRV_NAME "ht6560b"
17	#define HT6560B_VERSION "v0.08"
18
19	#include <linux/module.h>
20	#include <linux/types.h>
21	#include <linux/kernel.h>
22	#include <linux/delay.h>
23	#include <linux/timer.h>
24	#include <linux/mm.h>
25	#include <linux/ioport.h>
26	#include <linux/blkdev.h>
27	#include <linux/ide.h>
28	#include <linux/init.h>
29
30	#include <asm/io.h>
31
32	/* #define DEBUG / / remove comments for DEBUG messages */
33
34	/*
35	* The special i/o-port that HT-6560B uses to configuration:
36	* bit0 (0x01): "1" selects secondary interface
37	* bit2 (0x04): "1" enables FIFO function
38	* bit5 (0x20): "1" enables prefetched data read function (???)
39	*
40	* The special i/o-port that HT-6560A uses to configuration:
41	* bit0 (0x01): "1" selects secondary interface
42	* bit1 (0x02): "1" enables prefetched data read function
43	* bit2 (0x04): "0" enables multi-master system (?)
44	* bit3 (0x08): "1" 3 cycle time, "0" 2 cycle time (?)
45	*/
46	#define HT_CONFIG_PORT 0x3e6
47
48	static inline u8 HT_CONFIG(ide_drive_t *drive)
49	{
50	return ((unsigned long)ide_get_drivedata(drive) & 0xff00) >> 8;
51	}
52
53	/*
54	* FIFO + PREFETCH (both a/b-model)
55	*/
56	#define HT_CONFIG_DEFAULT 0x1c /* no prefetch */
57	/* #define HT_CONFIG_DEFAULT 0x3c / / with prefetch */
58	#define HT_SECONDARY_IF 0x01
59	#define HT_PREFETCH_MODE 0x20
60
61	/*
62	* ht6560b Timing values:
63	*
64	* I reviewed some assembler source listings of htide drivers and found
65	* out how they setup those cycle time interfacing values, as they at Holtek
66	* call them. IDESETUP.COM that is supplied with the drivers figures out
67	* optimal values and fetches those values to drivers. I found out that
68	* they use Select register to fetch timings to the ide board right after
69	* interface switching. After that it was quite easy to add code to
70	* ht6560b.c.
71	*
72	* IDESETUP.COM gave me values 0x24, 0x45, 0xaa, 0xff that worked fine
73	* for hda and hdc. But hdb needed higher values to work, so I guess
74	* that sometimes it is necessary to give higher value than IDESETUP
75	* gives. [see cmd640.c for an extreme example of this. -ml]
76	*
77	* Perhaps I should explain something about these timing values:
78	* The higher nibble of value is the Recovery Time (rt) and the lower nibble
79	* of the value is the Active Time (at). Minimum value 2 is the fastest and
80	* the maximum value 15 is the slowest. Default values should be 15 for both.
81	* So 0x24 means 2 for rt and 4 for at. Each of the drives should have
82	* both values, and IDESETUP gives automatically rt=15 st=15 for CDROMs or
83	* similar. If value is too small there will be all sorts of failures.
84	*
85	* Timing byte consists of
86	* High nibble: Recovery Cycle Time (rt)
87	* The valid values range from 2 to 15. The default is 15.
88	*
89	* Low nibble: Active Cycle Time (at)
90	* The valid values range from 2 to 15. The default is 15.
91	*
92	* You can obtain optimized timing values by running Holtek IDESETUP.COM
93	* for DOS. DOS drivers get their timing values from command line, where
94	* the first value is the Recovery Time and the second value is the
95	* Active Time for each drive. Smaller value gives higher speed.
96	* In case of failures you should probably fall back to a higher value.
97	*/
98	static inline u8 HT_TIMING(ide_drive_t *drive)
99	{
100	return (unsigned long)ide_get_drivedata(drive) & 0x00ff;
101	}
102
103	#define HT_TIMING_DEFAULT 0xff
104
105	/*
106	* This routine handles interface switching for the peculiar hardware design
107	* on the F.G.I./Holtek HT-6560B VLB IDE interface.
108	* The HT-6560B can only enable one IDE port at a time, and requires a
109	* silly sequence (below) whenever we switch between primary and secondary.
110	*/
111
112	/*
113	* This routine is invoked from ide.c to prepare for access to a given drive.
114	*/
115	static void ht6560b_dev_select(ide_drive_t *drive)
116	{
117	ide_hwif_t *hwif = drive->hwif;
118	unsigned long flags;
119	static u8 current_select = 0;
120	static u8 current_timing = 0;
121	u8 select, timing;
122
123	local_irq_save(flags);
124
125	select = HT_CONFIG(drive);
126	timing = HT_TIMING(drive);
127
128	/*
129	* Need to enforce prefetch sometimes because otherwise
130	* it'll hang (hard).
131	*/
132	if (drive->media != ide_disk \|\|
133	(drive->dev_flags & IDE_DFLAG_PRESENT) == 0)
134	select \|= HT_PREFETCH_MODE;
135
136	if (select != current_select \|\| timing != current_timing) {
137	current_select = select;
138	current_timing = timing;
139	(void)inb(HT_CONFIG_PORT);
140	(void)inb(HT_CONFIG_PORT);
141	(void)inb(HT_CONFIG_PORT);
142	(void)inb(HT_CONFIG_PORT);
143	outb(select, HT_CONFIG_PORT);
144	/*
145	* Set timing for this drive:
146	*/
147	outb(timing, hwif->io_ports.device_addr);
148	(void)inb(hwif->io_ports.status_addr);
149	#ifdef DEBUG
150	printk("ht6560b: %s: select=%#x timing=%#x\n",
151	drive->name, select, timing);
152	#endif
153	}
154	local_irq_restore(flags);
155
156	outb(drive->select \| ATA_DEVICE_OBS, hwif->io_ports.device_addr);
157	}
158
159	/*
160	* Autodetection and initialization of ht6560b
161	*/
162	static int __init try_to_init_ht6560b(void)
163	{
164	u8 orig_value;
165	int i;
166
167	/* Autodetect ht6560b */
168	if ((orig_value = inb(HT_CONFIG_PORT)) == 0xff)
169	return 0;
170
171	for (i=3;i>0;i--) {
172	outb(0x00, HT_CONFIG_PORT);
173	if (!( (~inb(HT_CONFIG_PORT)) & 0x3f )) {
174	outb(orig_value, HT_CONFIG_PORT);
175	return 0;
176	}
177	}
178	outb(0x00, HT_CONFIG_PORT);
179	if ((~inb(HT_CONFIG_PORT))& 0x3f) {
180	outb(orig_value, HT_CONFIG_PORT);
181	return 0;
182	}
183	/*
184	* Ht6560b autodetected
185	*/
186	outb(HT_CONFIG_DEFAULT, HT_CONFIG_PORT);
187	outb(HT_TIMING_DEFAULT, 0x1f6); /* Select register */
188	(void)inb(0x1f7); /* Status register */
189
190	printk("ht6560b " HT6560B_VERSION
191	": chipset detected and initialized"
192	#ifdef DEBUG
193	" with debug enabled"
194	#endif
195	"\n"
196	);
197	return 1;
198	}
199
200	static u8 ht_pio2timings(ide_drive_t *drive, const u8 pio)
201	{
202	int active_time, recovery_time;
203	int active_cycles, recovery_cycles;
204	int bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
205
206	if (pio) {
207	unsigned int cycle_time;
208	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
209
210	cycle_time = ide_pio_cycle_time(drive, pio);
211
212	/*
213	* Just like opti621.c we try to calculate the
214	* actual cycle time for recovery and activity
215	* according system bus speed.
216	*/
217	active_time = t->active;
218	recovery_time = cycle_time - active_time - t->setup;
219	/*
220	* Cycle times should be Vesa bus cycles
221	*/
222	active_cycles = (active_time * bus_speed + 999) / 1000;
223	recovery_cycles = (recovery_time * bus_speed + 999) / 1000;
224	/*
225	* Upper and lower limits
226	*/
227	if (active_cycles < 2) active_cycles = 2;
228	if (recovery_cycles < 2) recovery_cycles = 2;
229	if (active_cycles > 15) active_cycles = 15;
230	if (recovery_cycles > 15) recovery_cycles = 0; /* 0==16 */
231
232	#ifdef DEBUG
233	printk("ht6560b: drive %s setting pio=%d recovery=%d (%dns) active=%d (%dns)\n", drive->name, pio, recovery_cycles, recovery_time, active_cycles, active_time);
234	#endif
235
236	return (u8)((recovery_cycles << 4) \| active_cycles);
237	} else {
238
239	#ifdef DEBUG
240	printk("ht6560b: drive %s setting pio=0\n", drive->name);
241	#endif
242
243	return HT_TIMING_DEFAULT; /* default setting */
244	}
245	}
246
247	static DEFINE_SPINLOCK(ht6560b_lock);
248
249	/*
250	* Enable/Disable so called prefetch mode
251	*/
252	static void ht_set_prefetch(ide_drive_t *drive, u8 state)
253	{
254	unsigned long flags, config;
255	int t = HT_PREFETCH_MODE << 8;
256
257	spin_lock_irqsave(&ht6560b_lock, flags);
258
259	config = (unsigned long)ide_get_drivedata(drive);
260
261	/*
262	* Prefetch mode and unmask irq seems to conflict
263	*/
264	if (state) {
265	config \|= t; /* enable prefetch mode */
266	drive->dev_flags \|= IDE_DFLAG_NO_UNMASK;
267	drive->dev_flags &= ~IDE_DFLAG_UNMASK;
268	} else {
269	config &= ~t; /* disable prefetch mode */
270	drive->dev_flags &= ~IDE_DFLAG_NO_UNMASK;
271	}
272
273	ide_set_drivedata(drive, (void *)config);
274
275	spin_unlock_irqrestore(&ht6560b_lock, flags);
276
277	#ifdef DEBUG
278	printk("ht6560b: drive %s prefetch mode %sabled\n", drive->name, (state ? "en" : "dis"));
279	#endif
280	}
281
282	static void ht6560b_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
283	{
284	unsigned long flags, config;
285	const u8 pio = drive->pio_mode - XFER_PIO_0;
286	u8 timing;
287
288	switch (pio) {
289	case 8: /* set prefetch off */
290	case 9: /* set prefetch on */
291	ht_set_prefetch(drive, pio & 1);
292	return;
293	}
294
295	timing = ht_pio2timings(drive, pio);
296
297	spin_lock_irqsave(&ht6560b_lock, flags);
298	config = (unsigned long)ide_get_drivedata(drive);
299	config &= 0xff00;
300	config \|= timing;
301	ide_set_drivedata(drive, (void *)config);
302	spin_unlock_irqrestore(&ht6560b_lock, flags);
303
304	#ifdef DEBUG
305	printk("ht6560b: drive %s tuned to pio mode %#x timing=%#x\n", drive->name, pio, timing);
306	#endif
307	}
308
309	static void __init ht6560b_init_dev(ide_drive_t *drive)
310	{
311	ide_hwif_t *hwif = drive->hwif;
312	/* Setting default configurations for drives. */
313	unsigned long t = (HT_CONFIG_DEFAULT << 8) \| HT_TIMING_DEFAULT;
314
315	if (hwif->channel)
316	t \|= (HT_SECONDARY_IF << 8);
317
318	ide_set_drivedata(drive, (void *)t);
319	}
320
321	static bool probe_ht6560b;
322
323	module_param_named(probe, probe_ht6560b, bool, 0);
324	MODULE_PARM_DESC(probe, "probe for HT6560B chipset");
325
326	static const struct ide_tp_ops ht6560b_tp_ops = {
327	.exec_command = ide_exec_command,
328	.read_status = ide_read_status,
329	.read_altstatus = ide_read_altstatus,
330	.write_devctl = ide_write_devctl,
331
332	.dev_select = ht6560b_dev_select,
333	.tf_load = ide_tf_load,
334	.tf_read = ide_tf_read,
335
336	.input_data = ide_input_data,
337	.output_data = ide_output_data,
338	};
339
340	static const struct ide_port_ops ht6560b_port_ops = {
341	.init_dev = ht6560b_init_dev,
342	.set_pio_mode = ht6560b_set_pio_mode,
343	};
344
345	static const struct ide_port_info ht6560b_port_info __initconst = {
346	.name = DRV_NAME,
347	.chipset = ide_ht6560b,
348	.tp_ops = &ht6560b_tp_ops,
349	.port_ops = &ht6560b_port_ops,
350	.host_flags = IDE_HFLAG_SERIALIZE \| /* is this needed? */
351	IDE_HFLAG_NO_DMA \|
352	IDE_HFLAG_ABUSE_PREFETCH,
353	.pio_mask = ATA_PIO4,
354	};
355
356	static int __init ht6560b_init(void)
357	{
358	if (probe_ht6560b == 0)
359	return -ENODEV;
360
361	if (!request_region(HT_CONFIG_PORT, 1, DRV_NAME)) {
362	printk(KERN_NOTICE "%s: HT_CONFIG_PORT not found\n",
363	__func__);
364	return -ENODEV;
365	}
366
367	if (!try_to_init_ht6560b()) {
368	printk(KERN_NOTICE "%s: HBA not found\n", __func__);
369	goto release_region;
370	}
371
372	return ide_legacy_device_add(&ht6560b_port_info, 0);
373
374	release_region:
375	release_region(HT_CONFIG_PORT, 1);
376	return -ENODEV;
377	}
378
379	module_init(ht6560b_init);
380
381	MODULE_AUTHOR("See Local File");
382	MODULE_DESCRIPTION("HT-6560B EIDE-controller support");
383	MODULE_LICENSE("GPL");

drivers/ide/icside.c+0−692

@@ -1,692 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Copyright (c) 1996-2004 Russell King.
4	*
5	* Please note that this platform does not support 32-bit IDE IO.
6	*/
7
8	#include <linux/string.h>
9	#include <linux/module.h>
10	#include <linux/ioport.h>
11	#include <linux/slab.h>
12	#include <linux/blkdev.h>
13	#include <linux/errno.h>
14	#include <linux/ide.h>
15	#include <linux/dma-mapping.h>
16	#include <linux/device.h>
17	#include <linux/init.h>
18	#include <linux/scatterlist.h>
19	#include <linux/io.h>
20
21	#include <asm/dma.h>
22	#include <asm/ecard.h>
23
24	#define DRV_NAME "icside"
25
26	#define ICS_IDENT_OFFSET 0x2280
27
28	#define ICS_ARCIN_V5_INTRSTAT 0x0000
29	#define ICS_ARCIN_V5_INTROFFSET 0x0004
30	#define ICS_ARCIN_V5_IDEOFFSET 0x2800
31	#define ICS_ARCIN_V5_IDEALTOFFSET 0x2b80
32	#define ICS_ARCIN_V5_IDESTEPPING 6
33
34	#define ICS_ARCIN_V6_IDEOFFSET_1 0x2000
35	#define ICS_ARCIN_V6_INTROFFSET_1 0x2200
36	#define ICS_ARCIN_V6_INTRSTAT_1 0x2290
37	#define ICS_ARCIN_V6_IDEALTOFFSET_1 0x2380
38	#define ICS_ARCIN_V6_IDEOFFSET_2 0x3000
39	#define ICS_ARCIN_V6_INTROFFSET_2 0x3200
40	#define ICS_ARCIN_V6_INTRSTAT_2 0x3290
41	#define ICS_ARCIN_V6_IDEALTOFFSET_2 0x3380
42	#define ICS_ARCIN_V6_IDESTEPPING 6
43
44	struct cardinfo {
45	unsigned int dataoffset;
46	unsigned int ctrloffset;
47	unsigned int stepping;
48	};
49
50	static struct cardinfo icside_cardinfo_v5 = {
51	.dataoffset = ICS_ARCIN_V5_IDEOFFSET,
52	.ctrloffset = ICS_ARCIN_V5_IDEALTOFFSET,
53	.stepping = ICS_ARCIN_V5_IDESTEPPING,
54	};
55
56	static struct cardinfo icside_cardinfo_v6_1 = {
57	.dataoffset = ICS_ARCIN_V6_IDEOFFSET_1,
58	.ctrloffset = ICS_ARCIN_V6_IDEALTOFFSET_1,
59	.stepping = ICS_ARCIN_V6_IDESTEPPING,
60	};
61
62	static struct cardinfo icside_cardinfo_v6_2 = {
63	.dataoffset = ICS_ARCIN_V6_IDEOFFSET_2,
64	.ctrloffset = ICS_ARCIN_V6_IDEALTOFFSET_2,
65	.stepping = ICS_ARCIN_V6_IDESTEPPING,
66	};
67
68	struct icside_state {
69	unsigned int channel;
70	unsigned int enabled;
71	void __iomem *irq_port;
72	void __iomem *ioc_base;
73	unsigned int sel;
74	unsigned int type;
75	struct ide_host *host;
76	};
77
78	#define ICS_TYPE_A3IN 0
79	#define ICS_TYPE_A3USER 1
80	#define ICS_TYPE_V6 3
81	#define ICS_TYPE_V5 15
82	#define ICS_TYPE_NOTYPE ((unsigned int)-1)
83
84	/* ---------------- Version 5 PCB Support Functions --------------------- */
85	/* Prototype: icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
86	* Purpose : enable interrupts from card
87	*/
88	static void icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
89	{
90	struct icside_state *state = ec->irq_data;
91
92	writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
93	}
94
95	/* Prototype: icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
96	* Purpose : disable interrupts from card
97	*/
98	static void icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
99	{
100	struct icside_state *state = ec->irq_data;
101
102	readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
103	}
104
105	static const expansioncard_ops_t icside_ops_arcin_v5 = {
106	.irqenable = icside_irqenable_arcin_v5,
107	.irqdisable = icside_irqdisable_arcin_v5,
108	};
109
110
111	/* ---------------- Version 6 PCB Support Functions --------------------- */
112	/* Prototype: icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
113	* Purpose : enable interrupts from card
114	*/
115	static void icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
116	{
117	struct icside_state *state = ec->irq_data;
118	void __iomem *base = state->irq_port;
119
120	state->enabled = 1;
121
122	switch (state->channel) {
123	case 0:
124	writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1);
125	readb(base + ICS_ARCIN_V6_INTROFFSET_2);
126	break;
127	case 1:
128	writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2);
129	readb(base + ICS_ARCIN_V6_INTROFFSET_1);
130	break;
131	}
132	}
133
134	/* Prototype: icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
135	* Purpose : disable interrupts from card
136	*/
137	static void icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
138	{
139	struct icside_state *state = ec->irq_data;
140
141	state->enabled = 0;
142
143	readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
144	readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
145	}
146
147	/* Prototype: icside_irqprobe(struct expansion_card *ec)
148	* Purpose : detect an active interrupt from card
149	*/
150	static int icside_irqpending_arcin_v6(struct expansion_card *ec)
151	{
152	struct icside_state *state = ec->irq_data;
153
154	return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 \|\|
155	readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
156	}
157
158	static const expansioncard_ops_t icside_ops_arcin_v6 = {
159	.irqenable = icside_irqenable_arcin_v6,
160	.irqdisable = icside_irqdisable_arcin_v6,
161	.irqpending = icside_irqpending_arcin_v6,
162	};
163
164	/*
165	* Handle routing of interrupts. This is called before
166	* we write the command to the drive.
167	*/
168	static void icside_maskproc(ide_drive_t *drive, int mask)
169	{
170	ide_hwif_t *hwif = drive->hwif;
171	struct expansion_card *ec = ECARD_DEV(hwif->dev);
172	struct icside_state *state = ecard_get_drvdata(ec);
173	unsigned long flags;
174
175	local_irq_save(flags);
176
177	state->channel = hwif->channel;
178
179	if (state->enabled && !mask) {
180	switch (hwif->channel) {
181	case 0:
182	writeb(0, state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
183	readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
184	break;
185	case 1:
186	writeb(0, state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
187	readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
188	break;
189	}
190	} else {
191	readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
192	readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
193	}
194
195	local_irq_restore(flags);
196	}
197
198	static const struct ide_port_ops icside_v6_no_dma_port_ops = {
199	.maskproc = icside_maskproc,
200	};
201
202	#ifdef CONFIG_BLK_DEV_IDEDMA_ICS
203	/*
204	* SG-DMA support.
205	*
206	* Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
207	* There is only one DMA controller per card, which means that only
208	* one drive can be accessed at one time. NOTE! We do not enforce that
209	* here, but we rely on the main IDE driver spotting that both
210	* interfaces use the same IRQ, which should guarantee this.
211	*/
212
213	/*
214	* Configure the IOMD to give the appropriate timings for the transfer
215	* mode being requested. We take the advice of the ATA standards, and
216	* calculate the cycle time based on the transfer mode, and the EIDE
217	* MW DMA specs that the drive provides in the IDENTIFY command.
218	*
219	* We have the following IOMD DMA modes to choose from:
220	*
221	* Type Active Recovery Cycle
222	* A 250 (250) 312 (550) 562 (800)
223	* B 187 250 437
224	* C 125 (125) 125 (375) 250 (500)
225	* D 62 125 187
226	*
227	* (figures in brackets are actual measured timings)
228	*
229	* However, we also need to take care of the read/write active and
230	* recovery timings:
231	*
232	* Read Write
233	* Mode Active -- Recovery -- Cycle IOMD type
234	* MW0 215 50 215 480 A
235	* MW1 80 50 50 150 C
236	* MW2 70 25 25 120 C
237	*/
238	static void icside_set_dma_mode(ide_hwif_t hwif, ide_drive_t drive)
239	{
240	unsigned long cycle_time = 0;
241	int use_dma_info = 0;
242	const u8 xfer_mode = drive->dma_mode;
243
244	switch (xfer_mode) {
245	case XFER_MW_DMA_2:
246	cycle_time = 250;
247	use_dma_info = 1;
248	break;
249
250	case XFER_MW_DMA_1:
251	cycle_time = 250;
252	use_dma_info = 1;
253	break;
254
255	case XFER_MW_DMA_0:
256	cycle_time = 480;
257	break;
258
259	case XFER_SW_DMA_2:
260	case XFER_SW_DMA_1:
261	case XFER_SW_DMA_0:
262	cycle_time = 480;
263	break;
264	}
265
266	/*
267	* If we're going to be doing MW_DMA_1 or MW_DMA_2, we should
268	* take care to note the values in the ID...
269	*/
270	if (use_dma_info && drive->id[ATA_ID_EIDE_DMA_TIME] > cycle_time)
271	cycle_time = drive->id[ATA_ID_EIDE_DMA_TIME];
272
273	ide_set_drivedata(drive, (void *)cycle_time);
274
275	printk(KERN_INFO "%s: %s selected (peak %luMB/s)\n",
276	drive->name, ide_xfer_verbose(xfer_mode),
277	2000 / (cycle_time ? cycle_time : (unsigned long) -1));
278	}
279
280	static const struct ide_port_ops icside_v6_port_ops = {
281	.set_dma_mode = icside_set_dma_mode,
282	.maskproc = icside_maskproc,
283	};
284
285	static void icside_dma_host_set(ide_drive_t *drive, int on)
286	{
287	}
288
289	static int icside_dma_end(ide_drive_t *drive)
290	{
291	ide_hwif_t *hwif = drive->hwif;
292	struct expansion_card *ec = ECARD_DEV(hwif->dev);
293
294	disable_dma(ec->dma);
295
296	return get_dma_residue(ec->dma) != 0;
297	}
298
299	static void icside_dma_start(ide_drive_t *drive)
300	{
301	ide_hwif_t *hwif = drive->hwif;
302	struct expansion_card *ec = ECARD_DEV(hwif->dev);
303
304	/* We can not enable DMA on both channels simultaneously. */
305	BUG_ON(dma_channel_active(ec->dma));
306	enable_dma(ec->dma);
307	}
308
309	static int icside_dma_setup(ide_drive_t drive, struct ide_cmd cmd)
310	{
311	ide_hwif_t *hwif = drive->hwif;
312	struct expansion_card *ec = ECARD_DEV(hwif->dev);
313	struct icside_state *state = ecard_get_drvdata(ec);
314	unsigned int dma_mode;
315
316	if (cmd->tf_flags & IDE_TFLAG_WRITE)
317	dma_mode = DMA_MODE_WRITE;
318	else
319	dma_mode = DMA_MODE_READ;
320
321	/*
322	* We can not enable DMA on both channels.
323	*/
324	BUG_ON(dma_channel_active(ec->dma));
325
326	/*
327	* Ensure that we have the right interrupt routed.
328	*/
329	icside_maskproc(drive, 0);
330
331	/*
332	* Route the DMA signals to the correct interface.
333	*/
334	writeb(state->sel \| hwif->channel, state->ioc_base);
335
336	/*
337	* Select the correct timing for this drive.
338	*/
339	set_dma_speed(ec->dma, (unsigned long)ide_get_drivedata(drive));
340
341	/*
342	* Tell the DMA engine about the SG table and
343	* data direction.
344	*/
345	set_dma_sg(ec->dma, hwif->sg_table, cmd->sg_nents);
346	set_dma_mode(ec->dma, dma_mode);
347
348	return 0;
349	}
350
351	static int icside_dma_test_irq(ide_drive_t *drive)
352	{
353	ide_hwif_t *hwif = drive->hwif;
354	struct expansion_card *ec = ECARD_DEV(hwif->dev);
355	struct icside_state *state = ecard_get_drvdata(ec);
356
357	return readb(state->irq_port +
358	(hwif->channel ?
359	ICS_ARCIN_V6_INTRSTAT_2 :
360	ICS_ARCIN_V6_INTRSTAT_1)) & 1;
361	}
362
363	static int icside_dma_init(ide_hwif_t hwif, const struct ide_port_info d)
364	{
365	hwif->dmatable_cpu = NULL;
366	hwif->dmatable_dma = 0;
367
368	return 0;
369	}
370
371	static const struct ide_dma_ops icside_v6_dma_ops = {
372	.dma_host_set = icside_dma_host_set,
373	.dma_setup = icside_dma_setup,
374	.dma_start = icside_dma_start,
375	.dma_end = icside_dma_end,
376	.dma_test_irq = icside_dma_test_irq,
377	.dma_lost_irq = ide_dma_lost_irq,
378	};
379	#endif
380
381	static int icside_dma_off_init(ide_hwif_t hwif, const struct ide_port_info d)
382	{
383	return -EOPNOTSUPP;
384	}
385
386	static void icside_setup_ports(struct ide_hw hw, void __iomem base,
387	struct cardinfo info, struct expansion_card ec)
388	{
389	unsigned long port = (unsigned long)base + info->dataoffset;
390
391	hw->io_ports.data_addr = port;
392	hw->io_ports.error_addr = port + (1 << info->stepping);
393	hw->io_ports.nsect_addr = port + (2 << info->stepping);
394	hw->io_ports.lbal_addr = port + (3 << info->stepping);
395	hw->io_ports.lbam_addr = port + (4 << info->stepping);
396	hw->io_ports.lbah_addr = port + (5 << info->stepping);
397	hw->io_ports.device_addr = port + (6 << info->stepping);
398	hw->io_ports.status_addr = port + (7 << info->stepping);
399	hw->io_ports.ctl_addr = (unsigned long)base + info->ctrloffset;
400
401	hw->irq = ec->irq;
402	hw->dev = &ec->dev;
403	}
404
405	static const struct ide_port_info icside_v5_port_info = {
406	.host_flags = IDE_HFLAG_NO_DMA,
407	.chipset = ide_acorn,
408	};
409
410	static int icside_register_v5(struct icside_state *state,
411	struct expansion_card *ec)
412	{
413	void __iomem *base;
414	struct ide_host *host;
415	struct ide_hw hw, *hws[] = { &hw };
416	int ret;
417
418	base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
419	if (!base)
420	return -ENOMEM;
421
422	state->irq_port = base;
423
424	ec->irqaddr = base + ICS_ARCIN_V5_INTRSTAT;
425	ec->irqmask = 1;
426
427	ecard_setirq(ec, &icside_ops_arcin_v5, state);
428
429	/*
430	* Be on the safe side - disable interrupts
431	*/
432	icside_irqdisable_arcin_v5(ec, 0);
433
434	icside_setup_ports(&hw, base, &icside_cardinfo_v5, ec);
435
436	host = ide_host_alloc(&icside_v5_port_info, hws, 1);
437	if (host == NULL)
438	return -ENODEV;
439
440	state->host = host;
441
442	ecard_set_drvdata(ec, state);
443
444	ret = ide_host_register(host, &icside_v5_port_info, hws);
445	if (ret)
446	goto err_free;
447
448	return 0;
449	err_free:
450	ide_host_free(host);
451	ecard_set_drvdata(ec, NULL);
452	return ret;
453	}
454
455	static const struct ide_port_info icside_v6_port_info = {
456	.init_dma = icside_dma_off_init,
457	.port_ops = &icside_v6_no_dma_port_ops,
458	.host_flags = IDE_HFLAG_SERIALIZE \| IDE_HFLAG_MMIO,
459	.mwdma_mask = ATA_MWDMA2,
460	.swdma_mask = ATA_SWDMA2,
461	.chipset = ide_acorn,
462	};
463
464	static int icside_register_v6(struct icside_state *state,
465	struct expansion_card *ec)
466	{
467	void __iomem ioc_base, easi_base;
468	struct ide_host *host;
469	unsigned int sel = 0;
470	int ret;
471	struct ide_hw hw[2], *hws[] = { &hw[0], &hw[1] };
472	struct ide_port_info d = icside_v6_port_info;
473
474	ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
475	if (!ioc_base) {
476	ret = -ENOMEM;
477	goto out;
478	}
479
480	easi_base = ioc_base;
481
482	if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
483	easi_base = ecardm_iomap(ec, ECARD_RES_EASI, 0, 0);
484	if (!easi_base) {
485	ret = -ENOMEM;
486	goto out;
487	}
488
489	/*
490	* Enable access to the EASI region.
491	*/
492	sel = 1 << 5;
493	}
494
495	writeb(sel, ioc_base);
496
497	ecard_setirq(ec, &icside_ops_arcin_v6, state);
498
499	state->irq_port = easi_base;
500	state->ioc_base = ioc_base;
501	state->sel = sel;
502
503	/*
504	* Be on the safe side - disable interrupts
505	*/
506	icside_irqdisable_arcin_v6(ec, 0);
507
508	icside_setup_ports(&hw[0], easi_base, &icside_cardinfo_v6_1, ec);
509	icside_setup_ports(&hw[1], easi_base, &icside_cardinfo_v6_2, ec);
510
511	host = ide_host_alloc(&d, hws, 2);
512	if (host == NULL)
513	return -ENODEV;
514
515	state->host = host;
516
517	ecard_set_drvdata(ec, state);
518
519	#ifdef CONFIG_BLK_DEV_IDEDMA_ICS
520	if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
521	d.init_dma = icside_dma_init;
522	d.port_ops = &icside_v6_port_ops;
523	d.dma_ops = &icside_v6_dma_ops;
524	}
525	#endif
526
527	ret = ide_host_register(host, &d, hws);
528	if (ret)
529	goto err_free;
530
531	return 0;
532	err_free:
533	ide_host_free(host);
534	if (d.dma_ops)
535	free_dma(ec->dma);
536	ecard_set_drvdata(ec, NULL);
537	out:
538	return ret;
539	}
540
541	static int icside_probe(struct expansion_card ec, const struct ecard_id id)
542	{
543	struct icside_state *state;
544	void __iomem *idmem;
545	int ret;
546
547	ret = ecard_request_resources(ec);
548	if (ret)
549	goto out;
550
551	state = kzalloc(sizeof(struct icside_state), GFP_KERNEL);
552	if (!state) {
553	ret = -ENOMEM;
554	goto release;
555	}
556
557	state->type = ICS_TYPE_NOTYPE;
558
559	idmem = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
560	if (idmem) {
561	unsigned int type;
562
563	type = readb(idmem + ICS_IDENT_OFFSET) & 1;
564	type \|= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
565	type \|= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
566	type \|= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
567	ecardm_iounmap(ec, idmem);
568
569	state->type = type;
570	}
571
572	switch (state->type) {
573	case ICS_TYPE_A3IN:
574	dev_warn(&ec->dev, "A3IN unsupported\n");
575	ret = -ENODEV;
576	break;
577
578	case ICS_TYPE_A3USER:
579	dev_warn(&ec->dev, "A3USER unsupported\n");
580	ret = -ENODEV;
581	break;
582
583	case ICS_TYPE_V5:
584	ret = icside_register_v5(state, ec);
585	break;
586
587	case ICS_TYPE_V6:
588	ret = icside_register_v6(state, ec);
589	break;
590
591	default:
592	dev_warn(&ec->dev, "unknown interface type\n");
593	ret = -ENODEV;
594	break;
595	}
596
597	if (ret == 0)
598	goto out;
599
600	kfree(state);
601	release:
602	ecard_release_resources(ec);
603	out:
604	return ret;
605	}
606
607	static void icside_remove(struct expansion_card *ec)
608	{
609	struct icside_state *state = ecard_get_drvdata(ec);
610
611	switch (state->type) {
612	case ICS_TYPE_V5:
613	/* FIXME: tell IDE to stop using the interface */
614
615	/* Disable interrupts */
616	icside_irqdisable_arcin_v5(ec, 0);
617	break;
618
619	case ICS_TYPE_V6:
620	/* FIXME: tell IDE to stop using the interface */
621	if (ec->dma != NO_DMA)
622	free_dma(ec->dma);
623
624	/* Disable interrupts */
625	icside_irqdisable_arcin_v6(ec, 0);
626
627	/* Reset the ROM pointer/EASI selection */
628	writeb(0, state->ioc_base);
629	break;
630	}
631
632	ecard_set_drvdata(ec, NULL);
633
634	kfree(state);
635	ecard_release_resources(ec);
636	}
637
638	static void icside_shutdown(struct expansion_card *ec)
639	{
640	struct icside_state *state = ecard_get_drvdata(ec);
641	unsigned long flags;
642
643	/*
644	* Disable interrupts from this card. We need to do
645	* this before disabling EASI since we may be accessing
646	* this register via that region.
647	*/
648	local_irq_save(flags);
649	ec->ops->irqdisable(ec, 0);
650	local_irq_restore(flags);
651
652	/*
653	* Reset the ROM pointer so that we can read the ROM
654	* after a soft reboot. This also disables access to
655	* the IDE taskfile via the EASI region.
656	*/
657	if (state->ioc_base)
658	writeb(0, state->ioc_base);
659	}
660
661	static const struct ecard_id icside_ids[] = {
662	{ MANU_ICS, PROD_ICS_IDE },
663	{ MANU_ICS2, PROD_ICS2_IDE },
664	{ 0xffff, 0xffff }
665	};
666
667	static struct ecard_driver icside_driver = {
668	.probe = icside_probe,
669	.remove = icside_remove,
670	.shutdown = icside_shutdown,
671	.id_table = icside_ids,
672	.drv = {
673	.name = "icside",
674	},
675	};
676
677	static int __init icside_init(void)
678	{
679	return ecard_register_driver(&icside_driver);
680	}
681
682	static void __exit icside_exit(void)
683	{
684	ecard_remove_driver(&icside_driver);
685	}
686
687	MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
688	MODULE_LICENSE("GPL");
689	MODULE_DESCRIPTION("ICS IDE driver");
690
691	module_init(icside_init);
692	module_exit(icside_exit);

drivers/ide/ide-4drives.c+0−65

@@ -1,65 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2
3	#include <linux/kernel.h>
4	#include <linux/init.h>
5	#include <linux/module.h>
6	#include <linux/ide.h>
7
8	#define DRV_NAME "ide-4drives"
9
10	static bool probe_4drives;
11
12	module_param_named(probe, probe_4drives, bool, 0);
13	MODULE_PARM_DESC(probe, "probe for generic IDE chipset with 4 drives/port");
14
15	static void ide_4drives_init_dev(ide_drive_t *drive)
16	{
17	if (drive->hwif->channel)
18	drive->select ^= 0x20;
19	}
20
21	static const struct ide_port_ops ide_4drives_port_ops = {
22	.init_dev = ide_4drives_init_dev,
23	};
24
25	static const struct ide_port_info ide_4drives_port_info = {
26	.port_ops = &ide_4drives_port_ops,
27	.host_flags = IDE_HFLAG_SERIALIZE \| IDE_HFLAG_NO_DMA \|
28	IDE_HFLAG_4DRIVES,
29	.chipset = ide_4drives,
30	};
31
32	static int __init ide_4drives_init(void)
33	{
34	unsigned long base = 0x1f0, ctl = 0x3f6;
35	struct ide_hw hw, *hws[] = { &hw, &hw };
36
37	if (probe_4drives == 0)
38	return -ENODEV;
39
40	if (!request_region(base, 8, DRV_NAME)) {
41	printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
42	DRV_NAME, base, base + 7);
43	return -EBUSY;
44	}
45
46	if (!request_region(ctl, 1, DRV_NAME)) {
47	printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
48	DRV_NAME, ctl);
49	release_region(base, 8);
50	return -EBUSY;
51	}
52
53	memset(&hw, 0, sizeof(hw));
54
55	ide_std_init_ports(&hw, base, ctl);
56	hw.irq = 14;
57
58	return ide_host_add(&ide_4drives_port_info, hws, 2, NULL);
59	}
60
61	module_init(ide_4drives_init);
62
63	MODULE_AUTHOR("Bartlomiej Zolnierkiewicz");
64	MODULE_DESCRIPTION("generic IDE chipset with 4 drives/port support");
65	MODULE_LICENSE("GPL");

drivers/ide/ide-acpi.c+0−622

@@ -1,622 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* Provides ACPI support for IDE drives.
4	*
5	* Copyright (C) 2005 Intel Corp.
6	* Copyright (C) 2005 Randy Dunlap
7	* Copyright (C) 2006 SUSE Linux Products GmbH
8	* Copyright (C) 2006 Hannes Reinecke
9	*/
10
11	#include <linux/acpi.h>
12	#include <linux/ata.h>
13	#include <linux/delay.h>
14	#include <linux/device.h>
15	#include <linux/errno.h>
16	#include <linux/kernel.h>
17	#include <linux/slab.h>
18	#include <linux/ide.h>
19	#include <linux/pci.h>
20	#include <linux/dmi.h>
21	#include <linux/module.h>
22
23	#define REGS_PER_GTF 7
24
25	struct GTM_buffer {
26	u32 PIO_speed0;
27	u32 DMA_speed0;
28	u32 PIO_speed1;
29	u32 DMA_speed1;
30	u32 GTM_flags;
31	};
32
33	struct ide_acpi_drive_link {
34	acpi_handle obj_handle;
35	u8 idbuff[512];
36	};
37
38	struct ide_acpi_hwif_link {
39	ide_hwif_t *hwif;
40	acpi_handle obj_handle;
41	struct GTM_buffer gtm;
42	struct ide_acpi_drive_link master;
43	struct ide_acpi_drive_link slave;
44	};
45
46	#undef DEBUGGING
47	/* note: adds function name and KERN_DEBUG */
48	#ifdef DEBUGGING
49	#define DEBPRINT(fmt, args...) \
50	printk(KERN_DEBUG "%s: " fmt, __func__, ## args)
51	#else
52	#define DEBPRINT(fmt, args...) do {} while (0)
53	#endif /* DEBUGGING */
54
55	static bool ide_noacpi;
56	module_param_named(noacpi, ide_noacpi, bool, 0);
57	MODULE_PARM_DESC(noacpi, "disable IDE ACPI support");
58
59	static bool ide_acpigtf;
60	module_param_named(acpigtf, ide_acpigtf, bool, 0);
61	MODULE_PARM_DESC(acpigtf, "enable IDE ACPI _GTF support");
62
63	static bool ide_acpionboot;
64	module_param_named(acpionboot, ide_acpionboot, bool, 0);
65	MODULE_PARM_DESC(acpionboot, "call IDE ACPI methods on boot");
66
67	static bool ide_noacpi_psx;
68	static int no_acpi_psx(const struct dmi_system_id *id)
69	{
70	ide_noacpi_psx = true;
71	printk(KERN_NOTICE"%s detected - disable ACPI _PSx.\n", id->ident);
72	return 0;
73	}
74
75	static const struct dmi_system_id ide_acpi_dmi_table[] = {
76	/* Bug 9673. */
77	/* We should check if this is because ACPI NVS isn't save/restored. */
78	{
79	.callback = no_acpi_psx,
80	.ident = "HP nx9005",
81	.matches = {
82	DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies Ltd."),
83	DMI_MATCH(DMI_BIOS_VERSION, "KAM1.60")
84	},
85	},
86
87	{ } /* terminate list */
88	};
89
90	int ide_acpi_init(void)
91	{
92	dmi_check_system(ide_acpi_dmi_table);
93	return 0;
94	}
95
96	bool ide_port_acpi(ide_hwif_t *hwif)
97	{
98	return ide_noacpi == 0 && hwif->acpidata;
99	}
100
101	static acpi_handle acpi_get_child(acpi_handle handle, u64 addr)
102	{
103	struct acpi_device *adev;
104
105	if (!handle \|\| acpi_bus_get_device(handle, &adev))
106	return NULL;
107
108	adev = acpi_find_child_device(adev, addr, false);
109	return adev ? adev->handle : NULL;
110	}
111
112	/**
113	* ide_get_dev_handle - finds acpi_handle and PCI device.function
114	* @dev: device to locate
115	* @handle: returned acpi_handle for @dev
116	* @pcidevfn: return PCI device.func for @dev
117	*
118	* Returns the ACPI object handle to the corresponding PCI device.
119	*
120	* Returns 0 on success, <0 on error.
121	*/
122	static int ide_get_dev_handle(struct device dev, acpi_handle handle,
123	u64 *pcidevfn)
124	{
125	struct pci_dev *pdev = to_pci_dev(dev);
126	unsigned int bus, devnum, func;
127	u64 addr;
128	acpi_handle dev_handle;
129	acpi_status status;
130	struct acpi_device_info *dinfo = NULL;
131	int ret = -ENODEV;
132
133	bus = pdev->bus->number;
134	devnum = PCI_SLOT(pdev->devfn);
135	func = PCI_FUNC(pdev->devfn);
136	/* ACPI _ADR encoding for PCI bus: */
137	addr = (u64)(devnum << 16 \| func);
138
139	DEBPRINT("ENTER: pci %02x:%02x.%01x\n", bus, devnum, func);
140
141	dev_handle = ACPI_HANDLE(dev);
142	if (!dev_handle) {
143	DEBPRINT("no acpi handle for device\n");
144	goto err;
145	}
146
147	status = acpi_get_object_info(dev_handle, &dinfo);
148	if (ACPI_FAILURE(status)) {
149	DEBPRINT("get_object_info for device failed\n");
150	goto err;
151	}
152	if (dinfo && (dinfo->valid & ACPI_VALID_ADR) &&
153	dinfo->address == addr) {
154	*pcidevfn = addr;
155	*handle = dev_handle;
156	} else {
157	DEBPRINT("get_object_info for device has wrong "
158	" address: %llu, should be %u\n",
159	dinfo ? (unsigned long long)dinfo->address : -1ULL,
160	(unsigned int)addr);
161	goto err;
162	}
163
164	DEBPRINT("for dev=0x%x.%x, addr=0x%llx, *handle=0x%p\n",
165	devnum, func, (unsigned long long)addr, *handle);
166	ret = 0;
167	err:
168	kfree(dinfo);
169	return ret;
170	}
171
172	/**
173	* ide_acpi_hwif_get_handle - Get ACPI object handle for a given hwif
174	* @hwif: device to locate
175	*
176	* Retrieves the object handle for a given hwif.
177	*
178	* Returns handle on success, 0 on error.
179	*/
180	static acpi_handle ide_acpi_hwif_get_handle(ide_hwif_t *hwif)
181	{
182	struct device *dev = hwif->gendev.parent;
183	acpi_handle dev_handle;
184	u64 pcidevfn;
185	acpi_handle chan_handle;
186	int err;
187
188	DEBPRINT("ENTER: device %s\n", hwif->name);
189
190	if (!dev) {
191	DEBPRINT("no PCI device for %s\n", hwif->name);
192	return NULL;
193	}
194
195	err = ide_get_dev_handle(dev, &dev_handle, &pcidevfn);
196	if (err < 0) {
197	DEBPRINT("ide_get_dev_handle failed (%d)\n", err);
198	return NULL;
199	}
200
201	/* get child objects of dev_handle == channel objects,
202	* + _their_ children == drive objects */
203	/* channel is hwif->channel */
204	chan_handle = acpi_get_child(dev_handle, hwif->channel);
205	DEBPRINT("chan adr=%d: handle=0x%p\n",
206	hwif->channel, chan_handle);
207
208	return chan_handle;
209	}
210
211	/**
212	* do_drive_get_GTF - get the drive bootup default taskfile settings
213	* @drive: the drive for which the taskfile settings should be retrieved
214	* @gtf_length: number of bytes of _GTF data returned at @gtf_address
215	* @gtf_address: buffer containing _GTF taskfile arrays
216	*
217	* The _GTF method has no input parameters.
218	* It returns a variable number of register set values (registers
219	* hex 1F1..1F7, taskfiles).
220	* The <variable number> is not known in advance, so have ACPI-CA
221	* allocate the buffer as needed and return it, then free it later.
222	*
223	* The returned @gtf_length and @gtf_address are only valid if the
224	* function return value is 0.
225	*/
226	static int do_drive_get_GTF(ide_drive_t *drive,
227	unsigned int gtf_length, unsigned long gtf_address,
228	unsigned long *obj_loc)
229	{
230	acpi_status status;
231	struct acpi_buffer output;
232	union acpi_object *out_obj;
233	int err = -ENODEV;
234
235	*gtf_length = 0;
236	*gtf_address = 0UL;
237	*obj_loc = 0UL;
238
239	if (!drive->acpidata->obj_handle) {
240	DEBPRINT("No ACPI object found for %s\n", drive->name);
241	goto out;
242	}
243
244	/* Setting up output buffer */
245	output.length = ACPI_ALLOCATE_BUFFER;
246	output.pointer = NULL; /* ACPI-CA sets this; save/free it later */
247
248	/* _GTF has no input parameters */
249	err = -EIO;
250	status = acpi_evaluate_object(drive->acpidata->obj_handle, "_GTF",
251	NULL, &output);
252	if (ACPI_FAILURE(status)) {
253	printk(KERN_DEBUG
254	"%s: Run _GTF error: status = 0x%x\n",
255	__func__, status);
256	goto out;
257	}
258
259	if (!output.length \|\| !output.pointer) {
260	DEBPRINT("Run _GTF: "
261	"length or ptr is NULL (0x%llx, 0x%p)\n",
262	(unsigned long long)output.length,
263	output.pointer);
264	goto out;
265	}
266
267	out_obj = output.pointer;
268	if (out_obj->type != ACPI_TYPE_BUFFER) {
269	DEBPRINT("Run _GTF: error: "
270	"expected object type of ACPI_TYPE_BUFFER, "
271	"got 0x%x\n", out_obj->type);
272	err = -ENOENT;
273	kfree(output.pointer);
274	goto out;
275	}
276
277	if (!out_obj->buffer.length \|\| !out_obj->buffer.pointer \|\|
278	out_obj->buffer.length % REGS_PER_GTF) {
279	printk(KERN_ERR
280	"%s: unexpected GTF length (%d) or addr (0x%p)\n",
281	__func__, out_obj->buffer.length,
282	out_obj->buffer.pointer);
283	err = -ENOENT;
284	kfree(output.pointer);
285	goto out;
286	}
287
288	*gtf_length = out_obj->buffer.length;
289	*gtf_address = (unsigned long)out_obj->buffer.pointer;
290	*obj_loc = (unsigned long)out_obj;
291	DEBPRINT("returning gtf_length=%d, gtf_address=0x%lx, obj_loc=0x%lx\n",
292	gtf_length, gtf_address, *obj_loc);
293	err = 0;
294	out:
295	return err;
296	}
297
298	/**
299	* do_drive_set_taskfiles - write the drive taskfile settings from _GTF
300	* @drive: the drive to which the taskfile command should be sent
301	* @gtf_length: total number of bytes of _GTF taskfiles
302	* @gtf_address: location of _GTF taskfile arrays
303	*
304	* Write {gtf_address, length gtf_length} in groups of
305	* REGS_PER_GTF bytes.
306	*/
307	static int do_drive_set_taskfiles(ide_drive_t *drive,
308	unsigned int gtf_length,
309	unsigned long gtf_address)
310	{
311	int rc = 0, err;
312	int gtf_count = gtf_length / REGS_PER_GTF;
313	int ix;
314
315	DEBPRINT("total GTF bytes=%u (0x%x), gtf_count=%d, addr=0x%lx\n",
316	gtf_length, gtf_length, gtf_count, gtf_address);
317
318	/* send all taskfile registers (0x1f1-0x1f7) inthatorder */
319	for (ix = 0; ix < gtf_count; ix++) {
320	u8 gtf = (u8 )(gtf_address + ix * REGS_PER_GTF);
321	struct ide_cmd cmd;
322
323	DEBPRINT("(0x1f1-1f7): "
324	"hex: %02x %02x %02x %02x %02x %02x %02x\n",
325	gtf[0], gtf[1], gtf[2],
326	gtf[3], gtf[4], gtf[5], gtf[6]);
327
328	if (!ide_acpigtf) {
329	DEBPRINT("_GTF execution disabled\n");
330	continue;
331	}
332
333	/* convert GTF to taskfile */
334	memset(&cmd, 0, sizeof(cmd));
335	memcpy(&cmd.tf.feature, gtf, REGS_PER_GTF);
336	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
337	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
338
339	err = ide_no_data_taskfile(drive, &cmd);
340	if (err) {
341	printk(KERN_ERR "%s: ide_no_data_taskfile failed: %u\n",
342	__func__, err);
343	rc = err;
344	}
345	}
346
347	return rc;
348	}
349
350	/**
351	* ide_acpi_exec_tfs - get then write drive taskfile settings
352	* @drive: the drive for which the taskfile settings should be
353	* written.
354	*
355	* According to the ACPI spec this should be called after _STM
356	* has been evaluated for the interface. Some ACPI vendors interpret
357	* that as a hard requirement and modify the taskfile according
358	* to the Identify Drive information passed down with _STM.
359	* So one should really make sure to call this only after _STM has
360	* been executed.
361	*/
362	int ide_acpi_exec_tfs(ide_drive_t *drive)
363	{
364	int ret;
365	unsigned int gtf_length;
366	unsigned long gtf_address;
367	unsigned long obj_loc;
368
369	DEBPRINT("call get_GTF, drive=%s port=%d\n", drive->name, drive->dn);
370
371	ret = do_drive_get_GTF(drive, &gtf_length, &gtf_address, &obj_loc);
372	if (ret < 0) {
373	DEBPRINT("get_GTF error (%d)\n", ret);
374	return ret;
375	}
376
377	DEBPRINT("call set_taskfiles, drive=%s\n", drive->name);
378
379	ret = do_drive_set_taskfiles(drive, gtf_length, gtf_address);
380	kfree((void *)obj_loc);
381	if (ret < 0) {
382	DEBPRINT("set_taskfiles error (%d)\n", ret);
383	}
384
385	DEBPRINT("ret=%d\n", ret);
386
387	return ret;
388	}
389
390	/**
391	* ide_acpi_get_timing - get the channel (controller) timings
392	* @hwif: target IDE interface (channel)
393	*
394	* This function executes the _GTM ACPI method for the target channel.
395	*
396	*/
397	void ide_acpi_get_timing(ide_hwif_t *hwif)
398	{
399	acpi_status status;
400	struct acpi_buffer output;
401	union acpi_object *out_obj;
402
403	/* Setting up output buffer for _GTM */
404	output.length = ACPI_ALLOCATE_BUFFER;
405	output.pointer = NULL; /* ACPI-CA sets this; save/free it later */
406
407	/* _GTM has no input parameters */
408	status = acpi_evaluate_object(hwif->acpidata->obj_handle, "_GTM",
409	NULL, &output);
410
411	DEBPRINT("_GTM status: %d, outptr: 0x%p, outlen: 0x%llx\n",
412	status, output.pointer,
413	(unsigned long long)output.length);
414
415	if (ACPI_FAILURE(status)) {
416	DEBPRINT("Run _GTM error: status = 0x%x\n", status);
417	return;
418	}
419
420	if (!output.length \|\| !output.pointer) {
421	DEBPRINT("Run _GTM: length or ptr is NULL (0x%llx, 0x%p)\n",
422	(unsigned long long)output.length,
423	output.pointer);
424	kfree(output.pointer);
425	return;
426	}
427
428	out_obj = output.pointer;
429	if (out_obj->type != ACPI_TYPE_BUFFER) {
430	DEBPRINT("Run _GTM: error: "
431	"expected object type of ACPI_TYPE_BUFFER, "
432	"got 0x%x\n", out_obj->type);
433	kfree(output.pointer);
434	return;
435	}
436
437	if (!out_obj->buffer.length \|\| !out_obj->buffer.pointer \|\|
438	out_obj->buffer.length != sizeof(struct GTM_buffer)) {
439	printk(KERN_ERR
440	"%s: unexpected _GTM length (0x%x)[should be 0x%zx] or "
441	"addr (0x%p)\n",
442	__func__, out_obj->buffer.length,
443	sizeof(struct GTM_buffer), out_obj->buffer.pointer);
444	kfree(output.pointer);
445	return;
446	}
447
448	memcpy(&hwif->acpidata->gtm, out_obj->buffer.pointer,
449	sizeof(struct GTM_buffer));
450
451	DEBPRINT("_GTM info: ptr: 0x%p, len: 0x%x, exp.len: 0x%zx\n",
452	out_obj->buffer.pointer, out_obj->buffer.length,
453	sizeof(struct GTM_buffer));
454
455	DEBPRINT("_GTM fields: 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
456	hwif->acpidata->gtm.PIO_speed0,
457	hwif->acpidata->gtm.DMA_speed0,
458	hwif->acpidata->gtm.PIO_speed1,
459	hwif->acpidata->gtm.DMA_speed1,
460	hwif->acpidata->gtm.GTM_flags);
461
462	kfree(output.pointer);
463	}
464
465	/**
466	* ide_acpi_push_timing - set the channel (controller) timings
467	* @hwif: target IDE interface (channel)
468	*
469	* This function executes the _STM ACPI method for the target channel.
470	*
471	* _STM requires Identify Drive data, which has to passed as an argument.
472	* Unfortunately drive->id is a mangled version which we can't readily
473	* use; hence we'll get the information afresh.
474	*/
475	void ide_acpi_push_timing(ide_hwif_t *hwif)
476	{
477	acpi_status status;
478	struct acpi_object_list input;
479	union acpi_object in_params[3];
480	struct ide_acpi_drive_link *master = &hwif->acpidata->master;
481	struct ide_acpi_drive_link *slave = &hwif->acpidata->slave;
482
483	/* Give the GTM buffer + drive Identify data to the channel via the
484	* _STM method: */
485	/* setup input parameters buffer for _STM */
486	input.count = 3;
487	input.pointer = in_params;
488	in_params[0].type = ACPI_TYPE_BUFFER;
489	in_params[0].buffer.length = sizeof(struct GTM_buffer);
490	in_params[0].buffer.pointer = (u8 *)&hwif->acpidata->gtm;
491	in_params[1].type = ACPI_TYPE_BUFFER;
492	in_params[1].buffer.length = ATA_ID_WORDS * 2;
493	in_params[1].buffer.pointer = (u8 *)&master->idbuff;
494	in_params[2].type = ACPI_TYPE_BUFFER;
495	in_params[2].buffer.length = ATA_ID_WORDS * 2;
496	in_params[2].buffer.pointer = (u8 *)&slave->idbuff;
497	/* Output buffer: _STM has no output */
498
499	status = acpi_evaluate_object(hwif->acpidata->obj_handle, "_STM",
500	&input, NULL);
501
502	if (ACPI_FAILURE(status)) {
503	DEBPRINT("Run _STM error: status = 0x%x\n", status);
504	}
505	DEBPRINT("_STM status: %d\n", status);
506	}
507
508	/**
509	* ide_acpi_set_state - set the channel power state
510	* @hwif: target IDE interface
511	* @on: state, on/off
512	*
513	* This function executes the _PS0/_PS3 ACPI method to set the power state.
514	* ACPI spec requires _PS0 when IDE power on and _PS3 when power off
515	*/
516	void ide_acpi_set_state(ide_hwif_t *hwif, int on)
517	{
518	ide_drive_t *drive;
519	int i;
520
521	if (ide_noacpi_psx)
522	return;
523
524	DEBPRINT("ENTER:\n");
525
526	/* channel first and then drives for power on and verse versa for power off */
527	if (on)
528	acpi_bus_set_power(hwif->acpidata->obj_handle, ACPI_STATE_D0);
529
530	ide_port_for_each_present_dev(i, drive, hwif) {
531	if (drive->acpidata->obj_handle)
532	acpi_bus_set_power(drive->acpidata->obj_handle,
533	on ? ACPI_STATE_D0 : ACPI_STATE_D3_COLD);
534	}
535
536	if (!on)
537	acpi_bus_set_power(hwif->acpidata->obj_handle,
538	ACPI_STATE_D3_COLD);
539	}
540
541	/**
542	* ide_acpi_init_port - initialize the ACPI link for an IDE interface
543	* @hwif: target IDE interface (channel)
544	*
545	* The ACPI spec is not quite clear when the drive identify buffer
546	* should be obtained. Calling IDENTIFY DEVICE during shutdown
547	* is not the best of ideas as the drive might already being put to
548	* sleep. And obviously we can't call it during resume.
549	* So we get the information during startup; but this means that
550	* any changes during run-time will be lost after resume.
551	*/
552	void ide_acpi_init_port(ide_hwif_t *hwif)
553	{
554	hwif->acpidata = kzalloc(sizeof(struct ide_acpi_hwif_link), GFP_KERNEL);
555	if (!hwif->acpidata)
556	return;
557
558	hwif->acpidata->obj_handle = ide_acpi_hwif_get_handle(hwif);
559	if (!hwif->acpidata->obj_handle) {
560	DEBPRINT("no ACPI object for %s found\n", hwif->name);
561	kfree(hwif->acpidata);
562	hwif->acpidata = NULL;
563	}
564	}
565
566	void ide_acpi_port_init_devices(ide_hwif_t *hwif)
567	{
568	ide_drive_t *drive;
569	int i, err;
570
571	if (hwif->acpidata == NULL)
572	return;
573
574	/*
575	* The ACPI spec mandates that we send information
576	* for both drives, regardless whether they are connected
577	* or not.
578	*/
579	hwif->devices[0]->acpidata = &hwif->acpidata->master;
580	hwif->devices[1]->acpidata = &hwif->acpidata->slave;
581
582	/* get _ADR info for each device */
583	ide_port_for_each_present_dev(i, drive, hwif) {
584	acpi_handle dev_handle;
585
586	DEBPRINT("ENTER: %s at channel#: %d port#: %d\n",
587	drive->name, hwif->channel, drive->dn & 1);
588
589	/* TBD: could also check ACPI object VALID bits */
590	dev_handle = acpi_get_child(hwif->acpidata->obj_handle,
591	drive->dn & 1);
592
593	DEBPRINT("drive %s handle 0x%p\n", drive->name, dev_handle);
594
595	drive->acpidata->obj_handle = dev_handle;
596	}
597
598	/* send IDENTIFY for each device */
599	ide_port_for_each_present_dev(i, drive, hwif) {
600	err = taskfile_lib_get_identify(drive, drive->acpidata->idbuff);
601	if (err)
602	DEBPRINT("identify device %s failed (%d)\n",
603	drive->name, err);
604	}
605
606	if (ide_noacpi \|\| ide_acpionboot == 0) {
607	DEBPRINT("ACPI methods disabled on boot\n");
608	return;
609	}
610
611	/* ACPI _PS0 before _STM */
612	ide_acpi_set_state(hwif, 1);
613	/*
614	* ACPI requires us to call _STM on startup
615	*/
616	ide_acpi_get_timing(hwif);
617	ide_acpi_push_timing(hwif);
618
619	ide_port_for_each_present_dev(i, drive, hwif) {
620	ide_acpi_exec_tfs(drive);
621	}
622	}

drivers/ide/ide-atapi.c+0−756

@@ -1,756 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* ATAPI support.
4	*/
5
6	#include <linux/kernel.h>
7	#include <linux/cdrom.h>
8	#include <linux/delay.h>
9	#include <linux/export.h>
10	#include <linux/ide.h>
11	#include <linux/scatterlist.h>
12	#include <linux/gfp.h>
13
14	#include <scsi/scsi.h>
15
16	#define DRV_NAME "ide-atapi"
17	#define PFX DRV_NAME ": "
18
19	#ifdef DEBUG
20	#define debug_log(fmt, args...) \
21	printk(KERN_INFO "ide: " fmt, ## args)
22	#else
23	#define debug_log(fmt, args...) do {} while (0)
24	#endif
25
26	#define ATAPI_MIN_CDB_BYTES 12
27
28	static inline int dev_is_idecd(ide_drive_t *drive)
29	{
30	return drive->media == ide_cdrom \|\| drive->media == ide_optical;
31	}
32
33	/*
34	* Check whether we can support a device,
35	* based on the ATAPI IDENTIFY command results.
36	*/
37	int ide_check_atapi_device(ide_drive_t drive, const char s)
38	{
39	u16 *id = drive->id;
40	u8 gcw[2], protocol, device_type, removable, drq_type, packet_size;
41
42	((u16 )&gcw) = id[ATA_ID_CONFIG];
43
44	protocol = (gcw[1] & 0xC0) >> 6;
45	device_type = gcw[1] & 0x1F;
46	removable = (gcw[0] & 0x80) >> 7;
47	drq_type = (gcw[0] & 0x60) >> 5;
48	packet_size = gcw[0] & 0x03;
49
50	#ifdef CONFIG_PPC
51	/* kludge for Apple PowerBook internal zip */
52	if (drive->media == ide_floppy && device_type == 5 &&
53	!strstr((char *)&id[ATA_ID_PROD], "CD-ROM") &&
54	strstr((char *)&id[ATA_ID_PROD], "ZIP"))
55	device_type = 0;
56	#endif
57
58	if (protocol != 2)
59	printk(KERN_ERR "%s: %s: protocol (0x%02x) is not ATAPI\n",
60	s, drive->name, protocol);
61	else if ((drive->media == ide_floppy && device_type != 0) \|\|
62	(drive->media == ide_tape && device_type != 1))
63	printk(KERN_ERR "%s: %s: invalid device type (0x%02x)\n",
64	s, drive->name, device_type);
65	else if (removable == 0)
66	printk(KERN_ERR "%s: %s: the removable flag is not set\n",
67	s, drive->name);
68	else if (drive->media == ide_floppy && drq_type == 3)
69	printk(KERN_ERR "%s: %s: sorry, DRQ type (0x%02x) not "
70	"supported\n", s, drive->name, drq_type);
71	else if (packet_size != 0)
72	printk(KERN_ERR "%s: %s: packet size (0x%02x) is not 12 "
73	"bytes\n", s, drive->name, packet_size);
74	else
75	return 1;
76	return 0;
77	}
78	EXPORT_SYMBOL_GPL(ide_check_atapi_device);
79
80	void ide_init_pc(struct ide_atapi_pc *pc)
81	{
82	memset(pc, 0, sizeof(*pc));
83	}
84	EXPORT_SYMBOL_GPL(ide_init_pc);
85
86	/*
87	* Add a special packet command request to the tail of the request queue,
88	* and wait for it to be serviced.
89	*/
90	int ide_queue_pc_tail(ide_drive_t drive, struct gendisk disk,
91	struct ide_atapi_pc pc, void buf, unsigned int bufflen)
92	{
93	struct request *rq;
94	int error;
95
96	rq = blk_get_request(drive->queue, REQ_OP_DRV_IN, 0);
97	ide_req(rq)->type = ATA_PRIV_MISC;
98	ide_req(rq)->special = pc;
99
100	if (buf && bufflen) {
101	error = blk_rq_map_kern(drive->queue, rq, buf, bufflen,
102	GFP_NOIO);
103	if (error)
104	goto put_req;
105	}
106
107	memcpy(scsi_req(rq)->cmd, pc->c, 12);
108	if (drive->media == ide_tape)
109	scsi_req(rq)->cmd[13] = REQ_IDETAPE_PC1;
110	blk_execute_rq(disk, rq, 0);
111	error = scsi_req(rq)->result ? -EIO : 0;
112	put_req:
113	blk_put_request(rq);
114	return error;
115	}
116	EXPORT_SYMBOL_GPL(ide_queue_pc_tail);
117
118	int ide_do_test_unit_ready(ide_drive_t drive, struct gendisk disk)
119	{
120	struct ide_atapi_pc pc;
121
122	ide_init_pc(&pc);
123	pc.c[0] = TEST_UNIT_READY;
124
125	return ide_queue_pc_tail(drive, disk, &pc, NULL, 0);
126	}
127	EXPORT_SYMBOL_GPL(ide_do_test_unit_ready);
128
129	int ide_do_start_stop(ide_drive_t drive, struct gendisk disk, int start)
130	{
131	struct ide_atapi_pc pc;
132
133	ide_init_pc(&pc);
134	pc.c[0] = START_STOP;
135	pc.c[4] = start;
136
137	if (drive->media == ide_tape)
138	pc.flags \|= PC_FLAG_WAIT_FOR_DSC;
139
140	return ide_queue_pc_tail(drive, disk, &pc, NULL, 0);
141	}
142	EXPORT_SYMBOL_GPL(ide_do_start_stop);
143
144	int ide_set_media_lock(ide_drive_t drive, struct gendisk disk, int on)
145	{
146	struct ide_atapi_pc pc;
147
148	if ((drive->dev_flags & IDE_DFLAG_DOORLOCKING) == 0)
149	return 0;
150
151	ide_init_pc(&pc);
152	pc.c[0] = ALLOW_MEDIUM_REMOVAL;
153	pc.c[4] = on;
154
155	return ide_queue_pc_tail(drive, disk, &pc, NULL, 0);
156	}
157	EXPORT_SYMBOL_GPL(ide_set_media_lock);
158
159	void ide_create_request_sense_cmd(ide_drive_t drive, struct ide_atapi_pc pc)
160	{
161	ide_init_pc(pc);
162	pc->c[0] = REQUEST_SENSE;
163	if (drive->media == ide_floppy) {
164	pc->c[4] = 255;
165	pc->req_xfer = 18;
166	} else {
167	pc->c[4] = 20;
168	pc->req_xfer = 20;
169	}
170	}
171	EXPORT_SYMBOL_GPL(ide_create_request_sense_cmd);
172
173	void ide_prep_sense(ide_drive_t drive, struct request rq)
174	{
175	struct request_sense *sense = &drive->sense_data;
176	struct request *sense_rq;
177	struct scsi_request *req;
178	unsigned int cmd_len, sense_len;
179	int err;
180
181	switch (drive->media) {
182	case ide_floppy:
183	cmd_len = 255;
184	sense_len = 18;
185	break;
186	case ide_tape:
187	cmd_len = 20;
188	sense_len = 20;
189	break;
190	default:
191	cmd_len = 18;
192	sense_len = 18;
193	}
194
195	BUG_ON(sense_len > sizeof(*sense));
196
197	if (ata_sense_request(rq) \|\| drive->sense_rq_armed)
198	return;
199
200	sense_rq = drive->sense_rq;
201	if (!sense_rq) {
202	sense_rq = blk_mq_alloc_request(drive->queue, REQ_OP_DRV_IN,
203	BLK_MQ_REQ_RESERVED \| BLK_MQ_REQ_NOWAIT);
204	drive->sense_rq = sense_rq;
205	}
206	req = scsi_req(sense_rq);
207
208	memset(sense, 0, sizeof(*sense));
209
210	scsi_req_init(req);
211
212	err = blk_rq_map_kern(drive->queue, sense_rq, sense, sense_len,
213	GFP_NOIO);
214	if (unlikely(err)) {
215	if (printk_ratelimit())
216	printk(KERN_WARNING PFX "%s: failed to map sense "
217	"buffer\n", drive->name);
218	blk_mq_free_request(sense_rq);
219	drive->sense_rq = NULL;
220	return;
221	}
222
223	sense_rq->rq_disk = rq->rq_disk;
224	sense_rq->cmd_flags = REQ_OP_DRV_IN;
225	ide_req(sense_rq)->type = ATA_PRIV_SENSE;
226
227	req->cmd[0] = GPCMD_REQUEST_SENSE;
228	req->cmd[4] = cmd_len;
229	if (drive->media == ide_tape)
230	req->cmd[13] = REQ_IDETAPE_PC1;
231
232	drive->sense_rq_armed = true;
233	}
234	EXPORT_SYMBOL_GPL(ide_prep_sense);
235
236	int ide_queue_sense_rq(ide_drive_t drive, void special)
237	{
238	ide_hwif_t *hwif = drive->hwif;
239	struct request *sense_rq;
240	unsigned long flags;
241
242	spin_lock_irqsave(&hwif->lock, flags);
243
244	/* deferred failure from ide_prep_sense() */
245	if (!drive->sense_rq_armed) {
246	printk(KERN_WARNING PFX "%s: error queuing a sense request\n",
247	drive->name);
248	spin_unlock_irqrestore(&hwif->lock, flags);
249	return -ENOMEM;
250	}
251
252	sense_rq = drive->sense_rq;
253	ide_req(sense_rq)->special = special;
254	drive->sense_rq_armed = false;
255
256	drive->hwif->rq = NULL;
257
258	ide_insert_request_head(drive, sense_rq);
259	spin_unlock_irqrestore(&hwif->lock, flags);
260	return 0;
261	}
262	EXPORT_SYMBOL_GPL(ide_queue_sense_rq);
263
264	/*
265	* Called when an error was detected during the last packet command.
266	* We queue a request sense packet command at the head of the request
267	* queue.
268	*/
269	void ide_retry_pc(ide_drive_t *drive)
270	{
271	struct request *failed_rq = drive->hwif->rq;
272	struct request *sense_rq = drive->sense_rq;
273	struct ide_atapi_pc *pc = &drive->request_sense_pc;
274
275	(void)ide_read_error(drive);
276
277	/* init pc from sense_rq */
278	ide_init_pc(pc);
279	memcpy(pc->c, scsi_req(sense_rq)->cmd, 12);
280
281	if (drive->media == ide_tape)
282	drive->atapi_flags \|= IDE_AFLAG_IGNORE_DSC;
283
284	/*
285	* Push back the failed request and put request sense on top
286	* of it. The failed command will be retried after sense data
287	* is acquired.
288	*/
289	drive->hwif->rq = NULL;
290	ide_requeue_and_plug(drive, failed_rq);
291	if (ide_queue_sense_rq(drive, pc))
292	ide_complete_rq(drive, BLK_STS_IOERR, blk_rq_bytes(failed_rq));
293	}
294	EXPORT_SYMBOL_GPL(ide_retry_pc);
295
296	int ide_cd_expiry(ide_drive_t *drive)
297	{
298	struct request *rq = drive->hwif->rq;
299	unsigned long wait = 0;
300
301	debug_log("%s: scsi_req(rq)->cmd[0]: 0x%x\n", __func__, scsi_req(rq)->cmd[0]);
302
303	/*
304	* Some commands are slow and normally take a long time to complete.
305	* Usually we can use the ATAPI "disconnect" to bypass this, but not all
306	* commands/drives support that. Let ide_timer_expiry keep polling us
307	* for these.
308	*/
309	switch (scsi_req(rq)->cmd[0]) {
310	case GPCMD_BLANK:
311	case GPCMD_FORMAT_UNIT:
312	case GPCMD_RESERVE_RZONE_TRACK:
313	case GPCMD_CLOSE_TRACK:
314	case GPCMD_FLUSH_CACHE:
315	wait = ATAPI_WAIT_PC;
316	break;
317	default:
318	if (!(rq->rq_flags & RQF_QUIET))
319	printk(KERN_INFO PFX "cmd 0x%x timed out\n",
320	scsi_req(rq)->cmd[0]);
321	wait = 0;
322	break;
323	}
324	return wait;
325	}
326	EXPORT_SYMBOL_GPL(ide_cd_expiry);
327
328	int ide_cd_get_xferlen(struct request *rq)
329	{
330	switch (req_op(rq)) {
331	default:
332	return 32768;
333	case REQ_OP_SCSI_IN:
334	case REQ_OP_SCSI_OUT:
335	return blk_rq_bytes(rq);
336	case REQ_OP_DRV_IN:
337	case REQ_OP_DRV_OUT:
338	switch (ide_req(rq)->type) {
339	case ATA_PRIV_PC:
340	case ATA_PRIV_SENSE:
341	return blk_rq_bytes(rq);
342	default:
343	return 0;
344	}
345	}
346	}
347	EXPORT_SYMBOL_GPL(ide_cd_get_xferlen);
348
349	void ide_read_bcount_and_ireason(ide_drive_t drive, u16 bcount, u8 *ireason)
350	{
351	struct ide_taskfile tf;
352
353	drive->hwif->tp_ops->tf_read(drive, &tf, IDE_VALID_NSECT \|
354	IDE_VALID_LBAM \| IDE_VALID_LBAH);
355
356	*bcount = (tf.lbah << 8) \| tf.lbam;
357	*ireason = tf.nsect & 3;
358	}
359	EXPORT_SYMBOL_GPL(ide_read_bcount_and_ireason);
360
361	/*
362	* Check the contents of the interrupt reason register and attempt to recover if
363	* there are problems.
364	*
365	* Returns:
366	* - 0 if everything's ok
367	* - 1 if the request has to be terminated.
368	*/
369	int ide_check_ireason(ide_drive_t drive, struct request rq, int len,
370	int ireason, int rw)
371	{
372	ide_hwif_t *hwif = drive->hwif;
373
374	debug_log("ireason: 0x%x, rw: 0x%x\n", ireason, rw);
375
376	if (ireason == (!rw << 1))
377	return 0;
378	else if (ireason == (rw << 1)) {
379	printk(KERN_ERR PFX "%s: %s: wrong transfer direction!\n",
380	drive->name, __func__);
381
382	if (dev_is_idecd(drive))
383	ide_pad_transfer(drive, rw, len);
384	} else if (!rw && ireason == ATAPI_COD) {
385	if (dev_is_idecd(drive)) {
386	/*
387	* Some drives (ASUS) seem to tell us that status info
388	* is available. Just get it and ignore.
389	*/
390	(void)hwif->tp_ops->read_status(hwif);
391	return 0;
392	}
393	} else {
394	if (ireason & ATAPI_COD)
395	printk(KERN_ERR PFX "%s: CoD != 0 in %s\n", drive->name,
396	__func__);
397
398	/* drive wants a command packet, or invalid ireason... */
399	printk(KERN_ERR PFX "%s: %s: bad interrupt reason 0x%02x\n",
400	drive->name, __func__, ireason);
401	}
402
403	if (dev_is_idecd(drive) && ata_pc_request(rq))
404	rq->rq_flags \|= RQF_FAILED;
405
406	return 1;
407	}
408	EXPORT_SYMBOL_GPL(ide_check_ireason);
409
410	/*
411	* This is the usual interrupt handler which will be called during a packet
412	* command. We will transfer some of the data (as requested by the drive)
413	* and will re-point interrupt handler to us.
414	*/
415	static ide_startstop_t ide_pc_intr(ide_drive_t *drive)
416	{
417	struct ide_atapi_pc *pc = drive->pc;
418	ide_hwif_t *hwif = drive->hwif;
419	struct ide_cmd *cmd = &hwif->cmd;
420	struct request *rq = hwif->rq;
421	const struct ide_tp_ops *tp_ops = hwif->tp_ops;
422	unsigned int timeout, done;
423	u16 bcount;
424	u8 stat, ireason, dsc = 0;
425	u8 write = !!(pc->flags & PC_FLAG_WRITING);
426
427	debug_log("Enter %s - interrupt handler\n", __func__);
428
429	timeout = (drive->media == ide_floppy) ? WAIT_FLOPPY_CMD
430	: WAIT_TAPE_CMD;
431
432	/* Clear the interrupt */
433	stat = tp_ops->read_status(hwif);
434
435	if (pc->flags & PC_FLAG_DMA_IN_PROGRESS) {
436	int rc;
437
438	drive->waiting_for_dma = 0;
439	rc = hwif->dma_ops->dma_end(drive);
440	ide_dma_unmap_sg(drive, cmd);
441
442	if (rc \|\| (drive->media == ide_tape && (stat & ATA_ERR))) {
443	if (drive->media == ide_floppy)
444	printk(KERN_ERR PFX "%s: DMA %s error\n",
445	drive->name, rq_data_dir(pc->rq)
446	? "write" : "read");
447	pc->flags \|= PC_FLAG_DMA_ERROR;
448	} else
449	scsi_req(rq)->resid_len = 0;
450	debug_log("%s: DMA finished\n", drive->name);
451	}
452
453	/* No more interrupts */
454	if ((stat & ATA_DRQ) == 0) {
455	int uptodate;
456	blk_status_t error;
457
458	debug_log("Packet command completed, %d bytes transferred\n",
459	blk_rq_bytes(rq));
460
461	pc->flags &= ~PC_FLAG_DMA_IN_PROGRESS;
462
463	local_irq_enable_in_hardirq();
464
465	if (drive->media == ide_tape &&
466	(stat & ATA_ERR) && scsi_req(rq)->cmd[0] == REQUEST_SENSE)
467	stat &= ~ATA_ERR;
468
469	if ((stat & ATA_ERR) \|\| (pc->flags & PC_FLAG_DMA_ERROR)) {
470	/* Error detected */
471	debug_log("%s: I/O error\n", drive->name);
472
473	if (drive->media != ide_tape)
474	scsi_req(pc->rq)->result++;
475
476	if (scsi_req(rq)->cmd[0] == REQUEST_SENSE) {
477	printk(KERN_ERR PFX "%s: I/O error in request "
478	"sense command\n", drive->name);
479	return ide_do_reset(drive);
480	}
481
482	debug_log("[cmd %x]: check condition\n", scsi_req(rq)->cmd[0]);
483
484	/* Retry operation */
485	ide_retry_pc(drive);
486
487	/* queued, but not started */
488	return ide_stopped;
489	}
490	pc->error = 0;
491
492	if ((pc->flags & PC_FLAG_WAIT_FOR_DSC) && (stat & ATA_DSC) == 0)
493	dsc = 1;
494
495	/*
496	* ->pc_callback() might change rq->data_len for
497	* residual count, cache total length.
498	*/
499	done = blk_rq_bytes(rq);
500
501	/* Command finished - Call the callback function */
502	uptodate = drive->pc_callback(drive, dsc);
503
504	if (uptodate == 0)
505	drive->failed_pc = NULL;
506
507	if (ata_misc_request(rq)) {
508	scsi_req(rq)->result = 0;
509	error = BLK_STS_OK;
510	} else {
511
512	if (blk_rq_is_passthrough(rq) && uptodate <= 0) {
513	if (scsi_req(rq)->result == 0)
514	scsi_req(rq)->result = -EIO;
515	}
516
517	error = uptodate ? BLK_STS_OK : BLK_STS_IOERR;
518	}
519
520	ide_complete_rq(drive, error, blk_rq_bytes(rq));
521	return ide_stopped;
522	}
523
524	if (pc->flags & PC_FLAG_DMA_IN_PROGRESS) {
525	pc->flags &= ~PC_FLAG_DMA_IN_PROGRESS;
526	printk(KERN_ERR PFX "%s: The device wants to issue more "
527	"interrupts in DMA mode\n", drive->name);
528	ide_dma_off(drive);
529	return ide_do_reset(drive);
530	}
531
532	/* Get the number of bytes to transfer on this interrupt. */
533	ide_read_bcount_and_ireason(drive, &bcount, &ireason);
534
535	if (ide_check_ireason(drive, rq, bcount, ireason, write))
536	return ide_do_reset(drive);
537
538	done = min_t(unsigned int, bcount, cmd->nleft);
539	ide_pio_bytes(drive, cmd, write, done);
540
541	/* Update transferred byte count */
542	scsi_req(rq)->resid_len -= done;
543
544	bcount -= done;
545
546	if (bcount)
547	ide_pad_transfer(drive, write, bcount);
548
549	debug_log("[cmd %x] transferred %d bytes, padded %d bytes, resid: %u\n",
550	scsi_req(rq)->cmd[0], done, bcount, scsi_req(rq)->resid_len);
551
552	/* And set the interrupt handler again */
553	ide_set_handler(drive, ide_pc_intr, timeout);
554	return ide_started;
555	}
556
557	static void ide_init_packet_cmd(struct ide_cmd *cmd, u8 valid_tf,
558	u16 bcount, u8 dma)
559	{
560	cmd->protocol = dma ? ATAPI_PROT_DMA : ATAPI_PROT_PIO;
561	cmd->valid.out.tf = IDE_VALID_LBAH \| IDE_VALID_LBAM \|
562	IDE_VALID_FEATURE \| valid_tf;
563	cmd->tf.command = ATA_CMD_PACKET;
564	cmd->tf.feature = dma; /* Use PIO/DMA */
565	cmd->tf.lbam = bcount & 0xff;
566	cmd->tf.lbah = (bcount >> 8) & 0xff;
567	}
568
569	static u8 ide_read_ireason(ide_drive_t *drive)
570	{
571	struct ide_taskfile tf;
572
573	drive->hwif->tp_ops->tf_read(drive, &tf, IDE_VALID_NSECT);
574
575	return tf.nsect & 3;
576	}
577
578	static u8 ide_wait_ireason(ide_drive_t *drive, u8 ireason)
579	{
580	int retries = 100;
581
582	while (retries-- && ((ireason & ATAPI_COD) == 0 \|\|
583	(ireason & ATAPI_IO))) {
584	printk(KERN_ERR PFX "%s: (IO,CoD != (0,1) while issuing "
585	"a packet command, retrying\n", drive->name);
586	udelay(100);
587	ireason = ide_read_ireason(drive);
588	if (retries == 0) {
589	printk(KERN_ERR PFX "%s: (IO,CoD != (0,1) while issuing"
590	" a packet command, ignoring\n",
591	drive->name);
592	ireason \|= ATAPI_COD;
593	ireason &= ~ATAPI_IO;
594	}
595	}
596
597	return ireason;
598	}
599
600	static int ide_delayed_transfer_pc(ide_drive_t *drive)
601	{
602	/* Send the actual packet */
603	drive->hwif->tp_ops->output_data(drive, NULL, drive->pc->c, 12);
604
605	/* Timeout for the packet command */
606	return WAIT_FLOPPY_CMD;
607	}
608
609	static ide_startstop_t ide_transfer_pc(ide_drive_t *drive)
610	{
611	struct ide_atapi_pc *pc;
612	ide_hwif_t *hwif = drive->hwif;
613	struct request *rq = hwif->rq;
614	ide_expiry_t *expiry;
615	unsigned int timeout;
616	int cmd_len;
617	ide_startstop_t startstop;
618	u8 ireason;
619
620	if (ide_wait_stat(&startstop, drive, ATA_DRQ, ATA_BUSY, WAIT_READY)) {
621	printk(KERN_ERR PFX "%s: Strange, packet command initiated yet "
622	"DRQ isn't asserted\n", drive->name);
623	return startstop;
624	}
625
626	if (drive->atapi_flags & IDE_AFLAG_DRQ_INTERRUPT) {
627	if (drive->dma)
628	drive->waiting_for_dma = 1;
629	}
630
631	if (dev_is_idecd(drive)) {
632	/* ATAPI commands get padded out to 12 bytes minimum */
633	cmd_len = COMMAND_SIZE(scsi_req(rq)->cmd[0]);
634	if (cmd_len < ATAPI_MIN_CDB_BYTES)
635	cmd_len = ATAPI_MIN_CDB_BYTES;
636
637	timeout = rq->timeout;
638	expiry = ide_cd_expiry;
639	} else {
640	pc = drive->pc;
641
642	cmd_len = ATAPI_MIN_CDB_BYTES;
643
644	/*
645	* If necessary schedule the packet transfer to occur 'timeout'
646	* milliseconds later in ide_delayed_transfer_pc() after the
647	* device says it's ready for a packet.
648	*/
649	if (drive->atapi_flags & IDE_AFLAG_ZIP_DRIVE) {
650	timeout = drive->pc_delay;
651	expiry = &ide_delayed_transfer_pc;
652	} else {
653	timeout = (drive->media == ide_floppy) ? WAIT_FLOPPY_CMD
654	: WAIT_TAPE_CMD;
655	expiry = NULL;
656	}
657
658	ireason = ide_read_ireason(drive);
659	if (drive->media == ide_tape)
660	ireason = ide_wait_ireason(drive, ireason);
661
662	if ((ireason & ATAPI_COD) == 0 \|\| (ireason & ATAPI_IO)) {
663	printk(KERN_ERR PFX "%s: (IO,CoD) != (0,1) while "
664	"issuing a packet command\n", drive->name);
665
666	return ide_do_reset(drive);
667	}
668	}
669
670	hwif->expiry = expiry;
671
672	/* Set the interrupt routine */
673	ide_set_handler(drive,
674	(dev_is_idecd(drive) ? drive->irq_handler
675	: ide_pc_intr),
676	timeout);
677
678	/* Send the actual packet */
679	if ((drive->atapi_flags & IDE_AFLAG_ZIP_DRIVE) == 0)
680	hwif->tp_ops->output_data(drive, NULL, scsi_req(rq)->cmd, cmd_len);
681
682	/* Begin DMA, if necessary */
683	if (dev_is_idecd(drive)) {
684	if (drive->dma)
685	hwif->dma_ops->dma_start(drive);
686	} else {
687	if (pc->flags & PC_FLAG_DMA_OK) {
688	pc->flags \|= PC_FLAG_DMA_IN_PROGRESS;
689	hwif->dma_ops->dma_start(drive);
690	}
691	}
692
693	return ide_started;
694	}
695
696	ide_startstop_t ide_issue_pc(ide_drive_t drive, struct ide_cmd cmd)
697	{
698	struct ide_atapi_pc *pc;
699	ide_hwif_t *hwif = drive->hwif;
700	ide_expiry_t *expiry = NULL;
701	struct request *rq = hwif->rq;
702	unsigned int timeout, bytes;
703	u16 bcount;
704	u8 valid_tf;
705	u8 drq_int = !!(drive->atapi_flags & IDE_AFLAG_DRQ_INTERRUPT);
706
707	if (dev_is_idecd(drive)) {
708	valid_tf = IDE_VALID_NSECT \| IDE_VALID_LBAL;
709	bcount = ide_cd_get_xferlen(rq);
710	expiry = ide_cd_expiry;
711	timeout = ATAPI_WAIT_PC;
712
713	if (drive->dma)
714	drive->dma = !ide_dma_prepare(drive, cmd);
715	} else {
716	pc = drive->pc;
717
718	valid_tf = IDE_VALID_DEVICE;
719	bytes = blk_rq_bytes(rq);
720	bcount = ((drive->media == ide_tape) ? bytes
721	: min_t(unsigned int,
722	bytes, 63 * 1024));
723
724	/* We haven't transferred any data yet */
725	scsi_req(rq)->resid_len = bcount;
726
727	if (pc->flags & PC_FLAG_DMA_ERROR) {
728	pc->flags &= ~PC_FLAG_DMA_ERROR;
729	ide_dma_off(drive);
730	}
731
732	if (pc->flags & PC_FLAG_DMA_OK)
733	drive->dma = !ide_dma_prepare(drive, cmd);
734
735	if (!drive->dma)
736	pc->flags &= ~PC_FLAG_DMA_OK;
737
738	timeout = (drive->media == ide_floppy) ? WAIT_FLOPPY_CMD
739	: WAIT_TAPE_CMD;
740	}
741
742	ide_init_packet_cmd(cmd, valid_tf, bcount, drive->dma);
743
744	(void)do_rw_taskfile(drive, cmd);
745
746	if (drq_int) {
747	if (drive->dma)
748	drive->waiting_for_dma = 0;
749	hwif->expiry = expiry;
750	}
751
752	ide_execute_command(drive, cmd, ide_transfer_pc, timeout);
753
754	return drq_int ? ide_started : ide_transfer_pc(drive);
755	}
756	EXPORT_SYMBOL_GPL(ide_issue_pc);

drivers/ide/ide-cd.c+0−1858

@@ -1,1858 +0,0 @@
1	/*
2	* ATAPI CD-ROM driver.
3	*
4	* Copyright (C) 1994-1996 Scott Snyder <snyder@fnald0.fnal.gov>
5	* Copyright (C) 1996-1998 Erik Andersen <andersee@debian.org>
6	* Copyright (C) 1998-2000 Jens Axboe <axboe@suse.de>
7	* Copyright (C) 2005, 2007-2009 Bartlomiej Zolnierkiewicz
8	*
9	* May be copied or modified under the terms of the GNU General Public
10	* License. See linux/COPYING for more information.
11	*
12	* See Documentation/cdrom/ide-cd.rst for usage information.
13	*
14	* Suggestions are welcome. Patches that work are more welcome though. ;-)
15	*
16	* Documentation:
17	* Mt. Fuji (SFF8090 version 4) and ATAPI (SFF-8020i rev 2.6) standards.
18	*
19	* For historical changelog please see:
20	* Documentation/ide/ChangeLog.ide-cd.1994-2004
21	*/
22
23	#define DRV_NAME "ide-cd"
24	#define PFX DRV_NAME ": "
25
26	#define IDECD_VERSION "5.00"
27
28	#include <linux/compat.h>
29	#include <linux/module.h>
30	#include <linux/types.h>
31	#include <linux/kernel.h>
32	#include <linux/sched/task_stack.h>
33	#include <linux/delay.h>
34	#include <linux/timer.h>
35	#include <linux/seq_file.h>
36	#include <linux/slab.h>
37	#include <linux/interrupt.h>
38	#include <linux/errno.h>
39	#include <linux/cdrom.h>
40	#include <linux/ide.h>
41	#include <linux/completion.h>
42	#include <linux/mutex.h>
43	#include <linux/bcd.h>
44
45	/* For SCSI -> ATAPI command conversion */
46	#include <scsi/scsi.h>
47
48	#include <linux/io.h>
49	#include <asm/byteorder.h>
50	#include <linux/uaccess.h>
51	#include <asm/unaligned.h>
52
53	#include "ide-cd.h"
54
55	static DEFINE_MUTEX(ide_cd_mutex);
56	static DEFINE_MUTEX(idecd_ref_mutex);
57
58	static void ide_cd_release(struct device *);
59
60	static struct cdrom_info ide_cd_get(struct gendisk disk)
61	{
62	struct cdrom_info *cd = NULL;
63
64	mutex_lock(&idecd_ref_mutex);
65	cd = ide_drv_g(disk, cdrom_info);
66	if (cd) {
67	if (ide_device_get(cd->drive))
68	cd = NULL;
69	else
70	get_device(&cd->dev);
71
72	}
73	mutex_unlock(&idecd_ref_mutex);
74	return cd;
75	}
76
77	static void ide_cd_put(struct cdrom_info *cd)
78	{
79	ide_drive_t *drive = cd->drive;
80
81	mutex_lock(&idecd_ref_mutex);
82	put_device(&cd->dev);
83	ide_device_put(drive);
84	mutex_unlock(&idecd_ref_mutex);
85	}
86
87	/*
88	* Generic packet command support and error handling routines.
89	*/
90
91	/* Mark that we've seen a media change and invalidate our internal buffers. */
92	static void cdrom_saw_media_change(ide_drive_t *drive)
93	{
94	drive->dev_flags \|= IDE_DFLAG_MEDIA_CHANGED;
95	drive->atapi_flags &= ~IDE_AFLAG_TOC_VALID;
96	}
97
98	static int cdrom_log_sense(ide_drive_t drive, struct request rq)
99	{
100	struct request_sense *sense = &drive->sense_data;
101	int log = 0;
102
103	if (!sense \|\| !rq \|\| (rq->rq_flags & RQF_QUIET))
104	return 0;
105
106	ide_debug_log(IDE_DBG_SENSE, "sense_key: 0x%x", sense->sense_key);
107
108	switch (sense->sense_key) {
109	case NO_SENSE:
110	case RECOVERED_ERROR:
111	break;
112	case NOT_READY:
113	/*
114	* don't care about tray state messages for e.g. capacity
115	* commands or in-progress or becoming ready
116	*/
117	if (sense->asc == 0x3a \|\| sense->asc == 0x04)
118	break;
119	log = 1;
120	break;
121	case ILLEGAL_REQUEST:
122	/*
123	* don't log START_STOP unit with LoEj set, since we cannot
124	* reliably check if drive can auto-close
125	*/
126	if (scsi_req(rq)->cmd[0] == GPCMD_START_STOP_UNIT && sense->asc == 0x24)
127	break;
128	log = 1;
129	break;
130	case UNIT_ATTENTION:
131	/*
132	* Make good and sure we've seen this potential media change.
133	* Some drives (i.e. Creative) fail to present the correct sense
134	* key in the error register.
135	*/
136	cdrom_saw_media_change(drive);
137	break;
138	default:
139	log = 1;
140	break;
141	}
142	return log;
143	}
144
145	static void cdrom_analyze_sense_data(ide_drive_t *drive,
146	struct request *failed_command)
147	{
148	struct request_sense *sense = &drive->sense_data;
149	struct cdrom_info *info = drive->driver_data;
150	unsigned long sector;
151	unsigned long bio_sectors;
152
153	ide_debug_log(IDE_DBG_SENSE, "error_code: 0x%x, sense_key: 0x%x",
154	sense->error_code, sense->sense_key);
155
156	if (failed_command)
157	ide_debug_log(IDE_DBG_SENSE, "failed cmd: 0x%x",
158	failed_command->cmd[0]);
159
160	if (!cdrom_log_sense(drive, failed_command))
161	return;
162
163	/*
164	* If a read toc is executed for a CD-R or CD-RW medium where the first
165	* toc has not been recorded yet, it will fail with 05/24/00 (which is a
166	* confusing error)
167	*/
168	if (failed_command && scsi_req(failed_command)->cmd[0] == GPCMD_READ_TOC_PMA_ATIP)
169	if (sense->sense_key == 0x05 && sense->asc == 0x24)
170	return;
171
172	/* current error */
173	if (sense->error_code == 0x70) {
174	switch (sense->sense_key) {
175	case MEDIUM_ERROR:
176	case VOLUME_OVERFLOW:
177	case ILLEGAL_REQUEST:
178	if (!sense->valid)
179	break;
180	if (failed_command == NULL \|\|
181	blk_rq_is_passthrough(failed_command))
182	break;
183	sector = (sense->information[0] << 24) \|
184	(sense->information[1] << 16) \|
185	(sense->information[2] << 8) \|
186	(sense->information[3]);
187
188	if (queue_logical_block_size(drive->queue) == 2048)
189	/* device sector size is 2K */
190	sector <<= 2;
191
192	bio_sectors = max(bio_sectors(failed_command->bio), 4U);
193	sector &= ~(bio_sectors - 1);
194
195	/*
196	* The SCSI specification allows for the value
197	* returned by READ CAPACITY to be up to 75 2K
198	* sectors past the last readable block.
199	* Therefore, if we hit a medium error within the
200	* last 75 2K sectors, we decrease the saved size
201	* value.
202	*/
203	if (sector < get_capacity(info->disk) &&
204	drive->probed_capacity - sector < 4 * 75)
205	set_capacity(info->disk, sector);
206	}
207	}
208
209	ide_cd_log_error(drive->name, failed_command, sense);
210	}
211
212	static void ide_cd_complete_failed_rq(ide_drive_t drive, struct request rq)
213	{
214	/*
215	* For ATA_PRIV_SENSE, "ide_req(rq)->special" points to the original
216	* failed request. Also, the sense data should be read
217	* directly from rq which might be different from the original
218	* sense buffer if it got copied during mapping.
219	*/
220	struct request *failed = ide_req(rq)->special;
221	void *sense = bio_data(rq->bio);
222
223	if (failed) {
224	/*
225	* Sense is always read into drive->sense_data, copy back to the
226	* original request.
227	*/
228	memcpy(scsi_req(failed)->sense, sense, 18);
229	scsi_req(failed)->sense_len = scsi_req(rq)->sense_len;
230	cdrom_analyze_sense_data(drive, failed);
231
232	if (ide_end_rq(drive, failed, BLK_STS_IOERR, blk_rq_bytes(failed)))
233	BUG();
234	} else
235	cdrom_analyze_sense_data(drive, NULL);
236	}
237
238
239	/*
240	* Allow the drive 5 seconds to recover; some devices will return NOT_READY
241	* while flushing data from cache.
242	*
243	* returns: 0 failed (write timeout expired)
244	* 1 success
245	*/
246	static int ide_cd_breathe(ide_drive_t drive, struct request rq)
247	{
248
249	struct cdrom_info *info = drive->driver_data;
250
251	if (!scsi_req(rq)->result)
252	info->write_timeout = jiffies + ATAPI_WAIT_WRITE_BUSY;
253
254	scsi_req(rq)->result = 1;
255
256	if (time_after(jiffies, info->write_timeout))
257	return 0;
258	else {
259	/*
260	* take a breather
261	*/
262	blk_mq_requeue_request(rq, false);
263	blk_mq_delay_kick_requeue_list(drive->queue, 1);
264	return 1;
265	}
266	}
267
268	static void ide_cd_free_sense(ide_drive_t *drive)
269	{
270	if (!drive->sense_rq)
271	return;
272
273	blk_mq_free_request(drive->sense_rq);
274	drive->sense_rq = NULL;
275	drive->sense_rq_armed = false;
276	}
277
278	/**
279	* Returns:
280	* 0: if the request should be continued.
281	* 1: if the request will be going through error recovery.
282	* 2: if the request should be ended.
283	*/
284	static int cdrom_decode_status(ide_drive_t *drive, u8 stat)
285	{
286	ide_hwif_t *hwif = drive->hwif;
287	struct request *rq = hwif->rq;
288	int err, sense_key, do_end_request = 0;
289
290	/* get the IDE error register */
291	err = ide_read_error(drive);
292	sense_key = err >> 4;
293
294	ide_debug_log(IDE_DBG_RQ, "cmd: 0x%x, rq->cmd_type: 0x%x, err: 0x%x, "
295	"stat 0x%x",
296	rq->cmd[0], rq->cmd_type, err, stat);
297
298	if (ata_sense_request(rq)) {
299	/*
300	* We got an error trying to get sense info from the drive
301	* (probably while trying to recover from a former error).
302	* Just give up.
303	*/
304	rq->rq_flags \|= RQF_FAILED;
305	return 2;
306	}
307
308	/* if we have an error, pass CHECK_CONDITION as the SCSI status byte */
309	if (blk_rq_is_scsi(rq) && !scsi_req(rq)->result)
310	scsi_req(rq)->result = SAM_STAT_CHECK_CONDITION;
311
312	if (blk_noretry_request(rq))
313	do_end_request = 1;
314
315	switch (sense_key) {
316	case NOT_READY:
317	if (req_op(rq) == REQ_OP_WRITE) {
318	if (ide_cd_breathe(drive, rq))
319	return 1;
320	} else {
321	cdrom_saw_media_change(drive);
322
323	if (!blk_rq_is_passthrough(rq) &&
324	!(rq->rq_flags & RQF_QUIET))
325	printk(KERN_ERR PFX "%s: tray open\n",
326	drive->name);
327	}
328	do_end_request = 1;
329	break;
330	case UNIT_ATTENTION:
331	cdrom_saw_media_change(drive);
332
333	if (blk_rq_is_passthrough(rq))
334	return 0;
335
336	/*
337	* Arrange to retry the request but be sure to give up if we've
338	* retried too many times.
339	*/
340	if (++scsi_req(rq)->result > ERROR_MAX)
341	do_end_request = 1;
342	break;
343	case ILLEGAL_REQUEST:
344	/*
345	* Don't print error message for this condition -- SFF8090i
346	* indicates that 5/24/00 is the correct response to a request
347	* to close the tray if the drive doesn't have that capability.
348	*
349	* cdrom_log_sense() knows this!
350	*/
351	if (scsi_req(rq)->cmd[0] == GPCMD_START_STOP_UNIT)
352	break;
353	fallthrough;
354	case DATA_PROTECT:
355	/*
356	* No point in retrying after an illegal request or data
357	* protect error.
358	*/
359	if (!(rq->rq_flags & RQF_QUIET))
360	ide_dump_status(drive, "command error", stat);
361	do_end_request = 1;
362	break;
363	case MEDIUM_ERROR:
364	/*
365	* No point in re-trying a zillion times on a bad sector.
366	* If we got here the error is not correctable.
367	*/
368	if (!(rq->rq_flags & RQF_QUIET))
369	ide_dump_status(drive, "media error "
370	"(bad sector)", stat);
371	do_end_request = 1;
372	break;
373	case BLANK_CHECK:
374	/* disk appears blank? */
375	if (!(rq->rq_flags & RQF_QUIET))
376	ide_dump_status(drive, "media error (blank)",
377	stat);
378	do_end_request = 1;
379	break;
380	default:
381	if (blk_rq_is_passthrough(rq))
382	break;
383	if (err & ~ATA_ABORTED) {
384	/* go to the default handler for other errors */
385	ide_error(drive, "cdrom_decode_status", stat);
386	return 1;
387	} else if (++scsi_req(rq)->result > ERROR_MAX)
388	/* we've racked up too many retries, abort */
389	do_end_request = 1;
390	}
391
392	if (blk_rq_is_passthrough(rq)) {
393	rq->rq_flags \|= RQF_FAILED;
394	do_end_request = 1;
395	}
396
397	/*
398	* End a request through request sense analysis when we have sense data.
399	* We need this in order to perform end of media processing.
400	*/
401	if (do_end_request)
402	goto end_request;
403
404	/* if we got a CHECK_CONDITION status, queue a request sense command */
405	if (stat & ATA_ERR)
406	return ide_queue_sense_rq(drive, NULL) ? 2 : 1;
407	return 1;
408
409	end_request:
410	if (stat & ATA_ERR) {
411	hwif->rq = NULL;
412	return ide_queue_sense_rq(drive, rq) ? 2 : 1;
413	} else
414	return 2;
415	}
416
417	static void ide_cd_request_sense_fixup(ide_drive_t drive, struct ide_cmd cmd)
418	{
419	struct request *rq = cmd->rq;
420
421	ide_debug_log(IDE_DBG_FUNC, "rq->cmd[0]: 0x%x", rq->cmd[0]);
422
423	/*
424	* Some of the trailing request sense fields are optional,
425	* and some drives don't send them. Sigh.
426	*/
427	if (scsi_req(rq)->cmd[0] == GPCMD_REQUEST_SENSE &&
428	cmd->nleft > 0 && cmd->nleft <= 5)
429	cmd->nleft = 0;
430	}
431
432	int ide_cd_queue_pc(ide_drive_t drive, const unsigned char cmd,
433	int write, void buffer, unsigned bufflen,
434	struct scsi_sense_hdr *sshdr, int timeout,
435	req_flags_t rq_flags)
436	{
437	struct cdrom_info *info = drive->driver_data;
438	struct scsi_sense_hdr local_sshdr;
439	int retries = 10;
440	bool failed;
441
442	ide_debug_log(IDE_DBG_PC, "cmd[0]: 0x%x, write: 0x%x, timeout: %d, "
443	"rq_flags: 0x%x",
444	cmd[0], write, timeout, rq_flags);
445
446	if (!sshdr)
447	sshdr = &local_sshdr;
448
449	/* start of retry loop */
450	do {
451	struct request *rq;
452	int error;
453	bool delay = false;
454
455	rq = blk_get_request(drive->queue,
456	write ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN, 0);
457	memcpy(scsi_req(rq)->cmd, cmd, BLK_MAX_CDB);
458	ide_req(rq)->type = ATA_PRIV_PC;
459	rq->rq_flags \|= rq_flags;
460	rq->timeout = timeout;
461	if (buffer) {
462	error = blk_rq_map_kern(drive->queue, rq, buffer,
463	*bufflen, GFP_NOIO);
464	if (error) {
465	blk_put_request(rq);
466	return error;
467	}
468	}
469
470	blk_execute_rq(info->disk, rq, 0);
471	error = scsi_req(rq)->result ? -EIO : 0;
472
473	if (buffer)
474	*bufflen = scsi_req(rq)->resid_len;
475	scsi_normalize_sense(scsi_req(rq)->sense,
476	scsi_req(rq)->sense_len, sshdr);
477
478	/*
479	* FIXME: we should probably abort/retry or something in case of
480	* failure.
481	*/
482	failed = (rq->rq_flags & RQF_FAILED) != 0;
483	if (failed) {
484	/*
485	* The request failed. Retry if it was due to a unit
486	* attention status (usually means media was changed).
487	*/
488	if (sshdr->sense_key == UNIT_ATTENTION)
489	cdrom_saw_media_change(drive);
490	else if (sshdr->sense_key == NOT_READY &&
491	sshdr->asc == 4 && sshdr->ascq != 4) {
492	/*
493	* The drive is in the process of loading
494	* a disk. Retry, but wait a little to give
495	* the drive time to complete the load.
496	*/
497	delay = true;
498	} else {
499	/* otherwise, don't retry */
500	retries = 0;
501	}
502	--retries;
503	}
504	blk_put_request(rq);
505	if (delay)
506	ssleep(2);
507	} while (failed && retries >= 0);
508
509	/* return an error if the command failed */
510	return failed ? -EIO : 0;
511	}
512
513	/*
514	* returns true if rq has been completed
515	*/
516	static bool ide_cd_error_cmd(ide_drive_t drive, struct ide_cmd cmd)
517	{
518	unsigned int nr_bytes = cmd->nbytes - cmd->nleft;
519
520	if (cmd->tf_flags & IDE_TFLAG_WRITE)
521	nr_bytes -= cmd->last_xfer_len;
522
523	if (nr_bytes > 0) {
524	ide_complete_rq(drive, BLK_STS_OK, nr_bytes);
525	return true;
526	}
527
528	return false;
529	}
530
531	/* standard prep_rq that builds 10 byte cmds */
532	static bool ide_cdrom_prep_fs(struct request_queue q, struct request rq)
533	{
534	int hard_sect = queue_logical_block_size(q);
535	long block = (long)blk_rq_pos(rq) / (hard_sect >> 9);
536	unsigned long blocks = blk_rq_sectors(rq) / (hard_sect >> 9);
537	struct scsi_request *req = scsi_req(rq);
538
539	if (rq_data_dir(rq) == READ)
540	req->cmd[0] = GPCMD_READ_10;
541	else
542	req->cmd[0] = GPCMD_WRITE_10;
543
544	/*
545	* fill in lba
546	*/
547	req->cmd[2] = (block >> 24) & 0xff;
548	req->cmd[3] = (block >> 16) & 0xff;
549	req->cmd[4] = (block >> 8) & 0xff;
550	req->cmd[5] = block & 0xff;
551
552	/*
553	* and transfer length
554	*/
555	req->cmd[7] = (blocks >> 8) & 0xff;
556	req->cmd[8] = blocks & 0xff;
557	req->cmd_len = 10;
558	return true;
559	}
560
561	/*
562	* Most of the SCSI commands are supported directly by ATAPI devices.
563	* This transform handles the few exceptions.
564	*/
565	static bool ide_cdrom_prep_pc(struct request *rq)
566	{
567	u8 *c = scsi_req(rq)->cmd;
568
569	/* transform 6-byte read/write commands to the 10-byte version */
570	if (c[0] == READ_6 \|\| c[0] == WRITE_6) {
571	c[8] = c[4];
572	c[5] = c[3];
573	c[4] = c[2];
574	c[3] = c[1] & 0x1f;
575	c[2] = 0;
576	c[1] &= 0xe0;
577	c[0] += (READ_10 - READ_6);
578	scsi_req(rq)->cmd_len = 10;
579	return true;
580	}
581
582	/*
583	* it's silly to pretend we understand 6-byte sense commands, just
584	* reject with ILLEGAL_REQUEST and the caller should take the
585	* appropriate action
586	*/
587	if (c[0] == MODE_SENSE \|\| c[0] == MODE_SELECT) {
588	scsi_req(rq)->result = ILLEGAL_REQUEST;
589	return false;
590	}
591
592	return true;
593	}
594
595	static bool ide_cdrom_prep_rq(ide_drive_t drive, struct request rq)
596	{
597	if (!blk_rq_is_passthrough(rq)) {
598	scsi_req_init(scsi_req(rq));
599
600	return ide_cdrom_prep_fs(drive->queue, rq);
601	} else if (blk_rq_is_scsi(rq))
602	return ide_cdrom_prep_pc(rq);
603
604	return true;
605	}
606
607	static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
608	{
609	ide_hwif_t *hwif = drive->hwif;
610	struct ide_cmd *cmd = &hwif->cmd;
611	struct request *rq = hwif->rq;
612	ide_expiry_t *expiry = NULL;
613	int dma_error = 0, dma, thislen, uptodate = 0;
614	int write = (rq_data_dir(rq) == WRITE) ? 1 : 0, rc = 0;
615	int sense = ata_sense_request(rq);
616	unsigned int timeout;
617	u16 len;
618	u8 ireason, stat;
619
620	ide_debug_log(IDE_DBG_PC, "cmd: 0x%x, write: 0x%x", rq->cmd[0], write);
621
622	/* check for errors */
623	dma = drive->dma;
624	if (dma) {
625	drive->dma = 0;
626	drive->waiting_for_dma = 0;
627	dma_error = hwif->dma_ops->dma_end(drive);
628	ide_dma_unmap_sg(drive, cmd);
629	if (dma_error) {
630	printk(KERN_ERR PFX "%s: DMA %s error\n", drive->name,
631	write ? "write" : "read");
632	ide_dma_off(drive);
633	}
634	}
635
636	/* check status */
637	stat = hwif->tp_ops->read_status(hwif);
638
639	if (!OK_STAT(stat, 0, BAD_R_STAT)) {
640	rc = cdrom_decode_status(drive, stat);
641	if (rc) {
642	if (rc == 2)
643	goto out_end;
644	return ide_stopped;
645	}
646	}
647
648	/* using dma, transfer is complete now */
649	if (dma) {
650	if (dma_error)
651	return ide_error(drive, "dma error", stat);
652	uptodate = 1;
653	goto out_end;
654	}
655
656	ide_read_bcount_and_ireason(drive, &len, &ireason);
657
658	thislen = !blk_rq_is_passthrough(rq) ? len : cmd->nleft;
659	if (thislen > len)
660	thislen = len;
661
662	ide_debug_log(IDE_DBG_PC, "DRQ: stat: 0x%x, thislen: %d",
663	stat, thislen);
664
665	/* If DRQ is clear, the command has completed. */
666	if ((stat & ATA_DRQ) == 0) {
667	switch (req_op(rq)) {
668	default:
669	/*
670	* If we're not done reading/writing, complain.
671	* Otherwise, complete the command normally.
672	*/
673	uptodate = 1;
674	if (cmd->nleft > 0) {
675	printk(KERN_ERR PFX "%s: %s: data underrun "
676	"(%u bytes)\n", drive->name, __func__,
677	cmd->nleft);
678	if (!write)
679	rq->rq_flags \|= RQF_FAILED;
680	uptodate = 0;
681	}
682	goto out_end;
683	case REQ_OP_DRV_IN:
684	case REQ_OP_DRV_OUT:
685	ide_cd_request_sense_fixup(drive, cmd);
686
687	uptodate = cmd->nleft ? 0 : 1;
688
689	/*
690	* suck out the remaining bytes from the drive in an
691	* attempt to complete the data xfer. (see BZ#13399)
692	*/
693	if (!(stat & ATA_ERR) && !uptodate && thislen) {
694	ide_pio_bytes(drive, cmd, write, thislen);
695	uptodate = cmd->nleft ? 0 : 1;
696	}
697
698	if (!uptodate)
699	rq->rq_flags \|= RQF_FAILED;
700	goto out_end;
701	case REQ_OP_SCSI_IN:
702	case REQ_OP_SCSI_OUT:
703	goto out_end;
704	}
705	}
706
707	rc = ide_check_ireason(drive, rq, len, ireason, write);
708	if (rc)
709	goto out_end;
710
711	cmd->last_xfer_len = 0;
712
713	ide_debug_log(IDE_DBG_PC, "data transfer, rq->cmd_type: 0x%x, "
714	"ireason: 0x%x",
715	rq->cmd_type, ireason);
716
717	/* transfer data */
718	while (thislen > 0) {
719	int blen = min_t(int, thislen, cmd->nleft);
720
721	if (cmd->nleft == 0)
722	break;
723
724	ide_pio_bytes(drive, cmd, write, blen);
725	cmd->last_xfer_len += blen;
726
727	thislen -= blen;
728	len -= blen;
729
730	if (sense && write == 0)
731	scsi_req(rq)->sense_len += blen;
732	}
733
734	/* pad, if necessary */
735	if (len > 0) {
736	if (blk_rq_is_passthrough(rq) \|\| write == 0)
737	ide_pad_transfer(drive, write, len);
738	else {
739	printk(KERN_ERR PFX "%s: confused, missing data\n",
740	drive->name);
741	blk_dump_rq_flags(rq, "cdrom_newpc_intr");
742	}
743	}
744
745	switch (req_op(rq)) {
746	case REQ_OP_SCSI_IN:
747	case REQ_OP_SCSI_OUT:
748	timeout = rq->timeout;
749	break;
750	case REQ_OP_DRV_IN:
751	case REQ_OP_DRV_OUT:
752	expiry = ide_cd_expiry;
753	fallthrough;
754	default:
755	timeout = ATAPI_WAIT_PC;
756	break;
757	}
758
759	hwif->expiry = expiry;
760	ide_set_handler(drive, cdrom_newpc_intr, timeout);
761	return ide_started;
762
763	out_end:
764	if (blk_rq_is_scsi(rq) && rc == 0) {
765	scsi_req(rq)->resid_len = 0;
766	blk_mq_end_request(rq, BLK_STS_OK);
767	hwif->rq = NULL;
768	} else {
769	if (sense && uptodate)
770	ide_cd_complete_failed_rq(drive, rq);
771
772	if (!blk_rq_is_passthrough(rq)) {
773	if (cmd->nleft == 0)
774	uptodate = 1;
775	} else {
776	if (uptodate <= 0 && scsi_req(rq)->result == 0)
777	scsi_req(rq)->result = -EIO;
778	}
779
780	if (uptodate == 0 && rq->bio)
781	if (ide_cd_error_cmd(drive, cmd))
782	return ide_stopped;
783
784	/* make sure it's fully ended */
785	if (blk_rq_is_passthrough(rq)) {
786	scsi_req(rq)->resid_len -= cmd->nbytes - cmd->nleft;
787	if (uptodate == 0 && (cmd->tf_flags & IDE_TFLAG_WRITE))
788	scsi_req(rq)->resid_len += cmd->last_xfer_len;
789	}
790
791	ide_complete_rq(drive, uptodate ? BLK_STS_OK : BLK_STS_IOERR, blk_rq_bytes(rq));
792
793	if (sense && rc == 2)
794	ide_error(drive, "request sense failure", stat);
795	}
796
797	ide_cd_free_sense(drive);
798	return ide_stopped;
799	}
800
801	static ide_startstop_t cdrom_start_rw(ide_drive_t drive, struct request rq)
802	{
803	struct cdrom_info *cd = drive->driver_data;
804	struct request_queue *q = drive->queue;
805	int write = rq_data_dir(rq) == WRITE;
806	unsigned short sectors_per_frame =
807	queue_logical_block_size(q) >> SECTOR_SHIFT;
808
809	ide_debug_log(IDE_DBG_RQ, "rq->cmd[0]: 0x%x, rq->cmd_flags: 0x%x, "
810	"secs_per_frame: %u",
811	rq->cmd[0], rq->cmd_flags, sectors_per_frame);
812
813	if (write) {
814	/* disk has become write protected */
815	if (get_disk_ro(cd->disk))
816	return ide_stopped;
817	} else {
818	/*
819	* We may be retrying this request after an error. Fix up any
820	* weirdness which might be present in the request packet.
821	*/
822	ide_cdrom_prep_rq(drive, rq);
823	}
824
825	/* fs requests must be hardware frame aligned */
826	if ((blk_rq_sectors(rq) & (sectors_per_frame - 1)) \|\|
827	(blk_rq_pos(rq) & (sectors_per_frame - 1)))
828	return ide_stopped;
829
830	/* use DMA, if possible */
831	drive->dma = !!(drive->dev_flags & IDE_DFLAG_USING_DMA);
832
833	if (write)
834	cd->devinfo.media_written = 1;
835
836	rq->timeout = ATAPI_WAIT_PC;
837
838	return ide_started;
839	}
840
841	static void cdrom_do_block_pc(ide_drive_t drive, struct request rq)
842	{
843
844	ide_debug_log(IDE_DBG_PC, "rq->cmd[0]: 0x%x, rq->cmd_type: 0x%x",
845	rq->cmd[0], rq->cmd_type);
846
847	if (blk_rq_is_scsi(rq))
848	rq->rq_flags \|= RQF_QUIET;
849	else
850	rq->rq_flags &= ~RQF_FAILED;
851
852	drive->dma = 0;
853
854	/* sg request */
855	if (rq->bio) {
856	struct request_queue *q = drive->queue;
857	char *buf = bio_data(rq->bio);
858	unsigned int alignment;
859
860	drive->dma = !!(drive->dev_flags & IDE_DFLAG_USING_DMA);
861
862	/*
863	* check if dma is safe
864	*
865	* NOTE! The "len" and "addr" checks should possibly have
866	* separate masks.
867	*/
868	alignment = queue_dma_alignment(q) \| q->dma_pad_mask;
869	if ((unsigned long)buf & alignment
870	\|\| blk_rq_bytes(rq) & q->dma_pad_mask
871	\|\| object_is_on_stack(buf))
872	drive->dma = 0;
873	}
874	}
875
876	static ide_startstop_t ide_cd_do_request(ide_drive_t drive, struct request rq,
877	sector_t block)
878	{
879	struct ide_cmd cmd;
880	int uptodate = 0;
881	unsigned int nsectors;
882
883	ide_debug_log(IDE_DBG_RQ, "cmd: 0x%x, block: %llu",
884	rq->cmd[0], (unsigned long long)block);
885
886	if (drive->debug_mask & IDE_DBG_RQ)
887	blk_dump_rq_flags(rq, "ide_cd_do_request");
888
889	switch (req_op(rq)) {
890	default:
891	if (cdrom_start_rw(drive, rq) == ide_stopped)
892	goto out_end;
893	break;
894	case REQ_OP_SCSI_IN:
895	case REQ_OP_SCSI_OUT:
896	handle_pc:
897	if (!rq->timeout)
898	rq->timeout = ATAPI_WAIT_PC;
899	cdrom_do_block_pc(drive, rq);
900	break;
901	case REQ_OP_DRV_IN:
902	case REQ_OP_DRV_OUT:
903	switch (ide_req(rq)->type) {
904	case ATA_PRIV_MISC:
905	/* right now this can only be a reset... */
906	uptodate = 1;
907	goto out_end;
908	case ATA_PRIV_SENSE:
909	case ATA_PRIV_PC:
910	goto handle_pc;
911	default:
912	BUG();
913	}
914	}
915
916	/* prepare sense request for this command */
917	ide_prep_sense(drive, rq);
918
919	memset(&cmd, 0, sizeof(cmd));
920
921	if (rq_data_dir(rq))
922	cmd.tf_flags \|= IDE_TFLAG_WRITE;
923
924	cmd.rq = rq;
925
926	if (!blk_rq_is_passthrough(rq) \|\| blk_rq_bytes(rq)) {
927	ide_init_sg_cmd(&cmd, blk_rq_bytes(rq));
928	ide_map_sg(drive, &cmd);
929	}
930
931	return ide_issue_pc(drive, &cmd);
932	out_end:
933	nsectors = blk_rq_sectors(rq);
934
935	if (nsectors == 0)
936	nsectors = 1;
937
938	ide_complete_rq(drive, uptodate ? BLK_STS_OK : BLK_STS_IOERR, nsectors << 9);
939
940	return ide_stopped;
941	}
942
943	/*
944	* Ioctl handling.
945	*
946	* Routines which queue packet commands take as a final argument a pointer to a
947	* request_sense struct. If execution of the command results in an error with a
948	* CHECK CONDITION status, this structure will be filled with the results of the
949	* subsequent request sense command. The pointer can also be NULL, in which case
950	* no sense information is returned.
951	*/
952	static void msf_from_bcd(struct atapi_msf *msf)
953	{
954	msf->minute = bcd2bin(msf->minute);
955	msf->second = bcd2bin(msf->second);
956	msf->frame = bcd2bin(msf->frame);
957	}
958
959	int cdrom_check_status(ide_drive_t drive, struct scsi_sense_hdr sshdr)
960	{
961	struct cdrom_info *info = drive->driver_data;
962	struct cdrom_device_info *cdi;
963	unsigned char cmd[BLK_MAX_CDB];
964
965	ide_debug_log(IDE_DBG_FUNC, "enter");
966
967	if (!info)
968	return -EIO;
969
970	cdi = &info->devinfo;
971
972	memset(cmd, 0, BLK_MAX_CDB);
973	cmd[0] = GPCMD_TEST_UNIT_READY;
974
975	/*
976	* Sanyo 3 CD changer uses byte 7 of TEST_UNIT_READY to switch CDs
977	* instead of supporting the LOAD_UNLOAD opcode.
978	*/
979	cmd[7] = cdi->sanyo_slot % 3;
980
981	return ide_cd_queue_pc(drive, cmd, 0, NULL, NULL, sshdr, 0, RQF_QUIET);
982	}
983
984	static int cdrom_read_capacity(ide_drive_t drive, unsigned long capacity,
985	unsigned long *sectors_per_frame)
986	{
987	struct {
988	__be32 lba;
989	__be32 blocklen;
990	} capbuf;
991
992	int stat;
993	unsigned char cmd[BLK_MAX_CDB];
994	unsigned len = sizeof(capbuf);
995	u32 blocklen;
996
997	ide_debug_log(IDE_DBG_FUNC, "enter");
998
999	memset(cmd, 0, BLK_MAX_CDB);
1000	cmd[0] = GPCMD_READ_CDVD_CAPACITY;
1001
1002	stat = ide_cd_queue_pc(drive, cmd, 0, &capbuf, &len, NULL, 0,
1003	RQF_QUIET);
1004	if (stat)
1005	return stat;
1006
1007	/*
1008	* Sanity check the given block size, in so far as making
1009	* sure the sectors_per_frame we give to the caller won't
1010	* end up being bogus.
1011	*/
1012	blocklen = be32_to_cpu(capbuf.blocklen);
1013	blocklen = (blocklen >> SECTOR_SHIFT) << SECTOR_SHIFT;
1014	switch (blocklen) {
1015	case 512:
1016	case 1024:
1017	case 2048:
1018	case 4096:
1019	break;
1020	default:
1021	printk_once(KERN_ERR PFX "%s: weird block size %u; "
1022	"setting default block size to 2048\n",
1023	drive->name, blocklen);
1024	blocklen = 2048;
1025	break;
1026	}
1027
1028	*capacity = 1 + be32_to_cpu(capbuf.lba);
1029	*sectors_per_frame = blocklen >> SECTOR_SHIFT;
1030
1031	ide_debug_log(IDE_DBG_PROBE, "cap: %lu, sectors_per_frame: %lu",
1032	capacity, sectors_per_frame);
1033
1034	return 0;
1035	}
1036
1037	static int ide_cdrom_read_tocentry(ide_drive_t *drive, int trackno,
1038	int msf_flag, int format, char *buf, int buflen)
1039	{
1040	unsigned char cmd[BLK_MAX_CDB];
1041
1042	ide_debug_log(IDE_DBG_FUNC, "enter");
1043
1044	memset(cmd, 0, BLK_MAX_CDB);
1045
1046	cmd[0] = GPCMD_READ_TOC_PMA_ATIP;
1047	cmd[6] = trackno;
1048	cmd[7] = (buflen >> 8);
1049	cmd[8] = (buflen & 0xff);
1050	cmd[9] = (format << 6);
1051
1052	if (msf_flag)
1053	cmd[1] = 2;
1054
1055	return ide_cd_queue_pc(drive, cmd, 0, buf, &buflen, NULL, 0, RQF_QUIET);
1056	}
1057
1058	/* Try to read the entire TOC for the disk into our internal buffer. */
1059	int ide_cd_read_toc(ide_drive_t *drive)
1060	{
1061	int stat, ntracks, i;
1062	struct cdrom_info *info = drive->driver_data;
1063	struct cdrom_device_info *cdi = &info->devinfo;
1064	struct atapi_toc *toc = info->toc;
1065	struct {
1066	struct atapi_toc_header hdr;
1067	struct atapi_toc_entry ent;
1068	} ms_tmp;
1069	long last_written;
1070	unsigned long sectors_per_frame = SECTORS_PER_FRAME;
1071
1072	ide_debug_log(IDE_DBG_FUNC, "enter");
1073
1074	if (toc == NULL) {
1075	/* try to allocate space */
1076	toc = kmalloc(sizeof(struct atapi_toc), GFP_KERNEL);
1077	if (toc == NULL) {
1078	printk(KERN_ERR PFX "%s: No cdrom TOC buffer!\n",
1079	drive->name);
1080	return -ENOMEM;
1081	}
1082	info->toc = toc;
1083	}
1084
1085	/*
1086	* Check to see if the existing data is still valid. If it is,
1087	* just return.
1088	*/
1089	(void) cdrom_check_status(drive, NULL);
1090
1091	if (drive->atapi_flags & IDE_AFLAG_TOC_VALID)
1092	return 0;
1093
1094	/* try to get the total cdrom capacity and sector size */
1095	stat = cdrom_read_capacity(drive, &toc->capacity, &sectors_per_frame);
1096	if (stat)
1097	toc->capacity = 0x1fffff;
1098
1099	set_capacity(info->disk, toc->capacity * sectors_per_frame);
1100	/* save a private copy of the TOC capacity for error handling */
1101	drive->probed_capacity = toc->capacity * sectors_per_frame;
1102
1103	blk_queue_logical_block_size(drive->queue,
1104	sectors_per_frame << SECTOR_SHIFT);
1105
1106	/* first read just the header, so we know how long the TOC is */
1107	stat = ide_cdrom_read_tocentry(drive, 0, 1, 0, (char *) &toc->hdr,
1108	sizeof(struct atapi_toc_header));
1109	if (stat)
1110	return stat;
1111
1112	if (drive->atapi_flags & IDE_AFLAG_TOCTRACKS_AS_BCD) {
1113	toc->hdr.first_track = bcd2bin(toc->hdr.first_track);
1114	toc->hdr.last_track = bcd2bin(toc->hdr.last_track);
1115	}
1116
1117	ntracks = toc->hdr.last_track - toc->hdr.first_track + 1;
1118	if (ntracks <= 0)
1119	return -EIO;
1120	if (ntracks > MAX_TRACKS)
1121	ntracks = MAX_TRACKS;
1122
1123	/* now read the whole schmeer */
1124	stat = ide_cdrom_read_tocentry(drive, toc->hdr.first_track, 1, 0,
1125	(char *)&toc->hdr,
1126	sizeof(struct atapi_toc_header) +
1127	(ntracks + 1) *
1128	sizeof(struct atapi_toc_entry));
1129
1130	if (stat && toc->hdr.first_track > 1) {
1131	/*
1132	* Cds with CDI tracks only don't have any TOC entries, despite
1133	* of this the returned values are
1134	* first_track == last_track = number of CDI tracks + 1,
1135	* so that this case is indistinguishable from the same layout
1136	* plus an additional audio track. If we get an error for the
1137	* regular case, we assume a CDI without additional audio
1138	* tracks. In this case the readable TOC is empty (CDI tracks
1139	* are not included) and only holds the Leadout entry.
1140	*
1141	* Heiko Eißfeldt.
1142	*/
1143	ntracks = 0;
1144	stat = ide_cdrom_read_tocentry(drive, CDROM_LEADOUT, 1, 0,
1145	(char *)&toc->hdr,
1146	sizeof(struct atapi_toc_header) +
1147	(ntracks + 1) *
1148	sizeof(struct atapi_toc_entry));
1149	if (stat)
1150	return stat;
1151
1152	if (drive->atapi_flags & IDE_AFLAG_TOCTRACKS_AS_BCD) {
1153	toc->hdr.first_track = (u8)bin2bcd(CDROM_LEADOUT);
1154	toc->hdr.last_track = (u8)bin2bcd(CDROM_LEADOUT);
1155	} else {
1156	toc->hdr.first_track = CDROM_LEADOUT;
1157	toc->hdr.last_track = CDROM_LEADOUT;
1158	}
1159	}
1160
1161	if (stat)
1162	return stat;
1163
1164	toc->hdr.toc_length = be16_to_cpu(toc->hdr.toc_length);
1165
1166	if (drive->atapi_flags & IDE_AFLAG_TOCTRACKS_AS_BCD) {
1167	toc->hdr.first_track = bcd2bin(toc->hdr.first_track);
1168	toc->hdr.last_track = bcd2bin(toc->hdr.last_track);
1169	}
1170
1171	for (i = 0; i <= ntracks; i++) {
1172	if (drive->atapi_flags & IDE_AFLAG_TOCADDR_AS_BCD) {
1173	if (drive->atapi_flags & IDE_AFLAG_TOCTRACKS_AS_BCD)
1174	toc->ent[i].track = bcd2bin(toc->ent[i].track);
1175	msf_from_bcd(&toc->ent[i].addr.msf);
1176	}
1177	toc->ent[i].addr.lba = msf_to_lba(toc->ent[i].addr.msf.minute,
1178	toc->ent[i].addr.msf.second,
1179	toc->ent[i].addr.msf.frame);
1180	}
1181
1182	if (toc->hdr.first_track != CDROM_LEADOUT) {
1183	/* read the multisession information */
1184	stat = ide_cdrom_read_tocentry(drive, 0, 0, 1, (char *)&ms_tmp,
1185	sizeof(ms_tmp));
1186	if (stat)
1187	return stat;
1188
1189	toc->last_session_lba = be32_to_cpu(ms_tmp.ent.addr.lba);
1190	} else {
1191	ms_tmp.hdr.last_track = CDROM_LEADOUT;
1192	ms_tmp.hdr.first_track = ms_tmp.hdr.last_track;
1193	toc->last_session_lba = msf_to_lba(0, 2, 0); /* 0m 2s 0f */
1194	}
1195
1196	if (drive->atapi_flags & IDE_AFLAG_TOCADDR_AS_BCD) {
1197	/* re-read multisession information using MSF format */
1198	stat = ide_cdrom_read_tocentry(drive, 0, 1, 1, (char *)&ms_tmp,
1199	sizeof(ms_tmp));
1200	if (stat)
1201	return stat;
1202
1203	msf_from_bcd(&ms_tmp.ent.addr.msf);
1204	toc->last_session_lba = msf_to_lba(ms_tmp.ent.addr.msf.minute,
1205	ms_tmp.ent.addr.msf.second,
1206	ms_tmp.ent.addr.msf.frame);
1207	}
1208
1209	toc->xa_flag = (ms_tmp.hdr.first_track != ms_tmp.hdr.last_track);
1210
1211	/* now try to get the total cdrom capacity */
1212	stat = cdrom_get_last_written(cdi, &last_written);
1213	if (!stat && (last_written > toc->capacity)) {
1214	toc->capacity = last_written;
1215	set_capacity(info->disk, toc->capacity * sectors_per_frame);
1216	drive->probed_capacity = toc->capacity * sectors_per_frame;
1217	}
1218
1219	/* Remember that we've read this stuff. */
1220	drive->atapi_flags \|= IDE_AFLAG_TOC_VALID;
1221
1222	return 0;
1223	}
1224
1225	int ide_cdrom_get_capabilities(ide_drive_t drive, u8 buf)
1226	{
1227	struct cdrom_info *info = drive->driver_data;
1228	struct cdrom_device_info *cdi = &info->devinfo;
1229	struct packet_command cgc;
1230	int stat, attempts = 3, size = ATAPI_CAPABILITIES_PAGE_SIZE;
1231
1232	ide_debug_log(IDE_DBG_FUNC, "enter");
1233
1234	if ((drive->atapi_flags & IDE_AFLAG_FULL_CAPS_PAGE) == 0)
1235	size -= ATAPI_CAPABILITIES_PAGE_PAD_SIZE;
1236
1237	init_cdrom_command(&cgc, buf, size, CGC_DATA_UNKNOWN);
1238	do {
1239	/* we seem to get stat=0x01,err=0x00 the first time (??) */
1240	stat = cdrom_mode_sense(cdi, &cgc, GPMODE_CAPABILITIES_PAGE, 0);
1241	if (!stat)
1242	break;
1243	} while (--attempts);
1244	return stat;
1245	}
1246
1247	void ide_cdrom_update_speed(ide_drive_t drive, u8 buf)
1248	{
1249	struct cdrom_info *cd = drive->driver_data;
1250	u16 curspeed, maxspeed;
1251
1252	ide_debug_log(IDE_DBG_FUNC, "enter");
1253
1254	if (drive->atapi_flags & IDE_AFLAG_LE_SPEED_FIELDS) {
1255	curspeed = le16_to_cpup((__le16 *)&buf[8 + 14]);
1256	maxspeed = le16_to_cpup((__le16 *)&buf[8 + 8]);
1257	} else {
1258	curspeed = be16_to_cpup((__be16 *)&buf[8 + 14]);
1259	maxspeed = be16_to_cpup((__be16 *)&buf[8 + 8]);
1260	}
1261
1262	ide_debug_log(IDE_DBG_PROBE, "curspeed: %u, maxspeed: %u",
1263	curspeed, maxspeed);
1264
1265	cd->current_speed = DIV_ROUND_CLOSEST(curspeed, 176);
1266	cd->max_speed = DIV_ROUND_CLOSEST(maxspeed, 176);
1267	}
1268
1269	#define IDE_CD_CAPABILITIES \
1270	(CDC_CLOSE_TRAY \| CDC_OPEN_TRAY \| CDC_LOCK \| CDC_SELECT_SPEED \| \
1271	CDC_SELECT_DISC \| CDC_MULTI_SESSION \| CDC_MCN \| CDC_MEDIA_CHANGED \| \
1272	CDC_PLAY_AUDIO \| CDC_RESET \| CDC_DRIVE_STATUS \| CDC_CD_R \| \
1273	CDC_CD_RW \| CDC_DVD \| CDC_DVD_R \| CDC_DVD_RAM \| CDC_GENERIC_PACKET \| \
1274	CDC_MO_DRIVE \| CDC_MRW \| CDC_MRW_W \| CDC_RAM)
1275
1276	static const struct cdrom_device_ops ide_cdrom_dops = {
1277	.open = ide_cdrom_open_real,
1278	.release = ide_cdrom_release_real,
1279	.drive_status = ide_cdrom_drive_status,
1280	.check_events = ide_cdrom_check_events_real,
1281	.tray_move = ide_cdrom_tray_move,
1282	.lock_door = ide_cdrom_lock_door,
1283	.select_speed = ide_cdrom_select_speed,
1284	.get_last_session = ide_cdrom_get_last_session,
1285	.get_mcn = ide_cdrom_get_mcn,
1286	.reset = ide_cdrom_reset,
1287	.audio_ioctl = ide_cdrom_audio_ioctl,
1288	.capability = IDE_CD_CAPABILITIES,
1289	.generic_packet = ide_cdrom_packet,
1290	};
1291
1292	static int ide_cdrom_register(ide_drive_t *drive, int nslots)
1293	{
1294	struct cdrom_info *info = drive->driver_data;
1295	struct cdrom_device_info *devinfo = &info->devinfo;
1296
1297	ide_debug_log(IDE_DBG_PROBE, "nslots: %d", nslots);
1298
1299	devinfo->ops = &ide_cdrom_dops;
1300	devinfo->speed = info->current_speed;
1301	devinfo->capacity = nslots;
1302	devinfo->handle = drive;
1303	strcpy(devinfo->name, drive->name);
1304
1305	if (drive->atapi_flags & IDE_AFLAG_NO_SPEED_SELECT)
1306	devinfo->mask \|= CDC_SELECT_SPEED;
1307
1308	return register_cdrom(info->disk, devinfo);
1309	}
1310
1311	static int ide_cdrom_probe_capabilities(ide_drive_t *drive)
1312	{
1313	struct cdrom_info *cd = drive->driver_data;
1314	struct cdrom_device_info *cdi = &cd->devinfo;
1315	u8 buf[ATAPI_CAPABILITIES_PAGE_SIZE];
1316	mechtype_t mechtype;
1317	int nslots = 1;
1318
1319	ide_debug_log(IDE_DBG_PROBE, "media: 0x%x, atapi_flags: 0x%lx",
1320	drive->media, drive->atapi_flags);
1321
1322	cdi->mask = (CDC_CD_R \| CDC_CD_RW \| CDC_DVD \| CDC_DVD_R \|
1323	CDC_DVD_RAM \| CDC_SELECT_DISC \| CDC_PLAY_AUDIO \|
1324	CDC_MO_DRIVE \| CDC_RAM);
1325
1326	if (drive->media == ide_optical) {
1327	cdi->mask &= ~(CDC_MO_DRIVE \| CDC_RAM);
1328	printk(KERN_ERR PFX "%s: ATAPI magneto-optical drive\n",
1329	drive->name);
1330	return nslots;
1331	}
1332
1333	if (drive->atapi_flags & IDE_AFLAG_PRE_ATAPI12) {
1334	drive->atapi_flags &= ~IDE_AFLAG_NO_EJECT;
1335	cdi->mask &= ~CDC_PLAY_AUDIO;
1336	return nslots;
1337	}
1338
1339	/*
1340	* We have to cheat a little here. the packet will eventually be queued
1341	* with ide_cdrom_packet(), which extracts the drive from cdi->handle.
1342	* Since this device hasn't been registered with the Uniform layer yet,
1343	* it can't do this. Same goes for cdi->ops.
1344	*/
1345	cdi->handle = drive;
1346	cdi->ops = &ide_cdrom_dops;
1347
1348	if (ide_cdrom_get_capabilities(drive, buf))
1349	return 0;
1350
1351	if ((buf[8 + 6] & 0x01) == 0)
1352	drive->dev_flags &= ~IDE_DFLAG_DOORLOCKING;
1353	if (buf[8 + 6] & 0x08)
1354	drive->atapi_flags &= ~IDE_AFLAG_NO_EJECT;
1355	if (buf[8 + 3] & 0x01)
1356	cdi->mask &= ~CDC_CD_R;
1357	if (buf[8 + 3] & 0x02)
1358	cdi->mask &= ~(CDC_CD_RW \| CDC_RAM);
1359	if (buf[8 + 2] & 0x38)
1360	cdi->mask &= ~CDC_DVD;
1361	if (buf[8 + 3] & 0x20)
1362	cdi->mask &= ~(CDC_DVD_RAM \| CDC_RAM);
1363	if (buf[8 + 3] & 0x10)
1364	cdi->mask &= ~CDC_DVD_R;
1365	if ((buf[8 + 4] & 0x01) \|\| (drive->atapi_flags & IDE_AFLAG_PLAY_AUDIO_OK))
1366	cdi->mask &= ~CDC_PLAY_AUDIO;
1367
1368	mechtype = buf[8 + 6] >> 5;
1369	if (mechtype == mechtype_caddy \|\|
1370	mechtype == mechtype_popup \|\|
1371	(drive->atapi_flags & IDE_AFLAG_NO_AUTOCLOSE))
1372	cdi->mask \|= CDC_CLOSE_TRAY;
1373
1374	if (cdi->sanyo_slot > 0) {
1375	cdi->mask &= ~CDC_SELECT_DISC;
1376	nslots = 3;
1377	} else if (mechtype == mechtype_individual_changer \|\|
1378	mechtype == mechtype_cartridge_changer) {
1379	nslots = cdrom_number_of_slots(cdi);
1380	if (nslots > 1)
1381	cdi->mask &= ~CDC_SELECT_DISC;
1382	}
1383
1384	ide_cdrom_update_speed(drive, buf);
1385
1386	printk(KERN_INFO PFX "%s: ATAPI", drive->name);
1387
1388	/* don't print speed if the drive reported 0 */
1389	if (cd->max_speed)
1390	printk(KERN_CONT " %dX", cd->max_speed);
1391
1392	printk(KERN_CONT " %s", (cdi->mask & CDC_DVD) ? "CD-ROM" : "DVD-ROM");
1393
1394	if ((cdi->mask & CDC_DVD_R) == 0 \|\| (cdi->mask & CDC_DVD_RAM) == 0)
1395	printk(KERN_CONT " DVD%s%s",
1396	(cdi->mask & CDC_DVD_R) ? "" : "-R",
1397	(cdi->mask & CDC_DVD_RAM) ? "" : "/RAM");
1398
1399	if ((cdi->mask & CDC_CD_R) == 0 \|\| (cdi->mask & CDC_CD_RW) == 0)
1400	printk(KERN_CONT " CD%s%s",
1401	(cdi->mask & CDC_CD_R) ? "" : "-R",
1402	(cdi->mask & CDC_CD_RW) ? "" : "/RW");
1403
1404	if ((cdi->mask & CDC_SELECT_DISC) == 0)
1405	printk(KERN_CONT " changer w/%d slots", nslots);
1406	else
1407	printk(KERN_CONT " drive");
1408
1409	printk(KERN_CONT ", %dkB Cache\n",
1410	be16_to_cpup((__be16 *)&buf[8 + 12]));
1411
1412	return nslots;
1413	}
1414
1415	struct cd_list_entry {
1416	const char *id_model;
1417	const char *id_firmware;
1418	unsigned int cd_flags;
1419	};
1420
1421	#ifdef CONFIG_IDE_PROC_FS
1422	static sector_t ide_cdrom_capacity(ide_drive_t *drive)
1423	{
1424	unsigned long capacity, sectors_per_frame;
1425
1426	if (cdrom_read_capacity(drive, &capacity, &sectors_per_frame))
1427	return 0;
1428
1429	return capacity * sectors_per_frame;
1430	}
1431
1432	static int idecd_capacity_proc_show(struct seq_file m, void v)
1433	{
1434	ide_drive_t *drive = m->private;
1435
1436	seq_printf(m, "%llu\n", (long long)ide_cdrom_capacity(drive));
1437	return 0;
1438	}
1439
1440	static ide_proc_entry_t idecd_proc[] = {
1441	{ "capacity", S_IFREG\|S_IRUGO, idecd_capacity_proc_show },
1442	{}
1443	};
1444
1445	static ide_proc_entry_t ide_cd_proc_entries(ide_drive_t drive)
1446	{
1447	return idecd_proc;
1448	}
1449
1450	static const struct ide_proc_devset ide_cd_proc_devsets(ide_drive_t drive)
1451	{
1452	return NULL;
1453	}
1454	#endif
1455
1456	static const struct cd_list_entry ide_cd_quirks_list[] = {
1457	/* SCR-3231 doesn't support the SET_CD_SPEED command. */
1458	{ "SAMSUNG CD-ROM SCR-3231", NULL, IDE_AFLAG_NO_SPEED_SELECT },
1459	/* Old NEC260 (not R) was released before ATAPI 1.2 spec. */
1460	{ "NEC CD-ROM DRIVE:260", "1.01", IDE_AFLAG_TOCADDR_AS_BCD \|
1461	IDE_AFLAG_PRE_ATAPI12, },
1462	/* Vertos 300, some versions of this drive like to talk BCD. */
1463	{ "V003S0DS", NULL, IDE_AFLAG_VERTOS_300_SSD, },
1464	/* Vertos 600 ESD. */
1465	{ "V006E0DS", NULL, IDE_AFLAG_VERTOS_600_ESD, },
1466	/*
1467	* Sanyo 3 CD changer uses a non-standard command for CD changing
1468	* (by default standard ATAPI support for CD changers is used).
1469	*/
1470	{ "CD-ROM CDR-C3 G", NULL, IDE_AFLAG_SANYO_3CD },
1471	{ "CD-ROM CDR-C3G", NULL, IDE_AFLAG_SANYO_3CD },
1472	{ "CD-ROM CDR_C36", NULL, IDE_AFLAG_SANYO_3CD },
1473	/* Stingray 8X CD-ROM. */
1474	{ "STINGRAY 8422 IDE 8X CD-ROM 7-27-95", NULL, IDE_AFLAG_PRE_ATAPI12 },
1475	/*
1476	* ACER 50X CD-ROM and WPI 32X CD-ROM require the full spec length
1477	* mode sense page capabilities size, but older drives break.
1478	*/
1479	{ "ATAPI CD ROM DRIVE 50X MAX", NULL, IDE_AFLAG_FULL_CAPS_PAGE },
1480	{ "WPI CDS-32X", NULL, IDE_AFLAG_FULL_CAPS_PAGE },
1481	/* ACER/AOpen 24X CD-ROM has the speed fields byte-swapped. */
1482	{ "", "241N", IDE_AFLAG_LE_SPEED_FIELDS },
1483	/*
1484	* Some drives used by Apple don't advertise audio play
1485	* but they do support reading TOC & audio datas.
1486	*/
1487	{ "MATSHITADVD-ROM SR-8187", NULL, IDE_AFLAG_PLAY_AUDIO_OK },
1488	{ "MATSHITADVD-ROM SR-8186", NULL, IDE_AFLAG_PLAY_AUDIO_OK },
1489	{ "MATSHITADVD-ROM SR-8176", NULL, IDE_AFLAG_PLAY_AUDIO_OK },
1490	{ "MATSHITADVD-ROM SR-8174", NULL, IDE_AFLAG_PLAY_AUDIO_OK },
1491	{ "Optiarc DVD RW AD-5200A", NULL, IDE_AFLAG_PLAY_AUDIO_OK },
1492	{ "Optiarc DVD RW AD-7200A", NULL, IDE_AFLAG_PLAY_AUDIO_OK },
1493	{ "Optiarc DVD RW AD-7543A", NULL, IDE_AFLAG_NO_AUTOCLOSE },
1494	{ "TEAC CD-ROM CD-224E", NULL, IDE_AFLAG_NO_AUTOCLOSE },
1495	{ NULL, NULL, 0 }
1496	};
1497
1498	static unsigned int ide_cd_flags(u16 *id)
1499	{
1500	const struct cd_list_entry *cle = ide_cd_quirks_list;
1501
1502	while (cle->id_model) {
1503	if (strcmp(cle->id_model, (char *)&id[ATA_ID_PROD]) == 0 &&
1504	(cle->id_firmware == NULL \|\|
1505	strstr((char *)&id[ATA_ID_FW_REV], cle->id_firmware)))
1506	return cle->cd_flags;
1507	cle++;
1508	}
1509
1510	return 0;
1511	}
1512
1513	static int ide_cdrom_setup(ide_drive_t *drive)
1514	{
1515	struct cdrom_info *cd = drive->driver_data;
1516	struct cdrom_device_info *cdi = &cd->devinfo;
1517	struct request_queue *q = drive->queue;
1518	u16 *id = drive->id;
1519	char fw_rev = (char )&id[ATA_ID_FW_REV];
1520	int nslots;
1521
1522	ide_debug_log(IDE_DBG_PROBE, "enter");
1523
1524	drive->prep_rq = ide_cdrom_prep_rq;
1525	blk_queue_dma_alignment(q, 31);
1526	blk_queue_update_dma_pad(q, 15);
1527
1528	drive->dev_flags \|= IDE_DFLAG_MEDIA_CHANGED;
1529	drive->atapi_flags = IDE_AFLAG_NO_EJECT \| ide_cd_flags(id);
1530
1531	if ((drive->atapi_flags & IDE_AFLAG_VERTOS_300_SSD) &&
1532	fw_rev[4] == '1' && fw_rev[6] <= '2')
1533	drive->atapi_flags \|= (IDE_AFLAG_TOCTRACKS_AS_BCD \|
1534	IDE_AFLAG_TOCADDR_AS_BCD);
1535	else if ((drive->atapi_flags & IDE_AFLAG_VERTOS_600_ESD) &&
1536	fw_rev[4] == '1' && fw_rev[6] <= '2')
1537	drive->atapi_flags \|= IDE_AFLAG_TOCTRACKS_AS_BCD;
1538	else if (drive->atapi_flags & IDE_AFLAG_SANYO_3CD)
1539	/* 3 => use CD in slot 0 */
1540	cdi->sanyo_slot = 3;
1541
1542	nslots = ide_cdrom_probe_capabilities(drive);
1543
1544	blk_queue_logical_block_size(q, CD_FRAMESIZE);
1545
1546	if (ide_cdrom_register(drive, nslots)) {
1547	printk(KERN_ERR PFX "%s: %s failed to register device with the"
1548	" cdrom driver.\n", drive->name, __func__);
1549	cd->devinfo.handle = NULL;
1550	return 1;
1551	}
1552
1553	ide_proc_register_driver(drive, cd->driver);
1554	return 0;
1555	}
1556
1557	static void ide_cd_remove(ide_drive_t *drive)
1558	{
1559	struct cdrom_info *info = drive->driver_data;
1560
1561	ide_debug_log(IDE_DBG_FUNC, "enter");
1562
1563	ide_proc_unregister_driver(drive, info->driver);
1564	device_del(&info->dev);
1565	del_gendisk(info->disk);
1566
1567	mutex_lock(&idecd_ref_mutex);
1568	put_device(&info->dev);
1569	mutex_unlock(&idecd_ref_mutex);
1570	}
1571
1572	static void ide_cd_release(struct device *dev)
1573	{
1574	struct cdrom_info *info = to_ide_drv(dev, cdrom_info);
1575	struct cdrom_device_info *devinfo = &info->devinfo;
1576	ide_drive_t *drive = info->drive;
1577	struct gendisk *g = info->disk;
1578
1579	ide_debug_log(IDE_DBG_FUNC, "enter");
1580
1581	kfree(info->toc);
1582	if (devinfo->handle == drive)
1583	unregister_cdrom(devinfo);
1584	drive->driver_data = NULL;
1585	drive->prep_rq = NULL;
1586	g->private_data = NULL;
1587	put_disk(g);
1588	kfree(info);
1589	}
1590
1591	static int ide_cd_probe(ide_drive_t *);
1592
1593	static struct ide_driver ide_cdrom_driver = {
1594	.gen_driver = {
1595	.owner = THIS_MODULE,
1596	.name = "ide-cdrom",
1597	.bus = &ide_bus_type,
1598	},
1599	.probe = ide_cd_probe,
1600	.remove = ide_cd_remove,
1601	.version = IDECD_VERSION,
1602	.do_request = ide_cd_do_request,
1603	#ifdef CONFIG_IDE_PROC_FS
1604	.proc_entries = ide_cd_proc_entries,
1605	.proc_devsets = ide_cd_proc_devsets,
1606	#endif
1607	};
1608
1609	static int idecd_open(struct block_device *bdev, fmode_t mode)
1610	{
1611	struct cdrom_info *info;
1612	int rc = -ENXIO;
1613
1614	if (bdev_check_media_change(bdev)) {
1615	info = ide_drv_g(bdev->bd_disk, cdrom_info);
1616
1617	ide_cd_read_toc(info->drive);
1618	}
1619
1620	mutex_lock(&ide_cd_mutex);
1621	info = ide_cd_get(bdev->bd_disk);
1622	if (!info)
1623	goto out;
1624
1625	rc = cdrom_open(&info->devinfo, bdev, mode);
1626	if (rc < 0)
1627	ide_cd_put(info);
1628	out:
1629	mutex_unlock(&ide_cd_mutex);
1630	return rc;
1631	}
1632
1633	static void idecd_release(struct gendisk *disk, fmode_t mode)
1634	{
1635	struct cdrom_info *info = ide_drv_g(disk, cdrom_info);
1636
1637	mutex_lock(&ide_cd_mutex);
1638	cdrom_release(&info->devinfo, mode);
1639
1640	ide_cd_put(info);
1641	mutex_unlock(&ide_cd_mutex);
1642	}
1643
1644	static int idecd_set_spindown(struct cdrom_device_info *cdi, unsigned long arg)
1645	{
1646	struct packet_command cgc;
1647	char buffer[16];
1648	int stat;
1649	char spindown;
1650
1651	if (copy_from_user(&spindown, (void __user *)arg, sizeof(char)))
1652	return -EFAULT;
1653
1654	init_cdrom_command(&cgc, buffer, sizeof(buffer), CGC_DATA_UNKNOWN);
1655
1656	stat = cdrom_mode_sense(cdi, &cgc, GPMODE_CDROM_PAGE, 0);
1657	if (stat)
1658	return stat;
1659
1660	buffer[11] = (buffer[11] & 0xf0) \| (spindown & 0x0f);
1661	return cdrom_mode_select(cdi, &cgc);
1662	}
1663
1664	static int idecd_get_spindown(struct cdrom_device_info *cdi, unsigned long arg)
1665	{
1666	struct packet_command cgc;
1667	char buffer[16];
1668	int stat;
1669	char spindown;
1670
1671	init_cdrom_command(&cgc, buffer, sizeof(buffer), CGC_DATA_UNKNOWN);
1672
1673	stat = cdrom_mode_sense(cdi, &cgc, GPMODE_CDROM_PAGE, 0);
1674	if (stat)
1675	return stat;
1676
1677	spindown = buffer[11] & 0x0f;
1678	if (copy_to_user((void __user *)arg, &spindown, sizeof(char)))
1679	return -EFAULT;
1680	return 0;
1681	}
1682
1683	static int idecd_locked_ioctl(struct block_device *bdev, fmode_t mode,
1684	unsigned int cmd, unsigned long arg)
1685	{
1686	struct cdrom_info *info = ide_drv_g(bdev->bd_disk, cdrom_info);
1687	int err;
1688
1689	switch (cmd) {
1690	case CDROMSETSPINDOWN:
1691	return idecd_set_spindown(&info->devinfo, arg);
1692	case CDROMGETSPINDOWN:
1693	return idecd_get_spindown(&info->devinfo, arg);
1694	default:
1695	break;
1696	}
1697
1698	err = generic_ide_ioctl(info->drive, bdev, cmd, arg);
1699	if (err == -EINVAL)
1700	err = cdrom_ioctl(&info->devinfo, bdev, mode, cmd, arg);
1701
1702	return err;
1703	}
1704
1705	static int idecd_ioctl(struct block_device *bdev, fmode_t mode,
1706	unsigned int cmd, unsigned long arg)
1707	{
1708	int ret;
1709
1710	mutex_lock(&ide_cd_mutex);
1711	ret = idecd_locked_ioctl(bdev, mode, cmd, arg);
1712	mutex_unlock(&ide_cd_mutex);
1713
1714	return ret;
1715	}
1716
1717	static int idecd_locked_compat_ioctl(struct block_device *bdev, fmode_t mode,
1718	unsigned int cmd, unsigned long arg)
1719	{
1720	struct cdrom_info *info = ide_drv_g(bdev->bd_disk, cdrom_info);
1721	void __user *argp = compat_ptr(arg);
1722	int err;
1723
1724	switch (cmd) {
1725	case CDROMSETSPINDOWN:
1726	return idecd_set_spindown(&info->devinfo, (unsigned long)argp);
1727	case CDROMGETSPINDOWN:
1728	return idecd_get_spindown(&info->devinfo, (unsigned long)argp);
1729	default:
1730	break;
1731	}
1732
1733	err = generic_ide_ioctl(info->drive, bdev, cmd, arg);
1734	if (err == -EINVAL)
1735	err = cdrom_ioctl(&info->devinfo, bdev, mode, cmd,
1736	(unsigned long)argp);
1737
1738	return err;
1739	}
1740
1741	static int idecd_compat_ioctl(struct block_device *bdev, fmode_t mode,
1742	unsigned int cmd, unsigned long arg)
1743	{
1744	int ret;
1745
1746	mutex_lock(&ide_cd_mutex);
1747	ret = idecd_locked_compat_ioctl(bdev, mode, cmd, arg);
1748	mutex_unlock(&ide_cd_mutex);
1749
1750	return ret;
1751	}
1752
1753	static unsigned int idecd_check_events(struct gendisk *disk,
1754	unsigned int clearing)
1755	{
1756	struct cdrom_info *info = ide_drv_g(disk, cdrom_info);
1757	return cdrom_check_events(&info->devinfo, clearing);
1758	}
1759
1760	static const struct block_device_operations idecd_ops = {
1761	.owner = THIS_MODULE,
1762	.open = idecd_open,
1763	.release = idecd_release,
1764	.ioctl = idecd_ioctl,
1765	.compat_ioctl = IS_ENABLED(CONFIG_COMPAT) ?
1766	idecd_compat_ioctl : NULL,
1767	.check_events = idecd_check_events,
1768	};
1769
1770	/* module options */
1771	static unsigned long debug_mask;
1772	module_param(debug_mask, ulong, 0644);
1773
1774	MODULE_DESCRIPTION("ATAPI CD-ROM Driver");
1775
1776	static int ide_cd_probe(ide_drive_t *drive)
1777	{
1778	struct cdrom_info *info;
1779	struct gendisk *g;
1780
1781	ide_debug_log(IDE_DBG_PROBE, "driver_req: %s, media: 0x%x",
1782	drive->driver_req, drive->media);
1783
1784	if (!strstr("ide-cdrom", drive->driver_req))
1785	goto failed;
1786
1787	if (drive->media != ide_cdrom && drive->media != ide_optical)
1788	goto failed;
1789
1790	drive->debug_mask = debug_mask;
1791	drive->irq_handler = cdrom_newpc_intr;
1792
1793	info = kzalloc(sizeof(struct cdrom_info), GFP_KERNEL);
1794	if (info == NULL) {
1795	printk(KERN_ERR PFX "%s: Can't allocate a cdrom structure\n",
1796	drive->name);
1797	goto failed;
1798	}
1799
1800	g = alloc_disk(1 << PARTN_BITS);
1801	if (!g)
1802	goto out_free_cd;
1803
1804	ide_init_disk(g, drive);
1805
1806	info->dev.parent = &drive->gendev;
1807	info->dev.release = ide_cd_release;
1808	dev_set_name(&info->dev, "%s", dev_name(&drive->gendev));
1809
1810	if (device_register(&info->dev))
1811	goto out_free_disk;
1812
1813	info->drive = drive;
1814	info->driver = &ide_cdrom_driver;
1815	info->disk = g;
1816
1817	g->private_data = &info->driver;
1818
1819	drive->driver_data = info;
1820
1821	g->minors = 1;
1822	g->flags = GENHD_FL_CD \| GENHD_FL_REMOVABLE;
1823	if (ide_cdrom_setup(drive)) {
1824	put_device(&info->dev);
1825	goto failed;
1826	}
1827
1828	ide_cd_read_toc(drive);
1829	g->fops = &idecd_ops;
1830	g->flags \|= GENHD_FL_REMOVABLE \| GENHD_FL_BLOCK_EVENTS_ON_EXCL_WRITE;
1831	g->events = DISK_EVENT_MEDIA_CHANGE;
1832	device_add_disk(&drive->gendev, g, NULL);
1833	return 0;
1834
1835	out_free_disk:
1836	put_disk(g);
1837	out_free_cd:
1838	kfree(info);
1839	failed:
1840	return -ENODEV;
1841	}
1842
1843	static void __exit ide_cdrom_exit(void)
1844	{
1845	driver_unregister(&ide_cdrom_driver.gen_driver);
1846	}
1847
1848	static int __init ide_cdrom_init(void)
1849	{
1850	printk(KERN_INFO DRV_NAME " driver " IDECD_VERSION "\n");
1851	return driver_register(&ide_cdrom_driver.gen_driver);
1852	}
1853
1854	MODULE_ALIAS("ide:m-cdrom");
1855	MODULE_ALIAS("ide-cd");
1856	module_init(ide_cdrom_init);
1857	module_exit(ide_cdrom_exit);
1858	MODULE_LICENSE("GPL");

drivers/ide/ide-cd.h+0−123

@@ -1,123 +0,0 @@
1	/* SPDX-License-Identifier: GPL-2.0 */
2	/*
3	* Copyright (C) 1996-98 Erik Andersen
4	* Copyright (C) 1998-2000 Jens Axboe
5	*/
6	#ifndef _IDE_CD_H
7	#define _IDE_CD_H
8
9	#include <linux/cdrom.h>
10	#include <asm/byteorder.h>
11
12	#define IDECD_DEBUG_LOG 0
13
14	#if IDECD_DEBUG_LOG
15	#define ide_debug_log(lvl, fmt, args...) __ide_debug_log(lvl, fmt, ## args)
16	#else
17	#define ide_debug_log(lvl, fmt, args...) do {} while (0)
18	#endif
19
20	#define ATAPI_WAIT_WRITE_BUSY (10 * HZ)
21
22	/************************************************************************/
23
24	#define SECTORS_PER_FRAME (CD_FRAMESIZE >> SECTOR_SHIFT)
25	#define SECTOR_BUFFER_SIZE (CD_FRAMESIZE * 32)
26
27	/* Capabilities Page size including 8 bytes of Mode Page Header */
28	#define ATAPI_CAPABILITIES_PAGE_SIZE (8 + 20)
29	#define ATAPI_CAPABILITIES_PAGE_PAD_SIZE 4
30
31	/* Structure of a MSF cdrom address. */
32	struct atapi_msf {
33	u8 reserved;
34	u8 minute;
35	u8 second;
36	u8 frame;
37	};
38
39	/* Space to hold the disk TOC. */
40	#define MAX_TRACKS 99
41	struct atapi_toc_header {
42	unsigned short toc_length;
43	u8 first_track;
44	u8 last_track;
45	};
46
47	struct atapi_toc_entry {
48	u8 reserved1;
49	#if defined(__BIG_ENDIAN_BITFIELD)
50	u8 adr : 4;
51	u8 control : 4;
52	#elif defined(__LITTLE_ENDIAN_BITFIELD)
53	u8 control : 4;
54	u8 adr : 4;
55	#else
56	#error "Please fix <asm/byteorder.h>"
57	#endif
58	u8 track;
59	u8 reserved2;
60	union {
61	unsigned lba;
62	struct atapi_msf msf;
63	} addr;
64	};
65
66	struct atapi_toc {
67	int last_session_lba;
68	int xa_flag;
69	unsigned long capacity;
70	struct atapi_toc_header hdr;
71	struct atapi_toc_entry ent[MAX_TRACKS+1];
72	/* One extra for the leadout. */
73	};
74
75	/* Extra per-device info for cdrom drives. */
76	struct cdrom_info {
77	ide_drive_t *drive;
78	struct ide_driver *driver;
79	struct gendisk *disk;
80	struct device dev;
81
82	/* Buffer for table of contents. NULL if we haven't allocated
83	a TOC buffer for this device yet. */
84
85	struct atapi_toc *toc;
86
87	u8 max_speed; /* Max speed of the drive. */
88	u8 current_speed; /* Current speed of the drive. */
89
90	/* Per-device info needed by cdrom.c generic driver. */
91	struct cdrom_device_info devinfo;
92
93	unsigned long write_timeout;
94	};
95
96	/* ide-cd_verbose.c */
97	void ide_cd_log_error(const char , struct request , struct request_sense *);
98
99	/* ide-cd.c functions used by ide-cd_ioctl.c */
100	int ide_cd_queue_pc(ide_drive_t , const unsigned char , int, void *,
101	unsigned , struct scsi_sense_hdr , int, req_flags_t);
102	int ide_cd_read_toc(ide_drive_t *);
103	int ide_cdrom_get_capabilities(ide_drive_t , u8 );
104	void ide_cdrom_update_speed(ide_drive_t , u8 );
105	int cdrom_check_status(ide_drive_t , struct scsi_sense_hdr );
106
107	/* ide-cd_ioctl.c */
108	int ide_cdrom_open_real(struct cdrom_device_info *, int);
109	void ide_cdrom_release_real(struct cdrom_device_info *);
110	int ide_cdrom_drive_status(struct cdrom_device_info *, int);
111	unsigned int ide_cdrom_check_events_real(struct cdrom_device_info *,
112	unsigned int clearing, int slot_nr);
113	int ide_cdrom_tray_move(struct cdrom_device_info *, int);
114	int ide_cdrom_lock_door(struct cdrom_device_info *, int);
115	int ide_cdrom_select_speed(struct cdrom_device_info *, int);
116	int ide_cdrom_get_last_session(struct cdrom_device_info *,
117	struct cdrom_multisession *);
118	int ide_cdrom_get_mcn(struct cdrom_device_info , struct cdrom_mcn );
119	int ide_cdrom_reset(struct cdrom_device_info *cdi);
120	int ide_cdrom_audio_ioctl(struct cdrom_device_info , unsigned int, void );
121	int ide_cdrom_packet(struct cdrom_device_info , struct packet_command );
122
123	#endif /* _IDE_CD_H */

drivers/ide/ide-cd_ioctl.c+0−468

@@ -1,468 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* cdrom.c IOCTLs handling for ide-cd driver.
4	*
5	* Copyright (C) 1994-1996 Scott Snyder <snyder@fnald0.fnal.gov>
6	* Copyright (C) 1996-1998 Erik Andersen <andersee@debian.org>
7	* Copyright (C) 1998-2000 Jens Axboe <axboe@suse.de>
8	*/
9
10	#include <linux/kernel.h>
11	#include <linux/cdrom.h>
12	#include <linux/gfp.h>
13	#include <linux/ide.h>
14	#include <scsi/scsi.h>
15
16	#include "ide-cd.h"
17
18	/****************************************************************************
19	* Other driver requests (open, close, check media change).
20	*/
21	int ide_cdrom_open_real(struct cdrom_device_info *cdi, int purpose)
22	{
23	return 0;
24	}
25
26	/*
27	* Close down the device. Invalidate all cached blocks.
28	*/
29	void ide_cdrom_release_real(struct cdrom_device_info *cdi)
30	{
31	ide_drive_t *drive = cdi->handle;
32
33	if (!cdi->use_count)
34	drive->atapi_flags &= ~IDE_AFLAG_TOC_VALID;
35	}
36
37	/*
38	* add logic to try GET_EVENT command first to check for media and tray
39	* status. this should be supported by newer cd-r/w and all DVD etc
40	* drives
41	*/
42	int ide_cdrom_drive_status(struct cdrom_device_info *cdi, int slot_nr)
43	{
44	ide_drive_t *drive = cdi->handle;
45	struct media_event_desc med;
46	struct scsi_sense_hdr sshdr;
47	int stat;
48
49	if (slot_nr != CDSL_CURRENT)
50	return -EINVAL;
51
52	stat = cdrom_check_status(drive, &sshdr);
53	if (!stat \|\| sshdr.sense_key == UNIT_ATTENTION)
54	return CDS_DISC_OK;
55
56	if (!cdrom_get_media_event(cdi, &med)) {
57	if (med.media_present)
58	return CDS_DISC_OK;
59	else if (med.door_open)
60	return CDS_TRAY_OPEN;
61	else
62	return CDS_NO_DISC;
63	}
64
65	if (sshdr.sense_key == NOT_READY && sshdr.asc == 0x04
66	&& sshdr.ascq == 0x04)
67	return CDS_DISC_OK;
68
69	/*
70	* If not using Mt Fuji extended media tray reports,
71	* just return TRAY_OPEN since ATAPI doesn't provide
72	* any other way to detect this...
73	*/
74	if (sshdr.sense_key == NOT_READY) {
75	if (sshdr.asc == 0x3a && sshdr.ascq == 1)
76	return CDS_NO_DISC;
77	else
78	return CDS_TRAY_OPEN;
79	}
80	return CDS_DRIVE_NOT_READY;
81	}
82
83	/*
84	* ide-cd always generates media changed event if media is missing, which
85	* makes it impossible to use for proper event reporting, so
86	* DISK_EVENT_FLAG_UEVENT is cleared in disk->event_flags
87	* and the following function is used only to trigger
88	* revalidation and never propagated to userland.
89	*/
90	unsigned int ide_cdrom_check_events_real(struct cdrom_device_info *cdi,
91	unsigned int clearing, int slot_nr)
92	{
93	ide_drive_t *drive = cdi->handle;
94	int retval;
95
96	if (slot_nr == CDSL_CURRENT) {
97	(void) cdrom_check_status(drive, NULL);
98	retval = (drive->dev_flags & IDE_DFLAG_MEDIA_CHANGED) ? 1 : 0;
99	drive->dev_flags &= ~IDE_DFLAG_MEDIA_CHANGED;
100	return retval ? DISK_EVENT_MEDIA_CHANGE : 0;
101	} else {
102	return 0;
103	}
104	}
105
106	/* Eject the disk if EJECTFLAG is 0.
107	If EJECTFLAG is 1, try to reload the disk. */
108	static
109	int cdrom_eject(ide_drive_t *drive, int ejectflag)
110	{
111	struct cdrom_info *cd = drive->driver_data;
112	struct cdrom_device_info *cdi = &cd->devinfo;
113	char loej = 0x02;
114	unsigned char cmd[BLK_MAX_CDB];
115
116	if ((drive->atapi_flags & IDE_AFLAG_NO_EJECT) && !ejectflag)
117	return -EDRIVE_CANT_DO_THIS;
118
119	/* reload fails on some drives, if the tray is locked */
120	if ((drive->atapi_flags & IDE_AFLAG_DOOR_LOCKED) && ejectflag)
121	return 0;
122
123	/* only tell drive to close tray if open, if it can do that */
124	if (ejectflag && (cdi->mask & CDC_CLOSE_TRAY))
125	loej = 0;
126
127	memset(cmd, 0, BLK_MAX_CDB);
128
129	cmd[0] = GPCMD_START_STOP_UNIT;
130	cmd[4] = loej \| (ejectflag != 0);
131
132	return ide_cd_queue_pc(drive, cmd, 0, NULL, NULL, NULL, 0, 0);
133	}
134
135	/* Lock the door if LOCKFLAG is nonzero; unlock it otherwise. */
136	static
137	int ide_cd_lockdoor(ide_drive_t *drive, int lockflag)
138	{
139	struct scsi_sense_hdr sshdr;
140	int stat;
141
142	/* If the drive cannot lock the door, just pretend. */
143	if ((drive->dev_flags & IDE_DFLAG_DOORLOCKING) == 0) {
144	stat = 0;
145	} else {
146	unsigned char cmd[BLK_MAX_CDB];
147
148	memset(cmd, 0, BLK_MAX_CDB);
149
150	cmd[0] = GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL;
151	cmd[4] = lockflag ? 1 : 0;
152
153	stat = ide_cd_queue_pc(drive, cmd, 0, NULL, NULL,
154	&sshdr, 0, 0);
155	}
156
157	/* If we got an illegal field error, the drive
158	probably cannot lock the door. */
159	if (stat != 0 &&
160	sshdr.sense_key == ILLEGAL_REQUEST &&
161	(sshdr.asc == 0x24 \|\| sshdr.asc == 0x20)) {
162	printk(KERN_ERR "%s: door locking not supported\n",
163	drive->name);
164	drive->dev_flags &= ~IDE_DFLAG_DOORLOCKING;
165	stat = 0;
166	}
167
168	/* no medium, that's alright. */
169	if (stat != 0 && sshdr.sense_key == NOT_READY && sshdr.asc == 0x3a)
170	stat = 0;
171
172	if (stat == 0) {
173	if (lockflag)
174	drive->atapi_flags \|= IDE_AFLAG_DOOR_LOCKED;
175	else
176	drive->atapi_flags &= ~IDE_AFLAG_DOOR_LOCKED;
177	}
178
179	return stat;
180	}
181
182	int ide_cdrom_tray_move(struct cdrom_device_info *cdi, int position)
183	{
184	ide_drive_t *drive = cdi->handle;
185
186	if (position) {
187	int stat = ide_cd_lockdoor(drive, 0);
188
189	if (stat)
190	return stat;
191	}
192
193	return cdrom_eject(drive, !position);
194	}
195
196	int ide_cdrom_lock_door(struct cdrom_device_info *cdi, int lock)
197	{
198	ide_drive_t *drive = cdi->handle;
199
200	return ide_cd_lockdoor(drive, lock);
201	}
202
203	/*
204	* ATAPI devices are free to select the speed you request or any slower
205	* rate. :-( Requesting too fast a speed will _not_ produce an error.
206	*/
207	int ide_cdrom_select_speed(struct cdrom_device_info *cdi, int speed)
208	{
209	ide_drive_t *drive = cdi->handle;
210	struct cdrom_info *cd = drive->driver_data;
211	u8 buf[ATAPI_CAPABILITIES_PAGE_SIZE];
212	int stat;
213	unsigned char cmd[BLK_MAX_CDB];
214
215	if (speed == 0)
216	speed = 0xffff; /* set to max */
217	else
218	speed = 177; / Nx to kbytes/s */
219
220	memset(cmd, 0, BLK_MAX_CDB);
221
222	cmd[0] = GPCMD_SET_SPEED;
223	/* Read Drive speed in kbytes/second MSB/LSB */
224	cmd[2] = (speed >> 8) & 0xff;
225	cmd[3] = speed & 0xff;
226	if ((cdi->mask & (CDC_CD_R \| CDC_CD_RW \| CDC_DVD_R)) !=
227	(CDC_CD_R \| CDC_CD_RW \| CDC_DVD_R)) {
228	/* Write Drive speed in kbytes/second MSB/LSB */
229	cmd[4] = (speed >> 8) & 0xff;
230	cmd[5] = speed & 0xff;
231	}
232
233	stat = ide_cd_queue_pc(drive, cmd, 0, NULL, NULL, NULL, 0, 0);
234
235	if (!ide_cdrom_get_capabilities(drive, buf)) {
236	ide_cdrom_update_speed(drive, buf);
237	cdi->speed = cd->current_speed;
238	}
239
240	return 0;
241	}
242
243	int ide_cdrom_get_last_session(struct cdrom_device_info *cdi,
244	struct cdrom_multisession *ms_info)
245	{
246	struct atapi_toc *toc;
247	ide_drive_t *drive = cdi->handle;
248	struct cdrom_info *info = drive->driver_data;
249	int ret;
250
251	if ((drive->atapi_flags & IDE_AFLAG_TOC_VALID) == 0 \|\| !info->toc) {
252	ret = ide_cd_read_toc(drive);
253	if (ret)
254	return ret;
255	}
256
257	toc = info->toc;
258	ms_info->addr.lba = toc->last_session_lba;
259	ms_info->xa_flag = toc->xa_flag;
260
261	return 0;
262	}
263
264	int ide_cdrom_get_mcn(struct cdrom_device_info *cdi,
265	struct cdrom_mcn *mcn_info)
266	{
267	ide_drive_t *drive = cdi->handle;
268	int stat, mcnlen;
269	char buf[24];
270	unsigned char cmd[BLK_MAX_CDB];
271	unsigned len = sizeof(buf);
272
273	memset(cmd, 0, BLK_MAX_CDB);
274
275	cmd[0] = GPCMD_READ_SUBCHANNEL;
276	cmd[1] = 2; /* MSF addressing */
277	cmd[2] = 0x40; /* request subQ data */
278	cmd[3] = 2; /* format */
279	cmd[8] = len;
280
281	stat = ide_cd_queue_pc(drive, cmd, 0, buf, &len, NULL, 0, 0);
282	if (stat)
283	return stat;
284
285	mcnlen = sizeof(mcn_info->medium_catalog_number) - 1;
286	memcpy(mcn_info->medium_catalog_number, buf + 9, mcnlen);
287	mcn_info->medium_catalog_number[mcnlen] = '\0';
288
289	return 0;
290	}
291
292	int ide_cdrom_reset(struct cdrom_device_info *cdi)
293	{
294	ide_drive_t *drive = cdi->handle;
295	struct cdrom_info *cd = drive->driver_data;
296	struct request *rq;
297	int ret;
298
299	rq = blk_get_request(drive->queue, REQ_OP_DRV_IN, 0);
300	ide_req(rq)->type = ATA_PRIV_MISC;
301	rq->rq_flags = RQF_QUIET;
302	blk_execute_rq(cd->disk, rq, 0);
303	ret = scsi_req(rq)->result ? -EIO : 0;
304	blk_put_request(rq);
305	/*
306	* A reset will unlock the door. If it was previously locked,
307	* lock it again.
308	*/
309	if (drive->atapi_flags & IDE_AFLAG_DOOR_LOCKED)
310	(void)ide_cd_lockdoor(drive, 1);
311
312	return ret;
313	}
314
315	static int ide_cd_get_toc_entry(ide_drive_t *drive, int track,
316	struct atapi_toc_entry **ent)
317	{
318	struct cdrom_info *info = drive->driver_data;
319	struct atapi_toc *toc = info->toc;
320	int ntracks;
321
322	/*
323	* don't serve cached data, if the toc isn't valid
324	*/
325	if ((drive->atapi_flags & IDE_AFLAG_TOC_VALID) == 0)
326	return -EINVAL;
327
328	/* Check validity of requested track number. */
329	ntracks = toc->hdr.last_track - toc->hdr.first_track + 1;
330
331	if (toc->hdr.first_track == CDROM_LEADOUT)
332	ntracks = 0;
333
334	if (track == CDROM_LEADOUT)
335	*ent = &toc->ent[ntracks];
336	else if (track < toc->hdr.first_track \|\| track > toc->hdr.last_track)
337	return -EINVAL;
338	else
339	*ent = &toc->ent[track - toc->hdr.first_track];
340
341	return 0;
342	}
343
344	static int ide_cd_fake_play_trkind(ide_drive_t drive, void arg)
345	{
346	struct cdrom_ti *ti = arg;
347	struct atapi_toc_entry first_toc, last_toc;
348	unsigned long lba_start, lba_end;
349	int stat;
350	unsigned char cmd[BLK_MAX_CDB];
351
352	stat = ide_cd_get_toc_entry(drive, ti->cdti_trk0, &first_toc);
353	if (stat)
354	return stat;
355
356	stat = ide_cd_get_toc_entry(drive, ti->cdti_trk1, &last_toc);
357	if (stat)
358	return stat;
359
360	if (ti->cdti_trk1 != CDROM_LEADOUT)
361	++last_toc;
362	lba_start = first_toc->addr.lba;
363	lba_end = last_toc->addr.lba;
364
365	if (lba_end <= lba_start)
366	return -EINVAL;
367
368	memset(cmd, 0, BLK_MAX_CDB);
369
370	cmd[0] = GPCMD_PLAY_AUDIO_MSF;
371	lba_to_msf(lba_start, &cmd[3], &cmd[4], &cmd[5]);
372	lba_to_msf(lba_end - 1, &cmd[6], &cmd[7], &cmd[8]);
373
374	return ide_cd_queue_pc(drive, cmd, 0, NULL, NULL, NULL, 0, 0);
375	}
376
377	static int ide_cd_read_tochdr(ide_drive_t drive, void arg)
378	{
379	struct cdrom_info *cd = drive->driver_data;
380	struct cdrom_tochdr *tochdr = arg;
381	struct atapi_toc *toc;
382	int stat;
383
384	/* Make sure our saved TOC is valid. */
385	stat = ide_cd_read_toc(drive);
386	if (stat)
387	return stat;
388
389	toc = cd->toc;
390	tochdr->cdth_trk0 = toc->hdr.first_track;
391	tochdr->cdth_trk1 = toc->hdr.last_track;
392
393	return 0;
394	}
395
396	static int ide_cd_read_tocentry(ide_drive_t drive, void arg)
397	{
398	struct cdrom_tocentry *tocentry = arg;
399	struct atapi_toc_entry *toce;
400	int stat;
401
402	stat = ide_cd_get_toc_entry(drive, tocentry->cdte_track, &toce);
403	if (stat)
404	return stat;
405
406	tocentry->cdte_ctrl = toce->control;
407	tocentry->cdte_adr = toce->adr;
408	if (tocentry->cdte_format == CDROM_MSF) {
409	lba_to_msf(toce->addr.lba,
410	&tocentry->cdte_addr.msf.minute,
411	&tocentry->cdte_addr.msf.second,
412	&tocentry->cdte_addr.msf.frame);
413	} else
414	tocentry->cdte_addr.lba = toce->addr.lba;
415
416	return 0;
417	}
418
419	int ide_cdrom_audio_ioctl(struct cdrom_device_info *cdi,
420	unsigned int cmd, void *arg)
421	{
422	ide_drive_t *drive = cdi->handle;
423
424	switch (cmd) {
425	/*
426	* emulate PLAY_AUDIO_TI command with PLAY_AUDIO_10, since
427	* atapi doesn't support it
428	*/
429	case CDROMPLAYTRKIND:
430	return ide_cd_fake_play_trkind(drive, arg);
431	case CDROMREADTOCHDR:
432	return ide_cd_read_tochdr(drive, arg);
433	case CDROMREADTOCENTRY:
434	return ide_cd_read_tocentry(drive, arg);
435	default:
436	return -EINVAL;
437	}
438	}
439
440	/* the generic packet interface to cdrom.c */
441	int ide_cdrom_packet(struct cdrom_device_info *cdi,
442	struct packet_command *cgc)
443	{
444	ide_drive_t *drive = cdi->handle;
445	req_flags_t flags = 0;
446	unsigned len = cgc->buflen;
447
448	if (cgc->timeout <= 0)
449	cgc->timeout = ATAPI_WAIT_PC;
450
451	/* here we queue the commands from the uniform CD-ROM
452	layer. the packet must be complete, as we do not
453	touch it at all. */
454
455	if (cgc->sshdr)
456	memset(cgc->sshdr, 0, sizeof(*cgc->sshdr));
457
458	if (cgc->quiet)
459	flags \|= RQF_QUIET;
460
461	cgc->stat = ide_cd_queue_pc(drive, cgc->cmd,
462	cgc->data_direction == CGC_DATA_WRITE,
463	cgc->buffer, &len,
464	cgc->sshdr, cgc->timeout, flags);
465	if (!cgc->stat)
466	cgc->buflen -= len;
467	return cgc->stat;
468	}

drivers/ide/ide-cd_verbose.c+0−362

@@ -1,362 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* Verbose error logging for ATAPI CD/DVD devices.
4	*
5	* Copyright (C) 1994-1996 Scott Snyder <snyder@fnald0.fnal.gov>
6	* Copyright (C) 1996-1998 Erik Andersen <andersee@debian.org>
7	* Copyright (C) 1998-2000 Jens Axboe <axboe@suse.de>
8	*/
9
10	#include <linux/kernel.h>
11	#include <linux/blkdev.h>
12	#include <linux/cdrom.h>
13	#include <linux/ide.h>
14	#include <scsi/scsi.h>
15	#include "ide-cd.h"
16
17	#ifndef CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS
18	void ide_cd_log_error(const char name, struct request failed_command,
19	struct request_sense *sense)
20	{
21	/* Suppress printing unit attention and `in progress of becoming ready'
22	errors when we're not being verbose. */
23	if (sense->sense_key == UNIT_ATTENTION \|\|
24	(sense->sense_key == NOT_READY && (sense->asc == 4 \|\|
25	sense->asc == 0x3a)))
26	return;
27
28	printk(KERN_ERR "%s: error code: 0x%02x sense_key: 0x%02x "
29	"asc: 0x%02x ascq: 0x%02x\n",
30	name, sense->error_code, sense->sense_key,
31	sense->asc, sense->ascq);
32	}
33	#else
34	/* The generic packet command opcodes for CD/DVD Logical Units,
35	* From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
36	static const struct {
37	unsigned short packet_command;
38	const char * const text;
39	} packet_command_texts[] = {
40	{ GPCMD_TEST_UNIT_READY, "Test Unit Ready" },
41	{ GPCMD_REQUEST_SENSE, "Request Sense" },
42	{ GPCMD_FORMAT_UNIT, "Format Unit" },
43	{ GPCMD_INQUIRY, "Inquiry" },
44	{ GPCMD_START_STOP_UNIT, "Start/Stop Unit" },
45	{ GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL, "Prevent/Allow Medium Removal" },
46	{ GPCMD_READ_FORMAT_CAPACITIES, "Read Format Capacities" },
47	{ GPCMD_READ_CDVD_CAPACITY, "Read Cd/Dvd Capacity" },
48	{ GPCMD_READ_10, "Read 10" },
49	{ GPCMD_WRITE_10, "Write 10" },
50	{ GPCMD_SEEK, "Seek" },
51	{ GPCMD_WRITE_AND_VERIFY_10, "Write and Verify 10" },
52	{ GPCMD_VERIFY_10, "Verify 10" },
53	{ GPCMD_FLUSH_CACHE, "Flush Cache" },
54	{ GPCMD_READ_SUBCHANNEL, "Read Subchannel" },
55	{ GPCMD_READ_TOC_PMA_ATIP, "Read Table of Contents" },
56	{ GPCMD_READ_HEADER, "Read Header" },
57	{ GPCMD_PLAY_AUDIO_10, "Play Audio 10" },
58	{ GPCMD_GET_CONFIGURATION, "Get Configuration" },
59	{ GPCMD_PLAY_AUDIO_MSF, "Play Audio MSF" },
60	{ GPCMD_PLAYAUDIO_TI, "Play Audio TrackIndex" },
61	{ GPCMD_GET_EVENT_STATUS_NOTIFICATION,
62	"Get Event Status Notification" },
63	{ GPCMD_PAUSE_RESUME, "Pause/Resume" },
64	{ GPCMD_STOP_PLAY_SCAN, "Stop Play/Scan" },
65	{ GPCMD_READ_DISC_INFO, "Read Disc Info" },
66	{ GPCMD_READ_TRACK_RZONE_INFO, "Read Track Rzone Info" },
67	{ GPCMD_RESERVE_RZONE_TRACK, "Reserve Rzone Track" },
68	{ GPCMD_SEND_OPC, "Send OPC" },
69	{ GPCMD_MODE_SELECT_10, "Mode Select 10" },
70	{ GPCMD_REPAIR_RZONE_TRACK, "Repair Rzone Track" },
71	{ GPCMD_MODE_SENSE_10, "Mode Sense 10" },
72	{ GPCMD_CLOSE_TRACK, "Close Track" },
73	{ GPCMD_BLANK, "Blank" },
74	{ GPCMD_SEND_EVENT, "Send Event" },
75	{ GPCMD_SEND_KEY, "Send Key" },
76	{ GPCMD_REPORT_KEY, "Report Key" },
77	{ GPCMD_LOAD_UNLOAD, "Load/Unload" },
78	{ GPCMD_SET_READ_AHEAD, "Set Read-ahead" },
79	{ GPCMD_READ_12, "Read 12" },
80	{ GPCMD_GET_PERFORMANCE, "Get Performance" },
81	{ GPCMD_SEND_DVD_STRUCTURE, "Send DVD Structure" },
82	{ GPCMD_READ_DVD_STRUCTURE, "Read DVD Structure" },
83	{ GPCMD_SET_STREAMING, "Set Streaming" },
84	{ GPCMD_READ_CD_MSF, "Read CD MSF" },
85	{ GPCMD_SCAN, "Scan" },
86	{ GPCMD_SET_SPEED, "Set Speed" },
87	{ GPCMD_PLAY_CD, "Play CD" },
88	{ GPCMD_MECHANISM_STATUS, "Mechanism Status" },
89	{ GPCMD_READ_CD, "Read CD" },
90	};
91
92	/* From Table 303 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
93	static const char * const sense_key_texts[16] = {
94	"No sense data",
95	"Recovered error",
96	"Not ready",
97	"Medium error",
98	"Hardware error",
99	"Illegal request",
100	"Unit attention",
101	"Data protect",
102	"Blank check",
103	"(reserved)",
104	"(reserved)",
105	"Aborted command",
106	"(reserved)",
107	"(reserved)",
108	"Miscompare",
109	"(reserved)",
110	};
111
112	/* From Table 304 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
113	static const struct {
114	unsigned long asc_ascq;
115	const char * const text;
116	} sense_data_texts[] = {
117	{ 0x000000, "No additional sense information" },
118	{ 0x000011, "Play operation in progress" },
119	{ 0x000012, "Play operation paused" },
120	{ 0x000013, "Play operation successfully completed" },
121	{ 0x000014, "Play operation stopped due to error" },
122	{ 0x000015, "No current audio status to return" },
123	{ 0x010c0a, "Write error - padding blocks added" },
124	{ 0x011700, "Recovered data with no error correction applied" },
125	{ 0x011701, "Recovered data with retries" },
126	{ 0x011702, "Recovered data with positive head offset" },
127	{ 0x011703, "Recovered data with negative head offset" },
128	{ 0x011704, "Recovered data with retries and/or CIRC applied" },
129	{ 0x011705, "Recovered data using previous sector ID" },
130	{ 0x011800, "Recovered data with error correction applied" },
131	{ 0x011801, "Recovered data with error correction and retries applied"},
132	{ 0x011802, "Recovered data - the data was auto-reallocated" },
133	{ 0x011803, "Recovered data with CIRC" },
134	{ 0x011804, "Recovered data with L-EC" },
135	{ 0x015d00, "Failure prediction threshold exceeded"
136	" - Predicted logical unit failure" },
137	{ 0x015d01, "Failure prediction threshold exceeded"
138	" - Predicted media failure" },
139	{ 0x015dff, "Failure prediction threshold exceeded - False" },
140	{ 0x017301, "Power calibration area almost full" },
141	{ 0x020400, "Logical unit not ready - cause not reportable" },
142	/* Following is misspelled in ATAPI 2.6, _and_ in Mt. Fuji */
143	{ 0x020401, "Logical unit not ready"
144	" - in progress [sic] of becoming ready" },
145	{ 0x020402, "Logical unit not ready - initializing command required" },
146	{ 0x020403, "Logical unit not ready - manual intervention required" },
147	{ 0x020404, "Logical unit not ready - format in progress" },
148	{ 0x020407, "Logical unit not ready - operation in progress" },
149	{ 0x020408, "Logical unit not ready - long write in progress" },
150	{ 0x020600, "No reference position found (media may be upside down)" },
151	{ 0x023000, "Incompatible medium installed" },
152	{ 0x023a00, "Medium not present" },
153	{ 0x025300, "Media load or eject failed" },
154	{ 0x025700, "Unable to recover table of contents" },
155	{ 0x030300, "Peripheral device write fault" },
156	{ 0x030301, "No write current" },
157	{ 0x030302, "Excessive write errors" },
158	{ 0x030c00, "Write error" },
159	{ 0x030c01, "Write error - Recovered with auto reallocation" },
160	{ 0x030c02, "Write error - auto reallocation failed" },
161	{ 0x030c03, "Write error - recommend reassignment" },
162	{ 0x030c04, "Compression check miscompare error" },
163	{ 0x030c05, "Data expansion occurred during compress" },
164	{ 0x030c06, "Block not compressible" },
165	{ 0x030c07, "Write error - recovery needed" },
166	{ 0x030c08, "Write error - recovery failed" },
167	{ 0x030c09, "Write error - loss of streaming" },
168	{ 0x031100, "Unrecovered read error" },
169	{ 0x031106, "CIRC unrecovered error" },
170	{ 0x033101, "Format command failed" },
171	{ 0x033200, "No defect spare location available" },
172	{ 0x033201, "Defect list update failure" },
173	{ 0x035100, "Erase failure" },
174	{ 0x037200, "Session fixation error" },
175	{ 0x037201, "Session fixation error writin lead-in" },
176	{ 0x037202, "Session fixation error writin lead-out" },
177	{ 0x037300, "CD control error" },
178	{ 0x037302, "Power calibration area is full" },
179	{ 0x037303, "Power calibration area error" },
180	{ 0x037304, "Program memory area / RMA update failure" },
181	{ 0x037305, "Program memory area / RMA is full" },
182	{ 0x037306, "Program memory area / RMA is (almost) full" },
183	{ 0x040200, "No seek complete" },
184	{ 0x040300, "Write fault" },
185	{ 0x040900, "Track following error" },
186	{ 0x040901, "Tracking servo failure" },
187	{ 0x040902, "Focus servo failure" },
188	{ 0x040903, "Spindle servo failure" },
189	{ 0x041500, "Random positioning error" },
190	{ 0x041501, "Mechanical positioning or changer error" },
191	{ 0x041502, "Positioning error detected by read of medium" },
192	{ 0x043c00, "Mechanical positioning or changer error" },
193	{ 0x044000, "Diagnostic failure on component (ASCQ)" },
194	{ 0x044400, "Internal CD/DVD logical unit failure" },
195	{ 0x04b600, "Media load mechanism failed" },
196	{ 0x051a00, "Parameter list length error" },
197	{ 0x052000, "Invalid command operation code" },
198	{ 0x052100, "Logical block address out of range" },
199	{ 0x052102, "Invalid address for write" },
200	{ 0x052400, "Invalid field in command packet" },
201	{ 0x052600, "Invalid field in parameter list" },
202	{ 0x052601, "Parameter not supported" },
203	{ 0x052602, "Parameter value invalid" },
204	{ 0x052700, "Write protected media" },
205	{ 0x052c00, "Command sequence error" },
206	{ 0x052c03, "Current program area is not empty" },
207	{ 0x052c04, "Current program area is empty" },
208	{ 0x053001, "Cannot read medium - unknown format" },
209	{ 0x053002, "Cannot read medium - incompatible format" },
210	{ 0x053900, "Saving parameters not supported" },
211	{ 0x054e00, "Overlapped commands attempted" },
212	{ 0x055302, "Medium removal prevented" },
213	{ 0x055500, "System resource failure" },
214	{ 0x056300, "End of user area encountered on this track" },
215	{ 0x056400, "Illegal mode for this track or incompatible medium" },
216	{ 0x056f00, "Copy protection key exchange failure"
217	" - Authentication failure" },
218	{ 0x056f01, "Copy protection key exchange failure - Key not present" },
219	{ 0x056f02, "Copy protection key exchange failure"
220	" - Key not established" },
221	{ 0x056f03, "Read of scrambled sector without authentication" },
222	{ 0x056f04, "Media region code is mismatched to logical unit" },
223	{ 0x056f05, "Drive region must be permanent"
224	" / region reset count error" },
225	{ 0x057203, "Session fixation error - incomplete track in session" },
226	{ 0x057204, "Empty or partially written reserved track" },
227	{ 0x057205, "No more RZONE reservations are allowed" },
228	{ 0x05bf00, "Loss of streaming" },
229	{ 0x062800, "Not ready to ready transition, medium may have changed" },
230	{ 0x062900, "Power on, reset or hardware reset occurred" },
231	{ 0x062a00, "Parameters changed" },
232	{ 0x062a01, "Mode parameters changed" },
233	{ 0x062e00, "Insufficient time for operation" },
234	{ 0x063f00, "Logical unit operating conditions have changed" },
235	{ 0x063f01, "Microcode has been changed" },
236	{ 0x065a00, "Operator request or state change input (unspecified)" },
237	{ 0x065a01, "Operator medium removal request" },
238	{ 0x0bb900, "Play operation aborted" },
239	/* Here we use 0xff for the key (not a valid key) to signify
240	* that these can have _any_ key value associated with them... */
241	{ 0xff0401, "Logical unit is in process of becoming ready" },
242	{ 0xff0400, "Logical unit not ready, cause not reportable" },
243	{ 0xff0402, "Logical unit not ready, initializing command required" },
244	{ 0xff0403, "Logical unit not ready, manual intervention required" },
245	{ 0xff0500, "Logical unit does not respond to selection" },
246	{ 0xff0800, "Logical unit communication failure" },
247	{ 0xff0802, "Logical unit communication parity error" },
248	{ 0xff0801, "Logical unit communication time-out" },
249	{ 0xff2500, "Logical unit not supported" },
250	{ 0xff4c00, "Logical unit failed self-configuration" },
251	{ 0xff3e00, "Logical unit has not self-configured yet" },
252	};
253
254	void ide_cd_log_error(const char name, struct request failed_command,
255	struct request_sense *sense)
256	{
257	int i;
258	const char *s = "bad sense key!";
259	char buf[80];
260
261	printk(KERN_ERR "ATAPI device %s:\n", name);
262	if (sense->error_code == 0x70)
263	printk(KERN_CONT " Error: ");
264	else if (sense->error_code == 0x71)
265	printk(" Deferred Error: ");
266	else if (sense->error_code == 0x7f)
267	printk(KERN_CONT " Vendor-specific Error: ");
268	else
269	printk(KERN_CONT " Unknown Error Type: ");
270
271	if (sense->sense_key < ARRAY_SIZE(sense_key_texts))
272	s = sense_key_texts[sense->sense_key];
273
274	printk(KERN_CONT "%s -- (Sense key=0x%02x)\n", s, sense->sense_key);
275
276	if (sense->asc == 0x40) {
277	sprintf(buf, "Diagnostic failure on component 0x%02x",
278	sense->ascq);
279	s = buf;
280	} else {
281	int lo = 0, mid, hi = ARRAY_SIZE(sense_data_texts);
282	unsigned long key = (sense->sense_key << 16);
283
284	key \|= (sense->asc << 8);
285	if (!(sense->ascq >= 0x80 && sense->ascq <= 0xdd))
286	key \|= sense->ascq;
287	s = NULL;
288
289	while (hi > lo) {
290	mid = (lo + hi) / 2;
291	if (sense_data_texts[mid].asc_ascq == key \|\|
292	sense_data_texts[mid].asc_ascq == (0xff0000\|key)) {
293	s = sense_data_texts[mid].text;
294	break;
295	} else if (sense_data_texts[mid].asc_ascq > key)
296	hi = mid;
297	else
298	lo = mid + 1;
299	}
300	}
301
302	if (s == NULL) {
303	if (sense->asc > 0x80)
304	s = "(vendor-specific error)";
305	else
306	s = "(reserved error code)";
307	}
308
309	printk(KERN_ERR " %s -- (asc=0x%02x, ascq=0x%02x)\n",
310	s, sense->asc, sense->ascq);
311
312	if (failed_command != NULL) {
313	int lo = 0, mid, hi = ARRAY_SIZE(packet_command_texts);
314	s = NULL;
315
316	while (hi > lo) {
317	mid = (lo + hi) / 2;
318	if (packet_command_texts[mid].packet_command ==
319	scsi_req(failed_command)->cmd[0]) {
320	s = packet_command_texts[mid].text;
321	break;
322	}
323	if (packet_command_texts[mid].packet_command >
324	scsi_req(failed_command)->cmd[0])
325	hi = mid;
326	else
327	lo = mid + 1;
328	}
329
330	printk(KERN_ERR " The failed \"%s\" packet command "
331	"was: \n \"", s);
332	for (i = 0; i < BLK_MAX_CDB; i++)
333	printk(KERN_CONT "%02x ", scsi_req(failed_command)->cmd[i]);
334	printk(KERN_CONT "\"\n");
335	}
336
337	/* The SKSV bit specifies validity of the sense_key_specific
338	* in the next two commands. It is bit 7 of the first byte.
339	* In the case of NOT_READY, if SKSV is set the drive can
340	* give us nice ETA readings.
341	*/
342	if (sense->sense_key == NOT_READY && (sense->sks[0] & 0x80)) {
343	int progress = (sense->sks[1] << 8 \| sense->sks[2]) * 100;
344
345	printk(KERN_ERR " Command is %02d%% complete\n",
346	progress / 0xffff);
347	}
348
349	if (sense->sense_key == ILLEGAL_REQUEST &&
350	(sense->sks[0] & 0x80) != 0) {
351	printk(KERN_ERR " Error in %s byte %d",
352	(sense->sks[0] & 0x40) != 0 ?
353	"command packet" : "command data",
354	(sense->sks[1] << 8) + sense->sks[2]);
355
356	if ((sense->sks[0] & 0x40) != 0)
357	printk(KERN_CONT " bit %d", sense->sks[0] & 0x07);
358
359	printk(KERN_CONT "\n");
360	}
361	}
362	#endif

drivers/ide/ide-cs.c+0−364

@@ -1,364 +0,0 @@
1	/*======================================================================
2
3	A driver for PCMCIA IDE/ATA disk cards
4
5	The contents of this file are subject to the Mozilla Public
6	License Version 1.1 (the "License"); you may not use this file
7	except in compliance with the License. You may obtain a copy of
8	the License at http://www.mozilla.org/MPL/
9
10	Software distributed under the License is distributed on an "AS
11	IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
12	implied. See the License for the specific language governing
13	rights and limitations under the License.
14
15	The initial developer of the original code is David A. Hinds
16	<dahinds@users.sourceforge.net>. Portions created by David A. Hinds
17	are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
18
19	Alternatively, the contents of this file may be used under the
20	terms of the GNU General Public License version 2 (the "GPL"), in
21	which case the provisions of the GPL are applicable instead of the
22	above. If you wish to allow the use of your version of this file
23	only under the terms of the GPL and not to allow others to use
24	your version of this file under the MPL, indicate your decision
25	by deleting the provisions above and replace them with the notice
26	and other provisions required by the GPL. If you do not delete
27	the provisions above, a recipient may use your version of this
28	file under either the MPL or the GPL.
29
30	======================================================================*/
31
32	#include <linux/module.h>
33	#include <linux/kernel.h>
34	#include <linux/init.h>
35	#include <linux/ptrace.h>
36	#include <linux/slab.h>
37	#include <linux/string.h>
38	#include <linux/timer.h>
39	#include <linux/ioport.h>
40	#include <linux/ide.h>
41	#include <linux/major.h>
42	#include <linux/delay.h>
43	#include <asm/io.h>
44
45	#include <pcmcia/cistpl.h>
46	#include <pcmcia/ds.h>
47	#include <pcmcia/cisreg.h>
48	#include <pcmcia/ciscode.h>
49
50	#define DRV_NAME "ide-cs"
51
52	/====================================================================/
53
54	/* Module parameters */
55
56	MODULE_AUTHOR("David Hinds <dahinds@users.sourceforge.net>");
57	MODULE_DESCRIPTION("PCMCIA ATA/IDE card driver");
58	MODULE_LICENSE("Dual MPL/GPL");
59
60	/====================================================================/
61
62	typedef struct ide_info_t {
63	struct pcmcia_device *p_dev;
64	struct ide_host *host;
65	int ndev;
66	} ide_info_t;
67
68	static void ide_release(struct pcmcia_device *);
69	static int ide_config(struct pcmcia_device *);
70
71	static void ide_detach(struct pcmcia_device *p_dev);
72
73	static int ide_probe(struct pcmcia_device *link)
74	{
75	ide_info_t *info;
76
77	dev_dbg(&link->dev, "ide_attach()\n");
78
79	/* Create new ide device */
80	info = kzalloc(sizeof(*info), GFP_KERNEL);
81	if (!info)
82	return -ENOMEM;
83
84	info->p_dev = link;
85	link->priv = info;
86
87	link->config_flags \|= CONF_ENABLE_IRQ \| CONF_AUTO_SET_IO \|
88	CONF_AUTO_SET_VPP \| CONF_AUTO_CHECK_VCC;
89
90	return ide_config(link);
91	} /* ide_attach */
92
93	static void ide_detach(struct pcmcia_device *link)
94	{
95	ide_info_t *info = link->priv;
96
97	dev_dbg(&link->dev, "ide_detach(0x%p)\n", link);
98
99	ide_release(link);
100
101	kfree(info);
102	} /* ide_detach */
103
104	static const struct ide_port_ops idecs_port_ops = {
105	.quirkproc = ide_undecoded_slave,
106	};
107
108	static const struct ide_port_info idecs_port_info = {
109	.port_ops = &idecs_port_ops,
110	.host_flags = IDE_HFLAG_NO_DMA,
111	.irq_flags = IRQF_SHARED,
112	.chipset = ide_pci,
113	};
114
115	static struct ide_host *idecs_register(unsigned long io, unsigned long ctl,
116	unsigned long irq, struct pcmcia_device *handle)
117	{
118	struct ide_host *host;
119	ide_hwif_t *hwif;
120	int i, rc;
121	struct ide_hw hw, *hws[] = { &hw };
122
123	if (!request_region(io, 8, DRV_NAME)) {
124	printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
125	DRV_NAME, io, io + 7);
126	return NULL;
127	}
128
129	if (!request_region(ctl, 1, DRV_NAME)) {
130	printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
131	DRV_NAME, ctl);
132	release_region(io, 8);
133	return NULL;
134	}
135
136	memset(&hw, 0, sizeof(hw));
137	ide_std_init_ports(&hw, io, ctl);
138	hw.irq = irq;
139	hw.dev = &handle->dev;
140
141	rc = ide_host_add(&idecs_port_info, hws, 1, &host);
142	if (rc)
143	goto out_release;
144
145	hwif = host->ports[0];
146
147	if (hwif->present)
148	return host;
149
150	/* retry registration in case device is still spinning up */
151	for (i = 0; i < 10; i++) {
152	msleep(100);
153	ide_port_scan(hwif);
154	if (hwif->present)
155	return host;
156	}
157
158	return host;
159
160	out_release:
161	release_region(ctl, 1);
162	release_region(io, 8);
163	return NULL;
164	}
165
166	static int pcmcia_check_one_config(struct pcmcia_device pdev, void priv_data)
167	{
168	int *is_kme = priv_data;
169
170	if ((pdev->resource[0]->flags & IO_DATA_PATH_WIDTH)
171	!= IO_DATA_PATH_WIDTH_8) {
172	pdev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
173	pdev->resource[0]->flags \|= IO_DATA_PATH_WIDTH_AUTO;
174	}
175	pdev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
176	pdev->resource[1]->flags \|= IO_DATA_PATH_WIDTH_8;
177
178	if (pdev->resource[1]->end) {
179	pdev->resource[0]->end = 8;
180	pdev->resource[1]->end = (*is_kme) ? 2 : 1;
181	} else {
182	if (pdev->resource[0]->end < 16)
183	return -ENODEV;
184	}
185
186	return pcmcia_request_io(pdev);
187	}
188
189	static int ide_config(struct pcmcia_device *link)
190	{
191	ide_info_t *info = link->priv;
192	int ret = 0, is_kme = 0;
193	unsigned long io_base, ctl_base;
194	struct ide_host *host;
195
196	dev_dbg(&link->dev, "ide_config(0x%p)\n", link);
197
198	is_kme = ((link->manf_id == MANFID_KME) &&
199	((link->card_id == PRODID_KME_KXLC005_A) \|\|
200	(link->card_id == PRODID_KME_KXLC005_B)));
201
202	if (pcmcia_loop_config(link, pcmcia_check_one_config, &is_kme)) {
203	link->config_flags &= ~CONF_AUTO_CHECK_VCC;
204	if (pcmcia_loop_config(link, pcmcia_check_one_config, &is_kme))
205	goto failed; /* No suitable config found */
206	}
207	io_base = link->resource[0]->start;
208	if (link->resource[1]->end)
209	ctl_base = link->resource[1]->start;
210	else
211	ctl_base = link->resource[0]->start + 0x0e;
212
213	if (!link->irq)
214	goto failed;
215
216	ret = pcmcia_enable_device(link);
217	if (ret)
218	goto failed;
219
220	/* disable drive interrupts during IDE probe */
221	outb(0x02, ctl_base);
222
223	/* special setup for KXLC005 card */
224	if (is_kme)
225	outb(0x81, ctl_base+1);
226
227	host = idecs_register(io_base, ctl_base, link->irq, link);
228	if (host == NULL && resource_size(link->resource[0]) == 0x20) {
229	outb(0x02, ctl_base + 0x10);
230	host = idecs_register(io_base + 0x10, ctl_base + 0x10,
231	link->irq, link);
232	}
233
234	if (host == NULL)
235	goto failed;
236
237	info->ndev = 1;
238	info->host = host;
239	dev_info(&link->dev, "ide-cs: hd%c: Vpp = %d.%d\n",
240	'a' + host->ports[0]->index * 2,
241	link->vpp / 10, link->vpp % 10);
242
243	return 0;
244
245	failed:
246	ide_release(link);
247	return -ENODEV;
248	} /* ide_config */
249
250	static void ide_release(struct pcmcia_device *link)
251	{
252	ide_info_t *info = link->priv;
253	struct ide_host *host = info->host;
254
255	dev_dbg(&link->dev, "ide_release(0x%p)\n", link);
256
257	if (info->ndev) {
258	ide_hwif_t *hwif = host->ports[0];
259	unsigned long data_addr, ctl_addr;
260
261	data_addr = hwif->io_ports.data_addr;
262	ctl_addr = hwif->io_ports.ctl_addr;
263
264	ide_host_remove(host);
265	info->ndev = 0;
266
267	release_region(ctl_addr, 1);
268	release_region(data_addr, 8);
269	}
270
271	pcmcia_disable_device(link);
272	} /* ide_release */
273
274
275	static const struct pcmcia_device_id ide_ids[] = {
276	PCMCIA_DEVICE_FUNC_ID(4),
277	PCMCIA_DEVICE_MANF_CARD(0x0000, 0x0000), /* Corsair */
278	PCMCIA_DEVICE_MANF_CARD(0x0007, 0x0000), /* Hitachi */
279	PCMCIA_DEVICE_MANF_CARD(0x000a, 0x0000), /* I-O Data CFA */
280	PCMCIA_DEVICE_MANF_CARD(0x001c, 0x0001), /* Mitsubishi CFA */
281	PCMCIA_DEVICE_MANF_CARD(0x0032, 0x0704),
282	PCMCIA_DEVICE_MANF_CARD(0x0032, 0x2904),
283	PCMCIA_DEVICE_MANF_CARD(0x0045, 0x0401), /* SanDisk CFA */
284	PCMCIA_DEVICE_MANF_CARD(0x004f, 0x0000), /* Kingston */
285	PCMCIA_DEVICE_MANF_CARD(0x0097, 0x1620), /* TI emulated */
286	PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */
287	PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d),
288	PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */
289	PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */
290	PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001),
291	PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */
292	PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */
293	PCMCIA_DEVICE_PROD_ID123("Caravelle", "PSC-IDE ", "PSC000", 0x8c36137c, 0xd0693ab8, 0x2768a9f0),
294	PCMCIA_DEVICE_PROD_ID123("CDROM", "IDE", "MCD-601p", 0x1b9179ca, 0xede88951, 0x0d902f74),
295	PCMCIA_DEVICE_PROD_ID123("PCMCIA", "IDE CARD", "F1", 0x281f1c5d, 0x1907960c, 0xf7fde8b9),
296	PCMCIA_DEVICE_PROD_ID12("ARGOSY", "CD-ROM", 0x78f308dc, 0x66536591),
297	PCMCIA_DEVICE_PROD_ID12("ARGOSY", "PnPIDE", 0x78f308dc, 0x0c694728),
298	PCMCIA_DEVICE_PROD_ID12("CNF ", "CD-ROM", 0x46d7db81, 0x66536591),
299	PCMCIA_DEVICE_PROD_ID12("CNF CD-M", "CD-ROM", 0x7d93b852, 0x66536591),
300	PCMCIA_DEVICE_PROD_ID12("Creative Technology Ltd.", "PCMCIA CD-ROM Interface Card", 0xff8c8a45, 0xfe8020c4),
301	PCMCIA_DEVICE_PROD_ID12("Digital Equipment Corporation.", "Digital Mobile Media CD-ROM", 0x17692a66, 0xef1dcbde),
302	PCMCIA_DEVICE_PROD_ID12("EXP", "CD+GAME", 0x6f58c983, 0x63c13aaf),
303	PCMCIA_DEVICE_PROD_ID12("EXP ", "CD-ROM", 0x0a5c52fd, 0x66536591),
304	PCMCIA_DEVICE_PROD_ID12("EXP ", "PnPIDE", 0x0a5c52fd, 0x0c694728),
305	PCMCIA_DEVICE_PROD_ID12("FREECOM", "PCCARD-IDE", 0x5714cbf7, 0x48e0ab8e),
306	PCMCIA_DEVICE_PROD_ID12("HITACHI", "FLASH", 0xf4f43949, 0x9eb86aae),
307	PCMCIA_DEVICE_PROD_ID12("HITACHI", "microdrive", 0xf4f43949, 0xa6d76178),
308	PCMCIA_DEVICE_PROD_ID12("Hyperstone", "Model1", 0x3d5b9ef5, 0xca6ab420),
309	PCMCIA_DEVICE_PROD_ID12("IBM", "microdrive", 0xb569a6e5, 0xa6d76178),
310	PCMCIA_DEVICE_PROD_ID12("IBM", "IBM17JSSFP20", 0xb569a6e5, 0xf2508753),
311	PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF CARD 1GB", 0x2e6d1829, 0x55d5bffb),
312	PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF CARD 4GB", 0x2e6d1829, 0x531e7d10),
313	PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF8GB", 0x2e6d1829, 0xacbe682e),
314	PCMCIA_DEVICE_PROD_ID12("IO DATA", "CBIDE2 ", 0x547e66dc, 0x8671043b),
315	PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDE", 0x547e66dc, 0x5c5ab149),
316	PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDEII", 0x547e66dc, 0xb3662674),
317	PCMCIA_DEVICE_PROD_ID12("LOOKMEET", "CBIDE2 ", 0xe37be2b5, 0x8671043b),
318	PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF300", 0x7ed2ad87, 0x7e9e78ee),
319	PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF500", 0x7ed2ad87, 0x7a13045c),
320	PCMCIA_DEVICE_PROD_ID2("NinjaATA-", 0xebe0bd79),
321	PCMCIA_DEVICE_PROD_ID12("PCMCIA", "CD-ROM", 0x281f1c5d, 0x66536591),
322	PCMCIA_DEVICE_PROD_ID12("PCMCIA", "PnPIDE", 0x281f1c5d, 0x0c694728),
323	PCMCIA_DEVICE_PROD_ID12("SHUTTLE TECHNOLOGY LTD.", "PCCARD-IDE/ATAPI Adapter", 0x4a3f0ba0, 0x322560e1),
324	PCMCIA_DEVICE_PROD_ID12("SEAGATE", "ST1", 0x87c1b330, 0xe1f30883),
325	PCMCIA_DEVICE_PROD_ID12("SAMSUNG", "04/05/06", 0x43d74cb4, 0x6a22777d),
326	PCMCIA_DEVICE_PROD_ID12("SMI VENDOR", "SMI PRODUCT", 0x30896c92, 0x703cc5f6),
327	PCMCIA_DEVICE_PROD_ID12("TOSHIBA", "MK2001MPL", 0xb4585a1a, 0x3489e003),
328	PCMCIA_DEVICE_PROD_ID1("TRANSCEND 512M ", 0xd0909443),
329	PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF45", 0x709b1bf1, 0xf68b6f32),
330	PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF80", 0x709b1bf1, 0x2a54d4b1),
331	PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS2GCF120", 0x709b1bf1, 0x969aa4f2),
332	PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF120", 0x709b1bf1, 0xf54a91c8),
333	PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF133", 0x709b1bf1, 0x7558f133),
334	PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS8GCF133", 0x709b1bf1, 0xb2f89b47),
335	PCMCIA_DEVICE_PROD_ID12("WIT", "IDE16", 0x244e5994, 0x3e232852),
336	PCMCIA_DEVICE_PROD_ID12("WEIDA", "TWTTI", 0xcc7cf69c, 0x212bb918),
337	PCMCIA_DEVICE_PROD_ID1("STI Flash", 0xe4a13209),
338	PCMCIA_DEVICE_PROD_ID12("STI", "Flash 5.0", 0xbf2df18d, 0x8cb57a0e),
339	PCMCIA_MFC_DEVICE_PROD_ID12(1, "SanDisk", "ConnectPlus", 0x7a954bd9, 0x74be00c6),
340	PCMCIA_DEVICE_PROD_ID2("Flash Card", 0x5a362506),
341	PCMCIA_DEVICE_NULL,
342	};
343	MODULE_DEVICE_TABLE(pcmcia, ide_ids);
344
345	static struct pcmcia_driver ide_cs_driver = {
346	.owner = THIS_MODULE,
347	.name = "ide-cs",
348	.probe = ide_probe,
349	.remove = ide_detach,
350	.id_table = ide_ids,
351	};
352
353	static int __init init_ide_cs(void)
354	{
355	return pcmcia_register_driver(&ide_cs_driver);
356	}
357
358	static void __exit exit_ide_cs(void)
359	{
360	pcmcia_unregister_driver(&ide_cs_driver);
361	}
362
363	late_initcall(init_ide_cs);
364	module_exit(exit_ide_cs);

drivers/ide/ide-devsets.c+0−192

@@ -1,192 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2
3	#include <linux/kernel.h>
4	#include <linux/gfp.h>
5	#include <linux/ide.h>
6
7	DEFINE_MUTEX(ide_setting_mtx);
8
9	ide_devset_get(io_32bit, io_32bit);
10
11	static int set_io_32bit(ide_drive_t *drive, int arg)
12	{
13	if (drive->dev_flags & IDE_DFLAG_NO_IO_32BIT)
14	return -EPERM;
15
16	if (arg < 0 \|\| arg > 1 + (SUPPORT_VLB_SYNC << 1))
17	return -EINVAL;
18
19	drive->io_32bit = arg;
20
21	return 0;
22	}
23
24	ide_devset_get_flag(ksettings, IDE_DFLAG_KEEP_SETTINGS);
25
26	static int set_ksettings(ide_drive_t *drive, int arg)
27	{
28	if (arg < 0 \|\| arg > 1)
29	return -EINVAL;
30
31	if (arg)
32	drive->dev_flags \|= IDE_DFLAG_KEEP_SETTINGS;
33	else
34	drive->dev_flags &= ~IDE_DFLAG_KEEP_SETTINGS;
35
36	return 0;
37	}
38
39	ide_devset_get_flag(using_dma, IDE_DFLAG_USING_DMA);
40
41	static int set_using_dma(ide_drive_t *drive, int arg)
42	{
43	#ifdef CONFIG_BLK_DEV_IDEDMA
44	int err = -EPERM;
45
46	if (arg < 0 \|\| arg > 1)
47	return -EINVAL;
48
49	if (ata_id_has_dma(drive->id) == 0)
50	goto out;
51
52	if (drive->hwif->dma_ops == NULL)
53	goto out;
54
55	err = 0;
56
57	if (arg) {
58	if (ide_set_dma(drive))
59	err = -EIO;
60	} else
61	ide_dma_off(drive);
62
63	out:
64	return err;
65	#else
66	if (arg < 0 \|\| arg > 1)
67	return -EINVAL;
68
69	return -EPERM;
70	#endif
71	}
72
73	/*
74	* handle HDIO_SET_PIO_MODE ioctl abusers here, eventually it will go away
75	*/
76	static int set_pio_mode_abuse(ide_hwif_t *hwif, u8 req_pio)
77	{
78	switch (req_pio) {
79	case 202:
80	case 201:
81	case 200:
82	case 102:
83	case 101:
84	case 100:
85	return (hwif->host_flags & IDE_HFLAG_ABUSE_DMA_MODES) ? 1 : 0;
86	case 9:
87	case 8:
88	return (hwif->host_flags & IDE_HFLAG_ABUSE_PREFETCH) ? 1 : 0;
89	case 7:
90	case 6:
91	return (hwif->host_flags & IDE_HFLAG_ABUSE_FAST_DEVSEL) ? 1 : 0;
92	default:
93	return 0;
94	}
95	}
96
97	static int set_pio_mode(ide_drive_t *drive, int arg)
98	{
99	ide_hwif_t *hwif = drive->hwif;
100	const struct ide_port_ops *port_ops = hwif->port_ops;
101
102	if (arg < 0 \|\| arg > 255)
103	return -EINVAL;
104
105	if (port_ops == NULL \|\| port_ops->set_pio_mode == NULL \|\|
106	(hwif->host_flags & IDE_HFLAG_NO_SET_MODE))
107	return -ENOSYS;
108
109	if (set_pio_mode_abuse(drive->hwif, arg)) {
110	drive->pio_mode = arg + XFER_PIO_0;
111
112	if (arg == 8 \|\| arg == 9) {
113	unsigned long flags;
114
115	/* take lock for IDE_DFLAG_[NO_]UNMASK/[NO_]IO_32BIT */
116	spin_lock_irqsave(&hwif->lock, flags);
117	port_ops->set_pio_mode(hwif, drive);
118	spin_unlock_irqrestore(&hwif->lock, flags);
119	} else
120	port_ops->set_pio_mode(hwif, drive);
121	} else {
122	int keep_dma = !!(drive->dev_flags & IDE_DFLAG_USING_DMA);
123
124	ide_set_pio(drive, arg);
125
126	if (hwif->host_flags & IDE_HFLAG_SET_PIO_MODE_KEEP_DMA) {
127	if (keep_dma)
128	ide_dma_on(drive);
129	}
130	}
131
132	return 0;
133	}
134
135	ide_devset_get_flag(unmaskirq, IDE_DFLAG_UNMASK);
136
137	static int set_unmaskirq(ide_drive_t *drive, int arg)
138	{
139	if (drive->dev_flags & IDE_DFLAG_NO_UNMASK)
140	return -EPERM;
141
142	if (arg < 0 \|\| arg > 1)
143	return -EINVAL;
144
145	if (arg)
146	drive->dev_flags \|= IDE_DFLAG_UNMASK;
147	else
148	drive->dev_flags &= ~IDE_DFLAG_UNMASK;
149
150	return 0;
151	}
152
153	ide_ext_devset_rw_sync(io_32bit, io_32bit);
154	ide_ext_devset_rw_sync(keepsettings, ksettings);
155	ide_ext_devset_rw_sync(unmaskirq, unmaskirq);
156	ide_ext_devset_rw_sync(using_dma, using_dma);
157	__IDE_DEVSET(pio_mode, DS_SYNC, NULL, set_pio_mode);
158
159	int ide_devset_execute(ide_drive_t drive, const struct ide_devset setting,
160	int arg)
161	{
162	struct request_queue *q = drive->queue;
163	struct request *rq;
164	int ret = 0;
165
166	if (!(setting->flags & DS_SYNC))
167	return setting->set(drive, arg);
168
169	rq = blk_get_request(q, REQ_OP_DRV_IN, 0);
170	ide_req(rq)->type = ATA_PRIV_MISC;
171	scsi_req(rq)->cmd_len = 5;
172	scsi_req(rq)->cmd[0] = REQ_DEVSET_EXEC;
173	(int )&scsi_req(rq)->cmd[1] = arg;
174	ide_req(rq)->special = setting->set;
175
176	blk_execute_rq(NULL, rq, 0);
177	ret = scsi_req(rq)->result;
178	blk_put_request(rq);
179
180	return ret;
181	}
182
183	ide_startstop_t ide_do_devset(ide_drive_t drive, struct request rq)
184	{
185	int err, (setfunc)(ide_drive_t , int) = ide_req(rq)->special;
186
187	err = setfunc(drive, (int )&scsi_req(rq)->cmd[1]);
188	if (err)
189	scsi_req(rq)->result = err;
190	ide_complete_rq(drive, 0, blk_rq_bytes(rq));
191	return ide_stopped;
192	}

drivers/ide/ide-disk.c+0−795

@@ -1,795 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* Copyright (C) 1994-1998 Linus Torvalds & authors (see below)
4	* Copyright (C) 1998-2002 Linux ATA Development
5	* Andre Hedrick <andre@linux-ide.org>
6	* Copyright (C) 2003 Red Hat
7	* Copyright (C) 2003-2005, 2007 Bartlomiej Zolnierkiewicz
8	*/
9
10	/*
11	* Mostly written by Mark Lord <mlord@pobox.com>
12	* and Gadi Oxman <gadio@netvision.net.il>
13	* and Andre Hedrick <andre@linux-ide.org>
14	*
15	* This is the IDE/ATA disk driver, as evolved from hd.c and ide.c.
16	*/
17
18	#include <linux/types.h>
19	#include <linux/string.h>
20	#include <linux/kernel.h>
21	#include <linux/timer.h>
22	#include <linux/mm.h>
23	#include <linux/interrupt.h>
24	#include <linux/major.h>
25	#include <linux/errno.h>
26	#include <linux/genhd.h>
27	#include <linux/slab.h>
28	#include <linux/delay.h>
29	#include <linux/mutex.h>
30	#include <linux/leds.h>
31	#include <linux/ide.h>
32
33	#include <asm/byteorder.h>
34	#include <asm/irq.h>
35	#include <linux/uaccess.h>
36	#include <asm/io.h>
37	#include <asm/div64.h>
38
39	#include "ide-disk.h"
40
41	static const u8 ide_rw_cmds[] = {
42	ATA_CMD_READ_MULTI,
43	ATA_CMD_WRITE_MULTI,
44	ATA_CMD_READ_MULTI_EXT,
45	ATA_CMD_WRITE_MULTI_EXT,
46	ATA_CMD_PIO_READ,
47	ATA_CMD_PIO_WRITE,
48	ATA_CMD_PIO_READ_EXT,
49	ATA_CMD_PIO_WRITE_EXT,
50	ATA_CMD_READ,
51	ATA_CMD_WRITE,
52	ATA_CMD_READ_EXT,
53	ATA_CMD_WRITE_EXT,
54	};
55
56	static void ide_tf_set_cmd(ide_drive_t drive, struct ide_cmd cmd, u8 dma)
57	{
58	u8 index, lba48, write;
59
60	lba48 = (cmd->tf_flags & IDE_TFLAG_LBA48) ? 2 : 0;
61	write = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 1 : 0;
62
63	if (dma) {
64	cmd->protocol = ATA_PROT_DMA;
65	index = 8;
66	} else {
67	cmd->protocol = ATA_PROT_PIO;
68	if (drive->mult_count) {
69	cmd->tf_flags \|= IDE_TFLAG_MULTI_PIO;
70	index = 0;
71	} else
72	index = 4;
73	}
74
75	cmd->tf.command = ide_rw_cmds[index + lba48 + write];
76	}
77
78	/*
79	* __ide_do_rw_disk() issues READ and WRITE commands to a disk,
80	* using LBA if supported, or CHS otherwise, to address sectors.
81	*/
82	static ide_startstop_t __ide_do_rw_disk(ide_drive_t drive, struct request rq,
83	sector_t block)
84	{
85	ide_hwif_t *hwif = drive->hwif;
86	u16 nsectors = (u16)blk_rq_sectors(rq);
87	u8 lba48 = !!(drive->dev_flags & IDE_DFLAG_LBA48);
88	u8 dma = !!(drive->dev_flags & IDE_DFLAG_USING_DMA);
89	struct ide_cmd cmd;
90	struct ide_taskfile *tf = &cmd.tf;
91	ide_startstop_t rc;
92
93	if ((hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA) && lba48 && dma) {
94	if (block + blk_rq_sectors(rq) > 1ULL << 28)
95	dma = 0;
96	else
97	lba48 = 0;
98	}
99
100	memset(&cmd, 0, sizeof(cmd));
101	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
102	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
103
104	if (drive->dev_flags & IDE_DFLAG_LBA) {
105	if (lba48) {
106	pr_debug("%s: LBA=0x%012llx\n", drive->name,
107	(unsigned long long)block);
108
109	tf->nsect = nsectors & 0xff;
110	tf->lbal = (u8) block;
111	tf->lbam = (u8)(block >> 8);
112	tf->lbah = (u8)(block >> 16);
113	tf->device = ATA_LBA;
114
115	tf = &cmd.hob;
116	tf->nsect = (nsectors >> 8) & 0xff;
117	tf->lbal = (u8)(block >> 24);
118	if (sizeof(block) != 4) {
119	tf->lbam = (u8)((u64)block >> 32);
120	tf->lbah = (u8)((u64)block >> 40);
121	}
122
123	cmd.valid.out.hob = IDE_VALID_OUT_HOB;
124	cmd.valid.in.hob = IDE_VALID_IN_HOB;
125	cmd.tf_flags \|= IDE_TFLAG_LBA48;
126	} else {
127	tf->nsect = nsectors & 0xff;
128	tf->lbal = block;
129	tf->lbam = block >>= 8;
130	tf->lbah = block >>= 8;
131	tf->device = ((block >> 8) & 0xf) \| ATA_LBA;
132	}
133	} else {
134	unsigned int sect, head, cyl, track;
135
136	track = (int)block / drive->sect;
137	sect = (int)block % drive->sect + 1;
138	head = track % drive->head;
139	cyl = track / drive->head;
140
141	pr_debug("%s: CHS=%u/%u/%u\n", drive->name, cyl, head, sect);
142
143	tf->nsect = nsectors & 0xff;
144	tf->lbal = sect;
145	tf->lbam = cyl;
146	tf->lbah = cyl >> 8;
147	tf->device = head;
148	}
149
150	cmd.tf_flags \|= IDE_TFLAG_FS;
151
152	if (rq_data_dir(rq))
153	cmd.tf_flags \|= IDE_TFLAG_WRITE;
154
155	ide_tf_set_cmd(drive, &cmd, dma);
156	cmd.rq = rq;
157
158	if (dma == 0) {
159	ide_init_sg_cmd(&cmd, nsectors << 9);
160	ide_map_sg(drive, &cmd);
161	}
162
163	rc = do_rw_taskfile(drive, &cmd);
164
165	if (rc == ide_stopped && dma) {
166	/* fallback to PIO */
167	cmd.tf_flags \|= IDE_TFLAG_DMA_PIO_FALLBACK;
168	ide_tf_set_cmd(drive, &cmd, 0);
169	ide_init_sg_cmd(&cmd, nsectors << 9);
170	rc = do_rw_taskfile(drive, &cmd);
171	}
172
173	return rc;
174	}
175
176	/*
177	* 268435455 == 137439 MB or 28bit limit
178	* 320173056 == 163929 MB or 48bit addressing
179	* 1073741822 == 549756 MB or 48bit addressing fake drive
180	*/
181
182	static ide_startstop_t ide_do_rw_disk(ide_drive_t drive, struct request rq,
183	sector_t block)
184	{
185	ide_hwif_t *hwif = drive->hwif;
186
187	BUG_ON(drive->dev_flags & IDE_DFLAG_BLOCKED);
188	BUG_ON(blk_rq_is_passthrough(rq));
189
190	ledtrig_disk_activity(rq_data_dir(rq) == WRITE);
191
192	pr_debug("%s: %sing: block=%llu, sectors=%u\n",
193	drive->name, rq_data_dir(rq) == READ ? "read" : "writ",
194	(unsigned long long)block, blk_rq_sectors(rq));
195
196	if (hwif->rw_disk)
197	hwif->rw_disk(drive, rq);
198
199	return __ide_do_rw_disk(drive, rq, block);
200	}
201
202	/*
203	* Queries for true maximum capacity of the drive.
204	* Returns maximum LBA address (> 0) of the drive, 0 if failed.
205	*/
206	static u64 idedisk_read_native_max_address(ide_drive_t *drive, int lba48)
207	{
208	struct ide_cmd cmd;
209	struct ide_taskfile *tf = &cmd.tf;
210	u64 addr = 0;
211
212	memset(&cmd, 0, sizeof(cmd));
213	if (lba48)
214	tf->command = ATA_CMD_READ_NATIVE_MAX_EXT;
215	else
216	tf->command = ATA_CMD_READ_NATIVE_MAX;
217	tf->device = ATA_LBA;
218
219	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
220	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
221	if (lba48) {
222	cmd.valid.out.hob = IDE_VALID_OUT_HOB;
223	cmd.valid.in.hob = IDE_VALID_IN_HOB;
224	cmd.tf_flags = IDE_TFLAG_LBA48;
225	}
226
227	ide_no_data_taskfile(drive, &cmd);
228
229	/* if OK, compute maximum address value */
230	if (!(tf->status & ATA_ERR))
231	addr = ide_get_lba_addr(&cmd, lba48) + 1;
232
233	return addr;
234	}
235
236	/*
237	* Sets maximum virtual LBA address of the drive.
238	* Returns new maximum virtual LBA address (> 0) or 0 on failure.
239	*/
240	static u64 idedisk_set_max_address(ide_drive_t *drive, u64 addr_req, int lba48)
241	{
242	struct ide_cmd cmd;
243	struct ide_taskfile *tf = &cmd.tf;
244	u64 addr_set = 0;
245
246	addr_req--;
247
248	memset(&cmd, 0, sizeof(cmd));
249	tf->lbal = (addr_req >> 0) & 0xff;
250	tf->lbam = (addr_req >>= 8) & 0xff;
251	tf->lbah = (addr_req >>= 8) & 0xff;
252	if (lba48) {
253	cmd.hob.lbal = (addr_req >>= 8) & 0xff;
254	cmd.hob.lbam = (addr_req >>= 8) & 0xff;
255	cmd.hob.lbah = (addr_req >>= 8) & 0xff;
256	tf->command = ATA_CMD_SET_MAX_EXT;
257	} else {
258	tf->device = (addr_req >>= 8) & 0x0f;
259	tf->command = ATA_CMD_SET_MAX;
260	}
261	tf->device \|= ATA_LBA;
262
263	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
264	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
265	if (lba48) {
266	cmd.valid.out.hob = IDE_VALID_OUT_HOB;
267	cmd.valid.in.hob = IDE_VALID_IN_HOB;
268	cmd.tf_flags = IDE_TFLAG_LBA48;
269	}
270
271	ide_no_data_taskfile(drive, &cmd);
272
273	/* if OK, compute maximum address value */
274	if (!(tf->status & ATA_ERR))
275	addr_set = ide_get_lba_addr(&cmd, lba48) + 1;
276
277	return addr_set;
278	}
279
280	static unsigned long long sectors_to_MB(unsigned long long n)
281	{
282	n <<= 9; /* make it bytes */
283	do_div(n, 1000000); /* make it MB */
284	return n;
285	}
286
287	/*
288	* Some disks report total number of sectors instead of
289	* maximum sector address. We list them here.
290	*/
291	static const struct drive_list_entry hpa_list[] = {
292	{ "ST340823A", NULL },
293	{ "ST320413A", NULL },
294	{ "ST310211A", NULL },
295	{ NULL, NULL }
296	};
297
298	static u64 ide_disk_hpa_get_native_capacity(ide_drive_t *drive, int lba48)
299	{
300	u64 capacity, set_max;
301
302	capacity = drive->capacity64;
303	set_max = idedisk_read_native_max_address(drive, lba48);
304
305	if (ide_in_drive_list(drive->id, hpa_list)) {
306	/*
307	* Since we are inclusive wrt to firmware revisions do this
308	* extra check and apply the workaround only when needed.
309	*/
310	if (set_max == capacity + 1)
311	set_max--;
312	}
313
314	return set_max;
315	}
316
317	static u64 ide_disk_hpa_set_capacity(ide_drive_t *drive, u64 set_max, int lba48)
318	{
319	set_max = idedisk_set_max_address(drive, set_max, lba48);
320	if (set_max)
321	drive->capacity64 = set_max;
322
323	return set_max;
324	}
325
326	static void idedisk_check_hpa(ide_drive_t *drive)
327	{
328	u64 capacity, set_max;
329	int lba48 = ata_id_lba48_enabled(drive->id);
330
331	capacity = drive->capacity64;
332	set_max = ide_disk_hpa_get_native_capacity(drive, lba48);
333
334	if (set_max <= capacity)
335	return;
336
337	drive->probed_capacity = set_max;
338
339	printk(KERN_INFO "%s: Host Protected Area detected.\n"
340	"\tcurrent capacity is %llu sectors (%llu MB)\n"
341	"\tnative capacity is %llu sectors (%llu MB)\n",
342	drive->name,
343	capacity, sectors_to_MB(capacity),
344	set_max, sectors_to_MB(set_max));
345
346	if ((drive->dev_flags & IDE_DFLAG_NOHPA) == 0)
347	return;
348
349	set_max = ide_disk_hpa_set_capacity(drive, set_max, lba48);
350	if (set_max)
351	printk(KERN_INFO "%s: Host Protected Area disabled.\n",
352	drive->name);
353	}
354
355	static int ide_disk_get_capacity(ide_drive_t *drive)
356	{
357	u16 *id = drive->id;
358	int lba;
359
360	if (ata_id_lba48_enabled(id)) {
361	/* drive speaks 48-bit LBA */
362	lba = 1;
363	drive->capacity64 = ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
364	} else if (ata_id_has_lba(id) && ata_id_is_lba_capacity_ok(id)) {
365	/* drive speaks 28-bit LBA */
366	lba = 1;
367	drive->capacity64 = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
368	} else {
369	/* drive speaks boring old 28-bit CHS */
370	lba = 0;
371	drive->capacity64 = drive->cyl * drive->head * drive->sect;
372	}
373
374	drive->probed_capacity = drive->capacity64;
375
376	if (lba) {
377	drive->dev_flags \|= IDE_DFLAG_LBA;
378
379	/*
380	* If this device supports the Host Protected Area feature set,
381	* then we may need to change our opinion about its capacity.
382	*/
383	if (ata_id_hpa_enabled(id))
384	idedisk_check_hpa(drive);
385	}
386
387	/* limit drive capacity to 137GB if LBA48 cannot be used */
388	if ((drive->dev_flags & IDE_DFLAG_LBA48) == 0 &&
389	drive->capacity64 > 1ULL << 28) {
390	printk(KERN_WARNING "%s: cannot use LBA48 - full capacity "
391	"%llu sectors (%llu MB)\n",
392	drive->name, (unsigned long long)drive->capacity64,
393	sectors_to_MB(drive->capacity64));
394	drive->probed_capacity = drive->capacity64 = 1ULL << 28;
395	}
396
397	if ((drive->hwif->host_flags & IDE_HFLAG_NO_LBA48_DMA) &&
398	(drive->dev_flags & IDE_DFLAG_LBA48)) {
399	if (drive->capacity64 > 1ULL << 28) {
400	printk(KERN_INFO "%s: cannot use LBA48 DMA - PIO mode"
401	" will be used for accessing sectors "
402	"> %u\n", drive->name, 1 << 28);
403	} else
404	drive->dev_flags &= ~IDE_DFLAG_LBA48;
405	}
406
407	return 0;
408	}
409
410	static void ide_disk_unlock_native_capacity(ide_drive_t *drive)
411	{
412	u16 *id = drive->id;
413	int lba48 = ata_id_lba48_enabled(id);
414
415	if ((drive->dev_flags & IDE_DFLAG_LBA) == 0 \|\|
416	ata_id_hpa_enabled(id) == 0)
417	return;
418
419	/*
420	* according to the spec the SET MAX ADDRESS command shall be
421	* immediately preceded by a READ NATIVE MAX ADDRESS command
422	*/
423	if (!ide_disk_hpa_get_native_capacity(drive, lba48))
424	return;
425
426	if (ide_disk_hpa_set_capacity(drive, drive->probed_capacity, lba48))
427	drive->dev_flags \|= IDE_DFLAG_NOHPA; /* disable HPA on resume */
428	}
429
430	static bool idedisk_prep_rq(ide_drive_t drive, struct request rq)
431	{
432	struct ide_cmd *cmd;
433
434	if (req_op(rq) != REQ_OP_FLUSH)
435	return true;
436
437	if (ide_req(rq)->special) {
438	cmd = ide_req(rq)->special;
439	memset(cmd, 0, sizeof(*cmd));
440	} else {
441	cmd = kzalloc(sizeof(*cmd), GFP_ATOMIC);
442	}
443
444	/* FIXME: map struct ide_taskfile on rq->cmd[] */
445	BUG_ON(cmd == NULL);
446
447	if (ata_id_flush_ext_enabled(drive->id) &&
448	(drive->capacity64 >= (1UL << 28)))
449	cmd->tf.command = ATA_CMD_FLUSH_EXT;
450	else
451	cmd->tf.command = ATA_CMD_FLUSH;
452	cmd->valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
453	cmd->tf_flags = IDE_TFLAG_DYN;
454	cmd->protocol = ATA_PROT_NODATA;
455	rq->cmd_flags &= ~REQ_OP_MASK;
456	rq->cmd_flags \|= REQ_OP_DRV_OUT;
457	ide_req(rq)->type = ATA_PRIV_TASKFILE;
458	ide_req(rq)->special = cmd;
459	cmd->rq = rq;
460
461	return true;
462	}
463
464	ide_devset_get(multcount, mult_count);
465
466	/*
467	* This is tightly woven into the driver->do_special can not touch.
468	* DON'T do it again until a total personality rewrite is committed.
469	*/
470	static int set_multcount(ide_drive_t *drive, int arg)
471	{
472	struct request *rq;
473
474	if (arg < 0 \|\| arg > (drive->id[ATA_ID_MAX_MULTSECT] & 0xff))
475	return -EINVAL;
476
477	if (drive->special_flags & IDE_SFLAG_SET_MULTMODE)
478	return -EBUSY;
479
480	rq = blk_get_request(drive->queue, REQ_OP_DRV_IN, 0);
481	ide_req(rq)->type = ATA_PRIV_TASKFILE;
482
483	drive->mult_req = arg;
484	drive->special_flags \|= IDE_SFLAG_SET_MULTMODE;
485	blk_execute_rq(NULL, rq, 0);
486	blk_put_request(rq);
487
488	return (drive->mult_count == arg) ? 0 : -EIO;
489	}
490
491	ide_devset_get_flag(nowerr, IDE_DFLAG_NOWERR);
492
493	static int set_nowerr(ide_drive_t *drive, int arg)
494	{
495	if (arg < 0 \|\| arg > 1)
496	return -EINVAL;
497
498	if (arg)
499	drive->dev_flags \|= IDE_DFLAG_NOWERR;
500	else
501	drive->dev_flags &= ~IDE_DFLAG_NOWERR;
502
503	drive->bad_wstat = arg ? BAD_R_STAT : BAD_W_STAT;
504
505	return 0;
506	}
507
508	static int ide_do_setfeature(ide_drive_t *drive, u8 feature, u8 nsect)
509	{
510	struct ide_cmd cmd;
511
512	memset(&cmd, 0, sizeof(cmd));
513	cmd.tf.feature = feature;
514	cmd.tf.nsect = nsect;
515	cmd.tf.command = ATA_CMD_SET_FEATURES;
516	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
517	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
518
519	return ide_no_data_taskfile(drive, &cmd);
520	}
521
522	static void update_flush(ide_drive_t *drive)
523	{
524	u16 *id = drive->id;
525	bool wc = false;
526
527	if (drive->dev_flags & IDE_DFLAG_WCACHE) {
528	unsigned long long capacity;
529	int barrier;
530	/*
531	* We must avoid issuing commands a drive does not
532	* understand or we may crash it. We check flush cache
533	* is supported. We also check we have the LBA48 flush
534	* cache if the drive capacity is too large. By this
535	* time we have trimmed the drive capacity if LBA48 is
536	* not available so we don't need to recheck that.
537	*/
538	capacity = ide_gd_capacity(drive);
539	barrier = ata_id_flush_enabled(id) &&
540	(drive->dev_flags & IDE_DFLAG_NOFLUSH) == 0 &&
541	((drive->dev_flags & IDE_DFLAG_LBA48) == 0 \|\|
542	capacity <= (1ULL << 28) \|\|
543	ata_id_flush_ext_enabled(id));
544
545	printk(KERN_INFO "%s: cache flushes %ssupported\n",
546	drive->name, barrier ? "" : "not ");
547
548	if (barrier) {
549	wc = true;
550	drive->prep_rq = idedisk_prep_rq;
551	}
552	}
553
554	blk_queue_write_cache(drive->queue, wc, false);
555	}
556
557	ide_devset_get_flag(wcache, IDE_DFLAG_WCACHE);
558
559	static int set_wcache(ide_drive_t *drive, int arg)
560	{
561	int err = 1;
562
563	if (arg < 0 \|\| arg > 1)
564	return -EINVAL;
565
566	if (ata_id_flush_enabled(drive->id)) {
567	err = ide_do_setfeature(drive,
568	arg ? SETFEATURES_WC_ON : SETFEATURES_WC_OFF, 0);
569	if (err == 0) {
570	if (arg)
571	drive->dev_flags \|= IDE_DFLAG_WCACHE;
572	else
573	drive->dev_flags &= ~IDE_DFLAG_WCACHE;
574	}
575	}
576
577	update_flush(drive);
578
579	return err;
580	}
581
582	static int do_idedisk_flushcache(ide_drive_t *drive)
583	{
584	struct ide_cmd cmd;
585
586	memset(&cmd, 0, sizeof(cmd));
587	if (ata_id_flush_ext_enabled(drive->id))
588	cmd.tf.command = ATA_CMD_FLUSH_EXT;
589	else
590	cmd.tf.command = ATA_CMD_FLUSH;
591	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
592	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
593
594	return ide_no_data_taskfile(drive, &cmd);
595	}
596
597	ide_devset_get(acoustic, acoustic);
598
599	static int set_acoustic(ide_drive_t *drive, int arg)
600	{
601	if (arg < 0 \|\| arg > 254)
602	return -EINVAL;
603
604	ide_do_setfeature(drive,
605	arg ? SETFEATURES_AAM_ON : SETFEATURES_AAM_OFF, arg);
606
607	drive->acoustic = arg;
608
609	return 0;
610	}
611
612	ide_devset_get_flag(addressing, IDE_DFLAG_LBA48);
613
614	/*
615	* drive->addressing:
616	* 0: 28-bit
617	* 1: 48-bit
618	* 2: 48-bit capable doing 28-bit
619	*/
620	static int set_addressing(ide_drive_t *drive, int arg)
621	{
622	if (arg < 0 \|\| arg > 2)
623	return -EINVAL;
624
625	if (arg && ((drive->hwif->host_flags & IDE_HFLAG_NO_LBA48) \|\|
626	ata_id_lba48_enabled(drive->id) == 0))
627	return -EIO;
628
629	if (arg == 2)
630	arg = 0;
631
632	if (arg)
633	drive->dev_flags \|= IDE_DFLAG_LBA48;
634	else
635	drive->dev_flags &= ~IDE_DFLAG_LBA48;
636
637	return 0;
638	}
639
640	ide_ext_devset_rw(acoustic, acoustic);
641	ide_ext_devset_rw(address, addressing);
642	ide_ext_devset_rw(multcount, multcount);
643	ide_ext_devset_rw(wcache, wcache);
644
645	ide_ext_devset_rw_sync(nowerr, nowerr);
646
647	static int ide_disk_check(ide_drive_t drive, const char s)
648	{
649	return 1;
650	}
651
652	static void ide_disk_setup(ide_drive_t *drive)
653	{
654	struct ide_disk_obj *idkp = drive->driver_data;
655	struct request_queue *q = drive->queue;
656	ide_hwif_t *hwif = drive->hwif;
657	u16 *id = drive->id;
658	char m = (char )&id[ATA_ID_PROD];
659	unsigned long long capacity;
660
661	ide_proc_register_driver(drive, idkp->driver);
662
663	if ((drive->dev_flags & IDE_DFLAG_ID_READ) == 0)
664	return;
665
666	if (drive->dev_flags & IDE_DFLAG_REMOVABLE) {
667	/*
668	* Removable disks (eg. SYQUEST); ignore 'WD' drives
669	*/
670	if (m[0] != 'W' \|\| m[1] != 'D')
671	drive->dev_flags \|= IDE_DFLAG_DOORLOCKING;
672	}
673
674	(void)set_addressing(drive, 1);
675
676	if (drive->dev_flags & IDE_DFLAG_LBA48) {
677	int max_s = 2048;
678
679	if (max_s > hwif->rqsize)
680	max_s = hwif->rqsize;
681
682	blk_queue_max_hw_sectors(q, max_s);
683	}
684
685	printk(KERN_INFO "%s: max request size: %dKiB\n", drive->name,
686	queue_max_sectors(q) / 2);
687
688	if (ata_id_is_ssd(id)) {
689	blk_queue_flag_set(QUEUE_FLAG_NONROT, q);
690	blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, q);
691	}
692
693	/* calculate drive capacity, and select LBA if possible */
694	ide_disk_get_capacity(drive);
695
696	/*
697	* if possible, give fdisk access to more of the drive,
698	* by correcting bios_cyls:
699	*/
700	capacity = ide_gd_capacity(drive);
701
702	if ((drive->dev_flags & IDE_DFLAG_FORCED_GEOM) == 0) {
703	if (ata_id_lba48_enabled(drive->id)) {
704	/* compatibility */
705	drive->bios_sect = 63;
706	drive->bios_head = 255;
707	}
708
709	if (drive->bios_sect && drive->bios_head) {
710	unsigned int cap0 = capacity; /* truncate to 32 bits */
711	unsigned int cylsz, cyl;
712
713	if (cap0 != capacity)
714	drive->bios_cyl = 65535;
715	else {
716	cylsz = drive->bios_sect * drive->bios_head;
717	cyl = cap0 / cylsz;
718	if (cyl > 65535)
719	cyl = 65535;
720	if (cyl > drive->bios_cyl)
721	drive->bios_cyl = cyl;
722	}
723	}
724	}
725	printk(KERN_INFO "%s: %llu sectors (%llu MB)",
726	drive->name, capacity, sectors_to_MB(capacity));
727
728	/* Only print cache size when it was specified */
729	if (id[ATA_ID_BUF_SIZE])
730	printk(KERN_CONT " w/%dKiB Cache", id[ATA_ID_BUF_SIZE] / 2);
731
732	printk(KERN_CONT ", CHS=%d/%d/%d\n",
733	drive->bios_cyl, drive->bios_head, drive->bios_sect);
734
735	/* write cache enabled? */
736	if ((id[ATA_ID_CSFO] & 1) \|\| ata_id_wcache_enabled(id))
737	drive->dev_flags \|= IDE_DFLAG_WCACHE;
738
739	set_wcache(drive, 1);
740
741	if ((drive->dev_flags & IDE_DFLAG_LBA) == 0 &&
742	(drive->head == 0 \|\| drive->head > 16))
743	printk(KERN_ERR "%s: invalid geometry: %d physical heads?\n",
744	drive->name, drive->head);
745	}
746
747	static void ide_disk_flush(ide_drive_t *drive)
748	{
749	if (ata_id_flush_enabled(drive->id) == 0 \|\|
750	(drive->dev_flags & IDE_DFLAG_WCACHE) == 0)
751	return;
752
753	if (do_idedisk_flushcache(drive))
754	printk(KERN_INFO "%s: wcache flush failed!\n", drive->name);
755	}
756
757	static int ide_disk_init_media(ide_drive_t drive, struct gendisk disk)
758	{
759	return 0;
760	}
761
762	static int ide_disk_set_doorlock(ide_drive_t drive, struct gendisk disk,
763	int on)
764	{
765	struct ide_cmd cmd;
766	int ret;
767
768	if ((drive->dev_flags & IDE_DFLAG_DOORLOCKING) == 0)
769	return 0;
770
771	memset(&cmd, 0, sizeof(cmd));
772	cmd.tf.command = on ? ATA_CMD_MEDIA_LOCK : ATA_CMD_MEDIA_UNLOCK;
773	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
774	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
775
776	ret = ide_no_data_taskfile(drive, &cmd);
777
778	if (ret)
779	drive->dev_flags &= ~IDE_DFLAG_DOORLOCKING;
780
781	return ret;
782	}
783
784	const struct ide_disk_ops ide_ata_disk_ops = {
785	.check = ide_disk_check,
786	.unlock_native_capacity = ide_disk_unlock_native_capacity,
787	.get_capacity = ide_disk_get_capacity,
788	.setup = ide_disk_setup,
789	.flush = ide_disk_flush,
790	.init_media = ide_disk_init_media,
791	.set_doorlock = ide_disk_set_doorlock,
792	.do_request = ide_do_rw_disk,
793	.ioctl = ide_disk_ioctl,
794	.compat_ioctl = ide_disk_ioctl,
795	};

drivers/ide/ide-disk.h+0−30

@@ -1,30 +0,0 @@
1	/* SPDX-License-Identifier: GPL-2.0 */
2	#ifndef __IDE_DISK_H
3	#define __IDE_DISK_H
4
5	#include "ide-gd.h"
6
7	#ifdef CONFIG_IDE_GD_ATA
8	/* ide-disk.c */
9	extern const struct ide_disk_ops ide_ata_disk_ops;
10	ide_decl_devset(address);
11	ide_decl_devset(multcount);
12	ide_decl_devset(nowerr);
13	ide_decl_devset(wcache);
14	ide_decl_devset(acoustic);
15
16	/* ide-disk_ioctl.c */
17	int ide_disk_ioctl(ide_drive_t , struct block_device , fmode_t, unsigned int,
18	unsigned long);
19
20	#ifdef CONFIG_IDE_PROC_FS
21	/* ide-disk_proc.c */
22	extern ide_proc_entry_t ide_disk_proc[];
23	extern const struct ide_proc_devset ide_disk_settings[];
24	#endif
25	#else
26	#define ide_disk_proc NULL
27	#define ide_disk_settings NULL
28	#endif
29
30	#endif /* __IDE_DISK_H */

drivers/ide/ide-disk_ioctl.c+0−33

@@ -1,33 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	#include <linux/kernel.h>
3	#include <linux/ide.h>
4	#include <linux/hdreg.h>
5	#include <linux/mutex.h>
6
7	#include "ide-disk.h"
8
9	static DEFINE_MUTEX(ide_disk_ioctl_mutex);
10	static const struct ide_ioctl_devset ide_disk_ioctl_settings[] = {
11	{ HDIO_GET_ADDRESS, HDIO_SET_ADDRESS, &ide_devset_address },
12	{ HDIO_GET_MULTCOUNT, HDIO_SET_MULTCOUNT, &ide_devset_multcount },
13	{ HDIO_GET_NOWERR, HDIO_SET_NOWERR, &ide_devset_nowerr },
14	{ HDIO_GET_WCACHE, HDIO_SET_WCACHE, &ide_devset_wcache },
15	{ HDIO_GET_ACOUSTIC, HDIO_SET_ACOUSTIC, &ide_devset_acoustic },
16	{ 0 }
17	};
18
19	int ide_disk_ioctl(ide_drive_t drive, struct block_device bdev, fmode_t mode,
20	unsigned int cmd, unsigned long arg)
21	{
22	int err;
23
24	mutex_lock(&ide_disk_ioctl_mutex);
25	err = ide_setting_ioctl(drive, bdev, cmd, arg, ide_disk_ioctl_settings);
26	if (err != -EOPNOTSUPP)
27	goto out;
28
29	err = generic_ide_ioctl(drive, bdev, cmd, arg);
30	out:
31	mutex_unlock(&ide_disk_ioctl_mutex);
32	return err;
33	}

drivers/ide/ide-disk_proc.c+0−125

@@ -1,125 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	#include <linux/kernel.h>
3	#include <linux/ide.h>
4	#include <linux/slab.h>
5	#include <linux/export.h>
6	#include <linux/seq_file.h>
7
8	#include "ide-disk.h"
9
10	static int smart_enable(ide_drive_t *drive)
11	{
12	struct ide_cmd cmd;
13	struct ide_taskfile *tf = &cmd.tf;
14
15	memset(&cmd, 0, sizeof(cmd));
16	tf->feature = ATA_SMART_ENABLE;
17	tf->lbam = ATA_SMART_LBAM_PASS;
18	tf->lbah = ATA_SMART_LBAH_PASS;
19	tf->command = ATA_CMD_SMART;
20	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
21	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
22
23	return ide_no_data_taskfile(drive, &cmd);
24	}
25
26	static int get_smart_data(ide_drive_t drive, u8 buf, u8 sub_cmd)
27	{
28	struct ide_cmd cmd;
29	struct ide_taskfile *tf = &cmd.tf;
30
31	memset(&cmd, 0, sizeof(cmd));
32	tf->feature = sub_cmd;
33	tf->nsect = 0x01;
34	tf->lbam = ATA_SMART_LBAM_PASS;
35	tf->lbah = ATA_SMART_LBAH_PASS;
36	tf->command = ATA_CMD_SMART;
37	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
38	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
39	cmd.protocol = ATA_PROT_PIO;
40
41	return ide_raw_taskfile(drive, &cmd, buf, 1);
42	}
43
44	static int idedisk_cache_proc_show(struct seq_file m, void v)
45	{
46	ide_drive_t drive = (ide_drive_t ) m->private;
47
48	if (drive->dev_flags & IDE_DFLAG_ID_READ)
49	seq_printf(m, "%i\n", drive->id[ATA_ID_BUF_SIZE] / 2);
50	else
51	seq_printf(m, "(none)\n");
52	return 0;
53	}
54
55	static int idedisk_capacity_proc_show(struct seq_file m, void v)
56	{
57	ide_drive_tdrive = (ide_drive_t )m->private;
58
59	seq_printf(m, "%llu\n", (long long)ide_gd_capacity(drive));
60	return 0;
61	}
62
63	static int __idedisk_proc_show(struct seq_file m, ide_drive_t drive, u8 sub_cmd)
64	{
65	u8 *buf;
66
67	buf = kmalloc(SECTOR_SIZE, GFP_KERNEL);
68	if (!buf)
69	return -ENOMEM;
70
71	(void)smart_enable(drive);
72
73	if (get_smart_data(drive, buf, sub_cmd) == 0) {
74	__le16 val = (__le16 )buf;
75	int i;
76
77	for (i = 0; i < SECTOR_SIZE / 2; i++) {
78	seq_printf(m, "%04x%c", le16_to_cpu(val[i]),
79	(i % 8) == 7 ? '\n' : ' ');
80	}
81	}
82	kfree(buf);
83	return 0;
84	}
85
86	static int idedisk_sv_proc_show(struct seq_file m, void v)
87	{
88	return __idedisk_proc_show(m, m->private, ATA_SMART_READ_VALUES);
89	}
90
91	static int idedisk_st_proc_show(struct seq_file m, void v)
92	{
93	return __idedisk_proc_show(m, m->private, ATA_SMART_READ_THRESHOLDS);
94	}
95
96	ide_proc_entry_t ide_disk_proc[] = {
97	{ "cache", S_IFREG\|S_IRUGO, idedisk_cache_proc_show },
98	{ "capacity", S_IFREG\|S_IRUGO, idedisk_capacity_proc_show },
99	{ "geometry", S_IFREG\|S_IRUGO, ide_geometry_proc_show },
100	{ "smart_values", S_IFREG\|S_IRUSR, idedisk_sv_proc_show },
101	{ "smart_thresholds", S_IFREG\|S_IRUSR, idedisk_st_proc_show },
102	{}
103	};
104
105	ide_devset_rw_field(bios_cyl, bios_cyl);
106	ide_devset_rw_field(bios_head, bios_head);
107	ide_devset_rw_field(bios_sect, bios_sect);
108	ide_devset_rw_field(failures, failures);
109	ide_devset_rw_field(lun, lun);
110	ide_devset_rw_field(max_failures, max_failures);
111
112	const struct ide_proc_devset ide_disk_settings[] = {
113	IDE_PROC_DEVSET(acoustic, 0, 254),
114	IDE_PROC_DEVSET(address, 0, 2),
115	IDE_PROC_DEVSET(bios_cyl, 0, 65535),
116	IDE_PROC_DEVSET(bios_head, 0, 255),
117	IDE_PROC_DEVSET(bios_sect, 0, 63),
118	IDE_PROC_DEVSET(failures, 0, 65535),
119	IDE_PROC_DEVSET(lun, 0, 7),
120	IDE_PROC_DEVSET(max_failures, 0, 65535),
121	IDE_PROC_DEVSET(multcount, 0, 16),
122	IDE_PROC_DEVSET(nowerr, 0, 1),
123	IDE_PROC_DEVSET(wcache, 0, 1),
124	{ NULL },
125	};

drivers/ide/ide-dma-sff.c+0−336

@@ -1,336 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	#include <linux/types.h>
3	#include <linux/kernel.h>
4	#include <linux/export.h>
5	#include <linux/ide.h>
6	#include <linux/scatterlist.h>
7	#include <linux/dma-mapping.h>
8	#include <linux/io.h>
9
10	/**
11	* config_drive_for_dma - attempt to activate IDE DMA
12	* @drive: the drive to place in DMA mode
13	*
14	* If the drive supports at least mode 2 DMA or UDMA of any kind
15	* then attempt to place it into DMA mode. Drives that are known to
16	* support DMA but predate the DMA properties or that are known
17	* to have DMA handling bugs are also set up appropriately based
18	* on the good/bad drive lists.
19	*/
20
21	int config_drive_for_dma(ide_drive_t *drive)
22	{
23	ide_hwif_t *hwif = drive->hwif;
24	u16 *id = drive->id;
25
26	if (drive->media != ide_disk) {
27	if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
28	return 0;
29	}
30
31	/*
32	* Enable DMA on any drive that has
33	* UltraDMA (mode 0/1/2/3/4/5/6) enabled
34	*/
35	if ((id[ATA_ID_FIELD_VALID] & 4) &&
36	((id[ATA_ID_UDMA_MODES] >> 8) & 0x7f))
37	return 1;
38
39	/*
40	* Enable DMA on any drive that has mode2 DMA
41	* (multi or single) enabled
42	*/
43	if ((id[ATA_ID_MWDMA_MODES] & 0x404) == 0x404 \|\|
44	(id[ATA_ID_SWDMA_MODES] & 0x404) == 0x404)
45	return 1;
46
47	/* Consult the list of known "good" drives */
48	if (ide_dma_good_drive(drive))
49	return 1;
50
51	return 0;
52	}
53
54	u8 ide_dma_sff_read_status(ide_hwif_t *hwif)
55	{
56	unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;
57
58	if (hwif->host_flags & IDE_HFLAG_MMIO)
59	return readb((void __iomem *)addr);
60	else
61	return inb(addr);
62	}
63	EXPORT_SYMBOL_GPL(ide_dma_sff_read_status);
64
65	static void ide_dma_sff_write_status(ide_hwif_t *hwif, u8 val)
66	{
67	unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;
68
69	if (hwif->host_flags & IDE_HFLAG_MMIO)
70	writeb(val, (void __iomem *)addr);
71	else
72	outb(val, addr);
73	}
74
75	/**
76	* ide_dma_host_set - Enable/disable DMA on a host
77	* @drive: drive to control
78	*
79	* Enable/disable DMA on an IDE controller following generic
80	* bus-mastering IDE controller behaviour.
81	*/
82
83	void ide_dma_host_set(ide_drive_t *drive, int on)
84	{
85	ide_hwif_t *hwif = drive->hwif;
86	u8 unit = drive->dn & 1;
87	u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
88
89	if (on)
90	dma_stat \|= (1 << (5 + unit));
91	else
92	dma_stat &= ~(1 << (5 + unit));
93
94	ide_dma_sff_write_status(hwif, dma_stat);
95	}
96	EXPORT_SYMBOL_GPL(ide_dma_host_set);
97
98	/**
99	* ide_build_dmatable - build IDE DMA table
100	*
101	* ide_build_dmatable() prepares a dma request. We map the command
102	* to get the pci bus addresses of the buffers and then build up
103	* the PRD table that the IDE layer wants to be fed.
104	*
105	* Most chipsets correctly interpret a length of 0x0000 as 64KB,
106	* but at least one (e.g. CS5530) misinterprets it as zero (!).
107	* So we break the 64KB entry into two 32KB entries instead.
108	*
109	* Returns the number of built PRD entries if all went okay,
110	* returns 0 otherwise.
111	*
112	* May also be invoked from trm290.c
113	*/
114
115	int ide_build_dmatable(ide_drive_t drive, struct ide_cmd cmd)
116	{
117	ide_hwif_t *hwif = drive->hwif;
118	__le32 table = (__le32 )hwif->dmatable_cpu;
119	unsigned int count = 0;
120	int i;
121	struct scatterlist *sg;
122	u8 is_trm290 = !!(hwif->host_flags & IDE_HFLAG_TRM290);
123
124	for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) {
125	u32 cur_addr, cur_len, xcount, bcount;
126
127	cur_addr = sg_dma_address(sg);
128	cur_len = sg_dma_len(sg);
129
130	/*
131	* Fill in the dma table, without crossing any 64kB boundaries.
132	* Most hardware requires 16-bit alignment of all blocks,
133	* but the trm290 requires 32-bit alignment.
134	*/
135
136	while (cur_len) {
137	if (count++ >= PRD_ENTRIES)
138	goto use_pio_instead;
139
140	bcount = 0x10000 - (cur_addr & 0xffff);
141	if (bcount > cur_len)
142	bcount = cur_len;
143	*table++ = cpu_to_le32(cur_addr);
144	xcount = bcount & 0xffff;
145	if (is_trm290)
146	xcount = ((xcount >> 2) - 1) << 16;
147	else if (xcount == 0x0000) {
148	if (count++ >= PRD_ENTRIES)
149	goto use_pio_instead;
150	*table++ = cpu_to_le32(0x8000);
151	*table++ = cpu_to_le32(cur_addr + 0x8000);
152	xcount = 0x8000;
153	}
154	*table++ = cpu_to_le32(xcount);
155	cur_addr += bcount;
156	cur_len -= bcount;
157	}
158	}
159
160	if (count) {
161	if (!is_trm290)
162	*--table \|= cpu_to_le32(0x80000000);
163	return count;
164	}
165
166	use_pio_instead:
167	printk(KERN_ERR "%s: %s\n", drive->name,
168	count ? "DMA table too small" : "empty DMA table?");
169
170	return 0; /* revert to PIO for this request */
171	}
172	EXPORT_SYMBOL_GPL(ide_build_dmatable);
173
174	/**
175	* ide_dma_setup - begin a DMA phase
176	* @drive: target device
177	* @cmd: command
178	*
179	* Build an IDE DMA PRD (IDE speak for scatter gather table)
180	* and then set up the DMA transfer registers for a device
181	* that follows generic IDE PCI DMA behaviour. Controllers can
182	* override this function if they need to
183	*
184	* Returns 0 on success. If a PIO fallback is required then 1
185	* is returned.
186	*/
187
188	int ide_dma_setup(ide_drive_t drive, struct ide_cmd cmd)
189	{
190	ide_hwif_t *hwif = drive->hwif;
191	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
192	u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR;
193	u8 dma_stat;
194
195	/* fall back to pio! */
196	if (ide_build_dmatable(drive, cmd) == 0) {
197	ide_map_sg(drive, cmd);
198	return 1;
199	}
200
201	/* PRD table */
202	if (mmio)
203	writel(hwif->dmatable_dma,
204	(void __iomem *)(hwif->dma_base + ATA_DMA_TABLE_OFS));
205	else
206	outl(hwif->dmatable_dma, hwif->dma_base + ATA_DMA_TABLE_OFS);
207
208	/* specify r/w */
209	if (mmio)
210	writeb(rw, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
211	else
212	outb(rw, hwif->dma_base + ATA_DMA_CMD);
213
214	/* read DMA status for INTR & ERROR flags */
215	dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
216
217	/* clear INTR & ERROR flags */
218	ide_dma_sff_write_status(hwif, dma_stat \| ATA_DMA_ERR \| ATA_DMA_INTR);
219
220	return 0;
221	}
222	EXPORT_SYMBOL_GPL(ide_dma_setup);
223
224	/**
225	* ide_dma_sff_timer_expiry - handle a DMA timeout
226	* @drive: Drive that timed out
227	*
228	* An IDE DMA transfer timed out. In the event of an error we ask
229	* the driver to resolve the problem, if a DMA transfer is still
230	* in progress we continue to wait (arguably we need to add a
231	* secondary 'I don't care what the drive thinks' timeout here)
232	* Finally if we have an interrupt we let it complete the I/O.
233	* But only one time - we clear expiry and if it's still not
234	* completed after WAIT_CMD, we error and retry in PIO.
235	* This can occur if an interrupt is lost or due to hang or bugs.
236	*/
237
238	int ide_dma_sff_timer_expiry(ide_drive_t *drive)
239	{
240	ide_hwif_t *hwif = drive->hwif;
241	u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
242
243	printk(KERN_WARNING "%s: %s: DMA status (0x%02x)\n",
244	drive->name, __func__, dma_stat);
245
246	if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
247	return WAIT_CMD;
248
249	hwif->expiry = NULL; /* one free ride for now */
250
251	if (dma_stat & ATA_DMA_ERR) /* ERROR */
252	return -1;
253
254	if (dma_stat & ATA_DMA_ACTIVE) /* DMAing */
255	return WAIT_CMD;
256
257	if (dma_stat & ATA_DMA_INTR) /* Got an Interrupt */
258	return WAIT_CMD;
259
260	return 0; /* Status is unknown -- reset the bus */
261	}
262	EXPORT_SYMBOL_GPL(ide_dma_sff_timer_expiry);
263
264	void ide_dma_start(ide_drive_t *drive)
265	{
266	ide_hwif_t *hwif = drive->hwif;
267	u8 dma_cmd;
268
269	/* Note that this is done after the cmd has
270	* been issued to the drive, as per the BM-IDE spec.
271	* The Promise Ultra33 doesn't work correctly when
272	* we do this part before issuing the drive cmd.
273	*/
274	if (hwif->host_flags & IDE_HFLAG_MMIO) {
275	dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
276	writeb(dma_cmd \| ATA_DMA_START,
277	(void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
278	} else {
279	dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
280	outb(dma_cmd \| ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
281	}
282	}
283	EXPORT_SYMBOL_GPL(ide_dma_start);
284
285	/* returns 1 on error, 0 otherwise */
286	int ide_dma_end(ide_drive_t *drive)
287	{
288	ide_hwif_t *hwif = drive->hwif;
289	u8 dma_stat = 0, dma_cmd = 0;
290
291	/* stop DMA */
292	if (hwif->host_flags & IDE_HFLAG_MMIO) {
293	dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
294	writeb(dma_cmd & ~ATA_DMA_START,
295	(void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
296	} else {
297	dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
298	outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
299	}
300
301	/* get DMA status */
302	dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
303
304	/* clear INTR & ERROR bits */
305	ide_dma_sff_write_status(hwif, dma_stat \| ATA_DMA_ERR \| ATA_DMA_INTR);
306
307	#define CHECK_DMA_MASK (ATA_DMA_ACTIVE \| ATA_DMA_ERR \| ATA_DMA_INTR)
308
309	/* verify good DMA status */
310	if ((dma_stat & CHECK_DMA_MASK) != ATA_DMA_INTR)
311	return 0x10 \| dma_stat;
312	return 0;
313	}
314	EXPORT_SYMBOL_GPL(ide_dma_end);
315
316	/* returns 1 if dma irq issued, 0 otherwise */
317	int ide_dma_test_irq(ide_drive_t *drive)
318	{
319	ide_hwif_t *hwif = drive->hwif;
320	u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
321
322	return (dma_stat & ATA_DMA_INTR) ? 1 : 0;
323	}
324	EXPORT_SYMBOL_GPL(ide_dma_test_irq);
325
326	const struct ide_dma_ops sff_dma_ops = {
327	.dma_host_set = ide_dma_host_set,
328	.dma_setup = ide_dma_setup,
329	.dma_start = ide_dma_start,
330	.dma_end = ide_dma_end,
331	.dma_test_irq = ide_dma_test_irq,
332	.dma_lost_irq = ide_dma_lost_irq,
333	.dma_timer_expiry = ide_dma_sff_timer_expiry,
334	.dma_sff_read_status = ide_dma_sff_read_status,
335	};
336	EXPORT_SYMBOL_GPL(sff_dma_ops);

drivers/ide/ide-dma.c+0−551

@@ -1,551 +0,0 @@
1	/*
2	* IDE DMA support (including IDE PCI BM-DMA).
3	*
4	* Copyright (C) 1995-1998 Mark Lord
5	* Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
6	* Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
7	*
8	* May be copied or modified under the terms of the GNU General Public License
9	*
10	* DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
11	*/
12
13	/*
14	* Special Thanks to Mark for his Six years of work.
15	*/
16
17	/*
18	* Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
19	* fixing the problem with the BIOS on some Acer motherboards.
20	*
21	* Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
22	* "TX" chipset compatibility and for providing patches for the "TX" chipset.
23	*
24	* Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
25	* at generic DMA -- his patches were referred to when preparing this code.
26	*
27	* Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
28	* for supplying a Promise UDMA board & WD UDMA drive for this work!
29	*/
30
31	#include <linux/types.h>
32	#include <linux/gfp.h>
33	#include <linux/kernel.h>
34	#include <linux/export.h>
35	#include <linux/ide.h>
36	#include <linux/scatterlist.h>
37	#include <linux/dma-mapping.h>
38
39	static const struct drive_list_entry drive_whitelist[] = {
40	{ "Micropolis 2112A" , NULL },
41	{ "CONNER CTMA 4000" , NULL },
42	{ "CONNER CTT8000-A" , NULL },
43	{ "ST34342A" , NULL },
44	{ NULL , NULL }
45	};
46
47	static const struct drive_list_entry drive_blacklist[] = {
48	{ "WDC AC11000H" , NULL },
49	{ "WDC AC22100H" , NULL },
50	{ "WDC AC32500H" , NULL },
51	{ "WDC AC33100H" , NULL },
52	{ "WDC AC31600H" , NULL },
53	{ "WDC AC32100H" , "24.09P07" },
54	{ "WDC AC23200L" , "21.10N21" },
55	{ "Compaq CRD-8241B" , NULL },
56	{ "CRD-8400B" , NULL },
57	{ "CRD-8480B", NULL },
58	{ "CRD-8482B", NULL },
59	{ "CRD-84" , NULL },
60	{ "SanDisk SDP3B" , NULL },
61	{ "SanDisk SDP3B-64" , NULL },
62	{ "SANYO CD-ROM CRD" , NULL },
63	{ "HITACHI CDR-8" , NULL },
64	{ "HITACHI CDR-8335" , NULL },
65	{ "HITACHI CDR-8435" , NULL },
66	{ "Toshiba CD-ROM XM-6202B" , NULL },
67	{ "TOSHIBA CD-ROM XM-1702BC", NULL },
68	{ "CD-532E-A" , NULL },
69	{ "E-IDE CD-ROM CR-840", NULL },
70	{ "CD-ROM Drive/F5A", NULL },
71	{ "WPI CDD-820", NULL },
72	{ "SAMSUNG CD-ROM SC-148C", NULL },
73	{ "SAMSUNG CD-ROM SC", NULL },
74	{ "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
75	{ "_NEC DV5800A", NULL },
76	{ "SAMSUNG CD-ROM SN-124", "N001" },
77	{ "Seagate STT20000A", NULL },
78	{ "CD-ROM CDR_U200", "1.09" },
79	{ NULL , NULL }
80
81	};
82
83	/**
84	* ide_dma_intr - IDE DMA interrupt handler
85	* @drive: the drive the interrupt is for
86	*
87	* Handle an interrupt completing a read/write DMA transfer on an
88	* IDE device
89	*/
90
91	ide_startstop_t ide_dma_intr(ide_drive_t *drive)
92	{
93	ide_hwif_t *hwif = drive->hwif;
94	struct ide_cmd *cmd = &hwif->cmd;
95	u8 stat = 0, dma_stat = 0;
96
97	drive->waiting_for_dma = 0;
98	dma_stat = hwif->dma_ops->dma_end(drive);
99	ide_dma_unmap_sg(drive, cmd);
100	stat = hwif->tp_ops->read_status(hwif);
101
102	if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat \| ATA_DRQ)) {
103	if (!dma_stat) {
104	if ((cmd->tf_flags & IDE_TFLAG_FS) == 0)
105	ide_finish_cmd(drive, cmd, stat);
106	else
107	ide_complete_rq(drive, BLK_STS_OK,
108	blk_rq_sectors(cmd->rq) << 9);
109	return ide_stopped;
110	}
111	printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
112	drive->name, __func__, dma_stat);
113	}
114	return ide_error(drive, "dma_intr", stat);
115	}
116
117	int ide_dma_good_drive(ide_drive_t *drive)
118	{
119	return ide_in_drive_list(drive->id, drive_whitelist);
120	}
121
122	/**
123	* ide_dma_map_sg - map IDE scatter gather for DMA I/O
124	* @drive: the drive to map the DMA table for
125	* @cmd: command
126	*
127	* Perform the DMA mapping magic necessary to access the source or
128	* target buffers of a request via DMA. The lower layers of the
129	* kernel provide the necessary cache management so that we can
130	* operate in a portable fashion.
131	*/
132
133	static int ide_dma_map_sg(ide_drive_t drive, struct ide_cmd cmd)
134	{
135	ide_hwif_t *hwif = drive->hwif;
136	struct scatterlist *sg = hwif->sg_table;
137	int i;
138
139	if (cmd->tf_flags & IDE_TFLAG_WRITE)
140	cmd->sg_dma_direction = DMA_TO_DEVICE;
141	else
142	cmd->sg_dma_direction = DMA_FROM_DEVICE;
143
144	i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction);
145	if (i) {
146	cmd->orig_sg_nents = cmd->sg_nents;
147	cmd->sg_nents = i;
148	}
149
150	return i;
151	}
152
153	/**
154	* ide_dma_unmap_sg - clean up DMA mapping
155	* @drive: The drive to unmap
156	*
157	* Teardown mappings after DMA has completed. This must be called
158	* after the completion of each use of ide_build_dmatable and before
159	* the next use of ide_build_dmatable. Failure to do so will cause
160	* an oops as only one mapping can be live for each target at a given
161	* time.
162	*/
163
164	void ide_dma_unmap_sg(ide_drive_t drive, struct ide_cmd cmd)
165	{
166	ide_hwif_t *hwif = drive->hwif;
167
168	dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents,
169	cmd->sg_dma_direction);
170	}
171	EXPORT_SYMBOL_GPL(ide_dma_unmap_sg);
172
173	/**
174	* ide_dma_off_quietly - Generic DMA kill
175	* @drive: drive to control
176	*
177	* Turn off the current DMA on this IDE controller.
178	*/
179
180	void ide_dma_off_quietly(ide_drive_t *drive)
181	{
182	drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
183
184	drive->hwif->dma_ops->dma_host_set(drive, 0);
185	}
186	EXPORT_SYMBOL(ide_dma_off_quietly);
187
188	/**
189	* ide_dma_off - disable DMA on a device
190	* @drive: drive to disable DMA on
191	*
192	* Disable IDE DMA for a device on this IDE controller.
193	* Inform the user that DMA has been disabled.
194	*/
195
196	void ide_dma_off(ide_drive_t *drive)
197	{
198	printk(KERN_INFO "%s: DMA disabled\n", drive->name);
199	ide_dma_off_quietly(drive);
200	}
201	EXPORT_SYMBOL(ide_dma_off);
202
203	/**
204	* ide_dma_on - Enable DMA on a device
205	* @drive: drive to enable DMA on
206	*
207	* Enable IDE DMA for a device on this IDE controller.
208	*/
209
210	void ide_dma_on(ide_drive_t *drive)
211	{
212	drive->dev_flags \|= IDE_DFLAG_USING_DMA;
213
214	drive->hwif->dma_ops->dma_host_set(drive, 1);
215	}
216
217	int __ide_dma_bad_drive(ide_drive_t *drive)
218	{
219	u16 *id = drive->id;
220
221	int blacklist = ide_in_drive_list(id, drive_blacklist);
222	if (blacklist) {
223	printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
224	drive->name, (char *)&id[ATA_ID_PROD]);
225	return blacklist;
226	}
227	return 0;
228	}
229	EXPORT_SYMBOL(__ide_dma_bad_drive);
230
231	static const u8 xfer_mode_bases[] = {
232	XFER_UDMA_0,
233	XFER_MW_DMA_0,
234	XFER_SW_DMA_0,
235	};
236
237	static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
238	{
239	u16 *id = drive->id;
240	ide_hwif_t *hwif = drive->hwif;
241	const struct ide_port_ops *port_ops = hwif->port_ops;
242	unsigned int mask = 0;
243
244	switch (base) {
245	case XFER_UDMA_0:
246	if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
247	break;
248	mask = id[ATA_ID_UDMA_MODES];
249	if (port_ops && port_ops->udma_filter)
250	mask &= port_ops->udma_filter(drive);
251	else
252	mask &= hwif->ultra_mask;
253
254	/*
255	* avoid false cable warning from eighty_ninty_three()
256	*/
257	if (req_mode > XFER_UDMA_2) {
258	if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
259	mask &= 0x07;
260	}
261	break;
262	case XFER_MW_DMA_0:
263	mask = id[ATA_ID_MWDMA_MODES];
264
265	/* Also look for the CF specific MWDMA modes... */
266	if (ata_id_is_cfa(id) && (id[ATA_ID_CFA_MODES] & 0x38)) {
267	u8 mode = ((id[ATA_ID_CFA_MODES] & 0x38) >> 3) - 1;
268
269	mask \|= ((2 << mode) - 1) << 3;
270	}
271
272	if (port_ops && port_ops->mdma_filter)
273	mask &= port_ops->mdma_filter(drive);
274	else
275	mask &= hwif->mwdma_mask;
276	break;
277	case XFER_SW_DMA_0:
278	mask = id[ATA_ID_SWDMA_MODES];
279	if (!(mask & ATA_SWDMA2) && (id[ATA_ID_OLD_DMA_MODES] >> 8)) {
280	u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
281
282	/*
283	* if the mode is valid convert it to the mask
284	* (the maximum allowed mode is XFER_SW_DMA_2)
285	*/
286	if (mode <= 2)
287	mask = (2 << mode) - 1;
288	}
289	mask &= hwif->swdma_mask;
290	break;
291	default:
292	BUG();
293	break;
294	}
295
296	return mask;
297	}
298
299	/**
300	* ide_find_dma_mode - compute DMA speed
301	* @drive: IDE device
302	* @req_mode: requested mode
303	*
304	* Checks the drive/host capabilities and finds the speed to use for
305	* the DMA transfer. The speed is then limited by the requested mode.
306	*
307	* Returns 0 if the drive/host combination is incapable of DMA transfers
308	* or if the requested mode is not a DMA mode.
309	*/
310
311	u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
312	{
313	ide_hwif_t *hwif = drive->hwif;
314	unsigned int mask;
315	int x, i;
316	u8 mode = 0;
317
318	if (drive->media != ide_disk) {
319	if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
320	return 0;
321	}
322
323	for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
324	if (req_mode < xfer_mode_bases[i])
325	continue;
326	mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
327	x = fls(mask) - 1;
328	if (x >= 0) {
329	mode = xfer_mode_bases[i] + x;
330	break;
331	}
332	}
333
334	if (hwif->chipset == ide_acorn && mode == 0) {
335	/*
336	* is this correct?
337	*/
338	if (ide_dma_good_drive(drive) &&
339	drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
340	mode = XFER_MW_DMA_1;
341	}
342
343	mode = min(mode, req_mode);
344
345	printk(KERN_INFO "%s: %s mode selected\n", drive->name,
346	mode ? ide_xfer_verbose(mode) : "no DMA");
347
348	return mode;
349	}
350
351	static int ide_tune_dma(ide_drive_t *drive)
352	{
353	ide_hwif_t *hwif = drive->hwif;
354	u8 speed;
355
356	if (ata_id_has_dma(drive->id) == 0 \|\|
357	(drive->dev_flags & IDE_DFLAG_NODMA))
358	return 0;
359
360	/* consult the list of known "bad" drives */
361	if (__ide_dma_bad_drive(drive))
362	return 0;
363
364	if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
365	return config_drive_for_dma(drive);
366
367	speed = ide_max_dma_mode(drive);
368
369	if (!speed)
370	return 0;
371
372	if (ide_set_dma_mode(drive, speed))
373	return 0;
374
375	return 1;
376	}
377
378	static int ide_dma_check(ide_drive_t *drive)
379	{
380	ide_hwif_t *hwif = drive->hwif;
381
382	if (ide_tune_dma(drive))
383	return 0;
384
385	/* TODO: always do PIO fallback */
386	if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
387	return -1;
388
389	ide_set_max_pio(drive);
390
391	return -1;
392	}
393
394	int ide_set_dma(ide_drive_t *drive)
395	{
396	int rc;
397
398	/*
399	* Force DMAing for the beginning of the check.
400	* Some chipsets appear to do interesting
401	* things, if not checked and cleared.
402	* PARANOIA!!!
403	*/
404	ide_dma_off_quietly(drive);
405
406	rc = ide_dma_check(drive);
407	if (rc)
408	return rc;
409
410	ide_dma_on(drive);
411
412	return 0;
413	}
414
415	void ide_check_dma_crc(ide_drive_t *drive)
416	{
417	u8 mode;
418
419	ide_dma_off_quietly(drive);
420	drive->crc_count = 0;
421	mode = drive->current_speed;
422	/*
423	* Don't try non Ultra-DMA modes without iCRC's. Force the
424	* device to PIO and make the user enable SWDMA/MWDMA modes.
425	*/
426	if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
427	mode--;
428	else
429	mode = XFER_PIO_4;
430	ide_set_xfer_rate(drive, mode);
431	if (drive->current_speed >= XFER_SW_DMA_0)
432	ide_dma_on(drive);
433	}
434
435	void ide_dma_lost_irq(ide_drive_t *drive)
436	{
437	printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
438	}
439	EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
440
441	/*
442	* un-busy the port etc, and clear any pending DMA status. we want to
443	* retry the current request in pio mode instead of risking tossing it
444	* all away
445	*/
446	ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
447	{
448	ide_hwif_t *hwif = drive->hwif;
449	const struct ide_dma_ops *dma_ops = hwif->dma_ops;
450	struct ide_cmd *cmd = &hwif->cmd;
451	ide_startstop_t ret = ide_stopped;
452
453	/*
454	* end current dma transaction
455	*/
456
457	if (error < 0) {
458	printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
459	drive->waiting_for_dma = 0;
460	(void)dma_ops->dma_end(drive);
461	ide_dma_unmap_sg(drive, cmd);
462	ret = ide_error(drive, "dma timeout error",
463	hwif->tp_ops->read_status(hwif));
464	} else {
465	printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
466	if (dma_ops->dma_clear)
467	dma_ops->dma_clear(drive);
468	printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
469	if (dma_ops->dma_test_irq(drive) == 0) {
470	ide_dump_status(drive, "DMA timeout",
471	hwif->tp_ops->read_status(hwif));
472	drive->waiting_for_dma = 0;
473	(void)dma_ops->dma_end(drive);
474	ide_dma_unmap_sg(drive, cmd);
475	}
476	}
477
478	/*
479	* disable dma for now, but remember that we did so because of
480	* a timeout -- we'll reenable after we finish this next request
481	* (or rather the first chunk of it) in pio.
482	*/
483	drive->dev_flags \|= IDE_DFLAG_DMA_PIO_RETRY;
484	drive->retry_pio++;
485	ide_dma_off_quietly(drive);
486
487	/*
488	* make sure request is sane
489	*/
490	if (hwif->rq)
491	scsi_req(hwif->rq)->result = 0;
492	return ret;
493	}
494
495	void ide_release_dma_engine(ide_hwif_t *hwif)
496	{
497	if (hwif->dmatable_cpu) {
498	int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
499
500	dma_free_coherent(hwif->dev, prd_size,
501	hwif->dmatable_cpu, hwif->dmatable_dma);
502	hwif->dmatable_cpu = NULL;
503	}
504	}
505	EXPORT_SYMBOL_GPL(ide_release_dma_engine);
506
507	int ide_allocate_dma_engine(ide_hwif_t *hwif)
508	{
509	int prd_size;
510
511	if (hwif->prd_max_nents == 0)
512	hwif->prd_max_nents = PRD_ENTRIES;
513	if (hwif->prd_ent_size == 0)
514	hwif->prd_ent_size = PRD_BYTES;
515
516	prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
517
518	hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
519	&hwif->dmatable_dma,
520	GFP_ATOMIC);
521	if (hwif->dmatable_cpu == NULL) {
522	printk(KERN_ERR "%s: unable to allocate PRD table\n",
523	hwif->name);
524	return -ENOMEM;
525	}
526
527	return 0;
528	}
529	EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
530
531	int ide_dma_prepare(ide_drive_t drive, struct ide_cmd cmd)
532	{
533	const struct ide_dma_ops *dma_ops = drive->hwif->dma_ops;
534
535	if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0 \|\|
536	(dma_ops->dma_check && dma_ops->dma_check(drive, cmd)))
537	goto out;
538	ide_map_sg(drive, cmd);
539	if (ide_dma_map_sg(drive, cmd) == 0)
540	goto out_map;
541	if (dma_ops->dma_setup(drive, cmd))
542	goto out_dma_unmap;
543	drive->waiting_for_dma = 1;
544	return 0;
545	out_dma_unmap:
546	ide_dma_unmap_sg(drive, cmd);
547	out_map:
548	ide_map_sg(drive, cmd);
549	out:
550	return 1;
551	}

drivers/ide/ide-eh.c+0−443

@@ -1,443 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2
3	#include <linux/kernel.h>
4	#include <linux/export.h>
5	#include <linux/ide.h>
6	#include <linux/delay.h>
7
8	static ide_startstop_t ide_ata_error(ide_drive_t drive, struct request rq,
9	u8 stat, u8 err)
10	{
11	ide_hwif_t *hwif = drive->hwif;
12
13	if ((stat & ATA_BUSY) \|\|
14	((stat & ATA_DF) && (drive->dev_flags & IDE_DFLAG_NOWERR) == 0)) {
15	/* other bits are useless when BUSY */
16	scsi_req(rq)->result \|= ERROR_RESET;
17	} else if (stat & ATA_ERR) {
18	/* err has different meaning on cdrom and tape */
19	if (err == ATA_ABORTED) {
20	if ((drive->dev_flags & IDE_DFLAG_LBA) &&
21	/* some newer drives don't support ATA_CMD_INIT_DEV_PARAMS */
22	hwif->tp_ops->read_status(hwif) == ATA_CMD_INIT_DEV_PARAMS)
23	return ide_stopped;
24	} else if ((err & BAD_CRC) == BAD_CRC) {
25	/* UDMA crc error, just retry the operation */
26	drive->crc_count++;
27	} else if (err & (ATA_BBK \| ATA_UNC)) {
28	/* retries won't help these */
29	scsi_req(rq)->result = ERROR_MAX;
30	} else if (err & ATA_TRK0NF) {
31	/* help it find track zero */
32	scsi_req(rq)->result \|= ERROR_RECAL;
33	}
34	}
35
36	if ((stat & ATA_DRQ) && rq_data_dir(rq) == READ &&
37	(hwif->host_flags & IDE_HFLAG_ERROR_STOPS_FIFO) == 0) {
38	int nsect = drive->mult_count ? drive->mult_count : 1;
39
40	ide_pad_transfer(drive, READ, nsect * SECTOR_SIZE);
41	}
42
43	if (scsi_req(rq)->result >= ERROR_MAX \|\| blk_noretry_request(rq)) {
44	ide_kill_rq(drive, rq);
45	return ide_stopped;
46	}
47
48	if (hwif->tp_ops->read_status(hwif) & (ATA_BUSY \| ATA_DRQ))
49	scsi_req(rq)->result \|= ERROR_RESET;
50
51	if ((scsi_req(rq)->result & ERROR_RESET) == ERROR_RESET) {
52	++scsi_req(rq)->result;
53	return ide_do_reset(drive);
54	}
55
56	if ((scsi_req(rq)->result & ERROR_RECAL) == ERROR_RECAL)
57	drive->special_flags \|= IDE_SFLAG_RECALIBRATE;
58
59	++scsi_req(rq)->result;
60
61	return ide_stopped;
62	}
63
64	static ide_startstop_t ide_atapi_error(ide_drive_t drive, struct request rq,
65	u8 stat, u8 err)
66	{
67	ide_hwif_t *hwif = drive->hwif;
68
69	if ((stat & ATA_BUSY) \|\|
70	((stat & ATA_DF) && (drive->dev_flags & IDE_DFLAG_NOWERR) == 0)) {
71	/* other bits are useless when BUSY */
72	scsi_req(rq)->result \|= ERROR_RESET;
73	} else {
74	/* add decoding error stuff */
75	}
76
77	if (hwif->tp_ops->read_status(hwif) & (ATA_BUSY \| ATA_DRQ))
78	/* force an abort */
79	hwif->tp_ops->exec_command(hwif, ATA_CMD_IDLEIMMEDIATE);
80
81	if (scsi_req(rq)->result >= ERROR_MAX) {
82	ide_kill_rq(drive, rq);
83	} else {
84	if ((scsi_req(rq)->result & ERROR_RESET) == ERROR_RESET) {
85	++scsi_req(rq)->result;
86	return ide_do_reset(drive);
87	}
88	++scsi_req(rq)->result;
89	}
90
91	return ide_stopped;
92	}
93
94	static ide_startstop_t __ide_error(ide_drive_t drive, struct request rq,
95	u8 stat, u8 err)
96	{
97	if (drive->media == ide_disk)
98	return ide_ata_error(drive, rq, stat, err);
99	return ide_atapi_error(drive, rq, stat, err);
100	}
101
102	/**
103	* ide_error - handle an error on the IDE
104	* @drive: drive the error occurred on
105	* @msg: message to report
106	* @stat: status bits
107	*
108	* ide_error() takes action based on the error returned by the drive.
109	* For normal I/O that may well include retries. We deal with
110	* both new-style (taskfile) and old style command handling here.
111	* In the case of taskfile command handling there is work left to
112	* do
113	*/
114
115	ide_startstop_t ide_error(ide_drive_t drive, const char msg, u8 stat)
116	{
117	struct request *rq;
118	u8 err;
119
120	err = ide_dump_status(drive, msg, stat);
121
122	rq = drive->hwif->rq;
123	if (rq == NULL)
124	return ide_stopped;
125
126	/* retry only "normal" I/O: */
127	if (blk_rq_is_passthrough(rq)) {
128	if (ata_taskfile_request(rq)) {
129	struct ide_cmd *cmd = ide_req(rq)->special;
130
131	if (cmd)
132	ide_complete_cmd(drive, cmd, stat, err);
133	} else if (ata_pm_request(rq)) {
134	scsi_req(rq)->result = 1;
135	ide_complete_pm_rq(drive, rq);
136	return ide_stopped;
137	}
138	scsi_req(rq)->result = err;
139	ide_complete_rq(drive, err ? BLK_STS_IOERR : BLK_STS_OK, blk_rq_bytes(rq));
140	return ide_stopped;
141	}
142
143	return __ide_error(drive, rq, stat, err);
144	}
145	EXPORT_SYMBOL_GPL(ide_error);
146
147	static inline void ide_complete_drive_reset(ide_drive_t *drive, blk_status_t err)
148	{
149	struct request *rq = drive->hwif->rq;
150
151	if (rq && ata_misc_request(rq) &&
152	scsi_req(rq)->cmd[0] == REQ_DRIVE_RESET) {
153	if (err <= 0 && scsi_req(rq)->result == 0)
154	scsi_req(rq)->result = -EIO;
155	ide_complete_rq(drive, err, blk_rq_bytes(rq));
156	}
157	}
158
159	/* needed below */
160	static ide_startstop_t do_reset1(ide_drive_t *, int);
161
162	/*
163	* atapi_reset_pollfunc() gets invoked to poll the interface for completion
164	* every 50ms during an atapi drive reset operation. If the drive has not yet
165	* responded, and we have not yet hit our maximum waiting time, then the timer
166	* is restarted for another 50ms.
167	*/
168	static ide_startstop_t atapi_reset_pollfunc(ide_drive_t *drive)
169	{
170	ide_hwif_t *hwif = drive->hwif;
171	const struct ide_tp_ops *tp_ops = hwif->tp_ops;
172	u8 stat;
173
174	tp_ops->dev_select(drive);
175	udelay(10);
176	stat = tp_ops->read_status(hwif);
177
178	if (OK_STAT(stat, 0, ATA_BUSY))
179	printk(KERN_INFO "%s: ATAPI reset complete\n", drive->name);
180	else {
181	if (time_before(jiffies, hwif->poll_timeout)) {
182	ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20);
183	/* continue polling */
184	return ide_started;
185	}
186	/* end of polling */
187	hwif->polling = 0;
188	printk(KERN_ERR "%s: ATAPI reset timed-out, status=0x%02x\n",
189	drive->name, stat);
190	/* do it the old fashioned way */
191	return do_reset1(drive, 1);
192	}
193	/* done polling */
194	hwif->polling = 0;
195	ide_complete_drive_reset(drive, BLK_STS_OK);
196	return ide_stopped;
197	}
198
199	static void ide_reset_report_error(ide_hwif_t *hwif, u8 err)
200	{
201	static const char *err_master_vals[] =
202	{ NULL, "passed", "formatter device error",
203	"sector buffer error", "ECC circuitry error",
204	"controlling MPU error" };
205
206	u8 err_master = err & 0x7f;
207
208	printk(KERN_ERR "%s: reset: master: ", hwif->name);
209	if (err_master && err_master < 6)
210	printk(KERN_CONT "%s", err_master_vals[err_master]);
211	else
212	printk(KERN_CONT "error (0x%02x?)", err);
213	if (err & 0x80)
214	printk(KERN_CONT "; slave: failed");
215	printk(KERN_CONT "\n");
216	}
217
218	/*
219	* reset_pollfunc() gets invoked to poll the interface for completion every 50ms
220	* during an ide reset operation. If the drives have not yet responded,
221	* and we have not yet hit our maximum waiting time, then the timer is restarted
222	* for another 50ms.
223	*/
224	static ide_startstop_t reset_pollfunc(ide_drive_t *drive)
225	{
226	ide_hwif_t *hwif = drive->hwif;
227	const struct ide_port_ops *port_ops = hwif->port_ops;
228	u8 tmp;
229	blk_status_t err = BLK_STS_OK;
230
231	if (port_ops && port_ops->reset_poll) {
232	err = port_ops->reset_poll(drive);
233	if (err) {
234	printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
235	hwif->name, drive->name);
236	goto out;
237	}
238	}
239
240	tmp = hwif->tp_ops->read_status(hwif);
241
242	if (!OK_STAT(tmp, 0, ATA_BUSY)) {
243	if (time_before(jiffies, hwif->poll_timeout)) {
244	ide_set_handler(drive, &reset_pollfunc, HZ/20);
245	/* continue polling */
246	return ide_started;
247	}
248	printk(KERN_ERR "%s: reset timed-out, status=0x%02x\n",
249	hwif->name, tmp);
250	drive->failures++;
251	err = BLK_STS_IOERR;
252	} else {
253	tmp = ide_read_error(drive);
254
255	if (tmp == 1) {
256	printk(KERN_INFO "%s: reset: success\n", hwif->name);
257	drive->failures = 0;
258	} else {
259	ide_reset_report_error(hwif, tmp);
260	drive->failures++;
261	err = BLK_STS_IOERR;
262	}
263	}
264	out:
265	hwif->polling = 0; /* done polling */
266	ide_complete_drive_reset(drive, err);
267	return ide_stopped;
268	}
269
270	static void ide_disk_pre_reset(ide_drive_t *drive)
271	{
272	int legacy = (drive->id[ATA_ID_CFS_ENABLE_2] & 0x0400) ? 0 : 1;
273
274	drive->special_flags =
275	legacy ? (IDE_SFLAG_SET_GEOMETRY \| IDE_SFLAG_RECALIBRATE) : 0;
276
277	drive->mult_count = 0;
278	drive->dev_flags &= ~IDE_DFLAG_PARKED;
279
280	if ((drive->dev_flags & IDE_DFLAG_KEEP_SETTINGS) == 0 &&
281	(drive->dev_flags & IDE_DFLAG_USING_DMA) == 0)
282	drive->mult_req = 0;
283
284	if (drive->mult_req != drive->mult_count)
285	drive->special_flags \|= IDE_SFLAG_SET_MULTMODE;
286	}
287
288	static void pre_reset(ide_drive_t *drive)
289	{
290	const struct ide_port_ops *port_ops = drive->hwif->port_ops;
291
292	if (drive->media == ide_disk)
293	ide_disk_pre_reset(drive);
294	else
295	drive->dev_flags \|= IDE_DFLAG_POST_RESET;
296
297	if (drive->dev_flags & IDE_DFLAG_USING_DMA) {
298	if (drive->crc_count)
299	ide_check_dma_crc(drive);
300	else
301	ide_dma_off(drive);
302	}
303
304	if ((drive->dev_flags & IDE_DFLAG_KEEP_SETTINGS) == 0) {
305	if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0) {
306	drive->dev_flags &= ~IDE_DFLAG_UNMASK;
307	drive->io_32bit = 0;
308	}
309	return;
310	}
311
312	if (port_ops && port_ops->pre_reset)
313	port_ops->pre_reset(drive);
314
315	if (drive->current_speed != 0xff)
316	drive->desired_speed = drive->current_speed;
317	drive->current_speed = 0xff;
318	}
319
320	/*
321	* do_reset1() attempts to recover a confused drive by resetting it.
322	* Unfortunately, resetting a disk drive actually resets all devices on
323	* the same interface, so it can really be thought of as resetting the
324	* interface rather than resetting the drive.
325	*
326	* ATAPI devices have their own reset mechanism which allows them to be
327	* individually reset without clobbering other devices on the same interface.
328	*
329	* Unfortunately, the IDE interface does not generate an interrupt to let
330	* us know when the reset operation has finished, so we must poll for this.
331	* Equally poor, though, is the fact that this may a very long time to complete,
332	* (up to 30 seconds worstcase). So, instead of busy-waiting here for it,
333	* we set a timer to poll at 50ms intervals.
334	*/
335	static ide_startstop_t do_reset1(ide_drive_t *drive, int do_not_try_atapi)
336	{
337	ide_hwif_t *hwif = drive->hwif;
338	struct ide_io_ports *io_ports = &hwif->io_ports;
339	const struct ide_tp_ops *tp_ops = hwif->tp_ops;
340	const struct ide_port_ops *port_ops;
341	ide_drive_t *tdrive;
342	unsigned long flags, timeout;
343	int i;
344	DEFINE_WAIT(wait);
345
346	spin_lock_irqsave(&hwif->lock, flags);
347
348	/* We must not reset with running handlers */
349	BUG_ON(hwif->handler != NULL);
350
351	/* For an ATAPI device, first try an ATAPI SRST. */
352	if (drive->media != ide_disk && !do_not_try_atapi) {
353	pre_reset(drive);
354	tp_ops->dev_select(drive);
355	udelay(20);
356	tp_ops->exec_command(hwif, ATA_CMD_DEV_RESET);
357	ndelay(400);
358	hwif->poll_timeout = jiffies + WAIT_WORSTCASE;
359	hwif->polling = 1;
360	__ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20);
361	spin_unlock_irqrestore(&hwif->lock, flags);
362	return ide_started;
363	}
364
365	/* We must not disturb devices in the IDE_DFLAG_PARKED state. */
366	do {
367	unsigned long now;
368
369	prepare_to_wait(&ide_park_wq, &wait, TASK_UNINTERRUPTIBLE);
370	timeout = jiffies;
371	ide_port_for_each_present_dev(i, tdrive, hwif) {
372	if ((tdrive->dev_flags & IDE_DFLAG_PARKED) &&
373	time_after(tdrive->sleep, timeout))
374	timeout = tdrive->sleep;
375	}
376
377	now = jiffies;
378	if (time_before_eq(timeout, now))
379	break;
380
381	spin_unlock_irqrestore(&hwif->lock, flags);
382	timeout = schedule_timeout_uninterruptible(timeout - now);
383	spin_lock_irqsave(&hwif->lock, flags);
384	} while (timeout);
385	finish_wait(&ide_park_wq, &wait);
386
387	/*
388	* First, reset any device state data we were maintaining
389	* for any of the drives on this interface.
390	*/
391	ide_port_for_each_dev(i, tdrive, hwif)
392	pre_reset(tdrive);
393
394	if (io_ports->ctl_addr == 0) {
395	spin_unlock_irqrestore(&hwif->lock, flags);
396	ide_complete_drive_reset(drive, BLK_STS_IOERR);
397	return ide_stopped;
398	}
399
400	/*
401	* Note that we also set nIEN while resetting the device,
402	* to mask unwanted interrupts from the interface during the reset.
403	* However, due to the design of PC hardware, this will cause an
404	* immediate interrupt due to the edge transition it produces.
405	* This single interrupt gives us a "fast poll" for drives that
406	* recover from reset very quickly, saving us the first 50ms wait time.
407	*/
408	/* set SRST and nIEN */
409	tp_ops->write_devctl(hwif, ATA_SRST \| ATA_NIEN \| ATA_DEVCTL_OBS);
410	/* more than enough time */
411	udelay(10);
412	/* clear SRST, leave nIEN (unless device is on the quirk list) */
413	tp_ops->write_devctl(hwif,
414	((drive->dev_flags & IDE_DFLAG_NIEN_QUIRK) ? 0 : ATA_NIEN) \|
415	ATA_DEVCTL_OBS);
416	/* more than enough time */
417	udelay(10);
418	hwif->poll_timeout = jiffies + WAIT_WORSTCASE;
419	hwif->polling = 1;
420	__ide_set_handler(drive, &reset_pollfunc, HZ/20);
421
422	/*
423	* Some weird controller like resetting themselves to a strange
424	* state when the disks are reset this way. At least, the Winbond
425	* 553 documentation says that
426	*/
427	port_ops = hwif->port_ops;
428	if (port_ops && port_ops->resetproc)
429	port_ops->resetproc(drive);
430
431	spin_unlock_irqrestore(&hwif->lock, flags);
432	return ide_started;
433	}
434
435	/*
436	* ide_do_reset() is the entry point to the drive/interface reset code.
437	*/
438
439	ide_startstop_t ide_do_reset(ide_drive_t *drive)
440	{
441	return do_reset1(drive, 0);
442	}
443	EXPORT_SYMBOL(ide_do_reset);

drivers/ide/ide-floppy.c+0−551

@@ -1,551 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* IDE ATAPI floppy driver.
4	*
5	* Copyright (C) 1996-1999 Gadi Oxman <gadio@netvision.net.il>
6	* Copyright (C) 2000-2002 Paul Bristow <paul@paulbristow.net>
7	* Copyright (C) 2005 Bartlomiej Zolnierkiewicz
8	*
9	* This driver supports the following IDE floppy drives:
10	*
11	* LS-120/240 SuperDisk
12	* Iomega Zip 100/250
13	* Iomega PC Card Clik!/PocketZip
14	*
15	* For a historical changelog see
16	* Documentation/ide/ChangeLog.ide-floppy.1996-2002
17	*/
18
19	#include <linux/types.h>
20	#include <linux/string.h>
21	#include <linux/kernel.h>
22	#include <linux/compat.h>
23	#include <linux/delay.h>
24	#include <linux/timer.h>
25	#include <linux/mm.h>
26	#include <linux/interrupt.h>
27	#include <linux/major.h>
28	#include <linux/errno.h>
29	#include <linux/genhd.h>
30	#include <linux/cdrom.h>
31	#include <linux/ide.h>
32	#include <linux/hdreg.h>
33	#include <linux/bitops.h>
34	#include <linux/mutex.h>
35	#include <linux/scatterlist.h>
36
37	#include <scsi/scsi_ioctl.h>
38
39	#include <asm/byteorder.h>
40	#include <linux/uaccess.h>
41	#include <linux/io.h>
42	#include <asm/unaligned.h>
43
44	#include "ide-floppy.h"
45
46	/*
47	* After each failed packet command we issue a request sense command and retry
48	* the packet command IDEFLOPPY_MAX_PC_RETRIES times.
49	*/
50	#define IDEFLOPPY_MAX_PC_RETRIES 3
51
52	/* format capacities descriptor codes */
53	#define CAPACITY_INVALID 0x00
54	#define CAPACITY_UNFORMATTED 0x01
55	#define CAPACITY_CURRENT 0x02
56	#define CAPACITY_NO_CARTRIDGE 0x03
57
58	/*
59	* The following delay solves a problem with ATAPI Zip 100 drive where BSY bit
60	* was apparently being deasserted before the unit was ready to receive data.
61	*/
62	#define IDEFLOPPY_PC_DELAY (HZ/20) /* default delay for ZIP 100 (50ms) */
63
64	static int ide_floppy_callback(ide_drive_t *drive, int dsc)
65	{
66	struct ide_disk_obj *floppy = drive->driver_data;
67	struct ide_atapi_pc *pc = drive->pc;
68	struct request *rq = pc->rq;
69	int uptodate = pc->error ? 0 : 1;
70
71	ide_debug_log(IDE_DBG_FUNC, "enter");
72
73	if (drive->failed_pc == pc)
74	drive->failed_pc = NULL;
75
76	if (pc->c[0] == GPCMD_READ_10 \|\| pc->c[0] == GPCMD_WRITE_10 \|\|
77	blk_rq_is_scsi(rq))
78	uptodate = 1; /* FIXME */
79	else if (pc->c[0] == GPCMD_REQUEST_SENSE) {
80
81	u8 *buf = bio_data(rq->bio);
82
83	if (!pc->error) {
84	floppy->sense_key = buf[2] & 0x0F;
85	floppy->asc = buf[12];
86	floppy->ascq = buf[13];
87	floppy->progress_indication = buf[15] & 0x80 ?
88	(u16)get_unaligned((u16 *)&buf[16]) : 0x10000;
89
90	if (drive->failed_pc)
91	ide_debug_log(IDE_DBG_PC, "pc = %x",
92	drive->failed_pc->c[0]);
93
94	ide_debug_log(IDE_DBG_SENSE, "sense key = %x, asc = %x,"
95	"ascq = %x", floppy->sense_key,
96	floppy->asc, floppy->ascq);
97	} else
98	printk(KERN_ERR PFX "Error in REQUEST SENSE itself - "
99	"Aborting request!\n");
100	}
101
102	if (ata_misc_request(rq))
103	scsi_req(rq)->result = uptodate ? 0 : IDE_DRV_ERROR_GENERAL;
104
105	return uptodate;
106	}
107
108	static void ide_floppy_report_error(struct ide_disk_obj *floppy,
109	struct ide_atapi_pc *pc)
110	{
111	/* suppress error messages resulting from Medium not present */
112	if (floppy->sense_key == 0x02 &&
113	floppy->asc == 0x3a &&
114	floppy->ascq == 0x00)
115	return;
116
117	printk(KERN_ERR PFX "%s: I/O error, pc = %2x, key = %2x, "
118	"asc = %2x, ascq = %2x\n",
119	floppy->drive->name, pc->c[0], floppy->sense_key,
120	floppy->asc, floppy->ascq);
121
122	}
123
124	static ide_startstop_t ide_floppy_issue_pc(ide_drive_t *drive,
125	struct ide_cmd *cmd,
126	struct ide_atapi_pc *pc)
127	{
128	struct ide_disk_obj *floppy = drive->driver_data;
129
130	if (drive->failed_pc == NULL &&
131	pc->c[0] != GPCMD_REQUEST_SENSE)
132	drive->failed_pc = pc;
133
134	/* Set the current packet command */
135	drive->pc = pc;
136
137	if (pc->retries > IDEFLOPPY_MAX_PC_RETRIES) {
138	unsigned int done = blk_rq_bytes(drive->hwif->rq);
139
140	if (!(pc->flags & PC_FLAG_SUPPRESS_ERROR))
141	ide_floppy_report_error(floppy, pc);
142
143	/* Giving up */
144	pc->error = IDE_DRV_ERROR_GENERAL;
145
146	drive->failed_pc = NULL;
147	drive->pc_callback(drive, 0);
148	ide_complete_rq(drive, BLK_STS_IOERR, done);
149	return ide_stopped;
150	}
151
152	ide_debug_log(IDE_DBG_FUNC, "retry #%d", pc->retries);
153
154	pc->retries++;
155
156	return ide_issue_pc(drive, cmd);
157	}
158
159	void ide_floppy_create_read_capacity_cmd(struct ide_atapi_pc *pc)
160	{
161	ide_init_pc(pc);
162	pc->c[0] = GPCMD_READ_FORMAT_CAPACITIES;
163	pc->c[7] = 255;
164	pc->c[8] = 255;
165	pc->req_xfer = 255;
166	}
167
168	/* A mode sense command is used to "sense" floppy parameters. */
169	void ide_floppy_create_mode_sense_cmd(struct ide_atapi_pc *pc, u8 page_code)
170	{
171	u16 length = 8; /* sizeof(Mode Parameter Header) = 8 Bytes */
172
173	ide_init_pc(pc);
174	pc->c[0] = GPCMD_MODE_SENSE_10;
175	pc->c[1] = 0;
176	pc->c[2] = page_code;
177
178	switch (page_code) {
179	case IDEFLOPPY_CAPABILITIES_PAGE:
180	length += 12;
181	break;
182	case IDEFLOPPY_FLEXIBLE_DISK_PAGE:
183	length += 32;
184	break;
185	default:
186	printk(KERN_ERR PFX "unsupported page code in %s\n", __func__);
187	}
188	put_unaligned(cpu_to_be16(length), (u16 *) &pc->c[7]);
189	pc->req_xfer = length;
190	}
191
192	static void idefloppy_create_rw_cmd(ide_drive_t *drive,
193	struct ide_atapi_pc pc, struct request rq,
194	unsigned long sector)
195	{
196	struct ide_disk_obj *floppy = drive->driver_data;
197	int block = sector / floppy->bs_factor;
198	int blocks = blk_rq_sectors(rq) / floppy->bs_factor;
199	int cmd = rq_data_dir(rq);
200
201	ide_debug_log(IDE_DBG_FUNC, "block: %d, blocks: %d", block, blocks);
202
203	ide_init_pc(pc);
204	pc->c[0] = cmd == READ ? GPCMD_READ_10 : GPCMD_WRITE_10;
205	put_unaligned(cpu_to_be16(blocks), (unsigned short *)&pc->c[7]);
206	put_unaligned(cpu_to_be32(block), (unsigned int *) &pc->c[2]);
207
208	memcpy(scsi_req(rq)->cmd, pc->c, 12);
209
210	pc->rq = rq;
211	if (cmd == WRITE)
212	pc->flags \|= PC_FLAG_WRITING;
213
214	pc->flags \|= PC_FLAG_DMA_OK;
215	}
216
217	static void idefloppy_blockpc_cmd(struct ide_disk_obj *floppy,
218	struct ide_atapi_pc pc, struct request rq)
219	{
220	ide_init_pc(pc);
221	memcpy(pc->c, scsi_req(rq)->cmd, sizeof(pc->c));
222	pc->rq = rq;
223	if (blk_rq_bytes(rq)) {
224	pc->flags \|= PC_FLAG_DMA_OK;
225	if (rq_data_dir(rq) == WRITE)
226	pc->flags \|= PC_FLAG_WRITING;
227	}
228	}
229
230	static ide_startstop_t ide_floppy_do_request(ide_drive_t *drive,
231	struct request *rq, sector_t block)
232	{
233	struct ide_disk_obj *floppy = drive->driver_data;
234	struct ide_cmd cmd;
235	struct ide_atapi_pc *pc;
236
237	ide_debug_log(IDE_DBG_FUNC, "enter, cmd: 0x%x\n", rq->cmd[0]);
238
239	if (drive->debug_mask & IDE_DBG_RQ)
240	blk_dump_rq_flags(rq, (rq->rq_disk
241	? rq->rq_disk->disk_name
242	: "dev?"));
243
244	if (scsi_req(rq)->result >= ERROR_MAX) {
245	if (drive->failed_pc) {
246	ide_floppy_report_error(floppy, drive->failed_pc);
247	drive->failed_pc = NULL;
248	} else
249	printk(KERN_ERR PFX "%s: I/O error\n", drive->name);
250
251	if (ata_misc_request(rq)) {
252	scsi_req(rq)->result = 0;
253	ide_complete_rq(drive, BLK_STS_OK, blk_rq_bytes(rq));
254	return ide_stopped;
255	} else
256	goto out_end;
257	}
258
259	switch (req_op(rq)) {
260	default:
261	if (((long)blk_rq_pos(rq) % floppy->bs_factor) \|\|
262	(blk_rq_sectors(rq) % floppy->bs_factor)) {
263	printk(KERN_ERR PFX "%s: unsupported r/w rq size\n",
264	drive->name);
265	goto out_end;
266	}
267	pc = &floppy->queued_pc;
268	idefloppy_create_rw_cmd(drive, pc, rq, (unsigned long)block);
269	break;
270	case REQ_OP_SCSI_IN:
271	case REQ_OP_SCSI_OUT:
272	pc = &floppy->queued_pc;
273	idefloppy_blockpc_cmd(floppy, pc, rq);
274	break;
275	case REQ_OP_DRV_IN:
276	case REQ_OP_DRV_OUT:
277	switch (ide_req(rq)->type) {
278	case ATA_PRIV_MISC:
279	case ATA_PRIV_SENSE:
280	pc = (struct ide_atapi_pc *)ide_req(rq)->special;
281	break;
282	default:
283	BUG();
284	}
285	}
286
287	ide_prep_sense(drive, rq);
288
289	memset(&cmd, 0, sizeof(cmd));
290
291	if (rq_data_dir(rq))
292	cmd.tf_flags \|= IDE_TFLAG_WRITE;
293
294	cmd.rq = rq;
295
296	if (!blk_rq_is_passthrough(rq) \|\| blk_rq_bytes(rq)) {
297	ide_init_sg_cmd(&cmd, blk_rq_bytes(rq));
298	ide_map_sg(drive, &cmd);
299	}
300
301	pc->rq = rq;
302
303	return ide_floppy_issue_pc(drive, &cmd, pc);
304	out_end:
305	drive->failed_pc = NULL;
306	if (blk_rq_is_passthrough(rq) && scsi_req(rq)->result == 0)
307	scsi_req(rq)->result = -EIO;
308	ide_complete_rq(drive, BLK_STS_IOERR, blk_rq_bytes(rq));
309	return ide_stopped;
310	}
311
312	/*
313	* Look at the flexible disk page parameters. We ignore the CHS capacity
314	* parameters and use the LBA parameters instead.
315	*/
316	static int ide_floppy_get_flexible_disk_page(ide_drive_t *drive,
317	struct ide_atapi_pc *pc)
318	{
319	struct ide_disk_obj *floppy = drive->driver_data;
320	struct gendisk *disk = floppy->disk;
321	u8 *page, buf[40];
322	int capacity, lba_capacity;
323	u16 transfer_rate, sector_size, cyls, rpm;
324	u8 heads, sectors;
325
326	ide_floppy_create_mode_sense_cmd(pc, IDEFLOPPY_FLEXIBLE_DISK_PAGE);
327
328	if (ide_queue_pc_tail(drive, disk, pc, buf, pc->req_xfer)) {
329	printk(KERN_ERR PFX "Can't get flexible disk page params\n");
330	return 1;
331	}
332
333	if (buf[3] & 0x80)
334	drive->dev_flags \|= IDE_DFLAG_WP;
335	else
336	drive->dev_flags &= ~IDE_DFLAG_WP;
337
338	set_disk_ro(disk, !!(drive->dev_flags & IDE_DFLAG_WP));
339
340	page = &buf[8];
341
342	transfer_rate = be16_to_cpup((__be16 *)&buf[8 + 2]);
343	sector_size = be16_to_cpup((__be16 *)&buf[8 + 6]);
344	cyls = be16_to_cpup((__be16 *)&buf[8 + 8]);
345	rpm = be16_to_cpup((__be16 *)&buf[8 + 28]);
346	heads = buf[8 + 4];
347	sectors = buf[8 + 5];
348
349	capacity = cyls * heads * sectors * sector_size;
350
351	if (memcmp(page, &floppy->flexible_disk_page, 32))
352	printk(KERN_INFO PFX "%s: %dkB, %d/%d/%d CHS, %d kBps, "
353	"%d sector size, %d rpm\n",
354	drive->name, capacity / 1024, cyls, heads,
355	sectors, transfer_rate / 8, sector_size, rpm);
356
357	memcpy(&floppy->flexible_disk_page, page, 32);
358	drive->bios_cyl = cyls;
359	drive->bios_head = heads;
360	drive->bios_sect = sectors;
361	lba_capacity = floppy->blocks * floppy->block_size;
362
363	if (capacity < lba_capacity) {
364	printk(KERN_NOTICE PFX "%s: The disk reports a capacity of %d "
365	"bytes, but the drive only handles %d\n",
366	drive->name, lba_capacity, capacity);
367	floppy->blocks = floppy->block_size ?
368	capacity / floppy->block_size : 0;
369	drive->capacity64 = floppy->blocks * floppy->bs_factor;
370	}
371
372	return 0;
373	}
374
375	/*
376	* Determine if a media is present in the floppy drive, and if so, its LBA
377	* capacity.
378	*/
379	static int ide_floppy_get_capacity(ide_drive_t *drive)
380	{
381	struct ide_disk_obj *floppy = drive->driver_data;
382	struct gendisk *disk = floppy->disk;
383	struct ide_atapi_pc pc;
384	u8 *cap_desc;
385	u8 pc_buf[256], header_len, desc_cnt;
386	int i, rc = 1, blocks, length;
387
388	ide_debug_log(IDE_DBG_FUNC, "enter");
389
390	drive->bios_cyl = 0;
391	drive->bios_head = drive->bios_sect = 0;
392	floppy->blocks = 0;
393	floppy->bs_factor = 1;
394	drive->capacity64 = 0;
395
396	ide_floppy_create_read_capacity_cmd(&pc);
397	if (ide_queue_pc_tail(drive, disk, &pc, pc_buf, pc.req_xfer)) {
398	printk(KERN_ERR PFX "Can't get floppy parameters\n");
399	return 1;
400	}
401	header_len = pc_buf[3];
402	cap_desc = &pc_buf[4];
403	desc_cnt = header_len / 8; /* capacity descriptor of 8 bytes */
404
405	for (i = 0; i < desc_cnt; i++) {
406	unsigned int desc_start = 4 + i*8;
407
408	blocks = be32_to_cpup((__be32 *)&pc_buf[desc_start]);
409	length = be16_to_cpup((__be16 *)&pc_buf[desc_start + 6]);
410
411	ide_debug_log(IDE_DBG_PROBE, "Descriptor %d: %dkB, %d blocks, "
412	"%d sector size",
413	i, blocks * length / 1024,
414	blocks, length);
415
416	if (i)
417	continue;
418	/*
419	* the code below is valid only for the 1st descriptor, ie i=0
420	*/
421
422	switch (pc_buf[desc_start + 4] & 0x03) {
423	/* Clik! drive returns this instead of CAPACITY_CURRENT */
424	case CAPACITY_UNFORMATTED:
425	if (!(drive->atapi_flags & IDE_AFLAG_CLIK_DRIVE))
426	/*
427	* If it is not a clik drive, break out
428	* (maintains previous driver behaviour)
429	*/
430	break;
431	fallthrough;
432	case CAPACITY_CURRENT:
433	/* Normal Zip/LS-120 disks */
434	if (memcmp(cap_desc, &floppy->cap_desc, 8))
435	printk(KERN_INFO PFX "%s: %dkB, %d blocks, %d "
436	"sector size\n",
437	drive->name, blocks * length / 1024,
438	blocks, length);
439	memcpy(&floppy->cap_desc, cap_desc, 8);
440
441	if (!length \|\| length % 512) {
442	printk(KERN_NOTICE PFX "%s: %d bytes block size"
443	" not supported\n", drive->name, length);
444	} else {
445	floppy->blocks = blocks;
446	floppy->block_size = length;
447	floppy->bs_factor = length / 512;
448	if (floppy->bs_factor != 1)
449	printk(KERN_NOTICE PFX "%s: Warning: "
450	"non 512 bytes block size not "
451	"fully supported\n",
452	drive->name);
453	drive->capacity64 =
454	floppy->blocks * floppy->bs_factor;
455	rc = 0;
456	}
457	break;
458	case CAPACITY_NO_CARTRIDGE:
459	/*
460	* This is a KERN_ERR so it appears on screen
461	* for the user to see
462	*/
463	printk(KERN_ERR PFX "%s: No disk in drive\n",
464	drive->name);
465	break;
466	case CAPACITY_INVALID:
467	printk(KERN_ERR PFX "%s: Invalid capacity for disk "
468	"in drive\n", drive->name);
469	break;
470	}
471	ide_debug_log(IDE_DBG_PROBE, "Descriptor 0 Code: %d",
472	pc_buf[desc_start + 4] & 0x03);
473	}
474
475	/* Clik! disk does not support get_flexible_disk_page */
476	if (!(drive->atapi_flags & IDE_AFLAG_CLIK_DRIVE))
477	(void) ide_floppy_get_flexible_disk_page(drive, &pc);
478
479	return rc;
480	}
481
482	static void ide_floppy_setup(ide_drive_t *drive)
483	{
484	struct ide_disk_obj *floppy = drive->driver_data;
485	u16 *id = drive->id;
486
487	drive->pc_callback = ide_floppy_callback;
488
489	/*
490	* We used to check revisions here. At this point however I'm giving up.
491	* Just assume they are all broken, its easier.
492	*
493	* The actual reason for the workarounds was likely a driver bug after
494	* all rather than a firmware bug, and the workaround below used to hide
495	* it. It should be fixed as of version 1.9, but to be on the safe side
496	* we'll leave the limitation below for the 2.2.x tree.
497	*/
498	if (strstarts((char *)&id[ATA_ID_PROD], "IOMEGA ZIP 100 ATAPI")) {
499	drive->atapi_flags \|= IDE_AFLAG_ZIP_DRIVE;
500	/* This value will be visible in the /proc/ide/hdx/settings */
501	drive->pc_delay = IDEFLOPPY_PC_DELAY;
502	blk_queue_max_hw_sectors(drive->queue, 64);
503	}
504
505	/*
506	* Guess what? The IOMEGA Clik! drive also needs the above fix. It makes
507	* nasty clicking noises without it, so please don't remove this.
508	*/
509	if (strstarts((char *)&id[ATA_ID_PROD], "IOMEGA Clik!")) {
510	blk_queue_max_hw_sectors(drive->queue, 64);
511	drive->atapi_flags \|= IDE_AFLAG_CLIK_DRIVE;
512	/* IOMEGA Clik! drives do not support lock/unlock commands */
513	drive->dev_flags &= ~IDE_DFLAG_DOORLOCKING;
514	}
515
516	(void) ide_floppy_get_capacity(drive);
517
518	ide_proc_register_driver(drive, floppy->driver);
519	}
520
521	static void ide_floppy_flush(ide_drive_t *drive)
522	{
523	}
524
525	static int ide_floppy_init_media(ide_drive_t drive, struct gendisk disk)
526	{
527	int ret = 0;
528
529	if (ide_do_test_unit_ready(drive, disk))
530	ide_do_start_stop(drive, disk, 1);
531
532	ret = ide_floppy_get_capacity(drive);
533
534	set_capacity(disk, ide_gd_capacity(drive));
535
536	return ret;
537	}
538
539	const struct ide_disk_ops ide_atapi_disk_ops = {
540	.check = ide_check_atapi_device,
541	.get_capacity = ide_floppy_get_capacity,
542	.setup = ide_floppy_setup,
543	.flush = ide_floppy_flush,
544	.init_media = ide_floppy_init_media,
545	.set_doorlock = ide_set_media_lock,
546	.do_request = ide_floppy_do_request,
547	.ioctl = ide_floppy_ioctl,
548	#ifdef CONFIG_COMPAT
549	.compat_ioctl = ide_floppy_compat_ioctl,
550	#endif
551	};

drivers/ide/ide-floppy.h+0−42

@@ -1,42 +0,0 @@
1	/* SPDX-License-Identifier: GPL-2.0 */
2	#ifndef __IDE_FLOPPY_H
3	#define __IDE_FLOPPY_H
4
5	#include "ide-gd.h"
6
7	#ifdef CONFIG_IDE_GD_ATAPI
8	/*
9	* Pages of the SELECT SENSE / MODE SENSE packet commands.
10	* See SFF-8070i spec.
11	*/
12	#define IDEFLOPPY_CAPABILITIES_PAGE 0x1b
13	#define IDEFLOPPY_FLEXIBLE_DISK_PAGE 0x05
14
15	/* IOCTLs used in low-level formatting. */
16	#define IDEFLOPPY_IOCTL_FORMAT_SUPPORTED 0x4600
17	#define IDEFLOPPY_IOCTL_FORMAT_GET_CAPACITY 0x4601
18	#define IDEFLOPPY_IOCTL_FORMAT_START 0x4602
19	#define IDEFLOPPY_IOCTL_FORMAT_GET_PROGRESS 0x4603
20
21	/* ide-floppy.c */
22	extern const struct ide_disk_ops ide_atapi_disk_ops;
23	void ide_floppy_create_mode_sense_cmd(struct ide_atapi_pc *, u8);
24	void ide_floppy_create_read_capacity_cmd(struct ide_atapi_pc *);
25
26	/* ide-floppy_ioctl.c */
27	int ide_floppy_ioctl(ide_drive_t , struct block_device , fmode_t,
28	unsigned int, unsigned long);
29	int ide_floppy_compat_ioctl(ide_drive_t , struct block_device , fmode_t,
30	unsigned int, unsigned long);
31
32	#ifdef CONFIG_IDE_PROC_FS
33	/* ide-floppy_proc.c */
34	extern ide_proc_entry_t ide_floppy_proc[];
35	extern const struct ide_proc_devset ide_floppy_settings[];
36	#endif
37	#else
38	#define ide_floppy_proc NULL
39	#define ide_floppy_settings NULL
40	#endif
41
42	#endif /__IDE_FLOPPY_H /

drivers/ide/ide-floppy_ioctl.c+0−339

@@ -1,339 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	/*
3	* ide-floppy IOCTLs handling.
4	*/
5
6	#include <linux/kernel.h>
7	#include <linux/ide.h>
8	#include <linux/compat.h>
9	#include <linux/cdrom.h>
10	#include <linux/mutex.h>
11
12	#include <asm/unaligned.h>
13
14	#include <scsi/scsi_ioctl.h>
15
16	#include "ide-floppy.h"
17
18	/*
19	* Obtain the list of formattable capacities.
20	* Very similar to ide_floppy_get_capacity, except that we push the capacity
21	* descriptors to userland, instead of our own structures.
22	*
23	* Userland gives us the following structure:
24	*
25	* struct idefloppy_format_capacities {
26	* int nformats;
27	* struct {
28	* int nblocks;
29	* int blocksize;
30	* } formats[];
31	* };
32	*
33	* userland initializes nformats to the number of allocated formats[] records.
34	* On exit we set nformats to the number of records we've actually initialized.
35	*/
36
37	static DEFINE_MUTEX(ide_floppy_ioctl_mutex);
38	static int ide_floppy_get_format_capacities(ide_drive_t *drive,
39	struct ide_atapi_pc *pc,
40	int __user *arg)
41	{
42	struct ide_disk_obj *floppy = drive->driver_data;
43	int i, blocks, length, u_array_size, u_index;
44	int __user *argp;
45	u8 pc_buf[256], header_len, desc_cnt;
46
47	if (get_user(u_array_size, arg))
48	return -EFAULT;
49
50	if (u_array_size <= 0)
51	return -EINVAL;
52
53	ide_floppy_create_read_capacity_cmd(pc);
54
55	if (ide_queue_pc_tail(drive, floppy->disk, pc, pc_buf, pc->req_xfer)) {
56	printk(KERN_ERR "ide-floppy: Can't get floppy parameters\n");
57	return -EIO;
58	}
59
60	header_len = pc_buf[3];
61	desc_cnt = header_len / 8; /* capacity descriptor of 8 bytes */
62
63	u_index = 0;
64	argp = arg + 1;
65
66	/*
67	* We always skip the first capacity descriptor. That's the current
68	* capacity. We are interested in the remaining descriptors, the
69	* formattable capacities.
70	*/
71	for (i = 1; i < desc_cnt; i++) {
72	unsigned int desc_start = 4 + i*8;
73
74	if (u_index >= u_array_size)
75	break; /* User-supplied buffer too small */
76
77	blocks = be32_to_cpup((__be32 *)&pc_buf[desc_start]);
78	length = be16_to_cpup((__be16 *)&pc_buf[desc_start + 6]);
79
80	if (put_user(blocks, argp))
81	return -EFAULT;
82
83	++argp;
84
85	if (put_user(length, argp))
86	return -EFAULT;
87
88	++argp;
89
90	++u_index;
91	}
92
93	if (put_user(u_index, arg))
94	return -EFAULT;
95
96	return 0;
97	}
98
99	static void ide_floppy_create_format_unit_cmd(struct ide_atapi_pc *pc,
100	u8 *buf, int b, int l,
101	int flags)
102	{
103	ide_init_pc(pc);
104	pc->c[0] = GPCMD_FORMAT_UNIT;
105	pc->c[1] = 0x17;
106
107	memset(buf, 0, 12);
108	buf[1] = 0xA2;
109	/* Default format list header, u8 1: FOV/DCRT/IMM bits set */
110
111	if (flags & 1) /* Verify bit on... */
112	buf[1] ^= 0x20; /* ... turn off DCRT bit */
113	buf[3] = 8;
114
115	put_unaligned(cpu_to_be32(b), (unsigned int *)(&buf[4]));
116	put_unaligned(cpu_to_be32(l), (unsigned int *)(&buf[8]));
117	pc->req_xfer = 12;
118	pc->flags \|= PC_FLAG_WRITING;
119	}
120
121	static int ide_floppy_get_sfrp_bit(ide_drive_t drive, struct ide_atapi_pc pc)
122	{
123	struct ide_disk_obj *floppy = drive->driver_data;
124	u8 buf[20];
125
126	drive->atapi_flags &= ~IDE_AFLAG_SRFP;
127
128	ide_floppy_create_mode_sense_cmd(pc, IDEFLOPPY_CAPABILITIES_PAGE);
129	pc->flags \|= PC_FLAG_SUPPRESS_ERROR;
130
131	if (ide_queue_pc_tail(drive, floppy->disk, pc, buf, pc->req_xfer))
132	return 1;
133
134	if (buf[8 + 2] & 0x40)
135	drive->atapi_flags \|= IDE_AFLAG_SRFP;
136
137	return 0;
138	}
139
140	static int ide_floppy_format_unit(ide_drive_t drive, struct ide_atapi_pc pc,
141	int __user *arg)
142	{
143	struct ide_disk_obj *floppy = drive->driver_data;
144	u8 buf[12];
145	int blocks, length, flags, err = 0;
146
147	if (floppy->openers > 1) {
148	/* Don't format if someone is using the disk */
149	drive->dev_flags &= ~IDE_DFLAG_FORMAT_IN_PROGRESS;
150	return -EBUSY;
151	}
152
153	drive->dev_flags \|= IDE_DFLAG_FORMAT_IN_PROGRESS;
154
155	/*
156	* Send ATAPI_FORMAT_UNIT to the drive.
157	*
158	* Userland gives us the following structure:
159	*
160	* struct idefloppy_format_command {
161	* int nblocks;
162	* int blocksize;
163	* int flags;
164	* } ;
165	*
166	* flags is a bitmask, currently, the only defined flag is:
167	*
168	* 0x01 - verify media after format.
169	*/
170	if (get_user(blocks, arg) \|\|
171	get_user(length, arg+1) \|\|
172	get_user(flags, arg+2)) {
173	err = -EFAULT;
174	goto out;
175	}
176
177	ide_floppy_get_sfrp_bit(drive, pc);
178	ide_floppy_create_format_unit_cmd(pc, buf, blocks, length, flags);
179
180	if (ide_queue_pc_tail(drive, floppy->disk, pc, buf, pc->req_xfer))
181	err = -EIO;
182
183	out:
184	if (err)
185	drive->dev_flags &= ~IDE_DFLAG_FORMAT_IN_PROGRESS;
186	return err;
187	}
188
189	/*
190	* Get ATAPI_FORMAT_UNIT progress indication.
191	*
192	* Userland gives a pointer to an int. The int is set to a progress
193	* indicator 0-65536, with 65536=100%.
194	*
195	* If the drive does not support format progress indication, we just check
196	* the dsc bit, and return either 0 or 65536.
197	*/
198
199	static int ide_floppy_get_format_progress(ide_drive_t *drive,
200	struct ide_atapi_pc *pc,
201	int __user *arg)
202	{
203	struct ide_disk_obj *floppy = drive->driver_data;
204	u8 sense_buf[18];
205	int progress_indication = 0x10000;
206
207	if (drive->atapi_flags & IDE_AFLAG_SRFP) {
208	ide_create_request_sense_cmd(drive, pc);
209	if (ide_queue_pc_tail(drive, floppy->disk, pc, sense_buf,
210	pc->req_xfer))
211	return -EIO;
212
213	if (floppy->sense_key == 2 &&
214	floppy->asc == 4 &&
215	floppy->ascq == 4)
216	progress_indication = floppy->progress_indication;
217
218	/* Else assume format_unit has finished, and we're at 0x10000 */
219	} else {
220	ide_hwif_t *hwif = drive->hwif;
221	unsigned long flags;
222	u8 stat;
223
224	local_irq_save(flags);
225	stat = hwif->tp_ops->read_status(hwif);
226	local_irq_restore(flags);
227
228	progress_indication = ((stat & ATA_DSC) == 0) ? 0 : 0x10000;
229	}
230
231	if (put_user(progress_indication, arg))
232	return -EFAULT;
233
234	return 0;
235	}
236
237	static int ide_floppy_lockdoor(ide_drive_t drive, struct ide_atapi_pc pc,
238	unsigned long arg, unsigned int cmd)
239	{
240	struct ide_disk_obj *floppy = drive->driver_data;
241	struct gendisk *disk = floppy->disk;
242	int prevent = (arg && cmd != CDROMEJECT) ? 1 : 0;
243
244	if (floppy->openers > 1)
245	return -EBUSY;
246
247	ide_set_media_lock(drive, disk, prevent);
248
249	if (cmd == CDROMEJECT)
250	ide_do_start_stop(drive, disk, 2);
251
252	return 0;
253	}
254
255	static int ide_floppy_format_ioctl(ide_drive_t drive, struct ide_atapi_pc pc,
256	fmode_t mode, unsigned int cmd,
257	void __user *argp)
258	{
259	switch (cmd) {
260	case IDEFLOPPY_IOCTL_FORMAT_SUPPORTED:
261	return 0;
262	case IDEFLOPPY_IOCTL_FORMAT_GET_CAPACITY:
263	return ide_floppy_get_format_capacities(drive, pc, argp);
264	case IDEFLOPPY_IOCTL_FORMAT_START:
265	if (!(mode & FMODE_WRITE))
266	return -EPERM;
267	return ide_floppy_format_unit(drive, pc, (int __user *)argp);
268	case IDEFLOPPY_IOCTL_FORMAT_GET_PROGRESS:
269	return ide_floppy_get_format_progress(drive, pc, argp);
270	default:
271	return -ENOTTY;
272	}
273	}
274
275	int ide_floppy_ioctl(ide_drive_t drive, struct block_device bdev,
276	fmode_t mode, unsigned int cmd, unsigned long arg)
277	{
278	struct ide_atapi_pc pc;
279	void __user argp = (void __user )arg;
280	int err;
281
282	mutex_lock(&ide_floppy_ioctl_mutex);
283	if (cmd == CDROMEJECT \|\| cmd == CDROM_LOCKDOOR) {
284	err = ide_floppy_lockdoor(drive, &pc, arg, cmd);
285	goto out;
286	}
287
288	err = ide_floppy_format_ioctl(drive, &pc, mode, cmd, argp);
289	if (err != -ENOTTY)
290	goto out;
291
292	/*
293	* skip SCSI_IOCTL_SEND_COMMAND (deprecated)
294	* and CDROM_SEND_PACKET (legacy) ioctls
295	*/
296	if (cmd != CDROM_SEND_PACKET && cmd != SCSI_IOCTL_SEND_COMMAND)
297	err = scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
298
299	if (err == -ENOTTY)
300	err = generic_ide_ioctl(drive, bdev, cmd, arg);
301
302	out:
303	mutex_unlock(&ide_floppy_ioctl_mutex);
304	return err;
305	}
306
307	#ifdef CONFIG_COMPAT
308	int ide_floppy_compat_ioctl(ide_drive_t drive, struct block_device bdev,
309	fmode_t mode, unsigned int cmd, unsigned long arg)
310	{
311	struct ide_atapi_pc pc;
312	void __user *argp = compat_ptr(arg);
313	int err;
314
315	mutex_lock(&ide_floppy_ioctl_mutex);
316	if (cmd == CDROMEJECT \|\| cmd == CDROM_LOCKDOOR) {
317	err = ide_floppy_lockdoor(drive, &pc, arg, cmd);
318	goto out;
319	}
320
321	err = ide_floppy_format_ioctl(drive, &pc, mode, cmd, argp);
322	if (err != -ENOTTY)
323	goto out;
324
325	/*
326	* skip SCSI_IOCTL_SEND_COMMAND (deprecated)
327	* and CDROM_SEND_PACKET (legacy) ioctls
328	*/
329	if (cmd != CDROM_SEND_PACKET && cmd != SCSI_IOCTL_SEND_COMMAND)
330	err = scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
331
332	if (err == -ENOTTY)
333	err = generic_ide_ioctl(drive, bdev, cmd, arg);
334
335	out:
336	mutex_unlock(&ide_floppy_ioctl_mutex);
337	return err;
338	}
339	#endif

drivers/ide/ide-floppy_proc.c+0−34

@@ -1,34 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0
2	#include <linux/kernel.h>
3	#include <linux/export.h>
4	#include <linux/ide.h>
5	#include <linux/seq_file.h>
6
7	#include "ide-floppy.h"
8
9	static int idefloppy_capacity_proc_show(struct seq_file m, void v)
10	{
11	ide_drive_tdrive = (ide_drive_t )m->private;
12
13	seq_printf(m, "%llu\n", (long long)ide_gd_capacity(drive));
14	return 0;
15	}
16
17	ide_proc_entry_t ide_floppy_proc[] = {
18	{ "capacity", S_IFREG\|S_IRUGO, idefloppy_capacity_proc_show },
19	{ "geometry", S_IFREG\|S_IRUGO, ide_geometry_proc_show },
20	{}
21	};
22
23	ide_devset_rw_field(bios_cyl, bios_cyl);
24	ide_devset_rw_field(bios_head, bios_head);
25	ide_devset_rw_field(bios_sect, bios_sect);
26	ide_devset_rw_field(ticks, pc_delay);
27
28	const struct ide_proc_devset ide_floppy_settings[] = {
29	IDE_PROC_DEVSET(bios_cyl, 0, 1023),
30	IDE_PROC_DEVSET(bios_head, 0, 255),
31	IDE_PROC_DEVSET(bios_sect, 0, 63),
32	IDE_PROC_DEVSET(ticks, 0, 255),
33	{ NULL },
34	};

drivers/ide/ide-gd.c+0−432

@@ -1,432 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	#include <linux/module.h>
3	#include <linux/types.h>
4	#include <linux/string.h>
5	#include <linux/kernel.h>
6	#include <linux/errno.h>
7	#include <linux/genhd.h>
8	#include <linux/mutex.h>
9	#include <linux/ide.h>
10	#include <linux/hdreg.h>
11	#include <linux/dmi.h>
12	#include <linux/slab.h>
13
14	#if !defined(CONFIG_DEBUG_BLOCK_EXT_DEVT)
15	#define IDE_DISK_MINORS (1 << PARTN_BITS)
16	#else
17	#define IDE_DISK_MINORS 0
18	#endif
19
20	#include "ide-disk.h"
21	#include "ide-floppy.h"
22
23	#define IDE_GD_VERSION "1.18"
24
25	/* module parameters */
26	static DEFINE_MUTEX(ide_gd_mutex);
27	static unsigned long debug_mask;
28	module_param(debug_mask, ulong, 0644);
29
30	static DEFINE_MUTEX(ide_disk_ref_mutex);
31
32	static void ide_disk_release(struct device *);
33
34	static struct ide_disk_obj ide_disk_get(struct gendisk disk)
35	{
36	struct ide_disk_obj *idkp = NULL;
37
38	mutex_lock(&ide_disk_ref_mutex);
39	idkp = ide_drv_g(disk, ide_disk_obj);
40	if (idkp) {
41	if (ide_device_get(idkp->drive))
42	idkp = NULL;
43	else
44	get_device(&idkp->dev);
45	}
46	mutex_unlock(&ide_disk_ref_mutex);
47	return idkp;
48	}
49
50	static void ide_disk_put(struct ide_disk_obj *idkp)
51	{
52	ide_drive_t *drive = idkp->drive;
53
54	mutex_lock(&ide_disk_ref_mutex);
55	put_device(&idkp->dev);
56	ide_device_put(drive);
57	mutex_unlock(&ide_disk_ref_mutex);
58	}
59
60	sector_t ide_gd_capacity(ide_drive_t *drive)
61	{
62	return drive->capacity64;
63	}
64
65	static int ide_gd_probe(ide_drive_t *);
66
67	static void ide_gd_remove(ide_drive_t *drive)
68	{
69	struct ide_disk_obj *idkp = drive->driver_data;
70	struct gendisk *g = idkp->disk;
71
72	ide_proc_unregister_driver(drive, idkp->driver);
73	device_del(&idkp->dev);
74	del_gendisk(g);
75	drive->disk_ops->flush(drive);
76
77	mutex_lock(&ide_disk_ref_mutex);
78	put_device(&idkp->dev);
79	mutex_unlock(&ide_disk_ref_mutex);
80	}
81
82	static void ide_disk_release(struct device *dev)
83	{
84	struct ide_disk_obj *idkp = to_ide_drv(dev, ide_disk_obj);
85	ide_drive_t *drive = idkp->drive;
86	struct gendisk *g = idkp->disk;
87
88	drive->disk_ops = NULL;
89	drive->driver_data = NULL;
90	g->private_data = NULL;
91	put_disk(g);
92	kfree(idkp);
93	}
94
95	/*
96	* On HPA drives the capacity needs to be
97	* reinitialized on resume otherwise the disk
98	* can not be used and a hard reset is required
99	*/
100	static void ide_gd_resume(ide_drive_t *drive)
101	{
102	if (ata_id_hpa_enabled(drive->id))
103	(void)drive->disk_ops->get_capacity(drive);
104	}
105
106	static const struct dmi_system_id ide_coldreboot_table[] = {
107	{
108	/* Acer TravelMate 66x cuts power during reboot */
109	.ident = "Acer TravelMate 660",
110	.matches = {
111	DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
112	DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 660"),
113	},
114	},
115
116	{ } /* terminate list */
117	};
118
119	static void ide_gd_shutdown(ide_drive_t *drive)
120	{
121	#ifdef CONFIG_ALPHA
122	/* On Alpha, halt(8) doesn't actually turn the machine off,
123	it puts you into the sort of firmware monitor. Typically,
124	it's used to boot another kernel image, so it's not much
125	different from reboot(8). Therefore, we don't need to
126	spin down the disk in this case, especially since Alpha
127	firmware doesn't handle disks in standby mode properly.
128	On the other hand, it's reasonably safe to turn the power
129	off when the shutdown process reaches the firmware prompt,
130	as the firmware initialization takes rather long time -
131	at least 10 seconds, which should be sufficient for
132	the disk to expire its write cache. */
133	if (system_state != SYSTEM_POWER_OFF) {
134	#else
135	if (system_state == SYSTEM_RESTART &&
136	!dmi_check_system(ide_coldreboot_table)) {
137	#endif
138	drive->disk_ops->flush(drive);
139	return;
140	}
141
142	printk(KERN_INFO "Shutdown: %s\n", drive->name);
143
144	drive->gendev.bus->suspend(&drive->gendev, PMSG_SUSPEND);
145	}
146
147	#ifdef CONFIG_IDE_PROC_FS
148	static ide_proc_entry_t ide_disk_proc_entries(ide_drive_t drive)
149	{
150	return (drive->media == ide_disk) ? ide_disk_proc : ide_floppy_proc;
151	}
152
153	static const struct ide_proc_devset ide_disk_proc_devsets(ide_drive_t drive)
154	{
155	return (drive->media == ide_disk) ? ide_disk_settings
156	: ide_floppy_settings;
157	}
158	#endif
159
160	static ide_startstop_t ide_gd_do_request(ide_drive_t *drive,
161	struct request *rq, sector_t sector)
162	{
163	return drive->disk_ops->do_request(drive, rq, sector);
164	}
165
166	static struct ide_driver ide_gd_driver = {
167	.gen_driver = {
168	.owner = THIS_MODULE,
169	.name = "ide-gd",
170	.bus = &ide_bus_type,
171	},
172	.probe = ide_gd_probe,
173	.remove = ide_gd_remove,
174	.resume = ide_gd_resume,
175	.shutdown = ide_gd_shutdown,
176	.version = IDE_GD_VERSION,
177	.do_request = ide_gd_do_request,
178	#ifdef CONFIG_IDE_PROC_FS
179	.proc_entries = ide_disk_proc_entries,
180	.proc_devsets = ide_disk_proc_devsets,
181	#endif
182	};
183
184	static int ide_gd_open(struct block_device *bdev, fmode_t mode)
185	{
186	struct gendisk *disk = bdev->bd_disk;
187	struct ide_disk_obj *idkp;
188	ide_drive_t *drive;
189	int ret = 0;
190
191	idkp = ide_disk_get(disk);
192	if (idkp == NULL)
193	return -ENXIO;
194
195	drive = idkp->drive;
196
197	ide_debug_log(IDE_DBG_FUNC, "enter");
198
199	idkp->openers++;
200
201	if ((drive->dev_flags & IDE_DFLAG_REMOVABLE) && idkp->openers == 1) {
202	drive->dev_flags &= ~IDE_DFLAG_FORMAT_IN_PROGRESS;
203	/* Just in case */
204
205	ret = drive->disk_ops->init_media(drive, disk);
206
207	/*
208	* Allow O_NDELAY to open a drive without a disk, or with an
209	* unreadable disk, so that we can get the format capacity
210	* of the drive or begin the format - Sam
211	*/
212	if (ret && (mode & FMODE_NDELAY) == 0) {
213	ret = -EIO;
214	goto out_put_idkp;
215	}
216
217	if ((drive->dev_flags & IDE_DFLAG_WP) && (mode & FMODE_WRITE)) {
218	ret = -EROFS;
219	goto out_put_idkp;
220	}
221
222	/*
223	* Ignore the return code from door_lock,
224	* since the open() has already succeeded,
225	* and the door_lock is irrelevant at this point.
226	*/
227	drive->disk_ops->set_doorlock(drive, disk, 1);
228	if (__invalidate_device(bdev, true))
229	pr_warn("VFS: busy inodes on changed media %s\n",
230	bdev->bd_disk->disk_name);
231	drive->disk_ops->get_capacity(drive);
232	set_capacity(disk, ide_gd_capacity(drive));
233	set_bit(GD_NEED_PART_SCAN, &disk->state);
234	} else if (drive->dev_flags & IDE_DFLAG_FORMAT_IN_PROGRESS) {
235	ret = -EBUSY;
236	goto out_put_idkp;
237	}
238	return 0;
239
240	out_put_idkp:
241	idkp->openers--;
242	ide_disk_put(idkp);
243	return ret;
244	}
245
246	static int ide_gd_unlocked_open(struct block_device *bdev, fmode_t mode)
247	{
248	int ret;
249
250	mutex_lock(&ide_gd_mutex);
251	ret = ide_gd_open(bdev, mode);
252	mutex_unlock(&ide_gd_mutex);
253
254	return ret;
255	}
256
257
258	static void ide_gd_release(struct gendisk *disk, fmode_t mode)
259	{
260	struct ide_disk_obj *idkp = ide_drv_g(disk, ide_disk_obj);
261	ide_drive_t *drive = idkp->drive;
262
263	ide_debug_log(IDE_DBG_FUNC, "enter");
264
265	mutex_lock(&ide_gd_mutex);
266	if (idkp->openers == 1)
267	drive->disk_ops->flush(drive);
268
269	if ((drive->dev_flags & IDE_DFLAG_REMOVABLE) && idkp->openers == 1) {
270	drive->disk_ops->set_doorlock(drive, disk, 0);
271	drive->dev_flags &= ~IDE_DFLAG_FORMAT_IN_PROGRESS;
272	}
273
274	idkp->openers--;
275
276	ide_disk_put(idkp);
277	mutex_unlock(&ide_gd_mutex);
278	}
279
280	static int ide_gd_getgeo(struct block_device bdev, struct hd_geometry geo)
281	{
282	struct ide_disk_obj *idkp = ide_drv_g(bdev->bd_disk, ide_disk_obj);
283	ide_drive_t *drive = idkp->drive;
284
285	geo->heads = drive->bios_head;
286	geo->sectors = drive->bios_sect;
287	geo->cylinders = (u16)drive->bios_cyl; /* truncate */
288	return 0;
289	}
290
291	static void ide_gd_unlock_native_capacity(struct gendisk *disk)
292	{
293	struct ide_disk_obj *idkp = ide_drv_g(disk, ide_disk_obj);
294	ide_drive_t *drive = idkp->drive;
295	const struct ide_disk_ops *disk_ops = drive->disk_ops;
296
297	if (disk_ops->unlock_native_capacity)
298	disk_ops->unlock_native_capacity(drive);
299	}
300
301	static int ide_gd_ioctl(struct block_device *bdev, fmode_t mode,
302	unsigned int cmd, unsigned long arg)
303	{
304	struct ide_disk_obj *idkp = ide_drv_g(bdev->bd_disk, ide_disk_obj);
305	ide_drive_t *drive = idkp->drive;
306
307	return drive->disk_ops->ioctl(drive, bdev, mode, cmd, arg);
308	}
309
310	#ifdef CONFIG_COMPAT
311	static int ide_gd_compat_ioctl(struct block_device *bdev, fmode_t mode,
312	unsigned int cmd, unsigned long arg)
313	{
314	struct ide_disk_obj *idkp = ide_drv_g(bdev->bd_disk, ide_disk_obj);
315	ide_drive_t *drive = idkp->drive;
316
317	if (!drive->disk_ops->compat_ioctl)
318	return -ENOIOCTLCMD;
319
320	return drive->disk_ops->compat_ioctl(drive, bdev, mode, cmd, arg);
321	}
322	#endif
323
324	static const struct block_device_operations ide_gd_ops = {
325	.owner = THIS_MODULE,
326	.open = ide_gd_unlocked_open,
327	.release = ide_gd_release,
328	.ioctl = ide_gd_ioctl,
329	#ifdef CONFIG_COMPAT
330	.compat_ioctl = ide_gd_compat_ioctl,
331	#endif
332	.getgeo = ide_gd_getgeo,
333	.unlock_native_capacity = ide_gd_unlock_native_capacity,
334	};
335
336	static int ide_gd_probe(ide_drive_t *drive)
337	{
338	const struct ide_disk_ops *disk_ops = NULL;
339	struct ide_disk_obj *idkp;
340	struct gendisk *g;
341
342	/* strstr("foo", "") is non-NULL */
343	if (!strstr("ide-gd", drive->driver_req))
344	goto failed;
345
346	#ifdef CONFIG_IDE_GD_ATA
347	if (drive->media == ide_disk)
348	disk_ops = &ide_ata_disk_ops;
349	#endif
350	#ifdef CONFIG_IDE_GD_ATAPI
351	if (drive->media == ide_floppy)
352	disk_ops = &ide_atapi_disk_ops;
353	#endif
354	if (disk_ops == NULL)
355	goto failed;
356
357	if (disk_ops->check(drive, DRV_NAME) == 0) {
358	printk(KERN_ERR PFX "%s: not supported by this driver\n",
359	drive->name);
360	goto failed;
361	}
362
363	idkp = kzalloc(sizeof(*idkp), GFP_KERNEL);
364	if (!idkp) {
365	printk(KERN_ERR PFX "%s: can't allocate a disk structure\n",
366	drive->name);
367	goto failed;
368	}
369
370	g = alloc_disk_node(IDE_DISK_MINORS, hwif_to_node(drive->hwif));
371	if (!g)
372	goto out_free_idkp;
373
374	ide_init_disk(g, drive);
375
376	idkp->dev.parent = &drive->gendev;
377	idkp->dev.release = ide_disk_release;
378	dev_set_name(&idkp->dev, "%s", dev_name(&drive->gendev));
379
380	if (device_register(&idkp->dev))
381	goto out_free_disk;
382
383	idkp->drive = drive;
384	idkp->driver = &ide_gd_driver;
385	idkp->disk = g;
386
387	g->private_data = &idkp->driver;
388
389	drive->driver_data = idkp;
390	drive->debug_mask = debug_mask;
391	drive->disk_ops = disk_ops;
392
393	disk_ops->setup(drive);
394
395	set_capacity(g, ide_gd_capacity(drive));
396
397	g->minors = IDE_DISK_MINORS;
398	g->flags \|= GENHD_FL_EXT_DEVT;
399	if (drive->dev_flags & IDE_DFLAG_REMOVABLE)
400	g->flags = GENHD_FL_REMOVABLE;
401	g->fops = &ide_gd_ops;
402	g->events = DISK_EVENT_MEDIA_CHANGE;
403	device_add_disk(&drive->gendev, g, NULL);
404	return 0;
405
406	out_free_disk:
407	put_disk(g);
408	out_free_idkp:
409	kfree(idkp);
410	failed:
411	return -ENODEV;
412	}
413
414	static int __init ide_gd_init(void)
415	{
416	printk(KERN_INFO DRV_NAME " driver " IDE_GD_VERSION "\n");
417	return driver_register(&ide_gd_driver.gen_driver);
418	}
419
420	static void __exit ide_gd_exit(void)
421	{
422	driver_unregister(&ide_gd_driver.gen_driver);
423	}
424
425	MODULE_ALIAS("ide:m-disk");
426	MODULE_ALIAS("ide-disk");
427	MODULE_ALIAS("ide:m-floppy");
428	MODULE_ALIAS("ide-floppy");
429	module_init(ide_gd_init);
430	module_exit(ide_gd_exit);
431	MODULE_LICENSE("GPL");
432	MODULE_DESCRIPTION("generic ATA/ATAPI disk driver");

drivers/ide/ide-gd.h+0−43

@@ -1,43 +0,0 @@
1	/* SPDX-License-Identifier: GPL-2.0 */
2	#ifndef __IDE_GD_H
3	#define __IDE_GD_H
4
5	#define DRV_NAME "ide-gd"
6	#define PFX DRV_NAME ": "
7
8	/* define to see debug info */
9	#define IDE_GD_DEBUG_LOG 0
10
11	#if IDE_GD_DEBUG_LOG
12	#define ide_debug_log(lvl, fmt, args...) __ide_debug_log(lvl, fmt, ## args)
13	#else
14	#define ide_debug_log(lvl, fmt, args...) do {} while (0)
15	#endif
16
17	struct ide_disk_obj {
18	ide_drive_t *drive;
19	struct ide_driver *driver;
20	struct gendisk *disk;
21	struct device dev;
22	unsigned int openers; /* protected by BKL for now */
23
24	/* used for blk_{fs,pc}_request() requests */
25	struct ide_atapi_pc queued_pc;
26
27	/* Last error information */
28	u8 sense_key, asc, ascq;
29
30	int progress_indication;
31
32	/* Device information */
33	/* Current format */
34	int blocks, block_size, bs_factor;
35	/* Last format capacity descriptor */
36	u8 cap_desc[8];
37	/* Copy of the flexible disk page */
38	u8 flexible_disk_page[32];
39	};
40
41	sector_t ide_gd_capacity(ide_drive_t *);
42
43	#endif /* __IDE_GD_H */

drivers/ide/ide-generic.c+0−139

@@ -1,139 +0,0 @@
1	/*
2	* generic/default IDE host driver
3	*
4	* Copyright (C) 2004, 2008-2009 Bartlomiej Zolnierkiewicz
5	* This code was split off from ide.c. See it for original copyrights.
6	*
7	* May be copied or modified under the terms of the GNU General Public License.
8	*/
9
10	#include <linux/kernel.h>
11	#include <linux/init.h>
12	#include <linux/module.h>
13	#include <linux/ide.h>
14	#include <linux/pci_ids.h>
15
16	/* FIXME: convert arm to use ide_platform host driver */
17	#ifdef CONFIG_ARM
18	#include <asm/irq.h>
19	#endif
20
21	#define DRV_NAME "ide_generic"
22
23	static int probe_mask;
24	module_param(probe_mask, int, 0);
25	MODULE_PARM_DESC(probe_mask, "probe mask for legacy ISA IDE ports");
26
27	static const struct ide_port_info ide_generic_port_info = {
28	.host_flags = IDE_HFLAG_NO_DMA,
29	.chipset = ide_generic,
30	};
31
32	#ifdef CONFIG_ARM
33	static const u16 legacy_bases[] = { 0x1f0 };
34	static const int legacy_irqs[] = { IRQ_HARDDISK };
35	#elif defined(CONFIG_ALPHA)
36	static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168 };
37	static const int legacy_irqs[] = { 14, 15, 11, 10 };
38	#else
39	static const u16 legacy_bases[] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
40	static const int legacy_irqs[] = { 14, 15, 11, 10, 8, 12 };
41	#endif
42
43	static void ide_generic_check_pci_legacy_iobases(int primary, int secondary)
44	{
45	#ifdef CONFIG_PCI
46	struct pci_dev *p = NULL;
47	u16 val;
48
49	for_each_pci_dev(p) {
50	if (pci_resource_start(p, 0) == 0x1f0)
51	*primary = 1;
52	if (pci_resource_start(p, 2) == 0x170)
53	*secondary = 1;
54
55	/* Cyrix CS55{1,2}0 pre SFF MWDMA ATA on the bridge */
56	if (p->vendor == PCI_VENDOR_ID_CYRIX &&
57	(p->device == PCI_DEVICE_ID_CYRIX_5510 \|\|
58	p->device == PCI_DEVICE_ID_CYRIX_5520))
59	primary = secondary = 1;
60
61	/* Intel MPIIX - PIO ATA on non PCI side of bridge */
62	if (p->vendor == PCI_VENDOR_ID_INTEL &&
63	p->device == PCI_DEVICE_ID_INTEL_82371MX) {
64	pci_read_config_word(p, 0x6C, &val);
65	if (val & 0x8000) {
66	/* ATA port enabled */
67	if (val & 0x4000)
68	*secondary = 1;
69	else
70	*primary = 1;
71	}
72	}
73	}
74	#endif
75	}
76
77	static int __init ide_generic_init(void)
78	{
79	struct ide_hw hw, *hws[] = { &hw };
80	unsigned long io_addr;
81	int i, rc = 0, primary = 0, secondary = 0;
82
83	ide_generic_check_pci_legacy_iobases(&primary, &secondary);
84
85	if (!probe_mask) {
86	printk(KERN_INFO DRV_NAME ": please use \"probe_mask=0x3f\" "
87	"module parameter for probing all legacy ISA IDE ports\n");
88
89	if (primary == 0)
90	probe_mask \|= 0x1;
91
92	if (secondary == 0)
93	probe_mask \|= 0x2;
94	} else
95	printk(KERN_INFO DRV_NAME ": enforcing probing of I/O ports "
96	"upon user request\n");
97
98	for (i = 0; i < ARRAY_SIZE(legacy_bases); i++) {
99	io_addr = legacy_bases[i];
100
101	if ((probe_mask & (1 << i)) && io_addr) {
102	if (!request_region(io_addr, 8, DRV_NAME)) {
103	printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX "
104	"not free.\n",
105	DRV_NAME, io_addr, io_addr + 7);
106	rc = -EBUSY;
107	continue;
108	}
109
110	if (!request_region(io_addr + 0x206, 1, DRV_NAME)) {
111	printk(KERN_ERR "%s: I/O resource 0x%lX "
112	"not free.\n",
113	DRV_NAME, io_addr + 0x206);
114	release_region(io_addr, 8);
115	rc = -EBUSY;
116	continue;
117	}
118
119	memset(&hw, 0, sizeof(hw));
120	ide_std_init_ports(&hw, io_addr, io_addr + 0x206);
121	#ifdef CONFIG_IA64
122	hw.irq = isa_irq_to_vector(legacy_irqs[i]);
123	#else
124	hw.irq = legacy_irqs[i];
125	#endif
126	rc = ide_host_add(&ide_generic_port_info, hws, 1, NULL);
127	if (rc) {
128	release_region(io_addr + 0x206, 1);
129	release_region(io_addr, 8);
130	}
131	}
132	}
133
134	return rc;
135	}
136
137	module_init(ide_generic_init);
138
139	MODULE_LICENSE("GPL");

drivers/ide/ide-io-std.c+0−262

@@ -1,262 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2
3	#include <linux/kernel.h>
4	#include <linux/export.h>
5	#include <linux/ide.h>
6
7	#if defined(CONFIG_ARM) \|\| defined(CONFIG_M68K) \|\| defined(CONFIG_MIPS) \|\| \
8	defined(CONFIG_PARISC) \|\| defined(CONFIG_PPC) \|\| defined(CONFIG_SPARC)
9	#include <asm/ide.h>
10	#else
11	#include <asm-generic/ide_iops.h>
12	#endif
13
14	/*
15	* Conventional PIO operations for ATA devices
16	*/
17
18	static u8 ide_inb(unsigned long port)
19	{
20	return (u8) inb(port);
21	}
22
23	static void ide_outb(u8 val, unsigned long port)
24	{
25	outb(val, port);
26	}
27
28	/*
29	* MMIO operations, typically used for SATA controllers
30	*/
31
32	static u8 ide_mm_inb(unsigned long port)
33	{
34	return (u8) readb((void __iomem *) port);
35	}
36
37	static void ide_mm_outb(u8 value, unsigned long port)
38	{
39	writeb(value, (void __iomem *) port);
40	}
41
42	void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
43	{
44	if (hwif->host_flags & IDE_HFLAG_MMIO)
45	writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
46	else
47	outb(cmd, hwif->io_ports.command_addr);
48	}
49	EXPORT_SYMBOL_GPL(ide_exec_command);
50
51	u8 ide_read_status(ide_hwif_t *hwif)
52	{
53	if (hwif->host_flags & IDE_HFLAG_MMIO)
54	return readb((void __iomem *)hwif->io_ports.status_addr);
55	else
56	return inb(hwif->io_ports.status_addr);
57	}
58	EXPORT_SYMBOL_GPL(ide_read_status);
59
60	u8 ide_read_altstatus(ide_hwif_t *hwif)
61	{
62	if (hwif->host_flags & IDE_HFLAG_MMIO)
63	return readb((void __iomem *)hwif->io_ports.ctl_addr);
64	else
65	return inb(hwif->io_ports.ctl_addr);
66	}
67	EXPORT_SYMBOL_GPL(ide_read_altstatus);
68
69	void ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
70	{
71	if (hwif->host_flags & IDE_HFLAG_MMIO)
72	writeb(ctl, (void __iomem *)hwif->io_ports.ctl_addr);
73	else
74	outb(ctl, hwif->io_ports.ctl_addr);
75	}
76	EXPORT_SYMBOL_GPL(ide_write_devctl);
77
78	void ide_dev_select(ide_drive_t *drive)
79	{
80	ide_hwif_t *hwif = drive->hwif;
81	u8 select = drive->select \| ATA_DEVICE_OBS;
82
83	if (hwif->host_flags & IDE_HFLAG_MMIO)
84	writeb(select, (void __iomem *)hwif->io_ports.device_addr);
85	else
86	outb(select, hwif->io_ports.device_addr);
87	}
88	EXPORT_SYMBOL_GPL(ide_dev_select);
89
90	void ide_tf_load(ide_drive_t drive, struct ide_taskfile tf, u8 valid)
91	{
92	ide_hwif_t *hwif = drive->hwif;
93	struct ide_io_ports *io_ports = &hwif->io_ports;
94	void (*tf_outb)(u8 addr, unsigned long port);
95	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
96
97	if (mmio)
98	tf_outb = ide_mm_outb;
99	else
100	tf_outb = ide_outb;
101
102	if (valid & IDE_VALID_FEATURE)
103	tf_outb(tf->feature, io_ports->feature_addr);
104	if (valid & IDE_VALID_NSECT)
105	tf_outb(tf->nsect, io_ports->nsect_addr);
106	if (valid & IDE_VALID_LBAL)
107	tf_outb(tf->lbal, io_ports->lbal_addr);
108	if (valid & IDE_VALID_LBAM)
109	tf_outb(tf->lbam, io_ports->lbam_addr);
110	if (valid & IDE_VALID_LBAH)
111	tf_outb(tf->lbah, io_ports->lbah_addr);
112	if (valid & IDE_VALID_DEVICE)
113	tf_outb(tf->device, io_ports->device_addr);
114	}
115	EXPORT_SYMBOL_GPL(ide_tf_load);
116
117	void ide_tf_read(ide_drive_t drive, struct ide_taskfile tf, u8 valid)
118	{
119	ide_hwif_t *hwif = drive->hwif;
120	struct ide_io_ports *io_ports = &hwif->io_ports;
121	u8 (*tf_inb)(unsigned long port);
122	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
123
124	if (mmio)
125	tf_inb = ide_mm_inb;
126	else
127	tf_inb = ide_inb;
128
129	if (valid & IDE_VALID_ERROR)
130	tf->error = tf_inb(io_ports->feature_addr);
131	if (valid & IDE_VALID_NSECT)
132	tf->nsect = tf_inb(io_ports->nsect_addr);
133	if (valid & IDE_VALID_LBAL)
134	tf->lbal = tf_inb(io_ports->lbal_addr);
135	if (valid & IDE_VALID_LBAM)
136	tf->lbam = tf_inb(io_ports->lbam_addr);
137	if (valid & IDE_VALID_LBAH)
138	tf->lbah = tf_inb(io_ports->lbah_addr);
139	if (valid & IDE_VALID_DEVICE)
140	tf->device = tf_inb(io_ports->device_addr);
141	}
142	EXPORT_SYMBOL_GPL(ide_tf_read);
143
144	/*
145	* Some localbus EIDE interfaces require a special access sequence
146	* when using 32-bit I/O instructions to transfer data. We call this
147	* the "vlb_sync" sequence, which consists of three successive reads
148	* of the sector count register location, with interrupts disabled
149	* to ensure that the reads all happen together.
150	*/
151	static void ata_vlb_sync(unsigned long port)
152	{
153	(void)inb(port);
154	(void)inb(port);
155	(void)inb(port);
156	}
157
158	/*
159	* This is used for most PIO data transfers from the IDE interface
160	*
161	* These routines will round up any request for an odd number of bytes,
162	* so if an odd len is specified, be sure that there's at least one
163	* extra byte allocated for the buffer.
164	*/
165	void ide_input_data(ide_drive_t drive, struct ide_cmd cmd, void *buf,
166	unsigned int len)
167	{
168	ide_hwif_t *hwif = drive->hwif;
169	struct ide_io_ports *io_ports = &hwif->io_ports;
170	unsigned long data_addr = io_ports->data_addr;
171	unsigned int words = (len + 1) >> 1;
172	u8 io_32bit = drive->io_32bit;
173	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
174
175	if (io_32bit) {
176	unsigned long flags;
177
178	if ((io_32bit & 2) && !mmio) {
179	local_irq_save(flags);
180	ata_vlb_sync(io_ports->nsect_addr);
181	}
182
183	words >>= 1;
184	if (mmio)
185	__ide_mm_insl((void __iomem *)data_addr, buf, words);
186	else
187	insl(data_addr, buf, words);
188
189	if ((io_32bit & 2) && !mmio)
190	local_irq_restore(flags);
191
192	if (((len + 1) & 3) < 2)
193	return;
194
195	buf += len & ~3;
196	words = 1;
197	}
198
199	if (mmio)
200	__ide_mm_insw((void __iomem *)data_addr, buf, words);
201	else
202	insw(data_addr, buf, words);
203	}
204	EXPORT_SYMBOL_GPL(ide_input_data);
205
206	/*
207	* This is used for most PIO data transfers to the IDE interface
208	*/
209	void ide_output_data(ide_drive_t drive, struct ide_cmd cmd, void *buf,
210	unsigned int len)
211	{
212	ide_hwif_t *hwif = drive->hwif;
213	struct ide_io_ports *io_ports = &hwif->io_ports;
214	unsigned long data_addr = io_ports->data_addr;
215	unsigned int words = (len + 1) >> 1;
216	u8 io_32bit = drive->io_32bit;
217	u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
218
219	if (io_32bit) {
220	unsigned long flags;
221
222	if ((io_32bit & 2) && !mmio) {
223	local_irq_save(flags);
224	ata_vlb_sync(io_ports->nsect_addr);
225	}
226
227	words >>= 1;
228	if (mmio)
229	__ide_mm_outsl((void __iomem *)data_addr, buf, words);
230	else
231	outsl(data_addr, buf, words);
232
233	if ((io_32bit & 2) && !mmio)
234	local_irq_restore(flags);
235
236	if (((len + 1) & 3) < 2)
237	return;
238
239	buf += len & ~3;
240	words = 1;
241	}
242
243	if (mmio)
244	__ide_mm_outsw((void __iomem *)data_addr, buf, words);
245	else
246	outsw(data_addr, buf, words);
247	}
248	EXPORT_SYMBOL_GPL(ide_output_data);
249
250	const struct ide_tp_ops default_tp_ops = {
251	.exec_command = ide_exec_command,
252	.read_status = ide_read_status,
253	.read_altstatus = ide_read_altstatus,
254	.write_devctl = ide_write_devctl,
255
256	.dev_select = ide_dev_select,
257	.tf_load = ide_tf_load,
258	.tf_read = ide_tf_read,
259
260	.input_data = ide_input_data,
261	.output_data = ide_output_data,
262	};

drivers/ide/ide-io.c+0−904

@@ -1,904 +0,0 @@
1	/*
2	* IDE I/O functions
3	*
4	* Basic PIO and command management functionality.
5	*
6	* This code was split off from ide.c. See ide.c for history and original
7	* copyrights.
8	*
9	* This program is free software; you can redistribute it and/or modify it
10	* under the terms of the GNU General Public License as published by the
11	* Free Software Foundation; either version 2, or (at your option) any
12	* later version.
13	*
14	* This program is distributed in the hope that it will be useful, but
15	* WITHOUT ANY WARRANTY; without even the implied warranty of
16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17	* General Public License for more details.
18	*
19	* For the avoidance of doubt the "preferred form" of this code is one which
20	* is in an open non patent encumbered format. Where cryptographic key signing
21	* forms part of the process of creating an executable the information
22	* including keys needed to generate an equivalently functional executable
23	* are deemed to be part of the source code.
24	*/
25
26
27	#include <linux/module.h>
28	#include <linux/types.h>
29	#include <linux/string.h>
30	#include <linux/kernel.h>
31	#include <linux/timer.h>
32	#include <linux/mm.h>
33	#include <linux/interrupt.h>
34	#include <linux/major.h>
35	#include <linux/errno.h>
36	#include <linux/genhd.h>
37	#include <linux/blkpg.h>
38	#include <linux/slab.h>
39	#include <linux/init.h>
40	#include <linux/pci.h>
41	#include <linux/delay.h>
42	#include <linux/ide.h>
43	#include <linux/completion.h>
44	#include <linux/reboot.h>
45	#include <linux/cdrom.h>
46	#include <linux/seq_file.h>
47	#include <linux/device.h>
48	#include <linux/kmod.h>
49	#include <linux/scatterlist.h>
50	#include <linux/bitops.h>
51
52	#include <asm/byteorder.h>
53	#include <asm/irq.h>
54	#include <linux/uaccess.h>
55	#include <asm/io.h>
56
57	int ide_end_rq(ide_drive_t drive, struct request rq, blk_status_t error,
58	unsigned int nr_bytes)
59	{
60	/*
61	* decide whether to reenable DMA -- 3 is a random magic for now,
62	* if we DMA timeout more than 3 times, just stay in PIO
63	*/
64	if ((drive->dev_flags & IDE_DFLAG_DMA_PIO_RETRY) &&
65	drive->retry_pio <= 3) {
66	drive->dev_flags &= ~IDE_DFLAG_DMA_PIO_RETRY;
67	ide_dma_on(drive);
68	}
69
70	if (!blk_update_request(rq, error, nr_bytes)) {
71	if (rq == drive->sense_rq) {
72	drive->sense_rq = NULL;
73	drive->sense_rq_active = false;
74	}
75
76	__blk_mq_end_request(rq, error);
77	return 0;
78	}
79
80	return 1;
81	}
82	EXPORT_SYMBOL_GPL(ide_end_rq);
83
84	void ide_complete_cmd(ide_drive_t drive, struct ide_cmd cmd, u8 stat, u8 err)
85	{
86	const struct ide_tp_ops *tp_ops = drive->hwif->tp_ops;
87	struct ide_taskfile *tf = &cmd->tf;
88	struct request *rq = cmd->rq;
89	u8 tf_cmd = tf->command;
90
91	tf->error = err;
92	tf->status = stat;
93
94	if (cmd->ftf_flags & IDE_FTFLAG_IN_DATA) {
95	u8 data[2];
96
97	tp_ops->input_data(drive, cmd, data, 2);
98
99	cmd->tf.data = data[0];
100	cmd->hob.data = data[1];
101	}
102
103	ide_tf_readback(drive, cmd);
104
105	if ((cmd->tf_flags & IDE_TFLAG_CUSTOM_HANDLER) &&
106	tf_cmd == ATA_CMD_IDLEIMMEDIATE) {
107	if (tf->lbal != 0xc4) {
108	printk(KERN_ERR "%s: head unload failed!\n",
109	drive->name);
110	ide_tf_dump(drive->name, cmd);
111	} else
112	drive->dev_flags \|= IDE_DFLAG_PARKED;
113	}
114
115	if (rq && ata_taskfile_request(rq)) {
116	struct ide_cmd *orig_cmd = ide_req(rq)->special;
117
118	if (cmd->tf_flags & IDE_TFLAG_DYN)
119	kfree(orig_cmd);
120	else if (cmd != orig_cmd)
121	memcpy(orig_cmd, cmd, sizeof(*cmd));
122	}
123	}
124
125	int ide_complete_rq(ide_drive_t *drive, blk_status_t error, unsigned int nr_bytes)
126	{
127	ide_hwif_t *hwif = drive->hwif;
128	struct request *rq = hwif->rq;
129	int rc;
130
131	/*
132	* if failfast is set on a request, override number of sectors
133	* and complete the whole request right now
134	*/
135	if (blk_noretry_request(rq) && error)
136	nr_bytes = blk_rq_sectors(rq) << 9;
137
138	rc = ide_end_rq(drive, rq, error, nr_bytes);
139	if (rc == 0)
140	hwif->rq = NULL;
141
142	return rc;
143	}
144	EXPORT_SYMBOL(ide_complete_rq);
145
146	void ide_kill_rq(ide_drive_t drive, struct request rq)
147	{
148	u8 drv_req = ata_misc_request(rq) && rq->rq_disk;
149	u8 media = drive->media;
150
151	drive->failed_pc = NULL;
152
153	if ((media == ide_floppy \|\| media == ide_tape) && drv_req) {
154	scsi_req(rq)->result = 0;
155	} else {
156	if (media == ide_tape)
157	scsi_req(rq)->result = IDE_DRV_ERROR_GENERAL;
158	else if (blk_rq_is_passthrough(rq) && scsi_req(rq)->result == 0)
159	scsi_req(rq)->result = -EIO;
160	}
161
162	ide_complete_rq(drive, BLK_STS_IOERR, blk_rq_bytes(rq));
163	}
164
165	static void ide_tf_set_specify_cmd(ide_drive_t drive, struct ide_taskfile tf)
166	{
167	tf->nsect = drive->sect;
168	tf->lbal = drive->sect;
169	tf->lbam = drive->cyl;
170	tf->lbah = drive->cyl >> 8;
171	tf->device = (drive->head - 1) \| drive->select;
172	tf->command = ATA_CMD_INIT_DEV_PARAMS;
173	}
174
175	static void ide_tf_set_restore_cmd(ide_drive_t drive, struct ide_taskfile tf)
176	{
177	tf->nsect = drive->sect;
178	tf->command = ATA_CMD_RESTORE;
179	}
180
181	static void ide_tf_set_setmult_cmd(ide_drive_t drive, struct ide_taskfile tf)
182	{
183	tf->nsect = drive->mult_req;
184	tf->command = ATA_CMD_SET_MULTI;
185	}
186
187	/**
188	* do_special - issue some special commands
189	* @drive: drive the command is for
190	*
191	* do_special() is used to issue ATA_CMD_INIT_DEV_PARAMS,
192	* ATA_CMD_RESTORE and ATA_CMD_SET_MULTI commands to a drive.
193	*/
194
195	static ide_startstop_t do_special(ide_drive_t *drive)
196	{
197	struct ide_cmd cmd;
198
199	#ifdef DEBUG
200	printk(KERN_DEBUG "%s: %s: 0x%02x\n", drive->name, __func__,
201	drive->special_flags);
202	#endif
203	if (drive->media != ide_disk) {
204	drive->special_flags = 0;
205	drive->mult_req = 0;
206	return ide_stopped;
207	}
208
209	memset(&cmd, 0, sizeof(cmd));
210	cmd.protocol = ATA_PROT_NODATA;
211
212	if (drive->special_flags & IDE_SFLAG_SET_GEOMETRY) {
213	drive->special_flags &= ~IDE_SFLAG_SET_GEOMETRY;
214	ide_tf_set_specify_cmd(drive, &cmd.tf);
215	} else if (drive->special_flags & IDE_SFLAG_RECALIBRATE) {
216	drive->special_flags &= ~IDE_SFLAG_RECALIBRATE;
217	ide_tf_set_restore_cmd(drive, &cmd.tf);
218	} else if (drive->special_flags & IDE_SFLAG_SET_MULTMODE) {
219	drive->special_flags &= ~IDE_SFLAG_SET_MULTMODE;
220	ide_tf_set_setmult_cmd(drive, &cmd.tf);
221	} else
222	BUG();
223
224	cmd.valid.out.tf = IDE_VALID_OUT_TF \| IDE_VALID_DEVICE;
225	cmd.valid.in.tf = IDE_VALID_IN_TF \| IDE_VALID_DEVICE;
226	cmd.tf_flags = IDE_TFLAG_CUSTOM_HANDLER;
227
228	do_rw_taskfile(drive, &cmd);
229
230	return ide_started;
231	}
232
233	void ide_map_sg(ide_drive_t drive, struct ide_cmd cmd)
234	{
235	ide_hwif_t *hwif = drive->hwif;
236	struct scatterlist sg = hwif->sg_table, last_sg = NULL;
237	struct request *rq = cmd->rq;
238
239	cmd->sg_nents = __blk_rq_map_sg(drive->queue, rq, sg, &last_sg);
240	if (blk_rq_bytes(rq) && (blk_rq_bytes(rq) & rq->q->dma_pad_mask))
241	last_sg->length +=
242	(rq->q->dma_pad_mask & ~blk_rq_bytes(rq)) + 1;
243	}
244	EXPORT_SYMBOL_GPL(ide_map_sg);
245
246	void ide_init_sg_cmd(struct ide_cmd *cmd, unsigned int nr_bytes)
247	{
248	cmd->nbytes = cmd->nleft = nr_bytes;
249	cmd->cursg_ofs = 0;
250	cmd->cursg = NULL;
251	}
252	EXPORT_SYMBOL_GPL(ide_init_sg_cmd);
253
254	/**
255	* execute_drive_command - issue special drive command
256	* @drive: the drive to issue the command on
257	* @rq: the request structure holding the command
258	*
259	* execute_drive_cmd() issues a special drive command, usually
260	* initiated by ioctl() from the external hdparm program. The
261	* command can be a drive command, drive task or taskfile
262	* operation. Weirdly you can call it with NULL to wait for
263	* all commands to finish. Don't do this as that is due to change
264	*/
265
266	static ide_startstop_t execute_drive_cmd (ide_drive_t *drive,
267	struct request *rq)
268	{
269	struct ide_cmd *cmd = ide_req(rq)->special;
270
271	if (cmd) {
272	if (cmd->protocol == ATA_PROT_PIO) {
273	ide_init_sg_cmd(cmd, blk_rq_sectors(rq) << 9);
274	ide_map_sg(drive, cmd);
275	}
276
277	return do_rw_taskfile(drive, cmd);
278	}
279
280	/*
281	* NULL is actually a valid way of waiting for
282	* all current requests to be flushed from the queue.
283	*/
284	#ifdef DEBUG
285	printk("%s: DRIVE_CMD (null)\n", drive->name);
286	#endif
287	scsi_req(rq)->result = 0;
288	ide_complete_rq(drive, BLK_STS_OK, blk_rq_bytes(rq));
289
290	return ide_stopped;
291	}
292
293	static ide_startstop_t ide_special_rq(ide_drive_t drive, struct request rq)
294	{
295	u8 cmd = scsi_req(rq)->cmd[0];
296
297	switch (cmd) {
298	case REQ_PARK_HEADS:
299	case REQ_UNPARK_HEADS:
300	return ide_do_park_unpark(drive, rq);
301	case REQ_DEVSET_EXEC:
302	return ide_do_devset(drive, rq);
303	case REQ_DRIVE_RESET:
304	return ide_do_reset(drive);
305	default:
306	BUG();
307	}
308	}
309
310	/**
311	* start_request - start of I/O and command issuing for IDE
312	*
313	* start_request() initiates handling of a new I/O request. It
314	* accepts commands and I/O (read/write) requests.
315	*
316	* FIXME: this function needs a rename
317	*/
318
319	static ide_startstop_t start_request (ide_drive_t drive, struct request rq)
320	{
321	ide_startstop_t startstop;
322
323	#ifdef DEBUG
324	printk("%s: start_request: current=0x%08lx\n",
325	drive->hwif->name, (unsigned long) rq);
326	#endif
327
328	/* bail early if we've exceeded max_failures */
329	if (drive->max_failures && (drive->failures > drive->max_failures)) {
330	rq->rq_flags \|= RQF_FAILED;
331	goto kill_rq;
332	}
333
334	if (drive->prep_rq && !drive->prep_rq(drive, rq))
335	return ide_stopped;
336
337	if (ata_pm_request(rq))
338	ide_check_pm_state(drive, rq);
339
340	drive->hwif->tp_ops->dev_select(drive);
341	if (ide_wait_stat(&startstop, drive, drive->ready_stat,
342	ATA_BUSY \| ATA_DRQ, WAIT_READY)) {
343	printk(KERN_ERR "%s: drive not ready for command\n", drive->name);
344	return startstop;
345	}
346
347	if (drive->special_flags == 0) {
348	struct ide_driver *drv;
349
350	/*
351	* We reset the drive so we need to issue a SETFEATURES.
352	* Do it _after_ do_special() restored device parameters.
353	*/
354	if (drive->current_speed == 0xff)
355	ide_config_drive_speed(drive, drive->desired_speed);
356
357	if (ata_taskfile_request(rq))
358	return execute_drive_cmd(drive, rq);
359	else if (ata_pm_request(rq)) {
360	struct ide_pm_state *pm = ide_req(rq)->special;
361	#ifdef DEBUG_PM
362	printk("%s: start_power_step(step: %d)\n",
363	drive->name, pm->pm_step);
364	#endif
365	startstop = ide_start_power_step(drive, rq);
366	if (startstop == ide_stopped &&
367	pm->pm_step == IDE_PM_COMPLETED)
368	ide_complete_pm_rq(drive, rq);
369	return startstop;
370	} else if (!rq->rq_disk && ata_misc_request(rq))
371	/*
372	* TODO: Once all ULDs have been modified to
373	* check for specific op codes rather than
374	* blindly accepting any special request, the
375	* check for ->rq_disk above may be replaced
376	* by a more suitable mechanism or even
377	* dropped entirely.
378	*/
379	return ide_special_rq(drive, rq);
380
381	drv = (struct ide_driver *)rq->rq_disk->private_data;
382
383	return drv->do_request(drive, rq, blk_rq_pos(rq));
384	}
385	return do_special(drive);
386	kill_rq:
387	ide_kill_rq(drive, rq);
388	return ide_stopped;
389	}
390
391	/**
392	* ide_stall_queue - pause an IDE device
393	* @drive: drive to stall
394	* @timeout: time to stall for (jiffies)
395	*
396	* ide_stall_queue() can be used by a drive to give excess bandwidth back
397	* to the port by sleeping for timeout jiffies.
398	*/
399
400	void ide_stall_queue (ide_drive_t *drive, unsigned long timeout)
401	{
402	if (timeout > WAIT_WORSTCASE)
403	timeout = WAIT_WORSTCASE;
404	drive->sleep = timeout + jiffies;
405	drive->dev_flags \|= IDE_DFLAG_SLEEPING;
406	}
407	EXPORT_SYMBOL(ide_stall_queue);
408
409	static inline int ide_lock_port(ide_hwif_t *hwif)
410	{
411	if (hwif->busy)
412	return 1;
413
414	hwif->busy = 1;
415
416	return 0;
417	}
418
419	static inline void ide_unlock_port(ide_hwif_t *hwif)
420	{
421	hwif->busy = 0;
422	}
423
424	static inline int ide_lock_host(struct ide_host host, ide_hwif_t hwif)
425	{
426	int rc = 0;
427
428	if (host->host_flags & IDE_HFLAG_SERIALIZE) {
429	rc = test_and_set_bit_lock(IDE_HOST_BUSY, &host->host_busy);
430	if (rc == 0) {
431	if (host->get_lock)
432	host->get_lock(ide_intr, hwif);
433	}
434	}
435	return rc;
436	}
437
438	static inline void ide_unlock_host(struct ide_host *host)
439	{
440	if (host->host_flags & IDE_HFLAG_SERIALIZE) {
441	if (host->release_lock)
442	host->release_lock();
443	clear_bit_unlock(IDE_HOST_BUSY, &host->host_busy);
444	}
445	}
446
447	void ide_requeue_and_plug(ide_drive_t drive, struct request rq)
448	{
449	struct request_queue *q = drive->queue;
450
451	/* Use 3ms as that was the old plug delay */
452	if (rq) {
453	blk_mq_requeue_request(rq, false);
454	blk_mq_delay_kick_requeue_list(q, 3);
455	} else
456	blk_mq_delay_run_hw_queue(q->queue_hw_ctx[0], 3);
457	}
458
459	blk_status_t ide_issue_rq(ide_drive_t drive, struct request rq,
460	bool local_requeue)
461	{
462	ide_hwif_t *hwif = drive->hwif;
463	struct ide_host *host = hwif->host;
464	ide_startstop_t startstop;
465
466	if (!blk_rq_is_passthrough(rq) && !(rq->rq_flags & RQF_DONTPREP)) {
467	rq->rq_flags \|= RQF_DONTPREP;
468	ide_req(rq)->special = NULL;
469	}
470
471	/* HLD do_request() callback might sleep, make sure it's okay */
472	might_sleep();
473
474	if (ide_lock_host(host, hwif))
475	return BLK_STS_DEV_RESOURCE;
476
477	spin_lock_irq(&hwif->lock);
478
479	if (!ide_lock_port(hwif)) {
480	ide_hwif_t *prev_port;
481
482	WARN_ON_ONCE(hwif->rq);
483	repeat:
484	prev_port = hwif->host->cur_port;
485	if (drive->dev_flags & IDE_DFLAG_SLEEPING &&
486	time_after(drive->sleep, jiffies)) {
487	ide_unlock_port(hwif);
488	goto plug_device;
489	}
490
491	if ((hwif->host->host_flags & IDE_HFLAG_SERIALIZE) &&
492	hwif != prev_port) {
493	ide_drive_t *cur_dev =
494	prev_port ? prev_port->cur_dev : NULL;
495
496	/*
497	* set nIEN for previous port, drives in the
498	* quirk list may not like intr setups/cleanups
499	*/
500	if (cur_dev &&
501	(cur_dev->dev_flags & IDE_DFLAG_NIEN_QUIRK) == 0)
502	prev_port->tp_ops->write_devctl(prev_port,
503	ATA_NIEN \|
504	ATA_DEVCTL_OBS);
505
506	hwif->host->cur_port = hwif;
507	}
508	hwif->cur_dev = drive;
509	drive->dev_flags &= ~(IDE_DFLAG_SLEEPING \| IDE_DFLAG_PARKED);
510
511	/*
512	* Sanity: don't accept a request that isn't a PM request
513	* if we are currently power managed. This is very important as
514	* blk_stop_queue() doesn't prevent the blk_fetch_request()
515	* above to return us whatever is in the queue. Since we call
516	* ide_do_request() ourselves, we end up taking requests while
517	* the queue is blocked...
518	*/
519	if ((drive->dev_flags & IDE_DFLAG_BLOCKED) &&
520	ata_pm_request(rq) == 0 &&
521	(rq->rq_flags & RQF_PM) == 0) {
522	/* there should be no pending command at this point */
523	ide_unlock_port(hwif);
524	goto plug_device;
525	}
526
527	scsi_req(rq)->resid_len = blk_rq_bytes(rq);
528	hwif->rq = rq;
529
530	spin_unlock_irq(&hwif->lock);
531	startstop = start_request(drive, rq);
532	spin_lock_irq(&hwif->lock);
533
534	if (startstop == ide_stopped) {
535	rq = hwif->rq;
536	hwif->rq = NULL;
537	if (rq)
538	goto repeat;
539	ide_unlock_port(hwif);
540	goto out;
541	}
542	} else {
543	plug_device:
544	if (local_requeue)
545	list_add(&rq->queuelist, &drive->rq_list);
546	spin_unlock_irq(&hwif->lock);
547	ide_unlock_host(host);
548	if (!local_requeue)
549	ide_requeue_and_plug(drive, rq);
550	return BLK_STS_OK;
551	}
552
553	out:
554	spin_unlock_irq(&hwif->lock);
555	if (rq == NULL)
556	ide_unlock_host(host);
557	return BLK_STS_OK;
558	}
559
560	/*
561	* Issue a new request to a device.
562	*/
563	blk_status_t ide_queue_rq(struct blk_mq_hw_ctx *hctx,
564	const struct blk_mq_queue_data *bd)
565	{
566	ide_drive_t *drive = hctx->queue->queuedata;
567	ide_hwif_t *hwif = drive->hwif;
568

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Merge tag 'for-5.14/libata-2021-06-27' of git://git.kernel.dk/linux-block

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