perf/uapi: Clean up <uapi/linux/perf_event.h> a bit

When applying a recent commit to the <uapi/linux/perf_event.h> header I noticed that we have accumulated quite a bit of historic noise in this header, so do a bit of spring cleaning: - Define bitfields in a vertically aligned fashion, like perf_event_mmap_page::capabilities already does. This makes it easier to see the distribution and sizing of bits within a word, at a glance. The following is much more readable: __u64 cap_bit0 : 1, cap_bit0_is_deprecated : 1, cap_user_rdpmc : 1, cap_user_time : 1, cap_user_time_zero : 1, cap_user_time_short : 1, cap_____res : 58; Than: __u64 cap_bit0:1, cap_bit0_is_deprecated:1, cap_user_rdpmc:1, cap_user_time:1, cap_user_time_zero:1, cap_user_time_short:1, cap_____res:58; So convert all bitfield definitions from the latter style to the former style. - Fix typos and grammar - Fix capitalization - Remove whitespace noise - Harmonize the definitions of various generations and groups of PERF_MEM_ ABI values. - Vertically align all definitions and assignments to the same column (48), as the first definition (enum perf_type_id), throughout the entire header. - And in general make the code and comments to be more in sync with each other and to be more readable overall. No change in functionality. Copy the changes over to tools/include/uapi/linux/perf_event.h.

Ingo Molnar committed 1 year ago

Commit 44889ff1 parent f4b18ff2 files · +662 −642Browse files

Showing the changes to include/uapi/linux (1 of 2 files). Show all

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include/uapi/linux/perf_event.h+331−321

@@ -39,18 +39,21 @@ enum perf_type_id { · 38 unmodified lines
39	39
40	40	/*
41	41	* attr.config layout for type PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE
	42	+ *
42	43	* PERF_TYPE_HARDWARE: 0xEEEEEEEE000000AA
43	44	* AA: hardware event ID
44	45	* EEEEEEEE: PMU type ID
	46	+ *
45	47	* PERF_TYPE_HW_CACHE: 0xEEEEEEEE00DDCCBB
46	48	* BB: hardware cache ID
47	49	* CC: hardware cache op ID
48	50	* DD: hardware cache op result ID
49	51	* EEEEEEEE: PMU type ID
50		− * If the PMU type ID is 0, the PERF_TYPE_RAW will be applied.
	52	+ *
	53	+ * If the PMU type ID is 0, PERF_TYPE_RAW will be applied.
51	54	*/
52		−#define PERF_PMU_TYPE_SHIFT 32
53		−#define PERF_HW_EVENT_MASK 0xffffffff
	55	+#define PERF_PMU_TYPE_SHIFT 32
	56	+#define PERF_HW_EVENT_MASK 0xffffffff
54	57
55	58	/*
56	59	* Generalized performance event event_id types, used by the
@@ -112,7 +115,7 @@ enum perf_hw_cache_op_result_id { · 55 unmodified lines
112	115	/*
113	116	* Special "software" events provided by the kernel, even if the hardware
114	117	* does not support performance events. These events measure various
115		− * physical and sw events of the kernel (and allow the profiling of them as
	118	+ * physical and SW events of the kernel (and allow the profiling of them as
116	119	* well):
117	120	*/
118	121	enum perf_sw_ids {
@@ -167,8 +170,9 @@ enum perf_event_sample_format { · 48 unmodified lines
167	170	};
168	171
169	172	#define PERF_SAMPLE_WEIGHT_TYPE (PERF_SAMPLE_WEIGHT \| PERF_SAMPLE_WEIGHT_STRUCT)
	173	+
170	174	/*
171		− * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set
	175	+ * Values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set.
172	176	*
173	177	* If the user does not pass priv level information via branch_sample_type,
174	178	* the kernel uses the event's priv level. Branch and event priv levels do
@@ -178,20 +182,20 @@ enum perf_event_sample_format { · 3 unmodified lines
178	182	* of branches and therefore it supersedes all the other types.
179	183	*/
180	184	enum perf_branch_sample_type_shift {
181		− PERF_SAMPLE_BRANCH_USER_SHIFT = 0, /* user branches */
182		− PERF_SAMPLE_BRANCH_KERNEL_SHIFT = 1, /* kernel branches */
183		− PERF_SAMPLE_BRANCH_HV_SHIFT = 2, /* hypervisor branches */
184		−
185		− PERF_SAMPLE_BRANCH_ANY_SHIFT = 3, /* any branch types */
186		− PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT = 4, /* any call branch */
187		− PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT = 5, /* any return branch */
188		− PERF_SAMPLE_BRANCH_IND_CALL_SHIFT = 6, /* indirect calls */
189		− PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT = 7, /* transaction aborts */
190		− PERF_SAMPLE_BRANCH_IN_TX_SHIFT = 8, /* in transaction */
191		− PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */
	185	+ PERF_SAMPLE_BRANCH_USER_SHIFT = 0, /* user branches */
	186	+ PERF_SAMPLE_BRANCH_KERNEL_SHIFT = 1, /* kernel branches */
	187	+ PERF_SAMPLE_BRANCH_HV_SHIFT = 2, /* hypervisor branches */
	188	+
	189	+ PERF_SAMPLE_BRANCH_ANY_SHIFT = 3, /* any branch types */
	190	+ PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT = 4, /* any call branch */
	191	+ PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT = 5, /* any return branch */
	192	+ PERF_SAMPLE_BRANCH_IND_CALL_SHIFT = 6, /* indirect calls */
	193	+ PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT = 7, /* transaction aborts */
	194	+ PERF_SAMPLE_BRANCH_IN_TX_SHIFT = 8, /* in transaction */
	195	+ PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9, /* not in transaction */
192	196	PERF_SAMPLE_BRANCH_COND_SHIFT = 10, /* conditional branches */
193	197
194		− PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* call/ret stack */
	198	+ PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11, /* CALL/RET stack */
195	199	PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT = 12, /* indirect jumps */
196	200	PERF_SAMPLE_BRANCH_CALL_SHIFT = 13, /* direct call */
197	201
@@ -210,96 +214,95 @@ enum perf_branch_sample_type_shift { · 12 unmodified lines
210	214	};
211	215
212	216	enum perf_branch_sample_type {
213		− PERF_SAMPLE_BRANCH_USER = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
214		− PERF_SAMPLE_BRANCH_KERNEL = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
215		− PERF_SAMPLE_BRANCH_HV = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
	217	+ PERF_SAMPLE_BRANCH_USER = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
	218	+ PERF_SAMPLE_BRANCH_KERNEL = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
	219	+ PERF_SAMPLE_BRANCH_HV = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
216	220
217		− PERF_SAMPLE_BRANCH_ANY = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
218		− PERF_SAMPLE_BRANCH_ANY_CALL = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
219		− PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
220		− PERF_SAMPLE_BRANCH_IND_CALL = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
221		− PERF_SAMPLE_BRANCH_ABORT_TX = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
222		− PERF_SAMPLE_BRANCH_IN_TX = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
223		− PERF_SAMPLE_BRANCH_NO_TX = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
224		− PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
	221	+ PERF_SAMPLE_BRANCH_ANY = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
	222	+ PERF_SAMPLE_BRANCH_ANY_CALL = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
	223	+ PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
	224	+ PERF_SAMPLE_BRANCH_IND_CALL = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
	225	+ PERF_SAMPLE_BRANCH_ABORT_TX = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
	226	+ PERF_SAMPLE_BRANCH_IN_TX = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
	227	+ PERF_SAMPLE_BRANCH_NO_TX = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
	228	+ PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
225	229
226		− PERF_SAMPLE_BRANCH_CALL_STACK = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
227		− PERF_SAMPLE_BRANCH_IND_JUMP = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
228		− PERF_SAMPLE_BRANCH_CALL = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT,
	230	+ PERF_SAMPLE_BRANCH_CALL_STACK = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
	231	+ PERF_SAMPLE_BRANCH_IND_JUMP = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
	232	+ PERF_SAMPLE_BRANCH_CALL = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT,
229	233
230		− PERF_SAMPLE_BRANCH_NO_FLAGS = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT,
231		− PERF_SAMPLE_BRANCH_NO_CYCLES = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT,
	234	+ PERF_SAMPLE_BRANCH_NO_FLAGS = 1U << PERF_SAMPLE_BRANCH_NO_FLAGS_SHIFT,
	235	+ PERF_SAMPLE_BRANCH_NO_CYCLES = 1U << PERF_SAMPLE_BRANCH_NO_CYCLES_SHIFT,
232	236
233		− PERF_SAMPLE_BRANCH_TYPE_SAVE =
234		− 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT,
	237	+ PERF_SAMPLE_BRANCH_TYPE_SAVE = 1U << PERF_SAMPLE_BRANCH_TYPE_SAVE_SHIFT,
235	238
236		− PERF_SAMPLE_BRANCH_HW_INDEX = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT,
	239	+ PERF_SAMPLE_BRANCH_HW_INDEX = 1U << PERF_SAMPLE_BRANCH_HW_INDEX_SHIFT,
237	240
238		− PERF_SAMPLE_BRANCH_PRIV_SAVE = 1U << PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT,
	241	+ PERF_SAMPLE_BRANCH_PRIV_SAVE = 1U << PERF_SAMPLE_BRANCH_PRIV_SAVE_SHIFT,
239	242
240		− PERF_SAMPLE_BRANCH_COUNTERS = 1U << PERF_SAMPLE_BRANCH_COUNTERS_SHIFT,
	243	+ PERF_SAMPLE_BRANCH_COUNTERS = 1U << PERF_SAMPLE_BRANCH_COUNTERS_SHIFT,
241	244
242		− PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
	245	+ PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
243	246	};
244	247
245	248	/*
246		− * Common flow change classification
	249	+ * Common control flow change classifications:
247	250	*/
248	251	enum {
249		− PERF_BR_UNKNOWN = 0, /* unknown */
250		− PERF_BR_COND = 1, /* conditional */
251		− PERF_BR_UNCOND = 2, /* unconditional */
252		− PERF_BR_IND = 3, /* indirect */
253		− PERF_BR_CALL = 4, /* function call */
254		− PERF_BR_IND_CALL = 5, /* indirect function call */
255		− PERF_BR_RET = 6, /* function return */
256		− PERF_BR_SYSCALL = 7, /* syscall */
257		− PERF_BR_SYSRET = 8, /* syscall return */
258		− PERF_BR_COND_CALL = 9, /* conditional function call */
259		− PERF_BR_COND_RET = 10, /* conditional function return */
260		− PERF_BR_ERET = 11, /* exception return */
261		− PERF_BR_IRQ = 12, /* irq */
262		− PERF_BR_SERROR = 13, /* system error */
263		− PERF_BR_NO_TX = 14, /* not in transaction */
264		− PERF_BR_EXTEND_ABI = 15, /* extend ABI */
	252	+ PERF_BR_UNKNOWN = 0, /* Unknown */
	253	+ PERF_BR_COND = 1, /* Conditional */
	254	+ PERF_BR_UNCOND = 2, /* Unconditional */
	255	+ PERF_BR_IND = 3, /* Indirect */
	256	+ PERF_BR_CALL = 4, /* Function call */
	257	+ PERF_BR_IND_CALL = 5, /* Indirect function call */
	258	+ PERF_BR_RET = 6, /* Function return */
	259	+ PERF_BR_SYSCALL = 7, /* Syscall */
	260	+ PERF_BR_SYSRET = 8, /* Syscall return */
	261	+ PERF_BR_COND_CALL = 9, /* Conditional function call */
	262	+ PERF_BR_COND_RET = 10, /* Conditional function return */
	263	+ PERF_BR_ERET = 11, /* Exception return */
	264	+ PERF_BR_IRQ = 12, /* IRQ */
	265	+ PERF_BR_SERROR = 13, /* System error */
	266	+ PERF_BR_NO_TX = 14, /* Not in transaction */
	267	+ PERF_BR_EXTEND_ABI = 15, /* Extend ABI */
265	268	PERF_BR_MAX,
266	269	};
267	270
268	271	/*
269		− * Common branch speculation outcome classification
	272	+ * Common branch speculation outcome classifications:
270	273	*/
271	274	enum {
272		− PERF_BR_SPEC_NA = 0, /* Not available */
273		− PERF_BR_SPEC_WRONG_PATH = 1, /* Speculative but on wrong path */
274		− PERF_BR_NON_SPEC_CORRECT_PATH = 2, /* Non-speculative but on correct path */
275		− PERF_BR_SPEC_CORRECT_PATH = 3, /* Speculative and on correct path */
	275	+ PERF_BR_SPEC_NA = 0, /* Not available */
	276	+ PERF_BR_SPEC_WRONG_PATH = 1, /* Speculative but on wrong path */
	277	+ PERF_BR_NON_SPEC_CORRECT_PATH = 2, /* Non-speculative but on correct path */
	278	+ PERF_BR_SPEC_CORRECT_PATH = 3, /* Speculative and on correct path */
276	279	PERF_BR_SPEC_MAX,
277	280	};
278	281
279	282	enum {
280		− PERF_BR_NEW_FAULT_ALGN = 0, /* Alignment fault */
281		− PERF_BR_NEW_FAULT_DATA = 1, /* Data fault */
282		− PERF_BR_NEW_FAULT_INST = 2, /* Inst fault */
283		− PERF_BR_NEW_ARCH_1 = 3, /* Architecture specific */
284		− PERF_BR_NEW_ARCH_2 = 4, /* Architecture specific */
285		− PERF_BR_NEW_ARCH_3 = 5, /* Architecture specific */
286		− PERF_BR_NEW_ARCH_4 = 6, /* Architecture specific */
287		− PERF_BR_NEW_ARCH_5 = 7, /* Architecture specific */
	283	+ PERF_BR_NEW_FAULT_ALGN = 0, /* Alignment fault */
	284	+ PERF_BR_NEW_FAULT_DATA = 1, /* Data fault */
	285	+ PERF_BR_NEW_FAULT_INST = 2, /* Inst fault */
	286	+ PERF_BR_NEW_ARCH_1 = 3, /* Architecture specific */
	287	+ PERF_BR_NEW_ARCH_2 = 4, /* Architecture specific */
	288	+ PERF_BR_NEW_ARCH_3 = 5, /* Architecture specific */
	289	+ PERF_BR_NEW_ARCH_4 = 6, /* Architecture specific */
	290	+ PERF_BR_NEW_ARCH_5 = 7, /* Architecture specific */
288	291	PERF_BR_NEW_MAX,
289	292	};
290	293
291	294	enum {
292		− PERF_BR_PRIV_UNKNOWN = 0,
293		− PERF_BR_PRIV_USER = 1,
294		− PERF_BR_PRIV_KERNEL = 2,
295		− PERF_BR_PRIV_HV = 3,
	295	+ PERF_BR_PRIV_UNKNOWN = 0,
	296	+ PERF_BR_PRIV_USER = 1,
	297	+ PERF_BR_PRIV_KERNEL = 2,
	298	+ PERF_BR_PRIV_HV = 3,
296	299	};
297	300
298		−#define PERF_BR_ARM64_FIQ PERF_BR_NEW_ARCH_1
299		−#define PERF_BR_ARM64_DEBUG_HALT PERF_BR_NEW_ARCH_2
300		−#define PERF_BR_ARM64_DEBUG_EXIT PERF_BR_NEW_ARCH_3
301		−#define PERF_BR_ARM64_DEBUG_INST PERF_BR_NEW_ARCH_4
302		−#define PERF_BR_ARM64_DEBUG_DATA PERF_BR_NEW_ARCH_5
	301	+#define PERF_BR_ARM64_FIQ PERF_BR_NEW_ARCH_1
	302	+#define PERF_BR_ARM64_DEBUG_HALT PERF_BR_NEW_ARCH_2
	303	+#define PERF_BR_ARM64_DEBUG_EXIT PERF_BR_NEW_ARCH_3
	304	+#define PERF_BR_ARM64_DEBUG_INST PERF_BR_NEW_ARCH_4
	305	+#define PERF_BR_ARM64_DEBUG_DATA PERF_BR_NEW_ARCH_5
303	306
304	307	#define PERF_SAMPLE_BRANCH_PLM_ALL \
305	308	(PERF_SAMPLE_BRANCH_USER\|\
@@ -310,9 +313,9 @@ enum { · 4 unmodified lines
310	313	* Values to determine ABI of the registers dump.
311	314	*/
312	315	enum perf_sample_regs_abi {
313		− PERF_SAMPLE_REGS_ABI_NONE = 0,
314		− PERF_SAMPLE_REGS_ABI_32 = 1,
315		− PERF_SAMPLE_REGS_ABI_64 = 2,
	316	+ PERF_SAMPLE_REGS_ABI_NONE = 0,
	317	+ PERF_SAMPLE_REGS_ABI_32 = 1,
	318	+ PERF_SAMPLE_REGS_ABI_64 = 2,
316	319	};
317	320
318	321	/*
@@ -320,21 +323,21 @@ enum perf_sample_regs_abi { · 1 unmodified line
320	323	* abort events. Multiple bits can be set.
321	324	*/
322	325	enum {
323		− PERF_TXN_ELISION = (1 << 0), /* From elision */
324		− PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */
325		− PERF_TXN_SYNC = (1 << 2), /* Instruction is related */
326		− PERF_TXN_ASYNC = (1 << 3), /* Instruction not related */
327		− PERF_TXN_RETRY = (1 << 4), /* Retry possible */
328		− PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */
329		− PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
330		− PERF_TXN_CAPACITY_READ = (1 << 7), /* Capacity read abort */
	326	+ PERF_TXN_ELISION = (1 << 0), /* From elision */
	327	+ PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */
	328	+ PERF_TXN_SYNC = (1 << 2), /* Instruction is related */
	329	+ PERF_TXN_ASYNC = (1 << 3), /* Instruction is not related */
	330	+ PERF_TXN_RETRY = (1 << 4), /* Retry possible */
	331	+ PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */
	332	+ PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */
	333	+ PERF_TXN_CAPACITY_READ = (1 << 7), /* Capacity read abort */
331	334
332		− PERF_TXN_MAX = (1 << 8), /* non-ABI */
	335	+ PERF_TXN_MAX = (1 << 8), /* non-ABI */
333	336
334		− /* bits 32..63 are reserved for the abort code */
	337	+ /* Bits 32..63 are reserved for the abort code */
335	338
336		− PERF_TXN_ABORT_MASK = (0xffffffffULL << 32),
337		− PERF_TXN_ABORT_SHIFT = 32,
	339	+ PERF_TXN_ABORT_MASK = (0xffffffffULL << 32),
	340	+ PERF_TXN_ABORT_SHIFT = 32,
338	341	};
339	342
340	343	/*
@@ -369,24 +372,22 @@ enum perf_event_read_format { · 28 unmodified lines
369	372	PERF_FORMAT_MAX = 1U << 5, /* non-ABI */
370	373	};
371	374
372		−#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
373		−#define PERF_ATTR_SIZE_VER1 72 /* add: config2 */
374		−#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */
375		−#define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */
376		− /* add: sample_stack_user */
377		−#define PERF_ATTR_SIZE_VER4 104 /* add: sample_regs_intr */
378		−#define PERF_ATTR_SIZE_VER5 112 /* add: aux_watermark */
379		−#define PERF_ATTR_SIZE_VER6 120 /* add: aux_sample_size */
380		−#define PERF_ATTR_SIZE_VER7 128 /* add: sig_data */
381		−#define PERF_ATTR_SIZE_VER8 136 /* add: config3 */
	375	+#define PERF_ATTR_SIZE_VER0 64 /* Size of first published 'struct perf_event_attr' */
	376	+#define PERF_ATTR_SIZE_VER1 72 /* Add: config2 */
	377	+#define PERF_ATTR_SIZE_VER2 80 /* Add: branch_sample_type */
	378	+#define PERF_ATTR_SIZE_VER3 96 /* Add: sample_regs_user */
	379	+ /* Add: sample_stack_user */
	380	+#define PERF_ATTR_SIZE_VER4 104 /* Add: sample_regs_intr */
	381	+#define PERF_ATTR_SIZE_VER5 112 /* Add: aux_watermark */
	382	+#define PERF_ATTR_SIZE_VER6 120 /* Add: aux_sample_size */
	383	+#define PERF_ATTR_SIZE_VER7 128 /* Add: sig_data */
	384	+#define PERF_ATTR_SIZE_VER8 136 /* Add: config3 */
382	385
383	386	/*
384		− * Hardware event_id to monitor via a performance monitoring event:
385		− *
386		− * @sample_max_stack: Max number of frame pointers in a callchain,
387		− * should be < /proc/sys/kernel/perf_event_max_stack
388		− * Max number of entries of branch stack
389		− * should be < hardware limit
	387	+ * 'struct perf_event_attr' contains various attributes that define
	388	+ * a performance event - most of them hardware related configuration
	389	+ * details, but also a lot of behavioral switches and values implemented
	390	+ * by the kernel.
390	391	*/
391	392	struct perf_event_attr {
392	393
@@ -396,7 +397,7 @@ struct perf_event_attr { · 3 unmodified lines
396	397	__u32 type;
397	398
398	399	/*
399		− * Size of the attr structure, for fwd/bwd compat.
	400	+ * Size of the attr structure, for forward/backwards compatibility.
400	401	*/
401	402	__u32 size;
402	403
@@ -451,21 +452,21 @@ struct perf_event_attr { · 48 unmodified lines
451	452	comm_exec : 1, /* flag comm events that are due to an exec */
452	453	use_clockid : 1, /* use @clockid for time fields */
453	454	context_switch : 1, /* context switch data */
454		− write_backward : 1, /* Write ring buffer from end to beginning */
	455	+ write_backward : 1, /* write ring buffer from end to beginning */
455	456	namespaces : 1, /* include namespaces data */
456	457	ksymbol : 1, /* include ksymbol events */
457		− bpf_event : 1, /* include bpf events */
	458	+ bpf_event : 1, /* include BPF events */
458	459	aux_output : 1, /* generate AUX records instead of events */
459	460	cgroup : 1, /* include cgroup events */
460	461	text_poke : 1, /* include text poke events */
461		− build_id : 1, /* use build id in mmap2 events */
	462	+ build_id : 1, /* use build ID in mmap2 events */
462	463	inherit_thread : 1, /* children only inherit if cloned with CLONE_THREAD */
463	464	remove_on_exec : 1, /* event is removed from task on exec */
464	465	sigtrap : 1, /* send synchronous SIGTRAP on event */
465	466	__reserved_1 : 26;
466	467
467	468	union {
468		− __u32 wakeup_events; /* wakeup every n events */
	469	+ __u32 wakeup_events; /* wake up every n events */
469	470	__u32 wakeup_watermark; /* bytes before wakeup */
470	471	};
471	472
@@ -474,13 +475,13 @@ struct perf_event_attr { · 2 unmodified lines
474	475	__u64 bp_addr;
475	476	__u64 kprobe_func; /* for perf_kprobe */
476	477	__u64 uprobe_path; /* for perf_uprobe */
477		− __u64 config1; /* extension of config */
	478	+ __u64 config1; /* extension of config */
478	479	};
479	480	union {
480	481	__u64 bp_len;
481		− __u64 kprobe_addr; /* when kprobe_func == NULL */
	482	+ __u64 kprobe_addr; /* when kprobe_func == NULL */
482	483	__u64 probe_offset; /* for perf_[k,u]probe */
483		− __u64 config2; /* extension of config1 */
	484	+ __u64 config2; /* extension of config1 */
484	485	};
485	486	__u64 branch_sample_type; /* enum perf_branch_sample_type */
486	487
@@ -510,7 +511,16 @@ struct perf_event_attr { · 23 unmodified lines
510	511	* Wakeup watermark for AUX area
511	512	*/
512	513	__u32 aux_watermark;
	514	+
	515	+ /*
	516	+ * Max number of frame pointers in a callchain, should be
	517	+ * lower than /proc/sys/kernel/perf_event_max_stack.
	518	+ *
	519	+ * Max number of entries of branch stack should be lower
	520	+ * than the hardware limit.
	521	+ */
513	522	__u16 sample_max_stack;
	523	+
514	524	__u16 __reserved_2;
515	525	__u32 aux_sample_size;
516	526
@@ -537,7 +547,7 @@ struct perf_event_attr { · 20 unmodified lines
537	547
538	548	/*
539	549	* Structure used by below PERF_EVENT_IOC_QUERY_BPF command
540		− * to query bpf programs attached to the same perf tracepoint
	550	+ * to query BPF programs attached to the same perf tracepoint
541	551	* as the given perf event.
542	552	*/
543	553	struct perf_event_query_bpf {
@@ -559,21 +569,21 @@ struct perf_event_query_bpf { · 15 unmodified lines
559	569	/*
560	570	* Ioctls that can be done on a perf event fd:
561	571	*/
562		−#define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
563		−#define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
564		−#define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
565		−#define PERF_EVENT_IOC_RESET _IO ('$', 3)
566		−#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64)
567		−#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
568		−#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
569		−#define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *)
570		−#define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32)
571		−#define PERF_EVENT_IOC_PAUSE_OUTPUT _IOW('$', 9, __u32)
	572	+#define PERF_EVENT_IOC_ENABLE _IO ('$', 0)
	573	+#define PERF_EVENT_IOC_DISABLE _IO ('$', 1)
	574	+#define PERF_EVENT_IOC_REFRESH _IO ('$', 2)
	575	+#define PERF_EVENT_IOC_RESET _IO ('$', 3)
	576	+#define PERF_EVENT_IOC_PERIOD _IOW ('$', 4, __u64)
	577	+#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5)
	578	+#define PERF_EVENT_IOC_SET_FILTER _IOW ('$', 6, char *)
	579	+#define PERF_EVENT_IOC_ID _IOR ('$', 7, __u64 *)
	580	+#define PERF_EVENT_IOC_SET_BPF _IOW ('$', 8, __u32)
	581	+#define PERF_EVENT_IOC_PAUSE_OUTPUT _IOW ('$', 9, __u32)
572	582	#define PERF_EVENT_IOC_QUERY_BPF _IOWR('$', 10, struct perf_event_query_bpf *)
573		−#define PERF_EVENT_IOC_MODIFY_ATTRIBUTES _IOW('$', 11, struct perf_event_attr *)
	583	+#define PERF_EVENT_IOC_MODIFY_ATTRIBUTES _IOW ('$', 11, struct perf_event_attr *)
574	584
575	585	enum perf_event_ioc_flags {
576		− PERF_IOC_FLAG_GROUP = 1U << 0,
	586	+ PERF_IOC_FLAG_GROUP = 1U << 0,
577	587	};
578	588
579	589	/*
@@ -584,7 +594,7 @@ struct perf_event_mmap_page { · 4 unmodified lines
584	594	__u32 compat_version; /* lowest version this is compat with */
585	595
586	596	/*
587		− * Bits needed to read the hw events in user-space.
	597	+ * Bits needed to read the HW events in user-space.
588	598	*
589	599	* u32 seq, time_mult, time_shift, index, width;
590	600	* u64 count, enabled, running;
@@ -622,7 +632,7 @@ struct perf_event_mmap_page { · 31 unmodified lines
622	632	__u32 index; /* hardware event identifier */
623	633	__s64 offset; /* add to hardware event value */
624	634	__u64 time_enabled; /* time event active */
625		− __u64 time_running; /* time event on cpu */
	635	+ __u64 time_running; /* time event on CPU */
626	636	union {
627	637	__u64 capabilities;
628	638	struct {
@@ -650,7 +660,7 @@ struct perf_event_mmap_page { · 21 unmodified lines
650	660
651	661	/*
652	662	* If cap_usr_time the below fields can be used to compute the time
653		− * delta since time_enabled (in ns) using rdtsc or similar.
	663	+ * delta since time_enabled (in ns) using RDTSC or similar.
654	664	*
655	665	* u64 quot, rem;
656	666	* u64 delta;
@@ -723,7 +733,7 @@ struct perf_event_mmap_page { · 66 unmodified lines
723	733	* after reading this value.
724	734	*
725	735	* When the mapping is PROT_WRITE the @data_tail value should be
726		− * written by userspace to reflect the last read data, after issueing
	736	+ * written by user-space to reflect the last read data, after issuing
727	737	* an smp_mb() to separate the data read from the ->data_tail store.
728	738	* In this case the kernel will not over-write unread data.
729	739	*
@@ -739,7 +749,7 @@ struct perf_event_mmap_page { · 9 unmodified lines
739	749
740	750	/*
741	751	* AUX area is defined by aux_{offset,size} fields that should be set
742		− * by the userspace, so that
	752	+ * by the user-space, so that
743	753	*
744	754	* aux_offset >= data_offset + data_size
745	755	*
@@ -813,7 +823,7 @@ struct perf_event_mmap_page { · 67 unmodified lines
813	823	* Indicates that thread was preempted in TASK_RUNNING state.
814	824	*
815	825	* PERF_RECORD_MISC_MMAP_BUILD_ID:
816		− * Indicates that mmap2 event carries build id data.
	826	+ * Indicates that mmap2 event carries build ID data.
817	827	*/
818	828	#define PERF_RECORD_MISC_EXACT_IP (1 << 14)
819	829	#define PERF_RECORD_MISC_SWITCH_OUT_PREEMPT (1 << 14)
@@ -824,26 +834,26 @@ struct perf_event_mmap_page { · 4 unmodified lines
824	834	#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
825	835
826	836	struct perf_event_header {
827		− __u32 type;
828		− __u16 misc;
829		− __u16 size;
	837	+ __u32 type;
	838	+ __u16 misc;
	839	+ __u16 size;
830	840	};
831	841
832	842	struct perf_ns_link_info {
833		− __u64 dev;
834		− __u64 ino;
	843	+ __u64 dev;
	844	+ __u64 ino;
835	845	};
836	846
837	847	enum {
838		− NET_NS_INDEX = 0,
839		− UTS_NS_INDEX = 1,
840		− IPC_NS_INDEX = 2,
841		− PID_NS_INDEX = 3,
842		− USER_NS_INDEX = 4,
843		− MNT_NS_INDEX = 5,
844		− CGROUP_NS_INDEX = 6,
845		−
846		− NR_NAMESPACES, /* number of available namespaces */
	848	+ NET_NS_INDEX = 0,
	849	+ UTS_NS_INDEX = 1,
	850	+ IPC_NS_INDEX = 2,
	851	+ PID_NS_INDEX = 3,
	852	+ USER_NS_INDEX = 4,
	853	+ MNT_NS_INDEX = 5,
	854	+ CGROUP_NS_INDEX = 6,
	855	+
	856	+ NR_NAMESPACES, /* number of available namespaces */
847	857	};
848	858
849	859	enum perf_event_type {
@@ -859,11 +869,11 @@ enum perf_event_type { · 9 unmodified lines
859	869	* optional fields being ignored.
860	870	*
861	871	* struct sample_id {
862		− * { u32 pid, tid; } && PERF_SAMPLE_TID
863		− * { u64 time; } && PERF_SAMPLE_TIME
864		− * { u64 id; } && PERF_SAMPLE_ID
865		− * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
866		− * { u32 cpu, res; } && PERF_SAMPLE_CPU
	872	+ * { u32 pid, tid; } && PERF_SAMPLE_TID
	873	+ * { u64 time; } && PERF_SAMPLE_TIME
	874	+ * { u64 id; } && PERF_SAMPLE_ID
	875	+ * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
	876	+ * { u32 cpu, res; } && PERF_SAMPLE_CPU
867	877	* { u64 id; } && PERF_SAMPLE_IDENTIFIER
868	878	* } && perf_event_attr::sample_id_all
869	879	*
@@ -874,7 +884,7 @@ enum perf_event_type { · 4 unmodified lines
874	884
875	885	/*
876	886	* The MMAP events record the PROT_EXEC mappings so that we can
877		− * correlate userspace IPs to code. They have the following structure:
	887	+ * correlate user-space IPs to code. They have the following structure:
878	888	*
879	889	* struct {
880	890	* struct perf_event_header header;
@@ -884,7 +894,7 @@ enum perf_event_type { · 3 unmodified lines
884	894	* u64 len;
885	895	* u64 pgoff;
886	896	* char filename[];
887		− * struct sample_id sample_id;
	897	+ * struct sample_id sample_id;
888	898	* };
889	899	*/
890	900	PERF_RECORD_MMAP = 1,
@@ -894,7 +904,7 @@ enum perf_event_type { · 3 unmodified lines
894	904	* struct perf_event_header header;
895	905	* u64 id;
896	906	* u64 lost;
897		− * struct sample_id sample_id;
	907	+ * struct sample_id sample_id;
898	908	* };
899	909	*/
900	910	PERF_RECORD_LOST = 2,
@@ -905,7 +915,7 @@ enum perf_event_type { · 4 unmodified lines
905	915	*
906	916	* u32 pid, tid;
907	917	* char comm[];
908		− * struct sample_id sample_id;
	918	+ * struct sample_id sample_id;
909	919	* };
910	920	*/
911	921	PERF_RECORD_COMM = 3,
@@ -916,7 +926,7 @@ enum perf_event_type { · 4 unmodified lines
916	926	* u32 pid, ppid;
917	927	* u32 tid, ptid;
918	928	* u64 time;
919		− * struct sample_id sample_id;
	929	+ * struct sample_id sample_id;
920	930	* };
921	931	*/
922	932	PERF_RECORD_EXIT = 4,
@@ -927,7 +937,7 @@ enum perf_event_type { · 4 unmodified lines
927	937	* u64 time;
928	938	* u64 id;
929	939	* u64 stream_id;
930		− * struct sample_id sample_id;
	940	+ * struct sample_id sample_id;
931	941	* };
932	942	*/
933	943	PERF_RECORD_THROTTLE = 5,
@@ -939,7 +949,7 @@ enum perf_event_type { · 5 unmodified lines
939	949	* u32 pid, ppid;
940	950	* u32 tid, ptid;
941	951	* u64 time;
942		− * struct sample_id sample_id;
	952	+ * struct sample_id sample_id;
943	953	* };
944	954	*/
945	955	PERF_RECORD_FORK = 7,
@@ -950,7 +960,7 @@ enum perf_event_type { · 4 unmodified lines
950	960	* u32 pid, tid;
951	961	*
952	962	* struct read_format values;
953		− * struct sample_id sample_id;
	963	+ * struct sample_id sample_id;
954	964	* };
955	965	*/
956	966	PERF_RECORD_READ = 8,
@@ -1005,12 +1015,12 @@ enum perf_event_type { · 48 unmodified lines
1005	1015	* { u64 counters; } cntr[nr] && PERF_SAMPLE_BRANCH_COUNTERS
1006	1016	* } && PERF_SAMPLE_BRANCH_STACK
1007	1017	*
1008		− * { u64 abi; # enum perf_sample_regs_abi
1009		− * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
	1018	+ * { u64 abi; # enum perf_sample_regs_abi
	1019	+ * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER
1010	1020	*
1011		− * { u64 size;
1012		− * char data[size];
1013		− * u64 dyn_size; } && PERF_SAMPLE_STACK_USER
	1021	+ * { u64 size;
	1022	+ * char data[size];
	1023	+ * u64 dyn_size; } && PERF_SAMPLE_STACK_USER
1014	1024	*
1015	1025	* { union perf_sample_weight
1016	1026	* {
@@ -1071,7 +1081,7 @@ enum perf_event_type { · 54 unmodified lines
1071	1081	* };
1072	1082	* u32 prot, flags;
1073	1083	* char filename[];
1074		− * struct sample_id sample_id;
	1084	+ * struct sample_id sample_id;
1075	1085	* };
1076	1086	*/
1077	1087	PERF_RECORD_MMAP2 = 10,
@@ -1080,12 +1090,12 @@ enum perf_event_type { · 2 unmodified lines
1080	1090	* Records that new data landed in the AUX buffer part.
1081	1091	*
1082	1092	* struct {
1083		− * struct perf_event_header header;
	1093	+ * struct perf_event_header header;
1084	1094	*
1085		− * u64 aux_offset;
1086		− * u64 aux_size;
	1095	+ * u64 aux_offset;
	1096	+ * u64 aux_size;
1087	1097	* u64 flags;
1088		− * struct sample_id sample_id;
	1098	+ * struct sample_id sample_id;
1089	1099	* };
1090	1100	*/
1091	1101	PERF_RECORD_AUX = 11,
@@ -1168,7 +1178,7 @@ enum perf_event_type { · 76 unmodified lines
1168	1178	PERF_RECORD_KSYMBOL = 17,
1169	1179
1170	1180	/*
1171		− * Record bpf events:
	1181	+ * Record BPF events:
1172	1182	* enum perf_bpf_event_type {
1173	1183	* PERF_BPF_EVENT_UNKNOWN = 0,
1174	1184	* PERF_BPF_EVENT_PROG_LOAD = 1,
@@ -1246,181 +1256,181 @@ enum perf_record_ksymbol_type { · 71 unmodified lines
1246	1256	#define PERF_RECORD_KSYMBOL_FLAGS_UNREGISTER (1 << 0)
1247	1257
1248	1258	enum perf_bpf_event_type {
1249		− PERF_BPF_EVENT_UNKNOWN = 0,
1250		− PERF_BPF_EVENT_PROG_LOAD = 1,
1251		− PERF_BPF_EVENT_PROG_UNLOAD = 2,
1252		− PERF_BPF_EVENT_MAX, /* non-ABI */
	1259	+ PERF_BPF_EVENT_UNKNOWN = 0,
	1260	+ PERF_BPF_EVENT_PROG_LOAD = 1,
	1261	+ PERF_BPF_EVENT_PROG_UNLOAD = 2,
	1262	+ PERF_BPF_EVENT_MAX, /* non-ABI */
1253	1263	};
1254	1264
1255		−#define PERF_MAX_STACK_DEPTH 127
1256		−#define PERF_MAX_CONTEXTS_PER_STACK 8
	1265	+#define PERF_MAX_STACK_DEPTH 127
	1266	+#define PERF_MAX_CONTEXTS_PER_STACK 8
1257	1267
1258	1268	enum perf_callchain_context {
1259		− PERF_CONTEXT_HV = (__u64)-32,
1260		− PERF_CONTEXT_KERNEL = (__u64)-128,
1261		− PERF_CONTEXT_USER = (__u64)-512,
	1269	+ PERF_CONTEXT_HV = (__u64)-32,
	1270	+ PERF_CONTEXT_KERNEL = (__u64)-128,
	1271	+ PERF_CONTEXT_USER = (__u64)-512,
1262	1272
1263		− PERF_CONTEXT_GUEST = (__u64)-2048,
1264		− PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
1265		− PERF_CONTEXT_GUEST_USER = (__u64)-2560,
	1273	+ PERF_CONTEXT_GUEST = (__u64)-2048,
	1274	+ PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
	1275	+ PERF_CONTEXT_GUEST_USER = (__u64)-2560,
1266	1276
1267		− PERF_CONTEXT_MAX = (__u64)-4095,
	1277	+ PERF_CONTEXT_MAX = (__u64)-4095,
1268	1278	};
1269	1279
1270	1280	/**
1271	1281	* PERF_RECORD_AUX::flags bits
1272	1282	*/
1273		−#define PERF_AUX_FLAG_TRUNCATED 0x01 /* record was truncated to fit */
1274		−#define PERF_AUX_FLAG_OVERWRITE 0x02 /* snapshot from overwrite mode */
1275		−#define PERF_AUX_FLAG_PARTIAL 0x04 /* record contains gaps */
1276		−#define PERF_AUX_FLAG_COLLISION 0x08 /* sample collided with another */
	1283	+#define PERF_AUX_FLAG_TRUNCATED 0x0001 /* Record was truncated to fit */
	1284	+#define PERF_AUX_FLAG_OVERWRITE 0x0002 /* Snapshot from overwrite mode */
	1285	+#define PERF_AUX_FLAG_PARTIAL 0x0004 /* Record contains gaps */
	1286	+#define PERF_AUX_FLAG_COLLISION 0x0008 /* Sample collided with another */
1277	1287	#define PERF_AUX_FLAG_PMU_FORMAT_TYPE_MASK 0xff00 /* PMU specific trace format type */
1278	1288
1279	1289	/* CoreSight PMU AUX buffer formats */
1280		−#define PERF_AUX_FLAG_CORESIGHT_FORMAT_CORESIGHT 0x0000 /* Default for backward compatibility */
1281		−#define PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW 0x0100 /* Raw format of the source */
	1290	+#define PERF_AUX_FLAG_CORESIGHT_FORMAT_CORESIGHT 0x0000 /* Default for backward compatibility */
	1291	+#define PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW 0x0100 /* Raw format of the source */
1282	1292
1283		−#define PERF_FLAG_FD_NO_GROUP (1UL << 0)
1284		−#define PERF_FLAG_FD_OUTPUT (1UL << 1)
1285		−#define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup id, per-cpu mode only */
1286		−#define PERF_FLAG_FD_CLOEXEC (1UL << 3) /* O_CLOEXEC */
	1293	+#define PERF_FLAG_FD_NO_GROUP (1UL << 0)
	1294	+#define PERF_FLAG_FD_OUTPUT (1UL << 1)
	1295	+#define PERF_FLAG_PID_CGROUP (1UL << 2) /* pid=cgroup ID, per-CPU mode only */
	1296	+#define PERF_FLAG_FD_CLOEXEC (1UL << 3) /* O_CLOEXEC */
1287	1297
1288	1298	#if defined(__LITTLE_ENDIAN_BITFIELD)
1289	1299	union perf_mem_data_src {
1290	1300	__u64 val;
1291	1301	struct {
1292		− __u64 mem_op:5, /* type of opcode */
1293		− mem_lvl:14, /* memory hierarchy level */
1294		− mem_snoop:5, /* snoop mode */
1295		− mem_lock:2, /* lock instr */
1296		− mem_dtlb:7, /* tlb access */
1297		− mem_lvl_num:4, /* memory hierarchy level number */
1298		− mem_remote:1, /* remote */
1299		− mem_snoopx:2, /* snoop mode, ext */
1300		− mem_blk:3, /* access blocked */
1301		− mem_hops:3, /* hop level */
1302		− mem_rsvd:18;
	1302	+ __u64 mem_op : 5, /* Type of opcode */
	1303	+ mem_lvl : 14, /* Memory hierarchy level */
	1304	+ mem_snoop : 5, /* Snoop mode */
	1305	+ mem_lock : 2, /* Lock instr */
	1306	+ mem_dtlb : 7, /* TLB access */
	1307	+ mem_lvl_num : 4, /* Memory hierarchy level number */
	1308	+ mem_remote : 1, /* Remote */
	1309	+ mem_snoopx : 2, /* Snoop mode, ext */
	1310	+ mem_blk : 3, /* Access blocked */
	1311	+ mem_hops : 3, /* Hop level */
	1312	+ mem_rsvd : 18;
1303	1313	};
1304	1314	};
1305	1315	#elif defined(__BIG_ENDIAN_BITFIELD)
1306	1316	union perf_mem_data_src {
1307	1317	__u64 val;
1308	1318	struct {
1309		− __u64 mem_rsvd:18,
1310		− mem_hops:3, /* hop level */
1311		− mem_blk:3, /* access blocked */
1312		− mem_snoopx:2, /* snoop mode, ext */
1313		− mem_remote:1, /* remote */
1314		− mem_lvl_num:4, /* memory hierarchy level number */
1315		− mem_dtlb:7, /* tlb access */
1316		− mem_lock:2, /* lock instr */
1317		− mem_snoop:5, /* snoop mode */
1318		− mem_lvl:14, /* memory hierarchy level */
1319		− mem_op:5; /* type of opcode */
	1319	+ __u64 mem_rsvd : 18,
	1320	+ mem_hops : 3, /* Hop level */
	1321	+ mem_blk : 3, /* Access blocked */
	1322	+ mem_snoopx : 2, /* Snoop mode, ext */
	1323	+ mem_remote : 1, /* Remote */
	1324	+ mem_lvl_num : 4, /* Memory hierarchy level number */
	1325	+ mem_dtlb : 7, /* TLB access */
	1326	+ mem_lock : 2, /* Lock instr */
	1327	+ mem_snoop : 5, /* Snoop mode */
	1328	+ mem_lvl : 14, /* Memory hierarchy level */
	1329	+ mem_op : 5; /* Type of opcode */
1320	1330	};
1321	1331	};
1322	1332	#else
1323		−#error "Unknown endianness"
	1333	+# error "Unknown endianness"
1324	1334	#endif
1325	1335
1326		−/* type of opcode (load/store/prefetch,code) */
1327		−#define PERF_MEM_OP_NA 0x01 /* not available */
1328		−#define PERF_MEM_OP_LOAD 0x02 /* load instruction */
1329		−#define PERF_MEM_OP_STORE 0x04 /* store instruction */
1330		−#define PERF_MEM_OP_PFETCH 0x08 /* prefetch */
1331		−#define PERF_MEM_OP_EXEC 0x10 /* code (execution) */
1332		−#define PERF_MEM_OP_SHIFT 0
	1336	+/* Type of memory opcode: */
	1337	+#define PERF_MEM_OP_NA 0x0001 /* Not available */
	1338	+#define PERF_MEM_OP_LOAD 0x0002 /* Load instruction */
	1339	+#define PERF_MEM_OP_STORE 0x0004 /* Store instruction */
	1340	+#define PERF_MEM_OP_PFETCH 0x0008 /* Prefetch */
	1341	+#define PERF_MEM_OP_EXEC 0x0010 /* Code (execution) */
	1342	+#define PERF_MEM_OP_SHIFT 0
1333	1343
1334	1344	/*
1335		− * PERF_MEM_LVL_* namespace being depricated to some extent in the
	1345	+ * The PERF_MEM_LVL_* namespace is being deprecated to some extent in
1336	1346	* favour of newer composite PERF_MEM_{LVLNUM_,REMOTE_,SNOOPX_} fields.
1337		− * Supporting this namespace inorder to not break defined ABIs.
	1347	+ * We support this namespace in order to not break defined ABIs.
1338	1348	*
1339		− * memory hierarchy (memory level, hit or miss)
	1349	+ * Memory hierarchy (memory level, hit or miss)
1340	1350	*/
1341		−#define PERF_MEM_LVL_NA 0x01 /* not available */
1342		−#define PERF_MEM_LVL_HIT 0x02 /* hit level */
1343		−#define PERF_MEM_LVL_MISS 0x04 /* miss level */
1344		−#define PERF_MEM_LVL_L1 0x08 /* L1 */
1345		−#define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */
1346		−#define PERF_MEM_LVL_L2 0x20 /* L2 */
1347		−#define PERF_MEM_LVL_L3 0x40 /* L3 */
1348		−#define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */
1349		−#define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */
1350		−#define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */
1351		−#define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */
1352		−#define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */
1353		−#define PERF_MEM_LVL_IO 0x1000 /* I/O memory */
1354		−#define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */
1355		−#define PERF_MEM_LVL_SHIFT 5
1356		−
1357		−#define PERF_MEM_REMOTE_REMOTE 0x01 /* Remote */
1358		−#define PERF_MEM_REMOTE_SHIFT 37
1359		−
1360		−#define PERF_MEM_LVLNUM_L1 0x01 /* L1 */
1361		−#define PERF_MEM_LVLNUM_L2 0x02 /* L2 */
1362		−#define PERF_MEM_LVLNUM_L3 0x03 /* L3 */
1363		−#define PERF_MEM_LVLNUM_L4 0x04 /* L4 */
1364		−#define PERF_MEM_LVLNUM_L2_MHB 0x05 /* L2 Miss Handling Buffer */
1365		−#define PERF_MEM_LVLNUM_MSC 0x06 /* Memory-side Cache */
1366		−/* 0x7 available */
1367		−#define PERF_MEM_LVLNUM_UNC 0x08 /* Uncached */
1368		−#define PERF_MEM_LVLNUM_CXL 0x09 /* CXL */
1369		−#define PERF_MEM_LVLNUM_IO 0x0a /* I/O */
1370		−#define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */
1371		−#define PERF_MEM_LVLNUM_LFB 0x0c /* LFB / L1 Miss Handling Buffer */
1372		−#define PERF_MEM_LVLNUM_RAM 0x0d /* RAM */
1373		−#define PERF_MEM_LVLNUM_PMEM 0x0e /* PMEM */
1374		−#define PERF_MEM_LVLNUM_NA 0x0f /* N/A */
1375		−
1376		−#define PERF_MEM_LVLNUM_SHIFT 33
1377		−
1378		−/* snoop mode */
1379		−#define PERF_MEM_SNOOP_NA 0x01 /* not available */
1380		−#define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */
1381		−#define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */
1382		−#define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */
1383		−#define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */
1384		−#define PERF_MEM_SNOOP_SHIFT 19
1385		−
1386		−#define PERF_MEM_SNOOPX_FWD 0x01 /* forward */
1387		−#define PERF_MEM_SNOOPX_PEER 0x02 /* xfer from peer */
1388		−#define PERF_MEM_SNOOPX_SHIFT 38
1389		−
1390		−/* locked instruction */
1391		−#define PERF_MEM_LOCK_NA 0x01 /* not available */
1392		−#define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */
1393		−#define PERF_MEM_LOCK_SHIFT 24
	1351	+#define PERF_MEM_LVL_NA 0x0001 /* Not available */
	1352	+#define PERF_MEM_LVL_HIT 0x0002 /* Hit level */
	1353	+#define PERF_MEM_LVL_MISS 0x0004 /* Miss level */
	1354	+#define PERF_MEM_LVL_L1 0x0008 /* L1 */
	1355	+#define PERF_MEM_LVL_LFB 0x0010 /* Line Fill Buffer */
	1356	+#define PERF_MEM_LVL_L2 0x0020 /* L2 */
	1357	+#define PERF_MEM_LVL_L3 0x0040 /* L3 */
	1358	+#define PERF_MEM_LVL_LOC_RAM 0x0080 /* Local DRAM */
	1359	+#define PERF_MEM_LVL_REM_RAM1 0x0100 /* Remote DRAM (1 hop) */
	1360	+#define PERF_MEM_LVL_REM_RAM2 0x0200 /* Remote DRAM (2 hops) */
	1361	+#define PERF_MEM_LVL_REM_CCE1 0x0400 /* Remote Cache (1 hop) */
	1362	+#define PERF_MEM_LVL_REM_CCE2 0x0800 /* Remote Cache (2 hops) */
	1363	+#define PERF_MEM_LVL_IO 0x1000 /* I/O memory */
	1364	+#define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */
	1365	+#define PERF_MEM_LVL_SHIFT 5
	1366	+
	1367	+#define PERF_MEM_REMOTE_REMOTE 0x0001 /* Remote */
	1368	+#define PERF_MEM_REMOTE_SHIFT 37
	1369	+
	1370	+#define PERF_MEM_LVLNUM_L1 0x0001 /* L1 */
	1371	+#define PERF_MEM_LVLNUM_L2 0x0002 /* L2 */
	1372	+#define PERF_MEM_LVLNUM_L3 0x0003 /* L3 */
	1373	+#define PERF_MEM_LVLNUM_L4 0x0004 /* L4 */
	1374	+#define PERF_MEM_LVLNUM_L2_MHB 0x0005 /* L2 Miss Handling Buffer */
	1375	+#define PERF_MEM_LVLNUM_MSC 0x0006 /* Memory-side Cache */
	1376	+/* 0x007 available */
	1377	+#define PERF_MEM_LVLNUM_UNC 0x0008 /* Uncached */
	1378	+#define PERF_MEM_LVLNUM_CXL 0x0009 /* CXL */
	1379	+#define PERF_MEM_LVLNUM_IO 0x000a /* I/O */
	1380	+#define PERF_MEM_LVLNUM_ANY_CACHE 0x000b /* Any cache */
	1381	+#define PERF_MEM_LVLNUM_LFB 0x000c /* LFB / L1 Miss Handling Buffer */
	1382	+#define PERF_MEM_LVLNUM_RAM 0x000d /* RAM */
	1383	+#define PERF_MEM_LVLNUM_PMEM 0x000e /* PMEM */
	1384	+#define PERF_MEM_LVLNUM_NA 0x000f /* N/A */
	1385	+
	1386	+#define PERF_MEM_LVLNUM_SHIFT 33
	1387	+
	1388	+/* Snoop mode */
	1389	+#define PERF_MEM_SNOOP_NA 0x0001 /* Not available */
	1390	+#define PERF_MEM_SNOOP_NONE 0x0002 /* No snoop */
	1391	+#define PERF_MEM_SNOOP_HIT 0x0004 /* Snoop hit */
	1392	+#define PERF_MEM_SNOOP_MISS 0x0008 /* Snoop miss */
	1393	+#define PERF_MEM_SNOOP_HITM 0x0010 /* Snoop hit modified */
	1394	+#define PERF_MEM_SNOOP_SHIFT 19
	1395	+
	1396	+#define PERF_MEM_SNOOPX_FWD 0x0001 /* Forward */
	1397	+#define PERF_MEM_SNOOPX_PEER 0x0002 /* Transfer from peer */
	1398	+#define PERF_MEM_SNOOPX_SHIFT 38
	1399	+
	1400	+/* Locked instruction */
	1401	+#define PERF_MEM_LOCK_NA 0x0001 /* Not available */
	1402	+#define PERF_MEM_LOCK_LOCKED 0x0002 /* Locked transaction */
	1403	+#define PERF_MEM_LOCK_SHIFT 24
1394	1404
1395	1405	/* TLB access */
1396		−#define PERF_MEM_TLB_NA 0x01 /* not available */
1397		−#define PERF_MEM_TLB_HIT 0x02 /* hit level */
1398		−#define PERF_MEM_TLB_MISS 0x04 /* miss level */
1399		−#define PERF_MEM_TLB_L1 0x08 /* L1 */
1400		−#define PERF_MEM_TLB_L2 0x10 /* L2 */
1401		−#define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/
1402		−#define PERF_MEM_TLB_OS 0x40 /* OS fault handler */
1403		−#define PERF_MEM_TLB_SHIFT 26
	1406	+#define PERF_MEM_TLB_NA 0x0001 /* Not available */
	1407	+#define PERF_MEM_TLB_HIT 0x0002 /* Hit level */
	1408	+#define PERF_MEM_TLB_MISS 0x0004 /* Miss level */
	1409	+#define PERF_MEM_TLB_L1 0x0008 /* L1 */
	1410	+#define PERF_MEM_TLB_L2 0x0010 /* L2 */
	1411	+#define PERF_MEM_TLB_WK 0x0020 /* Hardware Walker*/
	1412	+#define PERF_MEM_TLB_OS 0x0040 /* OS fault handler */
	1413	+#define PERF_MEM_TLB_SHIFT 26
1404	1414
1405	1415	/* Access blocked */
1406		−#define PERF_MEM_BLK_NA 0x01 /* not available */
1407		−#define PERF_MEM_BLK_DATA 0x02 /* data could not be forwarded */
1408		−#define PERF_MEM_BLK_ADDR 0x04 /* address conflict */
1409		−#define PERF_MEM_BLK_SHIFT 40
1410		−
1411		−/* hop level */
1412		−#define PERF_MEM_HOPS_0 0x01 /* remote core, same node */
1413		−#define PERF_MEM_HOPS_1 0x02 /* remote node, same socket */
1414		−#define PERF_MEM_HOPS_2 0x03 /* remote socket, same board */
1415		−#define PERF_MEM_HOPS_3 0x04 /* remote board */
	1416	+#define PERF_MEM_BLK_NA 0x0001 /* Not available */
	1417	+#define PERF_MEM_BLK_DATA 0x0002 /* Data could not be forwarded */
	1418	+#define PERF_MEM_BLK_ADDR 0x0004 /* Address conflict */
	1419	+#define PERF_MEM_BLK_SHIFT 40
	1420	+
	1421	+/* Hop level */
	1422	+#define PERF_MEM_HOPS_0 0x0001 /* Remote core, same node */
	1423	+#define PERF_MEM_HOPS_1 0x0002 /* Remote node, same socket */
	1424	+#define PERF_MEM_HOPS_2 0x0003 /* Remote socket, same board */
	1425	+#define PERF_MEM_HOPS_3 0x0004 /* Remote board */
1416	1426	/* 5-7 available */
1417		−#define PERF_MEM_HOPS_SHIFT 43
	1427	+#define PERF_MEM_HOPS_SHIFT 43
1418	1428
1419	1429	#define PERF_MEM_S(a, s) \
1420	1430	(((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT)
1421	1431
1422	1432	/*
1423		− * single taken branch record layout:
	1433	+ * Layout of single taken branch records:
1424	1434	*
1425	1435	* from: source instruction (may not always be a branch insn)
1426	1436	* to: branch target
@@ -1439,37 +1449,37 @@ union perf_mem_data_src { · 12 unmodified lines
1439	1449	struct perf_branch_entry {
1440	1450	__u64 from;
1441	1451	__u64 to;
1442		− __u64 mispred:1, /* target mispredicted */
1443		− predicted:1,/* target predicted */
1444		− in_tx:1, /* in transaction */
1445		− abort:1, /* transaction abort */
1446		− cycles:16, /* cycle count to last branch */
1447		− type:4, /* branch type */
1448		− spec:2, /* branch speculation info */
1449		− new_type:4, /* additional branch type */
1450		− priv:3, /* privilege level */
1451		− reserved:31;
	1452	+ __u64 mispred : 1, /* target mispredicted */
	1453	+ predicted : 1, /* target predicted */
	1454	+ in_tx : 1, /* in transaction */
	1455	+ abort : 1, /* transaction abort */
	1456	+ cycles : 16, /* cycle count to last branch */
	1457	+ type : 4, /* branch type */
	1458	+ spec : 2, /* branch speculation info */
	1459	+ new_type : 4, /* additional branch type */
	1460	+ priv : 3, /* privilege level */
	1461	+ reserved : 31;
1452	1462	};
1453	1463
1454	1464	/* Size of used info bits in struct perf_branch_entry */
1455	1465	#define PERF_BRANCH_ENTRY_INFO_BITS_MAX 33
1456	1466
1457	1467	union perf_sample_weight {
1458		− __u64 full;
	1468	+ __u64 full;
1459	1469	#if defined(__LITTLE_ENDIAN_BITFIELD)
1460	1470	struct {
1461		− __u32 var1_dw;
1462		− __u16 var2_w;
1463		− __u16 var3_w;
	1471	+ __u32 var1_dw;
	1472	+ __u16 var2_w;
	1473	+ __u16 var3_w;
1464	1474	};
1465	1475	#elif defined(__BIG_ENDIAN_BITFIELD)
1466	1476	struct {
1467		− __u16 var3_w;
1468		− __u16 var2_w;
1469		− __u32 var1_dw;
	1477	+ __u16 var3_w;
	1478	+ __u16 var2_w;
	1479	+ __u32 var1_dw;
1470	1480	};
1471	1481	#else
1472		−#error "Unknown endianness"
	1482	+# error "Unknown endianness"
1473	1483	#endif
1474	1484	};
1475	1485