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drm/msm: Add param for the highest bank bit

This parameter is programmed by the kernel and influences the tiling layout of images. Exposing it to userspace will allow it to tile/untile images correctly without guessing what value the kernel programmed, and allow us to change it in the future without breaking userspace.

Connor Abbott committed 2 years ago

Commit 44a88fa1 parent 88144552 files · +4 −0Browse files

Showing the changes to include/uapi (1 of 2 files). Show all

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include/uapi/drm/msm_drm.h+1−0
@@ -86,6 +86,7 @@ struct drm_msm_timespec { · 85 unmodified lines
86#define MSM_PARAM_CMDLINE 0x0d /* WO: override for task cmdline */86#define MSM_PARAM_CMDLINE 0x0d /* WO: override for task cmdline */
87#define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */87#define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */
88#define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (bytes) */88#define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (bytes) */
89#define MSM_PARAM_HIGHEST_BANK_BIT 0x10 /* RO */
89 90
90/* For backwards compat. The original support for preemption was based on91/* For backwards compat. The original support for preemption was based on
91 * a single ring per priority level so # of priority levels equals the #92 * a single ring per priority level so # of priority levels equals the #

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