amd-drm-next-6.3-2023-01-06: amdgpu: - secure display support for multiple displays - DML optimizations - DCN 3.2 updates - PSR updates - DP 2.1 updates - SR-IOV RAS updates - VCN RAS support - SMU 13.x updates - Switch 1 element arrays to flexible arrays - Add RAS support for DF 4.3 - Stack size improvements - S0ix rework - Soft reset fix - Allow 0 as a vram limit on APUs - Display fixes - Misc code cleanups - Documentation fixes - Handle profiling modes for SMU13.x amdkfd: - Error handling fixes - PASID fixes radeon: - Switch 1 element arrays to flexible arrays drm: - Add DP adaptive sync DPCD definitions UAPI: - Add new INFO queries for peak and min sclk/mclk for profile modes on newer chips Proposed mesa patch: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/278
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| @@ -832,6 +832,10 @@ struct drm_amdgpu_cs_chunk_data { · 831 unmodified lines | |||
| 832 | #define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK 0x8 | 832 | #define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK 0x8 |
| 833 | /* Subquery id: Query GPU stable pstate memory clock */ | 833 | /* Subquery id: Query GPU stable pstate memory clock */ |
| 834 | #define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK 0x9 | 834 | #define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK 0x9 |
| 835 | /* Subquery id: Query GPU peak pstate shader clock */ | ||
| 836 | #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK 0xa | ||
| 837 | /* Subquery id: Query GPU peak pstate memory clock */ | ||
| 838 | #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK 0xb | ||
| 835 | /* Number of VRAM page faults on CPU access. */ | 839 | /* Number of VRAM page faults on CPU access. */ |
| 836 | #define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E | 840 | #define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E |
| 837 | #define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F | 841 | #define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F |
| @@ -1107,6 +1111,8 @@ struct drm_amdgpu_info_device { · 269 unmodified lines | |||
| 1107 | __u32 pa_sc_tile_steering_override; | 1111 | __u32 pa_sc_tile_steering_override; |
| 1108 | /* disabled TCCs */ | 1112 | /* disabled TCCs */ |
| 1109 | __u64 tcc_disabled_mask; | 1113 | __u64 tcc_disabled_mask; |
| 1114 | __u64 min_engine_clock; | ||
| 1115 | __u64 min_memory_clock; | ||
| 1110 | }; | 1116 | }; |
| 1111 | 1117 | ||
| 1112 | struct drm_amdgpu_info_hw_ip { | 1118 | struct drm_amdgpu_info_hw_ip { |