Pull MFD updates from Lee Jones: "New Support & Features: - Add comprehensive support for the ROHM BD72720 PMIC, including core MFD, regulator, GPIO, clock gate, RTC, and power-supply drivers - Add support for the Rockchip RK801 PMIC, including core MFD and regulator drivers - Add support for the ROHM BD73900 PMIC by leveraging existing common drivers - Wire up RTC, hwmon, and input sub-devices for the Apple SMC (macsmc) driver - Add support for the Delta Networks TN48M switch CPLD via the simple-mfd-i2c driver - Add support for the TS133 variant to the QNAP MCU driver - Provide support for the sama7d65 XLCD controller in the Atmel HLCDC driver - Add backlight sub-device support to the Congatec Board Controller (cgbc) - Add Intel Nova Lake-S (NVL-S) PCI IDs to the Intel LPSS driver Improvements & Fixes: - Implement a "wrapper regmap" for the ROHM BD72720 to handle dual I2C slave addresses (0x4b and 0x4c) transparently for child devices - Introduce mutex locking around 'mfd_of_node_list' in the MFD core to ensure safe concurrent access - Fix a potential regulator resource leak in the Arizona core driver during boot sequence failures - Resolve child device duplication issues on driver rebind for Qualcomm PM8xxx and OMAP USB host drivers by using of_platform_depopulate() - Fix IRQ domain name duplication for the Samsung S2MPG10 by adding a unique domain suffix - Implement LOCK register handling for the TI TPS65214 variant to unlock registers at probe time - Fully convert the Loongson-2K BMC driver to use managed resources (pcim) and the standard PCI resource API - Ensure the Apple SMC mutex is correctly initialized during probe to prevent NULL pointer dereferences - Expand the ROHM BD71828 power-supply driver to support 9-bit register addresses - Simplify the Samsung S5M RTC driver by querying platform device IRQ resources directly - Revert an incorrect read-to-write mask change in the DA9052 SPI driver to restore default OTP behavior - Fix kernel-doc warnings in the TI TPS6105x driver - Cleanups & Refactoring - Simplify the MFD core by utilizing the scoped for_each_child_of_node_scoped() macro and streamlining device_node storage - Rename ROHM BD71828 IC-specific entities to use consistent prefixes for better extensibility - Refactor ROHM BD71828 regmap definitions using the regmap_reg_range() macro - Update the ROHM BD71828 driver to use standard C-style comment headers - Remove the now unused 'irq_data' field from the Samsung SEC core structure - Drop unnecessary use of irqd_get_trigger_type() in the Maxim MAX77759 driver - Default MFD_SPACEMIT_P1 to 'm' if ARCH_SPACEMIT is selected - Add missing charger-related registers to the ROHM BD71828 core header and Type-C CC registers to the AXP717 Device Tree Binding Updates: - Add new bindings for the ROHM BD72720 PMIC, Rockchip RK801 PMIC, Bitmain BM1880 System Controller, and NXP LPC32xx System Control Block - Clarify trickle-charge terminology and add properties for voltage drop (VDR) correction and upper charge limits to the generic battery binding - Document GPR syscon for NXP S32 SoCs and the smp-memram subnode for Aspeed SCU - Document numerous new Qualcomm SPMI PMIC compatibles (pmcx0102, pmh0101, pmk8850, etc) - Add compatibles for the sama7d65 XLCD (Atmel), LAN9691 Flexcom (Microchip), and various MediaTek SCPSYS and regulator components - Fix a dead link to the audio codec binding in the DA9055 documentation" * tag 'mfd-next-6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (41 commits) dt-bindings: mfd: da9055: Fix dead link to codec binding mfd: cgbc: Add support for backlight dt-bindings: mfd: qcom,spmi-pmic: Document PMICs present on Glymur and Kaanapali dt-bindings: mfd: Document smp-memram subnode for aspeed,ast2x00-scu mfd: intel-lpss: Add Intel Nova Lake-S PCI IDs mfd: ls2kbmc: Use PCI API instead of direct accesses mfd: ls2kbmc: Fully convert to use managed resources dt-bindings: mfd: mediatek: mt6397: Add missing MT6331 regulator compat dt-bindings: mfd: mediatek,mt8195-scpsys: Add mediatek,mt6795-scpsys dt-bindings: mfd: atmel,sama5d2-flexcom: Add microchip,lan9691-flexcom mfd: omap-usb-host: Fix OF populate on driver rebind mfd: qcom-pm8xxx: Fix OF populate on driver rebind dt-bindings: mfd: syscon: Allow syscon compatible for mediatek,mt7981-topmisc mfd: qnap-mcu: Add driver data for TS133 variant dt-bindings: mfd: qnap,ts433-mcu: Add qnap,ts133-mcu compatible mfd: sec: Fix IRQ domain names duplication mfd: simple-mfd-i2c: Add Delta TN48M CPLD support mfd: macsmc: Initialize mutex dt-bindings: mfd: nxp: Add NXP LPC32xx System Control Block mfd: Kconfig: Default MFD_SPACEMIT_P1 to 'm' if ARCH_SPACEMIT ...
Unified · Split
| @@ -130,6 +130,23 @@ patternProperties: · 129 unmodified lines | ||
| 130 | 130 | - description: silicon id information registers |
| 131 | 131 | - description: unique chip id registers |
| 132 | 132 | |
| 133 | + '^smp-memram@[0-9a-f]+$': | |
| 134 | + description: Memory region used for the AST2600's custom SMP bringup protocol | |
| 135 | + type: object | |
| 136 | + additionalProperties: false | |
| 137 | + | |
| 138 | + properties: | |
| 139 | + compatible: | |
| 140 | + const: aspeed,ast2600-smpmem | |
| 141 | + | |
| 142 | + reg: | |
| 143 | + description: The SMP memory region | |
| 144 | + maxItems: 1 | |
| 145 | + | |
| 146 | + required: | |
| 147 | + - compatible | |
| 148 | + - reg | |
| 149 | + | |
| 133 | 150 | required: |
| 134 | 151 | - compatible |
| 135 | 152 | - reg |
| @@ -25,6 +25,7 @@ properties: · 24 unmodified lines | ||
| 25 | 25 | - atmel,sama5d4-hlcdc |
| 26 | 26 | - microchip,sam9x60-hlcdc |
| 27 | 27 | - microchip,sam9x75-xlcdc |
| 28 | + - microchip,sama7d65-xlcdc | |
| 28 | 29 | |
| 29 | 30 | reg: |
| 30 | 31 | maxItems: 1 |
| @@ -20,6 +20,7 @@ properties: · 19 unmodified lines | ||
| 20 | 20 | - const: atmel,sama5d2-flexcom |
| 21 | 21 | - items: |
| 22 | 22 | - enum: |
| 23 | + - microchip,lan9691-flexcom | |
| 23 | 24 | - microchip,sam9x7-flexcom |
| 24 | 25 | - microchip,sama7d65-flexcom |
| 25 | 26 | - microchip,sama7g5-flexcom |
| @@ -0,0 +1,66 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/bitmain,bm1880-sctrl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Bitmain BM1880 System Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Manivannan Sadhasivam <mani@kernel.org> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + compatible: | |
| 14 | + items: | |
| 15 | + - const: bitmain,bm1880-sctrl | |
| 16 | + - const: syscon | |
| 17 | + - const: simple-mfd | |
| 18 | + | |
| 19 | + reg: | |
| 20 | + maxItems: 1 | |
| 21 | + | |
| 22 | + ranges: true | |
| 23 | + | |
| 24 | + '#address-cells': | |
| 25 | + const: 1 | |
| 26 | + | |
| 27 | + '#size-cells': | |
| 28 | + const: 1 | |
| 29 | + | |
| 30 | +patternProperties: | |
| 31 | + '^pinctrl@[0-9a-f]+$': | |
| 32 | + type: object | |
| 33 | + additionalProperties: true | |
| 34 | + | |
| 35 | + properties: | |
| 36 | + compatible: | |
| 37 | + contains: | |
| 38 | + const: bitmain,bm1880-pinctrl | |
| 39 | + | |
| 40 | + '^clock-controller@[0-9a-f]+$': | |
| 41 | + type: object | |
| 42 | + additionalProperties: true | |
| 43 | + | |
| 44 | + properties: | |
| 45 | + compatible: | |
| 46 | + contains: | |
| 47 | + const: bitmain,bm1880-clk | |
| 48 | + | |
| 49 | + '^reset-controller@[0-9a-f]+$': | |
| 50 | + type: object | |
| 51 | + additionalProperties: true | |
| 52 | + | |
| 53 | + properties: | |
| 54 | + compatible: | |
| 55 | + contains: | |
| 56 | + const: bitmain,bm1880-reset | |
| 57 | + | |
| 58 | +required: | |
| 59 | + - compatible | |
| 60 | + - reg | |
| 61 | + - ranges | |
| 62 | + - '#address-cells' | |
| 63 | + - '#size-cells' | |
| 64 | + | |
| 65 | +additionalProperties: false | |
| 66 | +... | |
| @@ -15,7 +15,7 @@ The CODEC device in DA9055 has a separate, configurable I2C address and so · 14 unmodified lines | ||
| 15 | 15 | is instantiated separately from the PMIC. |
| 16 | 16 | |
| 17 | 17 | For details on accompanying CODEC I2C device, see the following: |
| 18 | −Documentation/devicetree/bindings/sound/da9055.txt | |
| 18 | +Documentation/devicetree/bindings/sound/trivial-codec.yaml | |
| 19 | 19 | |
| 20 | 20 | ====== |
| 21 | 21 | |
| @@ -90,6 +90,7 @@ properties: · 89 unmodified lines | ||
| 90 | 90 | - enum: |
| 91 | 91 | - mediatek,mt6323-regulator |
| 92 | 92 | - mediatek,mt6328-regulator |
| 93 | + - mediatek,mt6331-regulator | |
| 93 | 94 | - mediatek,mt6358-regulator |
| 94 | 95 | - mediatek,mt6359-regulator |
| 95 | 96 | - mediatek,mt6397-regulator |
| @@ -19,6 +19,7 @@ properties: · 18 unmodified lines | ||
| 19 | 19 | compatible: |
| 20 | 20 | items: |
| 21 | 21 | - enum: |
| 22 | + - mediatek,mt6795-scpsys | |
| 22 | 23 | - mediatek,mt6893-scpsys |
| 23 | 24 | - mediatek,mt8167-scpsys |
| 24 | 25 | - mediatek,mt8173-scpsys |
| @@ -0,0 +1,74 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/nxp,lpc3220-scb.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: NXP LPC32xx System Control Block | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Vladimir Zapolskiy <vz@mleia.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + NXP LPC32xx SoC series have a System Control Block, which serves for | |
| 14 | + a multitude of purposes including clock management, DMA muxes, storing | |
| 15 | + SoC unique ID etc. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + items: | |
| 20 | + - enum: | |
| 21 | + - nxp,lpc3220-scb | |
| 22 | + - const: syscon | |
| 23 | + - const: simple-mfd | |
| 24 | + | |
| 25 | + reg: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + ranges: true | |
| 29 | + | |
| 30 | + "#address-cells": | |
| 31 | + const: 1 | |
| 32 | + | |
| 33 | + "#size-cells": | |
| 34 | + const: 1 | |
| 35 | + | |
| 36 | +patternProperties: | |
| 37 | + "^clock-controller@[0-9a-f]+$": | |
| 38 | + $ref: /schemas/clock/nxp,lpc3220-clk.yaml# | |
| 39 | + | |
| 40 | + "^dma-router@[0-9a-f]+$": | |
| 41 | + $ref: /schemas/dma/nxp,lpc3220-dmamux.yaml# | |
| 42 | + | |
| 43 | +required: | |
| 44 | + - compatible | |
| 45 | + - reg | |
| 46 | + - "#address-cells" | |
| 47 | + - "#size-cells" | |
| 48 | + | |
| 49 | +additionalProperties: false | |
| 50 | + | |
| 51 | +examples: | |
| 52 | + - | | |
| 53 | + syscon@400040000 { | |
| 54 | + compatible = "nxp,lpc3220-scb", "syscon", "simple-mfd"; | |
| 55 | + reg = <0x40004000 0x1000>; | |
| 56 | + #address-cells = <1>; | |
| 57 | + #size-cells = <1>; | |
| 58 | + ranges = <0 0x40004000 0x1000>; | |
| 59 | + | |
| 60 | + clock-controller@0 { | |
| 61 | + compatible = "nxp,lpc3220-clk"; | |
| 62 | + reg = <0x0 0x114>; | |
| 63 | + clocks = <&xtal_32k>, <&xtal>; | |
| 64 | + clock-names = "xtal_32k", "xtal"; | |
| 65 | + #clock-cells = <1>; | |
| 66 | + }; | |
| 67 | + | |
| 68 | + dma-router@78 { | |
| 69 | + compatible = "nxp,lpc3220-dmamux"; | |
| 70 | + reg = <0x78 0x8>; | |
| 71 | + dma-masters = <&dma>; | |
| 72 | + #dma-cells = <3>; | |
| 73 | + }; | |
| 74 | + }; | |
| @@ -77,8 +77,12 @@ properties: · 76 unmodified lines | ||
| 77 | 77 | - qcom,pmc8180 |
| 78 | 78 | - qcom,pmc8180c |
| 79 | 79 | - qcom,pmc8380 |
| 80 | + - qcom,pmcx0102 | |
| 80 | 81 | - qcom,pmd8028 |
| 81 | 82 | - qcom,pmd9635 |
| 83 | + - qcom,pmh0101 | |
| 84 | + - qcom,pmh0104 | |
| 85 | + - qcom,pmh0110 | |
| 82 | 86 | - qcom,pmi632 |
| 83 | 87 | - qcom,pmi8950 |
| 84 | 88 | - qcom,pmi8962 |
| @@ -89,6 +93,7 @@ properties: · 4 unmodified lines | ||
| 89 | 93 | - qcom,pmk8002 |
| 90 | 94 | - qcom,pmk8350 |
| 91 | 95 | - qcom,pmk8550 |
| 96 | + - qcom,pmk8850 | |
| 92 | 97 | - qcom,pmm8155au |
| 93 | 98 | - qcom,pmm8654au |
| 94 | 99 | - qcom,pmp8074 |
| @@ -101,6 +106,7 @@ properties: · 6 unmodified lines | ||
| 101 | 106 | - qcom,pmx75 |
| 102 | 107 | - qcom,smb2351 |
| 103 | 108 | - qcom,smb2360 |
| 109 | + - qcom,smb2370 | |
| 104 | 110 | - const: qcom,spmi-pmic |
| 105 | 111 | |
| 106 | 112 | reg: |
| @@ -16,6 +16,7 @@ description: · 15 unmodified lines | ||
| 16 | 16 | properties: |
| 17 | 17 | compatible: |
| 18 | 18 | enum: |
| 19 | + - qnap,ts133-mcu | |
| 19 | 20 | - qnap,ts233-mcu |
| 20 | 21 | - qnap,ts433-mcu |
| 21 | 22 | |
| @@ -0,0 +1,197 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/rockchip,rk801.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: RK801 Power Management Integrated Circuit | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Joseph Chen <chenjh@rock-chips.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + Rockchip RK801 series PMIC. This device consists of an i2c controlled MFD | |
| 14 | + that includes multiple switchable regulators. | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + compatible: | |
| 18 | + enum: | |
| 19 | + - rockchip,rk801 | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + interrupts: | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | + system-power-controller: | |
| 28 | + type: boolean | |
| 29 | + description: | |
| 30 | + Telling whether or not this PMIC is controlling the system power. | |
| 31 | + | |
| 32 | + wakeup-source: | |
| 33 | + type: boolean | |
| 34 | + description: | |
| 35 | + Device can be used as a wakeup source. | |
| 36 | + | |
| 37 | + vcc1-supply: | |
| 38 | + description: | |
| 39 | + The input supply for dcdc1. | |
| 40 | + | |
| 41 | + vcc2-supply: | |
| 42 | + description: | |
| 43 | + The input supply for dcdc2. | |
| 44 | + | |
| 45 | + vcc3-supply: | |
| 46 | + description: | |
| 47 | + The input supply for dcdc3. | |
| 48 | + | |
| 49 | + vcc4-supply: | |
| 50 | + description: | |
| 51 | + The input supply for dcdc4. | |
| 52 | + | |
| 53 | + vcc5-supply: | |
| 54 | + description: | |
| 55 | + The input supply for ldo1. | |
| 56 | + | |
| 57 | + vcc6-supply: | |
| 58 | + description: | |
| 59 | + The input supply for ldo2. | |
| 60 | + | |
| 61 | + vcc7-supply: | |
| 62 | + description: | |
| 63 | + The input supply for switch. | |
| 64 | + | |
| 65 | + regulators: | |
| 66 | + type: object | |
| 67 | + patternProperties: | |
| 68 | + "^(dcdc[1-4]|ldo[1-2]|switch)$": | |
| 69 | + type: object | |
| 70 | + $ref: /schemas/regulator/regulator.yaml# | |
| 71 | + unevaluatedProperties: false | |
| 72 | + additionalProperties: false | |
| 73 | + | |
| 74 | +required: | |
| 75 | + - compatible | |
| 76 | + - reg | |
| 77 | + - interrupts | |
| 78 | + | |
| 79 | +additionalProperties: false | |
| 80 | + | |
| 81 | +examples: | |
| 82 | + - | | |
| 83 | + #include <dt-bindings/pinctrl/rockchip.h> | |
| 84 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 85 | + #include <dt-bindings/gpio/gpio.h> | |
| 86 | + | |
| 87 | + i2c { | |
| 88 | + #address-cells = <1>; | |
| 89 | + #size-cells = <0>; | |
| 90 | + | |
| 91 | + rk801: pmic@27 { | |
| 92 | + compatible = "rockchip,rk801"; | |
| 93 | + reg = <0x27>; | |
| 94 | + interrupt-parent = <&gpio0>; | |
| 95 | + interrupts = <RK_PC0 IRQ_TYPE_LEVEL_LOW>; | |
| 96 | + pinctrl-names = "default"; | |
| 97 | + pinctrl-0 = <&pmic_int_l>; | |
| 98 | + system-power-controller; | |
| 99 | + wakeup-source; | |
| 100 | + | |
| 101 | + vcc1-supply = <&vcc_sys>; | |
| 102 | + vcc2-supply = <&vcc_sys>; | |
| 103 | + vcc3-supply = <&vcc_sys>; | |
| 104 | + vcc4-supply = <&vcc_sys>; | |
| 105 | + vcc5-supply = <&vcc3v3_sys>; | |
| 106 | + vcc6-supply = <&vcc3v3_sys>; | |
| 107 | + vcc7-supply = <&vcc3v3_sys>; | |
| 108 | + | |
| 109 | + regulators { | |
| 110 | + vdd_cpu: dcdc1 { | |
| 111 | + regulator-name = "vdd_cpu"; | |
| 112 | + regulator-min-microvolt = <500000>; | |
| 113 | + regulator-max-microvolt = <1500000>; | |
| 114 | + regulator-initial-mode = <0x1>; | |
| 115 | + regulator-boot-on; | |
| 116 | + regulator-always-on; | |
| 117 | + regulator-state-mem { | |
| 118 | + regulator-mode = <0x2>; | |
| 119 | + regulator-off-in-suspend; | |
| 120 | + regulator-suspend-microvolt = <950000>; | |
| 121 | + }; | |
| 122 | + }; | |
| 123 | + | |
| 124 | + vcc3v3_sys: dcdc2 { | |
| 125 | + regulator-name = "vcc3v3_sys"; | |
| 126 | + regulator-min-microvolt = <3300000>; | |
| 127 | + regulator-max-microvolt = <3300000>; | |
| 128 | + regulator-initial-mode = <0x1>; | |
| 129 | + regulator-boot-on; | |
| 130 | + regulator-always-on; | |
| 131 | + regulator-state-mem { | |
| 132 | + regulator-mode = <0x2>; | |
| 133 | + regulator-on-in-suspend; | |
| 134 | + regulator-suspend-microvolt = <3300000>; | |
| 135 | + }; | |
| 136 | + }; | |
| 137 | + | |
| 138 | + vcc_ddr: dcdc3 { | |
| 139 | + regulator-name = "vcc_ddr"; | |
| 140 | + regulator-boot-on; | |
| 141 | + regulator-always-on; | |
| 142 | + regulator-state-mem { | |
| 143 | + regulator-mode = <0x2>; | |
| 144 | + regulator-on-in-suspend; | |
| 145 | + }; | |
| 146 | + }; | |
| 147 | + | |
| 148 | + vdd_logic: dcdc4 { | |
| 149 | + regulator-name = "vdd_logic"; | |
| 150 | + regulator-min-microvolt = <500000>; | |
| 151 | + regulator-max-microvolt = <1500000>; | |
| 152 | + regulator-initial-mode = <0x1>; | |
| 153 | + regulator-boot-on; | |
| 154 | + regulator-always-on; | |
| 155 | + regulator-state-mem { | |
| 156 | + regulator-mode = <0x2>; | |
| 157 | + regulator-off-in-suspend; | |
| 158 | + regulator-suspend-microvolt = <900000>; | |
| 159 | + }; | |
| 160 | + }; | |
| 161 | + | |
| 162 | + vdd0v9_sys: ldo1 { | |
| 163 | + regulator-name = "vdd0v9_sys"; | |
| 164 | + regulator-min-microvolt = <900000>; | |
| 165 | + regulator-max-microvolt = <900000>; | |
| 166 | + regulator-boot-on; | |
| 167 | + regulator-always-on; | |
| 168 | + regulator-state-mem { | |
| 169 | + regulator-off-in-suspend; | |
| 170 | + regulator-suspend-microvolt = <900000>; | |
| 171 | + }; | |
| 172 | + }; | |
| 173 | + | |
| 174 | + vcc_1v8: ldo2 { | |
| 175 | + regulator-name = "vcc_1v8"; | |
| 176 | + regulator-min-microvolt = <1800000>; | |
| 177 | + regulator-max-microvolt = <1800000>; | |
| 178 | + regulator-boot-on; | |
| 179 | + regulator-always-on; | |
| 180 | + regulator-state-mem { | |
| 181 | + regulator-off-in-suspend; | |
| 182 | + regulator-suspend-microvolt = <1800000>; | |
| 183 | + }; | |
| 184 | + }; | |
| 185 | + | |
| 186 | + vcc_3v3: switch { | |
| 187 | + regulator-name = "vcc_3v3"; | |
| 188 | + regulator-boot-on; | |
| 189 | + regulator-always-on; | |
| 190 | + regulator-state-mem { | |
| 191 | + regulator-off-in-suspend; | |
| 192 | + regulator-suspend-microvolt = <3300000>; | |
| 193 | + }; | |
| 194 | + }; | |
| 195 | + }; | |
| 196 | + }; | |
| 197 | + }; | |
| @@ -102,6 +102,8 @@ select: · 101 unmodified lines | ||
| 102 | 102 | - mstar,msc313-pmsleep |
| 103 | 103 | - nuvoton,ma35d1-sys |
| 104 | 104 | - nuvoton,wpcm450-shm |
| 105 | + - nxp,s32g2-gpr | |
| 106 | + - nxp,s32g3-gpr | |
| 105 | 107 | - qcom,apq8064-mmss-sfpb |
| 106 | 108 | - qcom,apq8064-sps-sic |
| 107 | 109 | - rockchip,px30-qos |
| @@ -195,6 +197,7 @@ properties: · 87 unmodified lines | ||
| 195 | 197 | - mediatek,mt2701-pctl-a-syscfg |
| 196 | 198 | - mediatek,mt2712-pctl-a-syscfg |
| 197 | 199 | - mediatek,mt6397-pctl-pmic-syscfg |
| 200 | + - mediatek,mt7981-topmisc | |
| 198 | 201 | - mediatek,mt7988-topmisc |
| 199 | 202 | - mediatek,mt8135-pctl-a-syscfg |
| 200 | 203 | - mediatek,mt8135-pctl-b-syscfg |
| @@ -212,6 +215,8 @@ properties: · 11 unmodified lines | ||
| 212 | 215 | - mstar,msc313-pmsleep |
| 213 | 216 | - nuvoton,ma35d1-sys |
| 214 | 217 | - nuvoton,wpcm450-shm |
| 218 | + - nxp,s32g2-gpr | |
| 219 | + - nxp,s32g3-gpr | |
| 215 | 220 | - qcom,apq8064-mmss-sfpb |
| 216 | 221 | - qcom,apq8064-sps-sic |
| 217 | 222 | - rockchip,px30-qos |
| @@ -407,6 +407,17 @@ config MFD_CS47L92 · 406 unmodified lines | ||
| 407 | 407 | help |
| 408 | 408 | Support for Cirrus Logic CS42L92, CS47L92 and CS47L93 Smart Codecs |
| 409 | 409 | |
| 410 | +config MFD_TN48M_CPLD | |
| 411 | + tristate "Delta Networks TN48M switch CPLD driver" | |
| 412 | + depends on I2C | |
| 413 | + depends on ARCH_MVEBU || COMPILE_TEST | |
| 414 | + select MFD_SIMPLE_MFD_I2C | |
| 415 | + help | |
| 416 | + Select this option to enable support for Delta Networks TN48M switch | |
| 417 | + CPLD. It consists of reset and GPIO drivers. CPLD provides GPIOS-s | |
| 418 | + for the SFP slots as well as power supply related information. | |
| 419 | + SFP support depends on the GPIO driver being selected. | |
| 420 | + | |
| 410 | 421 | config PMIC_DA903X |
| 411 | 422 | bool "Dialog Semiconductor DA9030/DA9034 PMIC Support" |
| 412 | 423 | depends on I2C=y |
| @@ -1276,6 +1287,7 @@ config MFD_SPACEMIT_P1 · 863 unmodified lines | ||
| 1276 | 1287 | depends on ARCH_SPACEMIT || COMPILE_TEST |
| 1277 | 1288 | depends on I2C |
| 1278 | 1289 | select MFD_SIMPLE_MFD_I2C |
| 1290 | + default m if ARCH_SPACEMIT | |
| 1279 | 1291 | help |
| 1280 | 1292 | This option supports the I2C-based SpacemiT P1 PMIC, which |
| 1281 | 1293 | contains regulators, a power switch, GPIOs, an RTC, and more. |
| @@ -1371,15 +1383,15 @@ config MFD_RK8XX · 89 unmodified lines | ||
| 1371 | 1383 | select MFD_CORE |
| 1372 | 1384 | |
| 1373 | 1385 | config MFD_RK8XX_I2C |
| 1374 | − tristate "Rockchip RK805/RK808/RK809/RK816/RK817/RK818 Power Management Chip" | |
| 1386 | + tristate "Rockchip RK8xx Power Management Chips" | |
| 1375 | 1387 | depends on I2C && OF |
| 1376 | 1388 | select MFD_CORE |
| 1377 | 1389 | select REGMAP_I2C |
| 1378 | 1390 | select REGMAP_IRQ |
| 1379 | 1391 | select MFD_RK8XX |
| 1380 | 1392 | help |
| 1381 | − If you say yes here you get support for the RK805, RK808, RK809, | |
| 1382 | − RK816, RK817 and RK818 Power Management chips. | |
| 1393 | + If you say yes here you get support for the RK801, RK805, RK808, | |
| 1394 | + RK809, RK816, RK817 and RK818 Power Management chips. | |
| 1383 | 1395 | This driver provides common support for accessing the device |
| 1384 | 1396 | through I2C interface. The device supports multiple sub-devices |
| 1385 | 1397 | including interrupts, RTC, LDO & DCDC regulators, and onkey. |
| @@ -1100,7 +1100,7 @@ int arizona_dev_init(struct arizona *arizona) · 1099 unmodified lines | ||
| 1100 | 1100 | } else if (val & 0x01) { |
| 1101 | 1101 | ret = wm5102_clear_write_sequencer(arizona); |
| 1102 | 1102 | if (ret) |
| 1103 | − return ret; | |
| 1103 | + goto err_reset; | |
| 1104 | 1104 | } |
| 1105 | 1105 | break; |
| 1106 | 1106 | default: |
| @@ -140,6 +140,7 @@ static const struct of_device_id atmel_hlcdc_match[] = { · 139 unmodified lines | ||
| 140 | 140 | { .compatible = "atmel,sama5d4-hlcdc" }, |
| 141 | 141 | { .compatible = "microchip,sam9x60-hlcdc" }, |
| 142 | 142 | { .compatible = "microchip,sam9x75-xlcdc" }, |
| 143 | + { .compatible = "microchip,sama7d65-xlcdc" }, | |
| 143 | 144 | { /* sentinel */ }, |
| 144 | 145 | }; |
| 145 | 146 | MODULE_DEVICE_TABLE(of, atmel_hlcdc_match); |
| @@ -229,6 +229,8 @@ static const struct regmap_range axp717_writeable_ranges[] = { · 228 unmodified lines | ||
| 229 | 229 | regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL), |
| 230 | 230 | regmap_reg_range(AXP717_ADC_CH_EN_CONTROL, AXP717_ADC_CH_EN_CONTROL), |
| 231 | 231 | regmap_reg_range(AXP717_ADC_DATA_SEL, AXP717_ADC_DATA_SEL), |
| 232 | + regmap_reg_range(AXP717_TYPEC_CC_AA_EN, AXP717_TYPEC_CC_AA_EN), | |
| 233 | + regmap_reg_range(AXP717_TYPEC_CC_MODE_CONTROL, AXP717_TYPEC_CC_MODE_CONTROL), | |
| 232 | 234 | }; |
| 233 | 235 | |
| 234 | 236 | static const struct regmap_range axp717_volatile_ranges[] = { |
| @@ -237,6 +239,7 @@ static const struct regmap_range axp717_volatile_ranges[] = { · 2 unmodified lines | ||
| 237 | 239 | regmap_reg_range(AXP717_BATT_PERCENT_DATA, AXP717_BATT_PERCENT_DATA), |
| 238 | 240 | regmap_reg_range(AXP717_BATT_V_H, AXP717_BATT_CHRG_I_L), |
| 239 | 241 | regmap_reg_range(AXP717_ADC_DATA_H, AXP717_ADC_DATA_L), |
| 242 | + regmap_reg_range(AXP717_TYPEC_CC_STATUS, AXP717_TYPEC_CC_STATUS), | |
| 240 | 243 | }; |
| 241 | 244 | |
| 242 | 245 | static const struct regmap_access_table axp717_writeable_table = { |
| @@ -458,7 +461,7 @@ static const struct regmap_config axp717_regmap_config = { · 215 unmodified lines | ||
| 458 | 461 | .val_bits = 8, |
| 459 | 462 | .wr_table = &axp717_writeable_table, |
| 460 | 463 | .volatile_table = &axp717_volatile_table, |
| 461 | − .max_register = AXP717_ADC_DATA_L, | |
| 464 | + .max_register = AXP717_TYPEC_CC_STATUS, | |
| 462 | 465 | .cache_type = REGCACHE_MAPLE, |
| 463 | 466 | }; |
| 464 | 467 | |
| @@ -237,6 +237,7 @@ static struct mfd_cell cgbc_devs[] = { · 236 unmodified lines | ||
| 237 | 237 | { .name = "cgbc-i2c", .id = 1 }, |
| 238 | 238 | { .name = "cgbc-i2c", .id = 2 }, |
| 239 | 239 | { .name = "cgbc-hwmon" }, |
| 240 | + { .name = "cgbc-backlight" }, | |
| 240 | 241 | }; |
| 241 | 242 | |
| 242 | 243 | static int cgbc_map(struct cgbc_device_data *cgbc) |
| @@ -37,7 +37,7 @@ static int da9052_spi_probe(struct spi_device *spi) · 36 unmodified lines | ||
| 37 | 37 | spi_set_drvdata(spi, da9052); |
| 38 | 38 | |
| 39 | 39 | config = da9052_regmap_config; |
| 40 | − config.write_flag_mask = 1; | |
| 40 | + config.read_flag_mask = 1; | |
| 41 | 41 | config.reg_bits = 7; |
| 42 | 42 | config.pad_bits = 1; |
| 43 | 43 | config.val_bits = 8; |
| @@ -437,6 +437,19 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { · 436 unmodified lines | ||
| 437 | 437 | { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_spi_info }, |
| 438 | 438 | { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_spi_info }, |
| 439 | 439 | { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info }, |
| 440 | + /* NVL-S */ | |
| 441 | + { PCI_VDEVICE(INTEL, 0x6e28), (kernel_ulong_t)&bxt_uart_info }, | |
| 442 | + { PCI_VDEVICE(INTEL, 0x6e29), (kernel_ulong_t)&bxt_uart_info }, | |
| 443 | + { PCI_VDEVICE(INTEL, 0x6e2a), (kernel_ulong_t)&tgl_spi_info }, | |
| 444 | + { PCI_VDEVICE(INTEL, 0x6e2b), (kernel_ulong_t)&tgl_spi_info }, | |
| 445 | + { PCI_VDEVICE(INTEL, 0x6e4c), (kernel_ulong_t)&ehl_i2c_info }, | |
| 446 | + { PCI_VDEVICE(INTEL, 0x6e4d), (kernel_ulong_t)&ehl_i2c_info }, | |
| 447 | + { PCI_VDEVICE(INTEL, 0x6e4e), (kernel_ulong_t)&ehl_i2c_info }, | |
| 448 | + { PCI_VDEVICE(INTEL, 0x6e4f), (kernel_ulong_t)&ehl_i2c_info }, | |
| 449 | + { PCI_VDEVICE(INTEL, 0x6e5c), (kernel_ulong_t)&bxt_uart_info }, | |
| 450 | + { PCI_VDEVICE(INTEL, 0x6e5e), (kernel_ulong_t)&tgl_spi_info }, | |
| 451 | + { PCI_VDEVICE(INTEL, 0x6e7a), (kernel_ulong_t)&ehl_i2c_info }, | |
| 452 | + { PCI_VDEVICE(INTEL, 0x6e7b), (kernel_ulong_t)&ehl_i2c_info }, | |
| 440 | 453 | /* ARL-H */ |
| 441 | 454 | { PCI_VDEVICE(INTEL, 0x7725), (kernel_ulong_t)&bxt_uart_info }, |
| 442 | 455 | { PCI_VDEVICE(INTEL, 0x7726), (kernel_ulong_t)&bxt_uart_info }, |
| @@ -464,53 +464,36 @@ static int ls2k_bmc_probe(struct pci_dev *dev, const struct pci_device_id *id) · 463 unmodified lines | ||
| 464 | 464 | resource_size_t base; |
| 465 | 465 | int ret; |
| 466 | 466 | |
| 467 | − ret = pci_enable_device(dev); | |
| 467 | + ret = pcim_enable_device(dev); | |
| 468 | 468 | if (ret) |
| 469 | 469 | return ret; |
| 470 | 470 | |
| 471 | 471 | ddata = devm_kzalloc(&dev->dev, sizeof(*ddata), GFP_KERNEL); |
| 472 | − if (!ddata) { | |
| 473 | − ret = -ENOMEM; | |
| 474 | − goto disable_pci; | |
| 475 | − } | |
| 472 | + if (!ddata) | |
| 473 | + return -ENOMEM; | |
| 476 | 474 | |
| 477 | 475 | ddata->dev = &dev->dev; |
| 478 | 476 | |
| 479 | 477 | ret = ls2k_bmc_init(ddata); |
| 480 | 478 | if (ret) |
| 481 | − goto disable_pci; | |
| 479 | + return ret; | |
| 482 | 480 | |
| 483 | 481 | ret = ls2k_bmc_parse_mode(dev, &pd); |
| 484 | 482 | if (ret) |
| 485 | − goto disable_pci; | |
| 483 | + return ret; | |
| 486 | 484 | |
| 487 | 485 | ls2k_bmc_cells[LS2K_BMC_DISPLAY].platform_data = &pd; |
| 488 | 486 | ls2k_bmc_cells[LS2K_BMC_DISPLAY].pdata_size = sizeof(pd); |
| 489 | − base = dev->resource[0].start + LS2K_DISPLAY_RES_START; | |
| 487 | + base = pci_resource_start(dev, 0) + LS2K_DISPLAY_RES_START; | |
| 490 | 488 | |
| 491 | 489 | /* Remove conflicting efifb device */ |
| 492 | 490 | ret = aperture_remove_conflicting_devices(base, SZ_4M, "simple-framebuffer"); |
| 493 | − if (ret) { | |
| 494 | − dev_err(&dev->dev, "Failed to removed firmware framebuffers: %d\n", ret); | |
| 495 | − goto disable_pci; | |
| 496 | − } | |
| 497 | − | |
| 498 | − ret = devm_mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO, | |
| 499 | − ls2k_bmc_cells, ARRAY_SIZE(ls2k_bmc_cells), | |
| 500 | − &dev->resource[0], 0, NULL); | |
| 501 | 491 | if (ret) |
| 502 | − goto disable_pci; | |
| 492 | + return dev_err_probe(&dev->dev, ret, "Failed to removed firmware framebuffers\n"); | |
| 503 | 493 | |
| 504 | − return 0; | |
| 505 | − | |
| 506 | −disable_pci: | |
| 507 | − pci_disable_device(dev); | |
| 508 | − return ret; | |
| 509 | −} | |
| 510 | − | |
| 511 | −static void ls2k_bmc_remove(struct pci_dev *dev) | |
| 512 | −{ | |
| 513 | − pci_disable_device(dev); | |
| 494 | + return devm_mfd_add_devices(&dev->dev, PLATFORM_DEVID_AUTO, | |
| 495 | + ls2k_bmc_cells, ARRAY_SIZE(ls2k_bmc_cells), | |
| 496 | + pci_resource_n(dev, 0), 0, NULL); | |
| 514 | 497 | } |
| 515 | 498 | |
| 516 | 499 | static struct pci_device_id ls2k_bmc_devices[] = { |
| @@ -523,7 +506,6 @@ static struct pci_driver ls2k_bmc_driver = { · 6 unmodified lines | ||
| 523 | 506 | .name = "ls2k-bmc", |
| 524 | 507 | .id_table = ls2k_bmc_devices, |
| 525 | 508 | .probe = ls2k_bmc_probe, |
| 526 | − .remove = ls2k_bmc_remove, | |
| 527 | 509 | }; |
| 528 | 510 | module_pci_driver(ls2k_bmc_driver); |
| 529 | 511 | |
| @@ -45,8 +45,11 @@ · 44 unmodified lines | ||
| 45 | 45 | #define SMC_TIMEOUT_MS 500 |
| 46 | 46 | |
| 47 | 47 | static const struct mfd_cell apple_smc_devs[] = { |
| 48 | + MFD_CELL_NAME("macsmc-input"), | |
| 48 | 49 | MFD_CELL_OF("macsmc-gpio", NULL, NULL, 0, 0, "apple,smc-gpio"), |
| 50 | + MFD_CELL_OF("macsmc-hwmon", NULL, NULL, 0, 0, "apple,smc-hwmon"), | |
| 49 | 51 | MFD_CELL_OF("macsmc-reboot", NULL, NULL, 0, 0, "apple,smc-reboot"), |
| 52 | + MFD_CELL_OF("macsmc-rtc", NULL, NULL, 0, 0, "apple,smc-rtc"), | |
| 50 | 53 | }; |
| 51 | 54 | |
| 52 | 55 | static int apple_smc_cmd_locked(struct apple_smc *smc, u64 cmd, u64 arg, |
| @@ -413,6 +416,7 @@ static int apple_smc_probe(struct platform_device *pdev) · 360 unmodified lines | ||
| 413 | 416 | if (!smc) |
| 414 | 417 | return -ENOMEM; |
| 415 | 418 | |
| 419 | + mutex_init(&smc->mutex); | |
| 416 | 420 | smc->dev = &pdev->dev; |
| 417 | 421 | smc->sram_base = devm_platform_get_and_ioremap_resource(pdev, 1, &smc->sram); |
| 418 | 422 | if (IS_ERR(smc->sram_base)) |
| @@ -587,9 +587,7 @@ static int max77759_add_chained_charger(struct i2c_client *client, · 586 unmodified lines | ||
| 587 | 587 | static int max77759_probe(struct i2c_client *client) |
| 588 | 588 | { |
| 589 | 589 | struct regmap_irq_chip_data *irq_chip_data_pmic; |
| 590 | − struct irq_data *irq_data; | |
| 591 | 590 | struct max77759 *max77759; |
| 592 | − unsigned long irq_flags; | |
| 593 | 591 | unsigned int pmic_id; |
| 594 | 592 | int ret; |
| 595 | 593 | |
| @@ -628,16 +626,8 @@ static int max77759_probe(struct i2c_client *client) · 32 unmodified lines | ||
| 628 | 626 | return ret; |
| 629 | 627 | } |
| 630 | 628 | |
| 631 | − irq_data = irq_get_irq_data(client->irq); | |
| 632 | − if (!irq_data) | |
| 633 | − return dev_err_probe(&client->dev, -EINVAL, | |
| 634 | − "invalid IRQ: %d\n", client->irq); | |
| 635 | − | |
| 636 | − irq_flags = IRQF_ONESHOT | IRQF_SHARED; | |
| 637 | − irq_flags |= irqd_get_trigger_type(irq_data); | |
| 638 | − | |
| 639 | 629 | ret = devm_regmap_add_irq_chip(&client->dev, max77759->regmap_top, |
| 640 | − client->irq, irq_flags, 0, | |
| 630 | + client->irq, IRQF_ONESHOT | IRQF_SHARED, 0, | |
| 641 | 631 | &max77759_pmic_irq_chip, |
| 642 | 632 | &irq_chip_data_pmic); |
| 643 | 633 | if (ret) |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <linux/regulator/consumer.h> |
| 23 | 23 | |
| 24 | 24 | static LIST_HEAD(mfd_of_node_list); |
| 25 | +static DEFINE_MUTEX(mfd_of_node_mutex); | |
| 25 | 26 | |
| 26 | 27 | struct mfd_of_node_entry { |
| 27 | 28 | struct list_head list; |
| @@ -100,14 +101,15 @@ static int mfd_match_of_node_to_dev(struct platform_device *pdev, · 72 unmodified lines | ||
| 100 | 101 | struct device_node *np, |
| 101 | 102 | const struct mfd_cell *cell) |
| 102 | 103 | { |
| 103 | −#if IS_ENABLED(CONFIG_OF) | |
| 104 | 104 | struct mfd_of_node_entry *of_entry; |
| 105 | 105 | u64 of_node_addr; |
| 106 | 106 | |
| 107 | 107 | /* Skip if OF node has previously been allocated to a device */ |
| 108 | − list_for_each_entry(of_entry, &mfd_of_node_list, list) | |
| 109 | − if (of_entry->np == np) | |
| 110 | − return -EAGAIN; | |
| 108 | + scoped_guard(mutex, &mfd_of_node_mutex) { | |
| 109 | + list_for_each_entry(of_entry, &mfd_of_node_list, list) | |
| 110 | + if (of_entry->np == np) | |
| 111 | + return -EAGAIN; | |
| 112 | + } | |
| 111 | 113 | |
| 112 | 114 | if (!cell->use_of_reg) |
| 113 | 115 | /* No of_reg defined - allocate first free compatible match */ |
| @@ -128,12 +130,11 @@ allocate_of_node: · 14 unmodified lines | ||
| 128 | 130 | return -ENOMEM; |
| 129 | 131 | |
| 130 | 132 | of_entry->dev = &pdev->dev; |
| 131 | − of_entry->np = np; | |
| 132 | − list_add_tail(&of_entry->list, &mfd_of_node_list); | |
| 133 | + of_entry->np = of_node_get(np); | |
| 134 | + scoped_guard(mutex, &mfd_of_node_mutex) | |
| 135 | + list_add_tail(&of_entry->list, &mfd_of_node_list); | |
| 133 | 136 | |
| 134 | − of_node_get(np); | |
| 135 | 137 | device_set_node(&pdev->dev, of_fwnode_handle(np)); |
| 136 | −#endif | |
| 137 | 138 | return 0; |
| 138 | 139 | } |
| 139 | 140 | |
| @@ -144,7 +145,6 @@ static int mfd_add_device(struct device *parent, int id, · 4 unmodified lines | ||
| 144 | 145 | { |
| 145 | 146 | struct resource *res; |
| 146 | 147 | struct platform_device *pdev; |
| 147 | − struct device_node *np = NULL; | |
| 148 | 148 | struct mfd_of_node_entry *of_entry, *tmp; |
| 149 | 149 | bool disabled = false; |
| 150 | 150 | int ret = -ENOMEM; |
| @@ -182,7 +182,7 @@ static int mfd_add_device(struct device *parent, int id, · 31 unmodified lines | ||
| 182 | 182 | goto fail_res; |
| 183 | 183 | |
| 184 | 184 | if (IS_ENABLED(CONFIG_OF) && parent->of_node && cell->of_compatible) { |
| 185 | − for_each_child_of_node(parent->of_node, np) { | |
| 185 | + for_each_child_of_node_scoped(parent->of_node, np) { | |
| 186 | 186 | if (of_device_is_compatible(np, cell->of_compatible)) { |
| 187 | 187 | /* Skip 'disabled' devices */ |
| 188 | 188 | if (!of_device_is_available(np)) { |
| @@ -193,7 +193,6 @@ static int mfd_add_device(struct device *parent, int id, · 4 unmodified lines | ||
| 193 | 193 | ret = mfd_match_of_node_to_dev(pdev, np, cell); |
| 194 | 194 | if (ret == -EAGAIN) |
| 195 | 195 | continue; |
| 196 | − of_node_put(np); | |
| 197 | 196 | if (ret) |
| 198 | 197 | goto fail_alias; |
| 199 | 198 | |
| @@ -286,11 +285,13 @@ fail_res_conflict: · 86 unmodified lines | ||
| 286 | 285 | if (cell->swnode) |
| 287 | 286 | device_remove_software_node(&pdev->dev); |
| 288 | 287 | fail_of_entry: |
| 289 | − list_for_each_entry_safe(of_entry, tmp, &mfd_of_node_list, list) | |
| 290 | − if (of_entry->dev == &pdev->dev) { | |
| 291 | − list_del(&of_entry->list); | |
| 292 | − kfree(of_entry); | |
| 293 | − } | |
| 288 | + scoped_guard(mutex, &mfd_of_node_mutex) { | |
| 289 | + list_for_each_entry_safe(of_entry, tmp, &mfd_of_node_list, list) | |
| 290 | + if (of_entry->dev == &pdev->dev) { | |
| 291 | + list_del(&of_entry->list); | |
| 292 | + kfree(of_entry); | |
| 293 | + } | |
| 294 | + } | |
| 294 | 295 | fail_alias: |
| 295 | 296 | regulator_bulk_unregister_supply_alias(&pdev->dev, |
| 296 | 297 | cell->parent_supplies, |
| @@ -360,11 +361,13 @@ static int mfd_remove_devices_fn(struct device *dev, void *data) · 63 unmodified lines | ||
| 360 | 361 | if (cell->swnode) |
| 361 | 362 | device_remove_software_node(&pdev->dev); |
| 362 | 363 | |
| 363 | − list_for_each_entry_safe(of_entry, tmp, &mfd_of_node_list, list) | |
| 364 | − if (of_entry->dev == &pdev->dev) { | |
| 365 | − list_del(&of_entry->list); | |
| 366 | − kfree(of_entry); | |
| 367 | − } | |
| 364 | + scoped_guard(mutex, &mfd_of_node_mutex) { | |
| 365 | + list_for_each_entry_safe(of_entry, tmp, &mfd_of_node_list, list) | |
| 366 | + if (of_entry->dev == &pdev->dev) { | |
| 367 | + list_del(&of_entry->list); | |
| 368 | + kfree(of_entry); | |
| 369 | + } | |
| 370 | + } | |
| 368 | 371 | |
| 369 | 372 | regulator_bulk_unregister_supply_alias(dev, cell->parent_supplies, |
| 370 | 373 | cell->num_parent_supplies); |
| @@ -819,8 +819,10 @@ static void usbhs_omap_remove(struct platform_device *pdev) · 818 unmodified lines | ||
| 819 | 819 | { |
| 820 | 820 | pm_runtime_disable(&pdev->dev); |
| 821 | 821 | |
| 822 | − /* remove children */ | |
| 823 | − device_for_each_child(&pdev->dev, NULL, usbhs_omap_remove_child); | |
| 822 | + if (pdev->dev.of_node) | |
| 823 | + of_platform_depopulate(&pdev->dev); | |
| 824 | + else | |
| 825 | + device_for_each_child(&pdev->dev, NULL, usbhs_omap_remove_child); | |
| 824 | 826 | } |
| 825 | 827 | |
| 826 | 828 | static const struct dev_pm_ops usbhsomap_dev_pm_ops = { |
| @@ -577,17 +577,11 @@ static int pm8xxx_probe(struct platform_device *pdev) · 576 unmodified lines | ||
| 577 | 577 | return rc; |
| 578 | 578 | } |
| 579 | 579 | |
| 580 | −static int pm8xxx_remove_child(struct device *dev, void *unused) | |
| 581 | −{ | |
| 582 | − platform_device_unregister(to_platform_device(dev)); | |
| 583 | − return 0; | |
| 584 | −} | |
| 585 | − | |
| 586 | 580 | static void pm8xxx_remove(struct platform_device *pdev) |
| 587 | 581 | { |
| 588 | 582 | struct pm_irq_chip *chip = platform_get_drvdata(pdev); |
| 589 | 583 | |
| 590 | − device_for_each_child(&pdev->dev, NULL, pm8xxx_remove_child); | |
| 584 | + of_platform_depopulate(&pdev->dev); | |
| 591 | 585 | irq_domain_remove(chip->irqdomain); |
| 592 | 586 | } |
| 593 | 587 | |
| @@ -316,6 +316,14 @@ static int qnap_mcu_power_off(struct sys_off_data *data) · 315 unmodified lines | ||
| 316 | 316 | return NOTIFY_DONE; |
| 317 | 317 | } |
| 318 | 318 | |
| 319 | +static const struct qnap_mcu_variant qnap_ts133_mcu = { | |
| 320 | + .baud_rate = 115200, | |
| 321 | + .num_drives = 1, | |
| 322 | + .fan_pwm_min = 51, /* Specified in original model.conf */ | |
| 323 | + .fan_pwm_max = 255, | |
| 324 | + .usb_led = false, | |
| 325 | +}; | |
| 326 | + | |
| 319 | 327 | static const struct qnap_mcu_variant qnap_ts233_mcu = { |
| 320 | 328 | .baud_rate = 115200, |
| 321 | 329 | .num_drives = 2, |
| @@ -397,6 +405,7 @@ static int qnap_mcu_probe(struct serdev_device *serdev) · 75 unmodified lines | ||
| 397 | 405 | } |
| 398 | 406 | |
| 399 | 407 | static const struct of_device_id qnap_mcu_dt_ids[] = { |
| 408 | + { .compatible = "qnap,ts133-mcu", .data = &qnap_ts133_mcu }, | |
| 400 | 409 | { .compatible = "qnap,ts233-mcu", .data = &qnap_ts233_mcu }, |
| 401 | 410 | { .compatible = "qnap,ts433-mcu", .data = &qnap_ts433_mcu }, |
| 402 | 411 | { /* sentinel */ } |
| @@ -37,6 +37,11 @@ static const struct resource rk817_rtc_resources[] = { · 36 unmodified lines | ||
| 37 | 37 | DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM), |
| 38 | 38 | }; |
| 39 | 39 | |
| 40 | +static const struct resource rk801_key_resources[] = { | |
| 41 | + DEFINE_RES_IRQ(RK801_IRQ_PWRON_FALL), | |
| 42 | + DEFINE_RES_IRQ(RK801_IRQ_PWRON_RISE), | |
| 43 | +}; | |
| 44 | + | |
| 40 | 45 | static const struct resource rk805_key_resources[] = { |
| 41 | 46 | DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE), |
| 42 | 47 | DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL), |
| @@ -57,6 +62,14 @@ static const struct resource rk817_charger_resources[] = { · 14 unmodified lines | ||
| 57 | 62 | DEFINE_RES_IRQ(RK817_IRQ_PLUG_OUT), |
| 58 | 63 | }; |
| 59 | 64 | |
| 65 | +static const struct mfd_cell rk801s[] = { | |
| 66 | + { .name = "rk808-regulator", }, | |
| 67 | + { .name = "rk805-pwrkey", | |
| 68 | + .num_resources = ARRAY_SIZE(rk801_key_resources), | |
| 69 | + .resources = &rk801_key_resources[0], | |
| 70 | + }, | |
| 71 | +}; | |
| 72 | + | |
| 60 | 73 | static const struct mfd_cell rk805s[] = { |
| 61 | 74 | { .name = "rk808-clkout", }, |
| 62 | 75 | { .name = "rk808-regulator", }, |
| @@ -139,6 +152,15 @@ static const struct mfd_cell rk818s[] = { · 76 unmodified lines | ||
| 139 | 152 | }, |
| 140 | 153 | }; |
| 141 | 154 | |
| 155 | +static const struct rk808_reg_data rk801_pre_init_reg[] = { | |
| 156 | + { RK801_SLEEP_CFG_REG, RK801_SLEEP_FUN_MSK, RK801_NONE_FUN }, | |
| 157 | + { RK801_SYS_CFG2_REG, RK801_RST_MSK, RK801_RST_RESTART_REG_RESETB }, | |
| 158 | + { RK801_INT_CONFIG_REG, RK801_INT_POL_MSK, RK801_INT_ACT_L }, | |
| 159 | + { RK801_POWER_FPWM_EN_REG, RK801_PLDO_HRDEC_EN, RK801_PLDO_HRDEC_EN }, | |
| 160 | + { RK801_BUCK_DEBUG5_REG, MASK_ALL, 0x54 }, | |
| 161 | + { RK801_CON_BACK1_REG, MASK_ALL, 0x18 }, | |
| 162 | +}; | |
| 163 | + | |
| 142 | 164 | static const struct rk808_reg_data rk805_pre_init_reg[] = { |
| 143 | 165 | {RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK, |
| 144 | 166 | RK805_BUCK1_2_ILMAX_4000MA}, |
| @@ -284,6 +306,37 @@ static const struct rk808_reg_data rk818_pre_init_reg[] = { · 139 unmodified lines | ||
| 284 | 306 | VB_LO_SEL_3500MV }, |
| 285 | 307 | }; |
| 286 | 308 | |
| 309 | +static const struct regmap_irq rk801_irqs[] = { | |
| 310 | + [RK801_IRQ_PWRON_FALL] = { | |
| 311 | + .mask = RK801_IRQ_PWRON_FALL_MSK, | |
| 312 | + .reg_offset = 0, | |
| 313 | + }, | |
| 314 | + [RK801_IRQ_PWRON_RISE] = { | |
| 315 | + .mask = RK801_IRQ_PWRON_RISE_MSK, | |
| 316 | + .reg_offset = 0, | |
| 317 | + }, | |
| 318 | + [RK801_IRQ_PWRON] = { | |
| 319 | + .mask = RK801_IRQ_PWRON_MSK, | |
| 320 | + .reg_offset = 0, | |
| 321 | + }, | |
| 322 | + [RK801_IRQ_PWRON_LP] = { | |
| 323 | + .mask = RK801_IRQ_PWRON_LP_MSK, | |
| 324 | + .reg_offset = 0, | |
| 325 | + }, | |
| 326 | + [RK801_IRQ_HOTDIE] = { | |
| 327 | + .mask = RK801_IRQ_HOTDIE_MSK, | |
| 328 | + .reg_offset = 0, | |
| 329 | + }, | |
| 330 | + [RK801_IRQ_VDC_RISE] = { | |
| 331 | + .mask = RK801_IRQ_VDC_RISE_MSK, | |
| 332 | + .reg_offset = 0, | |
| 333 | + }, | |
| 334 | + [RK801_IRQ_VDC_FALL] = { | |
| 335 | + .mask = RK801_IRQ_VDC_FALL_MSK, | |
| 336 | + .reg_offset = 0, | |
| 337 | + }, | |
| 338 | +}; | |
| 339 | + | |
| 287 | 340 | static const struct regmap_irq rk805_irqs[] = { |
| 288 | 341 | [RK805_IRQ_PWRON_RISE] = { |
| 289 | 342 | .mask = RK805_IRQ_PWRON_RISE_MSK, |
| @@ -532,6 +585,17 @@ static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = { · 242 unmodified lines | ||
| 532 | 585 | REGMAP_IRQ_REG_LINE(23, 8) |
| 533 | 586 | }; |
| 534 | 587 | |
| 588 | +static const struct regmap_irq_chip rk801_irq_chip = { | |
| 589 | + .name = "rk801", | |
| 590 | + .irqs = rk801_irqs, | |
| 591 | + .num_irqs = ARRAY_SIZE(rk801_irqs), | |
| 592 | + .num_regs = 1, | |
| 593 | + .status_base = RK801_INT_STS0_REG, | |
| 594 | + .mask_base = RK801_INT_MASK0_REG, | |
| 595 | + .ack_base = RK801_INT_STS0_REG, | |
| 596 | + .init_ack_masked = true, | |
| 597 | +}; | |
| 598 | + | |
| 535 | 599 | static const struct regmap_irq_chip rk805_irq_chip = { |
| 536 | 600 | .name = "rk805", |
| 537 | 601 | .irqs = rk805_irqs, |
| @@ -610,6 +674,10 @@ static int rk808_power_off(struct sys_off_data *data) · 72 unmodified lines | ||
| 610 | 674 | unsigned int reg, bit; |
| 611 | 675 | |
| 612 | 676 | switch (rk808->variant) { |
| 677 | + case RK801_ID: | |
| 678 | + reg = RK801_SYS_CFG2_REG; | |
| 679 | + bit = DEV_OFF; | |
| 680 | + break; | |
| 613 | 681 | case RK805_ID: |
| 614 | 682 | reg = RK805_DEV_CTRL_REG; |
| 615 | 683 | bit = DEV_OFF; |
| @@ -714,6 +782,13 @@ int rk8xx_probe(struct device *dev, int variant, unsigned int irq, struct regmap · 98 unmodified lines | ||
| 714 | 782 | dev_set_drvdata(dev, rk808); |
| 715 | 783 | |
| 716 | 784 | switch (rk808->variant) { |
| 785 | + case RK801_ID: | |
| 786 | + rk808->regmap_irq_chip = &rk801_irq_chip; | |
| 787 | + pre_init_reg = rk801_pre_init_reg; | |
| 788 | + nr_pre_init_regs = ARRAY_SIZE(rk801_pre_init_reg); | |
| 789 | + cells = rk801s; | |
| 790 | + nr_cells = ARRAY_SIZE(rk801s); | |
| 791 | + break; | |
| 717 | 792 | case RK805_ID: |
| 718 | 793 | rk808->regmap_irq_chip = &rk805_irq_chip; |
| 719 | 794 | pre_init_reg = rk805_pre_init_reg; |
| @@ -831,6 +906,12 @@ int rk8xx_suspend(struct device *dev) · 111 unmodified lines | ||
| 831 | 906 | int ret = 0; |
| 832 | 907 | |
| 833 | 908 | switch (rk808->variant) { |
| 909 | + case RK801_ID: | |
| 910 | + ret = regmap_update_bits(rk808->regmap, | |
| 911 | + RK801_SLEEP_CFG_REG, | |
| 912 | + RK801_SLEEP_FUN_MSK, | |
| 913 | + RK801_SLEEP_FUN); | |
| 914 | + break; | |
| 834 | 915 | case RK805_ID: |
| 835 | 916 | ret = regmap_update_bits(rk808->regmap, |
| 836 | 917 | RK805_GPIO_IO_POL_REG, |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | 2 | /* |
| 3 | − * Rockchip RK805/RK808/RK816/RK817/RK818 Core (I2C) driver | |
| 3 | + * Rockchip RK801/RK805/RK808/RK816/RK817/RK818 Core (I2C) driver | |
| 4 | 4 | * |
| 5 | 5 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd |
| 6 | 6 | * Copyright (C) 2016 PHYTEC Messtechnik GmbH |
| @@ -21,6 +21,23 @@ struct rk8xx_i2c_platform_data { · 14 unmodified lines | ||
| 21 | 21 | int variant; |
| 22 | 22 | }; |
| 23 | 23 | |
| 24 | +static bool rk801_is_volatile_reg(struct device *dev, unsigned int reg) | |
| 25 | +{ | |
| 26 | + switch (reg) { | |
| 27 | + case RK801_SYS_STS_REG: | |
| 28 | + case RK801_INT_STS0_REG: | |
| 29 | + case RK801_SYS_CFG0_REG: | |
| 30 | + case RK801_SYS_CFG1_REG: | |
| 31 | + case RK801_SYS_CFG2_REG: | |
| 32 | + case RK801_SYS_CFG3_REG: | |
| 33 | + case RK801_SYS_CFG4_REG: | |
| 34 | + case RK801_SLEEP_CFG_REG: | |
| 35 | + return true; | |
| 36 | + } | |
| 37 | + | |
| 38 | + return false; | |
| 39 | +} | |
| 40 | + | |
| 24 | 41 | static bool rk806_is_volatile_reg(struct device *dev, unsigned int reg) |
| 25 | 42 | { |
| 26 | 43 | switch (reg) { |
| @@ -124,6 +141,14 @@ static const struct regmap_config rk818_regmap_config = { · 97 unmodified lines | ||
| 124 | 141 | .volatile_reg = rk808_is_volatile_reg, |
| 125 | 142 | }; |
| 126 | 143 | |
| 144 | +static const struct regmap_config rk801_regmap_config = { | |
| 145 | + .reg_bits = 8, | |
| 146 | + .val_bits = 8, | |
| 147 | + .max_register = RK801_SYS_CFG3_OTP_REG, | |
| 148 | + .cache_type = REGCACHE_RBTREE, | |
| 149 | + .volatile_reg = rk801_is_volatile_reg, | |
| 150 | +}; | |
| 151 | + | |
| 127 | 152 | static const struct regmap_config rk805_regmap_config = { |
| 128 | 153 | .reg_bits = 8, |
| 129 | 154 | .val_bits = 8, |
| @@ -164,6 +189,11 @@ static const struct regmap_config rk817_regmap_config = { · 34 unmodified lines | ||
| 164 | 189 | .volatile_reg = rk817_is_volatile_reg, |
| 165 | 190 | }; |
| 166 | 191 | |
| 192 | +static const struct rk8xx_i2c_platform_data rk801_data = { | |
| 193 | + .regmap_cfg = &rk801_regmap_config, | |
| 194 | + .variant = RK801_ID, | |
| 195 | +}; | |
| 196 | + | |
| 167 | 197 | static const struct rk8xx_i2c_platform_data rk805_data = { |
| 168 | 198 | .regmap_cfg = &rk805_regmap_config, |
| 169 | 199 | .variant = RK805_ID, |
| @@ -224,6 +254,7 @@ static void rk8xx_i2c_shutdown(struct i2c_client *client) · 54 unmodified lines | ||
| 224 | 254 | static SIMPLE_DEV_PM_OPS(rk8xx_i2c_pm_ops, rk8xx_suspend, rk8xx_resume); |
| 225 | 255 | |
| 226 | 256 | static const struct of_device_id rk8xx_i2c_of_match[] = { |
| 257 | + { .compatible = "rockchip,rk801", .data = &rk801_data }, | |
| 227 | 258 | { .compatible = "rockchip,rk805", .data = &rk805_data }, |
| 228 | 259 | { .compatible = "rockchip,rk806", .data = &rk806_data }, |
| 229 | 260 | { .compatible = "rockchip,rk808", .data = &rk808_data }, |
| @@ -257,6 +257,7 @@ static const struct regmap_irq_chip s2mpg10_irq_chip = { · 256 unmodified lines | ||
| 257 | 257 | |
| 258 | 258 | static const struct regmap_irq_chip s2mpg10_irq_chip_pmic = { |
| 259 | 259 | .name = "s2mpg10-pmic", |
| 260 | + .domain_suffix = "pmic", | |
| 260 | 261 | .status_base = S2MPG10_PMIC_INT1, |
| 261 | 262 | .mask_base = S2MPG10_PMIC_INT1M, |
| 262 | 263 | .num_regs = 6, |
| @@ -116,6 +116,7 @@ static const struct simple_mfd_data spacemit_p1 = { · 115 unmodified lines | ||
| 116 | 116 | }; |
| 117 | 117 | |
| 118 | 118 | static const struct of_device_id simple_mfd_i2c_of_match[] = { |
| 119 | + { .compatible = "delta,tn48m-cpld" }, | |
| 119 | 120 | { .compatible = "fsl,ls1028aqds-fpga" }, |
| 120 | 121 | { .compatible = "fsl,lx2160aqds-fpga" }, |
| 121 | 122 | { .compatible = "fsl,lx2160ardb-fpga" }, |
| @@ -498,6 +498,15 @@ static int tps65219_probe(struct i2c_client *client) · 497 unmodified lines | ||
| 498 | 498 | return ret; |
| 499 | 499 | } |
| 500 | 500 | |
| 501 | + if (chip_id == TPS65214) { | |
| 502 | + ret = i2c_smbus_write_byte_data(client, TPS65214_REG_LOCK, | |
| 503 | + TPS65214_LOCK_ACCESS_CMD); | |
| 504 | + if (ret) { | |
| 505 | + dev_err(tps->dev, "Failed to unlock registers %d\n", ret); | |
| 506 | + return ret; | |
| 507 | + } | |
| 508 | + } | |
| 509 | + | |
| 501 | 510 | ret = devm_regmap_add_irq_chip(tps->dev, tps->regmap, client->irq, |
| 502 | 511 | IRQF_ONESHOT, 0, pmic->irq_chip, |
| 503 | 512 | &tps->irq_data); |
| @@ -24,6 +24,9 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/gpio/consumer.h> |
| 25 | 25 | |
| 26 | 26 | /* Field definitions */ |
| 27 | +#define RK801_BUCK_VSEL_MASK 0x7f | |
| 28 | +#define RK801_LDO_VSEL_MASK 0x3f | |
| 29 | + | |
| 27 | 30 | #define RK808_BUCK_VSEL_MASK 0x3f |
| 28 | 31 | #define RK808_BUCK4_VSEL_MASK 0xf |
| 29 | 32 | #define RK808_LDO_VSEL_MASK 0x1f |
| @@ -158,6 +161,11 @@ · 128 unmodified lines | ||
| 158 | 161 | RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ |
| 159 | 162 | _vmask, _ereg, _emask, 0, 0, _etime, &rk808_reg_ops) |
| 160 | 163 | |
| 164 | +#define RK801_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ | |
| 165 | + _vmask, _ereg, _emask, _disval, _etime) \ | |
| 166 | + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ | |
| 167 | + _vmask, _ereg, _emask, _emask, _disval, _etime, &rk801_reg_ops) | |
| 168 | + | |
| 161 | 169 | #define RK816_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ |
| 162 | 170 | _vmask, _ereg, _emask, _disval, _etime) \ |
| 163 | 171 | RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ |
| @@ -185,6 +193,11 @@ · 21 unmodified lines | ||
| 185 | 193 | .ops = _ops \ |
| 186 | 194 | } |
| 187 | 195 | |
| 196 | +#define RK801_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \ | |
| 197 | + _disval) \ | |
| 198 | + RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ | |
| 199 | + _emask, _disval, &rk801_switch_ops) | |
| 200 | + | |
| 188 | 201 | #define RK817_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \ |
| 189 | 202 | _disval) \ |
| 190 | 203 | RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ |
| @@ -802,6 +815,115 @@ static unsigned int rk8xx_regulator_of_map_mode(unsigned int mode) · 611 unmodified lines | ||
| 802 | 815 | } |
| 803 | 816 | } |
| 804 | 817 | |
| 818 | +static unsigned int rk801_get_mode(struct regulator_dev *rdev) | |
| 819 | +{ | |
| 820 | + unsigned int val; | |
| 821 | + int err; | |
| 822 | + | |
| 823 | + err = regmap_read(rdev->regmap, RK801_POWER_FPWM_EN_REG, &val); | |
| 824 | + if (err) | |
| 825 | + return err; | |
| 826 | + | |
| 827 | + if (val & BIT(rdev->desc->id)) | |
| 828 | + return REGULATOR_MODE_FAST; | |
| 829 | + else | |
| 830 | + return REGULATOR_MODE_NORMAL; | |
| 831 | +} | |
| 832 | + | |
| 833 | +static int rk801_set_mode(struct regulator_dev *rdev, unsigned int mode) | |
| 834 | +{ | |
| 835 | + unsigned int offset = rdev->desc->id; | |
| 836 | + | |
| 837 | + switch (mode) { | |
| 838 | + case REGULATOR_MODE_FAST: | |
| 839 | + return regmap_update_bits(rdev->regmap, RK801_POWER_FPWM_EN_REG, | |
| 840 | + BIT(offset), RK801_FPWM_MODE << offset); | |
| 841 | + case REGULATOR_MODE_NORMAL: | |
| 842 | + return regmap_update_bits(rdev->regmap, RK801_POWER_FPWM_EN_REG, | |
| 843 | + BIT(offset), RK801_AUTO_PWM_MODE << offset); | |
| 844 | + default: | |
| 845 | + dev_err(&rdev->dev, "do not support this mode\n"); | |
| 846 | + return -EINVAL; | |
| 847 | + } | |
| 848 | + | |
| 849 | + return 0; | |
| 850 | +} | |
| 851 | + | |
| 852 | +static int rk801_set_suspend_voltage(struct regulator_dev *rdev, int uv) | |
| 853 | +{ | |
| 854 | + unsigned int reg; | |
| 855 | + int sel; | |
| 856 | + | |
| 857 | + if (rdev->desc->id < RK801_ID_LDO1) | |
| 858 | + sel = regulator_map_voltage_linear_range(rdev, uv, uv); | |
| 859 | + else | |
| 860 | + sel = regulator_map_voltage_linear(rdev, uv, uv); | |
| 861 | + if (sel < 0) | |
| 862 | + return -EINVAL; | |
| 863 | + | |
| 864 | + reg = rdev->desc->vsel_reg + RK801_SLP_REG_OFFSET; | |
| 865 | + | |
| 866 | + return regmap_update_bits(rdev->regmap, reg, | |
| 867 | + rdev->desc->vsel_mask, sel); | |
| 868 | +} | |
| 869 | + | |
| 870 | +static int rk801_set_suspend_enable(struct regulator_dev *rdev) | |
| 871 | +{ | |
| 872 | + return regmap_update_bits(rdev->regmap, RK801_POWER_SLP_EN_REG, | |
| 873 | + BIT(rdev->desc->id), BIT(rdev->desc->id)); | |
| 874 | +} | |
| 875 | + | |
| 876 | +static int rk801_set_suspend_disable(struct regulator_dev *rdev) | |
| 877 | +{ | |
| 878 | + return regmap_update_bits(rdev->regmap, RK801_POWER_SLP_EN_REG, | |
| 879 | + BIT(rdev->desc->id), 0); | |
| 880 | +} | |
| 881 | + | |
| 882 | +static int rk801_set_voltage_time_sel(struct regulator_dev *rdev, | |
| 883 | + unsigned int old_selector, | |
| 884 | + unsigned int new_selector) | |
| 885 | +{ | |
| 886 | + return regulator_set_voltage_time_sel(rdev, old_selector, | |
| 887 | + new_selector) + RK801_HW_SYNC_US; | |
| 888 | +} | |
| 889 | + | |
| 890 | +static const struct regulator_ops rk801_buck_ops = { | |
| 891 | + .list_voltage = regulator_list_voltage_linear_range, | |
| 892 | + .map_voltage = regulator_map_voltage_linear_range, | |
| 893 | + .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
| 894 | + .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
| 895 | + .set_voltage_time_sel = rk801_set_voltage_time_sel, | |
| 896 | + .enable = regulator_enable_regmap, | |
| 897 | + .disable = regulator_disable_regmap, | |
| 898 | + .is_enabled = regulator_is_enabled_regmap, | |
| 899 | + .set_mode = rk801_set_mode, | |
| 900 | + .get_mode = rk801_get_mode, | |
| 901 | + .set_suspend_voltage = rk801_set_suspend_voltage, | |
| 902 | + .set_suspend_enable = rk801_set_suspend_enable, | |
| 903 | + .set_suspend_disable = rk801_set_suspend_disable, | |
| 904 | +}; | |
| 905 | + | |
| 906 | +static const struct regulator_ops rk801_reg_ops = { | |
| 907 | + .list_voltage = regulator_list_voltage_linear, | |
| 908 | + .map_voltage = regulator_map_voltage_linear, | |
| 909 | + .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
| 910 | + .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
| 911 | + .enable = regulator_enable_regmap, | |
| 912 | + .disable = regulator_disable_regmap, | |
| 913 | + .is_enabled = regulator_is_enabled_regmap, | |
| 914 | + .set_suspend_voltage = rk801_set_suspend_voltage, | |
| 915 | + .set_suspend_enable = rk801_set_suspend_enable, | |
| 916 | + .set_suspend_disable = rk801_set_suspend_disable, | |
| 917 | +}; | |
| 918 | + | |
| 919 | +static const struct regulator_ops rk801_switch_ops = { | |
| 920 | + .enable = regulator_enable_regmap, | |
| 921 | + .disable = regulator_disable_regmap, | |
| 922 | + .is_enabled = regulator_is_enabled_regmap, | |
| 923 | + .set_suspend_enable = rk801_set_suspend_enable, | |
| 924 | + .set_suspend_disable = rk801_set_suspend_disable, | |
| 925 | +}; | |
| 926 | + | |
| 805 | 927 | static const struct regulator_ops rk805_reg_ops = { |
| 806 | 928 | .list_voltage = regulator_list_voltage_linear, |
| 807 | 929 | .map_voltage = regulator_map_voltage_linear, |
| @@ -1049,6 +1171,123 @@ static const struct regulator_ops rk817_switch_ops = { · 241 unmodified lines | ||
| 1049 | 1171 | .set_suspend_disable = rk817_set_suspend_disable, |
| 1050 | 1172 | }; |
| 1051 | 1173 | |
| 1174 | +static const struct linear_range rk801_buck1_voltage_ranges[] = { | |
| 1175 | + REGULATOR_LINEAR_RANGE(500000, 0, 80, 12500), /* 0.5v - 1.5v */ | |
| 1176 | + REGULATOR_LINEAR_RANGE(1800000, 81, 82, 400000),/* 1.8v - 2.2v */ | |
| 1177 | + REGULATOR_LINEAR_RANGE(3300000, 83, 83, 0), /* 3.3v */ | |
| 1178 | + REGULATOR_LINEAR_RANGE(5000000, 84, 84, 0), /* 5.0v */ | |
| 1179 | + REGULATOR_LINEAR_RANGE(5250000, 85, 85, 0), /* 5.25v */ | |
| 1180 | +}; | |
| 1181 | + | |
| 1182 | +static const struct linear_range rk801_buck2_voltage_ranges[] = { | |
| 1183 | + REGULATOR_LINEAR_RANGE(800000, 0, 2, 50000), /* 0.8v - 0.9v */ | |
| 1184 | + REGULATOR_LINEAR_RANGE(1800000, 3, 4, 400000), /* 1.8v - 2.2v */ | |
| 1185 | + REGULATOR_LINEAR_RANGE(3300000, 5, 5, 0), /* 3.3v */ | |
| 1186 | + REGULATOR_LINEAR_RANGE(5000000, 6, 6, 0), /* 5.0v */ | |
| 1187 | + REGULATOR_LINEAR_RANGE(5250000, 7, 7, 0), /* 5.25v */ | |
| 1188 | +}; | |
| 1189 | + | |
| 1190 | +static const struct linear_range rk801_buck4_voltage_ranges[] = { | |
| 1191 | + REGULATOR_LINEAR_RANGE(500000, 0, 80, 12500), /* 0.5v - 1.5v */ | |
| 1192 | + REGULATOR_LINEAR_RANGE(1800000, 81, 82, 400000),/* 1.8v - 2.2v */ | |
| 1193 | + REGULATOR_LINEAR_RANGE(2500000, 83, 83, 0), /* 2.5v */ | |
| 1194 | + REGULATOR_LINEAR_RANGE(2800000, 84, 84, 0), /* 2.8v */ | |
| 1195 | + REGULATOR_LINEAR_RANGE(3000000, 85, 85, 0), /* 3.0v */ | |
| 1196 | + REGULATOR_LINEAR_RANGE(3300000, 86, 86, 0), /* 3.3v */ | |
| 1197 | +}; | |
| 1198 | + | |
| 1199 | +static const struct regulator_desc rk801_reg[] = { | |
| 1200 | + { | |
| 1201 | + .name = "dcdc1", | |
| 1202 | + .supply_name = "vcc1", | |
| 1203 | + .of_match = of_match_ptr("dcdc1"), | |
| 1204 | + .regulators_node = of_match_ptr("regulators"), | |
| 1205 | + .id = RK801_ID_DCDC1, | |
| 1206 | + .ops = &rk801_buck_ops, | |
| 1207 | + .type = REGULATOR_VOLTAGE, | |
| 1208 | + .n_voltages = 86, | |
| 1209 | + .linear_ranges = rk801_buck1_voltage_ranges, | |
| 1210 | + .n_linear_ranges = ARRAY_SIZE(rk801_buck1_voltage_ranges), | |
| 1211 | + .vsel_reg = RK801_BUCK1_ON_VSEL_REG, | |
| 1212 | + .vsel_mask = RK801_BUCK_VSEL_MASK, | |
| 1213 | + .enable_reg = RK801_POWER_EN0_REG, | |
| 1214 | + .enable_mask = ENABLE_MASK(RK801_ID_DCDC1), | |
| 1215 | + .enable_val = ENABLE_MASK(RK801_ID_DCDC1), | |
| 1216 | + .disable_val = DISABLE_VAL(RK801_ID_DCDC1), | |
| 1217 | + .ramp_delay = 1000, | |
| 1218 | + .of_map_mode = rk8xx_regulator_of_map_mode, | |
| 1219 | + .enable_time = 400, | |
| 1220 | + .owner = THIS_MODULE, | |
| 1221 | + }, { | |
| 1222 | + .name = "dcdc2", | |
| 1223 | + .supply_name = "vcc2", | |
| 1224 | + .of_match = of_match_ptr("dcdc2"), | |
| 1225 | + .regulators_node = of_match_ptr("regulators"), | |
| 1226 | + .id = RK801_ID_DCDC2, | |
| 1227 | + .ops = &rk801_buck_ops, | |
| 1228 | + .type = REGULATOR_VOLTAGE, | |
| 1229 | + .n_voltages = 8, | |
| 1230 | + .linear_ranges = rk801_buck2_voltage_ranges, | |
| 1231 | + .n_linear_ranges = ARRAY_SIZE(rk801_buck2_voltage_ranges), | |
| 1232 | + .vsel_reg = RK801_BUCK2_ON_VSEL_REG, | |
| 1233 | + .vsel_mask = RK801_BUCK_VSEL_MASK, | |
| 1234 | + .enable_reg = RK801_POWER_EN0_REG, | |
| 1235 | + .enable_mask = ENABLE_MASK(RK801_ID_DCDC2), | |
| 1236 | + .enable_val = ENABLE_MASK(RK801_ID_DCDC2), | |
| 1237 | + .disable_val = DISABLE_VAL(RK801_ID_DCDC2), | |
| 1238 | + .ramp_delay = 1000, | |
| 1239 | + .of_map_mode = rk8xx_regulator_of_map_mode, | |
| 1240 | + .enable_time = 400, | |
| 1241 | + .owner = THIS_MODULE, | |
| 1242 | + }, { | |
| 1243 | + .name = "dcdc3", | |
| 1244 | + .supply_name = "vcc3", | |
| 1245 | + .of_match = of_match_ptr("dcdc3"), | |
| 1246 | + .regulators_node = of_match_ptr("regulators"), | |
| 1247 | + .id = RK801_ID_DCDC3, | |
| 1248 | + .ops = &rk801_switch_ops, | |
| 1249 | + .type = REGULATOR_VOLTAGE, | |
| 1250 | + .n_voltages = 1, | |
| 1251 | + .enable_reg = RK801_POWER_EN0_REG, | |
| 1252 | + .enable_mask = ENABLE_MASK(RK801_ID_DCDC3), | |
| 1253 | + .enable_val = ENABLE_MASK(RK801_ID_DCDC3), | |
| 1254 | + .disable_val = DISABLE_VAL(RK801_ID_DCDC3), | |
| 1255 | + .of_map_mode = rk8xx_regulator_of_map_mode, | |
| 1256 | + .enable_time = 400, | |
| 1257 | + .owner = THIS_MODULE, | |
| 1258 | + }, { | |
| 1259 | + .name = "dcdc4", | |
| 1260 | + .supply_name = "vcc4", | |
| 1261 | + .of_match = of_match_ptr("dcdc4"), | |
| 1262 | + .regulators_node = of_match_ptr("regulators"), | |
| 1263 | + .id = RK801_ID_DCDC4, | |
| 1264 | + .ops = &rk801_buck_ops, | |
| 1265 | + .type = REGULATOR_VOLTAGE, | |
| 1266 | + .n_voltages = 87, | |
| 1267 | + .linear_ranges = rk801_buck4_voltage_ranges, | |
| 1268 | + .n_linear_ranges = ARRAY_SIZE(rk801_buck4_voltage_ranges), | |
| 1269 | + .vsel_reg = RK801_BUCK4_ON_VSEL_REG, | |
| 1270 | + .vsel_mask = RK801_BUCK_VSEL_MASK, | |
| 1271 | + .enable_reg = RK801_POWER_EN0_REG, | |
| 1272 | + .enable_mask = ENABLE_MASK(RK801_ID_DCDC4), | |
| 1273 | + .enable_val = ENABLE_MASK(RK801_ID_DCDC4), | |
| 1274 | + .disable_val = DISABLE_VAL(RK801_ID_DCDC4), | |
| 1275 | + .ramp_delay = 1000, | |
| 1276 | + .of_map_mode = rk8xx_regulator_of_map_mode, | |
| 1277 | + .enable_time = 400, | |
| 1278 | + .owner = THIS_MODULE, | |
| 1279 | + }, | |
| 1280 | + | |
| 1281 | + RK801_DESC(RK801_ID_LDO1, "ldo1", "vcc5", 500, 3400, 50, | |
| 1282 | + RK801_LDO1_ON_VSEL_REG, RK801_LDO_VSEL_MASK, RK801_POWER_EN1_REG, | |
| 1283 | + ENABLE_MASK(0), DISABLE_VAL(0), 400), | |
| 1284 | + RK801_DESC(RK801_ID_LDO2, "ldo2", "vcc6", 500, 3400, 50, | |
| 1285 | + RK801_LDO2_ON_VSEL_REG, RK801_LDO_VSEL_MASK, RK801_POWER_EN1_REG, | |
| 1286 | + ENABLE_MASK(1), DISABLE_VAL(1), 400), | |
| 1287 | + RK801_DESC_SWITCH(RK801_ID_SWITCH, "switch", "vcc7", RK801_POWER_EN1_REG, | |
| 1288 | + ENABLE_MASK(2), DISABLE_VAL(2)), | |
| 1289 | +}; | |
| 1290 | + | |
| 1052 | 1291 | static const struct regulator_desc rk805_reg[] = { |
| 1053 | 1292 | { |
| 1054 | 1293 | .name = "DCDC_REG1", |
| @@ -1887,6 +2126,10 @@ static int rk808_regulator_probe(struct platform_device *pdev) · 832 unmodified lines | ||
| 1887 | 2126 | return -ENOMEM; |
| 1888 | 2127 | |
| 1889 | 2128 | switch (rk808->variant) { |
| 2129 | + case RK801_ID: | |
| 2130 | + regulators = rk801_reg; | |
| 2131 | + nregulators = RK801_NUM_REGULATORS; | |
| 2132 | + break; | |
| 1890 | 2133 | case RK805_ID: |
| 1891 | 2134 | regulators = rk805_reg; |
| 1892 | 2135 | nregulators = RK805_NUM_REGULATORS; |
| @@ -174,6 +174,9 @@ enum axp20x_variants { · 173 unmodified lines | ||
| 174 | 174 | #define AXP717_ADC_DATA_SEL 0xcd |
| 175 | 175 | #define AXP717_ADC_DATA_H 0xce |
| 176 | 176 | #define AXP717_ADC_DATA_L 0xcf |
| 177 | +#define AXP717_TYPEC_CC_AA_EN 0xe1 | |
| 178 | +#define AXP717_TYPEC_CC_MODE_CONTROL 0xe3 | |
| 179 | +#define AXP717_TYPEC_CC_STATUS 0xe7 | |
| 177 | 180 | |
| 178 | 181 | #define AXP806_STARTUP_SRC 0x00 |
| 179 | 182 | #define AXP806_CHIP_ID 0x03 |
| @@ -340,6 +340,123 @@ enum rk818_reg { · 339 unmodified lines | ||
| 340 | 340 | #define RK818_USB_ILMIN_2000MA 0x7 |
| 341 | 341 | #define RK818_USB_CHG_SD_VSEL_MASK 0x70 |
| 342 | 342 | |
| 343 | +/* RK801 */ | |
| 344 | +enum rk801_reg { | |
| 345 | + RK801_ID_DCDC1, | |
| 346 | + RK801_ID_DCDC2, | |
| 347 | + RK801_ID_DCDC4, | |
| 348 | + RK801_ID_DCDC3, | |
| 349 | + RK801_ID_LDO1, | |
| 350 | + RK801_ID_LDO2, | |
| 351 | + RK801_ID_SWITCH, | |
| 352 | + RK801_ID_MAX, | |
| 353 | +}; | |
| 354 | + | |
| 355 | +#define RK801_SLP_REG_OFFSET 5 | |
| 356 | +#define RK801_NUM_REGULATORS 7 | |
| 357 | + | |
| 358 | +#define RK801_HW_SYNC_US 32 | |
| 359 | + | |
| 360 | +/* RK801 Register Definitions */ | |
| 361 | +#define RK801_ID_MSB 0x00 | |
| 362 | +#define RK801_ID_LSB 0x01 | |
| 363 | +#define RK801_OTP_VER_REG 0x02 | |
| 364 | +#define RK801_POWER_EN0_REG 0x03 | |
| 365 | +#define RK801_POWER_EN1_REG 0x04 | |
| 366 | +#define RK801_POWER_SLP_EN_REG 0x05 | |
| 367 | +#define RK801_POWER_FPWM_EN_REG 0x06 | |
| 368 | +#define RK801_SLP_LP_CONFIG_REG 0x07 | |
| 369 | +#define RK801_BUCK_CONFIG_REG 0x08 | |
| 370 | +#define RK801_BUCK1_ON_VSEL_REG 0x09 | |
| 371 | +#define RK801_BUCK2_ON_VSEL_REG 0x0a | |
| 372 | +#define RK801_BUCK4_ON_VSEL_REG 0x0b | |
| 373 | +#define RK801_LDO1_ON_VSEL_REG 0x0c | |
| 374 | +#define RK801_LDO2_ON_VSEL_REG 0x0d | |
| 375 | +#define RK801_BUCK1_SLP_VSEL_REG 0x0e | |
| 376 | +#define RK801_BUCK2_SLP_VSEL_REG 0x0f | |
| 377 | +#define RK801_BUCK4_SLP_VSEL_REG 0x10 | |
| 378 | +#define RK801_LDO1_SLP_VSEL_REG 0x11 | |
| 379 | +#define RK801_LDO2_SLP_VSEL_REG 0x12 | |
| 380 | +#define RK801_LDO_SW_IMAX_REG 0x13 | |
| 381 | +#define RK801_SYS_STS_REG 0x14 | |
| 382 | +#define RK801_SYS_CFG0_REG 0x15 | |
| 383 | +#define RK801_SYS_CFG1_REG 0x16 | |
| 384 | +#define RK801_SYS_CFG2_REG 0x17 | |
| 385 | +#define RK801_SYS_CFG3_REG 0x18 | |
| 386 | +#define RK801_SYS_CFG4_REG 0x19 | |
| 387 | +#define RK801_SLEEP_CFG_REG 0x1a | |
| 388 | +#define RK801_ON_SOURCE_REG 0x1b | |
| 389 | +#define RK801_OFF_SOURCE_REG 0x1c | |
| 390 | +#define RK801_PWRON_KEY_REG 0x1d | |
| 391 | +#define RK801_INT_STS0_REG 0x1e | |
| 392 | +#define RK801_INT_MASK0_REG 0x1f | |
| 393 | +#define RK801_INT_CONFIG_REG 0x20 | |
| 394 | +#define RK801_CON_BACK1_REG 0x21 | |
| 395 | +#define RK801_CON_BACK2_REG 0x22 | |
| 396 | +#define RK801_DATA_CON0_REG 0x23 | |
| 397 | +#define RK801_DATA_CON1_REG 0x24 | |
| 398 | +#define RK801_DATA_CON2_REG 0x25 | |
| 399 | +#define RK801_DATA_CON3_REG 0x26 | |
| 400 | +#define RK801_POWER_EXIT_SLP_SEQ0_REG 0x27 | |
| 401 | +#define RK801_POWER_EXIT_SLP_SEQ1_REG 0x28 | |
| 402 | +#define RK801_POWER_EXIT_SLP_SEQ2_REG 0x29 | |
| 403 | +#define RK801_POWER_EXIT_SLP_SEQ3_REG 0x2a | |
| 404 | +#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ0_REG 0x2b | |
| 405 | +#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ1_REG 0x2c | |
| 406 | +#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ2_REG 0x2d | |
| 407 | +#define RK801_POWER_ENTER_SLP_OR_SHTD_SEQ3_REG 0x2e | |
| 408 | +#define RK801_BUCK_DEBUG1_REG 0x2f | |
| 409 | +#define RK801_BUCK_DEBUG2_REG 0x30 | |
| 410 | +#define RK801_BUCK_DEBUG3_REG 0x31 | |
| 411 | +#define RK801_BUCK_DEBUG4_REG 0x32 | |
| 412 | +#define RK801_BUCK_DEBUG5_REG 0x33 | |
| 413 | +#define RK801_BUCK_DEBUG7_REG 0x34 | |
| 414 | +#define RK801_OTP_EN_CON_REG 0x35 | |
| 415 | +#define RK801_TEST_CON_REG 0x36 | |
| 416 | +#define RK801_EFUSE_CONTROL_REG 0x37 | |
| 417 | +#define RK801_SYS_CFG3_OTP_REG 0x38 | |
| 418 | + | |
| 419 | +/* RK801 IRQ Definitions */ | |
| 420 | +#define RK801_IRQ_PWRON_FALL 0 | |
| 421 | +#define RK801_IRQ_PWRON_RISE 1 | |
| 422 | +#define RK801_IRQ_PWRON 2 | |
| 423 | +#define RK801_IRQ_PWRON_LP 3 | |
| 424 | +#define RK801_IRQ_HOTDIE 4 | |
| 425 | +#define RK801_IRQ_VDC_RISE 5 | |
| 426 | +#define RK801_IRQ_VDC_FALL 6 | |
| 427 | +#define RK801_IRQ_PWRON_FALL_MSK BIT(0) | |
| 428 | +#define RK801_IRQ_PWRON_RISE_MSK BIT(1) | |
| 429 | +#define RK801_IRQ_PWRON_MSK BIT(2) | |
| 430 | +#define RK801_IRQ_PWRON_LP_MSK BIT(3) | |
| 431 | +#define RK801_IRQ_HOTDIE_MSK BIT(4) | |
| 432 | +#define RK801_IRQ_VDC_RISE_MSK BIT(5) | |
| 433 | +#define RK801_IRQ_VDC_FALL_MSK BIT(6) | |
| 434 | +/* RK801_SLP_LP_CONFIG_REG */ | |
| 435 | +#define RK801_BUCK_SLP_LP_EN BIT(3) | |
| 436 | +#define RK801_PLDO_SLP_LP_EN BIT(1) | |
| 437 | +#define RK801_SLP_LP_MASK (RK801_PLDO_SLP_LP_EN | RK801_BUCK_SLP_LP_EN) | |
| 438 | +/* RK801_SLEEP_CFG_REG */ | |
| 439 | +#define RK801_SLEEP_FUN_MSK 0x3 | |
| 440 | +#define RK801_NONE_FUN 0x0 | |
| 441 | +#define RK801_SLEEP_FUN 0x1 | |
| 442 | +#define RK801_SHUTDOWN_FUN 0x2 | |
| 443 | +#define RK801_RESET_FUN 0x3 | |
| 444 | +/* RK801_SYS_CFG2_REG */ | |
| 445 | +#define RK801_SLEEP_POL_MSK BIT(1) | |
| 446 | +#define RK801_SLEEP_ACT_H BIT(1) | |
| 447 | +#define RK801_SLEEP_ACT_L 0 | |
| 448 | +#define RK801_RST_MSK (0x3 << 4) | |
| 449 | +#define RK801_RST_RESTART_PMU (0x0 << 4) | |
| 450 | +#define RK801_RST_RESTART_REG (0x1 << 4) | |
| 451 | +#define RK801_RST_RESTART_REG_RESETB (0x2 << 4) | |
| 452 | +/* RK801_INT_CONFIG_REG */ | |
| 453 | +#define RK801_INT_POL_MSK BIT(1) | |
| 454 | +#define RK801_INT_ACT_H BIT(1) | |
| 455 | +#define RK801_INT_ACT_L 0 | |
| 456 | +#define RK801_FPWM_MODE 1 | |
| 457 | +#define RK801_AUTO_PWM_MODE 0 | |
| 458 | +#define RK801_PLDO_HRDEC_EN BIT(6) | |
| 459 | + | |
| 343 | 460 | /* RK805 */ |
| 344 | 461 | enum rk805_reg { |
| 345 | 462 | RK805_ID_DCDC1, |
| @@ -1332,6 +1449,7 @@ enum { · 986 unmodified lines | ||
| 1332 | 1449 | }; |
| 1333 | 1450 | |
| 1334 | 1451 | enum { |
| 1452 | + RK801_ID = 0x8010, | |
| 1335 | 1453 | RK805_ID = 0x8050, |
| 1336 | 1454 | RK806_ID = 0x8060, |
| 1337 | 1455 | RK808_ID = 0x0000, |
| @@ -249,6 +249,8 @@ enum { · 248 unmodified lines | ||
| 249 | 249 | #define BD71828_REG_BATCAP_MON_LIMIT_U 0xcc |
| 250 | 250 | #define BD71828_REG_CONF 0x64 |
| 251 | 251 | |
| 252 | +#define BD71828_REG_ILIM_STAT 0x6d | |
| 253 | +#define BD71828_REG_DCIN_SET 0x70 | |
| 252 | 254 | #define BD71828_REG_DCIN_CLPS 0x71 |
| 253 | 255 | |
| 254 | 256 | #define BD71828_REG_MEAS_CLEAR 0xaf |
| @@ -53,7 +53,7 @@ · 52 unmodified lines | ||
| 53 | 53 | /** |
| 54 | 54 | * enum tps6105x_mode - desired mode for the TPS6105x |
| 55 | 55 | * @TPS6105X_MODE_SHUTDOWN: this instance is inactive, not used for anything |
| 56 | − * @TPS61905X_MODE_TORCH: this instance is used as a LED, usually a while | |
| 56 | + * @TPS6105X_MODE_TORCH: this instance is used as a LED, usually a while | |
| 57 | 57 | * LED, for example as backlight or flashlight. If this is set, the |
| 58 | 58 | * TPS6105X will register to the LED framework |
| 59 | 59 | * @TPS6105X_MODE_TORCH_FLASH: this instance is used as a flashgun, usually |
| @@ -82,7 +82,8 @@ struct tps6105x_platform_data { · 22 unmodified lines | ||
| 82 | 82 | |
| 83 | 83 | /** |
| 84 | 84 | * struct tps6105x - state holder for the TPS6105x drivers |
| 85 | − * @i2c_client: corresponding I2C client | |
| 85 | + * @pdata: associated platform data | |
| 86 | + * @client: corresponding I2C client | |
| 86 | 87 | * @regulator: regulator device if used in voltage mode |
| 87 | 88 | * @regmap: used for i2c communcation on accessing registers |
| 88 | 89 | */ |
| @@ -149,6 +149,8 @@ enum pmic_id { · 148 unmodified lines | ||
| 149 | 149 | #define TPS65215_ENABLE_LDO2_EN_MASK BIT(5) |
| 150 | 150 | #define TPS65214_ENABLE_LDO1_EN_MASK BIT(5) |
| 151 | 151 | #define TPS65219_ENABLE_LDO4_EN_MASK BIT(6) |
| 152 | +/* Register Unlock */ | |
| 153 | +#define TPS65214_LOCK_ACCESS_CMD 0x5a | |
| 152 | 154 | /* power ON-OFF sequence slot */ |
| 153 | 155 | #define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK GENMASK(3, 0) |
| 154 | 156 | #define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK GENMASK(7, 4) |