rMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM fixes from Radim Krčmář: "ARM: - PSCI selection API, a leftover from 4.16 (for stable) - Kick vcpu on active interrupt affinity change - Plug a VMID allocation race on oversubscribed systems - Silence debug messages - Update Christoffer's email address (linaro -> arm) x86: - Expose userspace-relevant bits of a newly added feature - Fix TLB flushing on VMX with VPID, but without EPT" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: x86/headers/UAPI: Move DISABLE_EXITS KVM capability bits to the UAPI kvm: apic: Flush TLB after APIC mode/address change if VPIDs are in use arm/arm64: KVM: Add PSCI version selection API KVM: arm/arm64: vgic: Kick new VCPU on interrupt migration arm64: KVM: Demote SVE and LORegion warnings to debug only MAINTAINERS: Update e-mail address for Christoffer Dall KVM: arm/arm64: Close VMID generation race

Linus Torvalds committed 8 years ago

Commit 46dc1112 parents 19b522d 5e6249317 files · +189 −32Browse files

Unified · Split

17 files

Documentation/virtual/kvm/api.txt +8 −1
Documentation/virtual/kvm/arm/psci.txt +30 −0
MAINTAINERS +2 −2
arch/arm/include/asm/kvm_host.h +3 −0
arch/arm/include/uapi/asm/kvm.h +6 −0
arch/arm/kvm/guest.c +13 −0
arch/arm64/include/asm/kvm_host.h +3 −0
arch/arm64/include/uapi/asm/kvm.h +6 −0
arch/arm64/kvm/guest.c +13 −1
arch/arm64/kvm/sys_regs.c +2 −4
arch/x86/kvm/vmx.c +4 −10
arch/x86/kvm/x86.h +0 −7
include/kvm/arm_psci.h +14 −2
include/uapi/linux/kvm.h +7 −0
virt/kvm/arm/arm.c +10 −5
virt/kvm/arm/psci.c +60 −0
virt/kvm/arm/vgic/vgic.c +8 −0

Documentation/virtual/kvm/api.txt+8−1

 ARM 64-bit FP registers have the following id bit patterns:
   0x4030 0000 0012 0 <regno:12>
+ARM firmware pseudo-registers have the following bit pattern:
+  0x4030 0000 0014 <regno:16>
 arm64 registers are mapped using the lower 32 bits. The upper 16 of
 that is the register group type, or coprocessor number:
 arm64 system registers have the following id bit patterns:
   0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>
+arm64 firmware pseudo-registers have the following bit pattern:
+  0x6030 0000 0014 <regno:16>
 MIPS registers are mapped using the lower 32 bits.  The upper 16 of that is
 the register group type:
 	  and execute guest code when KVM_RUN is called.
 	- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.
 	  Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).
-	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 for the CPU.
+	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision
+          backward compatible with v0.2) for the CPU.
 	  Depends on KVM_CAP_ARM_PSCI_0_2.
 	- KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU.
 	  Depends on KVM_CAP_ARM_PMU_V3.

Documentation/virtual/kvm/arm/psci.txt+30−0

@@ -0,0 +1,30 @@
	1	KVM implements the PSCI (Power State Coordination Interface)
	2	specification in order to provide services such as CPU on/off, reset
	3	and power-off to the guest.
	4
	5	The PSCI specification is regularly updated to provide new features,
	6	and KVM implements these updates if they make sense from a virtualization
	7	point of view.
	8
	9	This means that a guest booted on two different versions of KVM can
	10	observe two different "firmware" revisions. This could cause issues if
	11	a given guest is tied to a particular PSCI revision (unlikely), or if
	12	a migration causes a different PSCI version to be exposed out of the
	13	blue to an unsuspecting guest.
	14
	15	In order to remedy this situation, KVM exposes a set of "firmware
	16	pseudo-registers" that can be manipulated using the GET/SET_ONE_REG
	17	interface. These registers can be saved/restored by userspace, and set
	18	to a convenient value if required.
	19
	20	The following register is defined:
	21
	22	* KVM_REG_ARM_PSCI_VERSION:
	23
	24	- Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set
	25	(and thus has already been initialized)
	26	- Returns the current PSCI version on GET_ONE_REG (defaulting to the
	27	highest PSCI version implemented by KVM and compatible with v0.2)
	28	- Allows any PSCI version implemented by KVM and compatible with
	29	v0.2 to be set with SET_ONE_REG
	30	- Affects the whole VM (even if the register view is per-vcpu)

MAINTAINERS+2−2

@@ -7744,7 +7744,7 @@ F: arch/x86/include/asm/svm.h · 7743 unmodified lines
7744	F: arch/x86/kvm/svm.c	7744	F: arch/x86/kvm/svm.c
7745		7745
7746	KERNEL VIRTUAL MACHINE FOR ARM (KVM/arm)	7746	KERNEL VIRTUAL MACHINE FOR ARM (KVM/arm)
7747	M: Christoffer Dall <christoffer.dall@linaro.org>	7747	M: Christoffer Dall <christoffer.dall@arm.com>
7748	M: Marc Zyngier <marc.zyngier@arm.com>	7748	M: Marc Zyngier <marc.zyngier@arm.com>
7749	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	7749	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
7750	L: kvmarm@lists.cs.columbia.edu	7750	L: kvmarm@lists.cs.columbia.edu
@@ -7758,7 +7758,7 @@ F: virt/kvm/arm/ · 7 unmodified lines
7758	F: include/kvm/arm_*	7758	F: include/kvm/arm_*
7759		7759
7760	KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)	7760	KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)
7761	M: Christoffer Dall <christoffer.dall@linaro.org>	7761	M: Christoffer Dall <christoffer.dall@arm.com>
7762	M: Marc Zyngier <marc.zyngier@arm.com>	7762	M: Marc Zyngier <marc.zyngier@arm.com>
7763	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	7763	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
7764	L: kvmarm@lists.cs.columbia.edu	7764	L: kvmarm@lists.cs.columbia.edu

arch/arm/include/asm/kvm_host.h+3−0

@@ -77,6 +77,9 @@ struct kvm_arch { · 76 unmodified lines
77	/* Interrupt controller */	77	/* Interrupt controller */
78	struct vgic_dist vgic;	78	struct vgic_dist vgic;
79	int max_vcpus;	79	int max_vcpus;
		80
		81	/* Mandated version of PSCI */
		82	u32 psci_version;
80	};	83	};
81		84
82	#define KVM_NR_MEM_OBJS 40	85	#define KVM_NR_MEM_OBJS 40

arch/arm/include/uapi/asm/kvm.h+6−0

 #define KVM_REG_ARM_VFP_FPINST		0x1009
 #define KVM_REG_ARM_VFP_FPINST2		0x100A
+/* KVM-as-firmware specific pseudo-registers */
+#define KVM_REG_ARM_FW			(0x0014 << KVM_REG_ARM_COPROC_SHIFT)
+#define KVM_REG_ARM_FW_REG(r)		(KVM_REG_ARM | KVM_REG_SIZE_U64 | \
+					 KVM_REG_ARM_FW | ((r) & 0xffff))
+#define KVM_REG_ARM_PSCI_VERSION	KVM_REG_ARM_FW_REG(0)
 /* Device Control API: ARM VGIC */
 #define KVM_DEV_ARM_VGIC_GRP_ADDR	0
 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS	1

arch/arm/kvm/guest.c+13−0

 #include <linux/module.h>
 #include <linux/vmalloc.h>
 #include <linux/fs.h>
+#include <kvm/arm_psci.h>
 #include <asm/cputype.h>
 #include <linux/uaccess.h>
 #include <asm/kvm.h>
 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
 {
 	return num_core_regs() + kvm_arm_num_coproc_regs(vcpu)
+		+ kvm_arm_get_fw_num_regs(vcpu)
 		+ NUM_TIMER_REGS;
 }
 		uindices++;
 	}
+	ret = kvm_arm_copy_fw_reg_indices(vcpu, uindices);
+	if (ret)
+		return ret;
+	uindices += kvm_arm_get_fw_num_regs(vcpu);
 	ret = copy_timer_indices(vcpu, uindices);
 	if (ret)
 		return ret;
 	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
 		return get_core_reg(vcpu, reg);
+	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
+		return kvm_arm_get_fw_reg(vcpu, reg);
 	if (is_timer_reg(reg->id))
 		return get_timer_reg(vcpu, reg);
 	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
 		return set_core_reg(vcpu, reg);
+	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
+		return kvm_arm_set_fw_reg(vcpu, reg);
 	if (is_timer_reg(reg->id))
 		return set_timer_reg(vcpu, reg);

arch/arm64/include/asm/kvm_host.h+3−0

@@ -75,6 +75,9 @@ struct kvm_arch { · 74 unmodified lines
75		75
76	/* Interrupt controller */	76	/* Interrupt controller */
77	struct vgic_dist vgic;	77	struct vgic_dist vgic;
		78
		79	/* Mandated version of PSCI */
		80	u32 psci_version;
78	};	81	};
79		82
80	#define KVM_NR_MEM_OBJS 40	83	#define KVM_NR_MEM_OBJS 40

arch/arm64/include/uapi/asm/kvm.h+6−0

 #define KVM_REG_ARM_TIMER_CNT		ARM64_SYS_REG(3, 3, 14, 3, 2)
 #define KVM_REG_ARM_TIMER_CVAL		ARM64_SYS_REG(3, 3, 14, 0, 2)
+/* KVM-as-firmware specific pseudo-registers */
+#define KVM_REG_ARM_FW			(0x0014 << KVM_REG_ARM_COPROC_SHIFT)
+#define KVM_REG_ARM_FW_REG(r)		(KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
+					 KVM_REG_ARM_FW | ((r) & 0xffff))
+#define KVM_REG_ARM_PSCI_VERSION	KVM_REG_ARM_FW_REG(0)
 /* Device Control API: ARM VGIC */
 #define KVM_DEV_ARM_VGIC_GRP_ADDR	0
 #define KVM_DEV_ARM_VGIC_GRP_DIST_REGS	1

arch/arm64/kvm/guest.c+13−1

 #include <linux/module.h>
 #include <linux/vmalloc.h>
 #include <linux/fs.h>
+#include <kvm/arm_psci.h>
 #include <asm/cputype.h>
 #include <linux/uaccess.h>
 #include <asm/kvm.h>
 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
 {
 	return num_core_regs() + kvm_arm_num_sys_reg_descs(vcpu)
-                + NUM_TIMER_REGS;
+		+ kvm_arm_get_fw_num_regs(vcpu)	+ NUM_TIMER_REGS;
 }
 /**
 		uindices++;
 	}
+	ret = kvm_arm_copy_fw_reg_indices(vcpu, uindices);
+	if (ret)
+		return ret;
+	uindices += kvm_arm_get_fw_num_regs(vcpu);
 	ret = copy_timer_indices(vcpu, uindices);
 	if (ret)
 		return ret;
 	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
 		return get_core_reg(vcpu, reg);
+	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
+		return kvm_arm_get_fw_reg(vcpu, reg);
 	if (is_timer_reg(reg->id))
 		return get_timer_reg(vcpu, reg);
 	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_CORE)
 		return set_core_reg(vcpu, reg);
+	if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_FW)
+		return kvm_arm_set_fw_reg(vcpu, reg);
 	if (is_timer_reg(reg->id))
 		return set_timer_reg(vcpu, reg);

arch/arm64/kvm/sys_regs.c+2−4

 	if (id == SYS_ID_AA64PFR0_EL1) {
 		if (val & (0xfUL << ID_AA64PFR0_SVE_SHIFT))
-			pr_err_once("kvm [%i]: SVE unsupported for guests, suppressing\n",
+			kvm_debug("SVE unsupported for guests, suppressing\n");
-				    task_pid_nr(current));
 		val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
 	} else if (id == SYS_ID_AA64MMFR1_EL1) {
 		if (val & (0xfUL << ID_AA64MMFR1_LOR_SHIFT))
-			pr_err_once("kvm [%i]: LORegions unsupported for guests, suppressing\n",
+			kvm_debug("LORegions unsupported for guests, suppressing\n");
-				    task_pid_nr(current));
 		val &= ~(0xfUL << ID_AA64MMFR1_LOR_SHIFT);
 	}

arch/x86/kvm/vmx.c+4−10

 	__vmx_flush_tlb(vcpu, to_vmx(vcpu)->vpid, invalidate_gpa);
 }
-static void vmx_flush_tlb_ept_only(struct kvm_vcpu *vcpu)
-{
-	if (enable_ept)
-		vmx_flush_tlb(vcpu, true);
-}
 static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
 {
 	ulong cr0_guest_owned_bits = vcpu->arch.cr0_guest_owned_bits;
 	} else {
 		sec_exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
 		sec_exec_control |= SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
-		vmx_flush_tlb_ept_only(vcpu);
+		vmx_flush_tlb(vcpu, true);
 	}
 	vmcs_write32(SECONDARY_VM_EXEC_CONTROL, sec_exec_control);
 	    !nested_cpu_has2(get_vmcs12(&vmx->vcpu),
 			     SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
 		vmcs_write64(APIC_ACCESS_ADDR, hpa);
-		vmx_flush_tlb_ept_only(vcpu);
+		vmx_flush_tlb(vcpu, true);
 	}
 }
 		}
 	} else if (nested_cpu_has2(vmcs12,
 				   SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
-		vmx_flush_tlb_ept_only(vcpu);
+		vmx_flush_tlb(vcpu, true);
 	}
 	/*
 	} else if (!nested_cpu_has_ept(vmcs12) &&
 		   nested_cpu_has2(vmcs12,
 				   SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)) {
-		vmx_flush_tlb_ept_only(vcpu);
+		vmx_flush_tlb(vcpu, true);
 	}
 	/* This is needed for same reason as it was needed in prepare_vmcs02 */

arch/x86/kvm/x86.h+0−7

@@ -302,13 +302,6 @@ static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec) · 301 unmodified lines
302	__rem; \	302	__rem; \
303	})	303	})
304		304
305	#define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0)
306	#define KVM_X86_DISABLE_EXITS_HTL (1 << 1)
307	#define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2)
308	#define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT \| \
309	KVM_X86_DISABLE_EXITS_HTL \| \
310	KVM_X86_DISABLE_EXITS_PAUSE)
311
312	static inline bool kvm_mwait_in_guest(struct kvm *kvm)	305	static inline bool kvm_mwait_in_guest(struct kvm *kvm)
313	{	306	{
314	return kvm->arch.mwait_in_guest;	307	return kvm->arch.mwait_in_guest;

include/kvm/arm_psci.h+14−2

 	 * Our PSCI implementation stays the same across versions from
 	 * v0.2 onward, only adding the few mandatory functions (such
 	 * as FEATURES with 1.0) that are required by newer
-	 * revisions. It is thus safe to return the latest.
+	 * revisions. It is thus safe to return the latest, unless
+	 * userspace has instructed us otherwise.
 	 */
-	if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
+	if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features)) {
+		if (vcpu->kvm->arch.psci_version)
+			return vcpu->kvm->arch.psci_version;
 		return KVM_ARM_PSCI_LATEST;
+	}
 	return KVM_ARM_PSCI_0_1;
 }
 int kvm_hvc_call_handler(struct kvm_vcpu *vcpu);
+struct kvm_one_reg;
+int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu);
+int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
+int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
+int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
 #endif /* __KVM_ARM_PSCI_H__ */

include/uapi/linux/kvm.h+7−0

@@ -676,6 +676,13 @@ struct kvm_ioeventfd { · 675 unmodified lines
676	__u8 pad[36];	676	__u8 pad[36];
677	};	677	};
678		678
		679	#define KVM_X86_DISABLE_EXITS_MWAIT (1 << 0)
		680	#define KVM_X86_DISABLE_EXITS_HTL (1 << 1)
		681	#define KVM_X86_DISABLE_EXITS_PAUSE (1 << 2)
		682	#define KVM_X86_DISABLE_VALID_EXITS (KVM_X86_DISABLE_EXITS_MWAIT \| \
		683	KVM_X86_DISABLE_EXITS_HTL \| \
		684	KVM_X86_DISABLE_EXITS_PAUSE)
		685
679	/* for KVM_ENABLE_CAP */	686	/* for KVM_ENABLE_CAP */
680	struct kvm_enable_cap {	687	struct kvm_enable_cap {
681	/* in */	688	/* in */

virt/kvm/arm/arm.c+10−5

 static atomic64_t kvm_vmid_gen = ATOMIC64_INIT(1);
 static u32 kvm_next_vmid;
 static unsigned int kvm_vmid_bits __read_mostly;
-static DEFINE_SPINLOCK(kvm_vmid_lock);
+static DEFINE_RWLOCK(kvm_vmid_lock);
 static bool vgic_present;
 {
 	phys_addr_t pgd_phys;
 	u64 vmid;
+	bool new_gen;
-	if (!need_new_vmid_gen(kvm))
+	read_lock(&kvm_vmid_lock);
+	new_gen = need_new_vmid_gen(kvm);
+	read_unlock(&kvm_vmid_lock);
+	if (!new_gen)
 		return;
-	spin_lock(&kvm_vmid_lock);
+	write_lock(&kvm_vmid_lock);
 	/*
 	 * We need to re-check the vmid_gen here to ensure that if another vcpu
 	 * use the same vmid.
 	 */
 	if (!need_new_vmid_gen(kvm)) {
-		spin_unlock(&kvm_vmid_lock);
+		write_unlock(&kvm_vmid_lock);
 		return;
 	}
 	vmid = ((u64)(kvm->arch.vmid) << VTTBR_VMID_SHIFT) & VTTBR_VMID_MASK(kvm_vmid_bits);
 	kvm->arch.vttbr = kvm_phys_to_vttbr(pgd_phys) | vmid;
-	spin_unlock(&kvm_vmid_lock);
+	write_unlock(&kvm_vmid_lock);
 }
 static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)

virt/kvm/arm/psci.c+60−0

@@ -18,6 +18,7 @@ · 17 unmodified lines
18	#include <linux/arm-smccc.h>	18	#include <linux/arm-smccc.h>
19	#include <linux/preempt.h>	19	#include <linux/preempt.h>
20	#include <linux/kvm_host.h>	20	#include <linux/kvm_host.h>
		21	#include <linux/uaccess.h>
21	#include <linux/wait.h>	22	#include <linux/wait.h>
22		23
23	#include <asm/cputype.h>	24	#include <asm/cputype.h>
@@ -427,3 +428,62 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu) · 403 unmodified lines
427	smccc_set_retval(vcpu, val, 0, 0, 0);	428	smccc_set_retval(vcpu, val, 0, 0, 0);
428	return 1;	429	return 1;
429	}	430	}
		431
		432	int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
		433	{
		434	return 1; /* PSCI version */
		435	}
		436
		437	int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu vcpu, u64 __user uindices)
		438	{
		439	if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices))
		440	return -EFAULT;
		441
		442	return 0;
		443	}
		444
		445	int kvm_arm_get_fw_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
		446	{
		447	if (reg->id == KVM_REG_ARM_PSCI_VERSION) {
		448	void __user uaddr = (void __user )(long)reg->addr;
		449	u64 val;
		450
		451	val = kvm_psci_version(vcpu, vcpu->kvm);
		452	if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
		453	return -EFAULT;
		454
		455	return 0;
		456	}
		457
		458	return -EINVAL;
		459	}
		460
		461	int kvm_arm_set_fw_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
		462	{
		463	if (reg->id == KVM_REG_ARM_PSCI_VERSION) {
		464	void __user uaddr = (void __user )(long)reg->addr;
		465	bool wants_02;
		466	u64 val;
		467
		468	if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
		469	return -EFAULT;
		470
		471	wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
		472
		473	switch (val) {
		474	case KVM_ARM_PSCI_0_1:
		475	if (wants_02)
		476	return -EINVAL;
		477	vcpu->kvm->arch.psci_version = val;
		478	return 0;
		479	case KVM_ARM_PSCI_0_2:
		480	case KVM_ARM_PSCI_1_0:
		481	if (!wants_02)
		482	return -EINVAL;
		483	vcpu->kvm->arch.psci_version = val;
		484	return 0;
		485	}
		486	}
		487
		488	return -EINVAL;
		489	}

virt/kvm/arm/vgic/vgic.c+8−0

 	list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) {
 		struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB;
+		bool target_vcpu_needs_kick = false;
 		spin_lock(&irq->irq_lock);
 			list_del(&irq->ap_list);
 			irq->vcpu = target_vcpu;
 			list_add_tail(&irq->ap_list, &new_cpu->ap_list_head);
+			target_vcpu_needs_kick = true;
 		}
 		spin_unlock(&irq->irq_lock);
 		spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock);
 		spin_unlock_irqrestore(&vcpuA->arch.vgic_cpu.ap_list_lock, flags);
+		if (target_vcpu_needs_kick) {
+			kvm_make_request(KVM_REQ_IRQ_PENDING, target_vcpu);
+			kvm_vcpu_kick(target_vcpu);
+		}
 		goto retry;
 	}