To pick up the changes from these csets: bf64e0b00e1f ("drm/i915: Expand I915_PARAM_HAS_SCHEDULER into a capability bitmask") ac14fbd460d0 ("drm/i915/scheduler: Support user-defined priorities") 822a4b673284 ("drm/i915: Don't use BIT() in UAPI section") 3fd3a6ffe279 ("drm/i915: Simplify i915_reg_read_ioctl") None of them affects how the tools are built, this os done just to silence this perf build warning: Warning: Kernel ABI header at 'tools/include/uapi/drm/i915_drm.h' differs from latest version at 'include/uapi/drm/i915_drm.h'
Unified · Split
| @@ -397,10 +397,20 @@ typedef struct drm_i915_irq_wait { · 396 unmodified lines | |||
| 397 | #define I915_PARAM_MIN_EU_IN_POOL 39 | 397 | #define I915_PARAM_MIN_EU_IN_POOL 39 |
| 398 | #define I915_PARAM_MMAP_GTT_VERSION 40 | 398 | #define I915_PARAM_MMAP_GTT_VERSION 40 |
| 399 | 399 | ||
| 400 | /* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution | 400 | /* |
| 401 | * Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution | ||
| 401 | * priorities and the driver will attempt to execute batches in priority order. | 402 | * priorities and the driver will attempt to execute batches in priority order. |
| 403 | * The param returns a capability bitmask, nonzero implies that the scheduler | ||
| 404 | * is enabled, with different features present according to the mask. | ||
| 405 | * | ||
| 406 | * The initial priority for each batch is supplied by the context and is | ||
| 407 | * controlled via I915_CONTEXT_PARAM_PRIORITY. | ||
| 402 | */ | 408 | */ |
| 403 | #define I915_PARAM_HAS_SCHEDULER 41 | 409 | #define I915_PARAM_HAS_SCHEDULER 41 |
| 410 | #define I915_SCHEDULER_CAP_ENABLED (1ul << 0) | ||
| 411 | #define I915_SCHEDULER_CAP_PRIORITY (1ul << 1) | ||
| 412 | #define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2) | ||
| 413 | |||
| 404 | #define I915_PARAM_HUC_STATUS 42 | 414 | #define I915_PARAM_HUC_STATUS 42 |
| 405 | 415 | ||
| 406 | /* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to opt-out of | 416 | /* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to opt-out of |
| @@ -1309,14 +1319,16 @@ struct drm_i915_reg_read { · 902 unmodified lines | |||
| 1309 | * be specified | 1319 | * be specified |
| 1310 | */ | 1320 | */ |
| 1311 | __u64 offset; | 1321 | __u64 offset; |
| 1322 | #define I915_REG_READ_8B_WA (1ul << 0) | ||
| 1323 | |||
| 1312 | __u64 val; /* Return value */ | 1324 | __u64 val; /* Return value */ |
| 1313 | }; | 1325 | }; |
| 1314 | /* Known registers: | 1326 | /* Known registers: |
| 1315 | * | 1327 | * |
| 1316 | * Render engine timestamp - 0x2358 + 64bit - gen7+ | 1328 | * Render engine timestamp - 0x2358 + 64bit - gen7+ |
| 1317 | * - Note this register returns an invalid value if using the default | 1329 | * - Note this register returns an invalid value if using the default |
| 1318 | * single instruction 8byte read, in order to workaround that use | 1330 | * single instruction 8byte read, in order to workaround that pass |
| 1319 | * offset (0x2538 | 1) instead. | 1331 | * flag I915_REG_READ_8B_WA in offset field. |
| 1320 | * | 1332 | * |
| 1321 | */ | 1333 | */ |
| 1322 | 1334 | ||
| @@ -1359,6 +1371,10 @@ struct drm_i915_gem_context_param { · 36 unmodified lines | |||
| 1359 | #define I915_CONTEXT_PARAM_GTT_SIZE 0x3 | 1371 | #define I915_CONTEXT_PARAM_GTT_SIZE 0x3 |
| 1360 | #define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4 | 1372 | #define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4 |
| 1361 | #define I915_CONTEXT_PARAM_BANNABLE 0x5 | 1373 | #define I915_CONTEXT_PARAM_BANNABLE 0x5 |
| 1374 | #define I915_CONTEXT_PARAM_PRIORITY 0x6 | ||
| 1375 | #define I915_CONTEXT_MAX_USER_PRIORITY 1023 /* inclusive */ | ||
| 1376 | #define I915_CONTEXT_DEFAULT_PRIORITY 0 | ||
| 1377 | #define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */ | ||
| 1362 | __u64 value; | 1378 | __u64 value; |
| 1363 | }; | 1379 | }; |
| 1364 | 1380 | ||
| @@ -1510,9 +1526,14 @@ struct drm_i915_perf_oa_config { · 145 unmodified lines | |||
| 1510 | __u32 n_boolean_regs; | 1526 | __u32 n_boolean_regs; |
| 1511 | __u32 n_flex_regs; | 1527 | __u32 n_flex_regs; |
| 1512 | 1528 | ||
| 1513 | __u64 __user mux_regs_ptr; | 1529 | /* |
| 1514 | __u64 __user boolean_regs_ptr; | 1530 | * These fields are pointers to tuples of u32 values (register |
| 1515 | __u64 __user flex_regs_ptr; | 1531 | * address, value). For example the expected length of the buffer |
| 1532 | * pointed by mux_regs_ptr is (2 * sizeof(u32) * n_mux_regs). | ||
| 1533 | */ | ||
| 1534 | __u64 mux_regs_ptr; | ||
| 1535 | __u64 boolean_regs_ptr; | ||
| 1536 | __u64 flex_regs_ptr; | ||
| 1516 | }; | 1537 | }; |
| 1517 | 1538 | ||
| 1518 | #if defined(__cplusplus) | 1539 | #if defined(__cplusplus) |